1 /*
2 * Copyright 2019 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 /***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12 /*
13 * How to setup clock using clock driver functions:
14 *
15 * 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
16 * and flash clock are in allowed range during clock mode switch.
17 *
18 * 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.
19 *
20 * 3. Call CLOCK_SetMcgliteConfig to set MCG_Lite configuration.
21 *
22 * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
23 */
24
25 /* clang-format off */
26 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
27 !!GlobalInfo
28 product: Clocks v6.0
29 processor: K32L2B31xxxxA
30 package_id: K32L2B31VLH0A
31 mcu_data: ksdk2_0
32 processor_version: 0.0.0
33 board: FRDM-K32L2B
34 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
35 /* clang-format on */
36
37 #include "fsl_smc.h"
38 #include "clock_config.h"
39
40 /*******************************************************************************
41 * Definitions
42 ******************************************************************************/
43 #define OSC_CAP0P 0U /*!< Oscillator 0pF capacitor load */
44 #define OSC_ER_CLK_DISABLE 0U /*!< Disable external reference clock */
45 #define SIM_OSC32KSEL_OSC32KCLK_CLK 0U /*!< OSC32KSEL select: OSC32KCLK clock */
46
47 /*******************************************************************************
48 * Variables
49 ******************************************************************************/
50 /* System clock frequency. */
51 extern uint32_t SystemCoreClock;
52
53 /*******************************************************************************
54 ************************ BOARD_InitBootClocks function ************************
55 ******************************************************************************/
BOARD_InitBootClocks(void)56 void BOARD_InitBootClocks(void)
57 {
58 BOARD_BootClockRUN();
59 }
60
61 /*******************************************************************************
62 ********************** Configuration BOARD_BootClockRUN ***********************
63 ******************************************************************************/
64 /* clang-format off */
65 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
66 !!Configuration
67 name: BOARD_BootClockRUN
68 called_from_default_init: true
69 outputs:
70 - {id: Bus_clock.outFreq, value: 24 MHz}
71 - {id: Core_clock.outFreq, value: 48 MHz}
72 - {id: Flash_clock.outFreq, value: 24 MHz}
73 - {id: LPO_clock.outFreq, value: 1 kHz}
74 - {id: MCGIRCLK.outFreq, value: 8 MHz}
75 - {id: MCGPCLK.outFreq, value: 48 MHz}
76 - {id: System_clock.outFreq, value: 48 MHz}
77 settings:
78 - {id: MCGMode, value: HIRC}
79 - {id: MCG.CLKS.sel, value: MCG.HIRC}
80 - {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
81 - {id: MCG_C2_RANGE0_CFG, value: Very_high}
82 - {id: MCG_MC_HIRCEN_CFG, value: Enabled}
83 - {id: OSC0_CR_ERCLKEN_CFG, value: Enabled}
84 - {id: OSC_CR_ERCLKEN_CFG, value: Enabled}
85 - {id: SIM.CLKOUTSEL.sel, value: MCG.MCGPCLK}
86 - {id: SIM.COPCLKSEL.sel, value: OSC.OSCERCLK}
87 - {id: SIM.FLEXIOSRCSEL.sel, value: MCG.MCGPCLK}
88 - {id: SIM.LPUART0SRCSEL.sel, value: MCG.MCGPCLK}
89 - {id: SIM.LPUART1SRCSEL.sel, value: MCG.MCGPCLK}
90 - {id: SIM.RTCCLKOUTSEL.sel, value: OSC.OSCERCLK}
91 - {id: SIM.TPMSRCSEL.sel, value: MCG.MCGPCLK}
92 - {id: SIM.USBSRCSEL.sel, value: MCG.MCGPCLK}
93 sources:
94 - {id: MCG.HIRC.outFreq, value: 48 MHz}
95 - {id: OSC.OSC.outFreq, value: 32 MHz}
96 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
97 /* clang-format on */
98
99 /*******************************************************************************
100 * Variables for BOARD_BootClockRUN configuration
101 ******************************************************************************/
102 const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN = {
103 .outSrc = kMCGLITE_ClkSrcHirc, /* MCGOUTCLK source is HIRC */
104 .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
105 .ircs = kMCGLITE_Lirc8M, /* Slow internal reference (LIRC) 8 MHz clock selected */
106 .fcrdiv = kMCGLITE_LircDivBy1, /* Low-frequency Internal Reference Clock Divider: divided by 1 */
107 .lircDiv2 = kMCGLITE_LircDivBy1, /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
108 .hircEnableInNotHircMode = true, /* HIRC source is enabled */
109 };
110 const sim_clock_config_t simConfig_BOARD_BootClockRUN = {
111 .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK, /* OSC32KSEL select: OSC32KCLK clock */
112 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
113 };
114 const osc_config_t oscConfig_BOARD_BootClockRUN = {
115 .freq = 0U, /* Oscillator frequency: 0Hz */
116 .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */
117 .workMode = kOSC_ModeOscLowPower, /* Oscillator low power */
118 .oscerConfig = {
119 .enableMode =
120 kOSC_ErClkEnable, /* Enable external reference clock, disable external reference clock in STOP mode */
121 }};
122
123 /*******************************************************************************
124 * Code for BOARD_BootClockRUN configuration
125 ******************************************************************************/
BOARD_BootClockRUN(void)126 void BOARD_BootClockRUN(void)
127 {
128 /* Set the system clock dividers in SIM to safe value. */
129 CLOCK_SetSimSafeDivs();
130 /* Set MCG to HIRC mode. */
131 CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN);
132 /* Set the clock configuration in SIM module. */
133 CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
134 /* Set SystemCoreClock variable. */
135 SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
136 }
137
138 /*******************************************************************************
139 ********************* Configuration BOARD_BootClockVLPR ***********************
140 ******************************************************************************/
141 /* clang-format off */
142 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
143 !!Configuration
144 name: BOARD_BootClockVLPR
145 outputs:
146 - {id: Bus_clock.outFreq, value: 1 MHz}
147 - {id: Core_clock.outFreq, value: 2 MHz}
148 - {id: Flash_clock.outFreq, value: 1 MHz}
149 - {id: LPO_clock.outFreq, value: 1 kHz}
150 - {id: MCGIRCLK.outFreq, value: 2 MHz}
151 - {id: System_clock.outFreq, value: 2 MHz}
152 settings:
153 - {id: MCGMode, value: LIRC2M}
154 - {id: powerMode, value: VLPR}
155 - {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
156 - {id: RTCCLKOUTConfig, value: 'yes'}
157 - {id: SIM.OUTDIV4.scale, value: '2', locked: true}
158 - {id: SIM.RTCCLKOUTSEL.sel, value: OSC.OSCERCLK}
159 sources:
160 - {id: MCG.LIRC.outFreq, value: 2 MHz}
161 - {id: OSC.OSC.outFreq, value: 32.768 kHz}
162 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
163 /* clang-format on */
164
165 /*******************************************************************************
166 * Variables for BOARD_BootClockVLPR configuration
167 ******************************************************************************/
168 const mcglite_config_t mcgliteConfig_BOARD_BootClockVLPR = {
169 .outSrc = kMCGLITE_ClkSrcLirc, /* MCGOUTCLK source is LIRC */
170 .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
171 .ircs = kMCGLITE_Lirc2M, /* Slow internal reference (LIRC) 2 MHz clock selected */
172 .fcrdiv = kMCGLITE_LircDivBy1, /* Low-frequency Internal Reference Clock Divider: divided by 1 */
173 .lircDiv2 = kMCGLITE_LircDivBy1, /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
174 .hircEnableInNotHircMode = false, /* HIRC source is not enabled */
175 };
176 const sim_clock_config_t simConfig_BOARD_BootClockVLPR = {
177 .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK, /* OSC32KSEL select: OSC32KCLK clock */
178 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
179 };
180 const osc_config_t oscConfig_BOARD_BootClockVLPR = {
181 .freq = 0U, /* Oscillator frequency: 0Hz */
182 .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */
183 .workMode = kOSC_ModeOscLowPower, /* Oscillator low power */
184 .oscerConfig = {
185 .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
186 }};
187
188 /*******************************************************************************
189 * Code for BOARD_BootClockVLPR configuration
190 ******************************************************************************/
BOARD_BootClockVLPR(void)191 void BOARD_BootClockVLPR(void)
192 {
193 /* Set the system clock dividers in SIM to safe value. */
194 CLOCK_SetSimSafeDivs();
195 /* Set MCG to LIRC2M mode. */
196 CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockVLPR);
197 /* Set the clock configuration in SIM module. */
198 CLOCK_SetSimConfig(&simConfig_BOARD_BootClockVLPR);
199 /* Set VLPR power mode. */
200 SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
201 #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
202 SMC_SetPowerModeVlpr(SMC, false);
203 #else
204 SMC_SetPowerModeVlpr(SMC);
205 #endif
206 while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr)
207 {
208 }
209 /* Set SystemCoreClock variable. */
210 SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK;
211 }
212
