1 /*
2  * Copyright 2022 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /**
8 *   @file       Clock_Ip_Cfg.h
9 *   @version    0.9.0
10 *
11 *   @brief   AUTOSAR Mcu - Clock configuration header file.
12 *   @details This file is the header containing all the necessary information for CLOCK
13 *            module configuration(s).
14 *
15 *   @addtogroup CLOCK_DRIVER_CONFIGURATION Clock Driver
16 *   @{
17 */
18 
19 #ifndef CLOCK_IP_CFG_H
20 #define CLOCK_IP_CFG_H
21 
22 
23 #ifdef __cplusplus
24 extern "C"{
25 #endif
26 
27 
28 /*==================================================================================================
29                                          INCLUDE FILES
30  1) system and project includes
31  2) needed interfaces from external units
32  3) internal and external interfaces from this unit
33 ==================================================================================================*/
34 
35 /*==================================================================================================
36 *                              SOURCE FILE VERSION INFORMATION
37 ==================================================================================================*/
38 #define CLOCK_IP_CFG_VENDOR_ID                      43
39 #define CLOCK_IP_CFG_AR_RELEASE_MAJOR_VERSION       4
40 #define CLOCK_IP_CFG_AR_RELEASE_MINOR_VERSION       7
41 #define CLOCK_IP_CFG_AR_RELEASE_REVISION_VERSION    0
42 #define CLOCK_IP_CFG_SW_MAJOR_VERSION               0
43 #define CLOCK_IP_CFG_SW_MINOR_VERSION               9
44 #define CLOCK_IP_CFG_SW_PATCH_VERSION               0
45 
46 /*==================================================================================================
47 *                                     FILE VERSION CHECKS
48 ==================================================================================================*/
49 /*==================================================================================================
50                                            DEFINES AND MACROS
51 ==================================================================================================*/
52 /**
53 * @brief            Pre-processor switch for enabling the default error detection and reporting to the DET.
54 *                   The detection of default errors is configurable (ON / OFF) at pre-compile time.
55 */
56 #define CLOCK_IP_DEV_ERROR_DETECT         (STD_OFF)
57 
58 #define CLOCK_IP_TIMEOUT_TYPE                (OSIF_COUNTER_DUMMY)
59 
60 #define CLOCK_IP_TIMEOUT_VALUE_US            (50000)
61 
62 /**
63 * @brief        Support for User mode.
64 *               If this parameter has been configured to 'TRUE' the Clock can be executed from both supervisor and user mode.
65 */
66 #define CLOCK_IP_ENABLE_USER_MODE_SUPPORT  (STD_OFF)
67 
68 /** Check the driver user mode is enabled only when the MCAL_ENABLE_USER_MODE_SUPPORT is enabled */
69 #ifndef MCAL_ENABLE_USER_MODE_SUPPORT
70   #if (STD_ON == CLOCK_IP_ENABLE_USER_MODE_SUPPORT)
71     #error MCAL_ENABLE_USER_MODE_SUPPORT is not enabled. For running Clock in user mode the MCAL_ENABLE_USER_MODE_SUPPORT needs to be defined.
72   #endif /* (STD_ON == CLOCK_IP_ENABLE_USER_MODE_SUPPORT) */
73 #endif /* ifndef MCAL_ENABLE_USER_MODE_SUPPORT */
74 
75 /*==================================================================================================
76                                              ENUMS
77 ==================================================================================================*/
78 
79 #ifdef CLOCK_IP_PREPARE_MEMORY_CONFIG
80 /**
81 * @brief            The stage of the flash and ram controllers configuration.
82 * @details          This is used to specify the entry and exit point of the flash and ram controllers configuration.
83 */
84 typedef enum
85 {
86     CLOCK_IP_RAM_MEMORY_CONFIG_ENTRY_POINT      = 0x77U,
87     CLOCK_IP_RAM_MEMORY_CONFIG_EXIT_POINT       = 0x88U,
88     CLOCK_IP_FLASH_MEMORY_CONFIG_ENTRY_POINT    = 0x89U,
89     CLOCK_IP_FLASH_MEMORY_CONFIG_EXIT_POINT     = 0x90U
90 
91 } Clock_Ip_MemoryConfigStageType;
92 #endif
93 
94 
95 /*==================================================================================================
96                                  STRUCTURES AND OTHER TYPEDEFS
97 ==================================================================================================*/
98 
99 /*==================================================================================================
100 *                                    FUNCTION PROTOTYPES
101 ==================================================================================================*/
102 #define MCU_START_SEC_CODE
103 #include "Mcu_MemMap.h"
104 
105 #define MCU_STOP_SEC_CODE
106 #include "Mcu_MemMap.h"
107 
108 
109 #define MCU_START_SEC_CONFIG_DATA_UNSPECIFIED
110 #include "Mcu_MemMap.h"
111 
112 
113 /* *************************************************************************
114  * Configuration structure for Clock Configuration
115  * ************************************************************************* */
116 
117 extern const Clock_Ip_ClockConfigType Clock_Ip_aClockConfig[];
118 
119 
120 #define MCU_STOP_SEC_CONFIG_DATA_UNSPECIFIED
121 #include "Mcu_MemMap.h"
122 
123 #ifdef __cplusplus
124 }
125 #endif
126 
127 #endif /* CLOCK_IP_CFG_H */
128 
129 /** @} */
130