1 /*
2  * Copyright 1997-2016 Freescale Semiconductor, Inc.
3  * Copyright 2016-2021 NXP
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 /*!
9  * @file S32K344_SIRC.h
10  * @version 1.9
11  * @date 2021-10-27
12  * @brief Peripheral Access Layer for S32K344_SIRC
13  *
14  * This file contains register definitions and macros for easy access to their
15  * bit fields.
16  *
17  * This file assumes LITTLE endian system.
18  */
19 
20 /**
21 * @page misra_violations MISRA-C:2012 violations
22 *
23 * @section [global]
24 * Violates MISRA 2012 Advisory Rule 2.3, local typedef not referenced
25 * The SoC header defines typedef for all modules.
26 *
27 * @section [global]
28 * Violates MISRA 2012 Advisory Rule 2.5, local macro not referenced
29 * The SoC header defines macros for all modules and registers.
30 *
31 * @section [global]
32 * Violates MISRA 2012 Advisory Directive 4.9, Function-like macro
33 * These are generated macros used for accessing the bit-fields from registers.
34 *
35 * @section [global]
36 * Violates MISRA 2012 Required Rule 5.1, identifier clash
37 * The supported compilers use more than 31 significant characters for identifiers.
38 *
39 * @section [global]
40 * Violates MISRA 2012 Required Rule 5.2, identifier clash
41 * The supported compilers use more than 31 significant characters for identifiers.
42 *
43 * @section [global]
44 * Violates MISRA 2012 Required Rule 5.4, identifier clash
45 * The supported compilers use more than 31 significant characters for identifiers.
46 *
47 * @section [global]
48 * Violates MISRA 2012 Required Rule 5.5, identifier clash
49 * The supported compilers use more than 31 significant characters for identifiers.
50 *
51 * @section [global]
52 * Violates MISRA 2012 Required Rule 21.1, defined macro '__I' is reserved to the compiler
53 * This type qualifier is needed to ensure correct I/O access and addressing.
54 */
55 
56 /* Prevention from multiple including the same memory map */
57 #if !defined(S32K344_SIRC_H_)  /* Check if memory map has not been already included */
58 #define S32K344_SIRC_H_
59 
60 #include "S32K344_COMMON.h"
61 
62 /* ----------------------------------------------------------------------------
63    -- SIRC Peripheral Access Layer
64    ---------------------------------------------------------------------------- */
65 
66 /*!
67  * @addtogroup SIRC_Peripheral_Access_Layer SIRC Peripheral Access Layer
68  * @{
69  */
70 
71 /** SIRC - Register Layout Typedef */
72 typedef struct {
73   uint8_t RESERVED_0[4];
74   __I  uint32_t SR;                                /**< Status Register, offset: 0x4 */
75   uint8_t RESERVED_1[4];
76   __IO uint32_t MISCELLANEOUS_IN;                  /**< Miscellaneous input, offset: 0xC */
77 } SIRC_Type, *SIRC_MemMapPtr;
78 
79 /** Number of instances of the SIRC module. */
80 #define SIRC_INSTANCE_COUNT                      (1u)
81 
82 /* SIRC - Peripheral instance base addresses */
83 /** Peripheral SIRC base address */
84 #define IP_SIRC_BASE                             (0x402C8000u)
85 /** Peripheral SIRC base pointer */
86 #define IP_SIRC                                  ((SIRC_Type *)IP_SIRC_BASE)
87 /** Array initializer of SIRC peripheral base addresses */
88 #define IP_SIRC_BASE_ADDRS                       { IP_SIRC_BASE }
89 /** Array initializer of SIRC peripheral base pointers */
90 #define IP_SIRC_BASE_PTRS                        { IP_SIRC }
91 
92 /* ----------------------------------------------------------------------------
93    -- SIRC Register Masks
94    ---------------------------------------------------------------------------- */
95 
96 /*!
97  * @addtogroup SIRC_Register_Masks SIRC Register Masks
98  * @{
99  */
100 
101 /*! @name SR - Status Register */
102 /*! @{ */
103 
104 #define SIRC_SR_STATUS_MASK                      (0x1U)
105 #define SIRC_SR_STATUS_SHIFT                     (0U)
106 #define SIRC_SR_STATUS_WIDTH                     (1U)
107 #define SIRC_SR_STATUS(x)                        (((uint32_t)(((uint32_t)(x)) << SIRC_SR_STATUS_SHIFT)) & SIRC_SR_STATUS_MASK)
108 /*! @} */
109 
110 /*! @name MISCELLANEOUS_IN - Miscellaneous input */
111 /*! @{ */
112 
113 #define SIRC_MISCELLANEOUS_IN_STANDBY_ENABLE_MASK (0x100U)
114 #define SIRC_MISCELLANEOUS_IN_STANDBY_ENABLE_SHIFT (8U)
115 #define SIRC_MISCELLANEOUS_IN_STANDBY_ENABLE_WIDTH (1U)
116 #define SIRC_MISCELLANEOUS_IN_STANDBY_ENABLE(x)  (((uint32_t)(((uint32_t)(x)) << SIRC_MISCELLANEOUS_IN_STANDBY_ENABLE_SHIFT)) & SIRC_MISCELLANEOUS_IN_STANDBY_ENABLE_MASK)
117 /*! @} */
118 
119 /*!
120  * @}
121  */ /* end of group SIRC_Register_Masks */
122 
123 /*!
124  * @}
125  */ /* end of group SIRC_Peripheral_Access_Layer */
126 
127 #endif  /* #if !defined(S32K344_SIRC_H_) */
128