1 /* 2 * Copyright 2017 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef _RTE_DEVICE_H 9 #define _RTE_DEVICE_H 10 11 extern void I2C4_InitPins(); 12 extern void I2C4_DeinitPins(); 13 extern void USART0_InitPins(); 14 extern void USART0_DeinitPins(); 15 extern void SPI8_InitPins(); 16 extern void SPI8_DeinitPins(); 17 extern void USART0_InitPins(); 18 extern void USART0_DeinitPins(); 19 extern void SPI7_InitPins(); 20 extern void SPI7_DeinitPins(); 21 22 /*I2C Driver name mapping*/ 23 /* User needs to provide the implementation of I2CX_GetFreq/I2CX_InitPins/I2CX_DeinitPins for the enabled I2C instance. 24 */ 25 #define RTE_I2C4 1 26 #define RTE_I2C4_PIN_INIT I2C4_InitPins 27 #define RTE_I2C4_PIN_DEINIT I2C4_DeinitPins 28 #define RTE_I2C4_DMA_EN 0 29 30 /*USART Driver name mapping. */ 31 /* User needs to provide the implementation of USARTX_GetFreq/USARTX_InitPins/USARTX_DeinitPins for the enabled USART 32 * instance. */ 33 #define RTE_USART0 1 34 #define RTE_USART0_PIN_INIT USART0_InitPins 35 #define RTE_USART0_PIN_DEINIT USART0_DeinitPins 36 #define RTE_USART0_DMA_EN 0 37 38 /*SPI Driver name mapping*/ 39 /* User needs to provide the implementation of SPIX_GetFreq/SPIX_InitPins/SPIX_DeinitPins for the enabled SPI instance. 40 */ 41 #define RTE_SPI8 1 42 #define RTE_SPI8_PIN_INIT SPI8_InitPins 43 #define RTE_SPI8_PIN_DEINIT SPI8_DeinitPins 44 #define RTE_SPI8_DMA_EN 0 45 46 /*I2C configuration*/ 47 #define RTE_I2C4_Master_DMA_BASE DMA0 48 #define RTE_I2C4_Master_DMA_CH 21 49 50 /* USART configuration. */ 51 #define USART_RX_BUFFER_LEN 64 52 #define USART0_RX_BUFFER_ENABLE 1 53 #define USART1_RX_BUFFER_ENABLE 0 54 #define USART2_RX_BUFFER_ENABLE 0 55 #define USART3_RX_BUFFER_ENABLE 0 56 #define USART4_RX_BUFFER_ENABLE 0 57 #define USART5_RX_BUFFER_ENABLE 0 58 #define USART6_RX_BUFFER_ENABLE 0 59 #define USART7_RX_BUFFER_ENABLE 0 60 61 #define RTE_USART0_PIN_INIT USART0_InitPins 62 #define RTE_USART0_PIN_DEINIT USART0_DeinitPins 63 #define RTE_USART0_DMA_TX_CH 5 64 #define RTE_USART0_DMA_TX_DMA_BASE DMA0 65 #define RTE_USART0_DMA_RX_CH 4 66 #define RTE_USART0_DMA_RX_DMA_BASE DMA0 67 68 /* SPI configuration. */ 69 70 #define RTE_SPI8_SSEL_NUM kSPI_Ssel1 71 #define RTE_SPI8_PIN_INIT SPI8_InitPins 72 #define RTE_SPI8_PIN_DEINIT SPI8_DeinitPins 73 #define RTE_SPI8_DMA_TX_CH 19 74 #define RTE_SPI8_DMA_TX_DMA_BASE DMA0 75 #define RTE_SPI8_DMA_RX_CH 18 76 #define RTE_SPI8_DMA_RX_DMA_BASE DMA0 77 #endif /* _RTE_DEVICE_H */ 78
