1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2021 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _FSL_IOCON_H_
10 #define _FSL_IOCON_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup lpc_iocon
16 * @{
17 */
18
19 /*! @file */
20
21 /*******************************************************************************
22 * Definitions
23 ******************************************************************************/
24
25 /* Component ID definition, used by tools. */
26 #ifndef FSL_COMPONENT_ID
27 #define FSL_COMPONENT_ID "platform.drivers.lpc_iocon"
28 #endif
29
30 /*! @name Driver version */
31 /*@{*/
32 /*! @brief IOCON driver version. */
33 #define FSL_IOCON_DRIVER_VERSION (MAKE_VERSION(2, 2, 0))
34 /*@}*/
35
36 /**
37 * @brief Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format
38 */
39 typedef struct _iocon_group
40 {
41 uint8_t port; /* Pin port */
42 uint8_t pin; /* Pin number */
43 uint8_t ionumber; /* IO number */
44 uint16_t modefunc; /* Function and mode */
45 } iocon_group_t;
46
47 /**
48 * @brief IOCON function and mode selection definitions
49 * @note See the User Manual for specific modes and functions supported by the various pins.
50 */
51 #define IOCON_FUNC0 0x0 /*!< Selects pin function 0 */
52 #define IOCON_FUNC1 0x1 /*!< Selects pin function 1 */
53 #define IOCON_FUNC2 0x2 /*!< Selects pin function 2 */
54 #define IOCON_FUNC3 0x3 /*!< Selects pin function 3 */
55 #define IOCON_FUNC4 0x4 /*!< Selects pin function 4 */
56 #define IOCON_FUNC5 0x5 /*!< Selects pin function 5 */
57 #define IOCON_FUNC6 0x6 /*!< Selects pin function 6 */
58 #define IOCON_FUNC7 0x7 /*!< Selects pin function 7 */
59 #if defined(FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH) && (FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH == 4)
60 #define IOCON_FUNC8 0x8 /*!< Selects pin function 8 */
61 #define IOCON_FUNC9 0x9 /*!< Selects pin function 9 */
62 #define IOCON_FUNC10 0xA /*!< Selects pin function 10 */
63 #define IOCON_FUNC11 0xB /*!< Selects pin function 11 */
64 #define IOCON_FUNC12 0xC /*!< Selects pin function 12 */
65 #define IOCON_FUNC13 0xD /*!< Selects pin function 13 */
66 #define IOCON_FUNC14 0xE /*!< Selects pin function 14 */
67 #define IOCON_FUNC15 0xF /*!< Selects pin function 15 */
68 #endif /* FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH */
69
70 #if defined(IOCON_PIO_MODE_SHIFT)
71 #define IOCON_MODE_INACT (0x0 << IOCON_PIO_MODE_SHIFT) /*!< No addition pin function */
72 #define IOCON_MODE_PULLDOWN (0x1 << IOCON_PIO_MODE_SHIFT) /*!< Selects pull-down function */
73 #define IOCON_MODE_PULLUP (0x2 << IOCON_PIO_MODE_SHIFT) /*!< Selects pull-up function */
74 #define IOCON_MODE_REPEATER (0x3 << IOCON_PIO_MODE_SHIFT) /*!< Selects pin repeater function */
75 #endif
76
77 #if defined(IOCON_PIO_I2CSLEW_SHIFT)
78 #define IOCON_GPIO_MODE (0x1 << IOCON_PIO_I2CSLEW_SHIFT) /*!< GPIO Mode */
79 #define IOCON_I2C_MODE (0x0 << IOCON_PIO_I2CSLEW_SHIFT) /*!< I2C Slew Rate Control */
80 #define IOCON_I2C_SLEW IOCON_I2C_MODE /*!< Deprecated name for #IOCON_I2C_MODE */
81 #endif
82
83 #if defined(IOCON_PIO_EGP_SHIFT)
84 #define IOCON_GPIO_MODE (0x1 << IOCON_PIO_EGP_SHIFT) /*!< GPIO Mode */
85 #define IOCON_I2C_MODE (0x0 << IOCON_PIO_EGP_SHIFT) /*!< I2C Slew Rate Control */
86 #define IOCON_I2C_SLEW IOCON_I2C_MODE /*!< Deprecated name for #IOCON_I2C_MODE */
87 #endif
88
89 #if defined(IOCON_PIO_SLEW_SHIFT)
90 #define IOCON_SLEW_STANDARD (0x0 << IOCON_PIO_SLEW_SHIFT) /*!< Driver Slew Rate Control */
91 #define IOCON_SLEW_FAST (0x1 << IOCON_PIO_SLEW_SHIFT) /*!< Driver Slew Rate Control */
92 #endif
93
94 #if defined(IOCON_PIO_INVERT_SHIFT)
95 #define IOCON_INV_EN (0x1 << IOCON_PIO_INVERT_SHIFT) /*!< Enables invert function on input */
96 #endif
97
98 #if defined(IOCON_PIO_DIGIMODE_SHIFT)
99 #define IOCON_ANALOG_EN (0x0 << IOCON_PIO_DIGIMODE_SHIFT) /*!< Enables analog function by setting 0 to bit 7 */
100 #define IOCON_DIGITAL_EN \
101 (0x1 << IOCON_PIO_DIGIMODE_SHIFT) /*!< Enables digital function by setting 1 to bit 7(default) */
102 #endif
103
104 #if defined(IOCON_PIO_FILTEROFF_SHIFT)
105 #define IOCON_INPFILT_OFF (0x1 << IOCON_PIO_FILTEROFF_SHIFT) /*!< Input filter Off for GPIO pins */
106 #define IOCON_INPFILT_ON (0x0 << IOCON_PIO_FILTEROFF_SHIFT) /*!< Input filter On for GPIO pins */
107 #endif
108
109 #if defined(IOCON_PIO_I2CDRIVE_SHIFT)
110 #define IOCON_I2C_LOWDRIVER (0x0 << IOCON_PIO_I2CDRIVE_SHIFT) /*!< Low drive, Output drive sink is 4 mA */
111 #define IOCON_I2C_HIGHDRIVER (0x1 << IOCON_PIO_I2CDRIVE_SHIFT) /*!< High drive, Output drive sink is 20 mA */
112 #endif
113
114 #if defined(IOCON_PIO_OD_SHIFT)
115 #define IOCON_OPENDRAIN_EN (0x1 << IOCON_PIO_OD_SHIFT) /*!< Enables open-drain function */
116 #endif
117
118 #if defined(IOCON_PIO_I2CFILTER_SHIFT)
119 #define IOCON_I2CFILTER_OFF (0x1 << IOCON_PIO_I2CFILTER_SHIFT) /*!< I2C 50 ns glitch filter enabled */
120 #define IOCON_I2CFILTER_ON (0x0 << IOCON_PIO_I2CFILTER_SHIFT) /*!< I2C 50 ns glitch filter not enabled, */
121 #endif
122
123 #if defined(IOCON_PIO_ASW_SHIFT)
124 #define IOCON_AWS_EN (0x1 << IOCON_PIO_ASW_SHIFT) /*!< Enables analog switch function */
125 #endif
126
127 #if defined(IOCON_PIO_SSEL_SHIFT)
128 #define IOCON_SSEL_3V3 (0x0 << IOCON_PIO_SSEL_SHIFT) /*!< 3V3 signaling in I2C mode */
129 #define IOCON_SSEL_1V8 (0x1 << IOCON_PIO_SSEL_SHIFT) /*!< 1V8 signaling in I2C mode */
130 #endif
131
132 #if defined(IOCON_PIO_ECS_SHIFT)
133 #define IOCON_ECS_OFF (0x0 << IOCON_PIO_ECS_SHIFT) /*!< IO is an open drain cell */
134 #define IOCON_ECS_ON (0x1 << IOCON_PIO_ECS_SHIFT) /*!< Pull-up resistor is connected */
135 #endif
136
137 #if defined(IOCON_PIO_S_MODE_SHIFT)
138 #define IOCON_S_MODE_0CLK (0x0 << IOCON_PIO_S_MODE_SHIFT) /*!< Bypass input filter */
139 #define IOCON_S_MODE_1CLK \
140 (0x1 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 1 filter clock are rejected \ \ \ \ \
141 */
142 #define IOCON_S_MODE_2CLK \
143 (0x2 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 2 filter clock2 are rejected \ \ \ \ \
144 */
145 #define IOCON_S_MODE_3CLK \
146 (0x3 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 3 filter clock2 are rejected \ \ \ \ \
147 */
148 #define IOCON_S_MODE(clks) ((clks) << IOCON_PIO_S_MODE_SHIFT) /*!< Select clocks for digital input filter mode */
149 #endif
150
151 #if defined(IOCON_PIO_CLK_DIV_SHIFT)
152 #define IOCON_CLKDIV(div) \
153 ((div) \
154 << IOCON_PIO_CLK_DIV_SHIFT) /*!< Select peripheral clock divider for input filter sampling clock, 2^n, n=0-6 */
155 #endif
156
157 #if defined(__cplusplus)
158 extern "C" {
159 #endif
160
161 #if (defined(FSL_FEATURE_IOCON_ONE_DIMENSION) && (FSL_FEATURE_IOCON_ONE_DIMENSION == 1))
162 /**
163 * @brief Sets I/O Control pin mux
164 * @param base : The base of IOCON peripheral on the chip
165 * @param ionumber : GPIO number to mux
166 * @param modefunc : OR'ed values of type IOCON_*
167 * @return Nothing
168 */
IOCON_PinMuxSet(IOCON_Type * base,uint8_t ionumber,uint32_t modefunc)169 __STATIC_INLINE void IOCON_PinMuxSet(IOCON_Type *base, uint8_t ionumber, uint32_t modefunc)
170 {
171 base->PIO[ionumber] = modefunc;
172 }
173 #else
174 /**
175 * @brief Sets I/O Control pin mux
176 * @param base : The base of IOCON peripheral on the chip
177 * @param port : GPIO port to mux
178 * @param pin : GPIO pin to mux
179 * @param modefunc : OR'ed values of type IOCON_*
180 * @return Nothing
181 */
182 __STATIC_INLINE void IOCON_PinMuxSet(IOCON_Type *base, uint8_t port, uint8_t pin, uint32_t modefunc)
183 {
184 base->PIO[port][pin] = modefunc;
185 }
186 #endif
187
188 /**
189 * @brief Set all I/O Control pin muxing
190 * @param base : The base of IOCON peripheral on the chip
191 * @param pinArray : Pointer to array of pin mux selections
192 * @param arrayLength : Number of entries in pinArray
193 * @return Nothing
194 */
IOCON_SetPinMuxing(IOCON_Type * base,const iocon_group_t * pinArray,uint32_t arrayLength)195 __STATIC_INLINE void IOCON_SetPinMuxing(IOCON_Type *base, const iocon_group_t *pinArray, uint32_t arrayLength)
196 {
197 uint32_t i;
198
199 for (i = 0; i < arrayLength; i++)
200 {
201 #if (defined(FSL_FEATURE_IOCON_ONE_DIMENSION) && (FSL_FEATURE_IOCON_ONE_DIMENSION == 1))
202 IOCON_PinMuxSet(base, pinArray[i].ionumber, pinArray[i].modefunc);
203 #else
204 IOCON_PinMuxSet(base, pinArray[i].port, pinArray[i].pin, pinArray[i].modefunc);
205 #endif /* FSL_FEATURE_IOCON_ONE_DIMENSION */
206 }
207 }
208
209 /* @} */
210
211 #if defined(__cplusplus)
212 }
213 #endif
214
215 #endif /* _FSL_IOCON_H_ */
216
