1 /* 2 * Copyright 2017-2020 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef _FSL_GPIO_H_ 9 #define _FSL_GPIO_H_ 10 11 #include "fsl_common.h" 12 13 /*! 14 * @addtogroup gpio 15 * @{ 16 */ 17 18 /******************************************************************************* 19 * Definitions 20 ******************************************************************************/ 21 22 /*! @name Driver version */ 23 /*@{*/ 24 /*! @brief GPIO driver version. */ 25 #define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 1, 1)) 26 /*@}*/ 27 28 /*! @brief PORT definition */ 29 typedef enum _gpio_port_num 30 { 31 kGPIO_PORTA = 0U, 32 kGPIO_PORTB, 33 kGPIO_PORTC, 34 kGPIO_PORTD, 35 kGPIO_PORTE, 36 kGPIO_PORTF, 37 kGPIO_PORTG, 38 kGPIO_PORTH, 39 #if FSL_FEATURE_SOC_GPIO_COUNT > 2 40 kGPIO_PORTI, 41 #endif 42 } gpio_port_num_t; 43 44 /*! @brief GPIO direction definition */ 45 typedef enum _gpio_pin_direction 46 { 47 kGPIO_DigitalInput = 0U, /*!< Set current pin as digital input*/ 48 kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output*/ 49 } gpio_pin_direction_t; 50 51 /*! 52 * @brief The GPIO pin configuration structure. 53 * 54 * Each pin can only be configured as either an output pin or an input pin at a time. 55 * If configured as an input pin, leave the outputConfig unused. 56 * Note that in some use cases, the corresponding port property should be configured in advance 57 * with the PORT_SetPinConfig(). 58 */ 59 typedef struct _gpio_pin_config 60 { 61 gpio_pin_direction_t pinDirection; /*!< GPIO direction, input or output */ 62 /* Output configurations; ignore if configured as an input pin */ 63 uint8_t outputLogic; /*!< Set a default output logic, which has no use in input */ 64 } gpio_pin_config_t; 65 66 /*! @} */ 67 68 /******************************************************************************* 69 * API 70 ******************************************************************************/ 71 72 #if defined(__cplusplus) 73 extern "C" { 74 #endif 75 76 /*! 77 * @addtogroup gpio_driver 78 * @{ 79 */ 80 81 /*! @name GPIO Configuration */ 82 /*@{*/ 83 84 /*! 85 * @brief Initializes a GPIO pin used by the board. 86 * 87 * To initialize the GPIO, define a pin configuration, as either input or output, in the user file. 88 * Then, call the GPIO_PinInit() function. 89 * 90 * This is an example to define an input pin or an output pin configuration. 91 * @code 92 * Define a digital input pin configuration, 93 * gpio_pin_config_t config = 94 * { 95 * kGPIO_DigitalInput, 96 * 0, 97 * } 98 * Define a digital output pin configuration, 99 * gpio_pin_config_t config = 100 * { 101 * kGPIO_DigitalOutput, 102 * 0, 103 * } 104 * @endcode 105 * 106 * @param port GPIO PORT number, see "gpio_port_num_t". 107 * For each group GPIO (GPIOA, GPIOB,etc) control registers, they handles four PORT number controls. 108 * GPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 109 * GPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 110 * ... 111 * @param pin GPIO port pin number 112 * @param config GPIO pin configuration pointer 113 */ 114 void GPIO_PinInit(gpio_port_num_t port, uint8_t pin, const gpio_pin_config_t *config); 115 116 /*@}*/ 117 118 /*! @name GPIO Output Operations */ 119 /*@{*/ 120 121 /*! 122 * @brief Sets the output level of the multiple GPIO pins to the logic 1 or 0. 123 * 124 * @param port GPIO PORT number, see "gpio_port_num_t". 125 * For each group GPIO (GPIOA, GPIOB,etc) control registers, they handles four PORT number controls. 126 * GPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 127 * GPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 128 * ... 129 * @param pin GPIO pin number 130 * @param output GPIO pin output logic level. 131 * - 0: corresponding pin output low-logic level. 132 * - 1: corresponding pin output high-logic level. 133 */ 134 void GPIO_PinWrite(gpio_port_num_t port, uint8_t pin, uint8_t output); 135 136 /*! 137 * @brief Sets the output level of the multiple GPIO pins to the logic 1. 138 * 139 * @param port GPIO PORT number, see "gpio_port_num_t". 140 * For each group GPIO (GPIOA, GPIOB,etc) control registers, they handles four PORT number controls. 141 * GPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 142 * GPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 143 * ... 144 * @param mask GPIO pin number macro 145 */ 146 void GPIO_PortSet(gpio_port_num_t port, uint8_t mask); 147 148 /*! 149 * @brief Sets the output level of the multiple GPIO pins to the logic 0. 150 * 151 * @param port GPIO PORT number, see "gpio_port_num_t". 152 * For each group GPIO (GPIOA, GPIOB,etc) control registers, they handles four PORT number controls. 153 * GPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 154 * GPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 155 * ... 156 * @param mask GPIO pin number macro 157 */ 158 void GPIO_PortClear(gpio_port_num_t port, uint8_t mask); 159 160 /*! 161 * @brief Reverses the current output logic of the multiple GPIO pins. 162 * 163 * @param port GPIO PORT number, see "gpio_port_num_t". 164 * For each group GPIO (GPIOA, GPIOB,etc) control registers, they handles four PORT number controls. 165 * GPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 166 * GPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 167 * ... 168 * @param mask GPIO pin number macro 169 */ 170 void GPIO_PortToggle(gpio_port_num_t port, uint8_t mask); 171 /*@}*/ 172 173 /*! @name GPIO Input Operations */ 174 /*@{*/ 175 176 /*! 177 * @brief Reads the current input value of the GPIO port. 178 * 179 * @param port GPIO PORT number, see "gpio_port_num_t". 180 * For each group GPIO (GPIOA, GPIOB,etc) control registers, they handles four PORT number controls. 181 * GPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 182 * GPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 183 * ... 184 * @param pin GPIO pin number 185 * @retval GPIO port input value 186 * - 0: corresponding pin input low-logic level. 187 * - 1: corresponding pin input high-logic level. 188 */ 189 uint32_t GPIO_PinRead(gpio_port_num_t port, uint8_t pin); 190 191 /*@}*/ 192 193 /*@}*/ 194 195 /*! 196 * @addtogroup fgpio_driver 197 * @{ 198 */ 199 200 /* 201 * Introduces the FGPIO feature. 202 * 203 * The FGPIO features are only support on some Kinetis MCUs. The FGPIO registers are aliased to the IOPORT 204 * interface. Accesses via the IOPORT interface occur in parallel with any instruction fetches and 205 * complete in a single cycle. This aliased Fast GPIO memory map is called FGPIO. 206 */ 207 208 #if defined(FSL_FEATURE_SOC_FGPIO_COUNT) && FSL_FEATURE_SOC_FGPIO_COUNT 209 210 /*! @name FGPIO Configuration */ 211 /*@{*/ 212 213 /*! 214 * @brief Initializes the FGPIO peripheral. 215 * 216 * This function ungates the FGPIO clock. 217 * 218 * @param port FGPIO PORT number, see "gpio_port_num_t". 219 * For each group FGPIO (FGPIOA, FGPIOB,etc) control registers, they handles four PORT number controls. 220 * FGPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 221 * FGPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 222 * ... 223 */ 224 void FGPIO_PortInit(gpio_port_num_t port); 225 226 /*! 227 * @brief Initializes a FGPIO pin used by the board. 228 * 229 * To initialize the FGPIO driver, define a pin configuration, as either input or output, in the user file. 230 * Then, call the FGPIO_PinInit() function. 231 * 232 * This is an example to define an input pin or an output pin configuration: 233 * @code 234 * Define a digital input pin configuration, 235 * gpio_pin_config_t config = 236 * { 237 * kGPIO_DigitalInput, 238 * 0, 239 * } 240 * Define a digital output pin configuration, 241 * gpio_pin_config_t config = 242 * { 243 * kGPIO_DigitalOutput, 244 * 0, 245 * } 246 * @endcode 247 * 248 * @param port FGPIO PORT number, see "gpio_port_num_t". 249 * For each group FGPIO (FGPIOA, FGPIOB,etc) control registers, they handles four PORT number controls. 250 * FGPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 251 * FGPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 252 * ... 253 * @param pin FGPIO port pin number 254 * @param config FGPIO pin configuration pointer 255 */ 256 void FGPIO_PinInit(gpio_port_num_t port, uint8_t pin, const gpio_pin_config_t *config); 257 258 /*@}*/ 259 260 /*! @name FGPIO Output Operations */ 261 /*@{*/ 262 263 /*! 264 * @brief Sets the output level of the multiple FGPIO pins to the logic 1 or 0. 265 * 266 * @param port FGPIO PORT number, see "gpio_port_num_t". 267 * For each group FGPIO (FGPIOA, FGPIOB,etc) control registers, they handles four PORT number controls. 268 * FGPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 269 * FGPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 270 * ... 271 * @param pin FGPIO pin number 272 * @param output FGPIOpin output logic level. 273 * - 0: corresponding pin output low-logic level. 274 * - 1: corresponding pin output high-logic level. 275 */ 276 void FGPIO_PinWrite(gpio_port_num_t port, uint8_t pin, uint8_t output); 277 278 /*! 279 * @brief Sets the output level of the multiple FGPIO pins to the logic 1. 280 * 281 * @param port FGPIO PORT number, see "gpio_port_num_t". 282 * For each group FGPIO (FGPIOA, FGPIOB,etc) control registers, they handles four PORT number controls. 283 * FGPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 284 * FGPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 285 * ... 286 * @param mask FGPIO pin number macro 287 */ 288 void FGPIO_PortSet(gpio_port_num_t port, uint8_t mask); 289 290 /*! 291 * @brief Sets the output level of the multiple FGPIO pins to the logic 0. 292 * 293 * @param port FGPIO PORT number, see "gpio_port_num_t". 294 * For each group FGPIO (FGPIOA, FGPIOB,etc) control registers, they handles four PORT number controls. 295 * FGPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 296 * FGPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 297 * ... 298 * @param mask FGPIO pin number macro 299 */ 300 void FGPIO_PortClear(gpio_port_num_t port, uint8_t mask); 301 302 /*! 303 * @brief Reverses the current output logic of the multiple FGPIO pins. 304 * 305 * @param port FGPIO PORT number, see "gpio_port_num_t". 306 * For each group FGPIO (FGPIOA, FGPIOB,etc) control registers, they handles four PORT number controls. 307 * FGPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 308 * FGPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 309 * ... 310 * @param mask FGPIO pin number macro 311 */ 312 void FGPIO_PortToggle(gpio_port_num_t port, uint8_t mask); 313 314 /*@}*/ 315 316 /*! @name FGPIO Input Operations */ 317 /*@{*/ 318 319 /*! 320 * @brief Reads the current input value of the FGPIO port. 321 * 322 * @param port FGPIO PORT number, see "gpio_port_num_t". 323 * For each group FGPIO (FGPIOA, FGPIOB,etc) control registers, they handles four PORT number controls. 324 * FGPIOA serial registers ----- PTA 0 ~ 7, PTB 0 ~7 ... PTD 0 ~ 7. 325 * FGPIOB serial registers ----- PTE 0 ~ 7, PTF 0 ~7 ... PTH 0 ~ 7. 326 * ... 327 * @param pin FGPIO pin number 328 * @retval FGPIO port input value 329 * - 0: corresponding pin input low-logic level. 330 * - 1: corresponding pin input high-logic level. 331 */ 332 uint32_t FGPIO_PinRead(gpio_port_num_t port, uint8_t pin); 333 334 /*@}*/ 335 336 #endif /* FSL_FEATURE_SOC_FGPIO_COUNT */ 337 338 /*@}*/ 339 340 #if defined(__cplusplus) 341 } 342 #endif 343 344 /*! 345 * @} 346 */ 347 348 #endif /* _FSL_GPIO_H_*/ 349
