1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2020, 2022 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef _FSL_FLEXIO_H_
9 #define _FSL_FLEXIO_H_
10
11 #include "fsl_common.h"
12
13 /*!
14 * @addtogroup flexio_driver
15 * @{
16 */
17
18 /*******************************************************************************
19 * Definitions
20 ******************************************************************************/
21
22 /*! @name Driver version */
23 /*@{*/
24 /*! @brief FlexIO driver version. */
25 #define FSL_FLEXIO_DRIVER_VERSION (MAKE_VERSION(2, 2, 0))
26 /*@}*/
27
28 /*! @brief Calculate FlexIO timer trigger.*/
29 #define FLEXIO_TIMER_TRIGGER_SEL_PININPUT(x) ((uint32_t)(x) << 1U)
30 #define FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(x) (((uint32_t)(x) << 2U) | 0x1U)
31 #define FLEXIO_TIMER_TRIGGER_SEL_TIMn(x) (((uint32_t)(x) << 2U) | 0x3U)
32
33 /*! @brief Define time of timer trigger polarity.*/
34 typedef enum _flexio_timer_trigger_polarity
35 {
36 kFLEXIO_TimerTriggerPolarityActiveHigh = 0x0U, /*!< Active high. */
37 kFLEXIO_TimerTriggerPolarityActiveLow = 0x1U, /*!< Active low. */
38 } flexio_timer_trigger_polarity_t;
39
40 /*! @brief Define type of timer trigger source.*/
41 typedef enum _flexio_timer_trigger_source
42 {
43 kFLEXIO_TimerTriggerSourceExternal = 0x0U, /*!< External trigger selected. */
44 kFLEXIO_TimerTriggerSourceInternal = 0x1U, /*!< Internal trigger selected. */
45 } flexio_timer_trigger_source_t;
46
47 /*! @brief Define type of timer/shifter pin configuration.*/
48 typedef enum _flexio_pin_config
49 {
50 kFLEXIO_PinConfigOutputDisabled = 0x0U, /*!< Pin output disabled. */
51 kFLEXIO_PinConfigOpenDrainOrBidirection = 0x1U, /*!< Pin open drain or bidirectional output enable. */
52 kFLEXIO_PinConfigBidirectionOutputData = 0x2U, /*!< Pin bidirectional output data. */
53 kFLEXIO_PinConfigOutput = 0x3U, /*!< Pin output. */
54 } flexio_pin_config_t;
55
56 /*! @brief Definition of pin polarity.*/
57 typedef enum _flexio_pin_polarity
58 {
59 kFLEXIO_PinActiveHigh = 0x0U, /*!< Active high. */
60 kFLEXIO_PinActiveLow = 0x1U, /*!< Active low. */
61 } flexio_pin_polarity_t;
62
63 /*! @brief Define type of timer work mode.*/
64 typedef enum _flexio_timer_mode
65 {
66 kFLEXIO_TimerModeDisabled = 0x0U, /*!< Timer Disabled. */
67 kFLEXIO_TimerModeDual8BitBaudBit = 0x1U, /*!< Dual 8-bit counters baud/bit mode. */
68 kFLEXIO_TimerModeDual8BitPWM = 0x2U, /*!< Dual 8-bit counters PWM mode. */
69 kFLEXIO_TimerModeSingle16Bit = 0x3U, /*!< Single 16-bit counter mode. */
70 } flexio_timer_mode_t;
71
72 /*! @brief Define type of timer initial output or timer reset condition.*/
73 typedef enum _flexio_timer_output
74 {
75 kFLEXIO_TimerOutputOneNotAffectedByReset = 0x0U, /*!< Logic one when enabled and is not affected by timer
76 reset. */
77 kFLEXIO_TimerOutputZeroNotAffectedByReset = 0x1U, /*!< Logic zero when enabled and is not affected by timer
78 reset. */
79 kFLEXIO_TimerOutputOneAffectedByReset = 0x2U, /*!< Logic one when enabled and on timer reset. */
80 kFLEXIO_TimerOutputZeroAffectedByReset = 0x3U, /*!< Logic zero when enabled and on timer reset. */
81 } flexio_timer_output_t;
82
83 /*! @brief Define type of timer decrement.*/
84 typedef enum _flexio_timer_decrement_source
85 {
86 kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput = 0x0U, /*!< Decrement counter on FlexIO clock, Shift clock
87 equals Timer output. */
88 kFLEXIO_TimerDecSrcOnTriggerInputShiftTimerOutput, /*!< Decrement counter on Trigger input (both edges),
89 Shift clock equals Timer output. */
90 kFLEXIO_TimerDecSrcOnPinInputShiftPinInput, /*!< Decrement counter on Pin input (both edges),
91 Shift clock equals Pin input. */
92 kFLEXIO_TimerDecSrcOnTriggerInputShiftTriggerInput /*!< Decrement counter on Trigger input (both edges),
93 Shift clock equals Trigger input. */
94 #if (defined(FSL_FEATURE_FLEXIO_TIMCFG_TIMDCE_FIELD_WIDTH) && (FSL_FEATURE_FLEXIO_TIMCFG_TIMDCE_FIELD_WIDTH == 3))
95 ,
96 kFLEXIO_TimerDecSrcDiv16OnFlexIOClockShiftTimerOutput, /*!< Decrement counter on FlexIO clock divided by 16,
97 Shift clock equals Timer output. */
98 kFLEXIO_TimerDecSrcDiv256OnFlexIOClockShiftTimerOutput, /*!< Decrement counter on FlexIO clock divided by 256,
99 Shift clock equals Timer output. */
100 kFLEXIO_TimerRisSrcOnPinInputShiftPinInput, /*!< Decrement counter on Pin input (rising edges),
101 Shift clock equals Pin input. */
102 kFLEXIO_TimerRisSrcOnTriggerInputShiftTriggerInput /*!< Decrement counter on Trigger input (rising edges), Shift
103 clock equals Trigger input. */
104 #endif /* FSL_FEATURE_FLEXIO_TIMCFG_TIMDCE_FIELD_WIDTH */
105 } flexio_timer_decrement_source_t;
106
107 /*! @brief Define type of timer reset condition.*/
108 typedef enum _flexio_timer_reset_condition
109 {
110 kFLEXIO_TimerResetNever = 0x0U, /*!< Timer never reset. */
111 kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput = 0x2U, /*!< Timer reset on Timer Pin equal to Timer Output. */
112 kFLEXIO_TimerResetOnTimerTriggerEqualToTimerOutput = 0x3U, /*!< Timer reset on Timer Trigger equal to
113 Timer Output. */
114 kFLEXIO_TimerResetOnTimerPinRisingEdge = 0x4U, /*!< Timer reset on Timer Pin rising edge. */
115 kFLEXIO_TimerResetOnTimerTriggerRisingEdge = 0x6U, /*!< Timer reset on Trigger rising edge. */
116 kFLEXIO_TimerResetOnTimerTriggerBothEdge = 0x7U, /*!< Timer reset on Trigger rising or falling edge. */
117 } flexio_timer_reset_condition_t;
118
119 /*! @brief Define type of timer disable condition.*/
120 typedef enum _flexio_timer_disable_condition
121 {
122 kFLEXIO_TimerDisableNever = 0x0U, /*!< Timer never disabled. */
123 kFLEXIO_TimerDisableOnPreTimerDisable = 0x1U, /*!< Timer disabled on Timer N-1 disable. */
124 kFLEXIO_TimerDisableOnTimerCompare = 0x2U, /*!< Timer disabled on Timer compare. */
125 kFLEXIO_TimerDisableOnTimerCompareTriggerLow = 0x3U, /*!< Timer disabled on Timer compare and Trigger Low. */
126 kFLEXIO_TimerDisableOnPinBothEdge = 0x4U, /*!< Timer disabled on Pin rising or falling edge. */
127 kFLEXIO_TimerDisableOnPinBothEdgeTriggerHigh = 0x5U, /*!< Timer disabled on Pin rising or falling edge provided
128 Trigger is high. */
129 kFLEXIO_TimerDisableOnTriggerFallingEdge = 0x6U, /*!< Timer disabled on Trigger falling edge. */
130 } flexio_timer_disable_condition_t;
131
132 /*! @brief Define type of timer enable condition.*/
133 typedef enum _flexio_timer_enable_condition
134 {
135 kFLEXIO_TimerEnabledAlways = 0x0U, /*!< Timer always enabled. */
136 kFLEXIO_TimerEnableOnPrevTimerEnable = 0x1U, /*!< Timer enabled on Timer N-1 enable. */
137 kFLEXIO_TimerEnableOnTriggerHigh = 0x2U, /*!< Timer enabled on Trigger high. */
138 kFLEXIO_TimerEnableOnTriggerHighPinHigh = 0x3U, /*!< Timer enabled on Trigger high and Pin high. */
139 kFLEXIO_TimerEnableOnPinRisingEdge = 0x4U, /*!< Timer enabled on Pin rising edge. */
140 kFLEXIO_TimerEnableOnPinRisingEdgeTriggerHigh = 0x5U, /*!< Timer enabled on Pin rising edge and Trigger high. */
141 kFLEXIO_TimerEnableOnTriggerRisingEdge = 0x6U, /*!< Timer enabled on Trigger rising edge. */
142 kFLEXIO_TimerEnableOnTriggerBothEdge = 0x7U, /*!< Timer enabled on Trigger rising or falling edge. */
143 } flexio_timer_enable_condition_t;
144
145 /*! @brief Define type of timer stop bit generate condition.*/
146 typedef enum _flexio_timer_stop_bit_condition
147 {
148 kFLEXIO_TimerStopBitDisabled = 0x0U, /*!< Stop bit disabled. */
149 kFLEXIO_TimerStopBitEnableOnTimerCompare = 0x1U, /*!< Stop bit is enabled on timer compare. */
150 kFLEXIO_TimerStopBitEnableOnTimerDisable = 0x2U, /*!< Stop bit is enabled on timer disable. */
151 kFLEXIO_TimerStopBitEnableOnTimerCompareDisable = 0x3U, /*!< Stop bit is enabled on timer compare and timer
152 disable. */
153 } flexio_timer_stop_bit_condition_t;
154
155 /*! @brief Define type of timer start bit generate condition.*/
156 typedef enum _flexio_timer_start_bit_condition
157 {
158 kFLEXIO_TimerStartBitDisabled = 0x0U, /*!< Start bit disabled. */
159 kFLEXIO_TimerStartBitEnabled = 0x1U, /*!< Start bit enabled. */
160 } flexio_timer_start_bit_condition_t;
161
162 /*! @brief FlexIO as PWM channel output state */
163 typedef enum _flexio_timer_output_state
164 {
165 kFLEXIO_PwmLow = 0, /*!< The output state of PWM channel is low */
166 kFLEXIO_PwmHigh, /*!< The output state of PWM channel is high */
167 } flexio_timer_output_state_t;
168
169 /*! @brief Define type of timer polarity for shifter control. */
170 typedef enum _flexio_shifter_timer_polarity
171 {
172 kFLEXIO_ShifterTimerPolarityOnPositive = 0x0U, /*!< Shift on positive edge of shift clock. */
173 kFLEXIO_ShifterTimerPolarityOnNegitive = 0x1U, /*!< Shift on negative edge of shift clock. */
174 } flexio_shifter_timer_polarity_t;
175
176 /*! @brief Define type of shifter working mode.*/
177 typedef enum _flexio_shifter_mode
178 {
179 kFLEXIO_ShifterDisabled = 0x0U, /*!< Shifter is disabled. */
180 kFLEXIO_ShifterModeReceive = 0x1U, /*!< Receive mode. */
181 kFLEXIO_ShifterModeTransmit = 0x2U, /*!< Transmit mode. */
182 kFLEXIO_ShifterModeMatchStore = 0x4U, /*!< Match store mode. */
183 kFLEXIO_ShifterModeMatchContinuous = 0x5U, /*!< Match continuous mode. */
184 #if FSL_FEATURE_FLEXIO_HAS_STATE_MODE
185 kFLEXIO_ShifterModeState = 0x6U, /*!< SHIFTBUF contents are used for storing
186 programmable state attributes. */
187 #endif /* FSL_FEATURE_FLEXIO_HAS_STATE_MODE */
188 #if FSL_FEATURE_FLEXIO_HAS_LOGIC_MODE
189 kFLEXIO_ShifterModeLogic = 0x7U, /*!< SHIFTBUF contents are used for implementing
190 programmable logic look up table. */
191 #endif /* FSL_FEATURE_FLEXIO_HAS_LOGIC_MODE */
192 } flexio_shifter_mode_t;
193
194 /*! @brief Define type of shifter input source.*/
195 typedef enum _flexio_shifter_input_source
196 {
197 kFLEXIO_ShifterInputFromPin = 0x0U, /*!< Shifter input from pin. */
198 kFLEXIO_ShifterInputFromNextShifterOutput = 0x1U, /*!< Shifter input from Shifter N+1. */
199 } flexio_shifter_input_source_t;
200
201 /*! @brief Define of STOP bit configuration.*/
202 typedef enum _flexio_shifter_stop_bit
203 {
204 kFLEXIO_ShifterStopBitDisable = 0x0U, /*!< Disable shifter stop bit. */
205 kFLEXIO_ShifterStopBitLow = 0x2U, /*!< Set shifter stop bit to logic low level. */
206 kFLEXIO_ShifterStopBitHigh = 0x3U, /*!< Set shifter stop bit to logic high level. */
207 } flexio_shifter_stop_bit_t;
208
209 /*! @brief Define type of START bit configuration.*/
210 typedef enum _flexio_shifter_start_bit
211 {
212 kFLEXIO_ShifterStartBitDisabledLoadDataOnEnable = 0x0U, /*!< Disable shifter start bit, transmitter loads
213 data on enable. */
214 kFLEXIO_ShifterStartBitDisabledLoadDataOnShift = 0x1U, /*!< Disable shifter start bit, transmitter loads
215 data on first shift. */
216 kFLEXIO_ShifterStartBitLow = 0x2U, /*!< Set shifter start bit to logic low level. */
217 kFLEXIO_ShifterStartBitHigh = 0x3U, /*!< Set shifter start bit to logic high level. */
218 } flexio_shifter_start_bit_t;
219
220 /*! @brief Define FlexIO shifter buffer type*/
221 typedef enum _flexio_shifter_buffer_type
222 {
223 kFLEXIO_ShifterBuffer = 0x0U, /*!< Shifter Buffer N Register. */
224 kFLEXIO_ShifterBufferBitSwapped = 0x1U, /*!< Shifter Buffer N Bit Byte Swapped Register. */
225 kFLEXIO_ShifterBufferByteSwapped = 0x2U, /*!< Shifter Buffer N Byte Swapped Register. */
226 kFLEXIO_ShifterBufferBitByteSwapped = 0x3U, /*!< Shifter Buffer N Bit Swapped Register. */
227 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP
228 kFLEXIO_ShifterBufferNibbleByteSwapped = 0x4U, /*!< Shifter Buffer N Nibble Byte Swapped Register. */
229 #endif /*FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP*/
230 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP
231 kFLEXIO_ShifterBufferHalfWordSwapped = 0x5U, /*!< Shifter Buffer N Half Word Swapped Register. */
232 #endif
233 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP
234 kFLEXIO_ShifterBufferNibbleSwapped = 0x6U, /*!< Shifter Buffer N Nibble Swapped Register. */
235 #endif
236 } flexio_shifter_buffer_type_t;
237
238 /*! @brief Define FlexIO user configuration structure. */
239 typedef struct _flexio_config_
240 {
241 bool enableFlexio; /*!< Enable/disable FlexIO module */
242 bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode */
243 bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode */
244 bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers, fast access requires
245 the FlexIO clock to be at least twice the frequency of the bus clock. */
246 } flexio_config_t;
247
248 /*! @brief Define FlexIO timer configuration structure. */
249 typedef struct _flexio_timer_config
250 {
251 /* Trigger. */
252 uint32_t triggerSelect; /*!< The internal trigger selection number using MACROs. */
253 flexio_timer_trigger_polarity_t triggerPolarity; /*!< Trigger Polarity. */
254 flexio_timer_trigger_source_t triggerSource; /*!< Trigger Source, internal (see 'trgsel') or external. */
255 /* Pin. */
256 flexio_pin_config_t pinConfig; /*!< Timer Pin Configuration. */
257 uint32_t pinSelect; /*!< Timer Pin number Select. */
258 flexio_pin_polarity_t pinPolarity; /*!< Timer Pin Polarity. */
259 /* Timer. */
260 flexio_timer_mode_t timerMode; /*!< Timer work Mode. */
261 flexio_timer_output_t timerOutput; /*!< Configures the initial state of the Timer Output and
262 whether it is affected by the Timer reset. */
263 flexio_timer_decrement_source_t timerDecrement; /*!< Configures the source of the Timer decrement and the
264 source of the Shift clock. */
265 flexio_timer_reset_condition_t timerReset; /*!< Configures the condition that causes the timer counter
266 (and optionally the timer output) to be reset. */
267 flexio_timer_disable_condition_t timerDisable; /*!< Configures the condition that causes the Timer to be
268 disabled and stop decrementing. */
269 flexio_timer_enable_condition_t timerEnable; /*!< Configures the condition that causes the Timer to be
270 enabled and start decrementing. */
271 flexio_timer_stop_bit_condition_t timerStop; /*!< Timer STOP Bit generation. */
272 flexio_timer_start_bit_condition_t timerStart; /*!< Timer STRAT Bit generation. */
273 uint32_t timerCompare; /*!< Value for Timer Compare N Register. */
274 } flexio_timer_config_t;
275
276 /*! @brief Define FlexIO shifter configuration structure. */
277 typedef struct _flexio_shifter_config
278 {
279 /* Timer. */
280 uint32_t timerSelect; /*!< Selects which Timer is used for controlling the
281 logic/shift register and generating the Shift clock. */
282 flexio_shifter_timer_polarity_t timerPolarity; /*!< Timer Polarity. */
283 /* Pin. */
284 flexio_pin_config_t pinConfig; /*!< Shifter Pin Configuration. */
285 uint32_t pinSelect; /*!< Shifter Pin number Select. */
286 flexio_pin_polarity_t pinPolarity; /*!< Shifter Pin Polarity. */
287 /* Shifter. */
288 flexio_shifter_mode_t shifterMode; /*!< Configures the mode of the Shifter. */
289 #if FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH
290 uint32_t parallelWidth; /*!< Configures the parallel width when using parallel mode.*/
291 #endif /* FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH */
292 flexio_shifter_input_source_t inputSource; /*!< Selects the input source for the shifter. */
293 flexio_shifter_stop_bit_t shifterStop; /*!< Shifter STOP bit. */
294 flexio_shifter_start_bit_t shifterStart; /*!< Shifter START bit. */
295 } flexio_shifter_config_t;
296
297 #if defined(FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER) && FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER
298 /*! @brief FLEXIO gpio direction definition */
299 typedef enum _flexio_gpio_direction
300 {
301 kFLEXIO_DigitalInput = 0U, /*!< Set current pin as digital input*/
302 kFLEXIO_DigitalOutput = 1U, /*!< Set current pin as digital output*/
303 } flexio_gpio_direction_t;
304
305 /*! @brief FLEXIO gpio input config */
306 typedef enum _flexio_pin_input_config
307 {
308 kFLEXIO_InputInterruptDisabled = 0x0U, /*!< Interrupt request is disabled. */
309 kFLEXIO_InputInterruptEnable = 0x1U, /*!< Interrupt request is enable. */
310 kFLEXIO_FlagRisingEdgeEnable = 0x2U, /*!< Input pin flag on rising edge. */
311 kFLEXIO_FlagFallingEdgeEnable = 0x4U, /*!< Input pin flag on falling edge. */
312 } flexio_pin_input_config_t;
313
314 /*!
315 * @brief The FLEXIO pin configuration structure.
316 *
317 * Each pin can only be configured as either an output pin or an input pin at a time.
318 * If configured as an input pin, use inputConfig param.
319 * If configured as an output pin, use outputLogic.
320 */
321 typedef struct _flexio_gpio_config
322 {
323 flexio_gpio_direction_t pinDirection; /*!< FLEXIO pin direction, input or output */
324 uint8_t outputLogic; /*!< Set a default output logic, which has no use in input */
325 uint8_t inputConfig; /*!< Set an input config */
326 } flexio_gpio_config_t;
327 #endif /*FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER*/
328
329 /*! @brief typedef for FlexIO simulated driver interrupt handler.*/
330 typedef void (*flexio_isr_t)(void *base, void *handle);
331
332 /*******************************************************************************
333 * Variables
334 ******************************************************************************/
335 /*! @brief Pointers to flexio bases for each instance. */
336 extern FLEXIO_Type *const s_flexioBases[];
337
338 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
339 /*! @brief Pointers to flexio clocks for each instance. */
340 extern const clock_ip_name_t s_flexioClocks[];
341 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
342 /*******************************************************************************
343 * API
344 ******************************************************************************/
345
346 #if defined(__cplusplus)
347 extern "C" {
348 #endif /*_cplusplus*/
349
350 /*!
351 * @name FlexIO Initialization and De-initialization
352 * @{
353 */
354
355 /*!
356 * @brief Gets the default configuration to configure the FlexIO module. The configuration
357 * can used directly to call the FLEXIO_Configure().
358 *
359 * Example:
360 @code
361 flexio_config_t config;
362 FLEXIO_GetDefaultConfig(&config);
363 @endcode
364 *
365 * @param userConfig pointer to flexio_config_t structure
366 */
367 void FLEXIO_GetDefaultConfig(flexio_config_t *userConfig);
368
369 /*!
370 * @brief Configures the FlexIO with a FlexIO configuration. The configuration structure
371 * can be filled by the user or be set with default values by FLEXIO_GetDefaultConfig().
372 *
373 * Example
374 @code
375 flexio_config_t config = {
376 .enableFlexio = true,
377 .enableInDoze = false,
378 .enableInDebug = true,
379 .enableFastAccess = false
380 };
381 FLEXIO_Configure(base, &config);
382 @endcode
383 *
384 * @param base FlexIO peripheral base address
385 * @param userConfig pointer to flexio_config_t structure
386 */
387 void FLEXIO_Init(FLEXIO_Type *base, const flexio_config_t *userConfig);
388
389 /*!
390 * @brief Gates the FlexIO clock. Call this API to stop the FlexIO clock.
391 *
392 * @note After calling this API, call the FLEXO_Init to use the FlexIO module.
393 *
394 * @param base FlexIO peripheral base address
395 */
396 void FLEXIO_Deinit(FLEXIO_Type *base);
397
398 /*!
399 * @brief Get instance number for FLEXIO module.
400 *
401 * @param base FLEXIO peripheral base address.
402 */
403 uint32_t FLEXIO_GetInstance(FLEXIO_Type *base);
404
405 /* @} */
406
407 /*!
408 * @name FlexIO Basic Operation
409 * @{
410 */
411
412 /*!
413 * @brief Resets the FlexIO module.
414 *
415 * @param base FlexIO peripheral base address
416 */
417 void FLEXIO_Reset(FLEXIO_Type *base);
418
419 /*!
420 * @brief Enables the FlexIO module operation.
421 *
422 * @param base FlexIO peripheral base address
423 * @param enable true to enable, false to disable.
424 */
FLEXIO_Enable(FLEXIO_Type * base,bool enable)425 static inline void FLEXIO_Enable(FLEXIO_Type *base, bool enable)
426 {
427 if (enable)
428 {
429 base->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
430 }
431 else
432 {
433 base->CTRL &= ~FLEXIO_CTRL_FLEXEN_MASK;
434 }
435 }
436
437 #if defined(FSL_FEATURE_FLEXIO_HAS_PIN_STATUS) && FSL_FEATURE_FLEXIO_HAS_PIN_STATUS
438 /*!
439 * @brief Reads the input data on each of the FlexIO pins.
440 *
441 * @param base FlexIO peripheral base address
442 * @return FlexIO pin input data
443 */
FLEXIO_ReadPinInput(FLEXIO_Type * base)444 static inline uint32_t FLEXIO_ReadPinInput(FLEXIO_Type *base)
445 {
446 return base->PIN;
447 }
448 #endif /*FSL_FEATURE_FLEXIO_HAS_PIN_STATUS*/
449
450 #if defined(FSL_FEATURE_FLEXIO_HAS_STATE_MODE) && FSL_FEATURE_FLEXIO_HAS_STATE_MODE
451 /*!
452 * @brief Gets the current state pointer for state mode use.
453 *
454 * @param base FlexIO peripheral base address
455 * @return current State pointer
456 */
FLEXIO_GetShifterState(FLEXIO_Type * base)457 static inline uint8_t FLEXIO_GetShifterState(FLEXIO_Type *base)
458 {
459 return ((uint8_t)(base->SHIFTSTATE) & FLEXIO_SHIFTSTATE_STATE_MASK);
460 }
461 #endif /*FSL_FEATURE_FLEXIO_HAS_STATE_MODE*/
462
463 /*!
464 * @brief Configures the shifter with the shifter configuration. The configuration structure
465 * covers both the SHIFTCTL and SHIFTCFG registers. To configure the shifter to the proper
466 * mode, select which timer controls the shifter to shift, whether to generate start bit/stop
467 * bit, and the polarity of start bit and stop bit.
468 *
469 * Example
470 @code
471 flexio_shifter_config_t config = {
472 .timerSelect = 0,
473 .timerPolarity = kFLEXIO_ShifterTimerPolarityOnPositive,
474 .pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
475 .pinPolarity = kFLEXIO_PinActiveLow,
476 .shifterMode = kFLEXIO_ShifterModeTransmit,
477 .inputSource = kFLEXIO_ShifterInputFromPin,
478 .shifterStop = kFLEXIO_ShifterStopBitHigh,
479 .shifterStart = kFLEXIO_ShifterStartBitLow
480 };
481 FLEXIO_SetShifterConfig(base, &config);
482 @endcode
483 *
484 * @param base FlexIO peripheral base address
485 * @param index Shifter index
486 * @param shifterConfig Pointer to flexio_shifter_config_t structure
487 */
488 void FLEXIO_SetShifterConfig(FLEXIO_Type *base, uint8_t index, const flexio_shifter_config_t *shifterConfig);
489 /*!
490 * @brief Configures the timer with the timer configuration. The configuration structure
491 * covers both the TIMCTL and TIMCFG registers. To configure the timer to the proper
492 * mode, select trigger source for timer and the timer pin output and the timing for timer.
493 *
494 * Example
495 @code
496 flexio_timer_config_t config = {
497 .triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(0),
498 .triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveLow,
499 .triggerSource = kFLEXIO_TimerTriggerSourceInternal,
500 .pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
501 .pinSelect = 0,
502 .pinPolarity = kFLEXIO_PinActiveHigh,
503 .timerMode = kFLEXIO_TimerModeDual8BitBaudBit,
504 .timerOutput = kFLEXIO_TimerOutputZeroNotAffectedByReset,
505 .timerDecrement = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput,
506 .timerReset = kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput,
507 .timerDisable = kFLEXIO_TimerDisableOnTimerCompare,
508 .timerEnable = kFLEXIO_TimerEnableOnTriggerHigh,
509 .timerStop = kFLEXIO_TimerStopBitEnableOnTimerDisable,
510 .timerStart = kFLEXIO_TimerStartBitEnabled
511 };
512 FLEXIO_SetTimerConfig(base, &config);
513 @endcode
514 *
515 * @param base FlexIO peripheral base address
516 * @param index Timer index
517 * @param timerConfig Pointer to the flexio_timer_config_t structure
518 */
519 void FLEXIO_SetTimerConfig(FLEXIO_Type *base, uint8_t index, const flexio_timer_config_t *timerConfig);
520
521 /*!
522 * @brief This function set the value of the prescaler on flexio channels
523 *
524 * @param base Pointer to the FlexIO simulated peripheral type.
525 * @param clocksource Set clock value
526 */
FLEXIO_SetClockMode(FLEXIO_Type * base,uint8_t index,flexio_timer_decrement_source_t clocksource)527 static inline void FLEXIO_SetClockMode(FLEXIO_Type *base, uint8_t index, flexio_timer_decrement_source_t clocksource)
528 {
529 uint32_t reg = base->TIMCFG[index];
530
531 reg &= ~FLEXIO_TIMCFG_TIMDEC_MASK;
532
533 reg |= FLEXIO_TIMCFG_TIMDEC(clocksource);
534
535 base->TIMCFG[index] = reg;
536 }
537
538 /* @} */
539
540 /*!
541 * @name FlexIO Interrupt Operation
542 * @{
543 */
544
545 /*!
546 * @brief Enables the shifter status interrupt. The interrupt generates when the corresponding SSF is set.
547 *
548 * @param base FlexIO peripheral base address
549 * @param mask The shifter status mask which can be calculated by (1 << shifter index)
550 * @note For multiple shifter status interrupt enable, for example, two shifter status enable, can calculate
551 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
552 */
FLEXIO_EnableShifterStatusInterrupts(FLEXIO_Type * base,uint32_t mask)553 static inline void FLEXIO_EnableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)
554 {
555 base->SHIFTSIEN |= mask;
556 }
557
558 /*!
559 * @brief Disables the shifter status interrupt. The interrupt won't generate when the corresponding SSF is set.
560 *
561 * @param base FlexIO peripheral base address
562 * @param mask The shifter status mask which can be calculated by (1 << shifter index)
563 * @note For multiple shifter status interrupt enable, for example, two shifter status enable, can calculate
564 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
565 */
FLEXIO_DisableShifterStatusInterrupts(FLEXIO_Type * base,uint32_t mask)566 static inline void FLEXIO_DisableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)
567 {
568 base->SHIFTSIEN &= ~mask;
569 }
570
571 /*!
572 * @brief Enables the shifter error interrupt. The interrupt generates when the corresponding SEF is set.
573 *
574 * @param base FlexIO peripheral base address
575 * @param mask The shifter error mask which can be calculated by (1 << shifter index)
576 * @note For multiple shifter error interrupt enable, for example, two shifter error enable, can calculate
577 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
578 */
FLEXIO_EnableShifterErrorInterrupts(FLEXIO_Type * base,uint32_t mask)579 static inline void FLEXIO_EnableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)
580 {
581 base->SHIFTEIEN |= mask;
582 }
583
584 /*!
585 * @brief Disables the shifter error interrupt. The interrupt won't generate when the corresponding SEF is set.
586 *
587 * @param base FlexIO peripheral base address
588 * @param mask The shifter error mask which can be calculated by (1 << shifter index)
589 * @note For multiple shifter error interrupt enable, for example, two shifter error enable, can calculate
590 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
591 */
FLEXIO_DisableShifterErrorInterrupts(FLEXIO_Type * base,uint32_t mask)592 static inline void FLEXIO_DisableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)
593 {
594 base->SHIFTEIEN &= ~mask;
595 }
596
597 /*!
598 * @brief Enables the timer status interrupt. The interrupt generates when the corresponding SSF is set.
599 *
600 * @param base FlexIO peripheral base address
601 * @param mask The timer status mask which can be calculated by (1 << timer index)
602 * @note For multiple timer status interrupt enable, for example, two timer status enable, can calculate
603 * the mask by using ((1 << timer index0) | (1 << timer index1))
604 */
FLEXIO_EnableTimerStatusInterrupts(FLEXIO_Type * base,uint32_t mask)605 static inline void FLEXIO_EnableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)
606 {
607 base->TIMIEN |= mask;
608 }
609
610 /*!
611 * @brief Disables the timer status interrupt. The interrupt won't generate when the corresponding SSF is set.
612 *
613 * @param base FlexIO peripheral base address
614 * @param mask The timer status mask which can be calculated by (1 << timer index)
615 * @note For multiple timer status interrupt enable, for example, two timer status enable, can calculate
616 * the mask by using ((1 << timer index0) | (1 << timer index1))
617 */
FLEXIO_DisableTimerStatusInterrupts(FLEXIO_Type * base,uint32_t mask)618 static inline void FLEXIO_DisableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)
619 {
620 base->TIMIEN &= ~mask;
621 }
622
623 /* @} */
624
625 /*!
626 * @name FlexIO Status Operation
627 * @{
628 */
629
630 /*!
631 * @brief Gets the shifter status flags.
632 *
633 * @param base FlexIO peripheral base address
634 * @return Shifter status flags
635 */
FLEXIO_GetShifterStatusFlags(FLEXIO_Type * base)636 static inline uint32_t FLEXIO_GetShifterStatusFlags(FLEXIO_Type *base)
637 {
638 return ((base->SHIFTSTAT) & FLEXIO_SHIFTSTAT_SSF_MASK);
639 }
640
641 /*!
642 * @brief Clears the shifter status flags.
643 *
644 * @param base FlexIO peripheral base address
645 * @param mask The shifter status mask which can be calculated by (1 << shifter index)
646 * @note For clearing multiple shifter status flags, for example, two shifter status flags, can calculate
647 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
648 */
FLEXIO_ClearShifterStatusFlags(FLEXIO_Type * base,uint32_t mask)649 static inline void FLEXIO_ClearShifterStatusFlags(FLEXIO_Type *base, uint32_t mask)
650 {
651 base->SHIFTSTAT = mask;
652 }
653
654 /*!
655 * @brief Gets the shifter error flags.
656 *
657 * @param base FlexIO peripheral base address
658 * @return Shifter error flags
659 */
FLEXIO_GetShifterErrorFlags(FLEXIO_Type * base)660 static inline uint32_t FLEXIO_GetShifterErrorFlags(FLEXIO_Type *base)
661 {
662 return ((base->SHIFTERR) & FLEXIO_SHIFTERR_SEF_MASK);
663 }
664
665 /*!
666 * @brief Clears the shifter error flags.
667 *
668 * @param base FlexIO peripheral base address
669 * @param mask The shifter error mask which can be calculated by (1 << shifter index)
670 * @note For clearing multiple shifter error flags, for example, two shifter error flags, can calculate
671 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
672 */
FLEXIO_ClearShifterErrorFlags(FLEXIO_Type * base,uint32_t mask)673 static inline void FLEXIO_ClearShifterErrorFlags(FLEXIO_Type *base, uint32_t mask)
674 {
675 base->SHIFTERR = mask;
676 }
677
678 /*!
679 * @brief Gets the timer status flags.
680 *
681 * @param base FlexIO peripheral base address
682 * @return Timer status flags
683 */
FLEXIO_GetTimerStatusFlags(FLEXIO_Type * base)684 static inline uint32_t FLEXIO_GetTimerStatusFlags(FLEXIO_Type *base)
685 {
686 return ((base->TIMSTAT) & FLEXIO_TIMSTAT_TSF_MASK);
687 }
688
689 /*!
690 * @brief Clears the timer status flags.
691 *
692 * @param base FlexIO peripheral base address
693 * @param mask The timer status mask which can be calculated by (1 << timer index)
694 * @note For clearing multiple timer status flags, for example, two timer status flags, can calculate
695 * the mask by using ((1 << timer index0) | (1 << timer index1))
696 */
FLEXIO_ClearTimerStatusFlags(FLEXIO_Type * base,uint32_t mask)697 static inline void FLEXIO_ClearTimerStatusFlags(FLEXIO_Type *base, uint32_t mask)
698 {
699 base->TIMSTAT = mask;
700 }
701
702 /* @} */
703
704 /*!
705 * @name FlexIO DMA Operation
706 * @{
707 */
708
709 /*!
710 * @brief Enables/disables the shifter status DMA. The DMA request generates when the corresponding SSF is set.
711 *
712 * @note For multiple shifter status DMA enables, for example, calculate
713 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
714 *
715 * @param base FlexIO peripheral base address
716 * @param mask The shifter status mask which can be calculated by (1 << shifter index)
717 * @param enable True to enable, false to disable.
718 */
FLEXIO_EnableShifterStatusDMA(FLEXIO_Type * base,uint32_t mask,bool enable)719 static inline void FLEXIO_EnableShifterStatusDMA(FLEXIO_Type *base, uint32_t mask, bool enable)
720 {
721 if (enable)
722 {
723 base->SHIFTSDEN |= mask;
724 }
725 else
726 {
727 base->SHIFTSDEN &= ~mask;
728 }
729 }
730
731 /*!
732 * @brief Gets the shifter buffer address for the DMA transfer usage.
733 *
734 * @param base FlexIO peripheral base address
735 * @param type Shifter type of flexio_shifter_buffer_type_t
736 * @param index Shifter index
737 * @return Corresponding shifter buffer index
738 */
739 uint32_t FLEXIO_GetShifterBufferAddress(FLEXIO_Type *base, flexio_shifter_buffer_type_t type, uint8_t index);
740
741 /*!
742 * @brief Registers the handle and the interrupt handler for the FlexIO-simulated peripheral.
743 *
744 * @param base Pointer to the FlexIO simulated peripheral type.
745 * @param handle Pointer to the handler for FlexIO simulated peripheral.
746 * @param isr FlexIO simulated peripheral interrupt handler.
747 * @retval kStatus_Success Successfully create the handle.
748 * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range.
749 */
750 status_t FLEXIO_RegisterHandleIRQ(void *base, void *handle, flexio_isr_t isr);
751
752 /*!
753 * @brief Unregisters the handle and the interrupt handler for the FlexIO-simulated peripheral.
754 *
755 * @param base Pointer to the FlexIO simulated peripheral type.
756 * @retval kStatus_Success Successfully create the handle.
757 * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range.
758 */
759 status_t FLEXIO_UnregisterHandleIRQ(void *base);
760 /* @} */
761
762 #if defined(FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER) && FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER
763
764 /*!
765 * @brief Configure a FLEXIO pin used by the board.
766 *
767 * To Config the FLEXIO PIN, define a pin configuration, as either input or output, in the user file.
768 * Then, call the FLEXIO_SetPinConfig() function.
769 *
770 * This is an example to define an input pin or an output pin configuration.
771 * @code
772 * Define a digital input pin configuration,
773 * flexio_gpio_config_t config =
774 * {
775 * kFLEXIO_DigitalInput,
776 * 0U,
777 * kFLEXIO_FlagRisingEdgeEnable | kFLEXIO_InputInterruptEnable,
778 * }
779 * Define a digital output pin configuration,
780 * flexio_gpio_config_t config =
781 * {
782 * kFLEXIO_DigitalOutput,
783 * 0U,
784 * 0U
785 * }
786 * @endcode
787 * @param base FlexIO peripheral base address
788 * @param pin FLEXIO pin number.
789 * @param config FLEXIO pin configuration pointer.
790 */
791 void FLEXIO_SetPinConfig(FLEXIO_Type *base, uint32_t pin, flexio_gpio_config_t *config);
792
793 /*!
794 * @name GPIO Output Operations
795 * @{
796 */
797
798 /*!
799 * @brief Sets the output level of the multiple FLEXIO pins to the logic 0.
800 *
801 * @param base FlexIO peripheral base address
802 * @param mask FLEXIO pin number mask
803 */
FLEXIO_ClearPortOutput(FLEXIO_Type * base,uint32_t mask)804 static inline void FLEXIO_ClearPortOutput(FLEXIO_Type *base, uint32_t mask)
805 {
806 base->PINOUTCLR = mask;
807 }
808
809 /*!
810 * @brief Sets the output level of the multiple FLEXIO pins to the logic 1.
811 *
812 * @param base FlexIO peripheral base address
813 * @param mask FLEXIO pin number mask
814 */
FLEXIO_SetPortOutput(FLEXIO_Type * base,uint32_t mask)815 static inline void FLEXIO_SetPortOutput(FLEXIO_Type *base, uint32_t mask)
816 {
817 base->PINOUTSET = mask;
818 }
819
820 /*!
821 * @brief Reverses the current output logic of the multiple FLEXIO pins.
822 *
823 * @param base FlexIO peripheral base address
824 * @param mask FLEXIO pin number mask
825 */
FLEXIO_TogglePortOutput(FLEXIO_Type * base,uint32_t mask)826 static inline void FLEXIO_TogglePortOutput(FLEXIO_Type *base, uint32_t mask)
827 {
828 base->PINOUTTOG = mask;
829 }
830
831 /*!
832 * @brief Sets the output level of the FLEXIO pins to the logic 1 or 0.
833 *
834 * @param base FlexIO peripheral base address
835 * @param pin FLEXIO pin number.
836 * @param output FLEXIO pin output logic level.
837 * - 0: corresponding pin output low-logic level.
838 * - 1: corresponding pin output high-logic level.
839 */
FLEXIO_PinWrite(FLEXIO_Type * base,uint32_t pin,uint8_t output)840 static inline void FLEXIO_PinWrite(FLEXIO_Type *base, uint32_t pin, uint8_t output)
841 {
842 if (output == 0U)
843 {
844 FLEXIO_ClearPortOutput(base, 1UL << pin);
845 }
846 else
847 {
848 FLEXIO_SetPortOutput(base, 1UL << pin);
849 }
850 }
851
852 /*!
853 * @brief Enables the FLEXIO output pin function.
854 *
855 * @param base FlexIO peripheral base address
856 * @param pin FLEXIO pin number.
857 */
FLEXIO_EnablePinOutput(FLEXIO_Type * base,uint32_t pin)858 static inline void FLEXIO_EnablePinOutput(FLEXIO_Type *base, uint32_t pin)
859 {
860 base->PINOUTE |= (1UL << pin);
861 }
862 /*@}*/
863
864 /*!
865 * @name FLEXIO PIN Input Operations
866 * @{
867 */
868
869 /*!
870 * @brief Reads the current input value of the FLEXIO pin.
871 *
872 * @param base FlexIO peripheral base address
873 * @param pin FLEXIO pin number.
874 * @retval FLEXIO port input value
875 * - 0: corresponding pin input low-logic level.
876 * - 1: corresponding pin input high-logic level.
877 */
FLEXIO_PinRead(FLEXIO_Type * base,uint32_t pin)878 static inline uint32_t FLEXIO_PinRead(FLEXIO_Type *base, uint32_t pin)
879 {
880 return (((base->PIN) >> pin) & 0x01U);
881 }
882
883 /*!
884 * @brief Gets the FLEXIO input pin status.
885 *
886 * @param base FlexIO peripheral base address
887 * @param pin FLEXIO pin number.
888 * @retval FLEXIO port input status
889 * - 0: corresponding pin input capture no status.
890 * - 1: corresponding pin input capture rising or falling edge.
891 */
FLEXIO_GetPinStatus(FLEXIO_Type * base,uint32_t pin)892 static inline uint32_t FLEXIO_GetPinStatus(FLEXIO_Type *base, uint32_t pin)
893 {
894 return (((base->PINSTAT) >> pin) & 0x01U);
895 }
896
897 /*!
898 * @brief Clears the multiple FLEXIO input pins status.
899 *
900 * @param base FlexIO peripheral base address
901 * @param mask FLEXIO pin number mask
902 */
FLEXIO_ClearPortStatus(FLEXIO_Type * base,uint32_t mask)903 static inline void FLEXIO_ClearPortStatus(FLEXIO_Type *base, uint32_t mask)
904 {
905 base->PINSTAT = mask;
906 }
907 /*@}*/
908
909 #endif /*FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER*/
910
911 #if defined(__cplusplus)
912 }
913 #endif /*_cplusplus*/
914 /*@}*/
915
916 #endif /*_FSL_FLEXIO_H_*/
917