1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2020 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef _FSL_AFE_H_
9 #define _FSL_AFE_H_
10
11 #include "fsl_common.h"
12
13 /*!
14 * @addtogroup afe
15 * @{
16 */
17
18 /*******************************************************************************
19 * Definitions
20 ******************************************************************************/
21
22 /*! @name Driver version */
23 /*@{*/
24 #define FSL_AFE_DRIVER_VERSION (MAKE_VERSION(2, 0, 2)) /*!< Version 2.0.2. */
25 /*@}*/
26
27 /*!
28 * @brief Defines the type of status flags.
29 */
30 enum _afe_channel_status_flag
31 {
32 kAFE_Channel0OverflowFlag = AFE_SR_OVR0_MASK, /*!< Channel 0 previous conversion result has not been read and new
33 data has already arrived. */
34 kAFE_Channel1OverflowFlag = AFE_SR_OVR1_MASK, /*!< Channel 1 previous conversion result has not been read and new
35 data has already arrived. */
36 kAFE_Channel2OverflowFlag = AFE_SR_OVR2_MASK, /*!< Channel 2 previous conversion result has not been read and new
37 data has already arrived. */
38 kAFE_Channel0ReadyFlag = AFE_SR_RDY0_MASK, /*!< Channel 0 is ready to conversion. */
39 kAFE_Channel1ReadyFlag = AFE_SR_RDY1_MASK, /*!< Channel 1 is ready to conversion. */
40 kAFE_Channel2ReadyFlag = AFE_SR_RDY2_MASK, /*!< Channel 2 is ready to conversion. */
41 kAFE_Channel0ConversionCompleteFlag = AFE_SR_COC0_MASK, /*!< Channel 0 conversion is complete. */
42 kAFE_Channel1ConversionCompleteFlag = AFE_SR_COC1_MASK, /*!< Channel 1 conversion is complete. */
43 kAFE_Channel2ConversionCompleteFlag = AFE_SR_COC2_MASK, /*!< Channel 2 conversion is complete. */
44 #if defined(FSL_FEATURE_AFE_HAS_FOUR_CHANNELS) && FSL_FEATURE_AFE_HAS_FOUR_CHANNELS
45 kAFE_Channel3OverflowFlag = AFE_SR_OVR3_MASK, /*!< Channel 3 previous conversion result has not been read and new
46 data has already arrived. */
47 kAFE_Channel3ReadyFlag = AFE_SR_RDY3_MASK, /*!< Channel 3 is ready to conversion. */
48 kAFE_Channel3ConversionCompleteFlag = AFE_SR_COC3_MASK /*!< Channel 3 conversion is complete. */
49 #endif /* FSL_FEATURE_AFE_HAS_FOUR_CHANNELS */
50 };
51
52 /*!
53 * @brief Defines AFE interrupt enable.
54 */
55 enum
56 {
57 kAFE_Channel0InterruptEnable = AFE_DI_INTEN0_MASK, /*!< Channel 0 Interrupt. */
58 kAFE_Channel1InterruptEnable = AFE_DI_INTEN1_MASK, /*!< Channel 1 Interrupt. */
59 kAFE_Channel2InterruptEnable = AFE_DI_INTEN2_MASK, /*!< Channel 2 Interrupt. */
60 #if defined(FSL_FEATURE_AFE_HAS_FOUR_CHANNELS) && FSL_FEATURE_AFE_HAS_FOUR_CHANNELS
61 kAFE_Channel3InterruptEnable = AFE_DI_INTEN3_MASK /*!< Channel 3 Interrupt. */
62 #endif /* FSL_FEATURE_AFE_HAS_FOUR_CHANNELS */
63 };
64
65 /*!
66 * @brief Defines AFE DMA enable.
67 */
68 enum
69 {
70 kAFE_Channel0DMAEnable = AFE_DI_DMAEN0_MASK, /*!< Channel 0 DMA. */
71 kAFE_Channel1DMAEnable = AFE_DI_DMAEN1_MASK, /*!< Channel 1 DMA. */
72 kAFE_Channel2DMAEnable = AFE_DI_DMAEN2_MASK, /*!< Channel 2 DMA. */
73 #if defined(FSL_FEATURE_AFE_HAS_FOUR_CHANNELS) && FSL_FEATURE_AFE_HAS_FOUR_CHANNELS
74 kAFE_Channel3DMAEnable = AFE_DI_DMAEN3_MASK /*!< Channel 3 DMA */
75 #endif /* FSL_FEATURE_AFE_HAS_FOUR_CHANNELS */
76 };
77
78 /*!
79 * @brief Defines AFE channel trigger flag.
80 */
81 enum
82 {
83 kAFE_Channel0Trigger = AFE_CR_SOFT_TRG0_MASK, /*!< Channel 0 software trigger. */
84 kAFE_Channel1Trigger = AFE_CR_SOFT_TRG1_MASK, /*!< Channel 1 software trigger. */
85 kAFE_Channel2Trigger = AFE_CR_SOFT_TRG2_MASK, /*!< Channel 2 software trigger. */
86 #if defined(FSL_FEATURE_AFE_HAS_FOUR_CHANNELS) && FSL_FEATURE_AFE_HAS_FOUR_CHANNELS
87 kAFE_Channel3Trigger = AFE_CR_SOFT_TRG3_MASK /*!< Channel 3 software trigger. */
88 #endif /* FSL_FEATURE_AFE_HAS_FOUR_CHANNELS */
89 };
90
91 /*!
92 * @brief AFE OSR modes.
93 */
94 typedef enum _afe_decimator_oversampling_ratio
95 {
96 kAFE_DecimatorOversampleRatio64 = 0U, /*!< Decimator over sample ratio is 64. */
97 kAFE_DecimatorOversampleRatio128 = 1U, /*!< Decimator over sample ratio is 128. */
98 kAFE_DecimatorOversampleRatio256 = 2U, /*!< Decimator over sample ratio is 256. */
99 kAFE_DecimatorOversampleRatio512 = 3U, /*!< Decimator over sample ratio is 512. */
100 kAFE_DecimatorOversampleRatio1024 = 4U, /*!< Decimator over sample ratio is 1024. */
101 kAFE_DecimatorOversampleRatio2048 = 5U, /*!< Decimator over sample ratio is 2048. */
102 } afe_decimator_oversample_ratio_t;
103
104 /*!
105 * @brief Defines the AFE result format modes.
106 */
107 typedef enum _afe_result_format
108 {
109 kAFE_ResultFormatLeft = 0U, /*!< Left justified result format. */
110 kAFE_ResultFormatRight = 1U, /*!< Right justified result format. */
111 } afe_result_format_t;
112
113 /*!
114 * @brief Defines the AFE clock divider modes.
115 */
116 typedef enum _afe_clock_divider
117 {
118 kAFE_ClockDivider1 = 0U, /*!< Clock divided by 1. */
119 kAFE_ClockDivider2 = 1U, /*!< Clock divided by 2. */
120 kAFE_ClockDivider4 = 2U, /*!< Clock divided by 4. */
121 kAFE_ClockDivider8 = 3U, /*!< Clock divided by 8. */
122 kAFE_ClockDivider16 = 4U, /*!< Clock divided by 16. */
123 kAFE_ClockDivider32 = 5U, /*!< Clock divided by 32. */
124 kAFE_ClockDivider64 = 6U, /*!< Clock divided by 64. */
125 kAFE_ClockDivider128 = 7U, /*!< Clock divided by 128. */
126 kAFE_ClockDivider256 = 8U, /*!< Clock divided by 256. */
127 } afe_clock_divider_t;
128
129 /*!
130 * @brief Defines the AFE clock source modes.
131 */
132 typedef enum _afe_clock_source
133 {
134 kAFE_ClockSource0 = 0U, /*!< Modulator clock source 0. */
135 kAFE_ClockSource1 = 1U, /*!< Modulator clock source 1. */
136 kAFE_ClockSource2 = 2U, /*!< Modulator clock source 2. */
137 kAFE_ClockSource3 = 3U, /*!< Modulator clock source 3. */
138 } afe_clock_source_t;
139
140 /*!
141 * @brief Defines the PGA's values.
142 */
143 typedef enum _afe_pga_gain
144 {
145 kAFE_PgaDisable = 0U, /*!< PGA disabled. */
146 kAFE_PgaGain1 = 1U, /*!< Input gained by 1. */
147 kAFE_PgaGain2 = 2U, /*!< Input gained by 2. */
148 kAFE_PgaGain4 = 3U, /*!< Input gained by 4. */
149 kAFE_PgaGain8 = 4U, /*!< Input gained by 8. */
150 kAFE_PgaGain16 = 5U, /*!< Input gained by 16. */
151 kAFE_PgaGain32 = 6U, /*!< Input gained by 32. */
152 } afe_pga_gain_t;
153
154 /*!
155 * @brief Defines the bypass modes.
156 */
157 typedef enum _afe_bypass_mode
158 {
159 kAFE_BypassInternalClockPositiveEdge = 0U, /*!< Bypassed channel mode - internal clock selected,
160 positive edge for registering data by the decimation filter */
161 kAFE_BypassExternalClockPositiveEdge = 1U, /*!< Bypassed channel mode - external clock selected,
162 positive edge for registering data by the decimation filter */
163 kAFE_BypassInternalClockNegativeEdge = 2U, /*!< Bypassed channel mode - internal clock selected,
164 negative edge for registering data by the decimation filter */
165 kAFE_BypassExternalClockNegativeEdge = 3U, /*!< Bypassed channel mode - external clock selected,
166 negative edge for registering data by the decimation filter */
167 kAFE_BypassDisable = 4U, /*!< Normal channel mode. */
168 } afe_bypass_mode_t;
169
170 /*!
171 * @brief Defines the structure to initialize the AFE channel.
172 *
173 * This structure keeps the configuration for the AFE channel.
174 */
175 typedef struct _afe_channel_config
176 {
177 bool enableHardwareTrigger; /*!< Enable triggering by hardware. */
178 bool enableContinuousConversion; /*!< Enable continuous conversion mode. */
179 afe_bypass_mode_t channelMode; /*!< Select if channel is in bypassed mode. */
180 afe_pga_gain_t pgaGainSelect; /*!< Select the analog gain applied to the input signal. */
181 afe_decimator_oversample_ratio_t decimatorOversampleRatio; /*!< Select the over sampling ration. */
182 } afe_channel_config_t;
183
184 /*!
185 * @brief Defines the structure to initialize the AFE module.
186 *
187 * This structure keeps the configuration for the AFE module.
188 */
189 typedef struct _afe_config
190 {
191 bool enableLowPower; /*!< Enable low power mode. */
192 afe_result_format_t resultFormat; /*!< Select the result format. */
193 afe_clock_divider_t clockDivider; /*!< Select the clock divider ration for the modulator clock. */
194 afe_clock_source_t clockSource; /*!< Select clock source for modulator clock. */
195 uint8_t startupCount; /*!< Select the start up delay of modulators. */
196 } afe_config_t;
197
198 #if defined(__cplusplus)
199 extern "C" {
200 #endif
201
202 /*******************************************************************************
203 * API
204 ******************************************************************************/
205
206 /*!
207 * @name AFE Initialization
208 * @{
209 */
210
211 /*!
212 * @brief Initialization for the AFE module.
213 *
214 * This function configures the AFE module for the configuration
215 * which are shared by all channels.
216 *
217 * @param base AFE peripheral base address.
218 * @param config Pointer to structure of "afe_config_t".
219 *
220 */
221 void AFE_Init(AFE_Type *base, const afe_config_t *config);
222
223 /*!
224 * @brief De-Initialization for the AFE module.
225 *
226 * This function disables clock.
227 *
228 * @param base AFE peripheral base address.
229 */
230 void AFE_Deinit(AFE_Type *base);
231
232 /*!
233 * @brief Fills the user configure structure.
234 *
235 * This function fills the afe_config_t structure with default settings.
236 * Defaut value are:
237 * @code
238 * config->enableLowPower = false;
239 * config->resultFormat = kAFE_ResultFormatRight;
240 * config->clockDivider = kAFE_ClockDivider2;
241 * config->clockSource = kAFE_ClockSource1;
242 * config->startupCount = 2U;
243 * @endcode
244 *
245 * @param config Pointer to structure of "afe_config_t".
246 */
247 void AFE_GetDefaultConfig(afe_config_t *config);
248
249 /*!
250 * @brief Software reset the AFE module.
251 *
252 * This function is to reset all the ADCs, PGAs, decimation filters and clock configuration bits. When asserted as
253 * "false", all ADCs, PGAs and decimation filters are disabled. Clock Configuration bits are reset. When asserted as
254 * "true", all ADCs, PGAs and decimation filters are enabled.
255 *
256 * @param base AFE peripheral base address.
257 * @param enable Assert the reset command.
258 */
AFE_SoftwareReset(AFE_Type * base,bool enable)259 static inline void AFE_SoftwareReset(AFE_Type *base, bool enable)
260 {
261 if (enable)
262 {
263 base->CR |= AFE_CR_RST_B_MASK;
264 }
265 else
266 {
267 base->CR &= ~AFE_CR_RST_B_MASK;
268 }
269 }
270
271 /*!
272 * @brief Enables all configured AFE channels.
273 *
274 * This function enables AFE and filter.
275 *
276 * @param base AFE peripheral base address.
277 * @param enable Enable the AFE module or not.
278 */
AFE_Enable(AFE_Type * base,bool enable)279 static inline void AFE_Enable(AFE_Type *base, bool enable)
280 {
281 if (enable)
282 {
283 base->CR |= AFE_CR_MSTR_EN_MASK;
284 }
285 else
286 {
287 base->CR &= ~AFE_CR_MSTR_EN_MASK;
288 }
289 }
290
291 /* @} */
292
293 /*!
294 * @name AFE Conversion
295 * @{
296 */
297
298 /*!
299 * @brief Configure the selected AFE channel.
300 *
301 * This function configures the selected AFE channel.
302 *
303 * @param base AFE peripheral base address.
304 * @param channel AFE channel index.
305 * @param config Pointer to structure of "afe_channel_config_t".
306 *
307 */
308 void AFE_SetChannelConfig(AFE_Type *base, uint32_t channel, const afe_channel_config_t *config);
309
310 /*!
311 * @brief Fills the channel configuration structure.
312 *
313 * This function fills the afe_channel_config_t structure with default settings.
314 * Default value are:
315 * @code
316 * config->enableHardwareTrigger = false;
317 * config->enableContinuousConversion = false;
318 * config->channelMode = kAFE_Normal;
319 * config->decimatorOversampleRatio = kAFE_DecimatorOversampleRatio64;
320 * config->pgaGainSelect = kAFE_PgaGain1;
321 * @endcode
322 *
323 * @param config Pointer to structure of "afe_channel_config_t".
324 */
325 void AFE_GetDefaultChannelConfig(afe_channel_config_t *config);
326
327 /*!
328 * @brief Reads the raw conversion value.
329 *
330 * This function returns the raw conversion value of the selected channel.
331 *
332 * @param base AFE peripheral base address.
333 * @param channel AFE channel index.
334 * @return Conversion value.
335 * @note The returned value could be left or right adjusted according to the AFE module configuration.
336 */
337 uint32_t AFE_GetChannelConversionValue(AFE_Type *base, uint32_t channel);
338
339 /*!
340 * @brief Triggers the AFE conversion by software.
341 *
342 * This function triggers the AFE conversion by executing a software command. It
343 * starts the conversion on selected channels if the software trigger option is
344 * selected for the channels.
345 *
346 * @param base AFE peripheral base address.
347 * @param mask AFE channel mask software trigger.
348 * The parameter can be combination of the following source if defined:
349 * @arg kAFE_Channel0Trigger
350 * @arg kAFE_Channel1Trigger
351 * @arg kAFE_Channel2Trigger
352 * @arg kAFE_Channel3Trigger
353 */
AFE_DoSoftwareTriggerChannel(AFE_Type * base,uint32_t mask)354 static inline void AFE_DoSoftwareTriggerChannel(AFE_Type *base, uint32_t mask)
355 {
356 base->CR |= mask & ((uint32_t)kAFE_Channel0Trigger | (uint32_t)kAFE_Channel1Trigger |
357 (uint32_t)kAFE_Channel2Trigger | (uint32_t)kAFE_Channel3Trigger);
358 }
359
360 /*!
361 * @brief Gets the AFE status flag state.
362 *
363 * This function gets all AFE status.
364 *
365 * @param base AFE peripheral base address.
366 * @return the mask of these status flag bits.
367 */
AFE_GetChannelStatusFlags(AFE_Type * base)368 static inline uint32_t AFE_GetChannelStatusFlags(AFE_Type *base)
369 {
370 return base->SR;
371 }
372
373 /*!
374 * @brief Sets phase delays value.
375 *
376 * This function sets the phase delays for channels. This delay is inserted before
377 * the trigger response of the decimation filters. The delay is used to provide
378 * a phase compensation between AFE channels in step of prescaled modulator clock
379 * periods.
380 * @param base AFE peripheral base address.
381 * @param channel AFE channel index.
382 * @param value delay time value.
383 */
384 void AFE_SetChannelPhaseDelayValue(AFE_Type *base, uint32_t channel, uint32_t value);
385
386 /*!
387 * @brief Asserts the phase delay setting.
388 *
389 * This function should be called after all desired channel's
390 * delay registers are loaded. Values in channel's delay registers are active
391 * after calling this function and after the conversation starts.
392 *
393 * @param base AFE peripheral base address.
394 */
AFE_SetChannelPhasetDelayOk(AFE_Type * base)395 static inline void AFE_SetChannelPhasetDelayOk(AFE_Type *base)
396 {
397 base->CR |= AFE_CR_DLY_OK_MASK;
398 }
399
400 /*!
401 * @brief Enables AFE interrupt.
402 *
403 * This function enables one channel interrupt.
404 *
405 * @param base AFE peripheral base address.
406 * @param mask AFE channel interrupt mask.
407 * The parameter can be combination of the following source if defined:
408 * @arg kAFE_Channel0InterruptEnable
409 * @arg kAFE_Channel1InterruptEnable
410 * @arg kAFE_Channel2InterruptEnable
411 * @arg kAFE_Channel3InterruptEnable
412 */
AFE_EnableChannelInterrupts(AFE_Type * base,uint32_t mask)413 static inline void AFE_EnableChannelInterrupts(AFE_Type *base, uint32_t mask)
414 {
415 base->DI |= mask & ((uint32_t)kAFE_Channel0InterruptEnable | (uint32_t)kAFE_Channel1InterruptEnable |
416 (uint32_t)kAFE_Channel2InterruptEnable | (uint32_t)kAFE_Channel3InterruptEnable);
417 }
418
419 /*!
420 * @brief Disables AFE interrupt.
421 *
422 * This function disables one channel interrupt.
423 *
424 * @param base AFE peripheral base address.
425 * @param mask AFE channel interrupt mask.
426 * The parameter can be combination of the following source if defined:
427 * @arg kAFE_Channel0InterruptEnable
428 * @arg kAFE_Channel1InterruptEnable
429 * @arg kAFE_Channel2InterruptEnable
430 * @arg kAFE_Channel3InterruptEnable
431 */
AFE_DisableChannelInterrupts(AFE_Type * base,uint32_t mask)432 static inline void AFE_DisableChannelInterrupts(AFE_Type *base, uint32_t mask)
433 {
434 base->DI &= ~(mask & ((uint32_t)kAFE_Channel0InterruptEnable | (uint32_t)kAFE_Channel1InterruptEnable |
435 (uint32_t)kAFE_Channel2InterruptEnable | (uint32_t)kAFE_Channel3InterruptEnable));
436 }
437
438 /*!
439 * @brief Returns mask of all enabled AFE interrupts.
440 *
441 * @param base AFE peripheral base address.
442 * @return Return the mask of these interrupt enable/disable bits.
443 */
AFE_GetEnabledChannelInterrupts(AFE_Type * base)444 static inline uint32_t AFE_GetEnabledChannelInterrupts(AFE_Type *base)
445 {
446 return base->DI & ((uint32_t)kAFE_Channel0InterruptEnable | (uint32_t)kAFE_Channel1InterruptEnable |
447 (uint32_t)kAFE_Channel2InterruptEnable | (uint32_t)kAFE_Channel3InterruptEnable);
448 }
449
450 /*!
451 * @brief Enables/Disables AFE DMA.
452 *
453 * This function enables/disables one channel DMA request.
454 *
455 * @param base AFE peripheral base address.
456 * @param mask AFE channel dma mask.
457 * @param enable Pass true to enable interrupt, false to disable.
458 * The parameter can be combination of the following source if defined:
459 * @arg kAFE_Channel0DMAEnable
460 * @arg kAFE_Channel1DMAEnable
461 * @arg kAFE_Channel2DMAEnable
462 * @arg kAFE_Channel3DMAEnable
463 */
464 void AFE_EnableChannelDMA(AFE_Type *base, uint32_t mask, bool enable);
465
466 /* @} */
467
468 #if defined(__cplusplus)
469 }
470 #endif
471 /*!
472 * @}
473 */
474 #endif /* _FSL_AFE_H_ */
475
