1 /*
2 * Copyright 2018 NXP.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 /***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12 /*
13 * How to setup clock using clock driver functions:
14 *
15 * 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
16 * and flash clock are in allowed range during clock mode switch.
17 *
18 * 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.
19 *
20 * 3. Set MCG configuration, MCG includes three parts: FLL clock, PLL clock and
21 * internal reference clock(MCGIRCLK). Follow the steps to setup:
22 *
23 * 1). Call CLOCK_BootToXxxMode to set MCG to target mode.
24 *
25 * 2). If target mode is FBI/BLPI/PBI mode, the MCGIRCLK has been configured
26 * correctly. For other modes, need to call CLOCK_SetInternalRefClkConfig
27 * explicitly to setup MCGIRCLK.
28 *
29 * 3). Don't need to configure FLL explicitly, because if target mode is FLL
30 * mode, then FLL has been configured by the function CLOCK_BootToXxxMode,
31 * if the target mode is not FLL mode, the FLL is disabled.
32 *
33 * 4). If target mode is PEE/PBE/PEI/PBI mode, then the related PLL has been
34 * setup by CLOCK_BootToXxxMode. In FBE/FBI/FEE/FBE mode, the PLL could
35 * be enabled independently, call CLOCK_EnablePll0 explicitly in this case.
36 *
37 * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
38 */
39
40 /* clang-format off */
41 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
42 !!GlobalInfo
43 product: Clocks v5.0
44 processor: MKV30F64xxx10
45 mcu_data: ksdk2_0
46 processor_version: 0.0.14
47 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
48 /* clang-format on */
49
50 #include "clock_config.h"
51
52 /*******************************************************************************
53 * Definitions
54 ******************************************************************************/
55 #define MCG_IRCLK_DISABLE 0U /*!< MCGIRCLK disabled */
56 #define OSC_CAP0P 0U /*!< Oscillator 0pF capacitor load */
57 #define OSC_ER_CLK_DISABLE 0U /*!< Disable external reference clock */
58 #define SIM_OSC32KSEL_OSC32KCLK_CLK 0U /*!< OSC32KSEL select: OSC32KCLK clock */
59 #define SIM_PLLFLLSEL_MCGFLLCLK_CLK 0U /*!< PLLFLL select: MCGFLLCLK clock */
60
61 /*******************************************************************************
62 * Variables
63 ******************************************************************************/
64 /* System clock frequency. */
65 extern uint32_t SystemCoreClock;
66
67 /*******************************************************************************
68 * Code
69 ******************************************************************************/
70 /*FUNCTION**********************************************************************
71 *
72 * Function Name : CLOCK_CONFIG_FllStableDelay
73 * Description : This function is used to delay for FLL stable.
74 *
75 *END**************************************************************************/
CLOCK_CONFIG_FllStableDelay(void)76 static void CLOCK_CONFIG_FllStableDelay(void)
77 {
78 uint32_t i = 30000U;
79 while (i--)
80 {
81 __NOP();
82 }
83 }
84
85 /*******************************************************************************
86 ************************ BOARD_InitBootClocks function ************************
87 ******************************************************************************/
BOARD_InitBootClocks(void)88 void BOARD_InitBootClocks(void)
89 {
90 BOARD_BootClockRUN();
91 }
92
93 /*******************************************************************************
94 ********************** Configuration BOARD_BootClockRUN ***********************
95 ******************************************************************************/
96 /* clang-format off */
97 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
98 !!Configuration
99 name: BOARD_BootClockRUN
100 called_from_default_init: true
101 outputs:
102 - {id: Bus_clock.outFreq, value: 20.97152 MHz}
103 - {id: Core_clock.outFreq, value: 20.97152 MHz}
104 - {id: Flash_clock.outFreq, value: 10.48576 MHz}
105 - {id: LPO_clock.outFreq, value: 1 kHz}
106 - {id: MCGFFCLK.outFreq, value: 32.768 kHz}
107 - {id: PLLFLLCLK.outFreq, value: 20.97152 MHz}
108 - {id: System_clock.outFreq, value: 20.97152 MHz}
109 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
110 /* clang-format on */
111
112 /*******************************************************************************
113 * Variables for BOARD_BootClockRUN configuration
114 ******************************************************************************/
115 const mcg_config_t mcgConfig_BOARD_BootClockRUN =
116 {
117 .mcgMode = kMCG_ModeFEI, /* FEI - FLL Engaged Internal */
118 .irclkEnableMode = MCG_IRCLK_DISABLE, /* MCGIRCLK disabled */
119 .ircs = kMCG_IrcSlow, /* Slow internal reference clock selected */
120 .fcrdiv = 0x1U, /* Fast IRC divider: divided by 2 */
121 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
122 .drs = kMCG_DrsLow, /* Low frequency range */
123 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
124 .oscsel = kMCG_OscselOsc, /* Selects System Oscillator (OSCCLK) */
125 };
126 const sim_clock_config_t simConfig_BOARD_BootClockRUN =
127 {
128 .pllFllSel = SIM_PLLFLLSEL_MCGFLLCLK_CLK, /* PLLFLL select: MCGFLLCLK clock */
129 .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK, /* OSC32KSEL select: OSC32KCLK clock */
130 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /1, OUTDIV4: /2 */
131 };
132 const osc_config_t oscConfig_BOARD_BootClockRUN =
133 {
134 .freq = 0U, /* Oscillator frequency: 0Hz */
135 .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */
136 .workMode = kOSC_ModeExt, /* Use external clock */
137 .oscerConfig =
138 {
139 .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
140 .erclkDiv = 0, /* Divider for OSCERCLK: divided by 1 */
141 }
142 };
143
144 /*******************************************************************************
145 * Code for BOARD_BootClockRUN configuration
146 ******************************************************************************/
BOARD_BootClockRUN(void)147 void BOARD_BootClockRUN(void)
148 {
149 /* Set the system clock dividers in SIM to safe value. */
150 CLOCK_SetSimSafeDivs();
151 /* Set MCG to FEI mode. */
152 #if FSL_CLOCK_DRIVER_VERSION >= MAKE_VERSION(2, 2, 0)
153 CLOCK_BootToFeiMode(mcgConfig_BOARD_BootClockRUN.dmx32,
154 mcgConfig_BOARD_BootClockRUN.drs,
155 CLOCK_CONFIG_FllStableDelay);
156 #else
157 CLOCK_BootToFeiMode(mcgConfig_BOARD_BootClockRUN.drs,
158 CLOCK_CONFIG_FllStableDelay);
159 #endif
160 /* Configure the Internal Reference clock (MCGIRCLK). */
161 CLOCK_SetInternalRefClkConfig(mcgConfig_BOARD_BootClockRUN.irclkEnableMode,
162 mcgConfig_BOARD_BootClockRUN.ircs,
163 mcgConfig_BOARD_BootClockRUN.fcrdiv);
164 /* Set the clock configuration in SIM module. */
165 CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
166 /* Set SystemCoreClock variable. */
167 SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
168 }
169
170
