1 /* 2 * Copyright 2019 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef _CLOCK_CONFIG_H_ 9 #define _CLOCK_CONFIG_H_ 10 11 #include "fsl_common.h" 12 13 /******************************************************************************* 14 * Definitions 15 ******************************************************************************/ 16 #define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */ 17 18 #define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */ 19 /******************************************************************************* 20 ************************ BOARD_InitBootClocks function ************************ 21 ******************************************************************************/ 22 23 #if defined(__cplusplus) 24 extern "C" { 25 #endif /* __cplusplus*/ 26 27 /*! 28 * @brief This function executes default configuration of clocks. 29 * 30 */ 31 void BOARD_InitBootClocks(void); 32 33 #if defined(__cplusplus) 34 } 35 #endif /* __cplusplus*/ 36 37 /******************************************************************************* 38 ********************** Configuration BOARD_BootClockRUN *********************** 39 ******************************************************************************/ 40 /******************************************************************************* 41 * Definitions for BOARD_BootClockRUN configuration 42 ******************************************************************************/ 43 #define BOARD_BOOTCLOCKRUN_CORE_CLOCK 24000000U /*!< Core clock frequency: 24000000Hz */ 44 45 /* Clock outputs (values are in Hz): */ 46 #define BOARD_BOOTCLOCKRUN_ADC_ALT_CLK 3000000UL 47 #define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 0UL 48 #define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL 49 #define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL 50 #define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL 51 #define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL 52 #define BOARD_BOOTCLOCKRUN_CORE_CLK_ROOT 24000000UL 53 #define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK 24000000UL 54 #define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 1500000UL 55 #define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 12000000UL 56 #define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 24000000UL 57 #define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 24000000UL 58 #define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 24000000UL 59 #define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 3000000UL 60 #define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 6000000UL 61 #define BOARD_BOOTCLOCKRUN_MQS_MCLK 3000000UL 62 #define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 24000000UL 63 #define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 3000000UL 64 #define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 3000000UL 65 #define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 3000000UL 66 #define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 1500000UL 67 #define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 3000000UL 68 #define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 3000000UL 69 #define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL 70 #define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 1500000UL 71 #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 1500000UL 72 #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL 73 #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 6000000UL 74 #define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 4000000UL 75 #define BOARD_BOOTCLOCKRUN_USBPHY_CLK 0UL 76 77 /*! @brief Sys PLL for BOARD_BootClockRUN configuration. 78 */ 79 extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN; 80 /*! @brief Enet PLL set for BOARD_BootClockRUN configuration. 81 */ 82 extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN; 83 84 /******************************************************************************* 85 * API for BOARD_BootClockRUN configuration 86 ******************************************************************************/ 87 #if defined(__cplusplus) 88 extern "C" { 89 #endif /* __cplusplus*/ 90 91 /*! 92 * @brief This function executes configuration of clocks. 93 * 94 */ 95 void BOARD_BootClockRUN(void); 96 97 #if defined(__cplusplus) 98 } 99 #endif /* __cplusplus*/ 100 101 #endif /* _CLOCK_CONFIG_H_ */ 102 103
