1 /* 2 ** ################################################################### 3 ** Processors: MIMX8UX5AVLFZ 4 ** MIMX8UX5AVOFZ 5 ** MIMX8UX5CVLDZ 6 ** 7 ** Compilers: GNU C Compiler 8 ** IAR ANSI C/C++ Compiler for ARM 9 ** Keil ARM C/C++ Compiler 10 ** 11 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019 12 ** Version: rev. 4.0, 2020-06-19 13 ** Build: b200806 14 ** 15 ** Abstract: 16 ** Provides a system configuration function and a global variable that 17 ** contains the system frequency. It configures the device and initializes 18 ** the oscillator (PLL) that is part of the microcontroller device. 19 ** 20 ** Copyright 2016 Freescale Semiconductor, Inc. 21 ** Copyright 2016-2020 NXP 22 ** All rights reserved. 23 ** 24 ** SPDX-License-Identifier: BSD-3-Clause 25 ** 26 ** http: www.nxp.com 27 ** mail: support@nxp.com 28 ** 29 ** Revisions: 30 ** - rev. 1.0 (2016-06-02) 31 ** Initial version. 32 ** - rev. 2.0 (2017-08-23) 33 ** RevA Header EAR 34 ** - rev. 3.0 (2018-08-22) 35 ** RevB Header EAR 36 ** - rev. 4.0 (2020-06-19) 37 ** RevC Header RFP 38 ** 39 ** ################################################################### 40 */ 41 42 /*! 43 * @file MIMX8UX5_cm4 44 * @version 1.0 45 * @date 060820 46 * @brief Device specific configuration file for MIMX8UX5_cm4 (header file) 47 * 48 * Provides a system configuration function and a global variable that contains 49 * the system frequency. It configures the device and initializes the oscillator 50 * (PLL) that is part of the microcontroller device. 51 */ 52 #ifndef _SYSTEM_MIMX8UX5_CM4_H_ 53 #define _SYSTEM_MIMX8UX5_CM4_H_ /**< Symbol preventing repeated inclusion */ 54 55 #ifdef __cplusplus 56 extern "C" { 57 #endif 58 59 #include <stdint.h> 60 #include "main/rpc.h" 61 #include "svc/pm/pm_api.h" 62 63 #ifndef DISABLE_WDOG 64 #define DISABLE_WDOG 1 65 #endif 66 67 /** 68 * When downloading/debuging with Debugger, the Parity/ECC error check is disabled by debugger. 69 * Define ENABLE_ECC_DEBUG to non-zero value to re-enable the check during debugging. 70 */ 71 #ifndef ENABLE_ECC_DEBUG 72 #define ENABLE_ECC_DEBUG 0 73 #endif 74 75 #define DEFAULT_SYSTEM_CLOCK 264000000u /* Default System clock value */ 76 77 /** 78 * @brief System clock frequency (core clock) 79 * 80 * The system clock frequency supplied to the SysTick timer and the processor 81 * core clock. This variable can be used by the user application to setup the 82 * SysTick timer or configure other parameters. It may also be used by debugger to 83 * query the frequency of the debug timer or configure the trace clock speed 84 * SystemCoreClock is initialized with a correct predefined value. 85 */ 86 extern uint32_t SystemCoreClock; 87 88 /** 89 * @brief Setup the microcontroller system. 90 * 91 * Typically this function configures the oscillator (PLL) that is part of the 92 * microcontroller device. For systems with variable clock speed it also updates 93 * the variable SystemCoreClock. SystemInit is called from startup_device file. 94 */ 95 void SystemInit (void); 96 97 /** 98 * @brief Updates the SystemCoreClock variable. 99 * 100 * It must be called whenever the core clock is changed during program 101 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates 102 * the current core clock. 103 */ 104 void SystemCoreClockUpdate (void); 105 106 /** 107 * @brief Open the SCFW IPC channel. 108 * 109 * Typically this function opens the IPC channel between current Subsystem and SCU. 110 * This function uses SCFW API to initialize the MU channel. SystemInitScfwIpc should 111 * be called before using SCFW API. 112 */ 113 void SystemInitScfwIpc (void); 114 115 /** 116 * @brief Get the SCFW IPC handle. 117 * 118 * This function gets the IPC handle which could be used to communicate with SCFW. 119 * SystemGetScfwIpcHandle should be called after SCFW IPC channel is initialized. 120 */ 121 sc_ipc_t SystemGetScfwIpcHandle (void); 122 123 #ifdef __cplusplus 124 } 125 #endif 126 127 #endif /* _SYSTEM_MIMX8UX5_CM4_H_ */ 128
