1 /*
2  * Copyright (c) 2016, Freescale Semiconductor, Inc.
3  * Copyright 2016-2020 NXP
4  * All rights reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #ifndef _RTE_DEVICE_H
10 #define _RTE_DEVICE_H
11 
12 #include "pin_mux.h"
13 
14 /* UART select, UART1-UART4 */
15 /* User needs to provide the implementation of UARTX_GetFreq/UARTX_InitPins/UARTX_DeinitPins for the enabled UART
16  * instance. */
17 #define RTE_USART1        0
18 #define RTE_USART1_DMA_EN 0
19 #define RTE_USART2        0
20 #define RTE_USART2_DMA_EN 0
21 #define RTE_USART3        0
22 #define RTE_USART3_DMA_EN 0
23 #define RTE_USART4        0
24 #define RTE_USART4_DMA_EN 0
25 
26 /* I2C select, I2C1 - I2C4. */
27 /* User needs to provide the implementation of I2CX_GetFreq/I2CX_InitPins/I2CX_DeinitPins for the enabled I2C instance.
28  */
29 #define RTE_I2C1        0
30 #define RTE_I2C1_DMA_EN 0
31 #define RTE_I2C2        0
32 #define RTE_I2C2_DMA_EN 0
33 #define RTE_I2C3        0
34 #define RTE_I2C3_DMA_EN 0
35 #define RTE_I2C4        0
36 #define RTE_I2C4_DMA_EN 0
37 
38 /* SPI select, ECSPI1 - ECSPI3. */
39 /* User needs to provide the implementation of ECSPIX_GetFreq/ECSPIX_InitPins/ECSPIX_DeinitPins for the enabled ECSPI
40  * instance. */
41 #define RTE_SPI0        0
42 #define RTE_SPI0_DMA_EN 0
43 #define RTE_SPI1        0
44 #define RTE_SPI1_DMA_EN 0
45 #define RTE_SPI2        0
46 #define RTE_SPI2_DMA_EN 0
47 
48 #endif /* _RTE_DEVICE_H */
49