1 /* 2 ** ################################################################### 3 ** Processors: LPC824M201JDH20 4 ** LPC824M201JHI33 5 ** 6 ** Compilers: GNU C Compiler 7 ** IAR ANSI C/C++ Compiler for ARM 8 ** Keil ARM C/C++ Compiler 9 ** MCUXpresso Compiler 10 ** 11 ** Reference manual: LPC82x User manual Rev.1.2 5 October 2016 12 ** Version: rev. 1.1, 2018-02-25 13 ** Build: b201015 14 ** 15 ** Abstract: 16 ** Provides a system configuration function and a global variable that 17 ** contains the system frequency. It configures the device and initializes 18 ** the oscillator (PLL) that is part of the microcontroller device. 19 ** 20 ** Copyright 2016 Freescale Semiconductor, Inc. 21 ** Copyright 2016-2020 NXP 22 ** All rights reserved. 23 ** 24 ** SPDX-License-Identifier: BSD-3-Clause 25 ** 26 ** http: www.nxp.com 27 ** mail: support@nxp.com 28 ** 29 ** Revisions: 30 ** - rev. 1.0 (2018-02-09) 31 ** Initial version. 32 ** - rev. 1.1 (2018-02-25) 33 ** Update some registers according to UM rev 1.2 34 ** 35 ** ################################################################### 36 */ 37 38 /*! 39 * @file LPC824 40 * @version 1.1 41 * @date 2018-02-25 42 * @brief Device specific configuration file for LPC824 (implementation file) 43 * 44 * Provides a system configuration function and a global variable that contains 45 * the system frequency. It configures the device and initializes the oscillator 46 * (PLL) that is part of the microcontroller device. 47 */ 48 49 #include <stdint.h> 50 #include "fsl_device_registers.h" 51 52 /* get system pll input freq */ CLOCK_GetSystemPLLInClkRate(void)53static uint32_t CLOCK_GetSystemPLLInClkRate(void) 54 { 55 uint32_t freq = 0U; 56 57 switch ((SYSCON->SYSPLLCLKSEL & SYSCON_SYSPLLCLKSEL_SEL_MASK)) 58 { 59 /* source from external clock in */ 60 case 0x00U: 61 freq = CLK_IRC_12MHZ; 62 break; 63 /* source from the IRC clock */ 64 case 0x01U: 65 freq = CLK_OSC_IN; 66 break; 67 /* source from external clock clock */ 68 case 0x03U: 69 freq = EXT_CLK_IN; 70 break; 71 default: 72 /* default source from the IRC clock */ 73 freq = CLK_IRC_12MHZ; 74 break; 75 } 76 77 return freq; 78 } 79 80 /* get system pll output freq*/ Clock_GetPLLFreq(uint32_t PLLReg,uint32_t inputRate)81static uint32_t Clock_GetPLLFreq(uint32_t PLLReg, uint32_t inputRate) 82 { 83 uint32_t m_val = ((PLLReg & 0x1FU) + 1U); 84 85 return (inputRate * m_val); 86 } 87 88 89 90 /* ---------------------------------------------------------------------------- 91 -- Core clock 92 ---------------------------------------------------------------------------- */ 93 94 uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK; 95 96 /* ---------------------------------------------------------------------------- 97 -- SystemInit() 98 ---------------------------------------------------------------------------- */ 99 SystemInit(void)100void SystemInit (void) { 101 102 #if defined(__MCUXPRESSO) 103 extern void(*const g_pfnVectors[]) (void); 104 SCB->VTOR = (uint32_t) &g_pfnVectors; 105 #else 106 extern void *__Vectors; 107 SCB->VTOR = (uint32_t) &__Vectors; 108 #endif 109 SystemCoreClock = DEFAULT_SYSTEM_CLOCK; 110 SystemInitHook(); 111 } 112 113 /* ---------------------------------------------------------------------------- 114 -- SystemCoreClockUpdate() 115 ---------------------------------------------------------------------------- */ 116 SystemCoreClockUpdate(void)117void SystemCoreClockUpdate (void) { 118 uint32_t wdt_osc = 0U; 119 uint32_t irc_clk = 12000000U; 120 121 switch ((SYSCON->WDTOSCCTRL >> SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) & 0x0FU) { 122 case 0U: wdt_osc = 0U; break; 123 case 1U: wdt_osc = 600000U; break; 124 case 2U: wdt_osc = 1050000U; break; 125 case 3U: wdt_osc = 1400000U; break; 126 case 4U: wdt_osc = 1750000U; break; 127 case 5U: wdt_osc = 2100000U; break; 128 case 6U: wdt_osc = 2400000U; break; 129 case 7U: wdt_osc = 2700000U; break; 130 case 8U: wdt_osc = 3000000U; break; 131 case 9U: wdt_osc = 3250000U; break; 132 case 10U: wdt_osc = 3500000U; break; 133 case 11U: wdt_osc = 3750000U; break; 134 case 12U: wdt_osc = 4000000U; break; 135 case 13U: wdt_osc = 4200000U; break; 136 case 14U: wdt_osc = 4400000U; break; 137 case 15U: wdt_osc = 4600000U; break; 138 default: wdt_osc = 0U; break; 139 } 140 wdt_osc /= (((SYSCON->WDTOSCCTRL & SYSCON_WDTOSCCTRL_DIVSEL_MASK) + 1U) << 1U); 141 142 switch (SYSCON->MAINCLKSEL & SYSCON_MAINCLKSEL_SEL_MASK) 143 { 144 case 0U: /* IRC */ 145 SystemCoreClock = irc_clk; 146 break; 147 case 1U: /* System PLL input */ 148 switch (SYSCON->SYSPLLCLKSEL & SYSCON_SYSPLLCLKSEL_SEL_MASK) { 149 case 0U: /* IRC */ 150 SystemCoreClock = irc_clk; 151 break; 152 case 1U: /* System oscillator */ 153 SystemCoreClock = CLK_OSC_IN; 154 break; 155 case 3U: /* CLKIN */ 156 SystemCoreClock = EXT_CLK_IN; 157 break; 158 default: 159 SystemCoreClock = irc_clk; /* default is IRC */ 160 break; 161 } 162 break; 163 case 2U: /* watchdog oscillator */ 164 SystemCoreClock = wdt_osc; 165 break; 166 case 3U: /* System PLL */ 167 SystemCoreClock = Clock_GetPLLFreq((SYSCON->SYSPLLCTRL & SYSCON_SYSPLLCTRL_MSEL_MASK), CLOCK_GetSystemPLLInClkRate()); 168 break; 169 default: 170 SystemCoreClock = 0U; 171 break; 172 } 173 174 SystemCoreClock /= SYSCON->SYSAHBCLKDIV; 175 } 176 177 /* ---------------------------------------------------------------------------- 178 -- SystemInitHook() 179 ---------------------------------------------------------------------------- */ 180 SystemInitHook(void)181__attribute__ ((weak)) void SystemInitHook (void) { 182 /* Void implementation of the weak function. */ 183 } 184
