1 /*
2  * Copyright  2017-2020 NXP
3  * All rights reserved.
4  *
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #ifndef _FSL_SWM_CONNECTIONS_
10 #define _FSL_SWM_CONNECTIONS_
11 
12 #include "fsl_common.h"
13 
14 /*******************************************************************************
15  * Definitions
16  ******************************************************************************/
17 /* Component ID definition, used by tools. */
18 #ifndef FSL_COMPONENT_ID
19 #define FSL_COMPONENT_ID "platform.drivers.swm_connections"
20 #endif
21 
22 /*!
23  * @addtogroup swm
24  * @{
25  */
26 
27 /*!
28  * @name swm connections
29  * @{
30  */
31 
32 /*! @brief SWM pinassignfixed_port_pin number */
33 typedef enum _swm_pinassignfixed_port_pin_type_t
34 {
35     kSWM_PLU_INPUT0_PortPin_P0_0  = 0x00U, /*!< port_pin number P0_0. */
36     kSWM_PLU_INPUT0_PortPin_P0_8  = 0x01U, /*!< port_pin number P0_8. */
37     kSWM_PLU_INPUT0_PortPin_P0_17 = 0x02U, /*!< port_pin number P0_17. */
38 
39     kSWM_PLU_INPUT1_PortPin_P0_1  = 0x00U, /*!< port_pin number P0_1. */
40     kSWM_PLU_INPUT1_PortPin_P0_9  = 0x01U, /*!< port_pin number P0_9. */
41     kSWM_PLU_INPUT1_PortPin_P0_18 = 0x02U, /*!< port_pin number P0_18. */
42 
43     kSWM_PLU_INPUT2_PortPin_P0_2  = 0x00U, /*!< port_pin number P0_2. */
44     kSWM_PLU_INPUT2_PortPin_P0_10 = 0x01U, /*!< port_pin number P0_10. */
45     kSWM_PLU_INPUT2_PortPin_P0_19 = 0x02U, /*!< port_pin number P0_19. */
46 
47     kSWM_PLU_INPUT3_PortPin_P0_3  = 0x00U, /*!< port_pin number P0_3. */
48     kSWM_PLU_INPUT3_PortPin_P0_11 = 0x01U, /*!< port_pin number P0_11. */
49     kSWM_PLU_INPUT3_PortPin_P0_20 = 0x02U, /*!< port_pin number P0_20. */
50 
51     kSWM_PLU_INPUT4_PortPin_P0_4  = 0x00U, /*!< port_pin number P0_4. */
52     kSWM_PLU_INPUT4_PortPin_P0_12 = 0x01U, /*!< port_pin number P0_12. */
53     kSWM_PLU_INPUT4_PortPin_P0_21 = 0x02U, /*!< port_pin number P0_21. */
54 
55     kSWM_PLU_INPUT5_PortPin_P0_5  = 0x00U, /*!< port_pin number P0_5. */
56     kSWM_PLU_INPUT5_PortPin_P0_13 = 0x01U, /*!< port_pin number P0_13. */
57     kSWM_PLU_INPUT5_PortPin_P0_22 = 0x02U, /*!< port_pin number P0_22. */
58 
59     kSWM_PLU_OUT0_PortPin_P0_7  = 0x00U, /*!< port_pin number P0_7. */
60     kSWM_PLU_OUT0_PortPin_P0_14 = 0x01U, /*!< port_pin number P0_14. */
61     kSWM_PLU_OUT0_PortPin_P0_23 = 0x02U, /*!< port_pin number P0_23. */
62 
63     kSWM_PLU_OUT1_PortPin_P0_8  = 0x00U, /*!< port_pin number P0_8. */
64     kSWM_PLU_OUT1_PortPin_P0_15 = 0x01U, /*!< port_pin number P0_15. */
65     kSWM_PLU_OUT1_PortPin_P0_24 = 0x02U, /*!< port_pin number P0_24. */
66 
67     kSWM_PLU_OUT2_PortPin_P0_9  = 0x00U, /*!< port_pin number P0_9. */
68     kSWM_PLU_OUT2_PortPin_P0_16 = 0x01U, /*!< port_pin number P0_16. */
69     kSWM_PLU_OUT2_PortPin_P0_25 = 0x02U, /*!< port_pin number P0_25. */
70 
71     kSWM_PLU_OUT3_PortPin_P0_10 = 0x00U, /*!< port_pin number P0_10. */
72     kSWM_PLU_OUT3_PortPin_P0_17 = 0x01U, /*!< port_pin number P0_17. */
73     kSWM_PLU_OUT3_PortPin_P0_26 = 0x02U, /*!< port_pin number P0_26. */
74 
75     kSWM_PLU_OUT4_PortPin_P0_11 = 0x00U, /*!< port_pin number P0_11. */
76     kSWM_PLU_OUT4_PortPin_P0_18 = 0x01U, /*!< port_pin number P0_18. */
77     kSWM_PLU_OUT4_PortPin_P0_27 = 0x02U, /*!< port_pin number P0_27. */
78 
79     kSWM_PLU_OUT5_PortPin_P0_12 = 0x00U, /*!< port_pin number P0_12. */
80     kSWM_PLU_OUT5_PortPin_P0_19 = 0x01U, /*!< port_pin number P0_19. */
81     kSWM_PLU_OUT5_PortPin_P0_28 = 0x02U, /*!< port_pin number P0_28. */
82 
83     kSWM_PLU_OUT6_PortPin_P0_13 = 0x00U, /*!< port_pin number P0_13. */
84     kSWM_PLU_OUT6_PortPin_P0_20 = 0x01U, /*!< port_pin number P0_20. */
85     kSWM_PLU_OUT6_PortPin_P0_29 = 0x02U, /*!< port_pin number P0_29. */
86 
87     kSWM_PLU_OUT7_PortPin_P0_14 = 0x00U, /*!< port_pin number P0_14. */
88     kSWM_PLU_OUT7_PortPin_P0_21 = 0x01U, /*!< port_pin number P0_21. */
89     kSWM_PLU_OUT7_PortPin_P0_30 = 0x02U, /*!< port_pin number P0_30. */
90 } swm_fixed_port_pin_type_t;
91 
92 /*! @brief SWM port_pin number */
93 typedef enum _swm_port_pin_type_t
94 {
95     kSWM_PortPin_P0_0  = 0U,  /*!< port_pin number P0_0. */
96     kSWM_PortPin_P0_1  = 1U,  /*!< port_pin number P0_1. */
97     kSWM_PortPin_P0_2  = 2U,  /*!< port_pin number P0_2. */
98     kSWM_PortPin_P0_3  = 3U,  /*!< port_pin number P0_3. */
99     kSWM_PortPin_P0_4  = 4U,  /*!< port_pin number P0_4. */
100     kSWM_PortPin_P0_5  = 5U,  /*!< port_pin number P0_5. */
101     kSWM_PortPin_P0_6  = 6U,  /*!< port_pin number P0_6. */
102     kSWM_PortPin_P0_7  = 7U,  /*!< port_pin number P0_7. */
103     kSWM_PortPin_P0_8  = 8U,  /*!< port_pin number P0_8. */
104     kSWM_PortPin_P0_9  = 9U,  /*!< port_pin number P0_9. */
105     kSWM_PortPin_P0_10 = 10U, /*!< port_pin number P0_10. */
106     kSWM_PortPin_P0_11 = 11U, /*!< port_pin number P0_11. */
107     kSWM_PortPin_P0_12 = 12U, /*!< port_pin number P0_12. */
108     kSWM_PortPin_P0_13 = 13U, /*!< port_pin number P0_13. */
109     kSWM_PortPin_P0_14 = 14U, /*!< port_pin number P0_14. */
110     kSWM_PortPin_P0_15 = 15U, /*!< port_pin number P0_15. */
111     kSWM_PortPin_P0_16 = 16U, /*!< port_pin number P0_16. */
112     kSWM_PortPin_P0_17 = 17U, /*!< port_pin number P0_17. */
113     kSWM_PortPin_P0_18 = 18U, /*!< port_pin number P0_18. */
114     kSWM_PortPin_P0_19 = 19U, /*!< port_pin number P0_19. */
115     kSWM_PortPin_P0_20 = 20U, /*!< port_pin number P0_20. */
116     kSWM_PortPin_P0_21 = 21U, /*!< port_pin number P0_21. */
117     kSWM_PortPin_P0_22 = 22U, /*!< port_pin number P0_22. */
118     kSWM_PortPin_P0_23 = 23U, /*!< port_pin number P0_23. */
119     kSWM_PortPin_P0_24 = 24U, /*!< port_pin number P0_24. */
120     kSWM_PortPin_P0_25 = 25U, /*!< port_pin number P0_25. */
121     kSWM_PortPin_P0_26 = 26U, /*!< port_pin number P0_26. */
122     kSWM_PortPin_P0_27 = 27U, /*!< port_pin number P0_27. */
123     kSWM_PortPin_P0_28 = 28U, /*!< port_pin number P0_28. */
124     kSWM_PortPin_P0_29 = 29U, /*!< port_pin number P0_29. */
125     kSWM_PortPin_P0_30 = 30U, /*!< port_pin number P0_30. */
126     kSWM_PortPin_P0_31 = 31U, /*!< port_pin number P0_31. */
127     kSWM_PortPin_Reset = 0xffU /*!< port_pin reset number. */
128 } swm_port_pin_type_t;
129 
130 /*! @brief SWM pinassignfixed movable selection */
131 typedef enum _swm_pinassignfixed_select_movable_t
132 {
133     kSWM_PLU_INPUT0 = 0U, /*!< Movable function as PLU_INPUT0. */
134     kSWM_PLU_INPUT1 = 1U, /*!< Movable function as PLU_INPUT1. */
135     kSWM_PLU_INPUT2 = 2U, /*!< Movable function as PLU_INPUT2. */
136     kSWM_PLU_INPUT3 = 3U, /*!< Movable function as PLU_INPUT3. */
137     kSWM_PLU_INPUT4 = 4U, /*!< Movable function as PLU_INPUT4. */
138     kSWM_PLU_INPUT5 = 5U, /*!< Movable function as PLU_INPUT5. */
139 
140     kSWM_PLU_OUT0 = 6U,  /*!< Movable function as PLU_OUT0. */
141     kSWM_PLU_OUT1 = 7U,  /*!< Movable function as PLU_OUT1. */
142     kSWM_PLU_OUT2 = 8U,  /*!< Movable function as PLU_OUT2. */
143     kSWM_PLU_OUT3 = 9U,  /*!< Movable function as PLU_OUT3. */
144     kSWM_PLU_OUT4 = 10U, /*!< Movable function as PLU_OUT4. */
145     kSWM_PLU_OUT5 = 11U, /*!< Movable function as PLU_OUT5. */
146     kSWM_PLU_OUT6 = 12U, /*!< Movable function as PLU_OUT6. */
147     kSWM_PLU_OUT7 = 13U, /*!< Movable function as PLU_OUT7. */
148 
149     kSWM_PINASSINGNFIXED_MOVABLE_NUM_FUNCS = 14U, /*!< Movable function number. */
150 } swm_select_fixed_movable_t;
151 
152 /*! @brief SWM movable selection */
153 typedef enum _swm_select_movable_t
154 {
155     kSWM_USART0_TXD  = 0U, /*!< Movable function as USART0_TXD. */
156     kSWM_USART0_RXD  = 1U, /*!< Movable function as USART0_RXD. */
157     kSWM_USART0_RTS  = 2U, /*!< Movable function as USART0_RTS. */
158     kSWM_USART0_CTS  = 3U, /*!< Movable function as USART0_CTS. */
159     kSWM_USART0_SCLK = 4U, /*!< Movable function as USART0_SCLK. */
160 
161     kSWM_USART1_TXD  = 5U, /*!< Movable function as USART1_TXD. */
162     kSWM_USART1_RXD  = 6U, /*!< Movable function as USART1_RXD. */
163     kSWM_USART1_SCLK = 7U, /*!< Movable function as USART1_SCLK. */
164 
165     kSWM_SPI0_SCK   = 8U,  /*!< Movable function as SPI0_SCK. */
166     kSWM_SPI0_MOSI  = 9U,  /*!< Movable function as SPI0_MOSI. */
167     kSWM_SPI0_MISO  = 10U, /*!< Movable function as SPI0_MISO. */
168     kSWM_SPI0_SSEL0 = 11U, /*!< Movable function as SPI0_SSEL0. */
169     kSWM_SPI0_SSEL1 = 12U, /*!< Movable function as SPI0_SSEL1. */
170 
171     kSWM_T0_CAP_CHN0 = 13U, /*!< Movable function as Timer Capture Channel 0. */
172     kSWM_T0_CAP_CHN1 = 14U, /*!< Movable function as Timer Capture Channel 1. */
173     kSWM_T0_CAP_CHN2 = 15U, /*!< Movable function as Timer Capture Channel 2. */
174 
175     kSWM_T0_MAT_CHN0 = 16U, /*!< Movable function as Timer Match Channel 0. */
176     kSWM_T0_MAT_CHN1 = 17U, /*!< Movable function as Timer Match Channel 1. */
177     kSWM_T0_MAT_CHN2 = 18U, /*!< Movable function as Timer Match Channel 2. */
178     kSWM_T0_MAT_CHN3 = 19U, /*!< Movable function as Timer Match Channel 3. */
179 
180     kSWM_I2C0_SDA = 20U, /*!< Movable function as I2C0_SDA. */
181     kSWM_I2C0_SCL = 21U, /*!< Movable function as I2C0_SCL. */
182 
183     kSWM_ACMP_OUT      = 22U, /*!< Movable function as ACMP_OUT. */
184     kSWM_CLKOUT        = 23U, /*!< Movable function as CLKOUT. */
185     kSWM_GPIO_INT_BMAT = 24U, /*!< Movable function as GPIO_INT_BMAT. */
186 
187     kSWM_LVLSHFT_IN0  = 25U, /*!< Movable function as LVLSHFT_IN0. */
188     kSWM_LVLSHFT_IN1  = 26U, /*!< Movable function as LVLSHFT_IN1. */
189     kSWM_LVLSHFT_OUT0 = 27U, /*!< Movable function as LVLSHFT_OUT0. */
190     kSWM_LVLSHFT_OUT1 = 28U, /*!< Movable function as LVLSHFT_OUT1. */
191     kSWM_I2C1_SDA     = 29U, /*!< Movable function as I2C1_SDA. */
192     kSWM_I2C1_SCL     = 30U, /*!< Movable function as I2C1_SCL. */
193     kSWM_PLU_CLKIN_IN = 31U, /*!< Movable function as PLU_CLKIN_IN. */
194     kSWM_CAPT_X0      = 32U, /*!< Movable function as CAPT_X0. */
195     kSWM_CAPT_X1      = 33U, /*!< Movable function as CAPT_X1. */
196     kSWM_CAPT_X2      = 34U, /*!< Movable function as CAPT_X2. */
197     kSWM_CAPT_X3      = 35U, /*!< Movable function as CAPT_X3. */
198     kSWM_CAPT_X4      = 36U, /*!< Movable function as CAPT_X4. */
199     kSWM_CAPT_YL      = 37U, /*!< Movable function as CAPT_YL. */
200     kSWM_CAPT_YH      = 38U, /*!< Movable function as CAPT_YH. */
201 
202     kSWM_MOVABLE_NUM_FUNCS = 39U, /*!< Movable function number. */
203 } swm_select_movable_t;
204 
205 /*! @brief SWM fixed pin selection */
206 typedef enum _swm_select_fixed_pin_t
207 {
208     kSWM_ACMP_INPUT1 = SWM_PINENABLE0_ACMP_I1_MASK, /*!< Fixed-pin function as ACMP_INPUT1. */
209     kSWM_ACMP_INPUT2 = SWM_PINENABLE0_ACMP_I2_MASK, /*!< Fixed-pin function as ACMP_INPUT2. */
210     kSWM_ACMP_INPUT3 = SWM_PINENABLE0_ACMP_I3_MASK, /*!< Fixed-pin function as ACMP_INPUT3. */
211     kSWM_ACMP_INPUT4 = SWM_PINENABLE0_ACMP_I4_MASK, /*!< Fixed-pin function as ACMP_INPUT4. */
212     kSWM_SWCLK       = SWM_PINENABLE0_SWCLK_MASK,   /*!< Fixed-pin function as SWCLK. */
213     kSWM_SWDIO       = SWM_PINENABLE0_SWDIO_MASK,   /*!< Fixed-pin function as SWDIO. */
214     kSWM_RESETN      = SWM_PINENABLE0_RESETN_MASK,  /*!< Fixed-pin function as RESETN. */
215     kSWM_CLKIN       = SWM_PINENABLE0_CLKIN_MASK,   /*!< Fixed-pin function as CLKIN. */
216     kSWM_WKCLKIN     = SWM_PINENABLE0_WKCLKIN_MASK, /*!< Fixed-pin function as WKCLKIN. */
217     kSWM_VDDCMP      = SWM_PINENABLE0_VDDCMP_MASK,  /*!< Fixed-pin function as VDDCMP. */
218     kSWM_ADC_CHN0    = SWM_PINENABLE0_ADC_0_MASK,   /*!< Fixed-pin function as ADC_CHN0. */
219     kSWM_ADC_CHN1    = SWM_PINENABLE0_ADC_1_MASK,   /*!< Fixed-pin function as ADC_CHN1. */
220     kSWM_ADC_CHN2    = SWM_PINENABLE0_ADC_2_MASK,   /*!< Fixed-pin function as ADC_CHN2. */
221     kSWM_ADC_CHN3    = SWM_PINENABLE0_ADC_3_MASK,   /*!< Fixed-pin function as ADC_CHN3. */
222     kSWM_ADC_CHN4    = SWM_PINENABLE0_ADC_4_MASK,   /*!< Fixed-pin function as ADC_CHN4. */
223     kSWM_ADC_CHN5    = SWM_PINENABLE0_ADC_5_MASK,   /*!< Fixed-pin function as ADC_CHN5. */
224     kSWM_ADC_CHN6    = SWM_PINENABLE0_ADC_6_MASK,   /*!< Fixed-pin function as ADC_CHN6. */
225     kSWM_ADC_CHN7    = SWM_PINENABLE0_ADC_7_MASK,   /*!< Fixed-pin function as ADC_CHN7. */
226     kSWM_ADC_CHN8    = SWM_PINENABLE0_ADC_8_MASK,   /*!< Fixed-pin function as ADC_CHN8. */
227     kSWM_ADC_CHN9    = SWM_PINENABLE0_ADC_9_MASK,   /*!< Fixed-pin function as ADC_CHN9. */
228     kSWM_ADC_CHN10   = SWM_PINENABLE0_ADC_10_MASK,  /*!< Fixed-pin function as ADC_CHN10. */
229     kSWM_ADC_CHN11   = SWM_PINENABLE0_ADC_11_MASK,  /*!< Fixed-pin function as ADC_CHN11. */
230     kSWM_ACMP_INPUT5 = SWM_PINENABLE0_ACMP_I5_MASK, /*!< Fixed-pin function as ACMP_INPUT5. */
231     kSWM_DAC_OUT0    = SWM_PINENABLE0_DACOUT0_MASK, /*!< Fixed-pin function as DACOUT0. */
232 
233     kSWM_FIXEDPIN_NUM_FUNCS = (int)0x80000001U, /*!< Fixed-pin function number. */
234 } swm_select_fixed_pin_t;
235 
236 /*@}*/
237 
238 /*@}*/
239 
240 #endif /* _FSL_SWM_CONNECTIONS_ */
241