1 /* 2 * Copyright (c) 2016, Freescale Semiconductor, Inc. 3 * Copyright 2016, NXP 4 * All rights reserved. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 9 #include "fsl_common.h" 10 #include "fsl_reset.h" 11 12 /******************************************************************************* 13 * Definitions 14 ******************************************************************************/ 15 /* Component ID definition, used by tools. */ 16 #ifndef FSL_COMPONENT_ID 17 #define FSL_COMPONENT_ID "platform.drivers.reset" 18 #endif 19 20 /******************************************************************************* 21 * Variables 22 ******************************************************************************/ 23 24 /******************************************************************************* 25 * Prototypes 26 ******************************************************************************/ 27 28 /******************************************************************************* 29 * Code 30 ******************************************************************************/ 31 32 #if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) 33 34 /*! 35 * brief Assert reset to peripheral. 36 * 37 * Asserts reset signal to specified peripheral module. 38 * 39 * param peripheral Assert reset to this peripheral. The enum argument contains encoding of reset register 40 * and reset bit position in the reset register. 41 */ RESET_SetPeripheralReset(reset_ip_name_t peripheral)42void RESET_SetPeripheralReset(reset_ip_name_t peripheral) 43 { 44 const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16; 45 const uint32_t bitPos = ((uint32_t)peripheral & 0x0000FFFFu); 46 const uint32_t bitMask = 1UL << bitPos; 47 uint32_t volatile *pointPresetCtrl = &SYSCON->PRESETCTRL0; 48 49 assert(bitPos < 32u); 50 51 /* reset register is in SYSCON */ 52 /* set bit */ 53 SYSCON->PRESETCTRLSET[regIndex] = bitMask; 54 /* wait until it reads 0b1 */ 55 while (0u == (pointPresetCtrl[regIndex] & bitMask)) 56 { 57 } 58 } 59 60 /*! 61 * brief Clear reset to peripheral. 62 * 63 * Clears reset signal to specified peripheral module, allows it to operate. 64 * 65 * param peripheral Clear reset to this peripheral. The enum argument contains encoding of reset register 66 * and reset bit position in the reset register. 67 */ RESET_ClearPeripheralReset(reset_ip_name_t peripheral)68void RESET_ClearPeripheralReset(reset_ip_name_t peripheral) 69 { 70 const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16; 71 const uint32_t bitPos = ((uint32_t)peripheral & 0x0000FFFFu); 72 const uint32_t bitMask = 1UL << bitPos; 73 uint32_t volatile *pointPresetCtrl = &SYSCON->PRESETCTRL0; 74 75 assert(bitPos < 32u); 76 77 /* reset register is in SYSCON */ 78 79 /* clear bit */ 80 SYSCON->PRESETCTRLCLR[regIndex] = bitMask; 81 /* wait until it reads 0b0 */ 82 while (bitMask == (pointPresetCtrl[regIndex] & bitMask)) 83 { 84 } 85 } 86 87 /*! 88 * brief Reset peripheral module. 89 * 90 * Reset peripheral module. 91 * 92 * param peripheral Peripheral to reset. The enum argument contains encoding of reset register 93 * and reset bit position in the reset register. 94 */ RESET_PeripheralReset(reset_ip_name_t peripheral)95void RESET_PeripheralReset(reset_ip_name_t peripheral) 96 { 97 RESET_SetPeripheralReset(peripheral); 98 RESET_ClearPeripheralReset(peripheral); 99 } 100 101 #endif /* FSL_FEATURE_SOC_SYSCON_COUNT || FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT */ 102