1 /*
2 ** ###################################################################
3 **     Processors:          LPC5536JBD100
4 **                          LPC5536JBD64
5 **                          LPC5536JHI48
6 **
7 **     Compilers:           GNU C Compiler
8 **                          IAR ANSI C/C++ Compiler for ARM
9 **                          Keil ARM C/C++ Compiler
10 **                          MCUXpresso Compiler
11 **
12 **     Reference manual:    LPC55S3x Reference Manual Rev. DraftG, 07/2021
13 **     Version:             rev. 1.1, 2021-08-04
14 **     Build:               b210806
15 **
16 **     Abstract:
17 **         Provides a system configuration function and a global variable that
18 **         contains the system frequency. It configures the device and initializes
19 **         the oscillator (PLL) that is part of the microcontroller device.
20 **
21 **     Copyright 2016 Freescale Semiconductor, Inc.
22 **     Copyright 2016-2021 NXP
23 **     All rights reserved.
24 **
25 **     SPDX-License-Identifier: BSD-3-Clause
26 **
27 **     http:                 www.nxp.com
28 **     mail:                 support@nxp.com
29 **
30 **     Revisions:
31 **     - rev. 1.0 (2021-04-12)
32 **         Initial version based on RM DraftF
33 **     - rev. 1.1 (2021-08-04)
34 **         Initial version based on RM DraftG
35 **
36 ** ###################################################################
37 */
38 
39 /*!
40  * @file LPC5536
41  * @version 1.1
42  * @date 2021-08-04
43  * @brief Device specific configuration file for LPC5536 (implementation file)
44  *
45  * Provides a system configuration function and a global variable that contains
46  * the system frequency. It configures the device and initializes the oscillator
47  * (PLL) that is part of the microcontroller device.
48  */
49 
50 #include <stdint.h>
51 #include "fsl_device_registers.h"
52 
53 
54 
55 /* ----------------------------------------------------------------------------
56    -- Core clock
57    ---------------------------------------------------------------------------- */
58 
59 uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
60 
61 /* ----------------------------------------------------------------------------
62    -- SystemInit()
63    ---------------------------------------------------------------------------- */
64 
SystemInit(void)65 __attribute__ ((weak)) void SystemInit (void) {
66 #if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
67   SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2));    /* set CP10, CP11 Full Access in Secure mode */
68   #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
69   SCB_NS->CPACR |= ((3UL << 10*2) | (3UL << 11*2));    /* set CP10, CP11 Full Access in Non-secure mode */
70   #endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
71 #endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
72 
73   SCB->CPACR |= ((3UL << 0*2) | (3UL << 1*2));    /* set CP0, CP1 Full Access in Secure mode (enable PowerQuad) */
74 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
75   SCB_NS->CPACR |= ((3UL << 0*2) | (3UL << 1*2));    /* set CP0, CP1 Full Access in Normal mode (enable PowerQuad) */
76 #endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
77 
78   SCB->NSACR |= ((3UL << 0) | (3UL << 10));   /* enable CP0, CP1, CP10, CP11 Non-secure Access */
79 
80 #if defined(__MCUXPRESSO)
81     extern void(*const g_pfnVectors[]) (void);
82     SCB->VTOR = (uint32_t) &g_pfnVectors;
83 #else
84     extern void *__Vectors;
85     SCB->VTOR = (uint32_t) &__Vectors;
86 #endif
87     SYSCON->TRACECLKDIV = 0;
88 /* Optionally enable RAM banks that may be off by default at reset */
89 #if !defined(DONT_ENABLE_DISABLED_RAMBANKS)
90     SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL0_SRAM_CTRL1_MASK | SYSCON_AHBCLKCTRL0_SRAM_CTRL2_MASK
91                           | SYSCON_AHBCLKCTRL0_SRAM_CTRL3_MASK | SYSCON_AHBCLKCTRL0_SRAM_CTRL4_MASK;
92 #endif
93 /* enable the flash cache LPCAC */
94   SYSCON->LPCAC_CTRL &= ~SYSCON_LPCAC_CTRL_DIS_LPCAC_MASK;
95 
96   SystemInitHook();
97 }
98 
99 /* ----------------------------------------------------------------------------
100    -- SystemCoreClockUpdate()
101    ---------------------------------------------------------------------------- */
102 
SystemCoreClockUpdate(void)103 void SystemCoreClockUpdate (void) {
104 
105 }
106 
107 /* ----------------------------------------------------------------------------
108    -- SystemInitHook()
109    ---------------------------------------------------------------------------- */
110 
SystemInitHook(void)111 __attribute__ ((weak)) void SystemInitHook (void) {
112   /* Void implementation of the weak function. */
113 }
114