1 //*****************************************************************************
2 // LPC54016 startup code for use with MCUXpresso IDE
3 //
4 // Version : 160420
5 //*****************************************************************************
6 //
7 // Copyright 2016-2020 NXP
8 // All rights reserved.
9 //
10 // SPDX-License-Identifier: BSD-3-Clause
11 //*****************************************************************************
12
13 #if defined (DEBUG)
14 #pragma GCC push_options
15 #pragma GCC optimize ("Og")
16 #endif // (DEBUG)
17
18 #if defined (__cplusplus)
19 #ifdef __REDLIB__
20 #error Redlib does not support C++
21 #else
22 //*****************************************************************************
23 //
24 // The entry point for the C++ library startup
25 //
26 //*****************************************************************************
27 extern "C" {
28 extern void __libc_init_array(void);
29 }
30 #endif
31 #endif
32
33 #define WEAK __attribute__ ((weak))
34 #define WEAK_AV __attribute__ ((weak, section(".after_vectors")))
35 #define ALIAS(f) __attribute__ ((weak, alias (#f)))
36
37 //*****************************************************************************
38 #if defined (__cplusplus)
39 extern "C" {
40 #endif
41
42 //*****************************************************************************
43 // Variable to store CRP value in. Will be placed automatically
44 // by the linker when "Enable Code Read Protect" selected.
45 // See crp.h header for more information
46 //*****************************************************************************
47 #include <NXP/crp.h>
48 __CRP const unsigned int CRP_WORD = CRP_NO_CRP ;
49
50 //*****************************************************************************
51 // Declaration of external SystemInit function
52 //*****************************************************************************
53 #if defined (__USE_CMSIS)
54 extern void SystemInit(void);
55 #endif // (__USE_CMSIS)
56
57 //*****************************************************************************
58 // Forward declaration of the core exception handlers.
59 // When the application defines a handler (with the same name), this will
60 // automatically take precedence over these weak definitions.
61 // If your application is a C++ one, then any interrupt handlers defined
62 // in C++ files within in your main application will need to have C linkage
63 // rather than C++ linkage. To do this, make sure that you are using extern "C"
64 // { .... } around the interrupt handler within your main application code.
65 //*****************************************************************************
66 void ResetISR(void);
67 WEAK void NMI_Handler(void);
68 WEAK void HardFault_Handler(void);
69 WEAK void MemManage_Handler(void);
70 WEAK void BusFault_Handler(void);
71 WEAK void UsageFault_Handler(void);
72 WEAK void SVC_Handler(void);
73 WEAK void DebugMon_Handler(void);
74 WEAK void PendSV_Handler(void);
75 WEAK void SysTick_Handler(void);
76 WEAK void IntDefaultHandler(void);
77
78 //*****************************************************************************
79 // Forward declaration of the application IRQ handlers. When the application
80 // defines a handler (with the same name), this will automatically take
81 // precedence over weak definitions below
82 //*****************************************************************************
83 WEAK void WDT_BOD_IRQHandler(void);
84 WEAK void DMA0_IRQHandler(void);
85 WEAK void GINT0_IRQHandler(void);
86 WEAK void GINT1_IRQHandler(void);
87 WEAK void PIN_INT0_IRQHandler(void);
88 WEAK void PIN_INT1_IRQHandler(void);
89 WEAK void PIN_INT2_IRQHandler(void);
90 WEAK void PIN_INT3_IRQHandler(void);
91 WEAK void UTICK0_IRQHandler(void);
92 WEAK void MRT0_IRQHandler(void);
93 WEAK void CTIMER0_IRQHandler(void);
94 WEAK void CTIMER1_IRQHandler(void);
95 WEAK void SCT0_IRQHandler(void);
96 WEAK void CTIMER3_IRQHandler(void);
97 WEAK void FLEXCOMM0_IRQHandler(void);
98 WEAK void FLEXCOMM1_IRQHandler(void);
99 WEAK void FLEXCOMM2_IRQHandler(void);
100 WEAK void FLEXCOMM3_IRQHandler(void);
101 WEAK void FLEXCOMM4_IRQHandler(void);
102 WEAK void FLEXCOMM5_IRQHandler(void);
103 WEAK void FLEXCOMM6_IRQHandler(void);
104 WEAK void FLEXCOMM7_IRQHandler(void);
105 WEAK void ADC0_SEQA_IRQHandler(void);
106 WEAK void ADC0_SEQB_IRQHandler(void);
107 WEAK void ADC0_THCMP_IRQHandler(void);
108 WEAK void DMIC0_IRQHandler(void);
109 WEAK void HWVAD0_IRQHandler(void);
110 WEAK void USB0_NEEDCLK_IRQHandler(void);
111 WEAK void USB0_IRQHandler(void);
112 WEAK void RTC_IRQHandler(void);
113 WEAK void FLEXCOMM10_IRQHandler(void);
114 WEAK void Reserved47_IRQHandler(void);
115 WEAK void PIN_INT4_IRQHandler(void);
116 WEAK void PIN_INT5_IRQHandler(void);
117 WEAK void PIN_INT6_IRQHandler(void);
118 WEAK void PIN_INT7_IRQHandler(void);
119 WEAK void CTIMER2_IRQHandler(void);
120 WEAK void CTIMER4_IRQHandler(void);
121 WEAK void RIT_IRQHandler(void);
122 WEAK void SPIFI0_IRQHandler(void);
123 WEAK void FLEXCOMM8_IRQHandler(void);
124 WEAK void FLEXCOMM9_IRQHandler(void);
125 WEAK void SDIO_IRQHandler(void);
126 WEAK void CAN0_IRQ0_IRQHandler(void);
127 WEAK void CAN0_IRQ1_IRQHandler(void);
128 WEAK void CAN1_IRQ0_IRQHandler(void);
129 WEAK void CAN1_IRQ1_IRQHandler(void);
130 WEAK void USB1_IRQHandler(void);
131 WEAK void USB1_NEEDCLK_IRQHandler(void);
132 WEAK void ETHERNET_IRQHandler(void);
133 WEAK void ETHERNET_PMT_IRQHandler(void);
134 WEAK void ETHERNET_MACLP_IRQHandler(void);
135 WEAK void Reserved68_IRQHandler(void);
136 WEAK void LCD_IRQHandler(void);
137 WEAK void SHA_IRQHandler(void);
138 WEAK void SMARTCARD0_IRQHandler(void);
139 WEAK void SMARTCARD1_IRQHandler(void);
140
141 //*****************************************************************************
142 // Forward declaration of the driver IRQ handlers. These are aliased
143 // to the IntDefaultHandler, which is a 'forever' loop. When the driver
144 // defines a handler (with the same name), this will automatically take
145 // precedence over these weak definitions
146 //*****************************************************************************
147 void WDT_BOD_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
148 void DMA0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
149 void GINT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
150 void GINT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
151 void PIN_INT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
152 void PIN_INT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
153 void PIN_INT2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
154 void PIN_INT3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
155 void UTICK0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
156 void MRT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
157 void CTIMER0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
158 void CTIMER1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
159 void SCT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
160 void CTIMER3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
161 void FLEXCOMM0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
162 void FLEXCOMM1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
163 void FLEXCOMM2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
164 void FLEXCOMM3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
165 void FLEXCOMM4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
166 void FLEXCOMM5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
167 void FLEXCOMM6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
168 void FLEXCOMM7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
169 void ADC0_SEQA_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
170 void ADC0_SEQB_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
171 void ADC0_THCMP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
172 void DMIC0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
173 void HWVAD0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
174 void USB0_NEEDCLK_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
175 void USB0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
176 void RTC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
177 void FLEXCOMM10_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
178 void Reserved47_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
179 void PIN_INT4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
180 void PIN_INT5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
181 void PIN_INT6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
182 void PIN_INT7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
183 void CTIMER2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
184 void CTIMER4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
185 void RIT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
186 void SPIFI0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
187 void FLEXCOMM8_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
188 void FLEXCOMM9_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
189 void SDIO_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
190 void CAN0_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
191 void CAN0_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
192 void CAN1_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
193 void CAN1_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
194 void USB1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
195 void USB1_NEEDCLK_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
196 void ETHERNET_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
197 void ETHERNET_PMT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
198 void ETHERNET_MACLP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
199 void Reserved68_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
200 void LCD_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
201 void SHA_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
202 void SMARTCARD0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
203 void SMARTCARD1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
204
205 //*****************************************************************************
206 // The entry point for the application.
207 // __main() is the entry point for Redlib based applications
208 // main() is the entry point for Newlib based applications
209 //*****************************************************************************
210 #if defined (__REDLIB__)
211 extern void __main(void);
212 #endif
213 extern int main(void);
214
215 //*****************************************************************************
216 // External declaration for the pointer to the stack top from the Linker Script
217 //*****************************************************************************
218 extern void _vStackTop(void);
219 extern void _image_size(void);
220 //*****************************************************************************
221 // External declaration for LPC MCU vector table checksum from Linker Script
222 //*****************************************************************************
223 WEAK extern void __valid_user_code_checksum();
224
225 //*****************************************************************************
226 // External declaration for image type and load address from Linker Script
227 //*****************************************************************************
228 WEAK extern void __imghdr_loadaddress();
229 WEAK extern void __imghdr_imagetype();
230
231 //*****************************************************************************
232 #if defined (__cplusplus)
233 } // extern "C"
234 #endif
235 #ifndef IMG_BAUDRATE
236 #define IMG_BAUDRATE 0
237 #endif
238 //*****************************************************************************
239 // The vector table.
240 // This relies on the linker script to place at correct location in memory.
241 //*****************************************************************************
242
243
244
245 extern void (* const g_pfnVectors[])(void);
246 extern void * __Vectors __attribute__ ((alias ("g_pfnVectors")));
247
248 __attribute__ ((used, section(".isr_vector")))
249 void (* const g_pfnVectors[])(void) = {
250 // Core Level - CM4
251 &_vStackTop, // The initial stack pointer
252 ResetISR, // The reset handler
253 NMI_Handler, // The NMI handler
254 HardFault_Handler, // The hard fault handler
255 MemManage_Handler, // The MPU fault handler
256 BusFault_Handler, // The bus fault handler
257 UsageFault_Handler, // The usage fault handler
258 __valid_user_code_checksum, // LPC MCU checksum
259 0, // ECRP
260 (void (*)(void))0xEDDC94BD, // Reserved
261 (void (*)(void))0x160, // Reserved
262 SVC_Handler, // SVCall handler
263 DebugMon_Handler, // Debug monitor handler
264 0, // Reserved
265 PendSV_Handler, // The PendSV handler
266 SysTick_Handler, // The SysTick handler
267
268 // Chip Level - LPC54016
269 WDT_BOD_IRQHandler, // 16: Windowed watchdog timer, Brownout detect
270 DMA0_IRQHandler, // 17: DMA controller
271 GINT0_IRQHandler, // 18: GPIO group 0
272 GINT1_IRQHandler, // 19: GPIO group 1
273 PIN_INT0_IRQHandler, // 20: Pin interrupt 0 or pattern match engine slice 0
274 PIN_INT1_IRQHandler, // 21: Pin interrupt 1or pattern match engine slice 1
275 PIN_INT2_IRQHandler, // 22: Pin interrupt 2 or pattern match engine slice 2
276 PIN_INT3_IRQHandler, // 23: Pin interrupt 3 or pattern match engine slice 3
277 UTICK0_IRQHandler, // 24: Micro-tick Timer
278 MRT0_IRQHandler, // 25: Multi-rate timer
279 CTIMER0_IRQHandler, // 26: Standard counter/timer CTIMER0
280 CTIMER1_IRQHandler, // 27: Standard counter/timer CTIMER1
281 SCT0_IRQHandler, // 28: SCTimer/PWM
282 CTIMER3_IRQHandler, // 29: Standard counter/timer CTIMER3
283 FLEXCOMM0_IRQHandler, // 30: Flexcomm Interface 0 (USART, SPI, I2C, FLEXCOMM)
284 FLEXCOMM1_IRQHandler, // 31: Flexcomm Interface 1 (USART, SPI, I2C, FLEXCOMM)
285 FLEXCOMM2_IRQHandler, // 32: Flexcomm Interface 2 (USART, SPI, I2C, FLEXCOMM)
286 FLEXCOMM3_IRQHandler, // 33: Flexcomm Interface 3 (USART, SPI, I2C, FLEXCOMM)
287 FLEXCOMM4_IRQHandler, // 34: Flexcomm Interface 4 (USART, SPI, I2C, FLEXCOMM)
288 FLEXCOMM5_IRQHandler, // 35: Flexcomm Interface 5 (USART, SPI, I2C,, FLEXCOMM)
289 FLEXCOMM6_IRQHandler, // 36: Flexcomm Interface 6 (USART, SPI, I2C, I2S,, FLEXCOMM)
290 FLEXCOMM7_IRQHandler, // 37: Flexcomm Interface 7 (USART, SPI, I2C, I2S,, FLEXCOMM)
291 ADC0_SEQA_IRQHandler, // 38: ADC0 sequence A completion.
292 ADC0_SEQB_IRQHandler, // 39: ADC0 sequence B completion.
293 ADC0_THCMP_IRQHandler, // 40: ADC0 threshold compare and error.
294 DMIC0_IRQHandler, // 41: Digital microphone and DMIC subsystem
295 HWVAD0_IRQHandler, // 42: Hardware Voice Activity Detector
296 USB0_NEEDCLK_IRQHandler, // 43: USB Activity Wake-up Interrupt
297 USB0_IRQHandler, // 44: USB device
298 RTC_IRQHandler, // 45: RTC alarm and wake-up interrupts
299 FLEXCOMM10_IRQHandler, // 46: Flexcomm Interface 10 (SPI, FLEXCOMM)
300 Reserved47_IRQHandler, // 47: Reserved interrupt
301 PIN_INT4_IRQHandler, // 48: Pin interrupt 4 or pattern match engine slice 4 int
302 PIN_INT5_IRQHandler, // 49: Pin interrupt 5 or pattern match engine slice 5 int
303 PIN_INT6_IRQHandler, // 50: Pin interrupt 6 or pattern match engine slice 6 int
304 PIN_INT7_IRQHandler, // 51: Pin interrupt 7 or pattern match engine slice 7 int
305 CTIMER2_IRQHandler, // 52: Standard counter/timer CTIMER2
306 CTIMER4_IRQHandler, // 53: Standard counter/timer CTIMER4
307 RIT_IRQHandler, // 54: Repetitive Interrupt Timer
308 SPIFI0_IRQHandler, // 55: SPI flash interface
309 FLEXCOMM8_IRQHandler, // 56: Flexcomm Interface 8 (USART, SPI, I2C, FLEXCOMM)
310 FLEXCOMM9_IRQHandler, // 57: Flexcomm Interface 9 (USART, SPI, I2C, FLEXCOMM)
311 SDIO_IRQHandler, // 58: SD/MMC
312 CAN0_IRQ0_IRQHandler, // 59: CAN0 interrupt0
313 CAN0_IRQ1_IRQHandler, // 60: CAN0 interrupt1
314 CAN1_IRQ0_IRQHandler, // 61: CAN1 interrupt0
315 CAN1_IRQ1_IRQHandler, // 62: CAN1 interrupt1
316 USB1_IRQHandler, // 63: USB1 interrupt
317 USB1_NEEDCLK_IRQHandler, // 64: USB1 activity
318 ETHERNET_IRQHandler, // 65: Ethernet
319 ETHERNET_PMT_IRQHandler, // 66: Ethernet power management interrupt
320 ETHERNET_MACLP_IRQHandler, // 67: Ethernet MAC interrupt
321 Reserved68_IRQHandler, // 68: Reserved interrupt
322 LCD_IRQHandler, // 69: LCD interrupt
323 SHA_IRQHandler, // 70: SHA interrupt
324 SMARTCARD0_IRQHandler, // 71: Smart card 0 interrupt
325 SMARTCARD1_IRQHandler, // 72: Smart card 1 interrupt
326
327 0, // Reserved
328 0, // Reserved
329 0, // Reserved
330 0, // Reserved
331 0, // Reserved
332 0, // Reserved
333 0, // Reserved
334 0, // Reserved
335 0, // Reserved
336 0, // Reserved
337 0, // Reserved
338 0, // Reserved
339 0, // Reserved
340 0, // Reserved
341 0, // Reserved
342 (void (*)(void))0xFEEDA5A5, // Header Marker
343
344 #if defined (ADD_CRC)
345 (__imghdr_imagetype - 1), // (0x04) Image Type
346 __imghdr_loadaddress, // (0x08) Load_address
347 #else
348 __imghdr_imagetype, // (0x04) Image Type
349 __imghdr_loadaddress, // (0x08) Load_address
350 #endif
351 (void (*)(void))(((unsigned)_image_size) - 4), // (0x0C) load_length, exclude 4 bytes CRC field.
352 0, // (0x10) CRC value (only applicable to NON Non-secure images).
353 0, // (0x14) Version (only applicable to DUAL_ENH image type.
354 0, // (0x18) EMC static memory configuration settings, required for EMC boot
355 (void (*)(void))IMG_BAUDRATE, // (0x1C) image baudrate
356 0, // (0x20) reserved
357 (void (*)(void))0xEDDC94BD, // (0x24) Image_marker
358 0, // (0x28) SBZ
359 0, // (0x2C) reserved
360 #ifdef W25Q128JVFM
361 /* SPIFI Descriptor - W25Q128JVFM */
362 (void (*)(void))0x00000000, // 0xFFFFFFFF to default 1-bit SPI mode ；DevStrAdr
363 (void (*)(void))0x001870EF, // mfgId + extCount
364 (void (*)(void))0x00000000, // extid 0-3
365 (void (*)(void))0x00000000, // extid 4-7
366 (void (*)(void))0x0001001D, // caps
367 (void (*)(void))0x00000100, // Blks + RESV1
368 (void (*)(void))0x00010000, // blkSize
369 (void (*)(void))0x00000000, // subBlks + subBlkSize
370 (void (*)(void))0x00000100, // pageSize + RESV2
371 (void (*)(void))0x00003F00, // maxReadSize
372 (void (*)(void))0x68506850, // maxClkRate,maxReadRate,maxHSReadRate,maxProgramRate
373 (void (*)(void))0x04030050, // maxHSProgramRate,initDeInitFxId,clearStatusFxId,getStatusFxId,
374 (void (*)(void))0x14110D09, // setStatusFxId,setOptionsFxId,getReadCmdFxId,getWriteCmdFxId
375 #endif
376
377 #ifdef MXL12835F
378 /* SPI Descriptor - MXL12835F */
379 (void (*)(void))0x00000000, // 0xFFFFFFFF to default 1-bit SPI mode ;DevStrAdr
380 (void (*)(void))0x001820C2, // mfgId + extCount
381 (void (*)(void))0x00000000, // extid 0-3
382 (void (*)(void))0x00000000, // extid 4-7
383 (void (*)(void))0x0001001D, // caps
384 (void (*)(void))0x00000100, // Blks + RESV1
385 (void (*)(void))0x00010000, // blkSize
386 (void (*)(void))0x00000000, // subBlks + subBlkSize
387 (void (*)(void))0x00000100, // pageSize + RESV2
388 (void (*)(void))0x00003F00, // maxReadSize
389 (void (*)(void))0x68506850, // maxClkRate,maxReadRate,maxHSReadRate,maxProgramRate
390 (void (*)(void))0x06030050, // maxHSProgramRate,initDeInitFxId,clearStatusFxId,getStatusFxId
391 (void (*)(void))0x14110F0B, // setStatusFxId,setOptionsFxId,getReadCmdFxId,getWriteCmdFxId
392 #endif
393
394
395 }; /* End of g_pfnVectors */
396
397 //*****************************************************************************
398 // Functions to carry out the initialization of RW and BSS data sections. These
399 // are written as separate functions rather than being inlined within the
400 // ResetISR() function in order to cope with MCUs with multiple banks of
401 // memory.
402 //*****************************************************************************
403 __attribute__ ((section(".after_vectors.init_data")))
data_init(unsigned int romstart,unsigned int start,unsigned int len)404 void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
405 unsigned int *pulDest = (unsigned int*) start;
406 unsigned int *pulSrc = (unsigned int*) romstart;
407 unsigned int loop;
408 for (loop = 0; loop < len; loop = loop + 4)
409 *pulDest++ = *pulSrc++;
410 }
411
412 __attribute__ ((section(".after_vectors.init_bss")))
bss_init(unsigned int start,unsigned int len)413 void bss_init(unsigned int start, unsigned int len) {
414 unsigned int *pulDest = (unsigned int*) start;
415 unsigned int loop;
416 for (loop = 0; loop < len; loop = loop + 4)
417 *pulDest++ = 0;
418 }
419
420 //*****************************************************************************
421 // The following symbols are constructs generated by the linker, indicating
422 // the location of various points in the "Global Section Table". This table is
423 // created by the linker via the Code Red managed linker script mechanism. It
424 // contains the load address, execution address and length of each RW data
425 // section and the execution and length of each BSS (zero initialized) section.
426 //*****************************************************************************
427 extern unsigned int __data_section_table;
428 extern unsigned int __data_section_table_end;
429 extern unsigned int __bss_section_table;
430 extern unsigned int __bss_section_table_end;
431
432 //*****************************************************************************
433 // Reset entry point for your code.
434 // Sets up a simple runtime environment and initializes the C/C++
435 // library.
436 //*****************************************************************************
437 __attribute__ ((naked, section(".after_vectors.reset")))
ResetISR(void)438 void ResetISR(void) {
439
440 // Disable interrupts
441 __asm volatile ("cpsid i");
442
443
444 // Enable SRAM clock used by Stack
445 __asm volatile ("LDR R0, =0x40000220\n\t"
446 "MOV R1, #56\n\t"
447 "STR R1, [R0]");
448
449 #if defined (__USE_CMSIS)
450 // If __USE_CMSIS defined, then call CMSIS SystemInit code
451 SystemInit();
452
453 #endif // (__USE_CMSIS)
454
455 //
456 // Copy the data sections from flash to SRAM.
457 //
458 unsigned int LoadAddr, ExeAddr, SectionLen;
459 unsigned int *SectionTableAddr;
460
461 // Load base address of Global Section Table
462 SectionTableAddr = &__data_section_table;
463
464 // Copy the data sections from flash to SRAM.
465 while (SectionTableAddr < &__data_section_table_end) {
466 LoadAddr = *SectionTableAddr++;
467 ExeAddr = *SectionTableAddr++;
468 SectionLen = *SectionTableAddr++;
469 data_init(LoadAddr, ExeAddr, SectionLen);
470 }
471
472 // At this point, SectionTableAddr = &__bss_section_table;
473 // Zero fill the bss segment
474 while (SectionTableAddr < &__bss_section_table_end) {
475 ExeAddr = *SectionTableAddr++;
476 SectionLen = *SectionTableAddr++;
477 bss_init(ExeAddr, SectionLen);
478 }
479
480 #if !defined (__USE_CMSIS)
481 // Assume that if __USE_CMSIS defined, then CMSIS SystemInit code
482 // will enable the FPU
483 #if defined (__VFP_FP__) && !defined (__SOFTFP__)
484 //
485 // Code to enable the Cortex-M4 FPU only included
486 // if appropriate build options have been selected.
487 // Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
488 //
489 // Read CPACR (located at address 0xE000ED88)
490 // Set bits 20-23 to enable CP10 and CP11 coprocessors
491 // Write back the modified value to the CPACR
492 asm volatile ("LDR.W R0, =0xE000ED88\n\t"
493 "LDR R1, [R0]\n\t"
494 "ORR R1, R1, #(0xF << 20)\n\t"
495 "STR R1, [R0]");
496 #endif // (__VFP_FP__) && !(__SOFTFP__)
497 #endif // (__USE_CMSIS)
498
499
500 #if !defined (__USE_CMSIS)
501 // Assume that if __USE_CMSIS defined, then CMSIS SystemInit code
502 // will setup the VTOR register
503
504 // Check to see if we are running the code from a non-zero
505 // address (eg RAM, external flash), in which case we need
506 // to modify the VTOR register to tell the CPU that the
507 // vector table is located at a non-0x0 address.
508 unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
509 if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
510 *pSCB_VTOR = (unsigned int)g_pfnVectors;
511 }
512 #endif // (__USE_CMSIS)
513 #if defined (__cplusplus)
514 //
515 // Call C++ library initialisation
516 //
517 __libc_init_array();
518 #endif
519
520 // Reenable interrupts
521 __asm volatile ("cpsie i");
522
523 #if defined (__REDLIB__)
524 // Call the Redlib library, which in turn calls main()
525 __main();
526 #else
527 main();
528 #endif
529
530 //
531 // main() shouldn't return, but if it does, we'll just enter an infinite loop
532 //
533 while (1) {
534 ;
535 }
536 }
537
538 //*****************************************************************************
539 // Default core exception handlers. Override the ones here by defining your own
540 // handler routines in your application code.
541 //*****************************************************************************
NMI_Handler(void)542 WEAK_AV void NMI_Handler(void)
543 { while(1) {}
544 }
545
HardFault_Handler(void)546 WEAK_AV void HardFault_Handler(void)
547 { while(1) {}
548 }
549
MemManage_Handler(void)550 WEAK_AV void MemManage_Handler(void)
551 { while(1) {}
552 }
553
BusFault_Handler(void)554 WEAK_AV void BusFault_Handler(void)
555 { while(1) {}
556 }
557
UsageFault_Handler(void)558 WEAK_AV void UsageFault_Handler(void)
559 { while(1) {}
560 }
561
SVC_Handler(void)562 WEAK_AV void SVC_Handler(void)
563 { while(1) {}
564 }
565
DebugMon_Handler(void)566 WEAK_AV void DebugMon_Handler(void)
567 { while(1) {}
568 }
569
PendSV_Handler(void)570 WEAK_AV void PendSV_Handler(void)
571 { while(1) {}
572 }
573
SysTick_Handler(void)574 WEAK_AV void SysTick_Handler(void)
575 { while(1) {}
576 }
577
578 //*****************************************************************************
579 // Processor ends up here if an unexpected interrupt occurs or a specific
580 // handler is not present in the application code.
581 //*****************************************************************************
IntDefaultHandler(void)582 WEAK_AV void IntDefaultHandler(void)
583 { while(1) {}
584 }
585
586 //*****************************************************************************
587 // Default application exception handlers. Override the ones here by defining
588 // your own handler routines in your application code. These routines call
589 // driver exception handlers or IntDefaultHandler() if no driver exception
590 // handler is included.
591 //*****************************************************************************
WDT_BOD_IRQHandler(void)592 WEAK void WDT_BOD_IRQHandler(void)
593 { WDT_BOD_DriverIRQHandler();
594 }
595
DMA0_IRQHandler(void)596 WEAK void DMA0_IRQHandler(void)
597 { DMA0_DriverIRQHandler();
598 }
599
GINT0_IRQHandler(void)600 WEAK void GINT0_IRQHandler(void)
601 { GINT0_DriverIRQHandler();
602 }
603
GINT1_IRQHandler(void)604 WEAK void GINT1_IRQHandler(void)
605 { GINT1_DriverIRQHandler();
606 }
607
PIN_INT0_IRQHandler(void)608 WEAK void PIN_INT0_IRQHandler(void)
609 { PIN_INT0_DriverIRQHandler();
610 }
611
PIN_INT1_IRQHandler(void)612 WEAK void PIN_INT1_IRQHandler(void)
613 { PIN_INT1_DriverIRQHandler();
614 }
615
PIN_INT2_IRQHandler(void)616 WEAK void PIN_INT2_IRQHandler(void)
617 { PIN_INT2_DriverIRQHandler();
618 }
619
PIN_INT3_IRQHandler(void)620 WEAK void PIN_INT3_IRQHandler(void)
621 { PIN_INT3_DriverIRQHandler();
622 }
623
UTICK0_IRQHandler(void)624 WEAK void UTICK0_IRQHandler(void)
625 { UTICK0_DriverIRQHandler();
626 }
627
MRT0_IRQHandler(void)628 WEAK void MRT0_IRQHandler(void)
629 { MRT0_DriverIRQHandler();
630 }
631
CTIMER0_IRQHandler(void)632 WEAK void CTIMER0_IRQHandler(void)
633 { CTIMER0_DriverIRQHandler();
634 }
635
CTIMER1_IRQHandler(void)636 WEAK void CTIMER1_IRQHandler(void)
637 { CTIMER1_DriverIRQHandler();
638 }
639
SCT0_IRQHandler(void)640 WEAK void SCT0_IRQHandler(void)
641 { SCT0_DriverIRQHandler();
642 }
643
CTIMER3_IRQHandler(void)644 WEAK void CTIMER3_IRQHandler(void)
645 { CTIMER3_DriverIRQHandler();
646 }
647
FLEXCOMM0_IRQHandler(void)648 WEAK void FLEXCOMM0_IRQHandler(void)
649 { FLEXCOMM0_DriverIRQHandler();
650 }
651
FLEXCOMM1_IRQHandler(void)652 WEAK void FLEXCOMM1_IRQHandler(void)
653 { FLEXCOMM1_DriverIRQHandler();
654 }
655
FLEXCOMM2_IRQHandler(void)656 WEAK void FLEXCOMM2_IRQHandler(void)
657 { FLEXCOMM2_DriverIRQHandler();
658 }
659
FLEXCOMM3_IRQHandler(void)660 WEAK void FLEXCOMM3_IRQHandler(void)
661 { FLEXCOMM3_DriverIRQHandler();
662 }
663
FLEXCOMM4_IRQHandler(void)664 WEAK void FLEXCOMM4_IRQHandler(void)
665 { FLEXCOMM4_DriverIRQHandler();
666 }
667
FLEXCOMM5_IRQHandler(void)668 WEAK void FLEXCOMM5_IRQHandler(void)
669 { FLEXCOMM5_DriverIRQHandler();
670 }
671
FLEXCOMM6_IRQHandler(void)672 WEAK void FLEXCOMM6_IRQHandler(void)
673 { FLEXCOMM6_DriverIRQHandler();
674 }
675
FLEXCOMM7_IRQHandler(void)676 WEAK void FLEXCOMM7_IRQHandler(void)
677 { FLEXCOMM7_DriverIRQHandler();
678 }
679
ADC0_SEQA_IRQHandler(void)680 WEAK void ADC0_SEQA_IRQHandler(void)
681 { ADC0_SEQA_DriverIRQHandler();
682 }
683
ADC0_SEQB_IRQHandler(void)684 WEAK void ADC0_SEQB_IRQHandler(void)
685 { ADC0_SEQB_DriverIRQHandler();
686 }
687
ADC0_THCMP_IRQHandler(void)688 WEAK void ADC0_THCMP_IRQHandler(void)
689 { ADC0_THCMP_DriverIRQHandler();
690 }
691
DMIC0_IRQHandler(void)692 WEAK void DMIC0_IRQHandler(void)
693 { DMIC0_DriverIRQHandler();
694 }
695
HWVAD0_IRQHandler(void)696 WEAK void HWVAD0_IRQHandler(void)
697 { HWVAD0_DriverIRQHandler();
698 }
699
USB0_NEEDCLK_IRQHandler(void)700 WEAK void USB0_NEEDCLK_IRQHandler(void)
701 { USB0_NEEDCLK_DriverIRQHandler();
702 }
703
USB0_IRQHandler(void)704 WEAK void USB0_IRQHandler(void)
705 { USB0_DriverIRQHandler();
706 }
707
RTC_IRQHandler(void)708 WEAK void RTC_IRQHandler(void)
709 { RTC_DriverIRQHandler();
710 }
711
FLEXCOMM10_IRQHandler(void)712 WEAK void FLEXCOMM10_IRQHandler(void)
713 { FLEXCOMM10_DriverIRQHandler();
714 }
715
Reserved47_IRQHandler(void)716 WEAK void Reserved47_IRQHandler(void)
717 { Reserved47_DriverIRQHandler();
718 }
719
PIN_INT4_IRQHandler(void)720 WEAK void PIN_INT4_IRQHandler(void)
721 { PIN_INT4_DriverIRQHandler();
722 }
723
PIN_INT5_IRQHandler(void)724 WEAK void PIN_INT5_IRQHandler(void)
725 { PIN_INT5_DriverIRQHandler();
726 }
727
PIN_INT6_IRQHandler(void)728 WEAK void PIN_INT6_IRQHandler(void)
729 { PIN_INT6_DriverIRQHandler();
730 }
731
PIN_INT7_IRQHandler(void)732 WEAK void PIN_INT7_IRQHandler(void)
733 { PIN_INT7_DriverIRQHandler();
734 }
735
CTIMER2_IRQHandler(void)736 WEAK void CTIMER2_IRQHandler(void)
737 { CTIMER2_DriverIRQHandler();
738 }
739
CTIMER4_IRQHandler(void)740 WEAK void CTIMER4_IRQHandler(void)
741 { CTIMER4_DriverIRQHandler();
742 }
743
RIT_IRQHandler(void)744 WEAK void RIT_IRQHandler(void)
745 { RIT_DriverIRQHandler();
746 }
747
SPIFI0_IRQHandler(void)748 WEAK void SPIFI0_IRQHandler(void)
749 { SPIFI0_DriverIRQHandler();
750 }
751
FLEXCOMM8_IRQHandler(void)752 WEAK void FLEXCOMM8_IRQHandler(void)
753 { FLEXCOMM8_DriverIRQHandler();
754 }
755
FLEXCOMM9_IRQHandler(void)756 WEAK void FLEXCOMM9_IRQHandler(void)
757 { FLEXCOMM9_DriverIRQHandler();
758 }
759
SDIO_IRQHandler(void)760 WEAK void SDIO_IRQHandler(void)
761 { SDIO_DriverIRQHandler();
762 }
763
CAN0_IRQ0_IRQHandler(void)764 WEAK void CAN0_IRQ0_IRQHandler(void)
765 { CAN0_IRQ0_DriverIRQHandler();
766 }
767
CAN0_IRQ1_IRQHandler(void)768 WEAK void CAN0_IRQ1_IRQHandler(void)
769 { CAN0_IRQ1_DriverIRQHandler();
770 }
771
CAN1_IRQ0_IRQHandler(void)772 WEAK void CAN1_IRQ0_IRQHandler(void)
773 { CAN1_IRQ0_DriverIRQHandler();
774 }
775
CAN1_IRQ1_IRQHandler(void)776 WEAK void CAN1_IRQ1_IRQHandler(void)
777 { CAN1_IRQ1_DriverIRQHandler();
778 }
779
USB1_IRQHandler(void)780 WEAK void USB1_IRQHandler(void)
781 { USB1_DriverIRQHandler();
782 }
783
USB1_NEEDCLK_IRQHandler(void)784 WEAK void USB1_NEEDCLK_IRQHandler(void)
785 { USB1_NEEDCLK_DriverIRQHandler();
786 }
787
ETHERNET_IRQHandler(void)788 WEAK void ETHERNET_IRQHandler(void)
789 { ETHERNET_DriverIRQHandler();
790 }
791
ETHERNET_PMT_IRQHandler(void)792 WEAK void ETHERNET_PMT_IRQHandler(void)
793 { ETHERNET_PMT_DriverIRQHandler();
794 }
795
ETHERNET_MACLP_IRQHandler(void)796 WEAK void ETHERNET_MACLP_IRQHandler(void)
797 { ETHERNET_MACLP_DriverIRQHandler();
798 }
799
Reserved68_IRQHandler(void)800 WEAK void Reserved68_IRQHandler(void)
801 { Reserved68_DriverIRQHandler();
802 }
803
LCD_IRQHandler(void)804 WEAK void LCD_IRQHandler(void)
805 { LCD_DriverIRQHandler();
806 }
807
SHA_IRQHandler(void)808 WEAK void SHA_IRQHandler(void)
809 { SHA_DriverIRQHandler();
810 }
811
SMARTCARD0_IRQHandler(void)812 WEAK void SMARTCARD0_IRQHandler(void)
813 { SMARTCARD0_DriverIRQHandler();
814 }
815
SMARTCARD1_IRQHandler(void)816 WEAK void SMARTCARD1_IRQHandler(void)
817 { SMARTCARD1_DriverIRQHandler();
818 }
819
820 //*****************************************************************************
821
822 #if defined (DEBUG)
823 #pragma GCC pop_options
824 #endif // (DEBUG)
825
