1 /*
2 ** ###################################################################
3 ** Processors: K32L2B31VFM0A
4 ** K32L2B31VFT0A
5 ** K32L2B31VLH0A
6 ** K32L2B31VMP0A
7 **
8 ** Compilers: Freescale C/C++ for Embedded ARM
9 ** GNU C Compiler
10 ** IAR ANSI C/C++ Compiler for ARM
11 ** Keil ARM C/C++ Compiler
12 ** MCUXpresso Compiler
13 **
14 ** Reference manual: K32L2B3xRM, Rev.0, July 2019
15 ** Version: rev. 1.0, 2019-07-30
16 ** Build: b190925
17 **
18 ** Abstract:
19 ** Provides a system configuration function and a global variable that
20 ** contains the system frequency. It configures the device and initializes
21 ** the oscillator (PLL) that is part of the microcontroller device.
22 **
23 ** Copyright 2016 Freescale Semiconductor, Inc.
24 ** Copyright 2016-2019 NXP
25 ** All rights reserved.
26 **
27 ** SPDX-License-Identifier: BSD-3-Clause
28 **
29 ** http: www.nxp.com
30 ** mail: support@nxp.com
31 **
32 ** Revisions:
33 ** - rev. 1.0 (2019-07-30)
34 ** Initial version.
35 **
36 ** ###################################################################
37 */
38
39 /*!
40 * @file K32L2B31A
41 * @version 1.0
42 * @date 2019-07-30
43 * @brief Device specific configuration file for K32L2B31A (implementation file)
44 *
45 * Provides a system configuration function and a global variable that contains
46 * the system frequency. It configures the device and initializes the oscillator
47 * (PLL) that is part of the microcontroller device.
48 */
49
50 #include <stdint.h>
51 #include "fsl_device_registers.h"
52
53 /* ----------------------------------------------------------------------------
54 -- Core clock
55 ---------------------------------------------------------------------------- */
56
57 uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
58
59 /* ----------------------------------------------------------------------------
60 -- SystemInit()
61 ---------------------------------------------------------------------------- */
62
SystemInit(void)63 void SystemInit(void)
64 {
65 #if (ACK_ISOLATION)
66 if ((PMC->REGSC & PMC_REGSC_ACKISO_MASK) != 0U)
67 {
68 PMC->REGSC |= PMC_REGSC_ACKISO_MASK; /* VLLSx recovery */
69 }
70 #endif
71
72 #if (DISABLE_WDOG)
73 /* SIM->COPC: ?=0,COPCLKSEL=0,COPDBGEN=0,COPSTPEN=0,COPT=0,COPCLKS=0,COPW=0 */
74 SIM->COPC = (uint32_t)0x00u;
75 #endif /* (DISABLE_WDOG) */
76
77 SystemInitHook();
78 }
79
80 /* ----------------------------------------------------------------------------
81 -- SystemCoreClockUpdate()
82 ---------------------------------------------------------------------------- */
83
SystemCoreClockUpdate(void)84 void SystemCoreClockUpdate(void)
85 {
86 uint32_t MCGOUTClock; /* Variable to store output clock frequency of the MCG module */
87 uint16_t Divider;
88
89 if ((MCG->S & MCG_S_CLKST_MASK) == 0x00U)
90 {
91 /* High internal reference clock is selected */
92 MCGOUTClock = CPU_INT_FAST_CLK_HZ; /* Fast internal reference clock selected */
93 }
94 else if ((MCG->S & MCG_S_CLKST_MASK) == 0x04U)
95 {
96 /* Internal reference clock is selected */
97 Divider = (uint16_t)(0x01LU << ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT));
98 MCGOUTClock = (uint32_t)(CPU_INT_SLOW_CLK_HZ / Divider); /* Slow internal reference clock 8MHz selected */
99 }
100 else if ((MCG->S & MCG_S_CLKST_MASK) == 0x08U)
101 {
102 /* External reference clock is selected */
103 MCGOUTClock = CPU_XTAL_CLK_HZ;
104 }
105 else
106 {
107 /* Reserved value */
108 return;
109 } /* (!((MCG->S & MCG_S_CLKST_MASK) == 0x08U)) */
110 SystemCoreClock =
111 (MCGOUTClock / (0x01U + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT)));
112 }
113
114 /* ----------------------------------------------------------------------------
115 -- SystemInitHook()
116 ---------------------------------------------------------------------------- */
117
SystemInitHook(void)118 __attribute__((weak)) void SystemInitHook(void)
119 {
120 /* Void implementation of the weak function. */
121 }
122
