1 /*
2  *  Copyright 2021-2022 NXP
3  *  All rights reserved.
4  *
5  *  SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 /*
9  * Supported Wi-Fi boards (modules):
10  *     WIFI_88W8801_BOARD_AW_NM191_USD
11  *     WIFI_88W8801_BOARD_AW_NM191MA
12  *     WIFI_IW416_BOARD_AW_AM457_USD
13  *     WIFI_IW416_BOARD_AW_AM457MA
14  *     WIFI_IW416_BOARD_AW_AM510_USD
15  *     WIFI_IW416_BOARD_AW_AM510MA
16  *     WIFI_88W8987_BOARD_AW_CM358_USD
17  *     WIFI_88W8987_BOARD_AW_CM358MA
18  *     WIFI_88W8801_BOARD_MURATA_2DS_USD
19  *     WIFI_88W8801_BOARD_MURATA_2DS_M2
20  *     WIFI_IW416_BOARD_MURATA_1XK_USD
21  *     WIFI_IW416_BOARD_MURATA_1XK_M2
22  *     WIFI_88W8987_BOARD_MURATA_1ZM_USD
23  *     WIFI_88W8987_BOARD_MURATA_1ZM_M2
24  *     WIFI_BOARD_RW610
25  */
26 #ifndef NOT_DEFINE_DEFAULT_WIFI_MODULE
27 #define WIFI_IW416_BOARD_AW_AM510_USD
28 #endif
29 
30 /* Wi-Fi boards configuration list */
31 
32 /* AzureWave AW-NM191-uSD */
33 #if defined(WIFI_88W8801_BOARD_AW_NM191_USD)
34 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
35 #define SD8801
36 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
37 #define WIFI_BT_USE_USD_INTERFACE
38 #define WLAN_ED_MAC_CTRL                        \
39     {                                           \
40         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x1B \
41     }
42 
43 /* AzureWave AW-NM191MA */
44 #elif defined(WIFI_88W8801_BOARD_AW_NM191MA)
45 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
46 #define SD8801
47 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
48 #define WIFI_BT_USE_M2_INTERFACE
49 #define WLAN_ED_MAC_CTRL                        \
50     {                                           \
51         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x1B \
52     }
53 
54 /* AzureWave AW-AM457-uSD */
55 #elif defined(WIFI_IW416_BOARD_AW_AM457_USD)
56 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
57 #define SD8978
58 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
59 #define WIFI_BT_USE_USD_INTERFACE
60 #define OVERRIDE_CALIBRATION_DATA "WIFI_IW416_BOARD_AW_AM457_CAL_DATA_EXT.h"
61 #define WLAN_ED_MAC_CTRL                                                               \
62     {                                                                                  \
63         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
64     }
65 
66 /* AzureWave AW-AM457MA */
67 #elif defined(WIFI_IW416_BOARD_AW_AM457MA)
68 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
69 #define SD8978
70 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
71 #define WIFI_BT_USE_M2_INTERFACE
72 #define OVERRIDE_CALIBRATION_DATA "WIFI_IW416_BOARD_AW_AM457_CAL_DATA_EXT.h"
73 #define WLAN_ED_MAC_CTRL                                                               \
74     {                                                                                  \
75         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
76     }
77 
78 /* AzureWave AW-AM510-uSD */
79 #elif defined(WIFI_IW416_BOARD_AW_AM510_USD)
80 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
81 #define SD8978
82 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
83 #define WIFI_BT_USE_USD_INTERFACE
84 #define WLAN_ED_MAC_CTRL                                                               \
85     {                                                                                  \
86         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
87     }
88 
89 /* AzureWave AW-AM510MA */
90 #elif defined(WIFI_IW416_BOARD_AW_AM510MA)
91 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
92 #define SD8978
93 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
94 #define WIFI_BT_USE_M2_INTERFACE
95 #define WLAN_ED_MAC_CTRL                                                               \
96     {                                                                                  \
97         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
98     }
99 
100 /* AzureWave AW-CM358-uSD */
101 #elif defined(WIFI_88W8987_BOARD_AW_CM358_USD)
102 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
103 #define SD8987
104 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
105 #define SD_TIMING_MAX kSD_TimingDDR50Mode
106 #define WIFI_BT_USE_USD_INTERFACE
107 #define WLAN_ED_MAC_CTRL                                                               \
108     {                                                                                  \
109         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
110     }
111 
112 /* AzureWave AW-CM358MA */
113 #elif defined(WIFI_88W8987_BOARD_AW_CM358MA)
114 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW.h"
115 #define SD8987
116 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
117 #define SD_TIMING_MAX kSD_TimingDDR50Mode
118 #define WIFI_BT_USE_M2_INTERFACE
119 #define WLAN_ED_MAC_CTRL                                                               \
120     {                                                                                  \
121         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x9, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0xC \
122     }
123 
124 /* Murata 2DS + Murata uSD-M.2 adapter */
125 #elif defined(WIFI_88W8801_BOARD_MURATA_2DS_USD)
126 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_CA.h"
127 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_EU.h"
128 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_JP.h"
129 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_US.h"
130 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_WW.h"
131 #define SD8801
132 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
133 #define SD_TIMING_MAX kSD_TimingSDR25HighSpeedMode
134 #define WIFI_BT_USE_USD_INTERFACE
135 #define WLAN_ED_MAC_CTRL                        \
136     {                                           \
137         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x0E \
138     }
139 
140 /* Murata 2DS */
141 #elif defined(WIFI_88W8801_BOARD_MURATA_2DS_M2)
142 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_CA.h"
143 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_EU.h"
144 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_JP.h"
145 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_US.h"
146 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_2DS_WW.h"
147 #define SD8801
148 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
149 #define SD_TIMING_MAX kSD_TimingSDR25HighSpeedMode
150 #define WIFI_BT_USE_M2_INTERFACE
151 #define WLAN_ED_MAC_CTRL                        \
152     {                                           \
153         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x0E \
154     }
155 
156 /* Murata 1XK + Murata uSD-M.2 adapter */
157 #elif defined(WIFI_IW416_BOARD_MURATA_1XK_USD)
158 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_CA.h"
159 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_EU.h"
160 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_JP.h"
161 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_US.h"
162 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_WW.h"
163 #define SD8978
164 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
165 #define SD_TIMING_MAX kSD_TimingDDR50Mode
166 #define WIFI_BT_USE_USD_INTERFACE
167 #define WLAN_ED_MAC_CTRL                                                               \
168     {                                                                                  \
169         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x0, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0x6 \
170     }
171 
172 /* Murata 1XK */
173 #elif defined(WIFI_IW416_BOARD_MURATA_1XK_M2)
174 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_CA.h"
175 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_EU.h"
176 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_JP.h"
177 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_US.h"
178 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1XK_WW.h"
179 #define SD8978
180 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
181 #define SD_TIMING_MAX kSD_TimingDDR50Mode
182 #define WIFI_BT_USE_M2_INTERFACE
183 #define WLAN_ED_MAC_CTRL                                                               \
184     {                                                                                  \
185         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x0, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0x6 \
186     }
187 
188 /* Murata 1ZM + Murata uSD-M.2 adapter */
189 #elif defined(WIFI_88W8987_BOARD_MURATA_1ZM_USD)
190 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_CA.h"
191 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_EU.h"
192 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_JP.h"
193 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_US.h"
194 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_WW.h"
195 #define SD8987
196 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
197 #define SD_TIMING_MAX kSD_TimingDDR50Mode
198 #define WIFI_BT_USE_USD_INTERFACE
199 #define WLAN_ED_MAC_CTRL                                                               \
200     {                                                                                  \
201         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x6, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0x6 \
202     }
203 
204 /* Murata 1ZM */
205 #elif defined(WIFI_88W8987_BOARD_MURATA_1ZM_M2)
206 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_CA.h"
207 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_EU.h"
208 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_JP.h"
209 // #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_US.h"
210 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_murata_1ZM_WW.h"
211 #define SD8987
212 #define SDMMCHOST_OPERATION_VOLTAGE_1V8
213 #define SD_TIMING_MAX kSD_TimingDDR50Mode
214 #define WIFI_BT_USE_M2_INTERFACE
215 #define WLAN_ED_MAC_CTRL                                                               \
216     {                                                                                  \
217         .ed_ctrl_2g = 0x1, .ed_offset_2g = 0x6, .ed_ctrl_5g = 0x1, .ed_offset_5g = 0x6 \
218     }
219 #elif defined(WIFI_BOARD_RW610)
220 #define RW610
221 #define WIFI_BT_TX_PWR_LIMITS "wlan_txpwrlimit_cfg_WW_rw610.h"
222 #else
223 #error "Please define macro related to wifi board"
224 #endif
225 
226 #include "wifi_config.h"
227