1 /*
2 * Copyright 2021 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 /***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12 /*
13 * How to setup clock using clock driver functions:
14 *
15 * 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
16 * and flash clock are in allowed range during clock mode switch.
17 *
18 * 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.
19 *
20 * 3. Set MCG configuration, MCG includes three parts: FLL clock, PLL clock and
21 * internal reference clock(MCGIRCLK). Follow the steps to setup:
22 *
23 * 1). Call CLOCK_BootToXxxMode to set MCG to target mode.
24 *
25 * 2). If target mode is FBI/BLPI/PBI mode, the MCGIRCLK has been configured
26 * correctly. For other modes, need to call CLOCK_SetInternalRefClkConfig
27 * explicitly to setup MCGIRCLK.
28 *
29 * 3). Don't need to configure FLL explicitly, because if target mode is FLL
30 * mode, then FLL has been configured by the function CLOCK_BootToXxxMode,
31 * if the target mode is not FLL mode, the FLL is disabled.
32 *
33 * 4). If target mode is PEE/PBE/PEI/PBI mode, then the related PLL has been
34 * setup by CLOCK_BootToXxxMode. In FBE/FBI/FEE/FBE mode, the PLL could
35 * be enabled independently, call CLOCK_EnablePll0 explicitly in this case.
36 *
37 * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
38 */
39
40 /* clang-format off */
41 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
42 !!GlobalInfo
43 product: Clocks v7.0
44 processor: MKM34Z128Axxx5
45 package_id: MKM34Z128ACLL5
46 mcu_data: ksdk2_0
47 processor_version: 0.9.0
48 board: TWR-KM34Z50MV3
49 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
50 /* clang-format on */
51
52 #include "fsl_smc.h"
53 #include "fsl_irtc.h"
54 #include "clock_config.h"
55
56 /*******************************************************************************
57 * Definitions
58 ******************************************************************************/
59 #define IRTC_OSC_CAP0P 0U /*!< RTC oscillator 0pF capacitor load */
60 #define MCG_PLL_DISABLE 0U /*!< MCGPLLCLK disabled */
61 #define OSC_CAP0P 0U /*!< Oscillator 0pF capacitor load */
62 #define OSC_ER_CLK_DISABLE 0U /*!< Disable external reference clock */
63 #define SIM_OSC32KSEL_OSC32KCLK_CLK 0U /*!< OSC32KSEL select: OSC32KCLK clock */
64
65 /*******************************************************************************
66 * Variables
67 ******************************************************************************/
68 /* System clock frequency. */
69 extern uint32_t SystemCoreClock;
70
71 /*******************************************************************************
72 * Code
73 ******************************************************************************/
74 /*FUNCTION**********************************************************************
75 *
76 * Function Name : CLOCK_CONFIG_FllStableDelay
77 * Description : This function is used to delay for FLL stable.
78 *
79 *END**************************************************************************/
CLOCK_CONFIG_FllStableDelay(void)80 static void CLOCK_CONFIG_FllStableDelay(void)
81 {
82 uint32_t i = 30000U;
83 while (i--)
84 {
85 __NOP();
86 }
87 }
88
89 /*FUNCTION**********************************************************************
90 *
91 * Function Name : CLOCK_CONFIG_EnableRtcOsc
92 * Description : This function is used to configuring RTC oscillator
93 * Param capLoad : RTC oscillator capacity load
94 *
95 *END**************************************************************************/
CLOCK_CONFIG_EnableRtcOsc(uint32_t capLoad)96 static void CLOCK_CONFIG_EnableRtcOsc(uint32_t capLoad)
97 {
98 if ((RTC->GP_DATA_REG & 0x01U) != 0U) { /* Only if the Rtc oscillator is not already enabled */
99 /* Set the specified capacitor configuration for the RTC oscillator */
100 IRTC_SetOscCapLoad(RTC, capLoad);
101 /* Enable the RTC 32KHz oscillator */
102 RTC->GP_DATA_REG &= ~0x01U;
103 }
104 }
105
106 /*******************************************************************************
107 ************************ BOARD_InitBootClocks function ************************
108 ******************************************************************************/
BOARD_InitBootClocks(void)109 void BOARD_InitBootClocks(void)
110 {
111 BOARD_BootClockRUN();
112 }
113
114 /*******************************************************************************
115 ********************** Configuration BOARD_BootClockRUN ***********************
116 ******************************************************************************/
117 /* clang-format off */
118 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
119 !!Configuration
120 name: BOARD_BootClockRUN
121 called_from_default_init: true
122 outputs:
123 - {id: Bus_clock.outFreq, value: 23.986176 MHz}
124 - {id: Core_clock.outFreq, value: 47.972352 MHz}
125 - {id: Flash_clock.outFreq, value: 23.986176 MHz}
126 - {id: LPO_clock.outFreq, value: 1 kHz}
127 - {id: MCGIRCLK.outFreq, value: 2 MHz}
128 - {id: OSC32KSELCLK.outFreq, value: 32.768 kHz}
129 - {id: System_clock.outFreq, value: 47.972352 MHz}
130 settings:
131 - {id: MCGMode, value: FEE}
132 - {id: MCG.CLKS.sel, value: MCG.PLLS}
133 - {id: MCG.FLL_mul.scale, value: '1464', locked: true}
134 - {id: MCG.IREFS.sel, value: MCG.FRDIV}
135 - {id: MCG.OSCSEL.sel, value: SIM.RTC32KCLK}
136 - {id: MCG_C1_IRCLKEN_CFG, value: Enabled}
137 - {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
138 - {id: MCG_C2_RANGE0_CFG, value: High}
139 - {id: MCG_C2_RANGE0_FRDIV_CFG, value: High}
140 sources:
141 - {id: OSC.OSC.outFreq, value: 8 MHz, enabled: true}
142 - {id: RTC.OSC32kHz.outFreq, value: 32.768 kHz, enabled: true}
143 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
144 /* clang-format on */
145
146 /*******************************************************************************
147 * Variables for BOARD_BootClockRUN configuration
148 ******************************************************************************/
149 const mcg_config_t mcgConfig_BOARD_BootClockRUN =
150 {
151 .mcgMode = kMCG_ModeFEE, /* FEE - FLL Engaged External */
152 .irclkEnableMode = kMCG_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
153 .ircs = kMCG_IrcFast, /* Fast internal reference clock selected */
154 .fcrdiv = 0x1U, /* Fast IRC divider: divided by 2 */
155 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
156 .drs = kMCG_DrsMid, /* Mid frequency range */
157 .dmx32 = kMCG_Dmx32Fine, /* DCO is fine-tuned for maximum frequency with 32.768 kHz reference */
158 .oscsel = kMCG_OscselRtc, /* Selects 32 kHz RTC Oscillator */
159 .pll0Config =
160 {
161 .enableMode = MCG_PLL_DISABLE, /* MCGPLLCLK disabled */
162 .refSrc = kMCG_PllRefRtc, /* Selects 32k RTC oscillator */
163 },
164 };
165 const sim_clock_config_t simConfig_BOARD_BootClockRUN =
166 {
167 .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK, /* OSC32KSEL select: OSC32KCLK clock */
168 .clkdiv1 = 0x8000000U, /* SIM_CLKDIV1 - SYSDIV: /1, SYSCLKMODE: /2 */
169 };
170 const osc_config_t oscConfig_BOARD_BootClockRUN =
171 {
172 .freq = 8000000U, /* Oscillator frequency: 8000000Hz */
173 .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */
174 .workMode = kOSC_ModeOscLowPower, /* Oscillator low power */
175 .oscerConfig =
176 {
177 .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
178 }
179 };
180
181 /*******************************************************************************
182 * Code for BOARD_BootClockRUN configuration
183 ******************************************************************************/
BOARD_BootClockRUN(void)184 void BOARD_BootClockRUN(void)
185 {
186 /* Use RTC_CLKIN input clock directly. */
187 CLOCK_SetXtal32Freq(32768U);
188 /* Set the system clock dividers in SIM to safe value. */
189 CLOCK_SetSimSafeDivs();
190 /* Enable RTC oscillator. */
191 CLOCK_CONFIG_EnableRtcOsc((IRTC_OSC_CAP0P));
192
193 /* Initializes OSC0 according to board configuration. */
194 CLOCK_InitOsc0(&oscConfig_BOARD_BootClockRUN);
195 CLOCK_SetXtal0Freq(oscConfig_BOARD_BootClockRUN.freq);
196 /* Set MCG to FEE mode. */
197 CLOCK_BootToFeeMode(mcgConfig_BOARD_BootClockRUN.oscsel,
198 mcgConfig_BOARD_BootClockRUN.frdiv,
199 mcgConfig_BOARD_BootClockRUN.dmx32,
200 mcgConfig_BOARD_BootClockRUN.drs,
201 CLOCK_CONFIG_FllStableDelay);
202 /* Configure the Internal Reference clock (MCGIRCLK). */
203 CLOCK_SetInternalRefClkConfig(mcgConfig_BOARD_BootClockRUN.irclkEnableMode,
204 mcgConfig_BOARD_BootClockRUN.ircs,
205 mcgConfig_BOARD_BootClockRUN.fcrdiv);
206 /* Set the clock configuration in SIM module. */
207 CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
208 /* Set SystemCoreClock variable. */
209 SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
210 }
211
212 /*******************************************************************************
213 ********************* Configuration BOARD_BootClockVLPR ***********************
214 ******************************************************************************/
215 /* clang-format off */
216 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
217 !!Configuration
218 name: BOARD_BootClockVLPR
219 outputs:
220 - {id: Bus_clock.outFreq, value: 1 MHz}
221 - {id: Core_clock.outFreq, value: 2 MHz}
222 - {id: Flash_clock.outFreq, value: 1 MHz}
223 - {id: LPO_clock.outFreq, value: 1 kHz}
224 - {id: MCGIRCLK.outFreq, value: 2 MHz}
225 - {id: System_clock.outFreq, value: 2 MHz}
226 settings:
227 - {id: powerMode, value: VLPR}
228 - {id: MCG.FCRDIV.scale, value: '2', locked: true}
229 - {id: MCG.FRDIV.scale, value: '32'}
230 - {id: MCG_C1_IRCLKEN_CFG, value: Enabled}
231 - {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
232 - {id: MCG_C2_RANGE0_CFG, value: High}
233 - {id: MCG_C2_RANGE0_FRDIV_CFG, value: High}
234 - {id: RTC_CR_OSC_CAP_LOAD_CFG, value: SC18PF}
235 sources:
236 - {id: OSC.OSC.outFreq, value: 8 MHz}
237 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
238 /* clang-format on */
239
240 /*******************************************************************************
241 * Variables for BOARD_BootClockVLPR configuration
242 ******************************************************************************/
243 const mcg_config_t mcgConfig_BOARD_BootClockVLPR =
244 {
245 .mcgMode = kMCG_ModeBLPI, /* BLPI - Bypassed Low Power Internal */
246 .irclkEnableMode = kMCG_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
247 .ircs = kMCG_IrcFast, /* Fast internal reference clock selected */
248 .fcrdiv = 0x1U, /* Fast IRC divider: divided by 2 */
249 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
250 .drs = kMCG_DrsLow, /* Low frequency range */
251 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
252 .oscsel = kMCG_OscselOsc, /* Selects System Oscillator (OSCCLK) */
253 .pll0Config =
254 {
255 .enableMode = MCG_PLL_DISABLE, /* MCGPLLCLK disabled */
256 .refSrc = kMCG_PllRefRtc, /* Selects 32k RTC oscillator */
257 },
258 };
259 const sim_clock_config_t simConfig_BOARD_BootClockVLPR =
260 {
261 .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK, /* OSC32KSEL select: OSC32KCLK clock */
262 .clkdiv1 = 0x8000000U, /* SIM_CLKDIV1 - SYSDIV: /1, SYSCLKMODE: /2 */
263 };
264 const osc_config_t oscConfig_BOARD_BootClockVLPR =
265 {
266 .freq = 0U, /* Oscillator frequency: 0Hz */
267 .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */
268 .workMode = kOSC_ModeOscLowPower, /* Oscillator low power */
269 .oscerConfig =
270 {
271 .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
272 }
273 };
274
275 /*******************************************************************************
276 * Code for BOARD_BootClockVLPR configuration
277 ******************************************************************************/
BOARD_BootClockVLPR(void)278 void BOARD_BootClockVLPR(void)
279 {
280 /* Set the system clock dividers in SIM to safe value. */
281 CLOCK_SetSimSafeDivs();
282 /* Set MCG to BLPI mode. */
283 CLOCK_BootToBlpiMode(mcgConfig_BOARD_BootClockVLPR.fcrdiv,
284 mcgConfig_BOARD_BootClockVLPR.ircs,
285 mcgConfig_BOARD_BootClockVLPR.irclkEnableMode);
286 /* Set the clock configuration in SIM module. */
287 CLOCK_SetSimConfig(&simConfig_BOARD_BootClockVLPR);
288 /* Set VLPR power mode. */
289 SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
290 #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
291 SMC_SetPowerModeVlpr(SMC, false);
292 #else
293 SMC_SetPowerModeVlpr(SMC);
294 #endif
295 while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr)
296 {
297 }
298 /* Set SystemCoreClock variable. */
299 SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK;
300 }
301
302
