1 /*
2 * Copyright 2017-2020 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 /***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12 /*
13 * How to setup clock using clock driver functions:
14 *
15 * 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
16 * and flash clock are in allowed range during clock mode switch.
17 *
18 * 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.
19 *
20 * 3. Set MCG configuration, MCG includes three parts: FLL clock, PLL clock and
21 * internal reference clock(MCGIRCLK). Follow the steps to setup:
22 *
23 * 1). Call CLOCK_BootToXxxMode to set MCG to target mode.
24 *
25 * 2). If target mode is FBI/BLPI/PBI mode, the MCGIRCLK has been configured
26 * correctly. For other modes, need to call CLOCK_SetInternalRefClkConfig
27 * explicitly to setup MCGIRCLK.
28 *
29 * 3). Don't need to configure FLL explicitly, because if target mode is FLL
30 * mode, then FLL has been configured by the function CLOCK_BootToXxxMode,
31 * if the target mode is not FLL mode, the FLL is disabled.
32 *
33 * 4). If target mode is PEE/PBE/PEI/PBI mode, then the related PLL has been
34 * setup by CLOCK_BootToXxxMode. In FBE/FBI/FEE/FBE mode, the PLL could
35 * be enabled independently, call CLOCK_EnablePll0 explicitly in this case.
36 *
37 * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
38 */
39
40 /* clang-format off */
41 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
42 !!GlobalInfo
43 product: Clocks v7.0
44 processor: MKM34Z128Axxx5
45 package_id: MKM34Z128ACLL5
46 mcu_data: ksdk2_0
47 processor_version: 0.9.0
48 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
49 /* clang-format on */
50
51 #include "fsl_smc.h"
52 #include "fsl_irtc.h"
53 #include "clock_config.h"
54
55 /*******************************************************************************
56 * Definitions
57 ******************************************************************************/
58 #define IRTC_OSC_CAP0P 0U /*!< RTC oscillator 0pF capacitor load */
59 #define MCG_PLL_DISABLE 0U /*!< MCGPLLCLK disabled */
60 #define OSC_CAP0P 0U /*!< Oscillator 0pF capacitor load */
61 #define OSC_ER_CLK_DISABLE 0U /*!< Disable external reference clock */
62 #define SIM_OSC32KSEL_OSC32KCLK_CLK 0U /*!< OSC32KSEL select: OSC32KCLK clock */
63
64 /*******************************************************************************
65 * Variables
66 ******************************************************************************/
67 /* System clock frequency. */
68 extern uint32_t SystemCoreClock;
69
70 /*******************************************************************************
71 * Code
72 ******************************************************************************/
73 /*FUNCTION**********************************************************************
74 *
75 * Function Name : CLOCK_CONFIG_FllStableDelay
76 * Description : This function is used to delay for FLL stable.
77 *
78 *END**************************************************************************/
CLOCK_CONFIG_FllStableDelay(void)79 static void CLOCK_CONFIG_FllStableDelay(void)
80 {
81 uint32_t i = 30000U;
82 while (i--)
83 {
84 __NOP();
85 }
86 }
87
88 /*FUNCTION**********************************************************************
89 *
90 * Function Name : CLOCK_CONFIG_EnableRtcOsc
91 * Description : This function is used to configuring RTC oscillator
92 * Param capLoad : RTC oscillator capacity load
93 *
94 *END**************************************************************************/
CLOCK_CONFIG_EnableRtcOsc(uint32_t capLoad)95 static void CLOCK_CONFIG_EnableRtcOsc(uint32_t capLoad)
96 {
97 if ((RTC->GP_DATA_REG & 0x01U) != 0U) { /* Only if the Rtc oscillator is not already enabled */
98 /* Set the specified capacitor configuration for the RTC oscillator */
99 IRTC_SetOscCapLoad(RTC, capLoad);
100 /* Enable the RTC 32KHz oscillator */
101 RTC->GP_DATA_REG &= ~0x01U;
102 }
103 }
104
105 /*******************************************************************************
106 ************************ BOARD_InitBootClocks function ************************
107 ******************************************************************************/
BOARD_InitBootClocks(void)108 void BOARD_InitBootClocks(void)
109 {
110 BOARD_BootClockRUN();
111 }
112
113 /*******************************************************************************
114 ********************** Configuration BOARD_BootClockRUN ***********************
115 ******************************************************************************/
116 /* clang-format off */
117 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
118 !!Configuration
119 name: BOARD_BootClockRUN
120 called_from_default_init: true
121 outputs:
122 - {id: Bus_clock.outFreq, value: 23.986176 MHz}
123 - {id: Core_clock.outFreq, value: 47.972352 MHz}
124 - {id: Flash_clock.outFreq, value: 23.986176 MHz}
125 - {id: LPO_clock.outFreq, value: 1 kHz}
126 - {id: MCGIRCLK.outFreq, value: 2 MHz}
127 - {id: OSC32KSELCLK.outFreq, value: 32.768 kHz}
128 - {id: System_clock.outFreq, value: 47.972352 MHz}
129 settings:
130 - {id: MCGMode, value: FEE}
131 - {id: MCG.CLKS.sel, value: MCG.PLLS}
132 - {id: MCG.FLL_mul.scale, value: '1464', locked: true}
133 - {id: MCG.IREFS.sel, value: MCG.FRDIV}
134 - {id: MCG.OSCSEL.sel, value: SIM.RTC32KCLK}
135 - {id: MCG_C1_IRCLKEN_CFG, value: Enabled}
136 - {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
137 - {id: MCG_C2_RANGE0_CFG, value: High}
138 - {id: MCG_C2_RANGE0_FRDIV_CFG, value: High}
139 sources:
140 - {id: OSC.OSC.outFreq, value: 8 MHz, enabled: true}
141 - {id: RTC.OSC32kHz.outFreq, value: 32.768 kHz, enabled: true}
142 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
143 /* clang-format on */
144
145 /*******************************************************************************
146 * Variables for BOARD_BootClockRUN configuration
147 ******************************************************************************/
148 const mcg_config_t mcgConfig_BOARD_BootClockRUN =
149 {
150 .mcgMode = kMCG_ModeFEE, /* FEE - FLL Engaged External */
151 .irclkEnableMode = kMCG_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
152 .ircs = kMCG_IrcFast, /* Fast internal reference clock selected */
153 .fcrdiv = 0x1U, /* Fast IRC divider: divided by 2 */
154 .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
155 .drs = kMCG_DrsMid, /* Mid frequency range */
156 .dmx32 = kMCG_Dmx32Fine, /* DCO is fine-tuned for maximum frequency with 32.768 kHz reference */
157 .oscsel = kMCG_OscselRtc, /* Selects 32 kHz RTC Oscillator */
158 .pll0Config =
159 {
160 .enableMode = MCG_PLL_DISABLE, /* MCGPLLCLK disabled */
161 .refSrc = kMCG_PllRefRtc, /* Selects 32k RTC oscillator */
162 },
163 };
164 const sim_clock_config_t simConfig_BOARD_BootClockRUN =
165 {
166 .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK, /* OSC32KSEL select: OSC32KCLK clock */
167 .clkdiv1 = 0x8000000U, /* SIM_CLKDIV1 - SYSDIV: /1, SYSCLKMODE: /2 */
168 };
169 const osc_config_t oscConfig_BOARD_BootClockRUN =
170 {
171 .freq = 8000000U, /* Oscillator frequency: 8000000Hz */
172 .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */
173 .workMode = kOSC_ModeOscLowPower, /* Oscillator low power */
174 .oscerConfig =
175 {
176 .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
177 }
178 };
179
180 /*******************************************************************************
181 * Code for BOARD_BootClockRUN configuration
182 ******************************************************************************/
BOARD_BootClockRUN(void)183 void BOARD_BootClockRUN(void)
184 {
185 /* Use RTC_CLKIN input clock directly. */
186 CLOCK_SetXtal32Freq(32768U);
187 /* Set the system clock dividers in SIM to safe value. */
188 CLOCK_SetSimSafeDivs();
189 /* Enable RTC oscillator. */
190 CLOCK_CONFIG_EnableRtcOsc((IRTC_OSC_CAP0P));
191
192 /* Initializes OSC0 according to board configuration. */
193 CLOCK_InitOsc0(&oscConfig_BOARD_BootClockRUN);
194 CLOCK_SetXtal0Freq(oscConfig_BOARD_BootClockRUN.freq);
195 /* Set MCG to FEE mode. */
196 CLOCK_BootToFeeMode(mcgConfig_BOARD_BootClockRUN.oscsel,
197 mcgConfig_BOARD_BootClockRUN.frdiv,
198 mcgConfig_BOARD_BootClockRUN.dmx32,
199 mcgConfig_BOARD_BootClockRUN.drs,
200 CLOCK_CONFIG_FllStableDelay);
201 /* Configure the Internal Reference clock (MCGIRCLK). */
202 CLOCK_SetInternalRefClkConfig(mcgConfig_BOARD_BootClockRUN.irclkEnableMode,
203 mcgConfig_BOARD_BootClockRUN.ircs,
204 mcgConfig_BOARD_BootClockRUN.fcrdiv);
205 /* Set the clock configuration in SIM module. */
206 CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
207 /* Set SystemCoreClock variable. */
208 SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
209 }
210
211 /*******************************************************************************
212 ********************* Configuration BOARD_BootClockVLPR ***********************
213 ******************************************************************************/
214 /* clang-format off */
215 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
216 !!Configuration
217 name: BOARD_BootClockVLPR
218 outputs:
219 - {id: Bus_clock.outFreq, value: 1 MHz}
220 - {id: Core_clock.outFreq, value: 2 MHz}
221 - {id: Flash_clock.outFreq, value: 1 MHz}
222 - {id: LPO_clock.outFreq, value: 1 kHz}
223 - {id: MCGIRCLK.outFreq, value: 2 MHz}
224 - {id: System_clock.outFreq, value: 2 MHz}
225 settings:
226 - {id: powerMode, value: VLPR}
227 - {id: MCG.FCRDIV.scale, value: '2', locked: true}
228 - {id: MCG.FRDIV.scale, value: '32'}
229 - {id: MCG_C1_IRCLKEN_CFG, value: Enabled}
230 - {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
231 - {id: MCG_C2_RANGE0_CFG, value: High}
232 - {id: MCG_C2_RANGE0_FRDIV_CFG, value: High}
233 - {id: RTC_CR_OSC_CAP_LOAD_CFG, value: SC18PF}
234 sources:
235 - {id: OSC.OSC.outFreq, value: 8 MHz}
236 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
237 /* clang-format on */
238
239 /*******************************************************************************
240 * Variables for BOARD_BootClockVLPR configuration
241 ******************************************************************************/
242 const mcg_config_t mcgConfig_BOARD_BootClockVLPR =
243 {
244 .mcgMode = kMCG_ModeBLPI, /* BLPI - Bypassed Low Power Internal */
245 .irclkEnableMode = kMCG_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
246 .ircs = kMCG_IrcFast, /* Fast internal reference clock selected */
247 .fcrdiv = 0x1U, /* Fast IRC divider: divided by 2 */
248 .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
249 .drs = kMCG_DrsLow, /* Low frequency range */
250 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
251 .oscsel = kMCG_OscselOsc, /* Selects System Oscillator (OSCCLK) */
252 .pll0Config =
253 {
254 .enableMode = MCG_PLL_DISABLE, /* MCGPLLCLK disabled */
255 .refSrc = kMCG_PllRefRtc, /* Selects 32k RTC oscillator */
256 },
257 };
258 const sim_clock_config_t simConfig_BOARD_BootClockVLPR =
259 {
260 .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK, /* OSC32KSEL select: OSC32KCLK clock */
261 .clkdiv1 = 0x8000000U, /* SIM_CLKDIV1 - SYSDIV: /1, SYSCLKMODE: /2 */
262 };
263 const osc_config_t oscConfig_BOARD_BootClockVLPR =
264 {
265 .freq = 0U, /* Oscillator frequency: 0Hz */
266 .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */
267 .workMode = kOSC_ModeOscLowPower, /* Oscillator low power */
268 .oscerConfig =
269 {
270 .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
271 }
272 };
273
274 /*******************************************************************************
275 * Code for BOARD_BootClockVLPR configuration
276 ******************************************************************************/
BOARD_BootClockVLPR(void)277 void BOARD_BootClockVLPR(void)
278 {
279 /* Set the system clock dividers in SIM to safe value. */
280 CLOCK_SetSimSafeDivs();
281 /* Set MCG to BLPI mode. */
282 CLOCK_BootToBlpiMode(mcgConfig_BOARD_BootClockVLPR.fcrdiv,
283 mcgConfig_BOARD_BootClockVLPR.ircs,
284 mcgConfig_BOARD_BootClockVLPR.irclkEnableMode);
285 /* Set the clock configuration in SIM module. */
286 CLOCK_SetSimConfig(&simConfig_BOARD_BootClockVLPR);
287 /* Set VLPR power mode. */
288 SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
289 #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
290 SMC_SetPowerModeVlpr(SMC, false);
291 #else
292 SMC_SetPowerModeVlpr(SMC);
293 #endif
294 while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr)
295 {
296 }
297 /* Set SystemCoreClock variable. */
298 SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK;
299 }
300
301
