1 /* 2 * Copyright 2018-2019 NXP. 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef _PIN_MUX_H_ 9 #define _PIN_MUX_H_ 10 11 /*! 12 * @addtogroup pin_mux 13 * @{ 14 */ 15 16 /*********************************************************************************************************************** 17 * API 18 **********************************************************************************************************************/ 19 20 #if defined(__cplusplus) 21 extern "C" { 22 #endif 23 24 /*! 25 * @brief Calls initialization functions. 26 * 27 */ 28 void BOARD_InitBootPins(void); 29 30 /*! 31 * @brief Configures pin routing and optionally pin electrical features. 32 * 33 */ 34 void BOARD_InitPins(void); 35 36 #define PORT_DFER_DFE_10_MASK 0x0400u /*!<@brief Digital Filter Enable Mask for item 10. */ 37 #define PORT_DFER_DFE_11_MASK 0x0800u /*!<@brief Digital Filter Enable Mask for item 11. */ 38 #define PORT_DFER_DFE_12_MASK 0x1000u /*!<@brief Digital Filter Enable Mask for item 12. */ 39 #define PORT_DFER_DFE_13_MASK 0x2000u /*!<@brief Digital Filter Enable Mask for item 13. */ 40 #define PORT_DFER_DFE_15_MASK 0x8000u /*!<@brief Digital Filter Enable Mask for item 15. */ 41 #define PORT_DFER_DFE_16_MASK 0x010000u /*!<@brief Digital Filter Enable Mask for item 16. */ 42 #define PORT_DFER_DFE_5_MASK 0x20u /*!<@brief Digital Filter Enable Mask for item 5. */ 43 44 /*! @name PORTC12 (number 50), D8[C]/FTM3_CH6/LEDYL 45 @{ */ 46 #define BOARD_LED_YELLOW_GPIO GPIOC /*!<@brief GPIO device name: GPIOC */ 47 #define BOARD_LED_YELLOW_PORT PORTC /*!<@brief PORT device name: PORTC */ 48 #define BOARD_LED_YELLOW_PIN 12U /*!<@brief PORTC pin index: 12 */ 49 /* @} */ 50 51 /*! @name PORTC10 (number 52), D6[C]/FTM3_CH4/LEDRD 52 @{ */ 53 #define BOARD_LED_RED1_GPIO GPIOC /*!<@brief GPIO device name: GPIOC */ 54 #define BOARD_LED_RED1_PORT PORTC /*!<@brief PORT device name: PORTC */ 55 #define BOARD_LED_RED1_PIN 10U /*!<@brief PORTC pin index: 10 */ 56 /* @} */ 57 58 /*! @name PORTC13 (number 49), D9[C]/FTM3_CH7/LEDOR 59 @{ */ 60 #define BOARD_LED_ORANGE_GPIO GPIOC /*!<@brief GPIO device name: GPIOC */ 61 #define BOARD_LED_ORANGE_PORT PORTC /*!<@brief PORT device name: PORTC */ 62 #define BOARD_LED_ORANGE_PIN 13U /*!<@brief PORTC pin index: 13 */ 63 /* @} */ 64 65 /*! @name PORTC11 (number 51), D7[C]/FTM3_CH5/LEDGR 66 @{ */ 67 #define BOARD_LED_GREEN1_GPIO GPIOC /*!<@brief GPIO device name: GPIOC */ 68 #define BOARD_LED_GREEN1_PORT PORTC /*!<@brief PORT device name: PORTC */ 69 #define BOARD_LED_GREEN1_PIN 11U /*!<@brief PORTC pin index: 11 */ 70 /* @} */ 71 72 /*! @name PORTB5 (number 27), J15[B57]/D5[3]/TRI_BL 73 @{ */ 74 #define BOARD_LED_BLUE_GPIO GPIOB /*!<@brief GPIO device name: GPIOB */ 75 #define BOARD_LED_BLUE_PORT PORTB /*!<@brief PORT device name: PORTB */ 76 #define BOARD_LED_BLUE_PIN 5U /*!<@brief PORTB pin index: 5 */ 77 /* @} */ 78 79 /*! @name PORTD15 (number 22), J15[B60]/D5[4]/TRI_GR 80 @{ */ 81 #define BOARD_LED_GREEN2_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */ 82 #define BOARD_LED_GREEN2_PORT PORTD /*!<@brief PORT device name: PORTD */ 83 #define BOARD_LED_GREEN2_PIN 15U /*!<@brief PORTD pin index: 15 */ 84 /* @} */ 85 86 /*! @name PORTD16 (number 21), J15[B59]/D5[1]/TRI_RED 87 @{ */ 88 #define BOARD_LED_RED2_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */ 89 #define BOARD_LED_RED2_PORT PORTD /*!<@brief PORT device name: PORTD */ 90 #define BOARD_LED_RED2_PIN 16U /*!<@brief PORTD pin index: 16 */ 91 /* @} */ 92 93 /*! 94 * @brief Configures pin routing and optionally pin electrical features. 95 * 96 */ 97 void BOARD_InitLEDsPins(void); 98 99 #define PORT_DFER_DFE_3_MASK 0x08u /*!<@brief Digital Filter Enable Mask for item 3. */ 100 #define PORT_DFER_DFE_6_MASK 0x40u /*!<@brief Digital Filter Enable Mask for item 6. */ 101 102 /*! @name PORTD3 (number 70), J15[B9]/SW2/LPSPI1_PCS0 103 @{ */ 104 #define BOARD_SW2_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */ 105 #define BOARD_SW2_PORT PORTD /*!<@brief PORT device name: PORTD */ 106 #define BOARD_SW2_PIN 3U /*!<@brief PORTD pin index: 3 */ 107 /* @} */ 108 109 /*! @name PORTD6 (number 32), J15[A11]/SW3 110 @{ */ 111 #define BOARD_SW3_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */ 112 #define BOARD_SW3_PORT PORTD /*!<@brief PORT device name: PORTD */ 113 #define BOARD_SW3_PIN 6U /*!<@brief PORTD pin index: 6 */ 114 /* @} */ 115 116 /*! 117 * @brief Configures pin routing and optionally pin electrical features. 118 * 119 */ 120 void BOARD_InitBUTTONSPins(void); 121 122 /*! @name PORTC2 (number 30), Y1[2]/XTAL32 123 @{ */ 124 #define BOARD_XTAL32_PORT PORTC /*!<@brief PORT device name: PORTC */ 125 #define BOARD_XTAL32_PIN 2U /*!<@brief PORTC pin index: 2 */ 126 /* @} */ 127 128 /*! @name PORTC3 (number 29), Y1[1]/EXTAL32 129 @{ */ 130 #define BOARD_EXTAL32_PORT PORTC /*!<@brief PORT device name: PORTC */ 131 #define BOARD_EXTAL32_PIN 3U /*!<@brief PORTC pin index: 3 */ 132 /* @} */ 133 134 /*! @name PORTB6 (number 16), X2[1]/XTAL 135 @{ */ 136 #define BOARD_XTAL0_PORT PORTB /*!<@brief PORT device name: PORTB */ 137 #define BOARD_XTAL0_PIN 6U /*!<@brief PORTB pin index: 6 */ 138 /* @} */ 139 140 /*! @name PORTB7 (number 15), J24[2]/EXTAL 141 @{ */ 142 #define BOARD_EXTAL0_PORT PORTB /*!<@brief PORT device name: PORTB */ 143 #define BOARD_EXTAL0_PIN 7U /*!<@brief PORTB pin index: 7 */ 144 /* @} */ 145 146 /*! 147 * @brief Configures pin routing and optionally pin electrical features. 148 * 149 */ 150 void BOARD_InitOSCPins(void); 151 152 #define PORT_DFER_DFE_15_MASK 0x8000u /*!<@brief Digital Filter Enable Mask for item 15. */ 153 #define PORT_DFER_DFE_2_MASK 0x04u /*!<@brief Digital Filter Enable Mask for item 2. */ 154 #define PORT_DFER_DFE_3_MASK 0x08u /*!<@brief Digital Filter Enable Mask for item 3. */ 155 156 /*! @name PORTA3 (number 72), J15[A7]/U4[4]/LPI2C0_SCL 157 @{ */ 158 #define BOARD_ACCEL_I2C_SCL_PORT PORTA /*!<@brief PORT device name: PORTA */ 159 #define BOARD_ACCEL_I2C_SCL_PIN 3U /*!<@brief PORTA pin index: 3 */ 160 /* @} */ 161 162 /*! @name PORTA2 (number 73), J15[A8]/U4[6]/LPI2C0_SDA 163 @{ */ 164 #define BOARD_ACCEL_I2C_SDA_PORT PORTA /*!<@brief PORT device name: PORTA */ 165 #define BOARD_ACCEL_I2C_SDA_PIN 2U /*!<@brief PORTA pin index: 2 */ 166 /* @} */ 167 168 /*! @name PORTC15 (number 45), U4[16]/FTM1_CH3/RST_FXOS8700CQ 169 @{ */ 170 #define BOARD_ACCEL_I2C_RST_GPIO GPIOC /*!<@brief GPIO device name: GPIOC */ 171 #define BOARD_ACCEL_I2C_RST_PORT PORTC /*!<@brief PORT device name: PORTC */ 172 #define BOARD_ACCEL_I2C_RST_PIN 15U /*!<@brief PORTC pin index: 15 */ 173 /* @} */ 174 175 /*! 176 * @brief Configures pin routing and optionally pin electrical features. 177 * 178 */ 179 void BOARD_InitACCELPins(void); 180 181 #define PORT_DFER_DFE_0_MASK 0x01u /*!<@brief Digital Filter Enable Mask for item 0. */ 182 #define PORT_DFER_DFE_1_MASK 0x02u /*!<@brief Digital Filter Enable Mask for item 1. */ 183 184 /*! @name PORTA0 (number 79), THER_A/ADC0_SE0 185 @{ */ 186 #define BOARD_THER_A_PORT PORTA /*!<@brief PORT device name: PORTA */ 187 #define BOARD_THER_A_PIN 0U /*!<@brief PORTA pin index: 0 */ 188 /* @} */ 189 190 /*! @name PORTA1 (number 78), THER_B/ADC0_SE1 191 @{ */ 192 #define BOARD_THER_B_PORT PORTA /*!<@brief PORT device name: PORTA */ 193 #define BOARD_THER_B_PIN 1U /*!<@brief PORTA pin index: 1 */ 194 /* @} */ 195 196 /*! 197 * @brief Configures pin routing and optionally pin electrical features. 198 * 199 */ 200 void BOARD_InitTHERMISTORPins(void); 201 202 #define PORT_DFER_DFE_14_MASK 0x4000u /*!<@brief Digital Filter Enable Mask for item 14. */ 203 204 /*! @name PORTC14 (number 46), J9[1]/ADC0_SE12/POT_5K 205 @{ */ 206 #define BOARD_POT_5K_PORT PORTC /*!<@brief PORT device name: PORTC */ 207 #define BOARD_POT_5K_PIN 14U /*!<@brief PORTC pin index: 14 */ 208 /* @} */ 209 210 /*! 211 * @brief Configures pin routing and optionally pin electrical features. 212 * 213 */ 214 void BOARD_InitPOTPins(void); 215 216 #define PORT_DFER_DFE_14_MASK 0x4000u /*!<@brief Digital Filter Enable Mask for item 14. */ 217 #define PORT_DFER_DFE_3_MASK 0x08u /*!<@brief Digital Filter Enable Mask for item 3. */ 218 #define PORT_DFER_DFE_6_MASK 0x40u /*!<@brief Digital Filter Enable Mask for item 6. */ 219 #define PORT_DFER_DFE_7_MASK 0x80u /*!<@brief Digital Filter Enable Mask for item 7. */ 220 221 /*! @name PORTC7 (number 80), J15[A42]/TP5/LPUART1_TX/IRTX 222 @{ */ 223 #define BOARD_IRTX_PORT PORTC /*!<@brief PORT device name: PORTC */ 224 #define BOARD_IRTX_PIN 7U /*!<@brief PORTC pin index: 7 */ 225 /* @} */ 226 227 /*! @name PORTE14 (number 17), TP4/IRRX 228 @{ */ 229 #define BOARD_IRRX_CMP_IN_PORT PORTE /*!<@brief PORT device name: PORTE */ 230 #define BOARD_IRRX_CMP_IN_PIN 14U /*!<@brief PORTE pin index: 14 */ 231 /* @} */ 232 233 /*! @name PORTE3 (number 18), J15[A41]/PTC6/LPUART1_RX 234 @{ */ 235 #define BOARD_IRRX_CMP_OUT_PORT PORTE /*!<@brief PORT device name: PORTE */ 236 #define BOARD_IRRX_CMP_OUT_PIN 3U /*!<@brief PORTE pin index: 3 */ 237 /* @} */ 238 239 /*! @name PORTC6 (number 81), J15[A41]/PTE3/LPUART1_RX 240 @{ */ 241 #define BOARD_IRRX_UART_PORT PORTC /*!<@brief PORT device name: PORTC */ 242 #define BOARD_IRRX_UART_PIN 6U /*!<@brief PORTC pin index: 6 */ 243 /* @} */ 244 245 /*! 246 * @brief Configures pin routing and optionally pin electrical features. 247 * 248 */ 249 void BOARD_InitIRPins(void); 250 251 #define PORT_DFER_DFE_4_MASK 0x10u /*!<@brief Digital Filter Enable Mask for item 4. */ 252 #define PORT_DFER_DFE_5_MASK 0x20u /*!<@brief Digital Filter Enable Mask for item 5. */ 253 254 /*! @name PORTE5 (number 8), J6[2]/CAN0_TX 255 @{ */ 256 #define BOARD_CAN0_TX_PORT PORTE /*!<@brief PORT device name: PORTE */ 257 #define BOARD_CAN0_TX_PIN 5U /*!<@brief PORTE pin index: 5 */ 258 /* @} */ 259 260 /*! @name PORTE4 (number 9), J7[2]/CAN0_RX 261 @{ */ 262 #define BOARD_CAN0_RX_PORT PORTE /*!<@brief PORT device name: PORTE */ 263 #define BOARD_CAN0_RX_PIN 4U /*!<@brief PORTE pin index: 4 */ 264 /* @} */ 265 266 /*! 267 * @brief Configures pin routing and optionally pin electrical features. 268 * 269 */ 270 void BOARD_InitCANPins(void); 271 272 #define PORT_DFER_DFE_0_MASK 0x01u /*!<@brief Digital Filter Enable Mask for item 0. */ 273 #define PORT_DFER_DFE_1_MASK 0x02u /*!<@brief Digital Filter Enable Mask for item 1. */ 274 275 /*! @name PORTB1 (number 53), J3[2]/LPUART0_TX_TGTMCU 276 @{ */ 277 #define BOARD_DEBUG_UART_TX_PORT PORTB /*!<@brief PORT device name: PORTB */ 278 #define BOARD_DEBUG_UART_TX_PIN 1U /*!<@brief PORTB pin index: 1 */ 279 /* @} */ 280 281 /*! @name PORTB0 (number 54), J5[2]/LPUART0_RX_TGTMCU 282 @{ */ 283 #define BOARD_DEBUG_UART_RX_PORT PORTB /*!<@brief PORT device name: PORTB */ 284 #define BOARD_DEBUG_UART_RX_PIN 0U /*!<@brief PORTB pin index: 0 */ 285 /* @} */ 286 287 /*! 288 * @brief Configures pin routing and optionally pin electrical features. 289 * 290 */ 291 void BOARD_InitDEBUG_UARTPins(void); 292 293 #if defined(__cplusplus) 294 } 295 #endif 296 297 /*! 298 * @} 299 */ 300 #endif /* _PIN_MUX_H_ */ 301 302 /*********************************************************************************************************************** 303 * EOF 304 **********************************************************************************************************************/ 305