1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017,2019 ,2021 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 /***********************************************************************************************************************
10 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
11 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
12 **********************************************************************************************************************/
13 /*
14 * How to set up clock using clock driver functions:
15 *
16 * 1. Setup clock sources.
17 *
18 * 2. Setup voltage for the fastest of the clock outputs
19 *
20 * 3. Set up wait states of the flash.
21 *
22 * 4. Set up all dividers.
23 *
24 * 5. Set up all selectors to provide selected clocks.
25 */
26
27 /* clang-format off */
28 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
29 !!GlobalInfo
30 product: Clocks v7.0
31 processor: LPC54S018J4M
32 package_id: LPC54S018J4MET180
33 mcu_data: ksdk2_0
34 processor_version: 9.0.0
35 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
36 /* clang-format on */
37
38 #include "fsl_power.h"
39 #include "fsl_clock.h"
40 #include "clock_config.h"
41
42 /*******************************************************************************
43 * Definitions
44 ******************************************************************************/
45
46 /*******************************************************************************
47 * Variables
48 ******************************************************************************/
49 /* System clock frequency. */
50 extern uint32_t SystemCoreClock;
51
52 /*******************************************************************************
53 ************************ BOARD_InitBootClocks function ************************
54 ******************************************************************************/
BOARD_InitBootClocks(void)55 void BOARD_InitBootClocks(void)
56 {
57 BOARD_BootClockFROHF96M();
58 }
59
60 /*******************************************************************************
61 ******************** Configuration BOARD_BootClockFRO12M **********************
62 ******************************************************************************/
63 /* clang-format off */
64 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
65 !!Configuration
66 name: BOARD_BootClockFRO12M
67 outputs:
68 - {id: FRO12M_clock.outFreq, value: 12 MHz}
69 - {id: FROHF_clock.outFreq, value: 48 MHz}
70 - {id: MAIN_clock.outFreq, value: 12 MHz}
71 - {id: System_clock.outFreq, value: 12 MHz}
72 settings:
73 - {id: SYSCON.EMCCLKDIV.scale, value: '1', locked: true}
74 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
75 /* clang-format on */
76
77 /*******************************************************************************
78 * Variables for BOARD_BootClockFRO12M configuration
79 ******************************************************************************/
80 /*******************************************************************************
81 * Code for BOARD_BootClockFRO12M configuration
82 ******************************************************************************/
BOARD_BootClockFRO12M(void)83 void BOARD_BootClockFRO12M(void)
84 {
85 /*!< Set up the clock sources */
86 /*!< Set up FRO */
87 POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
88 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
89 being below the voltage for current speed */
90 /*!< Need to make sure ROM and OTP has power(PDRUNCFG0[17,29]= 0U)
91 before calling this API since this API is implemented in ROM code */
92 CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
93 POWER_SetVoltageForFreq(12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
94
95 /*!< Set up dividers */
96 CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */
97
98 /*!< Set up clock selectors - Attach clocks to the peripheries */
99 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */
100 /* Set SystemCoreClock variable. */
101 SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
102 }
103
104 /*******************************************************************************
105 ******************* Configuration BOARD_BootClockFROHF48M *********************
106 ******************************************************************************/
107 /* clang-format off */
108 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
109 !!Configuration
110 name: BOARD_BootClockFROHF48M
111 outputs:
112 - {id: FRO12M_clock.outFreq, value: 12 MHz}
113 - {id: FROHF_clock.outFreq, value: 48 MHz}
114 - {id: MAIN_clock.outFreq, value: 48 MHz}
115 - {id: System_clock.outFreq, value: 48 MHz}
116 settings:
117 - {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
118 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
119 /* clang-format on */
120
121 /*******************************************************************************
122 * Variables for BOARD_BootClockFROHF48M configuration
123 ******************************************************************************/
124 /*******************************************************************************
125 * Code for BOARD_BootClockFROHF48M configuration
126 ******************************************************************************/
BOARD_BootClockFROHF48M(void)127 void BOARD_BootClockFROHF48M(void)
128 {
129 /*!< Set up the clock sources */
130 /*!< Set up FRO */
131 POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
132 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
133 being below the voltage for current speed */
134 POWER_SetVoltageForFreq(48000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
135 /*!< Need to make sure ROM and OTP has power(PDRUNCFG0[17,29]= 0U)
136 before calling this API since this API is implemented in ROM code */
137 CLOCK_SetupFROClocking(48000000U); /*!< Set up high frequency FRO output to selected frequency */
138
139 /*!< Set up dividers */
140 CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */
141
142 /*!< Set up clock selectors - Attach clocks to the peripheries */
143 CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
144 /* Set SystemCoreClock variable. */
145 SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK;
146 }
147
148 /*******************************************************************************
149 ******************* Configuration BOARD_BootClockFROHF96M *********************
150 ******************************************************************************/
151 /* clang-format off */
152 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
153 !!Configuration
154 name: BOARD_BootClockFROHF96M
155 called_from_default_init: true
156 outputs:
157 - {id: FRO12M_clock.outFreq, value: 12 MHz}
158 - {id: FROHF_clock.outFreq, value: 96 MHz}
159 - {id: MAIN_clock.outFreq, value: 96 MHz}
160 - {id: System_clock.outFreq, value: 96 MHz}
161 settings:
162 - {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
163 sources:
164 - {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
165 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
166 /* clang-format on */
167
168 /*******************************************************************************
169 * Variables for BOARD_BootClockFROHF96M configuration
170 ******************************************************************************/
171 /*******************************************************************************
172 * Code for BOARD_BootClockFROHF96M configuration
173 ******************************************************************************/
BOARD_BootClockFROHF96M(void)174 void BOARD_BootClockFROHF96M(void)
175 {
176 /*!< Set up the clock sources */
177 /*!< Set up FRO */
178 POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
179 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
180 being below the voltage for current speed */
181 POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
182 /*!< Need to make sure ROM and OTP has power(PDRUNCFG0[17,29]= 0U)
183 before calling this API since this API is implemented in ROM code */
184 CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
185
186 /*!< Set up dividers */
187 CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */
188
189 /*!< Set up clock selectors - Attach clocks to the peripheries */
190 CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
191 /* Set SystemCoreClock variable. */
192 SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
193 }
194
195 /*******************************************************************************
196 ******************** Configuration BOARD_BootClockPLL180M *********************
197 ******************************************************************************/
198 /* clang-format off */
199 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
200 !!Configuration
201 name: BOARD_BootClockPLL180M
202 outputs:
203 - {id: FRO12M_clock.outFreq, value: 12 MHz}
204 - {id: FROHF_clock.outFreq, value: 48 MHz}
205 - {id: MAIN_clock.outFreq, value: 180 MHz}
206 - {id: SYSPLL_clock.outFreq, value: 180 MHz}
207 - {id: System_clock.outFreq, value: 180 MHz}
208 settings:
209 - {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL_BYPASS}
210 - {id: SYSCON.M_MULT.scale, value: '30', locked: true}
211 - {id: SYSCON.N_DIV.scale, value: '1', locked: true}
212 - {id: SYSCON.PDEC.scale, value: '2', locked: true}
213 - {id: SYSCON_PDRUNCFG0_PDEN_SYS_PLL_CFG, value: Power_up}
214 sources:
215 - {id: SYSCON._clk_in.outFreq, value: 12 MHz, enabled: true}
216 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
217 /* clang-format on */
218
219 /*******************************************************************************
220 * Variables for BOARD_BootClockPLL180M configuration
221 ******************************************************************************/
222 /*******************************************************************************
223 * Code for BOARD_BootClockPLL180M configuration
224 ******************************************************************************/
BOARD_BootClockPLL180M(void)225 void BOARD_BootClockPLL180M(void)
226 {
227 /*!< Set up the clock sources */
228 /*!< Set up FRO */
229 POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
230 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
231 being below the voltage for current speed */
232 POWER_DisablePD(kPDRUNCFG_PD_SYS_OSC); /*!< Enable System Oscillator Power */
233 SYSCON->SYSOSCCTRL = ((SYSCON->SYSOSCCTRL & ~SYSCON_SYSOSCCTRL_FREQRANGE_MASK) | SYSCON_SYSOSCCTRL_FREQRANGE(0U)); /*!< Set system oscillator range */
234 POWER_SetVoltageForFreq(180000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
235 /*!< Set up SYS PLL */
236 const pll_setup_t pllSetup = {
237 .pllctrl = SYSCON_SYSPLLCTRL_SELI(32U) | SYSCON_SYSPLLCTRL_SELP(16U) | SYSCON_SYSPLLCTRL_SELR(0U),
238 .pllmdec = (SYSCON_SYSPLLMDEC_MDEC(8191U)),
239 .pllndec = (SYSCON_SYSPLLNDEC_NDEC(770U)),
240 .pllpdec = (SYSCON_SYSPLLPDEC_PDEC(98U)),
241 .pllRate = 180000000U,
242 .flags = PLL_SETUPFLAG_WAITLOCK | PLL_SETUPFLAG_POWERUP
243 };
244 CLOCK_AttachClk(kFRO12M_to_SYS_PLL); /*!< Set sys pll clock source*/
245 CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired value */
246
247 /*!< Set up dividers */
248 CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */
249
250 /*!< Set up clock selectors - Attach clocks to the peripheries */
251 CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch MAIN_CLK to SYS_PLL */
252 SYSCON->MAINCLKSELA = ((SYSCON->MAINCLKSELA & ~SYSCON_MAINCLKSELA_SEL_MASK) | SYSCON_MAINCLKSELA_SEL(0U)); /*!< Switch MAINCLKSELA to FRO12M even it is not used for MAINCLKSELB */
253 /* Set SystemCoreClock variable. */
254 SystemCoreClock = BOARD_BOOTCLOCKPLL180M_CORE_CLOCK;
255 }
256
257
