1 /*
2 * Copyright 2018 NXP.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 /***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12
13 /* clang-format off */
14 /*
15 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
16 !!GlobalInfo
17 product: Pins v4.1
18 processor: MKE15Z256xxx7
19 package_id: MKE15Z256VLL7
20 mcu_data: ksdk2_0
21 processor_version: 4.0.0
22 board: FRDM-KE15Z
23 pin_labels:
24 - {pin_num: '1', pin_signal: PTE16/FXIO_D3/TRGMUX_OUT7, label: 'J21[8]/FLEXIO_3'}
25 - {pin_num: '2', pin_signal: PTE15/FXIO_D2/TRGMUX_OUT6, label: 'J21[7]/FLEXIO_2'}
26 - {pin_num: '3', pin_signal: TSI0_CH5/PTD1/FTM0_CH3/LPSPI1_SIN/FTM2_CH1/FXIO_D1/TRGMUX_OUT2, label: 'J4[11]/TOUCH_TSI_5'}
27 - {pin_num: '4', pin_signal: TSI0_CH4/PTD0/FTM0_CH2/LPSPI1_SCK/FTM2_CH0/FXIO_D0/TRGMUX_OUT1, label: 'D4[1]/RGB_RED', identifier: LED_RED}
28 - {pin_num: '5', pin_signal: TSI0_CH3/PTE11/PWT_IN1/LPTMR0_ALT1/FXIO_D5/TRGMUX_OUT5, label: 'J2[15]/J21[10]/FLEXIO_5/TOUCH_EXT_2'}
29 - {pin_num: '6', pin_signal: TSI0_CH2/PTE10/CLKOUT/FXIO_D4/TRGMUX_OUT4, label: 'J2[17]/J21[9]/FLEXIO_4/TOUCH_EXT_3'}
30 - {pin_num: '8', pin_signal: TSI0_CH0/PTE5/TCLK2/FTM2_QD_PHA/FTM2_CH3/FXIO_D7/EWM_IN, label: 'J4[1]/TOUCH_TSI_0'}
31 - {pin_num: '9', pin_signal: TSI0_CH1/PTE4/BUSOUT/FTM2_QD_PHB/FTM2_CH2/FXIO_D6/EWM_OUT_b, label: 'J4[3]/TOUCH_TSI_1'}
32 - {pin_num: '15', pin_signal: EXTAL/PTB7/LPI2C0_SCL, label: 'Y1[1]/EXTAL', identifier: EXTAL}
33 - {pin_num: '16', pin_signal: XTAL/PTB6/LPI2C0_SDA, label: 'Y1[3]/XTAL', identifier: XTAL}
34 - {pin_num: '18', pin_signal: TSI0_CH24/PTE3/FTM0_FLT0/LPUART2_RTS/TRGMUX_IN6, label: 'J2[19]/TOUCH_EXT_4'}
35 - {pin_num: '19', pin_signal: PTE12/FTM0_FLT3/LPUART2_TX, label: 'J20[3]/BLUETOOTH_UART2_TX', identifier: BLUETOOTH_UART_TX}
36 - {pin_num: '20', pin_signal: PTD17/FTM0_FLT2/LPUART2_RX, label: 'J20[4]/BLUETOOTH_UART2_RX', identifier: BLUETOOTH_UART_RX}
37 - {pin_num: '21', pin_signal: PTD16/FTM0_CH1, label: 'D4[4]/RGB_GREEN', identifier: LED_GREEN}
38 - {pin_num: '22', pin_signal: PTD15/FTM0_CH0, label: 'D4[3]/RGB_BLUE', identifier: LED_BLUE}
39 - {pin_num: '23', pin_signal: DAC0_OUT/PTE9/FTM0_CH7/LPUART2_CTS, label: 'J1[10]/Arduino_D4'}
40 - {pin_num: '25', pin_signal: PTD13/RTC_CLKOUT, label: 'J6[3]/RF_GPIO_CE'}
41 - {pin_num: '26', pin_signal: ACMP0_IN3/TSI0_CH11/PTE8/FTM0_CH6, label: 'J2[2]/Arduino_D8'}
42 - {pin_num: '27', pin_signal: TSI0_CH9/PTB5/FTM0_CH5/LPSPI0_PCS1/TRGMUX_IN0/ACMP1_OUT, label: 'J4[5]/TOUCH_TSI_2'}
43 - {pin_num: '28', pin_signal: ACMP1_IN2/TSI0_CH8/PTB4/FTM0_CH4/LPSPI0_SOUT/TRGMUX_IN1, label: 'J4[7]/TOUCH_TSI_3'}
44 - {pin_num: '29', pin_signal: ADC0_SE11/ACMP0_IN4/EXTAL32/PTC3/FTM0_CH3, label: 'Y2[1]/EXTAL32', identifier: EXTAL32}
45 - {pin_num: '30', pin_signal: ADC0_SE10/ACMP0_IN5/XTAL32/PTC2/FTM0_CH2, label: 'Y2[2]/XTAL32', identifier: XTAL32}
46 - {pin_num: '31', pin_signal: TSI0_CH10/PTD7/LPUART2_TX/FTM2_FLT3, label: 'J4[9]/TOUCH_TSI_4'}
47 - {pin_num: '32', pin_signal: TSI0_CH7/PTD6/LPUART2_RX/FTM2_FLT2, label: 'J2[13]/TOUCH_EXT_1'}
48 - {pin_num: '33', pin_signal: TSI0_CH6/PTD5/FTM2_CH3/LPTMR0_ALT2/PWT_IN2/TRGMUX_IN7, label: 'J2[11]/TOUCH_EXT_0'}
49 - {pin_num: '34', pin_signal: PTD12/FTM2_CH2/LPI2C1_HREQ/LPUART2_RTS, label: 'J1[6]/Arduino_D2'}
50 - {pin_num: '35', pin_signal: PTD11/FTM2_CH1/FTM2_QD_PHA/LPUART2_CTS, label: 'J3[3]/MC_ENC_A'}
51 - {pin_num: '36', pin_signal: PTD10/FTM2_CH0/FTM2_QD_PHB, label: 'J3[1]/MC_ENC_B'}
52 - {pin_num: '39', pin_signal: ADC0_SE9/ACMP1_IN3/TSI0_CH23/PTC1/FTM0_CH1, label: 'E2[1]/TOUCH_PAD_1_TSI_23', identifier: TSI_ELECTRODE_2}
53 - {pin_num: '40', pin_signal: ADC0_SE8/ACMP1_IN4/TSI0_CH22/PTC0/FTM0_CH0, label: 'E1[1]/TOUCH_PAD_0_TSI_22', identifier: TSI_ELECTRODE_1}
54 - {pin_num: '41', pin_signal: ACMP1_IN5/PTD9/LPI2C1_SCL/FTM2_FLT3, label: 'J2[20]/Arduino_D15'}
55 - {pin_num: '42', pin_signal: PTD8/LPI2C1_SDA/FTM2_FLT2, label: 'J2[18]/Arduino_D14'}
56 - {pin_num: '43', pin_signal: ADC0_SE15/PTC17/FTM1_FLT3/LPI2C1_SCLS, label: 'J21[3]/FLEXIO_ADC'}
57 - {pin_num: '45', pin_signal: ADC0_SE13/PTC15/FTM1_CH3, label: 'J1[8]/Arduino_D3'}
58 - {pin_num: '46', pin_signal: ADC0_SE12/PTC14/FTM1_CH2, label: 'J1[3]/MC_ENC_I'}
59 - {pin_num: '47', pin_signal: ADC0_SE7/TSI0_CH21/PTB3/FTM1_CH1/LPSPI0_SIN/FTM1_QD_PHA/TRGMUX_IN2, label: 'J2[9]/RC_ADC0_SE7/MC_CUR_DCB'}
60 - {pin_num: '48', pin_signal: ADC0_SE6/TSI0_CH20/PTB2/FTM1_CH0/LPSPI0_SCK/FTM1_QD_PHB/TRGMUX_IN3, label: 'J2[5]/MC_BEMF_C/CUR_C'}
61 - {pin_num: '53', pin_signal: ADC0_SE5/PTB1/LPUART0_TX/LPSPI0_SOUT/TCLK0, label: 'J2[3]/MC_BEMF_B/CUR_B'}
62 - {pin_num: '54', pin_signal: ADC0_SE4/PTB0/LPUART0_RX/LPSPI0_PCS0/LPTMR0_ALT3/PWT_IN3, label: 'J2[1]/MC_BEMF_A/CUR_A'}
63 - {pin_num: '55', pin_signal: PTC9/LPUART1_TX/LPUART0_RTS, label: 'J1[4]/Arduino_D1_UART0_TX'}
64 - {pin_num: '56', pin_signal: PTC8/LPUART1_RX/LPUART0_CTS, label: 'J1[2]/Arduino_D0_UART0_RX'}
65 - {pin_num: '57', pin_signal: ADC0_SE3/ACMP1_IN1/PTA7/FTM0_FLT2/RTC_CLKIN/LPUART1_RTS, label: 'J4[8]/Arduino_A3_ADC0_SE3'}
66 - {pin_num: '58', pin_signal: ADC0_SE2/ACMP1_IN0/PTA6/FTM0_FLT1/LPSPI1_PCS1/LPUART1_CTS, label: 'J4[6]/Arduino_A2_ADC0_SE2'}
67 - {pin_num: '59', pin_signal: PTE7/FTM0_CH7, label: 'J2[4]/Arduino_D9'}
68 - {pin_num: '62', pin_signal: PTA17/FTM0_CH6/EWM_OUT_b, label: 'J1[16]/Arduino_D7'}
69 - {pin_num: '63', pin_signal: PTB17/FTM0_CH5/LPSPI1_PCS3, label: 'J3[5]/J6[4]/MC_PWM_CB/RF_SPI1_PCS3'}
70 - {pin_num: '64', pin_signal: PTB16/FTM0_CH4/LPSPI1_SOUT, label: 'J3[7]/J6[6]/MC_PWM_CT/RF_SPI1_SOUT'}
71 - {pin_num: '65', pin_signal: PTB15/FTM0_CH3/LPSPI1_SIN, label: 'J3[9]/J6[7]/MC_PWM_BB/RF_SPI1_SIN'}
72 - {pin_num: '66', pin_signal: ADC1_SE9/PTB14/FTM0_CH2/LPSPI1_SCK, label: 'J3[11]/J6[5]/MC_PWM_BT/RF_SPI1_SCK'}
73 - {pin_num: '67', pin_signal: ADC1_SE8/PTB13/FTM0_CH1, label: 'J3[13]/J6[8]/MC_PWM_AB/RF_GPIO_IRQ'}
74 - {pin_num: '68', pin_signal: ADC1_SE7/PTB12/FTM0_CH0, label: 'J3[15]/MC_PWM_AT'}
75 - {pin_num: '69', pin_signal: ADC1_SE6/PTD4/FTM0_FLT3, label: THERM_1, identifier: THERM_1}
76 - {pin_num: '70', pin_signal: ADC1_SE3/PTD3/LPSPI1_PCS0/FXIO_D5/TRGMUX_IN4/NMI_b, label: SW3, identifier: SW3}
77 - {pin_num: '71', pin_signal: ADC1_SE2/PTD2/LPSPI1_SOUT/FXIO_D4/TRGMUX_IN5, label: THERM_0, identifier: THERM_0}
78 - {pin_num: '72', pin_signal: ADC1_SE1/PTA3/LPI2C0_SCL/EWM_IN/LPUART0_TX, label: 'J4[12]/Arduino_A5_ADC1_SE1/FXOS_SCL', identifier: ACCEL_I2C_SCL}
79 - {pin_num: '73', pin_signal: ADC1_SE0/PTA2/LPI2C0_SDA/EWM_OUT_b/LPUART0_RX, label: 'J4[10]/Arduino_A4_ADC1_SE0/FXOS_SDA', identifier: ACCEL_I2C_SDA}
80 - {pin_num: '74', pin_signal: PTB11/LPI2C0_HREQ, label: SW2, identifier: SW2}
81 - {pin_num: '75', pin_signal: PTB10/LPI2C0_SDAS, label: 'U1[2]/FXOS_INT', identifier: ACCEL_INT}
82 - {pin_num: '76', pin_signal: PTB9/LPI2C0_SCLS, label: 'U1[3]/FXOS_RST', identifier: ACCEL_RST}
83 - {pin_num: '78', pin_signal: ADC0_SE1/ACMP0_IN1/TSI0_CH18/PTA1/FTM1_CH1/LPI2C0_SDAS/FXIO_D3/FTM1_QD_PHA/LPUART0_RTS/TRGMUX_OUT0, label: 'J4[4]/J21[4]/Arduino_A1_ADC0_SE1/FLEXIO_TIMER'}
84 - {pin_num: '79', pin_signal: ADC0_SE0/ACMP0_IN0/TSI0_CH17/PTA0/FTM2_CH1/LPI2C0_SCLS/FXIO_D2/FTM2_QD_PHA/LPUART0_CTS/TRGMUX_OUT3, label: 'J4[2]/Arduino_A0_ADC0_SE0'}
85 - {pin_num: '80', pin_signal: ADC1_SE5/TSI0_CH16/PTC7/LPUART1_TX, label: UART1_TX_TGTMCU, identifier: DEBUG_UART_TX}
86 - {pin_num: '81', pin_signal: ADC1_SE4/TSI0_CH15/PTC6/LPUART1_RX, label: UART1_RX_TGTMCU, identifier: DEBUG_UART_RX}
87 - {pin_num: '82', pin_signal: PTA16/FTM1_CH3/LPSPI1_PCS2, label: 'J1[14]/Arduino_D6'}
88 - {pin_num: '83', pin_signal: PTA15/FTM1_CH2/LPSPI0_PCS3, label: 'J2[6]/Arduino_D10_SPI0_PCS3'}
89 - {pin_num: '84', pin_signal: ADC1_SE11/PTE6/LPSPI0_PCS2/LPUART1_RTS, label: 'J2[7]/MC_VOLT_DCB'}
90 - {pin_num: '85', pin_signal: ADC1_SE10/TSI0_CH19/PTE2/LPSPI0_SOUT/LPTMR0_ALT3/PWT_IN3/LPUART1_CTS, label: 'J2[8]/Arduino_D11_SPI0_SOUT'}
91 - {pin_num: '91', pin_signal: PTA11/LPUART0_RX/FXIO_D1, label: 'J21[6]/FLEXIO_1'}
92 - {pin_num: '92', pin_signal: PTA10/LPUART0_TX/FXIO_D0, label: 'J21[5]/FLEXIO_0'}
93 - {pin_num: '93', pin_signal: TSI0_CH14/PTE1/LPSPI0_SIN/LPI2C0_HREQ/LPI2C1_SCL, label: 'J2[10]/Arduino_D12_SPI0_SIN'}
94 - {pin_num: '94', pin_signal: TSI0_CH13/PTE0/LPSPI0_SCK/TCLK1/LPI2C1_SDA/FTM1_FLT2, label: 'J2[12]/Arduino_D13_SPI0_SCK'}
95 - {pin_num: '95', pin_signal: TSI0_CH12/PTC5/FTM2_CH0/RTC_CLKOUT/LPI2C1_HREQ/FTM2_QD_PHB, label: 'J1[12]/Arduino_D5'}
96 - {pin_num: '96', pin_signal: ACMP0_IN2/PTC4/FTM1_CH0/RTC_CLKOUT/EWM_IN/FTM1_QD_PHB/SWD_CLK, label: 'J7[1]/J17[4]/SWD_CLK'}
97 - {pin_num: '97', pin_signal: PTA5/TCLK1/RESET_b, label: 'J3[6]/J10[3]/U12[7]/J17[10]/RESET/RST_TGTMCU_b'}
98 - {pin_num: '98', pin_signal: PTA4/ACMP0_OUT/EWM_OUT_b/SWD_DIO, label: 'J17[2]/SWD_DIO_TGTMCU'}
99 - {pin_num: '99', pin_signal: PTA9/FXIO_D7/FTM1_FLT3, label: 'J21[12]/FLEXIO_7'}
100 - {pin_num: '100', pin_signal: PTA8/FXIO_D6, label: 'J21[11]/FLEXIO_6'}
101 - {pin_num: '10', pin_signal: VDD10, label: VDD_KE15Z}
102 - {pin_num: '38', pin_signal: VDD39, label: VDD_KE15Z}
103 - {pin_num: '61', pin_signal: VDD62, label: VDD_KE15Z}
104 - {pin_num: '87', pin_signal: VDD88, label: VDD_KE15Z}
105 - {pin_num: '12', pin_signal: VREFH, label: VDD_KE15Z}
106 - {pin_num: '13', pin_signal: VREFL, label: GND}
107 - {pin_num: '11', pin_signal: VDDA, label: VDD_KE15Z}
108 - {pin_num: '14', pin_signal: VSS15, label: GND}
109 - {pin_num: '37', pin_signal: VSS38, label: GND}
110 - {pin_num: '60', pin_signal: VSS61, label: GND}
111 - {pin_num: '86', pin_signal: VSS87, label: GND}
112 - {pin_num: '88', pin_signal: PTA14/FTM0_FLT0/EWM_IN/BUSOUT, label: NC}
113 - {pin_num: '89', pin_signal: PTA13/LPI2C1_SCLS, label: NC}
114 - {pin_num: '90', pin_signal: PTA12/LPI2C1_SDAS, label: NC}
115 - {pin_num: '77', pin_signal: PTB8, label: NC}
116 - {pin_num: '49', pin_signal: PTC13, label: NC}
117 - {pin_num: '50', pin_signal: PTC12, label: NC}
118 - {pin_num: '51', pin_signal: PTC11, label: NC}
119 - {pin_num: '52', pin_signal: PTC10, label: NC}
120 - {pin_num: '44', pin_signal: ADC0_SE14/PTC16/FTM1_FLT2/LPI2C1_SDAS, label: NC}
121 - {pin_num: '24', pin_signal: PTD14/CLKOUT, label: NC}
122 - {pin_num: '17', pin_signal: PTE14/FTM0_FLT1, label: NC}
123 - {pin_num: '7', pin_signal: PTE13, label: NC}
124 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
125 */
126 /* clang-format on */
127
128 #include "fsl_common.h"
129 #include "fsl_port.h"
130 #include "fsl_gpio.h"
131 #include "pin_mux.h"
132
133 /* FUNCTION ************************************************************************************************************
134 *
135 * Function Name : BOARD_InitBootPins
136 * Description : Calls initialization functions.
137 *
138 * END ****************************************************************************************************************/
BOARD_InitBootPins(void)139 void BOARD_InitBootPins(void)
140 {
141 BOARD_InitPins();
142 BOARD_InitDEBUG_UARTPins();
143 }
144
145 /* clang-format off */
146 /*
147 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
148 BOARD_InitPins:
149 - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'}
150 - pin_list: []
151 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
152 */
153 /* clang-format on */
154
155 /* FUNCTION ************************************************************************************************************
156 *
157 * Function Name : BOARD_InitPins
158 * Description : Configures pin routing and optionally pin electrical features.
159 *
160 * END ****************************************************************************************************************/
BOARD_InitPins(void)161 void BOARD_InitPins(void)
162 {
163 }
164
165 /* clang-format off */
166 /*
167 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
168 BOARD_InitTOUCHPins:
169 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
170 - pin_list:
171 - {pin_num: '40', peripheral: TSI, signal: 'CH, 22', pin_signal: ADC0_SE8/ACMP1_IN4/TSI0_CH22/PTC0/FTM0_CH0, drive_strength: low, pull_select: down, pull_enable: disable,
172 passive_filter: disable, digital_filter: disable}
173 - {pin_num: '39', peripheral: TSI, signal: 'CH, 23', pin_signal: ADC0_SE9/ACMP1_IN3/TSI0_CH23/PTC1/FTM0_CH1, drive_strength: low, pull_select: down, pull_enable: disable,
174 passive_filter: disable, digital_filter: disable}
175 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
176 */
177 /* clang-format on */
178
179 /* FUNCTION ************************************************************************************************************
180 *
181 * Function Name : BOARD_InitTOUCHPins
182 * Description : Configures pin routing and optionally pin electrical features.
183 *
184 * END ****************************************************************************************************************/
BOARD_InitTOUCHPins(void)185 void BOARD_InitTOUCHPins(void)
186 {
187 /* Clock Control: 0x01u */
188 CLOCK_EnableClock(kCLOCK_PortC);
189 /* Configure digital filter */
190 PORT_EnablePinsDigitalFilter(
191 /* Digital filter is configured on port C */
192 PORTC,
193 /* Digital filter is configured for PORTC0 */
194 PORT_DFER_DFE_0_MASK
195 /* Digital filter is configured for PORTC1 */
196 | PORT_DFER_DFE_1_MASK,
197 /* Disable digital filter */
198 false);
199
200 const port_pin_config_t TSI_ELECTRODE_1 = {/* Internal pull-up/down resistor is disabled */
201 kPORT_PullDisable,
202 /* Passive filter is disabled */
203 kPORT_PassiveFilterDisable,
204 /* Low drive strength is configured */
205 kPORT_LowDriveStrength,
206 /* Pin is configured as TSI0_CH22 */
207 kPORT_PinDisabledOrAnalog,
208 /* Pin Control Register fields [15:0] are not locked */
209 kPORT_UnlockRegister};
210 /* PORTC0 (pin 40) is configured as TSI0_CH22 */
211 PORT_SetPinConfig(BOARD_TSI_ELECTRODE_1_PORT, BOARD_TSI_ELECTRODE_1_PIN, &TSI_ELECTRODE_1);
212
213 const port_pin_config_t TSI_ELECTRODE_2 = {/* Internal pull-up/down resistor is disabled */
214 kPORT_PullDisable,
215 /* Passive filter is disabled */
216 kPORT_PassiveFilterDisable,
217 /* Low drive strength is configured */
218 kPORT_LowDriveStrength,
219 /* Pin is configured as TSI0_CH23 */
220 kPORT_PinDisabledOrAnalog,
221 /* Pin Control Register fields [15:0] are not locked */
222 kPORT_UnlockRegister};
223 /* PORTC1 (pin 39) is configured as TSI0_CH23 */
224 PORT_SetPinConfig(BOARD_TSI_ELECTRODE_2_PORT, BOARD_TSI_ELECTRODE_2_PIN, &TSI_ELECTRODE_2);
225 }
226
227 /* clang-format off */
228 /*
229 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
230 BOARD_InitBUTTONSPins:
231 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
232 - pin_list:
233 - {pin_num: '74', peripheral: GPIOB, signal: 'GPIO, 11', pin_signal: PTB11/LPI2C0_HREQ, direction: INPUT, drive_strength: low, pull_select: down, pull_enable: disable,
234 passive_filter: disable, digital_filter: disable}
235 - {pin_num: '70', peripheral: GPIOD, signal: 'GPIO, 3', pin_signal: ADC1_SE3/PTD3/LPSPI1_PCS0/FXIO_D5/TRGMUX_IN4/NMI_b, direction: INPUT, drive_strength: low, pull_select: down,
236 pull_enable: disable, passive_filter: disable, digital_filter: disable}
237 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
238 */
239 /* clang-format on */
240
241 /* FUNCTION ************************************************************************************************************
242 *
243 * Function Name : BOARD_InitBUTTONSPins
244 * Description : Configures pin routing and optionally pin electrical features.
245 *
246 * END ****************************************************************************************************************/
BOARD_InitBUTTONSPins(void)247 void BOARD_InitBUTTONSPins(void)
248 {
249 /* Clock Control: 0x01u */
250 CLOCK_EnableClock(kCLOCK_PortB);
251 /* Clock Control: 0x01u */
252 CLOCK_EnableClock(kCLOCK_PortD);
253
254 gpio_pin_config_t SW2_config = {
255 .pinDirection = kGPIO_DigitalInput,
256 .outputLogic = 0U
257 };
258 /* Initialize GPIO functionality on pin PTB11 (pin 74) */
259 GPIO_PinInit(BOARD_SW2_GPIO, BOARD_SW2_PIN, &SW2_config);
260
261 gpio_pin_config_t SW3_config = {
262 .pinDirection = kGPIO_DigitalInput,
263 .outputLogic = 0U
264 };
265 /* Initialize GPIO functionality on pin PTD3 (pin 70) */
266 GPIO_PinInit(BOARD_SW3_GPIO, BOARD_SW3_PIN, &SW3_config);
267 /* Configure digital filter */
268 PORT_EnablePinsDigitalFilter(
269 /* Digital filter is configured on port B */
270 PORTB,
271 /* Digital filter is configured for PORTB0 */
272 PORT_DFER_DFE_11_MASK,
273 /* Disable digital filter */
274 false);
275
276 const port_pin_config_t SW2 = {/* Internal pull-up/down resistor is disabled */
277 kPORT_PullDisable,
278 /* Passive filter is disabled */
279 kPORT_PassiveFilterDisable,
280 /* Low drive strength is configured */
281 kPORT_LowDriveStrength,
282 /* Pin is configured as PTB11 */
283 kPORT_MuxAsGpio,
284 /* Pin Control Register fields [15:0] are not locked */
285 kPORT_UnlockRegister};
286 /* PORTB11 (pin 74) is configured as PTB11 */
287 PORT_SetPinConfig(BOARD_SW2_PORT, BOARD_SW2_PIN, &SW2);
288 /* Configure digital filter */
289 PORT_EnablePinsDigitalFilter(
290 /* Digital filter is configured on port D */
291 PORTD,
292 /* Digital filter is configured for PORTD0 */
293 PORT_DFER_DFE_3_MASK,
294 /* Disable digital filter */
295 false);
296
297 const port_pin_config_t SW3 = {/* Internal pull-up/down resistor is disabled */
298 kPORT_PullDisable,
299 /* Passive filter is disabled */
300 kPORT_PassiveFilterDisable,
301 /* Low drive strength is configured */
302 kPORT_LowDriveStrength,
303 /* Pin is configured as PTD3 */
304 kPORT_MuxAsGpio,
305 /* Pin Control Register fields [15:0] are not locked */
306 kPORT_UnlockRegister};
307 /* PORTD3 (pin 70) is configured as PTD3 */
308 PORT_SetPinConfig(BOARD_SW3_PORT, BOARD_SW3_PIN, &SW3);
309 }
310
311 /* clang-format off */
312 /*
313 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
314 BOARD_InitLEDsPins:
315 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
316 - pin_list:
317 - {pin_num: '4', peripheral: GPIOD, signal: 'GPIO, 0', pin_signal: TSI0_CH4/PTD0/FTM0_CH2/LPSPI1_SCK/FTM2_CH0/FXIO_D0/TRGMUX_OUT1, direction: OUTPUT, gpio_init_state: 'true',
318 drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable}
319 - {pin_num: '21', peripheral: GPIOD, signal: 'GPIO, 16', pin_signal: PTD16/FTM0_CH1, direction: OUTPUT, gpio_init_state: 'true', drive_strength: low, pull_select: down,
320 pull_enable: disable, passive_filter: disable, digital_filter: disable}
321 - {pin_num: '22', peripheral: GPIOD, signal: 'GPIO, 15', pin_signal: PTD15/FTM0_CH0, direction: OUTPUT, gpio_init_state: 'true', drive_strength: low, pull_select: down,
322 pull_enable: disable, passive_filter: disable, digital_filter: disable}
323 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
324 */
325 /* clang-format on */
326
327 /* FUNCTION ************************************************************************************************************
328 *
329 * Function Name : BOARD_InitLEDsPins
330 * Description : Configures pin routing and optionally pin electrical features.
331 *
332 * END ****************************************************************************************************************/
BOARD_InitLEDsPins(void)333 void BOARD_InitLEDsPins(void)
334 {
335 /* Clock Control: 0x01u */
336 CLOCK_EnableClock(kCLOCK_PortD);
337
338 gpio_pin_config_t LED_RED_config = {
339 .pinDirection = kGPIO_DigitalOutput,
340 .outputLogic = 1U
341 };
342 /* Initialize GPIO functionality on pin PTD0 (pin 4) */
343 GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_PIN, &LED_RED_config);
344
345 gpio_pin_config_t LED_BLUE_config = {
346 .pinDirection = kGPIO_DigitalOutput,
347 .outputLogic = 1U
348 };
349 /* Initialize GPIO functionality on pin PTD15 (pin 22) */
350 GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_PIN, &LED_BLUE_config);
351
352 gpio_pin_config_t LED_GREEN_config = {
353 .pinDirection = kGPIO_DigitalOutput,
354 .outputLogic = 1U
355 };
356 /* Initialize GPIO functionality on pin PTD16 (pin 21) */
357 GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_PIN, &LED_GREEN_config);
358 /* Configure digital filter */
359 PORT_EnablePinsDigitalFilter(
360 /* Digital filter is configured on port D */
361 PORTD,
362 /* Digital filter is configured for PORTD0 */
363 PORT_DFER_DFE_0_MASK
364 /* Digital filter is configured for PORTD1 */
365 | PORT_DFER_DFE_15_MASK
366 /* Digital filter is configured for PORTD2 */
367 | PORT_DFER_DFE_16_MASK,
368 /* Disable digital filter */
369 false);
370
371 const port_pin_config_t LED_RED = {/* Internal pull-up/down resistor is disabled */
372 kPORT_PullDisable,
373 /* Passive filter is disabled */
374 kPORT_PassiveFilterDisable,
375 /* Low drive strength is configured */
376 kPORT_LowDriveStrength,
377 /* Pin is configured as PTD0 */
378 kPORT_MuxAsGpio,
379 /* Pin Control Register fields [15:0] are not locked */
380 kPORT_UnlockRegister};
381 /* PORTD0 (pin 4) is configured as PTD0 */
382 PORT_SetPinConfig(BOARD_LED_RED_PORT, BOARD_LED_RED_PIN, &LED_RED);
383
384 const port_pin_config_t LED_BLUE = {/* Internal pull-up/down resistor is disabled */
385 kPORT_PullDisable,
386 /* Passive filter is disabled */
387 kPORT_PassiveFilterDisable,
388 /* Low drive strength is configured */
389 kPORT_LowDriveStrength,
390 /* Pin is configured as PTD15 */
391 kPORT_MuxAsGpio,
392 /* Pin Control Register fields [15:0] are not locked */
393 kPORT_UnlockRegister};
394 /* PORTD15 (pin 22) is configured as PTD15 */
395 PORT_SetPinConfig(BOARD_LED_BLUE_PORT, BOARD_LED_BLUE_PIN, &LED_BLUE);
396
397 const port_pin_config_t LED_GREEN = {/* Internal pull-up/down resistor is disabled */
398 kPORT_PullDisable,
399 /* Passive filter is disabled */
400 kPORT_PassiveFilterDisable,
401 /* Low drive strength is configured */
402 kPORT_LowDriveStrength,
403 /* Pin is configured as PTD16 */
404 kPORT_MuxAsGpio,
405 /* Pin Control Register fields [15:0] are not locked */
406 kPORT_UnlockRegister};
407 /* PORTD16 (pin 21) is configured as PTD16 */
408 PORT_SetPinConfig(BOARD_LED_GREEN_PORT, BOARD_LED_GREEN_PIN, &LED_GREEN);
409 }
410
411 /* clang-format off */
412 /*
413 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
414 BOARD_InitOSCPins:
415 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
416 - pin_list:
417 - {pin_num: '15', peripheral: SCG, signal: EXTAL0, pin_signal: EXTAL/PTB7/LPI2C0_SCL, drive_strength: no_init, pull_select: no_init, pull_enable: no_init, passive_filter: no_init,
418 digital_filter: no_init}
419 - {pin_num: '16', peripheral: SCG, signal: XTAL0, pin_signal: XTAL/PTB6/LPI2C0_SDA, drive_strength: no_init, pull_select: no_init, pull_enable: no_init, passive_filter: no_init,
420 digital_filter: no_init}
421 - {pin_num: '29', peripheral: OSC32, signal: EXTAL32, pin_signal: ADC0_SE11/ACMP0_IN4/EXTAL32/PTC3/FTM0_CH3, drive_strength: no_init, pull_select: no_init, pull_enable: no_init,
422 passive_filter: no_init, digital_filter: no_init}
423 - {pin_num: '30', peripheral: OSC32, signal: XTAL32, pin_signal: ADC0_SE10/ACMP0_IN5/XTAL32/PTC2/FTM0_CH2, drive_strength: no_init, pull_select: no_init, pull_enable: no_init,
424 passive_filter: no_init, digital_filter: no_init}
425 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
426 */
427 /* clang-format on */
428
429 /* FUNCTION ************************************************************************************************************
430 *
431 * Function Name : BOARD_InitOSCPins
432 * Description : Configures pin routing and optionally pin electrical features.
433 *
434 * END ****************************************************************************************************************/
BOARD_InitOSCPins(void)435 void BOARD_InitOSCPins(void)
436 {
437 /* Clock Control: 0x01u */
438 CLOCK_EnableClock(kCLOCK_PortB);
439 /* Clock Control: 0x01u */
440 CLOCK_EnableClock(kCLOCK_PortC);
441
442 /* PORTB6 (pin 16) is configured as XTAL */
443 PORT_SetPinMux(BOARD_XTAL_PORT, BOARD_XTAL_PIN, kPORT_PinDisabledOrAnalog);
444
445 /* PORTB7 (pin 15) is configured as EXTAL */
446 PORT_SetPinMux(BOARD_EXTAL_PORT, BOARD_EXTAL_PIN, kPORT_PinDisabledOrAnalog);
447
448 /* PORTC2 (pin 30) is configured as XTAL32 */
449 PORT_SetPinMux(BOARD_XTAL32_PORT, BOARD_XTAL32_PIN, kPORT_PinDisabledOrAnalog);
450
451 /* PORTC3 (pin 29) is configured as EXTAL32 */
452 PORT_SetPinMux(BOARD_EXTAL32_PORT, BOARD_EXTAL32_PIN, kPORT_PinDisabledOrAnalog);
453 }
454
455 /* clang-format off */
456 /*
457 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
458 BOARD_InitTHERMISTORPins:
459 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
460 - pin_list:
461 - {pin_num: '69', peripheral: ADC1, signal: 'SE, 6', pin_signal: ADC1_SE6/PTD4/FTM0_FLT3, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable,
462 digital_filter: disable}
463 - {pin_num: '71', peripheral: ADC1, signal: 'SE, 2', pin_signal: ADC1_SE2/PTD2/LPSPI1_SOUT/FXIO_D4/TRGMUX_IN5, drive_strength: low, pull_select: down, pull_enable: disable,
464 passive_filter: disable, digital_filter: disable}
465 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
466 */
467 /* clang-format on */
468
469 /* FUNCTION ************************************************************************************************************
470 *
471 * Function Name : BOARD_InitTHERMISTORPins
472 * Description : Configures pin routing and optionally pin electrical features.
473 *
474 * END ****************************************************************************************************************/
BOARD_InitTHERMISTORPins(void)475 void BOARD_InitTHERMISTORPins(void)
476 {
477 /* Clock Control: 0x01u */
478 CLOCK_EnableClock(kCLOCK_PortD);
479 /* Configure digital filter */
480 PORT_EnablePinsDigitalFilter(
481 /* Digital filter is configured on port D */
482 PORTD,
483 /* Digital filter is configured for PORTD0 */
484 PORT_DFER_DFE_2_MASK
485 /* Digital filter is configured for PORTD1 */
486 | PORT_DFER_DFE_4_MASK,
487 /* Disable digital filter */
488 false);
489
490 const port_pin_config_t THERM_0 = {/* Internal pull-up/down resistor is disabled */
491 kPORT_PullDisable,
492 /* Passive filter is disabled */
493 kPORT_PassiveFilterDisable,
494 /* Low drive strength is configured */
495 kPORT_LowDriveStrength,
496 /* Pin is configured as ADC1_SE2 */
497 kPORT_PinDisabledOrAnalog,
498 /* Pin Control Register fields [15:0] are not locked */
499 kPORT_UnlockRegister};
500 /* PORTD2 (pin 71) is configured as ADC1_SE2 */
501 PORT_SetPinConfig(BOARD_THERM_0_PORT, BOARD_THERM_0_PIN, &THERM_0);
502
503 const port_pin_config_t THERM_1 = {/* Internal pull-up/down resistor is disabled */
504 kPORT_PullDisable,
505 /* Passive filter is disabled */
506 kPORT_PassiveFilterDisable,
507 /* Low drive strength is configured */
508 kPORT_LowDriveStrength,
509 /* Pin is configured as ADC1_SE6 */
510 kPORT_PinDisabledOrAnalog,
511 /* Pin Control Register fields [15:0] are not locked */
512 kPORT_UnlockRegister};
513 /* PORTD4 (pin 69) is configured as ADC1_SE6 */
514 PORT_SetPinConfig(BOARD_THERM_1_PORT, BOARD_THERM_1_PIN, &THERM_1);
515 }
516
517 /* clang-format off */
518 /*
519 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
520 BOARD_InitACCELPins:
521 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
522 - pin_list:
523 - {pin_num: '75', peripheral: GPIOB, signal: 'GPIO, 10', pin_signal: PTB10/LPI2C0_SDAS, direction: INPUT, drive_strength: low, pull_select: down, pull_enable: disable,
524 passive_filter: disable, digital_filter: disable}
525 - {pin_num: '76', peripheral: GPIOB, signal: 'GPIO, 9', pin_signal: PTB9/LPI2C0_SCLS, direction: OUTPUT, drive_strength: low, pull_select: down, pull_enable: disable,
526 passive_filter: disable, digital_filter: disable}
527 - {pin_num: '72', peripheral: LPI2C0, signal: SCL, pin_signal: ADC1_SE1/PTA3/LPI2C0_SCL/EWM_IN/LPUART0_TX, direction: OUTPUT, drive_strength: low, pull_select: down,
528 pull_enable: disable, passive_filter: disable, digital_filter: disable}
529 - {pin_num: '73', peripheral: LPI2C0, signal: SDA, pin_signal: ADC1_SE0/PTA2/LPI2C0_SDA/EWM_OUT_b/LPUART0_RX, direction: INPUT, drive_strength: low, pull_select: down,
530 pull_enable: disable, passive_filter: disable, digital_filter: disable}
531 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
532 */
533 /* clang-format on */
534
535 /* FUNCTION ************************************************************************************************************
536 *
537 * Function Name : BOARD_InitACCELPins
538 * Description : Configures pin routing and optionally pin electrical features.
539 *
540 * END ****************************************************************************************************************/
BOARD_InitACCELPins(void)541 void BOARD_InitACCELPins(void)
542 {
543 /* Clock Control: 0x01u */
544 CLOCK_EnableClock(kCLOCK_PortA);
545 /* Clock Control: 0x01u */
546 CLOCK_EnableClock(kCLOCK_PortB);
547
548 gpio_pin_config_t ACCEL_RST_config = {
549 .pinDirection = kGPIO_DigitalOutput,
550 .outputLogic = 0U
551 };
552 /* Initialize GPIO functionality on pin PTB9 (pin 76) */
553 GPIO_PinInit(BOARD_ACCEL_RST_GPIO, BOARD_ACCEL_RST_PIN, &ACCEL_RST_config);
554
555 gpio_pin_config_t ACCEL_INT_config = {
556 .pinDirection = kGPIO_DigitalInput,
557 .outputLogic = 0U
558 };
559 /* Initialize GPIO functionality on pin PTB10 (pin 75) */
560 GPIO_PinInit(BOARD_ACCEL_INT_GPIO, BOARD_ACCEL_INT_PIN, &ACCEL_INT_config);
561 /* Configure digital filter */
562 PORT_EnablePinsDigitalFilter(
563 /* Digital filter is configured on port A */
564 PORTA,
565 /* Digital filter is configured for PORTA0 */
566 PORT_DFER_DFE_2_MASK
567 /* Digital filter is configured for PORTA1 */
568 | PORT_DFER_DFE_3_MASK,
569 /* Disable digital filter */
570 false);
571
572 const port_pin_config_t ACCEL_I2C_SDA = {/* Internal pull-up/down resistor is disabled */
573 kPORT_PullDisable,
574 /* Passive filter is disabled */
575 kPORT_PassiveFilterDisable,
576 /* Low drive strength is configured */
577 kPORT_LowDriveStrength,
578 /* Pin is configured as LPI2C0_SDA */
579 kPORT_MuxAlt3,
580 /* Pin Control Register fields [15:0] are not locked */
581 kPORT_UnlockRegister};
582 /* PORTA2 (pin 73) is configured as LPI2C0_SDA */
583 PORT_SetPinConfig(BOARD_ACCEL_I2C_SDA_PORT, BOARD_ACCEL_I2C_SDA_PIN, &ACCEL_I2C_SDA);
584
585 const port_pin_config_t ACCEL_I2C_SCL = {/* Internal pull-up/down resistor is disabled */
586 kPORT_PullDisable,
587 /* Passive filter is disabled */
588 kPORT_PassiveFilterDisable,
589 /* Low drive strength is configured */
590 kPORT_LowDriveStrength,
591 /* Pin is configured as LPI2C0_SCL */
592 kPORT_MuxAlt3,
593 /* Pin Control Register fields [15:0] are not locked */
594 kPORT_UnlockRegister};
595 /* PORTA3 (pin 72) is configured as LPI2C0_SCL */
596 PORT_SetPinConfig(BOARD_ACCEL_I2C_SCL_PORT, BOARD_ACCEL_I2C_SCL_PIN, &ACCEL_I2C_SCL);
597 /* Configure digital filter */
598 PORT_EnablePinsDigitalFilter(
599 /* Digital filter is configured on port B */
600 PORTB,
601 /* Digital filter is configured for PORTB0 */
602 PORT_DFER_DFE_9_MASK
603 /* Digital filter is configured for PORTB1 */
604 | PORT_DFER_DFE_10_MASK,
605 /* Disable digital filter */
606 false);
607
608 const port_pin_config_t ACCEL_INT = {/* Internal pull-up/down resistor is disabled */
609 kPORT_PullDisable,
610 /* Passive filter is disabled */
611 kPORT_PassiveFilterDisable,
612 /* Low drive strength is configured */
613 kPORT_LowDriveStrength,
614 /* Pin is configured as PTB10 */
615 kPORT_MuxAsGpio,
616 /* Pin Control Register fields [15:0] are not locked */
617 kPORT_UnlockRegister};
618 /* PORTB10 (pin 75) is configured as PTB10 */
619 PORT_SetPinConfig(BOARD_ACCEL_INT_PORT, BOARD_ACCEL_INT_PIN, &ACCEL_INT);
620
621 const port_pin_config_t ACCEL_RST = {/* Internal pull-up/down resistor is disabled */
622 kPORT_PullDisable,
623 /* Passive filter is disabled */
624 kPORT_PassiveFilterDisable,
625 /* Low drive strength is configured */
626 kPORT_LowDriveStrength,
627 /* Pin is configured as PTB9 */
628 kPORT_MuxAsGpio,
629 /* Pin Control Register fields [15:0] are not locked */
630 kPORT_UnlockRegister};
631 /* PORTB9 (pin 76) is configured as PTB9 */
632 PORT_SetPinConfig(BOARD_ACCEL_RST_PORT, BOARD_ACCEL_RST_PIN, &ACCEL_RST);
633 }
634
635 /* clang-format off */
636 /*
637 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
638 BOARD_InitDEBUG_UARTPins:
639 - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'}
640 - pin_list:
641 - {pin_num: '80', peripheral: LPUART1, signal: TX, pin_signal: ADC1_SE5/TSI0_CH16/PTC7/LPUART1_TX, drive_strength: low, pull_select: up, pull_enable: enable, passive_filter: disable,
642 digital_filter: disable}
643 - {pin_num: '81', peripheral: LPUART1, signal: RX, pin_signal: ADC1_SE4/TSI0_CH15/PTC6/LPUART1_RX, drive_strength: low, pull_select: up, pull_enable: enable, passive_filter: disable,
644 digital_filter: disable}
645 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
646 */
647 /* clang-format on */
648
649 /* FUNCTION ************************************************************************************************************
650 *
651 * Function Name : BOARD_InitDEBUG_UARTPins
652 * Description : Configures pin routing and optionally pin electrical features.
653 *
654 * END ****************************************************************************************************************/
BOARD_InitDEBUG_UARTPins(void)655 void BOARD_InitDEBUG_UARTPins(void)
656 {
657 /* Clock Control: 0x01u */
658 CLOCK_EnableClock(kCLOCK_PortC);
659 /* Configure digital filter */
660 PORT_EnablePinsDigitalFilter(
661 /* Digital filter is configured on port C */
662 PORTC,
663 /* Digital filter is configured for PORTC0 */
664 PORT_DFER_DFE_6_MASK
665 /* Digital filter is configured for PORTC1 */
666 | PORT_DFER_DFE_7_MASK,
667 /* Disable digital filter */
668 false);
669
670 const port_pin_config_t DEBUG_UART_RX = {/* Internal pull-up resistor is enabled */
671 kPORT_PullUp,
672 /* Passive filter is disabled */
673 kPORT_PassiveFilterDisable,
674 /* Low drive strength is configured */
675 kPORT_LowDriveStrength,
676 /* Pin is configured as LPUART1_RX */
677 kPORT_MuxAlt2,
678 /* Pin Control Register fields [15:0] are not locked */
679 kPORT_UnlockRegister};
680 /* PORTC6 (pin 81) is configured as LPUART1_RX */
681 PORT_SetPinConfig(BOARD_DEBUG_UART_RX_PORT, BOARD_DEBUG_UART_RX_PIN, &DEBUG_UART_RX);
682
683 const port_pin_config_t DEBUG_UART_TX = {/* Internal pull-up resistor is enabled */
684 kPORT_PullUp,
685 /* Passive filter is disabled */
686 kPORT_PassiveFilterDisable,
687 /* Low drive strength is configured */
688 kPORT_LowDriveStrength,
689 /* Pin is configured as LPUART1_TX */
690 kPORT_MuxAlt2,
691 /* Pin Control Register fields [15:0] are not locked */
692 kPORT_UnlockRegister};
693 /* PORTC7 (pin 80) is configured as LPUART1_TX */
694 PORT_SetPinConfig(BOARD_DEBUG_UART_TX_PORT, BOARD_DEBUG_UART_TX_PIN, &DEBUG_UART_TX);
695 }
696 /***********************************************************************************************************************
697 * EOF
698 **********************************************************************************************************************/
699
