1 /* 2 * Copyright 2018 NXP. 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /*********************************************************************************************************************** 9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file 10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. 11 **********************************************************************************************************************/ 12 13 #ifndef _PIN_MUX_H_ 14 #define _PIN_MUX_H_ 15 16 /*! 17 * @addtogroup pin_mux 18 * @{ 19 */ 20 21 /*********************************************************************************************************************** 22 * API 23 **********************************************************************************************************************/ 24 25 #if defined(__cplusplus) 26 extern "C" { 27 #endif 28 29 /*! 30 * @brief Calls initialization functions. 31 * 32 */ 33 void BOARD_InitBootPins(void); 34 35 /*! 36 * @brief Configures pin routing and optionally pin electrical features. 37 * 38 */ 39 void BOARD_InitPins(void); 40 41 /*! @name PORTG7 (number 50), D4[3]/PTG7_BLUE 42 @{ */ 43 #define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIOB /*!<@brief GPIO device name: GPIOB */ 44 #define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PORT kGPIO_PORTG /*!<@brief PORTB GPIO port: PORTB */ 45 #define BOARD_INITLEDSPINS_LED_BLUE_PORT PORTG /*!<@brief PORT device name: PORTG */ 46 #define BOARD_INITLEDSPINS_LED_BLUE_PIN 7U /*!<@brief PORTG pin index: 7 */ 47 /* @} */ 48 49 /*! @name PORTG6 (number 51), D4[4]/PTG6_GREEN 50 @{ */ 51 #define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIOB /*!<@brief GPIO device name: GPIOB */ 52 #define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PORT kGPIO_PORTG /*!<@brief PORTB GPIO port: PORTB */ 53 #define BOARD_INITLEDSPINS_LED_GREEN_PORT PORTG /*!<@brief PORT device name: PORTG */ 54 #define BOARD_INITLEDSPINS_LED_GREEN_PIN 6U /*!<@brief PORTG pin index: 6 */ 55 /* @} */ 56 57 /*! @name PORTG5 (number 52), D4[1]/PTG5_RED 58 @{ */ 59 #define BOARD_INITLEDSPINS_LED_RED_GPIO GPIOB /*!<@brief GPIO device name: GPIOB */ 60 #define BOARD_INITLEDSPINS_LED_RED_GPIO_PORT kGPIO_PORTG /*!<@brief PORTB GPIO port: PORTB */ 61 #define BOARD_INITLEDSPINS_LED_RED_PORT PORTG /*!<@brief PORT device name: PORTG */ 62 #define BOARD_INITLEDSPINS_LED_RED_PIN 5U /*!<@brief PORTG pin index: 5 */ 63 /* @} */ 64 65 /*! 66 * @brief Configures pin routing and optionally pin electrical features. 67 * 68 */ 69 void BOARD_InitLEDsPins(void); 70 71 /*! @name PORTC6 (number 64), J1[3]/PTC6_RXD1/UART1_RX_TGTMCU 72 @{ */ 73 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT PORTC /*!<@brief PORT device name: PORTC */ 74 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 6U /*!<@brief PORTC pin index: 6 */ 75 /* @} */ 76 77 /*! @name PORTC7 (number 63), J1[1]/PTC7_TXD1/UART1_TX_TGTMCU 78 @{ */ 79 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT PORTC /*!<@brief PORT device name: PORTC */ 80 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 7U /*!<@brief PORTC pin index: 7 */ 81 /* @} */ 82 83 /*! 84 * @brief Configures pin routing and optionally pin electrical features. 85 * 86 */ 87 void BOARD_InitDEBUG_UARTPins(void); 88 89 /*! @name PORTA3 (number 59), J2[20]/PTA3_ACCEL_SCL 90 @{ */ 91 #define BOARD_INITACCELPINS_ACCEL_SCL_PORT PORTA /*!<@brief PORT device name: PORTA */ 92 #define BOARD_INITACCELPINS_ACCEL_SCL_PIN 3U /*!<@brief PORTA pin index: 3 */ 93 /* @} */ 94 95 /*! @name PORTA2 (number 60), J2[18]/PTA2_ACCEL_SDA 96 @{ */ 97 #define BOARD_INITACCELPINS_ACCEL_SDA_PORT PORTA /*!<@brief PORT device name: PORTA */ 98 #define BOARD_INITACCELPINS_ACCEL_SDA_PIN 2U /*!<@brief PORTA pin index: 2 */ 99 /* @} */ 100 101 /*! @name PORTD4 (number 56), PTD4_ACCEL_INT1 102 @{ */ 103 #define BOARD_INITACCELPINS_ACCEL_INT1_GPIO GPIOA /*!<@brief GPIO device name: GPIOA */ 104 #define BOARD_INITACCELPINS_ACCEL_INT1_GPIO_PORT kGPIO_PORTD /*!<@brief PORTA GPIO port: PORTA */ 105 #define BOARD_INITACCELPINS_ACCEL_INT1_PORT PORTD /*!<@brief PORT device name: PORTD */ 106 #define BOARD_INITACCELPINS_ACCEL_INT1_PIN 4U /*!<@brief PORTD pin index: 4 */ 107 /* @} */ 108 109 /*! @name PORTD3 (number 57), PTD3_ACCEL_INT2 110 @{ */ 111 #define BOARD_INITACCELPINS_ACCEL_INT2_GPIO GPIOA /*!<@brief GPIO device name: GPIOA */ 112 #define BOARD_INITACCELPINS_ACCEL_INT2_GPIO_PORT kGPIO_PORTD /*!<@brief PORTA GPIO port: PORTA */ 113 #define BOARD_INITACCELPINS_ACCEL_INT2_PORT PORTD /*!<@brief PORT device name: PORTD */ 114 #define BOARD_INITACCELPINS_ACCEL_INT2_PIN 3U /*!<@brief PORTD pin index: 3 */ 115 /* @} */ 116 117 /*! 118 * @brief Configures pin routing and optionally pin electrical features. 119 * 120 */ 121 void BOARD_InitACCELPins(void); 122 123 /*! @name PORTB7 (number 13), EXTAL 124 @{ */ 125 #define BOARD_INITOSCPINS_EXTAL_PORT PORTB /*!<@brief PORT device name: PORTB */ 126 #define BOARD_INITOSCPINS_EXTAL_PIN 7U /*!<@brief PORTB pin index: 7 */ 127 /* @} */ 128 129 /*! @name PORTB6 (number 14), XTAL 130 @{ */ 131 #define BOARD_INITOSCPINS_XTAL_PORT PORTB /*!<@brief PORT device name: PORTB */ 132 #define BOARD_INITOSCPINS_XTAL_PIN 6U /*!<@brief PORTB pin index: 6 */ 133 /* @} */ 134 135 /*! 136 * @brief Configures pin routing and optionally pin electrical features. 137 * 138 */ 139 void BOARD_InitOSCPins(void); 140 141 /*! @name PORTE7 (number 6), J5[5]/U7[1]/PTE7_CONN/CAN_TX 142 @{ */ 143 #define BOARD_INITCANPINS_CAN_TX_PORT PORTE /*!<@brief PORT device name: PORTE */ 144 #define BOARD_INITCANPINS_CAN_TX_PIN 7U /*!<@brief PORTE pin index: 7 */ 145 /* @} */ 146 147 /*! @name PORTH2 (number 7), J5[4]/U7[4]/PTH2_CONN/CAN_RX 148 @{ */ 149 #define BOARD_INITCANPINS_CAN_RX_PORT PORTH /*!<@brief PORT device name: PORTH */ 150 #define BOARD_INITCANPINS_CAN_RX_PIN 2U /*!<@brief PORTH pin index: 2 */ 151 /* @} */ 152 153 /*! 154 * @brief Configures pin routing and optionally pin electrical features. 155 * 156 */ 157 void BOARD_InitCANPins(void); 158 159 /*! @name PORTB1 (number 41), J1[4]/PTB1_IRTX 160 @{ */ 161 #define BOARD_INITINFRAREDPINS_IRTX_GPIO GPIOA /*!<@brief GPIO device name: GPIOA */ 162 #define BOARD_INITINFRAREDPINS_IRTX_GPIO_PORT kGPIO_PORTB /*!<@brief PORTA GPIO port: PORTA */ 163 #define BOARD_INITINFRAREDPINS_IRTX_PORT PORTB /*!<@brief PORT device name: PORTB */ 164 #define BOARD_INITINFRAREDPINS_IRTX_PIN 1U /*!<@brief PORTB pin index: 1 */ 165 /* @} */ 166 167 /*! @name PORTA1 (number 61), J1[10]/PTA1_D4_T1/PTA1_IRRX 168 @{ */ 169 #define BOARD_INITINFRAREDPINS_IRRX_GPIO GPIOA /*!<@brief GPIO device name: GPIOA */ 170 #define BOARD_INITINFRAREDPINS_IRRX_GPIO_PORT kGPIO_PORTA /*!<@brief PORTA GPIO port: PORTA */ 171 #define BOARD_INITINFRAREDPINS_IRRX_PORT PORTA /*!<@brief PORT device name: PORTA */ 172 #define BOARD_INITINFRAREDPINS_IRRX_PIN 1U /*!<@brief PORTA pin index: 1 */ 173 /* @} */ 174 175 /*! 176 * @brief Configures pin routing and optionally pin electrical features. 177 * 178 */ 179 void BOARD_InitINFRAREDPins(void); 180 181 /*! @name PORTF4 (number 38), PTF4_THER 182 @{ */ 183 #define BOARD_INITTHERPINS_THER_A_PORT PORTF /*!<@brief PORT device name: PORTF */ 184 #define BOARD_INITTHERPINS_THER_A_PIN 4U /*!<@brief PORTF pin index: 4 */ 185 /* @} */ 186 187 /*! @name PORTF5 (number 37), PTF5_THER 188 @{ */ 189 #define BOARD_INITTHERPINS_THER_B_PORT PORTF /*!<@brief PORT device name: PORTF */ 190 #define BOARD_INITTHERPINS_THER_B_PIN 5U /*!<@brief PORTF pin index: 5 */ 191 /* @} */ 192 193 /*! 194 * @brief Configures pin routing and optionally pin electrical features. 195 * 196 */ 197 void BOARD_InitTHERPins(void); 198 199 #if defined(__cplusplus) 200 } 201 #endif 202 203 /*! 204 * @} 205 */ 206 #endif /* _PIN_MUX_H_ */ 207 208 /*********************************************************************************************************************** 209 * EOF 210 **********************************************************************************************************************/ 211
