1 /* 2 * Copyright 2020-2022 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 #include "flash_config.h" 8 9 /* Component ID definition, used by tools. */ 10 #ifndef FSL_COMPONENT_ID 11 #define FSL_COMPONENT_ID "platform.drivers.flash_config" 12 #endif 13 14 /******************************************************************************* 15 * Code 16 ******************************************************************************/ 17 #if defined(BOOT_HEADER_ENABLE) && (BOOT_HEADER_ENABLE == 1) 18 #if defined(__ARMCC_VERSION) || defined(__GNUC__) 19 __attribute__((section(".flash_conf"), used)) 20 #elif defined(__ICCARM__) 21 #pragma location = ".flash_conf" 22 #endif 23 24 const flexspi_nor_config_t 25 flexspi_config = 26 { 27 .memConfig = 28 { 29 .tag = FLASH_CONFIG_BLOCK_TAG, 30 .version = FLASH_CONFIG_BLOCK_VERSION, 31 .csHoldTime = 3, 32 .csSetupTime = 3, 33 .deviceModeCfgEnable = 1, 34 .deviceModeType = kDeviceConfigCmdType_Generic, 35 .waitTimeCfgCommands = 1, 36 .deviceModeSeq = 37 { 38 .seqNum = 1, 39 .seqId = 6, /* See Lookup table for more details */ 40 .reserved = 0, 41 }, 42 .deviceModeArg = 0, 43 .configCmdEnable = 1, 44 .configModeType = {kDeviceConfigCmdType_Generic, kDeviceConfigCmdType_Spi2Xpi, 45 kDeviceConfigCmdType_Generic}, 46 .configCmdSeqs = {{ 47 .seqNum = 1, 48 .seqId = 7, 49 .reserved = 0, 50 }, 51 { 52 .seqNum = 1, 53 .seqId = 10, 54 .reserved = 0, 55 }}, 56 .configCmdArgs = {0x2, 0x1}, 57 .controllerMiscOption = 1u << kFlexSpiMiscOffset_SafeConfigFreqEnable, 58 .deviceType = 0x1, 59 .sflashPadType = kSerialFlash_8Pads, 60 .serialClkFreq = kFlexSpiSerialClk_SDR_48MHz, 61 .sflashA1Size = 0, 62 .sflashA2Size = 0, 63 .sflashB1Size = 0x4000000U, 64 .sflashB2Size = 0, 65 .lookupTable = 66 { 67 /* Read */ 68 [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0xEC, CMD_SDR, FLEXSPI_8PAD, 0x13), 69 [1] = FLEXSPI_LUT_SEQ(RADDR_SDR, FLEXSPI_8PAD, 0x20, DUMMY_SDR, FLEXSPI_8PAD, 0x14), 70 [2] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_8PAD, 0x04, STOP_EXE, FLEXSPI_1PAD, 0x00), 71 72 /* Read status SPI */ 73 [4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04), 74 75 /* Read Status OPI */ 76 [4 * 2 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0x05, CMD_SDR, FLEXSPI_8PAD, 0xFA), 77 [4 * 2 + 1] = FLEXSPI_LUT_SEQ(RADDR_SDR, FLEXSPI_8PAD, 0x20, DUMMY_SDR, FLEXSPI_8PAD, 0x14), 78 [4 * 2 + 2] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_8PAD, 0x04, STOP_EXE, FLEXSPI_1PAD, 0x00), 79 80 /* Write Enable */ 81 [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP_EXE, FLEXSPI_1PAD, 0x00), 82 83 /* Write Enable - OPI */ 84 [4 * 4 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0x06, CMD_SDR, FLEXSPI_8PAD, 0xF9), 85 86 /* Erase Sector */ 87 [4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0x21, CMD_SDR, FLEXSPI_8PAD, 0xDE), 88 [4 * 5 + 1] = FLEXSPI_LUT_SEQ(RADDR_SDR, FLEXSPI_8PAD, 0x20, STOP_EXE, FLEXSPI_1PAD, 0x00), 89 90 /* Configure dummy cycles */ 91 [4 * 6 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x72, CMD_SDR, FLEXSPI_1PAD, 0x00), 92 [4 * 6 + 1] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x00, CMD_SDR, FLEXSPI_1PAD, 0x03), 93 [4 * 6 + 2] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x00, WRITE_SDR, FLEXSPI_1PAD, 0x01), 94 95 /* Configure Register */ 96 [4 * 7 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x72, CMD_SDR, FLEXSPI_1PAD, 0x00), 97 [4 * 7 + 1] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x00, CMD_SDR, FLEXSPI_1PAD, 0x02), 98 [4 * 7 + 2] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x00, WRITE_SDR, FLEXSPI_1PAD, 0x01), 99 100 /* Erase Block */ 101 [4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0xDC, CMD_SDR, FLEXSPI_8PAD, 0x23), 102 [4 * 8 + 1] = FLEXSPI_LUT_SEQ(RADDR_SDR, FLEXSPI_8PAD, 0x20, STOP_EXE, FLEXSPI_1PAD, 0x00), 103 104 /* Page program */ 105 [4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0x12, CMD_SDR, FLEXSPI_8PAD, 0xED), 106 [4 * 9 + 1] = FLEXSPI_LUT_SEQ(RADDR_SDR, FLEXSPI_8PAD, 0x20, WRITE_SDR, FLEXSPI_8PAD, 0x04), 107 108 /* Enable OPI STR mode */ 109 [4 * 10 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x72, CMD_SDR, FLEXSPI_1PAD, 0x00), 110 [4 * 10 + 1] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x00, CMD_SDR, FLEXSPI_1PAD, 0x00), 111 [4 * 10 + 2] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x00, WRITE_SDR, FLEXSPI_1PAD, 0x01), 112 113 /* Erase Chip */ 114 [4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0x60, CMD_SDR, FLEXSPI_8PAD, 0x9F), 115 }, 116 }, 117 .pageSize = 0x100, 118 .sectorSize = 0x1000, 119 .ipcmdSerialClkFreq = 1u, 120 .serialNorType = 2u, 121 .blockSize = 0x10000, 122 .flashStateCtx = 0x07008100u, 123 }; 124 #endif /* BOOT_HEADER_ENABLE */ 125
