1 /*
2 * Copyright 2021-2022 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #include "wifi_bt_config.h"
9 #include "fsl_power.h"
10 #include "pin_mux.h"
11 #include "fsl_gpio.h"
12
13 /*******************************************************************************
14 * Definitions
15 ******************************************************************************/
16
17 /*******************************************************************************
18 * Prototypes
19 ******************************************************************************/
20
21 /*******************************************************************************
22 * Variables
23 ******************************************************************************/
24 #ifdef WIFI_BT_USE_M2_INTERFACE
25 /*!brief sdmmc dma buffer */
26 AT_NONCACHEABLE_SECTION_ALIGN(static uint32_t s_sdmmcHostDmaBuffer[BOARD_SDMMC_HOST_DMA_DESCRIPTOR_BUFFER_SIZE],
27 SDMMCHOST_DMA_DESCRIPTOR_BUFFER_ALIGN_SIZE);
28 static sdmmchost_t s_host;
29 static sdio_card_int_t s_sdioInt;
30 #endif
31
32 /*******************************************************************************
33 * Code
34 ******************************************************************************/
BOARD_USDHC1ClockConfiguration(void)35 uint32_t BOARD_USDHC1ClockConfiguration(void)
36 {
37 /* Make sure USDHC ram buffer has power up */
38 POWER_DisablePD(kPDRUNCFG_APD_USDHC1_SRAM);
39 POWER_DisablePD(kPDRUNCFG_PPD_USDHC1_SRAM);
40 POWER_DisablePD(kPDRUNCFG_PD_LPOSC);
41 POWER_ApplyPD();
42
43 /* SDIO1 */
44 /* usdhc depend on 32K clock also */
45 CLOCK_AttachClk(kLPOSC_DIV32_to_32KHZWAKE_CLK);
46 CLOCK_AttachClk(kAUX0_PLL_to_SDIO1_CLK);
47 CLOCK_SetClkDiv(kCLOCK_DivSdio1Clk, 1);
48
49 return CLOCK_GetSdioClkFreq(1);
50 }
51
BOARD_WIFI_BT_Enable(bool enable)52 void BOARD_WIFI_BT_Enable(bool enable)
53 {
54 if (enable)
55 {
56 /* Enable module */
57 #ifdef WIFI_BT_USE_M2_INTERFACE
58 /* Enable power supply for M.2 */
59 GPIO_PortSet(BOARD_INITPINSM2_M2_3V3_GPIO, BOARD_INITPINSM2_M2_3V3_PORT, BOARD_INITPINSM2_M2_3V3_PIN_MASK);
60 vTaskDelay(pdMS_TO_TICKS(100));
61
62 /* Set SDIO_RST to 1 */
63 GPIO_PortSet(BOARD_INITPINSM2_SDIO_RST_GPIO, BOARD_INITPINSM2_SDIO_RST_PORT,
64 BOARD_INITPINSM2_SDIO_RST_PIN_MASK);
65 vTaskDelay(pdMS_TO_TICKS(100));
66
67 /* Set WL_RST to 1 */
68 GPIO_PortSet(BOARD_INITPINSM2_WL_RST_GPIO, BOARD_INITPINSM2_WL_RST_PORT, BOARD_INITPINSM2_WL_RST_PIN_MASK);
69 vTaskDelay(pdMS_TO_TICKS(100));
70 #elif defined(WIFI_BT_USE_USD_INTERFACE)
71 /* Enable power supply for SD */
72 GPIO_PortSet(BOARD_SDMMC_SD_POWER_RESET_GPIO_BASE, BOARD_SDMMC_SD_POWER_RESET_GPIO_PORT,
73 1U << BOARD_SDMMC_SD_POWER_RESET_GPIO_PIN);
74 vTaskDelay(pdMS_TO_TICKS(100));
75 #endif /* WIFI_BT_USE_M2_INTERFACE */
76 }
77 else
78 {
79 /* Disable module */
80 #ifdef WIFI_BT_USE_M2_INTERFACE
81 /* Set WL_RST to 0 */
82 GPIO_PortClear(BOARD_INITPINSM2_WL_RST_GPIO, BOARD_INITPINSM2_WL_RST_PORT, BOARD_INITPINSM2_WL_RST_PIN_MASK);
83 /* Set SDIO_RST to 0 */
84 GPIO_PortClear(BOARD_INITPINSM2_SDIO_RST_GPIO, BOARD_INITPINSM2_SDIO_RST_PORT,
85 BOARD_INITPINSM2_SDIO_RST_PIN_MASK);
86 /* Disable power supply for M.2 */
87 GPIO_PortClear(BOARD_INITPINSM2_M2_3V3_GPIO, BOARD_INITPINSM2_M2_3V3_PORT, BOARD_INITPINSM2_M2_3V3_PIN_MASK);
88 #elif defined(WIFI_BT_USE_USD_INTERFACE)
89 /* Disable power supply for SD */
90 GPIO_PortClear(BOARD_SDMMC_SD_POWER_RESET_GPIO_BASE, BOARD_SDMMC_SD_POWER_RESET_GPIO_PORT,
91 1U << BOARD_SDMMC_SD_POWER_RESET_GPIO_PIN);
92 #endif /* WIFI_BT_USE_M2_INTERFACE */
93 vTaskDelay(pdMS_TO_TICKS(100));
94 }
95 }
96
BOARD_WIFI_BT_Config(void * card,sdio_int_t cardInt)97 void BOARD_WIFI_BT_Config(void *card, sdio_int_t cardInt)
98 {
99 #ifdef WIFI_BT_USE_M2_INTERFACE
100 s_host.dmaDesBuffer = s_sdmmcHostDmaBuffer;
101 s_host.dmaDesBufferWordsNum = BOARD_SDMMC_HOST_DMA_DESCRIPTOR_BUFFER_SIZE;
102 ((sdio_card_t *)card)->host = &s_host;
103 /* M.2 interface is using USDHC1 */
104 ((sdio_card_t *)card)->host->hostController.base = BOARD_WIFI_BT_M2_SLOT_HOST_BASE;
105 ((sdio_card_t *)card)->host->hostController.sourceClock_Hz = BOARD_USDHC1ClockConfiguration();
106 ((sdio_card_t *)card)->host->tuningType = BOARD_SDMMC_SD_TUNING_TYPE;
107
108 ((sdio_card_t *)card)->usrParam.cd = NULL;
109 ((sdio_card_t *)card)->usrParam.pwr = NULL;
110 ((sdio_card_t *)card)->usrParam.ioVoltage = NULL;
111 if (cardInt != NULL)
112 {
113 s_sdioInt.cardInterrupt = cardInt;
114 ((sdio_card_t *)card)->usrParam.sdioInt = &s_sdioInt;
115 }
116
117 NVIC_SetPriority(BOARD_WIFI_BT_M2_SLOT_HOST_IRQ, BOARD_SDMMC_SDIO_HOST_IRQ_PRIORITY);
118
119 RESET_ClearPeripheralReset(kHSGPIO0_RST_SHIFT_RSTn);
120 RESET_ClearPeripheralReset(kHSGPIO3_RST_SHIFT_RSTn);
121 RESET_ClearPeripheralReset(kHSGPIO4_RST_SHIFT_RSTn);
122
123 /* Configure 32K OSC clock. */
124 CLOCK_EnableOsc32K(true); /* Enable 32KHz Oscillator clock */
125 CLOCK_EnableClock(kCLOCK_Rtc); /* Enable the RTC peripheral clock */
126 RTC->CTRL &= ~RTC_CTRL_SWRESET_MASK; /* Make sure the reset bit is cleared */
127 RTC->CTRL &= ~RTC_CTRL_RTC_OSC_PD_MASK; /* The RTC Oscillator is powered up */
128
129 BOARD_InitPinsM2();
130 #elif defined(WIFI_BT_USE_USD_INTERFACE)
131 BOARD_SDIO_Config(card, NULL, BOARD_SDMMC_SDIO_HOST_IRQ_PRIORITY, cardInt);
132 BOARD_InitPinsSD();
133 #endif
134 BOARD_WIFI_BT_Enable(false);
135 }
136
