1 /*
2 * Copyright 2020 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8
9 /***********************************************************************************************************************
10 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
11 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
12 **********************************************************************************************************************/
13
14 /* clang-format off */
15 /*
16 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
17 !!GlobalInfo
18 product: Pins v9.0
19 processor: MIMXRT595S
20 package_id: MIMXRT595SFFOC
21 mcu_data: ksdk2_0
22 processor_version: 0.9.0
23 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
24 */
25 /* clang-format on */
26
27 #include "fsl_common.h"
28 #include "fsl_iopctl.h"
29 #include "pin_mux.h"
30
31 /* FUNCTION ************************************************************************************************************
32 *
33 * Function Name : BOARD_InitBootPins
34 * Description : Calls initialization functions.
35 *
36 * END ****************************************************************************************************************/
BOARD_InitBootPins(void)37 void BOARD_InitBootPins(void)
38 {
39 BOARD_InitPins();
40 }
41
42 /* clang-format off */
43 /*
44 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
45 BOARD_InitPins:
46 - options: {callFromInitBoot: 'true', coreID: cm33, enableClock: 'true'}
47 - pin_list:
48 - {pin_num: H16, peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_2/FC0_RXD_SDA_MOSI_DATA/CTIMER0_MAT2/I2S_BRIDGE_DATA_IN/SEC_PIO0_2, ibena: enabled}
49 - {pin_num: G16, peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_1/FC0_TXD_SCL_MISO_WS/CTIMER0_MAT1/I2S_BRIDGE_WS_IN/SEC_PIO0_1}
50 - {pin_num: N3, peripheral: SWD, signal: SWO, pin_signal: PIO2_24/SWO/GPIO_INT_BMAT/SMARTDMA_PIO24, pupdena: enabled, pupdsel: pullUp}
51 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
52 */
53 /* clang-format on */
54
55 /* FUNCTION ************************************************************************************************************
56 *
57 * Function Name : BOARD_InitPins
58 * Description : Configures pin routing and optionally pin electrical features.
59 *
60 * END ****************************************************************************************************************/
61 /* Function assigned for the Cortex-M33 */
BOARD_InitPins(void)62 void BOARD_InitPins(void)
63 {
64
65 const uint32_t port0_pin1_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
66 IOPCTL_PIO_FUNC1 |
67 /* Disable pull-up / pull-down function */
68 IOPCTL_PIO_PUPD_DI |
69 /* Enable pull-down function */
70 IOPCTL_PIO_PULLDOWN_EN |
71 /* Disable input buffer function */
72 IOPCTL_PIO_INBUF_DI |
73 /* Normal mode */
74 IOPCTL_PIO_SLEW_RATE_NORMAL |
75 /* Normal drive */
76 IOPCTL_PIO_FULLDRIVE_DI |
77 /* Analog mux is disabled */
78 IOPCTL_PIO_ANAMUX_DI |
79 /* Pseudo Output Drain is disabled */
80 IOPCTL_PIO_PSEDRAIN_DI |
81 /* Input function is not inverted */
82 IOPCTL_PIO_INV_DI);
83 /* PORT0 PIN1 (coords: G16) is configured as FC0_TXD_SCL_MISO_WS */
84 IOPCTL_PinMuxSet(IOPCTL, 0U, 1U, port0_pin1_config);
85
86 const uint32_t port0_pin2_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
87 IOPCTL_PIO_FUNC1 |
88 /* Disable pull-up / pull-down function */
89 IOPCTL_PIO_PUPD_DI |
90 /* Enable pull-down function */
91 IOPCTL_PIO_PULLDOWN_EN |
92 /* Enables input buffer function */
93 IOPCTL_PIO_INBUF_EN |
94 /* Normal mode */
95 IOPCTL_PIO_SLEW_RATE_NORMAL |
96 /* Normal drive */
97 IOPCTL_PIO_FULLDRIVE_DI |
98 /* Analog mux is disabled */
99 IOPCTL_PIO_ANAMUX_DI |
100 /* Pseudo Output Drain is disabled */
101 IOPCTL_PIO_PSEDRAIN_DI |
102 /* Input function is not inverted */
103 IOPCTL_PIO_INV_DI);
104 /* PORT0 PIN2 (coords: H16) is configured as FC0_RXD_SDA_MOSI_DATA */
105 IOPCTL_PinMuxSet(IOPCTL, 0U, 2U, port0_pin2_config);
106
107 const uint32_t port2_pin24_config = (/* Pin is configured as SWO */
108 IOPCTL_PIO_FUNC1 |
109 /* Enable pull-up / pull-down function */
110 IOPCTL_PIO_PUPD_EN |
111 /* Enable pull-up function */
112 IOPCTL_PIO_PULLUP_EN |
113 /* Disable input buffer function */
114 IOPCTL_PIO_INBUF_DI |
115 /* Normal mode */
116 IOPCTL_PIO_SLEW_RATE_NORMAL |
117 /* Normal drive */
118 IOPCTL_PIO_FULLDRIVE_DI |
119 /* Analog mux is disabled */
120 IOPCTL_PIO_ANAMUX_DI |
121 /* Pseudo Output Drain is disabled */
122 IOPCTL_PIO_PSEDRAIN_DI |
123 /* Input function is not inverted */
124 IOPCTL_PIO_INV_DI);
125 /* PORT2 PIN24 (coords: N3) is configured as SWO */
126 IOPCTL_PinMuxSet(IOPCTL, 2U, 24U, port2_pin24_config);
127 }
128 /***********************************************************************************************************************
129 * EOF
130 **********************************************************************************************************************/
131
