1 /*
2  * Copyright 2021 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "evkmimxrt1160_flexspi_nor_config.h"
9 
10 /* Component ID definition, used by tools. */
11 #ifndef FSL_COMPONENT_ID
12 #define FSL_COMPONENT_ID "platform.drivers.xip_board"
13 #endif
14 
15 /*******************************************************************************
16  * Code
17  ******************************************************************************/
18 #if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
19 #if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
20 __attribute__((section(".boot_hdr.conf"), used))
21 #elif defined(__ICCARM__)
22 #pragma location = ".boot_hdr.conf"
23 #endif
24 
25 const flexspi_nor_config_t qspiflash_config = {
26     .memConfig =
27         {
28             .tag              = FLEXSPI_CFG_BLK_TAG,
29             .version          = FLEXSPI_CFG_BLK_VERSION,
30             .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
31             .csHoldTime       = 3u,
32             .csSetupTime      = 3u,
33             // Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
34             .controllerMiscOption = 0x10,
35             .deviceType           = kFlexSpiDeviceType_SerialNOR,
36             .sflashPadType        = kSerialFlash_4Pads,
37             .serialClkFreq        = kFlexSpiSerialClk_133MHz,
38             .sflashA1Size         = 16u * 1024u * 1024u,
39             .lookupTable =
40                 {
41                     // Read LUTs
42                     [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
43                     [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
44 
45                     // Read Status LUTs
46                     [4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),
47 
48                     // Write Enable LUTs
49                     [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x0),
50 
51                     // Erase Sector LUTs
52                     [4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18),
53 
54                     // Erase Block LUTs
55                     [4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8, RADDR_SDR, FLEXSPI_1PAD, 0x18),
56 
57                     // Pape Program LUTs
58                     [4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18),
59                     [4 * 9 + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
60 
61                     // Erase Chip LUTs
62                     [4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP, FLEXSPI_1PAD, 0x0),
63                 },
64         },
65     .pageSize           = 256u,
66     .sectorSize         = 4u * 1024u,
67     .ipcmdSerialClkFreq = 0x1,
68     .blockSize          = 64u * 1024u,
69     .isUniformBlockSize = false,
70 };
71 #endif /* XIP_BOOT_HEADER_ENABLE */
72