1 /* 2 * Copyright 2021 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /*********************************************************************************************************************** 9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file 10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. 11 **********************************************************************************************************************/ 12 13 #include "dcd.h" 14 15 /* Component ID definition, used by tools. */ 16 #ifndef FSL_COMPONENT_ID 17 #define FSL_COMPONENT_ID "platform.drivers.xip_board" 18 #endif 19 20 #if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1) 21 #if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1) 22 #if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) 23 __attribute__((section(".boot_hdr.dcd_data"), used)) 24 #elif defined(__ICCARM__) 25 #pragma location = ".boot_hdr.dcd_data" 26 #endif 27 28 /* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* 29 !!GlobalInfo 30 product: DCDx V2.0 31 processor: MIMXRT1166xxxxx 32 package_id: MIMXRT1166DVM6A 33 mcu_data: ksdk2_0 34 processor_version: 0.0.0 35 output_format: c_array 36 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ 37 /* COMMENTS BELOW ARE USED AS SETTINGS FOR DCD DATA */ 38 const uint8_t dcd_data[] = { 39 /* HEADER */ 40 /* Tag */ 41 0xD2, 42 /* Image Length */ 43 0x05, 0x08, 44 /* Version */ 45 0x41, 46 47 /* COMMANDS */ 48 49 /* group: 'Imported Commands' */ 50 /* #1.1-139, command header bytes for merged 'Write - value' command */ 51 0xCC, 0x04, 0x5C, 0x04, 52 /* #1.1, command: write_value, address: CCM_CLOCK_ROOT4_CONTROL, value: 0x703, size: 4 */ 53 0x40, 0xCC, 0x02, 0x00, 0x00, 0x00, 0x07, 0x03, 54 /* #1.2, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_00, value: 0x00, size: 4 */ 55 0x40, 0x0E, 0x80, 0x10, 0x00, 0x00, 0x00, 0x00, 56 /* #1.3, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_01, value: 0x00, size: 4 */ 57 0x40, 0x0E, 0x80, 0x14, 0x00, 0x00, 0x00, 0x00, 58 /* #1.4, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_02, value: 0x00, size: 4 */ 59 0x40, 0x0E, 0x80, 0x18, 0x00, 0x00, 0x00, 0x00, 60 /* #1.5, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_03, value: 0x00, size: 4 */ 61 0x40, 0x0E, 0x80, 0x1C, 0x00, 0x00, 0x00, 0x00, 62 /* #1.6, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_04, value: 0x00, size: 4 */ 63 0x40, 0x0E, 0x80, 0x20, 0x00, 0x00, 0x00, 0x00, 64 /* #1.7, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_05, value: 0x00, size: 4 */ 65 0x40, 0x0E, 0x80, 0x24, 0x00, 0x00, 0x00, 0x00, 66 /* #1.8, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_06, value: 0x00, size: 4 */ 67 0x40, 0x0E, 0x80, 0x28, 0x00, 0x00, 0x00, 0x00, 68 /* #1.9, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_07, value: 0x00, size: 4 */ 69 0x40, 0x0E, 0x80, 0x2C, 0x00, 0x00, 0x00, 0x00, 70 /* #1.10, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_08, value: 0x00, size: 4 */ 71 0x40, 0x0E, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 72 /* #1.11, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_09, value: 0x00, size: 4 */ 73 0x40, 0x0E, 0x80, 0x34, 0x00, 0x00, 0x00, 0x00, 74 /* #1.12, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_10, value: 0x00, size: 4 */ 75 0x40, 0x0E, 0x80, 0x38, 0x00, 0x00, 0x00, 0x00, 76 /* #1.13, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_11, value: 0x00, size: 4 */ 77 0x40, 0x0E, 0x80, 0x3C, 0x00, 0x00, 0x00, 0x00, 78 /* #1.14, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_12, value: 0x00, size: 4 */ 79 0x40, 0x0E, 0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 80 /* #1.15, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_13, value: 0x00, size: 4 */ 81 0x40, 0x0E, 0x80, 0x44, 0x00, 0x00, 0x00, 0x00, 82 /* #1.16, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_14, value: 0x00, size: 4 */ 83 0x40, 0x0E, 0x80, 0x48, 0x00, 0x00, 0x00, 0x00, 84 /* #1.17, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_15, value: 0x00, size: 4 */ 85 0x40, 0x0E, 0x80, 0x4C, 0x00, 0x00, 0x00, 0x00, 86 /* #1.18, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_16, value: 0x00, size: 4 */ 87 0x40, 0x0E, 0x80, 0x50, 0x00, 0x00, 0x00, 0x00, 88 /* #1.19, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_17, value: 0x00, size: 4 */ 89 0x40, 0x0E, 0x80, 0x54, 0x00, 0x00, 0x00, 0x00, 90 /* #1.20, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_18, value: 0x00, size: 4 */ 91 0x40, 0x0E, 0x80, 0x58, 0x00, 0x00, 0x00, 0x00, 92 /* #1.21, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_19, value: 0x00, size: 4 */ 93 0x40, 0x0E, 0x80, 0x5C, 0x00, 0x00, 0x00, 0x00, 94 /* #1.22, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_20, value: 0x00, size: 4 */ 95 0x40, 0x0E, 0x80, 0x60, 0x00, 0x00, 0x00, 0x00, 96 /* #1.23, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_21, value: 0x00, size: 4 */ 97 0x40, 0x0E, 0x80, 0x64, 0x00, 0x00, 0x00, 0x00, 98 /* #1.24, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_22, value: 0x00, size: 4 */ 99 0x40, 0x0E, 0x80, 0x68, 0x00, 0x00, 0x00, 0x00, 100 /* #1.25, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_23, value: 0x00, size: 4 */ 101 0x40, 0x0E, 0x80, 0x6C, 0x00, 0x00, 0x00, 0x00, 102 /* #1.26, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_24, value: 0x00, size: 4 */ 103 0x40, 0x0E, 0x80, 0x70, 0x00, 0x00, 0x00, 0x00, 104 /* #1.27, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_25, value: 0x00, size: 4 */ 105 0x40, 0x0E, 0x80, 0x74, 0x00, 0x00, 0x00, 0x00, 106 /* #1.28, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_26, value: 0x00, size: 4 */ 107 0x40, 0x0E, 0x80, 0x78, 0x00, 0x00, 0x00, 0x00, 108 /* #1.29, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_27, value: 0x00, size: 4 */ 109 0x40, 0x0E, 0x80, 0x7C, 0x00, 0x00, 0x00, 0x00, 110 /* #1.30, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_28, value: 0x00, size: 4 */ 111 0x40, 0x0E, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 112 /* #1.31, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_29, value: 0x00, size: 4 */ 113 0x40, 0x0E, 0x80, 0x84, 0x00, 0x00, 0x00, 0x00, 114 /* #1.32, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_30, value: 0x00, size: 4 */ 115 0x40, 0x0E, 0x80, 0x88, 0x00, 0x00, 0x00, 0x00, 116 /* #1.33, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_31, value: 0x00, size: 4 */ 117 0x40, 0x0E, 0x80, 0x8C, 0x00, 0x00, 0x00, 0x00, 118 /* #1.34, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_32, value: 0x00, size: 4 */ 119 0x40, 0x0E, 0x80, 0x90, 0x00, 0x00, 0x00, 0x00, 120 /* #1.35, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_33, value: 0x00, size: 4 */ 121 0x40, 0x0E, 0x80, 0x94, 0x00, 0x00, 0x00, 0x00, 122 /* #1.36, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_34, value: 0x00, size: 4 */ 123 0x40, 0x0E, 0x80, 0x98, 0x00, 0x00, 0x00, 0x00, 124 /* #1.37, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_35, value: 0x00, size: 4 */ 125 0x40, 0x0E, 0x80, 0x9C, 0x00, 0x00, 0x00, 0x00, 126 /* #1.38, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_36, value: 0x00, size: 4 */ 127 0x40, 0x0E, 0x80, 0xA0, 0x00, 0x00, 0x00, 0x00, 128 /* #1.39, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_37, value: 0x00, size: 4 */ 129 0x40, 0x0E, 0x80, 0xA4, 0x00, 0x00, 0x00, 0x00, 130 /* #1.40, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_38, value: 0x00, size: 4 */ 131 0x40, 0x0E, 0x80, 0xA8, 0x00, 0x00, 0x00, 0x00, 132 /* #1.41, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_39, value: 0x10, size: 4 */ 133 0x40, 0x0E, 0x80, 0xAC, 0x00, 0x00, 0x00, 0x10, 134 /* #1.42, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_40, value: 0x00, size: 4 */ 135 0x40, 0x0E, 0x80, 0xB0, 0x00, 0x00, 0x00, 0x00, 136 /* #1.43, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_41, value: 0x00, size: 4 */ 137 0x40, 0x0E, 0x80, 0xB4, 0x00, 0x00, 0x00, 0x00, 138 /* #1.44, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_00, value: 0x00, size: 4 */ 139 0x40, 0x0E, 0x80, 0xB8, 0x00, 0x00, 0x00, 0x00, 140 /* #1.45, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_01, value: 0x00, size: 4 */ 141 0x40, 0x0E, 0x80, 0xBC, 0x00, 0x00, 0x00, 0x00, 142 /* #1.46, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_02, value: 0x00, size: 4 */ 143 0x40, 0x0E, 0x80, 0xC0, 0x00, 0x00, 0x00, 0x00, 144 /* #1.47, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_03, value: 0x00, size: 4 */ 145 0x40, 0x0E, 0x80, 0xC4, 0x00, 0x00, 0x00, 0x00, 146 /* #1.48, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_04, value: 0x00, size: 4 */ 147 0x40, 0x0E, 0x80, 0xC8, 0x00, 0x00, 0x00, 0x00, 148 /* #1.49, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_05, value: 0x00, size: 4 */ 149 0x40, 0x0E, 0x80, 0xCC, 0x00, 0x00, 0x00, 0x00, 150 /* #1.50, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_06, value: 0x00, size: 4 */ 151 0x40, 0x0E, 0x80, 0xD0, 0x00, 0x00, 0x00, 0x00, 152 /* #1.51, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_07, value: 0x00, size: 4 */ 153 0x40, 0x0E, 0x80, 0xD4, 0x00, 0x00, 0x00, 0x00, 154 /* #1.52, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_08, value: 0x00, size: 4 */ 155 0x40, 0x0E, 0x80, 0xD8, 0x00, 0x00, 0x00, 0x00, 156 /* #1.53, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_09, value: 0x00, size: 4 */ 157 0x40, 0x0E, 0x80, 0xDC, 0x00, 0x00, 0x00, 0x00, 158 /* #1.54, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_10, value: 0x00, size: 4 */ 159 0x40, 0x0E, 0x80, 0xE0, 0x00, 0x00, 0x00, 0x00, 160 /* #1.55, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_11, value: 0x00, size: 4 */ 161 0x40, 0x0E, 0x80, 0xE4, 0x00, 0x00, 0x00, 0x00, 162 /* #1.56, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_12, value: 0x00, size: 4 */ 163 0x40, 0x0E, 0x80, 0xE8, 0x00, 0x00, 0x00, 0x00, 164 /* #1.57, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_13, value: 0x00, size: 4 */ 165 0x40, 0x0E, 0x80, 0xEC, 0x00, 0x00, 0x00, 0x00, 166 /* #1.58, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_14, value: 0x00, size: 4 */ 167 0x40, 0x0E, 0x80, 0xF0, 0x00, 0x00, 0x00, 0x00, 168 /* #1.59, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_15, value: 0x00, size: 4 */ 169 0x40, 0x0E, 0x80, 0xF4, 0x00, 0x00, 0x00, 0x00, 170 /* #1.60, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_16, value: 0x00, size: 4 */ 171 0x40, 0x0E, 0x80, 0xF8, 0x00, 0x00, 0x00, 0x00, 172 /* #1.61, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_17, value: 0x00, size: 4 */ 173 0x40, 0x0E, 0x80, 0xFC, 0x00, 0x00, 0x00, 0x00, 174 /* #1.62, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_18, value: 0x00, size: 4 */ 175 0x40, 0x0E, 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 176 /* #1.63, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_19, value: 0x00, size: 4 */ 177 0x40, 0x0E, 0x81, 0x04, 0x00, 0x00, 0x00, 0x00, 178 /* #1.64, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B2_20, value: 0x00, size: 4 */ 179 0x40, 0x0E, 0x81, 0x08, 0x00, 0x00, 0x00, 0x00, 180 /* #1.65, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_00, value: 0x08, size: 4 */ 181 0x40, 0x0E, 0x82, 0x54, 0x00, 0x00, 0x00, 0x08, 182 /* #1.66, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_01, value: 0x08, size: 4 */ 183 0x40, 0x0E, 0x82, 0x58, 0x00, 0x00, 0x00, 0x08, 184 /* #1.67, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_02, value: 0x08, size: 4 */ 185 0x40, 0x0E, 0x82, 0x5C, 0x00, 0x00, 0x00, 0x08, 186 /* #1.68, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_03, value: 0x08, size: 4 */ 187 0x40, 0x0E, 0x82, 0x60, 0x00, 0x00, 0x00, 0x08, 188 /* #1.69, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_04, value: 0x08, size: 4 */ 189 0x40, 0x0E, 0x82, 0x64, 0x00, 0x00, 0x00, 0x08, 190 /* #1.70, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_05, value: 0x08, size: 4 */ 191 0x40, 0x0E, 0x82, 0x68, 0x00, 0x00, 0x00, 0x08, 192 /* #1.71, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_06, value: 0x08, size: 4 */ 193 0x40, 0x0E, 0x82, 0x6C, 0x00, 0x00, 0x00, 0x08, 194 /* #1.72, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_07, value: 0x08, size: 4 */ 195 0x40, 0x0E, 0x82, 0x70, 0x00, 0x00, 0x00, 0x08, 196 /* #1.73, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_08, value: 0x08, size: 4 */ 197 0x40, 0x0E, 0x82, 0x74, 0x00, 0x00, 0x00, 0x08, 198 /* #1.74, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_09, value: 0x08, size: 4 */ 199 0x40, 0x0E, 0x82, 0x78, 0x00, 0x00, 0x00, 0x08, 200 /* #1.75, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_10, value: 0x08, size: 4 */ 201 0x40, 0x0E, 0x82, 0x7C, 0x00, 0x00, 0x00, 0x08, 202 /* #1.76, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_11, value: 0x08, size: 4 */ 203 0x40, 0x0E, 0x82, 0x80, 0x00, 0x00, 0x00, 0x08, 204 /* #1.77, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_12, value: 0x08, size: 4 */ 205 0x40, 0x0E, 0x82, 0x84, 0x00, 0x00, 0x00, 0x08, 206 /* #1.78, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_13, value: 0x08, size: 4 */ 207 0x40, 0x0E, 0x82, 0x88, 0x00, 0x00, 0x00, 0x08, 208 /* #1.79, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_14, value: 0x08, size: 4 */ 209 0x40, 0x0E, 0x82, 0x8C, 0x00, 0x00, 0x00, 0x08, 210 /* #1.80, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_15, value: 0x08, size: 4 */ 211 0x40, 0x0E, 0x82, 0x90, 0x00, 0x00, 0x00, 0x08, 212 /* #1.81, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_16, value: 0x08, size: 4 */ 213 0x40, 0x0E, 0x82, 0x94, 0x00, 0x00, 0x00, 0x08, 214 /* #1.82, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_17, value: 0x08, size: 4 */ 215 0x40, 0x0E, 0x82, 0x98, 0x00, 0x00, 0x00, 0x08, 216 /* #1.83, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_18, value: 0x08, size: 4 */ 217 0x40, 0x0E, 0x82, 0x9C, 0x00, 0x00, 0x00, 0x08, 218 /* #1.84, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_19, value: 0x08, size: 4 */ 219 0x40, 0x0E, 0x82, 0xA0, 0x00, 0x00, 0x00, 0x08, 220 /* #1.85, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_20, value: 0x08, size: 4 */ 221 0x40, 0x0E, 0x82, 0xA4, 0x00, 0x00, 0x00, 0x08, 222 /* #1.86, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_21, value: 0x08, size: 4 */ 223 0x40, 0x0E, 0x82, 0xA8, 0x00, 0x00, 0x00, 0x08, 224 /* #1.87, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_22, value: 0x08, size: 4 */ 225 0x40, 0x0E, 0x82, 0xAC, 0x00, 0x00, 0x00, 0x08, 226 /* #1.88, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_23, value: 0x08, size: 4 */ 227 0x40, 0x0E, 0x82, 0xB0, 0x00, 0x00, 0x00, 0x08, 228 /* #1.89, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_24, value: 0x08, size: 4 */ 229 0x40, 0x0E, 0x82, 0xB4, 0x00, 0x00, 0x00, 0x08, 230 /* #1.90, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_25, value: 0x08, size: 4 */ 231 0x40, 0x0E, 0x82, 0xB8, 0x00, 0x00, 0x00, 0x08, 232 /* #1.91, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_26, value: 0x08, size: 4 */ 233 0x40, 0x0E, 0x82, 0xBC, 0x00, 0x00, 0x00, 0x08, 234 /* #1.92, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_27, value: 0x08, size: 4 */ 235 0x40, 0x0E, 0x82, 0xC0, 0x00, 0x00, 0x00, 0x08, 236 /* #1.93, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_28, value: 0x08, size: 4 */ 237 0x40, 0x0E, 0x82, 0xC4, 0x00, 0x00, 0x00, 0x08, 238 /* #1.94, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_29, value: 0x08, size: 4 */ 239 0x40, 0x0E, 0x82, 0xC8, 0x00, 0x00, 0x00, 0x08, 240 /* #1.95, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_30, value: 0x08, size: 4 */ 241 0x40, 0x0E, 0x82, 0xCC, 0x00, 0x00, 0x00, 0x08, 242 /* #1.96, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_31, value: 0x08, size: 4 */ 243 0x40, 0x0E, 0x82, 0xD0, 0x00, 0x00, 0x00, 0x08, 244 /* #1.97, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_32, value: 0x08, size: 4 */ 245 0x40, 0x0E, 0x82, 0xD4, 0x00, 0x00, 0x00, 0x08, 246 /* #1.98, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_33, value: 0x08, size: 4 */ 247 0x40, 0x0E, 0x82, 0xD8, 0x00, 0x00, 0x00, 0x08, 248 /* #1.99, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_34, value: 0x08, size: 4 */ 249 0x40, 0x0E, 0x82, 0xDC, 0x00, 0x00, 0x00, 0x08, 250 /* #1.100, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_35, value: 0x08, size: 4 */ 251 0x40, 0x0E, 0x82, 0xE0, 0x00, 0x00, 0x00, 0x08, 252 /* #1.101, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_36, value: 0x08, size: 4 */ 253 0x40, 0x0E, 0x82, 0xE4, 0x00, 0x00, 0x00, 0x08, 254 /* #1.102, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_37, value: 0x08, size: 4 */ 255 0x40, 0x0E, 0x82, 0xE8, 0x00, 0x00, 0x00, 0x08, 256 /* #1.103, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_38, value: 0x08, size: 4 */ 257 0x40, 0x0E, 0x82, 0xEC, 0x00, 0x00, 0x00, 0x08, 258 /* #1.104, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_39, value: 0x08, size: 4 */ 259 0x40, 0x0E, 0x82, 0xF0, 0x00, 0x00, 0x00, 0x08, 260 /* #1.105, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_40, value: 0x08, size: 4 */ 261 0x40, 0x0E, 0x82, 0xF4, 0x00, 0x00, 0x00, 0x08, 262 /* #1.106, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_41, value: 0x08, size: 4 */ 263 0x40, 0x0E, 0x82, 0xF8, 0x00, 0x00, 0x00, 0x08, 264 /* #1.107, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_00, value: 0x08, size: 4 */ 265 0x40, 0x0E, 0x82, 0xFC, 0x00, 0x00, 0x00, 0x08, 266 /* #1.108, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_01, value: 0x08, size: 4 */ 267 0x40, 0x0E, 0x83, 0x00, 0x00, 0x00, 0x00, 0x08, 268 /* #1.109, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_02, value: 0x08, size: 4 */ 269 0x40, 0x0E, 0x83, 0x04, 0x00, 0x00, 0x00, 0x08, 270 /* #1.110, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_03, value: 0x08, size: 4 */ 271 0x40, 0x0E, 0x83, 0x08, 0x00, 0x00, 0x00, 0x08, 272 /* #1.111, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_04, value: 0x08, size: 4 */ 273 0x40, 0x0E, 0x83, 0x0C, 0x00, 0x00, 0x00, 0x08, 274 /* #1.112, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_05, value: 0x08, size: 4 */ 275 0x40, 0x0E, 0x83, 0x10, 0x00, 0x00, 0x00, 0x08, 276 /* #1.113, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_06, value: 0x08, size: 4 */ 277 0x40, 0x0E, 0x83, 0x14, 0x00, 0x00, 0x00, 0x08, 278 /* #1.114, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_07, value: 0x08, size: 4 */ 279 0x40, 0x0E, 0x83, 0x18, 0x00, 0x00, 0x00, 0x08, 280 /* #1.115, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_08, value: 0x08, size: 4 */ 281 0x40, 0x0E, 0x83, 0x1C, 0x00, 0x00, 0x00, 0x08, 282 /* #1.116, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_09, value: 0x08, size: 4 */ 283 0x40, 0x0E, 0x83, 0x20, 0x00, 0x00, 0x00, 0x08, 284 /* #1.117, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_10, value: 0x08, size: 4 */ 285 0x40, 0x0E, 0x83, 0x24, 0x00, 0x00, 0x00, 0x08, 286 /* #1.118, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_11, value: 0x08, size: 4 */ 287 0x40, 0x0E, 0x83, 0x28, 0x00, 0x00, 0x00, 0x08, 288 /* #1.119, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_12, value: 0x08, size: 4 */ 289 0x40, 0x0E, 0x83, 0x2C, 0x00, 0x00, 0x00, 0x08, 290 /* #1.120, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_13, value: 0x08, size: 4 */ 291 0x40, 0x0E, 0x83, 0x30, 0x00, 0x00, 0x00, 0x08, 292 /* #1.121, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_14, value: 0x08, size: 4 */ 293 0x40, 0x0E, 0x83, 0x34, 0x00, 0x00, 0x00, 0x08, 294 /* #1.122, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_15, value: 0x08, size: 4 */ 295 0x40, 0x0E, 0x83, 0x38, 0x00, 0x00, 0x00, 0x08, 296 /* #1.123, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B2_16, value: 0x08, size: 4 */ 297 0x40, 0x0E, 0x83, 0x3C, 0x00, 0x00, 0x00, 0x08, 298 /* #1.124, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B2_02, value: 0x08, size: 4 */ 299 0x40, 0x0E, 0x84, 0x00, 0x00, 0x00, 0x00, 0x08, 300 /* #1.125, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B2_03, value: 0x08, size: 4 */ 301 0x40, 0x0E, 0x84, 0x04, 0x00, 0x00, 0x00, 0x08, 302 /* #1.126, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B2_04, value: 0x08, size: 4 */ 303 0x40, 0x0E, 0x84, 0x08, 0x00, 0x00, 0x00, 0x08, 304 /* #1.127, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_SD_B2_05, value: 0x08, size: 4 */ 305 0x40, 0x0E, 0x84, 0x0C, 0x00, 0x00, 0x00, 0x08, 306 /* #1.128, command: write_value, address: SEMC_MCR, value: 0x10000004, size: 4 */ 307 0x40, 0x0D, 0x40, 0x00, 0x10, 0x00, 0x00, 0x04, 308 /* #1.129, command: write_value, address: SEMC_BMCR0, value: 0x81, size: 4 */ 309 0x40, 0x0D, 0x40, 0x08, 0x00, 0x00, 0x00, 0x81, 310 /* #1.130, command: write_value, address: SEMC_BMCR1, value: 0x81, size: 4 */ 311 0x40, 0x0D, 0x40, 0x0C, 0x00, 0x00, 0x00, 0x81, 312 /* #1.131, command: write_value, address: SEMC_BR0, value: 0x8000001D, size: 4 */ 313 0x40, 0x0D, 0x40, 0x10, 0x80, 0x00, 0x00, 0x1D, 314 /* #1.132, command: write_value, address: SEMC_SDRAMCR0, value: 0xF32, size: 4 */ 315 0x40, 0x0D, 0x40, 0x40, 0x00, 0x00, 0x0F, 0x32, 316 /* #1.133, command: write_value, address: SEMC_SDRAMCR1, value: 0x772A22, size: 4 */ 317 0x40, 0x0D, 0x40, 0x44, 0x00, 0x77, 0x2A, 0x22, 318 /* #1.134, command: write_value, address: SEMC_SDRAMCR2, value: 0x10A0D, size: 4 */ 319 0x40, 0x0D, 0x40, 0x48, 0x00, 0x01, 0x0A, 0x0D, 320 /* #1.135, command: write_value, address: SEMC_SDRAMCR3, value: 0x21210408, size: 4 */ 321 0x40, 0x0D, 0x40, 0x4C, 0x21, 0x21, 0x04, 0x08, 322 /* #1.136, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ 323 0x40, 0x0D, 0x40, 0x90, 0x80, 0x00, 0x00, 0x00, 324 /* #1.137, command: write_value, address: SEMC_IPCR1, value: 0x02, size: 4 */ 325 0x40, 0x0D, 0x40, 0x94, 0x00, 0x00, 0x00, 0x02, 326 /* #1.138, command: write_value, address: SEMC_IPCR2, value: 0x00, size: 4 */ 327 0x40, 0x0D, 0x40, 0x98, 0x00, 0x00, 0x00, 0x00, 328 /* #1.139, command: write_value, address: SEMC_IPCMD, value: 0xA55A000F, size: 4 */ 329 0x40, 0x0D, 0x40, 0x9C, 0xA5, 0x5A, 0x00, 0x0F, 330 /* #2, command: nop */ 331 0xC0, 0x00, 0x04, 0x00, 332 /* #3, command: nop */ 333 0xC0, 0x00, 0x04, 0x00, 334 /* #4, command: nop */ 335 0xC0, 0x00, 0x04, 0x00, 336 /* #5, command: nop */ 337 0xC0, 0x00, 0x04, 0x00, 338 /* #6, command: nop */ 339 0xC0, 0x00, 0x04, 0x00, 340 /* #7.1-2, command header bytes for merged 'Write - value' command */ 341 0xCC, 0x00, 0x14, 0x04, 342 /* #7.1, command: write_value, address: SEMC_INTR, value: 0x03, size: 4 */ 343 0x40, 0x0D, 0x40, 0x3C, 0x00, 0x00, 0x00, 0x03, 344 /* #7.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4 */ 345 0x40, 0x0D, 0x40, 0x9C, 0xA5, 0x5A, 0x00, 0x0C, 346 /* #8, command: nop */ 347 0xC0, 0x00, 0x04, 0x00, 348 /* #9, command: nop */ 349 0xC0, 0x00, 0x04, 0x00, 350 /* #10, command: nop */ 351 0xC0, 0x00, 0x04, 0x00, 352 /* #11, command: nop */ 353 0xC0, 0x00, 0x04, 0x00, 354 /* #12, command: nop */ 355 0xC0, 0x00, 0x04, 0x00, 356 /* #13.1-2, command header bytes for merged 'Write - value' command */ 357 0xCC, 0x00, 0x14, 0x04, 358 /* #13.1, command: write_value, address: SEMC_INTR, value: 0x03, size: 4 */ 359 0x40, 0x0D, 0x40, 0x3C, 0x00, 0x00, 0x00, 0x03, 360 /* #13.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4 */ 361 0x40, 0x0D, 0x40, 0x9C, 0xA5, 0x5A, 0x00, 0x0C, 362 /* #14, command: nop */ 363 0xC0, 0x00, 0x04, 0x00, 364 /* #15, command: nop */ 365 0xC0, 0x00, 0x04, 0x00, 366 /* #16, command: nop */ 367 0xC0, 0x00, 0x04, 0x00, 368 /* #17, command: nop */ 369 0xC0, 0x00, 0x04, 0x00, 370 /* #18, command: nop */ 371 0xC0, 0x00, 0x04, 0x00, 372 /* #19.1-3, command header bytes for merged 'Write - value' command */ 373 0xCC, 0x00, 0x1C, 0x04, 374 /* #19.1, command: write_value, address: SEMC_INTR, value: 0x03, size: 4 */ 375 0x40, 0x0D, 0x40, 0x3C, 0x00, 0x00, 0x00, 0x03, 376 /* #19.2, command: write_value, address: SEMC_IPTXDAT, value: 0x33, size: 4 */ 377 0x40, 0x0D, 0x40, 0xA0, 0x00, 0x00, 0x00, 0x33, 378 /* #19.3, command: write_value, address: SEMC_IPCMD, value: 0xA55A000A, size: 4 */ 379 0x40, 0x0D, 0x40, 0x9C, 0xA5, 0x5A, 0x00, 0x0A, 380 /* #20, command: nop */ 381 0xC0, 0x00, 0x04, 0x00, 382 /* #21, command: nop */ 383 0xC0, 0x00, 0x04, 0x00, 384 /* #22, command: nop */ 385 0xC0, 0x00, 0x04, 0x00, 386 /* #23, command: nop */ 387 0xC0, 0x00, 0x04, 0x00, 388 /* #24, command: nop */ 389 0xC0, 0x00, 0x04, 0x00, 390 /* #25.1-2, command header bytes for merged 'Write - value' command */ 391 0xCC, 0x00, 0x14, 0x04, 392 /* #25.1, command: write_value, address: SEMC_INTR, value: 0x03, size: 4 */ 393 0x40, 0x0D, 0x40, 0x3C, 0x00, 0x00, 0x00, 0x03, 394 /* #25.2, command: write_value, address: SEMC_SDRAMCR3, value: 0x21210409, size: 4 */ 395 0x40, 0x0D, 0x40, 0x4C, 0x21, 0x21, 0x04, 0x09 396 }; 397 /* BE CAREFUL MODIFYING THIS SETTINGS - IT IS YAML SETTINGS FOR TOOLS */ 398 399 #else 400 const uint8_t dcd_data[] = {0x00}; 401 #endif /* XIP_BOOT_HEADER_DCD_ENABLE */ 402 #endif /* XIP_BOOT_HEADER_ENABLE */ 403
