1 /*
2  * Copyright 2018-2020 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "evkmimxrt1064_flexspi_nor_config.h"
9 
10 /* Component ID definition, used by tools. */
11 #ifndef FSL_COMPONENT_ID
12 #define FSL_COMPONENT_ID "platform.drivers.xip_board"
13 #endif
14 
15 /*******************************************************************************
16  * Code
17  ******************************************************************************/
18 #if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
19 #if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
20 __attribute__((section(".boot_hdr.conf"), used))
21 #elif defined(__ICCARM__)
22 #pragma location = ".boot_hdr.conf"
23 #endif
24 
25 const flexspi_nor_config_t qspiflash_config = {
26     .memConfig =
27         {
28             .tag                  = FLEXSPI_CFG_BLK_TAG,
29             .version              = FLEXSPI_CFG_BLK_VERSION,
30             .readSampleClkSrc     = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
31             .csHoldTime           = 3u,
32             .csSetupTime          = 3u,
33             .controllerMiscOption = (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable),
34             .deviceType           = kFlexSpiDeviceType_SerialNOR,
35             .sflashPadType        = kSerialFlash_4Pads,
36             .serialClkFreq        = kFlexSpiSerialClk_120MHz,
37             .sflashA1Size         = 4u * 1024u * 1024u,
38             .lookupTable =
39                 {
40                     // Read LUTs
41                     [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
42                     [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
43 
44                     // Read Status LUTs
45                     [4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),
46 
47                     // Write Enable LUTs
48                     [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x0),
49 
50                     // Erase Sector LUTs
51                     [4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18),
52 
53                     // Erase Block LUTs
54                     [4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8, RADDR_SDR, FLEXSPI_1PAD, 0x18),
55 
56                     // Pape Program LUTs
57                     [4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18),
58                     [4 * 9 + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
59 
60                     // Erase Chip LUTs
61                     [4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP, FLEXSPI_1PAD, 0x0),
62                 },
63         },
64     .pageSize           = 256u,
65     .sectorSize         = 4u * 1024u,
66     .ipcmdSerialClkFreq = 1u,
67     .blockSize          = 64u * 1024u,
68     .isUniformBlockSize = false,
69 };
70 #endif /* XIP_BOOT_HEADER_ENABLE */
71