1 /*
2  * Copyright 2022 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #ifndef _CLOCK_CONFIG_H_
9 #define _CLOCK_CONFIG_H_
10 
11 #include "fsl_common.h"
12 
13 /*******************************************************************************
14  * Definitions
15  ******************************************************************************/
16 #define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
17 
18 #define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
19 /*******************************************************************************
20  ************************ BOARD_InitBootClocks function ************************
21  ******************************************************************************/
22 
23 #if defined(__cplusplus)
24 extern "C" {
25 #endif /* __cplusplus*/
26 
27 /*!
28  * @brief This function executes default configuration of clocks.
29  *
30  */
31 void BOARD_InitBootClocks(void);
32 
33 #if defined(__cplusplus)
34 }
35 #endif /* __cplusplus*/
36 
37 /*******************************************************************************
38  ********************** Configuration BOARD_BootClockRUN ***********************
39  ******************************************************************************/
40 /*******************************************************************************
41  * Definitions for BOARD_BootClockRUN configuration
42  ******************************************************************************/
43 #define BOARD_BOOTCLOCKRUN_CORE_CLOCK             500000000U  /*!< Core clock frequency: 500000000Hz */
44 
45 /* Clock outputs (values are in Hz): */
46 #define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               500000000UL
47 #define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
48 #define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
49 #define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
50 #define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
51 #define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
52 #define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK          500000000UL
53 #define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
54 #define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           196363636UL
55 #define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      62500000UL
56 #define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      62500000UL
57 #define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               125000000UL
58 #define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
59 #define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
60 #define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
61 #define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            62500000UL
62 #define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
63 #define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
64 #define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
65 #define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
66 #define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL
67 #define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL
68 #define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL
69 #define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL
70 #define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
71 #define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
72 #define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
73 #define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
74 #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
75 #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
76 #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             117333333UL
77 #define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
78 #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                0UL
79 
80 /*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
81  */
82 extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
83 /*! @brief Sys PLL for BOARD_BootClockRUN configuration.
84  */
85 extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
86 /*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
87  */
88 extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
89 
90 /*******************************************************************************
91  * API for BOARD_BootClockRUN configuration
92  ******************************************************************************/
93 #if defined(__cplusplus)
94 extern "C" {
95 #endif /* __cplusplus*/
96 
97 /*!
98  * @brief This function executes configuration of clocks.
99  *
100  */
101 void BOARD_BootClockRUN(void);
102 
103 #if defined(__cplusplus)
104 }
105 #endif /* __cplusplus*/
106 
107 /*******************************************************************************
108  ******************* Configuration BOARD_BootClockRUN_400M *********************
109  ******************************************************************************/
110 /*******************************************************************************
111  * Definitions for BOARD_BootClockRUN_400M configuration
112  ******************************************************************************/
113 #define BOARD_BOOTCLOCKRUN_400M_CORE_CLOCK        396000000U  /*!< Core clock frequency: 396000000Hz */
114 
115 /* Clock outputs (values are in Hz): */
116 #define BOARD_BOOTCLOCKRUN_400M_AHB_CLK_ROOT          396000000UL
117 #define BOARD_BOOTCLOCKRUN_400M_CKIL_SYNC_CLK_ROOT    32768UL
118 #define BOARD_BOOTCLOCKRUN_400M_CLKO1_CLK             0UL
119 #define BOARD_BOOTCLOCKRUN_400M_CLKO2_CLK             0UL
120 #define BOARD_BOOTCLOCKRUN_400M_CLK_1M                1000000UL
121 #define BOARD_BOOTCLOCKRUN_400M_CLK_24M               24000000UL
122 #define BOARD_BOOTCLOCKRUN_400M_ENET_500M_REF_CLK     500000000UL
123 #define BOARD_BOOTCLOCKRUN_400M_FLEXIO1_CLK_ROOT      30000000UL
124 #define BOARD_BOOTCLOCKRUN_400M_FLEXSPI_CLK_ROOT      196363636UL
125 #define BOARD_BOOTCLOCKRUN_400M_GPT1_IPG_CLK_HIGHFREQ 49500000UL
126 #define BOARD_BOOTCLOCKRUN_400M_GPT2_IPG_CLK_HIGHFREQ 49500000UL
127 #define BOARD_BOOTCLOCKRUN_400M_IPG_CLK_ROOT          99000000UL
128 #define BOARD_BOOTCLOCKRUN_400M_LPI2C_CLK_ROOT        60000000UL
129 #define BOARD_BOOTCLOCKRUN_400M_LPSPI_CLK_ROOT        105600000UL
130 #define BOARD_BOOTCLOCKRUN_400M_MQS_MCLK              63529411UL
131 #define BOARD_BOOTCLOCKRUN_400M_PERCLK_CLK_ROOT       49500000UL
132 #define BOARD_BOOTCLOCKRUN_400M_SAI1_CLK_ROOT         63529411UL
133 #define BOARD_BOOTCLOCKRUN_400M_SAI1_MCLK1            63529411UL
134 #define BOARD_BOOTCLOCKRUN_400M_SAI1_MCLK2            63529411UL
135 #define BOARD_BOOTCLOCKRUN_400M_SAI1_MCLK3            30000000UL
136 #define BOARD_BOOTCLOCKRUN_400M_SAI2_CLK_ROOT         63529411UL
137 #define BOARD_BOOTCLOCKRUN_400M_SAI2_MCLK1            63529411UL
138 #define BOARD_BOOTCLOCKRUN_400M_SAI2_MCLK2            0UL
139 #define BOARD_BOOTCLOCKRUN_400M_SAI2_MCLK3            30000000UL
140 #define BOARD_BOOTCLOCKRUN_400M_SAI3_CLK_ROOT         63529411UL
141 #define BOARD_BOOTCLOCKRUN_400M_SAI3_MCLK1            63529411UL
142 #define BOARD_BOOTCLOCKRUN_400M_SAI3_MCLK2            0UL
143 #define BOARD_BOOTCLOCKRUN_400M_SAI3_MCLK3            30000000UL
144 #define BOARD_BOOTCLOCKRUN_400M_SPDIF0_CLK_ROOT       30000000UL
145 #define BOARD_BOOTCLOCKRUN_400M_SPDIF0_EXTCLK_OUT     0UL
146 #define BOARD_BOOTCLOCKRUN_400M_TRACE_CLK_ROOT        117333333UL
147 #define BOARD_BOOTCLOCKRUN_400M_UART_CLK_ROOT         80000000UL
148 #define BOARD_BOOTCLOCKRUN_400M_USBPHY1_CLK           0UL
149 
150 /*! @brief Usb1 PLL set for BOARD_BootClockRUN_400M configuration.
151  */
152 extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN_400M;
153 /*! @brief Sys PLL for BOARD_BootClockRUN_400M configuration.
154  */
155 extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN_400M;
156 /*! @brief Enet PLL set for BOARD_BootClockRUN_400M configuration.
157  */
158 extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN_400M;
159 
160 /*******************************************************************************
161  * API for BOARD_BootClockRUN_400M configuration
162  ******************************************************************************/
163 #if defined(__cplusplus)
164 extern "C" {
165 #endif /* __cplusplus*/
166 
167 /*!
168  * @brief This function executes configuration of clocks.
169  *
170  */
171 void BOARD_BootClockRUN_400M(void);
172 
173 #if defined(__cplusplus)
174 }
175 #endif /* __cplusplus*/
176 
177 #endif /* _CLOCK_CONFIG_H_ */
178 
179