1/* 2 * Copyright 2022 NXP 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6/* 7 * generated by parsing IOMUXC header file definition 8 * pin control definitions are a tuple of 9 * <mux_reg mux_val input_reg input_val cfg_reg> 10 */ 11 12&iomuxc { 13 /omit-if-no-ref/ mx7d_pad_gpio1_io08__gpio1_io8: MX7D_PAD_GPIO1_IO08__GPIO1_IO8 { 14 pinmux = <0x30330014 0 0x0 0 0x3033026c>; 15 }; 16 /omit-if-no-ref/ mx7d_pad_gpio1_io08__sd1_vselect: MX7D_PAD_GPIO1_IO08__SD1_VSELECT { 17 pinmux = <0x30330014 1 0x0 0 0x3033026c>; 18 }; 19 /omit-if-no-ref/ mx7d_pad_gpio1_io08__wdog1_wdog_b: MX7D_PAD_GPIO1_IO08__WDOG1_WDOG_B { 20 pinmux = <0x30330014 2 0x0 0 0x3033026c>; 21 }; 22 /omit-if-no-ref/ mx7d_pad_gpio1_io08__uart3_dce_rx: MX7D_PAD_GPIO1_IO08__UART3_DCE_RX { 23 pinmux = <0x30330014 3 0x30330704 0 0x3033026c>; 24 }; 25 /omit-if-no-ref/ mx7d_pad_gpio1_io08__uart3_dte_tx: MX7D_PAD_GPIO1_IO08__UART3_DTE_TX { 26 pinmux = <0x30330014 3 0x0 0 0x3033026c>; 27 }; 28 /omit-if-no-ref/ mx7d_pad_gpio1_io08__i2c3_scl: MX7D_PAD_GPIO1_IO08__I2C3_SCL { 29 pinmux = <0x30330014 4 0x303305e4 0 0x3033026c>; 30 }; 31 /omit-if-no-ref/ mx7d_pad_gpio1_io08__kpp_col5: MX7D_PAD_GPIO1_IO08__KPP_COL5 { 32 pinmux = <0x30330014 6 0x30330608 0 0x3033026c>; 33 }; 34 /omit-if-no-ref/ mx7d_pad_gpio1_io08__pwm1_out: MX7D_PAD_GPIO1_IO08__PWM1_OUT { 35 pinmux = <0x30330014 7 0x0 0 0x3033026c>; 36 }; 37 /omit-if-no-ref/ mx7d_pad_gpio1_io09__gpio1_io9: MX7D_PAD_GPIO1_IO09__GPIO1_IO9 { 38 pinmux = <0x30330018 0 0x0 0 0x30330270>; 39 }; 40 /omit-if-no-ref/ mx7d_pad_gpio1_io09__sd1_lctl: MX7D_PAD_GPIO1_IO09__SD1_LCTL { 41 pinmux = <0x30330018 1 0x0 0 0x30330270>; 42 }; 43 /omit-if-no-ref/ mx7d_pad_gpio1_io09__ccm_enet_phy_ref_clk: MX7D_PAD_GPIO1_IO09__CCM_ENET_PHY_REF_CLK { 44 pinmux = <0x30330018 2 0x0 0 0x30330270>; 45 }; 46 /omit-if-no-ref/ mx7d_pad_gpio1_io09__uart3_dce_tx: MX7D_PAD_GPIO1_IO09__UART3_DCE_TX { 47 pinmux = <0x30330018 3 0x0 0 0x30330270>; 48 }; 49 /omit-if-no-ref/ mx7d_pad_gpio1_io09__uart3_dte_rx: MX7D_PAD_GPIO1_IO09__UART3_DTE_RX { 50 pinmux = <0x30330018 3 0x30330704 1 0x30330270>; 51 }; 52 /omit-if-no-ref/ mx7d_pad_gpio1_io09__i2c3_sda: MX7D_PAD_GPIO1_IO09__I2C3_SDA { 53 pinmux = <0x30330018 4 0x303305e8 0 0x30330270>; 54 }; 55 /omit-if-no-ref/ mx7d_pad_gpio1_io09__ccm_pmic_ready: MX7D_PAD_GPIO1_IO09__CCM_PMIC_READY { 56 pinmux = <0x30330018 5 0x303304f4 0 0x30330270>; 57 }; 58 /omit-if-no-ref/ mx7d_pad_gpio1_io09__kpp_row5: MX7D_PAD_GPIO1_IO09__KPP_ROW5 { 59 pinmux = <0x30330018 6 0x30330628 0 0x30330270>; 60 }; 61 /omit-if-no-ref/ mx7d_pad_gpio1_io09__pwm2_out: MX7D_PAD_GPIO1_IO09__PWM2_OUT { 62 pinmux = <0x30330018 7 0x0 0 0x30330270>; 63 }; 64 /omit-if-no-ref/ mx7d_pad_gpio1_io10__gpio1_io10: MX7D_PAD_GPIO1_IO10__GPIO1_IO10 { 65 pinmux = <0x3033001c 0 0x0 0 0x30330274>; 66 }; 67 /omit-if-no-ref/ mx7d_pad_gpio1_io10__sd2_lctl: MX7D_PAD_GPIO1_IO10__SD2_LCTL { 68 pinmux = <0x3033001c 1 0x0 0 0x30330274>; 69 }; 70 /omit-if-no-ref/ mx7d_pad_gpio1_io10__enet1_mdio: MX7D_PAD_GPIO1_IO10__ENET1_MDIO { 71 pinmux = <0x3033001c 2 0x30330568 0 0x30330274>; 72 }; 73 /omit-if-no-ref/ mx7d_pad_gpio1_io10__uart3_dce_rts: MX7D_PAD_GPIO1_IO10__UART3_DCE_RTS { 74 pinmux = <0x3033001c 3 0x30330700 0 0x30330274>; 75 }; 76 /omit-if-no-ref/ mx7d_pad_gpio1_io10__uart3_dte_cts: MX7D_PAD_GPIO1_IO10__UART3_DTE_CTS { 77 pinmux = <0x3033001c 3 0x0 0 0x30330274>; 78 }; 79 /omit-if-no-ref/ mx7d_pad_gpio1_io10__i2c4_scl: MX7D_PAD_GPIO1_IO10__I2C4_SCL { 80 pinmux = <0x3033001c 4 0x303305ec 0 0x30330274>; 81 }; 82 /omit-if-no-ref/ mx7d_pad_gpio1_io10__flextimer1_pha: MX7D_PAD_GPIO1_IO10__FLEXTIMER1_PHA { 83 pinmux = <0x3033001c 5 0x303305a4 0 0x30330274>; 84 }; 85 /omit-if-no-ref/ mx7d_pad_gpio1_io10__kpp_col6: MX7D_PAD_GPIO1_IO10__KPP_COL6 { 86 pinmux = <0x3033001c 6 0x3033060c 0 0x30330274>; 87 }; 88 /omit-if-no-ref/ mx7d_pad_gpio1_io10__pwm3_out: MX7D_PAD_GPIO1_IO10__PWM3_OUT { 89 pinmux = <0x3033001c 7 0x0 0 0x30330274>; 90 }; 91 /omit-if-no-ref/ mx7d_pad_gpio1_io11__gpio1_io11: MX7D_PAD_GPIO1_IO11__GPIO1_IO11 { 92 pinmux = <0x30330020 0 0x0 0 0x30330278>; 93 }; 94 /omit-if-no-ref/ mx7d_pad_gpio1_io11__sd3_lctl: MX7D_PAD_GPIO1_IO11__SD3_LCTL { 95 pinmux = <0x30330020 1 0x0 0 0x30330278>; 96 }; 97 /omit-if-no-ref/ mx7d_pad_gpio1_io11__enet1_mdc: MX7D_PAD_GPIO1_IO11__ENET1_MDC { 98 pinmux = <0x30330020 2 0x0 0 0x30330278>; 99 }; 100 /omit-if-no-ref/ mx7d_pad_gpio1_io11__uart3_dce_cts: MX7D_PAD_GPIO1_IO11__UART3_DCE_CTS { 101 pinmux = <0x30330020 3 0x0 0 0x30330278>; 102 }; 103 /omit-if-no-ref/ mx7d_pad_gpio1_io11__uart3_dte_rts: MX7D_PAD_GPIO1_IO11__UART3_DTE_RTS { 104 pinmux = <0x30330020 3 0x30330700 1 0x30330278>; 105 }; 106 /omit-if-no-ref/ mx7d_pad_gpio1_io11__i2c4_sda: MX7D_PAD_GPIO1_IO11__I2C4_SDA { 107 pinmux = <0x30330020 4 0x303305f0 0 0x30330278>; 108 }; 109 /omit-if-no-ref/ mx7d_pad_gpio1_io11__flextimer1_phb: MX7D_PAD_GPIO1_IO11__FLEXTIMER1_PHB { 110 pinmux = <0x30330020 5 0x303305a8 0 0x30330278>; 111 }; 112 /omit-if-no-ref/ mx7d_pad_gpio1_io11__kpp_row6: MX7D_PAD_GPIO1_IO11__KPP_ROW6 { 113 pinmux = <0x30330020 6 0x3033062c 0 0x30330278>; 114 }; 115 /omit-if-no-ref/ mx7d_pad_gpio1_io11__pwm4_out: MX7D_PAD_GPIO1_IO11__PWM4_OUT { 116 pinmux = <0x30330020 7 0x0 0 0x30330278>; 117 }; 118 /omit-if-no-ref/ mx7d_pad_gpio1_io12__gpio1_io12: MX7D_PAD_GPIO1_IO12__GPIO1_IO12 { 119 pinmux = <0x30330024 0 0x0 0 0x3033027c>; 120 }; 121 /omit-if-no-ref/ mx7d_pad_gpio1_io12__sd2_vselect: MX7D_PAD_GPIO1_IO12__SD2_VSELECT { 122 pinmux = <0x30330024 1 0x0 0 0x3033027c>; 123 }; 124 /omit-if-no-ref/ mx7d_pad_gpio1_io12__ccm_enet1_ref_clk: MX7D_PAD_GPIO1_IO12__CCM_ENET1_REF_CLK { 125 pinmux = <0x30330024 2 0x30330564 0 0x3033027c>; 126 }; 127 /omit-if-no-ref/ mx7d_pad_gpio1_io12__flexcan1_rx: MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX { 128 pinmux = <0x30330024 3 0x303304dc 0 0x3033027c>; 129 }; 130 /omit-if-no-ref/ mx7d_pad_gpio1_io12__cm4_nmi: MX7D_PAD_GPIO1_IO12__CM4_NMI { 131 pinmux = <0x30330024 4 0x0 0 0x3033027c>; 132 }; 133 /omit-if-no-ref/ mx7d_pad_gpio1_io12__ccm_ext_clk1: MX7D_PAD_GPIO1_IO12__CCM_EXT_CLK1 { 134 pinmux = <0x30330024 5 0x303304e4 0 0x3033027c>; 135 }; 136 /omit-if-no-ref/ mx7d_pad_gpio1_io12__snvs_vio_5: MX7D_PAD_GPIO1_IO12__SNVS_VIO_5 { 137 pinmux = <0x30330024 6 0x0 0 0x3033027c>; 138 }; 139 /omit-if-no-ref/ mx7d_pad_gpio1_io12__usb_otg1_id: MX7D_PAD_GPIO1_IO12__USB_OTG1_ID { 140 pinmux = <0x30330024 7 0x30330734 0 0x3033027c>; 141 }; 142 /omit-if-no-ref/ mx7d_pad_gpio1_io13__gpio1_io13: MX7D_PAD_GPIO1_IO13__GPIO1_IO13 { 143 pinmux = <0x30330028 0 0x0 0 0x30330280>; 144 }; 145 /omit-if-no-ref/ mx7d_pad_gpio1_io13__sd3_vselect: MX7D_PAD_GPIO1_IO13__SD3_VSELECT { 146 pinmux = <0x30330028 1 0x0 0 0x30330280>; 147 }; 148 /omit-if-no-ref/ mx7d_pad_gpio1_io13__ccm_enet2_ref_clk: MX7D_PAD_GPIO1_IO13__CCM_ENET2_REF_CLK { 149 pinmux = <0x30330028 2 0x30330570 0 0x30330280>; 150 }; 151 /omit-if-no-ref/ mx7d_pad_gpio1_io13__flexcan1_tx: MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX { 152 pinmux = <0x30330028 3 0x0 0 0x30330280>; 153 }; 154 /omit-if-no-ref/ mx7d_pad_gpio1_io13__ccm_pmic_ready: MX7D_PAD_GPIO1_IO13__CCM_PMIC_READY { 155 pinmux = <0x30330028 4 0x303304f4 1 0x30330280>; 156 }; 157 /omit-if-no-ref/ mx7d_pad_gpio1_io13__ccm_ext_clk2: MX7D_PAD_GPIO1_IO13__CCM_EXT_CLK2 { 158 pinmux = <0x30330028 5 0x303304e8 0 0x30330280>; 159 }; 160 /omit-if-no-ref/ mx7d_pad_gpio1_io13__snvs_vio_5_ctl: MX7D_PAD_GPIO1_IO13__SNVS_VIO_5_CTL { 161 pinmux = <0x30330028 6 0x0 0 0x30330280>; 162 }; 163 /omit-if-no-ref/ mx7d_pad_gpio1_io13__usb_otg2_id: MX7D_PAD_GPIO1_IO13__USB_OTG2_ID { 164 pinmux = <0x30330028 7 0x30330730 0 0x30330280>; 165 }; 166 /omit-if-no-ref/ mx7d_pad_gpio1_io14__gpio1_io14: MX7D_PAD_GPIO1_IO14__GPIO1_IO14 { 167 pinmux = <0x3033002c 0 0x0 0 0x30330284>; 168 }; 169 /omit-if-no-ref/ mx7d_pad_gpio1_io14__sd3_cd_b: MX7D_PAD_GPIO1_IO14__SD3_CD_B { 170 pinmux = <0x3033002c 1 0x30330738 0 0x30330284>; 171 }; 172 /omit-if-no-ref/ mx7d_pad_gpio1_io14__enet2_mdio: MX7D_PAD_GPIO1_IO14__ENET2_MDIO { 173 pinmux = <0x3033002c 2 0x30330574 0 0x30330284>; 174 }; 175 /omit-if-no-ref/ mx7d_pad_gpio1_io14__flexcan2_rx: MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX { 176 pinmux = <0x3033002c 3 0x303304e0 0 0x30330284>; 177 }; 178 /omit-if-no-ref/ mx7d_pad_gpio1_io14__wdog3_wdog_b: MX7D_PAD_GPIO1_IO14__WDOG3_WDOG_B { 179 pinmux = <0x3033002c 4 0x0 0 0x30330284>; 180 }; 181 /omit-if-no-ref/ mx7d_pad_gpio1_io14__ccm_ext_clk3: MX7D_PAD_GPIO1_IO14__CCM_EXT_CLK3 { 182 pinmux = <0x3033002c 5 0x303304ec 0 0x30330284>; 183 }; 184 /omit-if-no-ref/ mx7d_pad_gpio1_io14__sdma_ext_event0: MX7D_PAD_GPIO1_IO14__SDMA_EXT_EVENT0 { 185 pinmux = <0x3033002c 6 0x303306d8 0 0x30330284>; 186 }; 187 /omit-if-no-ref/ mx7d_pad_gpio1_io15__gpio1_io15: MX7D_PAD_GPIO1_IO15__GPIO1_IO15 { 188 pinmux = <0x30330030 0 0x0 0 0x30330288>; 189 }; 190 /omit-if-no-ref/ mx7d_pad_gpio1_io15__sd3_wp: MX7D_PAD_GPIO1_IO15__SD3_WP { 191 pinmux = <0x30330030 1 0x3033073c 0 0x30330288>; 192 }; 193 /omit-if-no-ref/ mx7d_pad_gpio1_io15__enet2_mdc: MX7D_PAD_GPIO1_IO15__ENET2_MDC { 194 pinmux = <0x30330030 2 0x0 0 0x30330288>; 195 }; 196 /omit-if-no-ref/ mx7d_pad_gpio1_io15__flexcan2_tx: MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX { 197 pinmux = <0x30330030 3 0x0 0 0x30330288>; 198 }; 199 /omit-if-no-ref/ mx7d_pad_gpio1_io15__wdog4_wdog_b: MX7D_PAD_GPIO1_IO15__WDOG4_WDOG_B { 200 pinmux = <0x30330030 4 0x0 0 0x30330288>; 201 }; 202 /omit-if-no-ref/ mx7d_pad_gpio1_io15__ccm_ext_clk4: MX7D_PAD_GPIO1_IO15__CCM_EXT_CLK4 { 203 pinmux = <0x30330030 5 0x303304f0 0 0x30330288>; 204 }; 205 /omit-if-no-ref/ mx7d_pad_gpio1_io15__sdma_ext_event1: MX7D_PAD_GPIO1_IO15__SDMA_EXT_EVENT1 { 206 pinmux = <0x30330030 6 0x303306dc 0 0x30330288>; 207 }; 208 /omit-if-no-ref/ mx7d_pad_epdc_data00__epdc_data0: MX7D_PAD_EPDC_DATA00__EPDC_DATA0 { 209 pinmux = <0x30330034 0 0x0 0 0x303302a4>; 210 }; 211 /omit-if-no-ref/ mx7d_pad_epdc_data00__sim1_port2_trxd: MX7D_PAD_EPDC_DATA00__SIM1_PORT2_TRXD { 212 pinmux = <0x30330034 1 0x0 0 0x303302a4>; 213 }; 214 /omit-if-no-ref/ mx7d_pad_epdc_data00__qspi_a_data0: MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 { 215 pinmux = <0x30330034 2 0x0 0 0x303302a4>; 216 }; 217 /omit-if-no-ref/ mx7d_pad_epdc_data00__kpp_row3: MX7D_PAD_EPDC_DATA00__KPP_ROW3 { 218 pinmux = <0x30330034 3 0x30330620 0 0x303302a4>; 219 }; 220 /omit-if-no-ref/ mx7d_pad_epdc_data00__eim_ad0: MX7D_PAD_EPDC_DATA00__EIM_AD0 { 221 pinmux = <0x30330034 4 0x0 0 0x303302a4>; 222 }; 223 /omit-if-no-ref/ mx7d_pad_epdc_data00__gpio2_io0: MX7D_PAD_EPDC_DATA00__GPIO2_IO0 { 224 pinmux = <0x30330034 5 0x0 0 0x303302a4>; 225 }; 226 /omit-if-no-ref/ mx7d_pad_epdc_data00__lcd_data0: MX7D_PAD_EPDC_DATA00__LCD_DATA0 { 227 pinmux = <0x30330034 6 0x30330638 0 0x303302a4>; 228 }; 229 /omit-if-no-ref/ mx7d_pad_epdc_data00__lcd_clk: MX7D_PAD_EPDC_DATA00__LCD_CLK { 230 pinmux = <0x30330034 7 0x0 0 0x303302a4>; 231 }; 232 /omit-if-no-ref/ mx7d_pad_epdc_data01__epdc_data1: MX7D_PAD_EPDC_DATA01__EPDC_DATA1 { 233 pinmux = <0x30330038 0 0x0 0 0x303302a8>; 234 }; 235 /omit-if-no-ref/ mx7d_pad_epdc_data01__sim1_port2_clk: MX7D_PAD_EPDC_DATA01__SIM1_PORT2_CLK { 236 pinmux = <0x30330038 1 0x0 0 0x303302a8>; 237 }; 238 /omit-if-no-ref/ mx7d_pad_epdc_data01__qspi_a_data1: MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 { 239 pinmux = <0x30330038 2 0x0 0 0x303302a8>; 240 }; 241 /omit-if-no-ref/ mx7d_pad_epdc_data01__kpp_col3: MX7D_PAD_EPDC_DATA01__KPP_COL3 { 242 pinmux = <0x30330038 3 0x30330600 0 0x303302a8>; 243 }; 244 /omit-if-no-ref/ mx7d_pad_epdc_data01__eim_ad1: MX7D_PAD_EPDC_DATA01__EIM_AD1 { 245 pinmux = <0x30330038 4 0x0 0 0x303302a8>; 246 }; 247 /omit-if-no-ref/ mx7d_pad_epdc_data01__gpio2_io1: MX7D_PAD_EPDC_DATA01__GPIO2_IO1 { 248 pinmux = <0x30330038 5 0x0 0 0x303302a8>; 249 }; 250 /omit-if-no-ref/ mx7d_pad_epdc_data01__lcd_data1: MX7D_PAD_EPDC_DATA01__LCD_DATA1 { 251 pinmux = <0x30330038 6 0x3033063c 0 0x303302a8>; 252 }; 253 /omit-if-no-ref/ mx7d_pad_epdc_data01__lcd_enable: MX7D_PAD_EPDC_DATA01__LCD_ENABLE { 254 pinmux = <0x30330038 7 0x0 0 0x303302a8>; 255 }; 256 /omit-if-no-ref/ mx7d_pad_epdc_data02__epdc_data2: MX7D_PAD_EPDC_DATA02__EPDC_DATA2 { 257 pinmux = <0x3033003c 0 0x0 0 0x303302ac>; 258 }; 259 /omit-if-no-ref/ mx7d_pad_epdc_data02__sim1_port2_rst_b: MX7D_PAD_EPDC_DATA02__SIM1_PORT2_RST_B { 260 pinmux = <0x3033003c 1 0x0 0 0x303302ac>; 261 }; 262 /omit-if-no-ref/ mx7d_pad_epdc_data02__qspi_a_data2: MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 { 263 pinmux = <0x3033003c 2 0x0 0 0x303302ac>; 264 }; 265 /omit-if-no-ref/ mx7d_pad_epdc_data02__kpp_row2: MX7D_PAD_EPDC_DATA02__KPP_ROW2 { 266 pinmux = <0x3033003c 3 0x3033061c 0 0x303302ac>; 267 }; 268 /omit-if-no-ref/ mx7d_pad_epdc_data02__eim_ad2: MX7D_PAD_EPDC_DATA02__EIM_AD2 { 269 pinmux = <0x3033003c 4 0x0 0 0x303302ac>; 270 }; 271 /omit-if-no-ref/ mx7d_pad_epdc_data02__gpio2_io2: MX7D_PAD_EPDC_DATA02__GPIO2_IO2 { 272 pinmux = <0x3033003c 5 0x0 0 0x303302ac>; 273 }; 274 /omit-if-no-ref/ mx7d_pad_epdc_data02__lcd_data2: MX7D_PAD_EPDC_DATA02__LCD_DATA2 { 275 pinmux = <0x3033003c 6 0x30330640 0 0x303302ac>; 276 }; 277 /omit-if-no-ref/ mx7d_pad_epdc_data02__lcd_vsync: MX7D_PAD_EPDC_DATA02__LCD_VSYNC { 278 pinmux = <0x3033003c 7 0x30330698 0 0x303302ac>; 279 }; 280 /omit-if-no-ref/ mx7d_pad_epdc_data03__epdc_data3: MX7D_PAD_EPDC_DATA03__EPDC_DATA3 { 281 pinmux = <0x30330040 0 0x0 0 0x303302b0>; 282 }; 283 /omit-if-no-ref/ mx7d_pad_epdc_data03__sim1_port2_sven: MX7D_PAD_EPDC_DATA03__SIM1_PORT2_SVEN { 284 pinmux = <0x30330040 1 0x0 0 0x303302b0>; 285 }; 286 /omit-if-no-ref/ mx7d_pad_epdc_data03__qspi_a_data3: MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 { 287 pinmux = <0x30330040 2 0x0 0 0x303302b0>; 288 }; 289 /omit-if-no-ref/ mx7d_pad_epdc_data03__kpp_col2: MX7D_PAD_EPDC_DATA03__KPP_COL2 { 290 pinmux = <0x30330040 3 0x303305fc 0 0x303302b0>; 291 }; 292 /omit-if-no-ref/ mx7d_pad_epdc_data03__eim_ad3: MX7D_PAD_EPDC_DATA03__EIM_AD3 { 293 pinmux = <0x30330040 4 0x0 0 0x303302b0>; 294 }; 295 /omit-if-no-ref/ mx7d_pad_epdc_data03__gpio2_io3: MX7D_PAD_EPDC_DATA03__GPIO2_IO3 { 296 pinmux = <0x30330040 5 0x0 0 0x303302b0>; 297 }; 298 /omit-if-no-ref/ mx7d_pad_epdc_data03__lcd_data3: MX7D_PAD_EPDC_DATA03__LCD_DATA3 { 299 pinmux = <0x30330040 6 0x30330644 0 0x303302b0>; 300 }; 301 /omit-if-no-ref/ mx7d_pad_epdc_data03__lcd_hsync: MX7D_PAD_EPDC_DATA03__LCD_HSYNC { 302 pinmux = <0x30330040 7 0x0 0 0x303302b0>; 303 }; 304 /omit-if-no-ref/ mx7d_pad_epdc_data04__epdc_data4: MX7D_PAD_EPDC_DATA04__EPDC_DATA4 { 305 pinmux = <0x30330044 0 0x0 0 0x303302b4>; 306 }; 307 /omit-if-no-ref/ mx7d_pad_epdc_data04__sim1_port2_pd: MX7D_PAD_EPDC_DATA04__SIM1_PORT2_PD { 308 pinmux = <0x30330044 1 0x0 0 0x303302b4>; 309 }; 310 /omit-if-no-ref/ mx7d_pad_epdc_data04__qspi_a_dqs: MX7D_PAD_EPDC_DATA04__QSPI_A_DQS { 311 pinmux = <0x30330044 2 0x0 0 0x303302b4>; 312 }; 313 /omit-if-no-ref/ mx7d_pad_epdc_data04__kpp_row1: MX7D_PAD_EPDC_DATA04__KPP_ROW1 { 314 pinmux = <0x30330044 3 0x30330618 0 0x303302b4>; 315 }; 316 /omit-if-no-ref/ mx7d_pad_epdc_data04__eim_ad4: MX7D_PAD_EPDC_DATA04__EIM_AD4 { 317 pinmux = <0x30330044 4 0x0 0 0x303302b4>; 318 }; 319 /omit-if-no-ref/ mx7d_pad_epdc_data04__gpio2_io4: MX7D_PAD_EPDC_DATA04__GPIO2_IO4 { 320 pinmux = <0x30330044 5 0x0 0 0x303302b4>; 321 }; 322 /omit-if-no-ref/ mx7d_pad_epdc_data04__lcd_data4: MX7D_PAD_EPDC_DATA04__LCD_DATA4 { 323 pinmux = <0x30330044 6 0x30330648 0 0x303302b4>; 324 }; 325 /omit-if-no-ref/ mx7d_pad_epdc_data04__jtag_fail: MX7D_PAD_EPDC_DATA04__JTAG_FAIL { 326 pinmux = <0x30330044 7 0x0 0 0x303302b4>; 327 }; 328 /omit-if-no-ref/ mx7d_pad_epdc_data05__epdc_data5: MX7D_PAD_EPDC_DATA05__EPDC_DATA5 { 329 pinmux = <0x30330048 0 0x0 0 0x303302b8>; 330 }; 331 /omit-if-no-ref/ mx7d_pad_epdc_data05__sim2_port2_trxd: MX7D_PAD_EPDC_DATA05__SIM2_PORT2_TRXD { 332 pinmux = <0x30330048 1 0x0 0 0x303302b8>; 333 }; 334 /omit-if-no-ref/ mx7d_pad_epdc_data05__qspi_a_sclk: MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK { 335 pinmux = <0x30330048 2 0x0 0 0x303302b8>; 336 }; 337 /omit-if-no-ref/ mx7d_pad_epdc_data05__kpp_col1: MX7D_PAD_EPDC_DATA05__KPP_COL1 { 338 pinmux = <0x30330048 3 0x303305f8 0 0x303302b8>; 339 }; 340 /omit-if-no-ref/ mx7d_pad_epdc_data05__eim_ad5: MX7D_PAD_EPDC_DATA05__EIM_AD5 { 341 pinmux = <0x30330048 4 0x0 0 0x303302b8>; 342 }; 343 /omit-if-no-ref/ mx7d_pad_epdc_data05__gpio2_io5: MX7D_PAD_EPDC_DATA05__GPIO2_IO5 { 344 pinmux = <0x30330048 5 0x0 0 0x303302b8>; 345 }; 346 /omit-if-no-ref/ mx7d_pad_epdc_data05__lcd_data5: MX7D_PAD_EPDC_DATA05__LCD_DATA5 { 347 pinmux = <0x30330048 6 0x3033064c 0 0x303302b8>; 348 }; 349 /omit-if-no-ref/ mx7d_pad_epdc_data05__jtag_active: MX7D_PAD_EPDC_DATA05__JTAG_ACTIVE { 350 pinmux = <0x30330048 7 0x0 0 0x303302b8>; 351 }; 352 /omit-if-no-ref/ mx7d_pad_epdc_data06__epdc_data6: MX7D_PAD_EPDC_DATA06__EPDC_DATA6 { 353 pinmux = <0x3033004c 0 0x0 0 0x303302bc>; 354 }; 355 /omit-if-no-ref/ mx7d_pad_epdc_data06__sim2_port2_clk: MX7D_PAD_EPDC_DATA06__SIM2_PORT2_CLK { 356 pinmux = <0x3033004c 1 0x0 0 0x303302bc>; 357 }; 358 /omit-if-no-ref/ mx7d_pad_epdc_data06__qspi_a_ss0_b: MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B { 359 pinmux = <0x3033004c 2 0x0 0 0x303302bc>; 360 }; 361 /omit-if-no-ref/ mx7d_pad_epdc_data06__kpp_row0: MX7D_PAD_EPDC_DATA06__KPP_ROW0 { 362 pinmux = <0x3033004c 3 0x30330614 0 0x303302bc>; 363 }; 364 /omit-if-no-ref/ mx7d_pad_epdc_data06__eim_ad6: MX7D_PAD_EPDC_DATA06__EIM_AD6 { 365 pinmux = <0x3033004c 4 0x0 0 0x303302bc>; 366 }; 367 /omit-if-no-ref/ mx7d_pad_epdc_data06__gpio2_io6: MX7D_PAD_EPDC_DATA06__GPIO2_IO6 { 368 pinmux = <0x3033004c 5 0x0 0 0x303302bc>; 369 }; 370 /omit-if-no-ref/ mx7d_pad_epdc_data06__lcd_data6: MX7D_PAD_EPDC_DATA06__LCD_DATA6 { 371 pinmux = <0x3033004c 6 0x30330650 0 0x303302bc>; 372 }; 373 /omit-if-no-ref/ mx7d_pad_epdc_data06__jtag_de_b: MX7D_PAD_EPDC_DATA06__JTAG_DE_B { 374 pinmux = <0x3033004c 7 0x0 0 0x303302bc>; 375 }; 376 /omit-if-no-ref/ mx7d_pad_epdc_data07__epdc_data7: MX7D_PAD_EPDC_DATA07__EPDC_DATA7 { 377 pinmux = <0x30330050 0 0x0 0 0x303302c0>; 378 }; 379 /omit-if-no-ref/ mx7d_pad_epdc_data07__sim2_port2_rst_b: MX7D_PAD_EPDC_DATA07__SIM2_PORT2_RST_B { 380 pinmux = <0x30330050 1 0x0 0 0x303302c0>; 381 }; 382 /omit-if-no-ref/ mx7d_pad_epdc_data07__qspi_a_ss1_b: MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B { 383 pinmux = <0x30330050 2 0x0 0 0x303302c0>; 384 }; 385 /omit-if-no-ref/ mx7d_pad_epdc_data07__kpp_col0: MX7D_PAD_EPDC_DATA07__KPP_COL0 { 386 pinmux = <0x30330050 3 0x303305f4 0 0x303302c0>; 387 }; 388 /omit-if-no-ref/ mx7d_pad_epdc_data07__eim_ad7: MX7D_PAD_EPDC_DATA07__EIM_AD7 { 389 pinmux = <0x30330050 4 0x0 0 0x303302c0>; 390 }; 391 /omit-if-no-ref/ mx7d_pad_epdc_data07__gpio2_io7: MX7D_PAD_EPDC_DATA07__GPIO2_IO7 { 392 pinmux = <0x30330050 5 0x0 0 0x303302c0>; 393 }; 394 /omit-if-no-ref/ mx7d_pad_epdc_data07__lcd_data7: MX7D_PAD_EPDC_DATA07__LCD_DATA7 { 395 pinmux = <0x30330050 6 0x30330654 0 0x303302c0>; 396 }; 397 /omit-if-no-ref/ mx7d_pad_epdc_data07__jtag_done: MX7D_PAD_EPDC_DATA07__JTAG_DONE { 398 pinmux = <0x30330050 7 0x0 0 0x303302c0>; 399 }; 400 /omit-if-no-ref/ mx7d_pad_epdc_data08__epdc_data8: MX7D_PAD_EPDC_DATA08__EPDC_DATA8 { 401 pinmux = <0x30330054 0 0x0 0 0x303302c4>; 402 }; 403 /omit-if-no-ref/ mx7d_pad_epdc_data08__sim1_port1_trxd: MX7D_PAD_EPDC_DATA08__SIM1_PORT1_TRXD { 404 pinmux = <0x30330054 1 0x303306e4 0 0x303302c4>; 405 }; 406 /omit-if-no-ref/ mx7d_pad_epdc_data08__qspi_b_data0: MX7D_PAD_EPDC_DATA08__QSPI_B_DATA0 { 407 pinmux = <0x30330054 2 0x0 0 0x303302c4>; 408 }; 409 /omit-if-no-ref/ mx7d_pad_epdc_data08__uart6_dce_rx: MX7D_PAD_EPDC_DATA08__UART6_DCE_RX { 410 pinmux = <0x30330054 3 0x3033071c 0 0x303302c4>; 411 }; 412 /omit-if-no-ref/ mx7d_pad_epdc_data08__uart6_dte_tx: MX7D_PAD_EPDC_DATA08__UART6_DTE_TX { 413 pinmux = <0x30330054 3 0x0 0 0x303302c4>; 414 }; 415 /omit-if-no-ref/ mx7d_pad_epdc_data08__eim_oe: MX7D_PAD_EPDC_DATA08__EIM_OE { 416 pinmux = <0x30330054 4 0x0 0 0x303302c4>; 417 }; 418 /omit-if-no-ref/ mx7d_pad_epdc_data08__gpio2_io8: MX7D_PAD_EPDC_DATA08__GPIO2_IO8 { 419 pinmux = <0x30330054 5 0x0 0 0x303302c4>; 420 }; 421 /omit-if-no-ref/ mx7d_pad_epdc_data08__lcd_data8: MX7D_PAD_EPDC_DATA08__LCD_DATA8 { 422 pinmux = <0x30330054 6 0x30330658 0 0x303302c4>; 423 }; 424 /omit-if-no-ref/ mx7d_pad_epdc_data08__lcd_busy: MX7D_PAD_EPDC_DATA08__LCD_BUSY { 425 pinmux = <0x30330054 7 0x30330634 0 0x303302c4>; 426 }; 427 /omit-if-no-ref/ mx7d_pad_epdc_data08__epdc_sdclk: MX7D_PAD_EPDC_DATA08__EPDC_SDCLK { 428 pinmux = <0x30330054 8 0x0 0 0x303302c4>; 429 }; 430 /omit-if-no-ref/ mx7d_pad_epdc_data09__epdc_data9: MX7D_PAD_EPDC_DATA09__EPDC_DATA9 { 431 pinmux = <0x30330058 0 0x0 0 0x303302c8>; 432 }; 433 /omit-if-no-ref/ mx7d_pad_epdc_data09__sim1_port1_clk: MX7D_PAD_EPDC_DATA09__SIM1_PORT1_CLK { 434 pinmux = <0x30330058 1 0x0 0 0x303302c8>; 435 }; 436 /omit-if-no-ref/ mx7d_pad_epdc_data09__qspi_b_data1: MX7D_PAD_EPDC_DATA09__QSPI_B_DATA1 { 437 pinmux = <0x30330058 2 0x0 0 0x303302c8>; 438 }; 439 /omit-if-no-ref/ mx7d_pad_epdc_data09__uart6_dce_tx: MX7D_PAD_EPDC_DATA09__UART6_DCE_TX { 440 pinmux = <0x30330058 3 0x0 0 0x303302c8>; 441 }; 442 /omit-if-no-ref/ mx7d_pad_epdc_data09__uart6_dte_rx: MX7D_PAD_EPDC_DATA09__UART6_DTE_RX { 443 pinmux = <0x30330058 3 0x3033071c 1 0x303302c8>; 444 }; 445 /omit-if-no-ref/ mx7d_pad_epdc_data09__eim_rw: MX7D_PAD_EPDC_DATA09__EIM_RW { 446 pinmux = <0x30330058 4 0x0 0 0x303302c8>; 447 }; 448 /omit-if-no-ref/ mx7d_pad_epdc_data09__gpio2_io9: MX7D_PAD_EPDC_DATA09__GPIO2_IO9 { 449 pinmux = <0x30330058 5 0x0 0 0x303302c8>; 450 }; 451 /omit-if-no-ref/ mx7d_pad_epdc_data09__lcd_data9: MX7D_PAD_EPDC_DATA09__LCD_DATA9 { 452 pinmux = <0x30330058 6 0x3033065c 0 0x303302c8>; 453 }; 454 /omit-if-no-ref/ mx7d_pad_epdc_data09__lcd_data0: MX7D_PAD_EPDC_DATA09__LCD_DATA0 { 455 pinmux = <0x30330058 7 0x30330638 1 0x303302c8>; 456 }; 457 /omit-if-no-ref/ mx7d_pad_epdc_data09__epdc_sdle: MX7D_PAD_EPDC_DATA09__EPDC_SDLE { 458 pinmux = <0x30330058 8 0x0 0 0x303302c8>; 459 }; 460 /omit-if-no-ref/ mx7d_pad_epdc_data10__epdc_data10: MX7D_PAD_EPDC_DATA10__EPDC_DATA10 { 461 pinmux = <0x3033005c 0 0x0 0 0x303302cc>; 462 }; 463 /omit-if-no-ref/ mx7d_pad_epdc_data10__sim1_port1_rst_b: MX7D_PAD_EPDC_DATA10__SIM1_PORT1_RST_B { 464 pinmux = <0x3033005c 1 0x0 0 0x303302cc>; 465 }; 466 /omit-if-no-ref/ mx7d_pad_epdc_data10__qspi_b_data2: MX7D_PAD_EPDC_DATA10__QSPI_B_DATA2 { 467 pinmux = <0x3033005c 2 0x0 0 0x303302cc>; 468 }; 469 /omit-if-no-ref/ mx7d_pad_epdc_data10__uart6_dce_rts: MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS { 470 pinmux = <0x3033005c 3 0x30330718 0 0x303302cc>; 471 }; 472 /omit-if-no-ref/ mx7d_pad_epdc_data10__uart6_dte_cts: MX7D_PAD_EPDC_DATA10__UART6_DTE_CTS { 473 pinmux = <0x3033005c 3 0x0 0 0x303302cc>; 474 }; 475 /omit-if-no-ref/ mx7d_pad_epdc_data10__eim_cs0_b: MX7D_PAD_EPDC_DATA10__EIM_CS0_B { 476 pinmux = <0x3033005c 4 0x0 0 0x303302cc>; 477 }; 478 /omit-if-no-ref/ mx7d_pad_epdc_data10__gpio2_io10: MX7D_PAD_EPDC_DATA10__GPIO2_IO10 { 479 pinmux = <0x3033005c 5 0x0 0 0x303302cc>; 480 }; 481 /omit-if-no-ref/ mx7d_pad_epdc_data10__lcd_data10: MX7D_PAD_EPDC_DATA10__LCD_DATA10 { 482 pinmux = <0x3033005c 6 0x30330660 0 0x303302cc>; 483 }; 484 /omit-if-no-ref/ mx7d_pad_epdc_data10__lcd_data9: MX7D_PAD_EPDC_DATA10__LCD_DATA9 { 485 pinmux = <0x3033005c 7 0x3033065c 1 0x303302cc>; 486 }; 487 /omit-if-no-ref/ mx7d_pad_epdc_data10__epdc_sdoe: MX7D_PAD_EPDC_DATA10__EPDC_SDOE { 488 pinmux = <0x3033005c 8 0x0 0 0x303302cc>; 489 }; 490 /omit-if-no-ref/ mx7d_pad_epdc_data11__epdc_data11: MX7D_PAD_EPDC_DATA11__EPDC_DATA11 { 491 pinmux = <0x30330060 0 0x0 0 0x303302d0>; 492 }; 493 /omit-if-no-ref/ mx7d_pad_epdc_data11__sim1_port1_sven: MX7D_PAD_EPDC_DATA11__SIM1_PORT1_SVEN { 494 pinmux = <0x30330060 1 0x0 0 0x303302d0>; 495 }; 496 /omit-if-no-ref/ mx7d_pad_epdc_data11__qspi_b_data3: MX7D_PAD_EPDC_DATA11__QSPI_B_DATA3 { 497 pinmux = <0x30330060 2 0x0 0 0x303302d0>; 498 }; 499 /omit-if-no-ref/ mx7d_pad_epdc_data11__uart6_dce_cts: MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS { 500 pinmux = <0x30330060 3 0x0 0 0x303302d0>; 501 }; 502 /omit-if-no-ref/ mx7d_pad_epdc_data11__uart6_dte_rts: MX7D_PAD_EPDC_DATA11__UART6_DTE_RTS { 503 pinmux = <0x30330060 3 0x30330718 1 0x303302d0>; 504 }; 505 /omit-if-no-ref/ mx7d_pad_epdc_data11__eim_bclk: MX7D_PAD_EPDC_DATA11__EIM_BCLK { 506 pinmux = <0x30330060 4 0x0 0 0x303302d0>; 507 }; 508 /omit-if-no-ref/ mx7d_pad_epdc_data11__gpio2_io11: MX7D_PAD_EPDC_DATA11__GPIO2_IO11 { 509 pinmux = <0x30330060 5 0x0 0 0x303302d0>; 510 }; 511 /omit-if-no-ref/ mx7d_pad_epdc_data11__lcd_data11: MX7D_PAD_EPDC_DATA11__LCD_DATA11 { 512 pinmux = <0x30330060 6 0x30330664 0 0x303302d0>; 513 }; 514 /omit-if-no-ref/ mx7d_pad_epdc_data11__lcd_data1: MX7D_PAD_EPDC_DATA11__LCD_DATA1 { 515 pinmux = <0x30330060 7 0x3033063c 1 0x303302d0>; 516 }; 517 /omit-if-no-ref/ mx7d_pad_epdc_data11__epdc_sdce0: MX7D_PAD_EPDC_DATA11__EPDC_SDCE0 { 518 pinmux = <0x30330060 8 0x0 0 0x303302d0>; 519 }; 520 /omit-if-no-ref/ mx7d_pad_epdc_data12__epdc_data12: MX7D_PAD_EPDC_DATA12__EPDC_DATA12 { 521 pinmux = <0x30330064 0 0x0 0 0x303302d4>; 522 }; 523 /omit-if-no-ref/ mx7d_pad_epdc_data12__sim1_port1_pd: MX7D_PAD_EPDC_DATA12__SIM1_PORT1_PD { 524 pinmux = <0x30330064 1 0x303306e0 0 0x303302d4>; 525 }; 526 /omit-if-no-ref/ mx7d_pad_epdc_data12__qspi_b_dqs: MX7D_PAD_EPDC_DATA12__QSPI_B_DQS { 527 pinmux = <0x30330064 2 0x0 0 0x303302d4>; 528 }; 529 /omit-if-no-ref/ mx7d_pad_epdc_data12__uart7_dce_rx: MX7D_PAD_EPDC_DATA12__UART7_DCE_RX { 530 pinmux = <0x30330064 3 0x30330724 0 0x303302d4>; 531 }; 532 /omit-if-no-ref/ mx7d_pad_epdc_data12__uart7_dte_tx: MX7D_PAD_EPDC_DATA12__UART7_DTE_TX { 533 pinmux = <0x30330064 3 0x0 0 0x303302d4>; 534 }; 535 /omit-if-no-ref/ mx7d_pad_epdc_data12__eim_lba_b: MX7D_PAD_EPDC_DATA12__EIM_LBA_B { 536 pinmux = <0x30330064 4 0x0 0 0x303302d4>; 537 }; 538 /omit-if-no-ref/ mx7d_pad_epdc_data12__gpio2_io12: MX7D_PAD_EPDC_DATA12__GPIO2_IO12 { 539 pinmux = <0x30330064 5 0x0 0 0x303302d4>; 540 }; 541 /omit-if-no-ref/ mx7d_pad_epdc_data12__lcd_data12: MX7D_PAD_EPDC_DATA12__LCD_DATA12 { 542 pinmux = <0x30330064 6 0x30330668 0 0x303302d4>; 543 }; 544 /omit-if-no-ref/ mx7d_pad_epdc_data12__lcd_data21: MX7D_PAD_EPDC_DATA12__LCD_DATA21 { 545 pinmux = <0x30330064 7 0x3033068c 0 0x303302d4>; 546 }; 547 /omit-if-no-ref/ mx7d_pad_epdc_data12__epdc_gdclk: MX7D_PAD_EPDC_DATA12__EPDC_GDCLK { 548 pinmux = <0x30330064 8 0x0 0 0x303302d4>; 549 }; 550 /omit-if-no-ref/ mx7d_pad_epdc_data13__epdc_data13: MX7D_PAD_EPDC_DATA13__EPDC_DATA13 { 551 pinmux = <0x30330068 0 0x0 0 0x303302d8>; 552 }; 553 /omit-if-no-ref/ mx7d_pad_epdc_data13__sim2_port1_trxd: MX7D_PAD_EPDC_DATA13__SIM2_PORT1_TRXD { 554 pinmux = <0x30330068 1 0x303306ec 0 0x303302d8>; 555 }; 556 /omit-if-no-ref/ mx7d_pad_epdc_data13__qspi_b_sclk: MX7D_PAD_EPDC_DATA13__QSPI_B_SCLK { 557 pinmux = <0x30330068 2 0x0 0 0x303302d8>; 558 }; 559 /omit-if-no-ref/ mx7d_pad_epdc_data13__uart7_dce_tx: MX7D_PAD_EPDC_DATA13__UART7_DCE_TX { 560 pinmux = <0x30330068 3 0x0 0 0x303302d8>; 561 }; 562 /omit-if-no-ref/ mx7d_pad_epdc_data13__uart7_dte_rx: MX7D_PAD_EPDC_DATA13__UART7_DTE_RX { 563 pinmux = <0x30330068 3 0x30330724 1 0x303302d8>; 564 }; 565 /omit-if-no-ref/ mx7d_pad_epdc_data13__eim_wait: MX7D_PAD_EPDC_DATA13__EIM_WAIT { 566 pinmux = <0x30330068 4 0x0 0 0x303302d8>; 567 }; 568 /omit-if-no-ref/ mx7d_pad_epdc_data13__gpio2_io13: MX7D_PAD_EPDC_DATA13__GPIO2_IO13 { 569 pinmux = <0x30330068 5 0x0 0 0x303302d8>; 570 }; 571 /omit-if-no-ref/ mx7d_pad_epdc_data13__lcd_data13: MX7D_PAD_EPDC_DATA13__LCD_DATA13 { 572 pinmux = <0x30330068 6 0x3033066c 0 0x303302d8>; 573 }; 574 /omit-if-no-ref/ mx7d_pad_epdc_data13__lcd_cs: MX7D_PAD_EPDC_DATA13__LCD_CS { 575 pinmux = <0x30330068 7 0x0 0 0x303302d8>; 576 }; 577 /omit-if-no-ref/ mx7d_pad_epdc_data13__epdc_gdoe: MX7D_PAD_EPDC_DATA13__EPDC_GDOE { 578 pinmux = <0x30330068 8 0x0 0 0x303302d8>; 579 }; 580 /omit-if-no-ref/ mx7d_pad_epdc_data14__epdc_data14: MX7D_PAD_EPDC_DATA14__EPDC_DATA14 { 581 pinmux = <0x3033006c 0 0x0 0 0x303302dc>; 582 }; 583 /omit-if-no-ref/ mx7d_pad_epdc_data14__sim2_port1_clk: MX7D_PAD_EPDC_DATA14__SIM2_PORT1_CLK { 584 pinmux = <0x3033006c 1 0x0 0 0x303302dc>; 585 }; 586 /omit-if-no-ref/ mx7d_pad_epdc_data14__qspi_b_ss0_b: MX7D_PAD_EPDC_DATA14__QSPI_B_SS0_B { 587 pinmux = <0x3033006c 2 0x0 0 0x303302dc>; 588 }; 589 /omit-if-no-ref/ mx7d_pad_epdc_data14__uart7_dce_rts: MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS { 590 pinmux = <0x3033006c 3 0x30330720 0 0x303302dc>; 591 }; 592 /omit-if-no-ref/ mx7d_pad_epdc_data14__uart7_dte_cts: MX7D_PAD_EPDC_DATA14__UART7_DTE_CTS { 593 pinmux = <0x3033006c 3 0x0 0 0x303302dc>; 594 }; 595 /omit-if-no-ref/ mx7d_pad_epdc_data14__eim_eb_b0: MX7D_PAD_EPDC_DATA14__EIM_EB_B0 { 596 pinmux = <0x3033006c 4 0x0 0 0x303302dc>; 597 }; 598 /omit-if-no-ref/ mx7d_pad_epdc_data14__gpio2_io14: MX7D_PAD_EPDC_DATA14__GPIO2_IO14 { 599 pinmux = <0x3033006c 5 0x0 0 0x303302dc>; 600 }; 601 /omit-if-no-ref/ mx7d_pad_epdc_data14__lcd_data14: MX7D_PAD_EPDC_DATA14__LCD_DATA14 { 602 pinmux = <0x3033006c 6 0x30330670 0 0x303302dc>; 603 }; 604 /omit-if-no-ref/ mx7d_pad_epdc_data14__lcd_data22: MX7D_PAD_EPDC_DATA14__LCD_DATA22 { 605 pinmux = <0x3033006c 7 0x30330690 0 0x303302dc>; 606 }; 607 /omit-if-no-ref/ mx7d_pad_epdc_data14__epdc_gdsp: MX7D_PAD_EPDC_DATA14__EPDC_GDSP { 608 pinmux = <0x3033006c 8 0x0 0 0x303302dc>; 609 }; 610 /omit-if-no-ref/ mx7d_pad_epdc_data15__epdc_data15: MX7D_PAD_EPDC_DATA15__EPDC_DATA15 { 611 pinmux = <0x30330070 0 0x0 0 0x303302e0>; 612 }; 613 /omit-if-no-ref/ mx7d_pad_epdc_data15__sim2_port1_rst_b: MX7D_PAD_EPDC_DATA15__SIM2_PORT1_RST_B { 614 pinmux = <0x30330070 1 0x0 0 0x303302e0>; 615 }; 616 /omit-if-no-ref/ mx7d_pad_epdc_data15__qspi_b_ss1_b: MX7D_PAD_EPDC_DATA15__QSPI_B_SS1_B { 617 pinmux = <0x30330070 2 0x0 0 0x303302e0>; 618 }; 619 /omit-if-no-ref/ mx7d_pad_epdc_data15__uart7_dce_cts: MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS { 620 pinmux = <0x30330070 3 0x0 0 0x303302e0>; 621 }; 622 /omit-if-no-ref/ mx7d_pad_epdc_data15__uart7_dte_rts: MX7D_PAD_EPDC_DATA15__UART7_DTE_RTS { 623 pinmux = <0x30330070 3 0x30330720 1 0x303302e0>; 624 }; 625 /omit-if-no-ref/ mx7d_pad_epdc_data15__eim_cs1_b: MX7D_PAD_EPDC_DATA15__EIM_CS1_B { 626 pinmux = <0x30330070 4 0x0 0 0x303302e0>; 627 }; 628 /omit-if-no-ref/ mx7d_pad_epdc_data15__gpio2_io15: MX7D_PAD_EPDC_DATA15__GPIO2_IO15 { 629 pinmux = <0x30330070 5 0x0 0 0x303302e0>; 630 }; 631 /omit-if-no-ref/ mx7d_pad_epdc_data15__lcd_data15: MX7D_PAD_EPDC_DATA15__LCD_DATA15 { 632 pinmux = <0x30330070 6 0x30330674 0 0x303302e0>; 633 }; 634 /omit-if-no-ref/ mx7d_pad_epdc_data15__lcd_wr_rwn: MX7D_PAD_EPDC_DATA15__LCD_WR_RWN { 635 pinmux = <0x30330070 7 0x0 0 0x303302e0>; 636 }; 637 /omit-if-no-ref/ mx7d_pad_epdc_data15__epdc_pwr_com: MX7D_PAD_EPDC_DATA15__EPDC_PWR_COM { 638 pinmux = <0x30330070 8 0x0 0 0x303302e0>; 639 }; 640 /omit-if-no-ref/ mx7d_pad_epdc_sdclk__epdc_sdclk: MX7D_PAD_EPDC_SDCLK__EPDC_SDCLK { 641 pinmux = <0x30330074 0 0x0 0 0x303302e4>; 642 }; 643 /omit-if-no-ref/ mx7d_pad_epdc_sdclk__sim2_port2_sven: MX7D_PAD_EPDC_SDCLK__SIM2_PORT2_SVEN { 644 pinmux = <0x30330074 1 0x0 0 0x303302e4>; 645 }; 646 /omit-if-no-ref/ mx7d_pad_epdc_sdclk__enet2_rgmii_rd0: MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 { 647 pinmux = <0x30330074 2 0x0 0 0x303302e4>; 648 }; 649 /omit-if-no-ref/ mx7d_pad_epdc_sdclk__kpp_row4: MX7D_PAD_EPDC_SDCLK__KPP_ROW4 { 650 pinmux = <0x30330074 3 0x30330624 0 0x303302e4>; 651 }; 652 /omit-if-no-ref/ mx7d_pad_epdc_sdclk__eim_ad10: MX7D_PAD_EPDC_SDCLK__EIM_AD10 { 653 pinmux = <0x30330074 4 0x0 0 0x303302e4>; 654 }; 655 /omit-if-no-ref/ mx7d_pad_epdc_sdclk__gpio2_io16: MX7D_PAD_EPDC_SDCLK__GPIO2_IO16 { 656 pinmux = <0x30330074 5 0x0 0 0x303302e4>; 657 }; 658 /omit-if-no-ref/ mx7d_pad_epdc_sdclk__lcd_clk: MX7D_PAD_EPDC_SDCLK__LCD_CLK { 659 pinmux = <0x30330074 6 0x0 0 0x303302e4>; 660 }; 661 /omit-if-no-ref/ mx7d_pad_epdc_sdclk__lcd_data20: MX7D_PAD_EPDC_SDCLK__LCD_DATA20 { 662 pinmux = <0x30330074 7 0x30330688 0 0x303302e4>; 663 }; 664 /omit-if-no-ref/ mx7d_pad_epdc_sdle__epdc_sdle: MX7D_PAD_EPDC_SDLE__EPDC_SDLE { 665 pinmux = <0x30330078 0 0x0 0 0x303302e8>; 666 }; 667 /omit-if-no-ref/ mx7d_pad_epdc_sdle__sim2_port2_pd: MX7D_PAD_EPDC_SDLE__SIM2_PORT2_PD { 668 pinmux = <0x30330078 1 0x0 0 0x303302e8>; 669 }; 670 /omit-if-no-ref/ mx7d_pad_epdc_sdle__enet2_rgmii_rd1: MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 { 671 pinmux = <0x30330078 2 0x0 0 0x303302e8>; 672 }; 673 /omit-if-no-ref/ mx7d_pad_epdc_sdle__kpp_col4: MX7D_PAD_EPDC_SDLE__KPP_COL4 { 674 pinmux = <0x30330078 3 0x30330604 0 0x303302e8>; 675 }; 676 /omit-if-no-ref/ mx7d_pad_epdc_sdle__eim_ad11: MX7D_PAD_EPDC_SDLE__EIM_AD11 { 677 pinmux = <0x30330078 4 0x0 0 0x303302e8>; 678 }; 679 /omit-if-no-ref/ mx7d_pad_epdc_sdle__gpio2_io17: MX7D_PAD_EPDC_SDLE__GPIO2_IO17 { 680 pinmux = <0x30330078 5 0x0 0 0x303302e8>; 681 }; 682 /omit-if-no-ref/ mx7d_pad_epdc_sdle__lcd_data16: MX7D_PAD_EPDC_SDLE__LCD_DATA16 { 683 pinmux = <0x30330078 6 0x30330678 0 0x303302e8>; 684 }; 685 /omit-if-no-ref/ mx7d_pad_epdc_sdle__lcd_data8: MX7D_PAD_EPDC_SDLE__LCD_DATA8 { 686 pinmux = <0x30330078 7 0x30330658 1 0x303302e8>; 687 }; 688 /omit-if-no-ref/ mx7d_pad_epdc_sdoe__epdc_sdoe: MX7D_PAD_EPDC_SDOE__EPDC_SDOE { 689 pinmux = <0x3033007c 0 0x0 0 0x303302ec>; 690 }; 691 /omit-if-no-ref/ mx7d_pad_epdc_sdoe__flextimer1_ch0: MX7D_PAD_EPDC_SDOE__FLEXTIMER1_CH0 { 692 pinmux = <0x3033007c 1 0x30330584 0 0x303302ec>; 693 }; 694 /omit-if-no-ref/ mx7d_pad_epdc_sdoe__enet2_rgmii_rd2: MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 { 695 pinmux = <0x3033007c 2 0x0 0 0x303302ec>; 696 }; 697 /omit-if-no-ref/ mx7d_pad_epdc_sdoe__kpp_col5: MX7D_PAD_EPDC_SDOE__KPP_COL5 { 698 pinmux = <0x3033007c 3 0x30330608 1 0x303302ec>; 699 }; 700 /omit-if-no-ref/ mx7d_pad_epdc_sdoe__eim_ad12: MX7D_PAD_EPDC_SDOE__EIM_AD12 { 701 pinmux = <0x3033007c 4 0x0 0 0x303302ec>; 702 }; 703 /omit-if-no-ref/ mx7d_pad_epdc_sdoe__gpio2_io18: MX7D_PAD_EPDC_SDOE__GPIO2_IO18 { 704 pinmux = <0x3033007c 5 0x0 0 0x303302ec>; 705 }; 706 /omit-if-no-ref/ mx7d_pad_epdc_sdoe__lcd_data17: MX7D_PAD_EPDC_SDOE__LCD_DATA17 { 707 pinmux = <0x3033007c 6 0x3033067c 0 0x303302ec>; 708 }; 709 /omit-if-no-ref/ mx7d_pad_epdc_sdoe__lcd_data23: MX7D_PAD_EPDC_SDOE__LCD_DATA23 { 710 pinmux = <0x3033007c 7 0x30330694 0 0x303302ec>; 711 }; 712 /omit-if-no-ref/ mx7d_pad_epdc_sdshr__epdc_sdshr: MX7D_PAD_EPDC_SDSHR__EPDC_SDSHR { 713 pinmux = <0x30330080 0 0x0 0 0x303302f0>; 714 }; 715 /omit-if-no-ref/ mx7d_pad_epdc_sdshr__flextimer1_ch1: MX7D_PAD_EPDC_SDSHR__FLEXTIMER1_CH1 { 716 pinmux = <0x30330080 1 0x30330588 0 0x303302f0>; 717 }; 718 /omit-if-no-ref/ mx7d_pad_epdc_sdshr__enet2_rgmii_rd3: MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 { 719 pinmux = <0x30330080 2 0x0 0 0x303302f0>; 720 }; 721 /omit-if-no-ref/ mx7d_pad_epdc_sdshr__kpp_row5: MX7D_PAD_EPDC_SDSHR__KPP_ROW5 { 722 pinmux = <0x30330080 3 0x30330628 1 0x303302f0>; 723 }; 724 /omit-if-no-ref/ mx7d_pad_epdc_sdshr__eim_ad13: MX7D_PAD_EPDC_SDSHR__EIM_AD13 { 725 pinmux = <0x30330080 4 0x0 0 0x303302f0>; 726 }; 727 /omit-if-no-ref/ mx7d_pad_epdc_sdshr__gpio2_io19: MX7D_PAD_EPDC_SDSHR__GPIO2_IO19 { 728 pinmux = <0x30330080 5 0x0 0 0x303302f0>; 729 }; 730 /omit-if-no-ref/ mx7d_pad_epdc_sdshr__lcd_data18: MX7D_PAD_EPDC_SDSHR__LCD_DATA18 { 731 pinmux = <0x30330080 6 0x30330680 0 0x303302f0>; 732 }; 733 /omit-if-no-ref/ mx7d_pad_epdc_sdshr__lcd_data10: MX7D_PAD_EPDC_SDSHR__LCD_DATA10 { 734 pinmux = <0x30330080 7 0x30330660 1 0x303302f0>; 735 }; 736 /omit-if-no-ref/ mx7d_pad_epdc_sdce0__epdc_sdce0: MX7D_PAD_EPDC_SDCE0__EPDC_SDCE0 { 737 pinmux = <0x30330084 0 0x0 0 0x303302f4>; 738 }; 739 /omit-if-no-ref/ mx7d_pad_epdc_sdce0__flextimer1_ch2: MX7D_PAD_EPDC_SDCE0__FLEXTIMER1_CH2 { 740 pinmux = <0x30330084 1 0x3033058c 0 0x303302f4>; 741 }; 742 /omit-if-no-ref/ mx7d_pad_epdc_sdce0__enet2_rgmii_rx_ctl: MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL { 743 pinmux = <0x30330084 2 0x0 0 0x303302f4>; 744 }; 745 /omit-if-no-ref/ mx7d_pad_epdc_sdce0__eim_ad14: MX7D_PAD_EPDC_SDCE0__EIM_AD14 { 746 pinmux = <0x30330084 4 0x0 0 0x303302f4>; 747 }; 748 /omit-if-no-ref/ mx7d_pad_epdc_sdce0__gpio2_io20: MX7D_PAD_EPDC_SDCE0__GPIO2_IO20 { 749 pinmux = <0x30330084 5 0x0 0 0x303302f4>; 750 }; 751 /omit-if-no-ref/ mx7d_pad_epdc_sdce0__lcd_data19: MX7D_PAD_EPDC_SDCE0__LCD_DATA19 { 752 pinmux = <0x30330084 6 0x30330684 0 0x303302f4>; 753 }; 754 /omit-if-no-ref/ mx7d_pad_epdc_sdce0__lcd_data5: MX7D_PAD_EPDC_SDCE0__LCD_DATA5 { 755 pinmux = <0x30330084 7 0x3033064c 1 0x303302f4>; 756 }; 757 /omit-if-no-ref/ mx7d_pad_epdc_sdce1__epdc_sdce1: MX7D_PAD_EPDC_SDCE1__EPDC_SDCE1 { 758 pinmux = <0x30330088 0 0x0 0 0x303302f8>; 759 }; 760 /omit-if-no-ref/ mx7d_pad_epdc_sdce1__flextimer1_ch3: MX7D_PAD_EPDC_SDCE1__FLEXTIMER1_CH3 { 761 pinmux = <0x30330088 1 0x30330590 0 0x303302f8>; 762 }; 763 /omit-if-no-ref/ mx7d_pad_epdc_sdce1__enet2_rgmii_rxc: MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC { 764 pinmux = <0x30330088 2 0x30330578 0 0x303302f8>; 765 }; 766 /omit-if-no-ref/ mx7d_pad_epdc_sdce1__enet2_rx_er: MX7D_PAD_EPDC_SDCE1__ENET2_RX_ER { 767 pinmux = <0x30330088 3 0x0 0 0x303302f8>; 768 }; 769 /omit-if-no-ref/ mx7d_pad_epdc_sdce1__eim_ad15: MX7D_PAD_EPDC_SDCE1__EIM_AD15 { 770 pinmux = <0x30330088 4 0x0 0 0x303302f8>; 771 }; 772 /omit-if-no-ref/ mx7d_pad_epdc_sdce1__gpio2_io21: MX7D_PAD_EPDC_SDCE1__GPIO2_IO21 { 773 pinmux = <0x30330088 5 0x0 0 0x303302f8>; 774 }; 775 /omit-if-no-ref/ mx7d_pad_epdc_sdce1__lcd_data20: MX7D_PAD_EPDC_SDCE1__LCD_DATA20 { 776 pinmux = <0x30330088 6 0x30330688 1 0x303302f8>; 777 }; 778 /omit-if-no-ref/ mx7d_pad_epdc_sdce1__lcd_data4: MX7D_PAD_EPDC_SDCE1__LCD_DATA4 { 779 pinmux = <0x30330088 7 0x30330648 1 0x303302f8>; 780 }; 781 /omit-if-no-ref/ mx7d_pad_epdc_sdce2__epdc_sdce2: MX7D_PAD_EPDC_SDCE2__EPDC_SDCE2 { 782 pinmux = <0x3033008c 0 0x0 0 0x303302fc>; 783 }; 784 /omit-if-no-ref/ mx7d_pad_epdc_sdce2__sim2_port1_sven: MX7D_PAD_EPDC_SDCE2__SIM2_PORT1_SVEN { 785 pinmux = <0x3033008c 1 0x0 0 0x303302fc>; 786 }; 787 /omit-if-no-ref/ mx7d_pad_epdc_sdce2__enet2_rgmii_td0: MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 { 788 pinmux = <0x3033008c 2 0x0 0 0x303302fc>; 789 }; 790 /omit-if-no-ref/ mx7d_pad_epdc_sdce2__kpp_col6: MX7D_PAD_EPDC_SDCE2__KPP_COL6 { 791 pinmux = <0x3033008c 3 0x3033060c 1 0x303302fc>; 792 }; 793 /omit-if-no-ref/ mx7d_pad_epdc_sdce2__eim_addr16: MX7D_PAD_EPDC_SDCE2__EIM_ADDR16 { 794 pinmux = <0x3033008c 4 0x0 0 0x303302fc>; 795 }; 796 /omit-if-no-ref/ mx7d_pad_epdc_sdce2__gpio2_io22: MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 { 797 pinmux = <0x3033008c 5 0x0 0 0x303302fc>; 798 }; 799 /omit-if-no-ref/ mx7d_pad_epdc_sdce2__lcd_data21: MX7D_PAD_EPDC_SDCE2__LCD_DATA21 { 800 pinmux = <0x3033008c 6 0x3033068c 1 0x303302fc>; 801 }; 802 /omit-if-no-ref/ mx7d_pad_epdc_sdce2__lcd_data3: MX7D_PAD_EPDC_SDCE2__LCD_DATA3 { 803 pinmux = <0x3033008c 7 0x30330644 1 0x303302fc>; 804 }; 805 /omit-if-no-ref/ mx7d_pad_epdc_sdce3__epdc_sdce3: MX7D_PAD_EPDC_SDCE3__EPDC_SDCE3 { 806 pinmux = <0x30330090 0 0x0 0 0x30330300>; 807 }; 808 /omit-if-no-ref/ mx7d_pad_epdc_sdce3__sim2_port1_pd: MX7D_PAD_EPDC_SDCE3__SIM2_PORT1_PD { 809 pinmux = <0x30330090 1 0x303306e8 0 0x30330300>; 810 }; 811 /omit-if-no-ref/ mx7d_pad_epdc_sdce3__enet2_rgmii_td1: MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 { 812 pinmux = <0x30330090 2 0x0 0 0x30330300>; 813 }; 814 /omit-if-no-ref/ mx7d_pad_epdc_sdce3__kpp_row6: MX7D_PAD_EPDC_SDCE3__KPP_ROW6 { 815 pinmux = <0x30330090 3 0x3033062c 1 0x30330300>; 816 }; 817 /omit-if-no-ref/ mx7d_pad_epdc_sdce3__eim_addr17: MX7D_PAD_EPDC_SDCE3__EIM_ADDR17 { 818 pinmux = <0x30330090 4 0x0 0 0x30330300>; 819 }; 820 /omit-if-no-ref/ mx7d_pad_epdc_sdce3__gpio2_io23: MX7D_PAD_EPDC_SDCE3__GPIO2_IO23 { 821 pinmux = <0x30330090 5 0x0 0 0x30330300>; 822 }; 823 /omit-if-no-ref/ mx7d_pad_epdc_sdce3__lcd_data22: MX7D_PAD_EPDC_SDCE3__LCD_DATA22 { 824 pinmux = <0x30330090 6 0x30330690 1 0x30330300>; 825 }; 826 /omit-if-no-ref/ mx7d_pad_epdc_sdce3__lcd_data2: MX7D_PAD_EPDC_SDCE3__LCD_DATA2 { 827 pinmux = <0x30330090 7 0x30330640 1 0x30330300>; 828 }; 829 /omit-if-no-ref/ mx7d_pad_epdc_gdclk__epdc_gdclk: MX7D_PAD_EPDC_GDCLK__EPDC_GDCLK { 830 pinmux = <0x30330094 0 0x0 0 0x30330304>; 831 }; 832 /omit-if-no-ref/ mx7d_pad_epdc_gdclk__flextimer2_ch0: MX7D_PAD_EPDC_GDCLK__FLEXTIMER2_CH0 { 833 pinmux = <0x30330094 1 0x303305ac 0 0x30330304>; 834 }; 835 /omit-if-no-ref/ mx7d_pad_epdc_gdclk__enet2_rgmii_td2: MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 { 836 pinmux = <0x30330094 2 0x0 0 0x30330304>; 837 }; 838 /omit-if-no-ref/ mx7d_pad_epdc_gdclk__kpp_col7: MX7D_PAD_EPDC_GDCLK__KPP_COL7 { 839 pinmux = <0x30330094 3 0x30330610 0 0x30330304>; 840 }; 841 /omit-if-no-ref/ mx7d_pad_epdc_gdclk__eim_addr18: MX7D_PAD_EPDC_GDCLK__EIM_ADDR18 { 842 pinmux = <0x30330094 4 0x0 0 0x30330304>; 843 }; 844 /omit-if-no-ref/ mx7d_pad_epdc_gdclk__gpio2_io24: MX7D_PAD_EPDC_GDCLK__GPIO2_IO24 { 845 pinmux = <0x30330094 5 0x0 0 0x30330304>; 846 }; 847 /omit-if-no-ref/ mx7d_pad_epdc_gdclk__lcd_data23: MX7D_PAD_EPDC_GDCLK__LCD_DATA23 { 848 pinmux = <0x30330094 6 0x30330694 1 0x30330304>; 849 }; 850 /omit-if-no-ref/ mx7d_pad_epdc_gdclk__lcd_data16: MX7D_PAD_EPDC_GDCLK__LCD_DATA16 { 851 pinmux = <0x30330094 7 0x30330678 1 0x30330304>; 852 }; 853 /omit-if-no-ref/ mx7d_pad_epdc_gdoe__epdc_gdoe: MX7D_PAD_EPDC_GDOE__EPDC_GDOE { 854 pinmux = <0x30330098 0 0x0 0 0x30330308>; 855 }; 856 /omit-if-no-ref/ mx7d_pad_epdc_gdoe__flextimer2_ch1: MX7D_PAD_EPDC_GDOE__FLEXTIMER2_CH1 { 857 pinmux = <0x30330098 1 0x303305b0 0 0x30330308>; 858 }; 859 /omit-if-no-ref/ mx7d_pad_epdc_gdoe__enet2_rgmii_td3: MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 { 860 pinmux = <0x30330098 2 0x0 0 0x30330308>; 861 }; 862 /omit-if-no-ref/ mx7d_pad_epdc_gdoe__kpp_row7: MX7D_PAD_EPDC_GDOE__KPP_ROW7 { 863 pinmux = <0x30330098 3 0x30330630 0 0x30330308>; 864 }; 865 /omit-if-no-ref/ mx7d_pad_epdc_gdoe__eim_addr19: MX7D_PAD_EPDC_GDOE__EIM_ADDR19 { 866 pinmux = <0x30330098 4 0x0 0 0x30330308>; 867 }; 868 /omit-if-no-ref/ mx7d_pad_epdc_gdoe__gpio2_io25: MX7D_PAD_EPDC_GDOE__GPIO2_IO25 { 869 pinmux = <0x30330098 5 0x0 0 0x30330308>; 870 }; 871 /omit-if-no-ref/ mx7d_pad_epdc_gdoe__lcd_wr_rwn: MX7D_PAD_EPDC_GDOE__LCD_WR_RWN { 872 pinmux = <0x30330098 6 0x0 0 0x30330308>; 873 }; 874 /omit-if-no-ref/ mx7d_pad_epdc_gdoe__lcd_data18: MX7D_PAD_EPDC_GDOE__LCD_DATA18 { 875 pinmux = <0x30330098 7 0x30330680 1 0x30330308>; 876 }; 877 /omit-if-no-ref/ mx7d_pad_epdc_gdrl__epdc_gdrl: MX7D_PAD_EPDC_GDRL__EPDC_GDRL { 878 pinmux = <0x3033009c 0 0x0 0 0x3033030c>; 879 }; 880 /omit-if-no-ref/ mx7d_pad_epdc_gdrl__flextimer2_ch2: MX7D_PAD_EPDC_GDRL__FLEXTIMER2_CH2 { 881 pinmux = <0x3033009c 1 0x303305b4 0 0x3033030c>; 882 }; 883 /omit-if-no-ref/ mx7d_pad_epdc_gdrl__enet2_rgmii_tx_ctl: MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL { 884 pinmux = <0x3033009c 2 0x0 0 0x3033030c>; 885 }; 886 /omit-if-no-ref/ mx7d_pad_epdc_gdrl__eim_addr20: MX7D_PAD_EPDC_GDRL__EIM_ADDR20 { 887 pinmux = <0x3033009c 4 0x0 0 0x3033030c>; 888 }; 889 /omit-if-no-ref/ mx7d_pad_epdc_gdrl__gpio2_io26: MX7D_PAD_EPDC_GDRL__GPIO2_IO26 { 890 pinmux = <0x3033009c 5 0x0 0 0x3033030c>; 891 }; 892 /omit-if-no-ref/ mx7d_pad_epdc_gdrl__lcd_rd_e: MX7D_PAD_EPDC_GDRL__LCD_RD_E { 893 pinmux = <0x3033009c 6 0x0 0 0x3033030c>; 894 }; 895 /omit-if-no-ref/ mx7d_pad_epdc_gdrl__lcd_data19: MX7D_PAD_EPDC_GDRL__LCD_DATA19 { 896 pinmux = <0x3033009c 7 0x30330684 1 0x3033030c>; 897 }; 898 /omit-if-no-ref/ mx7d_pad_epdc_gdsp__epdc_gdsp: MX7D_PAD_EPDC_GDSP__EPDC_GDSP { 899 pinmux = <0x303300a0 0 0x0 0 0x30330310>; 900 }; 901 /omit-if-no-ref/ mx7d_pad_epdc_gdsp__flextimer2_ch3: MX7D_PAD_EPDC_GDSP__FLEXTIMER2_CH3 { 902 pinmux = <0x303300a0 1 0x303305b8 0 0x30330310>; 903 }; 904 /omit-if-no-ref/ mx7d_pad_epdc_gdsp__enet2_rgmii_txc: MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC { 905 pinmux = <0x303300a0 2 0x0 0 0x30330310>; 906 }; 907 /omit-if-no-ref/ mx7d_pad_epdc_gdsp__enet2_tx_er: MX7D_PAD_EPDC_GDSP__ENET2_TX_ER { 908 pinmux = <0x303300a0 3 0x0 0 0x30330310>; 909 }; 910 /omit-if-no-ref/ mx7d_pad_epdc_gdsp__eim_addr21: MX7D_PAD_EPDC_GDSP__EIM_ADDR21 { 911 pinmux = <0x303300a0 4 0x0 0 0x30330310>; 912 }; 913 /omit-if-no-ref/ mx7d_pad_epdc_gdsp__gpio2_io27: MX7D_PAD_EPDC_GDSP__GPIO2_IO27 { 914 pinmux = <0x303300a0 5 0x0 0 0x30330310>; 915 }; 916 /omit-if-no-ref/ mx7d_pad_epdc_gdsp__lcd_busy: MX7D_PAD_EPDC_GDSP__LCD_BUSY { 917 pinmux = <0x303300a0 6 0x30330634 1 0x30330310>; 918 }; 919 /omit-if-no-ref/ mx7d_pad_epdc_gdsp__lcd_data17: MX7D_PAD_EPDC_GDSP__LCD_DATA17 { 920 pinmux = <0x303300a0 7 0x3033067c 1 0x30330310>; 921 }; 922 /omit-if-no-ref/ mx7d_pad_epdc_bdr0__epdc_bdr0: MX7D_PAD_EPDC_BDR0__EPDC_BDR0 { 923 pinmux = <0x303300a4 0 0x0 0 0x30330314>; 924 }; 925 /omit-if-no-ref/ mx7d_pad_epdc_bdr0__enet2_tx_clk: MX7D_PAD_EPDC_BDR0__ENET2_TX_CLK { 926 pinmux = <0x303300a4 2 0x0 0 0x30330314>; 927 }; 928 /omit-if-no-ref/ mx7d_pad_epdc_bdr0__ccm_enet2_ref_clk: MX7D_PAD_EPDC_BDR0__CCM_ENET2_REF_CLK { 929 pinmux = <0x303300a4 3 0x30330570 1 0x30330314>; 930 }; 931 /omit-if-no-ref/ mx7d_pad_epdc_bdr0__eim_addr22: MX7D_PAD_EPDC_BDR0__EIM_ADDR22 { 932 pinmux = <0x303300a4 4 0x0 0 0x30330314>; 933 }; 934 /omit-if-no-ref/ mx7d_pad_epdc_bdr0__gpio2_io28: MX7D_PAD_EPDC_BDR0__GPIO2_IO28 { 935 pinmux = <0x303300a4 5 0x0 0 0x30330314>; 936 }; 937 /omit-if-no-ref/ mx7d_pad_epdc_bdr0__lcd_cs: MX7D_PAD_EPDC_BDR0__LCD_CS { 938 pinmux = <0x303300a4 6 0x0 0 0x30330314>; 939 }; 940 /omit-if-no-ref/ mx7d_pad_epdc_bdr0__lcd_data7: MX7D_PAD_EPDC_BDR0__LCD_DATA7 { 941 pinmux = <0x303300a4 7 0x30330654 1 0x30330314>; 942 }; 943 /omit-if-no-ref/ mx7d_pad_epdc_bdr1__epdc_bdr1: MX7D_PAD_EPDC_BDR1__EPDC_BDR1 { 944 pinmux = <0x303300a8 0 0x0 0 0x30330318>; 945 }; 946 /omit-if-no-ref/ mx7d_pad_epdc_bdr1__epdc_sdclkn: MX7D_PAD_EPDC_BDR1__EPDC_SDCLKN { 947 pinmux = <0x303300a8 1 0x0 0 0x30330318>; 948 }; 949 /omit-if-no-ref/ mx7d_pad_epdc_bdr1__enet2_rx_clk: MX7D_PAD_EPDC_BDR1__ENET2_RX_CLK { 950 pinmux = <0x303300a8 2 0x30330578 1 0x30330318>; 951 }; 952 /omit-if-no-ref/ mx7d_pad_epdc_bdr1__eim_ad8: MX7D_PAD_EPDC_BDR1__EIM_AD8 { 953 pinmux = <0x303300a8 4 0x0 0 0x30330318>; 954 }; 955 /omit-if-no-ref/ mx7d_pad_epdc_bdr1__gpio2_io29: MX7D_PAD_EPDC_BDR1__GPIO2_IO29 { 956 pinmux = <0x303300a8 5 0x0 0 0x30330318>; 957 }; 958 /omit-if-no-ref/ mx7d_pad_epdc_bdr1__lcd_enable: MX7D_PAD_EPDC_BDR1__LCD_ENABLE { 959 pinmux = <0x303300a8 6 0x0 0 0x30330318>; 960 }; 961 /omit-if-no-ref/ mx7d_pad_epdc_bdr1__lcd_data6: MX7D_PAD_EPDC_BDR1__LCD_DATA6 { 962 pinmux = <0x303300a8 7 0x30330650 1 0x30330318>; 963 }; 964 /omit-if-no-ref/ mx7d_pad_epdc_pwr_com__epdc_pwr_com: MX7D_PAD_EPDC_PWR_COM__EPDC_PWR_COM { 965 pinmux = <0x303300ac 0 0x0 0 0x3033031c>; 966 }; 967 /omit-if-no-ref/ mx7d_pad_epdc_pwr_com__flextimer2_pha: MX7D_PAD_EPDC_PWR_COM__FLEXTIMER2_PHA { 968 pinmux = <0x303300ac 1 0x303305cc 0 0x3033031c>; 969 }; 970 /omit-if-no-ref/ mx7d_pad_epdc_pwr_com__enet2_crs: MX7D_PAD_EPDC_PWR_COM__ENET2_CRS { 971 pinmux = <0x303300ac 2 0x0 0 0x3033031c>; 972 }; 973 /omit-if-no-ref/ mx7d_pad_epdc_pwr_com__eim_ad9: MX7D_PAD_EPDC_PWR_COM__EIM_AD9 { 974 pinmux = <0x303300ac 4 0x0 0 0x3033031c>; 975 }; 976 /omit-if-no-ref/ mx7d_pad_epdc_pwr_com__gpio2_io30: MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 { 977 pinmux = <0x303300ac 5 0x0 0 0x3033031c>; 978 }; 979 /omit-if-no-ref/ mx7d_pad_epdc_pwr_com__lcd_hsync: MX7D_PAD_EPDC_PWR_COM__LCD_HSYNC { 980 pinmux = <0x303300ac 6 0x0 0 0x3033031c>; 981 }; 982 /omit-if-no-ref/ mx7d_pad_epdc_pwr_com__lcd_data11: MX7D_PAD_EPDC_PWR_COM__LCD_DATA11 { 983 pinmux = <0x303300ac 7 0x30330664 1 0x3033031c>; 984 }; 985 /omit-if-no-ref/ mx7d_pad_epdc_pwr_stat__epdc_pwr_stat: MX7D_PAD_EPDC_PWR_STAT__EPDC_PWR_STAT { 986 pinmux = <0x303300b0 0 0x30330580 0 0x30330320>; 987 }; 988 /omit-if-no-ref/ mx7d_pad_epdc_pwr_stat__flextimer2_phb: MX7D_PAD_EPDC_PWR_STAT__FLEXTIMER2_PHB { 989 pinmux = <0x303300b0 1 0x303305d0 0 0x30330320>; 990 }; 991 /omit-if-no-ref/ mx7d_pad_epdc_pwr_stat__enet2_col: MX7D_PAD_EPDC_PWR_STAT__ENET2_COL { 992 pinmux = <0x303300b0 2 0x0 0 0x30330320>; 993 }; 994 /omit-if-no-ref/ mx7d_pad_epdc_pwr_stat__eim_eb_b1: MX7D_PAD_EPDC_PWR_STAT__EIM_EB_B1 { 995 pinmux = <0x303300b0 4 0x0 0 0x30330320>; 996 }; 997 /omit-if-no-ref/ mx7d_pad_epdc_pwr_stat__gpio2_io31: MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 { 998 pinmux = <0x303300b0 5 0x0 0 0x30330320>; 999 }; 1000 /omit-if-no-ref/ mx7d_pad_epdc_pwr_stat__lcd_vsync: MX7D_PAD_EPDC_PWR_STAT__LCD_VSYNC { 1001 pinmux = <0x303300b0 6 0x30330698 1 0x30330320>; 1002 }; 1003 /omit-if-no-ref/ mx7d_pad_epdc_pwr_stat__lcd_data12: MX7D_PAD_EPDC_PWR_STAT__LCD_DATA12 { 1004 pinmux = <0x303300b0 7 0x30330668 1 0x30330320>; 1005 }; 1006 /omit-if-no-ref/ mx7d_pad_lcd_clk__lcd_clk: MX7D_PAD_LCD_CLK__LCD_CLK { 1007 pinmux = <0x303300b4 0 0x0 0 0x30330324>; 1008 }; 1009 /omit-if-no-ref/ mx7d_pad_lcd_clk__ecspi4_miso: MX7D_PAD_LCD_CLK__ECSPI4_MISO { 1010 pinmux = <0x303300b4 1 0x30330558 0 0x30330324>; 1011 }; 1012 /omit-if-no-ref/ mx7d_pad_lcd_clk__enet1_1588_event2_in: MX7D_PAD_LCD_CLK__ENET1_1588_EVENT2_IN { 1013 pinmux = <0x303300b4 2 0x0 0 0x30330324>; 1014 }; 1015 /omit-if-no-ref/ mx7d_pad_lcd_clk__csi_data16: MX7D_PAD_LCD_CLK__CSI_DATA16 { 1016 pinmux = <0x303300b4 3 0x0 0 0x30330324>; 1017 }; 1018 /omit-if-no-ref/ mx7d_pad_lcd_clk__uart2_dce_rx: MX7D_PAD_LCD_CLK__UART2_DCE_RX { 1019 pinmux = <0x303300b4 4 0x303306fc 0 0x30330324>; 1020 }; 1021 /omit-if-no-ref/ mx7d_pad_lcd_clk__uart2_dte_tx: MX7D_PAD_LCD_CLK__UART2_DTE_TX { 1022 pinmux = <0x303300b4 4 0x0 0 0x30330324>; 1023 }; 1024 /omit-if-no-ref/ mx7d_pad_lcd_clk__gpio3_io0: MX7D_PAD_LCD_CLK__GPIO3_IO0 { 1025 pinmux = <0x303300b4 5 0x0 0 0x30330324>; 1026 }; 1027 /omit-if-no-ref/ mx7d_pad_lcd_enable__lcd_enable: MX7D_PAD_LCD_ENABLE__LCD_ENABLE { 1028 pinmux = <0x303300b8 0 0x0 0 0x30330328>; 1029 }; 1030 /omit-if-no-ref/ mx7d_pad_lcd_enable__ecspi4_mosi: MX7D_PAD_LCD_ENABLE__ECSPI4_MOSI { 1031 pinmux = <0x303300b8 1 0x3033055c 0 0x30330328>; 1032 }; 1033 /omit-if-no-ref/ mx7d_pad_lcd_enable__enet1_1588_event3_in: MX7D_PAD_LCD_ENABLE__ENET1_1588_EVENT3_IN { 1034 pinmux = <0x303300b8 2 0x0 0 0x30330328>; 1035 }; 1036 /omit-if-no-ref/ mx7d_pad_lcd_enable__csi_data17: MX7D_PAD_LCD_ENABLE__CSI_DATA17 { 1037 pinmux = <0x303300b8 3 0x0 0 0x30330328>; 1038 }; 1039 /omit-if-no-ref/ mx7d_pad_lcd_enable__uart2_dce_tx: MX7D_PAD_LCD_ENABLE__UART2_DCE_TX { 1040 pinmux = <0x303300b8 4 0x0 0 0x30330328>; 1041 }; 1042 /omit-if-no-ref/ mx7d_pad_lcd_enable__uart2_dte_rx: MX7D_PAD_LCD_ENABLE__UART2_DTE_RX { 1043 pinmux = <0x303300b8 4 0x303306fc 1 0x30330328>; 1044 }; 1045 /omit-if-no-ref/ mx7d_pad_lcd_enable__gpio3_io1: MX7D_PAD_LCD_ENABLE__GPIO3_IO1 { 1046 pinmux = <0x303300b8 5 0x0 0 0x30330328>; 1047 }; 1048 /omit-if-no-ref/ mx7d_pad_lcd_hsync__lcd_hsync: MX7D_PAD_LCD_HSYNC__LCD_HSYNC { 1049 pinmux = <0x303300bc 0 0x0 0 0x3033032c>; 1050 }; 1051 /omit-if-no-ref/ mx7d_pad_lcd_hsync__ecspi4_sclk: MX7D_PAD_LCD_HSYNC__ECSPI4_SCLK { 1052 pinmux = <0x303300bc 1 0x30330554 0 0x3033032c>; 1053 }; 1054 /omit-if-no-ref/ mx7d_pad_lcd_hsync__enet2_1588_event2_in: MX7D_PAD_LCD_HSYNC__ENET2_1588_EVENT2_IN { 1055 pinmux = <0x303300bc 2 0x0 0 0x3033032c>; 1056 }; 1057 /omit-if-no-ref/ mx7d_pad_lcd_hsync__csi_data18: MX7D_PAD_LCD_HSYNC__CSI_DATA18 { 1058 pinmux = <0x303300bc 3 0x0 0 0x3033032c>; 1059 }; 1060 /omit-if-no-ref/ mx7d_pad_lcd_hsync__uart2_dce_rts: MX7D_PAD_LCD_HSYNC__UART2_DCE_RTS { 1061 pinmux = <0x303300bc 4 0x303306f8 0 0x3033032c>; 1062 }; 1063 /omit-if-no-ref/ mx7d_pad_lcd_hsync__uart2_dte_cts: MX7D_PAD_LCD_HSYNC__UART2_DTE_CTS { 1064 pinmux = <0x303300bc 4 0x0 0 0x3033032c>; 1065 }; 1066 /omit-if-no-ref/ mx7d_pad_lcd_hsync__gpio3_io2: MX7D_PAD_LCD_HSYNC__GPIO3_IO2 { 1067 pinmux = <0x303300bc 5 0x0 0 0x3033032c>; 1068 }; 1069 /omit-if-no-ref/ mx7d_pad_lcd_vsync__lcd_vsync: MX7D_PAD_LCD_VSYNC__LCD_VSYNC { 1070 pinmux = <0x303300c0 0 0x30330698 2 0x30330330>; 1071 }; 1072 /omit-if-no-ref/ mx7d_pad_lcd_vsync__ecspi4_ss0: MX7D_PAD_LCD_VSYNC__ECSPI4_SS0 { 1073 pinmux = <0x303300c0 1 0x30330560 0 0x30330330>; 1074 }; 1075 /omit-if-no-ref/ mx7d_pad_lcd_vsync__enet2_1588_event3_in: MX7D_PAD_LCD_VSYNC__ENET2_1588_EVENT3_IN { 1076 pinmux = <0x303300c0 2 0x0 0 0x30330330>; 1077 }; 1078 /omit-if-no-ref/ mx7d_pad_lcd_vsync__csi_data19: MX7D_PAD_LCD_VSYNC__CSI_DATA19 { 1079 pinmux = <0x303300c0 3 0x0 0 0x30330330>; 1080 }; 1081 /omit-if-no-ref/ mx7d_pad_lcd_vsync__uart2_dce_cts: MX7D_PAD_LCD_VSYNC__UART2_DCE_CTS { 1082 pinmux = <0x303300c0 4 0x0 0 0x30330330>; 1083 }; 1084 /omit-if-no-ref/ mx7d_pad_lcd_vsync__uart2_dte_rts: MX7D_PAD_LCD_VSYNC__UART2_DTE_RTS { 1085 pinmux = <0x303300c0 4 0x303306f8 1 0x30330330>; 1086 }; 1087 /omit-if-no-ref/ mx7d_pad_lcd_vsync__gpio3_io3: MX7D_PAD_LCD_VSYNC__GPIO3_IO3 { 1088 pinmux = <0x303300c0 5 0x0 0 0x30330330>; 1089 }; 1090 /omit-if-no-ref/ mx7d_pad_lcd_reset__lcd_reset: MX7D_PAD_LCD_RESET__LCD_RESET { 1091 pinmux = <0x303300c4 0 0x0 0 0x30330334>; 1092 }; 1093 /omit-if-no-ref/ mx7d_pad_lcd_reset__gpt1_compare1: MX7D_PAD_LCD_RESET__GPT1_COMPARE1 { 1094 pinmux = <0x303300c4 1 0x0 0 0x30330334>; 1095 }; 1096 /omit-if-no-ref/ mx7d_pad_lcd_reset__arm_platform_eventi: MX7D_PAD_LCD_RESET__ARM_PLATFORM_EVENTI { 1097 pinmux = <0x303300c4 2 0x0 0 0x30330334>; 1098 }; 1099 /omit-if-no-ref/ mx7d_pad_lcd_reset__csi_field: MX7D_PAD_LCD_RESET__CSI_FIELD { 1100 pinmux = <0x303300c4 3 0x0 0 0x30330334>; 1101 }; 1102 /omit-if-no-ref/ mx7d_pad_lcd_reset__eim_dtack_b: MX7D_PAD_LCD_RESET__EIM_DTACK_B { 1103 pinmux = <0x303300c4 4 0x0 0 0x30330334>; 1104 }; 1105 /omit-if-no-ref/ mx7d_pad_lcd_reset__gpio3_io4: MX7D_PAD_LCD_RESET__GPIO3_IO4 { 1106 pinmux = <0x303300c4 5 0x0 0 0x30330334>; 1107 }; 1108 /omit-if-no-ref/ mx7d_pad_lcd_data00__lcd_data0: MX7D_PAD_LCD_DATA00__LCD_DATA0 { 1109 pinmux = <0x303300c8 0 0x30330638 2 0x30330338>; 1110 }; 1111 /omit-if-no-ref/ mx7d_pad_lcd_data00__gpt1_compare2: MX7D_PAD_LCD_DATA00__GPT1_COMPARE2 { 1112 pinmux = <0x303300c8 1 0x0 0 0x30330338>; 1113 }; 1114 /omit-if-no-ref/ mx7d_pad_lcd_data00__csi_data20: MX7D_PAD_LCD_DATA00__CSI_DATA20 { 1115 pinmux = <0x303300c8 3 0x0 0 0x30330338>; 1116 }; 1117 /omit-if-no-ref/ mx7d_pad_lcd_data00__eim_data0: MX7D_PAD_LCD_DATA00__EIM_DATA0 { 1118 pinmux = <0x303300c8 4 0x0 0 0x30330338>; 1119 }; 1120 /omit-if-no-ref/ mx7d_pad_lcd_data00__gpio3_io5: MX7D_PAD_LCD_DATA00__GPIO3_IO5 { 1121 pinmux = <0x303300c8 5 0x0 0 0x30330338>; 1122 }; 1123 /omit-if-no-ref/ mx7d_pad_lcd_data00__src_boot_cfg0: MX7D_PAD_LCD_DATA00__SRC_BOOT_CFG0 { 1124 pinmux = <0x303300c8 6 0x0 0 0x30330338>; 1125 }; 1126 /omit-if-no-ref/ mx7d_pad_lcd_data01__lcd_data1: MX7D_PAD_LCD_DATA01__LCD_DATA1 { 1127 pinmux = <0x303300cc 0 0x3033063c 2 0x3033033c>; 1128 }; 1129 /omit-if-no-ref/ mx7d_pad_lcd_data01__gpt1_compare3: MX7D_PAD_LCD_DATA01__GPT1_COMPARE3 { 1130 pinmux = <0x303300cc 1 0x0 0 0x3033033c>; 1131 }; 1132 /omit-if-no-ref/ mx7d_pad_lcd_data01__csi_data21: MX7D_PAD_LCD_DATA01__CSI_DATA21 { 1133 pinmux = <0x303300cc 3 0x0 0 0x3033033c>; 1134 }; 1135 /omit-if-no-ref/ mx7d_pad_lcd_data01__eim_data1: MX7D_PAD_LCD_DATA01__EIM_DATA1 { 1136 pinmux = <0x303300cc 4 0x0 0 0x3033033c>; 1137 }; 1138 /omit-if-no-ref/ mx7d_pad_lcd_data01__gpio3_io6: MX7D_PAD_LCD_DATA01__GPIO3_IO6 { 1139 pinmux = <0x303300cc 5 0x0 0 0x3033033c>; 1140 }; 1141 /omit-if-no-ref/ mx7d_pad_lcd_data01__src_boot_cfg1: MX7D_PAD_LCD_DATA01__SRC_BOOT_CFG1 { 1142 pinmux = <0x303300cc 6 0x0 0 0x3033033c>; 1143 }; 1144 /omit-if-no-ref/ mx7d_pad_lcd_data02__lcd_data2: MX7D_PAD_LCD_DATA02__LCD_DATA2 { 1145 pinmux = <0x303300d0 0 0x30330640 2 0x30330340>; 1146 }; 1147 /omit-if-no-ref/ mx7d_pad_lcd_data02__gpt1_clk: MX7D_PAD_LCD_DATA02__GPT1_CLK { 1148 pinmux = <0x303300d0 1 0x0 0 0x30330340>; 1149 }; 1150 /omit-if-no-ref/ mx7d_pad_lcd_data02__csi_data22: MX7D_PAD_LCD_DATA02__CSI_DATA22 { 1151 pinmux = <0x303300d0 3 0x0 0 0x30330340>; 1152 }; 1153 /omit-if-no-ref/ mx7d_pad_lcd_data02__eim_data2: MX7D_PAD_LCD_DATA02__EIM_DATA2 { 1154 pinmux = <0x303300d0 4 0x0 0 0x30330340>; 1155 }; 1156 /omit-if-no-ref/ mx7d_pad_lcd_data02__gpio3_io7: MX7D_PAD_LCD_DATA02__GPIO3_IO7 { 1157 pinmux = <0x303300d0 5 0x0 0 0x30330340>; 1158 }; 1159 /omit-if-no-ref/ mx7d_pad_lcd_data02__src_boot_cfg2: MX7D_PAD_LCD_DATA02__SRC_BOOT_CFG2 { 1160 pinmux = <0x303300d0 6 0x0 0 0x30330340>; 1161 }; 1162 /omit-if-no-ref/ mx7d_pad_lcd_data03__lcd_data3: MX7D_PAD_LCD_DATA03__LCD_DATA3 { 1163 pinmux = <0x303300d4 0 0x30330644 2 0x30330344>; 1164 }; 1165 /omit-if-no-ref/ mx7d_pad_lcd_data03__gpt1_capture1: MX7D_PAD_LCD_DATA03__GPT1_CAPTURE1 { 1166 pinmux = <0x303300d4 1 0x0 0 0x30330344>; 1167 }; 1168 /omit-if-no-ref/ mx7d_pad_lcd_data03__csi_data23: MX7D_PAD_LCD_DATA03__CSI_DATA23 { 1169 pinmux = <0x303300d4 3 0x0 0 0x30330344>; 1170 }; 1171 /omit-if-no-ref/ mx7d_pad_lcd_data03__eim_data3: MX7D_PAD_LCD_DATA03__EIM_DATA3 { 1172 pinmux = <0x303300d4 4 0x0 0 0x30330344>; 1173 }; 1174 /omit-if-no-ref/ mx7d_pad_lcd_data03__gpio3_io8: MX7D_PAD_LCD_DATA03__GPIO3_IO8 { 1175 pinmux = <0x303300d4 5 0x0 0 0x30330344>; 1176 }; 1177 /omit-if-no-ref/ mx7d_pad_lcd_data03__src_boot_cfg3: MX7D_PAD_LCD_DATA03__SRC_BOOT_CFG3 { 1178 pinmux = <0x303300d4 6 0x0 0 0x30330344>; 1179 }; 1180 /omit-if-no-ref/ mx7d_pad_lcd_data04__lcd_data4: MX7D_PAD_LCD_DATA04__LCD_DATA4 { 1181 pinmux = <0x303300d8 0 0x30330648 2 0x30330348>; 1182 }; 1183 /omit-if-no-ref/ mx7d_pad_lcd_data04__gpt1_capture2: MX7D_PAD_LCD_DATA04__GPT1_CAPTURE2 { 1184 pinmux = <0x303300d8 1 0x0 0 0x30330348>; 1185 }; 1186 /omit-if-no-ref/ mx7d_pad_lcd_data04__csi_vsync: MX7D_PAD_LCD_DATA04__CSI_VSYNC { 1187 pinmux = <0x303300d8 3 0x30330520 0 0x30330348>; 1188 }; 1189 /omit-if-no-ref/ mx7d_pad_lcd_data04__eim_data4: MX7D_PAD_LCD_DATA04__EIM_DATA4 { 1190 pinmux = <0x303300d8 4 0x0 0 0x30330348>; 1191 }; 1192 /omit-if-no-ref/ mx7d_pad_lcd_data04__gpio3_io9: MX7D_PAD_LCD_DATA04__GPIO3_IO9 { 1193 pinmux = <0x303300d8 5 0x0 0 0x30330348>; 1194 }; 1195 /omit-if-no-ref/ mx7d_pad_lcd_data04__src_boot_cfg4: MX7D_PAD_LCD_DATA04__SRC_BOOT_CFG4 { 1196 pinmux = <0x303300d8 6 0x0 0 0x30330348>; 1197 }; 1198 /omit-if-no-ref/ mx7d_pad_lcd_data05__lcd_data5: MX7D_PAD_LCD_DATA05__LCD_DATA5 { 1199 pinmux = <0x303300dc 0 0x3033064c 2 0x3033034c>; 1200 }; 1201 /omit-if-no-ref/ mx7d_pad_lcd_data05__csi_hsync: MX7D_PAD_LCD_DATA05__CSI_HSYNC { 1202 pinmux = <0x303300dc 3 0x30330518 0 0x3033034c>; 1203 }; 1204 /omit-if-no-ref/ mx7d_pad_lcd_data05__eim_data5: MX7D_PAD_LCD_DATA05__EIM_DATA5 { 1205 pinmux = <0x303300dc 4 0x0 0 0x3033034c>; 1206 }; 1207 /omit-if-no-ref/ mx7d_pad_lcd_data05__gpio3_io10: MX7D_PAD_LCD_DATA05__GPIO3_IO10 { 1208 pinmux = <0x303300dc 5 0x0 0 0x3033034c>; 1209 }; 1210 /omit-if-no-ref/ mx7d_pad_lcd_data05__src_boot_cfg5: MX7D_PAD_LCD_DATA05__SRC_BOOT_CFG5 { 1211 pinmux = <0x303300dc 6 0x0 0 0x3033034c>; 1212 }; 1213 /omit-if-no-ref/ mx7d_pad_lcd_data06__lcd_data6: MX7D_PAD_LCD_DATA06__LCD_DATA6 { 1214 pinmux = <0x303300e0 0 0x30330650 2 0x30330350>; 1215 }; 1216 /omit-if-no-ref/ mx7d_pad_lcd_data06__csi_pixclk: MX7D_PAD_LCD_DATA06__CSI_PIXCLK { 1217 pinmux = <0x303300e0 3 0x3033051c 0 0x30330350>; 1218 }; 1219 /omit-if-no-ref/ mx7d_pad_lcd_data06__eim_data6: MX7D_PAD_LCD_DATA06__EIM_DATA6 { 1220 pinmux = <0x303300e0 4 0x0 0 0x30330350>; 1221 }; 1222 /omit-if-no-ref/ mx7d_pad_lcd_data06__gpio3_io11: MX7D_PAD_LCD_DATA06__GPIO3_IO11 { 1223 pinmux = <0x303300e0 5 0x0 0 0x30330350>; 1224 }; 1225 /omit-if-no-ref/ mx7d_pad_lcd_data06__src_boot_cfg6: MX7D_PAD_LCD_DATA06__SRC_BOOT_CFG6 { 1226 pinmux = <0x303300e0 6 0x0 0 0x30330350>; 1227 }; 1228 /omit-if-no-ref/ mx7d_pad_lcd_data07__lcd_data7: MX7D_PAD_LCD_DATA07__LCD_DATA7 { 1229 pinmux = <0x303300e4 0 0x30330654 2 0x30330354>; 1230 }; 1231 /omit-if-no-ref/ mx7d_pad_lcd_data07__csi_mclk: MX7D_PAD_LCD_DATA07__CSI_MCLK { 1232 pinmux = <0x303300e4 3 0x0 0 0x30330354>; 1233 }; 1234 /omit-if-no-ref/ mx7d_pad_lcd_data07__eim_data7: MX7D_PAD_LCD_DATA07__EIM_DATA7 { 1235 pinmux = <0x303300e4 4 0x0 0 0x30330354>; 1236 }; 1237 /omit-if-no-ref/ mx7d_pad_lcd_data07__gpio3_io12: MX7D_PAD_LCD_DATA07__GPIO3_IO12 { 1238 pinmux = <0x303300e4 5 0x0 0 0x30330354>; 1239 }; 1240 /omit-if-no-ref/ mx7d_pad_lcd_data07__src_boot_cfg7: MX7D_PAD_LCD_DATA07__SRC_BOOT_CFG7 { 1241 pinmux = <0x303300e4 6 0x0 0 0x30330354>; 1242 }; 1243 /omit-if-no-ref/ mx7d_pad_lcd_data08__lcd_data8: MX7D_PAD_LCD_DATA08__LCD_DATA8 { 1244 pinmux = <0x303300e8 0 0x30330658 2 0x30330358>; 1245 }; 1246 /omit-if-no-ref/ mx7d_pad_lcd_data08__csi_data9: MX7D_PAD_LCD_DATA08__CSI_DATA9 { 1247 pinmux = <0x303300e8 3 0x30330514 0 0x30330358>; 1248 }; 1249 /omit-if-no-ref/ mx7d_pad_lcd_data08__eim_data8: MX7D_PAD_LCD_DATA08__EIM_DATA8 { 1250 pinmux = <0x303300e8 4 0x0 0 0x30330358>; 1251 }; 1252 /omit-if-no-ref/ mx7d_pad_lcd_data08__gpio3_io13: MX7D_PAD_LCD_DATA08__GPIO3_IO13 { 1253 pinmux = <0x303300e8 5 0x0 0 0x30330358>; 1254 }; 1255 /omit-if-no-ref/ mx7d_pad_lcd_data08__src_boot_cfg8: MX7D_PAD_LCD_DATA08__SRC_BOOT_CFG8 { 1256 pinmux = <0x303300e8 6 0x0 0 0x30330358>; 1257 }; 1258 /omit-if-no-ref/ mx7d_pad_lcd_data09__lcd_data9: MX7D_PAD_LCD_DATA09__LCD_DATA9 { 1259 pinmux = <0x303300ec 0 0x3033065c 2 0x3033035c>; 1260 }; 1261 /omit-if-no-ref/ mx7d_pad_lcd_data09__csi_data8: MX7D_PAD_LCD_DATA09__CSI_DATA8 { 1262 pinmux = <0x303300ec 3 0x30330510 0 0x3033035c>; 1263 }; 1264 /omit-if-no-ref/ mx7d_pad_lcd_data09__eim_data9: MX7D_PAD_LCD_DATA09__EIM_DATA9 { 1265 pinmux = <0x303300ec 4 0x0 0 0x3033035c>; 1266 }; 1267 /omit-if-no-ref/ mx7d_pad_lcd_data09__gpio3_io14: MX7D_PAD_LCD_DATA09__GPIO3_IO14 { 1268 pinmux = <0x303300ec 5 0x0 0 0x3033035c>; 1269 }; 1270 /omit-if-no-ref/ mx7d_pad_lcd_data09__src_boot_cfg9: MX7D_PAD_LCD_DATA09__SRC_BOOT_CFG9 { 1271 pinmux = <0x303300ec 6 0x0 0 0x3033035c>; 1272 }; 1273 /omit-if-no-ref/ mx7d_pad_lcd_data10__lcd_data10: MX7D_PAD_LCD_DATA10__LCD_DATA10 { 1274 pinmux = <0x303300f0 0 0x30330660 2 0x30330360>; 1275 }; 1276 /omit-if-no-ref/ mx7d_pad_lcd_data10__csi_data7: MX7D_PAD_LCD_DATA10__CSI_DATA7 { 1277 pinmux = <0x303300f0 3 0x3033050c 0 0x30330360>; 1278 }; 1279 /omit-if-no-ref/ mx7d_pad_lcd_data10__eim_data10: MX7D_PAD_LCD_DATA10__EIM_DATA10 { 1280 pinmux = <0x303300f0 4 0x0 0 0x30330360>; 1281 }; 1282 /omit-if-no-ref/ mx7d_pad_lcd_data10__gpio3_io15: MX7D_PAD_LCD_DATA10__GPIO3_IO15 { 1283 pinmux = <0x303300f0 5 0x0 0 0x30330360>; 1284 }; 1285 /omit-if-no-ref/ mx7d_pad_lcd_data10__src_boot_cfg10: MX7D_PAD_LCD_DATA10__SRC_BOOT_CFG10 { 1286 pinmux = <0x303300f0 6 0x0 0 0x30330360>; 1287 }; 1288 /omit-if-no-ref/ mx7d_pad_lcd_data11__lcd_data11: MX7D_PAD_LCD_DATA11__LCD_DATA11 { 1289 pinmux = <0x303300f4 0 0x30330664 2 0x30330364>; 1290 }; 1291 /omit-if-no-ref/ mx7d_pad_lcd_data11__csi_data6: MX7D_PAD_LCD_DATA11__CSI_DATA6 { 1292 pinmux = <0x303300f4 3 0x30330508 0 0x30330364>; 1293 }; 1294 /omit-if-no-ref/ mx7d_pad_lcd_data11__eim_data11: MX7D_PAD_LCD_DATA11__EIM_DATA11 { 1295 pinmux = <0x303300f4 4 0x0 0 0x30330364>; 1296 }; 1297 /omit-if-no-ref/ mx7d_pad_lcd_data11__gpio3_io16: MX7D_PAD_LCD_DATA11__GPIO3_IO16 { 1298 pinmux = <0x303300f4 5 0x0 0 0x30330364>; 1299 }; 1300 /omit-if-no-ref/ mx7d_pad_lcd_data11__src_boot_cfg11: MX7D_PAD_LCD_DATA11__SRC_BOOT_CFG11 { 1301 pinmux = <0x303300f4 6 0x0 0 0x30330364>; 1302 }; 1303 /omit-if-no-ref/ mx7d_pad_lcd_data12__lcd_data12: MX7D_PAD_LCD_DATA12__LCD_DATA12 { 1304 pinmux = <0x303300f8 0 0x30330668 2 0x30330368>; 1305 }; 1306 /omit-if-no-ref/ mx7d_pad_lcd_data12__csi_data5: MX7D_PAD_LCD_DATA12__CSI_DATA5 { 1307 pinmux = <0x303300f8 3 0x30330504 0 0x30330368>; 1308 }; 1309 /omit-if-no-ref/ mx7d_pad_lcd_data12__eim_data12: MX7D_PAD_LCD_DATA12__EIM_DATA12 { 1310 pinmux = <0x303300f8 4 0x0 0 0x30330368>; 1311 }; 1312 /omit-if-no-ref/ mx7d_pad_lcd_data12__gpio3_io17: MX7D_PAD_LCD_DATA12__GPIO3_IO17 { 1313 pinmux = <0x303300f8 5 0x0 0 0x30330368>; 1314 }; 1315 /omit-if-no-ref/ mx7d_pad_lcd_data12__src_boot_cfg12: MX7D_PAD_LCD_DATA12__SRC_BOOT_CFG12 { 1316 pinmux = <0x303300f8 6 0x0 0 0x30330368>; 1317 }; 1318 /omit-if-no-ref/ mx7d_pad_lcd_data13__lcd_data13: MX7D_PAD_LCD_DATA13__LCD_DATA13 { 1319 pinmux = <0x303300fc 0 0x3033066c 1 0x3033036c>; 1320 }; 1321 /omit-if-no-ref/ mx7d_pad_lcd_data13__csi_data4: MX7D_PAD_LCD_DATA13__CSI_DATA4 { 1322 pinmux = <0x303300fc 3 0x30330500 0 0x3033036c>; 1323 }; 1324 /omit-if-no-ref/ mx7d_pad_lcd_data13__eim_data13: MX7D_PAD_LCD_DATA13__EIM_DATA13 { 1325 pinmux = <0x303300fc 4 0x0 0 0x3033036c>; 1326 }; 1327 /omit-if-no-ref/ mx7d_pad_lcd_data13__gpio3_io18: MX7D_PAD_LCD_DATA13__GPIO3_IO18 { 1328 pinmux = <0x303300fc 5 0x0 0 0x3033036c>; 1329 }; 1330 /omit-if-no-ref/ mx7d_pad_lcd_data13__src_boot_cfg13: MX7D_PAD_LCD_DATA13__SRC_BOOT_CFG13 { 1331 pinmux = <0x303300fc 6 0x0 0 0x3033036c>; 1332 }; 1333 /omit-if-no-ref/ mx7d_pad_lcd_data14__lcd_data14: MX7D_PAD_LCD_DATA14__LCD_DATA14 { 1334 pinmux = <0x30330100 0 0x30330670 1 0x30330370>; 1335 }; 1336 /omit-if-no-ref/ mx7d_pad_lcd_data14__csi_data3: MX7D_PAD_LCD_DATA14__CSI_DATA3 { 1337 pinmux = <0x30330100 3 0x303304fc 0 0x30330370>; 1338 }; 1339 /omit-if-no-ref/ mx7d_pad_lcd_data14__eim_data14: MX7D_PAD_LCD_DATA14__EIM_DATA14 { 1340 pinmux = <0x30330100 4 0x0 0 0x30330370>; 1341 }; 1342 /omit-if-no-ref/ mx7d_pad_lcd_data14__gpio3_io19: MX7D_PAD_LCD_DATA14__GPIO3_IO19 { 1343 pinmux = <0x30330100 5 0x0 0 0x30330370>; 1344 }; 1345 /omit-if-no-ref/ mx7d_pad_lcd_data14__src_boot_cfg14: MX7D_PAD_LCD_DATA14__SRC_BOOT_CFG14 { 1346 pinmux = <0x30330100 6 0x0 0 0x30330370>; 1347 }; 1348 /omit-if-no-ref/ mx7d_pad_lcd_data15__lcd_data15: MX7D_PAD_LCD_DATA15__LCD_DATA15 { 1349 pinmux = <0x30330104 0 0x30330674 1 0x30330374>; 1350 }; 1351 /omit-if-no-ref/ mx7d_pad_lcd_data15__csi_data2: MX7D_PAD_LCD_DATA15__CSI_DATA2 { 1352 pinmux = <0x30330104 3 0x303304f8 0 0x30330374>; 1353 }; 1354 /omit-if-no-ref/ mx7d_pad_lcd_data15__eim_data15: MX7D_PAD_LCD_DATA15__EIM_DATA15 { 1355 pinmux = <0x30330104 4 0x0 0 0x30330374>; 1356 }; 1357 /omit-if-no-ref/ mx7d_pad_lcd_data15__gpio3_io20: MX7D_PAD_LCD_DATA15__GPIO3_IO20 { 1358 pinmux = <0x30330104 5 0x0 0 0x30330374>; 1359 }; 1360 /omit-if-no-ref/ mx7d_pad_lcd_data15__src_boot_cfg15: MX7D_PAD_LCD_DATA15__SRC_BOOT_CFG15 { 1361 pinmux = <0x30330104 6 0x0 0 0x30330374>; 1362 }; 1363 /omit-if-no-ref/ mx7d_pad_lcd_data16__lcd_data16: MX7D_PAD_LCD_DATA16__LCD_DATA16 { 1364 pinmux = <0x30330108 0 0x30330678 2 0x30330378>; 1365 }; 1366 /omit-if-no-ref/ mx7d_pad_lcd_data16__flextimer1_ch4: MX7D_PAD_LCD_DATA16__FLEXTIMER1_CH4 { 1367 pinmux = <0x30330108 1 0x30330594 0 0x30330378>; 1368 }; 1369 /omit-if-no-ref/ mx7d_pad_lcd_data16__csi_data1: MX7D_PAD_LCD_DATA16__CSI_DATA1 { 1370 pinmux = <0x30330108 3 0x0 0 0x30330378>; 1371 }; 1372 /omit-if-no-ref/ mx7d_pad_lcd_data16__eim_cre: MX7D_PAD_LCD_DATA16__EIM_CRE { 1373 pinmux = <0x30330108 4 0x0 0 0x30330378>; 1374 }; 1375 /omit-if-no-ref/ mx7d_pad_lcd_data16__gpio3_io21: MX7D_PAD_LCD_DATA16__GPIO3_IO21 { 1376 pinmux = <0x30330108 5 0x0 0 0x30330378>; 1377 }; 1378 /omit-if-no-ref/ mx7d_pad_lcd_data16__src_boot_cfg16: MX7D_PAD_LCD_DATA16__SRC_BOOT_CFG16 { 1379 pinmux = <0x30330108 6 0x0 0 0x30330378>; 1380 }; 1381 /omit-if-no-ref/ mx7d_pad_lcd_data17__lcd_data17: MX7D_PAD_LCD_DATA17__LCD_DATA17 { 1382 pinmux = <0x3033010c 0 0x3033067c 2 0x3033037c>; 1383 }; 1384 /omit-if-no-ref/ mx7d_pad_lcd_data17__flextimer1_ch5: MX7D_PAD_LCD_DATA17__FLEXTIMER1_CH5 { 1385 pinmux = <0x3033010c 1 0x30330598 0 0x3033037c>; 1386 }; 1387 /omit-if-no-ref/ mx7d_pad_lcd_data17__csi_data0: MX7D_PAD_LCD_DATA17__CSI_DATA0 { 1388 pinmux = <0x3033010c 3 0x0 0 0x3033037c>; 1389 }; 1390 /omit-if-no-ref/ mx7d_pad_lcd_data17__eim_aclk_freerun: MX7D_PAD_LCD_DATA17__EIM_ACLK_FREERUN { 1391 pinmux = <0x3033010c 4 0x0 0 0x3033037c>; 1392 }; 1393 /omit-if-no-ref/ mx7d_pad_lcd_data17__gpio3_io22: MX7D_PAD_LCD_DATA17__GPIO3_IO22 { 1394 pinmux = <0x3033010c 5 0x0 0 0x3033037c>; 1395 }; 1396 /omit-if-no-ref/ mx7d_pad_lcd_data17__src_boot_cfg17: MX7D_PAD_LCD_DATA17__SRC_BOOT_CFG17 { 1397 pinmux = <0x3033010c 6 0x0 0 0x3033037c>; 1398 }; 1399 /omit-if-no-ref/ mx7d_pad_lcd_data18__lcd_data18: MX7D_PAD_LCD_DATA18__LCD_DATA18 { 1400 pinmux = <0x30330110 0 0x30330680 2 0x30330380>; 1401 }; 1402 /omit-if-no-ref/ mx7d_pad_lcd_data18__flextimer1_ch6: MX7D_PAD_LCD_DATA18__FLEXTIMER1_CH6 { 1403 pinmux = <0x30330110 1 0x3033059c 0 0x30330380>; 1404 }; 1405 /omit-if-no-ref/ mx7d_pad_lcd_data18__arm_platform_evento: MX7D_PAD_LCD_DATA18__ARM_PLATFORM_EVENTO { 1406 pinmux = <0x30330110 2 0x0 0 0x30330380>; 1407 }; 1408 /omit-if-no-ref/ mx7d_pad_lcd_data18__csi_data15: MX7D_PAD_LCD_DATA18__CSI_DATA15 { 1409 pinmux = <0x30330110 3 0x0 0 0x30330380>; 1410 }; 1411 /omit-if-no-ref/ mx7d_pad_lcd_data18__eim_cs2_b: MX7D_PAD_LCD_DATA18__EIM_CS2_B { 1412 pinmux = <0x30330110 4 0x0 0 0x30330380>; 1413 }; 1414 /omit-if-no-ref/ mx7d_pad_lcd_data18__gpio3_io23: MX7D_PAD_LCD_DATA18__GPIO3_IO23 { 1415 pinmux = <0x30330110 5 0x0 0 0x30330380>; 1416 }; 1417 /omit-if-no-ref/ mx7d_pad_lcd_data18__src_boot_cfg18: MX7D_PAD_LCD_DATA18__SRC_BOOT_CFG18 { 1418 pinmux = <0x30330110 6 0x0 0 0x30330380>; 1419 }; 1420 /omit-if-no-ref/ mx7d_pad_lcd_data19__lcd_data19: MX7D_PAD_LCD_DATA19__LCD_DATA19 { 1421 pinmux = <0x30330114 0 0x30330684 2 0x30330384>; 1422 }; 1423 /omit-if-no-ref/ mx7d_pad_lcd_data19__flextimer1_ch7: MX7D_PAD_LCD_DATA19__FLEXTIMER1_CH7 { 1424 pinmux = <0x30330114 1 0x303305a0 0 0x30330384>; 1425 }; 1426 /omit-if-no-ref/ mx7d_pad_lcd_data19__csi_data14: MX7D_PAD_LCD_DATA19__CSI_DATA14 { 1427 pinmux = <0x30330114 3 0x0 0 0x30330384>; 1428 }; 1429 /omit-if-no-ref/ mx7d_pad_lcd_data19__eim_cs3_b: MX7D_PAD_LCD_DATA19__EIM_CS3_B { 1430 pinmux = <0x30330114 4 0x0 0 0x30330384>; 1431 }; 1432 /omit-if-no-ref/ mx7d_pad_lcd_data19__gpio3_io24: MX7D_PAD_LCD_DATA19__GPIO3_IO24 { 1433 pinmux = <0x30330114 5 0x0 0 0x30330384>; 1434 }; 1435 /omit-if-no-ref/ mx7d_pad_lcd_data19__src_boot_cfg19: MX7D_PAD_LCD_DATA19__SRC_BOOT_CFG19 { 1436 pinmux = <0x30330114 6 0x0 0 0x30330384>; 1437 }; 1438 /omit-if-no-ref/ mx7d_pad_lcd_data20__lcd_data20: MX7D_PAD_LCD_DATA20__LCD_DATA20 { 1439 pinmux = <0x30330118 0 0x30330688 2 0x30330388>; 1440 }; 1441 /omit-if-no-ref/ mx7d_pad_lcd_data20__flextimer2_ch4: MX7D_PAD_LCD_DATA20__FLEXTIMER2_CH4 { 1442 pinmux = <0x30330118 1 0x303305bc 0 0x30330388>; 1443 }; 1444 /omit-if-no-ref/ mx7d_pad_lcd_data20__enet1_1588_event2_out: MX7D_PAD_LCD_DATA20__ENET1_1588_EVENT2_OUT { 1445 pinmux = <0x30330118 2 0x0 0 0x30330388>; 1446 }; 1447 /omit-if-no-ref/ mx7d_pad_lcd_data20__csi_data13: MX7D_PAD_LCD_DATA20__CSI_DATA13 { 1448 pinmux = <0x30330118 3 0x0 0 0x30330388>; 1449 }; 1450 /omit-if-no-ref/ mx7d_pad_lcd_data20__eim_addr23: MX7D_PAD_LCD_DATA20__EIM_ADDR23 { 1451 pinmux = <0x30330118 4 0x0 0 0x30330388>; 1452 }; 1453 /omit-if-no-ref/ mx7d_pad_lcd_data20__gpio3_io25: MX7D_PAD_LCD_DATA20__GPIO3_IO25 { 1454 pinmux = <0x30330118 5 0x0 0 0x30330388>; 1455 }; 1456 /omit-if-no-ref/ mx7d_pad_lcd_data20__i2c3_scl: MX7D_PAD_LCD_DATA20__I2C3_SCL { 1457 pinmux = <0x30330118 6 0x303305e4 1 0x30330388>; 1458 }; 1459 /omit-if-no-ref/ mx7d_pad_lcd_data21__lcd_data21: MX7D_PAD_LCD_DATA21__LCD_DATA21 { 1460 pinmux = <0x3033011c 0 0x3033068c 2 0x3033038c>; 1461 }; 1462 /omit-if-no-ref/ mx7d_pad_lcd_data21__flextimer2_ch5: MX7D_PAD_LCD_DATA21__FLEXTIMER2_CH5 { 1463 pinmux = <0x3033011c 1 0x303305c0 0 0x3033038c>; 1464 }; 1465 /omit-if-no-ref/ mx7d_pad_lcd_data21__enet1_1588_event3_out: MX7D_PAD_LCD_DATA21__ENET1_1588_EVENT3_OUT { 1466 pinmux = <0x3033011c 2 0x0 0 0x3033038c>; 1467 }; 1468 /omit-if-no-ref/ mx7d_pad_lcd_data21__csi_data12: MX7D_PAD_LCD_DATA21__CSI_DATA12 { 1469 pinmux = <0x3033011c 3 0x0 0 0x3033038c>; 1470 }; 1471 /omit-if-no-ref/ mx7d_pad_lcd_data21__eim_addr24: MX7D_PAD_LCD_DATA21__EIM_ADDR24 { 1472 pinmux = <0x3033011c 4 0x0 0 0x3033038c>; 1473 }; 1474 /omit-if-no-ref/ mx7d_pad_lcd_data21__gpio3_io26: MX7D_PAD_LCD_DATA21__GPIO3_IO26 { 1475 pinmux = <0x3033011c 5 0x0 0 0x3033038c>; 1476 }; 1477 /omit-if-no-ref/ mx7d_pad_lcd_data21__i2c3_sda: MX7D_PAD_LCD_DATA21__I2C3_SDA { 1478 pinmux = <0x3033011c 6 0x303305e8 1 0x3033038c>; 1479 }; 1480 /omit-if-no-ref/ mx7d_pad_lcd_data22__lcd_data22: MX7D_PAD_LCD_DATA22__LCD_DATA22 { 1481 pinmux = <0x30330120 0 0x30330690 2 0x30330390>; 1482 }; 1483 /omit-if-no-ref/ mx7d_pad_lcd_data22__flextimer2_ch6: MX7D_PAD_LCD_DATA22__FLEXTIMER2_CH6 { 1484 pinmux = <0x30330120 1 0x303305c4 0 0x30330390>; 1485 }; 1486 /omit-if-no-ref/ mx7d_pad_lcd_data22__enet2_1588_event2_out: MX7D_PAD_LCD_DATA22__ENET2_1588_EVENT2_OUT { 1487 pinmux = <0x30330120 2 0x0 0 0x30330390>; 1488 }; 1489 /omit-if-no-ref/ mx7d_pad_lcd_data22__csi_data11: MX7D_PAD_LCD_DATA22__CSI_DATA11 { 1490 pinmux = <0x30330120 3 0x0 0 0x30330390>; 1491 }; 1492 /omit-if-no-ref/ mx7d_pad_lcd_data22__eim_addr25: MX7D_PAD_LCD_DATA22__EIM_ADDR25 { 1493 pinmux = <0x30330120 4 0x0 0 0x30330390>; 1494 }; 1495 /omit-if-no-ref/ mx7d_pad_lcd_data22__gpio3_io27: MX7D_PAD_LCD_DATA22__GPIO3_IO27 { 1496 pinmux = <0x30330120 5 0x0 0 0x30330390>; 1497 }; 1498 /omit-if-no-ref/ mx7d_pad_lcd_data22__i2c4_scl: MX7D_PAD_LCD_DATA22__I2C4_SCL { 1499 pinmux = <0x30330120 6 0x303305ec 1 0x30330390>; 1500 }; 1501 /omit-if-no-ref/ mx7d_pad_lcd_data23__lcd_data23: MX7D_PAD_LCD_DATA23__LCD_DATA23 { 1502 pinmux = <0x30330124 0 0x30330694 2 0x30330394>; 1503 }; 1504 /omit-if-no-ref/ mx7d_pad_lcd_data23__flextimer2_ch7: MX7D_PAD_LCD_DATA23__FLEXTIMER2_CH7 { 1505 pinmux = <0x30330124 1 0x303305c8 0 0x30330394>; 1506 }; 1507 /omit-if-no-ref/ mx7d_pad_lcd_data23__enet2_1588_event3_out: MX7D_PAD_LCD_DATA23__ENET2_1588_EVENT3_OUT { 1508 pinmux = <0x30330124 2 0x0 0 0x30330394>; 1509 }; 1510 /omit-if-no-ref/ mx7d_pad_lcd_data23__csi_data10: MX7D_PAD_LCD_DATA23__CSI_DATA10 { 1511 pinmux = <0x30330124 3 0x0 0 0x30330394>; 1512 }; 1513 /omit-if-no-ref/ mx7d_pad_lcd_data23__eim_addr26: MX7D_PAD_LCD_DATA23__EIM_ADDR26 { 1514 pinmux = <0x30330124 4 0x0 0 0x30330394>; 1515 }; 1516 /omit-if-no-ref/ mx7d_pad_lcd_data23__gpio3_io28: MX7D_PAD_LCD_DATA23__GPIO3_IO28 { 1517 pinmux = <0x30330124 5 0x0 0 0x30330394>; 1518 }; 1519 /omit-if-no-ref/ mx7d_pad_lcd_data23__i2c4_sda: MX7D_PAD_LCD_DATA23__I2C4_SDA { 1520 pinmux = <0x30330124 6 0x303305f0 1 0x30330394>; 1521 }; 1522 /omit-if-no-ref/ mx7d_pad_uart1_rx_data__uart1_dce_rx: MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX { 1523 pinmux = <0x30330128 0 0x303306f4 0 0x30330398>; 1524 }; 1525 /omit-if-no-ref/ mx7d_pad_uart1_rx_data__uart1_dte_tx: MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX { 1526 pinmux = <0x30330128 0 0x0 0 0x30330398>; 1527 }; 1528 /omit-if-no-ref/ mx7d_pad_uart1_rx_data__i2c1_scl: MX7D_PAD_UART1_RX_DATA__I2C1_SCL { 1529 pinmux = <0x30330128 1 0x303305d4 0 0x30330398>; 1530 }; 1531 /omit-if-no-ref/ mx7d_pad_uart1_rx_data__ccm_pmic_ready: MX7D_PAD_UART1_RX_DATA__CCM_PMIC_READY { 1532 pinmux = <0x30330128 2 0x303304f4 2 0x30330398>; 1533 }; 1534 /omit-if-no-ref/ mx7d_pad_uart1_rx_data__ecspi1_ss1: MX7D_PAD_UART1_RX_DATA__ECSPI1_SS1 { 1535 pinmux = <0x30330128 3 0x0 0 0x30330398>; 1536 }; 1537 /omit-if-no-ref/ mx7d_pad_uart1_rx_data__enet2_1588_event0_in: MX7D_PAD_UART1_RX_DATA__ENET2_1588_EVENT0_IN { 1538 pinmux = <0x30330128 4 0x0 0 0x30330398>; 1539 }; 1540 /omit-if-no-ref/ mx7d_pad_uart1_rx_data__gpio4_io0: MX7D_PAD_UART1_RX_DATA__GPIO4_IO0 { 1541 pinmux = <0x30330128 5 0x0 0 0x30330398>; 1542 }; 1543 /omit-if-no-ref/ mx7d_pad_uart1_rx_data__enet1_mdio: MX7D_PAD_UART1_RX_DATA__ENET1_MDIO { 1544 pinmux = <0x30330128 6 0x30330568 1 0x30330398>; 1545 }; 1546 /omit-if-no-ref/ mx7d_pad_uart1_tx_data__uart1_dce_tx: MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX { 1547 pinmux = <0x3033012c 0 0x0 0 0x3033039c>; 1548 }; 1549 /omit-if-no-ref/ mx7d_pad_uart1_tx_data__uart1_dte_rx: MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX { 1550 pinmux = <0x3033012c 0 0x303306f4 1 0x3033039c>; 1551 }; 1552 /omit-if-no-ref/ mx7d_pad_uart1_tx_data__i2c1_sda: MX7D_PAD_UART1_TX_DATA__I2C1_SDA { 1553 pinmux = <0x3033012c 1 0x303305d8 0 0x3033039c>; 1554 }; 1555 /omit-if-no-ref/ mx7d_pad_uart1_tx_data__sai3_mclk: MX7D_PAD_UART1_TX_DATA__SAI3_MCLK { 1556 pinmux = <0x3033012c 2 0x0 0 0x3033039c>; 1557 }; 1558 /omit-if-no-ref/ mx7d_pad_uart1_tx_data__ecspi1_ss2: MX7D_PAD_UART1_TX_DATA__ECSPI1_SS2 { 1559 pinmux = <0x3033012c 3 0x0 0 0x3033039c>; 1560 }; 1561 /omit-if-no-ref/ mx7d_pad_uart1_tx_data__enet2_1588_event0_out: MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT { 1562 pinmux = <0x3033012c 4 0x0 0 0x3033039c>; 1563 }; 1564 /omit-if-no-ref/ mx7d_pad_uart1_tx_data__gpio4_io1: MX7D_PAD_UART1_TX_DATA__GPIO4_IO1 { 1565 pinmux = <0x3033012c 5 0x0 0 0x3033039c>; 1566 }; 1567 /omit-if-no-ref/ mx7d_pad_uart1_tx_data__enet1_mdc: MX7D_PAD_UART1_TX_DATA__ENET1_MDC { 1568 pinmux = <0x3033012c 6 0x0 0 0x3033039c>; 1569 }; 1570 /omit-if-no-ref/ mx7d_pad_uart2_rx_data__uart2_dce_rx: MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX { 1571 pinmux = <0x30330130 0 0x303306fc 2 0x303303a0>; 1572 }; 1573 /omit-if-no-ref/ mx7d_pad_uart2_rx_data__uart2_dte_tx: MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX { 1574 pinmux = <0x30330130 0 0x0 0 0x303303a0>; 1575 }; 1576 /omit-if-no-ref/ mx7d_pad_uart2_rx_data__i2c2_scl: MX7D_PAD_UART2_RX_DATA__I2C2_SCL { 1577 pinmux = <0x30330130 1 0x303305dc 0 0x303303a0>; 1578 }; 1579 /omit-if-no-ref/ mx7d_pad_uart2_rx_data__sai3_rx_bclk: MX7D_PAD_UART2_RX_DATA__SAI3_RX_BCLK { 1580 pinmux = <0x30330130 2 0x303306c4 0 0x303303a0>; 1581 }; 1582 /omit-if-no-ref/ mx7d_pad_uart2_rx_data__ecspi1_ss3: MX7D_PAD_UART2_RX_DATA__ECSPI1_SS3 { 1583 pinmux = <0x30330130 3 0x0 0 0x303303a0>; 1584 }; 1585 /omit-if-no-ref/ mx7d_pad_uart2_rx_data__enet2_1588_event1_in: MX7D_PAD_UART2_RX_DATA__ENET2_1588_EVENT1_IN { 1586 pinmux = <0x30330130 4 0x0 0 0x303303a0>; 1587 }; 1588 /omit-if-no-ref/ mx7d_pad_uart2_rx_data__gpio4_io2: MX7D_PAD_UART2_RX_DATA__GPIO4_IO2 { 1589 pinmux = <0x30330130 5 0x0 0 0x303303a0>; 1590 }; 1591 /omit-if-no-ref/ mx7d_pad_uart2_rx_data__enet2_mdio: MX7D_PAD_UART2_RX_DATA__ENET2_MDIO { 1592 pinmux = <0x30330130 6 0x30330574 1 0x303303a0>; 1593 }; 1594 /omit-if-no-ref/ mx7d_pad_uart2_tx_data__uart2_dce_tx: MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX { 1595 pinmux = <0x30330134 0 0x0 0 0x303303a4>; 1596 }; 1597 /omit-if-no-ref/ mx7d_pad_uart2_tx_data__uart2_dte_rx: MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX { 1598 pinmux = <0x30330134 0 0x303306fc 3 0x303303a4>; 1599 }; 1600 /omit-if-no-ref/ mx7d_pad_uart2_tx_data__i2c2_sda: MX7D_PAD_UART2_TX_DATA__I2C2_SDA { 1601 pinmux = <0x30330134 1 0x303305e0 0 0x303303a4>; 1602 }; 1603 /omit-if-no-ref/ mx7d_pad_uart2_tx_data__sai3_rx_data0: MX7D_PAD_UART2_TX_DATA__SAI3_RX_DATA0 { 1604 pinmux = <0x30330134 2 0x303306c8 0 0x303303a4>; 1605 }; 1606 /omit-if-no-ref/ mx7d_pad_uart2_tx_data__ecspi1_rdy: MX7D_PAD_UART2_TX_DATA__ECSPI1_RDY { 1607 pinmux = <0x30330134 3 0x0 0 0x303303a4>; 1608 }; 1609 /omit-if-no-ref/ mx7d_pad_uart2_tx_data__enet2_1588_event1_out: MX7D_PAD_UART2_TX_DATA__ENET2_1588_EVENT1_OUT { 1610 pinmux = <0x30330134 4 0x0 0 0x303303a4>; 1611 }; 1612 /omit-if-no-ref/ mx7d_pad_uart2_tx_data__gpio4_io3: MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 { 1613 pinmux = <0x30330134 5 0x0 0 0x303303a4>; 1614 }; 1615 /omit-if-no-ref/ mx7d_pad_uart2_tx_data__enet2_mdc: MX7D_PAD_UART2_TX_DATA__ENET2_MDC { 1616 pinmux = <0x30330134 6 0x0 0 0x303303a4>; 1617 }; 1618 /omit-if-no-ref/ mx7d_pad_uart3_rx_data__uart3_dce_rx: MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX { 1619 pinmux = <0x30330138 0 0x30330704 2 0x303303a8>; 1620 }; 1621 /omit-if-no-ref/ mx7d_pad_uart3_rx_data__uart3_dte_tx: MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX { 1622 pinmux = <0x30330138 0 0x0 0 0x303303a8>; 1623 }; 1624 /omit-if-no-ref/ mx7d_pad_uart3_rx_data__usb_otg1_oc: MX7D_PAD_UART3_RX_DATA__USB_OTG1_OC { 1625 pinmux = <0x30330138 1 0x3033072c 0 0x303303a8>; 1626 }; 1627 /omit-if-no-ref/ mx7d_pad_uart3_rx_data__sai3_rx_sync: MX7D_PAD_UART3_RX_DATA__SAI3_RX_SYNC { 1628 pinmux = <0x30330138 2 0x303306cc 0 0x303303a8>; 1629 }; 1630 /omit-if-no-ref/ mx7d_pad_uart3_rx_data__ecspi1_miso: MX7D_PAD_UART3_RX_DATA__ECSPI1_MISO { 1631 pinmux = <0x30330138 3 0x30330528 0 0x303303a8>; 1632 }; 1633 /omit-if-no-ref/ mx7d_pad_uart3_rx_data__enet1_1588_event0_in: MX7D_PAD_UART3_RX_DATA__ENET1_1588_EVENT0_IN { 1634 pinmux = <0x30330138 4 0x0 0 0x303303a8>; 1635 }; 1636 /omit-if-no-ref/ mx7d_pad_uart3_rx_data__gpio4_io4: MX7D_PAD_UART3_RX_DATA__GPIO4_IO4 { 1637 pinmux = <0x30330138 5 0x0 0 0x303303a8>; 1638 }; 1639 /omit-if-no-ref/ mx7d_pad_uart3_rx_data__sd1_lctl: MX7D_PAD_UART3_RX_DATA__SD1_LCTL { 1640 pinmux = <0x30330138 6 0x0 0 0x303303a8>; 1641 }; 1642 /omit-if-no-ref/ mx7d_pad_uart3_tx_data__uart3_dce_tx: MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX { 1643 pinmux = <0x3033013c 0 0x0 0 0x303303ac>; 1644 }; 1645 /omit-if-no-ref/ mx7d_pad_uart3_tx_data__uart3_dte_rx: MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX { 1646 pinmux = <0x3033013c 0 0x30330704 3 0x303303ac>; 1647 }; 1648 /omit-if-no-ref/ mx7d_pad_uart3_tx_data__usb_otg1_pwr: MX7D_PAD_UART3_TX_DATA__USB_OTG1_PWR { 1649 pinmux = <0x3033013c 1 0x0 0 0x303303ac>; 1650 }; 1651 /omit-if-no-ref/ mx7d_pad_uart3_tx_data__sai3_tx_bclk: MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK { 1652 pinmux = <0x3033013c 2 0x303306d0 0 0x303303ac>; 1653 }; 1654 /omit-if-no-ref/ mx7d_pad_uart3_tx_data__ecspi1_mosi: MX7D_PAD_UART3_TX_DATA__ECSPI1_MOSI { 1655 pinmux = <0x3033013c 3 0x3033052c 0 0x303303ac>; 1656 }; 1657 /omit-if-no-ref/ mx7d_pad_uart3_tx_data__enet1_1588_event0_out: MX7D_PAD_UART3_TX_DATA__ENET1_1588_EVENT0_OUT { 1658 pinmux = <0x3033013c 4 0x0 0 0x303303ac>; 1659 }; 1660 /omit-if-no-ref/ mx7d_pad_uart3_tx_data__gpio4_io5: MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 { 1661 pinmux = <0x3033013c 5 0x0 0 0x303303ac>; 1662 }; 1663 /omit-if-no-ref/ mx7d_pad_uart3_tx_data__sd2_lctl: MX7D_PAD_UART3_TX_DATA__SD2_LCTL { 1664 pinmux = <0x3033013c 6 0x0 0 0x303303ac>; 1665 }; 1666 /omit-if-no-ref/ mx7d_pad_uart3_rts_b__uart3_dce_rts: MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS { 1667 pinmux = <0x30330140 0 0x30330700 2 0x303303b0>; 1668 }; 1669 /omit-if-no-ref/ mx7d_pad_uart3_rts_b__uart3_dte_cts: MX7D_PAD_UART3_RTS_B__UART3_DTE_CTS { 1670 pinmux = <0x30330140 0 0x0 0 0x303303b0>; 1671 }; 1672 /omit-if-no-ref/ mx7d_pad_uart3_rts_b__usb_otg2_oc: MX7D_PAD_UART3_RTS_B__USB_OTG2_OC { 1673 pinmux = <0x30330140 1 0x30330728 0 0x303303b0>; 1674 }; 1675 /omit-if-no-ref/ mx7d_pad_uart3_rts_b__sai3_tx_data0: MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0 { 1676 pinmux = <0x30330140 2 0x0 0 0x303303b0>; 1677 }; 1678 /omit-if-no-ref/ mx7d_pad_uart3_rts_b__ecspi1_sclk: MX7D_PAD_UART3_RTS_B__ECSPI1_SCLK { 1679 pinmux = <0x30330140 3 0x30330524 0 0x303303b0>; 1680 }; 1681 /omit-if-no-ref/ mx7d_pad_uart3_rts_b__enet1_1588_event1_in: MX7D_PAD_UART3_RTS_B__ENET1_1588_EVENT1_IN { 1682 pinmux = <0x30330140 4 0x0 0 0x303303b0>; 1683 }; 1684 /omit-if-no-ref/ mx7d_pad_uart3_rts_b__gpio4_io6: MX7D_PAD_UART3_RTS_B__GPIO4_IO6 { 1685 pinmux = <0x30330140 5 0x0 0 0x303303b0>; 1686 }; 1687 /omit-if-no-ref/ mx7d_pad_uart3_rts_b__sd3_lctl: MX7D_PAD_UART3_RTS_B__SD3_LCTL { 1688 pinmux = <0x30330140 6 0x0 0 0x303303b0>; 1689 }; 1690 /omit-if-no-ref/ mx7d_pad_uart3_cts_b__uart3_dce_cts: MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS { 1691 pinmux = <0x30330144 0 0x0 0 0x303303b4>; 1692 }; 1693 /omit-if-no-ref/ mx7d_pad_uart3_cts_b__uart3_dte_rts: MX7D_PAD_UART3_CTS_B__UART3_DTE_RTS { 1694 pinmux = <0x30330144 0 0x30330700 3 0x303303b4>; 1695 }; 1696 /omit-if-no-ref/ mx7d_pad_uart3_cts_b__usb_otg2_pwr: MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR { 1697 pinmux = <0x30330144 1 0x0 0 0x303303b4>; 1698 }; 1699 /omit-if-no-ref/ mx7d_pad_uart3_cts_b__sai3_tx_sync: MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC { 1700 pinmux = <0x30330144 2 0x303306d4 0 0x303303b4>; 1701 }; 1702 /omit-if-no-ref/ mx7d_pad_uart3_cts_b__ecspi1_ss0: MX7D_PAD_UART3_CTS_B__ECSPI1_SS0 { 1703 pinmux = <0x30330144 3 0x30330530 0 0x303303b4>; 1704 }; 1705 /omit-if-no-ref/ mx7d_pad_uart3_cts_b__enet1_1588_event1_out: MX7D_PAD_UART3_CTS_B__ENET1_1588_EVENT1_OUT { 1706 pinmux = <0x30330144 4 0x0 0 0x303303b4>; 1707 }; 1708 /omit-if-no-ref/ mx7d_pad_uart3_cts_b__gpio4_io7: MX7D_PAD_UART3_CTS_B__GPIO4_IO7 { 1709 pinmux = <0x30330144 5 0x0 0 0x303303b4>; 1710 }; 1711 /omit-if-no-ref/ mx7d_pad_uart3_cts_b__sd1_vselect: MX7D_PAD_UART3_CTS_B__SD1_VSELECT { 1712 pinmux = <0x30330144 6 0x0 0 0x303303b4>; 1713 }; 1714 /omit-if-no-ref/ mx7d_pad_i2c1_scl__i2c1_scl: MX7D_PAD_I2C1_SCL__I2C1_SCL { 1715 pinmux = <0x30330148 0 0x303305d4 1 0x303303b8>; 1716 }; 1717 /omit-if-no-ref/ mx7d_pad_i2c1_scl__uart4_dce_cts: MX7D_PAD_I2C1_SCL__UART4_DCE_CTS { 1718 pinmux = <0x30330148 1 0x0 0 0x303303b8>; 1719 }; 1720 /omit-if-no-ref/ mx7d_pad_i2c1_scl__uart4_dte_rts: MX7D_PAD_I2C1_SCL__UART4_DTE_RTS { 1721 pinmux = <0x30330148 1 0x30330708 0 0x303303b8>; 1722 }; 1723 /omit-if-no-ref/ mx7d_pad_i2c1_scl__flexcan1_rx: MX7D_PAD_I2C1_SCL__FLEXCAN1_RX { 1724 pinmux = <0x30330148 2 0x303304dc 1 0x303303b8>; 1725 }; 1726 /omit-if-no-ref/ mx7d_pad_i2c1_scl__ecspi3_miso: MX7D_PAD_I2C1_SCL__ECSPI3_MISO { 1727 pinmux = <0x30330148 3 0x30330548 0 0x303303b8>; 1728 }; 1729 /omit-if-no-ref/ mx7d_pad_i2c1_scl__gpio4_io8: MX7D_PAD_I2C1_SCL__GPIO4_IO8 { 1730 pinmux = <0x30330148 5 0x0 0 0x303303b8>; 1731 }; 1732 /omit-if-no-ref/ mx7d_pad_i2c1_scl__sd2_vselect: MX7D_PAD_I2C1_SCL__SD2_VSELECT { 1733 pinmux = <0x30330148 6 0x0 0 0x303303b8>; 1734 }; 1735 /omit-if-no-ref/ mx7d_pad_i2c1_sda__i2c1_sda: MX7D_PAD_I2C1_SDA__I2C1_SDA { 1736 pinmux = <0x3033014c 0 0x303305d8 1 0x303303bc>; 1737 }; 1738 /omit-if-no-ref/ mx7d_pad_i2c1_sda__uart4_dce_rts: MX7D_PAD_I2C1_SDA__UART4_DCE_RTS { 1739 pinmux = <0x3033014c 1 0x30330708 1 0x303303bc>; 1740 }; 1741 /omit-if-no-ref/ mx7d_pad_i2c1_sda__uart4_dte_cts: MX7D_PAD_I2C1_SDA__UART4_DTE_CTS { 1742 pinmux = <0x3033014c 1 0x0 0 0x303303bc>; 1743 }; 1744 /omit-if-no-ref/ mx7d_pad_i2c1_sda__flexcan1_tx: MX7D_PAD_I2C1_SDA__FLEXCAN1_TX { 1745 pinmux = <0x3033014c 2 0x0 0 0x303303bc>; 1746 }; 1747 /omit-if-no-ref/ mx7d_pad_i2c1_sda__ecspi3_mosi: MX7D_PAD_I2C1_SDA__ECSPI3_MOSI { 1748 pinmux = <0x3033014c 3 0x3033054c 0 0x303303bc>; 1749 }; 1750 /omit-if-no-ref/ mx7d_pad_i2c1_sda__ccm_enet1_ref_clk: MX7D_PAD_I2C1_SDA__CCM_ENET1_REF_CLK { 1751 pinmux = <0x3033014c 4 0x30330564 1 0x303303bc>; 1752 }; 1753 /omit-if-no-ref/ mx7d_pad_i2c1_sda__gpio4_io9: MX7D_PAD_I2C1_SDA__GPIO4_IO9 { 1754 pinmux = <0x3033014c 5 0x0 0 0x303303bc>; 1755 }; 1756 /omit-if-no-ref/ mx7d_pad_i2c1_sda__sd3_vselect: MX7D_PAD_I2C1_SDA__SD3_VSELECT { 1757 pinmux = <0x3033014c 6 0x0 0 0x303303bc>; 1758 }; 1759 /omit-if-no-ref/ mx7d_pad_i2c2_scl__i2c2_scl: MX7D_PAD_I2C2_SCL__I2C2_SCL { 1760 pinmux = <0x30330150 0 0x303305dc 1 0x303303c0>; 1761 }; 1762 /omit-if-no-ref/ mx7d_pad_i2c2_scl__uart4_dce_rx: MX7D_PAD_I2C2_SCL__UART4_DCE_RX { 1763 pinmux = <0x30330150 1 0x3033070c 0 0x303303c0>; 1764 }; 1765 /omit-if-no-ref/ mx7d_pad_i2c2_scl__uart4_dte_tx: MX7D_PAD_I2C2_SCL__UART4_DTE_TX { 1766 pinmux = <0x30330150 1 0x0 0 0x303303c0>; 1767 }; 1768 /omit-if-no-ref/ mx7d_pad_i2c2_scl__wdog3_wdog_b: MX7D_PAD_I2C2_SCL__WDOG3_WDOG_B { 1769 pinmux = <0x30330150 2 0x0 0 0x303303c0>; 1770 }; 1771 /omit-if-no-ref/ mx7d_pad_i2c2_scl__ecspi3_sclk: MX7D_PAD_I2C2_SCL__ECSPI3_SCLK { 1772 pinmux = <0x30330150 3 0x30330544 0 0x303303c0>; 1773 }; 1774 /omit-if-no-ref/ mx7d_pad_i2c2_scl__ccm_enet2_ref_clk: MX7D_PAD_I2C2_SCL__CCM_ENET2_REF_CLK { 1775 pinmux = <0x30330150 4 0x30330570 2 0x303303c0>; 1776 }; 1777 /omit-if-no-ref/ mx7d_pad_i2c2_scl__gpio4_io10: MX7D_PAD_I2C2_SCL__GPIO4_IO10 { 1778 pinmux = <0x30330150 5 0x0 0 0x303303c0>; 1779 }; 1780 /omit-if-no-ref/ mx7d_pad_i2c2_scl__sd3_cd_b: MX7D_PAD_I2C2_SCL__SD3_CD_B { 1781 pinmux = <0x30330150 6 0x30330738 1 0x303303c0>; 1782 }; 1783 /omit-if-no-ref/ mx7d_pad_i2c2_sda__i2c2_sda: MX7D_PAD_I2C2_SDA__I2C2_SDA { 1784 pinmux = <0x30330154 0 0x303305e0 1 0x303303c4>; 1785 }; 1786 /omit-if-no-ref/ mx7d_pad_i2c2_sda__uart4_dce_tx: MX7D_PAD_I2C2_SDA__UART4_DCE_TX { 1787 pinmux = <0x30330154 1 0x0 0 0x303303c4>; 1788 }; 1789 /omit-if-no-ref/ mx7d_pad_i2c2_sda__uart4_dte_rx: MX7D_PAD_I2C2_SDA__UART4_DTE_RX { 1790 pinmux = <0x30330154 1 0x3033070c 1 0x303303c4>; 1791 }; 1792 /omit-if-no-ref/ mx7d_pad_i2c2_sda__wdog3_wdog_rst_b_deb: MX7D_PAD_I2C2_SDA__WDOG3_WDOG_RST_B_DEB { 1793 pinmux = <0x30330154 2 0x0 0 0x303303c4>; 1794 }; 1795 /omit-if-no-ref/ mx7d_pad_i2c2_sda__ecspi3_ss0: MX7D_PAD_I2C2_SDA__ECSPI3_SS0 { 1796 pinmux = <0x30330154 3 0x30330550 0 0x303303c4>; 1797 }; 1798 /omit-if-no-ref/ mx7d_pad_i2c2_sda__ccm_enet_phy_ref_clk: MX7D_PAD_I2C2_SDA__CCM_ENET_PHY_REF_CLK { 1799 pinmux = <0x30330154 4 0x0 0 0x303303c4>; 1800 }; 1801 /omit-if-no-ref/ mx7d_pad_i2c2_sda__gpio4_io11: MX7D_PAD_I2C2_SDA__GPIO4_IO11 { 1802 pinmux = <0x30330154 5 0x0 0 0x303303c4>; 1803 }; 1804 /omit-if-no-ref/ mx7d_pad_i2c2_sda__sd3_wp: MX7D_PAD_I2C2_SDA__SD3_WP { 1805 pinmux = <0x30330154 6 0x3033073c 1 0x303303c4>; 1806 }; 1807 /omit-if-no-ref/ mx7d_pad_i2c3_scl__i2c3_scl: MX7D_PAD_I2C3_SCL__I2C3_SCL { 1808 pinmux = <0x30330158 0 0x303305e4 2 0x303303c8>; 1809 }; 1810 /omit-if-no-ref/ mx7d_pad_i2c3_scl__uart5_dce_cts: MX7D_PAD_I2C3_SCL__UART5_DCE_CTS { 1811 pinmux = <0x30330158 1 0x0 0 0x303303c8>; 1812 }; 1813 /omit-if-no-ref/ mx7d_pad_i2c3_scl__uart5_dte_rts: MX7D_PAD_I2C3_SCL__UART5_DTE_RTS { 1814 pinmux = <0x30330158 1 0x30330710 0 0x303303c8>; 1815 }; 1816 /omit-if-no-ref/ mx7d_pad_i2c3_scl__flexcan2_rx: MX7D_PAD_I2C3_SCL__FLEXCAN2_RX { 1817 pinmux = <0x30330158 2 0x303304e0 1 0x303303c8>; 1818 }; 1819 /omit-if-no-ref/ mx7d_pad_i2c3_scl__csi_vsync: MX7D_PAD_I2C3_SCL__CSI_VSYNC { 1820 pinmux = <0x30330158 3 0x30330520 1 0x303303c8>; 1821 }; 1822 /omit-if-no-ref/ mx7d_pad_i2c3_scl__sdma_ext_event0: MX7D_PAD_I2C3_SCL__SDMA_EXT_EVENT0 { 1823 pinmux = <0x30330158 4 0x303306d8 1 0x303303c8>; 1824 }; 1825 /omit-if-no-ref/ mx7d_pad_i2c3_scl__gpio4_io12: MX7D_PAD_I2C3_SCL__GPIO4_IO12 { 1826 pinmux = <0x30330158 5 0x0 0 0x303303c8>; 1827 }; 1828 /omit-if-no-ref/ mx7d_pad_i2c3_scl__epdc_bdr0: MX7D_PAD_I2C3_SCL__EPDC_BDR0 { 1829 pinmux = <0x30330158 6 0x0 0 0x303303c8>; 1830 }; 1831 /omit-if-no-ref/ mx7d_pad_i2c3_sda__i2c3_sda: MX7D_PAD_I2C3_SDA__I2C3_SDA { 1832 pinmux = <0x3033015c 0 0x303305e8 2 0x303303cc>; 1833 }; 1834 /omit-if-no-ref/ mx7d_pad_i2c3_sda__uart5_dce_rts: MX7D_PAD_I2C3_SDA__UART5_DCE_RTS { 1835 pinmux = <0x3033015c 1 0x30330710 1 0x303303cc>; 1836 }; 1837 /omit-if-no-ref/ mx7d_pad_i2c3_sda__uart5_dte_cts: MX7D_PAD_I2C3_SDA__UART5_DTE_CTS { 1838 pinmux = <0x3033015c 1 0x0 0 0x303303cc>; 1839 }; 1840 /omit-if-no-ref/ mx7d_pad_i2c3_sda__flexcan2_tx: MX7D_PAD_I2C3_SDA__FLEXCAN2_TX { 1841 pinmux = <0x3033015c 2 0x0 0 0x303303cc>; 1842 }; 1843 /omit-if-no-ref/ mx7d_pad_i2c3_sda__csi_hsync: MX7D_PAD_I2C3_SDA__CSI_HSYNC { 1844 pinmux = <0x3033015c 3 0x30330518 1 0x303303cc>; 1845 }; 1846 /omit-if-no-ref/ mx7d_pad_i2c3_sda__sdma_ext_event1: MX7D_PAD_I2C3_SDA__SDMA_EXT_EVENT1 { 1847 pinmux = <0x3033015c 4 0x303306dc 1 0x303303cc>; 1848 }; 1849 /omit-if-no-ref/ mx7d_pad_i2c3_sda__gpio4_io13: MX7D_PAD_I2C3_SDA__GPIO4_IO13 { 1850 pinmux = <0x3033015c 5 0x0 0 0x303303cc>; 1851 }; 1852 /omit-if-no-ref/ mx7d_pad_i2c3_sda__epdc_bdr1: MX7D_PAD_I2C3_SDA__EPDC_BDR1 { 1853 pinmux = <0x3033015c 6 0x0 0 0x303303cc>; 1854 }; 1855 /omit-if-no-ref/ mx7d_pad_i2c4_scl__i2c4_scl: MX7D_PAD_I2C4_SCL__I2C4_SCL { 1856 pinmux = <0x30330160 0 0x303305ec 2 0x303303d0>; 1857 }; 1858 /omit-if-no-ref/ mx7d_pad_i2c4_scl__uart5_dce_rx: MX7D_PAD_I2C4_SCL__UART5_DCE_RX { 1859 pinmux = <0x30330160 1 0x30330714 0 0x303303d0>; 1860 }; 1861 /omit-if-no-ref/ mx7d_pad_i2c4_scl__uart5_dte_tx: MX7D_PAD_I2C4_SCL__UART5_DTE_TX { 1862 pinmux = <0x30330160 1 0x0 0 0x303303d0>; 1863 }; 1864 /omit-if-no-ref/ mx7d_pad_i2c4_scl__wdog4_wdog_b: MX7D_PAD_I2C4_SCL__WDOG4_WDOG_B { 1865 pinmux = <0x30330160 2 0x0 0 0x303303d0>; 1866 }; 1867 /omit-if-no-ref/ mx7d_pad_i2c4_scl__csi_pixclk: MX7D_PAD_I2C4_SCL__CSI_PIXCLK { 1868 pinmux = <0x30330160 3 0x3033051c 1 0x303303d0>; 1869 }; 1870 /omit-if-no-ref/ mx7d_pad_i2c4_scl__usb_otg1_id: MX7D_PAD_I2C4_SCL__USB_OTG1_ID { 1871 pinmux = <0x30330160 4 0x30330734 1 0x303303d0>; 1872 }; 1873 /omit-if-no-ref/ mx7d_pad_i2c4_scl__gpio4_io14: MX7D_PAD_I2C4_SCL__GPIO4_IO14 { 1874 pinmux = <0x30330160 5 0x0 0 0x303303d0>; 1875 }; 1876 /omit-if-no-ref/ mx7d_pad_i2c4_scl__epdc_vcom0: MX7D_PAD_I2C4_SCL__EPDC_VCOM0 { 1877 pinmux = <0x30330160 6 0x0 0 0x303303d0>; 1878 }; 1879 /omit-if-no-ref/ mx7d_pad_i2c4_sda__i2c4_sda: MX7D_PAD_I2C4_SDA__I2C4_SDA { 1880 pinmux = <0x30330164 0 0x303305f0 2 0x303303d4>; 1881 }; 1882 /omit-if-no-ref/ mx7d_pad_i2c4_sda__uart5_dce_tx: MX7D_PAD_I2C4_SDA__UART5_DCE_TX { 1883 pinmux = <0x30330164 1 0x0 0 0x303303d4>; 1884 }; 1885 /omit-if-no-ref/ mx7d_pad_i2c4_sda__uart5_dte_rx: MX7D_PAD_I2C4_SDA__UART5_DTE_RX { 1886 pinmux = <0x30330164 1 0x30330714 1 0x303303d4>; 1887 }; 1888 /omit-if-no-ref/ mx7d_pad_i2c4_sda__wdog4_wdog_rst_b_deb: MX7D_PAD_I2C4_SDA__WDOG4_WDOG_RST_B_DEB { 1889 pinmux = <0x30330164 2 0x0 0 0x303303d4>; 1890 }; 1891 /omit-if-no-ref/ mx7d_pad_i2c4_sda__csi_mclk: MX7D_PAD_I2C4_SDA__CSI_MCLK { 1892 pinmux = <0x30330164 3 0x0 0 0x303303d4>; 1893 }; 1894 /omit-if-no-ref/ mx7d_pad_i2c4_sda__usb_otg2_id: MX7D_PAD_I2C4_SDA__USB_OTG2_ID { 1895 pinmux = <0x30330164 4 0x30330730 1 0x303303d4>; 1896 }; 1897 /omit-if-no-ref/ mx7d_pad_i2c4_sda__gpio4_io15: MX7D_PAD_I2C4_SDA__GPIO4_IO15 { 1898 pinmux = <0x30330164 5 0x0 0 0x303303d4>; 1899 }; 1900 /omit-if-no-ref/ mx7d_pad_i2c4_sda__epdc_vcom1: MX7D_PAD_I2C4_SDA__EPDC_VCOM1 { 1901 pinmux = <0x30330164 6 0x0 0 0x303303d4>; 1902 }; 1903 /omit-if-no-ref/ mx7d_pad_ecspi1_sclk__ecspi1_sclk: MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK { 1904 pinmux = <0x30330168 0 0x30330524 1 0x303303d8>; 1905 }; 1906 /omit-if-no-ref/ mx7d_pad_ecspi1_sclk__uart6_dce_rx: MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX { 1907 pinmux = <0x30330168 1 0x3033071c 2 0x303303d8>; 1908 }; 1909 /omit-if-no-ref/ mx7d_pad_ecspi1_sclk__uart6_dte_tx: MX7D_PAD_ECSPI1_SCLK__UART6_DTE_TX { 1910 pinmux = <0x30330168 1 0x0 0 0x303303d8>; 1911 }; 1912 /omit-if-no-ref/ mx7d_pad_ecspi1_sclk__sd2_data4: MX7D_PAD_ECSPI1_SCLK__SD2_DATA4 { 1913 pinmux = <0x30330168 2 0x0 0 0x303303d8>; 1914 }; 1915 /omit-if-no-ref/ mx7d_pad_ecspi1_sclk__csi_data2: MX7D_PAD_ECSPI1_SCLK__CSI_DATA2 { 1916 pinmux = <0x30330168 3 0x303304f8 1 0x303303d8>; 1917 }; 1918 /omit-if-no-ref/ mx7d_pad_ecspi1_sclk__gpio4_io16: MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 { 1919 pinmux = <0x30330168 5 0x0 0 0x303303d8>; 1920 }; 1921 /omit-if-no-ref/ mx7d_pad_ecspi1_sclk__epdc_pwr_com: MX7D_PAD_ECSPI1_SCLK__EPDC_PWR_COM { 1922 pinmux = <0x30330168 6 0x0 0 0x303303d8>; 1923 }; 1924 /omit-if-no-ref/ mx7d_pad_ecspi1_mosi__ecspi1_mosi: MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI { 1925 pinmux = <0x3033016c 0 0x3033052c 1 0x303303dc>; 1926 }; 1927 /omit-if-no-ref/ mx7d_pad_ecspi1_mosi__uart6_dce_tx: MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX { 1928 pinmux = <0x3033016c 1 0x0 0 0x303303dc>; 1929 }; 1930 /omit-if-no-ref/ mx7d_pad_ecspi1_mosi__uart6_dte_rx: MX7D_PAD_ECSPI1_MOSI__UART6_DTE_RX { 1931 pinmux = <0x3033016c 1 0x3033071c 3 0x303303dc>; 1932 }; 1933 /omit-if-no-ref/ mx7d_pad_ecspi1_mosi__sd2_data5: MX7D_PAD_ECSPI1_MOSI__SD2_DATA5 { 1934 pinmux = <0x3033016c 2 0x0 0 0x303303dc>; 1935 }; 1936 /omit-if-no-ref/ mx7d_pad_ecspi1_mosi__csi_data3: MX7D_PAD_ECSPI1_MOSI__CSI_DATA3 { 1937 pinmux = <0x3033016c 3 0x303304fc 1 0x303303dc>; 1938 }; 1939 /omit-if-no-ref/ mx7d_pad_ecspi1_mosi__gpio4_io17: MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 { 1940 pinmux = <0x3033016c 5 0x0 0 0x303303dc>; 1941 }; 1942 /omit-if-no-ref/ mx7d_pad_ecspi1_mosi__epdc_pwr_stat: MX7D_PAD_ECSPI1_MOSI__EPDC_PWR_STAT { 1943 pinmux = <0x3033016c 6 0x30330580 1 0x303303dc>; 1944 }; 1945 /omit-if-no-ref/ mx7d_pad_ecspi1_miso__ecspi1_miso: MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO { 1946 pinmux = <0x30330170 0 0x30330528 1 0x303303e0>; 1947 }; 1948 /omit-if-no-ref/ mx7d_pad_ecspi1_miso__uart6_dce_rts: MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS { 1949 pinmux = <0x30330170 1 0x30330718 2 0x303303e0>; 1950 }; 1951 /omit-if-no-ref/ mx7d_pad_ecspi1_miso__uart6_dte_cts: MX7D_PAD_ECSPI1_MISO__UART6_DTE_CTS { 1952 pinmux = <0x30330170 1 0x0 0 0x303303e0>; 1953 }; 1954 /omit-if-no-ref/ mx7d_pad_ecspi1_miso__sd2_data6: MX7D_PAD_ECSPI1_MISO__SD2_DATA6 { 1955 pinmux = <0x30330170 2 0x0 0 0x303303e0>; 1956 }; 1957 /omit-if-no-ref/ mx7d_pad_ecspi1_miso__csi_data4: MX7D_PAD_ECSPI1_MISO__CSI_DATA4 { 1958 pinmux = <0x30330170 3 0x30330500 1 0x303303e0>; 1959 }; 1960 /omit-if-no-ref/ mx7d_pad_ecspi1_miso__gpio4_io18: MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 { 1961 pinmux = <0x30330170 5 0x0 0 0x303303e0>; 1962 }; 1963 /omit-if-no-ref/ mx7d_pad_ecspi1_miso__epdc_pwr_irq: MX7D_PAD_ECSPI1_MISO__EPDC_PWR_IRQ { 1964 pinmux = <0x30330170 6 0x3033057c 0 0x303303e0>; 1965 }; 1966 /omit-if-no-ref/ mx7d_pad_ecspi1_ss0__ecspi1_ss0: MX7D_PAD_ECSPI1_SS0__ECSPI1_SS0 { 1967 pinmux = <0x30330174 0 0x30330530 1 0x303303e4>; 1968 }; 1969 /omit-if-no-ref/ mx7d_pad_ecspi1_ss0__uart6_dce_cts: MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS { 1970 pinmux = <0x30330174 1 0x0 0 0x303303e4>; 1971 }; 1972 /omit-if-no-ref/ mx7d_pad_ecspi1_ss0__uart6_dte_rts: MX7D_PAD_ECSPI1_SS0__UART6_DTE_RTS { 1973 pinmux = <0x30330174 1 0x30330718 3 0x303303e4>; 1974 }; 1975 /omit-if-no-ref/ mx7d_pad_ecspi1_ss0__sd2_data7: MX7D_PAD_ECSPI1_SS0__SD2_DATA7 { 1976 pinmux = <0x30330174 2 0x0 0 0x303303e4>; 1977 }; 1978 /omit-if-no-ref/ mx7d_pad_ecspi1_ss0__csi_data5: MX7D_PAD_ECSPI1_SS0__CSI_DATA5 { 1979 pinmux = <0x30330174 3 0x30330504 1 0x303303e4>; 1980 }; 1981 /omit-if-no-ref/ mx7d_pad_ecspi1_ss0__gpio4_io19: MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 { 1982 pinmux = <0x30330174 5 0x0 0 0x303303e4>; 1983 }; 1984 /omit-if-no-ref/ mx7d_pad_ecspi1_ss0__epdc_pwr_ctrl3: MX7D_PAD_ECSPI1_SS0__EPDC_PWR_CTRL3 { 1985 pinmux = <0x30330174 6 0x0 0 0x303303e4>; 1986 }; 1987 /omit-if-no-ref/ mx7d_pad_ecspi2_sclk__ecspi2_sclk: MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK { 1988 pinmux = <0x30330178 0 0x30330534 0 0x303303e8>; 1989 }; 1990 /omit-if-no-ref/ mx7d_pad_ecspi2_sclk__uart7_dce_rx: MX7D_PAD_ECSPI2_SCLK__UART7_DCE_RX { 1991 pinmux = <0x30330178 1 0x30330724 2 0x303303e8>; 1992 }; 1993 /omit-if-no-ref/ mx7d_pad_ecspi2_sclk__uart7_dte_tx: MX7D_PAD_ECSPI2_SCLK__UART7_DTE_TX { 1994 pinmux = <0x30330178 1 0x0 0 0x303303e8>; 1995 }; 1996 /omit-if-no-ref/ mx7d_pad_ecspi2_sclk__sd1_data4: MX7D_PAD_ECSPI2_SCLK__SD1_DATA4 { 1997 pinmux = <0x30330178 2 0x0 0 0x303303e8>; 1998 }; 1999 /omit-if-no-ref/ mx7d_pad_ecspi2_sclk__csi_data6: MX7D_PAD_ECSPI2_SCLK__CSI_DATA6 { 2000 pinmux = <0x30330178 3 0x30330508 1 0x303303e8>; 2001 }; 2002 /omit-if-no-ref/ mx7d_pad_ecspi2_sclk__lcd_data13: MX7D_PAD_ECSPI2_SCLK__LCD_DATA13 { 2003 pinmux = <0x30330178 4 0x3033066c 2 0x303303e8>; 2004 }; 2005 /omit-if-no-ref/ mx7d_pad_ecspi2_sclk__gpio4_io20: MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 { 2006 pinmux = <0x30330178 5 0x0 0 0x303303e8>; 2007 }; 2008 /omit-if-no-ref/ mx7d_pad_ecspi2_sclk__epdc_pwr_ctrl0: MX7D_PAD_ECSPI2_SCLK__EPDC_PWR_CTRL0 { 2009 pinmux = <0x30330178 6 0x0 0 0x303303e8>; 2010 }; 2011 /omit-if-no-ref/ mx7d_pad_ecspi2_mosi__ecspi2_mosi: MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI { 2012 pinmux = <0x3033017c 0 0x3033053c 0 0x303303ec>; 2013 }; 2014 /omit-if-no-ref/ mx7d_pad_ecspi2_mosi__uart7_dce_tx: MX7D_PAD_ECSPI2_MOSI__UART7_DCE_TX { 2015 pinmux = <0x3033017c 1 0x0 0 0x303303ec>; 2016 }; 2017 /omit-if-no-ref/ mx7d_pad_ecspi2_mosi__uart7_dte_rx: MX7D_PAD_ECSPI2_MOSI__UART7_DTE_RX { 2018 pinmux = <0x3033017c 1 0x30330724 3 0x303303ec>; 2019 }; 2020 /omit-if-no-ref/ mx7d_pad_ecspi2_mosi__sd1_data5: MX7D_PAD_ECSPI2_MOSI__SD1_DATA5 { 2021 pinmux = <0x3033017c 2 0x0 0 0x303303ec>; 2022 }; 2023 /omit-if-no-ref/ mx7d_pad_ecspi2_mosi__csi_data7: MX7D_PAD_ECSPI2_MOSI__CSI_DATA7 { 2024 pinmux = <0x3033017c 3 0x3033050c 1 0x303303ec>; 2025 }; 2026 /omit-if-no-ref/ mx7d_pad_ecspi2_mosi__lcd_data14: MX7D_PAD_ECSPI2_MOSI__LCD_DATA14 { 2027 pinmux = <0x3033017c 4 0x30330670 2 0x303303ec>; 2028 }; 2029 /omit-if-no-ref/ mx7d_pad_ecspi2_mosi__gpio4_io21: MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 { 2030 pinmux = <0x3033017c 5 0x0 0 0x303303ec>; 2031 }; 2032 /omit-if-no-ref/ mx7d_pad_ecspi2_mosi__epdc_pwr_ctrl1: MX7D_PAD_ECSPI2_MOSI__EPDC_PWR_CTRL1 { 2033 pinmux = <0x3033017c 6 0x0 0 0x303303ec>; 2034 }; 2035 /omit-if-no-ref/ mx7d_pad_ecspi2_miso__gpio4_io22: MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 { 2036 pinmux = <0x30330180 5 0x0 0 0x303303f0>; 2037 }; 2038 /omit-if-no-ref/ mx7d_pad_ecspi2_miso__epdc_pwr_ctrl2: MX7D_PAD_ECSPI2_MISO__EPDC_PWR_CTRL2 { 2039 pinmux = <0x30330180 6 0x0 0 0x303303f0>; 2040 }; 2041 /omit-if-no-ref/ mx7d_pad_ecspi2_miso__ecspi2_miso: MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO { 2042 pinmux = <0x30330180 0 0x30330538 0 0x303303f0>; 2043 }; 2044 /omit-if-no-ref/ mx7d_pad_ecspi2_miso__uart7_dce_rts: MX7D_PAD_ECSPI2_MISO__UART7_DCE_RTS { 2045 pinmux = <0x30330180 1 0x30330720 2 0x303303f0>; 2046 }; 2047 /omit-if-no-ref/ mx7d_pad_ecspi2_miso__uart7_dte_cts: MX7D_PAD_ECSPI2_MISO__UART7_DTE_CTS { 2048 pinmux = <0x30330180 1 0x0 0 0x303303f0>; 2049 }; 2050 /omit-if-no-ref/ mx7d_pad_ecspi2_miso__sd1_data6: MX7D_PAD_ECSPI2_MISO__SD1_DATA6 { 2051 pinmux = <0x30330180 2 0x0 0 0x303303f0>; 2052 }; 2053 /omit-if-no-ref/ mx7d_pad_ecspi2_miso__csi_data8: MX7D_PAD_ECSPI2_MISO__CSI_DATA8 { 2054 pinmux = <0x30330180 3 0x30330510 1 0x303303f0>; 2055 }; 2056 /omit-if-no-ref/ mx7d_pad_ecspi2_miso__lcd_data15: MX7D_PAD_ECSPI2_MISO__LCD_DATA15 { 2057 pinmux = <0x30330180 4 0x30330674 2 0x303303f0>; 2058 }; 2059 /omit-if-no-ref/ mx7d_pad_ecspi2_ss0__ecspi2_ss0: MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0 { 2060 pinmux = <0x30330184 0 0x30330540 0 0x303303f4>; 2061 }; 2062 /omit-if-no-ref/ mx7d_pad_ecspi2_ss0__uart7_dce_cts: MX7D_PAD_ECSPI2_SS0__UART7_DCE_CTS { 2063 pinmux = <0x30330184 1 0x0 0 0x303303f4>; 2064 }; 2065 /omit-if-no-ref/ mx7d_pad_ecspi2_ss0__uart7_dte_rts: MX7D_PAD_ECSPI2_SS0__UART7_DTE_RTS { 2066 pinmux = <0x30330184 1 0x30330720 3 0x303303f4>; 2067 }; 2068 /omit-if-no-ref/ mx7d_pad_ecspi2_ss0__sd1_data7: MX7D_PAD_ECSPI2_SS0__SD1_DATA7 { 2069 pinmux = <0x30330184 2 0x0 0 0x303303f4>; 2070 }; 2071 /omit-if-no-ref/ mx7d_pad_ecspi2_ss0__csi_data9: MX7D_PAD_ECSPI2_SS0__CSI_DATA9 { 2072 pinmux = <0x30330184 3 0x30330514 1 0x303303f4>; 2073 }; 2074 /omit-if-no-ref/ mx7d_pad_ecspi2_ss0__lcd_reset: MX7D_PAD_ECSPI2_SS0__LCD_RESET { 2075 pinmux = <0x30330184 4 0x0 0 0x303303f4>; 2076 }; 2077 /omit-if-no-ref/ mx7d_pad_ecspi2_ss0__gpio4_io23: MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 { 2078 pinmux = <0x30330184 5 0x0 0 0x303303f4>; 2079 }; 2080 /omit-if-no-ref/ mx7d_pad_ecspi2_ss0__epdc_pwr_wake: MX7D_PAD_ECSPI2_SS0__EPDC_PWR_WAKE { 2081 pinmux = <0x30330184 6 0x0 0 0x303303f4>; 2082 }; 2083 /omit-if-no-ref/ mx7d_pad_sd1_cd_b__sd1_cd_b: MX7D_PAD_SD1_CD_B__SD1_CD_B { 2084 pinmux = <0x30330188 0 0x0 0 0x303303f8>; 2085 }; 2086 /omit-if-no-ref/ mx7d_pad_sd1_cd_b__uart6_dce_rx: MX7D_PAD_SD1_CD_B__UART6_DCE_RX { 2087 pinmux = <0x30330188 2 0x3033071c 4 0x303303f8>; 2088 }; 2089 /omit-if-no-ref/ mx7d_pad_sd1_cd_b__uart6_dte_tx: MX7D_PAD_SD1_CD_B__UART6_DTE_TX { 2090 pinmux = <0x30330188 2 0x0 0 0x303303f8>; 2091 }; 2092 /omit-if-no-ref/ mx7d_pad_sd1_cd_b__ecspi4_miso: MX7D_PAD_SD1_CD_B__ECSPI4_MISO { 2093 pinmux = <0x30330188 3 0x30330558 1 0x303303f8>; 2094 }; 2095 /omit-if-no-ref/ mx7d_pad_sd1_cd_b__flextimer1_ch0: MX7D_PAD_SD1_CD_B__FLEXTIMER1_CH0 { 2096 pinmux = <0x30330188 4 0x30330584 1 0x303303f8>; 2097 }; 2098 /omit-if-no-ref/ mx7d_pad_sd1_cd_b__gpio5_io0: MX7D_PAD_SD1_CD_B__GPIO5_IO0 { 2099 pinmux = <0x30330188 5 0x0 0 0x303303f8>; 2100 }; 2101 /omit-if-no-ref/ mx7d_pad_sd1_cd_b__ccm_clko1: MX7D_PAD_SD1_CD_B__CCM_CLKO1 { 2102 pinmux = <0x30330188 6 0x0 0 0x303303f8>; 2103 }; 2104 /omit-if-no-ref/ mx7d_pad_sd1_wp__sd1_wp: MX7D_PAD_SD1_WP__SD1_WP { 2105 pinmux = <0x3033018c 0 0x0 0 0x303303fc>; 2106 }; 2107 /omit-if-no-ref/ mx7d_pad_sd1_wp__uart6_dce_tx: MX7D_PAD_SD1_WP__UART6_DCE_TX { 2108 pinmux = <0x3033018c 2 0x0 0 0x303303fc>; 2109 }; 2110 /omit-if-no-ref/ mx7d_pad_sd1_wp__uart6_dte_rx: MX7D_PAD_SD1_WP__UART6_DTE_RX { 2111 pinmux = <0x3033018c 2 0x3033071c 5 0x303303fc>; 2112 }; 2113 /omit-if-no-ref/ mx7d_pad_sd1_wp__ecspi4_mosi: MX7D_PAD_SD1_WP__ECSPI4_MOSI { 2114 pinmux = <0x3033018c 3 0x3033055c 1 0x303303fc>; 2115 }; 2116 /omit-if-no-ref/ mx7d_pad_sd1_wp__flextimer1_ch1: MX7D_PAD_SD1_WP__FLEXTIMER1_CH1 { 2117 pinmux = <0x3033018c 4 0x30330588 1 0x303303fc>; 2118 }; 2119 /omit-if-no-ref/ mx7d_pad_sd1_wp__gpio5_io1: MX7D_PAD_SD1_WP__GPIO5_IO1 { 2120 pinmux = <0x3033018c 5 0x0 0 0x303303fc>; 2121 }; 2122 /omit-if-no-ref/ mx7d_pad_sd1_wp__ccm_clko2: MX7D_PAD_SD1_WP__CCM_CLKO2 { 2123 pinmux = <0x3033018c 6 0x0 0 0x303303fc>; 2124 }; 2125 /omit-if-no-ref/ mx7d_pad_sd1_reset_b__sd1_reset_b: MX7D_PAD_SD1_RESET_B__SD1_RESET_B { 2126 pinmux = <0x30330190 0 0x0 0 0x30330400>; 2127 }; 2128 /omit-if-no-ref/ mx7d_pad_sd1_reset_b__sai3_mclk: MX7D_PAD_SD1_RESET_B__SAI3_MCLK { 2129 pinmux = <0x30330190 1 0x0 0 0x30330400>; 2130 }; 2131 /omit-if-no-ref/ mx7d_pad_sd1_reset_b__uart6_dce_rts: MX7D_PAD_SD1_RESET_B__UART6_DCE_RTS { 2132 pinmux = <0x30330190 2 0x30330718 4 0x30330400>; 2133 }; 2134 /omit-if-no-ref/ mx7d_pad_sd1_reset_b__uart6_dte_cts: MX7D_PAD_SD1_RESET_B__UART6_DTE_CTS { 2135 pinmux = <0x30330190 2 0x0 0 0x30330400>; 2136 }; 2137 /omit-if-no-ref/ mx7d_pad_sd1_reset_b__ecspi4_sclk: MX7D_PAD_SD1_RESET_B__ECSPI4_SCLK { 2138 pinmux = <0x30330190 3 0x30330554 1 0x30330400>; 2139 }; 2140 /omit-if-no-ref/ mx7d_pad_sd1_reset_b__flextimer1_ch2: MX7D_PAD_SD1_RESET_B__FLEXTIMER1_CH2 { 2141 pinmux = <0x30330190 4 0x3033058c 1 0x30330400>; 2142 }; 2143 /omit-if-no-ref/ mx7d_pad_sd1_reset_b__gpio5_io2: MX7D_PAD_SD1_RESET_B__GPIO5_IO2 { 2144 pinmux = <0x30330190 5 0x0 0 0x30330400>; 2145 }; 2146 /omit-if-no-ref/ mx7d_pad_sd1_clk__sd1_clk: MX7D_PAD_SD1_CLK__SD1_CLK { 2147 pinmux = <0x30330194 0 0x0 0 0x30330404>; 2148 }; 2149 /omit-if-no-ref/ mx7d_pad_sd1_clk__sai3_rx_sync: MX7D_PAD_SD1_CLK__SAI3_RX_SYNC { 2150 pinmux = <0x30330194 1 0x303306cc 1 0x30330404>; 2151 }; 2152 /omit-if-no-ref/ mx7d_pad_sd1_clk__uart6_dce_cts: MX7D_PAD_SD1_CLK__UART6_DCE_CTS { 2153 pinmux = <0x30330194 2 0x0 0 0x30330404>; 2154 }; 2155 /omit-if-no-ref/ mx7d_pad_sd1_clk__uart6_dte_rts: MX7D_PAD_SD1_CLK__UART6_DTE_RTS { 2156 pinmux = <0x30330194 2 0x30330718 5 0x30330404>; 2157 }; 2158 /omit-if-no-ref/ mx7d_pad_sd1_clk__ecspi4_ss0: MX7D_PAD_SD1_CLK__ECSPI4_SS0 { 2159 pinmux = <0x30330194 3 0x30330560 1 0x30330404>; 2160 }; 2161 /omit-if-no-ref/ mx7d_pad_sd1_clk__flextimer1_ch3: MX7D_PAD_SD1_CLK__FLEXTIMER1_CH3 { 2162 pinmux = <0x30330194 4 0x30330590 1 0x30330404>; 2163 }; 2164 /omit-if-no-ref/ mx7d_pad_sd1_clk__gpio5_io3: MX7D_PAD_SD1_CLK__GPIO5_IO3 { 2165 pinmux = <0x30330194 5 0x0 0 0x30330404>; 2166 }; 2167 /omit-if-no-ref/ mx7d_pad_sd1_cmd__sd1_cmd: MX7D_PAD_SD1_CMD__SD1_CMD { 2168 pinmux = <0x30330198 0 0x0 0 0x30330408>; 2169 }; 2170 /omit-if-no-ref/ mx7d_pad_sd1_cmd__sai3_rx_bclk: MX7D_PAD_SD1_CMD__SAI3_RX_BCLK { 2171 pinmux = <0x30330198 1 0x303306c4 1 0x30330408>; 2172 }; 2173 /omit-if-no-ref/ mx7d_pad_sd1_cmd__ecspi4_ss1: MX7D_PAD_SD1_CMD__ECSPI4_SS1 { 2174 pinmux = <0x30330198 3 0x0 0 0x30330408>; 2175 }; 2176 /omit-if-no-ref/ mx7d_pad_sd1_cmd__flextimer2_ch0: MX7D_PAD_SD1_CMD__FLEXTIMER2_CH0 { 2177 pinmux = <0x30330198 4 0x303305ac 1 0x30330408>; 2178 }; 2179 /omit-if-no-ref/ mx7d_pad_sd1_cmd__gpio5_io4: MX7D_PAD_SD1_CMD__GPIO5_IO4 { 2180 pinmux = <0x30330198 5 0x0 0 0x30330408>; 2181 }; 2182 /omit-if-no-ref/ mx7d_pad_sd1_data0__sd1_data0: MX7D_PAD_SD1_DATA0__SD1_DATA0 { 2183 pinmux = <0x3033019c 0 0x0 0 0x3033040c>; 2184 }; 2185 /omit-if-no-ref/ mx7d_pad_sd1_data0__sai3_rx_data0: MX7D_PAD_SD1_DATA0__SAI3_RX_DATA0 { 2186 pinmux = <0x3033019c 1 0x303306c8 1 0x3033040c>; 2187 }; 2188 /omit-if-no-ref/ mx7d_pad_sd1_data0__uart7_dce_rx: MX7D_PAD_SD1_DATA0__UART7_DCE_RX { 2189 pinmux = <0x3033019c 2 0x30330724 4 0x3033040c>; 2190 }; 2191 /omit-if-no-ref/ mx7d_pad_sd1_data0__uart7_dte_tx: MX7D_PAD_SD1_DATA0__UART7_DTE_TX { 2192 pinmux = <0x3033019c 2 0x0 0 0x3033040c>; 2193 }; 2194 /omit-if-no-ref/ mx7d_pad_sd1_data0__ecspi4_ss2: MX7D_PAD_SD1_DATA0__ECSPI4_SS2 { 2195 pinmux = <0x3033019c 3 0x0 0 0x3033040c>; 2196 }; 2197 /omit-if-no-ref/ mx7d_pad_sd1_data0__flextimer2_ch1: MX7D_PAD_SD1_DATA0__FLEXTIMER2_CH1 { 2198 pinmux = <0x3033019c 4 0x303305b0 1 0x3033040c>; 2199 }; 2200 /omit-if-no-ref/ mx7d_pad_sd1_data0__gpio5_io5: MX7D_PAD_SD1_DATA0__GPIO5_IO5 { 2201 pinmux = <0x3033019c 5 0x0 0 0x3033040c>; 2202 }; 2203 /omit-if-no-ref/ mx7d_pad_sd1_data0__ccm_ext_clk1: MX7D_PAD_SD1_DATA0__CCM_EXT_CLK1 { 2204 pinmux = <0x3033019c 6 0x303304e4 1 0x3033040c>; 2205 }; 2206 /omit-if-no-ref/ mx7d_pad_sd1_data1__sd1_data1: MX7D_PAD_SD1_DATA1__SD1_DATA1 { 2207 pinmux = <0x303301a0 0 0x0 0 0x30330410>; 2208 }; 2209 /omit-if-no-ref/ mx7d_pad_sd1_data1__sai3_tx_bclk: MX7D_PAD_SD1_DATA1__SAI3_TX_BCLK { 2210 pinmux = <0x303301a0 1 0x303306d0 1 0x30330410>; 2211 }; 2212 /omit-if-no-ref/ mx7d_pad_sd1_data1__uart7_dce_tx: MX7D_PAD_SD1_DATA1__UART7_DCE_TX { 2213 pinmux = <0x303301a0 2 0x0 0 0x30330410>; 2214 }; 2215 /omit-if-no-ref/ mx7d_pad_sd1_data1__uart7_dte_rx: MX7D_PAD_SD1_DATA1__UART7_DTE_RX { 2216 pinmux = <0x303301a0 2 0x30330724 5 0x30330410>; 2217 }; 2218 /omit-if-no-ref/ mx7d_pad_sd1_data1__ecspi4_ss3: MX7D_PAD_SD1_DATA1__ECSPI4_SS3 { 2219 pinmux = <0x303301a0 3 0x0 0 0x30330410>; 2220 }; 2221 /omit-if-no-ref/ mx7d_pad_sd1_data1__flextimer2_ch2: MX7D_PAD_SD1_DATA1__FLEXTIMER2_CH2 { 2222 pinmux = <0x303301a0 4 0x303305b4 1 0x30330410>; 2223 }; 2224 /omit-if-no-ref/ mx7d_pad_sd1_data1__gpio5_io6: MX7D_PAD_SD1_DATA1__GPIO5_IO6 { 2225 pinmux = <0x303301a0 5 0x0 0 0x30330410>; 2226 }; 2227 /omit-if-no-ref/ mx7d_pad_sd1_data1__ccm_ext_clk2: MX7D_PAD_SD1_DATA1__CCM_EXT_CLK2 { 2228 pinmux = <0x303301a0 6 0x303304e8 1 0x30330410>; 2229 }; 2230 /omit-if-no-ref/ mx7d_pad_sd1_data2__sd1_data2: MX7D_PAD_SD1_DATA2__SD1_DATA2 { 2231 pinmux = <0x303301a4 0 0x0 0 0x30330414>; 2232 }; 2233 /omit-if-no-ref/ mx7d_pad_sd1_data2__sai3_tx_sync: MX7D_PAD_SD1_DATA2__SAI3_TX_SYNC { 2234 pinmux = <0x303301a4 1 0x303306d4 1 0x30330414>; 2235 }; 2236 /omit-if-no-ref/ mx7d_pad_sd1_data2__uart7_dce_cts: MX7D_PAD_SD1_DATA2__UART7_DCE_CTS { 2237 pinmux = <0x303301a4 2 0x0 0 0x30330414>; 2238 }; 2239 /omit-if-no-ref/ mx7d_pad_sd1_data2__uart7_dte_rts: MX7D_PAD_SD1_DATA2__UART7_DTE_RTS { 2240 pinmux = <0x303301a4 2 0x30330720 4 0x30330414>; 2241 }; 2242 /omit-if-no-ref/ mx7d_pad_sd1_data2__ecspi4_rdy: MX7D_PAD_SD1_DATA2__ECSPI4_RDY { 2243 pinmux = <0x303301a4 3 0x0 0 0x30330414>; 2244 }; 2245 /omit-if-no-ref/ mx7d_pad_sd1_data2__flextimer2_ch3: MX7D_PAD_SD1_DATA2__FLEXTIMER2_CH3 { 2246 pinmux = <0x303301a4 4 0x303305b8 1 0x30330414>; 2247 }; 2248 /omit-if-no-ref/ mx7d_pad_sd1_data2__gpio5_io7: MX7D_PAD_SD1_DATA2__GPIO5_IO7 { 2249 pinmux = <0x303301a4 5 0x0 0 0x30330414>; 2250 }; 2251 /omit-if-no-ref/ mx7d_pad_sd1_data2__ccm_ext_clk3: MX7D_PAD_SD1_DATA2__CCM_EXT_CLK3 { 2252 pinmux = <0x303301a4 6 0x303304ec 1 0x30330414>; 2253 }; 2254 /omit-if-no-ref/ mx7d_pad_sd1_data3__sd1_data3: MX7D_PAD_SD1_DATA3__SD1_DATA3 { 2255 pinmux = <0x303301a8 0 0x0 0 0x30330418>; 2256 }; 2257 /omit-if-no-ref/ mx7d_pad_sd1_data3__sai3_tx_data0: MX7D_PAD_SD1_DATA3__SAI3_TX_DATA0 { 2258 pinmux = <0x303301a8 1 0x0 0 0x30330418>; 2259 }; 2260 /omit-if-no-ref/ mx7d_pad_sd1_data3__uart7_dce_rts: MX7D_PAD_SD1_DATA3__UART7_DCE_RTS { 2261 pinmux = <0x303301a8 2 0x30330720 5 0x30330418>; 2262 }; 2263 /omit-if-no-ref/ mx7d_pad_sd1_data3__uart7_dte_cts: MX7D_PAD_SD1_DATA3__UART7_DTE_CTS { 2264 pinmux = <0x303301a8 2 0x0 0 0x30330418>; 2265 }; 2266 /omit-if-no-ref/ mx7d_pad_sd1_data3__ecspi3_ss1: MX7D_PAD_SD1_DATA3__ECSPI3_SS1 { 2267 pinmux = <0x303301a8 3 0x0 0 0x30330418>; 2268 }; 2269 /omit-if-no-ref/ mx7d_pad_sd1_data3__flextimer1_pha: MX7D_PAD_SD1_DATA3__FLEXTIMER1_PHA { 2270 pinmux = <0x303301a8 4 0x303305a4 1 0x30330418>; 2271 }; 2272 /omit-if-no-ref/ mx7d_pad_sd1_data3__gpio5_io8: MX7D_PAD_SD1_DATA3__GPIO5_IO8 { 2273 pinmux = <0x303301a8 5 0x0 0 0x30330418>; 2274 }; 2275 /omit-if-no-ref/ mx7d_pad_sd1_data3__ccm_ext_clk4: MX7D_PAD_SD1_DATA3__CCM_EXT_CLK4 { 2276 pinmux = <0x303301a8 6 0x303304f0 1 0x30330418>; 2277 }; 2278 /omit-if-no-ref/ mx7d_pad_sd2_cd_b__sd2_cd_b: MX7D_PAD_SD2_CD_B__SD2_CD_B { 2279 pinmux = <0x303301ac 0 0x0 0 0x3033041c>; 2280 }; 2281 /omit-if-no-ref/ mx7d_pad_sd2_cd_b__enet1_mdio: MX7D_PAD_SD2_CD_B__ENET1_MDIO { 2282 pinmux = <0x303301ac 1 0x30330568 2 0x3033041c>; 2283 }; 2284 /omit-if-no-ref/ mx7d_pad_sd2_cd_b__enet2_mdio: MX7D_PAD_SD2_CD_B__ENET2_MDIO { 2285 pinmux = <0x303301ac 2 0x30330574 2 0x3033041c>; 2286 }; 2287 /omit-if-no-ref/ mx7d_pad_sd2_cd_b__ecspi3_ss2: MX7D_PAD_SD2_CD_B__ECSPI3_SS2 { 2288 pinmux = <0x303301ac 3 0x0 0 0x3033041c>; 2289 }; 2290 /omit-if-no-ref/ mx7d_pad_sd2_cd_b__flextimer1_phb: MX7D_PAD_SD2_CD_B__FLEXTIMER1_PHB { 2291 pinmux = <0x303301ac 4 0x303305a8 1 0x3033041c>; 2292 }; 2293 /omit-if-no-ref/ mx7d_pad_sd2_cd_b__gpio5_io9: MX7D_PAD_SD2_CD_B__GPIO5_IO9 { 2294 pinmux = <0x303301ac 5 0x0 0 0x3033041c>; 2295 }; 2296 /omit-if-no-ref/ mx7d_pad_sd2_cd_b__sdma_ext_event0: MX7D_PAD_SD2_CD_B__SDMA_EXT_EVENT0 { 2297 pinmux = <0x303301ac 6 0x303306d8 2 0x3033041c>; 2298 }; 2299 /omit-if-no-ref/ mx7d_pad_sd2_wp__sd2_wp: MX7D_PAD_SD2_WP__SD2_WP { 2300 pinmux = <0x303301b0 0 0x0 0 0x30330420>; 2301 }; 2302 /omit-if-no-ref/ mx7d_pad_sd2_wp__enet1_mdc: MX7D_PAD_SD2_WP__ENET1_MDC { 2303 pinmux = <0x303301b0 1 0x0 0 0x30330420>; 2304 }; 2305 /omit-if-no-ref/ mx7d_pad_sd2_wp__enet2_mdc: MX7D_PAD_SD2_WP__ENET2_MDC { 2306 pinmux = <0x303301b0 2 0x0 0 0x30330420>; 2307 }; 2308 /omit-if-no-ref/ mx7d_pad_sd2_wp__ecspi3_ss3: MX7D_PAD_SD2_WP__ECSPI3_SS3 { 2309 pinmux = <0x303301b0 3 0x0 0 0x30330420>; 2310 }; 2311 /omit-if-no-ref/ mx7d_pad_sd2_wp__usb_otg1_id: MX7D_PAD_SD2_WP__USB_OTG1_ID { 2312 pinmux = <0x303301b0 4 0x30330734 2 0x30330420>; 2313 }; 2314 /omit-if-no-ref/ mx7d_pad_sd2_wp__gpio5_io10: MX7D_PAD_SD2_WP__GPIO5_IO10 { 2315 pinmux = <0x303301b0 5 0x0 0 0x30330420>; 2316 }; 2317 /omit-if-no-ref/ mx7d_pad_sd2_wp__sdma_ext_event1: MX7D_PAD_SD2_WP__SDMA_EXT_EVENT1 { 2318 pinmux = <0x303301b0 6 0x303306dc 2 0x30330420>; 2319 }; 2320 /omit-if-no-ref/ mx7d_pad_sd2_reset_b__sd2_reset_b: MX7D_PAD_SD2_RESET_B__SD2_RESET_B { 2321 pinmux = <0x303301b4 0 0x0 0 0x30330424>; 2322 }; 2323 /omit-if-no-ref/ mx7d_pad_sd2_reset_b__sai2_mclk: MX7D_PAD_SD2_RESET_B__SAI2_MCLK { 2324 pinmux = <0x303301b4 1 0x0 0 0x30330424>; 2325 }; 2326 /omit-if-no-ref/ mx7d_pad_sd2_reset_b__sd2_reset: MX7D_PAD_SD2_RESET_B__SD2_RESET { 2327 pinmux = <0x303301b4 2 0x0 0 0x30330424>; 2328 }; 2329 /omit-if-no-ref/ mx7d_pad_sd2_reset_b__ecspi3_rdy: MX7D_PAD_SD2_RESET_B__ECSPI3_RDY { 2330 pinmux = <0x303301b4 3 0x0 0 0x30330424>; 2331 }; 2332 /omit-if-no-ref/ mx7d_pad_sd2_reset_b__usb_otg2_id: MX7D_PAD_SD2_RESET_B__USB_OTG2_ID { 2333 pinmux = <0x303301b4 4 0x30330730 2 0x30330424>; 2334 }; 2335 /omit-if-no-ref/ mx7d_pad_sd2_reset_b__gpio5_io11: MX7D_PAD_SD2_RESET_B__GPIO5_IO11 { 2336 pinmux = <0x303301b4 5 0x0 0 0x30330424>; 2337 }; 2338 /omit-if-no-ref/ mx7d_pad_sd2_clk__sd2_clk: MX7D_PAD_SD2_CLK__SD2_CLK { 2339 pinmux = <0x303301b8 0 0x0 0 0x30330428>; 2340 }; 2341 /omit-if-no-ref/ mx7d_pad_sd2_clk__sai2_rx_sync: MX7D_PAD_SD2_CLK__SAI2_RX_SYNC { 2342 pinmux = <0x303301b8 1 0x303306b8 0 0x30330428>; 2343 }; 2344 /omit-if-no-ref/ mx7d_pad_sd2_clk__mqs_right: MX7D_PAD_SD2_CLK__MQS_RIGHT { 2345 pinmux = <0x303301b8 2 0x0 0 0x30330428>; 2346 }; 2347 /omit-if-no-ref/ mx7d_pad_sd2_clk__gpt4_clk: MX7D_PAD_SD2_CLK__GPT4_CLK { 2348 pinmux = <0x303301b8 3 0x0 0 0x30330428>; 2349 }; 2350 /omit-if-no-ref/ mx7d_pad_sd2_clk__gpio5_io12: MX7D_PAD_SD2_CLK__GPIO5_IO12 { 2351 pinmux = <0x303301b8 5 0x0 0 0x30330428>; 2352 }; 2353 /omit-if-no-ref/ mx7d_pad_sd2_cmd__sd2_cmd: MX7D_PAD_SD2_CMD__SD2_CMD { 2354 pinmux = <0x303301bc 0 0x0 0 0x3033042c>; 2355 }; 2356 /omit-if-no-ref/ mx7d_pad_sd2_cmd__sai2_rx_bclk: MX7D_PAD_SD2_CMD__SAI2_RX_BCLK { 2357 pinmux = <0x303301bc 1 0x303306b0 0 0x3033042c>; 2358 }; 2359 /omit-if-no-ref/ mx7d_pad_sd2_cmd__mqs_left: MX7D_PAD_SD2_CMD__MQS_LEFT { 2360 pinmux = <0x303301bc 2 0x0 0 0x3033042c>; 2361 }; 2362 /omit-if-no-ref/ mx7d_pad_sd2_cmd__gpt4_capture1: MX7D_PAD_SD2_CMD__GPT4_CAPTURE1 { 2363 pinmux = <0x303301bc 3 0x0 0 0x3033042c>; 2364 }; 2365 /omit-if-no-ref/ mx7d_pad_sd2_cmd__sim2_port1_trxd: MX7D_PAD_SD2_CMD__SIM2_PORT1_TRXD { 2366 pinmux = <0x303301bc 4 0x303306ec 1 0x3033042c>; 2367 }; 2368 /omit-if-no-ref/ mx7d_pad_sd2_cmd__gpio5_io13: MX7D_PAD_SD2_CMD__GPIO5_IO13 { 2369 pinmux = <0x303301bc 5 0x0 0 0x3033042c>; 2370 }; 2371 /omit-if-no-ref/ mx7d_pad_sd2_data0__sd2_data0: MX7D_PAD_SD2_DATA0__SD2_DATA0 { 2372 pinmux = <0x303301c0 0 0x0 0 0x30330430>; 2373 }; 2374 /omit-if-no-ref/ mx7d_pad_sd2_data0__sai2_rx_data0: MX7D_PAD_SD2_DATA0__SAI2_RX_DATA0 { 2375 pinmux = <0x303301c0 1 0x303306b4 0 0x30330430>; 2376 }; 2377 /omit-if-no-ref/ mx7d_pad_sd2_data0__uart4_dce_rx: MX7D_PAD_SD2_DATA0__UART4_DCE_RX { 2378 pinmux = <0x303301c0 2 0x3033070c 2 0x30330430>; 2379 }; 2380 /omit-if-no-ref/ mx7d_pad_sd2_data0__uart4_dte_tx: MX7D_PAD_SD2_DATA0__UART4_DTE_TX { 2381 pinmux = <0x303301c0 2 0x0 0 0x30330430>; 2382 }; 2383 /omit-if-no-ref/ mx7d_pad_sd2_data0__gpt4_capture2: MX7D_PAD_SD2_DATA0__GPT4_CAPTURE2 { 2384 pinmux = <0x303301c0 3 0x0 0 0x30330430>; 2385 }; 2386 /omit-if-no-ref/ mx7d_pad_sd2_data0__sim2_port1_clk: MX7D_PAD_SD2_DATA0__SIM2_PORT1_CLK { 2387 pinmux = <0x303301c0 4 0x0 0 0x30330430>; 2388 }; 2389 /omit-if-no-ref/ mx7d_pad_sd2_data0__gpio5_io14: MX7D_PAD_SD2_DATA0__GPIO5_IO14 { 2390 pinmux = <0x303301c0 5 0x0 0 0x30330430>; 2391 }; 2392 /omit-if-no-ref/ mx7d_pad_sd2_data1__sd2_data1: MX7D_PAD_SD2_DATA1__SD2_DATA1 { 2393 pinmux = <0x303301c4 0 0x0 0 0x30330434>; 2394 }; 2395 /omit-if-no-ref/ mx7d_pad_sd2_data1__sai2_tx_bclk: MX7D_PAD_SD2_DATA1__SAI2_TX_BCLK { 2396 pinmux = <0x303301c4 1 0x303306bc 0 0x30330434>; 2397 }; 2398 /omit-if-no-ref/ mx7d_pad_sd2_data1__uart4_dce_tx: MX7D_PAD_SD2_DATA1__UART4_DCE_TX { 2399 pinmux = <0x303301c4 2 0x0 0 0x30330434>; 2400 }; 2401 /omit-if-no-ref/ mx7d_pad_sd2_data1__uart4_dte_rx: MX7D_PAD_SD2_DATA1__UART4_DTE_RX { 2402 pinmux = <0x303301c4 2 0x3033070c 3 0x30330434>; 2403 }; 2404 /omit-if-no-ref/ mx7d_pad_sd2_data1__gpt4_compare1: MX7D_PAD_SD2_DATA1__GPT4_COMPARE1 { 2405 pinmux = <0x303301c4 3 0x0 0 0x30330434>; 2406 }; 2407 /omit-if-no-ref/ mx7d_pad_sd2_data1__sim2_port1_rst_b: MX7D_PAD_SD2_DATA1__SIM2_PORT1_RST_B { 2408 pinmux = <0x303301c4 4 0x0 0 0x30330434>; 2409 }; 2410 /omit-if-no-ref/ mx7d_pad_sd2_data1__gpio5_io15: MX7D_PAD_SD2_DATA1__GPIO5_IO15 { 2411 pinmux = <0x303301c4 5 0x0 0 0x30330434>; 2412 }; 2413 /omit-if-no-ref/ mx7d_pad_sd2_data2__sd2_data2: MX7D_PAD_SD2_DATA2__SD2_DATA2 { 2414 pinmux = <0x303301c8 0 0x0 0 0x30330438>; 2415 }; 2416 /omit-if-no-ref/ mx7d_pad_sd2_data2__sai2_tx_sync: MX7D_PAD_SD2_DATA2__SAI2_TX_SYNC { 2417 pinmux = <0x303301c8 1 0x303306c0 0 0x30330438>; 2418 }; 2419 /omit-if-no-ref/ mx7d_pad_sd2_data2__uart4_dce_cts: MX7D_PAD_SD2_DATA2__UART4_DCE_CTS { 2420 pinmux = <0x303301c8 2 0x0 0 0x30330438>; 2421 }; 2422 /omit-if-no-ref/ mx7d_pad_sd2_data2__uart4_dte_rts: MX7D_PAD_SD2_DATA2__UART4_DTE_RTS { 2423 pinmux = <0x303301c8 2 0x30330708 2 0x30330438>; 2424 }; 2425 /omit-if-no-ref/ mx7d_pad_sd2_data2__gpt4_compare2: MX7D_PAD_SD2_DATA2__GPT4_COMPARE2 { 2426 pinmux = <0x303301c8 3 0x0 0 0x30330438>; 2427 }; 2428 /omit-if-no-ref/ mx7d_pad_sd2_data2__sim2_port1_sven: MX7D_PAD_SD2_DATA2__SIM2_PORT1_SVEN { 2429 pinmux = <0x303301c8 4 0x0 0 0x30330438>; 2430 }; 2431 /omit-if-no-ref/ mx7d_pad_sd2_data2__gpio5_io16: MX7D_PAD_SD2_DATA2__GPIO5_IO16 { 2432 pinmux = <0x303301c8 5 0x0 0 0x30330438>; 2433 }; 2434 /omit-if-no-ref/ mx7d_pad_sd2_data3__sd2_data3: MX7D_PAD_SD2_DATA3__SD2_DATA3 { 2435 pinmux = <0x303301cc 0 0x0 0 0x3033043c>; 2436 }; 2437 /omit-if-no-ref/ mx7d_pad_sd2_data3__sai2_tx_data0: MX7D_PAD_SD2_DATA3__SAI2_TX_DATA0 { 2438 pinmux = <0x303301cc 1 0x0 0 0x3033043c>; 2439 }; 2440 /omit-if-no-ref/ mx7d_pad_sd2_data3__uart4_dce_rts: MX7D_PAD_SD2_DATA3__UART4_DCE_RTS { 2441 pinmux = <0x303301cc 2 0x30330708 3 0x3033043c>; 2442 }; 2443 /omit-if-no-ref/ mx7d_pad_sd2_data3__uart4_dte_cts: MX7D_PAD_SD2_DATA3__UART4_DTE_CTS { 2444 pinmux = <0x303301cc 2 0x0 0 0x3033043c>; 2445 }; 2446 /omit-if-no-ref/ mx7d_pad_sd2_data3__gpt4_compare3: MX7D_PAD_SD2_DATA3__GPT4_COMPARE3 { 2447 pinmux = <0x303301cc 3 0x0 0 0x3033043c>; 2448 }; 2449 /omit-if-no-ref/ mx7d_pad_sd2_data3__sim2_port1_pd: MX7D_PAD_SD2_DATA3__SIM2_PORT1_PD { 2450 pinmux = <0x303301cc 4 0x303306e8 1 0x3033043c>; 2451 }; 2452 /omit-if-no-ref/ mx7d_pad_sd2_data3__gpio5_io17: MX7D_PAD_SD2_DATA3__GPIO5_IO17 { 2453 pinmux = <0x303301cc 5 0x0 0 0x3033043c>; 2454 }; 2455 /omit-if-no-ref/ mx7d_pad_sd3_clk__sd3_clk: MX7D_PAD_SD3_CLK__SD3_CLK { 2456 pinmux = <0x303301d0 0 0x0 0 0x30330440>; 2457 }; 2458 /omit-if-no-ref/ mx7d_pad_sd3_clk__nand_cle: MX7D_PAD_SD3_CLK__NAND_CLE { 2459 pinmux = <0x303301d0 1 0x0 0 0x30330440>; 2460 }; 2461 /omit-if-no-ref/ mx7d_pad_sd3_clk__ecspi4_miso: MX7D_PAD_SD3_CLK__ECSPI4_MISO { 2462 pinmux = <0x303301d0 2 0x30330558 2 0x30330440>; 2463 }; 2464 /omit-if-no-ref/ mx7d_pad_sd3_clk__sai3_rx_sync: MX7D_PAD_SD3_CLK__SAI3_RX_SYNC { 2465 pinmux = <0x303301d0 3 0x303306cc 2 0x30330440>; 2466 }; 2467 /omit-if-no-ref/ mx7d_pad_sd3_clk__gpt3_clk: MX7D_PAD_SD3_CLK__GPT3_CLK { 2468 pinmux = <0x303301d0 4 0x0 0 0x30330440>; 2469 }; 2470 /omit-if-no-ref/ mx7d_pad_sd3_clk__gpio6_io0: MX7D_PAD_SD3_CLK__GPIO6_IO0 { 2471 pinmux = <0x303301d0 5 0x0 0 0x30330440>; 2472 }; 2473 /omit-if-no-ref/ mx7d_pad_sd3_cmd__sd3_cmd: MX7D_PAD_SD3_CMD__SD3_CMD { 2474 pinmux = <0x303301d4 0 0x0 0 0x30330444>; 2475 }; 2476 /omit-if-no-ref/ mx7d_pad_sd3_cmd__nand_ale: MX7D_PAD_SD3_CMD__NAND_ALE { 2477 pinmux = <0x303301d4 1 0x0 0 0x30330444>; 2478 }; 2479 /omit-if-no-ref/ mx7d_pad_sd3_cmd__ecspi4_mosi: MX7D_PAD_SD3_CMD__ECSPI4_MOSI { 2480 pinmux = <0x303301d4 2 0x3033055c 2 0x30330444>; 2481 }; 2482 /omit-if-no-ref/ mx7d_pad_sd3_cmd__sai3_rx_bclk: MX7D_PAD_SD3_CMD__SAI3_RX_BCLK { 2483 pinmux = <0x303301d4 3 0x303306c4 2 0x30330444>; 2484 }; 2485 /omit-if-no-ref/ mx7d_pad_sd3_cmd__gpt3_capture1: MX7D_PAD_SD3_CMD__GPT3_CAPTURE1 { 2486 pinmux = <0x303301d4 4 0x0 0 0x30330444>; 2487 }; 2488 /omit-if-no-ref/ mx7d_pad_sd3_cmd__gpio6_io1: MX7D_PAD_SD3_CMD__GPIO6_IO1 { 2489 pinmux = <0x303301d4 5 0x0 0 0x30330444>; 2490 }; 2491 /omit-if-no-ref/ mx7d_pad_sd3_data0__sd3_data0: MX7D_PAD_SD3_DATA0__SD3_DATA0 { 2492 pinmux = <0x303301d8 0 0x0 0 0x30330448>; 2493 }; 2494 /omit-if-no-ref/ mx7d_pad_sd3_data0__nand_data00: MX7D_PAD_SD3_DATA0__NAND_DATA00 { 2495 pinmux = <0x303301d8 1 0x0 0 0x30330448>; 2496 }; 2497 /omit-if-no-ref/ mx7d_pad_sd3_data0__ecspi4_ss0: MX7D_PAD_SD3_DATA0__ECSPI4_SS0 { 2498 pinmux = <0x303301d8 2 0x30330560 2 0x30330448>; 2499 }; 2500 /omit-if-no-ref/ mx7d_pad_sd3_data0__sai3_rx_data0: MX7D_PAD_SD3_DATA0__SAI3_RX_DATA0 { 2501 pinmux = <0x303301d8 3 0x303306c8 2 0x30330448>; 2502 }; 2503 /omit-if-no-ref/ mx7d_pad_sd3_data0__gpt3_capture2: MX7D_PAD_SD3_DATA0__GPT3_CAPTURE2 { 2504 pinmux = <0x303301d8 4 0x0 0 0x30330448>; 2505 }; 2506 /omit-if-no-ref/ mx7d_pad_sd3_data0__gpio6_io2: MX7D_PAD_SD3_DATA0__GPIO6_IO2 { 2507 pinmux = <0x303301d8 5 0x0 0 0x30330448>; 2508 }; 2509 /omit-if-no-ref/ mx7d_pad_sd3_data1__sd3_data1: MX7D_PAD_SD3_DATA1__SD3_DATA1 { 2510 pinmux = <0x303301dc 0 0x0 0 0x3033044c>; 2511 }; 2512 /omit-if-no-ref/ mx7d_pad_sd3_data1__nand_data01: MX7D_PAD_SD3_DATA1__NAND_DATA01 { 2513 pinmux = <0x303301dc 1 0x0 0 0x3033044c>; 2514 }; 2515 /omit-if-no-ref/ mx7d_pad_sd3_data1__ecspi4_sclk: MX7D_PAD_SD3_DATA1__ECSPI4_SCLK { 2516 pinmux = <0x303301dc 2 0x30330554 2 0x3033044c>; 2517 }; 2518 /omit-if-no-ref/ mx7d_pad_sd3_data1__sai3_tx_bclk: MX7D_PAD_SD3_DATA1__SAI3_TX_BCLK { 2519 pinmux = <0x303301dc 3 0x303306d0 2 0x3033044c>; 2520 }; 2521 /omit-if-no-ref/ mx7d_pad_sd3_data1__gpt3_compare1: MX7D_PAD_SD3_DATA1__GPT3_COMPARE1 { 2522 pinmux = <0x303301dc 4 0x0 0 0x3033044c>; 2523 }; 2524 /omit-if-no-ref/ mx7d_pad_sd3_data1__gpio6_io3: MX7D_PAD_SD3_DATA1__GPIO6_IO3 { 2525 pinmux = <0x303301dc 5 0x0 0 0x3033044c>; 2526 }; 2527 /omit-if-no-ref/ mx7d_pad_sd3_data2__sd3_data2: MX7D_PAD_SD3_DATA2__SD3_DATA2 { 2528 pinmux = <0x303301e0 0 0x0 0 0x30330450>; 2529 }; 2530 /omit-if-no-ref/ mx7d_pad_sd3_data2__nand_data02: MX7D_PAD_SD3_DATA2__NAND_DATA02 { 2531 pinmux = <0x303301e0 1 0x0 0 0x30330450>; 2532 }; 2533 /omit-if-no-ref/ mx7d_pad_sd3_data2__i2c3_sda: MX7D_PAD_SD3_DATA2__I2C3_SDA { 2534 pinmux = <0x303301e0 2 0x303305e8 3 0x30330450>; 2535 }; 2536 /omit-if-no-ref/ mx7d_pad_sd3_data2__sai3_tx_sync: MX7D_PAD_SD3_DATA2__SAI3_TX_SYNC { 2537 pinmux = <0x303301e0 3 0x303306d4 2 0x30330450>; 2538 }; 2539 /omit-if-no-ref/ mx7d_pad_sd3_data2__gpt3_compare2: MX7D_PAD_SD3_DATA2__GPT3_COMPARE2 { 2540 pinmux = <0x303301e0 4 0x0 0 0x30330450>; 2541 }; 2542 /omit-if-no-ref/ mx7d_pad_sd3_data2__gpio6_io4: MX7D_PAD_SD3_DATA2__GPIO6_IO4 { 2543 pinmux = <0x303301e0 5 0x0 0 0x30330450>; 2544 }; 2545 /omit-if-no-ref/ mx7d_pad_sd3_data3__sd3_data3: MX7D_PAD_SD3_DATA3__SD3_DATA3 { 2546 pinmux = <0x303301e4 0 0x0 0 0x30330454>; 2547 }; 2548 /omit-if-no-ref/ mx7d_pad_sd3_data3__nand_data03: MX7D_PAD_SD3_DATA3__NAND_DATA03 { 2549 pinmux = <0x303301e4 1 0x0 0 0x30330454>; 2550 }; 2551 /omit-if-no-ref/ mx7d_pad_sd3_data3__i2c3_scl: MX7D_PAD_SD3_DATA3__I2C3_SCL { 2552 pinmux = <0x303301e4 2 0x303305e4 3 0x30330454>; 2553 }; 2554 /omit-if-no-ref/ mx7d_pad_sd3_data3__sai3_tx_data0: MX7D_PAD_SD3_DATA3__SAI3_TX_DATA0 { 2555 pinmux = <0x303301e4 3 0x0 0 0x30330454>; 2556 }; 2557 /omit-if-no-ref/ mx7d_pad_sd3_data3__gpt3_compare3: MX7D_PAD_SD3_DATA3__GPT3_COMPARE3 { 2558 pinmux = <0x303301e4 4 0x0 0 0x30330454>; 2559 }; 2560 /omit-if-no-ref/ mx7d_pad_sd3_data3__gpio6_io5: MX7D_PAD_SD3_DATA3__GPIO6_IO5 { 2561 pinmux = <0x303301e4 5 0x0 0 0x30330454>; 2562 }; 2563 /omit-if-no-ref/ mx7d_pad_sd3_data4__sd3_data4: MX7D_PAD_SD3_DATA4__SD3_DATA4 { 2564 pinmux = <0x303301e8 0 0x0 0 0x30330458>; 2565 }; 2566 /omit-if-no-ref/ mx7d_pad_sd3_data4__nand_data04: MX7D_PAD_SD3_DATA4__NAND_DATA04 { 2567 pinmux = <0x303301e8 1 0x0 0 0x30330458>; 2568 }; 2569 /omit-if-no-ref/ mx7d_pad_sd3_data4__uart3_dce_rx: MX7D_PAD_SD3_DATA4__UART3_DCE_RX { 2570 pinmux = <0x303301e8 3 0x30330704 4 0x30330458>; 2571 }; 2572 /omit-if-no-ref/ mx7d_pad_sd3_data4__uart3_dte_tx: MX7D_PAD_SD3_DATA4__UART3_DTE_TX { 2573 pinmux = <0x303301e8 3 0x0 0 0x30330458>; 2574 }; 2575 /omit-if-no-ref/ mx7d_pad_sd3_data4__flexcan2_rx: MX7D_PAD_SD3_DATA4__FLEXCAN2_RX { 2576 pinmux = <0x303301e8 4 0x303304e0 2 0x30330458>; 2577 }; 2578 /omit-if-no-ref/ mx7d_pad_sd3_data4__gpio6_io6: MX7D_PAD_SD3_DATA4__GPIO6_IO6 { 2579 pinmux = <0x303301e8 5 0x0 0 0x30330458>; 2580 }; 2581 /omit-if-no-ref/ mx7d_pad_sd3_data5__sd3_data5: MX7D_PAD_SD3_DATA5__SD3_DATA5 { 2582 pinmux = <0x303301ec 0 0x0 0 0x3033045c>; 2583 }; 2584 /omit-if-no-ref/ mx7d_pad_sd3_data5__nand_data05: MX7D_PAD_SD3_DATA5__NAND_DATA05 { 2585 pinmux = <0x303301ec 1 0x0 0 0x3033045c>; 2586 }; 2587 /omit-if-no-ref/ mx7d_pad_sd3_data5__uart3_dce_tx: MX7D_PAD_SD3_DATA5__UART3_DCE_TX { 2588 pinmux = <0x303301ec 3 0x0 0 0x3033045c>; 2589 }; 2590 /omit-if-no-ref/ mx7d_pad_sd3_data5__uart3_dte_rx: MX7D_PAD_SD3_DATA5__UART3_DTE_RX { 2591 pinmux = <0x303301ec 3 0x30330704 5 0x3033045c>; 2592 }; 2593 /omit-if-no-ref/ mx7d_pad_sd3_data5__flexcan1_tx: MX7D_PAD_SD3_DATA5__FLEXCAN1_TX { 2594 pinmux = <0x303301ec 4 0x0 0 0x3033045c>; 2595 }; 2596 /omit-if-no-ref/ mx7d_pad_sd3_data5__gpio6_io7: MX7D_PAD_SD3_DATA5__GPIO6_IO7 { 2597 pinmux = <0x303301ec 5 0x0 0 0x3033045c>; 2598 }; 2599 /omit-if-no-ref/ mx7d_pad_sd3_data6__sd3_data6: MX7D_PAD_SD3_DATA6__SD3_DATA6 { 2600 pinmux = <0x303301f0 0 0x0 0 0x30330460>; 2601 }; 2602 /omit-if-no-ref/ mx7d_pad_sd3_data6__nand_data06: MX7D_PAD_SD3_DATA6__NAND_DATA06 { 2603 pinmux = <0x303301f0 1 0x0 0 0x30330460>; 2604 }; 2605 /omit-if-no-ref/ mx7d_pad_sd3_data6__sd3_wp: MX7D_PAD_SD3_DATA6__SD3_WP { 2606 pinmux = <0x303301f0 2 0x3033073c 2 0x30330460>; 2607 }; 2608 /omit-if-no-ref/ mx7d_pad_sd3_data6__uart3_dce_rts: MX7D_PAD_SD3_DATA6__UART3_DCE_RTS { 2609 pinmux = <0x303301f0 3 0x30330700 4 0x30330460>; 2610 }; 2611 /omit-if-no-ref/ mx7d_pad_sd3_data6__uart3_dte_cts: MX7D_PAD_SD3_DATA6__UART3_DTE_CTS { 2612 pinmux = <0x303301f0 3 0x0 0 0x30330460>; 2613 }; 2614 /omit-if-no-ref/ mx7d_pad_sd3_data6__flexcan2_tx: MX7D_PAD_SD3_DATA6__FLEXCAN2_TX { 2615 pinmux = <0x303301f0 4 0x0 0 0x30330460>; 2616 }; 2617 /omit-if-no-ref/ mx7d_pad_sd3_data6__gpio6_io8: MX7D_PAD_SD3_DATA6__GPIO6_IO8 { 2618 pinmux = <0x303301f0 5 0x0 0 0x30330460>; 2619 }; 2620 /omit-if-no-ref/ mx7d_pad_sd3_data7__sd3_data7: MX7D_PAD_SD3_DATA7__SD3_DATA7 { 2621 pinmux = <0x303301f4 0 0x0 0 0x30330464>; 2622 }; 2623 /omit-if-no-ref/ mx7d_pad_sd3_data7__nand_data07: MX7D_PAD_SD3_DATA7__NAND_DATA07 { 2624 pinmux = <0x303301f4 1 0x0 0 0x30330464>; 2625 }; 2626 /omit-if-no-ref/ mx7d_pad_sd3_data7__sd3_cd_b: MX7D_PAD_SD3_DATA7__SD3_CD_B { 2627 pinmux = <0x303301f4 2 0x30330738 2 0x30330464>; 2628 }; 2629 /omit-if-no-ref/ mx7d_pad_sd3_data7__uart3_dce_cts: MX7D_PAD_SD3_DATA7__UART3_DCE_CTS { 2630 pinmux = <0x303301f4 3 0x0 0 0x30330464>; 2631 }; 2632 /omit-if-no-ref/ mx7d_pad_sd3_data7__uart3_dte_rts: MX7D_PAD_SD3_DATA7__UART3_DTE_RTS { 2633 pinmux = <0x303301f4 3 0x30330700 5 0x30330464>; 2634 }; 2635 /omit-if-no-ref/ mx7d_pad_sd3_data7__flexcan1_rx: MX7D_PAD_SD3_DATA7__FLEXCAN1_RX { 2636 pinmux = <0x303301f4 4 0x303304dc 2 0x30330464>; 2637 }; 2638 /omit-if-no-ref/ mx7d_pad_sd3_data7__gpio6_io9: MX7D_PAD_SD3_DATA7__GPIO6_IO9 { 2639 pinmux = <0x303301f4 5 0x0 0 0x30330464>; 2640 }; 2641 /omit-if-no-ref/ mx7d_pad_sd3_strobe__sd3_strobe: MX7D_PAD_SD3_STROBE__SD3_STROBE { 2642 pinmux = <0x303301f8 0 0x0 0 0x30330468>; 2643 }; 2644 /omit-if-no-ref/ mx7d_pad_sd3_strobe__nand_re_b: MX7D_PAD_SD3_STROBE__NAND_RE_B { 2645 pinmux = <0x303301f8 1 0x0 0 0x30330468>; 2646 }; 2647 /omit-if-no-ref/ mx7d_pad_sd3_strobe__gpio6_io10: MX7D_PAD_SD3_STROBE__GPIO6_IO10 { 2648 pinmux = <0x303301f8 5 0x0 0 0x30330468>; 2649 }; 2650 /omit-if-no-ref/ mx7d_pad_sd3_reset_b__sd3_reset_b: MX7D_PAD_SD3_RESET_B__SD3_RESET_B { 2651 pinmux = <0x303301fc 0 0x0 0 0x3033046c>; 2652 }; 2653 /omit-if-no-ref/ mx7d_pad_sd3_reset_b__nand_we_b: MX7D_PAD_SD3_RESET_B__NAND_WE_B { 2654 pinmux = <0x303301fc 1 0x0 0 0x3033046c>; 2655 }; 2656 /omit-if-no-ref/ mx7d_pad_sd3_reset_b__sd3_reset: MX7D_PAD_SD3_RESET_B__SD3_RESET { 2657 pinmux = <0x303301fc 2 0x0 0 0x3033046c>; 2658 }; 2659 /omit-if-no-ref/ mx7d_pad_sd3_reset_b__sai3_mclk: MX7D_PAD_SD3_RESET_B__SAI3_MCLK { 2660 pinmux = <0x303301fc 3 0x0 0 0x3033046c>; 2661 }; 2662 /omit-if-no-ref/ mx7d_pad_sd3_reset_b__gpio6_io11: MX7D_PAD_SD3_RESET_B__GPIO6_IO11 { 2663 pinmux = <0x303301fc 5 0x0 0 0x3033046c>; 2664 }; 2665 /omit-if-no-ref/ mx7d_pad_sai1_rx_data__sai1_rx_data0: MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 { 2666 pinmux = <0x30330200 0 0x303306a0 0 0x30330470>; 2667 }; 2668 /omit-if-no-ref/ mx7d_pad_sai1_rx_data__nand_ce1_b: MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B { 2669 pinmux = <0x30330200 1 0x0 0 0x30330470>; 2670 }; 2671 /omit-if-no-ref/ mx7d_pad_sai1_rx_data__uart5_dce_rx: MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX { 2672 pinmux = <0x30330200 2 0x30330714 2 0x30330470>; 2673 }; 2674 /omit-if-no-ref/ mx7d_pad_sai1_rx_data__uart5_dte_tx: MX7D_PAD_SAI1_RX_DATA__UART5_DTE_TX { 2675 pinmux = <0x30330200 2 0x0 0 0x30330470>; 2676 }; 2677 /omit-if-no-ref/ mx7d_pad_sai1_rx_data__flexcan1_rx: MX7D_PAD_SAI1_RX_DATA__FLEXCAN1_RX { 2678 pinmux = <0x30330200 3 0x303304dc 3 0x30330470>; 2679 }; 2680 /omit-if-no-ref/ mx7d_pad_sai1_rx_data__sim1_port1_trxd: MX7D_PAD_SAI1_RX_DATA__SIM1_PORT1_TRXD { 2681 pinmux = <0x30330200 4 0x303306e4 1 0x30330470>; 2682 }; 2683 /omit-if-no-ref/ mx7d_pad_sai1_rx_data__gpio6_io12: MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 { 2684 pinmux = <0x30330200 5 0x0 0 0x30330470>; 2685 }; 2686 /omit-if-no-ref/ mx7d_pad_sai1_rx_data__src_any_pu_reset: MX7D_PAD_SAI1_RX_DATA__SRC_ANY_PU_RESET { 2687 pinmux = <0x30330200 7 0x0 0 0x30330470>; 2688 }; 2689 /omit-if-no-ref/ mx7d_pad_sai1_tx_bclk__sai1_tx_bclk: MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK { 2690 pinmux = <0x30330204 0 0x303306a8 0 0x30330474>; 2691 }; 2692 /omit-if-no-ref/ mx7d_pad_sai1_tx_bclk__nand_ce0_b: MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B { 2693 pinmux = <0x30330204 1 0x0 0 0x30330474>; 2694 }; 2695 /omit-if-no-ref/ mx7d_pad_sai1_tx_bclk__uart5_dce_tx: MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX { 2696 pinmux = <0x30330204 2 0x0 0 0x30330474>; 2697 }; 2698 /omit-if-no-ref/ mx7d_pad_sai1_tx_bclk__uart5_dte_rx: MX7D_PAD_SAI1_TX_BCLK__UART5_DTE_RX { 2699 pinmux = <0x30330204 2 0x30330714 3 0x30330474>; 2700 }; 2701 /omit-if-no-ref/ mx7d_pad_sai1_tx_bclk__flexcan1_tx: MX7D_PAD_SAI1_TX_BCLK__FLEXCAN1_TX { 2702 pinmux = <0x30330204 3 0x0 0 0x30330474>; 2703 }; 2704 /omit-if-no-ref/ mx7d_pad_sai1_tx_bclk__sim1_port1_clk: MX7D_PAD_SAI1_TX_BCLK__SIM1_PORT1_CLK { 2705 pinmux = <0x30330204 4 0x0 0 0x30330474>; 2706 }; 2707 /omit-if-no-ref/ mx7d_pad_sai1_tx_bclk__gpio6_io13: MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13 { 2708 pinmux = <0x30330204 5 0x0 0 0x30330474>; 2709 }; 2710 /omit-if-no-ref/ mx7d_pad_sai1_tx_bclk__src_early_reset: MX7D_PAD_SAI1_TX_BCLK__SRC_EARLY_RESET { 2711 pinmux = <0x30330204 7 0x0 0 0x30330474>; 2712 }; 2713 /omit-if-no-ref/ mx7d_pad_sai1_tx_sync__sai1_tx_sync: MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC { 2714 pinmux = <0x30330208 0 0x303306ac 0 0x30330478>; 2715 }; 2716 /omit-if-no-ref/ mx7d_pad_sai1_tx_sync__nand_dqs: MX7D_PAD_SAI1_TX_SYNC__NAND_DQS { 2717 pinmux = <0x30330208 1 0x0 0 0x30330478>; 2718 }; 2719 /omit-if-no-ref/ mx7d_pad_sai1_tx_sync__uart5_dce_cts: MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS { 2720 pinmux = <0x30330208 2 0x0 0 0x30330478>; 2721 }; 2722 /omit-if-no-ref/ mx7d_pad_sai1_tx_sync__uart5_dte_rts: MX7D_PAD_SAI1_TX_SYNC__UART5_DTE_RTS { 2723 pinmux = <0x30330208 2 0x30330710 2 0x30330478>; 2724 }; 2725 /omit-if-no-ref/ mx7d_pad_sai1_tx_sync__flexcan2_rx: MX7D_PAD_SAI1_TX_SYNC__FLEXCAN2_RX { 2726 pinmux = <0x30330208 3 0x303304e0 3 0x30330478>; 2727 }; 2728 /omit-if-no-ref/ mx7d_pad_sai1_tx_sync__sim1_port1_rst_b: MX7D_PAD_SAI1_TX_SYNC__SIM1_PORT1_RST_B { 2729 pinmux = <0x30330208 4 0x0 0 0x30330478>; 2730 }; 2731 /omit-if-no-ref/ mx7d_pad_sai1_tx_sync__gpio6_io14: MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14 { 2732 pinmux = <0x30330208 5 0x0 0 0x30330478>; 2733 }; 2734 /omit-if-no-ref/ mx7d_pad_sai1_tx_sync__src_int_boot: MX7D_PAD_SAI1_TX_SYNC__SRC_INT_BOOT { 2735 pinmux = <0x30330208 7 0x0 0 0x30330478>; 2736 }; 2737 /omit-if-no-ref/ mx7d_pad_sai1_tx_data__sai1_tx_data0: MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 { 2738 pinmux = <0x3033020c 0 0x0 0 0x3033047c>; 2739 }; 2740 /omit-if-no-ref/ mx7d_pad_sai1_tx_data__nand_ready_b: MX7D_PAD_SAI1_TX_DATA__NAND_READY_B { 2741 pinmux = <0x3033020c 1 0x0 0 0x3033047c>; 2742 }; 2743 /omit-if-no-ref/ mx7d_pad_sai1_tx_data__uart5_dce_rts: MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS { 2744 pinmux = <0x3033020c 2 0x30330710 3 0x3033047c>; 2745 }; 2746 /omit-if-no-ref/ mx7d_pad_sai1_tx_data__uart5_dte_cts: MX7D_PAD_SAI1_TX_DATA__UART5_DTE_CTS { 2747 pinmux = <0x3033020c 2 0x0 0 0x3033047c>; 2748 }; 2749 /omit-if-no-ref/ mx7d_pad_sai1_tx_data__flexcan2_tx: MX7D_PAD_SAI1_TX_DATA__FLEXCAN2_TX { 2750 pinmux = <0x3033020c 3 0x0 0 0x3033047c>; 2751 }; 2752 /omit-if-no-ref/ mx7d_pad_sai1_tx_data__sim1_port1_sven: MX7D_PAD_SAI1_TX_DATA__SIM1_PORT1_SVEN { 2753 pinmux = <0x3033020c 4 0x0 0 0x3033047c>; 2754 }; 2755 /omit-if-no-ref/ mx7d_pad_sai1_tx_data__gpio6_io15: MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15 { 2756 pinmux = <0x3033020c 5 0x0 0 0x3033047c>; 2757 }; 2758 /omit-if-no-ref/ mx7d_pad_sai1_tx_data__src_system_reset: MX7D_PAD_SAI1_TX_DATA__SRC_SYSTEM_RESET { 2759 pinmux = <0x3033020c 7 0x0 0 0x3033047c>; 2760 }; 2761 /omit-if-no-ref/ mx7d_pad_sai1_rx_sync__sai1_rx_sync: MX7D_PAD_SAI1_RX_SYNC__SAI1_RX_SYNC { 2762 pinmux = <0x30330210 0 0x303306a4 0 0x30330480>; 2763 }; 2764 /omit-if-no-ref/ mx7d_pad_sai1_rx_sync__nand_ce2_b: MX7D_PAD_SAI1_RX_SYNC__NAND_CE2_B { 2765 pinmux = <0x30330210 1 0x0 0 0x30330480>; 2766 }; 2767 /omit-if-no-ref/ mx7d_pad_sai1_rx_sync__sai2_rx_sync: MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC { 2768 pinmux = <0x30330210 2 0x303306b8 1 0x30330480>; 2769 }; 2770 /omit-if-no-ref/ mx7d_pad_sai1_rx_sync__i2c4_scl: MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL { 2771 pinmux = <0x30330210 3 0x303305ec 3 0x30330480>; 2772 }; 2773 /omit-if-no-ref/ mx7d_pad_sai1_rx_sync__sim1_port1_pd: MX7D_PAD_SAI1_RX_SYNC__SIM1_PORT1_PD { 2774 pinmux = <0x30330210 4 0x303306e0 1 0x30330480>; 2775 }; 2776 /omit-if-no-ref/ mx7d_pad_sai1_rx_sync__gpio6_io16: MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 { 2777 pinmux = <0x30330210 5 0x0 0 0x30330480>; 2778 }; 2779 /omit-if-no-ref/ mx7d_pad_sai1_rx_sync__mqs_right: MX7D_PAD_SAI1_RX_SYNC__MQS_RIGHT { 2780 pinmux = <0x30330210 6 0x0 0 0x30330480>; 2781 }; 2782 /omit-if-no-ref/ mx7d_pad_sai1_rx_sync__src_ca7_reset_b0: MX7D_PAD_SAI1_RX_SYNC__SRC_CA7_RESET_B0 { 2783 pinmux = <0x30330210 7 0x0 0 0x30330480>; 2784 }; 2785 /omit-if-no-ref/ mx7d_pad_sai1_rx_bclk__sai1_rx_bclk: MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK { 2786 pinmux = <0x30330214 0 0x3033069c 0 0x30330484>; 2787 }; 2788 /omit-if-no-ref/ mx7d_pad_sai1_rx_bclk__nand_ce3_b: MX7D_PAD_SAI1_RX_BCLK__NAND_CE3_B { 2789 pinmux = <0x30330214 1 0x0 0 0x30330484>; 2790 }; 2791 /omit-if-no-ref/ mx7d_pad_sai1_rx_bclk__sai2_rx_bclk: MX7D_PAD_SAI1_RX_BCLK__SAI2_RX_BCLK { 2792 pinmux = <0x30330214 2 0x303306b0 1 0x30330484>; 2793 }; 2794 /omit-if-no-ref/ mx7d_pad_sai1_rx_bclk__i2c4_sda: MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA { 2795 pinmux = <0x30330214 3 0x303305f0 3 0x30330484>; 2796 }; 2797 /omit-if-no-ref/ mx7d_pad_sai1_rx_bclk__flextimer2_pha: MX7D_PAD_SAI1_RX_BCLK__FLEXTIMER2_PHA { 2798 pinmux = <0x30330214 4 0x303305cc 1 0x30330484>; 2799 }; 2800 /omit-if-no-ref/ mx7d_pad_sai1_rx_bclk__gpio6_io17: MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 { 2801 pinmux = <0x30330214 5 0x0 0 0x30330484>; 2802 }; 2803 /omit-if-no-ref/ mx7d_pad_sai1_rx_bclk__mqs_left: MX7D_PAD_SAI1_RX_BCLK__MQS_LEFT { 2804 pinmux = <0x30330214 6 0x0 0 0x30330484>; 2805 }; 2806 /omit-if-no-ref/ mx7d_pad_sai1_rx_bclk__src_ca7_reset_b1: MX7D_PAD_SAI1_RX_BCLK__SRC_CA7_RESET_B1 { 2807 pinmux = <0x30330214 7 0x0 0 0x30330484>; 2808 }; 2809 /omit-if-no-ref/ mx7d_pad_sai1_mclk__sai1_mclk: MX7D_PAD_SAI1_MCLK__SAI1_MCLK { 2810 pinmux = <0x30330218 0 0x0 0 0x30330488>; 2811 }; 2812 /omit-if-no-ref/ mx7d_pad_sai1_mclk__nand_wp_b: MX7D_PAD_SAI1_MCLK__NAND_WP_B { 2813 pinmux = <0x30330218 1 0x0 0 0x30330488>; 2814 }; 2815 /omit-if-no-ref/ mx7d_pad_sai1_mclk__sai2_mclk: MX7D_PAD_SAI1_MCLK__SAI2_MCLK { 2816 pinmux = <0x30330218 2 0x0 0 0x30330488>; 2817 }; 2818 /omit-if-no-ref/ mx7d_pad_sai1_mclk__ccm_pmic_ready: MX7D_PAD_SAI1_MCLK__CCM_PMIC_READY { 2819 pinmux = <0x30330218 3 0x303304f4 3 0x30330488>; 2820 }; 2821 /omit-if-no-ref/ mx7d_pad_sai1_mclk__flextimer2_phb: MX7D_PAD_SAI1_MCLK__FLEXTIMER2_PHB { 2822 pinmux = <0x30330218 4 0x303305d0 1 0x30330488>; 2823 }; 2824 /omit-if-no-ref/ mx7d_pad_sai1_mclk__gpio6_io18: MX7D_PAD_SAI1_MCLK__GPIO6_IO18 { 2825 pinmux = <0x30330218 5 0x0 0 0x30330488>; 2826 }; 2827 /omit-if-no-ref/ mx7d_pad_sai1_mclk__src_tester_ack: MX7D_PAD_SAI1_MCLK__SRC_TESTER_ACK { 2828 pinmux = <0x30330218 7 0x0 0 0x30330488>; 2829 }; 2830 /omit-if-no-ref/ mx7d_pad_sai2_tx_sync__sai2_tx_sync: MX7D_PAD_SAI2_TX_SYNC__SAI2_TX_SYNC { 2831 pinmux = <0x3033021c 0 0x303306c0 1 0x3033048c>; 2832 }; 2833 /omit-if-no-ref/ mx7d_pad_sai2_tx_sync__ecspi3_miso: MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO { 2834 pinmux = <0x3033021c 1 0x30330548 1 0x3033048c>; 2835 }; 2836 /omit-if-no-ref/ mx7d_pad_sai2_tx_sync__uart4_dce_rx: MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX { 2837 pinmux = <0x3033021c 2 0x3033070c 4 0x3033048c>; 2838 }; 2839 /omit-if-no-ref/ mx7d_pad_sai2_tx_sync__uart4_dte_tx: MX7D_PAD_SAI2_TX_SYNC__UART4_DTE_TX { 2840 pinmux = <0x3033021c 2 0x0 0 0x3033048c>; 2841 }; 2842 /omit-if-no-ref/ mx7d_pad_sai2_tx_sync__uart1_dce_cts: MX7D_PAD_SAI2_TX_SYNC__UART1_DCE_CTS { 2843 pinmux = <0x3033021c 3 0x0 0 0x3033048c>; 2844 }; 2845 /omit-if-no-ref/ mx7d_pad_sai2_tx_sync__uart1_dte_rts: MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS { 2846 pinmux = <0x3033021c 3 0x303306f0 0 0x3033048c>; 2847 }; 2848 /omit-if-no-ref/ mx7d_pad_sai2_tx_sync__flextimer2_ch4: MX7D_PAD_SAI2_TX_SYNC__FLEXTIMER2_CH4 { 2849 pinmux = <0x3033021c 4 0x303305bc 1 0x3033048c>; 2850 }; 2851 /omit-if-no-ref/ mx7d_pad_sai2_tx_sync__gpio6_io19: MX7D_PAD_SAI2_TX_SYNC__GPIO6_IO19 { 2852 pinmux = <0x3033021c 5 0x0 0 0x3033048c>; 2853 }; 2854 /omit-if-no-ref/ mx7d_pad_sai2_tx_bclk__sai2_tx_bclk: MX7D_PAD_SAI2_TX_BCLK__SAI2_TX_BCLK { 2855 pinmux = <0x30330220 0 0x303306bc 1 0x30330490>; 2856 }; 2857 /omit-if-no-ref/ mx7d_pad_sai2_tx_bclk__ecspi3_mosi: MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI { 2858 pinmux = <0x30330220 1 0x3033054c 1 0x30330490>; 2859 }; 2860 /omit-if-no-ref/ mx7d_pad_sai2_tx_bclk__uart4_dce_tx: MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX { 2861 pinmux = <0x30330220 2 0x0 0 0x30330490>; 2862 }; 2863 /omit-if-no-ref/ mx7d_pad_sai2_tx_bclk__uart4_dte_rx: MX7D_PAD_SAI2_TX_BCLK__UART4_DTE_RX { 2864 pinmux = <0x30330220 2 0x3033070c 5 0x30330490>; 2865 }; 2866 /omit-if-no-ref/ mx7d_pad_sai2_tx_bclk__uart1_dce_rts: MX7D_PAD_SAI2_TX_BCLK__UART1_DCE_RTS { 2867 pinmux = <0x30330220 3 0x303306f0 1 0x30330490>; 2868 }; 2869 /omit-if-no-ref/ mx7d_pad_sai2_tx_bclk__uart1_dte_cts: MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS { 2870 pinmux = <0x30330220 3 0x0 0 0x30330490>; 2871 }; 2872 /omit-if-no-ref/ mx7d_pad_sai2_tx_bclk__flextimer2_ch5: MX7D_PAD_SAI2_TX_BCLK__FLEXTIMER2_CH5 { 2873 pinmux = <0x30330220 4 0x303305c0 1 0x30330490>; 2874 }; 2875 /omit-if-no-ref/ mx7d_pad_sai2_tx_bclk__gpio6_io20: MX7D_PAD_SAI2_TX_BCLK__GPIO6_IO20 { 2876 pinmux = <0x30330220 5 0x0 0 0x30330490>; 2877 }; 2878 /omit-if-no-ref/ mx7d_pad_sai2_rx_data__sai2_rx_data0: MX7D_PAD_SAI2_RX_DATA__SAI2_RX_DATA0 { 2879 pinmux = <0x30330224 0 0x303306b4 1 0x30330494>; 2880 }; 2881 /omit-if-no-ref/ mx7d_pad_sai2_rx_data__ecspi3_sclk: MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK { 2882 pinmux = <0x30330224 1 0x30330544 1 0x30330494>; 2883 }; 2884 /omit-if-no-ref/ mx7d_pad_sai2_rx_data__uart4_dce_cts: MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS { 2885 pinmux = <0x30330224 2 0x0 0 0x30330494>; 2886 }; 2887 /omit-if-no-ref/ mx7d_pad_sai2_rx_data__uart4_dte_rts: MX7D_PAD_SAI2_RX_DATA__UART4_DTE_RTS { 2888 pinmux = <0x30330224 2 0x30330708 4 0x30330494>; 2889 }; 2890 /omit-if-no-ref/ mx7d_pad_sai2_rx_data__uart2_dce_cts: MX7D_PAD_SAI2_RX_DATA__UART2_DCE_CTS { 2891 pinmux = <0x30330224 3 0x0 0 0x30330494>; 2892 }; 2893 /omit-if-no-ref/ mx7d_pad_sai2_rx_data__uart2_dte_rts: MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS { 2894 pinmux = <0x30330224 3 0x303306f8 2 0x30330494>; 2895 }; 2896 /omit-if-no-ref/ mx7d_pad_sai2_rx_data__flextimer2_ch6: MX7D_PAD_SAI2_RX_DATA__FLEXTIMER2_CH6 { 2897 pinmux = <0x30330224 4 0x303305c4 1 0x30330494>; 2898 }; 2899 /omit-if-no-ref/ mx7d_pad_sai2_rx_data__gpio6_io21: MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21 { 2900 pinmux = <0x30330224 5 0x0 0 0x30330494>; 2901 }; 2902 /omit-if-no-ref/ mx7d_pad_sai2_rx_data__kpp_col7: MX7D_PAD_SAI2_RX_DATA__KPP_COL7 { 2903 pinmux = <0x30330224 6 0x30330610 1 0x30330494>; 2904 }; 2905 /omit-if-no-ref/ mx7d_pad_sai2_tx_data__sai2_tx_data0: MX7D_PAD_SAI2_TX_DATA__SAI2_TX_DATA0 { 2906 pinmux = <0x30330228 0 0x0 0 0x30330498>; 2907 }; 2908 /omit-if-no-ref/ mx7d_pad_sai2_tx_data__ecspi3_ss0: MX7D_PAD_SAI2_TX_DATA__ECSPI3_SS0 { 2909 pinmux = <0x30330228 1 0x30330550 1 0x30330498>; 2910 }; 2911 /omit-if-no-ref/ mx7d_pad_sai2_tx_data__uart4_dce_rts: MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS { 2912 pinmux = <0x30330228 2 0x30330708 5 0x30330498>; 2913 }; 2914 /omit-if-no-ref/ mx7d_pad_sai2_tx_data__uart4_dte_cts: MX7D_PAD_SAI2_TX_DATA__UART4_DTE_CTS { 2915 pinmux = <0x30330228 2 0x0 0 0x30330498>; 2916 }; 2917 /omit-if-no-ref/ mx7d_pad_sai2_tx_data__uart2_dce_rts: MX7D_PAD_SAI2_TX_DATA__UART2_DCE_RTS { 2918 pinmux = <0x30330228 3 0x303306f8 3 0x30330498>; 2919 }; 2920 /omit-if-no-ref/ mx7d_pad_sai2_tx_data__uart2_dte_cts: MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS { 2921 pinmux = <0x30330228 3 0x0 0 0x30330498>; 2922 }; 2923 /omit-if-no-ref/ mx7d_pad_sai2_tx_data__flextimer2_ch7: MX7D_PAD_SAI2_TX_DATA__FLEXTIMER2_CH7 { 2924 pinmux = <0x30330228 4 0x303305c8 1 0x30330498>; 2925 }; 2926 /omit-if-no-ref/ mx7d_pad_sai2_tx_data__gpio6_io22: MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22 { 2927 pinmux = <0x30330228 5 0x0 0 0x30330498>; 2928 }; 2929 /omit-if-no-ref/ mx7d_pad_sai2_tx_data__kpp_row7: MX7D_PAD_SAI2_TX_DATA__KPP_ROW7 { 2930 pinmux = <0x30330228 6 0x30330630 1 0x30330498>; 2931 }; 2932 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd0__enet1_rgmii_rd0: MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 { 2933 pinmux = <0x3033022c 0 0x0 0 0x3033049c>; 2934 }; 2935 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd0__pwm1_out: MX7D_PAD_ENET1_RGMII_RD0__PWM1_OUT { 2936 pinmux = <0x3033022c 1 0x0 0 0x3033049c>; 2937 }; 2938 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd0__i2c3_scl: MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL { 2939 pinmux = <0x3033022c 2 0x303305e4 4 0x3033049c>; 2940 }; 2941 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd0__uart1_dce_cts: MX7D_PAD_ENET1_RGMII_RD0__UART1_DCE_CTS { 2942 pinmux = <0x3033022c 3 0x0 0 0x3033049c>; 2943 }; 2944 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd0__uart1_dte_rts: MX7D_PAD_ENET1_RGMII_RD0__UART1_DTE_RTS { 2945 pinmux = <0x3033022c 3 0x303306f0 2 0x3033049c>; 2946 }; 2947 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd0__epdc_vcom0: MX7D_PAD_ENET1_RGMII_RD0__EPDC_VCOM0 { 2948 pinmux = <0x3033022c 4 0x0 0 0x3033049c>; 2949 }; 2950 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd0__gpio7_io0: MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 { 2951 pinmux = <0x3033022c 5 0x0 0 0x3033049c>; 2952 }; 2953 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd0__kpp_row3: MX7D_PAD_ENET1_RGMII_RD0__KPP_ROW3 { 2954 pinmux = <0x3033022c 6 0x30330620 1 0x3033049c>; 2955 }; 2956 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd1__enet1_rgmii_rd1: MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 { 2957 pinmux = <0x30330230 0 0x0 0 0x303304a0>; 2958 }; 2959 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd1__pwm2_out: MX7D_PAD_ENET1_RGMII_RD1__PWM2_OUT { 2960 pinmux = <0x30330230 1 0x0 0 0x303304a0>; 2961 }; 2962 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd1__i2c3_sda: MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA { 2963 pinmux = <0x30330230 2 0x303305e8 4 0x303304a0>; 2964 }; 2965 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd1__uart1_dce_rts: MX7D_PAD_ENET1_RGMII_RD1__UART1_DCE_RTS { 2966 pinmux = <0x30330230 3 0x303306f0 3 0x303304a0>; 2967 }; 2968 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd1__uart1_dte_cts: MX7D_PAD_ENET1_RGMII_RD1__UART1_DTE_CTS { 2969 pinmux = <0x30330230 3 0x0 0 0x303304a0>; 2970 }; 2971 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd1__epdc_vcom1: MX7D_PAD_ENET1_RGMII_RD1__EPDC_VCOM1 { 2972 pinmux = <0x30330230 4 0x0 0 0x303304a0>; 2973 }; 2974 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd1__gpio7_io1: MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 { 2975 pinmux = <0x30330230 5 0x0 0 0x303304a0>; 2976 }; 2977 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd1__kpp_col3: MX7D_PAD_ENET1_RGMII_RD1__KPP_COL3 { 2978 pinmux = <0x30330230 6 0x30330600 1 0x303304a0>; 2979 }; 2980 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd2__enet1_rgmii_rd2: MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 { 2981 pinmux = <0x30330234 0 0x0 0 0x303304a4>; 2982 }; 2983 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd2__flexcan1_rx: MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX { 2984 pinmux = <0x30330234 1 0x303304dc 4 0x303304a4>; 2985 }; 2986 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd2__ecspi2_sclk: MX7D_PAD_ENET1_RGMII_RD2__ECSPI2_SCLK { 2987 pinmux = <0x30330234 2 0x30330534 1 0x303304a4>; 2988 }; 2989 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd2__uart1_dce_rx: MX7D_PAD_ENET1_RGMII_RD2__UART1_DCE_RX { 2990 pinmux = <0x30330234 3 0x303306f4 2 0x303304a4>; 2991 }; 2992 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd2__uart1_dte_tx: MX7D_PAD_ENET1_RGMII_RD2__UART1_DTE_TX { 2993 pinmux = <0x30330234 3 0x0 0 0x303304a4>; 2994 }; 2995 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd2__epdc_sdce4: MX7D_PAD_ENET1_RGMII_RD2__EPDC_SDCE4 { 2996 pinmux = <0x30330234 4 0x0 0 0x303304a4>; 2997 }; 2998 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd2__gpio7_io2: MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 { 2999 pinmux = <0x30330234 5 0x0 0 0x303304a4>; 3000 }; 3001 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd2__kpp_row2: MX7D_PAD_ENET1_RGMII_RD2__KPP_ROW2 { 3002 pinmux = <0x30330234 6 0x3033061c 1 0x303304a4>; 3003 }; 3004 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd3__enet1_rgmii_rd3: MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 { 3005 pinmux = <0x30330238 0 0x0 0 0x303304a8>; 3006 }; 3007 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd3__flexcan1_tx: MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX { 3008 pinmux = <0x30330238 1 0x0 0 0x303304a8>; 3009 }; 3010 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd3__ecspi2_mosi: MX7D_PAD_ENET1_RGMII_RD3__ECSPI2_MOSI { 3011 pinmux = <0x30330238 2 0x3033053c 1 0x303304a8>; 3012 }; 3013 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd3__uart1_dce_tx: MX7D_PAD_ENET1_RGMII_RD3__UART1_DCE_TX { 3014 pinmux = <0x30330238 3 0x0 0 0x303304a8>; 3015 }; 3016 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd3__uart1_dte_rx: MX7D_PAD_ENET1_RGMII_RD3__UART1_DTE_RX { 3017 pinmux = <0x30330238 3 0x303306f4 3 0x303304a8>; 3018 }; 3019 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd3__epdc_sdce5: MX7D_PAD_ENET1_RGMII_RD3__EPDC_SDCE5 { 3020 pinmux = <0x30330238 4 0x0 0 0x303304a8>; 3021 }; 3022 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd3__gpio7_io3: MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 { 3023 pinmux = <0x30330238 5 0x0 0 0x303304a8>; 3024 }; 3025 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rd3__kpp_col2: MX7D_PAD_ENET1_RGMII_RD3__KPP_COL2 { 3026 pinmux = <0x30330238 6 0x303305fc 1 0x303304a8>; 3027 }; 3028 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rx_ctl__enet1_rgmii_rx_ctl: MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL { 3029 pinmux = <0x3033023c 0 0x0 0 0x303304ac>; 3030 }; 3031 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rx_ctl__ecspi2_ss1: MX7D_PAD_ENET1_RGMII_RX_CTL__ECSPI2_SS1 { 3032 pinmux = <0x3033023c 2 0x0 0 0x303304ac>; 3033 }; 3034 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rx_ctl__epdc_sdce6: MX7D_PAD_ENET1_RGMII_RX_CTL__EPDC_SDCE6 { 3035 pinmux = <0x3033023c 4 0x0 0 0x303304ac>; 3036 }; 3037 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rx_ctl__gpio7_io4: MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 { 3038 pinmux = <0x3033023c 5 0x0 0 0x303304ac>; 3039 }; 3040 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rx_ctl__kpp_row1: MX7D_PAD_ENET1_RGMII_RX_CTL__KPP_ROW1 { 3041 pinmux = <0x3033023c 6 0x30330618 1 0x303304ac>; 3042 }; 3043 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rxc__enet1_rgmii_rxc: MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC { 3044 pinmux = <0x30330240 0 0x3033056c 0 0x303304b0>; 3045 }; 3046 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rxc__enet1_rx_er: MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER { 3047 pinmux = <0x30330240 1 0x0 0 0x303304b0>; 3048 }; 3049 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rxc__ecspi2_ss2: MX7D_PAD_ENET1_RGMII_RXC__ECSPI2_SS2 { 3050 pinmux = <0x30330240 2 0x0 0 0x303304b0>; 3051 }; 3052 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rxc__epdc_sdce7: MX7D_PAD_ENET1_RGMII_RXC__EPDC_SDCE7 { 3053 pinmux = <0x30330240 4 0x0 0 0x303304b0>; 3054 }; 3055 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rxc__gpio7_io5: MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 { 3056 pinmux = <0x30330240 5 0x0 0 0x303304b0>; 3057 }; 3058 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_rxc__kpp_col1: MX7D_PAD_ENET1_RGMII_RXC__KPP_COL1 { 3059 pinmux = <0x30330240 6 0x303305f8 1 0x303304b0>; 3060 }; 3061 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td0__enet1_rgmii_td0: MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 { 3062 pinmux = <0x30330244 0 0x0 0 0x303304b4>; 3063 }; 3064 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td0__pwm3_out: MX7D_PAD_ENET1_RGMII_TD0__PWM3_OUT { 3065 pinmux = <0x30330244 1 0x0 0 0x303304b4>; 3066 }; 3067 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td0__ecspi2_ss3: MX7D_PAD_ENET1_RGMII_TD0__ECSPI2_SS3 { 3068 pinmux = <0x30330244 2 0x0 0 0x303304b4>; 3069 }; 3070 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td0__epdc_sdce8: MX7D_PAD_ENET1_RGMII_TD0__EPDC_SDCE8 { 3071 pinmux = <0x30330244 4 0x0 0 0x303304b4>; 3072 }; 3073 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td0__gpio7_io6: MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 { 3074 pinmux = <0x30330244 5 0x0 0 0x303304b4>; 3075 }; 3076 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td0__kpp_row0: MX7D_PAD_ENET1_RGMII_TD0__KPP_ROW0 { 3077 pinmux = <0x30330244 6 0x30330614 1 0x303304b4>; 3078 }; 3079 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td1__enet1_rgmii_td1: MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 { 3080 pinmux = <0x30330248 0 0x0 0 0x303304b8>; 3081 }; 3082 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td1__pwm4_out: MX7D_PAD_ENET1_RGMII_TD1__PWM4_OUT { 3083 pinmux = <0x30330248 1 0x0 0 0x303304b8>; 3084 }; 3085 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td1__ecspi2_rdy: MX7D_PAD_ENET1_RGMII_TD1__ECSPI2_RDY { 3086 pinmux = <0x30330248 2 0x0 0 0x303304b8>; 3087 }; 3088 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td1__epdc_sdce9: MX7D_PAD_ENET1_RGMII_TD1__EPDC_SDCE9 { 3089 pinmux = <0x30330248 4 0x0 0 0x303304b8>; 3090 }; 3091 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td1__gpio7_io7: MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 { 3092 pinmux = <0x30330248 5 0x0 0 0x303304b8>; 3093 }; 3094 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td1__kpp_col0: MX7D_PAD_ENET1_RGMII_TD1__KPP_COL0 { 3095 pinmux = <0x30330248 6 0x303305f4 1 0x303304b8>; 3096 }; 3097 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td2__enet1_rgmii_td2: MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 { 3098 pinmux = <0x3033024c 0 0x0 0 0x303304bc>; 3099 }; 3100 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td2__flexcan2_rx: MX7D_PAD_ENET1_RGMII_TD2__FLEXCAN2_RX { 3101 pinmux = <0x3033024c 1 0x303304e0 4 0x303304bc>; 3102 }; 3103 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td2__ecspi2_miso: MX7D_PAD_ENET1_RGMII_TD2__ECSPI2_MISO { 3104 pinmux = <0x3033024c 2 0x30330538 1 0x303304bc>; 3105 }; 3106 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td2__i2c4_scl: MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL { 3107 pinmux = <0x3033024c 3 0x303305ec 4 0x303304bc>; 3108 }; 3109 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td2__epdc_sdoed: MX7D_PAD_ENET1_RGMII_TD2__EPDC_SDOED { 3110 pinmux = <0x3033024c 4 0x0 0 0x303304bc>; 3111 }; 3112 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td2__gpio7_io8: MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8 { 3113 pinmux = <0x3033024c 5 0x0 0 0x303304bc>; 3114 }; 3115 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td3__enet1_rgmii_td3: MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 { 3116 pinmux = <0x30330250 0 0x0 0 0x303304c0>; 3117 }; 3118 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td3__flexcan2_tx: MX7D_PAD_ENET1_RGMII_TD3__FLEXCAN2_TX { 3119 pinmux = <0x30330250 1 0x0 0 0x303304c0>; 3120 }; 3121 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td3__ecspi2_ss0: MX7D_PAD_ENET1_RGMII_TD3__ECSPI2_SS0 { 3122 pinmux = <0x30330250 2 0x30330540 1 0x303304c0>; 3123 }; 3124 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td3__i2c4_sda: MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA { 3125 pinmux = <0x30330250 3 0x303305f0 4 0x303304c0>; 3126 }; 3127 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td3__epdc_sdoez: MX7D_PAD_ENET1_RGMII_TD3__EPDC_SDOEZ { 3128 pinmux = <0x30330250 4 0x0 0 0x303304c0>; 3129 }; 3130 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td3__gpio7_io9: MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 { 3131 pinmux = <0x30330250 5 0x0 0 0x303304c0>; 3132 }; 3133 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_td3__caam_rng_osc_obs: MX7D_PAD_ENET1_RGMII_TD3__CAAM_RNG_OSC_OBS { 3134 pinmux = <0x30330250 7 0x0 0 0x303304c0>; 3135 }; 3136 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_tx_ctl__enet1_rgmii_tx_ctl: MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL { 3137 pinmux = <0x30330254 0 0x0 0 0x303304c4>; 3138 }; 3139 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_tx_ctl__sai1_rx_sync: MX7D_PAD_ENET1_RGMII_TX_CTL__SAI1_RX_SYNC { 3140 pinmux = <0x30330254 2 0x0 0 0x303304c4>; 3141 }; 3142 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_tx_ctl__gpt2_compare1: MX7D_PAD_ENET1_RGMII_TX_CTL__GPT2_COMPARE1 { 3143 pinmux = <0x30330254 3 0x0 0 0x303304c4>; 3144 }; 3145 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_tx_ctl__epdc_pwr_ctrl2: MX7D_PAD_ENET1_RGMII_TX_CTL__EPDC_PWR_CTRL2 { 3146 pinmux = <0x30330254 4 0x0 0 0x303304c4>; 3147 }; 3148 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_tx_ctl__gpio7_io10: MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 { 3149 pinmux = <0x30330254 5 0x0 0 0x303304c4>; 3150 }; 3151 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_txc__enet1_rgmii_txc: MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC { 3152 pinmux = <0x30330258 0 0x0 0 0x303304c8>; 3153 }; 3154 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_txc__enet1_tx_er: MX7D_PAD_ENET1_RGMII_TXC__ENET1_TX_ER { 3155 pinmux = <0x30330258 1 0x0 0 0x303304c8>; 3156 }; 3157 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_txc__sai1_rx_bclk: MX7D_PAD_ENET1_RGMII_TXC__SAI1_RX_BCLK { 3158 pinmux = <0x30330258 2 0x0 0 0x303304c8>; 3159 }; 3160 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_txc__gpt2_compare2: MX7D_PAD_ENET1_RGMII_TXC__GPT2_COMPARE2 { 3161 pinmux = <0x30330258 3 0x0 0 0x303304c8>; 3162 }; 3163 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_txc__epdc_pwr_ctrl3: MX7D_PAD_ENET1_RGMII_TXC__EPDC_PWR_CTRL3 { 3164 pinmux = <0x30330258 4 0x0 0 0x303304c8>; 3165 }; 3166 /omit-if-no-ref/ mx7d_pad_enet1_rgmii_txc__gpio7_io11: MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 { 3167 pinmux = <0x30330258 5 0x0 0 0x303304c8>; 3168 }; 3169 /omit-if-no-ref/ mx7d_pad_enet1_tx_clk__enet1_tx_clk: MX7D_PAD_ENET1_TX_CLK__ENET1_TX_CLK { 3170 pinmux = <0x3033025c 0 0x0 0 0x303304cc>; 3171 }; 3172 /omit-if-no-ref/ mx7d_pad_enet1_tx_clk__ccm_enet1_ref_clk: MX7D_PAD_ENET1_TX_CLK__CCM_ENET1_REF_CLK { 3173 pinmux = <0x3033025c 1 0x30330564 2 0x303304cc>; 3174 }; 3175 /omit-if-no-ref/ mx7d_pad_enet1_tx_clk__sai1_rx_data0: MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 { 3176 pinmux = <0x3033025c 2 0x303306a0 1 0x303304cc>; 3177 }; 3178 /omit-if-no-ref/ mx7d_pad_enet1_tx_clk__gpt2_compare3: MX7D_PAD_ENET1_TX_CLK__GPT2_COMPARE3 { 3179 pinmux = <0x3033025c 3 0x0 0 0x303304cc>; 3180 }; 3181 /omit-if-no-ref/ mx7d_pad_enet1_tx_clk__epdc_pwr_irq: MX7D_PAD_ENET1_TX_CLK__EPDC_PWR_IRQ { 3182 pinmux = <0x3033025c 4 0x3033057c 1 0x303304cc>; 3183 }; 3184 /omit-if-no-ref/ mx7d_pad_enet1_tx_clk__gpio7_io12: MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 { 3185 pinmux = <0x3033025c 5 0x0 0 0x303304cc>; 3186 }; 3187 /omit-if-no-ref/ mx7d_pad_enet1_tx_clk__ccm_ext_clk1: MX7D_PAD_ENET1_TX_CLK__CCM_EXT_CLK1 { 3188 pinmux = <0x3033025c 6 0x303304e4 2 0x303304cc>; 3189 }; 3190 /omit-if-no-ref/ mx7d_pad_enet1_tx_clk__csu_alarm_aut0: MX7D_PAD_ENET1_TX_CLK__CSU_ALARM_AUT0 { 3191 pinmux = <0x3033025c 7 0x0 0 0x303304cc>; 3192 }; 3193 /omit-if-no-ref/ mx7d_pad_enet1_rx_clk__enet1_rx_clk: MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK { 3194 pinmux = <0x30330260 0 0x3033056c 1 0x303304d0>; 3195 }; 3196 /omit-if-no-ref/ mx7d_pad_enet1_rx_clk__wdog2_wdog_b: MX7D_PAD_ENET1_RX_CLK__WDOG2_WDOG_B { 3197 pinmux = <0x30330260 1 0x0 0 0x303304d0>; 3198 }; 3199 /omit-if-no-ref/ mx7d_pad_enet1_rx_clk__sai1_tx_bclk: MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK { 3200 pinmux = <0x30330260 2 0x303306a8 1 0x303304d0>; 3201 }; 3202 /omit-if-no-ref/ mx7d_pad_enet1_rx_clk__gpt2_clk: MX7D_PAD_ENET1_RX_CLK__GPT2_CLK { 3203 pinmux = <0x30330260 3 0x0 0 0x303304d0>; 3204 }; 3205 /omit-if-no-ref/ mx7d_pad_enet1_rx_clk__epdc_pwr_wake: MX7D_PAD_ENET1_RX_CLK__EPDC_PWR_WAKE { 3206 pinmux = <0x30330260 4 0x0 0 0x303304d0>; 3207 }; 3208 /omit-if-no-ref/ mx7d_pad_enet1_rx_clk__gpio7_io13: MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13 { 3209 pinmux = <0x30330260 5 0x0 0 0x303304d0>; 3210 }; 3211 /omit-if-no-ref/ mx7d_pad_enet1_rx_clk__ccm_ext_clk2: MX7D_PAD_ENET1_RX_CLK__CCM_EXT_CLK2 { 3212 pinmux = <0x30330260 6 0x303304e8 2 0x303304d0>; 3213 }; 3214 /omit-if-no-ref/ mx7d_pad_enet1_rx_clk__csu_alarm_aut1: MX7D_PAD_ENET1_RX_CLK__CSU_ALARM_AUT1 { 3215 pinmux = <0x30330260 7 0x0 0 0x303304d0>; 3216 }; 3217 /omit-if-no-ref/ mx7d_pad_enet1_crs__enet1_crs: MX7D_PAD_ENET1_CRS__ENET1_CRS { 3218 pinmux = <0x30330264 0 0x0 0 0x303304d4>; 3219 }; 3220 /omit-if-no-ref/ mx7d_pad_enet1_crs__wdog2_wdog_rst_b_deb: MX7D_PAD_ENET1_CRS__WDOG2_WDOG_RST_B_DEB { 3221 pinmux = <0x30330264 1 0x0 0 0x303304d4>; 3222 }; 3223 /omit-if-no-ref/ mx7d_pad_enet1_crs__sai1_tx_sync: MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC { 3224 pinmux = <0x30330264 2 0x303306ac 1 0x303304d4>; 3225 }; 3226 /omit-if-no-ref/ mx7d_pad_enet1_crs__gpt2_capture1: MX7D_PAD_ENET1_CRS__GPT2_CAPTURE1 { 3227 pinmux = <0x30330264 3 0x0 0 0x303304d4>; 3228 }; 3229 /omit-if-no-ref/ mx7d_pad_enet1_crs__epdc_pwr_ctrl0: MX7D_PAD_ENET1_CRS__EPDC_PWR_CTRL0 { 3230 pinmux = <0x30330264 4 0x0 0 0x303304d4>; 3231 }; 3232 /omit-if-no-ref/ mx7d_pad_enet1_crs__gpio7_io14: MX7D_PAD_ENET1_CRS__GPIO7_IO14 { 3233 pinmux = <0x30330264 5 0x0 0 0x303304d4>; 3234 }; 3235 /omit-if-no-ref/ mx7d_pad_enet1_crs__ccm_ext_clk3: MX7D_PAD_ENET1_CRS__CCM_EXT_CLK3 { 3236 pinmux = <0x30330264 6 0x303304ec 2 0x303304d4>; 3237 }; 3238 /omit-if-no-ref/ mx7d_pad_enet1_crs__csu_alarm_aut2: MX7D_PAD_ENET1_CRS__CSU_ALARM_AUT2 { 3239 pinmux = <0x30330264 7 0x0 0 0x303304d4>; 3240 }; 3241 /omit-if-no-ref/ mx7d_pad_enet1_col__enet1_col: MX7D_PAD_ENET1_COL__ENET1_COL { 3242 pinmux = <0x30330268 0 0x0 0 0x303304d8>; 3243 }; 3244 /omit-if-no-ref/ mx7d_pad_enet1_col__wdog1_wdog_any: MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY { 3245 pinmux = <0x30330268 1 0x0 0 0x303304d8>; 3246 }; 3247 /omit-if-no-ref/ mx7d_pad_enet1_col__sai1_tx_data0: MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 { 3248 pinmux = <0x30330268 2 0x0 0 0x303304d8>; 3249 }; 3250 /omit-if-no-ref/ mx7d_pad_enet1_col__gpt2_capture2: MX7D_PAD_ENET1_COL__GPT2_CAPTURE2 { 3251 pinmux = <0x30330268 3 0x0 0 0x303304d8>; 3252 }; 3253 /omit-if-no-ref/ mx7d_pad_enet1_col__epdc_pwr_ctrl1: MX7D_PAD_ENET1_COL__EPDC_PWR_CTRL1 { 3254 pinmux = <0x30330268 4 0x0 0 0x303304d8>; 3255 }; 3256 /omit-if-no-ref/ mx7d_pad_enet1_col__gpio7_io15: MX7D_PAD_ENET1_COL__GPIO7_IO15 { 3257 pinmux = <0x30330268 5 0x0 0 0x303304d8>; 3258 }; 3259 /omit-if-no-ref/ mx7d_pad_enet1_col__ccm_ext_clk4: MX7D_PAD_ENET1_COL__CCM_EXT_CLK4 { 3260 pinmux = <0x30330268 6 0x303304f0 2 0x303304d8>; 3261 }; 3262 /omit-if-no-ref/ mx7d_pad_enet1_col__csu_int_deb: MX7D_PAD_ENET1_COL__CSU_INT_DEB { 3263 pinmux = <0x30330268 7 0x0 0 0x303304d8>; 3264 }; 3265 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io00__gpio1_io0: MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 { 3266 pinmux = <0x302c0000 0 0x0 0 0x302c0030>; 3267 pin-lpsr; 3268 }; 3269 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io00__pwm4_out: MX7D_PAD_LPSR_GPIO1_IO00__PWM4_OUT { 3270 pinmux = <0x302c0000 1 0x0 0 0x302c0030>; 3271 pin-lpsr; 3272 }; 3273 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io00__wdog1_wdog_any: MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_ANY { 3274 pinmux = <0x302c0000 2 0x0 0 0x302c0030>; 3275 pin-lpsr; 3276 }; 3277 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io00__wdog1_wdog_b: MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B { 3278 pinmux = <0x302c0000 3 0x0 0 0x302c0030>; 3279 pin-lpsr; 3280 }; 3281 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io00__wdog1_wdog_rst_b_deb: MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_RST_B_DEB { 3282 pinmux = <0x302c0000 4 0x0 0 0x302c0030>; 3283 pin-lpsr; 3284 }; 3285 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io01__gpio1_io1: MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 { 3286 pinmux = <0x302c0004 0 0x0 0 0x302c0034>; 3287 pin-lpsr; 3288 }; 3289 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io01__pwm1_out: MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT { 3290 pinmux = <0x302c0004 1 0x0 0 0x302c0034>; 3291 pin-lpsr; 3292 }; 3293 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io01__ccm_enet_ref_clk3: MX7D_PAD_LPSR_GPIO1_IO01__CCM_ENET_REF_CLK3 { 3294 pinmux = <0x302c0004 2 0x0 0 0x302c0034>; 3295 pin-lpsr; 3296 }; 3297 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io01__sai1_mclk: MX7D_PAD_LPSR_GPIO1_IO01__SAI1_MCLK { 3298 pinmux = <0x302c0004 3 0x0 0 0x302c0034>; 3299 pin-lpsr; 3300 }; 3301 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io02__gpio1_io2: MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 { 3302 pinmux = <0x302c0008 0 0x0 0 0x302c0038>; 3303 pin-lpsr; 3304 }; 3305 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io02__pwm2_out: MX7D_PAD_LPSR_GPIO1_IO02__PWM2_OUT { 3306 pinmux = <0x302c0008 1 0x0 0 0x302c0038>; 3307 pin-lpsr; 3308 }; 3309 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io02__ccm_enet_ref_clk1: MX7D_PAD_LPSR_GPIO1_IO02__CCM_ENET_REF_CLK1 { 3310 pinmux = <0x302c0008 2 0x0 0 0x302c0038>; 3311 pin-lpsr; 3312 }; 3313 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io02__sai2_mclk: MX7D_PAD_LPSR_GPIO1_IO02__SAI2_MCLK { 3314 pinmux = <0x302c0008 3 0x0 0 0x302c0038>; 3315 pin-lpsr; 3316 }; 3317 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io02__ccm_clko1: MX7D_PAD_LPSR_GPIO1_IO02__CCM_CLKO1 { 3318 pinmux = <0x302c0008 5 0x0 0 0x302c0038>; 3319 pin-lpsr; 3320 }; 3321 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io02__usb_otg1_id: MX7D_PAD_LPSR_GPIO1_IO02__USB_OTG1_ID { 3322 pinmux = <0x302c0008 7 0x0 0 0x302c0038>; 3323 pin-lpsr; 3324 }; 3325 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io03__gpio1_io3: MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 { 3326 pinmux = <0x302c000c 0 0x0 0 0x302c003c>; 3327 pin-lpsr; 3328 }; 3329 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io03__pwm3_out: MX7D_PAD_LPSR_GPIO1_IO03__PWM3_OUT { 3330 pinmux = <0x302c000c 1 0x0 0 0x302c003c>; 3331 pin-lpsr; 3332 }; 3333 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io03__ccm_enet_ref_clk2: MX7D_PAD_LPSR_GPIO1_IO03__CCM_ENET_REF_CLK2 { 3334 pinmux = <0x302c000c 2 0x0 0 0x302c003c>; 3335 pin-lpsr; 3336 }; 3337 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io03__sai3_mclk: MX7D_PAD_LPSR_GPIO1_IO03__SAI3_MCLK { 3338 pinmux = <0x302c000c 3 0x0 0 0x302c003c>; 3339 pin-lpsr; 3340 }; 3341 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io03__ccm_clko2: MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2 { 3342 pinmux = <0x302c000c 5 0x0 0 0x302c003c>; 3343 pin-lpsr; 3344 }; 3345 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io03__usb_otg2_id: MX7D_PAD_LPSR_GPIO1_IO03__USB_OTG2_ID { 3346 pinmux = <0x302c000c 7 0x0 0 0x302c003c>; 3347 pin-lpsr; 3348 }; 3349 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io04__gpio1_io4: MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 { 3350 pinmux = <0x302c0010 0 0x0 0 0x302c0040>; 3351 pin-lpsr; 3352 }; 3353 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io04__usb_otg1_oc: MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC { 3354 pinmux = <0x302c0010 1 0x0 0 0x302c0040>; 3355 pin-lpsr; 3356 }; 3357 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io04__flextimer1_ch4: MX7D_PAD_LPSR_GPIO1_IO04__FLEXTIMER1_CH4 { 3358 pinmux = <0x302c0010 2 0x0 0 0x302c0040>; 3359 pin-lpsr; 3360 }; 3361 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io04__uart5_dce_cts: MX7D_PAD_LPSR_GPIO1_IO04__UART5_DCE_CTS { 3362 pinmux = <0x302c0010 3 0x0 0 0x302c0040>; 3363 pin-lpsr; 3364 }; 3365 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io04__uart5_dte_rts: MX7D_PAD_LPSR_GPIO1_IO04__UART5_DTE_RTS { 3366 pinmux = <0x302c0010 3 0x0 0 0x302c0040>; 3367 pin-lpsr; 3368 }; 3369 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io04__i2c1_scl: MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL { 3370 pinmux = <0x302c0010 4 0x0 0 0x302c0040>; 3371 pin-lpsr; 3372 }; 3373 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io05__gpio1_io5: MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 { 3374 pinmux = <0x302c0014 0 0x0 0 0x302c0044>; 3375 pin-lpsr; 3376 }; 3377 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io05__usb_otg1_pwr: MX7D_PAD_LPSR_GPIO1_IO05__USB_OTG1_PWR { 3378 pinmux = <0x302c0014 1 0x0 0 0x302c0044>; 3379 pin-lpsr; 3380 }; 3381 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io05__flextimer1_ch5: MX7D_PAD_LPSR_GPIO1_IO05__FLEXTIMER1_CH5 { 3382 pinmux = <0x302c0014 2 0x0 0 0x302c0044>; 3383 pin-lpsr; 3384 }; 3385 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io05__uart5_dce_rts: MX7D_PAD_LPSR_GPIO1_IO05__UART5_DCE_RTS { 3386 pinmux = <0x302c0014 3 0x0 0 0x302c0044>; 3387 pin-lpsr; 3388 }; 3389 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io05__uart5_dte_cts: MX7D_PAD_LPSR_GPIO1_IO05__UART5_DTE_CTS { 3390 pinmux = <0x302c0014 3 0x0 0 0x302c0044>; 3391 pin-lpsr; 3392 }; 3393 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io05__i2c1_sda: MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA { 3394 pinmux = <0x302c0014 4 0x0 0 0x302c0044>; 3395 pin-lpsr; 3396 }; 3397 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io06__gpio1_io6: MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 { 3398 pinmux = <0x302c0018 0 0x0 0 0x302c0048>; 3399 pin-lpsr; 3400 }; 3401 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io06__usb_otg2_oc: MX7D_PAD_LPSR_GPIO1_IO06__USB_OTG2_OC { 3402 pinmux = <0x302c0018 1 0x0 0 0x302c0048>; 3403 pin-lpsr; 3404 }; 3405 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io06__flextimer1_ch6: MX7D_PAD_LPSR_GPIO1_IO06__FLEXTIMER1_CH6 { 3406 pinmux = <0x302c0018 2 0x0 0 0x302c0048>; 3407 pin-lpsr; 3408 }; 3409 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io06__uart5_dce_rx: MX7D_PAD_LPSR_GPIO1_IO06__UART5_DCE_RX { 3410 pinmux = <0x302c0018 3 0x0 0 0x302c0048>; 3411 pin-lpsr; 3412 }; 3413 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io06__uart5_dte_tx: MX7D_PAD_LPSR_GPIO1_IO06__UART5_DTE_TX { 3414 pinmux = <0x302c0018 3 0x0 0 0x302c0048>; 3415 pin-lpsr; 3416 }; 3417 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io06__i2c2_scl: MX7D_PAD_LPSR_GPIO1_IO06__I2C2_SCL { 3418 pinmux = <0x302c0018 4 0x0 0 0x302c0048>; 3419 pin-lpsr; 3420 }; 3421 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io06__ccm_wait: MX7D_PAD_LPSR_GPIO1_IO06__CCM_WAIT { 3422 pinmux = <0x302c0018 5 0x0 0 0x302c0048>; 3423 pin-lpsr; 3424 }; 3425 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io06__kpp_row4: MX7D_PAD_LPSR_GPIO1_IO06__KPP_ROW4 { 3426 pinmux = <0x302c0018 6 0x0 0 0x302c0048>; 3427 pin-lpsr; 3428 }; 3429 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io07__gpio1_io7: MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 { 3430 pinmux = <0x302c001c 0 0x0 0 0x302c004c>; 3431 pin-lpsr; 3432 }; 3433 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io07__usb_otg2_pwr: MX7D_PAD_LPSR_GPIO1_IO07__USB_OTG2_PWR { 3434 pinmux = <0x302c001c 1 0x0 0 0x302c004c>; 3435 pin-lpsr; 3436 }; 3437 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io07__flextimer1_ch7: MX7D_PAD_LPSR_GPIO1_IO07__FLEXTIMER1_CH7 { 3438 pinmux = <0x302c001c 2 0x0 0 0x302c004c>; 3439 pin-lpsr; 3440 }; 3441 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io07__uart5_dce_tx: MX7D_PAD_LPSR_GPIO1_IO07__UART5_DCE_TX { 3442 pinmux = <0x302c001c 3 0x0 0 0x302c004c>; 3443 pin-lpsr; 3444 }; 3445 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io07__uart5_dte_rx: MX7D_PAD_LPSR_GPIO1_IO07__UART5_DTE_RX { 3446 pinmux = <0x302c001c 3 0x0 0 0x302c004c>; 3447 pin-lpsr; 3448 }; 3449 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io07__i2c2_sda: MX7D_PAD_LPSR_GPIO1_IO07__I2C2_SDA { 3450 pinmux = <0x302c001c 4 0x0 0 0x302c004c>; 3451 pin-lpsr; 3452 }; 3453 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io07__ccm_stop: MX7D_PAD_LPSR_GPIO1_IO07__CCM_STOP { 3454 pinmux = <0x302c001c 5 0x0 0 0x302c004c>; 3455 pin-lpsr; 3456 }; 3457 /omit-if-no-ref/ mx7d_pad_lpsr_gpio1_io07__kpp_col4: MX7D_PAD_LPSR_GPIO1_IO07__KPP_COL4 { 3458 pinmux = <0x302c001c 6 0x0 0 0x302c004c>; 3459 pin-lpsr; 3460 }; 3461}; 3462
