1 /* 2 * NOTE: Autogenerated file by kinetis_signal2dts.py 3 * for MKW41Z512CAT4/signal_configuration.xml 4 * 5 * Copyright (c) 2022, NXP 6 * SPDX-License-Identifier: Apache-2.0 7 */ 8 9 #ifndef _ZEPHYR_DTS_BINDING_MKW41Z512CAT4_ 10 #define _ZEPHYR_DTS_BINDING_MKW41Z512CAT4_ 11 12 #define KINETIS_MUX(port, pin, mux) \ 13 (((((port) - 'A') & 0xF) << 28) | \ 14 (((pin) & 0x3F) << 22) | \ 15 (((mux) & 0x7) << 8)) 16 17 #define TSI0_CH8_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */ 18 #define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */ 19 #define SPI0_PCS1_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */ 20 #define TPM1_CH0_PTA0 KINETIS_MUX('A',0,5) /* PTA0 */ 21 #define SWD_DIO_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */ 22 #define TSI0_CH9_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */ 23 #define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */ 24 #define SPI1_PCS0_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */ 25 #define TPM1_CH1_PTA1 KINETIS_MUX('A',1,5) /* PTA1 */ 26 #define SWD_CLK_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */ 27 #define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */ 28 #define TPM0_CH3_PTA2 KINETIS_MUX('A',2,5) /* PTA2 */ 29 #define RESET_b_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */ 30 #define TSI0_CH10_PTA16 KINETIS_MUX('A',16,0) /* PTA16 */ 31 #define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */ 32 #define LLWU_P4_PTA16 KINETIS_MUX('A',16,1) /* PTA16 */ 33 #define SPI1_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */ 34 #define TPM0_CH0_PTA16 KINETIS_MUX('A',16,5) /* PTA16 */ 35 #define TSI0_CH11_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */ 36 #define RF_RESET_PTA17 KINETIS_MUX('A',17,1) /* PTA17 */ 37 #define LLWU_P5_PTA17 KINETIS_MUX('A',17,1) /* PTA17 */ 38 #define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */ 39 #define SPI1_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */ 40 #define TPM_CLKIN1_PTA17 KINETIS_MUX('A',17,5) /* PTA17 */ 41 #define TSI0_CH12_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */ 42 #define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */ 43 #define LLWU_P6_PTA18 KINETIS_MUX('A',18,1) /* PTA18 */ 44 #define SPI1_SCK_PTA18 KINETIS_MUX('A',18,2) /* PTA18 */ 45 #define TPM2_CH0_PTA18 KINETIS_MUX('A',18,5) /* PTA18 */ 46 #define TSI0_CH13_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */ 47 #define ADC0_SE5_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */ 48 #define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */ 49 #define LLWU_P7_PTA19 KINETIS_MUX('A',19,1) /* PTA19 */ 50 #define SPI1_PCS0_PTA19 KINETIS_MUX('A',19,2) /* PTA19 */ 51 #define TPM2_CH1_PTA19 KINETIS_MUX('A',19,5) /* PTA19 */ 52 #define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */ 53 #define LLWU_P8_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */ 54 #define XTAL_OUT_EN_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */ 55 #define I2C0_SCL_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */ 56 #define CMP0_OUT_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */ 57 #define TPM0_CH1_PTB0 KINETIS_MUX('B',0,5) /* PTB0 */ 58 #define CLKOUT_PTB0 KINETIS_MUX('B',0,7) /* PTB0 */ 59 #define CMP0_IN5_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */ 60 #define ADC0_SE1_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */ 61 #define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */ 62 #define DTM_RX_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */ 63 #define I2C0_SDA_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */ 64 #define LPTMR0_ALT1_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */ 65 #define TPM0_CH2_PTB1 KINETIS_MUX('B',1,5) /* PTB1 */ 66 #define CMT_IRO_PTB1 KINETIS_MUX('B',1,7) /* PTB1 */ 67 #define CMP0_IN3_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */ 68 #define ADC0_SE3_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */ 69 #define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */ 70 #define RF_NOT_ALLOWED_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */ 71 #define DTM_TX_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */ 72 #define TPM1_CH0_PTB2 KINETIS_MUX('B',2,5) /* PTB2 */ 73 #define ADC0_SE2_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */ 74 #define CMP0_IN4_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */ 75 #define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */ 76 #define CLKOUT_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */ 77 #define TPM1_CH1_PTB3 KINETIS_MUX('B',3,5) /* PTB3 */ 78 #define RTC_CLKOUT_PTB3 KINETIS_MUX('B',3,7) /* PTB3 */ 79 #define EXTAL32K_PTB16 KINETIS_MUX('B',16,0) /* PTB16 */ 80 #define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */ 81 #define I2C1_SCL_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */ 82 #define TPM2_CH0_PTB16 KINETIS_MUX('B',16,5) /* PTB16 */ 83 #define XTAL32K_PTB17 KINETIS_MUX('B',17,0) /* PTB17 */ 84 #define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */ 85 #define I2C1_SDA_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */ 86 #define TPM2_CH1_PTB17 KINETIS_MUX('B',17,5) /* PTB17 */ 87 #define BSM_CLK_PTB17 KINETIS_MUX('B',17,7) /* PTB17 */ 88 #define ADC0_SE4_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */ 89 #define DAC0_OUT_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */ 90 #define CMP0_IN2_PTB18 KINETIS_MUX('B',18,0) /* PTB18 */ 91 #define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */ 92 #define I2C1_SCL_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */ 93 #define TPM_CLKIN0_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */ 94 #define TPM0_CH0_PTB18 KINETIS_MUX('B',18,5) /* PTB18 */ 95 #define NMI_b_PTB18 KINETIS_MUX('B',18,7) /* PTB18 */ 96 #define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */ 97 #define LLWU_P9_PTC0 KINETIS_MUX('C',0,1) /* PTC0 */ 98 #define ANT_A_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */ 99 #define I2C0_SCL_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */ 100 #define UART0_CTS_b_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */ 101 #define TPM0_CH1_PTC0 KINETIS_MUX('C',0,5) /* PTC0 */ 102 #define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */ 103 #define ANT_B_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */ 104 #define I2C0_SDA_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */ 105 #define UART0_RTS_b_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */ 106 #define TPM0_CH2_PTC1 KINETIS_MUX('C',1,5) /* PTC1 */ 107 #define BLE_RF_ACTIVE_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */ 108 #define TSI0_CH14_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */ 109 #define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */ 110 #define LLWU_P10_PTC2 KINETIS_MUX('C',2,1) /* PTC2 */ 111 #define TX_SWITCH_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */ 112 #define I2C1_SCL_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */ 113 #define UART0_RX_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */ 114 #define CMT_IRO_PTC2 KINETIS_MUX('C',2,5) /* PTC2 */ 115 #define DTM_RX_PTC2 KINETIS_MUX('C',2,7) /* PTC2 */ 116 #define TSI0_CH15_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */ 117 #define LLWU_P11_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */ 118 #define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */ 119 #define RX_SWITCH_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */ 120 #define I2C1_SDA_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */ 121 #define UART0_TX_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */ 122 #define TPM0_CH1_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */ 123 #define DTM_TX_PTC3 KINETIS_MUX('C',3,7) /* PTC3 */ 124 #define TSI0_CH0_PTC4 KINETIS_MUX('C',4,0) /* PTC4 */ 125 #define LLWU_P12_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */ 126 #define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */ 127 #define ANT_A_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */ 128 #define EXTRG_IN_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */ 129 #define UART0_CTS_b_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */ 130 #define TPM1_CH0_PTC4 KINETIS_MUX('C',4,5) /* PTC4 */ 131 #define BSM_DATA_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */ 132 #define TSI0_CH1_PTC5 KINETIS_MUX('C',5,0) /* PTC5 */ 133 #define LLWU_P13_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */ 134 #define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */ 135 #define RF_NOT_ALLOWED_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */ 136 #define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */ 137 #define UART0_RTS_b_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */ 138 #define TPM1_CH1_PTC5 KINETIS_MUX('C',5,5) /* PTC5 */ 139 #define BSM_CLK_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */ 140 #define TSI0_CH2_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */ 141 #define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */ 142 #define LLWU_P14_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */ 143 #define XTAL_OUT_EN_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */ 144 #define I2C1_SCL_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */ 145 #define UART0_RX_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */ 146 #define TPM2_CH0_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */ 147 #define BSM_FRAME_PTC6 KINETIS_MUX('C',6,7) /* PTC6 */ 148 #define TSI0_CH3_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */ 149 #define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */ 150 #define LLWU_P15_PTC7 KINETIS_MUX('C',7,1) /* PTC7 */ 151 #define SPI0_PCS2_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */ 152 #define I2C1_SDA_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */ 153 #define UART0_TX_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */ 154 #define TPM2_CH1_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */ 155 #define BSM_DATA_PTC7 KINETIS_MUX('C',7,7) /* PTC7 */ 156 #define TSI0_CH4_PTC16 KINETIS_MUX('C',16,0) /* PTC16 */ 157 #define LLWU_P0_PTC16 KINETIS_MUX('C',16,1) /* PTC16 */ 158 #define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */ 159 #define SPI0_SCK_PTC16 KINETIS_MUX('C',16,2) /* PTC16 */ 160 #define I2C0_SDA_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */ 161 #define UART0_RTS_b_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */ 162 #define TPM0_CH3_PTC16 KINETIS_MUX('C',16,5) /* PTC16 */ 163 #define TSI0_CH5_PTC17 KINETIS_MUX('C',17,0) /* PTC17 */ 164 #define LLWU_P1_PTC17 KINETIS_MUX('C',17,1) /* PTC17 */ 165 #define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */ 166 #define SPI0_SOUT_PTC17 KINETIS_MUX('C',17,2) /* PTC17 */ 167 #define I2C1_SCL_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */ 168 #define UART0_RX_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */ 169 #define BSM_FRAME_PTC17 KINETIS_MUX('C',17,5) /* PTC17 */ 170 #define DTM_RX_PTC17 KINETIS_MUX('C',17,7) /* PTC17 */ 171 #define TSI0_CH6_PTC18 KINETIS_MUX('C',18,0) /* PTC18 */ 172 #define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */ 173 #define LLWU_P2_PTC18 KINETIS_MUX('C',18,1) /* PTC18 */ 174 #define SPI0_SIN_PTC18 KINETIS_MUX('C',18,2) /* PTC18 */ 175 #define I2C1_SDA_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */ 176 #define UART0_TX_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */ 177 #define BSM_DATA_PTC18 KINETIS_MUX('C',18,5) /* PTC18 */ 178 #define DTM_TX_PTC18 KINETIS_MUX('C',18,7) /* PTC18 */ 179 #define TSI0_CH7_PTC19 KINETIS_MUX('C',19,0) /* PTC19 */ 180 #define PTC19 KINETIS_MUX('C',19,1) /* PTC19 */ 181 #define LLWU_P3_PTC19 KINETIS_MUX('C',19,1) /* PTC19 */ 182 #define SPI0_PCS0_PTC19 KINETIS_MUX('C',19,2) /* PTC19 */ 183 #define I2C0_SCL_PTC19 KINETIS_MUX('C',19,3) /* PTC19 */ 184 #define UART0_CTS_b_PTC19 KINETIS_MUX('C',19,4) /* PTC19 */ 185 #define BSM_CLK_PTC19 KINETIS_MUX('C',19,5) /* PTC19 */ 186 #define BLE_RF_ACTIVE_PTC19 KINETIS_MUX('C',19,7) /* PTC19 */ 187 #endif 188
