1 /* 2 * Copyright (c) 2022, NXP 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /* 8 * This file is handcoded based on what pin configurations are actually 9 * used by boards in Zephyr. At this time that is only the Hexiwear KW40Z. 10 */ 11 12 #ifndef _ZEPHYR_DTS_BINDING_MKW40Z160VHT4_ 13 #define _ZEPHYR_DTS_BINDING_MKW40Z160VHT4_ 14 15 #define KINETIS_MUX(port, pin, mux) \ 16 (((((port) - 'A') & 0xF) << 28) | \ 17 (((pin) & 0x3F) << 22) | \ 18 (((mux) & 0x7) << 8)) 19 20 21 #define ADC0_SE1_PTB1 KINETIS_MUX('B', 1, 0) 22 #define GPIOB_PTB1 KINETIS_MUX('B', 1, 0) 23 #define GPIOC_PTC6 KINETIS_MUX('C', 6, 1) 24 #define UART0_RX_PTC6 KINETIS_MUX('C', 6, 4) 25 #define GPIOC_PTC7 KINETIS_MUX('C', 7, 1) 26 #define UART0_TX_PTC7 KINETIS_MUX('C', 7, 4) 27 28 #endif 29
