1 /* 2 * NOTE: Autogenerated file by kinetis_signal2dts.py 3 * for MKL25Z128VFM4/signal_configuration.xml 4 * 5 * Copyright (c) 2022, NXP 6 * SPDX-License-Identifier: Apache-2.0 7 */ 8 9 #ifndef _ZEPHYR_DTS_BINDING_MKL25Z128VFM4_ 10 #define _ZEPHYR_DTS_BINDING_MKL25Z128VFM4_ 11 12 #define KINETIS_MUX(port, pin, mux) \ 13 (((((port) - 'A') & 0xF) << 28) | \ 14 (((pin) & 0x3F) << 22) | \ 15 (((mux) & 0x7) << 8)) 16 17 #define TSI0_CH1_PTA0 KINETIS_MUX('A',0,0) /* PTA0 */ 18 #define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */ 19 #define TPM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */ 20 #define SWD_CLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */ 21 #define TSI0_CH2_PTA1 KINETIS_MUX('A',1,0) /* PTA1 */ 22 #define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */ 23 #define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */ 24 #define TPM2_CH0_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */ 25 #define TSI0_CH3_PTA2 KINETIS_MUX('A',2,0) /* PTA2 */ 26 #define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */ 27 #define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */ 28 #define TPM2_CH1_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */ 29 #define TSI0_CH4_PTA3 KINETIS_MUX('A',3,0) /* PTA3 */ 30 #define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */ 31 #define I2C1_SCL_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */ 32 #define TPM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */ 33 #define SWD_DIO_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */ 34 #define TSI0_CH5_PTA4 KINETIS_MUX('A',4,0) /* PTA4 */ 35 #define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */ 36 #define I2C1_SDA_PTA4 KINETIS_MUX('A',4,2) /* PTA4 */ 37 #define TPM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */ 38 #define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */ 39 #define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */ 40 #define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */ 41 #define UART1_RX_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */ 42 #define TPM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */ 43 #define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */ 44 #define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */ 45 #define UART1_TX_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */ 46 #define TPM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */ 47 #define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */ 48 #define PTA20 KINETIS_MUX('A',20,1) /* PTA20 */ 49 #define RESET_b_PTA20 KINETIS_MUX('A',20,7) /* PTA20 */ 50 #define TSI0_CH0_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */ 51 #define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */ 52 #define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */ 53 #define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */ 54 #define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */ 55 #define TPM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */ 56 #define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */ 57 #define TSI0_CH6_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */ 58 #define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */ 59 #define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */ 60 #define TPM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */ 61 #define TSI0_CH14_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */ 62 #define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */ 63 #define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */ 64 #define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */ 65 #define RTC_CLKIN_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */ 66 #define I2C1_SCL_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */ 67 #define TPM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */ 68 #define ADC0_SE11_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */ 69 #define TSI0_CH15_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */ 70 #define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */ 71 #define I2C1_SDA_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */ 72 #define TPM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */ 73 #define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */ 74 #define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */ 75 #define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */ 76 #define TPM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */ 77 #define CLKOUTa_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */ 78 #define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */ 79 #define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */ 80 #define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */ 81 #define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */ 82 #define TPM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */ 83 #define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */ 84 #define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */ 85 #define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */ 86 #define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */ 87 #define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */ 88 #define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */ 89 #define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */ 90 #define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */ 91 #define SPI0_MOSI_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */ 92 #define EXTRG_IN_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */ 93 #define SPI0_MISO_PTC6 KINETIS_MUX('C',6,5) /* PTC6 */ 94 #define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */ 95 #define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */ 96 #define SPI0_MISO_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */ 97 #define SPI0_MOSI_PTC7 KINETIS_MUX('C',7,5) /* PTC7 */ 98 #define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */ 99 #define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */ 100 #define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */ 101 #define UART2_RX_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */ 102 #define TPM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */ 103 #define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */ 104 #define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */ 105 #define SPI1_SCK_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */ 106 #define UART2_TX_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */ 107 #define TPM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */ 108 #define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */ 109 #define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */ 110 #define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */ 111 #define SPI1_MOSI_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */ 112 #define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */ 113 #define SPI1_MISO_PTD6 KINETIS_MUX('D',6,5) /* PTD6 */ 114 #define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */ 115 #define SPI1_MISO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */ 116 #define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */ 117 #define SPI1_MOSI_PTD7 KINETIS_MUX('D',7,5) /* PTD7 */ 118 #define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */ 119 #define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */ 120 #define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */ 121 #define CMP0_OUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */ 122 #define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */ 123 #define DAC0_OUT_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */ 124 #define CMP0_IN4_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */ 125 #define ADC0_SE23_PTE30 KINETIS_MUX('E',30,0) /* PTE30 */ 126 #define PTE30 KINETIS_MUX('E',30,1) /* PTE30 */ 127 #define TPM0_CH3_PTE30 KINETIS_MUX('E',30,3) /* PTE30 */ 128 #define TPM_CLKIN1_PTE30 KINETIS_MUX('E',30,4) /* PTE30 */ 129 #endif 130
