1 /* 2 * NOTE: Autogenerated file by kinetis_signal2dts.py 3 * for MK64FN1M0VLL12/signal_configuration.xml 4 * 5 * Copyright (c) 2022, NXP 6 * SPDX-License-Identifier: Apache-2.0 7 */ 8 9 #ifndef _ZEPHYR_DTS_BINDING_MK64FN1M0VLL12_ 10 #define _ZEPHYR_DTS_BINDING_MK64FN1M0VLL12_ 11 12 #define KINETIS_MUX(port, pin, mux) \ 13 (((((port) - 'A') & 0xF) << 28) | \ 14 (((pin) & 0x3F) << 22) | \ 15 (((mux) & 0x7) << 8)) 16 17 #define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */ 18 #define UART0_COL_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */ 19 #define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */ 20 #define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */ 21 #define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */ 22 #define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */ 23 #define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */ 24 #define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */ 25 #define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */ 26 #define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */ 27 #define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */ 28 #define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */ 29 #define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */ 30 #define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */ 31 #define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */ 32 #define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */ 33 #define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */ 34 #define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */ 35 #define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */ 36 #define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */ 37 #define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */ 38 #define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */ 39 #define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */ 40 #define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */ 41 #define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */ 42 #define RMII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */ 43 #define MII0_RXER_PTA5 KINETIS_MUX('A',5,4) /* PTA5 */ 44 #define CMP2_OUT_PTA5 KINETIS_MUX('A',5,5) /* PTA5 */ 45 #define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */ 46 #define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */ 47 #define CMP2_IN0_PTA12 KINETIS_MUX('A',12,0) /* PTA12 */ 48 #define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */ 49 #define CAN0_TX_PTA12 KINETIS_MUX('A',12,2) /* PTA12 */ 50 #define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */ 51 #define MII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */ 52 #define RMII0_RXD1_PTA12 KINETIS_MUX('A',12,4) /* PTA12 */ 53 #define I2C2_SCL_PTA12 KINETIS_MUX('A',12,5) /* PTA12 */ 54 #define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */ 55 #define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */ 56 #define CMP2_IN1_PTA13 KINETIS_MUX('A',13,0) /* PTA13 */ 57 #define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */ 58 #define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */ 59 #define CAN0_RX_PTA13 KINETIS_MUX('A',13,2) /* PTA13 */ 60 #define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */ 61 #define MII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */ 62 #define RMII0_RXD0_PTA13 KINETIS_MUX('A',13,4) /* PTA13 */ 63 #define I2C2_SDA_PTA13 KINETIS_MUX('A',13,5) /* PTA13 */ 64 #define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */ 65 #define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */ 66 #define PTA14 KINETIS_MUX('A',14,1) /* PTA14 */ 67 #define SPI0_PCS0_PTA14 KINETIS_MUX('A',14,2) /* PTA14 */ 68 #define UART0_TX_PTA14 KINETIS_MUX('A',14,3) /* PTA14 */ 69 #define RMII0_CRS_DV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */ 70 #define MII0_RXDV_PTA14 KINETIS_MUX('A',14,4) /* PTA14 */ 71 #define I2C2_SCL_PTA14 KINETIS_MUX('A',14,5) /* PTA14 */ 72 #define I2S0_RX_BCLK_PTA14 KINETIS_MUX('A',14,6) /* PTA14 */ 73 #define I2S0_TXD1_PTA14 KINETIS_MUX('A',14,7) /* PTA14 */ 74 #define PTA15 KINETIS_MUX('A',15,1) /* PTA15 */ 75 #define SPI0_SCK_PTA15 KINETIS_MUX('A',15,2) /* PTA15 */ 76 #define UART0_RX_PTA15 KINETIS_MUX('A',15,3) /* PTA15 */ 77 #define RMII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */ 78 #define MII0_TXEN_PTA15 KINETIS_MUX('A',15,4) /* PTA15 */ 79 #define I2S0_RXD0_PTA15 KINETIS_MUX('A',15,6) /* PTA15 */ 80 #define PTA16 KINETIS_MUX('A',16,1) /* PTA16 */ 81 #define SPI0_SOUT_PTA16 KINETIS_MUX('A',16,2) /* PTA16 */ 82 #define UART0_COL_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */ 83 #define UART0_CTS_b_PTA16 KINETIS_MUX('A',16,3) /* PTA16 */ 84 #define RMII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */ 85 #define MII0_TXD0_PTA16 KINETIS_MUX('A',16,4) /* PTA16 */ 86 #define I2S0_RX_FS_PTA16 KINETIS_MUX('A',16,6) /* PTA16 */ 87 #define I2S0_RXD1_PTA16 KINETIS_MUX('A',16,7) /* PTA16 */ 88 #define ADC1_SE17_PTA17 KINETIS_MUX('A',17,0) /* PTA17 */ 89 #define PTA17 KINETIS_MUX('A',17,1) /* PTA17 */ 90 #define SPI0_SIN_PTA17 KINETIS_MUX('A',17,2) /* PTA17 */ 91 #define UART0_RTS_b_PTA17 KINETIS_MUX('A',17,3) /* PTA17 */ 92 #define RMII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */ 93 #define MII0_TXD1_PTA17 KINETIS_MUX('A',17,4) /* PTA17 */ 94 #define I2S0_MCLK_PTA17 KINETIS_MUX('A',17,6) /* PTA17 */ 95 #define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */ 96 #define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */ 97 #define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */ 98 #define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */ 99 #define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */ 100 #define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */ 101 #define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */ 102 #define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */ 103 #define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */ 104 #define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */ 105 #define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */ 106 #define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */ 107 #define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */ 108 #define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */ 109 #define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */ 110 #define MII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */ 111 #define RMII0_MDIO_PTB0 KINETIS_MUX('B',0,4) /* PTB0 */ 112 #define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */ 113 #define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */ 114 #define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */ 115 #define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */ 116 #define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */ 117 #define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */ 118 #define MII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */ 119 #define RMII0_MDC_PTB1 KINETIS_MUX('B',1,4) /* PTB1 */ 120 #define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */ 121 #define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */ 122 #define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */ 123 #define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */ 124 #define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */ 125 #define ENET0_1588_TMR0_PTB2 KINETIS_MUX('B',2,4) /* PTB2 */ 126 #define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */ 127 #define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */ 128 #define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */ 129 #define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */ 130 #define UART0_COL_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */ 131 #define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */ 132 #define ENET0_1588_TMR1_PTB3 KINETIS_MUX('B',3,4) /* PTB3 */ 133 #define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */ 134 #define PTB9 KINETIS_MUX('B',9,1) /* PTB9 */ 135 #define SPI1_PCS1_PTB9 KINETIS_MUX('B',9,2) /* PTB9 */ 136 #define UART3_CTS_b_PTB9 KINETIS_MUX('B',9,3) /* PTB9 */ 137 #define ADC1_SE14_PTB10 KINETIS_MUX('B',10,0) /* PTB10 */ 138 #define PTB10 KINETIS_MUX('B',10,1) /* PTB10 */ 139 #define SPI1_PCS0_PTB10 KINETIS_MUX('B',10,2) /* PTB10 */ 140 #define UART3_RX_PTB10 KINETIS_MUX('B',10,3) /* PTB10 */ 141 #define FTM0_FLT1_PTB10 KINETIS_MUX('B',10,6) /* PTB10 */ 142 #define ADC1_SE15_PTB11 KINETIS_MUX('B',11,0) /* PTB11 */ 143 #define PTB11 KINETIS_MUX('B',11,1) /* PTB11 */ 144 #define SPI1_SCK_PTB11 KINETIS_MUX('B',11,2) /* PTB11 */ 145 #define UART3_TX_PTB11 KINETIS_MUX('B',11,3) /* PTB11 */ 146 #define FTM0_FLT2_PTB11 KINETIS_MUX('B',11,6) /* PTB11 */ 147 #define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */ 148 #define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */ 149 #define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */ 150 #define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */ 151 #define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */ 152 #define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */ 153 #define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */ 154 #define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */ 155 #define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */ 156 #define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */ 157 #define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */ 158 #define CAN0_TX_PTB18 KINETIS_MUX('B',18,2) /* PTB18 */ 159 #define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */ 160 #define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */ 161 #define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */ 162 #define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */ 163 #define CAN0_RX_PTB19 KINETIS_MUX('B',19,2) /* PTB19 */ 164 #define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */ 165 #define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */ 166 #define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */ 167 #define PTB20 KINETIS_MUX('B',20,1) /* PTB20 */ 168 #define SPI2_PCS0_PTB20 KINETIS_MUX('B',20,2) /* PTB20 */ 169 #define CMP0_OUT_PTB20 KINETIS_MUX('B',20,6) /* PTB20 */ 170 #define PTB21 KINETIS_MUX('B',21,1) /* PTB21 */ 171 #define SPI2_SCK_PTB21 KINETIS_MUX('B',21,2) /* PTB21 */ 172 #define CMP1_OUT_PTB21 KINETIS_MUX('B',21,6) /* PTB21 */ 173 #define PTB22 KINETIS_MUX('B',22,1) /* PTB22 */ 174 #define SPI2_SOUT_PTB22 KINETIS_MUX('B',22,2) /* PTB22 */ 175 #define CMP2_OUT_PTB22 KINETIS_MUX('B',22,6) /* PTB22 */ 176 #define PTB23 KINETIS_MUX('B',23,1) /* PTB23 */ 177 #define SPI2_SIN_PTB23 KINETIS_MUX('B',23,2) /* PTB23 */ 178 #define SPI0_PCS5_PTB23 KINETIS_MUX('B',23,3) /* PTB23 */ 179 #define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */ 180 #define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */ 181 #define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */ 182 #define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */ 183 #define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */ 184 #define I2S0_TXD1_PTC0 KINETIS_MUX('C',0,6) /* PTC0 */ 185 #define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */ 186 #define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */ 187 #define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */ 188 #define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */ 189 #define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */ 190 #define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */ 191 #define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */ 192 #define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */ 193 #define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */ 194 #define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */ 195 #define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */ 196 #define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */ 197 #define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */ 198 #define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */ 199 #define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */ 200 #define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */ 201 #define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */ 202 #define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */ 203 #define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */ 204 #define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */ 205 #define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */ 206 #define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */ 207 #define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */ 208 #define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */ 209 #define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */ 210 #define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */ 211 #define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */ 212 #define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */ 213 #define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */ 214 #define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */ 215 #define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */ 216 #define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */ 217 #define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */ 218 #define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */ 219 #define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */ 220 #define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */ 221 #define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */ 222 #define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */ 223 #define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */ 224 #define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */ 225 #define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */ 226 #define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */ 227 #define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */ 228 #define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */ 229 #define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */ 230 #define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */ 231 #define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */ 232 #define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */ 233 #define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */ 234 #define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */ 235 #define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */ 236 #define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */ 237 #define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */ 238 #define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */ 239 #define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */ 240 #define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */ 241 #define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */ 242 #define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */ 243 #define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */ 244 #define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */ 245 #define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */ 246 #define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */ 247 #define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */ 248 #define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */ 249 #define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */ 250 #define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */ 251 #define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */ 252 #define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */ 253 #define I2S0_RXD1_PTC11 KINETIS_MUX('C',11,4) /* PTC11 */ 254 #define PTC12 KINETIS_MUX('C',12,1) /* PTC12 */ 255 #define UART4_RTS_b_PTC12 KINETIS_MUX('C',12,3) /* PTC12 */ 256 #define FTM3_FLT0_PTC12 KINETIS_MUX('C',12,6) /* PTC12 */ 257 #define PTC13 KINETIS_MUX('C',13,1) /* PTC13 */ 258 #define UART4_CTS_b_PTC13 KINETIS_MUX('C',13,3) /* PTC13 */ 259 #define PTC14 KINETIS_MUX('C',14,1) /* PTC14 */ 260 #define UART4_RX_PTC14 KINETIS_MUX('C',14,3) /* PTC14 */ 261 #define PTC15 KINETIS_MUX('C',15,1) /* PTC15 */ 262 #define UART4_TX_PTC15 KINETIS_MUX('C',15,3) /* PTC15 */ 263 #define PTC16 KINETIS_MUX('C',16,1) /* PTC16 */ 264 #define UART3_RX_PTC16 KINETIS_MUX('C',16,3) /* PTC16 */ 265 #define ENET0_1588_TMR0_PTC16 KINETIS_MUX('C',16,4) /* PTC16 */ 266 #define PTC17 KINETIS_MUX('C',17,1) /* PTC17 */ 267 #define UART3_TX_PTC17 KINETIS_MUX('C',17,3) /* PTC17 */ 268 #define ENET0_1588_TMR1_PTC17 KINETIS_MUX('C',17,4) /* PTC17 */ 269 #define PTC18 KINETIS_MUX('C',18,1) /* PTC18 */ 270 #define UART3_RTS_b_PTC18 KINETIS_MUX('C',18,3) /* PTC18 */ 271 #define ENET0_1588_TMR2_PTC18 KINETIS_MUX('C',18,4) /* PTC18 */ 272 #define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */ 273 #define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */ 274 #define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */ 275 #define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */ 276 #define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */ 277 #define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */ 278 #define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */ 279 #define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */ 280 #define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */ 281 #define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */ 282 #define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */ 283 #define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */ 284 #define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */ 285 #define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */ 286 #define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */ 287 #define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */ 288 #define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */ 289 #define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */ 290 #define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */ 291 #define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */ 292 #define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */ 293 #define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */ 294 #define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */ 295 #define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */ 296 #define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */ 297 #define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */ 298 #define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */ 299 #define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */ 300 #define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */ 301 #define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */ 302 #define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */ 303 #define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */ 304 #define UART0_COL_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */ 305 #define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */ 306 #define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */ 307 #define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */ 308 #define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */ 309 #define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */ 310 #define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */ 311 #define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */ 312 #define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */ 313 #define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */ 314 #define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */ 315 #define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */ 316 #define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */ 317 #define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */ 318 #define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */ 319 #define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */ 320 #define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */ 321 #define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */ 322 #define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */ 323 #define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */ 324 #define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */ 325 #define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */ 326 #define SDHC0_D1_PTE0 KINETIS_MUX('E',0,4) /* PTE0 */ 327 #define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */ 328 #define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */ 329 #define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */ 330 #define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */ 331 #define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */ 332 #define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */ 333 #define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */ 334 #define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */ 335 #define SDHC0_D0_PTE1 KINETIS_MUX('E',1,4) /* PTE1 */ 336 #define TRACE_D3_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */ 337 #define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */ 338 #define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */ 339 #define ADC0_DP2_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */ 340 #define ADC1_SE6a_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */ 341 #define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */ 342 #define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */ 343 #define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */ 344 #define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */ 345 #define SDHC0_DCLK_PTE2 KINETIS_MUX('E',2,4) /* PTE2 */ 346 #define TRACE_D2_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */ 347 #define ADC1_SE7a_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */ 348 #define ADC0_DM2_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */ 349 #define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */ 350 #define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */ 351 #define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */ 352 #define SDHC0_CMD_PTE3 KINETIS_MUX('E',3,4) /* PTE3 */ 353 #define TRACE_D1_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */ 354 #define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */ 355 #define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */ 356 #define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */ 357 #define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */ 358 #define UART3_TX_PTE4 KINETIS_MUX('E',4,3) /* PTE4 */ 359 #define SDHC0_D3_PTE4 KINETIS_MUX('E',4,4) /* PTE4 */ 360 #define TRACE_D0_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */ 361 #define PTE5 KINETIS_MUX('E',5,1) /* PTE5 */ 362 #define SPI1_PCS2_PTE5 KINETIS_MUX('E',5,2) /* PTE5 */ 363 #define UART3_RX_PTE5 KINETIS_MUX('E',5,3) /* PTE5 */ 364 #define SDHC0_D2_PTE5 KINETIS_MUX('E',5,4) /* PTE5 */ 365 #define FTM3_CH0_PTE5 KINETIS_MUX('E',5,6) /* PTE5 */ 366 #define PTE6 KINETIS_MUX('E',6,1) /* PTE6 */ 367 #define SPI1_PCS3_PTE6 KINETIS_MUX('E',6,2) /* PTE6 */ 368 #define UART3_CTS_b_PTE6 KINETIS_MUX('E',6,3) /* PTE6 */ 369 #define I2S0_MCLK_PTE6 KINETIS_MUX('E',6,4) /* PTE6 */ 370 #define FTM3_CH1_PTE6 KINETIS_MUX('E',6,6) /* PTE6 */ 371 #define USB_SOF_OUT_PTE6 KINETIS_MUX('E',6,7) /* PTE6 */ 372 #define ADC0_SE17_PTE24 KINETIS_MUX('E',24,0) /* PTE24 */ 373 #define PTE24 KINETIS_MUX('E',24,1) /* PTE24 */ 374 #define UART4_TX_PTE24 KINETIS_MUX('E',24,3) /* PTE24 */ 375 #define I2C0_SCL_PTE24 KINETIS_MUX('E',24,5) /* PTE24 */ 376 #define EWM_OUT_b_PTE24 KINETIS_MUX('E',24,6) /* PTE24 */ 377 #define ADC0_SE18_PTE25 KINETIS_MUX('E',25,0) /* PTE25 */ 378 #define PTE25 KINETIS_MUX('E',25,1) /* PTE25 */ 379 #define UART4_RX_PTE25 KINETIS_MUX('E',25,3) /* PTE25 */ 380 #define I2C0_SDA_PTE25 KINETIS_MUX('E',25,5) /* PTE25 */ 381 #define EWM_IN_PTE25 KINETIS_MUX('E',25,6) /* PTE25 */ 382 #define PTE26 KINETIS_MUX('E',26,1) /* PTE26 */ 383 #define ENET_1588_CLKIN_PTE26 KINETIS_MUX('E',26,2) /* PTE26 */ 384 #define UART4_CTS_b_PTE26 KINETIS_MUX('E',26,3) /* PTE26 */ 385 #define RTC_CLKOUT_PTE26 KINETIS_MUX('E',26,6) /* PTE26 */ 386 #define USB_CLKIN_PTE26 KINETIS_MUX('E',26,7) /* PTE26 */ 387 #endif 388
