1 /*
2  * NOTE: Autogenerated file by kinetis_signal2dts.py
3  *       for MK22FN512VLH12/signal_configuration.xml
4  *
5  * Copyright (c) 2022, NXP
6  * SPDX-License-Identifier: Apache-2.0
7  */
8 
9 #ifndef _ZEPHYR_DTS_BINDING_MK22FN512VLH12_
10 #define _ZEPHYR_DTS_BINDING_MK22FN512VLH12_
11 
12 #define KINETIS_MUX(port, pin, mux)		\
13 	(((((port) - 'A') & 0xF) << 28) |	\
14 	(((pin) & 0x3F) << 22) |		\
15 	(((mux) & 0x7) << 8))
16 
17 #define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
18 #define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
19 #define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
20 #define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
21 #define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
22 #define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
23 #define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
24 #define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
25 #define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
26 #define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
27 #define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
28 #define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
29 #define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
30 #define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
31 #define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
32 #define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
33 #define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
34 #define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
35 #define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
36 #define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
37 #define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
38 #define PTA5 KINETIS_MUX('A',5,1) /* PTA5 */
39 #define USB_CLKIN_PTA5 KINETIS_MUX('A',5,2) /* PTA5 */
40 #define FTM0_CH2_PTA5 KINETIS_MUX('A',5,3) /* PTA5 */
41 #define I2S0_TX_BCLK_PTA5 KINETIS_MUX('A',5,6) /* PTA5 */
42 #define JTAG_TRST_b_PTA5 KINETIS_MUX('A',5,7) /* PTA5 */
43 #define PTA12 KINETIS_MUX('A',12,1) /* PTA12 */
44 #define FTM1_CH0_PTA12 KINETIS_MUX('A',12,3) /* PTA12 */
45 #define I2S0_TXD0_PTA12 KINETIS_MUX('A',12,6) /* PTA12 */
46 #define FTM1_QD_PHA_PTA12 KINETIS_MUX('A',12,7) /* PTA12 */
47 #define LLWU_P4_PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
48 #define PTA13 KINETIS_MUX('A',13,1) /* PTA13 */
49 #define FTM1_CH1_PTA13 KINETIS_MUX('A',13,3) /* PTA13 */
50 #define I2S0_TX_FS_PTA13 KINETIS_MUX('A',13,6) /* PTA13 */
51 #define FTM1_QD_PHB_PTA13 KINETIS_MUX('A',13,7) /* PTA13 */
52 #define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
53 #define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
54 #define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
55 #define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
56 #define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
57 #define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
58 #define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
59 #define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
60 #define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
61 #define ADC0_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
62 #define ADC1_SE8_PTB0 KINETIS_MUX('B',0,0) /* PTB0 */
63 #define LLWU_P5_PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
64 #define PTB0 KINETIS_MUX('B',0,1) /* PTB0 */
65 #define I2C0_SCL_PTB0 KINETIS_MUX('B',0,2) /* PTB0 */
66 #define FTM1_CH0_PTB0 KINETIS_MUX('B',0,3) /* PTB0 */
67 #define FTM1_QD_PHA_PTB0 KINETIS_MUX('B',0,6) /* PTB0 */
68 #define ADC1_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
69 #define ADC0_SE9_PTB1 KINETIS_MUX('B',1,0) /* PTB1 */
70 #define PTB1 KINETIS_MUX('B',1,1) /* PTB1 */
71 #define I2C0_SDA_PTB1 KINETIS_MUX('B',1,2) /* PTB1 */
72 #define FTM1_CH1_PTB1 KINETIS_MUX('B',1,3) /* PTB1 */
73 #define FTM1_QD_PHB_PTB1 KINETIS_MUX('B',1,6) /* PTB1 */
74 #define ADC0_SE12_PTB2 KINETIS_MUX('B',2,0) /* PTB2 */
75 #define PTB2 KINETIS_MUX('B',2,1) /* PTB2 */
76 #define I2C0_SCL_PTB2 KINETIS_MUX('B',2,2) /* PTB2 */
77 #define UART0_RTS_b_PTB2 KINETIS_MUX('B',2,3) /* PTB2 */
78 #define FTM0_FLT3_PTB2 KINETIS_MUX('B',2,6) /* PTB2 */
79 #define ADC0_SE13_PTB3 KINETIS_MUX('B',3,0) /* PTB3 */
80 #define PTB3 KINETIS_MUX('B',3,1) /* PTB3 */
81 #define I2C0_SDA_PTB3 KINETIS_MUX('B',3,2) /* PTB3 */
82 #define UART0_CTS_b_PTB3 KINETIS_MUX('B',3,3) /* PTB3 */
83 #define FTM0_FLT0_PTB3 KINETIS_MUX('B',3,6) /* PTB3 */
84 #define PTB16 KINETIS_MUX('B',16,1) /* PTB16 */
85 #define SPI1_SOUT_PTB16 KINETIS_MUX('B',16,2) /* PTB16 */
86 #define UART0_RX_PTB16 KINETIS_MUX('B',16,3) /* PTB16 */
87 #define FTM_CLKIN0_PTB16 KINETIS_MUX('B',16,4) /* PTB16 */
88 #define EWM_IN_PTB16 KINETIS_MUX('B',16,6) /* PTB16 */
89 #define PTB17 KINETIS_MUX('B',17,1) /* PTB17 */
90 #define SPI1_SIN_PTB17 KINETIS_MUX('B',17,2) /* PTB17 */
91 #define UART0_TX_PTB17 KINETIS_MUX('B',17,3) /* PTB17 */
92 #define FTM_CLKIN1_PTB17 KINETIS_MUX('B',17,4) /* PTB17 */
93 #define EWM_OUT_b_PTB17 KINETIS_MUX('B',17,6) /* PTB17 */
94 #define PTB18 KINETIS_MUX('B',18,1) /* PTB18 */
95 #define FTM2_CH0_PTB18 KINETIS_MUX('B',18,3) /* PTB18 */
96 #define I2S0_TX_BCLK_PTB18 KINETIS_MUX('B',18,4) /* PTB18 */
97 #define FTM2_QD_PHA_PTB18 KINETIS_MUX('B',18,6) /* PTB18 */
98 #define PTB19 KINETIS_MUX('B',19,1) /* PTB19 */
99 #define FTM2_CH1_PTB19 KINETIS_MUX('B',19,3) /* PTB19 */
100 #define I2S0_TX_FS_PTB19 KINETIS_MUX('B',19,4) /* PTB19 */
101 #define FTM2_QD_PHB_PTB19 KINETIS_MUX('B',19,6) /* PTB19 */
102 #define ADC0_SE14_PTC0 KINETIS_MUX('C',0,0) /* PTC0 */
103 #define PTC0 KINETIS_MUX('C',0,1) /* PTC0 */
104 #define SPI0_PCS4_PTC0 KINETIS_MUX('C',0,2) /* PTC0 */
105 #define PDB0_EXTRG_PTC0 KINETIS_MUX('C',0,3) /* PTC0 */
106 #define USB_SOF_OUT_PTC0 KINETIS_MUX('C',0,4) /* PTC0 */
107 #define ADC0_SE15_PTC1 KINETIS_MUX('C',1,0) /* PTC1 */
108 #define PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
109 #define LLWU_P6_PTC1 KINETIS_MUX('C',1,1) /* PTC1 */
110 #define SPI0_PCS3_PTC1 KINETIS_MUX('C',1,2) /* PTC1 */
111 #define UART1_RTS_b_PTC1 KINETIS_MUX('C',1,3) /* PTC1 */
112 #define FTM0_CH0_PTC1 KINETIS_MUX('C',1,4) /* PTC1 */
113 #define I2S0_TXD0_PTC1 KINETIS_MUX('C',1,6) /* PTC1 */
114 #define LPUART0_RTS_b_PTC1 KINETIS_MUX('C',1,7) /* PTC1 */
115 #define ADC0_SE4b_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
116 #define CMP1_IN0_PTC2 KINETIS_MUX('C',2,0) /* PTC2 */
117 #define PTC2 KINETIS_MUX('C',2,1) /* PTC2 */
118 #define SPI0_PCS2_PTC2 KINETIS_MUX('C',2,2) /* PTC2 */
119 #define UART1_CTS_b_PTC2 KINETIS_MUX('C',2,3) /* PTC2 */
120 #define FTM0_CH1_PTC2 KINETIS_MUX('C',2,4) /* PTC2 */
121 #define I2S0_TX_FS_PTC2 KINETIS_MUX('C',2,6) /* PTC2 */
122 #define LPUART0_CTS_b_PTC2 KINETIS_MUX('C',2,7) /* PTC2 */
123 #define CMP1_IN1_PTC3 KINETIS_MUX('C',3,0) /* PTC3 */
124 #define LLWU_P7_PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
125 #define PTC3 KINETIS_MUX('C',3,1) /* PTC3 */
126 #define SPI0_PCS1_PTC3 KINETIS_MUX('C',3,2) /* PTC3 */
127 #define UART1_RX_PTC3 KINETIS_MUX('C',3,3) /* PTC3 */
128 #define FTM0_CH2_PTC3 KINETIS_MUX('C',3,4) /* PTC3 */
129 #define CLKOUT_PTC3 KINETIS_MUX('C',3,5) /* PTC3 */
130 #define I2S0_TX_BCLK_PTC3 KINETIS_MUX('C',3,6) /* PTC3 */
131 #define LPUART0_RX_PTC3 KINETIS_MUX('C',3,7) /* PTC3 */
132 #define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
133 #define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
134 #define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
135 #define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
136 #define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
137 #define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
138 #define LPUART0_TX_PTC4 KINETIS_MUX('C',4,7) /* PTC4 */
139 #define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
140 #define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
141 #define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
142 #define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
143 #define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
144 #define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
145 #define FTM0_CH2_PTC5 KINETIS_MUX('C',5,7) /* PTC5 */
146 #define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
147 #define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
148 #define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
149 #define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
150 #define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
151 #define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
152 #define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
153 #define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
154 #define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
155 #define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
156 #define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
157 #define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
158 #define ADC1_SE4b_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
159 #define CMP0_IN2_PTC8 KINETIS_MUX('C',8,0) /* PTC8 */
160 #define PTC8 KINETIS_MUX('C',8,1) /* PTC8 */
161 #define FTM3_CH4_PTC8 KINETIS_MUX('C',8,3) /* PTC8 */
162 #define I2S0_MCLK_PTC8 KINETIS_MUX('C',8,4) /* PTC8 */
163 #define CMP0_IN3_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
164 #define ADC1_SE5b_PTC9 KINETIS_MUX('C',9,0) /* PTC9 */
165 #define PTC9 KINETIS_MUX('C',9,1) /* PTC9 */
166 #define FTM3_CH5_PTC9 KINETIS_MUX('C',9,3) /* PTC9 */
167 #define I2S0_RX_BCLK_PTC9 KINETIS_MUX('C',9,4) /* PTC9 */
168 #define FTM2_FLT0_PTC9 KINETIS_MUX('C',9,6) /* PTC9 */
169 #define ADC1_SE6b_PTC10 KINETIS_MUX('C',10,0) /* PTC10 */
170 #define PTC10 KINETIS_MUX('C',10,1) /* PTC10 */
171 #define I2C1_SCL_PTC10 KINETIS_MUX('C',10,2) /* PTC10 */
172 #define FTM3_CH6_PTC10 KINETIS_MUX('C',10,3) /* PTC10 */
173 #define I2S0_RX_FS_PTC10 KINETIS_MUX('C',10,4) /* PTC10 */
174 #define ADC1_SE7b_PTC11 KINETIS_MUX('C',11,0) /* PTC11 */
175 #define LLWU_P11_PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
176 #define PTC11 KINETIS_MUX('C',11,1) /* PTC11 */
177 #define I2C1_SDA_PTC11 KINETIS_MUX('C',11,2) /* PTC11 */
178 #define FTM3_CH7_PTC11 KINETIS_MUX('C',11,3) /* PTC11 */
179 #define LLWU_P12_PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
180 #define PTD0 KINETIS_MUX('D',0,1) /* PTD0 */
181 #define SPI0_PCS0_PTD0 KINETIS_MUX('D',0,2) /* PTD0 */
182 #define UART2_RTS_b_PTD0 KINETIS_MUX('D',0,3) /* PTD0 */
183 #define FTM3_CH0_PTD0 KINETIS_MUX('D',0,4) /* PTD0 */
184 #define LPUART0_RTS_b_PTD0 KINETIS_MUX('D',0,6) /* PTD0 */
185 #define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
186 #define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
187 #define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
188 #define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
189 #define FTM3_CH1_PTD1 KINETIS_MUX('D',1,4) /* PTD1 */
190 #define LPUART0_CTS_b_PTD1 KINETIS_MUX('D',1,6) /* PTD1 */
191 #define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
192 #define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
193 #define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
194 #define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
195 #define FTM3_CH2_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
196 #define LPUART0_RX_PTD2 KINETIS_MUX('D',2,6) /* PTD2 */
197 #define I2C0_SCL_PTD2 KINETIS_MUX('D',2,7) /* PTD2 */
198 #define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
199 #define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
200 #define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
201 #define FTM3_CH3_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
202 #define LPUART0_TX_PTD3 KINETIS_MUX('D',3,6) /* PTD3 */
203 #define I2C0_SDA_PTD3 KINETIS_MUX('D',3,7) /* PTD3 */
204 #define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
205 #define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
206 #define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
207 #define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
208 #define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
209 #define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
210 #define SPI1_PCS0_PTD4 KINETIS_MUX('D',4,7) /* PTD4 */
211 #define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
212 #define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
213 #define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
214 #define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
215 #define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
216 #define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
217 #define SPI1_SCK_PTD5 KINETIS_MUX('D',5,7) /* PTD5 */
218 #define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
219 #define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
220 #define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
221 #define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
222 #define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
223 #define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
224 #define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
225 #define SPI1_SOUT_PTD6 KINETIS_MUX('D',6,7) /* PTD6 */
226 #define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
227 #define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
228 #define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
229 #define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
230 #define SPI1_SIN_PTD7 KINETIS_MUX('D',7,7) /* PTD7 */
231 #define ADC1_SE4a_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
232 #define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
233 #define CLKOUT32K_PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
234 #define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
235 #define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
236 #define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
237 #define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
238 #define ADC1_SE5a_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
239 #define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
240 #define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
241 #define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
242 #define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
243 #define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
244 #define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
245 #endif
246