1# MCUXpresso Pin Control Generation Scripts
2
3These scripts aid in the generation of pin control data NXP platforms. The
4scripts currently support most i.MX RT processors, and some LPC and Kinetis
5processors
6
7| Script                     | Functionality                               |
8| -------------------------- | ------------------------------------------- |
9| `gen_board_pinctrl.py`     | Generates pin control dtsi files for boards |
10| `gen_soc_headers.py`       | Generates pin control dtsi files defining SOC pinmux settings |
11
12## Requirements
13
14All scripts here utilize files generated by with [MCUXpresso Config
15tools v13](https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/mcuxpresso-config-tools-pins-clocks-peripherals:MCUXpresso-Config-Tools),
16and version 13 data packs downloaded from
17[MCUXpresso SDK builder](https://mcuxpresso.nxp.com/en/select_config_tools_data)
18No other version of MCUXpresso Config tools is supported.
19MCUXpresso config tools data sources must be provided to this tool, see below
20for documentation on how to download data sources.
21
22
23## Supported SOCs
24
25The following SOC lines are supported:
26- i.MX RT10xx series
27- i.MX RT11xx series
28- i.MX RT6xx series
29- i.MX RT5xx series
30- Kinetis K8x, K6x, K2x series
31- LPC55(S)xx series
32
33Other SOCs may function with this tooling, but are not explicitly supported.
34See [unsupported SOCs](#unsupported-socs) for more information.
35
36## Data Packs
37Data packs for processors can be downloaded from
38[NXP's MCUXpresso SDK builder](https://mcuxpresso.nxp.com/en/select_config_tools_data).
39Select the "offline data"
40section under "MCUXpresso Config Tools" in the sidebar, and locate your
41processor to download the relevant data pack. Make sure you select version 13.
42The scripts will use this archive directly, and it does not need to be extracted.
43
44## Board Pin Control Generation
45
46To generate pin control files for a board, first generate a board settings file,
47(also known as a MEX file) for the specific board. Populate board level
48functional groups with pin control groups. Then, run the following command:
49
50```
51python gen_board_pinctrl.py ${path_to_mex_file} ${path_to_data_pack}
52```
53
54Replacing `${path_to_data_pack}` and `${path_to_mex_file}` with the paths to
55your MCUXpresso config tools data source, and board settings file respectively.
56
57### Examples
58
59The following command will generate board pin control data for the
60RT1060 EVK, based on an RT1060 EVK mex file created with MCUXpresso config
61tools:
62
63```
64python gen_board_pinctrl.py mimxrt1060_evk.mex MIMXRT1062xxxxA_ConfigTools_data.zip
65```
66
67The user can also output the pin control files to a custom path:
68```
69python gen_board_pinctrl.py mimxrt1060_evk.mex MIMXRT1062xxxxA_ConfigTools_data-v13.zip \
70        --board-output ~/zephyrproject/zephyr/boards/arm/mimxrt1060_evk/mimxrt1060_evk-pinctrl.dtsi
71```
72
73## SOC Pin Control Definition Generation
74
75To generate pin control definitions for a new SOC not presently supported by
76Zephyr, download the relevant data pack for your SOC, and run the following
77script:
78
79```
80python gen_soc_headers.py ${path_to_data_pack}
81```
82
83Replacing `${path_to_data_pack}` with the path to your MCUXpresso config tools
84data pack.
85
86
87### Examples
88
89The following command will generate SOC pin control data for the RT1062xxxxA:
90
91```
92python gen_soc_headers.py MIMXRT1062xxxxA_ConfigTools_data.zip
93```
94
95The user can also specify a directory to output all SOC pin control data
96files into:
97
98```
99python gen_soc_headers.py MIMXRT1062xxxxA_ConfigTools_data-v13.zip \
100        --soc-output ~/zephyrproject/modules/hal/nxp/dts/nxp/nxp_imx/rt/
101```
102
103## Unsupported SOCs
104
105This tooling may support more NXP SOCs than those explicitly supported
106above. The tooling is aware of three families of pin controllers:
107
108| Family    | Description                                                     |
109| --------- | --------------------------------------------------------------- |
110| IOMUX     | i.MX heritage, present on some i.MX SOCs as well as i.MX RT1xxx |
111| IOCON     | LPC heritage, present on LPC SOCs and some i.MX RT              |
112| PORT      | Kinetis heritage, present on most Kinetis SOCs                  |
113
114
115If your SOC is not explicitly supported, you can run the tooling with
116the `--controller` option in order to attempt to generate pin control data:
117
118```
119python gen_board_pinctrl.py LPCXpresso54114.mex LPC54114J256_ConfigTools_data.zip \
120        --controller IOCON
121```
122