1/*
2 * Copyright (c) 2022, NXP
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Note: File generated by imx_cfg_utils.py
6 * from configuration data for MIMX8ML8DVNLZ
7 */
8
9/*
10 * SOC level pinctrl defintions
11 * These definitions define SOC level defaults for each pin,
12 * and select the pinmux for the pin. Pinmux entries are a tuple of:
13 * <mux_register mux_mode input_register input_daisy config_register>
14 * the mux_register and input_daisy reside in the IOMUXC peripheral, and
15 * the pinctrl driver will write the mux_mode and input_daisy values into
16 * each register, respectively. The config_register is used to configure
17 * the pin based on the devicetree properties set
18 */
19
20
21/* temporary file created by maunal as MCUXpresso Config Tools still can't support imx93 */
22
23&iomuxc {
24	/omit-if-no-ref/ iomuxc_uart2_rxd_uart_rx_uart2_rx: IOMUXC_UART2_RXD_UART_RX_UART2_RX {
25		pinmux = <0x443C0188 0 0x0 0 0x443c0338>;
26	};
27	/omit-if-no-ref/ iomuxc_uart2_txd_uart_tx_uart2_tx: IOMUXC_UART2_TXD_UART_TX_UART2_TX {
28		pinmux = <0x443C018c 0 0x0 0 0x443c033c>;
29	};
30};
31