1/*
2 * Copyright 2022 NXP
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6/*
7 * generated by parsing IOMUXC header file definition
8 * pin control definitions are a tuple of
9 * <mux_reg mux_val input_reg input_val cfg_reg>
10 */
11
12&iomuxc {
13	/omit-if-no-ref/ mx6sx_pad_gpio1_io00__i2c1_scl: MX6SX_PAD_GPIO1_IO00__I2C1_SCL {
14		pinmux = <0x420e0014 0 0x420e07a8 1 0x420e035c>;
15	};
16	/omit-if-no-ref/ mx6sx_pad_gpio1_io00__usdhc1_vselect: MX6SX_PAD_GPIO1_IO00__USDHC1_VSELECT {
17		pinmux = <0x420e0014 1 0x420e0000 0 0x420e035c>;
18	};
19	/omit-if-no-ref/ mx6sx_pad_gpio1_io00__spdif_lock: MX6SX_PAD_GPIO1_IO00__SPDIF_LOCK {
20		pinmux = <0x420e0014 2 0x420e0000 0 0x420e035c>;
21	};
22	/omit-if-no-ref/ mx6sx_pad_gpio1_io00__ccm_wait: MX6SX_PAD_GPIO1_IO00__CCM_WAIT {
23		pinmux = <0x420e0014 3 0x420e0000 0 0x420e035c>;
24	};
25	/omit-if-no-ref/ mx6sx_pad_gpio1_io00__wdog1_wdog_any: MX6SX_PAD_GPIO1_IO00__WDOG1_WDOG_ANY {
26		pinmux = <0x420e0014 4 0x420e0000 0 0x420e035c>;
27	};
28	/omit-if-no-ref/ mx6sx_pad_gpio1_io00__gpio1_io_0: MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0 {
29		pinmux = <0x420e0014 5 0x420e0000 0 0x420e035c>;
30	};
31	/omit-if-no-ref/ mx6sx_pad_gpio1_io00__snvs_hp_wrapper_vio_5: MX6SX_PAD_GPIO1_IO00__SNVS_HP_WRAPPER_VIO_5 {
32		pinmux = <0x420e0014 6 0x420e0000 0 0x420e035c>;
33	};
34	/omit-if-no-ref/ mx6sx_pad_gpio1_io00__phy_dtb_1: MX6SX_PAD_GPIO1_IO00__PHY_DTB_1 {
35		pinmux = <0x420e0014 7 0x420e0000 0 0x420e035c>;
36	};
37	/omit-if-no-ref/ mx6sx_pad_gpio1_io01__i2c1_sda: MX6SX_PAD_GPIO1_IO01__I2C1_SDA {
38		pinmux = <0x420e0018 0 0x420e07ac 1 0x420e0360>;
39	};
40	/omit-if-no-ref/ mx6sx_pad_gpio1_io01__usdhc1_reset_b: MX6SX_PAD_GPIO1_IO01__USDHC1_RESET_B {
41		pinmux = <0x420e0018 1 0x420e0000 0 0x420e0360>;
42	};
43	/omit-if-no-ref/ mx6sx_pad_gpio1_io01__spdif_sr_clk: MX6SX_PAD_GPIO1_IO01__SPDIF_SR_CLK {
44		pinmux = <0x420e0018 2 0x420e0000 0 0x420e0360>;
45	};
46	/omit-if-no-ref/ mx6sx_pad_gpio1_io01__ccm_stop: MX6SX_PAD_GPIO1_IO01__CCM_STOP {
47		pinmux = <0x420e0018 3 0x420e0000 0 0x420e0360>;
48	};
49	/omit-if-no-ref/ mx6sx_pad_gpio1_io01__wdog3_wdog_b: MX6SX_PAD_GPIO1_IO01__WDOG3_WDOG_B {
50		pinmux = <0x420e0018 4 0x420e0000 0 0x420e0360>;
51	};
52	/omit-if-no-ref/ mx6sx_pad_gpio1_io01__gpio1_io_1: MX6SX_PAD_GPIO1_IO01__GPIO1_IO_1 {
53		pinmux = <0x420e0018 5 0x420e0000 0 0x420e0360>;
54	};
55	/omit-if-no-ref/ mx6sx_pad_gpio1_io01__snvs_hp_wrapper_vio_5_ctl: MX6SX_PAD_GPIO1_IO01__SNVS_HP_WRAPPER_VIO_5_CTL {
56		pinmux = <0x420e0018 6 0x420e0000 0 0x420e0360>;
57	};
58	/omit-if-no-ref/ mx6sx_pad_gpio1_io01__phy_dtb_0: MX6SX_PAD_GPIO1_IO01__PHY_DTB_0 {
59		pinmux = <0x420e0018 7 0x420e0000 0 0x420e0360>;
60	};
61	/omit-if-no-ref/ mx6sx_pad_gpio1_io02__i2c2_scl: MX6SX_PAD_GPIO1_IO02__I2C2_SCL {
62		pinmux = <0x420e001c 0 0x420e07b0 1 0x420e0364>;
63	};
64	/omit-if-no-ref/ mx6sx_pad_gpio1_io02__usdhc1_cd_b: MX6SX_PAD_GPIO1_IO02__USDHC1_CD_B {
65		pinmux = <0x420e001c 1 0x420e0864 1 0x420e0364>;
66	};
67	/omit-if-no-ref/ mx6sx_pad_gpio1_io02__csi2_mclk: MX6SX_PAD_GPIO1_IO02__CSI2_MCLK {
68		pinmux = <0x420e001c 2 0x420e0000 0 0x420e0364>;
69	};
70	/omit-if-no-ref/ mx6sx_pad_gpio1_io02__ccm_di0_ext_clk: MX6SX_PAD_GPIO1_IO02__CCM_DI0_EXT_CLK {
71		pinmux = <0x420e001c 3 0x420e0000 0 0x420e0364>;
72	};
73	/omit-if-no-ref/ mx6sx_pad_gpio1_io02__wdog1_wdog_b: MX6SX_PAD_GPIO1_IO02__WDOG1_WDOG_B {
74		pinmux = <0x420e001c 4 0x420e0000 0 0x420e0364>;
75	};
76	/omit-if-no-ref/ mx6sx_pad_gpio1_io02__gpio1_io_2: MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2 {
77		pinmux = <0x420e001c 5 0x420e0000 0 0x420e0364>;
78	};
79	/omit-if-no-ref/ mx6sx_pad_gpio1_io02__ccm_ref_en_b: MX6SX_PAD_GPIO1_IO02__CCM_REF_EN_B {
80		pinmux = <0x420e001c 6 0x420e0000 0 0x420e0364>;
81	};
82	/omit-if-no-ref/ mx6sx_pad_gpio1_io02__phy_tdi: MX6SX_PAD_GPIO1_IO02__PHY_TDI {
83		pinmux = <0x420e001c 7 0x420e0000 0 0x420e0364>;
84	};
85	/omit-if-no-ref/ mx6sx_pad_gpio1_io03__i2c2_sda: MX6SX_PAD_GPIO1_IO03__I2C2_SDA {
86		pinmux = <0x420e0020 0 0x420e07b4 1 0x420e0368>;
87	};
88	/omit-if-no-ref/ mx6sx_pad_gpio1_io03__usdhc1_wp: MX6SX_PAD_GPIO1_IO03__USDHC1_WP {
89		pinmux = <0x420e0020 1 0x420e0868 1 0x420e0368>;
90	};
91	/omit-if-no-ref/ mx6sx_pad_gpio1_io03__enet1_ref_clk_25m: MX6SX_PAD_GPIO1_IO03__ENET1_REF_CLK_25M {
92		pinmux = <0x420e0020 2 0x420e0000 0 0x420e0368>;
93	};
94	/omit-if-no-ref/ mx6sx_pad_gpio1_io03__ccm_di1_ext_clk: MX6SX_PAD_GPIO1_IO03__CCM_DI1_EXT_CLK {
95		pinmux = <0x420e0020 3 0x420e0000 0 0x420e0368>;
96	};
97	/omit-if-no-ref/ mx6sx_pad_gpio1_io03__wdog2_wdog_b: MX6SX_PAD_GPIO1_IO03__WDOG2_WDOG_B {
98		pinmux = <0x420e0020 4 0x420e0000 0 0x420e0368>;
99	};
100	/omit-if-no-ref/ mx6sx_pad_gpio1_io03__gpio1_io_3: MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3 {
101		pinmux = <0x420e0020 5 0x420e0000 0 0x420e0368>;
102	};
103	/omit-if-no-ref/ mx6sx_pad_gpio1_io03__ccm_pll3_byp: MX6SX_PAD_GPIO1_IO03__CCM_PLL3_BYP {
104		pinmux = <0x420e0020 6 0x420e0000 0 0x420e0368>;
105	};
106	/omit-if-no-ref/ mx6sx_pad_gpio1_io03__phy_tck: MX6SX_PAD_GPIO1_IO03__PHY_TCK {
107		pinmux = <0x420e0020 7 0x420e0000 0 0x420e0368>;
108	};
109	/omit-if-no-ref/ mx6sx_pad_gpio1_io04__uart1_dce_tx: MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX {
110		pinmux = <0x420e0024 0 0x420e0000 0 0x420e036c>;
111	};
112	/omit-if-no-ref/ mx6sx_pad_gpio1_io04__uart1_dte_rx: MX6SX_PAD_GPIO1_IO04__UART1_DTE_RX {
113		pinmux = <0x420e0024 0 0x420e0830 0 0x420e036c>;
114	};
115	/omit-if-no-ref/ mx6sx_pad_gpio1_io04__usdhc2_reset_b: MX6SX_PAD_GPIO1_IO04__USDHC2_RESET_B {
116		pinmux = <0x420e0024 1 0x420e0000 0 0x420e036c>;
117	};
118	/omit-if-no-ref/ mx6sx_pad_gpio1_io04__enet1_mdc: MX6SX_PAD_GPIO1_IO04__ENET1_MDC {
119		pinmux = <0x420e0024 2 0x420e0000 0 0x420e036c>;
120	};
121	/omit-if-no-ref/ mx6sx_pad_gpio1_io04__osc32k_32k_out: MX6SX_PAD_GPIO1_IO04__OSC32K_32K_OUT {
122		pinmux = <0x420e0024 3 0x420e0000 0 0x420e036c>;
123	};
124	/omit-if-no-ref/ mx6sx_pad_gpio1_io04__enet2_ref_clk2: MX6SX_PAD_GPIO1_IO04__ENET2_REF_CLK2 {
125		pinmux = <0x420e0024 4 0x420e076c 0 0x420e036c>;
126	};
127	/omit-if-no-ref/ mx6sx_pad_gpio1_io04__gpio1_io_4: MX6SX_PAD_GPIO1_IO04__GPIO1_IO_4 {
128		pinmux = <0x420e0024 5 0x420e0000 0 0x420e036c>;
129	};
130	/omit-if-no-ref/ mx6sx_pad_gpio1_io04__ccm_pll2_byp: MX6SX_PAD_GPIO1_IO04__CCM_PLL2_BYP {
131		pinmux = <0x420e0024 6 0x420e0000 0 0x420e036c>;
132	};
133	/omit-if-no-ref/ mx6sx_pad_gpio1_io04__phy_tms: MX6SX_PAD_GPIO1_IO04__PHY_TMS {
134		pinmux = <0x420e0024 7 0x420e0000 0 0x420e036c>;
135	};
136	/omit-if-no-ref/ mx6sx_pad_gpio1_io05__uart1_dce_rx: MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX {
137		pinmux = <0x420e0028 0 0x420e0830 1 0x420e0370>;
138	};
139	/omit-if-no-ref/ mx6sx_pad_gpio1_io05__uart1_dte_tx: MX6SX_PAD_GPIO1_IO05__UART1_DTE_TX {
140		pinmux = <0x420e0028 0 0x420e0000 0 0x420e0370>;
141	};
142	/omit-if-no-ref/ mx6sx_pad_gpio1_io05__usdhc2_vselect: MX6SX_PAD_GPIO1_IO05__USDHC2_VSELECT {
143		pinmux = <0x420e0028 1 0x420e0000 0 0x420e0370>;
144	};
145	/omit-if-no-ref/ mx6sx_pad_gpio1_io05__enet1_mdio: MX6SX_PAD_GPIO1_IO05__ENET1_MDIO {
146		pinmux = <0x420e0028 2 0x420e0764 0 0x420e0370>;
147	};
148	/omit-if-no-ref/ mx6sx_pad_gpio1_io05__asrc_asrc_ext_clk: MX6SX_PAD_GPIO1_IO05__ASRC_ASRC_EXT_CLK {
149		pinmux = <0x420e0028 3 0x420e0000 0 0x420e0370>;
150	};
151	/omit-if-no-ref/ mx6sx_pad_gpio1_io05__enet1_ref_clk1: MX6SX_PAD_GPIO1_IO05__ENET1_REF_CLK1 {
152		pinmux = <0x420e0028 4 0x420e0760 0 0x420e0370>;
153	};
154	/omit-if-no-ref/ mx6sx_pad_gpio1_io05__gpio1_io_5: MX6SX_PAD_GPIO1_IO05__GPIO1_IO_5 {
155		pinmux = <0x420e0028 5 0x420e0000 0 0x420e0370>;
156	};
157	/omit-if-no-ref/ mx6sx_pad_gpio1_io05__src_tester_ack: MX6SX_PAD_GPIO1_IO05__SRC_TESTER_ACK {
158		pinmux = <0x420e0028 6 0x420e0000 0 0x420e0370>;
159	};
160	/omit-if-no-ref/ mx6sx_pad_gpio1_io05__phy_tdo: MX6SX_PAD_GPIO1_IO05__PHY_TDO {
161		pinmux = <0x420e0028 7 0x420e0000 0 0x420e0370>;
162	};
163	/omit-if-no-ref/ mx6sx_pad_gpio1_io06__uart2_dce_tx: MX6SX_PAD_GPIO1_IO06__UART2_DCE_TX {
164		pinmux = <0x420e002c 0 0x420e0000 0 0x420e0374>;
165	};
166	/omit-if-no-ref/ mx6sx_pad_gpio1_io06__uart2_dte_rx: MX6SX_PAD_GPIO1_IO06__UART2_DTE_RX {
167		pinmux = <0x420e002c 0 0x420e0838 0 0x420e0374>;
168	};
169	/omit-if-no-ref/ mx6sx_pad_gpio1_io06__usdhc2_cd_b: MX6SX_PAD_GPIO1_IO06__USDHC2_CD_B {
170		pinmux = <0x420e002c 1 0x420e086c 1 0x420e0374>;
171	};
172	/omit-if-no-ref/ mx6sx_pad_gpio1_io06__enet2_mdc: MX6SX_PAD_GPIO1_IO06__ENET2_MDC {
173		pinmux = <0x420e002c 2 0x420e0000 0 0x420e0374>;
174	};
175	/omit-if-no-ref/ mx6sx_pad_gpio1_io06__csi1_mclk: MX6SX_PAD_GPIO1_IO06__CSI1_MCLK {
176		pinmux = <0x420e002c 3 0x420e0000 0 0x420e0374>;
177	};
178	/omit-if-no-ref/ mx6sx_pad_gpio1_io06__uart1_dce_rts: MX6SX_PAD_GPIO1_IO06__UART1_DCE_RTS {
179		pinmux = <0x420e002c 4 0x420e082c 0 0x420e0374>;
180	};
181	/omit-if-no-ref/ mx6sx_pad_gpio1_io06__uart1_dte_cts: MX6SX_PAD_GPIO1_IO06__UART1_DTE_CTS {
182		pinmux = <0x420e002c 4 0x420e0000 0 0x420e0374>;
183	};
184	/omit-if-no-ref/ mx6sx_pad_gpio1_io06__gpio1_io_6: MX6SX_PAD_GPIO1_IO06__GPIO1_IO_6 {
185		pinmux = <0x420e002c 5 0x420e0000 0 0x420e0374>;
186	};
187	/omit-if-no-ref/ mx6sx_pad_gpio1_io06__src_any_pu_reset: MX6SX_PAD_GPIO1_IO06__SRC_ANY_PU_RESET {
188		pinmux = <0x420e002c 6 0x420e0000 0 0x420e0374>;
189	};
190	/omit-if-no-ref/ mx6sx_pad_gpio1_io06__ocotp_ctrl_wrapper_fuse_latched: MX6SX_PAD_GPIO1_IO06__OCOTP_CTRL_WRAPPER_FUSE_LATCHED {
191		pinmux = <0x420e002c 7 0x420e0000 0 0x420e0374>;
192	};
193	/omit-if-no-ref/ mx6sx_pad_gpio1_io07__uart2_dce_rx: MX6SX_PAD_GPIO1_IO07__UART2_DCE_RX {
194		pinmux = <0x420e0030 0 0x420e0838 1 0x420e0378>;
195	};
196	/omit-if-no-ref/ mx6sx_pad_gpio1_io07__uart2_dte_tx: MX6SX_PAD_GPIO1_IO07__UART2_DTE_TX {
197		pinmux = <0x420e0030 0 0x420e0000 0 0x420e0378>;
198	};
199	/omit-if-no-ref/ mx6sx_pad_gpio1_io07__usdhc2_wp: MX6SX_PAD_GPIO1_IO07__USDHC2_WP {
200		pinmux = <0x420e0030 1 0x420e0870 1 0x420e0378>;
201	};
202	/omit-if-no-ref/ mx6sx_pad_gpio1_io07__enet2_mdio: MX6SX_PAD_GPIO1_IO07__ENET2_MDIO {
203		pinmux = <0x420e0030 2 0x420e0770 0 0x420e0378>;
204	};
205	/omit-if-no-ref/ mx6sx_pad_gpio1_io07__audmux_mclk: MX6SX_PAD_GPIO1_IO07__AUDMUX_MCLK {
206		pinmux = <0x420e0030 3 0x420e0000 0 0x420e0378>;
207	};
208	/omit-if-no-ref/ mx6sx_pad_gpio1_io07__uart1_dce_cts: MX6SX_PAD_GPIO1_IO07__UART1_DCE_CTS {
209		pinmux = <0x420e0030 4 0x420e0000 0 0x420e0378>;
210	};
211	/omit-if-no-ref/ mx6sx_pad_gpio1_io07__uart1_dte_rts: MX6SX_PAD_GPIO1_IO07__UART1_DTE_RTS {
212		pinmux = <0x420e0030 4 0x420e082c 1 0x420e0378>;
213	};
214	/omit-if-no-ref/ mx6sx_pad_gpio1_io07__gpio1_io_7: MX6SX_PAD_GPIO1_IO07__GPIO1_IO_7 {
215		pinmux = <0x420e0030 5 0x420e0000 0 0x420e0378>;
216	};
217	/omit-if-no-ref/ mx6sx_pad_gpio1_io07__src_early_reset: MX6SX_PAD_GPIO1_IO07__SRC_EARLY_RESET {
218		pinmux = <0x420e0030 6 0x420e0000 0 0x420e0378>;
219	};
220	/omit-if-no-ref/ mx6sx_pad_gpio1_io07__dcic2_out: MX6SX_PAD_GPIO1_IO07__DCIC2_OUT {
221		pinmux = <0x420e0030 7 0x420e0000 0 0x420e0378>;
222	};
223	/omit-if-no-ref/ mx6sx_pad_gpio1_io07__vdec_debug_44: MX6SX_PAD_GPIO1_IO07__VDEC_DEBUG_44 {
224		pinmux = <0x420e0030 8 0x420e0000 0 0x420e0378>;
225	};
226	/omit-if-no-ref/ mx6sx_pad_gpio1_io08__usb_otg1_oc: MX6SX_PAD_GPIO1_IO08__USB_OTG1_OC {
227		pinmux = <0x420e0034 0 0x420e0860 0 0x420e037c>;
228	};
229	/omit-if-no-ref/ mx6sx_pad_gpio1_io08__wdog1_wdog_b: MX6SX_PAD_GPIO1_IO08__WDOG1_WDOG_B {
230		pinmux = <0x420e0034 1 0x420e0000 0 0x420e037c>;
231	};
232	/omit-if-no-ref/ mx6sx_pad_gpio1_io08__sdma_ext_event_0: MX6SX_PAD_GPIO1_IO08__SDMA_EXT_EVENT_0 {
233		pinmux = <0x420e0034 2 0x420e081c 0 0x420e037c>;
234	};
235	/omit-if-no-ref/ mx6sx_pad_gpio1_io08__ccm_pmic_rdy: MX6SX_PAD_GPIO1_IO08__CCM_PMIC_RDY {
236		pinmux = <0x420e0034 3 0x420e069c 1 0x420e037c>;
237	};
238	/omit-if-no-ref/ mx6sx_pad_gpio1_io08__uart2_dce_rts: MX6SX_PAD_GPIO1_IO08__UART2_DCE_RTS {
239		pinmux = <0x420e0034 4 0x420e0834 0 0x420e037c>;
240	};
241	/omit-if-no-ref/ mx6sx_pad_gpio1_io08__uart2_dte_cts: MX6SX_PAD_GPIO1_IO08__UART2_DTE_CTS {
242		pinmux = <0x420e0034 4 0x420e0000 0 0x420e037c>;
243	};
244	/omit-if-no-ref/ mx6sx_pad_gpio1_io08__gpio1_io_8: MX6SX_PAD_GPIO1_IO08__GPIO1_IO_8 {
245		pinmux = <0x420e0034 5 0x420e0000 0 0x420e037c>;
246	};
247	/omit-if-no-ref/ mx6sx_pad_gpio1_io08__src_system_reset: MX6SX_PAD_GPIO1_IO08__SRC_SYSTEM_RESET {
248		pinmux = <0x420e0034 6 0x420e0000 0 0x420e037c>;
249	};
250	/omit-if-no-ref/ mx6sx_pad_gpio1_io08__dcic1_out: MX6SX_PAD_GPIO1_IO08__DCIC1_OUT {
251		pinmux = <0x420e0034 7 0x420e0000 0 0x420e037c>;
252	};
253	/omit-if-no-ref/ mx6sx_pad_gpio1_io08__vdec_debug_43: MX6SX_PAD_GPIO1_IO08__VDEC_DEBUG_43 {
254		pinmux = <0x420e0034 8 0x420e0000 0 0x420e037c>;
255	};
256	/omit-if-no-ref/ mx6sx_pad_gpio1_io09__usb_otg1_pwr: MX6SX_PAD_GPIO1_IO09__USB_OTG1_PWR {
257		pinmux = <0x420e0038 0 0x420e0000 0 0x420e0380>;
258	};
259	/omit-if-no-ref/ mx6sx_pad_gpio1_io09__wdog2_wdog_b: MX6SX_PAD_GPIO1_IO09__WDOG2_WDOG_B {
260		pinmux = <0x420e0038 1 0x420e0000 0 0x420e0380>;
261	};
262	/omit-if-no-ref/ mx6sx_pad_gpio1_io09__sdma_ext_event_1: MX6SX_PAD_GPIO1_IO09__SDMA_EXT_EVENT_1 {
263		pinmux = <0x420e0038 2 0x420e0820 0 0x420e0380>;
264	};
265	/omit-if-no-ref/ mx6sx_pad_gpio1_io09__ccm_out0: MX6SX_PAD_GPIO1_IO09__CCM_OUT0 {
266		pinmux = <0x420e0038 3 0x420e0000 0 0x420e0380>;
267	};
268	/omit-if-no-ref/ mx6sx_pad_gpio1_io09__uart2_dce_cts: MX6SX_PAD_GPIO1_IO09__UART2_DCE_CTS {
269		pinmux = <0x420e0038 4 0x420e0000 0 0x420e0380>;
270	};
271	/omit-if-no-ref/ mx6sx_pad_gpio1_io09__uart2_dte_rts: MX6SX_PAD_GPIO1_IO09__UART2_DTE_RTS {
272		pinmux = <0x420e0038 4 0x420e0834 1 0x420e0380>;
273	};
274	/omit-if-no-ref/ mx6sx_pad_gpio1_io09__gpio1_io_9: MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 {
275		pinmux = <0x420e0038 5 0x420e0000 0 0x420e0380>;
276	};
277	/omit-if-no-ref/ mx6sx_pad_gpio1_io09__src_int_boot: MX6SX_PAD_GPIO1_IO09__SRC_INT_BOOT {
278		pinmux = <0x420e0038 6 0x420e0000 0 0x420e0380>;
279	};
280	/omit-if-no-ref/ mx6sx_pad_gpio1_io09__observe_mux_out_4: MX6SX_PAD_GPIO1_IO09__OBSERVE_MUX_OUT_4 {
281		pinmux = <0x420e0038 7 0x420e0000 0 0x420e0380>;
282	};
283	/omit-if-no-ref/ mx6sx_pad_gpio1_io09__vdec_debug_42: MX6SX_PAD_GPIO1_IO09__VDEC_DEBUG_42 {
284		pinmux = <0x420e0038 8 0x420e0000 0 0x420e0380>;
285	};
286	/omit-if-no-ref/ mx6sx_pad_gpio1_io10__anatop_otg1_id: MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID {
287		pinmux = <0x420e003c 0 0x420e0624 0 0x420e0384>;
288	};
289	/omit-if-no-ref/ mx6sx_pad_gpio1_io10__spdif_ext_clk: MX6SX_PAD_GPIO1_IO10__SPDIF_EXT_CLK {
290		pinmux = <0x420e003c 1 0x420e0828 0 0x420e0384>;
291	};
292	/omit-if-no-ref/ mx6sx_pad_gpio1_io10__pwm1_out: MX6SX_PAD_GPIO1_IO10__PWM1_OUT {
293		pinmux = <0x420e003c 2 0x420e0000 0 0x420e0384>;
294	};
295	/omit-if-no-ref/ mx6sx_pad_gpio1_io10__ccm_out1: MX6SX_PAD_GPIO1_IO10__CCM_OUT1 {
296		pinmux = <0x420e003c 3 0x420e0000 0 0x420e0384>;
297	};
298	/omit-if-no-ref/ mx6sx_pad_gpio1_io10__csi1_field: MX6SX_PAD_GPIO1_IO10__CSI1_FIELD {
299		pinmux = <0x420e003c 4 0x420e070c 1 0x420e0384>;
300	};
301	/omit-if-no-ref/ mx6sx_pad_gpio1_io10__gpio1_io_10: MX6SX_PAD_GPIO1_IO10__GPIO1_IO_10 {
302		pinmux = <0x420e003c 5 0x420e0000 0 0x420e0384>;
303	};
304	/omit-if-no-ref/ mx6sx_pad_gpio1_io10__csu_csu_int_deb: MX6SX_PAD_GPIO1_IO10__CSU_CSU_INT_DEB {
305		pinmux = <0x420e003c 6 0x420e0000 0 0x420e0384>;
306	};
307	/omit-if-no-ref/ mx6sx_pad_gpio1_io10__observe_mux_out_3: MX6SX_PAD_GPIO1_IO10__OBSERVE_MUX_OUT_3 {
308		pinmux = <0x420e003c 7 0x420e0000 0 0x420e0384>;
309	};
310	/omit-if-no-ref/ mx6sx_pad_gpio1_io10__vdec_debug_41: MX6SX_PAD_GPIO1_IO10__VDEC_DEBUG_41 {
311		pinmux = <0x420e003c 8 0x420e0000 0 0x420e0384>;
312	};
313	/omit-if-no-ref/ mx6sx_pad_gpio1_io11__usb_otg2_oc: MX6SX_PAD_GPIO1_IO11__USB_OTG2_OC {
314		pinmux = <0x420e0040 0 0x420e085c 0 0x420e0388>;
315	};
316	/omit-if-no-ref/ mx6sx_pad_gpio1_io11__spdif_in: MX6SX_PAD_GPIO1_IO11__SPDIF_IN {
317		pinmux = <0x420e0040 1 0x420e0824 2 0x420e0388>;
318	};
319	/omit-if-no-ref/ mx6sx_pad_gpio1_io11__pwm2_out: MX6SX_PAD_GPIO1_IO11__PWM2_OUT {
320		pinmux = <0x420e0040 2 0x420e0000 0 0x420e0388>;
321	};
322	/omit-if-no-ref/ mx6sx_pad_gpio1_io11__ccm_clko1: MX6SX_PAD_GPIO1_IO11__CCM_CLKO1 {
323		pinmux = <0x420e0040 3 0x420e0000 0 0x420e0388>;
324	};
325	/omit-if-no-ref/ mx6sx_pad_gpio1_io11__mlb_data: MX6SX_PAD_GPIO1_IO11__MLB_DATA {
326		pinmux = <0x420e0040 4 0x420e07ec 0 0x420e0388>;
327	};
328	/omit-if-no-ref/ mx6sx_pad_gpio1_io11__gpio1_io_11: MX6SX_PAD_GPIO1_IO11__GPIO1_IO_11 {
329		pinmux = <0x420e0040 5 0x420e0000 0 0x420e0388>;
330	};
331	/omit-if-no-ref/ mx6sx_pad_gpio1_io11__csu_csu_alarm_aut_0: MX6SX_PAD_GPIO1_IO11__CSU_CSU_ALARM_AUT_0 {
332		pinmux = <0x420e0040 6 0x420e0000 0 0x420e0388>;
333	};
334	/omit-if-no-ref/ mx6sx_pad_gpio1_io11__observe_mux_out_2: MX6SX_PAD_GPIO1_IO11__OBSERVE_MUX_OUT_2 {
335		pinmux = <0x420e0040 7 0x420e0000 0 0x420e0388>;
336	};
337	/omit-if-no-ref/ mx6sx_pad_gpio1_io11__vdec_debug_40: MX6SX_PAD_GPIO1_IO11__VDEC_DEBUG_40 {
338		pinmux = <0x420e0040 8 0x420e0000 0 0x420e0388>;
339	};
340	/omit-if-no-ref/ mx6sx_pad_gpio1_io12__usb_otg2_pwr: MX6SX_PAD_GPIO1_IO12__USB_OTG2_PWR {
341		pinmux = <0x420e0044 0 0x420e0000 0 0x420e038c>;
342	};
343	/omit-if-no-ref/ mx6sx_pad_gpio1_io12__spdif_out: MX6SX_PAD_GPIO1_IO12__SPDIF_OUT {
344		pinmux = <0x420e0044 1 0x420e0000 0 0x420e038c>;
345	};
346	/omit-if-no-ref/ mx6sx_pad_gpio1_io12__pwm3_out: MX6SX_PAD_GPIO1_IO12__PWM3_OUT {
347		pinmux = <0x420e0044 2 0x420e0000 0 0x420e038c>;
348	};
349	/omit-if-no-ref/ mx6sx_pad_gpio1_io12__ccm_clko2: MX6SX_PAD_GPIO1_IO12__CCM_CLKO2 {
350		pinmux = <0x420e0044 3 0x420e0000 0 0x420e038c>;
351	};
352	/omit-if-no-ref/ mx6sx_pad_gpio1_io12__mlb_clk: MX6SX_PAD_GPIO1_IO12__MLB_CLK {
353		pinmux = <0x420e0044 4 0x420e07e8 0 0x420e038c>;
354	};
355	/omit-if-no-ref/ mx6sx_pad_gpio1_io12__gpio1_io_12: MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12 {
356		pinmux = <0x420e0044 5 0x420e0000 0 0x420e038c>;
357	};
358	/omit-if-no-ref/ mx6sx_pad_gpio1_io12__csu_csu_alarm_aut_1: MX6SX_PAD_GPIO1_IO12__CSU_CSU_ALARM_AUT_1 {
359		pinmux = <0x420e0044 6 0x420e0000 0 0x420e038c>;
360	};
361	/omit-if-no-ref/ mx6sx_pad_gpio1_io12__observe_mux_out_1: MX6SX_PAD_GPIO1_IO12__OBSERVE_MUX_OUT_1 {
362		pinmux = <0x420e0044 7 0x420e0000 0 0x420e038c>;
363	};
364	/omit-if-no-ref/ mx6sx_pad_gpio1_io12__vdec_debug_39: MX6SX_PAD_GPIO1_IO12__VDEC_DEBUG_39 {
365		pinmux = <0x420e0044 8 0x420e0000 0 0x420e038c>;
366	};
367	/omit-if-no-ref/ mx6sx_pad_gpio1_io13__wdog1_wdog_any: MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY {
368		pinmux = <0x420e0048 0 0x420e0000 0 0x420e0390>;
369	};
370	/omit-if-no-ref/ mx6sx_pad_gpio1_io13__anatop_otg2_id: MX6SX_PAD_GPIO1_IO13__ANATOP_OTG2_ID {
371		pinmux = <0x420e0048 1 0x420e0628 0 0x420e0390>;
372	};
373	/omit-if-no-ref/ mx6sx_pad_gpio1_io13__pwm4_out: MX6SX_PAD_GPIO1_IO13__PWM4_OUT {
374		pinmux = <0x420e0048 2 0x420e0000 0 0x420e0390>;
375	};
376	/omit-if-no-ref/ mx6sx_pad_gpio1_io13__ccm_out2: MX6SX_PAD_GPIO1_IO13__CCM_OUT2 {
377		pinmux = <0x420e0048 3 0x420e0000 0 0x420e0390>;
378	};
379	/omit-if-no-ref/ mx6sx_pad_gpio1_io13__mlb_sig: MX6SX_PAD_GPIO1_IO13__MLB_SIG {
380		pinmux = <0x420e0048 4 0x420e07f0 0 0x420e0390>;
381	};
382	/omit-if-no-ref/ mx6sx_pad_gpio1_io13__gpio1_io_13: MX6SX_PAD_GPIO1_IO13__GPIO1_IO_13 {
383		pinmux = <0x420e0048 5 0x420e0000 0 0x420e0390>;
384	};
385	/omit-if-no-ref/ mx6sx_pad_gpio1_io13__csu_csu_alarm_aut_2: MX6SX_PAD_GPIO1_IO13__CSU_CSU_ALARM_AUT_2 {
386		pinmux = <0x420e0048 6 0x420e0000 0 0x420e0390>;
387	};
388	/omit-if-no-ref/ mx6sx_pad_gpio1_io13__observe_mux_out_0: MX6SX_PAD_GPIO1_IO13__OBSERVE_MUX_OUT_0 {
389		pinmux = <0x420e0048 7 0x420e0000 0 0x420e0390>;
390	};
391	/omit-if-no-ref/ mx6sx_pad_gpio1_io13__vdec_debug_38: MX6SX_PAD_GPIO1_IO13__VDEC_DEBUG_38 {
392		pinmux = <0x420e0048 8 0x420e0000 0 0x420e0390>;
393	};
394	/omit-if-no-ref/ mx6sx_pad_csi_data00__csi1_data_2: MX6SX_PAD_CSI_DATA00__CSI1_DATA_2 {
395		pinmux = <0x420e004c 0 0x420e06a8 0 0x420e0394>;
396	};
397	/omit-if-no-ref/ mx6sx_pad_csi_data00__esai_tx_clk: MX6SX_PAD_CSI_DATA00__ESAI_TX_CLK {
398		pinmux = <0x420e004c 1 0x420e078c 1 0x420e0394>;
399	};
400	/omit-if-no-ref/ mx6sx_pad_csi_data00__audmux_aud6_txc: MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC {
401		pinmux = <0x420e004c 2 0x420e0684 1 0x420e0394>;
402	};
403	/omit-if-no-ref/ mx6sx_pad_csi_data00__i2c1_scl: MX6SX_PAD_CSI_DATA00__I2C1_SCL {
404		pinmux = <0x420e004c 3 0x420e07a8 0 0x420e0394>;
405	};
406	/omit-if-no-ref/ mx6sx_pad_csi_data00__uart6_ri_b: MX6SX_PAD_CSI_DATA00__UART6_RI_B {
407		pinmux = <0x420e004c 4 0x420e0000 0 0x420e0394>;
408	};
409	/omit-if-no-ref/ mx6sx_pad_csi_data00__gpio1_io_14: MX6SX_PAD_CSI_DATA00__GPIO1_IO_14 {
410		pinmux = <0x420e004c 5 0x420e0000 0 0x420e0394>;
411	};
412	/omit-if-no-ref/ mx6sx_pad_csi_data00__weim_data_23: MX6SX_PAD_CSI_DATA00__WEIM_DATA_23 {
413		pinmux = <0x420e004c 6 0x420e0000 0 0x420e0394>;
414	};
415	/omit-if-no-ref/ mx6sx_pad_csi_data00__sai1_tx_bclk: MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK {
416		pinmux = <0x420e004c 7 0x420e0800 0 0x420e0394>;
417	};
418	/omit-if-no-ref/ mx6sx_pad_csi_data00__vadc_data_4: MX6SX_PAD_CSI_DATA00__VADC_DATA_4 {
419		pinmux = <0x420e004c 8 0x420e0000 0 0x420e0394>;
420	};
421	/omit-if-no-ref/ mx6sx_pad_csi_data00__mmdc_debug_37: MX6SX_PAD_CSI_DATA00__MMDC_DEBUG_37 {
422		pinmux = <0x420e004c 9 0x420e0000 0 0x420e0394>;
423	};
424	/omit-if-no-ref/ mx6sx_pad_csi_data01__csi1_data_3: MX6SX_PAD_CSI_DATA01__CSI1_DATA_3 {
425		pinmux = <0x420e0050 0 0x420e06ac 0 0x420e0398>;
426	};
427	/omit-if-no-ref/ mx6sx_pad_csi_data01__esai_tx_fs: MX6SX_PAD_CSI_DATA01__ESAI_TX_FS {
428		pinmux = <0x420e0050 1 0x420e077c 1 0x420e0398>;
429	};
430	/omit-if-no-ref/ mx6sx_pad_csi_data01__audmux_aud6_txfs: MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS {
431		pinmux = <0x420e0050 2 0x420e0688 1 0x420e0398>;
432	};
433	/omit-if-no-ref/ mx6sx_pad_csi_data01__i2c1_sda: MX6SX_PAD_CSI_DATA01__I2C1_SDA {
434		pinmux = <0x420e0050 3 0x420e07ac 0 0x420e0398>;
435	};
436	/omit-if-no-ref/ mx6sx_pad_csi_data01__uart6_dsr_b: MX6SX_PAD_CSI_DATA01__UART6_DSR_B {
437		pinmux = <0x420e0050 4 0x420e0000 0 0x420e0398>;
438	};
439	/omit-if-no-ref/ mx6sx_pad_csi_data01__gpio1_io_15: MX6SX_PAD_CSI_DATA01__GPIO1_IO_15 {
440		pinmux = <0x420e0050 5 0x420e0000 0 0x420e0398>;
441	};
442	/omit-if-no-ref/ mx6sx_pad_csi_data01__weim_data_22: MX6SX_PAD_CSI_DATA01__WEIM_DATA_22 {
443		pinmux = <0x420e0050 6 0x420e0000 0 0x420e0398>;
444	};
445	/omit-if-no-ref/ mx6sx_pad_csi_data01__sai1_tx_sync: MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC {
446		pinmux = <0x420e0050 7 0x420e0804 0 0x420e0398>;
447	};
448	/omit-if-no-ref/ mx6sx_pad_csi_data01__vadc_data_5: MX6SX_PAD_CSI_DATA01__VADC_DATA_5 {
449		pinmux = <0x420e0050 8 0x420e0000 0 0x420e0398>;
450	};
451	/omit-if-no-ref/ mx6sx_pad_csi_data01__mmdc_debug_38: MX6SX_PAD_CSI_DATA01__MMDC_DEBUG_38 {
452		pinmux = <0x420e0050 9 0x420e0000 0 0x420e0398>;
453	};
454	/omit-if-no-ref/ mx6sx_pad_csi_data02__csi1_data_4: MX6SX_PAD_CSI_DATA02__CSI1_DATA_4 {
455		pinmux = <0x420e0054 0 0x420e06b0 0 0x420e039c>;
456	};
457	/omit-if-no-ref/ mx6sx_pad_csi_data02__esai_rx_clk: MX6SX_PAD_CSI_DATA02__ESAI_RX_CLK {
458		pinmux = <0x420e0054 1 0x420e0788 1 0x420e039c>;
459	};
460	/omit-if-no-ref/ mx6sx_pad_csi_data02__audmux_aud6_rxc: MX6SX_PAD_CSI_DATA02__AUDMUX_AUD6_RXC {
461		pinmux = <0x420e0054 2 0x420e067c 1 0x420e039c>;
462	};
463	/omit-if-no-ref/ mx6sx_pad_csi_data02__kpp_col_5: MX6SX_PAD_CSI_DATA02__KPP_COL_5 {
464		pinmux = <0x420e0054 3 0x420e07c8 0 0x420e039c>;
465	};
466	/omit-if-no-ref/ mx6sx_pad_csi_data02__uart6_dtr_b: MX6SX_PAD_CSI_DATA02__UART6_DTR_B {
467		pinmux = <0x420e0054 4 0x420e0000 0 0x420e039c>;
468	};
469	/omit-if-no-ref/ mx6sx_pad_csi_data02__gpio1_io_16: MX6SX_PAD_CSI_DATA02__GPIO1_IO_16 {
470		pinmux = <0x420e0054 5 0x420e0000 0 0x420e039c>;
471	};
472	/omit-if-no-ref/ mx6sx_pad_csi_data02__weim_data_21: MX6SX_PAD_CSI_DATA02__WEIM_DATA_21 {
473		pinmux = <0x420e0054 6 0x420e0000 0 0x420e039c>;
474	};
475	/omit-if-no-ref/ mx6sx_pad_csi_data02__sai1_rx_bclk: MX6SX_PAD_CSI_DATA02__SAI1_RX_BCLK {
476		pinmux = <0x420e0054 7 0x420e07f4 0 0x420e039c>;
477	};
478	/omit-if-no-ref/ mx6sx_pad_csi_data02__vadc_data_6: MX6SX_PAD_CSI_DATA02__VADC_DATA_6 {
479		pinmux = <0x420e0054 8 0x420e0000 0 0x420e039c>;
480	};
481	/omit-if-no-ref/ mx6sx_pad_csi_data02__mmdc_debug_39: MX6SX_PAD_CSI_DATA02__MMDC_DEBUG_39 {
482		pinmux = <0x420e0054 9 0x420e0000 0 0x420e039c>;
483	};
484	/omit-if-no-ref/ mx6sx_pad_csi_data03__csi1_data_5: MX6SX_PAD_CSI_DATA03__CSI1_DATA_5 {
485		pinmux = <0x420e0058 0 0x420e06b4 0 0x420e03a0>;
486	};
487	/omit-if-no-ref/ mx6sx_pad_csi_data03__esai_rx_fs: MX6SX_PAD_CSI_DATA03__ESAI_RX_FS {
488		pinmux = <0x420e0058 1 0x420e0778 1 0x420e03a0>;
489	};
490	/omit-if-no-ref/ mx6sx_pad_csi_data03__audmux_aud6_rxfs: MX6SX_PAD_CSI_DATA03__AUDMUX_AUD6_RXFS {
491		pinmux = <0x420e0058 2 0x420e0680 1 0x420e03a0>;
492	};
493	/omit-if-no-ref/ mx6sx_pad_csi_data03__kpp_row_5: MX6SX_PAD_CSI_DATA03__KPP_ROW_5 {
494		pinmux = <0x420e0058 3 0x420e07d4 0 0x420e03a0>;
495	};
496	/omit-if-no-ref/ mx6sx_pad_csi_data03__uart6_dcd_b: MX6SX_PAD_CSI_DATA03__UART6_DCD_B {
497		pinmux = <0x420e0058 4 0x420e0000 0 0x420e03a0>;
498	};
499	/omit-if-no-ref/ mx6sx_pad_csi_data03__gpio1_io_17: MX6SX_PAD_CSI_DATA03__GPIO1_IO_17 {
500		pinmux = <0x420e0058 5 0x420e0000 0 0x420e03a0>;
501	};
502	/omit-if-no-ref/ mx6sx_pad_csi_data03__weim_data_20: MX6SX_PAD_CSI_DATA03__WEIM_DATA_20 {
503		pinmux = <0x420e0058 6 0x420e0000 0 0x420e03a0>;
504	};
505	/omit-if-no-ref/ mx6sx_pad_csi_data03__sai1_rx_sync: MX6SX_PAD_CSI_DATA03__SAI1_RX_SYNC {
506		pinmux = <0x420e0058 7 0x420e07fc 0 0x420e03a0>;
507	};
508	/omit-if-no-ref/ mx6sx_pad_csi_data03__vadc_data_7: MX6SX_PAD_CSI_DATA03__VADC_DATA_7 {
509		pinmux = <0x420e0058 8 0x420e0000 0 0x420e03a0>;
510	};
511	/omit-if-no-ref/ mx6sx_pad_csi_data03__mmdc_debug_40: MX6SX_PAD_CSI_DATA03__MMDC_DEBUG_40 {
512		pinmux = <0x420e0058 9 0x420e0000 0 0x420e03a0>;
513	};
514	/omit-if-no-ref/ mx6sx_pad_csi_data04__csi1_data_6: MX6SX_PAD_CSI_DATA04__CSI1_DATA_6 {
515		pinmux = <0x420e005c 0 0x420e06b8 0 0x420e03a4>;
516	};
517	/omit-if-no-ref/ mx6sx_pad_csi_data04__esai_tx1: MX6SX_PAD_CSI_DATA04__ESAI_TX1 {
518		pinmux = <0x420e005c 1 0x420e0794 1 0x420e03a4>;
519	};
520	/omit-if-no-ref/ mx6sx_pad_csi_data04__spdif_out: MX6SX_PAD_CSI_DATA04__SPDIF_OUT {
521		pinmux = <0x420e005c 2 0x420e0000 0 0x420e03a4>;
522	};
523	/omit-if-no-ref/ mx6sx_pad_csi_data04__kpp_col_6: MX6SX_PAD_CSI_DATA04__KPP_COL_6 {
524		pinmux = <0x420e005c 3 0x420e07cc 0 0x420e03a4>;
525	};
526	/omit-if-no-ref/ mx6sx_pad_csi_data04__uart6_dce_rx: MX6SX_PAD_CSI_DATA04__UART6_DCE_RX {
527		pinmux = <0x420e005c 4 0x420e0858 0 0x420e03a4>;
528	};
529	/omit-if-no-ref/ mx6sx_pad_csi_data04__uart6_dte_tx: MX6SX_PAD_CSI_DATA04__UART6_DTE_TX {
530		pinmux = <0x420e005c 4 0x420e0000 0 0x420e03a4>;
531	};
532	/omit-if-no-ref/ mx6sx_pad_csi_data04__gpio1_io_18: MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 {
533		pinmux = <0x420e005c 5 0x420e0000 0 0x420e03a4>;
534	};
535	/omit-if-no-ref/ mx6sx_pad_csi_data04__weim_data_19: MX6SX_PAD_CSI_DATA04__WEIM_DATA_19 {
536		pinmux = <0x420e005c 6 0x420e0000 0 0x420e03a4>;
537	};
538	/omit-if-no-ref/ mx6sx_pad_csi_data04__pwm5_out: MX6SX_PAD_CSI_DATA04__PWM5_OUT {
539		pinmux = <0x420e005c 7 0x420e0000 0 0x420e03a4>;
540	};
541	/omit-if-no-ref/ mx6sx_pad_csi_data04__vadc_data_8: MX6SX_PAD_CSI_DATA04__VADC_DATA_8 {
542		pinmux = <0x420e005c 8 0x420e0000 0 0x420e03a4>;
543	};
544	/omit-if-no-ref/ mx6sx_pad_csi_data04__mmdc_debug_41: MX6SX_PAD_CSI_DATA04__MMDC_DEBUG_41 {
545		pinmux = <0x420e005c 9 0x420e0000 0 0x420e03a4>;
546	};
547	/omit-if-no-ref/ mx6sx_pad_csi_data05__csi1_data_7: MX6SX_PAD_CSI_DATA05__CSI1_DATA_7 {
548		pinmux = <0x420e0060 0 0x420e06bc 0 0x420e03a8>;
549	};
550	/omit-if-no-ref/ mx6sx_pad_csi_data05__esai_tx4_rx1: MX6SX_PAD_CSI_DATA05__ESAI_TX4_RX1 {
551		pinmux = <0x420e0060 1 0x420e07a0 1 0x420e03a8>;
552	};
553	/omit-if-no-ref/ mx6sx_pad_csi_data05__spdif_in: MX6SX_PAD_CSI_DATA05__SPDIF_IN {
554		pinmux = <0x420e0060 2 0x420e0824 1 0x420e03a8>;
555	};
556	/omit-if-no-ref/ mx6sx_pad_csi_data05__kpp_row_6: MX6SX_PAD_CSI_DATA05__KPP_ROW_6 {
557		pinmux = <0x420e0060 3 0x420e07d8 0 0x420e03a8>;
558	};
559	/omit-if-no-ref/ mx6sx_pad_csi_data05__uart6_dce_tx: MX6SX_PAD_CSI_DATA05__UART6_DCE_TX {
560		pinmux = <0x420e0060 4 0x420e0000 0 0x420e03a8>;
561	};
562	/omit-if-no-ref/ mx6sx_pad_csi_data05__uart6_dte_rx: MX6SX_PAD_CSI_DATA05__UART6_DTE_RX {
563		pinmux = <0x420e0060 4 0x420e0858 1 0x420e03a8>;
564	};
565	/omit-if-no-ref/ mx6sx_pad_csi_data05__gpio1_io_19: MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 {
566		pinmux = <0x420e0060 5 0x420e0000 0 0x420e03a8>;
567	};
568	/omit-if-no-ref/ mx6sx_pad_csi_data05__weim_data_18: MX6SX_PAD_CSI_DATA05__WEIM_DATA_18 {
569		pinmux = <0x420e0060 6 0x420e0000 0 0x420e03a8>;
570	};
571	/omit-if-no-ref/ mx6sx_pad_csi_data05__pwm6_out: MX6SX_PAD_CSI_DATA05__PWM6_OUT {
572		pinmux = <0x420e0060 7 0x420e0000 0 0x420e03a8>;
573	};
574	/omit-if-no-ref/ mx6sx_pad_csi_data05__vadc_data_9: MX6SX_PAD_CSI_DATA05__VADC_DATA_9 {
575		pinmux = <0x420e0060 8 0x420e0000 0 0x420e03a8>;
576	};
577	/omit-if-no-ref/ mx6sx_pad_csi_data05__mmdc_debug_42: MX6SX_PAD_CSI_DATA05__MMDC_DEBUG_42 {
578		pinmux = <0x420e0060 9 0x420e0000 0 0x420e03a8>;
579	};
580	/omit-if-no-ref/ mx6sx_pad_csi_data06__csi1_data_8: MX6SX_PAD_CSI_DATA06__CSI1_DATA_8 {
581		pinmux = <0x420e0064 0 0x420e06c0 0 0x420e03ac>;
582	};
583	/omit-if-no-ref/ mx6sx_pad_csi_data06__esai_tx2_rx3: MX6SX_PAD_CSI_DATA06__ESAI_TX2_RX3 {
584		pinmux = <0x420e0064 1 0x420e0798 1 0x420e03ac>;
585	};
586	/omit-if-no-ref/ mx6sx_pad_csi_data06__i2c4_scl: MX6SX_PAD_CSI_DATA06__I2C4_SCL {
587		pinmux = <0x420e0064 2 0x420e07c0 2 0x420e03ac>;
588	};
589	/omit-if-no-ref/ mx6sx_pad_csi_data06__kpp_col_7: MX6SX_PAD_CSI_DATA06__KPP_COL_7 {
590		pinmux = <0x420e0064 3 0x420e07d0 0 0x420e03ac>;
591	};
592	/omit-if-no-ref/ mx6sx_pad_csi_data06__uart6_dce_rts: MX6SX_PAD_CSI_DATA06__UART6_DCE_RTS {
593		pinmux = <0x420e0064 4 0x420e0854 0 0x420e03ac>;
594	};
595	/omit-if-no-ref/ mx6sx_pad_csi_data06__uart6_dte_cts: MX6SX_PAD_CSI_DATA06__UART6_DTE_CTS {
596		pinmux = <0x420e0064 4 0x420e0000 0 0x420e03ac>;
597	};
598	/omit-if-no-ref/ mx6sx_pad_csi_data06__gpio1_io_20: MX6SX_PAD_CSI_DATA06__GPIO1_IO_20 {
599		pinmux = <0x420e0064 5 0x420e0000 0 0x420e03ac>;
600	};
601	/omit-if-no-ref/ mx6sx_pad_csi_data06__weim_data_17: MX6SX_PAD_CSI_DATA06__WEIM_DATA_17 {
602		pinmux = <0x420e0064 6 0x420e0000 0 0x420e03ac>;
603	};
604	/omit-if-no-ref/ mx6sx_pad_csi_data06__dcic2_out: MX6SX_PAD_CSI_DATA06__DCIC2_OUT {
605		pinmux = <0x420e0064 7 0x420e0000 0 0x420e03ac>;
606	};
607	/omit-if-no-ref/ mx6sx_pad_csi_data06__vadc_data_10: MX6SX_PAD_CSI_DATA06__VADC_DATA_10 {
608		pinmux = <0x420e0064 8 0x420e0000 0 0x420e03ac>;
609	};
610	/omit-if-no-ref/ mx6sx_pad_csi_data06__mmdc_debug_43: MX6SX_PAD_CSI_DATA06__MMDC_DEBUG_43 {
611		pinmux = <0x420e0064 9 0x420e0000 0 0x420e03ac>;
612	};
613	/omit-if-no-ref/ mx6sx_pad_csi_data07__csi1_data_9: MX6SX_PAD_CSI_DATA07__CSI1_DATA_9 {
614		pinmux = <0x420e0068 0 0x420e06c4 0 0x420e03b0>;
615	};
616	/omit-if-no-ref/ mx6sx_pad_csi_data07__esai_tx3_rx2: MX6SX_PAD_CSI_DATA07__ESAI_TX3_RX2 {
617		pinmux = <0x420e0068 1 0x420e079c 1 0x420e03b0>;
618	};
619	/omit-if-no-ref/ mx6sx_pad_csi_data07__i2c4_sda: MX6SX_PAD_CSI_DATA07__I2C4_SDA {
620		pinmux = <0x420e0068 2 0x420e07c4 2 0x420e03b0>;
621	};
622	/omit-if-no-ref/ mx6sx_pad_csi_data07__kpp_row_7: MX6SX_PAD_CSI_DATA07__KPP_ROW_7 {
623		pinmux = <0x420e0068 3 0x420e07dc 0 0x420e03b0>;
624	};
625	/omit-if-no-ref/ mx6sx_pad_csi_data07__uart6_dce_cts: MX6SX_PAD_CSI_DATA07__UART6_DCE_CTS {
626		pinmux = <0x420e0068 4 0x420e0000 0 0x420e03b0>;
627	};
628	/omit-if-no-ref/ mx6sx_pad_csi_data07__uart6_dte_rts: MX6SX_PAD_CSI_DATA07__UART6_DTE_RTS {
629		pinmux = <0x420e0068 4 0x420e0854 1 0x420e03b0>;
630	};
631	/omit-if-no-ref/ mx6sx_pad_csi_data07__gpio1_io_21: MX6SX_PAD_CSI_DATA07__GPIO1_IO_21 {
632		pinmux = <0x420e0068 5 0x420e0000 0 0x420e03b0>;
633	};
634	/omit-if-no-ref/ mx6sx_pad_csi_data07__weim_data_16: MX6SX_PAD_CSI_DATA07__WEIM_DATA_16 {
635		pinmux = <0x420e0068 6 0x420e0000 0 0x420e03b0>;
636	};
637	/omit-if-no-ref/ mx6sx_pad_csi_data07__dcic1_out: MX6SX_PAD_CSI_DATA07__DCIC1_OUT {
638		pinmux = <0x420e0068 7 0x420e0000 0 0x420e03b0>;
639	};
640	/omit-if-no-ref/ mx6sx_pad_csi_data07__vadc_data_11: MX6SX_PAD_CSI_DATA07__VADC_DATA_11 {
641		pinmux = <0x420e0068 8 0x420e0000 0 0x420e03b0>;
642	};
643	/omit-if-no-ref/ mx6sx_pad_csi_data07__mmdc_debug_44: MX6SX_PAD_CSI_DATA07__MMDC_DEBUG_44 {
644		pinmux = <0x420e0068 9 0x420e0000 0 0x420e03b0>;
645	};
646	/omit-if-no-ref/ mx6sx_pad_csi_hsync__csi1_hsync: MX6SX_PAD_CSI_HSYNC__CSI1_HSYNC {
647		pinmux = <0x420e006c 0 0x420e0700 0 0x420e03b4>;
648	};
649	/omit-if-no-ref/ mx6sx_pad_csi_hsync__esai_tx0: MX6SX_PAD_CSI_HSYNC__ESAI_TX0 {
650		pinmux = <0x420e006c 1 0x420e0790 1 0x420e03b4>;
651	};
652	/omit-if-no-ref/ mx6sx_pad_csi_hsync__audmux_aud6_txd: MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD {
653		pinmux = <0x420e006c 2 0x420e0678 1 0x420e03b4>;
654	};
655	/omit-if-no-ref/ mx6sx_pad_csi_hsync__uart4_dce_rts: MX6SX_PAD_CSI_HSYNC__UART4_DCE_RTS {
656		pinmux = <0x420e006c 3 0x420e0844 2 0x420e03b4>;
657	};
658	/omit-if-no-ref/ mx6sx_pad_csi_hsync__uart4_dte_cts: MX6SX_PAD_CSI_HSYNC__UART4_DTE_CTS {
659		pinmux = <0x420e006c 3 0x420e0000 0 0x420e03b4>;
660	};
661	/omit-if-no-ref/ mx6sx_pad_csi_hsync__mqs_left: MX6SX_PAD_CSI_HSYNC__MQS_LEFT {
662		pinmux = <0x420e006c 4 0x420e0000 0 0x420e03b4>;
663	};
664	/omit-if-no-ref/ mx6sx_pad_csi_hsync__gpio1_io_22: MX6SX_PAD_CSI_HSYNC__GPIO1_IO_22 {
665		pinmux = <0x420e006c 5 0x420e0000 0 0x420e03b4>;
666	};
667	/omit-if-no-ref/ mx6sx_pad_csi_hsync__weim_data_25: MX6SX_PAD_CSI_HSYNC__WEIM_DATA_25 {
668		pinmux = <0x420e006c 6 0x420e0000 0 0x420e03b4>;
669	};
670	/omit-if-no-ref/ mx6sx_pad_csi_hsync__sai1_tx_data_0: MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0 {
671		pinmux = <0x420e006c 7 0x420e0000 0 0x420e03b4>;
672	};
673	/omit-if-no-ref/ mx6sx_pad_csi_hsync__vadc_data_2: MX6SX_PAD_CSI_HSYNC__VADC_DATA_2 {
674		pinmux = <0x420e006c 8 0x420e0000 0 0x420e03b4>;
675	};
676	/omit-if-no-ref/ mx6sx_pad_csi_hsync__mmdc_debug_35: MX6SX_PAD_CSI_HSYNC__MMDC_DEBUG_35 {
677		pinmux = <0x420e006c 9 0x420e0000 0 0x420e03b4>;
678	};
679	/omit-if-no-ref/ mx6sx_pad_csi_mclk__csi1_mclk: MX6SX_PAD_CSI_MCLK__CSI1_MCLK {
680		pinmux = <0x420e0070 0 0x420e0000 0 0x420e03b8>;
681	};
682	/omit-if-no-ref/ mx6sx_pad_csi_mclk__esai_tx_hf_clk: MX6SX_PAD_CSI_MCLK__ESAI_TX_HF_CLK {
683		pinmux = <0x420e0070 1 0x420e0784 1 0x420e03b8>;
684	};
685	/omit-if-no-ref/ mx6sx_pad_csi_mclk__osc32k_32k_out: MX6SX_PAD_CSI_MCLK__OSC32K_32K_OUT {
686		pinmux = <0x420e0070 2 0x420e0000 0 0x420e03b8>;
687	};
688	/omit-if-no-ref/ mx6sx_pad_csi_mclk__uart4_dce_rx: MX6SX_PAD_CSI_MCLK__UART4_DCE_RX {
689		pinmux = <0x420e0070 3 0x420e0848 2 0x420e03b8>;
690	};
691	/omit-if-no-ref/ mx6sx_pad_csi_mclk__uart4_dte_tx: MX6SX_PAD_CSI_MCLK__UART4_DTE_TX {
692		pinmux = <0x420e0070 3 0x420e0000 0 0x420e03b8>;
693	};
694	/omit-if-no-ref/ mx6sx_pad_csi_mclk__anatop_32k_out: MX6SX_PAD_CSI_MCLK__ANATOP_32K_OUT {
695		pinmux = <0x420e0070 4 0x420e0000 0 0x420e03b8>;
696	};
697	/omit-if-no-ref/ mx6sx_pad_csi_mclk__gpio1_io_23: MX6SX_PAD_CSI_MCLK__GPIO1_IO_23 {
698		pinmux = <0x420e0070 5 0x420e0000 0 0x420e03b8>;
699	};
700	/omit-if-no-ref/ mx6sx_pad_csi_mclk__weim_data_26: MX6SX_PAD_CSI_MCLK__WEIM_DATA_26 {
701		pinmux = <0x420e0070 6 0x420e0000 0 0x420e03b8>;
702	};
703	/omit-if-no-ref/ mx6sx_pad_csi_mclk__csi1_field: MX6SX_PAD_CSI_MCLK__CSI1_FIELD {
704		pinmux = <0x420e0070 7 0x420e070c 0 0x420e03b8>;
705	};
706	/omit-if-no-ref/ mx6sx_pad_csi_mclk__vadc_data_1: MX6SX_PAD_CSI_MCLK__VADC_DATA_1 {
707		pinmux = <0x420e0070 8 0x420e0000 0 0x420e03b8>;
708	};
709	/omit-if-no-ref/ mx6sx_pad_csi_mclk__mmdc_debug_34: MX6SX_PAD_CSI_MCLK__MMDC_DEBUG_34 {
710		pinmux = <0x420e0070 9 0x420e0000 0 0x420e03b8>;
711	};
712	/omit-if-no-ref/ mx6sx_pad_csi_pixclk__csi1_pixclk: MX6SX_PAD_CSI_PIXCLK__CSI1_PIXCLK {
713		pinmux = <0x420e0074 0 0x420e0704 0 0x420e03bc>;
714	};
715	/omit-if-no-ref/ mx6sx_pad_csi_pixclk__esai_rx_hf_clk: MX6SX_PAD_CSI_PIXCLK__ESAI_RX_HF_CLK {
716		pinmux = <0x420e0074 1 0x420e0780 1 0x420e03bc>;
717	};
718	/omit-if-no-ref/ mx6sx_pad_csi_pixclk__audmux_mclk: MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK {
719		pinmux = <0x420e0074 2 0x420e0000 0 0x420e03bc>;
720	};
721	/omit-if-no-ref/ mx6sx_pad_csi_pixclk__uart4_dce_tx: MX6SX_PAD_CSI_PIXCLK__UART4_DCE_TX {
722		pinmux = <0x420e0074 3 0x420e0000 0 0x420e03bc>;
723	};
724	/omit-if-no-ref/ mx6sx_pad_csi_pixclk__uart4_dte_rx: MX6SX_PAD_CSI_PIXCLK__UART4_DTE_RX {
725		pinmux = <0x420e0074 3 0x420e0848 3 0x420e03bc>;
726	};
727	/omit-if-no-ref/ mx6sx_pad_csi_pixclk__anatop_24m_out: MX6SX_PAD_CSI_PIXCLK__ANATOP_24M_OUT {
728		pinmux = <0x420e0074 4 0x420e0000 0 0x420e03bc>;
729	};
730	/omit-if-no-ref/ mx6sx_pad_csi_pixclk__gpio1_io_24: MX6SX_PAD_CSI_PIXCLK__GPIO1_IO_24 {
731		pinmux = <0x420e0074 5 0x420e0000 0 0x420e03bc>;
732	};
733	/omit-if-no-ref/ mx6sx_pad_csi_pixclk__weim_data_27: MX6SX_PAD_CSI_PIXCLK__WEIM_DATA_27 {
734		pinmux = <0x420e0074 6 0x420e0000 0 0x420e03bc>;
735	};
736	/omit-if-no-ref/ mx6sx_pad_csi_pixclk__esai_tx_hf_clk: MX6SX_PAD_CSI_PIXCLK__ESAI_TX_HF_CLK {
737		pinmux = <0x420e0074 7 0x420e0784 2 0x420e03bc>;
738	};
739	/omit-if-no-ref/ mx6sx_pad_csi_pixclk__vadc_clk: MX6SX_PAD_CSI_PIXCLK__VADC_CLK {
740		pinmux = <0x420e0074 8 0x420e0000 0 0x420e03bc>;
741	};
742	/omit-if-no-ref/ mx6sx_pad_csi_pixclk__mmdc_debug_33: MX6SX_PAD_CSI_PIXCLK__MMDC_DEBUG_33 {
743		pinmux = <0x420e0074 9 0x420e0000 0 0x420e03bc>;
744	};
745	/omit-if-no-ref/ mx6sx_pad_csi_vsync__csi1_vsync: MX6SX_PAD_CSI_VSYNC__CSI1_VSYNC {
746		pinmux = <0x420e0078 0 0x420e0708 0 0x420e03c0>;
747	};
748	/omit-if-no-ref/ mx6sx_pad_csi_vsync__esai_tx5_rx0: MX6SX_PAD_CSI_VSYNC__ESAI_TX5_RX0 {
749		pinmux = <0x420e0078 1 0x420e07a4 1 0x420e03c0>;
750	};
751	/omit-if-no-ref/ mx6sx_pad_csi_vsync__audmux_aud6_rxd: MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD {
752		pinmux = <0x420e0078 2 0x420e0674 1 0x420e03c0>;
753	};
754	/omit-if-no-ref/ mx6sx_pad_csi_vsync__uart4_dce_cts: MX6SX_PAD_CSI_VSYNC__UART4_DCE_CTS {
755		pinmux = <0x420e0078 3 0x420e0000 0 0x420e03c0>;
756	};
757	/omit-if-no-ref/ mx6sx_pad_csi_vsync__uart4_dte_rts: MX6SX_PAD_CSI_VSYNC__UART4_DTE_RTS {
758		pinmux = <0x420e0078 3 0x420e0844 3 0x420e03c0>;
759	};
760	/omit-if-no-ref/ mx6sx_pad_csi_vsync__mqs_right: MX6SX_PAD_CSI_VSYNC__MQS_RIGHT {
761		pinmux = <0x420e0078 4 0x420e0000 0 0x420e03c0>;
762	};
763	/omit-if-no-ref/ mx6sx_pad_csi_vsync__gpio1_io_25: MX6SX_PAD_CSI_VSYNC__GPIO1_IO_25 {
764		pinmux = <0x420e0078 5 0x420e0000 0 0x420e03c0>;
765	};
766	/omit-if-no-ref/ mx6sx_pad_csi_vsync__weim_data_24: MX6SX_PAD_CSI_VSYNC__WEIM_DATA_24 {
767		pinmux = <0x420e0078 6 0x420e0000 0 0x420e03c0>;
768	};
769	/omit-if-no-ref/ mx6sx_pad_csi_vsync__sai1_rx_data_0: MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0 {
770		pinmux = <0x420e0078 7 0x420e07f8 0 0x420e03c0>;
771	};
772	/omit-if-no-ref/ mx6sx_pad_csi_vsync__vadc_data_3: MX6SX_PAD_CSI_VSYNC__VADC_DATA_3 {
773		pinmux = <0x420e0078 8 0x420e0000 0 0x420e03c0>;
774	};
775	/omit-if-no-ref/ mx6sx_pad_csi_vsync__mmdc_debug_36: MX6SX_PAD_CSI_VSYNC__MMDC_DEBUG_36 {
776		pinmux = <0x420e0078 9 0x420e0000 0 0x420e03c0>;
777	};
778	/omit-if-no-ref/ mx6sx_pad_enet1_col__enet1_col: MX6SX_PAD_ENET1_COL__ENET1_COL {
779		pinmux = <0x420e007c 0 0x420e0000 0 0x420e03c4>;
780	};
781	/omit-if-no-ref/ mx6sx_pad_enet1_col__enet2_mdc: MX6SX_PAD_ENET1_COL__ENET2_MDC {
782		pinmux = <0x420e007c 1 0x420e0000 0 0x420e03c4>;
783	};
784	/omit-if-no-ref/ mx6sx_pad_enet1_col__audmux_aud4_txc: MX6SX_PAD_ENET1_COL__AUDMUX_AUD4_TXC {
785		pinmux = <0x420e007c 2 0x420e0654 1 0x420e03c4>;
786	};
787	/omit-if-no-ref/ mx6sx_pad_enet1_col__uart1_ri_b: MX6SX_PAD_ENET1_COL__UART1_RI_B {
788		pinmux = <0x420e007c 3 0x420e0000 0 0x420e03c4>;
789	};
790	/omit-if-no-ref/ mx6sx_pad_enet1_col__spdif_ext_clk: MX6SX_PAD_ENET1_COL__SPDIF_EXT_CLK {
791		pinmux = <0x420e007c 4 0x420e0828 1 0x420e03c4>;
792	};
793	/omit-if-no-ref/ mx6sx_pad_enet1_col__gpio2_io_0: MX6SX_PAD_ENET1_COL__GPIO2_IO_0 {
794		pinmux = <0x420e007c 5 0x420e0000 0 0x420e03c4>;
795	};
796	/omit-if-no-ref/ mx6sx_pad_enet1_col__csi2_data_23: MX6SX_PAD_ENET1_COL__CSI2_DATA_23 {
797		pinmux = <0x420e007c 6 0x420e0000 0 0x420e03c4>;
798	};
799	/omit-if-no-ref/ mx6sx_pad_enet1_col__lcdif2_data_16: MX6SX_PAD_ENET1_COL__LCDIF2_DATA_16 {
800		pinmux = <0x420e007c 7 0x420e0000 0 0x420e03c4>;
801	};
802	/omit-if-no-ref/ mx6sx_pad_enet1_col__vdec_debug_37: MX6SX_PAD_ENET1_COL__VDEC_DEBUG_37 {
803		pinmux = <0x420e007c 8 0x420e0000 0 0x420e03c4>;
804	};
805	/omit-if-no-ref/ mx6sx_pad_enet1_col__pcie_ctrl_debug_31: MX6SX_PAD_ENET1_COL__PCIE_CTRL_DEBUG_31 {
806		pinmux = <0x420e007c 9 0x420e0000 0 0x420e03c4>;
807	};
808	/omit-if-no-ref/ mx6sx_pad_enet1_crs__enet1_crs: MX6SX_PAD_ENET1_CRS__ENET1_CRS {
809		pinmux = <0x420e0080 0 0x420e0000 0 0x420e03c8>;
810	};
811	/omit-if-no-ref/ mx6sx_pad_enet1_crs__enet2_mdio: MX6SX_PAD_ENET1_CRS__ENET2_MDIO {
812		pinmux = <0x420e0080 1 0x420e0770 1 0x420e03c8>;
813	};
814	/omit-if-no-ref/ mx6sx_pad_enet1_crs__audmux_aud4_txd: MX6SX_PAD_ENET1_CRS__AUDMUX_AUD4_TXD {
815		pinmux = <0x420e0080 2 0x420e0648 1 0x420e03c8>;
816	};
817	/omit-if-no-ref/ mx6sx_pad_enet1_crs__uart1_dcd_b: MX6SX_PAD_ENET1_CRS__UART1_DCD_B {
818		pinmux = <0x420e0080 3 0x420e0000 0 0x420e03c8>;
819	};
820	/omit-if-no-ref/ mx6sx_pad_enet1_crs__spdif_lock: MX6SX_PAD_ENET1_CRS__SPDIF_LOCK {
821		pinmux = <0x420e0080 4 0x420e0000 0 0x420e03c8>;
822	};
823	/omit-if-no-ref/ mx6sx_pad_enet1_crs__gpio2_io_1: MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 {
824		pinmux = <0x420e0080 5 0x420e0000 0 0x420e03c8>;
825	};
826	/omit-if-no-ref/ mx6sx_pad_enet1_crs__csi2_data_22: MX6SX_PAD_ENET1_CRS__CSI2_DATA_22 {
827		pinmux = <0x420e0080 6 0x420e0000 0 0x420e03c8>;
828	};
829	/omit-if-no-ref/ mx6sx_pad_enet1_crs__lcdif2_data_17: MX6SX_PAD_ENET1_CRS__LCDIF2_DATA_17 {
830		pinmux = <0x420e0080 7 0x420e0000 0 0x420e03c8>;
831	};
832	/omit-if-no-ref/ mx6sx_pad_enet1_crs__vdec_debug_36: MX6SX_PAD_ENET1_CRS__VDEC_DEBUG_36 {
833		pinmux = <0x420e0080 8 0x420e0000 0 0x420e03c8>;
834	};
835	/omit-if-no-ref/ mx6sx_pad_enet1_crs__pcie_ctrl_debug_30: MX6SX_PAD_ENET1_CRS__PCIE_CTRL_DEBUG_30 {
836		pinmux = <0x420e0080 9 0x420e0000 0 0x420e03c8>;
837	};
838	/omit-if-no-ref/ mx6sx_pad_enet1_mdc__enet1_mdc: MX6SX_PAD_ENET1_MDC__ENET1_MDC {
839		pinmux = <0x420e0084 0 0x420e0000 0 0x420e03cc>;
840	};
841	/omit-if-no-ref/ mx6sx_pad_enet1_mdc__enet2_mdc: MX6SX_PAD_ENET1_MDC__ENET2_MDC {
842		pinmux = <0x420e0084 1 0x420e0000 0 0x420e03cc>;
843	};
844	/omit-if-no-ref/ mx6sx_pad_enet1_mdc__audmux_aud3_rxfs: MX6SX_PAD_ENET1_MDC__AUDMUX_AUD3_RXFS {
845		pinmux = <0x420e0084 2 0x420e0638 1 0x420e03cc>;
846	};
847	/omit-if-no-ref/ mx6sx_pad_enet1_mdc__anatop_24m_out: MX6SX_PAD_ENET1_MDC__ANATOP_24M_OUT {
848		pinmux = <0x420e0084 3 0x420e0000 0 0x420e03cc>;
849	};
850	/omit-if-no-ref/ mx6sx_pad_enet1_mdc__epit2_out: MX6SX_PAD_ENET1_MDC__EPIT2_OUT {
851		pinmux = <0x420e0084 4 0x420e0000 0 0x420e03cc>;
852	};
853	/omit-if-no-ref/ mx6sx_pad_enet1_mdc__gpio2_io_2: MX6SX_PAD_ENET1_MDC__GPIO2_IO_2 {
854		pinmux = <0x420e0084 5 0x420e0000 0 0x420e03cc>;
855	};
856	/omit-if-no-ref/ mx6sx_pad_enet1_mdc__usb_otg1_pwr: MX6SX_PAD_ENET1_MDC__USB_OTG1_PWR {
857		pinmux = <0x420e0084 6 0x420e0000 0 0x420e03cc>;
858	};
859	/omit-if-no-ref/ mx6sx_pad_enet1_mdc__pwm7_out: MX6SX_PAD_ENET1_MDC__PWM7_OUT {
860		pinmux = <0x420e0084 7 0x420e0000 0 0x420e03cc>;
861	};
862	/omit-if-no-ref/ mx6sx_pad_enet1_mdio__enet1_mdio: MX6SX_PAD_ENET1_MDIO__ENET1_MDIO {
863		pinmux = <0x420e0088 0 0x420e0764 1 0x420e03d0>;
864	};
865	/omit-if-no-ref/ mx6sx_pad_enet1_mdio__enet2_mdio: MX6SX_PAD_ENET1_MDIO__ENET2_MDIO {
866		pinmux = <0x420e0088 1 0x420e0770 2 0x420e03d0>;
867	};
868	/omit-if-no-ref/ mx6sx_pad_enet1_mdio__audmux_mclk: MX6SX_PAD_ENET1_MDIO__AUDMUX_MCLK {
869		pinmux = <0x420e0088 2 0x420e0000 0 0x420e03d0>;
870	};
871	/omit-if-no-ref/ mx6sx_pad_enet1_mdio__osc32k_32k_out: MX6SX_PAD_ENET1_MDIO__OSC32K_32K_OUT {
872		pinmux = <0x420e0088 3 0x420e0000 0 0x420e03d0>;
873	};
874	/omit-if-no-ref/ mx6sx_pad_enet1_mdio__epit1_out: MX6SX_PAD_ENET1_MDIO__EPIT1_OUT {
875		pinmux = <0x420e0088 4 0x420e0000 0 0x420e03d0>;
876	};
877	/omit-if-no-ref/ mx6sx_pad_enet1_mdio__gpio2_io_3: MX6SX_PAD_ENET1_MDIO__GPIO2_IO_3 {
878		pinmux = <0x420e0088 5 0x420e0000 0 0x420e03d0>;
879	};
880	/omit-if-no-ref/ mx6sx_pad_enet1_mdio__usb_otg1_oc: MX6SX_PAD_ENET1_MDIO__USB_OTG1_OC {
881		pinmux = <0x420e0088 6 0x420e0860 1 0x420e03d0>;
882	};
883	/omit-if-no-ref/ mx6sx_pad_enet1_mdio__pwm8_out: MX6SX_PAD_ENET1_MDIO__PWM8_OUT {
884		pinmux = <0x420e0088 7 0x420e0000 0 0x420e03d0>;
885	};
886	/omit-if-no-ref/ mx6sx_pad_enet1_rx_clk__enet1_rx_clk: MX6SX_PAD_ENET1_RX_CLK__ENET1_RX_CLK {
887		pinmux = <0x420e008c 0 0x420e0768 0 0x420e03d4>;
888	};
889	/omit-if-no-ref/ mx6sx_pad_enet1_rx_clk__enet1_ref_clk_25m: MX6SX_PAD_ENET1_RX_CLK__ENET1_REF_CLK_25M {
890		pinmux = <0x420e008c 1 0x420e0000 0 0x420e03d4>;
891	};
892	/omit-if-no-ref/ mx6sx_pad_enet1_rx_clk__audmux_aud4_txfs: MX6SX_PAD_ENET1_RX_CLK__AUDMUX_AUD4_TXFS {
893		pinmux = <0x420e008c 2 0x420e0658 1 0x420e03d4>;
894	};
895	/omit-if-no-ref/ mx6sx_pad_enet1_rx_clk__uart1_dsr_b: MX6SX_PAD_ENET1_RX_CLK__UART1_DSR_B {
896		pinmux = <0x420e008c 3 0x420e0000 0 0x420e03d4>;
897	};
898	/omit-if-no-ref/ mx6sx_pad_enet1_rx_clk__spdif_out: MX6SX_PAD_ENET1_RX_CLK__SPDIF_OUT {
899		pinmux = <0x420e008c 4 0x420e0000 0 0x420e03d4>;
900	};
901	/omit-if-no-ref/ mx6sx_pad_enet1_rx_clk__gpio2_io_4: MX6SX_PAD_ENET1_RX_CLK__GPIO2_IO_4 {
902		pinmux = <0x420e008c 5 0x420e0000 0 0x420e03d4>;
903	};
904	/omit-if-no-ref/ mx6sx_pad_enet1_rx_clk__csi2_data_21: MX6SX_PAD_ENET1_RX_CLK__CSI2_DATA_21 {
905		pinmux = <0x420e008c 6 0x420e0000 0 0x420e03d4>;
906	};
907	/omit-if-no-ref/ mx6sx_pad_enet1_rx_clk__lcdif2_data_18: MX6SX_PAD_ENET1_RX_CLK__LCDIF2_DATA_18 {
908		pinmux = <0x420e008c 7 0x420e0000 0 0x420e03d4>;
909	};
910	/omit-if-no-ref/ mx6sx_pad_enet1_rx_clk__vdec_debug_35: MX6SX_PAD_ENET1_RX_CLK__VDEC_DEBUG_35 {
911		pinmux = <0x420e008c 8 0x420e0000 0 0x420e03d4>;
912	};
913	/omit-if-no-ref/ mx6sx_pad_enet1_rx_clk__pcie_ctrl_debug_29: MX6SX_PAD_ENET1_RX_CLK__PCIE_CTRL_DEBUG_29 {
914		pinmux = <0x420e008c 9 0x420e0000 0 0x420e03d4>;
915	};
916	/omit-if-no-ref/ mx6sx_pad_enet1_tx_clk__enet1_tx_clk: MX6SX_PAD_ENET1_TX_CLK__ENET1_TX_CLK {
917		pinmux = <0x420e0090 0 0x420e0000 0 0x420e03d8>;
918	};
919	/omit-if-no-ref/ mx6sx_pad_enet1_tx_clk__enet1_ref_clk1: MX6SX_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 {
920		pinmux = <0x420e0090 1 0x420e0760 1 0x420e03d8>;
921	};
922	/omit-if-no-ref/ mx6sx_pad_enet1_tx_clk__audmux_aud4_rxd: MX6SX_PAD_ENET1_TX_CLK__AUDMUX_AUD4_RXD {
923		pinmux = <0x420e0090 2 0x420e0644 1 0x420e03d8>;
924	};
925	/omit-if-no-ref/ mx6sx_pad_enet1_tx_clk__uart1_dtr_b: MX6SX_PAD_ENET1_TX_CLK__UART1_DTR_B {
926		pinmux = <0x420e0090 3 0x420e0000 0 0x420e03d8>;
927	};
928	/omit-if-no-ref/ mx6sx_pad_enet1_tx_clk__spdif_sr_clk: MX6SX_PAD_ENET1_TX_CLK__SPDIF_SR_CLK {
929		pinmux = <0x420e0090 4 0x420e0000 0 0x420e03d8>;
930	};
931	/omit-if-no-ref/ mx6sx_pad_enet1_tx_clk__gpio2_io_5: MX6SX_PAD_ENET1_TX_CLK__GPIO2_IO_5 {
932		pinmux = <0x420e0090 5 0x420e0000 0 0x420e03d8>;
933	};
934	/omit-if-no-ref/ mx6sx_pad_enet1_tx_clk__csi2_data_20: MX6SX_PAD_ENET1_TX_CLK__CSI2_DATA_20 {
935		pinmux = <0x420e0090 6 0x420e0000 0 0x420e03d8>;
936	};
937	/omit-if-no-ref/ mx6sx_pad_enet1_tx_clk__lcdif2_data_19: MX6SX_PAD_ENET1_TX_CLK__LCDIF2_DATA_19 {
938		pinmux = <0x420e0090 7 0x420e0000 0 0x420e03d8>;
939	};
940	/omit-if-no-ref/ mx6sx_pad_enet1_tx_clk__vdec_debug_34: MX6SX_PAD_ENET1_TX_CLK__VDEC_DEBUG_34 {
941		pinmux = <0x420e0090 8 0x420e0000 0 0x420e03d8>;
942	};
943	/omit-if-no-ref/ mx6sx_pad_enet1_tx_clk__pcie_ctrl_debug_28: MX6SX_PAD_ENET1_TX_CLK__PCIE_CTRL_DEBUG_28 {
944		pinmux = <0x420e0090 9 0x420e0000 0 0x420e03d8>;
945	};
946	/omit-if-no-ref/ mx6sx_pad_enet2_col__enet2_col: MX6SX_PAD_ENET2_COL__ENET2_COL {
947		pinmux = <0x420e0094 0 0x420e0000 0 0x420e03dc>;
948	};
949	/omit-if-no-ref/ mx6sx_pad_enet2_col__enet1_mdc: MX6SX_PAD_ENET2_COL__ENET1_MDC {
950		pinmux = <0x420e0094 1 0x420e0000 0 0x420e03dc>;
951	};
952	/omit-if-no-ref/ mx6sx_pad_enet2_col__audmux_aud4_rxc: MX6SX_PAD_ENET2_COL__AUDMUX_AUD4_RXC {
953		pinmux = <0x420e0094 2 0x420e064c 1 0x420e03dc>;
954	};
955	/omit-if-no-ref/ mx6sx_pad_enet2_col__uart1_dce_rx: MX6SX_PAD_ENET2_COL__UART1_DCE_RX {
956		pinmux = <0x420e0094 3 0x420e0830 2 0x420e03dc>;
957	};
958	/omit-if-no-ref/ mx6sx_pad_enet2_col__uart1_dte_tx: MX6SX_PAD_ENET2_COL__UART1_DTE_TX {
959		pinmux = <0x420e0094 3 0x420e0000 0 0x420e03dc>;
960	};
961	/omit-if-no-ref/ mx6sx_pad_enet2_col__spdif_in: MX6SX_PAD_ENET2_COL__SPDIF_IN {
962		pinmux = <0x420e0094 4 0x420e0824 3 0x420e03dc>;
963	};
964	/omit-if-no-ref/ mx6sx_pad_enet2_col__gpio2_io_6: MX6SX_PAD_ENET2_COL__GPIO2_IO_6 {
965		pinmux = <0x420e0094 5 0x420e0000 0 0x420e03dc>;
966	};
967	/omit-if-no-ref/ mx6sx_pad_enet2_col__anatop_otg1_id: MX6SX_PAD_ENET2_COL__ANATOP_OTG1_ID {
968		pinmux = <0x420e0094 6 0x420e0624 1 0x420e03dc>;
969	};
970	/omit-if-no-ref/ mx6sx_pad_enet2_col__lcdif2_data_20: MX6SX_PAD_ENET2_COL__LCDIF2_DATA_20 {
971		pinmux = <0x420e0094 7 0x420e0000 0 0x420e03dc>;
972	};
973	/omit-if-no-ref/ mx6sx_pad_enet2_col__vdec_debug_33: MX6SX_PAD_ENET2_COL__VDEC_DEBUG_33 {
974		pinmux = <0x420e0094 8 0x420e0000 0 0x420e03dc>;
975	};
976	/omit-if-no-ref/ mx6sx_pad_enet2_col__pcie_ctrl_debug_27: MX6SX_PAD_ENET2_COL__PCIE_CTRL_DEBUG_27 {
977		pinmux = <0x420e0094 9 0x420e0000 0 0x420e03dc>;
978	};
979	/omit-if-no-ref/ mx6sx_pad_enet2_crs__enet2_crs: MX6SX_PAD_ENET2_CRS__ENET2_CRS {
980		pinmux = <0x420e0098 0 0x420e0000 0 0x420e03e0>;
981	};
982	/omit-if-no-ref/ mx6sx_pad_enet2_crs__enet1_mdio: MX6SX_PAD_ENET2_CRS__ENET1_MDIO {
983		pinmux = <0x420e0098 1 0x420e0764 2 0x420e03e0>;
984	};
985	/omit-if-no-ref/ mx6sx_pad_enet2_crs__audmux_aud4_rxfs: MX6SX_PAD_ENET2_CRS__AUDMUX_AUD4_RXFS {
986		pinmux = <0x420e0098 2 0x420e0650 1 0x420e03e0>;
987	};
988	/omit-if-no-ref/ mx6sx_pad_enet2_crs__uart1_dce_tx: MX6SX_PAD_ENET2_CRS__UART1_DCE_TX {
989		pinmux = <0x420e0098 3 0x420e0000 0 0x420e03e0>;
990	};
991	/omit-if-no-ref/ mx6sx_pad_enet2_crs__uart1_dte_rx: MX6SX_PAD_ENET2_CRS__UART1_DTE_RX {
992		pinmux = <0x420e0098 3 0x420e0830 3 0x420e03e0>;
993	};
994	/omit-if-no-ref/ mx6sx_pad_enet2_crs__mlb_sig: MX6SX_PAD_ENET2_CRS__MLB_SIG {
995		pinmux = <0x420e0098 4 0x420e07f0 1 0x420e03e0>;
996	};
997	/omit-if-no-ref/ mx6sx_pad_enet2_crs__gpio2_io_7: MX6SX_PAD_ENET2_CRS__GPIO2_IO_7 {
998		pinmux = <0x420e0098 5 0x420e0000 0 0x420e03e0>;
999	};
1000	/omit-if-no-ref/ mx6sx_pad_enet2_crs__anatop_otg2_id: MX6SX_PAD_ENET2_CRS__ANATOP_OTG2_ID {
1001		pinmux = <0x420e0098 6 0x420e0628 1 0x420e03e0>;
1002	};
1003	/omit-if-no-ref/ mx6sx_pad_enet2_crs__lcdif2_data_21: MX6SX_PAD_ENET2_CRS__LCDIF2_DATA_21 {
1004		pinmux = <0x420e0098 7 0x420e0000 0 0x420e03e0>;
1005	};
1006	/omit-if-no-ref/ mx6sx_pad_enet2_crs__vdec_debug_32: MX6SX_PAD_ENET2_CRS__VDEC_DEBUG_32 {
1007		pinmux = <0x420e0098 8 0x420e0000 0 0x420e03e0>;
1008	};
1009	/omit-if-no-ref/ mx6sx_pad_enet2_crs__pcie_ctrl_debug_26: MX6SX_PAD_ENET2_CRS__PCIE_CTRL_DEBUG_26 {
1010		pinmux = <0x420e0098 9 0x420e0000 0 0x420e03e0>;
1011	};
1012	/omit-if-no-ref/ mx6sx_pad_enet2_rx_clk__enet2_rx_clk: MX6SX_PAD_ENET2_RX_CLK__ENET2_RX_CLK {
1013		pinmux = <0x420e009c 0 0x420e0774 0 0x420e03e4>;
1014	};
1015	/omit-if-no-ref/ mx6sx_pad_enet2_rx_clk__enet2_ref_clk_25m: MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M {
1016		pinmux = <0x420e009c 1 0x420e0000 0 0x420e03e4>;
1017	};
1018	/omit-if-no-ref/ mx6sx_pad_enet2_rx_clk__i2c3_scl: MX6SX_PAD_ENET2_RX_CLK__I2C3_SCL {
1019		pinmux = <0x420e009c 2 0x420e07b8 1 0x420e03e4>;
1020	};
1021	/omit-if-no-ref/ mx6sx_pad_enet2_rx_clk__uart1_dce_rts: MX6SX_PAD_ENET2_RX_CLK__UART1_DCE_RTS {
1022		pinmux = <0x420e009c 3 0x420e082c 2 0x420e03e4>;
1023	};
1024	/omit-if-no-ref/ mx6sx_pad_enet2_rx_clk__uart1_dte_cts: MX6SX_PAD_ENET2_RX_CLK__UART1_DTE_CTS {
1025		pinmux = <0x420e009c 3 0x420e0000 0 0x420e03e4>;
1026	};
1027	/omit-if-no-ref/ mx6sx_pad_enet2_rx_clk__mlb_data: MX6SX_PAD_ENET2_RX_CLK__MLB_DATA {
1028		pinmux = <0x420e009c 4 0x420e07ec 1 0x420e03e4>;
1029	};
1030	/omit-if-no-ref/ mx6sx_pad_enet2_rx_clk__gpio2_io_8: MX6SX_PAD_ENET2_RX_CLK__GPIO2_IO_8 {
1031		pinmux = <0x420e009c 5 0x420e0000 0 0x420e03e4>;
1032	};
1033	/omit-if-no-ref/ mx6sx_pad_enet2_rx_clk__usb_otg2_oc: MX6SX_PAD_ENET2_RX_CLK__USB_OTG2_OC {
1034		pinmux = <0x420e009c 6 0x420e085c 1 0x420e03e4>;
1035	};
1036	/omit-if-no-ref/ mx6sx_pad_enet2_rx_clk__lcdif2_data_22: MX6SX_PAD_ENET2_RX_CLK__LCDIF2_DATA_22 {
1037		pinmux = <0x420e009c 7 0x420e0000 0 0x420e03e4>;
1038	};
1039	/omit-if-no-ref/ mx6sx_pad_enet2_rx_clk__vdec_debug_31: MX6SX_PAD_ENET2_RX_CLK__VDEC_DEBUG_31 {
1040		pinmux = <0x420e009c 8 0x420e0000 0 0x420e03e4>;
1041	};
1042	/omit-if-no-ref/ mx6sx_pad_enet2_rx_clk__pcie_ctrl_debug_25: MX6SX_PAD_ENET2_RX_CLK__PCIE_CTRL_DEBUG_25 {
1043		pinmux = <0x420e009c 9 0x420e0000 0 0x420e03e4>;
1044	};
1045	/omit-if-no-ref/ mx6sx_pad_enet2_tx_clk__enet2_tx_clk: MX6SX_PAD_ENET2_TX_CLK__ENET2_TX_CLK {
1046		pinmux = <0x420e00a0 0 0x420e0000 0 0x420e03e8>;
1047	};
1048	/omit-if-no-ref/ mx6sx_pad_enet2_tx_clk__enet2_ref_clk2: MX6SX_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 {
1049		pinmux = <0x420e00a0 1 0x420e076c 1 0x420e03e8>;
1050	};
1051	/omit-if-no-ref/ mx6sx_pad_enet2_tx_clk__i2c3_sda: MX6SX_PAD_ENET2_TX_CLK__I2C3_SDA {
1052		pinmux = <0x420e00a0 2 0x420e07bc 1 0x420e03e8>;
1053	};
1054	/omit-if-no-ref/ mx6sx_pad_enet2_tx_clk__uart1_dce_cts: MX6SX_PAD_ENET2_TX_CLK__UART1_DCE_CTS {
1055		pinmux = <0x420e00a0 3 0x420e0000 0 0x420e03e8>;
1056	};
1057	/omit-if-no-ref/ mx6sx_pad_enet2_tx_clk__uart1_dte_rts: MX6SX_PAD_ENET2_TX_CLK__UART1_DTE_RTS {
1058		pinmux = <0x420e00a0 3 0x420e082c 3 0x420e03e8>;
1059	};
1060	/omit-if-no-ref/ mx6sx_pad_enet2_tx_clk__mlb_clk: MX6SX_PAD_ENET2_TX_CLK__MLB_CLK {
1061		pinmux = <0x420e00a0 4 0x420e07e8 1 0x420e03e8>;
1062	};
1063	/omit-if-no-ref/ mx6sx_pad_enet2_tx_clk__gpio2_io_9: MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 {
1064		pinmux = <0x420e00a0 5 0x420e0000 0 0x420e03e8>;
1065	};
1066	/omit-if-no-ref/ mx6sx_pad_enet2_tx_clk__usb_otg2_pwr: MX6SX_PAD_ENET2_TX_CLK__USB_OTG2_PWR {
1067		pinmux = <0x420e00a0 6 0x420e0000 0 0x420e03e8>;
1068	};
1069	/omit-if-no-ref/ mx6sx_pad_enet2_tx_clk__lcdif2_data_23: MX6SX_PAD_ENET2_TX_CLK__LCDIF2_DATA_23 {
1070		pinmux = <0x420e00a0 7 0x420e0000 0 0x420e03e8>;
1071	};
1072	/omit-if-no-ref/ mx6sx_pad_enet2_tx_clk__vdec_debug_30: MX6SX_PAD_ENET2_TX_CLK__VDEC_DEBUG_30 {
1073		pinmux = <0x420e00a0 8 0x420e0000 0 0x420e03e8>;
1074	};
1075	/omit-if-no-ref/ mx6sx_pad_enet2_tx_clk__pcie_ctrl_debug_24: MX6SX_PAD_ENET2_TX_CLK__PCIE_CTRL_DEBUG_24 {
1076		pinmux = <0x420e00a0 9 0x420e0000 0 0x420e03e8>;
1077	};
1078	/omit-if-no-ref/ mx6sx_pad_key_col0__kpp_col_0: MX6SX_PAD_KEY_COL0__KPP_COL_0 {
1079		pinmux = <0x420e00a4 0 0x420e0000 0 0x420e03ec>;
1080	};
1081	/omit-if-no-ref/ mx6sx_pad_key_col0__usdhc3_cd_b: MX6SX_PAD_KEY_COL0__USDHC3_CD_B {
1082		pinmux = <0x420e00a4 1 0x420e0000 0 0x420e03ec>;
1083	};
1084	/omit-if-no-ref/ mx6sx_pad_key_col0__uart6_dce_rts: MX6SX_PAD_KEY_COL0__UART6_DCE_RTS {
1085		pinmux = <0x420e00a4 2 0x420e0854 2 0x420e03ec>;
1086	};
1087	/omit-if-no-ref/ mx6sx_pad_key_col0__uart6_dte_cts: MX6SX_PAD_KEY_COL0__UART6_DTE_CTS {
1088		pinmux = <0x420e00a4 2 0x420e0000 0 0x420e03ec>;
1089	};
1090	/omit-if-no-ref/ mx6sx_pad_key_col0__ecspi1_sclk: MX6SX_PAD_KEY_COL0__ECSPI1_SCLK {
1091		pinmux = <0x420e00a4 3 0x420e0710 0 0x420e03ec>;
1092	};
1093	/omit-if-no-ref/ mx6sx_pad_key_col0__audmux_aud5_txc: MX6SX_PAD_KEY_COL0__AUDMUX_AUD5_TXC {
1094		pinmux = <0x420e00a4 4 0x420e066c 0 0x420e03ec>;
1095	};
1096	/omit-if-no-ref/ mx6sx_pad_key_col0__gpio2_io_10: MX6SX_PAD_KEY_COL0__GPIO2_IO_10 {
1097		pinmux = <0x420e00a4 5 0x420e0000 0 0x420e03ec>;
1098	};
1099	/omit-if-no-ref/ mx6sx_pad_key_col0__sdma_ext_event_1: MX6SX_PAD_KEY_COL0__SDMA_EXT_EVENT_1 {
1100		pinmux = <0x420e00a4 6 0x420e0820 1 0x420e03ec>;
1101	};
1102	/omit-if-no-ref/ mx6sx_pad_key_col0__sai2_tx_bclk: MX6SX_PAD_KEY_COL0__SAI2_TX_BCLK {
1103		pinmux = <0x420e00a4 7 0x420e0814 0 0x420e03ec>;
1104	};
1105	/omit-if-no-ref/ mx6sx_pad_key_col0__vadc_data_0: MX6SX_PAD_KEY_COL0__VADC_DATA_0 {
1106		pinmux = <0x420e00a4 8 0x420e0000 0 0x420e03ec>;
1107	};
1108	/omit-if-no-ref/ mx6sx_pad_key_col1__kpp_col_1: MX6SX_PAD_KEY_COL1__KPP_COL_1 {
1109		pinmux = <0x420e00a8 0 0x420e0000 0 0x420e03f0>;
1110	};
1111	/omit-if-no-ref/ mx6sx_pad_key_col1__usdhc3_reset_b: MX6SX_PAD_KEY_COL1__USDHC3_RESET_B {
1112		pinmux = <0x420e00a8 1 0x420e0000 0 0x420e03f0>;
1113	};
1114	/omit-if-no-ref/ mx6sx_pad_key_col1__uart6_dce_tx: MX6SX_PAD_KEY_COL1__UART6_DCE_TX {
1115		pinmux = <0x420e00a8 2 0x420e0000 0 0x420e03f0>;
1116	};
1117	/omit-if-no-ref/ mx6sx_pad_key_col1__uart6_dte_rx: MX6SX_PAD_KEY_COL1__UART6_DTE_RX {
1118		pinmux = <0x420e00a8 2 0x420e0858 2 0x420e03f0>;
1119	};
1120	/omit-if-no-ref/ mx6sx_pad_key_col1__ecspi1_miso: MX6SX_PAD_KEY_COL1__ECSPI1_MISO {
1121		pinmux = <0x420e00a8 3 0x420e0714 0 0x420e03f0>;
1122	};
1123	/omit-if-no-ref/ mx6sx_pad_key_col1__audmux_aud5_txfs: MX6SX_PAD_KEY_COL1__AUDMUX_AUD5_TXFS {
1124		pinmux = <0x420e00a8 4 0x420e0670 0 0x420e03f0>;
1125	};
1126	/omit-if-no-ref/ mx6sx_pad_key_col1__gpio2_io_11: MX6SX_PAD_KEY_COL1__GPIO2_IO_11 {
1127		pinmux = <0x420e00a8 5 0x420e0000 0 0x420e03f0>;
1128	};
1129	/omit-if-no-ref/ mx6sx_pad_key_col1__usdhc3_reset: MX6SX_PAD_KEY_COL1__USDHC3_RESET {
1130		pinmux = <0x420e00a8 6 0x420e0000 0 0x420e03f0>;
1131	};
1132	/omit-if-no-ref/ mx6sx_pad_key_col1__sai2_tx_sync: MX6SX_PAD_KEY_COL1__SAI2_TX_SYNC {
1133		pinmux = <0x420e00a8 7 0x420e0818 0 0x420e03f0>;
1134	};
1135	/omit-if-no-ref/ mx6sx_pad_key_col2__kpp_col_2: MX6SX_PAD_KEY_COL2__KPP_COL_2 {
1136		pinmux = <0x420e00ac 0 0x420e0000 0 0x420e03f4>;
1137	};
1138	/omit-if-no-ref/ mx6sx_pad_key_col2__usdhc4_cd_b: MX6SX_PAD_KEY_COL2__USDHC4_CD_B {
1139		pinmux = <0x420e00ac 1 0x420e0874 1 0x420e03f4>;
1140	};
1141	/omit-if-no-ref/ mx6sx_pad_key_col2__uart5_dce_rts: MX6SX_PAD_KEY_COL2__UART5_DCE_RTS {
1142		pinmux = <0x420e00ac 2 0x420e084c 2 0x420e03f4>;
1143	};
1144	/omit-if-no-ref/ mx6sx_pad_key_col2__uart5_dte_cts: MX6SX_PAD_KEY_COL2__UART5_DTE_CTS {
1145		pinmux = <0x420e00ac 2 0x420e0000 0 0x420e03f4>;
1146	};
1147	/omit-if-no-ref/ mx6sx_pad_key_col2__can1_tx: MX6SX_PAD_KEY_COL2__CAN1_TX {
1148		pinmux = <0x420e00ac 3 0x420e0000 0 0x420e03f4>;
1149	};
1150	/omit-if-no-ref/ mx6sx_pad_key_col2__canfd_tx1: MX6SX_PAD_KEY_COL2__CANFD_TX1 {
1151		pinmux = <0x420e00ac 4 0x420e0000 0 0x420e03f4>;
1152	};
1153	/omit-if-no-ref/ mx6sx_pad_key_col2__gpio2_io_12: MX6SX_PAD_KEY_COL2__GPIO2_IO_12 {
1154		pinmux = <0x420e00ac 5 0x420e0000 0 0x420e03f4>;
1155	};
1156	/omit-if-no-ref/ mx6sx_pad_key_col2__weim_data_30: MX6SX_PAD_KEY_COL2__WEIM_DATA_30 {
1157		pinmux = <0x420e00ac 6 0x420e0000 0 0x420e03f4>;
1158	};
1159	/omit-if-no-ref/ mx6sx_pad_key_col2__ecspi1_rdy: MX6SX_PAD_KEY_COL2__ECSPI1_RDY {
1160		pinmux = <0x420e00ac 7 0x420e0000 0 0x420e03f4>;
1161	};
1162	/omit-if-no-ref/ mx6sx_pad_key_col3__kpp_col_3: MX6SX_PAD_KEY_COL3__KPP_COL_3 {
1163		pinmux = <0x420e00b0 0 0x420e0000 0 0x420e03f8>;
1164	};
1165	/omit-if-no-ref/ mx6sx_pad_key_col3__usdhc4_lctl: MX6SX_PAD_KEY_COL3__USDHC4_LCTL {
1166		pinmux = <0x420e00b0 1 0x420e0000 0 0x420e03f8>;
1167	};
1168	/omit-if-no-ref/ mx6sx_pad_key_col3__uart5_dce_tx: MX6SX_PAD_KEY_COL3__UART5_DCE_TX {
1169		pinmux = <0x420e00b0 2 0x420e0000 0 0x420e03f8>;
1170	};
1171	/omit-if-no-ref/ mx6sx_pad_key_col3__uart5_dte_rx: MX6SX_PAD_KEY_COL3__UART5_DTE_RX {
1172		pinmux = <0x420e00b0 2 0x420e0850 2 0x420e03f8>;
1173	};
1174	/omit-if-no-ref/ mx6sx_pad_key_col3__can2_tx: MX6SX_PAD_KEY_COL3__CAN2_TX {
1175		pinmux = <0x420e00b0 3 0x420e0000 0 0x420e03f8>;
1176	};
1177	/omit-if-no-ref/ mx6sx_pad_key_col3__canfd_tx2: MX6SX_PAD_KEY_COL3__CANFD_TX2 {
1178		pinmux = <0x420e00b0 4 0x420e0000 0 0x420e03f8>;
1179	};
1180	/omit-if-no-ref/ mx6sx_pad_key_col3__gpio2_io_13: MX6SX_PAD_KEY_COL3__GPIO2_IO_13 {
1181		pinmux = <0x420e00b0 5 0x420e0000 0 0x420e03f8>;
1182	};
1183	/omit-if-no-ref/ mx6sx_pad_key_col3__weim_data_28: MX6SX_PAD_KEY_COL3__WEIM_DATA_28 {
1184		pinmux = <0x420e00b0 6 0x420e0000 0 0x420e03f8>;
1185	};
1186	/omit-if-no-ref/ mx6sx_pad_key_col3__ecspi1_ss2: MX6SX_PAD_KEY_COL3__ECSPI1_SS2 {
1187		pinmux = <0x420e00b0 7 0x420e0000 0 0x420e03f8>;
1188	};
1189	/omit-if-no-ref/ mx6sx_pad_key_col4__kpp_col_4: MX6SX_PAD_KEY_COL4__KPP_COL_4 {
1190		pinmux = <0x420e00b4 0 0x420e0000 0 0x420e03fc>;
1191	};
1192	/omit-if-no-ref/ mx6sx_pad_key_col4__enet2_mdc: MX6SX_PAD_KEY_COL4__ENET2_MDC {
1193		pinmux = <0x420e00b4 1 0x420e0000 0 0x420e03fc>;
1194	};
1195	/omit-if-no-ref/ mx6sx_pad_key_col4__i2c3_scl: MX6SX_PAD_KEY_COL4__I2C3_SCL {
1196		pinmux = <0x420e00b4 2 0x420e07b8 2 0x420e03fc>;
1197	};
1198	/omit-if-no-ref/ mx6sx_pad_key_col4__usdhc2_lctl: MX6SX_PAD_KEY_COL4__USDHC2_LCTL {
1199		pinmux = <0x420e00b4 3 0x420e0000 0 0x420e03fc>;
1200	};
1201	/omit-if-no-ref/ mx6sx_pad_key_col4__audmux_aud5_rxc: MX6SX_PAD_KEY_COL4__AUDMUX_AUD5_RXC {
1202		pinmux = <0x420e00b4 4 0x420e0664 0 0x420e03fc>;
1203	};
1204	/omit-if-no-ref/ mx6sx_pad_key_col4__gpio2_io_14: MX6SX_PAD_KEY_COL4__GPIO2_IO_14 {
1205		pinmux = <0x420e00b4 5 0x420e0000 0 0x420e03fc>;
1206	};
1207	/omit-if-no-ref/ mx6sx_pad_key_col4__weim_cre: MX6SX_PAD_KEY_COL4__WEIM_CRE {
1208		pinmux = <0x420e00b4 6 0x420e0000 0 0x420e03fc>;
1209	};
1210	/omit-if-no-ref/ mx6sx_pad_key_col4__sai2_rx_bclk: MX6SX_PAD_KEY_COL4__SAI2_RX_BCLK {
1211		pinmux = <0x420e00b4 7 0x420e0808 0 0x420e03fc>;
1212	};
1213	/omit-if-no-ref/ mx6sx_pad_key_row0__kpp_row_0: MX6SX_PAD_KEY_ROW0__KPP_ROW_0 {
1214		pinmux = <0x420e00b8 0 0x420e0000 0 0x420e0400>;
1215	};
1216	/omit-if-no-ref/ mx6sx_pad_key_row0__usdhc3_wp: MX6SX_PAD_KEY_ROW0__USDHC3_WP {
1217		pinmux = <0x420e00b8 1 0x420e0000 0 0x420e0400>;
1218	};
1219	/omit-if-no-ref/ mx6sx_pad_key_row0__uart6_dce_cts: MX6SX_PAD_KEY_ROW0__UART6_DCE_CTS {
1220		pinmux = <0x420e00b8 2 0x420e0000 0 0x420e0400>;
1221	};
1222	/omit-if-no-ref/ mx6sx_pad_key_row0__uart6_dte_rts: MX6SX_PAD_KEY_ROW0__UART6_DTE_RTS {
1223		pinmux = <0x420e00b8 2 0x420e0854 3 0x420e0400>;
1224	};
1225	/omit-if-no-ref/ mx6sx_pad_key_row0__ecspi1_mosi: MX6SX_PAD_KEY_ROW0__ECSPI1_MOSI {
1226		pinmux = <0x420e00b8 3 0x420e0718 0 0x420e0400>;
1227	};
1228	/omit-if-no-ref/ mx6sx_pad_key_row0__audmux_aud5_txd: MX6SX_PAD_KEY_ROW0__AUDMUX_AUD5_TXD {
1229		pinmux = <0x420e00b8 4 0x420e0660 0 0x420e0400>;
1230	};
1231	/omit-if-no-ref/ mx6sx_pad_key_row0__gpio2_io_15: MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 {
1232		pinmux = <0x420e00b8 5 0x420e0000 0 0x420e0400>;
1233	};
1234	/omit-if-no-ref/ mx6sx_pad_key_row0__sdma_ext_event_0: MX6SX_PAD_KEY_ROW0__SDMA_EXT_EVENT_0 {
1235		pinmux = <0x420e00b8 6 0x420e081c 1 0x420e0400>;
1236	};
1237	/omit-if-no-ref/ mx6sx_pad_key_row0__sai2_tx_data_0: MX6SX_PAD_KEY_ROW0__SAI2_TX_DATA_0 {
1238		pinmux = <0x420e00b8 7 0x420e0000 0 0x420e0400>;
1239	};
1240	/omit-if-no-ref/ mx6sx_pad_key_row0__gpu_idle: MX6SX_PAD_KEY_ROW0__GPU_IDLE {
1241		pinmux = <0x420e00b8 8 0x420e0000 0 0x420e0400>;
1242	};
1243	/omit-if-no-ref/ mx6sx_pad_key_row1__kpp_row_1: MX6SX_PAD_KEY_ROW1__KPP_ROW_1 {
1244		pinmux = <0x420e00bc 0 0x420e0000 0 0x420e0404>;
1245	};
1246	/omit-if-no-ref/ mx6sx_pad_key_row1__usdhc4_vselect: MX6SX_PAD_KEY_ROW1__USDHC4_VSELECT {
1247		pinmux = <0x420e00bc 1 0x420e0000 0 0x420e0404>;
1248	};
1249	/omit-if-no-ref/ mx6sx_pad_key_row1__uart6_dce_rx: MX6SX_PAD_KEY_ROW1__UART6_DCE_RX {
1250		pinmux = <0x420e00bc 2 0x420e0858 3 0x420e0404>;
1251	};
1252	/omit-if-no-ref/ mx6sx_pad_key_row1__uart6_dte_tx: MX6SX_PAD_KEY_ROW1__UART6_DTE_TX {
1253		pinmux = <0x420e00bc 2 0x420e0000 0 0x420e0404>;
1254	};
1255	/omit-if-no-ref/ mx6sx_pad_key_row1__ecspi1_ss0: MX6SX_PAD_KEY_ROW1__ECSPI1_SS0 {
1256		pinmux = <0x420e00bc 3 0x420e071c 0 0x420e0404>;
1257	};
1258	/omit-if-no-ref/ mx6sx_pad_key_row1__audmux_aud5_rxd: MX6SX_PAD_KEY_ROW1__AUDMUX_AUD5_RXD {
1259		pinmux = <0x420e00bc 4 0x420e065c 0 0x420e0404>;
1260	};
1261	/omit-if-no-ref/ mx6sx_pad_key_row1__gpio2_io_16: MX6SX_PAD_KEY_ROW1__GPIO2_IO_16 {
1262		pinmux = <0x420e00bc 5 0x420e0000 0 0x420e0404>;
1263	};
1264	/omit-if-no-ref/ mx6sx_pad_key_row1__weim_data_31: MX6SX_PAD_KEY_ROW1__WEIM_DATA_31 {
1265		pinmux = <0x420e00bc 6 0x420e0000 0 0x420e0404>;
1266	};
1267	/omit-if-no-ref/ mx6sx_pad_key_row1__sai2_rx_data_0: MX6SX_PAD_KEY_ROW1__SAI2_RX_DATA_0 {
1268		pinmux = <0x420e00bc 7 0x420e080c 0 0x420e0404>;
1269	};
1270	/omit-if-no-ref/ mx6sx_pad_key_row1__m4_nmi: MX6SX_PAD_KEY_ROW1__M4_NMI {
1271		pinmux = <0x420e00bc 8 0x420e0000 0 0x420e0404>;
1272	};
1273	/omit-if-no-ref/ mx6sx_pad_key_row2__kpp_row_2: MX6SX_PAD_KEY_ROW2__KPP_ROW_2 {
1274		pinmux = <0x420e00c0 0 0x420e0000 0 0x420e0408>;
1275	};
1276	/omit-if-no-ref/ mx6sx_pad_key_row2__usdhc4_wp: MX6SX_PAD_KEY_ROW2__USDHC4_WP {
1277		pinmux = <0x420e00c0 1 0x420e0878 1 0x420e0408>;
1278	};
1279	/omit-if-no-ref/ mx6sx_pad_key_row2__uart5_dce_cts: MX6SX_PAD_KEY_ROW2__UART5_DCE_CTS {
1280		pinmux = <0x420e00c0 2 0x420e0000 0 0x420e0408>;
1281	};
1282	/omit-if-no-ref/ mx6sx_pad_key_row2__uart5_dte_rts: MX6SX_PAD_KEY_ROW2__UART5_DTE_RTS {
1283		pinmux = <0x420e00c0 2 0x420e084c 3 0x420e0408>;
1284	};
1285	/omit-if-no-ref/ mx6sx_pad_key_row2__can1_rx: MX6SX_PAD_KEY_ROW2__CAN1_RX {
1286		pinmux = <0x420e00c0 3 0x420e068c 1 0x420e0408>;
1287	};
1288	/omit-if-no-ref/ mx6sx_pad_key_row2__canfd_rx1: MX6SX_PAD_KEY_ROW2__CANFD_RX1 {
1289		pinmux = <0x420e00c0 4 0x420e0694 1 0x420e0408>;
1290	};
1291	/omit-if-no-ref/ mx6sx_pad_key_row2__gpio2_io_17: MX6SX_PAD_KEY_ROW2__GPIO2_IO_17 {
1292		pinmux = <0x420e00c0 5 0x420e0000 0 0x420e0408>;
1293	};
1294	/omit-if-no-ref/ mx6sx_pad_key_row2__weim_data_29: MX6SX_PAD_KEY_ROW2__WEIM_DATA_29 {
1295		pinmux = <0x420e00c0 6 0x420e0000 0 0x420e0408>;
1296	};
1297	/omit-if-no-ref/ mx6sx_pad_key_row2__ecspi1_ss3: MX6SX_PAD_KEY_ROW2__ECSPI1_SS3 {
1298		pinmux = <0x420e00c0 7 0x420e0000 0 0x420e0408>;
1299	};
1300	/omit-if-no-ref/ mx6sx_pad_key_row3__kpp_row_3: MX6SX_PAD_KEY_ROW3__KPP_ROW_3 {
1301		pinmux = <0x420e00c4 0 0x420e0000 0 0x420e040c>;
1302	};
1303	/omit-if-no-ref/ mx6sx_pad_key_row3__usdhc3_lctl: MX6SX_PAD_KEY_ROW3__USDHC3_LCTL {
1304		pinmux = <0x420e00c4 1 0x420e0000 0 0x420e040c>;
1305	};
1306	/omit-if-no-ref/ mx6sx_pad_key_row3__uart5_dce_rx: MX6SX_PAD_KEY_ROW3__UART5_DCE_RX {
1307		pinmux = <0x420e00c4 2 0x420e0850 3 0x420e040c>;
1308	};
1309	/omit-if-no-ref/ mx6sx_pad_key_row3__uart5_dte_tx: MX6SX_PAD_KEY_ROW3__UART5_DTE_TX {
1310		pinmux = <0x420e00c4 2 0x420e0000 0 0x420e040c>;
1311	};
1312	/omit-if-no-ref/ mx6sx_pad_key_row3__can2_rx: MX6SX_PAD_KEY_ROW3__CAN2_RX {
1313		pinmux = <0x420e00c4 3 0x420e0690 1 0x420e040c>;
1314	};
1315	/omit-if-no-ref/ mx6sx_pad_key_row3__canfd_rx2: MX6SX_PAD_KEY_ROW3__CANFD_RX2 {
1316		pinmux = <0x420e00c4 4 0x420e0698 1 0x420e040c>;
1317	};
1318	/omit-if-no-ref/ mx6sx_pad_key_row3__gpio2_io_18: MX6SX_PAD_KEY_ROW3__GPIO2_IO_18 {
1319		pinmux = <0x420e00c4 5 0x420e0000 0 0x420e040c>;
1320	};
1321	/omit-if-no-ref/ mx6sx_pad_key_row3__weim_dtack_b: MX6SX_PAD_KEY_ROW3__WEIM_DTACK_B {
1322		pinmux = <0x420e00c4 6 0x420e0000 0 0x420e040c>;
1323	};
1324	/omit-if-no-ref/ mx6sx_pad_key_row3__ecspi1_ss1: MX6SX_PAD_KEY_ROW3__ECSPI1_SS1 {
1325		pinmux = <0x420e00c4 7 0x420e0000 0 0x420e040c>;
1326	};
1327	/omit-if-no-ref/ mx6sx_pad_key_row4__kpp_row_4: MX6SX_PAD_KEY_ROW4__KPP_ROW_4 {
1328		pinmux = <0x420e00c8 0 0x420e0000 0 0x420e0410>;
1329	};
1330	/omit-if-no-ref/ mx6sx_pad_key_row4__enet2_mdio: MX6SX_PAD_KEY_ROW4__ENET2_MDIO {
1331		pinmux = <0x420e00c8 1 0x420e0770 3 0x420e0410>;
1332	};
1333	/omit-if-no-ref/ mx6sx_pad_key_row4__i2c3_sda: MX6SX_PAD_KEY_ROW4__I2C3_SDA {
1334		pinmux = <0x420e00c8 2 0x420e07bc 2 0x420e0410>;
1335	};
1336	/omit-if-no-ref/ mx6sx_pad_key_row4__usdhc1_lctl: MX6SX_PAD_KEY_ROW4__USDHC1_LCTL {
1337		pinmux = <0x420e00c8 3 0x420e0000 0 0x420e0410>;
1338	};
1339	/omit-if-no-ref/ mx6sx_pad_key_row4__audmux_aud5_rxfs: MX6SX_PAD_KEY_ROW4__AUDMUX_AUD5_RXFS {
1340		pinmux = <0x420e00c8 4 0x420e0668 0 0x420e0410>;
1341	};
1342	/omit-if-no-ref/ mx6sx_pad_key_row4__gpio2_io_19: MX6SX_PAD_KEY_ROW4__GPIO2_IO_19 {
1343		pinmux = <0x420e00c8 5 0x420e0000 0 0x420e0410>;
1344	};
1345	/omit-if-no-ref/ mx6sx_pad_key_row4__weim_aclk_freerun: MX6SX_PAD_KEY_ROW4__WEIM_ACLK_FREERUN {
1346		pinmux = <0x420e00c8 6 0x420e0000 0 0x420e0410>;
1347	};
1348	/omit-if-no-ref/ mx6sx_pad_key_row4__sai2_rx_sync: MX6SX_PAD_KEY_ROW4__SAI2_RX_SYNC {
1349		pinmux = <0x420e00c8 7 0x420e0810 0 0x420e0410>;
1350	};
1351	/omit-if-no-ref/ mx6sx_pad_lcd1_clk__lcdif1_clk: MX6SX_PAD_LCD1_CLK__LCDIF1_CLK {
1352		pinmux = <0x420e00cc 0 0x420e0000 0 0x420e0414>;
1353	};
1354	/omit-if-no-ref/ mx6sx_pad_lcd1_clk__lcdif1_wr_rwn: MX6SX_PAD_LCD1_CLK__LCDIF1_WR_RWN {
1355		pinmux = <0x420e00cc 1 0x420e0000 0 0x420e0414>;
1356	};
1357	/omit-if-no-ref/ mx6sx_pad_lcd1_clk__audmux_aud3_rxc: MX6SX_PAD_LCD1_CLK__AUDMUX_AUD3_RXC {
1358		pinmux = <0x420e00cc 2 0x420e0634 1 0x420e0414>;
1359	};
1360	/omit-if-no-ref/ mx6sx_pad_lcd1_clk__enet1_1588_event2_in: MX6SX_PAD_LCD1_CLK__ENET1_1588_EVENT2_IN {
1361		pinmux = <0x420e00cc 3 0x420e0000 0 0x420e0414>;
1362	};
1363	/omit-if-no-ref/ mx6sx_pad_lcd1_clk__csi1_data_16: MX6SX_PAD_LCD1_CLK__CSI1_DATA_16 {
1364		pinmux = <0x420e00cc 4 0x420e06dc 0 0x420e0414>;
1365	};
1366	/omit-if-no-ref/ mx6sx_pad_lcd1_clk__gpio3_io_0: MX6SX_PAD_LCD1_CLK__GPIO3_IO_0 {
1367		pinmux = <0x420e00cc 5 0x420e0000 0 0x420e0414>;
1368	};
1369	/omit-if-no-ref/ mx6sx_pad_lcd1_clk__usdhc1_wp: MX6SX_PAD_LCD1_CLK__USDHC1_WP {
1370		pinmux = <0x420e00cc 6 0x420e0868 0 0x420e0414>;
1371	};
1372	/omit-if-no-ref/ mx6sx_pad_lcd1_clk__sim_m_haddr_16: MX6SX_PAD_LCD1_CLK__SIM_M_HADDR_16 {
1373		pinmux = <0x420e00cc 7 0x420e0000 0 0x420e0414>;
1374	};
1375	/omit-if-no-ref/ mx6sx_pad_lcd1_clk__vadc_test_0: MX6SX_PAD_LCD1_CLK__VADC_TEST_0 {
1376		pinmux = <0x420e00cc 8 0x420e0000 0 0x420e0414>;
1377	};
1378	/omit-if-no-ref/ mx6sx_pad_lcd1_clk__mmdc_debug_0: MX6SX_PAD_LCD1_CLK__MMDC_DEBUG_0 {
1379		pinmux = <0x420e00cc 9 0x420e0000 0 0x420e0414>;
1380	};
1381	/omit-if-no-ref/ mx6sx_pad_lcd1_data00__lcdif1_data_0: MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 {
1382		pinmux = <0x420e00d0 0 0x420e0000 0 0x420e0418>;
1383	};
1384	/omit-if-no-ref/ mx6sx_pad_lcd1_data00__weim_cs1_b: MX6SX_PAD_LCD1_DATA00__WEIM_CS1_B {
1385		pinmux = <0x420e00d0 1 0x420e0000 0 0x420e0418>;
1386	};
1387	/omit-if-no-ref/ mx6sx_pad_lcd1_data00__m4_trace_0: MX6SX_PAD_LCD1_DATA00__M4_TRACE_0 {
1388		pinmux = <0x420e00d0 2 0x420e0000 0 0x420e0418>;
1389	};
1390	/omit-if-no-ref/ mx6sx_pad_lcd1_data00__kitten_trace_0: MX6SX_PAD_LCD1_DATA00__KITTEN_TRACE_0 {
1391		pinmux = <0x420e00d0 3 0x420e0000 0 0x420e0418>;
1392	};
1393	/omit-if-no-ref/ mx6sx_pad_lcd1_data00__csi1_data_20: MX6SX_PAD_LCD1_DATA00__CSI1_DATA_20 {
1394		pinmux = <0x420e00d0 4 0x420e06ec 0 0x420e0418>;
1395	};
1396	/omit-if-no-ref/ mx6sx_pad_lcd1_data00__gpio3_io_1: MX6SX_PAD_LCD1_DATA00__GPIO3_IO_1 {
1397		pinmux = <0x420e00d0 5 0x420e0000 0 0x420e0418>;
1398	};
1399	/omit-if-no-ref/ mx6sx_pad_lcd1_data00__src_bt_cfg_0: MX6SX_PAD_LCD1_DATA00__SRC_BT_CFG_0 {
1400		pinmux = <0x420e00d0 6 0x420e0000 0 0x420e0418>;
1401	};
1402	/omit-if-no-ref/ mx6sx_pad_lcd1_data00__sim_m_haddr_21: MX6SX_PAD_LCD1_DATA00__SIM_M_HADDR_21 {
1403		pinmux = <0x420e00d0 7 0x420e0000 0 0x420e0418>;
1404	};
1405	/omit-if-no-ref/ mx6sx_pad_lcd1_data00__vadc_test_5: MX6SX_PAD_LCD1_DATA00__VADC_TEST_5 {
1406		pinmux = <0x420e00d0 8 0x420e0000 0 0x420e0418>;
1407	};
1408	/omit-if-no-ref/ mx6sx_pad_lcd1_data00__mmdc_debug_5: MX6SX_PAD_LCD1_DATA00__MMDC_DEBUG_5 {
1409		pinmux = <0x420e00d0 9 0x420e0000 0 0x420e0418>;
1410	};
1411	/omit-if-no-ref/ mx6sx_pad_lcd1_data01__lcdif1_data_1: MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 {
1412		pinmux = <0x420e00d4 0 0x420e0000 0 0x420e041c>;
1413	};
1414	/omit-if-no-ref/ mx6sx_pad_lcd1_data01__weim_cs2_b: MX6SX_PAD_LCD1_DATA01__WEIM_CS2_B {
1415		pinmux = <0x420e00d4 1 0x420e0000 0 0x420e041c>;
1416	};
1417	/omit-if-no-ref/ mx6sx_pad_lcd1_data01__m4_trace_1: MX6SX_PAD_LCD1_DATA01__M4_TRACE_1 {
1418		pinmux = <0x420e00d4 2 0x420e0000 0 0x420e041c>;
1419	};
1420	/omit-if-no-ref/ mx6sx_pad_lcd1_data01__kitten_trace_1: MX6SX_PAD_LCD1_DATA01__KITTEN_TRACE_1 {
1421		pinmux = <0x420e00d4 3 0x420e0000 0 0x420e041c>;
1422	};
1423	/omit-if-no-ref/ mx6sx_pad_lcd1_data01__csi1_data_21: MX6SX_PAD_LCD1_DATA01__CSI1_DATA_21 {
1424		pinmux = <0x420e00d4 4 0x420e06f0 0 0x420e041c>;
1425	};
1426	/omit-if-no-ref/ mx6sx_pad_lcd1_data01__gpio3_io_2: MX6SX_PAD_LCD1_DATA01__GPIO3_IO_2 {
1427		pinmux = <0x420e00d4 5 0x420e0000 0 0x420e041c>;
1428	};
1429	/omit-if-no-ref/ mx6sx_pad_lcd1_data01__src_bt_cfg_1: MX6SX_PAD_LCD1_DATA01__SRC_BT_CFG_1 {
1430		pinmux = <0x420e00d4 6 0x420e0000 0 0x420e041c>;
1431	};
1432	/omit-if-no-ref/ mx6sx_pad_lcd1_data01__sim_m_haddr_22: MX6SX_PAD_LCD1_DATA01__SIM_M_HADDR_22 {
1433		pinmux = <0x420e00d4 7 0x420e0000 0 0x420e041c>;
1434	};
1435	/omit-if-no-ref/ mx6sx_pad_lcd1_data01__vadc_test_6: MX6SX_PAD_LCD1_DATA01__VADC_TEST_6 {
1436		pinmux = <0x420e00d4 8 0x420e0000 0 0x420e041c>;
1437	};
1438	/omit-if-no-ref/ mx6sx_pad_lcd1_data01__mmdc_debug_6: MX6SX_PAD_LCD1_DATA01__MMDC_DEBUG_6 {
1439		pinmux = <0x420e00d4 9 0x420e0000 0 0x420e041c>;
1440	};
1441	/omit-if-no-ref/ mx6sx_pad_lcd1_data02__lcdif1_data_2: MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 {
1442		pinmux = <0x420e00d8 0 0x420e0000 0 0x420e0420>;
1443	};
1444	/omit-if-no-ref/ mx6sx_pad_lcd1_data02__weim_cs3_b: MX6SX_PAD_LCD1_DATA02__WEIM_CS3_B {
1445		pinmux = <0x420e00d8 1 0x420e0000 0 0x420e0420>;
1446	};
1447	/omit-if-no-ref/ mx6sx_pad_lcd1_data02__m4_trace_2: MX6SX_PAD_LCD1_DATA02__M4_TRACE_2 {
1448		pinmux = <0x420e00d8 2 0x420e0000 0 0x420e0420>;
1449	};
1450	/omit-if-no-ref/ mx6sx_pad_lcd1_data02__kitten_trace_2: MX6SX_PAD_LCD1_DATA02__KITTEN_TRACE_2 {
1451		pinmux = <0x420e00d8 3 0x420e0000 0 0x420e0420>;
1452	};
1453	/omit-if-no-ref/ mx6sx_pad_lcd1_data02__csi1_data_22: MX6SX_PAD_LCD1_DATA02__CSI1_DATA_22 {
1454		pinmux = <0x420e00d8 4 0x420e06f4 0 0x420e0420>;
1455	};
1456	/omit-if-no-ref/ mx6sx_pad_lcd1_data02__gpio3_io_3: MX6SX_PAD_LCD1_DATA02__GPIO3_IO_3 {
1457		pinmux = <0x420e00d8 5 0x420e0000 0 0x420e0420>;
1458	};
1459	/omit-if-no-ref/ mx6sx_pad_lcd1_data02__src_bt_cfg_2: MX6SX_PAD_LCD1_DATA02__SRC_BT_CFG_2 {
1460		pinmux = <0x420e00d8 6 0x420e0000 0 0x420e0420>;
1461	};
1462	/omit-if-no-ref/ mx6sx_pad_lcd1_data02__sim_m_haddr_23: MX6SX_PAD_LCD1_DATA02__SIM_M_HADDR_23 {
1463		pinmux = <0x420e00d8 7 0x420e0000 0 0x420e0420>;
1464	};
1465	/omit-if-no-ref/ mx6sx_pad_lcd1_data02__vadc_test_7: MX6SX_PAD_LCD1_DATA02__VADC_TEST_7 {
1466		pinmux = <0x420e00d8 8 0x420e0000 0 0x420e0420>;
1467	};
1468	/omit-if-no-ref/ mx6sx_pad_lcd1_data02__mmdc_debug_7: MX6SX_PAD_LCD1_DATA02__MMDC_DEBUG_7 {
1469		pinmux = <0x420e00d8 9 0x420e0000 0 0x420e0420>;
1470	};
1471	/omit-if-no-ref/ mx6sx_pad_lcd1_data03__lcdif1_data_3: MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 {
1472		pinmux = <0x420e00dc 0 0x420e0000 0 0x420e0424>;
1473	};
1474	/omit-if-no-ref/ mx6sx_pad_lcd1_data03__weim_addr_24: MX6SX_PAD_LCD1_DATA03__WEIM_ADDR_24 {
1475		pinmux = <0x420e00dc 1 0x420e0000 0 0x420e0424>;
1476	};
1477	/omit-if-no-ref/ mx6sx_pad_lcd1_data03__m4_trace_3: MX6SX_PAD_LCD1_DATA03__M4_TRACE_3 {
1478		pinmux = <0x420e00dc 2 0x420e0000 0 0x420e0424>;
1479	};
1480	/omit-if-no-ref/ mx6sx_pad_lcd1_data03__kitten_trace_3: MX6SX_PAD_LCD1_DATA03__KITTEN_TRACE_3 {
1481		pinmux = <0x420e00dc 3 0x420e0000 0 0x420e0424>;
1482	};
1483	/omit-if-no-ref/ mx6sx_pad_lcd1_data03__csi1_data_23: MX6SX_PAD_LCD1_DATA03__CSI1_DATA_23 {
1484		pinmux = <0x420e00dc 4 0x420e06f8 0 0x420e0424>;
1485	};
1486	/omit-if-no-ref/ mx6sx_pad_lcd1_data03__gpio3_io_4: MX6SX_PAD_LCD1_DATA03__GPIO3_IO_4 {
1487		pinmux = <0x420e00dc 5 0x420e0000 0 0x420e0424>;
1488	};
1489	/omit-if-no-ref/ mx6sx_pad_lcd1_data03__src_bt_cfg_3: MX6SX_PAD_LCD1_DATA03__SRC_BT_CFG_3 {
1490		pinmux = <0x420e00dc 6 0x420e0000 0 0x420e0424>;
1491	};
1492	/omit-if-no-ref/ mx6sx_pad_lcd1_data03__sim_m_haddr_24: MX6SX_PAD_LCD1_DATA03__SIM_M_HADDR_24 {
1493		pinmux = <0x420e00dc 7 0x420e0000 0 0x420e0424>;
1494	};
1495	/omit-if-no-ref/ mx6sx_pad_lcd1_data03__vadc_test_8: MX6SX_PAD_LCD1_DATA03__VADC_TEST_8 {
1496		pinmux = <0x420e00dc 8 0x420e0000 0 0x420e0424>;
1497	};
1498	/omit-if-no-ref/ mx6sx_pad_lcd1_data03__mmdc_debug_8: MX6SX_PAD_LCD1_DATA03__MMDC_DEBUG_8 {
1499		pinmux = <0x420e00dc 9 0x420e0000 0 0x420e0424>;
1500	};
1501	/omit-if-no-ref/ mx6sx_pad_lcd1_data04__lcdif1_data_4: MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 {
1502		pinmux = <0x420e00e0 0 0x420e0000 0 0x420e0428>;
1503	};
1504	/omit-if-no-ref/ mx6sx_pad_lcd1_data04__weim_addr_25: MX6SX_PAD_LCD1_DATA04__WEIM_ADDR_25 {
1505		pinmux = <0x420e00e0 1 0x420e0000 0 0x420e0428>;
1506	};
1507	/omit-if-no-ref/ mx6sx_pad_lcd1_data04__kitten_trace_4: MX6SX_PAD_LCD1_DATA04__KITTEN_TRACE_4 {
1508		pinmux = <0x420e00e0 3 0x420e0000 0 0x420e0428>;
1509	};
1510	/omit-if-no-ref/ mx6sx_pad_lcd1_data04__csi1_vsync: MX6SX_PAD_LCD1_DATA04__CSI1_VSYNC {
1511		pinmux = <0x420e00e0 4 0x420e0708 1 0x420e0428>;
1512	};
1513	/omit-if-no-ref/ mx6sx_pad_lcd1_data04__gpio3_io_5: MX6SX_PAD_LCD1_DATA04__GPIO3_IO_5 {
1514		pinmux = <0x420e00e0 5 0x420e0000 0 0x420e0428>;
1515	};
1516	/omit-if-no-ref/ mx6sx_pad_lcd1_data04__src_bt_cfg_4: MX6SX_PAD_LCD1_DATA04__SRC_BT_CFG_4 {
1517		pinmux = <0x420e00e0 6 0x420e0000 0 0x420e0428>;
1518	};
1519	/omit-if-no-ref/ mx6sx_pad_lcd1_data04__sim_m_haddr_25: MX6SX_PAD_LCD1_DATA04__SIM_M_HADDR_25 {
1520		pinmux = <0x420e00e0 7 0x420e0000 0 0x420e0428>;
1521	};
1522	/omit-if-no-ref/ mx6sx_pad_lcd1_data04__vadc_test_9: MX6SX_PAD_LCD1_DATA04__VADC_TEST_9 {
1523		pinmux = <0x420e00e0 8 0x420e0000 0 0x420e0428>;
1524	};
1525	/omit-if-no-ref/ mx6sx_pad_lcd1_data04__mmdc_debug_9: MX6SX_PAD_LCD1_DATA04__MMDC_DEBUG_9 {
1526		pinmux = <0x420e00e0 9 0x420e0000 0 0x420e0428>;
1527	};
1528	/omit-if-no-ref/ mx6sx_pad_lcd1_data05__lcdif1_data_5: MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 {
1529		pinmux = <0x420e00e4 0 0x420e0000 0 0x420e042c>;
1530	};
1531	/omit-if-no-ref/ mx6sx_pad_lcd1_data05__weim_addr_26: MX6SX_PAD_LCD1_DATA05__WEIM_ADDR_26 {
1532		pinmux = <0x420e00e4 1 0x420e0000 0 0x420e042c>;
1533	};
1534	/omit-if-no-ref/ mx6sx_pad_lcd1_data05__kitten_trace_5: MX6SX_PAD_LCD1_DATA05__KITTEN_TRACE_5 {
1535		pinmux = <0x420e00e4 3 0x420e0000 0 0x420e042c>;
1536	};
1537	/omit-if-no-ref/ mx6sx_pad_lcd1_data05__csi1_hsync: MX6SX_PAD_LCD1_DATA05__CSI1_HSYNC {
1538		pinmux = <0x420e00e4 4 0x420e0700 1 0x420e042c>;
1539	};
1540	/omit-if-no-ref/ mx6sx_pad_lcd1_data05__gpio3_io_6: MX6SX_PAD_LCD1_DATA05__GPIO3_IO_6 {
1541		pinmux = <0x420e00e4 5 0x420e0000 0 0x420e042c>;
1542	};
1543	/omit-if-no-ref/ mx6sx_pad_lcd1_data05__src_bt_cfg_5: MX6SX_PAD_LCD1_DATA05__SRC_BT_CFG_5 {
1544		pinmux = <0x420e00e4 6 0x420e0000 0 0x420e042c>;
1545	};
1546	/omit-if-no-ref/ mx6sx_pad_lcd1_data05__sim_m_haddr_26: MX6SX_PAD_LCD1_DATA05__SIM_M_HADDR_26 {
1547		pinmux = <0x420e00e4 7 0x420e0000 0 0x420e042c>;
1548	};
1549	/omit-if-no-ref/ mx6sx_pad_lcd1_data05__vadc_test_10: MX6SX_PAD_LCD1_DATA05__VADC_TEST_10 {
1550		pinmux = <0x420e00e4 8 0x420e0000 0 0x420e042c>;
1551	};
1552	/omit-if-no-ref/ mx6sx_pad_lcd1_data05__mmdc_debug_10: MX6SX_PAD_LCD1_DATA05__MMDC_DEBUG_10 {
1553		pinmux = <0x420e00e4 9 0x420e0000 0 0x420e042c>;
1554	};
1555	/omit-if-no-ref/ mx6sx_pad_lcd1_data06__lcdif1_data_6: MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 {
1556		pinmux = <0x420e00e8 0 0x420e0000 0 0x420e0430>;
1557	};
1558	/omit-if-no-ref/ mx6sx_pad_lcd1_data06__weim_eb_b_2: MX6SX_PAD_LCD1_DATA06__WEIM_EB_B_2 {
1559		pinmux = <0x420e00e8 1 0x420e0000 0 0x420e0430>;
1560	};
1561	/omit-if-no-ref/ mx6sx_pad_lcd1_data06__kitten_trace_6: MX6SX_PAD_LCD1_DATA06__KITTEN_TRACE_6 {
1562		pinmux = <0x420e00e8 3 0x420e0000 0 0x420e0430>;
1563	};
1564	/omit-if-no-ref/ mx6sx_pad_lcd1_data06__csi1_pixclk: MX6SX_PAD_LCD1_DATA06__CSI1_PIXCLK {
1565		pinmux = <0x420e00e8 4 0x420e0704 1 0x420e0430>;
1566	};
1567	/omit-if-no-ref/ mx6sx_pad_lcd1_data06__gpio3_io_7: MX6SX_PAD_LCD1_DATA06__GPIO3_IO_7 {
1568		pinmux = <0x420e00e8 5 0x420e0000 0 0x420e0430>;
1569	};
1570	/omit-if-no-ref/ mx6sx_pad_lcd1_data06__src_bt_cfg_6: MX6SX_PAD_LCD1_DATA06__SRC_BT_CFG_6 {
1571		pinmux = <0x420e00e8 6 0x420e0000 0 0x420e0430>;
1572	};
1573	/omit-if-no-ref/ mx6sx_pad_lcd1_data06__sim_m_haddr_27: MX6SX_PAD_LCD1_DATA06__SIM_M_HADDR_27 {
1574		pinmux = <0x420e00e8 7 0x420e0000 0 0x420e0430>;
1575	};
1576	/omit-if-no-ref/ mx6sx_pad_lcd1_data06__vadc_test_11: MX6SX_PAD_LCD1_DATA06__VADC_TEST_11 {
1577		pinmux = <0x420e00e8 8 0x420e0000 0 0x420e0430>;
1578	};
1579	/omit-if-no-ref/ mx6sx_pad_lcd1_data06__mmdc_debug_11: MX6SX_PAD_LCD1_DATA06__MMDC_DEBUG_11 {
1580		pinmux = <0x420e00e8 9 0x420e0000 0 0x420e0430>;
1581	};
1582	/omit-if-no-ref/ mx6sx_pad_lcd1_data07__lcdif1_data_7: MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 {
1583		pinmux = <0x420e00ec 0 0x420e0000 0 0x420e0434>;
1584	};
1585	/omit-if-no-ref/ mx6sx_pad_lcd1_data07__weim_eb_b_3: MX6SX_PAD_LCD1_DATA07__WEIM_EB_B_3 {
1586		pinmux = <0x420e00ec 1 0x420e0000 0 0x420e0434>;
1587	};
1588	/omit-if-no-ref/ mx6sx_pad_lcd1_data07__kitten_trace_7: MX6SX_PAD_LCD1_DATA07__KITTEN_TRACE_7 {
1589		pinmux = <0x420e00ec 3 0x420e0000 0 0x420e0434>;
1590	};
1591	/omit-if-no-ref/ mx6sx_pad_lcd1_data07__csi1_mclk: MX6SX_PAD_LCD1_DATA07__CSI1_MCLK {
1592		pinmux = <0x420e00ec 4 0x420e0000 0 0x420e0434>;
1593	};
1594	/omit-if-no-ref/ mx6sx_pad_lcd1_data07__gpio3_io_8: MX6SX_PAD_LCD1_DATA07__GPIO3_IO_8 {
1595		pinmux = <0x420e00ec 5 0x420e0000 0 0x420e0434>;
1596	};
1597	/omit-if-no-ref/ mx6sx_pad_lcd1_data07__src_bt_cfg_7: MX6SX_PAD_LCD1_DATA07__SRC_BT_CFG_7 {
1598		pinmux = <0x420e00ec 6 0x420e0000 0 0x420e0434>;
1599	};
1600	/omit-if-no-ref/ mx6sx_pad_lcd1_data07__sim_m_haddr_28: MX6SX_PAD_LCD1_DATA07__SIM_M_HADDR_28 {
1601		pinmux = <0x420e00ec 7 0x420e0000 0 0x420e0434>;
1602	};
1603	/omit-if-no-ref/ mx6sx_pad_lcd1_data07__vadc_test_12: MX6SX_PAD_LCD1_DATA07__VADC_TEST_12 {
1604		pinmux = <0x420e00ec 8 0x420e0000 0 0x420e0434>;
1605	};
1606	/omit-if-no-ref/ mx6sx_pad_lcd1_data07__mmdc_debug_12: MX6SX_PAD_LCD1_DATA07__MMDC_DEBUG_12 {
1607		pinmux = <0x420e00ec 9 0x420e0000 0 0x420e0434>;
1608	};
1609	/omit-if-no-ref/ mx6sx_pad_lcd1_data08__lcdif1_data_8: MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 {
1610		pinmux = <0x420e00f0 0 0x420e0000 0 0x420e0438>;
1611	};
1612	/omit-if-no-ref/ mx6sx_pad_lcd1_data08__weim_ad_8: MX6SX_PAD_LCD1_DATA08__WEIM_AD_8 {
1613		pinmux = <0x420e00f0 1 0x420e0000 0 0x420e0438>;
1614	};
1615	/omit-if-no-ref/ mx6sx_pad_lcd1_data08__kitten_trace_8: MX6SX_PAD_LCD1_DATA08__KITTEN_TRACE_8 {
1616		pinmux = <0x420e00f0 3 0x420e0000 0 0x420e0438>;
1617	};
1618	/omit-if-no-ref/ mx6sx_pad_lcd1_data08__csi1_data_9: MX6SX_PAD_LCD1_DATA08__CSI1_DATA_9 {
1619		pinmux = <0x420e00f0 4 0x420e06c4 1 0x420e0438>;
1620	};
1621	/omit-if-no-ref/ mx6sx_pad_lcd1_data08__gpio3_io_9: MX6SX_PAD_LCD1_DATA08__GPIO3_IO_9 {
1622		pinmux = <0x420e00f0 5 0x420e0000 0 0x420e0438>;
1623	};
1624	/omit-if-no-ref/ mx6sx_pad_lcd1_data08__src_bt_cfg_8: MX6SX_PAD_LCD1_DATA08__SRC_BT_CFG_8 {
1625		pinmux = <0x420e00f0 6 0x420e0000 0 0x420e0438>;
1626	};
1627	/omit-if-no-ref/ mx6sx_pad_lcd1_data08__sim_m_haddr_29: MX6SX_PAD_LCD1_DATA08__SIM_M_HADDR_29 {
1628		pinmux = <0x420e00f0 7 0x420e0000 0 0x420e0438>;
1629	};
1630	/omit-if-no-ref/ mx6sx_pad_lcd1_data08__vadc_test_13: MX6SX_PAD_LCD1_DATA08__VADC_TEST_13 {
1631		pinmux = <0x420e00f0 8 0x420e0000 0 0x420e0438>;
1632	};
1633	/omit-if-no-ref/ mx6sx_pad_lcd1_data08__mmdc_debug_13: MX6SX_PAD_LCD1_DATA08__MMDC_DEBUG_13 {
1634		pinmux = <0x420e00f0 9 0x420e0000 0 0x420e0438>;
1635	};
1636	/omit-if-no-ref/ mx6sx_pad_lcd1_data09__lcdif1_data_9: MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 {
1637		pinmux = <0x420e00f4 0 0x420e0000 0 0x420e043c>;
1638	};
1639	/omit-if-no-ref/ mx6sx_pad_lcd1_data09__weim_ad_9: MX6SX_PAD_LCD1_DATA09__WEIM_AD_9 {
1640		pinmux = <0x420e00f4 1 0x420e0000 0 0x420e043c>;
1641	};
1642	/omit-if-no-ref/ mx6sx_pad_lcd1_data09__kitten_trace_9: MX6SX_PAD_LCD1_DATA09__KITTEN_TRACE_9 {
1643		pinmux = <0x420e00f4 3 0x420e0000 0 0x420e043c>;
1644	};
1645	/omit-if-no-ref/ mx6sx_pad_lcd1_data09__csi1_data_8: MX6SX_PAD_LCD1_DATA09__CSI1_DATA_8 {
1646		pinmux = <0x420e00f4 4 0x420e06c0 1 0x420e043c>;
1647	};
1648	/omit-if-no-ref/ mx6sx_pad_lcd1_data09__gpio3_io_10: MX6SX_PAD_LCD1_DATA09__GPIO3_IO_10 {
1649		pinmux = <0x420e00f4 5 0x420e0000 0 0x420e043c>;
1650	};
1651	/omit-if-no-ref/ mx6sx_pad_lcd1_data09__src_bt_cfg_9: MX6SX_PAD_LCD1_DATA09__SRC_BT_CFG_9 {
1652		pinmux = <0x420e00f4 6 0x420e0000 0 0x420e043c>;
1653	};
1654	/omit-if-no-ref/ mx6sx_pad_lcd1_data09__sim_m_haddr_30: MX6SX_PAD_LCD1_DATA09__SIM_M_HADDR_30 {
1655		pinmux = <0x420e00f4 7 0x420e0000 0 0x420e043c>;
1656	};
1657	/omit-if-no-ref/ mx6sx_pad_lcd1_data09__vadc_test_14: MX6SX_PAD_LCD1_DATA09__VADC_TEST_14 {
1658		pinmux = <0x420e00f4 8 0x420e0000 0 0x420e043c>;
1659	};
1660	/omit-if-no-ref/ mx6sx_pad_lcd1_data09__mmdc_debug_14: MX6SX_PAD_LCD1_DATA09__MMDC_DEBUG_14 {
1661		pinmux = <0x420e00f4 9 0x420e0000 0 0x420e043c>;
1662	};
1663	/omit-if-no-ref/ mx6sx_pad_lcd1_data10__lcdif1_data_10: MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 {
1664		pinmux = <0x420e00f8 0 0x420e0000 0 0x420e0440>;
1665	};
1666	/omit-if-no-ref/ mx6sx_pad_lcd1_data10__weim_ad_10: MX6SX_PAD_LCD1_DATA10__WEIM_AD_10 {
1667		pinmux = <0x420e00f8 1 0x420e0000 0 0x420e0440>;
1668	};
1669	/omit-if-no-ref/ mx6sx_pad_lcd1_data10__kitten_trace_10: MX6SX_PAD_LCD1_DATA10__KITTEN_TRACE_10 {
1670		pinmux = <0x420e00f8 3 0x420e0000 0 0x420e0440>;
1671	};
1672	/omit-if-no-ref/ mx6sx_pad_lcd1_data10__csi1_data_7: MX6SX_PAD_LCD1_DATA10__CSI1_DATA_7 {
1673		pinmux = <0x420e00f8 4 0x420e06bc 1 0x420e0440>;
1674	};
1675	/omit-if-no-ref/ mx6sx_pad_lcd1_data10__gpio3_io_11: MX6SX_PAD_LCD1_DATA10__GPIO3_IO_11 {
1676		pinmux = <0x420e00f8 5 0x420e0000 0 0x420e0440>;
1677	};
1678	/omit-if-no-ref/ mx6sx_pad_lcd1_data10__src_bt_cfg_10: MX6SX_PAD_LCD1_DATA10__SRC_BT_CFG_10 {
1679		pinmux = <0x420e00f8 6 0x420e0000 0 0x420e0440>;
1680	};
1681	/omit-if-no-ref/ mx6sx_pad_lcd1_data10__sim_m_haddr_31: MX6SX_PAD_LCD1_DATA10__SIM_M_HADDR_31 {
1682		pinmux = <0x420e00f8 7 0x420e0000 0 0x420e0440>;
1683	};
1684	/omit-if-no-ref/ mx6sx_pad_lcd1_data10__vadc_test_15: MX6SX_PAD_LCD1_DATA10__VADC_TEST_15 {
1685		pinmux = <0x420e00f8 8 0x420e0000 0 0x420e0440>;
1686	};
1687	/omit-if-no-ref/ mx6sx_pad_lcd1_data10__mmdc_debug_15: MX6SX_PAD_LCD1_DATA10__MMDC_DEBUG_15 {
1688		pinmux = <0x420e00f8 9 0x420e0000 0 0x420e0440>;
1689	};
1690	/omit-if-no-ref/ mx6sx_pad_lcd1_data11__lcdif1_data_11: MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 {
1691		pinmux = <0x420e00fc 0 0x420e0000 0 0x420e0444>;
1692	};
1693	/omit-if-no-ref/ mx6sx_pad_lcd1_data11__weim_ad_11: MX6SX_PAD_LCD1_DATA11__WEIM_AD_11 {
1694		pinmux = <0x420e00fc 1 0x420e0000 0 0x420e0444>;
1695	};
1696	/omit-if-no-ref/ mx6sx_pad_lcd1_data11__kitten_trace_11: MX6SX_PAD_LCD1_DATA11__KITTEN_TRACE_11 {
1697		pinmux = <0x420e00fc 3 0x420e0000 0 0x420e0444>;
1698	};
1699	/omit-if-no-ref/ mx6sx_pad_lcd1_data11__csi1_data_6: MX6SX_PAD_LCD1_DATA11__CSI1_DATA_6 {
1700		pinmux = <0x420e00fc 4 0x420e06b8 1 0x420e0444>;
1701	};
1702	/omit-if-no-ref/ mx6sx_pad_lcd1_data11__gpio3_io_12: MX6SX_PAD_LCD1_DATA11__GPIO3_IO_12 {
1703		pinmux = <0x420e00fc 5 0x420e0000 0 0x420e0444>;
1704	};
1705	/omit-if-no-ref/ mx6sx_pad_lcd1_data11__src_bt_cfg_11: MX6SX_PAD_LCD1_DATA11__SRC_BT_CFG_11 {
1706		pinmux = <0x420e00fc 6 0x420e0000 0 0x420e0444>;
1707	};
1708	/omit-if-no-ref/ mx6sx_pad_lcd1_data11__sim_m_hburst_0: MX6SX_PAD_LCD1_DATA11__SIM_M_HBURST_0 {
1709		pinmux = <0x420e00fc 7 0x420e0000 0 0x420e0444>;
1710	};
1711	/omit-if-no-ref/ mx6sx_pad_lcd1_data11__vadc_test_16: MX6SX_PAD_LCD1_DATA11__VADC_TEST_16 {
1712		pinmux = <0x420e00fc 8 0x420e0000 0 0x420e0444>;
1713	};
1714	/omit-if-no-ref/ mx6sx_pad_lcd1_data11__mmdc_debug_16: MX6SX_PAD_LCD1_DATA11__MMDC_DEBUG_16 {
1715		pinmux = <0x420e00fc 9 0x420e0000 0 0x420e0444>;
1716	};
1717	/omit-if-no-ref/ mx6sx_pad_lcd1_data12__lcdif1_data_12: MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 {
1718		pinmux = <0x420e0100 0 0x420e0000 0 0x420e0448>;
1719	};
1720	/omit-if-no-ref/ mx6sx_pad_lcd1_data12__weim_ad_12: MX6SX_PAD_LCD1_DATA12__WEIM_AD_12 {
1721		pinmux = <0x420e0100 1 0x420e0000 0 0x420e0448>;
1722	};
1723	/omit-if-no-ref/ mx6sx_pad_lcd1_data12__kitten_trace_12: MX6SX_PAD_LCD1_DATA12__KITTEN_TRACE_12 {
1724		pinmux = <0x420e0100 3 0x420e0000 0 0x420e0448>;
1725	};
1726	/omit-if-no-ref/ mx6sx_pad_lcd1_data12__csi1_data_5: MX6SX_PAD_LCD1_DATA12__CSI1_DATA_5 {
1727		pinmux = <0x420e0100 4 0x420e06b4 1 0x420e0448>;
1728	};
1729	/omit-if-no-ref/ mx6sx_pad_lcd1_data12__gpio3_io_13: MX6SX_PAD_LCD1_DATA12__GPIO3_IO_13 {
1730		pinmux = <0x420e0100 5 0x420e0000 0 0x420e0448>;
1731	};
1732	/omit-if-no-ref/ mx6sx_pad_lcd1_data12__src_bt_cfg_12: MX6SX_PAD_LCD1_DATA12__SRC_BT_CFG_12 {
1733		pinmux = <0x420e0100 6 0x420e0000 0 0x420e0448>;
1734	};
1735	/omit-if-no-ref/ mx6sx_pad_lcd1_data12__sim_m_hburst_1: MX6SX_PAD_LCD1_DATA12__SIM_M_HBURST_1 {
1736		pinmux = <0x420e0100 7 0x420e0000 0 0x420e0448>;
1737	};
1738	/omit-if-no-ref/ mx6sx_pad_lcd1_data12__vadc_test_17: MX6SX_PAD_LCD1_DATA12__VADC_TEST_17 {
1739		pinmux = <0x420e0100 8 0x420e0000 0 0x420e0448>;
1740	};
1741	/omit-if-no-ref/ mx6sx_pad_lcd1_data12__mmdc_debug_17: MX6SX_PAD_LCD1_DATA12__MMDC_DEBUG_17 {
1742		pinmux = <0x420e0100 9 0x420e0000 0 0x420e0448>;
1743	};
1744	/omit-if-no-ref/ mx6sx_pad_lcd1_data13__lcdif1_data_13: MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 {
1745		pinmux = <0x420e0104 0 0x420e0000 0 0x420e044c>;
1746	};
1747	/omit-if-no-ref/ mx6sx_pad_lcd1_data13__weim_ad_13: MX6SX_PAD_LCD1_DATA13__WEIM_AD_13 {
1748		pinmux = <0x420e0104 1 0x420e0000 0 0x420e044c>;
1749	};
1750	/omit-if-no-ref/ mx6sx_pad_lcd1_data13__kitten_trace_13: MX6SX_PAD_LCD1_DATA13__KITTEN_TRACE_13 {
1751		pinmux = <0x420e0104 3 0x420e0000 0 0x420e044c>;
1752	};
1753	/omit-if-no-ref/ mx6sx_pad_lcd1_data13__csi1_data_4: MX6SX_PAD_LCD1_DATA13__CSI1_DATA_4 {
1754		pinmux = <0x420e0104 4 0x420e06b0 1 0x420e044c>;
1755	};
1756	/omit-if-no-ref/ mx6sx_pad_lcd1_data13__gpio3_io_14: MX6SX_PAD_LCD1_DATA13__GPIO3_IO_14 {
1757		pinmux = <0x420e0104 5 0x420e0000 0 0x420e044c>;
1758	};
1759	/omit-if-no-ref/ mx6sx_pad_lcd1_data13__src_bt_cfg_13: MX6SX_PAD_LCD1_DATA13__SRC_BT_CFG_13 {
1760		pinmux = <0x420e0104 6 0x420e0000 0 0x420e044c>;
1761	};
1762	/omit-if-no-ref/ mx6sx_pad_lcd1_data13__sim_m_hburst_2: MX6SX_PAD_LCD1_DATA13__SIM_M_HBURST_2 {
1763		pinmux = <0x420e0104 7 0x420e0000 0 0x420e044c>;
1764	};
1765	/omit-if-no-ref/ mx6sx_pad_lcd1_data13__vadc_test_18: MX6SX_PAD_LCD1_DATA13__VADC_TEST_18 {
1766		pinmux = <0x420e0104 8 0x420e0000 0 0x420e044c>;
1767	};
1768	/omit-if-no-ref/ mx6sx_pad_lcd1_data13__mmdc_debug_18: MX6SX_PAD_LCD1_DATA13__MMDC_DEBUG_18 {
1769		pinmux = <0x420e0104 9 0x420e0000 0 0x420e044c>;
1770	};
1771	/omit-if-no-ref/ mx6sx_pad_lcd1_data14__lcdif1_data_14: MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 {
1772		pinmux = <0x420e0108 0 0x420e0000 0 0x420e0450>;
1773	};
1774	/omit-if-no-ref/ mx6sx_pad_lcd1_data14__weim_ad_14: MX6SX_PAD_LCD1_DATA14__WEIM_AD_14 {
1775		pinmux = <0x420e0108 1 0x420e0000 0 0x420e0450>;
1776	};
1777	/omit-if-no-ref/ mx6sx_pad_lcd1_data14__kitten_trace_14: MX6SX_PAD_LCD1_DATA14__KITTEN_TRACE_14 {
1778		pinmux = <0x420e0108 3 0x420e0000 0 0x420e0450>;
1779	};
1780	/omit-if-no-ref/ mx6sx_pad_lcd1_data14__csi1_data_3: MX6SX_PAD_LCD1_DATA14__CSI1_DATA_3 {
1781		pinmux = <0x420e0108 4 0x420e06ac 1 0x420e0450>;
1782	};
1783	/omit-if-no-ref/ mx6sx_pad_lcd1_data14__gpio3_io_15: MX6SX_PAD_LCD1_DATA14__GPIO3_IO_15 {
1784		pinmux = <0x420e0108 5 0x420e0000 0 0x420e0450>;
1785	};
1786	/omit-if-no-ref/ mx6sx_pad_lcd1_data14__src_bt_cfg_14: MX6SX_PAD_LCD1_DATA14__SRC_BT_CFG_14 {
1787		pinmux = <0x420e0108 6 0x420e0000 0 0x420e0450>;
1788	};
1789	/omit-if-no-ref/ mx6sx_pad_lcd1_data14__sim_m_hmastlock: MX6SX_PAD_LCD1_DATA14__SIM_M_HMASTLOCK {
1790		pinmux = <0x420e0108 7 0x420e0000 0 0x420e0450>;
1791	};
1792	/omit-if-no-ref/ mx6sx_pad_lcd1_data14__vadc_test_19: MX6SX_PAD_LCD1_DATA14__VADC_TEST_19 {
1793		pinmux = <0x420e0108 8 0x420e0000 0 0x420e0450>;
1794	};
1795	/omit-if-no-ref/ mx6sx_pad_lcd1_data14__mmdc_debug_19: MX6SX_PAD_LCD1_DATA14__MMDC_DEBUG_19 {
1796		pinmux = <0x420e0108 9 0x420e0000 0 0x420e0450>;
1797	};
1798	/omit-if-no-ref/ mx6sx_pad_lcd1_data15__lcdif1_data_15: MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 {
1799		pinmux = <0x420e010c 0 0x420e0000 0 0x420e0454>;
1800	};
1801	/omit-if-no-ref/ mx6sx_pad_lcd1_data15__weim_ad_15: MX6SX_PAD_LCD1_DATA15__WEIM_AD_15 {
1802		pinmux = <0x420e010c 1 0x420e0000 0 0x420e0454>;
1803	};
1804	/omit-if-no-ref/ mx6sx_pad_lcd1_data15__kitten_trace_15: MX6SX_PAD_LCD1_DATA15__KITTEN_TRACE_15 {
1805		pinmux = <0x420e010c 3 0x420e0000 0 0x420e0454>;
1806	};
1807	/omit-if-no-ref/ mx6sx_pad_lcd1_data15__csi1_data_2: MX6SX_PAD_LCD1_DATA15__CSI1_DATA_2 {
1808		pinmux = <0x420e010c 4 0x420e06a8 1 0x420e0454>;
1809	};
1810	/omit-if-no-ref/ mx6sx_pad_lcd1_data15__gpio3_io_16: MX6SX_PAD_LCD1_DATA15__GPIO3_IO_16 {
1811		pinmux = <0x420e010c 5 0x420e0000 0 0x420e0454>;
1812	};
1813	/omit-if-no-ref/ mx6sx_pad_lcd1_data15__src_bt_cfg_15: MX6SX_PAD_LCD1_DATA15__SRC_BT_CFG_15 {
1814		pinmux = <0x420e010c 6 0x420e0000 0 0x420e0454>;
1815	};
1816	/omit-if-no-ref/ mx6sx_pad_lcd1_data15__sim_m_hprot_0: MX6SX_PAD_LCD1_DATA15__SIM_M_HPROT_0 {
1817		pinmux = <0x420e010c 7 0x420e0000 0 0x420e0454>;
1818	};
1819	/omit-if-no-ref/ mx6sx_pad_lcd1_data15__vdec_debug_0: MX6SX_PAD_LCD1_DATA15__VDEC_DEBUG_0 {
1820		pinmux = <0x420e010c 8 0x420e0000 0 0x420e0454>;
1821	};
1822	/omit-if-no-ref/ mx6sx_pad_lcd1_data15__mmdc_debug_20: MX6SX_PAD_LCD1_DATA15__MMDC_DEBUG_20 {
1823		pinmux = <0x420e010c 9 0x420e0000 0 0x420e0454>;
1824	};
1825	/omit-if-no-ref/ mx6sx_pad_lcd1_data16__lcdif1_data_16: MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 {
1826		pinmux = <0x420e0110 0 0x420e0000 0 0x420e0458>;
1827	};
1828	/omit-if-no-ref/ mx6sx_pad_lcd1_data16__weim_addr_16: MX6SX_PAD_LCD1_DATA16__WEIM_ADDR_16 {
1829		pinmux = <0x420e0110 1 0x420e0000 0 0x420e0458>;
1830	};
1831	/omit-if-no-ref/ mx6sx_pad_lcd1_data16__m4_trace_clk: MX6SX_PAD_LCD1_DATA16__M4_TRACE_CLK {
1832		pinmux = <0x420e0110 2 0x420e0000 0 0x420e0458>;
1833	};
1834	/omit-if-no-ref/ mx6sx_pad_lcd1_data16__kitten_trace_clk: MX6SX_PAD_LCD1_DATA16__KITTEN_TRACE_CLK {
1835		pinmux = <0x420e0110 3 0x420e0000 0 0x420e0458>;
1836	};
1837	/omit-if-no-ref/ mx6sx_pad_lcd1_data16__csi1_data_1: MX6SX_PAD_LCD1_DATA16__CSI1_DATA_1 {
1838		pinmux = <0x420e0110 4 0x420e06a4 0 0x420e0458>;
1839	};
1840	/omit-if-no-ref/ mx6sx_pad_lcd1_data16__gpio3_io_17: MX6SX_PAD_LCD1_DATA16__GPIO3_IO_17 {
1841		pinmux = <0x420e0110 5 0x420e0000 0 0x420e0458>;
1842	};
1843	/omit-if-no-ref/ mx6sx_pad_lcd1_data16__src_bt_cfg_24: MX6SX_PAD_LCD1_DATA16__SRC_BT_CFG_24 {
1844		pinmux = <0x420e0110 6 0x420e0000 0 0x420e0458>;
1845	};
1846	/omit-if-no-ref/ mx6sx_pad_lcd1_data16__sim_m_hprot_1: MX6SX_PAD_LCD1_DATA16__SIM_M_HPROT_1 {
1847		pinmux = <0x420e0110 7 0x420e0000 0 0x420e0458>;
1848	};
1849	/omit-if-no-ref/ mx6sx_pad_lcd1_data16__vdec_debug_1: MX6SX_PAD_LCD1_DATA16__VDEC_DEBUG_1 {
1850		pinmux = <0x420e0110 8 0x420e0000 0 0x420e0458>;
1851	};
1852	/omit-if-no-ref/ mx6sx_pad_lcd1_data16__mmdc_debug_21: MX6SX_PAD_LCD1_DATA16__MMDC_DEBUG_21 {
1853		pinmux = <0x420e0110 9 0x420e0000 0 0x420e0458>;
1854	};
1855	/omit-if-no-ref/ mx6sx_pad_lcd1_data17__lcdif1_data_17: MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 {
1856		pinmux = <0x420e0114 0 0x420e0000 0 0x420e045c>;
1857	};
1858	/omit-if-no-ref/ mx6sx_pad_lcd1_data17__weim_addr_17: MX6SX_PAD_LCD1_DATA17__WEIM_ADDR_17 {
1859		pinmux = <0x420e0114 1 0x420e0000 0 0x420e045c>;
1860	};
1861	/omit-if-no-ref/ mx6sx_pad_lcd1_data17__kitten_trace_ctl: MX6SX_PAD_LCD1_DATA17__KITTEN_TRACE_CTL {
1862		pinmux = <0x420e0114 3 0x420e0000 0 0x420e045c>;
1863	};
1864	/omit-if-no-ref/ mx6sx_pad_lcd1_data17__csi1_data_0: MX6SX_PAD_LCD1_DATA17__CSI1_DATA_0 {
1865		pinmux = <0x420e0114 4 0x420e06a0 0 0x420e045c>;
1866	};
1867	/omit-if-no-ref/ mx6sx_pad_lcd1_data17__gpio3_io_18: MX6SX_PAD_LCD1_DATA17__GPIO3_IO_18 {
1868		pinmux = <0x420e0114 5 0x420e0000 0 0x420e045c>;
1869	};
1870	/omit-if-no-ref/ mx6sx_pad_lcd1_data17__src_bt_cfg_25: MX6SX_PAD_LCD1_DATA17__SRC_BT_CFG_25 {
1871		pinmux = <0x420e0114 6 0x420e0000 0 0x420e045c>;
1872	};
1873	/omit-if-no-ref/ mx6sx_pad_lcd1_data17__sim_m_hprot_2: MX6SX_PAD_LCD1_DATA17__SIM_M_HPROT_2 {
1874		pinmux = <0x420e0114 7 0x420e0000 0 0x420e045c>;
1875	};
1876	/omit-if-no-ref/ mx6sx_pad_lcd1_data17__vdec_debug_2: MX6SX_PAD_LCD1_DATA17__VDEC_DEBUG_2 {
1877		pinmux = <0x420e0114 8 0x420e0000 0 0x420e045c>;
1878	};
1879	/omit-if-no-ref/ mx6sx_pad_lcd1_data17__mmdc_debug_22: MX6SX_PAD_LCD1_DATA17__MMDC_DEBUG_22 {
1880		pinmux = <0x420e0114 9 0x420e0000 0 0x420e045c>;
1881	};
1882	/omit-if-no-ref/ mx6sx_pad_lcd1_data18__lcdif1_data_18: MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 {
1883		pinmux = <0x420e0118 0 0x420e0000 0 0x420e0460>;
1884	};
1885	/omit-if-no-ref/ mx6sx_pad_lcd1_data18__weim_addr_18: MX6SX_PAD_LCD1_DATA18__WEIM_ADDR_18 {
1886		pinmux = <0x420e0118 1 0x420e0000 0 0x420e0460>;
1887	};
1888	/omit-if-no-ref/ mx6sx_pad_lcd1_data18__m4_evento: MX6SX_PAD_LCD1_DATA18__M4_EVENTO {
1889		pinmux = <0x420e0118 2 0x420e0000 0 0x420e0460>;
1890	};
1891	/omit-if-no-ref/ mx6sx_pad_lcd1_data18__kitten_evento: MX6SX_PAD_LCD1_DATA18__KITTEN_EVENTO {
1892		pinmux = <0x420e0118 3 0x420e0000 0 0x420e0460>;
1893	};
1894	/omit-if-no-ref/ mx6sx_pad_lcd1_data18__csi1_data_15: MX6SX_PAD_LCD1_DATA18__CSI1_DATA_15 {
1895		pinmux = <0x420e0118 4 0x420e06d8 0 0x420e0460>;
1896	};
1897	/omit-if-no-ref/ mx6sx_pad_lcd1_data18__gpio3_io_19: MX6SX_PAD_LCD1_DATA18__GPIO3_IO_19 {
1898		pinmux = <0x420e0118 5 0x420e0000 0 0x420e0460>;
1899	};
1900	/omit-if-no-ref/ mx6sx_pad_lcd1_data18__src_bt_cfg_26: MX6SX_PAD_LCD1_DATA18__SRC_BT_CFG_26 {
1901		pinmux = <0x420e0118 6 0x420e0000 0 0x420e0460>;
1902	};
1903	/omit-if-no-ref/ mx6sx_pad_lcd1_data18__sim_m_hprot_3: MX6SX_PAD_LCD1_DATA18__SIM_M_HPROT_3 {
1904		pinmux = <0x420e0118 7 0x420e0000 0 0x420e0460>;
1905	};
1906	/omit-if-no-ref/ mx6sx_pad_lcd1_data18__vdec_debug_3: MX6SX_PAD_LCD1_DATA18__VDEC_DEBUG_3 {
1907		pinmux = <0x420e0118 8 0x420e0000 0 0x420e0460>;
1908	};
1909	/omit-if-no-ref/ mx6sx_pad_lcd1_data18__mmdc_debug_23: MX6SX_PAD_LCD1_DATA18__MMDC_DEBUG_23 {
1910		pinmux = <0x420e0118 9 0x420e0000 0 0x420e0460>;
1911	};
1912	/omit-if-no-ref/ mx6sx_pad_lcd1_data19__lcdif1_data_19: MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 {
1913		pinmux = <0x420e011c 0 0x420e0000 0 0x420e0464>;
1914	};
1915	/omit-if-no-ref/ mx6sx_pad_lcd1_data19__weim_addr_19: MX6SX_PAD_LCD1_DATA19__WEIM_ADDR_19 {
1916		pinmux = <0x420e011c 1 0x420e0000 0 0x420e0464>;
1917	};
1918	/omit-if-no-ref/ mx6sx_pad_lcd1_data19__m4_trace_swo: MX6SX_PAD_LCD1_DATA19__M4_TRACE_SWO {
1919		pinmux = <0x420e011c 2 0x420e0000 0 0x420e0464>;
1920	};
1921	/omit-if-no-ref/ mx6sx_pad_lcd1_data19__csi1_data_14: MX6SX_PAD_LCD1_DATA19__CSI1_DATA_14 {
1922		pinmux = <0x420e011c 4 0x420e06d4 0 0x420e0464>;
1923	};
1924	/omit-if-no-ref/ mx6sx_pad_lcd1_data19__gpio3_io_20: MX6SX_PAD_LCD1_DATA19__GPIO3_IO_20 {
1925		pinmux = <0x420e011c 5 0x420e0000 0 0x420e0464>;
1926	};
1927	/omit-if-no-ref/ mx6sx_pad_lcd1_data19__src_bt_cfg_27: MX6SX_PAD_LCD1_DATA19__SRC_BT_CFG_27 {
1928		pinmux = <0x420e011c 6 0x420e0000 0 0x420e0464>;
1929	};
1930	/omit-if-no-ref/ mx6sx_pad_lcd1_data19__sim_m_hreadyout: MX6SX_PAD_LCD1_DATA19__SIM_M_HREADYOUT {
1931		pinmux = <0x420e011c 7 0x420e0000 0 0x420e0464>;
1932	};
1933	/omit-if-no-ref/ mx6sx_pad_lcd1_data19__vdec_debug_4: MX6SX_PAD_LCD1_DATA19__VDEC_DEBUG_4 {
1934		pinmux = <0x420e011c 8 0x420e0000 0 0x420e0464>;
1935	};
1936	/omit-if-no-ref/ mx6sx_pad_lcd1_data19__mmdc_debug_24: MX6SX_PAD_LCD1_DATA19__MMDC_DEBUG_24 {
1937		pinmux = <0x420e011c 9 0x420e0000 0 0x420e0464>;
1938	};
1939	/omit-if-no-ref/ mx6sx_pad_lcd1_data20__lcdif1_data_20: MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 {
1940		pinmux = <0x420e0120 0 0x420e0000 0 0x420e0468>;
1941	};
1942	/omit-if-no-ref/ mx6sx_pad_lcd1_data20__weim_addr_20: MX6SX_PAD_LCD1_DATA20__WEIM_ADDR_20 {
1943		pinmux = <0x420e0120 1 0x420e0000 0 0x420e0468>;
1944	};
1945	/omit-if-no-ref/ mx6sx_pad_lcd1_data20__pwm8_out: MX6SX_PAD_LCD1_DATA20__PWM8_OUT {
1946		pinmux = <0x420e0120 2 0x420e0000 0 0x420e0468>;
1947	};
1948	/omit-if-no-ref/ mx6sx_pad_lcd1_data20__enet1_1588_event2_out: MX6SX_PAD_LCD1_DATA20__ENET1_1588_EVENT2_OUT {
1949		pinmux = <0x420e0120 3 0x420e0000 0 0x420e0468>;
1950	};
1951	/omit-if-no-ref/ mx6sx_pad_lcd1_data20__csi1_data_13: MX6SX_PAD_LCD1_DATA20__CSI1_DATA_13 {
1952		pinmux = <0x420e0120 4 0x420e06d0 0 0x420e0468>;
1953	};
1954	/omit-if-no-ref/ mx6sx_pad_lcd1_data20__gpio3_io_21: MX6SX_PAD_LCD1_DATA20__GPIO3_IO_21 {
1955		pinmux = <0x420e0120 5 0x420e0000 0 0x420e0468>;
1956	};
1957	/omit-if-no-ref/ mx6sx_pad_lcd1_data20__src_bt_cfg_28: MX6SX_PAD_LCD1_DATA20__SRC_BT_CFG_28 {
1958		pinmux = <0x420e0120 6 0x420e0000 0 0x420e0468>;
1959	};
1960	/omit-if-no-ref/ mx6sx_pad_lcd1_data20__sim_m_hresp: MX6SX_PAD_LCD1_DATA20__SIM_M_HRESP {
1961		pinmux = <0x420e0120 7 0x420e0000 0 0x420e0468>;
1962	};
1963	/omit-if-no-ref/ mx6sx_pad_lcd1_data20__vdec_debug_5: MX6SX_PAD_LCD1_DATA20__VDEC_DEBUG_5 {
1964		pinmux = <0x420e0120 8 0x420e0000 0 0x420e0468>;
1965	};
1966	/omit-if-no-ref/ mx6sx_pad_lcd1_data20__mmdc_debug_25: MX6SX_PAD_LCD1_DATA20__MMDC_DEBUG_25 {
1967		pinmux = <0x420e0120 9 0x420e0000 0 0x420e0468>;
1968	};
1969	/omit-if-no-ref/ mx6sx_pad_lcd1_data21__lcdif1_data_21: MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 {
1970		pinmux = <0x420e0124 0 0x420e0000 0 0x420e046c>;
1971	};
1972	/omit-if-no-ref/ mx6sx_pad_lcd1_data21__weim_addr_21: MX6SX_PAD_LCD1_DATA21__WEIM_ADDR_21 {
1973		pinmux = <0x420e0124 1 0x420e0000 0 0x420e046c>;
1974	};
1975	/omit-if-no-ref/ mx6sx_pad_lcd1_data21__pwm7_out: MX6SX_PAD_LCD1_DATA21__PWM7_OUT {
1976		pinmux = <0x420e0124 2 0x420e0000 0 0x420e046c>;
1977	};
1978	/omit-if-no-ref/ mx6sx_pad_lcd1_data21__enet1_1588_event3_out: MX6SX_PAD_LCD1_DATA21__ENET1_1588_EVENT3_OUT {
1979		pinmux = <0x420e0124 3 0x420e0000 0 0x420e046c>;
1980	};
1981	/omit-if-no-ref/ mx6sx_pad_lcd1_data21__csi1_data_12: MX6SX_PAD_LCD1_DATA21__CSI1_DATA_12 {
1982		pinmux = <0x420e0124 4 0x420e06cc 0 0x420e046c>;
1983	};
1984	/omit-if-no-ref/ mx6sx_pad_lcd1_data21__gpio3_io_22: MX6SX_PAD_LCD1_DATA21__GPIO3_IO_22 {
1985		pinmux = <0x420e0124 5 0x420e0000 0 0x420e046c>;
1986	};
1987	/omit-if-no-ref/ mx6sx_pad_lcd1_data21__src_bt_cfg_29: MX6SX_PAD_LCD1_DATA21__SRC_BT_CFG_29 {
1988		pinmux = <0x420e0124 6 0x420e0000 0 0x420e046c>;
1989	};
1990	/omit-if-no-ref/ mx6sx_pad_lcd1_data21__sim_m_hsize_0: MX6SX_PAD_LCD1_DATA21__SIM_M_HSIZE_0 {
1991		pinmux = <0x420e0124 7 0x420e0000 0 0x420e046c>;
1992	};
1993	/omit-if-no-ref/ mx6sx_pad_lcd1_data21__vdec_debug_6: MX6SX_PAD_LCD1_DATA21__VDEC_DEBUG_6 {
1994		pinmux = <0x420e0124 8 0x420e0000 0 0x420e046c>;
1995	};
1996	/omit-if-no-ref/ mx6sx_pad_lcd1_data21__mmdc_debug_26: MX6SX_PAD_LCD1_DATA21__MMDC_DEBUG_26 {
1997		pinmux = <0x420e0124 9 0x420e0000 0 0x420e046c>;
1998	};
1999	/omit-if-no-ref/ mx6sx_pad_lcd1_data22__lcdif1_data_22: MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 {
2000		pinmux = <0x420e0128 0 0x420e0000 0 0x420e0470>;
2001	};
2002	/omit-if-no-ref/ mx6sx_pad_lcd1_data22__weim_addr_22: MX6SX_PAD_LCD1_DATA22__WEIM_ADDR_22 {
2003		pinmux = <0x420e0128 1 0x420e0000 0 0x420e0470>;
2004	};
2005	/omit-if-no-ref/ mx6sx_pad_lcd1_data22__pwm6_out: MX6SX_PAD_LCD1_DATA22__PWM6_OUT {
2006		pinmux = <0x420e0128 2 0x420e0000 0 0x420e0470>;
2007	};
2008	/omit-if-no-ref/ mx6sx_pad_lcd1_data22__enet2_1588_event2_out: MX6SX_PAD_LCD1_DATA22__ENET2_1588_EVENT2_OUT {
2009		pinmux = <0x420e0128 3 0x420e0000 0 0x420e0470>;
2010	};
2011	/omit-if-no-ref/ mx6sx_pad_lcd1_data22__csi1_data_11: MX6SX_PAD_LCD1_DATA22__CSI1_DATA_11 {
2012		pinmux = <0x420e0128 4 0x420e06c8 0 0x420e0470>;
2013	};
2014	/omit-if-no-ref/ mx6sx_pad_lcd1_data22__gpio3_io_23: MX6SX_PAD_LCD1_DATA22__GPIO3_IO_23 {
2015		pinmux = <0x420e0128 5 0x420e0000 0 0x420e0470>;
2016	};
2017	/omit-if-no-ref/ mx6sx_pad_lcd1_data22__src_bt_cfg_30: MX6SX_PAD_LCD1_DATA22__SRC_BT_CFG_30 {
2018		pinmux = <0x420e0128 6 0x420e0000 0 0x420e0470>;
2019	};
2020	/omit-if-no-ref/ mx6sx_pad_lcd1_data22__sim_m_hsize_1: MX6SX_PAD_LCD1_DATA22__SIM_M_HSIZE_1 {
2021		pinmux = <0x420e0128 7 0x420e0000 0 0x420e0470>;
2022	};
2023	/omit-if-no-ref/ mx6sx_pad_lcd1_data22__vdec_debug_7: MX6SX_PAD_LCD1_DATA22__VDEC_DEBUG_7 {
2024		pinmux = <0x420e0128 8 0x420e0000 0 0x420e0470>;
2025	};
2026	/omit-if-no-ref/ mx6sx_pad_lcd1_data22__mmdc_debug_27: MX6SX_PAD_LCD1_DATA22__MMDC_DEBUG_27 {
2027		pinmux = <0x420e0128 9 0x420e0000 0 0x420e0470>;
2028	};
2029	/omit-if-no-ref/ mx6sx_pad_lcd1_data23__lcdif1_data_23: MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 {
2030		pinmux = <0x420e012c 0 0x420e0000 0 0x420e0474>;
2031	};
2032	/omit-if-no-ref/ mx6sx_pad_lcd1_data23__weim_addr_23: MX6SX_PAD_LCD1_DATA23__WEIM_ADDR_23 {
2033		pinmux = <0x420e012c 1 0x420e0000 0 0x420e0474>;
2034	};
2035	/omit-if-no-ref/ mx6sx_pad_lcd1_data23__pwm5_out: MX6SX_PAD_LCD1_DATA23__PWM5_OUT {
2036		pinmux = <0x420e012c 2 0x420e0000 0 0x420e0474>;
2037	};
2038	/omit-if-no-ref/ mx6sx_pad_lcd1_data23__enet2_1588_event3_out: MX6SX_PAD_LCD1_DATA23__ENET2_1588_EVENT3_OUT {
2039		pinmux = <0x420e012c 3 0x420e0000 0 0x420e0474>;
2040	};
2041	/omit-if-no-ref/ mx6sx_pad_lcd1_data23__csi1_data_10: MX6SX_PAD_LCD1_DATA23__CSI1_DATA_10 {
2042		pinmux = <0x420e012c 4 0x420e06fc 0 0x420e0474>;
2043	};
2044	/omit-if-no-ref/ mx6sx_pad_lcd1_data23__gpio3_io_24: MX6SX_PAD_LCD1_DATA23__GPIO3_IO_24 {
2045		pinmux = <0x420e012c 5 0x420e0000 0 0x420e0474>;
2046	};
2047	/omit-if-no-ref/ mx6sx_pad_lcd1_data23__src_bt_cfg_31: MX6SX_PAD_LCD1_DATA23__SRC_BT_CFG_31 {
2048		pinmux = <0x420e012c 6 0x420e0000 0 0x420e0474>;
2049	};
2050	/omit-if-no-ref/ mx6sx_pad_lcd1_data23__sim_m_hsize_2: MX6SX_PAD_LCD1_DATA23__SIM_M_HSIZE_2 {
2051		pinmux = <0x420e012c 7 0x420e0000 0 0x420e0474>;
2052	};
2053	/omit-if-no-ref/ mx6sx_pad_lcd1_data23__vdec_debug_8: MX6SX_PAD_LCD1_DATA23__VDEC_DEBUG_8 {
2054		pinmux = <0x420e012c 8 0x420e0000 0 0x420e0474>;
2055	};
2056	/omit-if-no-ref/ mx6sx_pad_lcd1_data23__mmdc_debug_28: MX6SX_PAD_LCD1_DATA23__MMDC_DEBUG_28 {
2057		pinmux = <0x420e012c 9 0x420e0000 0 0x420e0474>;
2058	};
2059	/omit-if-no-ref/ mx6sx_pad_lcd1_enable__lcdif1_enable: MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE {
2060		pinmux = <0x420e0130 0 0x420e0000 0 0x420e0478>;
2061	};
2062	/omit-if-no-ref/ mx6sx_pad_lcd1_enable__lcdif1_rd_e: MX6SX_PAD_LCD1_ENABLE__LCDIF1_RD_E {
2063		pinmux = <0x420e0130 1 0x420e0000 0 0x420e0478>;
2064	};
2065	/omit-if-no-ref/ mx6sx_pad_lcd1_enable__audmux_aud3_txc: MX6SX_PAD_LCD1_ENABLE__AUDMUX_AUD3_TXC {
2066		pinmux = <0x420e0130 2 0x420e063c 1 0x420e0478>;
2067	};
2068	/omit-if-no-ref/ mx6sx_pad_lcd1_enable__enet1_1588_event3_in: MX6SX_PAD_LCD1_ENABLE__ENET1_1588_EVENT3_IN {
2069		pinmux = <0x420e0130 3 0x420e0000 0 0x420e0478>;
2070	};
2071	/omit-if-no-ref/ mx6sx_pad_lcd1_enable__csi1_data_17: MX6SX_PAD_LCD1_ENABLE__CSI1_DATA_17 {
2072		pinmux = <0x420e0130 4 0x420e06e0 0 0x420e0478>;
2073	};
2074	/omit-if-no-ref/ mx6sx_pad_lcd1_enable__gpio3_io_25: MX6SX_PAD_LCD1_ENABLE__GPIO3_IO_25 {
2075		pinmux = <0x420e0130 5 0x420e0000 0 0x420e0478>;
2076	};
2077	/omit-if-no-ref/ mx6sx_pad_lcd1_enable__usdhc1_cd_b: MX6SX_PAD_LCD1_ENABLE__USDHC1_CD_B {
2078		pinmux = <0x420e0130 6 0x420e0864 0 0x420e0478>;
2079	};
2080	/omit-if-no-ref/ mx6sx_pad_lcd1_enable__sim_m_haddr_17: MX6SX_PAD_LCD1_ENABLE__SIM_M_HADDR_17 {
2081		pinmux = <0x420e0130 7 0x420e0000 0 0x420e0478>;
2082	};
2083	/omit-if-no-ref/ mx6sx_pad_lcd1_enable__vadc_test_1: MX6SX_PAD_LCD1_ENABLE__VADC_TEST_1 {
2084		pinmux = <0x420e0130 8 0x420e0000 0 0x420e0478>;
2085	};
2086	/omit-if-no-ref/ mx6sx_pad_lcd1_enable__mmdc_debug_1: MX6SX_PAD_LCD1_ENABLE__MMDC_DEBUG_1 {
2087		pinmux = <0x420e0130 9 0x420e0000 0 0x420e0478>;
2088	};
2089	/omit-if-no-ref/ mx6sx_pad_lcd1_hsync__lcdif1_hsync: MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC {
2090		pinmux = <0x420e0134 0 0x420e07e0 0 0x420e047c>;
2091	};
2092	/omit-if-no-ref/ mx6sx_pad_lcd1_hsync__lcdif1_rs: MX6SX_PAD_LCD1_HSYNC__LCDIF1_RS {
2093		pinmux = <0x420e0134 1 0x420e0000 0 0x420e047c>;
2094	};
2095	/omit-if-no-ref/ mx6sx_pad_lcd1_hsync__audmux_aud3_txd: MX6SX_PAD_LCD1_HSYNC__AUDMUX_AUD3_TXD {
2096		pinmux = <0x420e0134 2 0x420e0630 1 0x420e047c>;
2097	};
2098	/omit-if-no-ref/ mx6sx_pad_lcd1_hsync__enet2_1588_event2_in: MX6SX_PAD_LCD1_HSYNC__ENET2_1588_EVENT2_IN {
2099		pinmux = <0x420e0134 3 0x420e0000 0 0x420e047c>;
2100	};
2101	/omit-if-no-ref/ mx6sx_pad_lcd1_hsync__csi1_data_18: MX6SX_PAD_LCD1_HSYNC__CSI1_DATA_18 {
2102		pinmux = <0x420e0134 4 0x420e06e4 0 0x420e047c>;
2103	};
2104	/omit-if-no-ref/ mx6sx_pad_lcd1_hsync__gpio3_io_26: MX6SX_PAD_LCD1_HSYNC__GPIO3_IO_26 {
2105		pinmux = <0x420e0134 5 0x420e0000 0 0x420e047c>;
2106	};
2107	/omit-if-no-ref/ mx6sx_pad_lcd1_hsync__usdhc2_wp: MX6SX_PAD_LCD1_HSYNC__USDHC2_WP {
2108		pinmux = <0x420e0134 6 0x420e0870 0 0x420e047c>;
2109	};
2110	/omit-if-no-ref/ mx6sx_pad_lcd1_hsync__sim_m_haddr_18: MX6SX_PAD_LCD1_HSYNC__SIM_M_HADDR_18 {
2111		pinmux = <0x420e0134 7 0x420e0000 0 0x420e047c>;
2112	};
2113	/omit-if-no-ref/ mx6sx_pad_lcd1_hsync__vadc_test_2: MX6SX_PAD_LCD1_HSYNC__VADC_TEST_2 {
2114		pinmux = <0x420e0134 8 0x420e0000 0 0x420e047c>;
2115	};
2116	/omit-if-no-ref/ mx6sx_pad_lcd1_hsync__mmdc_debug_2: MX6SX_PAD_LCD1_HSYNC__MMDC_DEBUG_2 {
2117		pinmux = <0x420e0134 9 0x420e0000 0 0x420e047c>;
2118	};
2119	/omit-if-no-ref/ mx6sx_pad_lcd1_reset__lcdif1_reset: MX6SX_PAD_LCD1_RESET__LCDIF1_RESET {
2120		pinmux = <0x420e0138 0 0x420e0000 0 0x420e0480>;
2121	};
2122	/omit-if-no-ref/ mx6sx_pad_lcd1_reset__lcdif1_cs: MX6SX_PAD_LCD1_RESET__LCDIF1_CS {
2123		pinmux = <0x420e0138 1 0x420e0000 0 0x420e0480>;
2124	};
2125	/omit-if-no-ref/ mx6sx_pad_lcd1_reset__audmux_aud3_rxd: MX6SX_PAD_LCD1_RESET__AUDMUX_AUD3_RXD {
2126		pinmux = <0x420e0138 2 0x420e062c 1 0x420e0480>;
2127	};
2128	/omit-if-no-ref/ mx6sx_pad_lcd1_reset__kitten_eventi: MX6SX_PAD_LCD1_RESET__KITTEN_EVENTI {
2129		pinmux = <0x420e0138 3 0x420e0000 0 0x420e0480>;
2130	};
2131	/omit-if-no-ref/ mx6sx_pad_lcd1_reset__m4_eventi: MX6SX_PAD_LCD1_RESET__M4_EVENTI {
2132		pinmux = <0x420e0138 4 0x420e0000 0 0x420e0480>;
2133	};
2134	/omit-if-no-ref/ mx6sx_pad_lcd1_reset__gpio3_io_27: MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 {
2135		pinmux = <0x420e0138 5 0x420e0000 0 0x420e0480>;
2136	};
2137	/omit-if-no-ref/ mx6sx_pad_lcd1_reset__ccm_pmic_rdy: MX6SX_PAD_LCD1_RESET__CCM_PMIC_RDY {
2138		pinmux = <0x420e0138 6 0x420e069c 0 0x420e0480>;
2139	};
2140	/omit-if-no-ref/ mx6sx_pad_lcd1_reset__sim_m_haddr_20: MX6SX_PAD_LCD1_RESET__SIM_M_HADDR_20 {
2141		pinmux = <0x420e0138 7 0x420e0000 0 0x420e0480>;
2142	};
2143	/omit-if-no-ref/ mx6sx_pad_lcd1_reset__vadc_test_4: MX6SX_PAD_LCD1_RESET__VADC_TEST_4 {
2144		pinmux = <0x420e0138 8 0x420e0000 0 0x420e0480>;
2145	};
2146	/omit-if-no-ref/ mx6sx_pad_lcd1_reset__mmdc_debug_4: MX6SX_PAD_LCD1_RESET__MMDC_DEBUG_4 {
2147		pinmux = <0x420e0138 9 0x420e0000 0 0x420e0480>;
2148	};
2149	/omit-if-no-ref/ mx6sx_pad_lcd1_vsync__lcdif1_vsync: MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC {
2150		pinmux = <0x420e013c 0 0x420e0000 0 0x420e0484>;
2151	};
2152	/omit-if-no-ref/ mx6sx_pad_lcd1_vsync__lcdif1_busy: MX6SX_PAD_LCD1_VSYNC__LCDIF1_BUSY {
2153		pinmux = <0x420e013c 1 0x420e07e0 1 0x420e0484>;
2154	};
2155	/omit-if-no-ref/ mx6sx_pad_lcd1_vsync__audmux_aud3_txfs: MX6SX_PAD_LCD1_VSYNC__AUDMUX_AUD3_TXFS {
2156		pinmux = <0x420e013c 2 0x420e0640 1 0x420e0484>;
2157	};
2158	/omit-if-no-ref/ mx6sx_pad_lcd1_vsync__enet2_1588_event3_in: MX6SX_PAD_LCD1_VSYNC__ENET2_1588_EVENT3_IN {
2159		pinmux = <0x420e013c 3 0x420e0000 0 0x420e0484>;
2160	};
2161	/omit-if-no-ref/ mx6sx_pad_lcd1_vsync__csi1_data_19: MX6SX_PAD_LCD1_VSYNC__CSI1_DATA_19 {
2162		pinmux = <0x420e013c 4 0x420e06e8 0 0x420e0484>;
2163	};
2164	/omit-if-no-ref/ mx6sx_pad_lcd1_vsync__gpio3_io_28: MX6SX_PAD_LCD1_VSYNC__GPIO3_IO_28 {
2165		pinmux = <0x420e013c 5 0x420e0000 0 0x420e0484>;
2166	};
2167	/omit-if-no-ref/ mx6sx_pad_lcd1_vsync__usdhc2_cd_b: MX6SX_PAD_LCD1_VSYNC__USDHC2_CD_B {
2168		pinmux = <0x420e013c 6 0x420e086c 0 0x420e0484>;
2169	};
2170	/omit-if-no-ref/ mx6sx_pad_lcd1_vsync__sim_m_haddr_19: MX6SX_PAD_LCD1_VSYNC__SIM_M_HADDR_19 {
2171		pinmux = <0x420e013c 7 0x420e0000 0 0x420e0484>;
2172	};
2173	/omit-if-no-ref/ mx6sx_pad_lcd1_vsync__vadc_test_3: MX6SX_PAD_LCD1_VSYNC__VADC_TEST_3 {
2174		pinmux = <0x420e013c 8 0x420e0000 0 0x420e0484>;
2175	};
2176	/omit-if-no-ref/ mx6sx_pad_lcd1_vsync__mmdc_debug_3: MX6SX_PAD_LCD1_VSYNC__MMDC_DEBUG_3 {
2177		pinmux = <0x420e013c 9 0x420e0000 0 0x420e0484>;
2178	};
2179	/omit-if-no-ref/ mx6sx_pad_nand_ale__rawnand_ale: MX6SX_PAD_NAND_ALE__RAWNAND_ALE {
2180		pinmux = <0x420e0140 0 0x420e0000 0 0x420e0488>;
2181	};
2182	/omit-if-no-ref/ mx6sx_pad_nand_ale__i2c3_sda: MX6SX_PAD_NAND_ALE__I2C3_SDA {
2183		pinmux = <0x420e0140 1 0x420e07bc 0 0x420e0488>;
2184	};
2185	/omit-if-no-ref/ mx6sx_pad_nand_ale__qspi2_a_ss0_b: MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B {
2186		pinmux = <0x420e0140 2 0x420e0000 0 0x420e0488>;
2187	};
2188	/omit-if-no-ref/ mx6sx_pad_nand_ale__ecspi2_ss0: MX6SX_PAD_NAND_ALE__ECSPI2_SS0 {
2189		pinmux = <0x420e0140 3 0x420e072c 0 0x420e0488>;
2190	};
2191	/omit-if-no-ref/ mx6sx_pad_nand_ale__esai_tx3_rx2: MX6SX_PAD_NAND_ALE__ESAI_TX3_RX2 {
2192		pinmux = <0x420e0140 4 0x420e079c 0 0x420e0488>;
2193	};
2194	/omit-if-no-ref/ mx6sx_pad_nand_ale__gpio4_io_0: MX6SX_PAD_NAND_ALE__GPIO4_IO_0 {
2195		pinmux = <0x420e0140 5 0x420e0000 0 0x420e0488>;
2196	};
2197	/omit-if-no-ref/ mx6sx_pad_nand_ale__weim_cs0_b: MX6SX_PAD_NAND_ALE__WEIM_CS0_B {
2198		pinmux = <0x420e0140 6 0x420e0000 0 0x420e0488>;
2199	};
2200	/omit-if-no-ref/ mx6sx_pad_nand_ale__tpsmp_hdata_0: MX6SX_PAD_NAND_ALE__TPSMP_HDATA_0 {
2201		pinmux = <0x420e0140 7 0x420e0000 0 0x420e0488>;
2202	};
2203	/omit-if-no-ref/ mx6sx_pad_nand_ale__anatop_usbphy1_tsti_tx_en: MX6SX_PAD_NAND_ALE__ANATOP_USBPHY1_TSTI_TX_EN {
2204		pinmux = <0x420e0140 8 0x420e0000 0 0x420e0488>;
2205	};
2206	/omit-if-no-ref/ mx6sx_pad_nand_ale__sdma_debug_pc_12: MX6SX_PAD_NAND_ALE__SDMA_DEBUG_PC_12 {
2207		pinmux = <0x420e0140 9 0x420e0000 0 0x420e0488>;
2208	};
2209	/omit-if-no-ref/ mx6sx_pad_nand_ce0_b__rawnand_ce0_b: MX6SX_PAD_NAND_CE0_B__RAWNAND_CE0_B {
2210		pinmux = <0x420e0144 0 0x420e0000 0 0x420e048c>;
2211	};
2212	/omit-if-no-ref/ mx6sx_pad_nand_ce0_b__usdhc2_vselect: MX6SX_PAD_NAND_CE0_B__USDHC2_VSELECT {
2213		pinmux = <0x420e0144 1 0x420e0000 0 0x420e048c>;
2214	};
2215	/omit-if-no-ref/ mx6sx_pad_nand_ce0_b__qspi2_a_data_2: MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2 {
2216		pinmux = <0x420e0144 2 0x420e0000 0 0x420e048c>;
2217	};
2218	/omit-if-no-ref/ mx6sx_pad_nand_ce0_b__audmux_aud4_txc: MX6SX_PAD_NAND_CE0_B__AUDMUX_AUD4_TXC {
2219		pinmux = <0x420e0144 3 0x420e0654 0 0x420e048c>;
2220	};
2221	/omit-if-no-ref/ mx6sx_pad_nand_ce0_b__esai_tx_clk: MX6SX_PAD_NAND_CE0_B__ESAI_TX_CLK {
2222		pinmux = <0x420e0144 4 0x420e078c 0 0x420e048c>;
2223	};
2224	/omit-if-no-ref/ mx6sx_pad_nand_ce0_b__gpio4_io_1: MX6SX_PAD_NAND_CE0_B__GPIO4_IO_1 {
2225		pinmux = <0x420e0144 5 0x420e0000 0 0x420e048c>;
2226	};
2227	/omit-if-no-ref/ mx6sx_pad_nand_ce0_b__weim_lba_b: MX6SX_PAD_NAND_CE0_B__WEIM_LBA_B {
2228		pinmux = <0x420e0144 6 0x420e0000 0 0x420e048c>;
2229	};
2230	/omit-if-no-ref/ mx6sx_pad_nand_ce0_b__tpsmp_hdata_3: MX6SX_PAD_NAND_CE0_B__TPSMP_HDATA_3 {
2231		pinmux = <0x420e0144 7 0x420e0000 0 0x420e048c>;
2232	};
2233	/omit-if-no-ref/ mx6sx_pad_nand_ce0_b__anatop_usbphy1_tsti_tx_hiz: MX6SX_PAD_NAND_CE0_B__ANATOP_USBPHY1_TSTI_TX_HIZ {
2234		pinmux = <0x420e0144 8 0x420e0000 0 0x420e048c>;
2235	};
2236	/omit-if-no-ref/ mx6sx_pad_nand_ce0_b__sdma_debug_pc_9: MX6SX_PAD_NAND_CE0_B__SDMA_DEBUG_PC_9 {
2237		pinmux = <0x420e0144 9 0x420e0000 0 0x420e048c>;
2238	};
2239	/omit-if-no-ref/ mx6sx_pad_nand_ce1_b__rawnand_ce1_b: MX6SX_PAD_NAND_CE1_B__RAWNAND_CE1_B {
2240		pinmux = <0x420e0148 0 0x420e0000 0 0x420e0490>;
2241	};
2242	/omit-if-no-ref/ mx6sx_pad_nand_ce1_b__usdhc3_reset_b: MX6SX_PAD_NAND_CE1_B__USDHC3_RESET_B {
2243		pinmux = <0x420e0148 1 0x420e0000 0 0x420e0490>;
2244	};
2245	/omit-if-no-ref/ mx6sx_pad_nand_ce1_b__qspi2_a_data_3: MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3 {
2246		pinmux = <0x420e0148 2 0x420e0000 0 0x420e0490>;
2247	};
2248	/omit-if-no-ref/ mx6sx_pad_nand_ce1_b__audmux_aud4_txd: MX6SX_PAD_NAND_CE1_B__AUDMUX_AUD4_TXD {
2249		pinmux = <0x420e0148 3 0x420e0648 0 0x420e0490>;
2250	};
2251	/omit-if-no-ref/ mx6sx_pad_nand_ce1_b__esai_tx0: MX6SX_PAD_NAND_CE1_B__ESAI_TX0 {
2252		pinmux = <0x420e0148 4 0x420e0790 0 0x420e0490>;
2253	};
2254	/omit-if-no-ref/ mx6sx_pad_nand_ce1_b__gpio4_io_2: MX6SX_PAD_NAND_CE1_B__GPIO4_IO_2 {
2255		pinmux = <0x420e0148 5 0x420e0000 0 0x420e0490>;
2256	};
2257	/omit-if-no-ref/ mx6sx_pad_nand_ce1_b__weim_oe: MX6SX_PAD_NAND_CE1_B__WEIM_OE {
2258		pinmux = <0x420e0148 6 0x420e0000 0 0x420e0490>;
2259	};
2260	/omit-if-no-ref/ mx6sx_pad_nand_ce1_b__tpsmp_hdata_4: MX6SX_PAD_NAND_CE1_B__TPSMP_HDATA_4 {
2261		pinmux = <0x420e0148 7 0x420e0000 0 0x420e0490>;
2262	};
2263	/omit-if-no-ref/ mx6sx_pad_nand_ce1_b__anatop_usbphy1_tsti_tx_ls_mode: MX6SX_PAD_NAND_CE1_B__ANATOP_USBPHY1_TSTI_TX_LS_MODE {
2264		pinmux = <0x420e0148 8 0x420e0000 0 0x420e0490>;
2265	};
2266	/omit-if-no-ref/ mx6sx_pad_nand_ce1_b__sdma_debug_pc_8: MX6SX_PAD_NAND_CE1_B__SDMA_DEBUG_PC_8 {
2267		pinmux = <0x420e0148 9 0x420e0000 0 0x420e0490>;
2268	};
2269	/omit-if-no-ref/ mx6sx_pad_nand_cle__rawnand_cle: MX6SX_PAD_NAND_CLE__RAWNAND_CLE {
2270		pinmux = <0x420e014c 0 0x420e0000 0 0x420e0494>;
2271	};
2272	/omit-if-no-ref/ mx6sx_pad_nand_cle__i2c3_scl: MX6SX_PAD_NAND_CLE__I2C3_SCL {
2273		pinmux = <0x420e014c 1 0x420e07b8 0 0x420e0494>;
2274	};
2275	/omit-if-no-ref/ mx6sx_pad_nand_cle__qspi2_a_sclk: MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK {
2276		pinmux = <0x420e014c 2 0x420e0000 0 0x420e0494>;
2277	};
2278	/omit-if-no-ref/ mx6sx_pad_nand_cle__ecspi2_sclk: MX6SX_PAD_NAND_CLE__ECSPI2_SCLK {
2279		pinmux = <0x420e014c 3 0x420e0720 0 0x420e0494>;
2280	};
2281	/omit-if-no-ref/ mx6sx_pad_nand_cle__esai_tx2_rx3: MX6SX_PAD_NAND_CLE__ESAI_TX2_RX3 {
2282		pinmux = <0x420e014c 4 0x420e0798 0 0x420e0494>;
2283	};
2284	/omit-if-no-ref/ mx6sx_pad_nand_cle__gpio4_io_3: MX6SX_PAD_NAND_CLE__GPIO4_IO_3 {
2285		pinmux = <0x420e014c 5 0x420e0000 0 0x420e0494>;
2286	};
2287	/omit-if-no-ref/ mx6sx_pad_nand_cle__weim_bclk: MX6SX_PAD_NAND_CLE__WEIM_BCLK {
2288		pinmux = <0x420e014c 6 0x420e0000 0 0x420e0494>;
2289	};
2290	/omit-if-no-ref/ mx6sx_pad_nand_cle__tpsmp_clk: MX6SX_PAD_NAND_CLE__TPSMP_CLK {
2291		pinmux = <0x420e014c 7 0x420e0000 0 0x420e0494>;
2292	};
2293	/omit-if-no-ref/ mx6sx_pad_nand_cle__anatop_usbphy1_tsti_tx_dp: MX6SX_PAD_NAND_CLE__ANATOP_USBPHY1_TSTI_TX_DP {
2294		pinmux = <0x420e014c 8 0x420e0000 0 0x420e0494>;
2295	};
2296	/omit-if-no-ref/ mx6sx_pad_nand_cle__sdma_debug_pc_13: MX6SX_PAD_NAND_CLE__SDMA_DEBUG_PC_13 {
2297		pinmux = <0x420e014c 9 0x420e0000 0 0x420e0494>;
2298	};
2299	/omit-if-no-ref/ mx6sx_pad_nand_data00__rawnand_data00: MX6SX_PAD_NAND_DATA00__RAWNAND_DATA00 {
2300		pinmux = <0x420e0150 0 0x420e0000 0 0x420e0498>;
2301	};
2302	/omit-if-no-ref/ mx6sx_pad_nand_data00__usdhc1_data4: MX6SX_PAD_NAND_DATA00__USDHC1_DATA4 {
2303		pinmux = <0x420e0150 1 0x420e0000 0 0x420e0498>;
2304	};
2305	/omit-if-no-ref/ mx6sx_pad_nand_data00__qspi2_b_data_1: MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1 {
2306		pinmux = <0x420e0150 2 0x420e0000 0 0x420e0498>;
2307	};
2308	/omit-if-no-ref/ mx6sx_pad_nand_data00__ecspi5_miso: MX6SX_PAD_NAND_DATA00__ECSPI5_MISO {
2309		pinmux = <0x420e0150 3 0x420e0754 0 0x420e0498>;
2310	};
2311	/omit-if-no-ref/ mx6sx_pad_nand_data00__esai_rx_clk: MX6SX_PAD_NAND_DATA00__ESAI_RX_CLK {
2312		pinmux = <0x420e0150 4 0x420e0788 0 0x420e0498>;
2313	};
2314	/omit-if-no-ref/ mx6sx_pad_nand_data00__gpio4_io_4: MX6SX_PAD_NAND_DATA00__GPIO4_IO_4 {
2315		pinmux = <0x420e0150 5 0x420e0000 0 0x420e0498>;
2316	};
2317	/omit-if-no-ref/ mx6sx_pad_nand_data00__weim_ad_0: MX6SX_PAD_NAND_DATA00__WEIM_AD_0 {
2318		pinmux = <0x420e0150 6 0x420e0000 0 0x420e0498>;
2319	};
2320	/omit-if-no-ref/ mx6sx_pad_nand_data00__tpsmp_hdata_7: MX6SX_PAD_NAND_DATA00__TPSMP_HDATA_7 {
2321		pinmux = <0x420e0150 7 0x420e0000 0 0x420e0498>;
2322	};
2323	/omit-if-no-ref/ mx6sx_pad_nand_data00__anatop_usbphy1_tsto_rx_discon_det: MX6SX_PAD_NAND_DATA00__ANATOP_USBPHY1_TSTO_RX_DISCON_DET {
2324		pinmux = <0x420e0150 8 0x420e0000 0 0x420e0498>;
2325	};
2326	/omit-if-no-ref/ mx6sx_pad_nand_data00__sdma_debug_evt_chn_lines_5: MX6SX_PAD_NAND_DATA00__SDMA_DEBUG_EVT_CHN_LINES_5 {
2327		pinmux = <0x420e0150 9 0x420e0000 0 0x420e0498>;
2328	};
2329	/omit-if-no-ref/ mx6sx_pad_nand_data01__rawnand_data01: MX6SX_PAD_NAND_DATA01__RAWNAND_DATA01 {
2330		pinmux = <0x420e0154 0 0x420e0000 0 0x420e049c>;
2331	};
2332	/omit-if-no-ref/ mx6sx_pad_nand_data01__usdhc1_data5: MX6SX_PAD_NAND_DATA01__USDHC1_DATA5 {
2333		pinmux = <0x420e0154 1 0x420e0000 0 0x420e049c>;
2334	};
2335	/omit-if-no-ref/ mx6sx_pad_nand_data01__qspi2_b_data_0: MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0 {
2336		pinmux = <0x420e0154 2 0x420e0000 0 0x420e049c>;
2337	};
2338	/omit-if-no-ref/ mx6sx_pad_nand_data01__ecspi5_mosi: MX6SX_PAD_NAND_DATA01__ECSPI5_MOSI {
2339		pinmux = <0x420e0154 3 0x420e0758 0 0x420e049c>;
2340	};
2341	/omit-if-no-ref/ mx6sx_pad_nand_data01__esai_rx_fs: MX6SX_PAD_NAND_DATA01__ESAI_RX_FS {
2342		pinmux = <0x420e0154 4 0x420e0778 0 0x420e049c>;
2343	};
2344	/omit-if-no-ref/ mx6sx_pad_nand_data01__gpio4_io_5: MX6SX_PAD_NAND_DATA01__GPIO4_IO_5 {
2345		pinmux = <0x420e0154 5 0x420e0000 0 0x420e049c>;
2346	};
2347	/omit-if-no-ref/ mx6sx_pad_nand_data01__weim_ad_1: MX6SX_PAD_NAND_DATA01__WEIM_AD_1 {
2348		pinmux = <0x420e0154 6 0x420e0000 0 0x420e049c>;
2349	};
2350	/omit-if-no-ref/ mx6sx_pad_nand_data01__tpsmp_hdata_8: MX6SX_PAD_NAND_DATA01__TPSMP_HDATA_8 {
2351		pinmux = <0x420e0154 7 0x420e0000 0 0x420e049c>;
2352	};
2353	/omit-if-no-ref/ mx6sx_pad_nand_data01__anatop_usbphy1_tsto_rx_hs_rxd: MX6SX_PAD_NAND_DATA01__ANATOP_USBPHY1_TSTO_RX_HS_RXD {
2354		pinmux = <0x420e0154 8 0x420e0000 0 0x420e049c>;
2355	};
2356	/omit-if-no-ref/ mx6sx_pad_nand_data01__sdma_debug_evt_chn_lines_4: MX6SX_PAD_NAND_DATA01__SDMA_DEBUG_EVT_CHN_LINES_4 {
2357		pinmux = <0x420e0154 9 0x420e0000 0 0x420e049c>;
2358	};
2359	/omit-if-no-ref/ mx6sx_pad_nand_data02__rawnand_data02: MX6SX_PAD_NAND_DATA02__RAWNAND_DATA02 {
2360		pinmux = <0x420e0158 0 0x420e0000 0 0x420e04a0>;
2361	};
2362	/omit-if-no-ref/ mx6sx_pad_nand_data02__usdhc1_data6: MX6SX_PAD_NAND_DATA02__USDHC1_DATA6 {
2363		pinmux = <0x420e0158 1 0x420e0000 0 0x420e04a0>;
2364	};
2365	/omit-if-no-ref/ mx6sx_pad_nand_data02__qspi2_b_sclk: MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK {
2366		pinmux = <0x420e0158 2 0x420e0000 0 0x420e04a0>;
2367	};
2368	/omit-if-no-ref/ mx6sx_pad_nand_data02__ecspi5_sclk: MX6SX_PAD_NAND_DATA02__ECSPI5_SCLK {
2369		pinmux = <0x420e0158 3 0x420e0750 0 0x420e04a0>;
2370	};
2371	/omit-if-no-ref/ mx6sx_pad_nand_data02__esai_tx_hf_clk: MX6SX_PAD_NAND_DATA02__ESAI_TX_HF_CLK {
2372		pinmux = <0x420e0158 4 0x420e0784 0 0x420e04a0>;
2373	};
2374	/omit-if-no-ref/ mx6sx_pad_nand_data02__gpio4_io_6: MX6SX_PAD_NAND_DATA02__GPIO4_IO_6 {
2375		pinmux = <0x420e0158 5 0x420e0000 0 0x420e04a0>;
2376	};
2377	/omit-if-no-ref/ mx6sx_pad_nand_data02__weim_ad_2: MX6SX_PAD_NAND_DATA02__WEIM_AD_2 {
2378		pinmux = <0x420e0158 6 0x420e0000 0 0x420e04a0>;
2379	};
2380	/omit-if-no-ref/ mx6sx_pad_nand_data02__tpsmp_hdata_9: MX6SX_PAD_NAND_DATA02__TPSMP_HDATA_9 {
2381		pinmux = <0x420e0158 7 0x420e0000 0 0x420e04a0>;
2382	};
2383	/omit-if-no-ref/ mx6sx_pad_nand_data02__anatop_usbphy2_tsto_pll_clk20div: MX6SX_PAD_NAND_DATA02__ANATOP_USBPHY2_TSTO_PLL_CLK20DIV {
2384		pinmux = <0x420e0158 8 0x420e0000 0 0x420e04a0>;
2385	};
2386	/omit-if-no-ref/ mx6sx_pad_nand_data02__sdma_debug_evt_chn_lines_3: MX6SX_PAD_NAND_DATA02__SDMA_DEBUG_EVT_CHN_LINES_3 {
2387		pinmux = <0x420e0158 9 0x420e0000 0 0x420e04a0>;
2388	};
2389	/omit-if-no-ref/ mx6sx_pad_nand_data03__rawnand_data03: MX6SX_PAD_NAND_DATA03__RAWNAND_DATA03 {
2390		pinmux = <0x420e015c 0 0x420e0000 0 0x420e04a4>;
2391	};
2392	/omit-if-no-ref/ mx6sx_pad_nand_data03__usdhc1_data7: MX6SX_PAD_NAND_DATA03__USDHC1_DATA7 {
2393		pinmux = <0x420e015c 1 0x420e0000 0 0x420e04a4>;
2394	};
2395	/omit-if-no-ref/ mx6sx_pad_nand_data03__qspi2_b_ss0_b: MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B {
2396		pinmux = <0x420e015c 2 0x420e0000 0 0x420e04a4>;
2397	};
2398	/omit-if-no-ref/ mx6sx_pad_nand_data03__ecspi5_ss0: MX6SX_PAD_NAND_DATA03__ECSPI5_SS0 {
2399		pinmux = <0x420e015c 3 0x420e075c 0 0x420e04a4>;
2400	};
2401	/omit-if-no-ref/ mx6sx_pad_nand_data03__esai_rx_hf_clk: MX6SX_PAD_NAND_DATA03__ESAI_RX_HF_CLK {
2402		pinmux = <0x420e015c 4 0x420e0780 0 0x420e04a4>;
2403	};
2404	/omit-if-no-ref/ mx6sx_pad_nand_data03__gpio4_io_7: MX6SX_PAD_NAND_DATA03__GPIO4_IO_7 {
2405		pinmux = <0x420e015c 5 0x420e0000 0 0x420e04a4>;
2406	};
2407	/omit-if-no-ref/ mx6sx_pad_nand_data03__weim_ad_3: MX6SX_PAD_NAND_DATA03__WEIM_AD_3 {
2408		pinmux = <0x420e015c 6 0x420e0000 0 0x420e04a4>;
2409	};
2410	/omit-if-no-ref/ mx6sx_pad_nand_data03__tpsmp_hdata_10: MX6SX_PAD_NAND_DATA03__TPSMP_HDATA_10 {
2411		pinmux = <0x420e015c 7 0x420e0000 0 0x420e04a4>;
2412	};
2413	/omit-if-no-ref/ mx6sx_pad_nand_data03__anatop_usbphy1_tsto_rx_squelch: MX6SX_PAD_NAND_DATA03__ANATOP_USBPHY1_TSTO_RX_SQUELCH {
2414		pinmux = <0x420e015c 8 0x420e0000 0 0x420e04a4>;
2415	};
2416	/omit-if-no-ref/ mx6sx_pad_nand_data03__sdma_debug_evt_chn_lines_6: MX6SX_PAD_NAND_DATA03__SDMA_DEBUG_EVT_CHN_LINES_6 {
2417		pinmux = <0x420e015c 9 0x420e0000 0 0x420e04a4>;
2418	};
2419	/omit-if-no-ref/ mx6sx_pad_nand_data04__rawnand_data04: MX6SX_PAD_NAND_DATA04__RAWNAND_DATA04 {
2420		pinmux = <0x420e0160 0 0x420e0000 0 0x420e04a8>;
2421	};
2422	/omit-if-no-ref/ mx6sx_pad_nand_data04__usdhc2_data4: MX6SX_PAD_NAND_DATA04__USDHC2_DATA4 {
2423		pinmux = <0x420e0160 1 0x420e0000 0 0x420e04a8>;
2424	};
2425	/omit-if-no-ref/ mx6sx_pad_nand_data04__qspi2_b_ss1_b: MX6SX_PAD_NAND_DATA04__QSPI2_B_SS1_B {
2426		pinmux = <0x420e0160 2 0x420e0000 0 0x420e04a8>;
2427	};
2428	/omit-if-no-ref/ mx6sx_pad_nand_data04__uart3_dce_rts: MX6SX_PAD_NAND_DATA04__UART3_DCE_RTS {
2429		pinmux = <0x420e0160 3 0x420e083c 0 0x420e04a8>;
2430	};
2431	/omit-if-no-ref/ mx6sx_pad_nand_data04__uart3_dte_cts: MX6SX_PAD_NAND_DATA04__UART3_DTE_CTS {
2432		pinmux = <0x420e0160 3 0x420e0000 0 0x420e04a8>;
2433	};
2434	/omit-if-no-ref/ mx6sx_pad_nand_data04__audmux_aud4_rxfs: MX6SX_PAD_NAND_DATA04__AUDMUX_AUD4_RXFS {
2435		pinmux = <0x420e0160 4 0x420e0650 0 0x420e04a8>;
2436	};
2437	/omit-if-no-ref/ mx6sx_pad_nand_data04__gpio4_io_8: MX6SX_PAD_NAND_DATA04__GPIO4_IO_8 {
2438		pinmux = <0x420e0160 5 0x420e0000 0 0x420e04a8>;
2439	};
2440	/omit-if-no-ref/ mx6sx_pad_nand_data04__weim_ad_4: MX6SX_PAD_NAND_DATA04__WEIM_AD_4 {
2441		pinmux = <0x420e0160 6 0x420e0000 0 0x420e04a8>;
2442	};
2443	/omit-if-no-ref/ mx6sx_pad_nand_data04__tpsmp_hdata_11: MX6SX_PAD_NAND_DATA04__TPSMP_HDATA_11 {
2444		pinmux = <0x420e0160 7 0x420e0000 0 0x420e04a8>;
2445	};
2446	/omit-if-no-ref/ mx6sx_pad_nand_data04__anatop_usbphy2_tsto_rx_squelch: MX6SX_PAD_NAND_DATA04__ANATOP_USBPHY2_TSTO_RX_SQUELCH {
2447		pinmux = <0x420e0160 8 0x420e0000 0 0x420e04a8>;
2448	};
2449	/omit-if-no-ref/ mx6sx_pad_nand_data04__sdma_debug_core_state_0: MX6SX_PAD_NAND_DATA04__SDMA_DEBUG_CORE_STATE_0 {
2450		pinmux = <0x420e0160 9 0x420e0000 0 0x420e04a8>;
2451	};
2452	/omit-if-no-ref/ mx6sx_pad_nand_data05__rawnand_data05: MX6SX_PAD_NAND_DATA05__RAWNAND_DATA05 {
2453		pinmux = <0x420e0164 0 0x420e0000 0 0x420e04ac>;
2454	};
2455	/omit-if-no-ref/ mx6sx_pad_nand_data05__usdhc2_data5: MX6SX_PAD_NAND_DATA05__USDHC2_DATA5 {
2456		pinmux = <0x420e0164 1 0x420e0000 0 0x420e04ac>;
2457	};
2458	/omit-if-no-ref/ mx6sx_pad_nand_data05__qspi2_b_dqs: MX6SX_PAD_NAND_DATA05__QSPI2_B_DQS {
2459		pinmux = <0x420e0164 2 0x420e0000 0 0x420e04ac>;
2460	};
2461	/omit-if-no-ref/ mx6sx_pad_nand_data05__uart3_dce_cts: MX6SX_PAD_NAND_DATA05__UART3_DCE_CTS {
2462		pinmux = <0x420e0164 3 0x420e0000 0 0x420e04ac>;
2463	};
2464	/omit-if-no-ref/ mx6sx_pad_nand_data05__uart3_dte_rts: MX6SX_PAD_NAND_DATA05__UART3_DTE_RTS {
2465		pinmux = <0x420e0164 3 0x420e083c 1 0x420e04ac>;
2466	};
2467	/omit-if-no-ref/ mx6sx_pad_nand_data05__audmux_aud4_rxc: MX6SX_PAD_NAND_DATA05__AUDMUX_AUD4_RXC {
2468		pinmux = <0x420e0164 4 0x420e064c 0 0x420e04ac>;
2469	};
2470	/omit-if-no-ref/ mx6sx_pad_nand_data05__gpio4_io_9: MX6SX_PAD_NAND_DATA05__GPIO4_IO_9 {
2471		pinmux = <0x420e0164 5 0x420e0000 0 0x420e04ac>;
2472	};
2473	/omit-if-no-ref/ mx6sx_pad_nand_data05__weim_ad_5: MX6SX_PAD_NAND_DATA05__WEIM_AD_5 {
2474		pinmux = <0x420e0164 6 0x420e0000 0 0x420e04ac>;
2475	};
2476	/omit-if-no-ref/ mx6sx_pad_nand_data05__tpsmp_hdata_12: MX6SX_PAD_NAND_DATA05__TPSMP_HDATA_12 {
2477		pinmux = <0x420e0164 7 0x420e0000 0 0x420e04ac>;
2478	};
2479	/omit-if-no-ref/ mx6sx_pad_nand_data05__anatop_usbphy2_tsto_rx_discon_det: MX6SX_PAD_NAND_DATA05__ANATOP_USBPHY2_TSTO_RX_DISCON_DET {
2480		pinmux = <0x420e0164 8 0x420e0000 0 0x420e04ac>;
2481	};
2482	/omit-if-no-ref/ mx6sx_pad_nand_data05__sdma_debug_core_state_1: MX6SX_PAD_NAND_DATA05__SDMA_DEBUG_CORE_STATE_1 {
2483		pinmux = <0x420e0164 9 0x420e0000 0 0x420e04ac>;
2484	};
2485	/omit-if-no-ref/ mx6sx_pad_nand_data06__rawnand_data06: MX6SX_PAD_NAND_DATA06__RAWNAND_DATA06 {
2486		pinmux = <0x420e0168 0 0x420e0000 0 0x420e04b0>;
2487	};
2488	/omit-if-no-ref/ mx6sx_pad_nand_data06__usdhc2_data6: MX6SX_PAD_NAND_DATA06__USDHC2_DATA6 {
2489		pinmux = <0x420e0168 1 0x420e0000 0 0x420e04b0>;
2490	};
2491	/omit-if-no-ref/ mx6sx_pad_nand_data06__qspi2_a_ss1_b: MX6SX_PAD_NAND_DATA06__QSPI2_A_SS1_B {
2492		pinmux = <0x420e0168 2 0x420e0000 0 0x420e04b0>;
2493	};
2494	/omit-if-no-ref/ mx6sx_pad_nand_data06__uart3_dce_rx: MX6SX_PAD_NAND_DATA06__UART3_DCE_RX {
2495		pinmux = <0x420e0168 3 0x420e0840 0 0x420e04b0>;
2496	};
2497	/omit-if-no-ref/ mx6sx_pad_nand_data06__uart3_dte_tx: MX6SX_PAD_NAND_DATA06__UART3_DTE_TX {
2498		pinmux = <0x420e0168 3 0x420e0000 0 0x420e04b0>;
2499	};
2500	/omit-if-no-ref/ mx6sx_pad_nand_data06__pwm3_out: MX6SX_PAD_NAND_DATA06__PWM3_OUT {
2501		pinmux = <0x420e0168 4 0x420e0000 0 0x420e04b0>;
2502	};
2503	/omit-if-no-ref/ mx6sx_pad_nand_data06__gpio4_io_10: MX6SX_PAD_NAND_DATA06__GPIO4_IO_10 {
2504		pinmux = <0x420e0168 5 0x420e0000 0 0x420e04b0>;
2505	};
2506	/omit-if-no-ref/ mx6sx_pad_nand_data06__weim_ad_6: MX6SX_PAD_NAND_DATA06__WEIM_AD_6 {
2507		pinmux = <0x420e0168 6 0x420e0000 0 0x420e04b0>;
2508	};
2509	/omit-if-no-ref/ mx6sx_pad_nand_data06__tpsmp_hdata_13: MX6SX_PAD_NAND_DATA06__TPSMP_HDATA_13 {
2510		pinmux = <0x420e0168 7 0x420e0000 0 0x420e04b0>;
2511	};
2512	/omit-if-no-ref/ mx6sx_pad_nand_data06__anatop_usbphy2_tsto_rx_fs_rxd: MX6SX_PAD_NAND_DATA06__ANATOP_USBPHY2_TSTO_RX_FS_RXD {
2513		pinmux = <0x420e0168 8 0x420e0000 0 0x420e04b0>;
2514	};
2515	/omit-if-no-ref/ mx6sx_pad_nand_data06__sdma_debug_core_state_2: MX6SX_PAD_NAND_DATA06__SDMA_DEBUG_CORE_STATE_2 {
2516		pinmux = <0x420e0168 9 0x420e0000 0 0x420e04b0>;
2517	};
2518	/omit-if-no-ref/ mx6sx_pad_nand_data07__rawnand_data07: MX6SX_PAD_NAND_DATA07__RAWNAND_DATA07 {
2519		pinmux = <0x420e016c 0 0x420e0000 0 0x420e04b4>;
2520	};
2521	/omit-if-no-ref/ mx6sx_pad_nand_data07__usdhc2_data7: MX6SX_PAD_NAND_DATA07__USDHC2_DATA7 {
2522		pinmux = <0x420e016c 1 0x420e0000 0 0x420e04b4>;
2523	};
2524	/omit-if-no-ref/ mx6sx_pad_nand_data07__qspi2_a_dqs: MX6SX_PAD_NAND_DATA07__QSPI2_A_DQS {
2525		pinmux = <0x420e016c 2 0x420e0000 0 0x420e04b4>;
2526	};
2527	/omit-if-no-ref/ mx6sx_pad_nand_data07__uart3_dce_tx: MX6SX_PAD_NAND_DATA07__UART3_DCE_TX {
2528		pinmux = <0x420e016c 3 0x420e0000 0 0x420e04b4>;
2529	};
2530	/omit-if-no-ref/ mx6sx_pad_nand_data07__uart3_dte_rx: MX6SX_PAD_NAND_DATA07__UART3_DTE_RX {
2531		pinmux = <0x420e016c 3 0x420e0840 1 0x420e04b4>;
2532	};
2533	/omit-if-no-ref/ mx6sx_pad_nand_data07__pwm4_out: MX6SX_PAD_NAND_DATA07__PWM4_OUT {
2534		pinmux = <0x420e016c 4 0x420e0000 0 0x420e04b4>;
2535	};
2536	/omit-if-no-ref/ mx6sx_pad_nand_data07__gpio4_io_11: MX6SX_PAD_NAND_DATA07__GPIO4_IO_11 {
2537		pinmux = <0x420e016c 5 0x420e0000 0 0x420e04b4>;
2538	};
2539	/omit-if-no-ref/ mx6sx_pad_nand_data07__weim_ad_7: MX6SX_PAD_NAND_DATA07__WEIM_AD_7 {
2540		pinmux = <0x420e016c 6 0x420e0000 0 0x420e04b4>;
2541	};
2542	/omit-if-no-ref/ mx6sx_pad_nand_data07__tpsmp_hdata_14: MX6SX_PAD_NAND_DATA07__TPSMP_HDATA_14 {
2543		pinmux = <0x420e016c 7 0x420e0000 0 0x420e04b4>;
2544	};
2545	/omit-if-no-ref/ mx6sx_pad_nand_data07__anatop_usbphy1_tsto_rx_fs_rxd: MX6SX_PAD_NAND_DATA07__ANATOP_USBPHY1_TSTO_RX_FS_RXD {
2546		pinmux = <0x420e016c 8 0x420e0000 0 0x420e04b4>;
2547	};
2548	/omit-if-no-ref/ mx6sx_pad_nand_data07__sdma_debug_core_state_3: MX6SX_PAD_NAND_DATA07__SDMA_DEBUG_CORE_STATE_3 {
2549		pinmux = <0x420e016c 9 0x420e0000 0 0x420e04b4>;
2550	};
2551	/omit-if-no-ref/ mx6sx_pad_nand_re_b__rawnand_re_b: MX6SX_PAD_NAND_RE_B__RAWNAND_RE_B {
2552		pinmux = <0x420e0170 0 0x420e0000 0 0x420e04b8>;
2553	};
2554	/omit-if-no-ref/ mx6sx_pad_nand_re_b__usdhc2_reset_b: MX6SX_PAD_NAND_RE_B__USDHC2_RESET_B {
2555		pinmux = <0x420e0170 1 0x420e0000 0 0x420e04b8>;
2556	};
2557	/omit-if-no-ref/ mx6sx_pad_nand_re_b__qspi2_b_data_3: MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3 {
2558		pinmux = <0x420e0170 2 0x420e0000 0 0x420e04b8>;
2559	};
2560	/omit-if-no-ref/ mx6sx_pad_nand_re_b__audmux_aud4_txfs: MX6SX_PAD_NAND_RE_B__AUDMUX_AUD4_TXFS {
2561		pinmux = <0x420e0170 3 0x420e0658 0 0x420e04b8>;
2562	};
2563	/omit-if-no-ref/ mx6sx_pad_nand_re_b__esai_tx_fs: MX6SX_PAD_NAND_RE_B__ESAI_TX_FS {
2564		pinmux = <0x420e0170 4 0x420e077c 0 0x420e04b8>;
2565	};
2566	/omit-if-no-ref/ mx6sx_pad_nand_re_b__gpio4_io_12: MX6SX_PAD_NAND_RE_B__GPIO4_IO_12 {
2567		pinmux = <0x420e0170 5 0x420e0000 0 0x420e04b8>;
2568	};
2569	/omit-if-no-ref/ mx6sx_pad_nand_re_b__weim_rw: MX6SX_PAD_NAND_RE_B__WEIM_RW {
2570		pinmux = <0x420e0170 6 0x420e0000 0 0x420e04b8>;
2571	};
2572	/omit-if-no-ref/ mx6sx_pad_nand_re_b__tpsmp_hdata_5: MX6SX_PAD_NAND_RE_B__TPSMP_HDATA_5 {
2573		pinmux = <0x420e0170 7 0x420e0000 0 0x420e04b8>;
2574	};
2575	/omit-if-no-ref/ mx6sx_pad_nand_re_b__anatop_usbphy2_tsto_rx_hs_rxd: MX6SX_PAD_NAND_RE_B__ANATOP_USBPHY2_TSTO_RX_HS_RXD {
2576		pinmux = <0x420e0170 8 0x420e0000 0 0x420e04b8>;
2577	};
2578	/omit-if-no-ref/ mx6sx_pad_nand_re_b__sdma_debug_pc_7: MX6SX_PAD_NAND_RE_B__SDMA_DEBUG_PC_7 {
2579		pinmux = <0x420e0170 9 0x420e0000 0 0x420e04b8>;
2580	};
2581	/omit-if-no-ref/ mx6sx_pad_nand_ready_b__rawnand_ready_b: MX6SX_PAD_NAND_READY_B__RAWNAND_READY_B {
2582		pinmux = <0x420e0174 0 0x420e0000 0 0x420e04bc>;
2583	};
2584	/omit-if-no-ref/ mx6sx_pad_nand_ready_b__usdhc1_vselect: MX6SX_PAD_NAND_READY_B__USDHC1_VSELECT {
2585		pinmux = <0x420e0174 1 0x420e0000 0 0x420e04bc>;
2586	};
2587	/omit-if-no-ref/ mx6sx_pad_nand_ready_b__qspi2_a_data_1: MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1 {
2588		pinmux = <0x420e0174 2 0x420e0000 0 0x420e04bc>;
2589	};
2590	/omit-if-no-ref/ mx6sx_pad_nand_ready_b__ecspi2_miso: MX6SX_PAD_NAND_READY_B__ECSPI2_MISO {
2591		pinmux = <0x420e0174 3 0x420e0724 0 0x420e04bc>;
2592	};
2593	/omit-if-no-ref/ mx6sx_pad_nand_ready_b__esai_tx1: MX6SX_PAD_NAND_READY_B__ESAI_TX1 {
2594		pinmux = <0x420e0174 4 0x420e0794 0 0x420e04bc>;
2595	};
2596	/omit-if-no-ref/ mx6sx_pad_nand_ready_b__gpio4_io_13: MX6SX_PAD_NAND_READY_B__GPIO4_IO_13 {
2597		pinmux = <0x420e0174 5 0x420e0000 0 0x420e04bc>;
2598	};
2599	/omit-if-no-ref/ mx6sx_pad_nand_ready_b__weim_eb_b_1: MX6SX_PAD_NAND_READY_B__WEIM_EB_B_1 {
2600		pinmux = <0x420e0174 6 0x420e0000 0 0x420e04bc>;
2601	};
2602	/omit-if-no-ref/ mx6sx_pad_nand_ready_b__tpsmp_hdata_2: MX6SX_PAD_NAND_READY_B__TPSMP_HDATA_2 {
2603		pinmux = <0x420e0174 7 0x420e0000 0 0x420e04bc>;
2604	};
2605	/omit-if-no-ref/ mx6sx_pad_nand_ready_b__anatop_usbphy1_tsti_tx_dn: MX6SX_PAD_NAND_READY_B__ANATOP_USBPHY1_TSTI_TX_DN {
2606		pinmux = <0x420e0174 8 0x420e0000 0 0x420e04bc>;
2607	};
2608	/omit-if-no-ref/ mx6sx_pad_nand_ready_b__sdma_debug_pc_10: MX6SX_PAD_NAND_READY_B__SDMA_DEBUG_PC_10 {
2609		pinmux = <0x420e0174 9 0x420e0000 0 0x420e04bc>;
2610	};
2611	/omit-if-no-ref/ mx6sx_pad_nand_we_b__rawnand_we_b: MX6SX_PAD_NAND_WE_B__RAWNAND_WE_B {
2612		pinmux = <0x420e0178 0 0x420e0000 0 0x420e04c0>;
2613	};
2614	/omit-if-no-ref/ mx6sx_pad_nand_we_b__usdhc4_vselect: MX6SX_PAD_NAND_WE_B__USDHC4_VSELECT {
2615		pinmux = <0x420e0178 1 0x420e0000 0 0x420e04c0>;
2616	};
2617	/omit-if-no-ref/ mx6sx_pad_nand_we_b__qspi2_b_data_2: MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2 {
2618		pinmux = <0x420e0178 2 0x420e0000 0 0x420e04c0>;
2619	};
2620	/omit-if-no-ref/ mx6sx_pad_nand_we_b__audmux_aud4_rxd: MX6SX_PAD_NAND_WE_B__AUDMUX_AUD4_RXD {
2621		pinmux = <0x420e0178 3 0x420e0644 0 0x420e04c0>;
2622	};
2623	/omit-if-no-ref/ mx6sx_pad_nand_we_b__esai_tx5_rx0: MX6SX_PAD_NAND_WE_B__ESAI_TX5_RX0 {
2624		pinmux = <0x420e0178 4 0x420e07a4 0 0x420e04c0>;
2625	};
2626	/omit-if-no-ref/ mx6sx_pad_nand_we_b__gpio4_io_14: MX6SX_PAD_NAND_WE_B__GPIO4_IO_14 {
2627		pinmux = <0x420e0178 5 0x420e0000 0 0x420e04c0>;
2628	};
2629	/omit-if-no-ref/ mx6sx_pad_nand_we_b__weim_wait: MX6SX_PAD_NAND_WE_B__WEIM_WAIT {
2630		pinmux = <0x420e0178 6 0x420e0000 0 0x420e04c0>;
2631	};
2632	/omit-if-no-ref/ mx6sx_pad_nand_we_b__tpsmp_hdata_6: MX6SX_PAD_NAND_WE_B__TPSMP_HDATA_6 {
2633		pinmux = <0x420e0178 7 0x420e0000 0 0x420e04c0>;
2634	};
2635	/omit-if-no-ref/ mx6sx_pad_nand_we_b__anatop_usbphy1_tsto_pll_clk20div: MX6SX_PAD_NAND_WE_B__ANATOP_USBPHY1_TSTO_PLL_CLK20DIV {
2636		pinmux = <0x420e0178 8 0x420e0000 0 0x420e04c0>;
2637	};
2638	/omit-if-no-ref/ mx6sx_pad_nand_we_b__sdma_debug_pc_6: MX6SX_PAD_NAND_WE_B__SDMA_DEBUG_PC_6 {
2639		pinmux = <0x420e0178 9 0x420e0000 0 0x420e04c0>;
2640	};
2641	/omit-if-no-ref/ mx6sx_pad_nand_wp_b__rawnand_wp_b: MX6SX_PAD_NAND_WP_B__RAWNAND_WP_B {
2642		pinmux = <0x420e017c 0 0x420e0000 0 0x420e04c4>;
2643	};
2644	/omit-if-no-ref/ mx6sx_pad_nand_wp_b__usdhc1_reset_b: MX6SX_PAD_NAND_WP_B__USDHC1_RESET_B {
2645		pinmux = <0x420e017c 1 0x420e0000 0 0x420e04c4>;
2646	};
2647	/omit-if-no-ref/ mx6sx_pad_nand_wp_b__qspi2_a_data_0: MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0 {
2648		pinmux = <0x420e017c 2 0x420e0000 0 0x420e04c4>;
2649	};
2650	/omit-if-no-ref/ mx6sx_pad_nand_wp_b__ecspi2_mosi: MX6SX_PAD_NAND_WP_B__ECSPI2_MOSI {
2651		pinmux = <0x420e017c 3 0x420e0728 0 0x420e04c4>;
2652	};
2653	/omit-if-no-ref/ mx6sx_pad_nand_wp_b__esai_tx4_rx1: MX6SX_PAD_NAND_WP_B__ESAI_TX4_RX1 {
2654		pinmux = <0x420e017c 4 0x420e07a0 0 0x420e04c4>;
2655	};
2656	/omit-if-no-ref/ mx6sx_pad_nand_wp_b__gpio4_io_15: MX6SX_PAD_NAND_WP_B__GPIO4_IO_15 {
2657		pinmux = <0x420e017c 5 0x420e0000 0 0x420e04c4>;
2658	};
2659	/omit-if-no-ref/ mx6sx_pad_nand_wp_b__weim_eb_b_0: MX6SX_PAD_NAND_WP_B__WEIM_EB_B_0 {
2660		pinmux = <0x420e017c 6 0x420e0000 0 0x420e04c4>;
2661	};
2662	/omit-if-no-ref/ mx6sx_pad_nand_wp_b__tpsmp_hdata_1: MX6SX_PAD_NAND_WP_B__TPSMP_HDATA_1 {
2663		pinmux = <0x420e017c 7 0x420e0000 0 0x420e04c4>;
2664	};
2665	/omit-if-no-ref/ mx6sx_pad_nand_wp_b__anatop_usbphy1_tsti_tx_hs_mode: MX6SX_PAD_NAND_WP_B__ANATOP_USBPHY1_TSTI_TX_HS_MODE {
2666		pinmux = <0x420e017c 8 0x420e0000 0 0x420e04c4>;
2667	};
2668	/omit-if-no-ref/ mx6sx_pad_nand_wp_b__sdma_debug_pc_11: MX6SX_PAD_NAND_WP_B__SDMA_DEBUG_PC_11 {
2669		pinmux = <0x420e017c 9 0x420e0000 0 0x420e04c4>;
2670	};
2671	/omit-if-no-ref/ mx6sx_pad_qspi1a_data0__qspi1_a_data_0: MX6SX_PAD_QSPI1A_DATA0__QSPI1_A_DATA_0 {
2672		pinmux = <0x420e0180 0 0x420e0000 0 0x420e04c8>;
2673	};
2674	/omit-if-no-ref/ mx6sx_pad_qspi1a_data0__usb_otg2_oc: MX6SX_PAD_QSPI1A_DATA0__USB_OTG2_OC {
2675		pinmux = <0x420e0180 1 0x420e085c 2 0x420e04c8>;
2676	};
2677	/omit-if-no-ref/ mx6sx_pad_qspi1a_data0__ecspi1_mosi: MX6SX_PAD_QSPI1A_DATA0__ECSPI1_MOSI {
2678		pinmux = <0x420e0180 2 0x420e0718 1 0x420e04c8>;
2679	};
2680	/omit-if-no-ref/ mx6sx_pad_qspi1a_data0__esai_tx4_rx1: MX6SX_PAD_QSPI1A_DATA0__ESAI_TX4_RX1 {
2681		pinmux = <0x420e0180 3 0x420e07a0 2 0x420e04c8>;
2682	};
2683	/omit-if-no-ref/ mx6sx_pad_qspi1a_data0__csi1_data_14: MX6SX_PAD_QSPI1A_DATA0__CSI1_DATA_14 {
2684		pinmux = <0x420e0180 4 0x420e06d4 1 0x420e04c8>;
2685	};
2686	/omit-if-no-ref/ mx6sx_pad_qspi1a_data0__gpio4_io_16: MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 {
2687		pinmux = <0x420e0180 5 0x420e0000 0 0x420e04c8>;
2688	};
2689	/omit-if-no-ref/ mx6sx_pad_qspi1a_data0__weim_data_6: MX6SX_PAD_QSPI1A_DATA0__WEIM_DATA_6 {
2690		pinmux = <0x420e0180 6 0x420e0000 0 0x420e04c8>;
2691	};
2692	/omit-if-no-ref/ mx6sx_pad_qspi1a_data0__sim_m_haddr_3: MX6SX_PAD_QSPI1A_DATA0__SIM_M_HADDR_3 {
2693		pinmux = <0x420e0180 7 0x420e0000 0 0x420e04c8>;
2694	};
2695	/omit-if-no-ref/ mx6sx_pad_qspi1a_data0__sdma_debug_bus_device_3: MX6SX_PAD_QSPI1A_DATA0__SDMA_DEBUG_BUS_DEVICE_3 {
2696		pinmux = <0x420e0180 9 0x420e0000 0 0x420e04c8>;
2697	};
2698	/omit-if-no-ref/ mx6sx_pad_qspi1a_data1__qspi1_a_data_1: MX6SX_PAD_QSPI1A_DATA1__QSPI1_A_DATA_1 {
2699		pinmux = <0x420e0184 0 0x420e0000 0 0x420e04cc>;
2700	};
2701	/omit-if-no-ref/ mx6sx_pad_qspi1a_data1__anatop_otg1_id: MX6SX_PAD_QSPI1A_DATA1__ANATOP_OTG1_ID {
2702		pinmux = <0x420e0184 1 0x420e0624 2 0x420e04cc>;
2703	};
2704	/omit-if-no-ref/ mx6sx_pad_qspi1a_data1__ecspi1_miso: MX6SX_PAD_QSPI1A_DATA1__ECSPI1_MISO {
2705		pinmux = <0x420e0184 2 0x420e0714 1 0x420e04cc>;
2706	};
2707	/omit-if-no-ref/ mx6sx_pad_qspi1a_data1__esai_tx1: MX6SX_PAD_QSPI1A_DATA1__ESAI_TX1 {
2708		pinmux = <0x420e0184 3 0x420e0794 2 0x420e04cc>;
2709	};
2710	/omit-if-no-ref/ mx6sx_pad_qspi1a_data1__csi1_data_13: MX6SX_PAD_QSPI1A_DATA1__CSI1_DATA_13 {
2711		pinmux = <0x420e0184 4 0x420e06d0 1 0x420e04cc>;
2712	};
2713	/omit-if-no-ref/ mx6sx_pad_qspi1a_data1__gpio4_io_17: MX6SX_PAD_QSPI1A_DATA1__GPIO4_IO_17 {
2714		pinmux = <0x420e0184 5 0x420e0000 0 0x420e04cc>;
2715	};
2716	/omit-if-no-ref/ mx6sx_pad_qspi1a_data1__weim_data_5: MX6SX_PAD_QSPI1A_DATA1__WEIM_DATA_5 {
2717		pinmux = <0x420e0184 6 0x420e0000 0 0x420e04cc>;
2718	};
2719	/omit-if-no-ref/ mx6sx_pad_qspi1a_data1__sim_m_haddr_4: MX6SX_PAD_QSPI1A_DATA1__SIM_M_HADDR_4 {
2720		pinmux = <0x420e0184 7 0x420e0000 0 0x420e04cc>;
2721	};
2722	/omit-if-no-ref/ mx6sx_pad_qspi1a_data1__sdma_debug_pc_0: MX6SX_PAD_QSPI1A_DATA1__SDMA_DEBUG_PC_0 {
2723		pinmux = <0x420e0184 9 0x420e0000 0 0x420e04cc>;
2724	};
2725	/omit-if-no-ref/ mx6sx_pad_qspi1a_data2__qspi1_a_data_2: MX6SX_PAD_QSPI1A_DATA2__QSPI1_A_DATA_2 {
2726		pinmux = <0x420e0188 0 0x420e0000 0 0x420e04d0>;
2727	};
2728	/omit-if-no-ref/ mx6sx_pad_qspi1a_data2__usb_otg1_pwr: MX6SX_PAD_QSPI1A_DATA2__USB_OTG1_PWR {
2729		pinmux = <0x420e0188 1 0x420e0000 0 0x420e04d0>;
2730	};
2731	/omit-if-no-ref/ mx6sx_pad_qspi1a_data2__ecspi5_ss1: MX6SX_PAD_QSPI1A_DATA2__ECSPI5_SS1 {
2732		pinmux = <0x420e0188 2 0x420e0000 0 0x420e04d0>;
2733	};
2734	/omit-if-no-ref/ mx6sx_pad_qspi1a_data2__esai_tx_clk: MX6SX_PAD_QSPI1A_DATA2__ESAI_TX_CLK {
2735		pinmux = <0x420e0188 3 0x420e078c 2 0x420e04d0>;
2736	};
2737	/omit-if-no-ref/ mx6sx_pad_qspi1a_data2__csi1_data_12: MX6SX_PAD_QSPI1A_DATA2__CSI1_DATA_12 {
2738		pinmux = <0x420e0188 4 0x420e06cc 1 0x420e04d0>;
2739	};
2740	/omit-if-no-ref/ mx6sx_pad_qspi1a_data2__gpio4_io_18: MX6SX_PAD_QSPI1A_DATA2__GPIO4_IO_18 {
2741		pinmux = <0x420e0188 5 0x420e0000 0 0x420e04d0>;
2742	};
2743	/omit-if-no-ref/ mx6sx_pad_qspi1a_data2__weim_data_4: MX6SX_PAD_QSPI1A_DATA2__WEIM_DATA_4 {
2744		pinmux = <0x420e0188 6 0x420e0000 0 0x420e04d0>;
2745	};
2746	/omit-if-no-ref/ mx6sx_pad_qspi1a_data2__sim_m_haddr_6: MX6SX_PAD_QSPI1A_DATA2__SIM_M_HADDR_6 {
2747		pinmux = <0x420e0188 7 0x420e0000 0 0x420e04d0>;
2748	};
2749	/omit-if-no-ref/ mx6sx_pad_qspi1a_data2__sdma_debug_pc_1: MX6SX_PAD_QSPI1A_DATA2__SDMA_DEBUG_PC_1 {
2750		pinmux = <0x420e0188 9 0x420e0000 0 0x420e04d0>;
2751	};
2752	/omit-if-no-ref/ mx6sx_pad_qspi1a_data3__qspi1_a_data_3: MX6SX_PAD_QSPI1A_DATA3__QSPI1_A_DATA_3 {
2753		pinmux = <0x420e018c 0 0x420e0000 0 0x420e04d4>;
2754	};
2755	/omit-if-no-ref/ mx6sx_pad_qspi1a_data3__usb_otg1_oc: MX6SX_PAD_QSPI1A_DATA3__USB_OTG1_OC {
2756		pinmux = <0x420e018c 1 0x420e0860 2 0x420e04d4>;
2757	};
2758	/omit-if-no-ref/ mx6sx_pad_qspi1a_data3__ecspi5_ss2: MX6SX_PAD_QSPI1A_DATA3__ECSPI5_SS2 {
2759		pinmux = <0x420e018c 2 0x420e0000 0 0x420e04d4>;
2760	};
2761	/omit-if-no-ref/ mx6sx_pad_qspi1a_data3__esai_tx0: MX6SX_PAD_QSPI1A_DATA3__ESAI_TX0 {
2762		pinmux = <0x420e018c 3 0x420e0790 2 0x420e04d4>;
2763	};
2764	/omit-if-no-ref/ mx6sx_pad_qspi1a_data3__csi1_data_11: MX6SX_PAD_QSPI1A_DATA3__CSI1_DATA_11 {
2765		pinmux = <0x420e018c 4 0x420e06c8 1 0x420e04d4>;
2766	};
2767	/omit-if-no-ref/ mx6sx_pad_qspi1a_data3__gpio4_io_19: MX6SX_PAD_QSPI1A_DATA3__GPIO4_IO_19 {
2768		pinmux = <0x420e018c 5 0x420e0000 0 0x420e04d4>;
2769	};
2770	/omit-if-no-ref/ mx6sx_pad_qspi1a_data3__weim_data_3: MX6SX_PAD_QSPI1A_DATA3__WEIM_DATA_3 {
2771		pinmux = <0x420e018c 6 0x420e0000 0 0x420e04d4>;
2772	};
2773	/omit-if-no-ref/ mx6sx_pad_qspi1a_data3__sim_m_haddr_7: MX6SX_PAD_QSPI1A_DATA3__SIM_M_HADDR_7 {
2774		pinmux = <0x420e018c 7 0x420e0000 0 0x420e04d4>;
2775	};
2776	/omit-if-no-ref/ mx6sx_pad_qspi1a_data3__sdma_debug_pc_2: MX6SX_PAD_QSPI1A_DATA3__SDMA_DEBUG_PC_2 {
2777		pinmux = <0x420e018c 9 0x420e0000 0 0x420e04d4>;
2778	};
2779	/omit-if-no-ref/ mx6sx_pad_qspi1a_dqs__qspi1_a_dqs: MX6SX_PAD_QSPI1A_DQS__QSPI1_A_DQS {
2780		pinmux = <0x420e0190 0 0x420e0000 0 0x420e04d8>;
2781	};
2782	/omit-if-no-ref/ mx6sx_pad_qspi1a_dqs__can2_tx: MX6SX_PAD_QSPI1A_DQS__CAN2_TX {
2783		pinmux = <0x420e0190 1 0x420e0000 0 0x420e04d8>;
2784	};
2785	/omit-if-no-ref/ mx6sx_pad_qspi1a_dqs__canfd_tx2: MX6SX_PAD_QSPI1A_DQS__CANFD_TX2 {
2786		pinmux = <0x420e0190 2 0x420e0000 0 0x420e04d8>;
2787	};
2788	/omit-if-no-ref/ mx6sx_pad_qspi1a_dqs__ecspi5_mosi: MX6SX_PAD_QSPI1A_DQS__ECSPI5_MOSI {
2789		pinmux = <0x420e0190 3 0x420e0758 1 0x420e04d8>;
2790	};
2791	/omit-if-no-ref/ mx6sx_pad_qspi1a_dqs__csi1_data_15: MX6SX_PAD_QSPI1A_DQS__CSI1_DATA_15 {
2792		pinmux = <0x420e0190 4 0x420e06d8 1 0x420e04d8>;
2793	};
2794	/omit-if-no-ref/ mx6sx_pad_qspi1a_dqs__gpio4_io_20: MX6SX_PAD_QSPI1A_DQS__GPIO4_IO_20 {
2795		pinmux = <0x420e0190 5 0x420e0000 0 0x420e04d8>;
2796	};
2797	/omit-if-no-ref/ mx6sx_pad_qspi1a_dqs__weim_data_7: MX6SX_PAD_QSPI1A_DQS__WEIM_DATA_7 {
2798		pinmux = <0x420e0190 6 0x420e0000 0 0x420e04d8>;
2799	};
2800	/omit-if-no-ref/ mx6sx_pad_qspi1a_dqs__sim_m_haddr_13: MX6SX_PAD_QSPI1A_DQS__SIM_M_HADDR_13 {
2801		pinmux = <0x420e0190 7 0x420e0000 0 0x420e04d8>;
2802	};
2803	/omit-if-no-ref/ mx6sx_pad_qspi1a_dqs__sdma_debug_bus_device_4: MX6SX_PAD_QSPI1A_DQS__SDMA_DEBUG_BUS_DEVICE_4 {
2804		pinmux = <0x420e0190 9 0x420e0000 0 0x420e04d8>;
2805	};
2806	/omit-if-no-ref/ mx6sx_pad_qspi1a_sclk__qspi1_a_sclk: MX6SX_PAD_QSPI1A_SCLK__QSPI1_A_SCLK {
2807		pinmux = <0x420e0194 0 0x420e0000 0 0x420e04dc>;
2808	};
2809	/omit-if-no-ref/ mx6sx_pad_qspi1a_sclk__anatop_otg2_id: MX6SX_PAD_QSPI1A_SCLK__ANATOP_OTG2_ID {
2810		pinmux = <0x420e0194 1 0x420e0628 2 0x420e04dc>;
2811	};
2812	/omit-if-no-ref/ mx6sx_pad_qspi1a_sclk__ecspi1_sclk: MX6SX_PAD_QSPI1A_SCLK__ECSPI1_SCLK {
2813		pinmux = <0x420e0194 2 0x420e0710 1 0x420e04dc>;
2814	};
2815	/omit-if-no-ref/ mx6sx_pad_qspi1a_sclk__esai_tx2_rx3: MX6SX_PAD_QSPI1A_SCLK__ESAI_TX2_RX3 {
2816		pinmux = <0x420e0194 3 0x420e0798 2 0x420e04dc>;
2817	};
2818	/omit-if-no-ref/ mx6sx_pad_qspi1a_sclk__csi1_data_1: MX6SX_PAD_QSPI1A_SCLK__CSI1_DATA_1 {
2819		pinmux = <0x420e0194 4 0x420e06a4 1 0x420e04dc>;
2820	};
2821	/omit-if-no-ref/ mx6sx_pad_qspi1a_sclk__gpio4_io_21: MX6SX_PAD_QSPI1A_SCLK__GPIO4_IO_21 {
2822		pinmux = <0x420e0194 5 0x420e0000 0 0x420e04dc>;
2823	};
2824	/omit-if-no-ref/ mx6sx_pad_qspi1a_sclk__weim_data_0: MX6SX_PAD_QSPI1A_SCLK__WEIM_DATA_0 {
2825		pinmux = <0x420e0194 6 0x420e0000 0 0x420e04dc>;
2826	};
2827	/omit-if-no-ref/ mx6sx_pad_qspi1a_sclk__sim_m_haddr_0: MX6SX_PAD_QSPI1A_SCLK__SIM_M_HADDR_0 {
2828		pinmux = <0x420e0194 7 0x420e0000 0 0x420e04dc>;
2829	};
2830	/omit-if-no-ref/ mx6sx_pad_qspi1a_sclk__sdma_debug_pc_5: MX6SX_PAD_QSPI1A_SCLK__SDMA_DEBUG_PC_5 {
2831		pinmux = <0x420e0194 9 0x420e0000 0 0x420e04dc>;
2832	};
2833	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss0_b__qspi1_a_ss0_b: MX6SX_PAD_QSPI1A_SS0_B__QSPI1_A_SS0_B {
2834		pinmux = <0x420e0198 0 0x420e0000 0 0x420e04e0>;
2835	};
2836	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss0_b__usb_otg2_pwr: MX6SX_PAD_QSPI1A_SS0_B__USB_OTG2_PWR {
2837		pinmux = <0x420e0198 1 0x420e0000 0 0x420e04e0>;
2838	};
2839	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss0_b__ecspi1_ss0: MX6SX_PAD_QSPI1A_SS0_B__ECSPI1_SS0 {
2840		pinmux = <0x420e0198 2 0x420e071c 1 0x420e04e0>;
2841	};
2842	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss0_b__esai_tx3_rx2: MX6SX_PAD_QSPI1A_SS0_B__ESAI_TX3_RX2 {
2843		pinmux = <0x420e0198 3 0x420e079c 2 0x420e04e0>;
2844	};
2845	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss0_b__csi1_data_0: MX6SX_PAD_QSPI1A_SS0_B__CSI1_DATA_0 {
2846		pinmux = <0x420e0198 4 0x420e06a0 1 0x420e04e0>;
2847	};
2848	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss0_b__gpio4_io_22: MX6SX_PAD_QSPI1A_SS0_B__GPIO4_IO_22 {
2849		pinmux = <0x420e0198 5 0x420e0000 0 0x420e04e0>;
2850	};
2851	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss0_b__weim_data_1: MX6SX_PAD_QSPI1A_SS0_B__WEIM_DATA_1 {
2852		pinmux = <0x420e0198 6 0x420e0000 0 0x420e04e0>;
2853	};
2854	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss0_b__sim_m_haddr_1: MX6SX_PAD_QSPI1A_SS0_B__SIM_M_HADDR_1 {
2855		pinmux = <0x420e0198 7 0x420e0000 0 0x420e04e0>;
2856	};
2857	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss0_b__sdma_debug_pc_4: MX6SX_PAD_QSPI1A_SS0_B__SDMA_DEBUG_PC_4 {
2858		pinmux = <0x420e0198 9 0x420e0000 0 0x420e04e0>;
2859	};
2860	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss1_b__qspi1_a_ss1_b: MX6SX_PAD_QSPI1A_SS1_B__QSPI1_A_SS1_B {
2861		pinmux = <0x420e019c 0 0x420e0000 0 0x420e04e4>;
2862	};
2863	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss1_b__can1_rx: MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX {
2864		pinmux = <0x420e019c 1 0x420e068c 2 0x420e04e4>;
2865	};
2866	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss1_b__canfd_rx1: MX6SX_PAD_QSPI1A_SS1_B__CANFD_RX1 {
2867		pinmux = <0x420e019c 2 0x420e0694 2 0x420e04e4>;
2868	};
2869	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss1_b__ecspi5_miso: MX6SX_PAD_QSPI1A_SS1_B__ECSPI5_MISO {
2870		pinmux = <0x420e019c 3 0x420e0754 1 0x420e04e4>;
2871	};
2872	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss1_b__csi1_data_10: MX6SX_PAD_QSPI1A_SS1_B__CSI1_DATA_10 {
2873		pinmux = <0x420e019c 4 0x420e06fc 1 0x420e04e4>;
2874	};
2875	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss1_b__gpio4_io_23: MX6SX_PAD_QSPI1A_SS1_B__GPIO4_IO_23 {
2876		pinmux = <0x420e019c 5 0x420e0000 0 0x420e04e4>;
2877	};
2878	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss1_b__weim_data_2: MX6SX_PAD_QSPI1A_SS1_B__WEIM_DATA_2 {
2879		pinmux = <0x420e019c 6 0x420e0000 0 0x420e04e4>;
2880	};
2881	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss1_b__sim_m_haddr_12: MX6SX_PAD_QSPI1A_SS1_B__SIM_M_HADDR_12 {
2882		pinmux = <0x420e019c 7 0x420e0000 0 0x420e04e4>;
2883	};
2884	/omit-if-no-ref/ mx6sx_pad_qspi1a_ss1_b__sdma_debug_pc_3: MX6SX_PAD_QSPI1A_SS1_B__SDMA_DEBUG_PC_3 {
2885		pinmux = <0x420e019c 9 0x420e0000 0 0x420e04e4>;
2886	};
2887	/omit-if-no-ref/ mx6sx_pad_qspi1b_data0__qspi1_b_data_0: MX6SX_PAD_QSPI1B_DATA0__QSPI1_B_DATA_0 {
2888		pinmux = <0x420e01a0 0 0x420e0000 0 0x420e04e8>;
2889	};
2890	/omit-if-no-ref/ mx6sx_pad_qspi1b_data0__uart3_dce_cts: MX6SX_PAD_QSPI1B_DATA0__UART3_DCE_CTS {
2891		pinmux = <0x420e01a0 1 0x420e0000 0 0x420e04e8>;
2892	};
2893	/omit-if-no-ref/ mx6sx_pad_qspi1b_data0__uart3_dte_rts: MX6SX_PAD_QSPI1B_DATA0__UART3_DTE_RTS {
2894		pinmux = <0x420e01a0 1 0x420e083c 4 0x420e04e8>;
2895	};
2896	/omit-if-no-ref/ mx6sx_pad_qspi1b_data0__ecspi3_mosi: MX6SX_PAD_QSPI1B_DATA0__ECSPI3_MOSI {
2897		pinmux = <0x420e01a0 2 0x420e0738 1 0x420e04e8>;
2898	};
2899	/omit-if-no-ref/ mx6sx_pad_qspi1b_data0__esai_rx_fs: MX6SX_PAD_QSPI1B_DATA0__ESAI_RX_FS {
2900		pinmux = <0x420e01a0 3 0x420e0778 2 0x420e04e8>;
2901	};
2902	/omit-if-no-ref/ mx6sx_pad_qspi1b_data0__csi1_data_22: MX6SX_PAD_QSPI1B_DATA0__CSI1_DATA_22 {
2903		pinmux = <0x420e01a0 4 0x420e06f4 1 0x420e04e8>;
2904	};
2905	/omit-if-no-ref/ mx6sx_pad_qspi1b_data0__gpio4_io_24: MX6SX_PAD_QSPI1B_DATA0__GPIO4_IO_24 {
2906		pinmux = <0x420e01a0 5 0x420e0000 0 0x420e04e8>;
2907	};
2908	/omit-if-no-ref/ mx6sx_pad_qspi1b_data0__weim_data_14: MX6SX_PAD_QSPI1B_DATA0__WEIM_DATA_14 {
2909		pinmux = <0x420e01a0 6 0x420e0000 0 0x420e04e8>;
2910	};
2911	/omit-if-no-ref/ mx6sx_pad_qspi1b_data0__sim_m_haddr_9: MX6SX_PAD_QSPI1B_DATA0__SIM_M_HADDR_9 {
2912		pinmux = <0x420e01a0 7 0x420e0000 0 0x420e04e8>;
2913	};
2914	/omit-if-no-ref/ mx6sx_pad_qspi1b_data1__qspi1_b_data_1: MX6SX_PAD_QSPI1B_DATA1__QSPI1_B_DATA_1 {
2915		pinmux = <0x420e01a4 0 0x420e0000 0 0x420e04ec>;
2916	};
2917	/omit-if-no-ref/ mx6sx_pad_qspi1b_data1__uart3_dce_rts: MX6SX_PAD_QSPI1B_DATA1__UART3_DCE_RTS {
2918		pinmux = <0x420e01a4 1 0x420e083c 5 0x420e04ec>;
2919	};
2920	/omit-if-no-ref/ mx6sx_pad_qspi1b_data1__uart3_dte_cts: MX6SX_PAD_QSPI1B_DATA1__UART3_DTE_CTS {
2921		pinmux = <0x420e01a4 1 0x420e0000 0 0x420e04ec>;
2922	};
2923	/omit-if-no-ref/ mx6sx_pad_qspi1b_data1__ecspi3_miso: MX6SX_PAD_QSPI1B_DATA1__ECSPI3_MISO {
2924		pinmux = <0x420e01a4 2 0x420e0734 1 0x420e04ec>;
2925	};
2926	/omit-if-no-ref/ mx6sx_pad_qspi1b_data1__esai_rx_clk: MX6SX_PAD_QSPI1B_DATA1__ESAI_RX_CLK {
2927		pinmux = <0x420e01a4 3 0x420e0788 2 0x420e04ec>;
2928	};
2929	/omit-if-no-ref/ mx6sx_pad_qspi1b_data1__csi1_data_21: MX6SX_PAD_QSPI1B_DATA1__CSI1_DATA_21 {
2930		pinmux = <0x420e01a4 4 0x420e06f0 1 0x420e04ec>;
2931	};
2932	/omit-if-no-ref/ mx6sx_pad_qspi1b_data1__gpio4_io_25: MX6SX_PAD_QSPI1B_DATA1__GPIO4_IO_25 {
2933		pinmux = <0x420e01a4 5 0x420e0000 0 0x420e04ec>;
2934	};
2935	/omit-if-no-ref/ mx6sx_pad_qspi1b_data1__weim_data_13: MX6SX_PAD_QSPI1B_DATA1__WEIM_DATA_13 {
2936		pinmux = <0x420e01a4 6 0x420e0000 0 0x420e04ec>;
2937	};
2938	/omit-if-no-ref/ mx6sx_pad_qspi1b_data1__sim_m_haddr_8: MX6SX_PAD_QSPI1B_DATA1__SIM_M_HADDR_8 {
2939		pinmux = <0x420e01a4 7 0x420e0000 0 0x420e04ec>;
2940	};
2941	/omit-if-no-ref/ mx6sx_pad_qspi1b_data2__qspi1_b_data_2: MX6SX_PAD_QSPI1B_DATA2__QSPI1_B_DATA_2 {
2942		pinmux = <0x420e01a8 0 0x420e0000 0 0x420e04f0>;
2943	};
2944	/omit-if-no-ref/ mx6sx_pad_qspi1b_data2__i2c2_sda: MX6SX_PAD_QSPI1B_DATA2__I2C2_SDA {
2945		pinmux = <0x420e01a8 1 0x420e07b4 2 0x420e04f0>;
2946	};
2947	/omit-if-no-ref/ mx6sx_pad_qspi1b_data2__ecspi5_rdy: MX6SX_PAD_QSPI1B_DATA2__ECSPI5_RDY {
2948		pinmux = <0x420e01a8 2 0x420e0000 0 0x420e04f0>;
2949	};
2950	/omit-if-no-ref/ mx6sx_pad_qspi1b_data2__esai_tx5_rx0: MX6SX_PAD_QSPI1B_DATA2__ESAI_TX5_RX0 {
2951		pinmux = <0x420e01a8 3 0x420e07a4 2 0x420e04f0>;
2952	};
2953	/omit-if-no-ref/ mx6sx_pad_qspi1b_data2__csi1_data_20: MX6SX_PAD_QSPI1B_DATA2__CSI1_DATA_20 {
2954		pinmux = <0x420e01a8 4 0x420e06ec 1 0x420e04f0>;
2955	};
2956	/omit-if-no-ref/ mx6sx_pad_qspi1b_data2__gpio4_io_26: MX6SX_PAD_QSPI1B_DATA2__GPIO4_IO_26 {
2957		pinmux = <0x420e01a8 5 0x420e0000 0 0x420e04f0>;
2958	};
2959	/omit-if-no-ref/ mx6sx_pad_qspi1b_data2__weim_data_12: MX6SX_PAD_QSPI1B_DATA2__WEIM_DATA_12 {
2960		pinmux = <0x420e01a8 6 0x420e0000 0 0x420e04f0>;
2961	};
2962	/omit-if-no-ref/ mx6sx_pad_qspi1b_data2__sim_m_haddr_5: MX6SX_PAD_QSPI1B_DATA2__SIM_M_HADDR_5 {
2963		pinmux = <0x420e01a8 7 0x420e0000 0 0x420e04f0>;
2964	};
2965	/omit-if-no-ref/ mx6sx_pad_qspi1b_data3__qspi1_b_data_3: MX6SX_PAD_QSPI1B_DATA3__QSPI1_B_DATA_3 {
2966		pinmux = <0x420e01ac 0 0x420e0000 0 0x420e04f4>;
2967	};
2968	/omit-if-no-ref/ mx6sx_pad_qspi1b_data3__i2c2_scl: MX6SX_PAD_QSPI1B_DATA3__I2C2_SCL {
2969		pinmux = <0x420e01ac 1 0x420e07b0 2 0x420e04f4>;
2970	};
2971	/omit-if-no-ref/ mx6sx_pad_qspi1b_data3__ecspi5_ss3: MX6SX_PAD_QSPI1B_DATA3__ECSPI5_SS3 {
2972		pinmux = <0x420e01ac 2 0x420e0000 0 0x420e04f4>;
2973	};
2974	/omit-if-no-ref/ mx6sx_pad_qspi1b_data3__esai_tx_fs: MX6SX_PAD_QSPI1B_DATA3__ESAI_TX_FS {
2975		pinmux = <0x420e01ac 3 0x420e077c 2 0x420e04f4>;
2976	};
2977	/omit-if-no-ref/ mx6sx_pad_qspi1b_data3__csi1_data_19: MX6SX_PAD_QSPI1B_DATA3__CSI1_DATA_19 {
2978		pinmux = <0x420e01ac 4 0x420e06e8 1 0x420e04f4>;
2979	};
2980	/omit-if-no-ref/ mx6sx_pad_qspi1b_data3__gpio4_io_27: MX6SX_PAD_QSPI1B_DATA3__GPIO4_IO_27 {
2981		pinmux = <0x420e01ac 5 0x420e0000 0 0x420e04f4>;
2982	};
2983	/omit-if-no-ref/ mx6sx_pad_qspi1b_data3__weim_data_11: MX6SX_PAD_QSPI1B_DATA3__WEIM_DATA_11 {
2984		pinmux = <0x420e01ac 6 0x420e0000 0 0x420e04f4>;
2985	};
2986	/omit-if-no-ref/ mx6sx_pad_qspi1b_data3__sim_m_haddr_2: MX6SX_PAD_QSPI1B_DATA3__SIM_M_HADDR_2 {
2987		pinmux = <0x420e01ac 7 0x420e0000 0 0x420e04f4>;
2988	};
2989	/omit-if-no-ref/ mx6sx_pad_qspi1b_dqs__qspi1_b_dqs: MX6SX_PAD_QSPI1B_DQS__QSPI1_B_DQS {
2990		pinmux = <0x420e01b0 0 0x420e0000 0 0x420e04f8>;
2991	};
2992	/omit-if-no-ref/ mx6sx_pad_qspi1b_dqs__can1_tx: MX6SX_PAD_QSPI1B_DQS__CAN1_TX {
2993		pinmux = <0x420e01b0 1 0x420e0000 0 0x420e04f8>;
2994	};
2995	/omit-if-no-ref/ mx6sx_pad_qspi1b_dqs__canfd_tx1: MX6SX_PAD_QSPI1B_DQS__CANFD_TX1 {
2996		pinmux = <0x420e01b0 2 0x420e0000 0 0x420e04f8>;
2997	};
2998	/omit-if-no-ref/ mx6sx_pad_qspi1b_dqs__ecspi5_ss0: MX6SX_PAD_QSPI1B_DQS__ECSPI5_SS0 {
2999		pinmux = <0x420e01b0 3 0x420e075c 1 0x420e04f8>;
3000	};
3001	/omit-if-no-ref/ mx6sx_pad_qspi1b_dqs__csi1_data_23: MX6SX_PAD_QSPI1B_DQS__CSI1_DATA_23 {
3002		pinmux = <0x420e01b0 4 0x420e06f8 1 0x420e04f8>;
3003	};
3004	/omit-if-no-ref/ mx6sx_pad_qspi1b_dqs__gpio4_io_28: MX6SX_PAD_QSPI1B_DQS__GPIO4_IO_28 {
3005		pinmux = <0x420e01b0 5 0x420e0000 0 0x420e04f8>;
3006	};
3007	/omit-if-no-ref/ mx6sx_pad_qspi1b_dqs__weim_data_15: MX6SX_PAD_QSPI1B_DQS__WEIM_DATA_15 {
3008		pinmux = <0x420e01b0 6 0x420e0000 0 0x420e04f8>;
3009	};
3010	/omit-if-no-ref/ mx6sx_pad_qspi1b_dqs__sim_m_haddr_15: MX6SX_PAD_QSPI1B_DQS__SIM_M_HADDR_15 {
3011		pinmux = <0x420e01b0 7 0x420e0000 0 0x420e04f8>;
3012	};
3013	/omit-if-no-ref/ mx6sx_pad_qspi1b_sclk__qspi1_b_sclk: MX6SX_PAD_QSPI1B_SCLK__QSPI1_B_SCLK {
3014		pinmux = <0x420e01b4 0 0x420e0000 0 0x420e04fc>;
3015	};
3016	/omit-if-no-ref/ mx6sx_pad_qspi1b_sclk__uart3_dce_rx: MX6SX_PAD_QSPI1B_SCLK__UART3_DCE_RX {
3017		pinmux = <0x420e01b4 1 0x420e0840 4 0x420e04fc>;
3018	};
3019	/omit-if-no-ref/ mx6sx_pad_qspi1b_sclk__uart3_dte_tx: MX6SX_PAD_QSPI1B_SCLK__UART3_DTE_TX {
3020		pinmux = <0x420e01b4 1 0x420e0000 0 0x420e04fc>;
3021	};
3022	/omit-if-no-ref/ mx6sx_pad_qspi1b_sclk__ecspi3_sclk: MX6SX_PAD_QSPI1B_SCLK__ECSPI3_SCLK {
3023		pinmux = <0x420e01b4 2 0x420e0730 1 0x420e04fc>;
3024	};
3025	/omit-if-no-ref/ mx6sx_pad_qspi1b_sclk__esai_rx_hf_clk: MX6SX_PAD_QSPI1B_SCLK__ESAI_RX_HF_CLK {
3026		pinmux = <0x420e01b4 3 0x420e0780 2 0x420e04fc>;
3027	};
3028	/omit-if-no-ref/ mx6sx_pad_qspi1b_sclk__csi1_data_16: MX6SX_PAD_QSPI1B_SCLK__CSI1_DATA_16 {
3029		pinmux = <0x420e01b4 4 0x420e06dc 1 0x420e04fc>;
3030	};
3031	/omit-if-no-ref/ mx6sx_pad_qspi1b_sclk__gpio4_io_29: MX6SX_PAD_QSPI1B_SCLK__GPIO4_IO_29 {
3032		pinmux = <0x420e01b4 5 0x420e0000 0 0x420e04fc>;
3033	};
3034	/omit-if-no-ref/ mx6sx_pad_qspi1b_sclk__weim_data_8: MX6SX_PAD_QSPI1B_SCLK__WEIM_DATA_8 {
3035		pinmux = <0x420e01b4 6 0x420e0000 0 0x420e04fc>;
3036	};
3037	/omit-if-no-ref/ mx6sx_pad_qspi1b_sclk__sim_m_haddr_11: MX6SX_PAD_QSPI1B_SCLK__SIM_M_HADDR_11 {
3038		pinmux = <0x420e01b4 7 0x420e0000 0 0x420e04fc>;
3039	};
3040	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss0_b__qspi1_b_ss0_b: MX6SX_PAD_QSPI1B_SS0_B__QSPI1_B_SS0_B {
3041		pinmux = <0x420e01b8 0 0x420e0000 0 0x420e0500>;
3042	};
3043	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss0_b__uart3_dce_tx: MX6SX_PAD_QSPI1B_SS0_B__UART3_DCE_TX {
3044		pinmux = <0x420e01b8 1 0x420e0000 0 0x420e0500>;
3045	};
3046	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss0_b__uart3_dte_rx: MX6SX_PAD_QSPI1B_SS0_B__UART3_DTE_RX {
3047		pinmux = <0x420e01b8 1 0x420e0840 5 0x420e0500>;
3048	};
3049	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss0_b__ecspi3_ss0: MX6SX_PAD_QSPI1B_SS0_B__ECSPI3_SS0 {
3050		pinmux = <0x420e01b8 2 0x420e073c 1 0x420e0500>;
3051	};
3052	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss0_b__esai_tx_hf_clk: MX6SX_PAD_QSPI1B_SS0_B__ESAI_TX_HF_CLK {
3053		pinmux = <0x420e01b8 3 0x420e0784 3 0x420e0500>;
3054	};
3055	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss0_b__csi1_data_17: MX6SX_PAD_QSPI1B_SS0_B__CSI1_DATA_17 {
3056		pinmux = <0x420e01b8 4 0x420e06e0 1 0x420e0500>;
3057	};
3058	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss0_b__gpio4_io_30: MX6SX_PAD_QSPI1B_SS0_B__GPIO4_IO_30 {
3059		pinmux = <0x420e01b8 5 0x420e0000 0 0x420e0500>;
3060	};
3061	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss0_b__weim_data_9: MX6SX_PAD_QSPI1B_SS0_B__WEIM_DATA_9 {
3062		pinmux = <0x420e01b8 6 0x420e0000 0 0x420e0500>;
3063	};
3064	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss0_b__sim_m_haddr_10: MX6SX_PAD_QSPI1B_SS0_B__SIM_M_HADDR_10 {
3065		pinmux = <0x420e01b8 7 0x420e0000 0 0x420e0500>;
3066	};
3067	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss1_b__qspi1_b_ss1_b: MX6SX_PAD_QSPI1B_SS1_B__QSPI1_B_SS1_B {
3068		pinmux = <0x420e01bc 0 0x420e0000 0 0x420e0504>;
3069	};
3070	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss1_b__can2_rx: MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX {
3071		pinmux = <0x420e01bc 1 0x420e0690 2 0x420e0504>;
3072	};
3073	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss1_b__canfd_rx2: MX6SX_PAD_QSPI1B_SS1_B__CANFD_RX2 {
3074		pinmux = <0x420e01bc 2 0x420e0698 2 0x420e0504>;
3075	};
3076	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss1_b__ecspi5_sclk: MX6SX_PAD_QSPI1B_SS1_B__ECSPI5_SCLK {
3077		pinmux = <0x420e01bc 3 0x420e0750 1 0x420e0504>;
3078	};
3079	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss1_b__csi1_data_18: MX6SX_PAD_QSPI1B_SS1_B__CSI1_DATA_18 {
3080		pinmux = <0x420e01bc 4 0x420e06e4 1 0x420e0504>;
3081	};
3082	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss1_b__gpio4_io_31: MX6SX_PAD_QSPI1B_SS1_B__GPIO4_IO_31 {
3083		pinmux = <0x420e01bc 5 0x420e0000 0 0x420e0504>;
3084	};
3085	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss1_b__weim_data_10: MX6SX_PAD_QSPI1B_SS1_B__WEIM_DATA_10 {
3086		pinmux = <0x420e01bc 6 0x420e0000 0 0x420e0504>;
3087	};
3088	/omit-if-no-ref/ mx6sx_pad_qspi1b_ss1_b__sim_m_haddr_14: MX6SX_PAD_QSPI1B_SS1_B__SIM_M_HADDR_14 {
3089		pinmux = <0x420e01bc 7 0x420e0000 0 0x420e0504>;
3090	};
3091	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd0__enet1_rx_data_0: MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 {
3092		pinmux = <0x420e01c0 0 0x420e0000 0 0x420e0508>;
3093	};
3094	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd0__gpio5_io_0: MX6SX_PAD_RGMII1_RD0__GPIO5_IO_0 {
3095		pinmux = <0x420e01c0 5 0x420e0000 0 0x420e0508>;
3096	};
3097	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd0__csi2_data_10: MX6SX_PAD_RGMII1_RD0__CSI2_DATA_10 {
3098		pinmux = <0x420e01c0 6 0x420e0000 0 0x420e0508>;
3099	};
3100	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd0__anatop_testi_0: MX6SX_PAD_RGMII1_RD0__ANATOP_TESTI_0 {
3101		pinmux = <0x420e01c0 7 0x420e0000 0 0x420e0508>;
3102	};
3103	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd0__rawnand_tester_trigger: MX6SX_PAD_RGMII1_RD0__RAWNAND_TESTER_TRIGGER {
3104		pinmux = <0x420e01c0 8 0x420e0000 0 0x420e0508>;
3105	};
3106	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd0__pcie_ctrl_debug_0: MX6SX_PAD_RGMII1_RD0__PCIE_CTRL_DEBUG_0 {
3107		pinmux = <0x420e01c0 9 0x420e0000 0 0x420e0508>;
3108	};
3109	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd1__enet1_rx_data_1: MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 {
3110		pinmux = <0x420e01c4 0 0x420e0000 0 0x420e050c>;
3111	};
3112	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd1__gpio5_io_1: MX6SX_PAD_RGMII1_RD1__GPIO5_IO_1 {
3113		pinmux = <0x420e01c4 5 0x420e0000 0 0x420e050c>;
3114	};
3115	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd1__csi2_data_11: MX6SX_PAD_RGMII1_RD1__CSI2_DATA_11 {
3116		pinmux = <0x420e01c4 6 0x420e0000 0 0x420e050c>;
3117	};
3118	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd1__anatop_testi_1: MX6SX_PAD_RGMII1_RD1__ANATOP_TESTI_1 {
3119		pinmux = <0x420e01c4 7 0x420e0000 0 0x420e050c>;
3120	};
3121	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd1__usdhc1_tester_trigger: MX6SX_PAD_RGMII1_RD1__USDHC1_TESTER_TRIGGER {
3122		pinmux = <0x420e01c4 8 0x420e0000 0 0x420e050c>;
3123	};
3124	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd1__pcie_ctrl_debug_1: MX6SX_PAD_RGMII1_RD1__PCIE_CTRL_DEBUG_1 {
3125		pinmux = <0x420e01c4 9 0x420e0000 0 0x420e050c>;
3126	};
3127	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd2__enet1_rx_data_2: MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 {
3128		pinmux = <0x420e01c8 0 0x420e0000 0 0x420e0510>;
3129	};
3130	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd2__gpio5_io_2: MX6SX_PAD_RGMII1_RD2__GPIO5_IO_2 {
3131		pinmux = <0x420e01c8 5 0x420e0000 0 0x420e0510>;
3132	};
3133	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd2__csi2_data_12: MX6SX_PAD_RGMII1_RD2__CSI2_DATA_12 {
3134		pinmux = <0x420e01c8 6 0x420e0000 0 0x420e0510>;
3135	};
3136	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd2__anatop_testi_2: MX6SX_PAD_RGMII1_RD2__ANATOP_TESTI_2 {
3137		pinmux = <0x420e01c8 7 0x420e0000 0 0x420e0510>;
3138	};
3139	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd2__usdhc2_tester_trigger: MX6SX_PAD_RGMII1_RD2__USDHC2_TESTER_TRIGGER {
3140		pinmux = <0x420e01c8 8 0x420e0000 0 0x420e0510>;
3141	};
3142	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd2__pcie_ctrl_debug_2: MX6SX_PAD_RGMII1_RD2__PCIE_CTRL_DEBUG_2 {
3143		pinmux = <0x420e01c8 9 0x420e0000 0 0x420e0510>;
3144	};
3145	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd3__enet1_rx_data_3: MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 {
3146		pinmux = <0x420e01cc 0 0x420e0000 0 0x420e0514>;
3147	};
3148	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd3__gpio5_io_3: MX6SX_PAD_RGMII1_RD3__GPIO5_IO_3 {
3149		pinmux = <0x420e01cc 5 0x420e0000 0 0x420e0514>;
3150	};
3151	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd3__csi2_data_13: MX6SX_PAD_RGMII1_RD3__CSI2_DATA_13 {
3152		pinmux = <0x420e01cc 6 0x420e0000 0 0x420e0514>;
3153	};
3154	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd3__anatop_testi_3: MX6SX_PAD_RGMII1_RD3__ANATOP_TESTI_3 {
3155		pinmux = <0x420e01cc 7 0x420e0000 0 0x420e0514>;
3156	};
3157	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd3__usdhc3_tester_trigger: MX6SX_PAD_RGMII1_RD3__USDHC3_TESTER_TRIGGER {
3158		pinmux = <0x420e01cc 8 0x420e0000 0 0x420e0514>;
3159	};
3160	/omit-if-no-ref/ mx6sx_pad_rgmii1_rd3__pcie_ctrl_debug_3: MX6SX_PAD_RGMII1_RD3__PCIE_CTRL_DEBUG_3 {
3161		pinmux = <0x420e01cc 9 0x420e0000 0 0x420e0514>;
3162	};
3163	/omit-if-no-ref/ mx6sx_pad_rgmii1_rx_ctl__enet1_rx_en: MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN {
3164		pinmux = <0x420e01d0 0 0x420e0000 0 0x420e0518>;
3165	};
3166	/omit-if-no-ref/ mx6sx_pad_rgmii1_rx_ctl__gpio5_io_4: MX6SX_PAD_RGMII1_RX_CTL__GPIO5_IO_4 {
3167		pinmux = <0x420e01d0 5 0x420e0000 0 0x420e0518>;
3168	};
3169	/omit-if-no-ref/ mx6sx_pad_rgmii1_rx_ctl__csi2_data_14: MX6SX_PAD_RGMII1_RX_CTL__CSI2_DATA_14 {
3170		pinmux = <0x420e01d0 6 0x420e0000 0 0x420e0518>;
3171	};
3172	/omit-if-no-ref/ mx6sx_pad_rgmii1_rx_ctl__anatop_testo_0: MX6SX_PAD_RGMII1_RX_CTL__ANATOP_TESTO_0 {
3173		pinmux = <0x420e01d0 7 0x420e0000 0 0x420e0518>;
3174	};
3175	/omit-if-no-ref/ mx6sx_pad_rgmii1_rx_ctl__usdhc4_tester_trigger: MX6SX_PAD_RGMII1_RX_CTL__USDHC4_TESTER_TRIGGER {
3176		pinmux = <0x420e01d0 8 0x420e0000 0 0x420e0518>;
3177	};
3178	/omit-if-no-ref/ mx6sx_pad_rgmii1_rx_ctl__pcie_ctrl_debug_4: MX6SX_PAD_RGMII1_RX_CTL__PCIE_CTRL_DEBUG_4 {
3179		pinmux = <0x420e01d0 9 0x420e0000 0 0x420e0518>;
3180	};
3181	/omit-if-no-ref/ mx6sx_pad_rgmii1_rxc__enet1_rx_clk: MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK {
3182		pinmux = <0x420e01d4 0 0x420e0768 1 0x420e051c>;
3183	};
3184	/omit-if-no-ref/ mx6sx_pad_rgmii1_rxc__enet1_rx_er: MX6SX_PAD_RGMII1_RXC__ENET1_RX_ER {
3185		pinmux = <0x420e01d4 1 0x420e0000 0 0x420e051c>;
3186	};
3187	/omit-if-no-ref/ mx6sx_pad_rgmii1_rxc__gpio5_io_5: MX6SX_PAD_RGMII1_RXC__GPIO5_IO_5 {
3188		pinmux = <0x420e01d4 5 0x420e0000 0 0x420e051c>;
3189	};
3190	/omit-if-no-ref/ mx6sx_pad_rgmii1_rxc__csi2_data_15: MX6SX_PAD_RGMII1_RXC__CSI2_DATA_15 {
3191		pinmux = <0x420e01d4 6 0x420e0000 0 0x420e051c>;
3192	};
3193	/omit-if-no-ref/ mx6sx_pad_rgmii1_rxc__anatop_testo_1: MX6SX_PAD_RGMII1_RXC__ANATOP_TESTO_1 {
3194		pinmux = <0x420e01d4 7 0x420e0000 0 0x420e051c>;
3195	};
3196	/omit-if-no-ref/ mx6sx_pad_rgmii1_rxc__ecspi1_tester_trigger: MX6SX_PAD_RGMII1_RXC__ECSPI1_TESTER_TRIGGER {
3197		pinmux = <0x420e01d4 8 0x420e0000 0 0x420e051c>;
3198	};
3199	/omit-if-no-ref/ mx6sx_pad_rgmii1_rxc__pcie_ctrl_debug_5: MX6SX_PAD_RGMII1_RXC__PCIE_CTRL_DEBUG_5 {
3200		pinmux = <0x420e01d4 9 0x420e0000 0 0x420e051c>;
3201	};
3202	/omit-if-no-ref/ mx6sx_pad_rgmii1_td0__enet1_tx_data_0: MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 {
3203		pinmux = <0x420e01d8 0 0x420e0000 0 0x420e0520>;
3204	};
3205	/omit-if-no-ref/ mx6sx_pad_rgmii1_td0__sai2_rx_sync: MX6SX_PAD_RGMII1_TD0__SAI2_RX_SYNC {
3206		pinmux = <0x420e01d8 2 0x420e0810 1 0x420e0520>;
3207	};
3208	/omit-if-no-ref/ mx6sx_pad_rgmii1_td0__gpio5_io_6: MX6SX_PAD_RGMII1_TD0__GPIO5_IO_6 {
3209		pinmux = <0x420e01d8 5 0x420e0000 0 0x420e0520>;
3210	};
3211	/omit-if-no-ref/ mx6sx_pad_rgmii1_td0__csi2_data_16: MX6SX_PAD_RGMII1_TD0__CSI2_DATA_16 {
3212		pinmux = <0x420e01d8 6 0x420e0000 0 0x420e0520>;
3213	};
3214	/omit-if-no-ref/ mx6sx_pad_rgmii1_td0__anatop_testo_2: MX6SX_PAD_RGMII1_TD0__ANATOP_TESTO_2 {
3215		pinmux = <0x420e01d8 7 0x420e0000 0 0x420e0520>;
3216	};
3217	/omit-if-no-ref/ mx6sx_pad_rgmii1_td0__ecspi2_tester_trigger: MX6SX_PAD_RGMII1_TD0__ECSPI2_TESTER_TRIGGER {
3218		pinmux = <0x420e01d8 8 0x420e0000 0 0x420e0520>;
3219	};
3220	/omit-if-no-ref/ mx6sx_pad_rgmii1_td0__pcie_ctrl_debug_6: MX6SX_PAD_RGMII1_TD0__PCIE_CTRL_DEBUG_6 {
3221		pinmux = <0x420e01d8 9 0x420e0000 0 0x420e0520>;
3222	};
3223	/omit-if-no-ref/ mx6sx_pad_rgmii1_td1__enet1_tx_data_1: MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 {
3224		pinmux = <0x420e01dc 0 0x420e0000 0 0x420e0524>;
3225	};
3226	/omit-if-no-ref/ mx6sx_pad_rgmii1_td1__sai2_rx_bclk: MX6SX_PAD_RGMII1_TD1__SAI2_RX_BCLK {
3227		pinmux = <0x420e01dc 2 0x420e0808 1 0x420e0524>;
3228	};
3229	/omit-if-no-ref/ mx6sx_pad_rgmii1_td1__gpio5_io_7: MX6SX_PAD_RGMII1_TD1__GPIO5_IO_7 {
3230		pinmux = <0x420e01dc 5 0x420e0000 0 0x420e0524>;
3231	};
3232	/omit-if-no-ref/ mx6sx_pad_rgmii1_td1__csi2_data_17: MX6SX_PAD_RGMII1_TD1__CSI2_DATA_17 {
3233		pinmux = <0x420e01dc 6 0x420e0000 0 0x420e0524>;
3234	};
3235	/omit-if-no-ref/ mx6sx_pad_rgmii1_td1__anatop_testo_3: MX6SX_PAD_RGMII1_TD1__ANATOP_TESTO_3 {
3236		pinmux = <0x420e01dc 7 0x420e0000 0 0x420e0524>;
3237	};
3238	/omit-if-no-ref/ mx6sx_pad_rgmii1_td1__ecspi3_tester_trigger: MX6SX_PAD_RGMII1_TD1__ECSPI3_TESTER_TRIGGER {
3239		pinmux = <0x420e01dc 8 0x420e0000 0 0x420e0524>;
3240	};
3241	/omit-if-no-ref/ mx6sx_pad_rgmii1_td1__pcie_ctrl_debug_7: MX6SX_PAD_RGMII1_TD1__PCIE_CTRL_DEBUG_7 {
3242		pinmux = <0x420e01dc 9 0x420e0000 0 0x420e0524>;
3243	};
3244	/omit-if-no-ref/ mx6sx_pad_rgmii1_td2__enet1_tx_data_2: MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 {
3245		pinmux = <0x420e01e0 0 0x420e0000 0 0x420e0528>;
3246	};
3247	/omit-if-no-ref/ mx6sx_pad_rgmii1_td2__sai2_tx_sync: MX6SX_PAD_RGMII1_TD2__SAI2_TX_SYNC {
3248		pinmux = <0x420e01e0 2 0x420e0818 1 0x420e0528>;
3249	};
3250	/omit-if-no-ref/ mx6sx_pad_rgmii1_td2__gpio5_io_8: MX6SX_PAD_RGMII1_TD2__GPIO5_IO_8 {
3251		pinmux = <0x420e01e0 5 0x420e0000 0 0x420e0528>;
3252	};
3253	/omit-if-no-ref/ mx6sx_pad_rgmii1_td2__csi2_data_18: MX6SX_PAD_RGMII1_TD2__CSI2_DATA_18 {
3254		pinmux = <0x420e01e0 6 0x420e0000 0 0x420e0528>;
3255	};
3256	/omit-if-no-ref/ mx6sx_pad_rgmii1_td2__anatop_testo_4: MX6SX_PAD_RGMII1_TD2__ANATOP_TESTO_4 {
3257		pinmux = <0x420e01e0 7 0x420e0000 0 0x420e0528>;
3258	};
3259	/omit-if-no-ref/ mx6sx_pad_rgmii1_td2__ecspi4_tester_trigger: MX6SX_PAD_RGMII1_TD2__ECSPI4_TESTER_TRIGGER {
3260		pinmux = <0x420e01e0 8 0x420e0000 0 0x420e0528>;
3261	};
3262	/omit-if-no-ref/ mx6sx_pad_rgmii1_td2__pcie_ctrl_debug_8: MX6SX_PAD_RGMII1_TD2__PCIE_CTRL_DEBUG_8 {
3263		pinmux = <0x420e01e0 9 0x420e0000 0 0x420e0528>;
3264	};
3265	/omit-if-no-ref/ mx6sx_pad_rgmii1_td3__enet1_tx_data_3: MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 {
3266		pinmux = <0x420e01e4 0 0x420e0000 0 0x420e052c>;
3267	};
3268	/omit-if-no-ref/ mx6sx_pad_rgmii1_td3__sai2_tx_bclk: MX6SX_PAD_RGMII1_TD3__SAI2_TX_BCLK {
3269		pinmux = <0x420e01e4 2 0x420e0814 1 0x420e052c>;
3270	};
3271	/omit-if-no-ref/ mx6sx_pad_rgmii1_td3__gpio5_io_9: MX6SX_PAD_RGMII1_TD3__GPIO5_IO_9 {
3272		pinmux = <0x420e01e4 5 0x420e0000 0 0x420e052c>;
3273	};
3274	/omit-if-no-ref/ mx6sx_pad_rgmii1_td3__csi2_data_19: MX6SX_PAD_RGMII1_TD3__CSI2_DATA_19 {
3275		pinmux = <0x420e01e4 6 0x420e0000 0 0x420e052c>;
3276	};
3277	/omit-if-no-ref/ mx6sx_pad_rgmii1_td3__anatop_testo_5: MX6SX_PAD_RGMII1_TD3__ANATOP_TESTO_5 {
3278		pinmux = <0x420e01e4 7 0x420e0000 0 0x420e052c>;
3279	};
3280	/omit-if-no-ref/ mx6sx_pad_rgmii1_td3__ecspi5_tester_trigger: MX6SX_PAD_RGMII1_TD3__ECSPI5_TESTER_TRIGGER {
3281		pinmux = <0x420e01e4 8 0x420e0000 0 0x420e052c>;
3282	};
3283	/omit-if-no-ref/ mx6sx_pad_rgmii1_td3__pcie_ctrl_debug_9: MX6SX_PAD_RGMII1_TD3__PCIE_CTRL_DEBUG_9 {
3284		pinmux = <0x420e01e4 9 0x420e0000 0 0x420e052c>;
3285	};
3286	/omit-if-no-ref/ mx6sx_pad_rgmii1_tx_ctl__enet1_tx_en: MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN {
3287		pinmux = <0x420e01e8 0 0x420e0000 0 0x420e0530>;
3288	};
3289	/omit-if-no-ref/ mx6sx_pad_rgmii1_tx_ctl__sai2_rx_data_0: MX6SX_PAD_RGMII1_TX_CTL__SAI2_RX_DATA_0 {
3290		pinmux = <0x420e01e8 2 0x420e080c 1 0x420e0530>;
3291	};
3292	/omit-if-no-ref/ mx6sx_pad_rgmii1_tx_ctl__gpio5_io_10: MX6SX_PAD_RGMII1_TX_CTL__GPIO5_IO_10 {
3293		pinmux = <0x420e01e8 5 0x420e0000 0 0x420e0530>;
3294	};
3295	/omit-if-no-ref/ mx6sx_pad_rgmii1_tx_ctl__csi2_data_0: MX6SX_PAD_RGMII1_TX_CTL__CSI2_DATA_0 {
3296		pinmux = <0x420e01e8 6 0x420e0000 0 0x420e0530>;
3297	};
3298	/omit-if-no-ref/ mx6sx_pad_rgmii1_tx_ctl__anatop_testo_6: MX6SX_PAD_RGMII1_TX_CTL__ANATOP_TESTO_6 {
3299		pinmux = <0x420e01e8 7 0x420e0000 0 0x420e0530>;
3300	};
3301	/omit-if-no-ref/ mx6sx_pad_rgmii1_tx_ctl__qspi1_tester_trigger: MX6SX_PAD_RGMII1_TX_CTL__QSPI1_TESTER_TRIGGER {
3302		pinmux = <0x420e01e8 8 0x420e0000 0 0x420e0530>;
3303	};
3304	/omit-if-no-ref/ mx6sx_pad_rgmii1_tx_ctl__pcie_ctrl_debug_10: MX6SX_PAD_RGMII1_TX_CTL__PCIE_CTRL_DEBUG_10 {
3305		pinmux = <0x420e01e8 9 0x420e0000 0 0x420e0530>;
3306	};
3307	/omit-if-no-ref/ mx6sx_pad_rgmii1_txc__enet1_rgmii_txc: MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC {
3308		pinmux = <0x420e01ec 0 0x420e0000 0 0x420e0534>;
3309	};
3310	/omit-if-no-ref/ mx6sx_pad_rgmii1_txc__enet1_tx_er: MX6SX_PAD_RGMII1_TXC__ENET1_TX_ER {
3311		pinmux = <0x420e01ec 1 0x420e0000 0 0x420e0534>;
3312	};
3313	/omit-if-no-ref/ mx6sx_pad_rgmii1_txc__sai2_tx_data_0: MX6SX_PAD_RGMII1_TXC__SAI2_TX_DATA_0 {
3314		pinmux = <0x420e01ec 2 0x420e0000 0 0x420e0534>;
3315	};
3316	/omit-if-no-ref/ mx6sx_pad_rgmii1_txc__gpio5_io_11: MX6SX_PAD_RGMII1_TXC__GPIO5_IO_11 {
3317		pinmux = <0x420e01ec 5 0x420e0000 0 0x420e0534>;
3318	};
3319	/omit-if-no-ref/ mx6sx_pad_rgmii1_txc__csi2_data_1: MX6SX_PAD_RGMII1_TXC__CSI2_DATA_1 {
3320		pinmux = <0x420e01ec 6 0x420e0000 0 0x420e0534>;
3321	};
3322	/omit-if-no-ref/ mx6sx_pad_rgmii1_txc__anatop_testo_7: MX6SX_PAD_RGMII1_TXC__ANATOP_TESTO_7 {
3323		pinmux = <0x420e01ec 7 0x420e0000 0 0x420e0534>;
3324	};
3325	/omit-if-no-ref/ mx6sx_pad_rgmii1_txc__qspi2_tester_trigger: MX6SX_PAD_RGMII1_TXC__QSPI2_TESTER_TRIGGER {
3326		pinmux = <0x420e01ec 8 0x420e0000 0 0x420e0534>;
3327	};
3328	/omit-if-no-ref/ mx6sx_pad_rgmii1_txc__pcie_ctrl_debug_11: MX6SX_PAD_RGMII1_TXC__PCIE_CTRL_DEBUG_11 {
3329		pinmux = <0x420e01ec 9 0x420e0000 0 0x420e0534>;
3330	};
3331	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd0__enet2_rx_data_0: MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 {
3332		pinmux = <0x420e01f0 0 0x420e0000 0 0x420e0538>;
3333	};
3334	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd0__pwm4_out: MX6SX_PAD_RGMII2_RD0__PWM4_OUT {
3335		pinmux = <0x420e01f0 2 0x420e0000 0 0x420e0538>;
3336	};
3337	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd0__gpio5_io_12: MX6SX_PAD_RGMII2_RD0__GPIO5_IO_12 {
3338		pinmux = <0x420e01f0 5 0x420e0000 0 0x420e0538>;
3339	};
3340	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd0__csi2_data_2: MX6SX_PAD_RGMII2_RD0__CSI2_DATA_2 {
3341		pinmux = <0x420e01f0 6 0x420e0000 0 0x420e0538>;
3342	};
3343	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd0__anatop_testo_8: MX6SX_PAD_RGMII2_RD0__ANATOP_TESTO_8 {
3344		pinmux = <0x420e01f0 7 0x420e0000 0 0x420e0538>;
3345	};
3346	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd0__vdec_debug_18: MX6SX_PAD_RGMII2_RD0__VDEC_DEBUG_18 {
3347		pinmux = <0x420e01f0 8 0x420e0000 0 0x420e0538>;
3348	};
3349	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd0__pcie_ctrl_debug_12: MX6SX_PAD_RGMII2_RD0__PCIE_CTRL_DEBUG_12 {
3350		pinmux = <0x420e01f0 9 0x420e0000 0 0x420e0538>;
3351	};
3352	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd1__enet2_rx_data_1: MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 {
3353		pinmux = <0x420e01f4 0 0x420e0000 0 0x420e053c>;
3354	};
3355	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd1__pwm3_out: MX6SX_PAD_RGMII2_RD1__PWM3_OUT {
3356		pinmux = <0x420e01f4 2 0x420e0000 0 0x420e053c>;
3357	};
3358	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd1__gpio5_io_13: MX6SX_PAD_RGMII2_RD1__GPIO5_IO_13 {
3359		pinmux = <0x420e01f4 5 0x420e0000 0 0x420e053c>;
3360	};
3361	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd1__csi2_data_3: MX6SX_PAD_RGMII2_RD1__CSI2_DATA_3 {
3362		pinmux = <0x420e01f4 6 0x420e0000 0 0x420e053c>;
3363	};
3364	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd1__anatop_testo_9: MX6SX_PAD_RGMII2_RD1__ANATOP_TESTO_9 {
3365		pinmux = <0x420e01f4 7 0x420e0000 0 0x420e053c>;
3366	};
3367	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd1__vdec_debug_19: MX6SX_PAD_RGMII2_RD1__VDEC_DEBUG_19 {
3368		pinmux = <0x420e01f4 8 0x420e0000 0 0x420e053c>;
3369	};
3370	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd1__pcie_ctrl_debug_13: MX6SX_PAD_RGMII2_RD1__PCIE_CTRL_DEBUG_13 {
3371		pinmux = <0x420e01f4 9 0x420e0000 0 0x420e053c>;
3372	};
3373	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd2__enet2_rx_data_2: MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 {
3374		pinmux = <0x420e01f8 0 0x420e0000 0 0x420e0540>;
3375	};
3376	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd2__pwm2_out: MX6SX_PAD_RGMII2_RD2__PWM2_OUT {
3377		pinmux = <0x420e01f8 2 0x420e0000 0 0x420e0540>;
3378	};
3379	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd2__gpio5_io_14: MX6SX_PAD_RGMII2_RD2__GPIO5_IO_14 {
3380		pinmux = <0x420e01f8 5 0x420e0000 0 0x420e0540>;
3381	};
3382	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd2__csi2_data_4: MX6SX_PAD_RGMII2_RD2__CSI2_DATA_4 {
3383		pinmux = <0x420e01f8 6 0x420e0000 0 0x420e0540>;
3384	};
3385	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd2__anatop_testo_10: MX6SX_PAD_RGMII2_RD2__ANATOP_TESTO_10 {
3386		pinmux = <0x420e01f8 7 0x420e0000 0 0x420e0540>;
3387	};
3388	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd2__vdec_debug_20: MX6SX_PAD_RGMII2_RD2__VDEC_DEBUG_20 {
3389		pinmux = <0x420e01f8 8 0x420e0000 0 0x420e0540>;
3390	};
3391	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd2__pcie_ctrl_debug_14: MX6SX_PAD_RGMII2_RD2__PCIE_CTRL_DEBUG_14 {
3392		pinmux = <0x420e01f8 9 0x420e0000 0 0x420e0540>;
3393	};
3394	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd3__enet2_rx_data_3: MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 {
3395		pinmux = <0x420e01fc 0 0x420e0000 0 0x420e0544>;
3396	};
3397	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd3__pwm1_out: MX6SX_PAD_RGMII2_RD3__PWM1_OUT {
3398		pinmux = <0x420e01fc 2 0x420e0000 0 0x420e0544>;
3399	};
3400	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd3__gpio5_io_15: MX6SX_PAD_RGMII2_RD3__GPIO5_IO_15 {
3401		pinmux = <0x420e01fc 5 0x420e0000 0 0x420e0544>;
3402	};
3403	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd3__csi2_data_5: MX6SX_PAD_RGMII2_RD3__CSI2_DATA_5 {
3404		pinmux = <0x420e01fc 6 0x420e0000 0 0x420e0544>;
3405	};
3406	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd3__anatop_testo_11: MX6SX_PAD_RGMII2_RD3__ANATOP_TESTO_11 {
3407		pinmux = <0x420e01fc 7 0x420e0000 0 0x420e0544>;
3408	};
3409	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd3__vdec_debug_21: MX6SX_PAD_RGMII2_RD3__VDEC_DEBUG_21 {
3410		pinmux = <0x420e01fc 8 0x420e0000 0 0x420e0544>;
3411	};
3412	/omit-if-no-ref/ mx6sx_pad_rgmii2_rd3__pcie_ctrl_debug_15: MX6SX_PAD_RGMII2_RD3__PCIE_CTRL_DEBUG_15 {
3413		pinmux = <0x420e01fc 9 0x420e0000 0 0x420e0544>;
3414	};
3415	/omit-if-no-ref/ mx6sx_pad_rgmii2_rx_ctl__enet2_rx_en: MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN {
3416		pinmux = <0x420e0200 0 0x420e0000 0 0x420e0548>;
3417	};
3418	/omit-if-no-ref/ mx6sx_pad_rgmii2_rx_ctl__gpio5_io_16: MX6SX_PAD_RGMII2_RX_CTL__GPIO5_IO_16 {
3419		pinmux = <0x420e0200 5 0x420e0000 0 0x420e0548>;
3420	};
3421	/omit-if-no-ref/ mx6sx_pad_rgmii2_rx_ctl__csi2_data_6: MX6SX_PAD_RGMII2_RX_CTL__CSI2_DATA_6 {
3422		pinmux = <0x420e0200 6 0x420e0000 0 0x420e0548>;
3423	};
3424	/omit-if-no-ref/ mx6sx_pad_rgmii2_rx_ctl__anatop_testo_12: MX6SX_PAD_RGMII2_RX_CTL__ANATOP_TESTO_12 {
3425		pinmux = <0x420e0200 7 0x420e0000 0 0x420e0548>;
3426	};
3427	/omit-if-no-ref/ mx6sx_pad_rgmii2_rx_ctl__vdec_debug_22: MX6SX_PAD_RGMII2_RX_CTL__VDEC_DEBUG_22 {
3428		pinmux = <0x420e0200 8 0x420e0000 0 0x420e0548>;
3429	};
3430	/omit-if-no-ref/ mx6sx_pad_rgmii2_rx_ctl__pcie_ctrl_debug_16: MX6SX_PAD_RGMII2_RX_CTL__PCIE_CTRL_DEBUG_16 {
3431		pinmux = <0x420e0200 9 0x420e0000 0 0x420e0548>;
3432	};
3433	/omit-if-no-ref/ mx6sx_pad_rgmii2_rxc__enet2_rx_clk: MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK {
3434		pinmux = <0x420e0204 0 0x420e0774 1 0x420e054c>;
3435	};
3436	/omit-if-no-ref/ mx6sx_pad_rgmii2_rxc__enet2_rx_er: MX6SX_PAD_RGMII2_RXC__ENET2_RX_ER {
3437		pinmux = <0x420e0204 1 0x420e0000 0 0x420e054c>;
3438	};
3439	/omit-if-no-ref/ mx6sx_pad_rgmii2_rxc__gpio5_io_17: MX6SX_PAD_RGMII2_RXC__GPIO5_IO_17 {
3440		pinmux = <0x420e0204 5 0x420e0000 0 0x420e054c>;
3441	};
3442	/omit-if-no-ref/ mx6sx_pad_rgmii2_rxc__csi2_data_7: MX6SX_PAD_RGMII2_RXC__CSI2_DATA_7 {
3443		pinmux = <0x420e0204 6 0x420e0000 0 0x420e054c>;
3444	};
3445	/omit-if-no-ref/ mx6sx_pad_rgmii2_rxc__anatop_testo_13: MX6SX_PAD_RGMII2_RXC__ANATOP_TESTO_13 {
3446		pinmux = <0x420e0204 7 0x420e0000 0 0x420e054c>;
3447	};
3448	/omit-if-no-ref/ mx6sx_pad_rgmii2_rxc__vdec_debug_23: MX6SX_PAD_RGMII2_RXC__VDEC_DEBUG_23 {
3449		pinmux = <0x420e0204 8 0x420e0000 0 0x420e054c>;
3450	};
3451	/omit-if-no-ref/ mx6sx_pad_rgmii2_rxc__pcie_ctrl_debug_17: MX6SX_PAD_RGMII2_RXC__PCIE_CTRL_DEBUG_17 {
3452		pinmux = <0x420e0204 9 0x420e0000 0 0x420e054c>;
3453	};
3454	/omit-if-no-ref/ mx6sx_pad_rgmii2_td0__enet2_tx_data_0: MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 {
3455		pinmux = <0x420e0208 0 0x420e0000 0 0x420e0550>;
3456	};
3457	/omit-if-no-ref/ mx6sx_pad_rgmii2_td0__sai1_rx_sync: MX6SX_PAD_RGMII2_TD0__SAI1_RX_SYNC {
3458		pinmux = <0x420e0208 2 0x420e07fc 1 0x420e0550>;
3459	};
3460	/omit-if-no-ref/ mx6sx_pad_rgmii2_td0__pwm8_out: MX6SX_PAD_RGMII2_TD0__PWM8_OUT {
3461		pinmux = <0x420e0208 3 0x420e0000 0 0x420e0550>;
3462	};
3463	/omit-if-no-ref/ mx6sx_pad_rgmii2_td0__gpio5_io_18: MX6SX_PAD_RGMII2_TD0__GPIO5_IO_18 {
3464		pinmux = <0x420e0208 5 0x420e0000 0 0x420e0550>;
3465	};
3466	/omit-if-no-ref/ mx6sx_pad_rgmii2_td0__csi2_data_8: MX6SX_PAD_RGMII2_TD0__CSI2_DATA_8 {
3467		pinmux = <0x420e0208 6 0x420e0000 0 0x420e0550>;
3468	};
3469	/omit-if-no-ref/ mx6sx_pad_rgmii2_td0__anatop_testo_14: MX6SX_PAD_RGMII2_TD0__ANATOP_TESTO_14 {
3470		pinmux = <0x420e0208 7 0x420e0000 0 0x420e0550>;
3471	};
3472	/omit-if-no-ref/ mx6sx_pad_rgmii2_td0__vdec_debug_24: MX6SX_PAD_RGMII2_TD0__VDEC_DEBUG_24 {
3473		pinmux = <0x420e0208 8 0x420e0000 0 0x420e0550>;
3474	};
3475	/omit-if-no-ref/ mx6sx_pad_rgmii2_td0__pcie_ctrl_debug_18: MX6SX_PAD_RGMII2_TD0__PCIE_CTRL_DEBUG_18 {
3476		pinmux = <0x420e0208 9 0x420e0000 0 0x420e0550>;
3477	};
3478	/omit-if-no-ref/ mx6sx_pad_rgmii2_td1__enet2_tx_data_1: MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 {
3479		pinmux = <0x420e020c 0 0x420e0000 0 0x420e0554>;
3480	};
3481	/omit-if-no-ref/ mx6sx_pad_rgmii2_td1__sai1_rx_bclk: MX6SX_PAD_RGMII2_TD1__SAI1_RX_BCLK {
3482		pinmux = <0x420e020c 2 0x420e07f4 1 0x420e0554>;
3483	};
3484	/omit-if-no-ref/ mx6sx_pad_rgmii2_td1__pwm7_out: MX6SX_PAD_RGMII2_TD1__PWM7_OUT {
3485		pinmux = <0x420e020c 3 0x420e0000 0 0x420e0554>;
3486	};
3487	/omit-if-no-ref/ mx6sx_pad_rgmii2_td1__gpio5_io_19: MX6SX_PAD_RGMII2_TD1__GPIO5_IO_19 {
3488		pinmux = <0x420e020c 5 0x420e0000 0 0x420e0554>;
3489	};
3490	/omit-if-no-ref/ mx6sx_pad_rgmii2_td1__csi2_data_9: MX6SX_PAD_RGMII2_TD1__CSI2_DATA_9 {
3491		pinmux = <0x420e020c 6 0x420e0000 0 0x420e0554>;
3492	};
3493	/omit-if-no-ref/ mx6sx_pad_rgmii2_td1__anatop_testo_15: MX6SX_PAD_RGMII2_TD1__ANATOP_TESTO_15 {
3494		pinmux = <0x420e020c 7 0x420e0000 0 0x420e0554>;
3495	};
3496	/omit-if-no-ref/ mx6sx_pad_rgmii2_td1__vdec_debug_25: MX6SX_PAD_RGMII2_TD1__VDEC_DEBUG_25 {
3497		pinmux = <0x420e020c 8 0x420e0000 0 0x420e0554>;
3498	};
3499	/omit-if-no-ref/ mx6sx_pad_rgmii2_td1__pcie_ctrl_debug_19: MX6SX_PAD_RGMII2_TD1__PCIE_CTRL_DEBUG_19 {
3500		pinmux = <0x420e020c 9 0x420e0000 0 0x420e0554>;
3501	};
3502	/omit-if-no-ref/ mx6sx_pad_rgmii2_td2__enet2_tx_data_2: MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 {
3503		pinmux = <0x420e0210 0 0x420e0000 0 0x420e0558>;
3504	};
3505	/omit-if-no-ref/ mx6sx_pad_rgmii2_td2__sai1_tx_sync: MX6SX_PAD_RGMII2_TD2__SAI1_TX_SYNC {
3506		pinmux = <0x420e0210 2 0x420e0804 1 0x420e0558>;
3507	};
3508	/omit-if-no-ref/ mx6sx_pad_rgmii2_td2__pwm6_out: MX6SX_PAD_RGMII2_TD2__PWM6_OUT {
3509		pinmux = <0x420e0210 3 0x420e0000 0 0x420e0558>;
3510	};
3511	/omit-if-no-ref/ mx6sx_pad_rgmii2_td2__gpio5_io_20: MX6SX_PAD_RGMII2_TD2__GPIO5_IO_20 {
3512		pinmux = <0x420e0210 5 0x420e0000 0 0x420e0558>;
3513	};
3514	/omit-if-no-ref/ mx6sx_pad_rgmii2_td2__csi2_vsync: MX6SX_PAD_RGMII2_TD2__CSI2_VSYNC {
3515		pinmux = <0x420e0210 6 0x420e0000 0 0x420e0558>;
3516	};
3517	/omit-if-no-ref/ mx6sx_pad_rgmii2_td2__sjc_fail: MX6SX_PAD_RGMII2_TD2__SJC_FAIL {
3518		pinmux = <0x420e0210 7 0x420e0000 0 0x420e0558>;
3519	};
3520	/omit-if-no-ref/ mx6sx_pad_rgmii2_td2__vdec_debug_26: MX6SX_PAD_RGMII2_TD2__VDEC_DEBUG_26 {
3521		pinmux = <0x420e0210 8 0x420e0000 0 0x420e0558>;
3522	};
3523	/omit-if-no-ref/ mx6sx_pad_rgmii2_td2__pcie_ctrl_debug_20: MX6SX_PAD_RGMII2_TD2__PCIE_CTRL_DEBUG_20 {
3524		pinmux = <0x420e0210 9 0x420e0000 0 0x420e0558>;
3525	};
3526	/omit-if-no-ref/ mx6sx_pad_rgmii2_td3__enet2_tx_data_3: MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 {
3527		pinmux = <0x420e0214 0 0x420e0000 0 0x420e055c>;
3528	};
3529	/omit-if-no-ref/ mx6sx_pad_rgmii2_td3__sai1_tx_bclk: MX6SX_PAD_RGMII2_TD3__SAI1_TX_BCLK {
3530		pinmux = <0x420e0214 2 0x420e0800 1 0x420e055c>;
3531	};
3532	/omit-if-no-ref/ mx6sx_pad_rgmii2_td3__pwm5_out: MX6SX_PAD_RGMII2_TD3__PWM5_OUT {
3533		pinmux = <0x420e0214 3 0x420e0000 0 0x420e055c>;
3534	};
3535	/omit-if-no-ref/ mx6sx_pad_rgmii2_td3__gpio5_io_21: MX6SX_PAD_RGMII2_TD3__GPIO5_IO_21 {
3536		pinmux = <0x420e0214 5 0x420e0000 0 0x420e055c>;
3537	};
3538	/omit-if-no-ref/ mx6sx_pad_rgmii2_td3__csi2_hsync: MX6SX_PAD_RGMII2_TD3__CSI2_HSYNC {
3539		pinmux = <0x420e0214 6 0x420e0000 0 0x420e055c>;
3540	};
3541	/omit-if-no-ref/ mx6sx_pad_rgmii2_td3__sjc_jtag_act: MX6SX_PAD_RGMII2_TD3__SJC_JTAG_ACT {
3542		pinmux = <0x420e0214 7 0x420e0000 0 0x420e055c>;
3543	};
3544	/omit-if-no-ref/ mx6sx_pad_rgmii2_td3__vdec_debug_27: MX6SX_PAD_RGMII2_TD3__VDEC_DEBUG_27 {
3545		pinmux = <0x420e0214 8 0x420e0000 0 0x420e055c>;
3546	};
3547	/omit-if-no-ref/ mx6sx_pad_rgmii2_td3__pcie_ctrl_debug_21: MX6SX_PAD_RGMII2_TD3__PCIE_CTRL_DEBUG_21 {
3548		pinmux = <0x420e0214 9 0x420e0000 0 0x420e055c>;
3549	};
3550	/omit-if-no-ref/ mx6sx_pad_rgmii2_tx_ctl__enet2_tx_en: MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN {
3551		pinmux = <0x420e0218 0 0x420e0000 0 0x420e0560>;
3552	};
3553	/omit-if-no-ref/ mx6sx_pad_rgmii2_tx_ctl__sai1_rx_data_0: MX6SX_PAD_RGMII2_TX_CTL__SAI1_RX_DATA_0 {
3554		pinmux = <0x420e0218 2 0x420e07f8 1 0x420e0560>;
3555	};
3556	/omit-if-no-ref/ mx6sx_pad_rgmii2_tx_ctl__gpio5_io_22: MX6SX_PAD_RGMII2_TX_CTL__GPIO5_IO_22 {
3557		pinmux = <0x420e0218 5 0x420e0000 0 0x420e0560>;
3558	};
3559	/omit-if-no-ref/ mx6sx_pad_rgmii2_tx_ctl__csi2_field: MX6SX_PAD_RGMII2_TX_CTL__CSI2_FIELD {
3560		pinmux = <0x420e0218 6 0x420e0000 0 0x420e0560>;
3561	};
3562	/omit-if-no-ref/ mx6sx_pad_rgmii2_tx_ctl__sjc_de_b: MX6SX_PAD_RGMII2_TX_CTL__SJC_DE_B {
3563		pinmux = <0x420e0218 7 0x420e0000 0 0x420e0560>;
3564	};
3565	/omit-if-no-ref/ mx6sx_pad_rgmii2_tx_ctl__vdec_debug_28: MX6SX_PAD_RGMII2_TX_CTL__VDEC_DEBUG_28 {
3566		pinmux = <0x420e0218 8 0x420e0000 0 0x420e0560>;
3567	};
3568	/omit-if-no-ref/ mx6sx_pad_rgmii2_tx_ctl__pcie_ctrl_debug_22: MX6SX_PAD_RGMII2_TX_CTL__PCIE_CTRL_DEBUG_22 {
3569		pinmux = <0x420e0218 9 0x420e0000 0 0x420e0560>;
3570	};
3571	/omit-if-no-ref/ mx6sx_pad_rgmii2_txc__enet2_rgmii_txc: MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC {
3572		pinmux = <0x420e021c 0 0x420e0000 0 0x420e0564>;
3573	};
3574	/omit-if-no-ref/ mx6sx_pad_rgmii2_txc__enet2_tx_er: MX6SX_PAD_RGMII2_TXC__ENET2_TX_ER {
3575		pinmux = <0x420e021c 1 0x420e0000 0 0x420e0564>;
3576	};
3577	/omit-if-no-ref/ mx6sx_pad_rgmii2_txc__sai1_tx_data_0: MX6SX_PAD_RGMII2_TXC__SAI1_TX_DATA_0 {
3578		pinmux = <0x420e021c 2 0x420e0000 0 0x420e0564>;
3579	};
3580	/omit-if-no-ref/ mx6sx_pad_rgmii2_txc__gpio5_io_23: MX6SX_PAD_RGMII2_TXC__GPIO5_IO_23 {
3581		pinmux = <0x420e021c 5 0x420e0000 0 0x420e0564>;
3582	};
3583	/omit-if-no-ref/ mx6sx_pad_rgmii2_txc__csi2_pixclk: MX6SX_PAD_RGMII2_TXC__CSI2_PIXCLK {
3584		pinmux = <0x420e021c 6 0x420e0000 0 0x420e0564>;
3585	};
3586	/omit-if-no-ref/ mx6sx_pad_rgmii2_txc__sjc_done: MX6SX_PAD_RGMII2_TXC__SJC_DONE {
3587		pinmux = <0x420e021c 7 0x420e0000 0 0x420e0564>;
3588	};
3589	/omit-if-no-ref/ mx6sx_pad_rgmii2_txc__vdec_debug_29: MX6SX_PAD_RGMII2_TXC__VDEC_DEBUG_29 {
3590		pinmux = <0x420e021c 8 0x420e0000 0 0x420e0564>;
3591	};
3592	/omit-if-no-ref/ mx6sx_pad_rgmii2_txc__pcie_ctrl_debug_23: MX6SX_PAD_RGMII2_TXC__PCIE_CTRL_DEBUG_23 {
3593		pinmux = <0x420e021c 9 0x420e0000 0 0x420e0564>;
3594	};
3595	/omit-if-no-ref/ mx6sx_pad_sd1_clk__usdhc1_clk: MX6SX_PAD_SD1_CLK__USDHC1_CLK {
3596		pinmux = <0x420e0220 0 0x420e0000 0 0x420e0568>;
3597	};
3598	/omit-if-no-ref/ mx6sx_pad_sd1_clk__audmux_aud5_rxfs: MX6SX_PAD_SD1_CLK__AUDMUX_AUD5_RXFS {
3599		pinmux = <0x420e0220 1 0x420e0668 1 0x420e0568>;
3600	};
3601	/omit-if-no-ref/ mx6sx_pad_sd1_clk__wdog2_wdog_b: MX6SX_PAD_SD1_CLK__WDOG2_WDOG_B {
3602		pinmux = <0x420e0220 2 0x420e0000 0 0x420e0568>;
3603	};
3604	/omit-if-no-ref/ mx6sx_pad_sd1_clk__gpt_clk: MX6SX_PAD_SD1_CLK__GPT_CLK {
3605		pinmux = <0x420e0220 3 0x420e0000 0 0x420e0568>;
3606	};
3607	/omit-if-no-ref/ mx6sx_pad_sd1_clk__wdog2_wdog_rst_b_deb: MX6SX_PAD_SD1_CLK__WDOG2_WDOG_RST_B_DEB {
3608		pinmux = <0x420e0220 4 0x420e0000 0 0x420e0568>;
3609	};
3610	/omit-if-no-ref/ mx6sx_pad_sd1_clk__gpio6_io_0: MX6SX_PAD_SD1_CLK__GPIO6_IO_0 {
3611		pinmux = <0x420e0220 5 0x420e0000 0 0x420e0568>;
3612	};
3613	/omit-if-no-ref/ mx6sx_pad_sd1_clk__enet2_1588_event1_out: MX6SX_PAD_SD1_CLK__ENET2_1588_EVENT1_OUT {
3614		pinmux = <0x420e0220 6 0x420e0000 0 0x420e0568>;
3615	};
3616	/omit-if-no-ref/ mx6sx_pad_sd1_clk__ccm_out1: MX6SX_PAD_SD1_CLK__CCM_OUT1 {
3617		pinmux = <0x420e0220 7 0x420e0000 0 0x420e0568>;
3618	};
3619	/omit-if-no-ref/ mx6sx_pad_sd1_clk__vadc_adc_proc_clk: MX6SX_PAD_SD1_CLK__VADC_ADC_PROC_CLK {
3620		pinmux = <0x420e0220 8 0x420e0000 0 0x420e0568>;
3621	};
3622	/omit-if-no-ref/ mx6sx_pad_sd1_clk__mmdc_debug_45: MX6SX_PAD_SD1_CLK__MMDC_DEBUG_45 {
3623		pinmux = <0x420e0220 9 0x420e0000 0 0x420e0568>;
3624	};
3625	/omit-if-no-ref/ mx6sx_pad_sd1_cmd__usdhc1_cmd: MX6SX_PAD_SD1_CMD__USDHC1_CMD {
3626		pinmux = <0x420e0224 0 0x420e0000 0 0x420e056c>;
3627	};
3628	/omit-if-no-ref/ mx6sx_pad_sd1_cmd__audmux_aud5_rxc: MX6SX_PAD_SD1_CMD__AUDMUX_AUD5_RXC {
3629		pinmux = <0x420e0224 1 0x420e0664 1 0x420e056c>;
3630	};
3631	/omit-if-no-ref/ mx6sx_pad_sd1_cmd__wdog1_wdog_b: MX6SX_PAD_SD1_CMD__WDOG1_WDOG_B {
3632		pinmux = <0x420e0224 2 0x420e0000 0 0x420e056c>;
3633	};
3634	/omit-if-no-ref/ mx6sx_pad_sd1_cmd__gpt_compare1: MX6SX_PAD_SD1_CMD__GPT_COMPARE1 {
3635		pinmux = <0x420e0224 3 0x420e0000 0 0x420e056c>;
3636	};
3637	/omit-if-no-ref/ mx6sx_pad_sd1_cmd__wdog1_wdog_rst_b_deb: MX6SX_PAD_SD1_CMD__WDOG1_WDOG_RST_B_DEB {
3638		pinmux = <0x420e0224 4 0x420e0000 0 0x420e056c>;
3639	};
3640	/omit-if-no-ref/ mx6sx_pad_sd1_cmd__gpio6_io_1: MX6SX_PAD_SD1_CMD__GPIO6_IO_1 {
3641		pinmux = <0x420e0224 5 0x420e0000 0 0x420e056c>;
3642	};
3643	/omit-if-no-ref/ mx6sx_pad_sd1_cmd__enet2_1588_event1_in: MX6SX_PAD_SD1_CMD__ENET2_1588_EVENT1_IN {
3644		pinmux = <0x420e0224 6 0x420e0000 0 0x420e056c>;
3645	};
3646	/omit-if-no-ref/ mx6sx_pad_sd1_cmd__ccm_clko1: MX6SX_PAD_SD1_CMD__CCM_CLKO1 {
3647		pinmux = <0x420e0224 7 0x420e0000 0 0x420e056c>;
3648	};
3649	/omit-if-no-ref/ mx6sx_pad_sd1_cmd__vadc_ext_sysclk: MX6SX_PAD_SD1_CMD__VADC_EXT_SYSCLK {
3650		pinmux = <0x420e0224 8 0x420e0000 0 0x420e056c>;
3651	};
3652	/omit-if-no-ref/ mx6sx_pad_sd1_cmd__mmdc_debug_46: MX6SX_PAD_SD1_CMD__MMDC_DEBUG_46 {
3653		pinmux = <0x420e0224 9 0x420e0000 0 0x420e056c>;
3654	};
3655	/omit-if-no-ref/ mx6sx_pad_sd1_data0__usdhc1_data0: MX6SX_PAD_SD1_DATA0__USDHC1_DATA0 {
3656		pinmux = <0x420e0228 0 0x420e0000 0 0x420e0570>;
3657	};
3658	/omit-if-no-ref/ mx6sx_pad_sd1_data0__audmux_aud5_rxd: MX6SX_PAD_SD1_DATA0__AUDMUX_AUD5_RXD {
3659		pinmux = <0x420e0228 1 0x420e065c 1 0x420e0570>;
3660	};
3661	/omit-if-no-ref/ mx6sx_pad_sd1_data0__caam_wrapper_rng_osc_obs: MX6SX_PAD_SD1_DATA0__CAAM_WRAPPER_RNG_OSC_OBS {
3662		pinmux = <0x420e0228 2 0x420e0000 0 0x420e0570>;
3663	};
3664	/omit-if-no-ref/ mx6sx_pad_sd1_data0__gpt_capture1: MX6SX_PAD_SD1_DATA0__GPT_CAPTURE1 {
3665		pinmux = <0x420e0228 3 0x420e0000 0 0x420e0570>;
3666	};
3667	/omit-if-no-ref/ mx6sx_pad_sd1_data0__uart2_dce_rx: MX6SX_PAD_SD1_DATA0__UART2_DCE_RX {
3668		pinmux = <0x420e0228 4 0x420e0838 2 0x420e0570>;
3669	};
3670	/omit-if-no-ref/ mx6sx_pad_sd1_data0__uart2_dte_tx: MX6SX_PAD_SD1_DATA0__UART2_DTE_TX {
3671		pinmux = <0x420e0228 4 0x420e0000 0 0x420e0570>;
3672	};
3673	/omit-if-no-ref/ mx6sx_pad_sd1_data0__gpio6_io_2: MX6SX_PAD_SD1_DATA0__GPIO6_IO_2 {
3674		pinmux = <0x420e0228 5 0x420e0000 0 0x420e0570>;
3675	};
3676	/omit-if-no-ref/ mx6sx_pad_sd1_data0__enet1_1588_event1_in: MX6SX_PAD_SD1_DATA0__ENET1_1588_EVENT1_IN {
3677		pinmux = <0x420e0228 6 0x420e0000 0 0x420e0570>;
3678	};
3679	/omit-if-no-ref/ mx6sx_pad_sd1_data0__ccm_out2: MX6SX_PAD_SD1_DATA0__CCM_OUT2 {
3680		pinmux = <0x420e0228 7 0x420e0000 0 0x420e0570>;
3681	};
3682	/omit-if-no-ref/ mx6sx_pad_sd1_data0__vadc_clamp_up: MX6SX_PAD_SD1_DATA0__VADC_CLAMP_UP {
3683		pinmux = <0x420e0228 8 0x420e0000 0 0x420e0570>;
3684	};
3685	/omit-if-no-ref/ mx6sx_pad_sd1_data0__mmdc_debug_48: MX6SX_PAD_SD1_DATA0__MMDC_DEBUG_48 {
3686		pinmux = <0x420e0228 9 0x420e0000 0 0x420e0570>;
3687	};
3688	/omit-if-no-ref/ mx6sx_pad_sd1_data1__usdhc1_data1: MX6SX_PAD_SD1_DATA1__USDHC1_DATA1 {
3689		pinmux = <0x420e022c 0 0x420e0000 0 0x420e0574>;
3690	};
3691	/omit-if-no-ref/ mx6sx_pad_sd1_data1__audmux_aud5_txc: MX6SX_PAD_SD1_DATA1__AUDMUX_AUD5_TXC {
3692		pinmux = <0x420e022c 1 0x420e066c 1 0x420e0574>;
3693	};
3694	/omit-if-no-ref/ mx6sx_pad_sd1_data1__pwm4_out: MX6SX_PAD_SD1_DATA1__PWM4_OUT {
3695		pinmux = <0x420e022c 2 0x420e0000 0 0x420e0574>;
3696	};
3697	/omit-if-no-ref/ mx6sx_pad_sd1_data1__gpt_capture2: MX6SX_PAD_SD1_DATA1__GPT_CAPTURE2 {
3698		pinmux = <0x420e022c 3 0x420e0000 0 0x420e0574>;
3699	};
3700	/omit-if-no-ref/ mx6sx_pad_sd1_data1__uart2_dce_tx: MX6SX_PAD_SD1_DATA1__UART2_DCE_TX {
3701		pinmux = <0x420e022c 4 0x420e0000 0 0x420e0574>;
3702	};
3703	/omit-if-no-ref/ mx6sx_pad_sd1_data1__uart2_dte_rx: MX6SX_PAD_SD1_DATA1__UART2_DTE_RX {
3704		pinmux = <0x420e022c 4 0x420e0838 3 0x420e0574>;
3705	};
3706	/omit-if-no-ref/ mx6sx_pad_sd1_data1__gpio6_io_3: MX6SX_PAD_SD1_DATA1__GPIO6_IO_3 {
3707		pinmux = <0x420e022c 5 0x420e0000 0 0x420e0574>;
3708	};
3709	/omit-if-no-ref/ mx6sx_pad_sd1_data1__enet1_1588_event1_out: MX6SX_PAD_SD1_DATA1__ENET1_1588_EVENT1_OUT {
3710		pinmux = <0x420e022c 6 0x420e0000 0 0x420e0574>;
3711	};
3712	/omit-if-no-ref/ mx6sx_pad_sd1_data1__ccm_clko2: MX6SX_PAD_SD1_DATA1__CCM_CLKO2 {
3713		pinmux = <0x420e022c 7 0x420e0000 0 0x420e0574>;
3714	};
3715	/omit-if-no-ref/ mx6sx_pad_sd1_data1__vadc_clamp_down: MX6SX_PAD_SD1_DATA1__VADC_CLAMP_DOWN {
3716		pinmux = <0x420e022c 8 0x420e0000 0 0x420e0574>;
3717	};
3718	/omit-if-no-ref/ mx6sx_pad_sd1_data1__mmdc_debug_47: MX6SX_PAD_SD1_DATA1__MMDC_DEBUG_47 {
3719		pinmux = <0x420e022c 9 0x420e0000 0 0x420e0574>;
3720	};
3721	/omit-if-no-ref/ mx6sx_pad_sd1_data2__usdhc1_data2: MX6SX_PAD_SD1_DATA2__USDHC1_DATA2 {
3722		pinmux = <0x420e0230 0 0x420e0000 0 0x420e0578>;
3723	};
3724	/omit-if-no-ref/ mx6sx_pad_sd1_data2__audmux_aud5_txfs: MX6SX_PAD_SD1_DATA2__AUDMUX_AUD5_TXFS {
3725		pinmux = <0x420e0230 1 0x420e0670 1 0x420e0578>;
3726	};
3727	/omit-if-no-ref/ mx6sx_pad_sd1_data2__pwm3_out: MX6SX_PAD_SD1_DATA2__PWM3_OUT {
3728		pinmux = <0x420e0230 2 0x420e0000 0 0x420e0578>;
3729	};
3730	/omit-if-no-ref/ mx6sx_pad_sd1_data2__gpt_compare2: MX6SX_PAD_SD1_DATA2__GPT_COMPARE2 {
3731		pinmux = <0x420e0230 3 0x420e0000 0 0x420e0578>;
3732	};
3733	/omit-if-no-ref/ mx6sx_pad_sd1_data2__uart2_dce_cts: MX6SX_PAD_SD1_DATA2__UART2_DCE_CTS {
3734		pinmux = <0x420e0230 4 0x420e0000 0 0x420e0578>;
3735	};
3736	/omit-if-no-ref/ mx6sx_pad_sd1_data2__uart2_dte_rts: MX6SX_PAD_SD1_DATA2__UART2_DTE_RTS {
3737		pinmux = <0x420e0230 4 0x420e0834 2 0x420e0578>;
3738	};
3739	/omit-if-no-ref/ mx6sx_pad_sd1_data2__gpio6_io_4: MX6SX_PAD_SD1_DATA2__GPIO6_IO_4 {
3740		pinmux = <0x420e0230 5 0x420e0000 0 0x420e0578>;
3741	};
3742	/omit-if-no-ref/ mx6sx_pad_sd1_data2__ecspi4_rdy: MX6SX_PAD_SD1_DATA2__ECSPI4_RDY {
3743		pinmux = <0x420e0230 6 0x420e0000 0 0x420e0578>;
3744	};
3745	/omit-if-no-ref/ mx6sx_pad_sd1_data2__ccm_out0: MX6SX_PAD_SD1_DATA2__CCM_OUT0 {
3746		pinmux = <0x420e0230 7 0x420e0000 0 0x420e0578>;
3747	};
3748	/omit-if-no-ref/ mx6sx_pad_sd1_data2__vadc_ext_pd_n: MX6SX_PAD_SD1_DATA2__VADC_EXT_PD_N {
3749		pinmux = <0x420e0230 8 0x420e0000 0 0x420e0578>;
3750	};
3751	/omit-if-no-ref/ mx6sx_pad_sd1_data3__usdhc1_data3: MX6SX_PAD_SD1_DATA3__USDHC1_DATA3 {
3752		pinmux = <0x420e0234 0 0x420e0000 0 0x420e057c>;
3753	};
3754	/omit-if-no-ref/ mx6sx_pad_sd1_data3__audmux_aud5_txd: MX6SX_PAD_SD1_DATA3__AUDMUX_AUD5_TXD {
3755		pinmux = <0x420e0234 1 0x420e0660 1 0x420e057c>;
3756	};
3757	/omit-if-no-ref/ mx6sx_pad_sd1_data3__audmux_aud5_rxd: MX6SX_PAD_SD1_DATA3__AUDMUX_AUD5_RXD {
3758		pinmux = <0x420e0234 2 0x420e065c 2 0x420e057c>;
3759	};
3760	/omit-if-no-ref/ mx6sx_pad_sd1_data3__gpt_compare3: MX6SX_PAD_SD1_DATA3__GPT_COMPARE3 {
3761		pinmux = <0x420e0234 3 0x420e0000 0 0x420e057c>;
3762	};
3763	/omit-if-no-ref/ mx6sx_pad_sd1_data3__uart2_dce_rts: MX6SX_PAD_SD1_DATA3__UART2_DCE_RTS {
3764		pinmux = <0x420e0234 4 0x420e0834 3 0x420e057c>;
3765	};
3766	/omit-if-no-ref/ mx6sx_pad_sd1_data3__uart2_dte_cts: MX6SX_PAD_SD1_DATA3__UART2_DTE_CTS {
3767		pinmux = <0x420e0234 4 0x420e0000 0 0x420e057c>;
3768	};
3769	/omit-if-no-ref/ mx6sx_pad_sd1_data3__gpio6_io_5: MX6SX_PAD_SD1_DATA3__GPIO6_IO_5 {
3770		pinmux = <0x420e0234 5 0x420e0000 0 0x420e057c>;
3771	};
3772	/omit-if-no-ref/ mx6sx_pad_sd1_data3__ecspi4_ss1: MX6SX_PAD_SD1_DATA3__ECSPI4_SS1 {
3773		pinmux = <0x420e0234 6 0x420e0000 0 0x420e057c>;
3774	};
3775	/omit-if-no-ref/ mx6sx_pad_sd1_data3__ccm_pmic_rdy: MX6SX_PAD_SD1_DATA3__CCM_PMIC_RDY {
3776		pinmux = <0x420e0234 7 0x420e069c 2 0x420e057c>;
3777	};
3778	/omit-if-no-ref/ mx6sx_pad_sd1_data3__vadc_rst_n: MX6SX_PAD_SD1_DATA3__VADC_RST_N {
3779		pinmux = <0x420e0234 8 0x420e0000 0 0x420e057c>;
3780	};
3781	/omit-if-no-ref/ mx6sx_pad_sd2_clk__usdhc2_clk: MX6SX_PAD_SD2_CLK__USDHC2_CLK {
3782		pinmux = <0x420e0238 0 0x420e0000 0 0x420e0580>;
3783	};
3784	/omit-if-no-ref/ mx6sx_pad_sd2_clk__audmux_aud6_rxfs: MX6SX_PAD_SD2_CLK__AUDMUX_AUD6_RXFS {
3785		pinmux = <0x420e0238 1 0x420e0680 2 0x420e0580>;
3786	};
3787	/omit-if-no-ref/ mx6sx_pad_sd2_clk__kpp_col_5: MX6SX_PAD_SD2_CLK__KPP_COL_5 {
3788		pinmux = <0x420e0238 2 0x420e07c8 1 0x420e0580>;
3789	};
3790	/omit-if-no-ref/ mx6sx_pad_sd2_clk__ecspi4_sclk: MX6SX_PAD_SD2_CLK__ECSPI4_SCLK {
3791		pinmux = <0x420e0238 3 0x420e0740 1 0x420e0580>;
3792	};
3793	/omit-if-no-ref/ mx6sx_pad_sd2_clk__mlb_sig: MX6SX_PAD_SD2_CLK__MLB_SIG {
3794		pinmux = <0x420e0238 4 0x420e07f0 2 0x420e0580>;
3795	};
3796	/omit-if-no-ref/ mx6sx_pad_sd2_clk__gpio6_io_6: MX6SX_PAD_SD2_CLK__GPIO6_IO_6 {
3797		pinmux = <0x420e0238 5 0x420e0000 0 0x420e0580>;
3798	};
3799	/omit-if-no-ref/ mx6sx_pad_sd2_clk__mqs_right: MX6SX_PAD_SD2_CLK__MQS_RIGHT {
3800		pinmux = <0x420e0238 6 0x420e0000 0 0x420e0580>;
3801	};
3802	/omit-if-no-ref/ mx6sx_pad_sd2_clk__wdog1_wdog_any: MX6SX_PAD_SD2_CLK__WDOG1_WDOG_ANY {
3803		pinmux = <0x420e0238 7 0x420e0000 0 0x420e0580>;
3804	};
3805	/omit-if-no-ref/ mx6sx_pad_sd2_clk__vadc_clamp_current_5: MX6SX_PAD_SD2_CLK__VADC_CLAMP_CURRENT_5 {
3806		pinmux = <0x420e0238 8 0x420e0000 0 0x420e0580>;
3807	};
3808	/omit-if-no-ref/ mx6sx_pad_sd2_clk__mmdc_debug_29: MX6SX_PAD_SD2_CLK__MMDC_DEBUG_29 {
3809		pinmux = <0x420e0238 9 0x420e0000 0 0x420e0580>;
3810	};
3811	/omit-if-no-ref/ mx6sx_pad_sd2_cmd__usdhc2_cmd: MX6SX_PAD_SD2_CMD__USDHC2_CMD {
3812		pinmux = <0x420e023c 0 0x420e0000 0 0x420e0584>;
3813	};
3814	/omit-if-no-ref/ mx6sx_pad_sd2_cmd__audmux_aud6_rxc: MX6SX_PAD_SD2_CMD__AUDMUX_AUD6_RXC {
3815		pinmux = <0x420e023c 1 0x420e067c 2 0x420e0584>;
3816	};
3817	/omit-if-no-ref/ mx6sx_pad_sd2_cmd__kpp_row_5: MX6SX_PAD_SD2_CMD__KPP_ROW_5 {
3818		pinmux = <0x420e023c 2 0x420e07d4 1 0x420e0584>;
3819	};
3820	/omit-if-no-ref/ mx6sx_pad_sd2_cmd__ecspi4_mosi: MX6SX_PAD_SD2_CMD__ECSPI4_MOSI {
3821		pinmux = <0x420e023c 3 0x420e0748 1 0x420e0584>;
3822	};
3823	/omit-if-no-ref/ mx6sx_pad_sd2_cmd__mlb_clk: MX6SX_PAD_SD2_CMD__MLB_CLK {
3824		pinmux = <0x420e023c 4 0x420e07e8 2 0x420e0584>;
3825	};
3826	/omit-if-no-ref/ mx6sx_pad_sd2_cmd__gpio6_io_7: MX6SX_PAD_SD2_CMD__GPIO6_IO_7 {
3827		pinmux = <0x420e023c 5 0x420e0000 0 0x420e0584>;
3828	};
3829	/omit-if-no-ref/ mx6sx_pad_sd2_cmd__mqs_left: MX6SX_PAD_SD2_CMD__MQS_LEFT {
3830		pinmux = <0x420e023c 6 0x420e0000 0 0x420e0584>;
3831	};
3832	/omit-if-no-ref/ mx6sx_pad_sd2_cmd__wdog3_wdog_b: MX6SX_PAD_SD2_CMD__WDOG3_WDOG_B {
3833		pinmux = <0x420e023c 7 0x420e0000 0 0x420e0584>;
3834	};
3835	/omit-if-no-ref/ mx6sx_pad_sd2_cmd__vadc_clamp_current_4: MX6SX_PAD_SD2_CMD__VADC_CLAMP_CURRENT_4 {
3836		pinmux = <0x420e023c 8 0x420e0000 0 0x420e0584>;
3837	};
3838	/omit-if-no-ref/ mx6sx_pad_sd2_cmd__mmdc_debug_30: MX6SX_PAD_SD2_CMD__MMDC_DEBUG_30 {
3839		pinmux = <0x420e023c 9 0x420e0000 0 0x420e0584>;
3840	};
3841	/omit-if-no-ref/ mx6sx_pad_sd2_data0__usdhc2_data0: MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 {
3842		pinmux = <0x420e0240 0 0x420e0000 0 0x420e0588>;
3843	};
3844	/omit-if-no-ref/ mx6sx_pad_sd2_data0__audmux_aud6_rxd: MX6SX_PAD_SD2_DATA0__AUDMUX_AUD6_RXD {
3845		pinmux = <0x420e0240 1 0x420e0674 2 0x420e0588>;
3846	};
3847	/omit-if-no-ref/ mx6sx_pad_sd2_data0__kpp_row_7: MX6SX_PAD_SD2_DATA0__KPP_ROW_7 {
3848		pinmux = <0x420e0240 2 0x420e07dc 1 0x420e0588>;
3849	};
3850	/omit-if-no-ref/ mx6sx_pad_sd2_data0__pwm1_out: MX6SX_PAD_SD2_DATA0__PWM1_OUT {
3851		pinmux = <0x420e0240 3 0x420e0000 0 0x420e0588>;
3852	};
3853	/omit-if-no-ref/ mx6sx_pad_sd2_data0__i2c4_sda: MX6SX_PAD_SD2_DATA0__I2C4_SDA {
3854		pinmux = <0x420e0240 4 0x420e07c4 3 0x420e0588>;
3855	};
3856	/omit-if-no-ref/ mx6sx_pad_sd2_data0__gpio6_io_8: MX6SX_PAD_SD2_DATA0__GPIO6_IO_8 {
3857		pinmux = <0x420e0240 5 0x420e0000 0 0x420e0588>;
3858	};
3859	/omit-if-no-ref/ mx6sx_pad_sd2_data0__ecspi4_ss3: MX6SX_PAD_SD2_DATA0__ECSPI4_SS3 {
3860		pinmux = <0x420e0240 6 0x420e0000 0 0x420e0588>;
3861	};
3862	/omit-if-no-ref/ mx6sx_pad_sd2_data0__uart4_dce_rx: MX6SX_PAD_SD2_DATA0__UART4_DCE_RX {
3863		pinmux = <0x420e0240 7 0x420e0848 4 0x420e0588>;
3864	};
3865	/omit-if-no-ref/ mx6sx_pad_sd2_data0__uart4_dte_tx: MX6SX_PAD_SD2_DATA0__UART4_DTE_TX {
3866		pinmux = <0x420e0240 7 0x420e0000 0 0x420e0588>;
3867	};
3868	/omit-if-no-ref/ mx6sx_pad_sd2_data0__vadc_clamp_current_0: MX6SX_PAD_SD2_DATA0__VADC_CLAMP_CURRENT_0 {
3869		pinmux = <0x420e0240 8 0x420e0000 0 0x420e0588>;
3870	};
3871	/omit-if-no-ref/ mx6sx_pad_sd2_data0__mmdc_debug_50: MX6SX_PAD_SD2_DATA0__MMDC_DEBUG_50 {
3872		pinmux = <0x420e0240 9 0x420e0000 0 0x420e0588>;
3873	};
3874	/omit-if-no-ref/ mx6sx_pad_sd2_data1__usdhc2_data1: MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 {
3875		pinmux = <0x420e0244 0 0x420e0000 0 0x420e058c>;
3876	};
3877	/omit-if-no-ref/ mx6sx_pad_sd2_data1__audmux_aud6_txc: MX6SX_PAD_SD2_DATA1__AUDMUX_AUD6_TXC {
3878		pinmux = <0x420e0244 1 0x420e0684 2 0x420e058c>;
3879	};
3880	/omit-if-no-ref/ mx6sx_pad_sd2_data1__kpp_col_7: MX6SX_PAD_SD2_DATA1__KPP_COL_7 {
3881		pinmux = <0x420e0244 2 0x420e07d0 1 0x420e058c>;
3882	};
3883	/omit-if-no-ref/ mx6sx_pad_sd2_data1__pwm2_out: MX6SX_PAD_SD2_DATA1__PWM2_OUT {
3884		pinmux = <0x420e0244 3 0x420e0000 0 0x420e058c>;
3885	};
3886	/omit-if-no-ref/ mx6sx_pad_sd2_data1__i2c4_scl: MX6SX_PAD_SD2_DATA1__I2C4_SCL {
3887		pinmux = <0x420e0244 4 0x420e07c0 3 0x420e058c>;
3888	};
3889	/omit-if-no-ref/ mx6sx_pad_sd2_data1__gpio6_io_9: MX6SX_PAD_SD2_DATA1__GPIO6_IO_9 {
3890		pinmux = <0x420e0244 5 0x420e0000 0 0x420e058c>;
3891	};
3892	/omit-if-no-ref/ mx6sx_pad_sd2_data1__ecspi4_ss2: MX6SX_PAD_SD2_DATA1__ECSPI4_SS2 {
3893		pinmux = <0x420e0244 6 0x420e0000 0 0x420e058c>;
3894	};
3895	/omit-if-no-ref/ mx6sx_pad_sd2_data1__uart4_dce_tx: MX6SX_PAD_SD2_DATA1__UART4_DCE_TX {
3896		pinmux = <0x420e0244 7 0x420e0000 0 0x420e058c>;
3897	};
3898	/omit-if-no-ref/ mx6sx_pad_sd2_data1__uart4_dte_rx: MX6SX_PAD_SD2_DATA1__UART4_DTE_RX {
3899		pinmux = <0x420e0244 7 0x420e0848 5 0x420e058c>;
3900	};
3901	/omit-if-no-ref/ mx6sx_pad_sd2_data1__vadc_clamp_current_1: MX6SX_PAD_SD2_DATA1__VADC_CLAMP_CURRENT_1 {
3902		pinmux = <0x420e0244 8 0x420e0000 0 0x420e058c>;
3903	};
3904	/omit-if-no-ref/ mx6sx_pad_sd2_data1__mmdc_debug_49: MX6SX_PAD_SD2_DATA1__MMDC_DEBUG_49 {
3905		pinmux = <0x420e0244 9 0x420e0000 0 0x420e058c>;
3906	};
3907	/omit-if-no-ref/ mx6sx_pad_sd2_data2__usdhc2_data2: MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 {
3908		pinmux = <0x420e0248 0 0x420e0000 0 0x420e0590>;
3909	};
3910	/omit-if-no-ref/ mx6sx_pad_sd2_data2__audmux_aud6_txfs: MX6SX_PAD_SD2_DATA2__AUDMUX_AUD6_TXFS {
3911		pinmux = <0x420e0248 1 0x420e0688 2 0x420e0590>;
3912	};
3913	/omit-if-no-ref/ mx6sx_pad_sd2_data2__kpp_row_6: MX6SX_PAD_SD2_DATA2__KPP_ROW_6 {
3914		pinmux = <0x420e0248 2 0x420e07d8 1 0x420e0590>;
3915	};
3916	/omit-if-no-ref/ mx6sx_pad_sd2_data2__ecspi4_ss0: MX6SX_PAD_SD2_DATA2__ECSPI4_SS0 {
3917		pinmux = <0x420e0248 3 0x420e074c 1 0x420e0590>;
3918	};
3919	/omit-if-no-ref/ mx6sx_pad_sd2_data2__sdma_ext_event_0: MX6SX_PAD_SD2_DATA2__SDMA_EXT_EVENT_0 {
3920		pinmux = <0x420e0248 4 0x420e081c 2 0x420e0590>;
3921	};
3922	/omit-if-no-ref/ mx6sx_pad_sd2_data2__gpio6_io_10: MX6SX_PAD_SD2_DATA2__GPIO6_IO_10 {
3923		pinmux = <0x420e0248 5 0x420e0000 0 0x420e0590>;
3924	};
3925	/omit-if-no-ref/ mx6sx_pad_sd2_data2__spdif_out: MX6SX_PAD_SD2_DATA2__SPDIF_OUT {
3926		pinmux = <0x420e0248 6 0x420e0000 0 0x420e0590>;
3927	};
3928	/omit-if-no-ref/ mx6sx_pad_sd2_data2__uart6_dce_rx: MX6SX_PAD_SD2_DATA2__UART6_DCE_RX {
3929		pinmux = <0x420e0248 7 0x420e0858 4 0x420e0590>;
3930	};
3931	/omit-if-no-ref/ mx6sx_pad_sd2_data2__uart6_dte_tx: MX6SX_PAD_SD2_DATA2__UART6_DTE_TX {
3932		pinmux = <0x420e0248 7 0x420e0000 0 0x420e0590>;
3933	};
3934	/omit-if-no-ref/ mx6sx_pad_sd2_data2__vadc_clamp_current_2: MX6SX_PAD_SD2_DATA2__VADC_CLAMP_CURRENT_2 {
3935		pinmux = <0x420e0248 8 0x420e0000 0 0x420e0590>;
3936	};
3937	/omit-if-no-ref/ mx6sx_pad_sd2_data2__mmdc_debug_32: MX6SX_PAD_SD2_DATA2__MMDC_DEBUG_32 {
3938		pinmux = <0x420e0248 9 0x420e0000 0 0x420e0590>;
3939	};
3940	/omit-if-no-ref/ mx6sx_pad_sd2_data3__usdhc2_data3: MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 {
3941		pinmux = <0x420e024c 0 0x420e0000 0 0x420e0594>;
3942	};
3943	/omit-if-no-ref/ mx6sx_pad_sd2_data3__audmux_aud6_txd: MX6SX_PAD_SD2_DATA3__AUDMUX_AUD6_TXD {
3944		pinmux = <0x420e024c 1 0x420e0678 2 0x420e0594>;
3945	};
3946	/omit-if-no-ref/ mx6sx_pad_sd2_data3__kpp_col_6: MX6SX_PAD_SD2_DATA3__KPP_COL_6 {
3947		pinmux = <0x420e024c 2 0x420e07cc 1 0x420e0594>;
3948	};
3949	/omit-if-no-ref/ mx6sx_pad_sd2_data3__ecspi4_miso: MX6SX_PAD_SD2_DATA3__ECSPI4_MISO {
3950		pinmux = <0x420e024c 3 0x420e0744 1 0x420e0594>;
3951	};
3952	/omit-if-no-ref/ mx6sx_pad_sd2_data3__mlb_data: MX6SX_PAD_SD2_DATA3__MLB_DATA {
3953		pinmux = <0x420e024c 4 0x420e07ec 2 0x420e0594>;
3954	};
3955	/omit-if-no-ref/ mx6sx_pad_sd2_data3__gpio6_io_11: MX6SX_PAD_SD2_DATA3__GPIO6_IO_11 {
3956		pinmux = <0x420e024c 5 0x420e0000 0 0x420e0594>;
3957	};
3958	/omit-if-no-ref/ mx6sx_pad_sd2_data3__spdif_in: MX6SX_PAD_SD2_DATA3__SPDIF_IN {
3959		pinmux = <0x420e024c 6 0x420e0824 4 0x420e0594>;
3960	};
3961	/omit-if-no-ref/ mx6sx_pad_sd2_data3__uart6_dce_tx: MX6SX_PAD_SD2_DATA3__UART6_DCE_TX {
3962		pinmux = <0x420e024c 7 0x420e0000 0 0x420e0594>;
3963	};
3964	/omit-if-no-ref/ mx6sx_pad_sd2_data3__uart6_dte_rx: MX6SX_PAD_SD2_DATA3__UART6_DTE_RX {
3965		pinmux = <0x420e024c 7 0x420e0858 5 0x420e0594>;
3966	};
3967	/omit-if-no-ref/ mx6sx_pad_sd2_data3__vadc_clamp_current_3: MX6SX_PAD_SD2_DATA3__VADC_CLAMP_CURRENT_3 {
3968		pinmux = <0x420e024c 8 0x420e0000 0 0x420e0594>;
3969	};
3970	/omit-if-no-ref/ mx6sx_pad_sd2_data3__mmdc_debug_31: MX6SX_PAD_SD2_DATA3__MMDC_DEBUG_31 {
3971		pinmux = <0x420e024c 9 0x420e0000 0 0x420e0594>;
3972	};
3973	/omit-if-no-ref/ mx6sx_pad_sd3_clk__usdhc3_clk: MX6SX_PAD_SD3_CLK__USDHC3_CLK {
3974		pinmux = <0x420e0250 0 0x420e0000 0 0x420e0598>;
3975	};
3976	/omit-if-no-ref/ mx6sx_pad_sd3_clk__uart4_dce_cts: MX6SX_PAD_SD3_CLK__UART4_DCE_CTS {
3977		pinmux = <0x420e0250 1 0x420e0000 0 0x420e0598>;
3978	};
3979	/omit-if-no-ref/ mx6sx_pad_sd3_clk__uart4_dte_rts: MX6SX_PAD_SD3_CLK__UART4_DTE_RTS {
3980		pinmux = <0x420e0250 1 0x420e0844 0 0x420e0598>;
3981	};
3982	/omit-if-no-ref/ mx6sx_pad_sd3_clk__ecspi4_sclk: MX6SX_PAD_SD3_CLK__ECSPI4_SCLK {
3983		pinmux = <0x420e0250 2 0x420e0740 0 0x420e0598>;
3984	};
3985	/omit-if-no-ref/ mx6sx_pad_sd3_clk__audmux_aud6_rxfs: MX6SX_PAD_SD3_CLK__AUDMUX_AUD6_RXFS {
3986		pinmux = <0x420e0250 3 0x420e0680 0 0x420e0598>;
3987	};
3988	/omit-if-no-ref/ mx6sx_pad_sd3_clk__lcdif2_vsync: MX6SX_PAD_SD3_CLK__LCDIF2_VSYNC {
3989		pinmux = <0x420e0250 4 0x420e0000 0 0x420e0598>;
3990	};
3991	/omit-if-no-ref/ mx6sx_pad_sd3_clk__gpio7_io_0: MX6SX_PAD_SD3_CLK__GPIO7_IO_0 {
3992		pinmux = <0x420e0250 5 0x420e0000 0 0x420e0598>;
3993	};
3994	/omit-if-no-ref/ mx6sx_pad_sd3_clk__lcdif2_busy: MX6SX_PAD_SD3_CLK__LCDIF2_BUSY {
3995		pinmux = <0x420e0250 6 0x420e07e4 0 0x420e0598>;
3996	};
3997	/omit-if-no-ref/ mx6sx_pad_sd3_clk__tpsmp_hdata_29: MX6SX_PAD_SD3_CLK__TPSMP_HDATA_29 {
3998		pinmux = <0x420e0250 7 0x420e0000 0 0x420e0598>;
3999	};
4000	/omit-if-no-ref/ mx6sx_pad_sd3_clk__sdma_debug_event_channel_5: MX6SX_PAD_SD3_CLK__SDMA_DEBUG_EVENT_CHANNEL_5 {
4001		pinmux = <0x420e0250 9 0x420e0000 0 0x420e0598>;
4002	};
4003	/omit-if-no-ref/ mx6sx_pad_sd3_cmd__usdhc3_cmd: MX6SX_PAD_SD3_CMD__USDHC3_CMD {
4004		pinmux = <0x420e0254 0 0x420e0000 0 0x420e059c>;
4005	};
4006	/omit-if-no-ref/ mx6sx_pad_sd3_cmd__uart4_dce_tx: MX6SX_PAD_SD3_CMD__UART4_DCE_TX {
4007		pinmux = <0x420e0254 1 0x420e0000 0 0x420e059c>;
4008	};
4009	/omit-if-no-ref/ mx6sx_pad_sd3_cmd__uart4_dte_rx: MX6SX_PAD_SD3_CMD__UART4_DTE_RX {
4010		pinmux = <0x420e0254 1 0x420e0848 0 0x420e059c>;
4011	};
4012	/omit-if-no-ref/ mx6sx_pad_sd3_cmd__ecspi4_mosi: MX6SX_PAD_SD3_CMD__ECSPI4_MOSI {
4013		pinmux = <0x420e0254 2 0x420e0748 0 0x420e059c>;
4014	};
4015	/omit-if-no-ref/ mx6sx_pad_sd3_cmd__audmux_aud6_rxc: MX6SX_PAD_SD3_CMD__AUDMUX_AUD6_RXC {
4016		pinmux = <0x420e0254 3 0x420e067c 0 0x420e059c>;
4017	};
4018	/omit-if-no-ref/ mx6sx_pad_sd3_cmd__lcdif2_hsync: MX6SX_PAD_SD3_CMD__LCDIF2_HSYNC {
4019		pinmux = <0x420e0254 4 0x420e07e4 1 0x420e059c>;
4020	};
4021	/omit-if-no-ref/ mx6sx_pad_sd3_cmd__gpio7_io_1: MX6SX_PAD_SD3_CMD__GPIO7_IO_1 {
4022		pinmux = <0x420e0254 5 0x420e0000 0 0x420e059c>;
4023	};
4024	/omit-if-no-ref/ mx6sx_pad_sd3_cmd__lcdif2_rs: MX6SX_PAD_SD3_CMD__LCDIF2_RS {
4025		pinmux = <0x420e0254 6 0x420e0000 0 0x420e059c>;
4026	};
4027	/omit-if-no-ref/ mx6sx_pad_sd3_cmd__tpsmp_hdata_28: MX6SX_PAD_SD3_CMD__TPSMP_HDATA_28 {
4028		pinmux = <0x420e0254 7 0x420e0000 0 0x420e059c>;
4029	};
4030	/omit-if-no-ref/ mx6sx_pad_sd3_cmd__sdma_debug_event_channel_4: MX6SX_PAD_SD3_CMD__SDMA_DEBUG_EVENT_CHANNEL_4 {
4031		pinmux = <0x420e0254 9 0x420e0000 0 0x420e059c>;
4032	};
4033	/omit-if-no-ref/ mx6sx_pad_sd3_data0__usdhc3_data0: MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 {
4034		pinmux = <0x420e0258 0 0x420e0000 0 0x420e05a0>;
4035	};
4036	/omit-if-no-ref/ mx6sx_pad_sd3_data0__i2c4_scl: MX6SX_PAD_SD3_DATA0__I2C4_SCL {
4037		pinmux = <0x420e0258 1 0x420e07c0 0 0x420e05a0>;
4038	};
4039	/omit-if-no-ref/ mx6sx_pad_sd3_data0__ecspi2_ss1: MX6SX_PAD_SD3_DATA0__ECSPI2_SS1 {
4040		pinmux = <0x420e0258 2 0x420e0000 0 0x420e05a0>;
4041	};
4042	/omit-if-no-ref/ mx6sx_pad_sd3_data0__audmux_aud6_rxd: MX6SX_PAD_SD3_DATA0__AUDMUX_AUD6_RXD {
4043		pinmux = <0x420e0258 3 0x420e0674 0 0x420e05a0>;
4044	};
4045	/omit-if-no-ref/ mx6sx_pad_sd3_data0__lcdif2_data_1: MX6SX_PAD_SD3_DATA0__LCDIF2_DATA_1 {
4046		pinmux = <0x420e0258 4 0x420e0000 0 0x420e05a0>;
4047	};
4048	/omit-if-no-ref/ mx6sx_pad_sd3_data0__gpio7_io_2: MX6SX_PAD_SD3_DATA0__GPIO7_IO_2 {
4049		pinmux = <0x420e0258 5 0x420e0000 0 0x420e05a0>;
4050	};
4051	/omit-if-no-ref/ mx6sx_pad_sd3_data0__dcic1_out: MX6SX_PAD_SD3_DATA0__DCIC1_OUT {
4052		pinmux = <0x420e0258 6 0x420e0000 0 0x420e05a0>;
4053	};
4054	/omit-if-no-ref/ mx6sx_pad_sd3_data0__tpsmp_hdata_30: MX6SX_PAD_SD3_DATA0__TPSMP_HDATA_30 {
4055		pinmux = <0x420e0258 7 0x420e0000 0 0x420e05a0>;
4056	};
4057	/omit-if-no-ref/ mx6sx_pad_sd3_data0__gpu_debug_0: MX6SX_PAD_SD3_DATA0__GPU_DEBUG_0 {
4058		pinmux = <0x420e0258 8 0x420e0000 0 0x420e05a0>;
4059	};
4060	/omit-if-no-ref/ mx6sx_pad_sd3_data0__sdma_debug_evt_chn_lines_0: MX6SX_PAD_SD3_DATA0__SDMA_DEBUG_EVT_CHN_LINES_0 {
4061		pinmux = <0x420e0258 9 0x420e0000 0 0x420e05a0>;
4062	};
4063	/omit-if-no-ref/ mx6sx_pad_sd3_data1__usdhc3_data1: MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 {
4064		pinmux = <0x420e025c 0 0x420e0000 0 0x420e05a4>;
4065	};
4066	/omit-if-no-ref/ mx6sx_pad_sd3_data1__i2c4_sda: MX6SX_PAD_SD3_DATA1__I2C4_SDA {
4067		pinmux = <0x420e025c 1 0x420e07c4 0 0x420e05a4>;
4068	};
4069	/omit-if-no-ref/ mx6sx_pad_sd3_data1__ecspi2_ss2: MX6SX_PAD_SD3_DATA1__ECSPI2_SS2 {
4070		pinmux = <0x420e025c 2 0x420e0000 0 0x420e05a4>;
4071	};
4072	/omit-if-no-ref/ mx6sx_pad_sd3_data1__audmux_aud6_txc: MX6SX_PAD_SD3_DATA1__AUDMUX_AUD6_TXC {
4073		pinmux = <0x420e025c 3 0x420e0684 0 0x420e05a4>;
4074	};
4075	/omit-if-no-ref/ mx6sx_pad_sd3_data1__lcdif2_data_0: MX6SX_PAD_SD3_DATA1__LCDIF2_DATA_0 {
4076		pinmux = <0x420e025c 4 0x420e0000 0 0x420e05a4>;
4077	};
4078	/omit-if-no-ref/ mx6sx_pad_sd3_data1__gpio7_io_3: MX6SX_PAD_SD3_DATA1__GPIO7_IO_3 {
4079		pinmux = <0x420e025c 5 0x420e0000 0 0x420e05a4>;
4080	};
4081	/omit-if-no-ref/ mx6sx_pad_sd3_data1__dcic2_out: MX6SX_PAD_SD3_DATA1__DCIC2_OUT {
4082		pinmux = <0x420e025c 6 0x420e0000 0 0x420e05a4>;
4083	};
4084	/omit-if-no-ref/ mx6sx_pad_sd3_data1__tpsmp_hdata_31: MX6SX_PAD_SD3_DATA1__TPSMP_HDATA_31 {
4085		pinmux = <0x420e025c 7 0x420e0000 0 0x420e05a4>;
4086	};
4087	/omit-if-no-ref/ mx6sx_pad_sd3_data1__gpu_debug_1: MX6SX_PAD_SD3_DATA1__GPU_DEBUG_1 {
4088		pinmux = <0x420e025c 8 0x420e0000 0 0x420e05a4>;
4089	};
4090	/omit-if-no-ref/ mx6sx_pad_sd3_data1__sdma_debug_evt_chn_lines_1: MX6SX_PAD_SD3_DATA1__SDMA_DEBUG_EVT_CHN_LINES_1 {
4091		pinmux = <0x420e025c 9 0x420e0000 0 0x420e05a4>;
4092	};
4093	/omit-if-no-ref/ mx6sx_pad_sd3_data2__usdhc3_data2: MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 {
4094		pinmux = <0x420e0260 0 0x420e0000 0 0x420e05a8>;
4095	};
4096	/omit-if-no-ref/ mx6sx_pad_sd3_data2__uart4_dce_rts: MX6SX_PAD_SD3_DATA2__UART4_DCE_RTS {
4097		pinmux = <0x420e0260 1 0x420e0844 1 0x420e05a8>;
4098	};
4099	/omit-if-no-ref/ mx6sx_pad_sd3_data2__uart4_dte_cts: MX6SX_PAD_SD3_DATA2__UART4_DTE_CTS {
4100		pinmux = <0x420e0260 1 0x420e0000 0 0x420e05a8>;
4101	};
4102	/omit-if-no-ref/ mx6sx_pad_sd3_data2__ecspi4_ss0: MX6SX_PAD_SD3_DATA2__ECSPI4_SS0 {
4103		pinmux = <0x420e0260 2 0x420e074c 0 0x420e05a8>;
4104	};
4105	/omit-if-no-ref/ mx6sx_pad_sd3_data2__audmux_aud6_txfs: MX6SX_PAD_SD3_DATA2__AUDMUX_AUD6_TXFS {
4106		pinmux = <0x420e0260 3 0x420e0688 0 0x420e05a8>;
4107	};
4108	/omit-if-no-ref/ mx6sx_pad_sd3_data2__lcdif2_clk: MX6SX_PAD_SD3_DATA2__LCDIF2_CLK {
4109		pinmux = <0x420e0260 4 0x420e0000 0 0x420e05a8>;
4110	};
4111	/omit-if-no-ref/ mx6sx_pad_sd3_data2__gpio7_io_4: MX6SX_PAD_SD3_DATA2__GPIO7_IO_4 {
4112		pinmux = <0x420e0260 5 0x420e0000 0 0x420e05a8>;
4113	};
4114	/omit-if-no-ref/ mx6sx_pad_sd3_data2__lcdif2_wr_rwn: MX6SX_PAD_SD3_DATA2__LCDIF2_WR_RWN {
4115		pinmux = <0x420e0260 6 0x420e0000 0 0x420e05a8>;
4116	};
4117	/omit-if-no-ref/ mx6sx_pad_sd3_data2__tpsmp_hdata_26: MX6SX_PAD_SD3_DATA2__TPSMP_HDATA_26 {
4118		pinmux = <0x420e0260 7 0x420e0000 0 0x420e05a8>;
4119	};
4120	/omit-if-no-ref/ mx6sx_pad_sd3_data2__gpu_debug_2: MX6SX_PAD_SD3_DATA2__GPU_DEBUG_2 {
4121		pinmux = <0x420e0260 8 0x420e0000 0 0x420e05a8>;
4122	};
4123	/omit-if-no-ref/ mx6sx_pad_sd3_data2__sdma_debug_event_channel_2: MX6SX_PAD_SD3_DATA2__SDMA_DEBUG_EVENT_CHANNEL_2 {
4124		pinmux = <0x420e0260 9 0x420e0000 0 0x420e05a8>;
4125	};
4126	/omit-if-no-ref/ mx6sx_pad_sd3_data3__usdhc3_data3: MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 {
4127		pinmux = <0x420e0264 0 0x420e0000 0 0x420e05ac>;
4128	};
4129	/omit-if-no-ref/ mx6sx_pad_sd3_data3__uart4_dce_rx: MX6SX_PAD_SD3_DATA3__UART4_DCE_RX {
4130		pinmux = <0x420e0264 1 0x420e0848 1 0x420e05ac>;
4131	};
4132	/omit-if-no-ref/ mx6sx_pad_sd3_data3__uart4_dte_tx: MX6SX_PAD_SD3_DATA3__UART4_DTE_TX {
4133		pinmux = <0x420e0264 1 0x420e0000 0 0x420e05ac>;
4134	};
4135	/omit-if-no-ref/ mx6sx_pad_sd3_data3__ecspi4_miso: MX6SX_PAD_SD3_DATA3__ECSPI4_MISO {
4136		pinmux = <0x420e0264 2 0x420e0744 0 0x420e05ac>;
4137	};
4138	/omit-if-no-ref/ mx6sx_pad_sd3_data3__audmux_aud6_txd: MX6SX_PAD_SD3_DATA3__AUDMUX_AUD6_TXD {
4139		pinmux = <0x420e0264 3 0x420e0678 0 0x420e05ac>;
4140	};
4141	/omit-if-no-ref/ mx6sx_pad_sd3_data3__lcdif2_enable: MX6SX_PAD_SD3_DATA3__LCDIF2_ENABLE {
4142		pinmux = <0x420e0264 4 0x420e0000 0 0x420e05ac>;
4143	};
4144	/omit-if-no-ref/ mx6sx_pad_sd3_data3__gpio7_io_5: MX6SX_PAD_SD3_DATA3__GPIO7_IO_5 {
4145		pinmux = <0x420e0264 5 0x420e0000 0 0x420e05ac>;
4146	};
4147	/omit-if-no-ref/ mx6sx_pad_sd3_data3__lcdif2_rd_e: MX6SX_PAD_SD3_DATA3__LCDIF2_RD_E {
4148		pinmux = <0x420e0264 6 0x420e0000 0 0x420e05ac>;
4149	};
4150	/omit-if-no-ref/ mx6sx_pad_sd3_data3__tpsmp_hdata_27: MX6SX_PAD_SD3_DATA3__TPSMP_HDATA_27 {
4151		pinmux = <0x420e0264 7 0x420e0000 0 0x420e05ac>;
4152	};
4153	/omit-if-no-ref/ mx6sx_pad_sd3_data3__gpu_debug_3: MX6SX_PAD_SD3_DATA3__GPU_DEBUG_3 {
4154		pinmux = <0x420e0264 8 0x420e0000 0 0x420e05ac>;
4155	};
4156	/omit-if-no-ref/ mx6sx_pad_sd3_data3__sdma_debug_event_channel_3: MX6SX_PAD_SD3_DATA3__SDMA_DEBUG_EVENT_CHANNEL_3 {
4157		pinmux = <0x420e0264 9 0x420e0000 0 0x420e05ac>;
4158	};
4159	/omit-if-no-ref/ mx6sx_pad_sd3_data4__usdhc3_data4: MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 {
4160		pinmux = <0x420e0268 0 0x420e0000 0 0x420e05b0>;
4161	};
4162	/omit-if-no-ref/ mx6sx_pad_sd3_data4__can2_rx: MX6SX_PAD_SD3_DATA4__CAN2_RX {
4163		pinmux = <0x420e0268 1 0x420e0690 0 0x420e05b0>;
4164	};
4165	/omit-if-no-ref/ mx6sx_pad_sd3_data4__canfd_rx2: MX6SX_PAD_SD3_DATA4__CANFD_RX2 {
4166		pinmux = <0x420e0268 2 0x420e0698 0 0x420e05b0>;
4167	};
4168	/omit-if-no-ref/ mx6sx_pad_sd3_data4__uart3_dce_rx: MX6SX_PAD_SD3_DATA4__UART3_DCE_RX {
4169		pinmux = <0x420e0268 3 0x420e0840 2 0x420e05b0>;
4170	};
4171	/omit-if-no-ref/ mx6sx_pad_sd3_data4__uart3_dte_tx: MX6SX_PAD_SD3_DATA4__UART3_DTE_TX {
4172		pinmux = <0x420e0268 3 0x420e0000 0 0x420e05b0>;
4173	};
4174	/omit-if-no-ref/ mx6sx_pad_sd3_data4__lcdif2_data_3: MX6SX_PAD_SD3_DATA4__LCDIF2_DATA_3 {
4175		pinmux = <0x420e0268 4 0x420e0000 0 0x420e05b0>;
4176	};
4177	/omit-if-no-ref/ mx6sx_pad_sd3_data4__gpio7_io_6: MX6SX_PAD_SD3_DATA4__GPIO7_IO_6 {
4178		pinmux = <0x420e0268 5 0x420e0000 0 0x420e05b0>;
4179	};
4180	/omit-if-no-ref/ mx6sx_pad_sd3_data4__enet2_1588_event0_in: MX6SX_PAD_SD3_DATA4__ENET2_1588_EVENT0_IN {
4181		pinmux = <0x420e0268 6 0x420e0000 0 0x420e05b0>;
4182	};
4183	/omit-if-no-ref/ mx6sx_pad_sd3_data4__tpsmp_htrans_1: MX6SX_PAD_SD3_DATA4__TPSMP_HTRANS_1 {
4184		pinmux = <0x420e0268 7 0x420e0000 0 0x420e05b0>;
4185	};
4186	/omit-if-no-ref/ mx6sx_pad_sd3_data4__gpu_debug_4: MX6SX_PAD_SD3_DATA4__GPU_DEBUG_4 {
4187		pinmux = <0x420e0268 8 0x420e0000 0 0x420e05b0>;
4188	};
4189	/omit-if-no-ref/ mx6sx_pad_sd3_data4__sdma_debug_bus_device_0: MX6SX_PAD_SD3_DATA4__SDMA_DEBUG_BUS_DEVICE_0 {
4190		pinmux = <0x420e0268 9 0x420e0000 0 0x420e05b0>;
4191	};
4192	/omit-if-no-ref/ mx6sx_pad_sd3_data5__usdhc3_data5: MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 {
4193		pinmux = <0x420e026c 0 0x420e0000 0 0x420e05b4>;
4194	};
4195	/omit-if-no-ref/ mx6sx_pad_sd3_data5__can1_tx: MX6SX_PAD_SD3_DATA5__CAN1_TX {
4196		pinmux = <0x420e026c 1 0x420e0000 0 0x420e05b4>;
4197	};
4198	/omit-if-no-ref/ mx6sx_pad_sd3_data5__canfd_tx1: MX6SX_PAD_SD3_DATA5__CANFD_TX1 {
4199		pinmux = <0x420e026c 2 0x420e0000 0 0x420e05b4>;
4200	};
4201	/omit-if-no-ref/ mx6sx_pad_sd3_data5__uart3_dce_tx: MX6SX_PAD_SD3_DATA5__UART3_DCE_TX {
4202		pinmux = <0x420e026c 3 0x420e0000 0 0x420e05b4>;
4203	};
4204	/omit-if-no-ref/ mx6sx_pad_sd3_data5__uart3_dte_rx: MX6SX_PAD_SD3_DATA5__UART3_DTE_RX {
4205		pinmux = <0x420e026c 3 0x420e0840 3 0x420e05b4>;
4206	};
4207	/omit-if-no-ref/ mx6sx_pad_sd3_data5__lcdif2_data_2: MX6SX_PAD_SD3_DATA5__LCDIF2_DATA_2 {
4208		pinmux = <0x420e026c 4 0x420e0000 0 0x420e05b4>;
4209	};
4210	/omit-if-no-ref/ mx6sx_pad_sd3_data5__gpio7_io_7: MX6SX_PAD_SD3_DATA5__GPIO7_IO_7 {
4211		pinmux = <0x420e026c 5 0x420e0000 0 0x420e05b4>;
4212	};
4213	/omit-if-no-ref/ mx6sx_pad_sd3_data5__enet2_1588_event0_out: MX6SX_PAD_SD3_DATA5__ENET2_1588_EVENT0_OUT {
4214		pinmux = <0x420e026c 6 0x420e0000 0 0x420e05b4>;
4215	};
4216	/omit-if-no-ref/ mx6sx_pad_sd3_data5__sim_m_hwrite: MX6SX_PAD_SD3_DATA5__SIM_M_HWRITE {
4217		pinmux = <0x420e026c 7 0x420e0000 0 0x420e05b4>;
4218	};
4219	/omit-if-no-ref/ mx6sx_pad_sd3_data5__gpu_debug_5: MX6SX_PAD_SD3_DATA5__GPU_DEBUG_5 {
4220		pinmux = <0x420e026c 8 0x420e0000 0 0x420e05b4>;
4221	};
4222	/omit-if-no-ref/ mx6sx_pad_sd3_data5__sdma_debug_bus_device_1: MX6SX_PAD_SD3_DATA5__SDMA_DEBUG_BUS_DEVICE_1 {
4223		pinmux = <0x420e026c 9 0x420e0000 0 0x420e05b4>;
4224	};
4225	/omit-if-no-ref/ mx6sx_pad_sd3_data6__usdhc3_data6: MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 {
4226		pinmux = <0x420e0270 0 0x420e0000 0 0x420e05b8>;
4227	};
4228	/omit-if-no-ref/ mx6sx_pad_sd3_data6__can2_tx: MX6SX_PAD_SD3_DATA6__CAN2_TX {
4229		pinmux = <0x420e0270 1 0x420e0000 0 0x420e05b8>;
4230	};
4231	/omit-if-no-ref/ mx6sx_pad_sd3_data6__canfd_tx2: MX6SX_PAD_SD3_DATA6__CANFD_TX2 {
4232		pinmux = <0x420e0270 2 0x420e0000 0 0x420e05b8>;
4233	};
4234	/omit-if-no-ref/ mx6sx_pad_sd3_data6__uart3_dce_rts: MX6SX_PAD_SD3_DATA6__UART3_DCE_RTS {
4235		pinmux = <0x420e0270 3 0x420e083c 2 0x420e05b8>;
4236	};
4237	/omit-if-no-ref/ mx6sx_pad_sd3_data6__uart3_dte_cts: MX6SX_PAD_SD3_DATA6__UART3_DTE_CTS {
4238		pinmux = <0x420e0270 3 0x420e0000 0 0x420e05b8>;
4239	};
4240	/omit-if-no-ref/ mx6sx_pad_sd3_data6__lcdif2_data_4: MX6SX_PAD_SD3_DATA6__LCDIF2_DATA_4 {
4241		pinmux = <0x420e0270 4 0x420e0000 0 0x420e05b8>;
4242	};
4243	/omit-if-no-ref/ mx6sx_pad_sd3_data6__gpio7_io_8: MX6SX_PAD_SD3_DATA6__GPIO7_IO_8 {
4244		pinmux = <0x420e0270 5 0x420e0000 0 0x420e05b8>;
4245	};
4246	/omit-if-no-ref/ mx6sx_pad_sd3_data6__enet1_1588_event0_out: MX6SX_PAD_SD3_DATA6__ENET1_1588_EVENT0_OUT {
4247		pinmux = <0x420e0270 6 0x420e0000 0 0x420e05b8>;
4248	};
4249	/omit-if-no-ref/ mx6sx_pad_sd3_data6__tpsmp_htrans_0: MX6SX_PAD_SD3_DATA6__TPSMP_HTRANS_0 {
4250		pinmux = <0x420e0270 7 0x420e0000 0 0x420e05b8>;
4251	};
4252	/omit-if-no-ref/ mx6sx_pad_sd3_data6__gpu_debug_7: MX6SX_PAD_SD3_DATA6__GPU_DEBUG_7 {
4253		pinmux = <0x420e0270 8 0x420e0000 0 0x420e05b8>;
4254	};
4255	/omit-if-no-ref/ mx6sx_pad_sd3_data6__sdma_debug_evt_chn_lines_7: MX6SX_PAD_SD3_DATA6__SDMA_DEBUG_EVT_CHN_LINES_7 {
4256		pinmux = <0x420e0270 9 0x420e0000 0 0x420e05b8>;
4257	};
4258	/omit-if-no-ref/ mx6sx_pad_sd3_data7__usdhc3_data7: MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 {
4259		pinmux = <0x420e0274 0 0x420e0000 0 0x420e05bc>;
4260	};
4261	/omit-if-no-ref/ mx6sx_pad_sd3_data7__can1_rx: MX6SX_PAD_SD3_DATA7__CAN1_RX {
4262		pinmux = <0x420e0274 1 0x420e068c 0 0x420e05bc>;
4263	};
4264	/omit-if-no-ref/ mx6sx_pad_sd3_data7__canfd_rx1: MX6SX_PAD_SD3_DATA7__CANFD_RX1 {
4265		pinmux = <0x420e0274 2 0x420e0694 0 0x420e05bc>;
4266	};
4267	/omit-if-no-ref/ mx6sx_pad_sd3_data7__uart3_dce_cts: MX6SX_PAD_SD3_DATA7__UART3_DCE_CTS {
4268		pinmux = <0x420e0274 3 0x420e0000 0 0x420e05bc>;
4269	};
4270	/omit-if-no-ref/ mx6sx_pad_sd3_data7__uart3_dte_rts: MX6SX_PAD_SD3_DATA7__UART3_DTE_RTS {
4271		pinmux = <0x420e0274 3 0x420e083c 3 0x420e05bc>;
4272	};
4273	/omit-if-no-ref/ mx6sx_pad_sd3_data7__lcdif2_data_5: MX6SX_PAD_SD3_DATA7__LCDIF2_DATA_5 {
4274		pinmux = <0x420e0274 4 0x420e0000 0 0x420e05bc>;
4275	};
4276	/omit-if-no-ref/ mx6sx_pad_sd3_data7__gpio7_io_9: MX6SX_PAD_SD3_DATA7__GPIO7_IO_9 {
4277		pinmux = <0x420e0274 5 0x420e0000 0 0x420e05bc>;
4278	};
4279	/omit-if-no-ref/ mx6sx_pad_sd3_data7__enet1_1588_event0_in: MX6SX_PAD_SD3_DATA7__ENET1_1588_EVENT0_IN {
4280		pinmux = <0x420e0274 6 0x420e0000 0 0x420e05bc>;
4281	};
4282	/omit-if-no-ref/ mx6sx_pad_sd3_data7__tpsmp_hdata_dir: MX6SX_PAD_SD3_DATA7__TPSMP_HDATA_DIR {
4283		pinmux = <0x420e0274 7 0x420e0000 0 0x420e05bc>;
4284	};
4285	/omit-if-no-ref/ mx6sx_pad_sd3_data7__gpu_debug_6: MX6SX_PAD_SD3_DATA7__GPU_DEBUG_6 {
4286		pinmux = <0x420e0274 8 0x420e0000 0 0x420e05bc>;
4287	};
4288	/omit-if-no-ref/ mx6sx_pad_sd3_data7__sdma_debug_evt_chn_lines_2: MX6SX_PAD_SD3_DATA7__SDMA_DEBUG_EVT_CHN_LINES_2 {
4289		pinmux = <0x420e0274 9 0x420e0000 0 0x420e05bc>;
4290	};
4291	/omit-if-no-ref/ mx6sx_pad_sd4_clk__usdhc4_clk: MX6SX_PAD_SD4_CLK__USDHC4_CLK {
4292		pinmux = <0x420e0278 0 0x420e0000 0 0x420e05c0>;
4293	};
4294	/omit-if-no-ref/ mx6sx_pad_sd4_clk__rawnand_data15: MX6SX_PAD_SD4_CLK__RAWNAND_DATA15 {
4295		pinmux = <0x420e0278 1 0x420e0000 0 0x420e05c0>;
4296	};
4297	/omit-if-no-ref/ mx6sx_pad_sd4_clk__ecspi2_miso: MX6SX_PAD_SD4_CLK__ECSPI2_MISO {
4298		pinmux = <0x420e0278 2 0x420e0724 1 0x420e05c0>;
4299	};
4300	/omit-if-no-ref/ mx6sx_pad_sd4_clk__audmux_aud3_rxfs: MX6SX_PAD_SD4_CLK__AUDMUX_AUD3_RXFS {
4301		pinmux = <0x420e0278 3 0x420e0638 0 0x420e05c0>;
4302	};
4303	/omit-if-no-ref/ mx6sx_pad_sd4_clk__lcdif2_data_13: MX6SX_PAD_SD4_CLK__LCDIF2_DATA_13 {
4304		pinmux = <0x420e0278 4 0x420e0000 0 0x420e05c0>;
4305	};
4306	/omit-if-no-ref/ mx6sx_pad_sd4_clk__gpio6_io_12: MX6SX_PAD_SD4_CLK__GPIO6_IO_12 {
4307		pinmux = <0x420e0278 5 0x420e0000 0 0x420e05c0>;
4308	};
4309	/omit-if-no-ref/ mx6sx_pad_sd4_clk__ecspi3_ss2: MX6SX_PAD_SD4_CLK__ECSPI3_SS2 {
4310		pinmux = <0x420e0278 6 0x420e0000 0 0x420e05c0>;
4311	};
4312	/omit-if-no-ref/ mx6sx_pad_sd4_clk__tpsmp_hdata_20: MX6SX_PAD_SD4_CLK__TPSMP_HDATA_20 {
4313		pinmux = <0x420e0278 7 0x420e0000 0 0x420e05c0>;
4314	};
4315	/omit-if-no-ref/ mx6sx_pad_sd4_clk__vdec_debug_12: MX6SX_PAD_SD4_CLK__VDEC_DEBUG_12 {
4316		pinmux = <0x420e0278 8 0x420e0000 0 0x420e05c0>;
4317	};
4318	/omit-if-no-ref/ mx6sx_pad_sd4_clk__sdma_debug_event_channel_sel: MX6SX_PAD_SD4_CLK__SDMA_DEBUG_EVENT_CHANNEL_SEL {
4319		pinmux = <0x420e0278 9 0x420e0000 0 0x420e05c0>;
4320	};
4321	/omit-if-no-ref/ mx6sx_pad_sd4_cmd__usdhc4_cmd: MX6SX_PAD_SD4_CMD__USDHC4_CMD {
4322		pinmux = <0x420e027c 0 0x420e0000 0 0x420e05c4>;
4323	};
4324	/omit-if-no-ref/ mx6sx_pad_sd4_cmd__rawnand_data14: MX6SX_PAD_SD4_CMD__RAWNAND_DATA14 {
4325		pinmux = <0x420e027c 1 0x420e0000 0 0x420e05c4>;
4326	};
4327	/omit-if-no-ref/ mx6sx_pad_sd4_cmd__ecspi2_mosi: MX6SX_PAD_SD4_CMD__ECSPI2_MOSI {
4328		pinmux = <0x420e027c 2 0x420e0728 1 0x420e05c4>;
4329	};
4330	/omit-if-no-ref/ mx6sx_pad_sd4_cmd__audmux_aud3_rxc: MX6SX_PAD_SD4_CMD__AUDMUX_AUD3_RXC {
4331		pinmux = <0x420e027c 3 0x420e0634 0 0x420e05c4>;
4332	};
4333	/omit-if-no-ref/ mx6sx_pad_sd4_cmd__lcdif2_data_14: MX6SX_PAD_SD4_CMD__LCDIF2_DATA_14 {
4334		pinmux = <0x420e027c 4 0x420e0000 0 0x420e05c4>;
4335	};
4336	/omit-if-no-ref/ mx6sx_pad_sd4_cmd__gpio6_io_13: MX6SX_PAD_SD4_CMD__GPIO6_IO_13 {
4337		pinmux = <0x420e027c 5 0x420e0000 0 0x420e05c4>;
4338	};
4339	/omit-if-no-ref/ mx6sx_pad_sd4_cmd__ecspi3_ss1: MX6SX_PAD_SD4_CMD__ECSPI3_SS1 {
4340		pinmux = <0x420e027c 6 0x420e0000 0 0x420e05c4>;
4341	};
4342	/omit-if-no-ref/ mx6sx_pad_sd4_cmd__tpsmp_hdata_19: MX6SX_PAD_SD4_CMD__TPSMP_HDATA_19 {
4343		pinmux = <0x420e027c 7 0x420e0000 0 0x420e05c4>;
4344	};
4345	/omit-if-no-ref/ mx6sx_pad_sd4_cmd__vdec_debug_11: MX6SX_PAD_SD4_CMD__VDEC_DEBUG_11 {
4346		pinmux = <0x420e027c 8 0x420e0000 0 0x420e05c4>;
4347	};
4348	/omit-if-no-ref/ mx6sx_pad_sd4_cmd__sdma_debug_core_run: MX6SX_PAD_SD4_CMD__SDMA_DEBUG_CORE_RUN {
4349		pinmux = <0x420e027c 9 0x420e0000 0 0x420e05c4>;
4350	};
4351	/omit-if-no-ref/ mx6sx_pad_sd4_data0__usdhc4_data0: MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 {
4352		pinmux = <0x420e0280 0 0x420e0000 0 0x420e05c8>;
4353	};
4354	/omit-if-no-ref/ mx6sx_pad_sd4_data0__rawnand_data10: MX6SX_PAD_SD4_DATA0__RAWNAND_DATA10 {
4355		pinmux = <0x420e0280 1 0x420e0000 0 0x420e05c8>;
4356	};
4357	/omit-if-no-ref/ mx6sx_pad_sd4_data0__ecspi2_ss0: MX6SX_PAD_SD4_DATA0__ECSPI2_SS0 {
4358		pinmux = <0x420e0280 2 0x420e072c 1 0x420e05c8>;
4359	};
4360	/omit-if-no-ref/ mx6sx_pad_sd4_data0__audmux_aud3_rxd: MX6SX_PAD_SD4_DATA0__AUDMUX_AUD3_RXD {
4361		pinmux = <0x420e0280 3 0x420e062c 0 0x420e05c8>;
4362	};
4363	/omit-if-no-ref/ mx6sx_pad_sd4_data0__lcdif2_data_12: MX6SX_PAD_SD4_DATA0__LCDIF2_DATA_12 {
4364		pinmux = <0x420e0280 4 0x420e0000 0 0x420e05c8>;
4365	};
4366	/omit-if-no-ref/ mx6sx_pad_sd4_data0__gpio6_io_14: MX6SX_PAD_SD4_DATA0__GPIO6_IO_14 {
4367		pinmux = <0x420e0280 5 0x420e0000 0 0x420e05c8>;
4368	};
4369	/omit-if-no-ref/ mx6sx_pad_sd4_data0__ecspi3_ss3: MX6SX_PAD_SD4_DATA0__ECSPI3_SS3 {
4370		pinmux = <0x420e0280 6 0x420e0000 0 0x420e05c8>;
4371	};
4372	/omit-if-no-ref/ mx6sx_pad_sd4_data0__tpsmp_hdata_21: MX6SX_PAD_SD4_DATA0__TPSMP_HDATA_21 {
4373		pinmux = <0x420e0280 7 0x420e0000 0 0x420e05c8>;
4374	};
4375	/omit-if-no-ref/ mx6sx_pad_sd4_data0__vdec_debug_13: MX6SX_PAD_SD4_DATA0__VDEC_DEBUG_13 {
4376		pinmux = <0x420e0280 8 0x420e0000 0 0x420e05c8>;
4377	};
4378	/omit-if-no-ref/ mx6sx_pad_sd4_data0__sdma_debug_mode: MX6SX_PAD_SD4_DATA0__SDMA_DEBUG_MODE {
4379		pinmux = <0x420e0280 9 0x420e0000 0 0x420e05c8>;
4380	};
4381	/omit-if-no-ref/ mx6sx_pad_sd4_data1__usdhc4_data1: MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 {
4382		pinmux = <0x420e0284 0 0x420e0000 0 0x420e05cc>;
4383	};
4384	/omit-if-no-ref/ mx6sx_pad_sd4_data1__rawnand_data11: MX6SX_PAD_SD4_DATA1__RAWNAND_DATA11 {
4385		pinmux = <0x420e0284 1 0x420e0000 0 0x420e05cc>;
4386	};
4387	/omit-if-no-ref/ mx6sx_pad_sd4_data1__ecspi2_sclk: MX6SX_PAD_SD4_DATA1__ECSPI2_SCLK {
4388		pinmux = <0x420e0284 2 0x420e0720 1 0x420e05cc>;
4389	};
4390	/omit-if-no-ref/ mx6sx_pad_sd4_data1__audmux_aud3_txc: MX6SX_PAD_SD4_DATA1__AUDMUX_AUD3_TXC {
4391		pinmux = <0x420e0284 3 0x420e063c 0 0x420e05cc>;
4392	};
4393	/omit-if-no-ref/ mx6sx_pad_sd4_data1__lcdif2_data_11: MX6SX_PAD_SD4_DATA1__LCDIF2_DATA_11 {
4394		pinmux = <0x420e0284 4 0x420e0000 0 0x420e05cc>;
4395	};
4396	/omit-if-no-ref/ mx6sx_pad_sd4_data1__gpio6_io_15: MX6SX_PAD_SD4_DATA1__GPIO6_IO_15 {
4397		pinmux = <0x420e0284 5 0x420e0000 0 0x420e05cc>;
4398	};
4399	/omit-if-no-ref/ mx6sx_pad_sd4_data1__ecspi3_rdy: MX6SX_PAD_SD4_DATA1__ECSPI3_RDY {
4400		pinmux = <0x420e0284 6 0x420e0000 0 0x420e05cc>;
4401	};
4402	/omit-if-no-ref/ mx6sx_pad_sd4_data1__tpsmp_hdata_22: MX6SX_PAD_SD4_DATA1__TPSMP_HDATA_22 {
4403		pinmux = <0x420e0284 7 0x420e0000 0 0x420e05cc>;
4404	};
4405	/omit-if-no-ref/ mx6sx_pad_sd4_data1__vdec_debug_14: MX6SX_PAD_SD4_DATA1__VDEC_DEBUG_14 {
4406		pinmux = <0x420e0284 8 0x420e0000 0 0x420e05cc>;
4407	};
4408	/omit-if-no-ref/ mx6sx_pad_sd4_data1__sdma_debug_bus_error: MX6SX_PAD_SD4_DATA1__SDMA_DEBUG_BUS_ERROR {
4409		pinmux = <0x420e0284 9 0x420e0000 0 0x420e05cc>;
4410	};
4411	/omit-if-no-ref/ mx6sx_pad_sd4_data2__usdhc4_data2: MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 {
4412		pinmux = <0x420e0288 0 0x420e0000 0 0x420e05d0>;
4413	};
4414	/omit-if-no-ref/ mx6sx_pad_sd4_data2__rawnand_data12: MX6SX_PAD_SD4_DATA2__RAWNAND_DATA12 {
4415		pinmux = <0x420e0288 1 0x420e0000 0 0x420e05d0>;
4416	};
4417	/omit-if-no-ref/ mx6sx_pad_sd4_data2__i2c2_sda: MX6SX_PAD_SD4_DATA2__I2C2_SDA {
4418		pinmux = <0x420e0288 2 0x420e07b4 0 0x420e05d0>;
4419	};
4420	/omit-if-no-ref/ mx6sx_pad_sd4_data2__audmux_aud3_txfs: MX6SX_PAD_SD4_DATA2__AUDMUX_AUD3_TXFS {
4421		pinmux = <0x420e0288 3 0x420e0640 0 0x420e05d0>;
4422	};
4423	/omit-if-no-ref/ mx6sx_pad_sd4_data2__lcdif2_data_10: MX6SX_PAD_SD4_DATA2__LCDIF2_DATA_10 {
4424		pinmux = <0x420e0288 4 0x420e0000 0 0x420e05d0>;
4425	};
4426	/omit-if-no-ref/ mx6sx_pad_sd4_data2__gpio6_io_16: MX6SX_PAD_SD4_DATA2__GPIO6_IO_16 {
4427		pinmux = <0x420e0288 5 0x420e0000 0 0x420e05d0>;
4428	};
4429	/omit-if-no-ref/ mx6sx_pad_sd4_data2__ecspi2_ss3: MX6SX_PAD_SD4_DATA2__ECSPI2_SS3 {
4430		pinmux = <0x420e0288 6 0x420e0000 0 0x420e05d0>;
4431	};
4432	/omit-if-no-ref/ mx6sx_pad_sd4_data2__tpsmp_hdata_23: MX6SX_PAD_SD4_DATA2__TPSMP_HDATA_23 {
4433		pinmux = <0x420e0288 7 0x420e0000 0 0x420e05d0>;
4434	};
4435	/omit-if-no-ref/ mx6sx_pad_sd4_data2__vdec_debug_15: MX6SX_PAD_SD4_DATA2__VDEC_DEBUG_15 {
4436		pinmux = <0x420e0288 8 0x420e0000 0 0x420e05d0>;
4437	};
4438	/omit-if-no-ref/ mx6sx_pad_sd4_data2__sdma_debug_bus_rwb: MX6SX_PAD_SD4_DATA2__SDMA_DEBUG_BUS_RWB {
4439		pinmux = <0x420e0288 9 0x420e0000 0 0x420e05d0>;
4440	};
4441	/omit-if-no-ref/ mx6sx_pad_sd4_data3__usdhc4_data3: MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 {
4442		pinmux = <0x420e028c 0 0x420e0000 0 0x420e05d4>;
4443	};
4444	/omit-if-no-ref/ mx6sx_pad_sd4_data3__rawnand_data13: MX6SX_PAD_SD4_DATA3__RAWNAND_DATA13 {
4445		pinmux = <0x420e028c 1 0x420e0000 0 0x420e05d4>;
4446	};
4447	/omit-if-no-ref/ mx6sx_pad_sd4_data3__i2c2_scl: MX6SX_PAD_SD4_DATA3__I2C2_SCL {
4448		pinmux = <0x420e028c 2 0x420e07b0 0 0x420e05d4>;
4449	};
4450	/omit-if-no-ref/ mx6sx_pad_sd4_data3__audmux_aud3_txd: MX6SX_PAD_SD4_DATA3__AUDMUX_AUD3_TXD {
4451		pinmux = <0x420e028c 3 0x420e0630 0 0x420e05d4>;
4452	};
4453	/omit-if-no-ref/ mx6sx_pad_sd4_data3__lcdif2_data_9: MX6SX_PAD_SD4_DATA3__LCDIF2_DATA_9 {
4454		pinmux = <0x420e028c 4 0x420e0000 0 0x420e05d4>;
4455	};
4456	/omit-if-no-ref/ mx6sx_pad_sd4_data3__gpio6_io_17: MX6SX_PAD_SD4_DATA3__GPIO6_IO_17 {
4457		pinmux = <0x420e028c 5 0x420e0000 0 0x420e05d4>;
4458	};
4459	/omit-if-no-ref/ mx6sx_pad_sd4_data3__ecspi2_rdy: MX6SX_PAD_SD4_DATA3__ECSPI2_RDY {
4460		pinmux = <0x420e028c 6 0x420e0000 0 0x420e05d4>;
4461	};
4462	/omit-if-no-ref/ mx6sx_pad_sd4_data3__tpsmp_hdata_24: MX6SX_PAD_SD4_DATA3__TPSMP_HDATA_24 {
4463		pinmux = <0x420e028c 7 0x420e0000 0 0x420e05d4>;
4464	};
4465	/omit-if-no-ref/ mx6sx_pad_sd4_data3__vdec_debug_16: MX6SX_PAD_SD4_DATA3__VDEC_DEBUG_16 {
4466		pinmux = <0x420e028c 8 0x420e0000 0 0x420e05d4>;
4467	};
4468	/omit-if-no-ref/ mx6sx_pad_sd4_data3__sdma_debug_matched_dmbus: MX6SX_PAD_SD4_DATA3__SDMA_DEBUG_MATCHED_DMBUS {
4469		pinmux = <0x420e028c 9 0x420e0000 0 0x420e05d4>;
4470	};
4471	/omit-if-no-ref/ mx6sx_pad_sd4_data4__usdhc4_data4: MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 {
4472		pinmux = <0x420e0290 0 0x420e0000 0 0x420e05d8>;
4473	};
4474	/omit-if-no-ref/ mx6sx_pad_sd4_data4__rawnand_data09: MX6SX_PAD_SD4_DATA4__RAWNAND_DATA09 {
4475		pinmux = <0x420e0290 1 0x420e0000 0 0x420e05d8>;
4476	};
4477	/omit-if-no-ref/ mx6sx_pad_sd4_data4__uart5_dce_rx: MX6SX_PAD_SD4_DATA4__UART5_DCE_RX {
4478		pinmux = <0x420e0290 2 0x420e0850 0 0x420e05d8>;
4479	};
4480	/omit-if-no-ref/ mx6sx_pad_sd4_data4__uart5_dte_tx: MX6SX_PAD_SD4_DATA4__UART5_DTE_TX {
4481		pinmux = <0x420e0290 2 0x420e0000 0 0x420e05d8>;
4482	};
4483	/omit-if-no-ref/ mx6sx_pad_sd4_data4__ecspi3_sclk: MX6SX_PAD_SD4_DATA4__ECSPI3_SCLK {
4484		pinmux = <0x420e0290 3 0x420e0730 0 0x420e05d8>;
4485	};
4486	/omit-if-no-ref/ mx6sx_pad_sd4_data4__lcdif2_data_8: MX6SX_PAD_SD4_DATA4__LCDIF2_DATA_8 {
4487		pinmux = <0x420e0290 4 0x420e0000 0 0x420e05d8>;
4488	};
4489	/omit-if-no-ref/ mx6sx_pad_sd4_data4__gpio6_io_18: MX6SX_PAD_SD4_DATA4__GPIO6_IO_18 {
4490		pinmux = <0x420e0290 5 0x420e0000 0 0x420e05d8>;
4491	};
4492	/omit-if-no-ref/ mx6sx_pad_sd4_data4__spdif_out: MX6SX_PAD_SD4_DATA4__SPDIF_OUT {
4493		pinmux = <0x420e0290 6 0x420e0000 0 0x420e05d8>;
4494	};
4495	/omit-if-no-ref/ mx6sx_pad_sd4_data4__tpsmp_hdata_16: MX6SX_PAD_SD4_DATA4__TPSMP_HDATA_16 {
4496		pinmux = <0x420e0290 7 0x420e0000 0 0x420e05d8>;
4497	};
4498	/omit-if-no-ref/ mx6sx_pad_sd4_data4__usb_otg_host_mode: MX6SX_PAD_SD4_DATA4__USB_OTG_HOST_MODE {
4499		pinmux = <0x420e0290 8 0x420e0000 0 0x420e05d8>;
4500	};
4501	/omit-if-no-ref/ mx6sx_pad_sd4_data4__sdma_debug_rtbuffer_write: MX6SX_PAD_SD4_DATA4__SDMA_DEBUG_RTBUFFER_WRITE {
4502		pinmux = <0x420e0290 9 0x420e0000 0 0x420e05d8>;
4503	};
4504	/omit-if-no-ref/ mx6sx_pad_sd4_data5__usdhc4_data5: MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 {
4505		pinmux = <0x420e0294 0 0x420e0000 0 0x420e05dc>;
4506	};
4507	/omit-if-no-ref/ mx6sx_pad_sd4_data5__rawnand_ce2_b: MX6SX_PAD_SD4_DATA5__RAWNAND_CE2_B {
4508		pinmux = <0x420e0294 1 0x420e0000 0 0x420e05dc>;
4509	};
4510	/omit-if-no-ref/ mx6sx_pad_sd4_data5__uart5_dce_tx: MX6SX_PAD_SD4_DATA5__UART5_DCE_TX {
4511		pinmux = <0x420e0294 2 0x420e0000 0 0x420e05dc>;
4512	};
4513	/omit-if-no-ref/ mx6sx_pad_sd4_data5__uart5_dte_rx: MX6SX_PAD_SD4_DATA5__UART5_DTE_RX {
4514		pinmux = <0x420e0294 2 0x420e0850 1 0x420e05dc>;
4515	};
4516	/omit-if-no-ref/ mx6sx_pad_sd4_data5__ecspi3_mosi: MX6SX_PAD_SD4_DATA5__ECSPI3_MOSI {
4517		pinmux = <0x420e0294 3 0x420e0738 0 0x420e05dc>;
4518	};
4519	/omit-if-no-ref/ mx6sx_pad_sd4_data5__lcdif2_data_7: MX6SX_PAD_SD4_DATA5__LCDIF2_DATA_7 {
4520		pinmux = <0x420e0294 4 0x420e0000 0 0x420e05dc>;
4521	};
4522	/omit-if-no-ref/ mx6sx_pad_sd4_data5__gpio6_io_19: MX6SX_PAD_SD4_DATA5__GPIO6_IO_19 {
4523		pinmux = <0x420e0294 5 0x420e0000 0 0x420e05dc>;
4524	};
4525	/omit-if-no-ref/ mx6sx_pad_sd4_data5__spdif_in: MX6SX_PAD_SD4_DATA5__SPDIF_IN {
4526		pinmux = <0x420e0294 6 0x420e0824 0 0x420e05dc>;
4527	};
4528	/omit-if-no-ref/ mx6sx_pad_sd4_data5__tpsmp_hdata_17: MX6SX_PAD_SD4_DATA5__TPSMP_HDATA_17 {
4529		pinmux = <0x420e0294 7 0x420e0000 0 0x420e05dc>;
4530	};
4531	/omit-if-no-ref/ mx6sx_pad_sd4_data5__vdec_debug_9: MX6SX_PAD_SD4_DATA5__VDEC_DEBUG_9 {
4532		pinmux = <0x420e0294 8 0x420e0000 0 0x420e05dc>;
4533	};
4534	/omit-if-no-ref/ mx6sx_pad_sd4_data5__sdma_debug_event_channel_0: MX6SX_PAD_SD4_DATA5__SDMA_DEBUG_EVENT_CHANNEL_0 {
4535		pinmux = <0x420e0294 9 0x420e0000 0 0x420e05dc>;
4536	};
4537	/omit-if-no-ref/ mx6sx_pad_sd4_data6__usdhc4_data6: MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 {
4538		pinmux = <0x420e0298 0 0x420e0000 0 0x420e05e0>;
4539	};
4540	/omit-if-no-ref/ mx6sx_pad_sd4_data6__rawnand_ce3_b: MX6SX_PAD_SD4_DATA6__RAWNAND_CE3_B {
4541		pinmux = <0x420e0298 1 0x420e0000 0 0x420e05e0>;
4542	};
4543	/omit-if-no-ref/ mx6sx_pad_sd4_data6__uart5_dce_rts: MX6SX_PAD_SD4_DATA6__UART5_DCE_RTS {
4544		pinmux = <0x420e0298 2 0x420e084c 0 0x420e05e0>;
4545	};
4546	/omit-if-no-ref/ mx6sx_pad_sd4_data6__uart5_dte_cts: MX6SX_PAD_SD4_DATA6__UART5_DTE_CTS {
4547		pinmux = <0x420e0298 2 0x420e0000 0 0x420e05e0>;
4548	};
4549	/omit-if-no-ref/ mx6sx_pad_sd4_data6__ecspi3_miso: MX6SX_PAD_SD4_DATA6__ECSPI3_MISO {
4550		pinmux = <0x420e0298 3 0x420e0734 0 0x420e05e0>;
4551	};
4552	/omit-if-no-ref/ mx6sx_pad_sd4_data6__lcdif2_data_6: MX6SX_PAD_SD4_DATA6__LCDIF2_DATA_6 {
4553		pinmux = <0x420e0298 4 0x420e0000 0 0x420e05e0>;
4554	};
4555	/omit-if-no-ref/ mx6sx_pad_sd4_data6__gpio6_io_20: MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 {
4556		pinmux = <0x420e0298 5 0x420e0000 0 0x420e05e0>;
4557	};
4558	/omit-if-no-ref/ mx6sx_pad_sd4_data6__usdhc4_wp: MX6SX_PAD_SD4_DATA6__USDHC4_WP {
4559		pinmux = <0x420e0298 6 0x420e0878 0 0x420e05e0>;
4560	};
4561	/omit-if-no-ref/ mx6sx_pad_sd4_data6__tpsmp_hdata_18: MX6SX_PAD_SD4_DATA6__TPSMP_HDATA_18 {
4562		pinmux = <0x420e0298 7 0x420e0000 0 0x420e05e0>;
4563	};
4564	/omit-if-no-ref/ mx6sx_pad_sd4_data6__vdec_debug_10: MX6SX_PAD_SD4_DATA6__VDEC_DEBUG_10 {
4565		pinmux = <0x420e0298 8 0x420e0000 0 0x420e05e0>;
4566	};
4567	/omit-if-no-ref/ mx6sx_pad_sd4_data6__sdma_debug_event_channel_1: MX6SX_PAD_SD4_DATA6__SDMA_DEBUG_EVENT_CHANNEL_1 {
4568		pinmux = <0x420e0298 9 0x420e0000 0 0x420e05e0>;
4569	};
4570	/omit-if-no-ref/ mx6sx_pad_sd4_data7__usdhc4_data7: MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 {
4571		pinmux = <0x420e029c 0 0x420e0000 0 0x420e05e4>;
4572	};
4573	/omit-if-no-ref/ mx6sx_pad_sd4_data7__rawnand_data08: MX6SX_PAD_SD4_DATA7__RAWNAND_DATA08 {
4574		pinmux = <0x420e029c 1 0x420e0000 0 0x420e05e4>;
4575	};
4576	/omit-if-no-ref/ mx6sx_pad_sd4_data7__uart5_dce_cts: MX6SX_PAD_SD4_DATA7__UART5_DCE_CTS {
4577		pinmux = <0x420e029c 2 0x420e0000 0 0x420e05e4>;
4578	};
4579	/omit-if-no-ref/ mx6sx_pad_sd4_data7__uart5_dte_rts: MX6SX_PAD_SD4_DATA7__UART5_DTE_RTS {
4580		pinmux = <0x420e029c 2 0x420e084c 1 0x420e05e4>;
4581	};
4582	/omit-if-no-ref/ mx6sx_pad_sd4_data7__ecspi3_ss0: MX6SX_PAD_SD4_DATA7__ECSPI3_SS0 {
4583		pinmux = <0x420e029c 3 0x420e073c 0 0x420e05e4>;
4584	};
4585	/omit-if-no-ref/ mx6sx_pad_sd4_data7__lcdif2_data_15: MX6SX_PAD_SD4_DATA7__LCDIF2_DATA_15 {
4586		pinmux = <0x420e029c 4 0x420e0000 0 0x420e05e4>;
4587	};
4588	/omit-if-no-ref/ mx6sx_pad_sd4_data7__gpio6_io_21: MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 {
4589		pinmux = <0x420e029c 5 0x420e0000 0 0x420e05e4>;
4590	};
4591	/omit-if-no-ref/ mx6sx_pad_sd4_data7__usdhc4_cd_b: MX6SX_PAD_SD4_DATA7__USDHC4_CD_B {
4592		pinmux = <0x420e029c 6 0x420e0874 0 0x420e05e4>;
4593	};
4594	/omit-if-no-ref/ mx6sx_pad_sd4_data7__tpsmp_hdata_15: MX6SX_PAD_SD4_DATA7__TPSMP_HDATA_15 {
4595		pinmux = <0x420e029c 7 0x420e0000 0 0x420e05e4>;
4596	};
4597	/omit-if-no-ref/ mx6sx_pad_sd4_data7__usb_otg_pwr_wake: MX6SX_PAD_SD4_DATA7__USB_OTG_PWR_WAKE {
4598		pinmux = <0x420e029c 8 0x420e0000 0 0x420e05e4>;
4599	};
4600	/omit-if-no-ref/ mx6sx_pad_sd4_data7__sdma_debug_yield: MX6SX_PAD_SD4_DATA7__SDMA_DEBUG_YIELD {
4601		pinmux = <0x420e029c 9 0x420e0000 0 0x420e05e4>;
4602	};
4603	/omit-if-no-ref/ mx6sx_pad_sd4_reset_b__usdhc4_reset_b: MX6SX_PAD_SD4_RESET_B__USDHC4_RESET_B {
4604		pinmux = <0x420e02a0 0 0x420e0000 0 0x420e05e8>;
4605	};
4606	/omit-if-no-ref/ mx6sx_pad_sd4_reset_b__rawnand_dqs: MX6SX_PAD_SD4_RESET_B__RAWNAND_DQS {
4607		pinmux = <0x420e02a0 1 0x420e0000 0 0x420e05e8>;
4608	};
4609	/omit-if-no-ref/ mx6sx_pad_sd4_reset_b__usdhc4_reset: MX6SX_PAD_SD4_RESET_B__USDHC4_RESET {
4610		pinmux = <0x420e02a0 2 0x420e0000 0 0x420e05e8>;
4611	};
4612	/omit-if-no-ref/ mx6sx_pad_sd4_reset_b__audmux_mclk: MX6SX_PAD_SD4_RESET_B__AUDMUX_MCLK {
4613		pinmux = <0x420e02a0 3 0x420e0000 0 0x420e05e8>;
4614	};
4615	/omit-if-no-ref/ mx6sx_pad_sd4_reset_b__lcdif2_reset: MX6SX_PAD_SD4_RESET_B__LCDIF2_RESET {
4616		pinmux = <0x420e02a0 4 0x420e0000 0 0x420e05e8>;
4617	};
4618	/omit-if-no-ref/ mx6sx_pad_sd4_reset_b__gpio6_io_22: MX6SX_PAD_SD4_RESET_B__GPIO6_IO_22 {
4619		pinmux = <0x420e02a0 5 0x420e0000 0 0x420e05e8>;
4620	};
4621	/omit-if-no-ref/ mx6sx_pad_sd4_reset_b__lcdif2_cs: MX6SX_PAD_SD4_RESET_B__LCDIF2_CS {
4622		pinmux = <0x420e02a0 6 0x420e0000 0 0x420e05e8>;
4623	};
4624	/omit-if-no-ref/ mx6sx_pad_sd4_reset_b__tpsmp_hdata_25: MX6SX_PAD_SD4_RESET_B__TPSMP_HDATA_25 {
4625		pinmux = <0x420e02a0 7 0x420e0000 0 0x420e05e8>;
4626	};
4627	/omit-if-no-ref/ mx6sx_pad_sd4_reset_b__vdec_debug_17: MX6SX_PAD_SD4_RESET_B__VDEC_DEBUG_17 {
4628		pinmux = <0x420e02a0 8 0x420e0000 0 0x420e05e8>;
4629	};
4630	/omit-if-no-ref/ mx6sx_pad_sd4_reset_b__sdma_debug_bus_device_2: MX6SX_PAD_SD4_RESET_B__SDMA_DEBUG_BUS_DEVICE_2 {
4631		pinmux = <0x420e02a0 9 0x420e0000 0 0x420e05e8>;
4632	};
4633	/omit-if-no-ref/ mx6sx_pad_usb_h_data__usb_h_data: MX6SX_PAD_USB_H_DATA__USB_H_DATA {
4634		pinmux = <0x420e02a4 0 0x420e0000 0 0x420e05ec>;
4635	};
4636	/omit-if-no-ref/ mx6sx_pad_usb_h_data__pwm2_out: MX6SX_PAD_USB_H_DATA__PWM2_OUT {
4637		pinmux = <0x420e02a4 1 0x420e0000 0 0x420e05ec>;
4638	};
4639	/omit-if-no-ref/ mx6sx_pad_usb_h_data__anatop_24m_out: MX6SX_PAD_USB_H_DATA__ANATOP_24M_OUT {
4640		pinmux = <0x420e02a4 2 0x420e0000 0 0x420e05ec>;
4641	};
4642	/omit-if-no-ref/ mx6sx_pad_usb_h_data__i2c4_sda: MX6SX_PAD_USB_H_DATA__I2C4_SDA {
4643		pinmux = <0x420e02a4 3 0x420e07c4 1 0x420e05ec>;
4644	};
4645	/omit-if-no-ref/ mx6sx_pad_usb_h_data__wdog3_wdog_b: MX6SX_PAD_USB_H_DATA__WDOG3_WDOG_B {
4646		pinmux = <0x420e02a4 4 0x420e0000 0 0x420e05ec>;
4647	};
4648	/omit-if-no-ref/ mx6sx_pad_usb_h_data__gpio7_io_10: MX6SX_PAD_USB_H_DATA__GPIO7_IO_10 {
4649		pinmux = <0x420e02a4 5 0x420e0000 0 0x420e05ec>;
4650	};
4651	/omit-if-no-ref/ mx6sx_pad_usb_h_strobe__usb_h_strobe: MX6SX_PAD_USB_H_STROBE__USB_H_STROBE {
4652		pinmux = <0x420e02a8 0 0x420e0000 0 0x420e05f0>;
4653	};
4654	/omit-if-no-ref/ mx6sx_pad_usb_h_strobe__pwm1_out: MX6SX_PAD_USB_H_STROBE__PWM1_OUT {
4655		pinmux = <0x420e02a8 1 0x420e0000 0 0x420e05f0>;
4656	};
4657	/omit-if-no-ref/ mx6sx_pad_usb_h_strobe__anatop_32k_out: MX6SX_PAD_USB_H_STROBE__ANATOP_32K_OUT {
4658		pinmux = <0x420e02a8 2 0x420e0000 0 0x420e05f0>;
4659	};
4660	/omit-if-no-ref/ mx6sx_pad_usb_h_strobe__i2c4_scl: MX6SX_PAD_USB_H_STROBE__I2C4_SCL {
4661		pinmux = <0x420e02a8 3 0x420e07c0 1 0x420e05f0>;
4662	};
4663	/omit-if-no-ref/ mx6sx_pad_usb_h_strobe__wdog3_wdog_rst_b_deb: MX6SX_PAD_USB_H_STROBE__WDOG3_WDOG_RST_B_DEB {
4664		pinmux = <0x420e02a8 4 0x420e0000 0 0x420e05f0>;
4665	};
4666	/omit-if-no-ref/ mx6sx_pad_usb_h_strobe__gpio7_io_11: MX6SX_PAD_USB_H_STROBE__GPIO7_IO_11 {
4667		pinmux = <0x420e02a8 5 0x420e0000 0 0x420e05f0>;
4668	};
4669};
4670