1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2019 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _FSL_ADC12_H_
10 #define _FSL_ADC12_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup adc12
16 * @{
17 */
18
19 /*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22 /*! @brief ADC12 driver version */
23 #define FSL_ADC12_DRIVER_VERSION (MAKE_VERSION(2, 0, 4)) /*!< Version 2.0.4. */
24
25 /*!
26 * @brief Channel status flags' mask.
27 */
28 enum _adc12_channel_status_flags
29 {
30 kADC12_ChannelConversionCompletedFlag = ADC_SC1_COCO_MASK, /*!< Conversion done. */
31 };
32
33 /*!
34 * @brief Converter status flags' mask.
35 */
36 enum _adc12_status_flags
37 {
38 kADC12_ActiveFlag = ADC_SC2_ADACT_MASK, /*!< Converter is active. */
39 kADC12_CalibrationFailedFlag = (ADC_SC2_ADACT_MASK << 1U), /*!< Calibration is failed. */
40 };
41
42 /*!
43 * @brief Clock divider for the converter.
44 */
45 typedef enum _adc12_clock_divider
46 {
47 kADC12_ClockDivider1 = 0U, /*!< For divider 1 from the input clock to the module. */
48 kADC12_ClockDivider2 = 1U, /*!< For divider 2 from the input clock to the module. */
49 kADC12_ClockDivider4 = 2U, /*!< For divider 4 from the input clock to the module. */
50 kADC12_ClockDivider8 = 3U, /*!< For divider 8 from the input clock to the module. */
51 } adc12_clock_divider_t;
52
53 /*!
54 * @brief Converter's resolution.
55 */
56 typedef enum _adc12_resolution
57 {
58 kADC12_Resolution8Bit = 0U, /*!< 8 bit resolution. */
59 kADC12_Resolution12Bit = 1U, /*!< 12 bit resolution. */
60 kADC12_Resolution10Bit = 2U, /*!< 10 bit resolution. */
61 } adc12_resolution_t;
62
63 /*!
64 * @brief Conversion clock source.
65 */
66 typedef enum _adc12_clock_source
67 {
68 kADC12_ClockSourceAlt0 = 0U, /*!< Alternate clock 1 (ADC_ALTCLK1). */
69 kADC12_ClockSourceAlt1 = 1U, /*!< Alternate clock 2 (ADC_ALTCLK2). */
70 kADC12_ClockSourceAlt2 = 2U, /*!< Alternate clock 3 (ADC_ALTCLK3). */
71 kADC12_ClockSourceAlt3 = 3U, /*!< Alternate clock 4 (ADC_ALTCLK4). */
72 } adc12_clock_source_t;
73
74 /*!
75 * @brief Reference voltage source.
76 */
77 typedef enum _adc12_reference_voltage_source
78 {
79 kADC12_ReferenceVoltageSourceVref = 0U, /*!< For external pins pair of VrefH and VrefL. */
80 kADC12_ReferenceVoltageSourceValt = 1U, /*!< For alternate reference pair of ValtH and ValtL. */
81 } adc12_reference_voltage_source_t;
82
83 /*!
84 * @brief Hardware average mode.
85 */
86 typedef enum _adc12_hardware_average_mode
87 {
88 kADC12_HardwareAverageCount4 = 0U, /*!< For hardware average with 4 samples. */
89 kADC12_HardwareAverageCount8 = 1U, /*!< For hardware average with 8 samples. */
90 kADC12_HardwareAverageCount16 = 2U, /*!< For hardware average with 16 samples. */
91 kADC12_HardwareAverageCount32 = 3U, /*!< For hardware average with 32 samples. */
92 kADC12_HardwareAverageDisabled = 4U, /*!< Disable the hardware average feature.*/
93 } adc12_hardware_average_mode_t;
94
95 /*!
96 * @brief Hardware compare mode.
97 */
98 typedef enum _adc12_hardware_compare_mode
99 {
100 kADC12_HardwareCompareMode0 = 0U, /*!< x < value1. */
101 kADC12_HardwareCompareMode1 = 1U, /*!< x > value1. */
102 kADC12_HardwareCompareMode2 = 2U, /*!< if value1 <= value2, then x < value1 || x > value2;
103 else, value1 > x > value2. */
104 kADC12_HardwareCompareMode3 = 3U, /*!< if value1 <= value2, then value1 <= x <= value2;
105 else x >= value1 || x <= value2. */
106 } adc12_hardware_compare_mode_t;
107
108 /*!
109 * @brief Converter configuration.
110 */
111 typedef struct _adc12_config
112 {
113 adc12_reference_voltage_source_t referenceVoltageSource; /*!< Select the reference voltage source. */
114 adc12_clock_source_t clockSource; /*!< Select the input clock source to converter. */
115 adc12_clock_divider_t clockDivider; /*!< Select the divider of input clock source. */
116 adc12_resolution_t resolution; /*!< Select the sample resolution mode. */
117 uint32_t sampleClockCount; /*!< Select the sample clock count. Add its value may
118 improve the stability of the conversion result. */
119 bool enableContinuousConversion; /*!< Enable continuous conversion mode. */
120 } adc12_config_t;
121
122 /*!
123 * @brief Hardware compare configuration.
124 */
125 typedef struct _adc12_hardware_compare_config
126 {
127 adc12_hardware_compare_mode_t hardwareCompareMode; /*!< Select the hardware compare mode. */
128 int16_t value1; /*!< Setting value1 for hardware compare mode. */
129 int16_t value2; /*!< Setting value2 for hardware compare mode. */
130 } adc12_hardware_compare_config_t;
131
132 /*!
133 * @brief Channel conversion configuration.
134 */
135 typedef struct _adc12_channel_config
136 {
137 uint32_t channelNumber; /*!< Setting the conversion channel number. The available range is 0-31.
138 See channel connection information for each chip in Reference Manual
139 document. */
140 bool enableInterruptOnConversionCompleted; /*!< Generate a interrupt request once the conversion is completed. */
141 } adc12_channel_config_t;
142
143 /*******************************************************************************
144 * API
145 ******************************************************************************/
146 #if defined(__cplusplus)
147 extern "C" {
148 #endif
149
150 /*!
151 * @name Initialization
152 * @{
153 */
154
155 /*!
156 * @brief Initialize the ADC12 module.
157 *
158 * @param base ADC12 peripheral base address.
159 * @param config Pointer to "adc12_config_t" structure.
160 */
161 void ADC12_Init(ADC_Type *base, const adc12_config_t *config);
162
163 /*!
164 * @brief De-initialize the ADC12 module.
165 *
166 * @param base ADC12 peripheral base address.
167 */
168 void ADC12_Deinit(ADC_Type *base);
169
170 /*!
171 * @brief Gets an available pre-defined settings for converter's configuration.
172 *
173 * This function initializes the converter configuration structure with an available settings. The default values are:
174 *
175 * Example:
176 @code
177 config->referenceVoltageSource = kADC12_ReferenceVoltageSourceVref;
178 config->clockSource = kADC12_ClockSourceAlt0;
179 config->clockDivider = kADC12_ClockDivider1;
180 config->resolution = kADC12_Resolution8Bit;
181 config->sampleClockCount = 12U;
182 config->enableContinuousConversion = false;
183 @endcode
184 * @param config Pointer to "adc12_config_t" structure.
185 */
186 void ADC12_GetDefaultConfig(adc12_config_t *config);
187 /* @} */
188
189 /*!
190 * @name Basic Operations
191 * @{
192 */
193
194 /*!
195 * @brief Configure the conversion channel.
196 *
197 * This operation triggers the conversion in software trigger mode. In hardware trigger mode, this API configures the
198 * channel while the external trigger source helps to trigger the conversion.
199 *
200 * Note that the "Channel Group" has a detailed description.
201 * To allow sequential conversions of the ADC to be triggered by internal peripherals, the ADC can have more than one
202 * group of status and control register, one for each conversion. The channel group parameter indicates which group of
203 * registers are used, channel group 0 is for Group A registers and channel group 1 is for Group B registers. The
204 * channel groups are used in a "ping-pong" approach to control the ADC operation. At any time, only one of the
205 * channel groups is actively controlling ADC conversions. Channel group 0 is used for both software and hardware
206 * trigger modes of operation. Channel groups 1 and greater indicate potentially multiple channel group registers for
207 * use only in hardware trigger mode. See the chip configuration information in the MCU reference manual about the
208 * number of SC1n registers (channel groups) specific to this device. None of the channel groups 1 or greater are used
209 * for software trigger operation and therefore writes to these channel groups do not initiate a new conversion.
210 * Updating channel group 0 while a different channel group is actively controlling a conversion is allowed and
211 * vice versa. Writing any of the channel group registers while that specific channel group is actively controlling a
212 * conversion aborts the current conversion.
213 *
214 * @param base ADC12 peripheral base address.
215 * @param channelGroup Channel group index.
216 * @param config Pointer to "adc12_channel_config_t" structure.
217 */
218 void ADC12_SetChannelConfig(ADC_Type *base, uint32_t channelGroup, const adc12_channel_config_t *config);
219
220 /*!
221 * @brief Get the conversion value.
222 *
223 * @param base ADC12 peripheral base address.
224 * @param channelGroup Channel group index.
225 *
226 * @return Conversion value.
227 */
ADC12_GetChannelConversionValue(ADC_Type * base,uint32_t channelGroup)228 static inline uint32_t ADC12_GetChannelConversionValue(ADC_Type *base, uint32_t channelGroup)
229 {
230 assert(channelGroup < FSL_FEATURE_ADC12_CONVERSION_CONTROL_COUNT);
231
232 return base->R[channelGroup];
233 }
234
235 /*!
236 * @brief Get the status flags of channel.
237 *
238 * @param base ADC12 peripheral base address.
239 * @param channelGroup Channel group index.
240 *
241 * @return Flags' mask if indicated flags are asserted. See to "_adc12_channel_status_flags".
242 */
243 uint32_t ADC12_GetChannelStatusFlags(ADC_Type *base, uint32_t channelGroup);
244
245 /* @} */
246
247 /*!
248 * @name Advanced Operations
249 * @{
250 */
251
252 /*!
253 * @brief Automate the hardware calibration.
254 *
255 * This auto calibration helps to adjust the gain automatically according to the converter's working environment.
256 * Execute the calibration before conversion. Note that the software trigger should be used during calibration.
257 *
258 * @note The calibration function has bug in the SOC. The calibration failed flag may be set after calibration process
259 * even if you configure the ADC12 as the reference manual correctly. It is a known issue now and may be fixed in the
260 * future.
261 *
262 * @param base ADC12 peripheral base address.
263 * @retval kStatus_Success Calibration is done successfully.
264 * @retval kStatus_Fail Calibration is failed.
265 */
266 status_t ADC12_DoAutoCalibration(ADC_Type *base);
267
268 /*!
269 * @brief Set the offset value for the conversion result.
270 *
271 * This offset value takes effect on the conversion result. If the offset value is not zero, the conversion result is
272 * substracted by it.
273 *
274 * @param base ADC12 peripheral base address.
275 * @param value Offset value.
276 */
ADC12_SetOffsetValue(ADC_Type * base,uint32_t value)277 static inline void ADC12_SetOffsetValue(ADC_Type *base, uint32_t value)
278 {
279 base->USR_OFS = (value & ADC_USR_OFS_USR_OFS_MASK);
280 }
281
282 /*!
283 * @brief Set the gain value for the conversion result.
284 *
285 * This gain value takes effect on the conversion result. If the gain value is not zero, the conversion result is
286 * amplified as it.
287 *
288 * @param base ADC12 peripheral base address.
289 * @param value Gain value.
290 */
ADC12_SetGainValue(ADC_Type * base,uint32_t value)291 static inline void ADC12_SetGainValue(ADC_Type *base, uint32_t value)
292 {
293 base->UG = (value & ADC_UG_UG_MASK);
294 }
295
296 #if defined(FSL_FEATURE_ADC12_HAS_DMA_SUPPORT) && (FSL_FEATURE_ADC12_HAS_DMA_SUPPORT == 1)
297 /*!
298 * @brief Enable generating the DMA trigger when conversion is completed.
299 *
300 * @param base ADC12 peripheral base address.
301 * @param enable Switcher of DMA feature. "true" means to enable, "false" means to disable.
302 */
ADC12_EnableDMA(ADC_Type * base,bool enable)303 static inline void ADC12_EnableDMA(ADC_Type *base, bool enable)
304 {
305 if (enable)
306 {
307 base->SC2 |= ADC_SC2_DMAEN_MASK;
308 }
309 else
310 {
311 base->SC2 &= ~ADC_SC2_DMAEN_MASK;
312 }
313 }
314 #endif /* FSL_FEATURE_ADC12_HAS_DMA_SUPPORT */
315
316 /*!
317 * @brief Enable of disable the hardware trigger mode.
318 *
319 * @param base ADC12 peripheral base address.
320 * @param enable Switcher of hardware trigger feature. "true" means to enable, "false" means not.
321 */
ADC12_EnableHardwareTrigger(ADC_Type * base,bool enable)322 static inline void ADC12_EnableHardwareTrigger(ADC_Type *base, bool enable)
323 {
324 if (enable)
325 {
326 base->SC2 |= ADC_SC2_ADTRG_MASK;
327 }
328 else
329 {
330 base->SC2 &= ~ADC_SC2_ADTRG_MASK;
331 }
332 }
333
334 /*!
335 * @brief Configure the hardware compare mode.
336 *
337 * The hardware compare mode provides a way to process the conversion result automatically by hardware. Only the result
338 * in compare range is available. To compare the range, see "adc12_hardware_compare_mode_t", or the reference manual
339 * document for more detailed information.
340 *
341 * @param base ADC12 peripheral base address.
342 * @param config Pointer to "adc12_hardware_compare_config_t" structure. Pass "NULL" to disable the feature.
343 */
344 void ADC12_SetHardwareCompareConfig(ADC_Type *base, const adc12_hardware_compare_config_t *config);
345
346 /*!
347 * @brief Set the hardware average mode.
348 *
349 * Hardware average mode provides a way to process the conversion result automatically by hardware. The multiple
350 * conversion results are accumulated and averaged internally. This aids to get more accurate conversion result.
351 *
352 * @param base ADC12 peripheral base address.
353 * @param mode Setting hardware average mode. See to "adc12_hardware_average_mode_t".
354 */
355 void ADC12_SetHardwareAverage(ADC_Type *base, adc12_hardware_average_mode_t mode);
356
357 /*!
358 * @brief Get the status flags of the converter.
359 *
360 * @param base ADC12 peripheral base address.
361 *
362 * @return Flags' mask if indicated flags are asserted. See to "_adc12_status_flags".
363 */
364 uint32_t ADC12_GetStatusFlags(ADC_Type *base);
365
366 /* @} */
367
368 #if defined(__cplusplus)
369 }
370 #endif
371
372 /*! @}*/
373
374 #endif /* _FSL_ADC12_H_ */
375