1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2021 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef _FSL_LPI2C_H_
9 #define _FSL_LPI2C_H_
10
11 #include <stddef.h>
12 #include "fsl_device_registers.h"
13 #include "fsl_common.h"
14
15 /*******************************************************************************
16 * Definitions
17 ******************************************************************************/
18
19 /*!
20 * @addtogroup lpi2c
21 * @{
22 */
23
24 /*! @name Driver version */
25 /*@{*/
26 /*! @brief LPI2C driver version. */
27 #define FSL_LPI2C_DRIVER_VERSION (MAKE_VERSION(2, 3, 0))
28 /*@}*/
29
30 /*! @brief Retry times for waiting flag. */
31 #ifndef I2C_RETRY_TIMES
32 #define I2C_RETRY_TIMES 0U /* Define to zero means keep waiting until the flag is assert/deassert. */
33 #endif
34
35 /*! @brief LPI2C status return codes. */
36 enum
37 {
38 kStatus_LPI2C_Busy = MAKE_STATUS(kStatusGroup_LPI2C, 0), /*!< The master is already performing a transfer. */
39 kStatus_LPI2C_Idle = MAKE_STATUS(kStatusGroup_LPI2C, 1), /*!< The slave driver is idle. */
40 kStatus_LPI2C_Nak = MAKE_STATUS(kStatusGroup_LPI2C, 2), /*!< The slave device sent a NAK in response to a byte. */
41 kStatus_LPI2C_FifoError = MAKE_STATUS(kStatusGroup_LPI2C, 3), /*!< FIFO under run or overrun. */
42 kStatus_LPI2C_BitError = MAKE_STATUS(kStatusGroup_LPI2C, 4), /*!< Transferred bit was not seen on the bus. */
43 kStatus_LPI2C_ArbitrationLost = MAKE_STATUS(kStatusGroup_LPI2C, 5), /*!< Arbitration lost error. */
44 kStatus_LPI2C_PinLowTimeout =
45 MAKE_STATUS(kStatusGroup_LPI2C, 6), /*!< SCL or SDA were held low longer than the timeout. */
46 kStatus_LPI2C_NoTransferInProgress =
47 MAKE_STATUS(kStatusGroup_LPI2C, 7), /*!< Attempt to abort a transfer when one is not in progress. */
48 kStatus_LPI2C_DmaRequestFail = MAKE_STATUS(kStatusGroup_LPI2C, 8), /*!< DMA request failed. */
49 kStatus_LPI2C_Timeout = MAKE_STATUS(kStatusGroup_LPI2C, 9), /*!< Timeout polling status flags. */
50 };
51
52 /*! @} */
53
54 /*!
55 * @addtogroup lpi2c_master_driver
56 * @{
57 */
58
59 /*!
60 * @brief LPI2C master peripheral flags.
61 *
62 * The following status register flags can be cleared:
63 * - #kLPI2C_MasterEndOfPacketFlag
64 * - #kLPI2C_MasterStopDetectFlag
65 * - #kLPI2C_MasterNackDetectFlag
66 * - #kLPI2C_MasterArbitrationLostFlag
67 * - #kLPI2C_MasterFifoErrFlag
68 * - #kLPI2C_MasterPinLowTimeoutFlag
69 * - #kLPI2C_MasterDataMatchFlag
70 *
71 * All flags except #kLPI2C_MasterBusyFlag and #kLPI2C_MasterBusBusyFlag can be enabled as
72 * interrupts.
73 *
74 * @note These enums are meant to be OR'd together to form a bit mask.
75 */
76 enum _lpi2c_master_flags
77 {
78 kLPI2C_MasterTxReadyFlag = LPI2C_MSR_TDF_MASK, /*!< Transmit data flag */
79 kLPI2C_MasterRxReadyFlag = LPI2C_MSR_RDF_MASK, /*!< Receive data flag */
80 kLPI2C_MasterEndOfPacketFlag = LPI2C_MSR_EPF_MASK, /*!< End Packet flag */
81 kLPI2C_MasterStopDetectFlag = LPI2C_MSR_SDF_MASK, /*!< Stop detect flag */
82 kLPI2C_MasterNackDetectFlag = LPI2C_MSR_NDF_MASK, /*!< NACK detect flag */
83 kLPI2C_MasterArbitrationLostFlag = LPI2C_MSR_ALF_MASK, /*!< Arbitration lost flag */
84 kLPI2C_MasterFifoErrFlag = LPI2C_MSR_FEF_MASK, /*!< FIFO error flag */
85 kLPI2C_MasterPinLowTimeoutFlag = LPI2C_MSR_PLTF_MASK, /*!< Pin low timeout flag */
86 kLPI2C_MasterDataMatchFlag = LPI2C_MSR_DMF_MASK, /*!< Data match flag */
87 kLPI2C_MasterBusyFlag = LPI2C_MSR_MBF_MASK, /*!< Master busy flag */
88 kLPI2C_MasterBusBusyFlag = LPI2C_MSR_BBF_MASK, /*!< Bus busy flag */
89
90 /*! All flags which are cleared by the driver upon starting a transfer. */
91 kLPI2C_MasterClearFlags = kLPI2C_MasterEndOfPacketFlag | kLPI2C_MasterStopDetectFlag | kLPI2C_MasterNackDetectFlag |
92 kLPI2C_MasterArbitrationLostFlag | kLPI2C_MasterFifoErrFlag |
93 kLPI2C_MasterPinLowTimeoutFlag | kLPI2C_MasterDataMatchFlag,
94 /*! IRQ sources enabled by the non-blocking transactional API. */
95 kLPI2C_MasterIrqFlags = kLPI2C_MasterArbitrationLostFlag | kLPI2C_MasterTxReadyFlag | kLPI2C_MasterRxReadyFlag |
96 kLPI2C_MasterStopDetectFlag | kLPI2C_MasterNackDetectFlag | kLPI2C_MasterPinLowTimeoutFlag |
97 kLPI2C_MasterFifoErrFlag,
98 /*! Errors to check for. */
99 kLPI2C_MasterErrorFlags = kLPI2C_MasterNackDetectFlag | kLPI2C_MasterArbitrationLostFlag |
100 kLPI2C_MasterFifoErrFlag | kLPI2C_MasterPinLowTimeoutFlag
101 };
102
103 /*! @brief Direction of master and slave transfers. */
104 typedef enum _lpi2c_direction
105 {
106 kLPI2C_Write = 0U, /*!< Master transmit. */
107 kLPI2C_Read = 1U /*!< Master receive. */
108 } lpi2c_direction_t;
109
110 /*! @brief LPI2C pin configuration. */
111 typedef enum _lpi2c_master_pin_config
112 {
113 kLPI2C_2PinOpenDrain = 0x0U, /*!< LPI2C Configured for 2-pin open drain mode */
114 kLPI2C_2PinOutputOnly = 0x1U, /*!< LPI2C Configured for 2-pin output only mode (ultra-fast mode) */
115 kLPI2C_2PinPushPull = 0x2U, /*!< LPI2C Configured for 2-pin push-pull mode */
116 kLPI2C_4PinPushPull = 0x3U, /*!< LPI2C Configured for 4-pin push-pull mode */
117 kLPI2C_2PinOpenDrainWithSeparateSlave =
118 0x4U, /*!< LPI2C Configured for 2-pin open drain mode with separate LPI2C slave */
119 kLPI2C_2PinOutputOnlyWithSeparateSlave =
120 0x5U, /*!< LPI2C Configured for 2-pin output only mode(ultra-fast mode) with separate LPI2C slave */
121 kLPI2C_2PinPushPullWithSeparateSlave =
122 0x6U, /*!< LPI2C Configured for 2-pin push-pull mode with separate LPI2C slave */
123 kLPI2C_4PinPushPullWithInvertedOutput = 0x7U /*!< LPI2C Configured for 4-pin push-pull mode(inverted outputs) */
124 } lpi2c_master_pin_config_t;
125
126 /*! @brief LPI2C master host request selection. */
127 typedef enum _lpi2c_host_request_source
128 {
129 kLPI2C_HostRequestExternalPin = 0x0U, /*!< Select the LPI2C_HREQ pin as the host request input */
130 kLPI2C_HostRequestInputTrigger = 0x1U, /*!< Select the input trigger as the host request input */
131 } lpi2c_host_request_source_t;
132
133 /*! @brief LPI2C master host request pin polarity configuration. */
134 typedef enum _lpi2c_host_request_polarity
135 {
136 kLPI2C_HostRequestPinActiveLow = 0x0U, /*!< Configure the LPI2C_HREQ pin active low */
137 kLPI2C_HostRequestPinActiveHigh = 0x1U /*!< Configure the LPI2C_HREQ pin active high */
138 } lpi2c_host_request_polarity_t;
139
140 /*!
141 * @brief Structure with settings to initialize the LPI2C master module.
142 *
143 * This structure holds configuration settings for the LPI2C peripheral. To initialize this
144 * structure to reasonable defaults, call the LPI2C_MasterGetDefaultConfig() function and
145 * pass a pointer to your configuration structure instance.
146 *
147 * The configuration structure can be made constant so it resides in flash.
148 */
149 typedef struct _lpi2c_master_config
150 {
151 bool enableMaster; /*!< Whether to enable master mode. */
152 bool enableDoze; /*!< Whether master is enabled in doze mode. */
153 bool debugEnable; /*!< Enable transfers to continue when halted in debug mode. */
154 bool ignoreAck; /*!< Whether to ignore ACK/NACK. */
155 lpi2c_master_pin_config_t pinConfig; /*!< The pin configuration option. */
156 uint32_t baudRate_Hz; /*!< Desired baud rate in Hertz. */
157 uint32_t busIdleTimeout_ns; /*!< Bus idle timeout in nanoseconds. Set to 0 to disable. */
158 uint32_t pinLowTimeout_ns; /*!< Pin low timeout in nanoseconds. Set to 0 to disable. */
159 uint8_t sdaGlitchFilterWidth_ns; /*!< Width in nanoseconds of glitch filter on SDA pin. Set to 0 to disable. */
160 uint8_t sclGlitchFilterWidth_ns; /*!< Width in nanoseconds of glitch filter on SCL pin. Set to 0 to disable. */
161 struct
162 {
163 bool enable; /*!< Enable host request. */
164 lpi2c_host_request_source_t source; /*!< Host request source. */
165 lpi2c_host_request_polarity_t polarity; /*!< Host request pin polarity. */
166 } hostRequest; /*!< Host request options. */
167 } lpi2c_master_config_t;
168
169 /*! @brief LPI2C master data match configuration modes. */
170 typedef enum _lpi2c_data_match_config_mode
171 {
172 kLPI2C_MatchDisabled = 0x0U, /*!< LPI2C Match Disabled */
173 kLPI2C_1stWordEqualsM0OrM1 = 0x2U, /*!< LPI2C Match Enabled and 1st data word equals MATCH0 OR MATCH1 */
174 kLPI2C_AnyWordEqualsM0OrM1 = 0x3U, /*!< LPI2C Match Enabled and any data word equals MATCH0 OR MATCH1 */
175 kLPI2C_1stWordEqualsM0And2ndWordEqualsM1 =
176 0x4U, /*!< LPI2C Match Enabled and 1st data word equals MATCH0, 2nd data equals MATCH1 */
177 kLPI2C_AnyWordEqualsM0AndNextWordEqualsM1 =
178 0x5U, /*!< LPI2C Match Enabled and any data word equals MATCH0, next data equals MATCH1 */
179 kLPI2C_1stWordAndM1EqualsM0AndM1 =
180 0x6U, /*!< LPI2C Match Enabled and 1st data word and MATCH0 equals MATCH0 and MATCH1 */
181 kLPI2C_AnyWordAndM1EqualsM0AndM1 =
182 0x7U /*!< LPI2C Match Enabled and any data word and MATCH0 equals MATCH0 and MATCH1 */
183 } lpi2c_data_match_config_mode_t;
184
185 /*! @brief LPI2C master data match configuration structure. */
186 typedef struct _lpi2c_match_config
187 {
188 lpi2c_data_match_config_mode_t matchMode; /*!< Data match configuration setting. */
189 bool rxDataMatchOnly; /*!< When set to true, received data is ignored until a successful match. */
190 uint32_t match0; /*!< Match value 0. */
191 uint32_t match1; /*!< Match value 1. */
192 } lpi2c_data_match_config_t;
193
194 /* Forward declaration of the transfer descriptor and handle typedefs. */
195 typedef struct _lpi2c_master_transfer lpi2c_master_transfer_t;
196 typedef struct _lpi2c_master_handle lpi2c_master_handle_t;
197
198 /*!
199 * @brief Master completion callback function pointer type.
200 *
201 * This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use
202 * in the call to LPI2C_MasterTransferCreateHandle().
203 *
204 * @param base The LPI2C peripheral base address.
205 * @param completionStatus Either kStatus_Success or an error code describing how the transfer completed.
206 * @param userData Arbitrary pointer-sized value passed from the application.
207 */
208 typedef void (*lpi2c_master_transfer_callback_t)(LPI2C_Type *base,
209 lpi2c_master_handle_t *handle,
210 status_t completionStatus,
211 void *userData);
212
213 /*!
214 * @brief Transfer option flags.
215 *
216 * @note These enumerations are intended to be OR'd together to form a bit mask of options for
217 * the #_lpi2c_master_transfer::flags field.
218 */
219 enum _lpi2c_master_transfer_flags
220 {
221 kLPI2C_TransferDefaultFlag = 0x00U, /*!< Transfer starts with a start signal, stops with a stop signal. */
222 kLPI2C_TransferNoStartFlag = 0x01U, /*!< Don't send a start condition, address, and sub address */
223 kLPI2C_TransferRepeatedStartFlag = 0x02U, /*!< Send a repeated start condition */
224 kLPI2C_TransferNoStopFlag = 0x04U, /*!< Don't send a stop condition. */
225 };
226
227 /*!
228 * @brief Non-blocking transfer descriptor structure.
229 *
230 * This structure is used to pass transaction parameters to the LPI2C_MasterTransferNonBlocking() API.
231 */
232 struct _lpi2c_master_transfer
233 {
234 uint32_t flags; /*!< Bit mask of options for the transfer. See enumeration #_lpi2c_master_transfer_flags for
235 available options. Set to 0 or #kLPI2C_TransferDefaultFlag for normal transfers. */
236 uint16_t slaveAddress; /*!< The 7-bit slave address. */
237 lpi2c_direction_t direction; /*!< Either #kLPI2C_Read or #kLPI2C_Write. */
238 uint32_t subaddress; /*!< Sub address. Transferred MSB first. */
239 size_t subaddressSize; /*!< Length of sub address to send in bytes. Maximum size is 4 bytes. */
240 void *data; /*!< Pointer to data to transfer. */
241 size_t dataSize; /*!< Number of bytes to transfer. */
242 };
243
244 /*!
245 * @brief Driver handle for master non-blocking APIs.
246 * @note The contents of this structure are private and subject to change.
247 */
248 struct _lpi2c_master_handle
249 {
250 uint8_t state; /*!< Transfer state machine current state. */
251 uint16_t remainingBytes; /*!< Remaining byte count in current state. */
252 uint8_t *buf; /*!< Buffer pointer for current state. */
253 uint16_t commandBuffer[6]; /*!< LPI2C command sequence. When all 6 command words are used:
254 Start&addr&write[1 word] + subaddr[4 words] + restart&addr&read[1 word] */
255 lpi2c_master_transfer_t transfer; /*!< Copy of the current transfer info. */
256 lpi2c_master_transfer_callback_t completionCallback; /*!< Callback function pointer. */
257 void *userData; /*!< Application data passed to callback. */
258 };
259
260 /*! @brief Typedef for master interrupt handler, used internally for LPI2C master interrupt and EDMA transactional APIs.
261 */
262 typedef void (*lpi2c_master_isr_t)(LPI2C_Type *base, void *handle);
263
264 /*! @} */
265
266 /*!
267 * @addtogroup lpi2c_slave_driver
268 * @{
269 */
270
271 /*!
272 * @brief LPI2C slave peripheral flags.
273 *
274 * The following status register flags can be cleared:
275 * - #kLPI2C_SlaveRepeatedStartDetectFlag
276 * - #kLPI2C_SlaveStopDetectFlag
277 * - #kLPI2C_SlaveBitErrFlag
278 * - #kLPI2C_SlaveFifoErrFlag
279 *
280 * All flags except #kLPI2C_SlaveBusyFlag and #kLPI2C_SlaveBusBusyFlag can be enabled as
281 * interrupts.
282 *
283 * @note These enumerations are meant to be OR'd together to form a bit mask.
284 */
285 enum _lpi2c_slave_flags
286 {
287 kLPI2C_SlaveTxReadyFlag = LPI2C_SSR_TDF_MASK, /*!< Transmit data flag */
288 kLPI2C_SlaveRxReadyFlag = LPI2C_SSR_RDF_MASK, /*!< Receive data flag */
289 kLPI2C_SlaveAddressValidFlag = LPI2C_SSR_AVF_MASK, /*!< Address valid flag */
290 kLPI2C_SlaveTransmitAckFlag = LPI2C_SSR_TAF_MASK, /*!< Transmit ACK flag */
291 kLPI2C_SlaveRepeatedStartDetectFlag = LPI2C_SSR_RSF_MASK, /*!< Repeated start detect flag */
292 kLPI2C_SlaveStopDetectFlag = LPI2C_SSR_SDF_MASK, /*!< Stop detect flag */
293 kLPI2C_SlaveBitErrFlag = LPI2C_SSR_BEF_MASK, /*!< Bit error flag */
294 kLPI2C_SlaveFifoErrFlag = LPI2C_SSR_FEF_MASK, /*!< FIFO error flag */
295 kLPI2C_SlaveAddressMatch0Flag = LPI2C_SSR_AM0F_MASK, /*!< Address match 0 flag */
296 kLPI2C_SlaveAddressMatch1Flag = LPI2C_SSR_AM1F_MASK, /*!< Address match 1 flag */
297 kLPI2C_SlaveGeneralCallFlag = LPI2C_SSR_GCF_MASK, /*!< General call flag */
298 kLPI2C_SlaveBusyFlag = LPI2C_SSR_SBF_MASK, /*!< Master busy flag */
299 kLPI2C_SlaveBusBusyFlag = LPI2C_SSR_BBF_MASK, /*!< Bus busy flag */
300 /*! All flags which are cleared by the driver upon starting a transfer. */
301 kLPI2C_SlaveClearFlags = kLPI2C_SlaveRepeatedStartDetectFlag | kLPI2C_SlaveStopDetectFlag | kLPI2C_SlaveBitErrFlag |
302 kLPI2C_SlaveFifoErrFlag,
303 /*! IRQ sources enabled by the non-blocking transactional API. */
304 kLPI2C_SlaveIrqFlags = kLPI2C_SlaveTxReadyFlag | kLPI2C_SlaveRxReadyFlag | kLPI2C_SlaveStopDetectFlag |
305 kLPI2C_SlaveRepeatedStartDetectFlag | kLPI2C_SlaveFifoErrFlag | kLPI2C_SlaveBitErrFlag |
306 kLPI2C_SlaveTransmitAckFlag | kLPI2C_SlaveAddressValidFlag,
307 /*! Errors to check for. */
308 kLPI2C_SlaveErrorFlags = kLPI2C_SlaveFifoErrFlag | kLPI2C_SlaveBitErrFlag
309 };
310
311 /*! @brief LPI2C slave address match options. */
312 typedef enum _lpi2c_slave_address_match
313 {
314 kLPI2C_MatchAddress0 = 0U, /*!< Match only address 0. */
315 kLPI2C_MatchAddress0OrAddress1 = 2U, /*!< Match either address 0 or address 1. */
316 kLPI2C_MatchAddress0ThroughAddress1 = 6U, /*!< Match a range of slave addresses from address 0 through address 1. */
317 } lpi2c_slave_address_match_t;
318
319 /*!
320 * @brief Structure with settings to initialize the LPI2C slave module.
321 *
322 * This structure holds configuration settings for the LPI2C slave peripheral. To initialize this
323 * structure to reasonable defaults, call the LPI2C_SlaveGetDefaultConfig() function and
324 * pass a pointer to your configuration structure instance.
325 *
326 * The configuration structure can be made constant so it resides in flash.
327 */
328 typedef struct _lpi2c_slave_config
329 {
330 bool enableSlave; /*!< Enable slave mode. */
331 uint8_t address0; /*!< Slave's 7-bit address. */
332 uint8_t address1; /*!< Alternate slave 7-bit address. */
333 lpi2c_slave_address_match_t addressMatchMode; /*!< Address matching options. */
334 bool filterDozeEnable; /*!< Enable digital glitch filter in doze mode. */
335 bool filterEnable; /*!< Enable digital glitch filter. */
336 bool enableGeneralCall; /*!< Enable general call address matching. */
337 struct
338 {
339 bool enableAck; /*!< Enables SCL clock stretching during slave-transmit address byte(s)
340 and slave-receiver address and data byte(s) to allow software to
341 write the Transmit ACK Register before the ACK or NACK is transmitted.
342 Clock stretching occurs when transmitting the 9th bit. When
343 enableAckSCLStall is enabled, there is no need to set either
344 enableRxDataSCLStall or enableAddressSCLStall. */
345 bool enableTx; /*!< Enables SCL clock stretching when the transmit data flag is set
346 during a slave-transmit transfer. */
347 bool enableRx; /*!< Enables SCL clock stretching when receive data flag is set during
348 a slave-receive transfer. */
349 bool enableAddress; /*!< Enables SCL clock stretching when the address valid flag is asserted. */
350 } sclStall;
351 bool ignoreAck; /*!< Continue transfers after a NACK is detected. */
352 bool enableReceivedAddressRead; /*!< Enable reading the address received address as the first byte of data. */
353 uint32_t sdaGlitchFilterWidth_ns; /*!< Width in nanoseconds of the digital filter on the SDA signal. */
354 uint32_t sclGlitchFilterWidth_ns; /*!< Width in nanoseconds of the digital filter on the SCL signal. */
355 uint32_t dataValidDelay_ns; /*!< Width in nanoseconds of the data valid delay. */
356 uint32_t clockHoldTime_ns; /*!< Width in nanoseconds of the clock hold time. */
357 } lpi2c_slave_config_t;
358
359 /*!
360 * @brief Set of events sent to the callback for non blocking slave transfers.
361 *
362 * These event enumerations are used for two related purposes. First, a bit mask created by OR'ing together
363 * events is passed to LPI2C_SlaveTransferNonBlocking() in order to specify which events to enable.
364 * Then, when the slave callback is invoked, it is passed the current event through its @a transfer
365 * parameter.
366 *
367 * @note These enumerations are meant to be OR'd together to form a bit mask of events.
368 */
369 typedef enum _lpi2c_slave_transfer_event
370 {
371 kLPI2C_SlaveAddressMatchEvent = 0x01U, /*!< Received the slave address after a start or repeated start. */
372 kLPI2C_SlaveTransmitEvent = 0x02U, /*!< Callback is requested to provide data to transmit
373 (slave-transmitter role). */
374 kLPI2C_SlaveReceiveEvent = 0x04U, /*!< Callback is requested to provide a buffer in which to place received
375 data (slave-receiver role). */
376 kLPI2C_SlaveTransmitAckEvent = 0x08U, /*!< Callback needs to either transmit an ACK or NACK. */
377 kLPI2C_SlaveRepeatedStartEvent = 0x10U, /*!< A repeated start was detected. */
378 kLPI2C_SlaveCompletionEvent = 0x20U, /*!< A stop was detected, completing the transfer. */
379
380 /*! Bit mask of all available events. */
381 kLPI2C_SlaveAllEvents = kLPI2C_SlaveAddressMatchEvent | kLPI2C_SlaveTransmitEvent | kLPI2C_SlaveReceiveEvent |
382 kLPI2C_SlaveTransmitAckEvent | kLPI2C_SlaveRepeatedStartEvent | kLPI2C_SlaveCompletionEvent,
383 } lpi2c_slave_transfer_event_t;
384
385 /*! @brief LPI2C slave transfer structure */
386 typedef struct _lpi2c_slave_transfer
387 {
388 lpi2c_slave_transfer_event_t event; /*!< Reason the callback is being invoked. */
389 uint8_t receivedAddress; /*!< Matching address send by master. */
390 uint8_t *data; /*!< Transfer buffer */
391 size_t dataSize; /*!< Transfer size */
392 status_t completionStatus; /*!< Success or error code describing how the transfer completed. Only applies for
393 #kLPI2C_SlaveCompletionEvent. */
394 size_t transferredCount; /*!< Number of bytes actually transferred since start or last repeated start. */
395 } lpi2c_slave_transfer_t;
396
397 /* Forward declaration. */
398 typedef struct _lpi2c_slave_handle lpi2c_slave_handle_t;
399
400 /*!
401 * @brief Slave event callback function pointer type.
402 *
403 * This callback is used only for the slave non-blocking transfer API. To install a callback,
404 * use the LPI2C_SlaveSetCallback() function after you have created a handle.
405 *
406 * @param base Base address for the LPI2C instance on which the event occurred.
407 * @param transfer Pointer to transfer descriptor containing values passed to and/or from the callback.
408 * @param userData Arbitrary pointer-sized value passed from the application.
409 */
410 typedef void (*lpi2c_slave_transfer_callback_t)(LPI2C_Type *base, lpi2c_slave_transfer_t *transfer, void *userData);
411
412 /*!
413 * @brief LPI2C slave handle structure.
414 * @note The contents of this structure are private and subject to change.
415 */
416 struct _lpi2c_slave_handle
417 {
418 lpi2c_slave_transfer_t transfer; /*!< LPI2C slave transfer copy. */
419 bool isBusy; /*!< Whether transfer is busy. */
420 bool wasTransmit; /*!< Whether the last transfer was a transmit. */
421 uint32_t eventMask; /*!< Mask of enabled events. */
422 uint32_t transferredCount; /*!< Count of bytes transferred. */
423 lpi2c_slave_transfer_callback_t callback; /*!< Callback function called at transfer event. */
424 void *userData; /*!< Callback parameter passed to callback. */
425 };
426
427 /*! @} */
428
429 /*******************************************************************************
430 * Variables
431 ******************************************************************************/
432 /*! Array to map LPI2C instance number to IRQ number, used internally for LPI2C master interrupt and EDMA transactional
433 APIs. */
434 extern IRQn_Type const kLpi2cIrqs[];
435
436 /*! Pointer to master IRQ handler for each instance, used internally for LPI2C master interrupt and EDMA transactional
437 APIs. */
438 extern lpi2c_master_isr_t s_lpi2cMasterIsr;
439
440 /*! Pointers to master handles for each instance, used internally for LPI2C master interrupt and EDMA transactional
441 APIs. */
442 extern void *s_lpi2cMasterHandle[];
443
444 /*******************************************************************************
445 * API
446 ******************************************************************************/
447
448 #if defined(__cplusplus)
449 extern "C" {
450 #endif
451
452 /*!
453 * @brief Returns an instance number given a base address.
454 *
455 * If an invalid base address is passed, debug builds will assert. Release builds will just return
456 * instance number 0.
457 *
458 * @param base The LPI2C peripheral base address.
459 * @return LPI2C instance number starting from 0.
460 */
461 uint32_t LPI2C_GetInstance(LPI2C_Type *base);
462
463 /*!
464 * @addtogroup lpi2c_master_driver
465 * @{
466 */
467
468 /*! @name Initialization and deinitialization */
469 /*@{*/
470
471 /*!
472 * @brief Provides a default configuration for the LPI2C master peripheral.
473 *
474 * This function provides the following default configuration for the LPI2C master peripheral:
475 * @code
476 * masterConfig->enableMaster = true;
477 * masterConfig->debugEnable = false;
478 * masterConfig->ignoreAck = false;
479 * masterConfig->pinConfig = kLPI2C_2PinOpenDrain;
480 * masterConfig->baudRate_Hz = 100000U;
481 * masterConfig->busIdleTimeout_ns = 0;
482 * masterConfig->pinLowTimeout_ns = 0;
483 * masterConfig->sdaGlitchFilterWidth_ns = 0;
484 * masterConfig->sclGlitchFilterWidth_ns = 0;
485 * masterConfig->hostRequest.enable = false;
486 * masterConfig->hostRequest.source = kLPI2C_HostRequestExternalPin;
487 * masterConfig->hostRequest.polarity = kLPI2C_HostRequestPinActiveHigh;
488 * @endcode
489 *
490 * After calling this function, you can override any settings in order to customize the configuration,
491 * prior to initializing the master driver with LPI2C_MasterInit().
492 *
493 * @param[out] masterConfig User provided configuration structure for default values. Refer to #lpi2c_master_config_t.
494 */
495 void LPI2C_MasterGetDefaultConfig(lpi2c_master_config_t *masterConfig);
496
497 /*!
498 * @brief Initializes the LPI2C master peripheral.
499 *
500 * This function enables the peripheral clock and initializes the LPI2C master peripheral as described by the user
501 * provided configuration. A software reset is performed prior to configuration.
502 *
503 * @param base The LPI2C peripheral base address.
504 * @param masterConfig User provided peripheral configuration. Use LPI2C_MasterGetDefaultConfig() to get a set of
505 * defaults
506 * that you can override.
507 * @param sourceClock_Hz Frequency in Hertz of the LPI2C functional clock. Used to calculate the baud rate divisors,
508 * filter widths, and timeout periods.
509 */
510 void LPI2C_MasterInit(LPI2C_Type *base, const lpi2c_master_config_t *masterConfig, uint32_t sourceClock_Hz);
511
512 /*!
513 * @brief Deinitializes the LPI2C master peripheral.
514 *
515 * This function disables the LPI2C master peripheral and gates the clock. It also performs a software
516 * reset to restore the peripheral to reset conditions.
517 *
518 * @param base The LPI2C peripheral base address.
519 */
520 void LPI2C_MasterDeinit(LPI2C_Type *base);
521
522 /*!
523 * @brief Configures LPI2C master data match feature.
524 *
525 * @param base The LPI2C peripheral base address.
526 * @param matchConfig Settings for the data match feature.
527 */
528 void LPI2C_MasterConfigureDataMatch(LPI2C_Type *base, const lpi2c_data_match_config_t *matchConfig);
529
530 /* Not static so it can be used from fsl_lpi2c_edma.c. */
531 status_t LPI2C_MasterCheckAndClearError(LPI2C_Type *base, uint32_t status);
532
533 /* Not static so it can be used from fsl_lpi2c_edma.c. */
534 status_t LPI2C_CheckForBusyBus(LPI2C_Type *base);
535
536 /*!
537 * @brief Performs a software reset.
538 *
539 * Restores the LPI2C master peripheral to reset conditions.
540 *
541 * @param base The LPI2C peripheral base address.
542 */
LPI2C_MasterReset(LPI2C_Type * base)543 static inline void LPI2C_MasterReset(LPI2C_Type *base)
544 {
545 base->MCR = LPI2C_MCR_RST_MASK;
546 base->MCR = 0;
547 }
548
549 /*!
550 * @brief Enables or disables the LPI2C module as master.
551 *
552 * @param base The LPI2C peripheral base address.
553 * @param enable Pass true to enable or false to disable the specified LPI2C as master.
554 */
LPI2C_MasterEnable(LPI2C_Type * base,bool enable)555 static inline void LPI2C_MasterEnable(LPI2C_Type *base, bool enable)
556 {
557 base->MCR = (base->MCR & ~LPI2C_MCR_MEN_MASK) | LPI2C_MCR_MEN(enable);
558 }
559
560 /*@}*/
561
562 /*! @name Status */
563 /*@{*/
564
565 /*!
566 * @brief Gets the LPI2C master status flags.
567 *
568 * A bit mask with the state of all LPI2C master status flags is returned. For each flag, the corresponding bit
569 * in the return value is set if the flag is asserted.
570 *
571 * @param base The LPI2C peripheral base address.
572 * @return State of the status flags:
573 * - 1: related status flag is set.
574 * - 0: related status flag is not set.
575 * @see _lpi2c_master_flags
576 */
LPI2C_MasterGetStatusFlags(LPI2C_Type * base)577 static inline uint32_t LPI2C_MasterGetStatusFlags(LPI2C_Type *base)
578 {
579 return base->MSR;
580 }
581
582 /*!
583 * @brief Clears the LPI2C master status flag state.
584 *
585 * The following status register flags can be cleared:
586 * - #kLPI2C_MasterEndOfPacketFlag
587 * - #kLPI2C_MasterStopDetectFlag
588 * - #kLPI2C_MasterNackDetectFlag
589 * - #kLPI2C_MasterArbitrationLostFlag
590 * - #kLPI2C_MasterFifoErrFlag
591 * - #kLPI2C_MasterPinLowTimeoutFlag
592 * - #kLPI2C_MasterDataMatchFlag
593 *
594 * Attempts to clear other flags has no effect.
595 *
596 * @param base The LPI2C peripheral base address.
597 * @param statusMask A bitmask of status flags that are to be cleared. The mask is composed of
598 * _lpi2c_master_flags enumerators OR'd together. You may pass the result of a previous call to
599 * LPI2C_MasterGetStatusFlags().
600 * @see _lpi2c_master_flags.
601 */
LPI2C_MasterClearStatusFlags(LPI2C_Type * base,uint32_t statusMask)602 static inline void LPI2C_MasterClearStatusFlags(LPI2C_Type *base, uint32_t statusMask)
603 {
604 base->MSR = statusMask;
605 }
606
607 /*@}*/
608
609 /*! @name Interrupts */
610 /*@{*/
611
612 /*!
613 * @brief Enables the LPI2C master interrupt requests.
614 *
615 * All flags except #kLPI2C_MasterBusyFlag and #kLPI2C_MasterBusBusyFlag can be enabled as
616 * interrupts.
617 *
618 * @param base The LPI2C peripheral base address.
619 * @param interruptMask Bit mask of interrupts to enable. See _lpi2c_master_flags for the set
620 * of constants that should be OR'd together to form the bit mask.
621 */
LPI2C_MasterEnableInterrupts(LPI2C_Type * base,uint32_t interruptMask)622 static inline void LPI2C_MasterEnableInterrupts(LPI2C_Type *base, uint32_t interruptMask)
623 {
624 base->MIER |= interruptMask;
625 }
626
627 /*!
628 * @brief Disables the LPI2C master interrupt requests.
629 *
630 * All flags except #kLPI2C_MasterBusyFlag and #kLPI2C_MasterBusBusyFlag can be enabled as
631 * interrupts.
632 *
633 * @param base The LPI2C peripheral base address.
634 * @param interruptMask Bit mask of interrupts to disable. See _lpi2c_master_flags for the set
635 * of constants that should be OR'd together to form the bit mask.
636 */
LPI2C_MasterDisableInterrupts(LPI2C_Type * base,uint32_t interruptMask)637 static inline void LPI2C_MasterDisableInterrupts(LPI2C_Type *base, uint32_t interruptMask)
638 {
639 base->MIER &= ~interruptMask;
640 }
641
642 /*!
643 * @brief Returns the set of currently enabled LPI2C master interrupt requests.
644 *
645 * @param base The LPI2C peripheral base address.
646 * @return A bitmask composed of _lpi2c_master_flags enumerators OR'd together to indicate the
647 * set of enabled interrupts.
648 */
LPI2C_MasterGetEnabledInterrupts(LPI2C_Type * base)649 static inline uint32_t LPI2C_MasterGetEnabledInterrupts(LPI2C_Type *base)
650 {
651 return base->MIER;
652 }
653
654 /*@}*/
655
656 /*! @name DMA control */
657 /*@{*/
658
659 /*!
660 * @brief Enables or disables LPI2C master DMA requests.
661 *
662 * @param base The LPI2C peripheral base address.
663 * @param enableTx Enable flag for transmit DMA request. Pass true for enable, false for disable.
664 * @param enableRx Enable flag for receive DMA request. Pass true for enable, false for disable.
665 */
LPI2C_MasterEnableDMA(LPI2C_Type * base,bool enableTx,bool enableRx)666 static inline void LPI2C_MasterEnableDMA(LPI2C_Type *base, bool enableTx, bool enableRx)
667 {
668 base->MDER = LPI2C_MDER_TDDE(enableTx) | LPI2C_MDER_RDDE(enableRx);
669 }
670
671 /*!
672 * @brief Gets LPI2C master transmit data register address for DMA transfer.
673 *
674 * @param base The LPI2C peripheral base address.
675 * @return The LPI2C Master Transmit Data Register address.
676 */
LPI2C_MasterGetTxFifoAddress(LPI2C_Type * base)677 static inline uint32_t LPI2C_MasterGetTxFifoAddress(LPI2C_Type *base)
678 {
679 return (uint32_t)&base->MTDR;
680 }
681
682 /*!
683 * @brief Gets LPI2C master receive data register address for DMA transfer.
684 *
685 * @param base The LPI2C peripheral base address.
686 * @return The LPI2C Master Receive Data Register address.
687 */
LPI2C_MasterGetRxFifoAddress(LPI2C_Type * base)688 static inline uint32_t LPI2C_MasterGetRxFifoAddress(LPI2C_Type *base)
689 {
690 return (uint32_t)&base->MRDR;
691 }
692
693 /*@}*/
694
695 /*! @name FIFO control */
696 /*@{*/
697
698 /*!
699 * @brief Sets the watermarks for LPI2C master FIFOs.
700 *
701 * @param base The LPI2C peripheral base address.
702 * @param txWords Transmit FIFO watermark value in words. The #kLPI2C_MasterTxReadyFlag flag is set whenever
703 * the number of words in the transmit FIFO is equal or less than @a txWords. Writing a value equal or
704 * greater than the FIFO size is truncated.
705 * @param rxWords Receive FIFO watermark value in words. The #kLPI2C_MasterRxReadyFlag flag is set whenever
706 * the number of words in the receive FIFO is greater than @a rxWords. Writing a value equal or greater
707 * than the FIFO size is truncated.
708 */
LPI2C_MasterSetWatermarks(LPI2C_Type * base,size_t txWords,size_t rxWords)709 static inline void LPI2C_MasterSetWatermarks(LPI2C_Type *base, size_t txWords, size_t rxWords)
710 {
711 base->MFCR = LPI2C_MFCR_TXWATER(txWords) | LPI2C_MFCR_RXWATER(rxWords);
712 }
713
714 /*!
715 * @brief Gets the current number of words in the LPI2C master FIFOs.
716 *
717 * @param base The LPI2C peripheral base address.
718 * @param[out] txCount Pointer through which the current number of words in the transmit FIFO is returned.
719 * Pass NULL if this value is not required.
720 * @param[out] rxCount Pointer through which the current number of words in the receive FIFO is returned.
721 * Pass NULL if this value is not required.
722 */
LPI2C_MasterGetFifoCounts(LPI2C_Type * base,size_t * rxCount,size_t * txCount)723 static inline void LPI2C_MasterGetFifoCounts(LPI2C_Type *base, size_t *rxCount, size_t *txCount)
724 {
725 if (NULL != txCount)
726 {
727 *txCount = (base->MFSR & LPI2C_MFSR_TXCOUNT_MASK) >> LPI2C_MFSR_TXCOUNT_SHIFT;
728 }
729 if (NULL != rxCount)
730 {
731 *rxCount = (base->MFSR & LPI2C_MFSR_RXCOUNT_MASK) >> LPI2C_MFSR_RXCOUNT_SHIFT;
732 }
733 }
734
735 /*@}*/
736
737 /*! @name Bus operations */
738 /*@{*/
739
740 /*!
741 * @brief Sets the I2C bus frequency for master transactions.
742 *
743 * The LPI2C master is automatically disabled and re-enabled as necessary to configure the baud
744 * rate. Do not call this function during a transfer, or the transfer is aborted.
745 *
746 * @note Please note that the second parameter is the clock frequency of LPI2C module, the third
747 * parameter means user configured bus baudrate, this implementation is different from other I2C drivers
748 * which use baudrate configuration as second parameter and source clock frequency as third parameter.
749 *
750 * @param base The LPI2C peripheral base address.
751 * @param sourceClock_Hz LPI2C functional clock frequency in Hertz.
752 * @param baudRate_Hz Requested bus frequency in Hertz.
753 */
754 void LPI2C_MasterSetBaudRate(LPI2C_Type *base, uint32_t sourceClock_Hz, uint32_t baudRate_Hz);
755
756 /*!
757 * @brief Returns whether the bus is idle.
758 *
759 * Requires the master mode to be enabled.
760 *
761 * @param base The LPI2C peripheral base address.
762 * @retval true Bus is busy.
763 * @retval false Bus is idle.
764 */
LPI2C_MasterGetBusIdleState(LPI2C_Type * base)765 static inline bool LPI2C_MasterGetBusIdleState(LPI2C_Type *base)
766 {
767 return ((base->MSR & LPI2C_MSR_BBF_MASK) >> LPI2C_MSR_BBF_SHIFT) == 1U ? true : false;
768 }
769
770 /*!
771 * @brief Sends a START signal and slave address on the I2C bus.
772 *
773 * This function is used to initiate a new master mode transfer. First, the bus state is checked to ensure
774 * that another master is not occupying the bus. Then a START signal is transmitted, followed by the
775 * 7-bit address specified in the @a address parameter. Note that this function does not actually wait
776 * until the START and address are successfully sent on the bus before returning.
777 *
778 * @param base The LPI2C peripheral base address.
779 * @param address 7-bit slave device address, in bits [6:0].
780 * @param dir Master transfer direction, either #kLPI2C_Read or #kLPI2C_Write. This parameter is used to set
781 * the R/w bit (bit 0) in the transmitted slave address.
782 * @retval kStatus_Success START signal and address were successfully enqueued in the transmit FIFO.
783 * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
784 */
785 status_t LPI2C_MasterStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t dir);
786
787 /*!
788 * @brief Sends a repeated START signal and slave address on the I2C bus.
789 *
790 * This function is used to send a Repeated START signal when a transfer is already in progress. Like
791 * LPI2C_MasterStart(), it also sends the specified 7-bit address.
792 *
793 * @note This function exists primarily to maintain compatible APIs between LPI2C and I2C drivers,
794 * as well as to better document the intent of code that uses these APIs.
795 *
796 * @param base The LPI2C peripheral base address.
797 * @param address 7-bit slave device address, in bits [6:0].
798 * @param dir Master transfer direction, either #kLPI2C_Read or #kLPI2C_Write. This parameter is used to set
799 * the R/w bit (bit 0) in the transmitted slave address.
800 * @retval kStatus_Success Repeated START signal and address were successfully enqueued in the transmit FIFO.
801 * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
802 */
LPI2C_MasterRepeatedStart(LPI2C_Type * base,uint8_t address,lpi2c_direction_t dir)803 static inline status_t LPI2C_MasterRepeatedStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t dir)
804 {
805 return LPI2C_MasterStart(base, address, dir);
806 }
807
808 /*!
809 * @brief Performs a polling send transfer on the I2C bus.
810 *
811 * Sends up to @a txSize number of bytes to the previously addressed slave device. The slave may
812 * reply with a NAK to any byte in order to terminate the transfer early. If this happens, this
813 * function returns #kStatus_LPI2C_Nak.
814 *
815 * @param base The LPI2C peripheral base address.
816 * @param txBuff The pointer to the data to be transferred.
817 * @param txSize The length in bytes of the data to be transferred.
818 * @retval kStatus_Success Data was sent successfully.
819 * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
820 * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
821 * @retval #kStatus_LPI2C_FifoError FIFO under run or over run.
822 * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error.
823 * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
824 */
825 status_t LPI2C_MasterSend(LPI2C_Type *base, void *txBuff, size_t txSize);
826
827 /*!
828 * @brief Performs a polling receive transfer on the I2C bus.
829 *
830 * @param base The LPI2C peripheral base address.
831 * @param rxBuff The pointer to the data to be transferred.
832 * @param rxSize The length in bytes of the data to be transferred.
833 * @retval kStatus_Success Data was received successfully.
834 * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
835 * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
836 * @retval #kStatus_LPI2C_FifoError FIFO under run or overrun.
837 * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error.
838 * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
839 */
840 status_t LPI2C_MasterReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize);
841
842 /*!
843 * @brief Sends a STOP signal on the I2C bus.
844 *
845 * This function does not return until the STOP signal is seen on the bus, or an error occurs.
846 *
847 * @param base The LPI2C peripheral base address.
848 * @retval kStatus_Success The STOP signal was successfully sent on the bus and the transaction terminated.
849 * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
850 * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
851 * @retval #kStatus_LPI2C_FifoError FIFO under run or overrun.
852 * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error.
853 * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
854 */
855 status_t LPI2C_MasterStop(LPI2C_Type *base);
856
857 /*!
858 * @brief Performs a master polling transfer on the I2C bus.
859 *
860 * @note The API does not return until the transfer succeeds or fails due
861 * to error happens during transfer.
862 *
863 * @param base The LPI2C peripheral base address.
864 * @param transfer Pointer to the transfer structure.
865 * @retval kStatus_Success Data was received successfully.
866 * @retval #kStatus_LPI2C_Busy Another master is currently utilizing the bus.
867 * @retval #kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
868 * @retval #kStatus_LPI2C_FifoError FIFO under run or overrun.
869 * @retval #kStatus_LPI2C_ArbitrationLost Arbitration lost error.
870 * @retval #kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
871 */
872 status_t LPI2C_MasterTransferBlocking(LPI2C_Type *base, lpi2c_master_transfer_t *transfer);
873
874 /*@}*/
875
876 /*! @name Non-blocking */
877 /*@{*/
878
879 /*!
880 * @brief Creates a new handle for the LPI2C master non-blocking APIs.
881 *
882 * The creation of a handle is for use with the non-blocking APIs. Once a handle
883 * is created, there is not a corresponding destroy handle. If the user wants to
884 * terminate a transfer, the LPI2C_MasterTransferAbort() API shall be called.
885 *
886 *
887 * @note The function also enables the NVIC IRQ for the input LPI2C. Need to notice
888 * that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to
889 * enable the associated INTMUX IRQ in application.
890 *
891 * @param base The LPI2C peripheral base address.
892 * @param[out] handle Pointer to the LPI2C master driver handle.
893 * @param callback User provided pointer to the asynchronous callback function.
894 * @param userData User provided pointer to the application callback data.
895 */
896 void LPI2C_MasterTransferCreateHandle(LPI2C_Type *base,
897 lpi2c_master_handle_t *handle,
898 lpi2c_master_transfer_callback_t callback,
899 void *userData);
900
901 /*!
902 * @brief Performs a non-blocking transaction on the I2C bus.
903 *
904 * @param base The LPI2C peripheral base address.
905 * @param handle Pointer to the LPI2C master driver handle.
906 * @param transfer The pointer to the transfer descriptor.
907 * @retval kStatus_Success The transaction was started successfully.
908 * @retval #kStatus_LPI2C_Busy Either another master is currently utilizing the bus, or a non-blocking
909 * transaction is already in progress.
910 */
911 status_t LPI2C_MasterTransferNonBlocking(LPI2C_Type *base,
912 lpi2c_master_handle_t *handle,
913 lpi2c_master_transfer_t *transfer);
914
915 /*!
916 * @brief Returns number of bytes transferred so far.
917 * @param base The LPI2C peripheral base address.
918 * @param handle Pointer to the LPI2C master driver handle.
919 * @param[out] count Number of bytes transferred so far by the non-blocking transaction.
920 * @retval kStatus_Success
921 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
922 */
923 status_t LPI2C_MasterTransferGetCount(LPI2C_Type *base, lpi2c_master_handle_t *handle, size_t *count);
924
925 /*!
926 * @brief Terminates a non-blocking LPI2C master transmission early.
927 *
928 * @note It is not safe to call this function from an IRQ handler that has a higher priority than the
929 * LPI2C peripheral's IRQ priority.
930 *
931 * @param base The LPI2C peripheral base address.
932 * @param handle Pointer to the LPI2C master driver handle.
933 * @retval kStatus_Success A transaction was successfully aborted.
934 * @retval #kStatus_LPI2C_Idle There is not a non-blocking transaction currently in progress.
935 */
936 void LPI2C_MasterTransferAbort(LPI2C_Type *base, lpi2c_master_handle_t *handle);
937
938 /*@}*/
939
940 /*! @name IRQ handler */
941 /*@{*/
942
943 /*!
944 * @brief Reusable routine to handle master interrupts.
945 * @note This function does not need to be called unless you are reimplementing the
946 * nonblocking API's interrupt handler routines to add special functionality.
947 * @param base The LPI2C peripheral base address.
948 * @param lpi2cMasterHandle Pointer to the LPI2C master driver handle.
949 */
950 void LPI2C_MasterTransferHandleIRQ(LPI2C_Type *base, void *lpi2cMasterHandle);
951
952 /*@}*/
953
954 /*! @} */
955
956 /*!
957 * @addtogroup lpi2c_slave_driver
958 * @{
959 */
960
961 /*! @name Slave initialization and deinitialization */
962 /*@{*/
963
964 /*!
965 * @brief Provides a default configuration for the LPI2C slave peripheral.
966 *
967 * This function provides the following default configuration for the LPI2C slave peripheral:
968 * @code
969 * slaveConfig->enableSlave = true;
970 * slaveConfig->address0 = 0U;
971 * slaveConfig->address1 = 0U;
972 * slaveConfig->addressMatchMode = kLPI2C_MatchAddress0;
973 * slaveConfig->filterDozeEnable = true;
974 * slaveConfig->filterEnable = true;
975 * slaveConfig->enableGeneralCall = false;
976 * slaveConfig->sclStall.enableAck = false;
977 * slaveConfig->sclStall.enableTx = true;
978 * slaveConfig->sclStall.enableRx = true;
979 * slaveConfig->sclStall.enableAddress = true;
980 * slaveConfig->ignoreAck = false;
981 * slaveConfig->enableReceivedAddressRead = false;
982 * slaveConfig->sdaGlitchFilterWidth_ns = 0;
983 * slaveConfig->sclGlitchFilterWidth_ns = 0;
984 * slaveConfig->dataValidDelay_ns = 0;
985 * slaveConfig->clockHoldTime_ns = 0;
986 * @endcode
987 *
988 * After calling this function, override any settings to customize the configuration,
989 * prior to initializing the master driver with LPI2C_SlaveInit(). Be sure to override at least the @a
990 * address0 member of the configuration structure with the desired slave address.
991 *
992 * @param[out] slaveConfig User provided configuration structure that is set to default values. Refer to
993 * #lpi2c_slave_config_t.
994 */
995 void LPI2C_SlaveGetDefaultConfig(lpi2c_slave_config_t *slaveConfig);
996
997 /*!
998 * @brief Initializes the LPI2C slave peripheral.
999 *
1000 * This function enables the peripheral clock and initializes the LPI2C slave peripheral as described by the user
1001 * provided configuration.
1002 *
1003 * @param base The LPI2C peripheral base address.
1004 * @param slaveConfig User provided peripheral configuration. Use LPI2C_SlaveGetDefaultConfig() to get a set of defaults
1005 * that you can override.
1006 * @param sourceClock_Hz Frequency in Hertz of the LPI2C functional clock. Used to calculate the filter widths,
1007 * data valid delay, and clock hold time.
1008 */
1009 void LPI2C_SlaveInit(LPI2C_Type *base, const lpi2c_slave_config_t *slaveConfig, uint32_t sourceClock_Hz);
1010
1011 /*!
1012 * @brief Deinitializes the LPI2C slave peripheral.
1013 *
1014 * This function disables the LPI2C slave peripheral and gates the clock. It also performs a software
1015 * reset to restore the peripheral to reset conditions.
1016 *
1017 * @param base The LPI2C peripheral base address.
1018 */
1019 void LPI2C_SlaveDeinit(LPI2C_Type *base);
1020
1021 /*!
1022 * @brief Performs a software reset of the LPI2C slave peripheral.
1023 *
1024 * @param base The LPI2C peripheral base address.
1025 */
LPI2C_SlaveReset(LPI2C_Type * base)1026 static inline void LPI2C_SlaveReset(LPI2C_Type *base)
1027 {
1028 base->SCR = LPI2C_SCR_RST_MASK;
1029 base->SCR = 0;
1030 }
1031
1032 /*!
1033 * @brief Enables or disables the LPI2C module as slave.
1034 *
1035 * @param base The LPI2C peripheral base address.
1036 * @param enable Pass true to enable or false to disable the specified LPI2C as slave.
1037 */
LPI2C_SlaveEnable(LPI2C_Type * base,bool enable)1038 static inline void LPI2C_SlaveEnable(LPI2C_Type *base, bool enable)
1039 {
1040 base->SCR = (base->SCR & ~LPI2C_SCR_SEN_MASK) | LPI2C_SCR_SEN(enable);
1041 }
1042
1043 /*@}*/
1044
1045 /*! @name Slave status */
1046 /*@{*/
1047
1048 /*!
1049 * @brief Gets the LPI2C slave status flags.
1050 *
1051 * A bit mask with the state of all LPI2C slave status flags is returned. For each flag, the corresponding bit
1052 * in the return value is set if the flag is asserted.
1053 *
1054 * @param base The LPI2C peripheral base address.
1055 * @return State of the status flags:
1056 * - 1: related status flag is set.
1057 * - 0: related status flag is not set.
1058 * @see _lpi2c_slave_flags
1059 */
LPI2C_SlaveGetStatusFlags(LPI2C_Type * base)1060 static inline uint32_t LPI2C_SlaveGetStatusFlags(LPI2C_Type *base)
1061 {
1062 return base->SSR;
1063 }
1064
1065 /*!
1066 * @brief Clears the LPI2C status flag state.
1067 *
1068 * The following status register flags can be cleared:
1069 * - #kLPI2C_SlaveRepeatedStartDetectFlag
1070 * - #kLPI2C_SlaveStopDetectFlag
1071 * - #kLPI2C_SlaveBitErrFlag
1072 * - #kLPI2C_SlaveFifoErrFlag
1073 *
1074 * Attempts to clear other flags has no effect.
1075 *
1076 * @param base The LPI2C peripheral base address.
1077 * @param statusMask A bitmask of status flags that are to be cleared. The mask is composed of
1078 * #_lpi2c_slave_flags enumerators OR'd together. You may pass the result of a previous call to
1079 * LPI2C_SlaveGetStatusFlags().
1080 * @see _lpi2c_slave_flags.
1081 */
LPI2C_SlaveClearStatusFlags(LPI2C_Type * base,uint32_t statusMask)1082 static inline void LPI2C_SlaveClearStatusFlags(LPI2C_Type *base, uint32_t statusMask)
1083 {
1084 base->SSR = statusMask;
1085 }
1086
1087 /*@}*/
1088
1089 /*! @name Slave interrupts */
1090 /*@{*/
1091
1092 /*!
1093 * @brief Enables the LPI2C slave interrupt requests.
1094 *
1095 * All flags except #kLPI2C_SlaveBusyFlag and #kLPI2C_SlaveBusBusyFlag can be enabled as
1096 * interrupts.
1097 *
1098 * @param base The LPI2C peripheral base address.
1099 * @param interruptMask Bit mask of interrupts to enable. See #_lpi2c_slave_flags for the set
1100 * of constants that should be OR'd together to form the bit mask.
1101 */
LPI2C_SlaveEnableInterrupts(LPI2C_Type * base,uint32_t interruptMask)1102 static inline void LPI2C_SlaveEnableInterrupts(LPI2C_Type *base, uint32_t interruptMask)
1103 {
1104 base->SIER |= interruptMask;
1105 }
1106
1107 /*!
1108 * @brief Disables the LPI2C slave interrupt requests.
1109 *
1110 * All flags except #kLPI2C_SlaveBusyFlag and #kLPI2C_SlaveBusBusyFlag can be enabled as
1111 * interrupts.
1112 *
1113 * @param base The LPI2C peripheral base address.
1114 * @param interruptMask Bit mask of interrupts to disable. See #_lpi2c_slave_flags for the set
1115 * of constants that should be OR'd together to form the bit mask.
1116 */
LPI2C_SlaveDisableInterrupts(LPI2C_Type * base,uint32_t interruptMask)1117 static inline void LPI2C_SlaveDisableInterrupts(LPI2C_Type *base, uint32_t interruptMask)
1118 {
1119 base->SIER &= ~interruptMask;
1120 }
1121
1122 /*!
1123 * @brief Returns the set of currently enabled LPI2C slave interrupt requests.
1124 * @param base The LPI2C peripheral base address.
1125 * @return A bitmask composed of #_lpi2c_slave_flags enumerators OR'd together to indicate the
1126 * set of enabled interrupts.
1127 */
LPI2C_SlaveGetEnabledInterrupts(LPI2C_Type * base)1128 static inline uint32_t LPI2C_SlaveGetEnabledInterrupts(LPI2C_Type *base)
1129 {
1130 return base->SIER;
1131 }
1132
1133 /*@}*/
1134
1135 /*! @name Slave DMA control */
1136 /*@{*/
1137
1138 /*!
1139 * @brief Enables or disables the LPI2C slave peripheral DMA requests.
1140 *
1141 * @param base The LPI2C peripheral base address.
1142 * @param enableAddressValid Enable flag for the address valid DMA request. Pass true for enable, false for disable.
1143 * The address valid DMA request is shared with the receive data DMA request.
1144 * @param enableRx Enable flag for the receive data DMA request. Pass true for enable, false for disable.
1145 * @param enableTx Enable flag for the transmit data DMA request. Pass true for enable, false for disable.
1146 */
LPI2C_SlaveEnableDMA(LPI2C_Type * base,bool enableAddressValid,bool enableRx,bool enableTx)1147 static inline void LPI2C_SlaveEnableDMA(LPI2C_Type *base, bool enableAddressValid, bool enableRx, bool enableTx)
1148 {
1149 base->SDER = (base->SDER & ~(LPI2C_SDER_AVDE_MASK | LPI2C_SDER_RDDE_MASK | LPI2C_SDER_TDDE_MASK)) |
1150 LPI2C_SDER_AVDE(enableAddressValid) | LPI2C_SDER_RDDE(enableRx) | LPI2C_SDER_TDDE(enableTx);
1151 }
1152
1153 /*@}*/
1154
1155 /*! @name Slave bus operations */
1156 /*@{*/
1157
1158 /*!
1159 * @brief Returns whether the bus is idle.
1160 *
1161 * Requires the slave mode to be enabled.
1162 *
1163 * @param base The LPI2C peripheral base address.
1164 * @retval true Bus is busy.
1165 * @retval false Bus is idle.
1166 */
LPI2C_SlaveGetBusIdleState(LPI2C_Type * base)1167 static inline bool LPI2C_SlaveGetBusIdleState(LPI2C_Type *base)
1168 {
1169 return ((base->SSR & LPI2C_SSR_BBF_MASK) >> LPI2C_SSR_BBF_SHIFT) == 1U ? true : false;
1170 }
1171
1172 /*!
1173 * @brief Transmits either an ACK or NAK on the I2C bus in response to a byte from the master.
1174 *
1175 * Use this function to send an ACK or NAK when the #kLPI2C_SlaveTransmitAckFlag is asserted. This
1176 * only happens if you enable the sclStall.enableAck field of the ::lpi2c_slave_config_t configuration
1177 * structure used to initialize the slave peripheral.
1178 *
1179 * @param base The LPI2C peripheral base address.
1180 * @param ackOrNack Pass true for an ACK or false for a NAK.
1181 */
LPI2C_SlaveTransmitAck(LPI2C_Type * base,bool ackOrNack)1182 static inline void LPI2C_SlaveTransmitAck(LPI2C_Type *base, bool ackOrNack)
1183 {
1184 base->STAR = LPI2C_STAR_TXNACK(!ackOrNack);
1185 }
1186
1187 /*!
1188 * @brief Returns the slave address sent by the I2C master.
1189 *
1190 * This function should only be called if the #kLPI2C_SlaveAddressValidFlag is asserted.
1191 *
1192 * @param base The LPI2C peripheral base address.
1193 * @return The 8-bit address matched by the LPI2C slave. Bit 0 contains the R/w direction bit, and
1194 * the 7-bit slave address is in the upper 7 bits.
1195 */
LPI2C_SlaveGetReceivedAddress(LPI2C_Type * base)1196 static inline uint32_t LPI2C_SlaveGetReceivedAddress(LPI2C_Type *base)
1197 {
1198 return base->SASR & LPI2C_SASR_RADDR_MASK;
1199 }
1200
1201 /*!
1202 * @brief Performs a polling send transfer on the I2C bus.
1203 *
1204 * @param base The LPI2C peripheral base address.
1205 * @param txBuff The pointer to the data to be transferred.
1206 * @param txSize The length in bytes of the data to be transferred.
1207 * @param[out] actualTxSize
1208 * @return Error or success status returned by API.
1209 */
1210 status_t LPI2C_SlaveSend(LPI2C_Type *base, void *txBuff, size_t txSize, size_t *actualTxSize);
1211
1212 /*!
1213 * @brief Performs a polling receive transfer on the I2C bus.
1214 *
1215 * @param base The LPI2C peripheral base address.
1216 * @param rxBuff The pointer to the data to be transferred.
1217 * @param rxSize The length in bytes of the data to be transferred.
1218 * @param[out] actualRxSize
1219 * @return Error or success status returned by API.
1220 */
1221 status_t LPI2C_SlaveReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize, size_t *actualRxSize);
1222
1223 /*@}*/
1224
1225 /*! @name Slave non-blocking */
1226 /*@{*/
1227
1228 /*!
1229 * @brief Creates a new handle for the LPI2C slave non-blocking APIs.
1230 *
1231 * The creation of a handle is for use with the non-blocking APIs. Once a handle
1232 * is created, there is not a corresponding destroy handle. If the user wants to
1233 * terminate a transfer, the LPI2C_SlaveTransferAbort() API shall be called.
1234 *
1235 * @note The function also enables the NVIC IRQ for the input LPI2C. Need to notice
1236 * that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to
1237 * enable the associated INTMUX IRQ in application.
1238
1239 * @param base The LPI2C peripheral base address.
1240 * @param[out] handle Pointer to the LPI2C slave driver handle.
1241 * @param callback User provided pointer to the asynchronous callback function.
1242 * @param userData User provided pointer to the application callback data.
1243 */
1244 void LPI2C_SlaveTransferCreateHandle(LPI2C_Type *base,
1245 lpi2c_slave_handle_t *handle,
1246 lpi2c_slave_transfer_callback_t callback,
1247 void *userData);
1248
1249 /*!
1250 * @brief Starts accepting slave transfers.
1251 *
1252 * Call this API after calling I2C_SlaveInit() and LPI2C_SlaveTransferCreateHandle() to start processing
1253 * transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the
1254 * callback that was passed into the call to LPI2C_SlaveTransferCreateHandle(). The callback is always invoked
1255 * from the interrupt context.
1256 *
1257 * The set of events received by the callback is customizable. To do so, set the @a eventMask parameter to
1258 * the OR'd combination of #lpi2c_slave_transfer_event_t enumerators for the events you wish to receive.
1259 * The #kLPI2C_SlaveTransmitEvent and #kLPI2C_SlaveReceiveEvent events are always enabled and do not need
1260 * to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and
1261 * receive events that are always enabled. In addition, the #kLPI2C_SlaveAllEvents constant is provided as
1262 * a convenient way to enable all events.
1263 *
1264 * @param base The LPI2C peripheral base address.
1265 * @param handle Pointer to lpi2c_slave_handle_t structure which stores the transfer state.
1266 * @param eventMask Bit mask formed by OR'ing together #lpi2c_slave_transfer_event_t enumerators to specify
1267 * which events to send to the callback. Other accepted values are 0 to get a default set of
1268 * only the transmit and receive events, and #kLPI2C_SlaveAllEvents to enable all events.
1269 *
1270 * @retval kStatus_Success Slave transfers were successfully started.
1271 * @retval #kStatus_LPI2C_Busy Slave transfers have already been started on this handle.
1272 */
1273 status_t LPI2C_SlaveTransferNonBlocking(LPI2C_Type *base, lpi2c_slave_handle_t *handle, uint32_t eventMask);
1274
1275 /*!
1276 * @brief Gets the slave transfer status during a non-blocking transfer.
1277 * @param base The LPI2C peripheral base address.
1278 * @param handle Pointer to i2c_slave_handle_t structure.
1279 * @param[out] count Pointer to a value to hold the number of bytes transferred. May be NULL if the count is not
1280 * required.
1281 * @retval kStatus_Success
1282 * @retval kStatus_NoTransferInProgress
1283 */
1284 status_t LPI2C_SlaveTransferGetCount(LPI2C_Type *base, lpi2c_slave_handle_t *handle, size_t *count);
1285
1286 /*!
1287 * @brief Aborts the slave non-blocking transfers.
1288 * @note This API could be called at any time to stop slave for handling the bus events.
1289 * @param base The LPI2C peripheral base address.
1290 * @param handle Pointer to lpi2c_slave_handle_t structure which stores the transfer state.
1291 * @retval kStatus_Success
1292 * @retval #kStatus_LPI2C_Idle
1293 */
1294 void LPI2C_SlaveTransferAbort(LPI2C_Type *base, lpi2c_slave_handle_t *handle);
1295
1296 /*@}*/
1297
1298 /*! @name Slave IRQ handler */
1299 /*@{*/
1300
1301 /*!
1302 * @brief Reusable routine to handle slave interrupts.
1303 * @note This function does not need to be called unless you are reimplementing the
1304 * non blocking API's interrupt handler routines to add special functionality.
1305 * @param base The LPI2C peripheral base address.
1306 * @param handle Pointer to lpi2c_slave_handle_t structure which stores the transfer state.
1307 */
1308 void LPI2C_SlaveTransferHandleIRQ(LPI2C_Type *base, lpi2c_slave_handle_t *handle);
1309
1310 /*@}*/
1311
1312 /*! @} */
1313
1314 #if defined(__cplusplus)
1315 }
1316 #endif
1317
1318 #endif /* _FSL_LPI2C_H_ */
1319