1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2020 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _FSL_FLEXIO_SPI_H_
10 #define _FSL_FLEXIO_SPI_H_
11
12 #include "fsl_common.h"
13 #include "fsl_flexio.h"
14
15 /*!
16 * @addtogroup flexio_spi
17 * @{
18 */
19
20 /*******************************************************************************
21 * Definitions
22 ******************************************************************************/
23
24 /*! @name Driver version */
25 /*@{*/
26 /*! @brief FlexIO SPI driver version 2.2.0. */
27 #define FSL_FLEXIO_SPI_DRIVER_VERSION (MAKE_VERSION(2, 2, 0))
28 /*@}*/
29
30 #ifndef FLEXIO_SPI_DUMMYDATA
31 /*! @brief FlexIO SPI dummy transfer data, the data is sent while txData is NULL. */
32 #define FLEXIO_SPI_DUMMYDATA (0xFFFFU)
33 #endif
34
35 /*! @brief Retry times for waiting flag. */
36 #ifndef SPI_RETRY_TIMES
37 #define SPI_RETRY_TIMES 0U /* Define to zero means keep waiting until the flag is assert/deassert. */
38 #endif
39
40 /*! @brief Error codes for the FlexIO SPI driver. */
41 enum
42 {
43 kStatus_FLEXIO_SPI_Busy = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 1), /*!< FlexIO SPI is busy. */
44 kStatus_FLEXIO_SPI_Idle = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 2), /*!< SPI is idle */
45 kStatus_FLEXIO_SPI_Error = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 3), /*!< FlexIO SPI error. */
46 kStatus_FLEXIO_SPI_Timeout =
47 MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 4), /*!< FlexIO SPI timeout polling status flags. */
48 };
49
50 /*! @brief FlexIO SPI clock phase configuration. */
51 typedef enum _flexio_spi_clock_phase
52 {
53 kFLEXIO_SPI_ClockPhaseFirstEdge = 0x0U, /*!< First edge on SPSCK occurs at the middle of the first
54 * cycle of a data transfer. */
55 kFLEXIO_SPI_ClockPhaseSecondEdge = 0x1U, /*!< First edge on SPSCK occurs at the start of the
56 * first cycle of a data transfer. */
57 } flexio_spi_clock_phase_t;
58
59 /*! @brief FlexIO SPI data shifter direction options. */
60 typedef enum _flexio_spi_shift_direction
61 {
62 kFLEXIO_SPI_MsbFirst = 0, /*!< Data transfers start with most significant bit. */
63 kFLEXIO_SPI_LsbFirst = 1, /*!< Data transfers start with least significant bit. */
64 } flexio_spi_shift_direction_t;
65
66 /*! @brief FlexIO SPI data length mode options. */
67 typedef enum _flexio_spi_data_bitcount_mode
68 {
69 kFLEXIO_SPI_8BitMode = 0x08U, /*!< 8-bit data transmission mode. */
70 kFLEXIO_SPI_16BitMode = 0x10U, /*!< 16-bit data transmission mode. */
71 } flexio_spi_data_bitcount_mode_t;
72
73 /*! @brief Define FlexIO SPI interrupt mask. */
74 enum _flexio_spi_interrupt_enable
75 {
76 kFLEXIO_SPI_TxEmptyInterruptEnable = 0x1U, /*!< Transmit buffer empty interrupt enable. */
77 kFLEXIO_SPI_RxFullInterruptEnable = 0x2U, /*!< Receive buffer full interrupt enable. */
78 };
79
80 /*! @brief Define FlexIO SPI status mask. */
81 enum _flexio_spi_status_flags
82 {
83 kFLEXIO_SPI_TxBufferEmptyFlag = 0x1U, /*!< Transmit buffer empty flag. */
84 kFLEXIO_SPI_RxBufferFullFlag = 0x2U, /*!< Receive buffer full flag. */
85 };
86
87 /*! @brief Define FlexIO SPI DMA mask. */
88 enum _flexio_spi_dma_enable
89 {
90 kFLEXIO_SPI_TxDmaEnable = 0x1U, /*!< Tx DMA request source */
91 kFLEXIO_SPI_RxDmaEnable = 0x2U, /*!< Rx DMA request source */
92 kFLEXIO_SPI_DmaAllEnable = 0x3U, /*!< All DMA request source*/
93 };
94
95 /*! @brief Define FlexIO SPI transfer flags. */
96 enum _flexio_spi_transfer_flags
97 {
98 kFLEXIO_SPI_8bitMsb = 0x1U, /*!< FlexIO SPI 8-bit MSB first */
99 kFLEXIO_SPI_8bitLsb = 0x2U, /*!< FlexIO SPI 8-bit LSB first */
100 kFLEXIO_SPI_16bitMsb = 0x9U, /*!< FlexIO SPI 16-bit MSB first */
101 kFLEXIO_SPI_16bitLsb = 0xaU, /*!< FlexIO SPI 16-bit LSB first */
102 };
103
104 /*! @brief Define FlexIO SPI access structure typedef. */
105 typedef struct _flexio_spi_type
106 {
107 FLEXIO_Type *flexioBase; /*!< FlexIO base pointer. */
108 uint8_t SDOPinIndex; /*!< Pin select for data output. */
109 uint8_t SDIPinIndex; /*!< Pin select for data input. */
110 uint8_t SCKPinIndex; /*!< Pin select for clock. */
111 uint8_t CSnPinIndex; /*!< Pin select for enable. */
112 uint8_t shifterIndex[2]; /*!< Shifter index used in FlexIO SPI. */
113 uint8_t timerIndex[2]; /*!< Timer index used in FlexIO SPI. */
114 } FLEXIO_SPI_Type;
115
116 /*! @brief Define FlexIO SPI master configuration structure. */
117 typedef struct _flexio_spi_master_config
118 {
119 bool enableMaster; /*!< Enable/disable FlexIO SPI master after configuration. */
120 bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode. */
121 bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode. */
122 bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers,
123 fast access requires the FlexIO clock to be at least
124 twice the frequency of the bus clock. */
125 uint32_t baudRate_Bps; /*!< Baud rate in Bps. */
126 flexio_spi_clock_phase_t phase; /*!< Clock phase. */
127 flexio_spi_data_bitcount_mode_t dataMode; /*!< 8bit or 16bit mode. */
128 } flexio_spi_master_config_t;
129
130 /*! @brief Define FlexIO SPI slave configuration structure. */
131 typedef struct _flexio_spi_slave_config
132 {
133 bool enableSlave; /*!< Enable/disable FlexIO SPI slave after configuration. */
134 bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode. */
135 bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode. */
136 bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers,
137 fast access requires the FlexIO clock to be at least
138 twice the frequency of the bus clock. */
139 flexio_spi_clock_phase_t phase; /*!< Clock phase. */
140 flexio_spi_data_bitcount_mode_t dataMode; /*!< 8bit or 16bit mode. */
141 } flexio_spi_slave_config_t;
142
143 /*! @brief Define FlexIO SPI transfer structure. */
144 typedef struct _flexio_spi_transfer
145 {
146 uint8_t *txData; /*!< Send buffer. */
147 uint8_t *rxData; /*!< Receive buffer. */
148 size_t dataSize; /*!< Transfer bytes. */
149 uint8_t flags; /*!< FlexIO SPI control flag, MSB first or LSB first. */
150 } flexio_spi_transfer_t;
151
152 /*! @brief typedef for flexio_spi_master_handle_t in advance. */
153 typedef struct _flexio_spi_master_handle flexio_spi_master_handle_t;
154
155 /*! @brief Slave handle is the same with master handle. */
156 typedef flexio_spi_master_handle_t flexio_spi_slave_handle_t;
157
158 /*! @brief FlexIO SPI master callback for finished transmit */
159 typedef void (*flexio_spi_master_transfer_callback_t)(FLEXIO_SPI_Type *base,
160 flexio_spi_master_handle_t *handle,
161 status_t status,
162 void *userData);
163
164 /*! @brief FlexIO SPI slave callback for finished transmit */
165 typedef void (*flexio_spi_slave_transfer_callback_t)(FLEXIO_SPI_Type *base,
166 flexio_spi_slave_handle_t *handle,
167 status_t status,
168 void *userData);
169
170 /*! @brief Define FlexIO SPI handle structure. */
171 struct _flexio_spi_master_handle
172 {
173 uint8_t *txData; /*!< Transfer buffer. */
174 uint8_t *rxData; /*!< Receive buffer. */
175 size_t transferSize; /*!< Total bytes to be transferred. */
176 volatile size_t txRemainingBytes; /*!< Send data remaining in bytes. */
177 volatile size_t rxRemainingBytes; /*!< Receive data remaining in bytes. */
178 volatile uint32_t state; /*!< FlexIO SPI internal state. */
179 uint8_t bytePerFrame; /*!< SPI mode, 2bytes or 1byte in a frame */
180 flexio_spi_shift_direction_t direction; /*!< Shift direction. */
181 flexio_spi_master_transfer_callback_t callback; /*!< FlexIO SPI callback. */
182 void *userData; /*!< Callback parameter. */
183 };
184
185 /*******************************************************************************
186 * API
187 ******************************************************************************/
188
189 #if defined(__cplusplus)
190 extern "C" {
191 #endif /*_cplusplus*/
192
193 /*!
194 * @name FlexIO SPI Configuration
195 * @{
196 */
197
198 /*!
199 * @brief Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI master hardware,
200 * and configures the FlexIO SPI with FlexIO SPI master configuration. The
201 * configuration structure can be filled by the user, or be set with default values
202 * by the FLEXIO_SPI_MasterGetDefaultConfig().
203 *
204 * @note 1.FlexIO SPI master only support CPOL = 0, which means clock inactive low.
205 * 2.For FlexIO SPI master, the input valid time is 1.5 clock cycles, for slave the output valid time
206 * is 2.5 clock cycles. So if FlexIO SPI master communicates with other spi IPs, the maximum baud
207 * rate is FlexIO clock frequency divided by 2*2=4. If FlexIO SPI master communicates with FlexIO
208 * SPI slave, the maximum baud rate is FlexIO clock frequency divided by (1.5+2.5)*2=8.
209 *
210 * Example
211 @code
212 FLEXIO_SPI_Type spiDev = {
213 .flexioBase = FLEXIO,
214 .SDOPinIndex = 0,
215 .SDIPinIndex = 1,
216 .SCKPinIndex = 2,
217 .CSnPinIndex = 3,
218 .shifterIndex = {0,1},
219 .timerIndex = {0,1}
220 };
221 flexio_spi_master_config_t config = {
222 .enableMaster = true,
223 .enableInDoze = false,
224 .enableInDebug = true,
225 .enableFastAccess = false,
226 .baudRate_Bps = 500000,
227 .phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
228 .direction = kFLEXIO_SPI_MsbFirst,
229 .dataMode = kFLEXIO_SPI_8BitMode
230 };
231 FLEXIO_SPI_MasterInit(&spiDev, &config, srcClock_Hz);
232 @endcode
233 *
234 * @param base Pointer to the FLEXIO_SPI_Type structure.
235 * @param masterConfig Pointer to the flexio_spi_master_config_t structure.
236 * @param srcClock_Hz FlexIO source clock in Hz.
237 */
238 void FLEXIO_SPI_MasterInit(FLEXIO_SPI_Type *base, flexio_spi_master_config_t *masterConfig, uint32_t srcClock_Hz);
239
240 /*!
241 * @brief Resets the FlexIO SPI timer and shifter config.
242 *
243 * @param base Pointer to the FLEXIO_SPI_Type.
244 */
245 void FLEXIO_SPI_MasterDeinit(FLEXIO_SPI_Type *base);
246
247 /*!
248 * @brief Gets the default configuration to configure the FlexIO SPI master. The configuration
249 * can be used directly by calling the FLEXIO_SPI_MasterConfigure().
250 * Example:
251 @code
252 flexio_spi_master_config_t masterConfig;
253 FLEXIO_SPI_MasterGetDefaultConfig(&masterConfig);
254 @endcode
255 * @param masterConfig Pointer to the flexio_spi_master_config_t structure.
256 */
257 void FLEXIO_SPI_MasterGetDefaultConfig(flexio_spi_master_config_t *masterConfig);
258
259 /*!
260 * @brief Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI slave hardware
261 * configuration, and configures the FlexIO SPI with FlexIO SPI slave configuration. The
262 * configuration structure can be filled by the user, or be set with default values
263 * by the FLEXIO_SPI_SlaveGetDefaultConfig().
264 *
265 * @note 1.Only one timer is needed in the FlexIO SPI slave. As a result, the second timer index is ignored.
266 * 2.FlexIO SPI slave only support CPOL = 0, which means clock inactive low.
267 * 3.For FlexIO SPI master, the input valid time is 1.5 clock cycles, for slave the output valid time
268 * is 2.5 clock cycles. So if FlexIO SPI slave communicates with other spi IPs, the maximum baud
269 * rate is FlexIO clock frequency divided by 3*2=6. If FlexIO SPI slave communicates with FlexIO
270 * SPI master, the maximum baud rate is FlexIO clock frequency divided by (1.5+2.5)*2=8.
271 * Example
272 @code
273 FLEXIO_SPI_Type spiDev = {
274 .flexioBase = FLEXIO,
275 .SDOPinIndex = 0,
276 .SDIPinIndex = 1,
277 .SCKPinIndex = 2,
278 .CSnPinIndex = 3,
279 .shifterIndex = {0,1},
280 .timerIndex = {0}
281 };
282 flexio_spi_slave_config_t config = {
283 .enableSlave = true,
284 .enableInDoze = false,
285 .enableInDebug = true,
286 .enableFastAccess = false,
287 .phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
288 .direction = kFLEXIO_SPI_MsbFirst,
289 .dataMode = kFLEXIO_SPI_8BitMode
290 };
291 FLEXIO_SPI_SlaveInit(&spiDev, &config);
292 @endcode
293 * @param base Pointer to the FLEXIO_SPI_Type structure.
294 * @param slaveConfig Pointer to the flexio_spi_slave_config_t structure.
295 */
296 void FLEXIO_SPI_SlaveInit(FLEXIO_SPI_Type *base, flexio_spi_slave_config_t *slaveConfig);
297
298 /*!
299 * @brief Gates the FlexIO clock.
300 *
301 * @param base Pointer to the FLEXIO_SPI_Type.
302 */
303 void FLEXIO_SPI_SlaveDeinit(FLEXIO_SPI_Type *base);
304
305 /*!
306 * @brief Gets the default configuration to configure the FlexIO SPI slave. The configuration
307 * can be used directly for calling the FLEXIO_SPI_SlaveConfigure().
308 * Example:
309 @code
310 flexio_spi_slave_config_t slaveConfig;
311 FLEXIO_SPI_SlaveGetDefaultConfig(&slaveConfig);
312 @endcode
313 * @param slaveConfig Pointer to the flexio_spi_slave_config_t structure.
314 */
315 void FLEXIO_SPI_SlaveGetDefaultConfig(flexio_spi_slave_config_t *slaveConfig);
316
317 /*@}*/
318
319 /*!
320 * @name Status
321 * @{
322 */
323
324 /*!
325 * @brief Gets FlexIO SPI status flags.
326 *
327 * @param base Pointer to the FLEXIO_SPI_Type structure.
328 * @return status flag; Use the status flag to AND the following flag mask and get the status.
329 * @arg kFLEXIO_SPI_TxEmptyFlag
330 * @arg kFLEXIO_SPI_RxEmptyFlag
331 */
332
333 uint32_t FLEXIO_SPI_GetStatusFlags(FLEXIO_SPI_Type *base);
334
335 /*!
336 * @brief Clears FlexIO SPI status flags.
337 *
338 * @param base Pointer to the FLEXIO_SPI_Type structure.
339 * @param mask status flag
340 * The parameter can be any combination of the following values:
341 * @arg kFLEXIO_SPI_TxEmptyFlag
342 * @arg kFLEXIO_SPI_RxEmptyFlag
343 */
344
345 void FLEXIO_SPI_ClearStatusFlags(FLEXIO_SPI_Type *base, uint32_t mask);
346
347 /*@}*/
348
349 /*!
350 * @name Interrupts
351 * @{
352 */
353
354 /*!
355 * @brief Enables the FlexIO SPI interrupt.
356 *
357 * This function enables the FlexIO SPI interrupt.
358 *
359 * @param base Pointer to the FLEXIO_SPI_Type structure.
360 * @param mask interrupt source. The parameter can be any combination of the following values:
361 * @arg kFLEXIO_SPI_RxFullInterruptEnable
362 * @arg kFLEXIO_SPI_TxEmptyInterruptEnable
363 */
364 void FLEXIO_SPI_EnableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask);
365
366 /*!
367 * @brief Disables the FlexIO SPI interrupt.
368 *
369 * This function disables the FlexIO SPI interrupt.
370 *
371 * @param base Pointer to the FLEXIO_SPI_Type structure.
372 * @param mask interrupt source The parameter can be any combination of the following values:
373 * @arg kFLEXIO_SPI_RxFullInterruptEnable
374 * @arg kFLEXIO_SPI_TxEmptyInterruptEnable
375 */
376 void FLEXIO_SPI_DisableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask);
377
378 /*@}*/
379
380 /*!
381 * @name DMA Control
382 * @{
383 */
384
385 /*!
386 * @brief Enables/disables the FlexIO SPI transmit DMA. This function enables/disables the FlexIO SPI Tx DMA,
387 * which means that asserting the kFLEXIO_SPI_TxEmptyFlag does/doesn't trigger the DMA request.
388 *
389 * @param base Pointer to the FLEXIO_SPI_Type structure.
390 * @param mask SPI DMA source.
391 * @param enable True means enable DMA, false means disable DMA.
392 */
393 void FLEXIO_SPI_EnableDMA(FLEXIO_SPI_Type *base, uint32_t mask, bool enable);
394
395 /*!
396 * @brief Gets the FlexIO SPI transmit data register address for MSB first transfer.
397 *
398 * This function returns the SPI data register address, which is mainly used by DMA/eDMA.
399 *
400 * @param base Pointer to the FLEXIO_SPI_Type structure.
401 * @param direction Shift direction of MSB first or LSB first.
402 * @return FlexIO SPI transmit data register address.
403 */
FLEXIO_SPI_GetTxDataRegisterAddress(FLEXIO_SPI_Type * base,flexio_spi_shift_direction_t direction)404 static inline uint32_t FLEXIO_SPI_GetTxDataRegisterAddress(FLEXIO_SPI_Type *base,
405 flexio_spi_shift_direction_t direction)
406 {
407 if (direction == kFLEXIO_SPI_MsbFirst)
408 {
409 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferBitSwapped,
410 base->shifterIndex[0]) +
411 3U;
412 }
413 else
414 {
415 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBuffer, base->shifterIndex[0]);
416 }
417 }
418
419 /*!
420 * @brief Gets the FlexIO SPI receive data register address for the MSB first transfer.
421 *
422 * This function returns the SPI data register address, which is mainly used by DMA/eDMA.
423 *
424 * @param base Pointer to the FLEXIO_SPI_Type structure.
425 * @param direction Shift direction of MSB first or LSB first.
426 * @return FlexIO SPI receive data register address.
427 */
FLEXIO_SPI_GetRxDataRegisterAddress(FLEXIO_SPI_Type * base,flexio_spi_shift_direction_t direction)428 static inline uint32_t FLEXIO_SPI_GetRxDataRegisterAddress(FLEXIO_SPI_Type *base,
429 flexio_spi_shift_direction_t direction)
430 {
431 if (direction == kFLEXIO_SPI_MsbFirst)
432 {
433 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferBitSwapped, base->shifterIndex[1]);
434 }
435 else
436 {
437 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBuffer, base->shifterIndex[1]) + 3U;
438 }
439 }
440
441 /*@}*/
442
443 /*!
444 * @name Bus Operations
445 * @{
446 */
447
448 /*!
449 * @brief Enables/disables the FlexIO SPI module operation.
450 *
451 * @param base Pointer to the FLEXIO_SPI_Type.
452 * @param enable True to enable, false does not have any effect.
453 */
FLEXIO_SPI_Enable(FLEXIO_SPI_Type * base,bool enable)454 static inline void FLEXIO_SPI_Enable(FLEXIO_SPI_Type *base, bool enable)
455 {
456 if (enable)
457 {
458 base->flexioBase->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
459 }
460 }
461
462 /*!
463 * @brief Sets baud rate for the FlexIO SPI transfer, which is only used for the master.
464 *
465 * @param base Pointer to the FLEXIO_SPI_Type structure.
466 * @param baudRate_Bps Baud Rate needed in Hz.
467 * @param srcClockHz SPI source clock frequency in Hz.
468 */
469 void FLEXIO_SPI_MasterSetBaudRate(FLEXIO_SPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClockHz);
470
471 /*!
472 * @brief Writes one byte of data, which is sent using the MSB method.
473 *
474 * @note This is a non-blocking API, which returns directly after the data is put into the
475 * data register but the data transfer is not finished on the bus. Ensure that
476 * the TxEmptyFlag is asserted before calling this API.
477 *
478 * @param base Pointer to the FLEXIO_SPI_Type structure.
479 * @param direction Shift direction of MSB first or LSB first.
480 * @param data 8 bit/16 bit data.
481 */
FLEXIO_SPI_WriteData(FLEXIO_SPI_Type * base,flexio_spi_shift_direction_t direction,uint16_t data)482 static inline void FLEXIO_SPI_WriteData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint16_t data)
483 {
484 if (direction == kFLEXIO_SPI_MsbFirst)
485 {
486 base->flexioBase->SHIFTBUFBBS[base->shifterIndex[0]] = data;
487 }
488 else
489 {
490 base->flexioBase->SHIFTBUF[base->shifterIndex[0]] = data;
491 }
492 }
493
494 /*!
495 * @brief Reads 8 bit/16 bit data.
496 *
497 * @note This is a non-blocking API, which returns directly after the data is read from the
498 * data register. Ensure that the RxFullFlag is asserted before calling this API.
499 *
500 * @param base Pointer to the FLEXIO_SPI_Type structure.
501 * @param direction Shift direction of MSB first or LSB first.
502 * @return 8 bit/16 bit data received.
503 */
FLEXIO_SPI_ReadData(FLEXIO_SPI_Type * base,flexio_spi_shift_direction_t direction)504 static inline uint16_t FLEXIO_SPI_ReadData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)
505 {
506 if (direction == kFLEXIO_SPI_MsbFirst)
507 {
508 return (uint16_t)(base->flexioBase->SHIFTBUFBIS[base->shifterIndex[1]]);
509 }
510 else
511 {
512 return (uint16_t)(base->flexioBase->SHIFTBUFBYS[base->shifterIndex[1]]);
513 }
514 }
515
516 /*!
517 * @brief Sends a buffer of data bytes.
518 *
519 * @note This function blocks using the polling method until all bytes have been sent.
520 *
521 * @param base Pointer to the FLEXIO_SPI_Type structure.
522 * @param direction Shift direction of MSB first or LSB first.
523 * @param buffer The data bytes to send.
524 * @param size The number of data bytes to send.
525 * @retval kStatus_Success Successfully create the handle.
526 * @retval kStatus_FLEXIO_SPI_Timeout The transfer timed out and was aborted.
527 */
528 status_t FLEXIO_SPI_WriteBlocking(FLEXIO_SPI_Type *base,
529 flexio_spi_shift_direction_t direction,
530 const uint8_t *buffer,
531 size_t size);
532
533 /*!
534 * @brief Receives a buffer of bytes.
535 *
536 * @note This function blocks using the polling method until all bytes have been received.
537 *
538 * @param base Pointer to the FLEXIO_SPI_Type structure.
539 * @param direction Shift direction of MSB first or LSB first.
540 * @param buffer The buffer to store the received bytes.
541 * @param size The number of data bytes to be received.
542 * @param direction Shift direction of MSB first or LSB first.
543 * @retval kStatus_Success Successfully create the handle.
544 * @retval kStatus_FLEXIO_SPI_Timeout The transfer timed out and was aborted.
545 */
546 status_t FLEXIO_SPI_ReadBlocking(FLEXIO_SPI_Type *base,
547 flexio_spi_shift_direction_t direction,
548 uint8_t *buffer,
549 size_t size);
550
551 /*!
552 * @brief Receives a buffer of bytes.
553 *
554 * @note This function blocks via polling until all bytes have been received.
555 *
556 * @param base pointer to FLEXIO_SPI_Type structure
557 * @param xfer FlexIO SPI transfer structure, see #flexio_spi_transfer_t.
558 * @retval kStatus_Success Successfully create the handle.
559 * @retval kStatus_FLEXIO_SPI_Timeout The transfer timed out and was aborted.
560 */
561 status_t FLEXIO_SPI_MasterTransferBlocking(FLEXIO_SPI_Type *base, flexio_spi_transfer_t *xfer);
562
563 /*Transactional APIs*/
564
565 /*!
566 * @name Transactional
567 * @{
568 */
569
570 /*!
571 * @brief Initializes the FlexIO SPI Master handle, which is used in transactional functions.
572 *
573 * @param base Pointer to the FLEXIO_SPI_Type structure.
574 * @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
575 * @param callback The callback function.
576 * @param userData The parameter of the callback function.
577 * @retval kStatus_Success Successfully create the handle.
578 * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range.
579 */
580 status_t FLEXIO_SPI_MasterTransferCreateHandle(FLEXIO_SPI_Type *base,
581 flexio_spi_master_handle_t *handle,
582 flexio_spi_master_transfer_callback_t callback,
583 void *userData);
584
585 /*!
586 * @brief Master transfer data using IRQ.
587 *
588 * This function sends data using IRQ. This is a non-blocking function, which returns
589 * right away. When all data is sent out/received, the callback function is called.
590 *
591 * @param base Pointer to the FLEXIO_SPI_Type structure.
592 * @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
593 * @param xfer FlexIO SPI transfer structure. See #flexio_spi_transfer_t.
594 * @retval kStatus_Success Successfully start a transfer.
595 * @retval kStatus_InvalidArgument Input argument is invalid.
596 * @retval kStatus_FLEXIO_SPI_Busy SPI is not idle, is running another transfer.
597 */
598 status_t FLEXIO_SPI_MasterTransferNonBlocking(FLEXIO_SPI_Type *base,
599 flexio_spi_master_handle_t *handle,
600 flexio_spi_transfer_t *xfer);
601
602 /*!
603 * @brief Aborts the master data transfer, which used IRQ.
604 *
605 * @param base Pointer to the FLEXIO_SPI_Type structure.
606 * @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
607 */
608 void FLEXIO_SPI_MasterTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle);
609
610 /*!
611 * @brief Gets the data transfer status which used IRQ.
612 *
613 * @param base Pointer to the FLEXIO_SPI_Type structure.
614 * @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
615 * @param count Number of bytes transferred so far by the non-blocking transaction.
616 * @retval kStatus_InvalidArgument count is Invalid.
617 * @retval kStatus_Success Successfully return the count.
618 */
619 status_t FLEXIO_SPI_MasterTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, size_t *count);
620
621 /*!
622 * @brief FlexIO SPI master IRQ handler function.
623 *
624 * @param spiType Pointer to the FLEXIO_SPI_Type structure.
625 * @param spiHandle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
626 */
627 void FLEXIO_SPI_MasterTransferHandleIRQ(void *spiType, void *spiHandle);
628
629 /*!
630 * @brief Initializes the FlexIO SPI Slave handle, which is used in transactional functions.
631 *
632 * @param base Pointer to the FLEXIO_SPI_Type structure.
633 * @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
634 * @param callback The callback function.
635 * @param userData The parameter of the callback function.
636 * @retval kStatus_Success Successfully create the handle.
637 * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range.
638 */
639 status_t FLEXIO_SPI_SlaveTransferCreateHandle(FLEXIO_SPI_Type *base,
640 flexio_spi_slave_handle_t *handle,
641 flexio_spi_slave_transfer_callback_t callback,
642 void *userData);
643
644 /*!
645 * @brief Slave transfer data using IRQ.
646 *
647 * This function sends data using IRQ. This is a non-blocking function, which returns
648 * right away. When all data is sent out/received, the callback function is called.
649 * @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
650 *
651 * @param base Pointer to the FLEXIO_SPI_Type structure.
652 * @param xfer FlexIO SPI transfer structure. See #flexio_spi_transfer_t.
653 * @retval kStatus_Success Successfully start a transfer.
654 * @retval kStatus_InvalidArgument Input argument is invalid.
655 * @retval kStatus_FLEXIO_SPI_Busy SPI is not idle; it is running another transfer.
656 */
657 status_t FLEXIO_SPI_SlaveTransferNonBlocking(FLEXIO_SPI_Type *base,
658 flexio_spi_slave_handle_t *handle,
659 flexio_spi_transfer_t *xfer);
660
661 /*!
662 * @brief Aborts the slave data transfer which used IRQ, share same API with master.
663 *
664 * @param base Pointer to the FLEXIO_SPI_Type structure.
665 * @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
666 */
FLEXIO_SPI_SlaveTransferAbort(FLEXIO_SPI_Type * base,flexio_spi_slave_handle_t * handle)667 static inline void FLEXIO_SPI_SlaveTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle)
668 {
669 FLEXIO_SPI_MasterTransferAbort(base, handle);
670 }
671 /*!
672 * @brief Gets the data transfer status which used IRQ, share same API with master.
673 *
674 * @param base Pointer to the FLEXIO_SPI_Type structure.
675 * @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
676 * @param count Number of bytes transferred so far by the non-blocking transaction.
677 * @retval kStatus_InvalidArgument count is Invalid.
678 * @retval kStatus_Success Successfully return the count.
679 */
FLEXIO_SPI_SlaveTransferGetCount(FLEXIO_SPI_Type * base,flexio_spi_slave_handle_t * handle,size_t * count)680 static inline status_t FLEXIO_SPI_SlaveTransferGetCount(FLEXIO_SPI_Type *base,
681 flexio_spi_slave_handle_t *handle,
682 size_t *count)
683 {
684 return FLEXIO_SPI_MasterTransferGetCount(base, handle, count);
685 }
686
687 /*!
688 * @brief FlexIO SPI slave IRQ handler function.
689 *
690 * @param spiType Pointer to the FLEXIO_SPI_Type structure.
691 * @param spiHandle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
692 */
693 void FLEXIO_SPI_SlaveTransferHandleIRQ(void *spiType, void *spiHandle);
694
695 /*@}*/
696
697 #if defined(__cplusplus)
698 }
699 #endif /*_cplusplus*/
700 /*@}*/
701
702 #endif /*_FSL_FLEXIO_SPI_H_*/
703
