1<?xml version="1.0" encoding="UTF-8"?>
2<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
3  <vendor>NXP Semiconductors</vendor>
4  <vendorID>NXP</vendorID>
5  <name>MK82F25615</name>
6  <series>Kinetis_K</series>
7  <version>1.6</version>
8  <description>MK82F25615 NXP Microcontroller</description>
9  <licenseText>Copyright 2016-2018 NXP
10 SPDX-License-Identifier: BSD-3-Clause</licenseText>
11  <cpu>
12    <name>CM4</name>
13    <revision>r0p1</revision>
14    <endian>little</endian>
15    <mpuPresent>false</mpuPresent>
16    <fpuPresent>true</fpuPresent>
17    <vtorPresent>true</vtorPresent>
18    <nvicPrioBits>4</nvicPrioBits>
19    <vendorSystickConfig>false</vendorSystickConfig>
20  </cpu>
21  <addressUnitBits>8</addressUnitBits>
22  <width>32</width>
23  <peripherals>
24    <peripheral>
25      <name>FTFA_FlashConfig</name>
26      <description>Flash configuration field</description>
27      <prependToName>NV_</prependToName>
28      <baseAddress>0x400</baseAddress>
29      <addressBlock>
30        <offset>0</offset>
31        <size>0xE</size>
32        <usage>registers</usage>
33      </addressBlock>
34      <registers>
35        <register>
36          <name>BACKKEY3</name>
37          <description>Backdoor Comparison Key 3.</description>
38          <addressOffset>0</addressOffset>
39          <size>8</size>
40          <access>read-only</access>
41          <resetValue>0xFF</resetValue>
42          <resetMask>0xFF</resetMask>
43          <fields>
44            <field>
45              <name>KEY</name>
46              <description>Backdoor Comparison Key.</description>
47              <bitOffset>0</bitOffset>
48              <bitWidth>8</bitWidth>
49              <access>read-only</access>
50            </field>
51          </fields>
52        </register>
53        <register>
54          <name>BACKKEY2</name>
55          <description>Backdoor Comparison Key 2.</description>
56          <addressOffset>0x1</addressOffset>
57          <size>8</size>
58          <access>read-only</access>
59          <resetValue>0xFF</resetValue>
60          <resetMask>0xFF</resetMask>
61          <fields>
62            <field>
63              <name>KEY</name>
64              <description>Backdoor Comparison Key.</description>
65              <bitOffset>0</bitOffset>
66              <bitWidth>8</bitWidth>
67              <access>read-only</access>
68            </field>
69          </fields>
70        </register>
71        <register>
72          <name>BACKKEY1</name>
73          <description>Backdoor Comparison Key 1.</description>
74          <addressOffset>0x2</addressOffset>
75          <size>8</size>
76          <access>read-only</access>
77          <resetValue>0xFF</resetValue>
78          <resetMask>0xFF</resetMask>
79          <fields>
80            <field>
81              <name>KEY</name>
82              <description>Backdoor Comparison Key.</description>
83              <bitOffset>0</bitOffset>
84              <bitWidth>8</bitWidth>
85              <access>read-only</access>
86            </field>
87          </fields>
88        </register>
89        <register>
90          <name>BACKKEY0</name>
91          <description>Backdoor Comparison Key 0.</description>
92          <addressOffset>0x3</addressOffset>
93          <size>8</size>
94          <access>read-only</access>
95          <resetValue>0xFF</resetValue>
96          <resetMask>0xFF</resetMask>
97          <fields>
98            <field>
99              <name>KEY</name>
100              <description>Backdoor Comparison Key.</description>
101              <bitOffset>0</bitOffset>
102              <bitWidth>8</bitWidth>
103              <access>read-only</access>
104            </field>
105          </fields>
106        </register>
107        <register>
108          <name>BACKKEY7</name>
109          <description>Backdoor Comparison Key 7.</description>
110          <addressOffset>0x4</addressOffset>
111          <size>8</size>
112          <access>read-only</access>
113          <resetValue>0xFF</resetValue>
114          <resetMask>0xFF</resetMask>
115          <fields>
116            <field>
117              <name>KEY</name>
118              <description>Backdoor Comparison Key.</description>
119              <bitOffset>0</bitOffset>
120              <bitWidth>8</bitWidth>
121              <access>read-only</access>
122            </field>
123          </fields>
124        </register>
125        <register>
126          <name>BACKKEY6</name>
127          <description>Backdoor Comparison Key 6.</description>
128          <addressOffset>0x5</addressOffset>
129          <size>8</size>
130          <access>read-only</access>
131          <resetValue>0xFF</resetValue>
132          <resetMask>0xFF</resetMask>
133          <fields>
134            <field>
135              <name>KEY</name>
136              <description>Backdoor Comparison Key.</description>
137              <bitOffset>0</bitOffset>
138              <bitWidth>8</bitWidth>
139              <access>read-only</access>
140            </field>
141          </fields>
142        </register>
143        <register>
144          <name>BACKKEY5</name>
145          <description>Backdoor Comparison Key 5.</description>
146          <addressOffset>0x6</addressOffset>
147          <size>8</size>
148          <access>read-only</access>
149          <resetValue>0xFF</resetValue>
150          <resetMask>0xFF</resetMask>
151          <fields>
152            <field>
153              <name>KEY</name>
154              <description>Backdoor Comparison Key.</description>
155              <bitOffset>0</bitOffset>
156              <bitWidth>8</bitWidth>
157              <access>read-only</access>
158            </field>
159          </fields>
160        </register>
161        <register>
162          <name>BACKKEY4</name>
163          <description>Backdoor Comparison Key 4.</description>
164          <addressOffset>0x7</addressOffset>
165          <size>8</size>
166          <access>read-only</access>
167          <resetValue>0xFF</resetValue>
168          <resetMask>0xFF</resetMask>
169          <fields>
170            <field>
171              <name>KEY</name>
172              <description>Backdoor Comparison Key.</description>
173              <bitOffset>0</bitOffset>
174              <bitWidth>8</bitWidth>
175              <access>read-only</access>
176            </field>
177          </fields>
178        </register>
179        <register>
180          <name>FPROT3</name>
181          <description>Non-volatile P-Flash Protection 1 - Low Register</description>
182          <addressOffset>0x8</addressOffset>
183          <size>8</size>
184          <access>read-only</access>
185          <resetValue>0xFF</resetValue>
186          <resetMask>0xFF</resetMask>
187          <fields>
188            <field>
189              <name>PROT</name>
190              <description>P-Flash Region Protect</description>
191              <bitOffset>0</bitOffset>
192              <bitWidth>8</bitWidth>
193              <access>read-only</access>
194            </field>
195          </fields>
196        </register>
197        <register>
198          <name>FPROT2</name>
199          <description>Non-volatile P-Flash Protection 1 - High Register</description>
200          <addressOffset>0x9</addressOffset>
201          <size>8</size>
202          <access>read-only</access>
203          <resetValue>0xFF</resetValue>
204          <resetMask>0xFF</resetMask>
205          <fields>
206            <field>
207              <name>PROT</name>
208              <description>P-Flash Region Protect</description>
209              <bitOffset>0</bitOffset>
210              <bitWidth>8</bitWidth>
211              <access>read-only</access>
212            </field>
213          </fields>
214        </register>
215        <register>
216          <name>FPROT1</name>
217          <description>Non-volatile P-Flash Protection 0 - Low Register</description>
218          <addressOffset>0xA</addressOffset>
219          <size>8</size>
220          <access>read-only</access>
221          <resetValue>0xFF</resetValue>
222          <resetMask>0xFF</resetMask>
223          <fields>
224            <field>
225              <name>PROT</name>
226              <description>P-Flash Region Protect</description>
227              <bitOffset>0</bitOffset>
228              <bitWidth>8</bitWidth>
229              <access>read-only</access>
230            </field>
231          </fields>
232        </register>
233        <register>
234          <name>FPROT0</name>
235          <description>Non-volatile P-Flash Protection 0 - High Register</description>
236          <addressOffset>0xB</addressOffset>
237          <size>8</size>
238          <access>read-only</access>
239          <resetValue>0xFF</resetValue>
240          <resetMask>0xFF</resetMask>
241          <fields>
242            <field>
243              <name>PROT</name>
244              <description>P-Flash Region Protect</description>
245              <bitOffset>0</bitOffset>
246              <bitWidth>8</bitWidth>
247              <access>read-only</access>
248            </field>
249          </fields>
250        </register>
251        <register>
252          <name>FSEC</name>
253          <description>Non-volatile Flash Security Register</description>
254          <addressOffset>0xC</addressOffset>
255          <size>8</size>
256          <access>read-only</access>
257          <resetValue>0xFF</resetValue>
258          <resetMask>0xFF</resetMask>
259          <fields>
260            <field>
261              <name>SEC</name>
262              <description>Flash Security</description>
263              <bitOffset>0</bitOffset>
264              <bitWidth>2</bitWidth>
265              <access>read-only</access>
266              <enumeratedValues>
267                <enumeratedValue>
268                  <name>10</name>
269                  <description>MCU security status is unsecure</description>
270                  <value>#10</value>
271                </enumeratedValue>
272                <enumeratedValue>
273                  <name>11</name>
274                  <description>MCU security status is secure</description>
275                  <value>#11</value>
276                </enumeratedValue>
277              </enumeratedValues>
278            </field>
279            <field>
280              <name>FSLACC</name>
281              <description>Freescale Failure Analysis Access Code</description>
282              <bitOffset>2</bitOffset>
283              <bitWidth>2</bitWidth>
284              <access>read-only</access>
285              <enumeratedValues>
286                <enumeratedValue>
287                  <name>10</name>
288                  <description>Freescale factory access denied</description>
289                  <value>#10</value>
290                </enumeratedValue>
291                <enumeratedValue>
292                  <name>11</name>
293                  <description>Freescale factory access granted</description>
294                  <value>#11</value>
295                </enumeratedValue>
296              </enumeratedValues>
297            </field>
298            <field>
299              <name>MEEN</name>
300              <description>no description available</description>
301              <bitOffset>4</bitOffset>
302              <bitWidth>2</bitWidth>
303              <access>read-only</access>
304              <enumeratedValues>
305                <enumeratedValue>
306                  <name>10</name>
307                  <description>Mass erase is disabled</description>
308                  <value>#10</value>
309                </enumeratedValue>
310                <enumeratedValue>
311                  <name>11</name>
312                  <description>Mass erase is enabled</description>
313                  <value>#11</value>
314                </enumeratedValue>
315              </enumeratedValues>
316            </field>
317            <field>
318              <name>KEYEN</name>
319              <description>Backdoor Key Security Enable</description>
320              <bitOffset>6</bitOffset>
321              <bitWidth>2</bitWidth>
322              <access>read-only</access>
323              <enumeratedValues>
324                <enumeratedValue>
325                  <name>10</name>
326                  <description>Backdoor key access enabled</description>
327                  <value>#10</value>
328                </enumeratedValue>
329                <enumeratedValue>
330                  <name>11</name>
331                  <description>Backdoor key access disabled</description>
332                  <value>#11</value>
333                </enumeratedValue>
334              </enumeratedValues>
335            </field>
336          </fields>
337        </register>
338        <register>
339          <name>FOPT</name>
340          <description>Non-volatile Flash Option Register</description>
341          <addressOffset>0xD</addressOffset>
342          <size>8</size>
343          <access>read-only</access>
344          <resetValue>0x3D</resetValue>
345          <resetMask>0xFF</resetMask>
346          <fields>
347            <field>
348              <name>LPBOOT</name>
349              <description>no description available</description>
350              <bitOffset>0</bitOffset>
351              <bitWidth>1</bitWidth>
352              <access>read-only</access>
353              <enumeratedValues>
354                <enumeratedValue>
355                  <name>00</name>
356                  <description>Low-power boot</description>
357                  <value>#0</value>
358                </enumeratedValue>
359                <enumeratedValue>
360                  <name>01</name>
361                  <description>Normal boot</description>
362                  <value>#1</value>
363                </enumeratedValue>
364              </enumeratedValues>
365            </field>
366            <field>
367              <name>BOOTPIN_OPT</name>
368              <description>no description available</description>
369              <bitOffset>1</bitOffset>
370              <bitWidth>1</bitWidth>
371              <access>read-only</access>
372              <enumeratedValues>
373                <enumeratedValue>
374                  <name>00</name>
375                  <description>Force Boot from ROM if BOOTCFG0 asserted, where BOOTCFG0 is the boot config function which is muxed with NMI pin</description>
376                  <value>#0</value>
377                </enumeratedValue>
378                <enumeratedValue>
379                  <name>01</name>
380                  <description>Boot source configured by FOPT (BOOTSRC_SEL) bits</description>
381                  <value>#1</value>
382                </enumeratedValue>
383              </enumeratedValues>
384            </field>
385            <field>
386              <name>NMI_DIS</name>
387              <description>no description available</description>
388              <bitOffset>2</bitOffset>
389              <bitWidth>1</bitWidth>
390              <access>read-only</access>
391              <enumeratedValues>
392                <enumeratedValue>
393                  <name>00</name>
394                  <description>NMI interrupts are always blocked</description>
395                  <value>#0</value>
396                </enumeratedValue>
397                <enumeratedValue>
398                  <name>01</name>
399                  <description>NMI_b pin/interrupts reset default to enabled</description>
400                  <value>#1</value>
401                </enumeratedValue>
402              </enumeratedValues>
403            </field>
404            <field>
405              <name>FAST_INIT</name>
406              <description>no description available</description>
407              <bitOffset>5</bitOffset>
408              <bitWidth>1</bitWidth>
409              <access>read-only</access>
410              <enumeratedValues>
411                <enumeratedValue>
412                  <name>00</name>
413                  <description>Slower initialization</description>
414                  <value>#0</value>
415                </enumeratedValue>
416                <enumeratedValue>
417                  <name>01</name>
418                  <description>Fast Initialization</description>
419                  <value>#1</value>
420                </enumeratedValue>
421              </enumeratedValues>
422            </field>
423            <field>
424              <name>BOOTSRC_SEL</name>
425              <description>Boot source selection</description>
426              <bitOffset>6</bitOffset>
427              <bitWidth>2</bitWidth>
428              <access>read-only</access>
429              <enumeratedValues>
430                <enumeratedValue>
431                  <name>00</name>
432                  <description>Boot from Flash</description>
433                  <value>#00</value>
434                </enumeratedValue>
435                <enumeratedValue>
436                  <name>10</name>
437                  <description>Boot from ROM, configure QSPI0, and enter boot loader mode.</description>
438                  <value>#10</value>
439                </enumeratedValue>
440                <enumeratedValue>
441                  <name>11</name>
442                  <description>Boot from ROM and enter boot loader mode.</description>
443                  <value>#11</value>
444                </enumeratedValue>
445              </enumeratedValues>
446            </field>
447          </fields>
448        </register>
449      </registers>
450    </peripheral>
451    <peripheral>
452      <name>AIPS0</name>
453      <description>AIPS-Lite Bridge</description>
454      <groupName>AIPS</groupName>
455      <prependToName>AIPS0_</prependToName>
456      <baseAddress>0x40000000</baseAddress>
457      <addressBlock>
458        <offset>0</offset>
459        <size>0x70</size>
460        <usage>registers</usage>
461      </addressBlock>
462      <registers>
463        <register>
464          <name>MPRA</name>
465          <description>Master Privilege Register A</description>
466          <addressOffset>0</addressOffset>
467          <size>32</size>
468          <access>read-write</access>
469          <resetValue>0x77700000</resetValue>
470          <resetMask>0xFFFFFFFF</resetMask>
471          <fields>
472            <field>
473              <name>MPL4</name>
474              <description>Master 4 Privilege Level</description>
475              <bitOffset>12</bitOffset>
476              <bitWidth>1</bitWidth>
477              <access>read-write</access>
478              <enumeratedValues>
479                <enumeratedValue>
480                  <name>0</name>
481                  <description>Accesses from this master are forced to user-mode.</description>
482                  <value>#0</value>
483                </enumeratedValue>
484                <enumeratedValue>
485                  <name>1</name>
486                  <description>Accesses from this master are not forced to user-mode.</description>
487                  <value>#1</value>
488                </enumeratedValue>
489              </enumeratedValues>
490            </field>
491            <field>
492              <name>MTW4</name>
493              <description>Master 4 Trusted For Writes</description>
494              <bitOffset>13</bitOffset>
495              <bitWidth>1</bitWidth>
496              <access>read-write</access>
497              <enumeratedValues>
498                <enumeratedValue>
499                  <name>0</name>
500                  <description>This master is not trusted for write accesses.</description>
501                  <value>#0</value>
502                </enumeratedValue>
503                <enumeratedValue>
504                  <name>1</name>
505                  <description>This master is trusted for write accesses.</description>
506                  <value>#1</value>
507                </enumeratedValue>
508              </enumeratedValues>
509            </field>
510            <field>
511              <name>MTR4</name>
512              <description>Master 4 Trusted For Read</description>
513              <bitOffset>14</bitOffset>
514              <bitWidth>1</bitWidth>
515              <access>read-write</access>
516              <enumeratedValues>
517                <enumeratedValue>
518                  <name>0</name>
519                  <description>This master is not trusted for read accesses.</description>
520                  <value>#0</value>
521                </enumeratedValue>
522                <enumeratedValue>
523                  <name>1</name>
524                  <description>This master is trusted for read accesses.</description>
525                  <value>#1</value>
526                </enumeratedValue>
527              </enumeratedValues>
528            </field>
529            <field>
530              <name>MPL3</name>
531              <description>Master 3 Privilege Level</description>
532              <bitOffset>16</bitOffset>
533              <bitWidth>1</bitWidth>
534              <access>read-write</access>
535              <enumeratedValues>
536                <enumeratedValue>
537                  <name>0</name>
538                  <description>Accesses from this master are forced to user-mode.</description>
539                  <value>#0</value>
540                </enumeratedValue>
541                <enumeratedValue>
542                  <name>1</name>
543                  <description>Accesses from this master are not forced to user-mode.</description>
544                  <value>#1</value>
545                </enumeratedValue>
546              </enumeratedValues>
547            </field>
548            <field>
549              <name>MTW3</name>
550              <description>Master 3 Trusted For Writes</description>
551              <bitOffset>17</bitOffset>
552              <bitWidth>1</bitWidth>
553              <access>read-write</access>
554              <enumeratedValues>
555                <enumeratedValue>
556                  <name>0</name>
557                  <description>This master is not trusted for write accesses.</description>
558                  <value>#0</value>
559                </enumeratedValue>
560                <enumeratedValue>
561                  <name>1</name>
562                  <description>This master is trusted for write accesses.</description>
563                  <value>#1</value>
564                </enumeratedValue>
565              </enumeratedValues>
566            </field>
567            <field>
568              <name>MTR3</name>
569              <description>Master 3 Trusted For Read</description>
570              <bitOffset>18</bitOffset>
571              <bitWidth>1</bitWidth>
572              <access>read-write</access>
573              <enumeratedValues>
574                <enumeratedValue>
575                  <name>0</name>
576                  <description>This master is not trusted for read accesses.</description>
577                  <value>#0</value>
578                </enumeratedValue>
579                <enumeratedValue>
580                  <name>1</name>
581                  <description>This master is trusted for read accesses.</description>
582                  <value>#1</value>
583                </enumeratedValue>
584              </enumeratedValues>
585            </field>
586            <field>
587              <name>MPL2</name>
588              <description>Master 2 Privilege Level</description>
589              <bitOffset>20</bitOffset>
590              <bitWidth>1</bitWidth>
591              <access>read-write</access>
592              <enumeratedValues>
593                <enumeratedValue>
594                  <name>0</name>
595                  <description>Accesses from this master are forced to user-mode.</description>
596                  <value>#0</value>
597                </enumeratedValue>
598                <enumeratedValue>
599                  <name>1</name>
600                  <description>Accesses from this master are not forced to user-mode.</description>
601                  <value>#1</value>
602                </enumeratedValue>
603              </enumeratedValues>
604            </field>
605            <field>
606              <name>MTW2</name>
607              <description>Master 2 Trusted For Writes</description>
608              <bitOffset>21</bitOffset>
609              <bitWidth>1</bitWidth>
610              <access>read-write</access>
611              <enumeratedValues>
612                <enumeratedValue>
613                  <name>0</name>
614                  <description>This master is not trusted for write accesses.</description>
615                  <value>#0</value>
616                </enumeratedValue>
617                <enumeratedValue>
618                  <name>1</name>
619                  <description>This master is trusted for write accesses.</description>
620                  <value>#1</value>
621                </enumeratedValue>
622              </enumeratedValues>
623            </field>
624            <field>
625              <name>MTR2</name>
626              <description>Master 2 Trusted For Read</description>
627              <bitOffset>22</bitOffset>
628              <bitWidth>1</bitWidth>
629              <access>read-write</access>
630              <enumeratedValues>
631                <enumeratedValue>
632                  <name>0</name>
633                  <description>This master is not trusted for read accesses.</description>
634                  <value>#0</value>
635                </enumeratedValue>
636                <enumeratedValue>
637                  <name>1</name>
638                  <description>This master is trusted for read accesses.</description>
639                  <value>#1</value>
640                </enumeratedValue>
641              </enumeratedValues>
642            </field>
643            <field>
644              <name>MPL1</name>
645              <description>Master 1 Privilege Level</description>
646              <bitOffset>24</bitOffset>
647              <bitWidth>1</bitWidth>
648              <access>read-write</access>
649              <enumeratedValues>
650                <enumeratedValue>
651                  <name>0</name>
652                  <description>Accesses from this master are forced to user-mode.</description>
653                  <value>#0</value>
654                </enumeratedValue>
655                <enumeratedValue>
656                  <name>1</name>
657                  <description>Accesses from this master are not forced to user-mode.</description>
658                  <value>#1</value>
659                </enumeratedValue>
660              </enumeratedValues>
661            </field>
662            <field>
663              <name>MTW1</name>
664              <description>Master 1 Trusted for Writes</description>
665              <bitOffset>25</bitOffset>
666              <bitWidth>1</bitWidth>
667              <access>read-write</access>
668              <enumeratedValues>
669                <enumeratedValue>
670                  <name>0</name>
671                  <description>This master is not trusted for write accesses.</description>
672                  <value>#0</value>
673                </enumeratedValue>
674                <enumeratedValue>
675                  <name>1</name>
676                  <description>This master is trusted for write accesses.</description>
677                  <value>#1</value>
678                </enumeratedValue>
679              </enumeratedValues>
680            </field>
681            <field>
682              <name>MTR1</name>
683              <description>Master 1 Trusted for Read</description>
684              <bitOffset>26</bitOffset>
685              <bitWidth>1</bitWidth>
686              <access>read-write</access>
687              <enumeratedValues>
688                <enumeratedValue>
689                  <name>0</name>
690                  <description>This master is not trusted for read accesses.</description>
691                  <value>#0</value>
692                </enumeratedValue>
693                <enumeratedValue>
694                  <name>1</name>
695                  <description>This master is trusted for read accesses.</description>
696                  <value>#1</value>
697                </enumeratedValue>
698              </enumeratedValues>
699            </field>
700            <field>
701              <name>MPL0</name>
702              <description>Master 0 Privilege Level</description>
703              <bitOffset>28</bitOffset>
704              <bitWidth>1</bitWidth>
705              <access>read-write</access>
706              <enumeratedValues>
707                <enumeratedValue>
708                  <name>0</name>
709                  <description>Accesses from this master are forced to user-mode.</description>
710                  <value>#0</value>
711                </enumeratedValue>
712                <enumeratedValue>
713                  <name>1</name>
714                  <description>Accesses from this master are not forced to user-mode.</description>
715                  <value>#1</value>
716                </enumeratedValue>
717              </enumeratedValues>
718            </field>
719            <field>
720              <name>MTW0</name>
721              <description>Master 0 Trusted For Writes</description>
722              <bitOffset>29</bitOffset>
723              <bitWidth>1</bitWidth>
724              <access>read-write</access>
725              <enumeratedValues>
726                <enumeratedValue>
727                  <name>0</name>
728                  <description>This master is not trusted for write accesses.</description>
729                  <value>#0</value>
730                </enumeratedValue>
731                <enumeratedValue>
732                  <name>1</name>
733                  <description>This master is trusted for write accesses.</description>
734                  <value>#1</value>
735                </enumeratedValue>
736              </enumeratedValues>
737            </field>
738            <field>
739              <name>MTR0</name>
740              <description>Master 0 Trusted For Read</description>
741              <bitOffset>30</bitOffset>
742              <bitWidth>1</bitWidth>
743              <access>read-write</access>
744              <enumeratedValues>
745                <enumeratedValue>
746                  <name>0</name>
747                  <description>This master is not trusted for read accesses.</description>
748                  <value>#0</value>
749                </enumeratedValue>
750                <enumeratedValue>
751                  <name>1</name>
752                  <description>This master is trusted for read accesses.</description>
753                  <value>#1</value>
754                </enumeratedValue>
755              </enumeratedValues>
756            </field>
757          </fields>
758        </register>
759        <register>
760          <name>PACRA</name>
761          <description>Peripheral Access Control Register</description>
762          <addressOffset>0x20</addressOffset>
763          <size>32</size>
764          <access>read-write</access>
765          <resetValue>0x40004000</resetValue>
766          <resetMask>0xFFFFFFFF</resetMask>
767          <fields>
768            <field>
769              <name>TP7</name>
770              <description>Trusted Protect</description>
771              <bitOffset>0</bitOffset>
772              <bitWidth>1</bitWidth>
773              <access>read-write</access>
774              <enumeratedValues>
775                <enumeratedValue>
776                  <name>0</name>
777                  <description>Accesses from an untrusted master are allowed.</description>
778                  <value>#0</value>
779                </enumeratedValue>
780                <enumeratedValue>
781                  <name>1</name>
782                  <description>Accesses from an untrusted master are not allowed.</description>
783                  <value>#1</value>
784                </enumeratedValue>
785              </enumeratedValues>
786            </field>
787            <field>
788              <name>WP7</name>
789              <description>Write Protect</description>
790              <bitOffset>1</bitOffset>
791              <bitWidth>1</bitWidth>
792              <access>read-write</access>
793              <enumeratedValues>
794                <enumeratedValue>
795                  <name>0</name>
796                  <description>This peripheral allows write accesses.</description>
797                  <value>#0</value>
798                </enumeratedValue>
799                <enumeratedValue>
800                  <name>1</name>
801                  <description>This peripheral is write protected.</description>
802                  <value>#1</value>
803                </enumeratedValue>
804              </enumeratedValues>
805            </field>
806            <field>
807              <name>SP7</name>
808              <description>Supervisor Protect</description>
809              <bitOffset>2</bitOffset>
810              <bitWidth>1</bitWidth>
811              <access>read-write</access>
812              <enumeratedValues>
813                <enumeratedValue>
814                  <name>0</name>
815                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
816                  <value>#0</value>
817                </enumeratedValue>
818                <enumeratedValue>
819                  <name>1</name>
820                  <description>This peripheral requires supervisor privilege level for accesses.</description>
821                  <value>#1</value>
822                </enumeratedValue>
823              </enumeratedValues>
824            </field>
825            <field>
826              <name>TP6</name>
827              <description>Trusted Protect</description>
828              <bitOffset>4</bitOffset>
829              <bitWidth>1</bitWidth>
830              <access>read-write</access>
831              <enumeratedValues>
832                <enumeratedValue>
833                  <name>0</name>
834                  <description>Accesses from an untrusted master are allowed.</description>
835                  <value>#0</value>
836                </enumeratedValue>
837                <enumeratedValue>
838                  <name>1</name>
839                  <description>Accesses from an untrusted master are not allowed.</description>
840                  <value>#1</value>
841                </enumeratedValue>
842              </enumeratedValues>
843            </field>
844            <field>
845              <name>WP6</name>
846              <description>Write Protect</description>
847              <bitOffset>5</bitOffset>
848              <bitWidth>1</bitWidth>
849              <access>read-write</access>
850              <enumeratedValues>
851                <enumeratedValue>
852                  <name>0</name>
853                  <description>This peripheral allows write accesses.</description>
854                  <value>#0</value>
855                </enumeratedValue>
856                <enumeratedValue>
857                  <name>1</name>
858                  <description>This peripheral is write protected.</description>
859                  <value>#1</value>
860                </enumeratedValue>
861              </enumeratedValues>
862            </field>
863            <field>
864              <name>SP6</name>
865              <description>Supervisor Protect</description>
866              <bitOffset>6</bitOffset>
867              <bitWidth>1</bitWidth>
868              <access>read-write</access>
869              <enumeratedValues>
870                <enumeratedValue>
871                  <name>0</name>
872                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
873                  <value>#0</value>
874                </enumeratedValue>
875                <enumeratedValue>
876                  <name>1</name>
877                  <description>This peripheral requires supervisor privilege level for accesses.</description>
878                  <value>#1</value>
879                </enumeratedValue>
880              </enumeratedValues>
881            </field>
882            <field>
883              <name>TP5</name>
884              <description>Trusted Protect</description>
885              <bitOffset>8</bitOffset>
886              <bitWidth>1</bitWidth>
887              <access>read-write</access>
888              <enumeratedValues>
889                <enumeratedValue>
890                  <name>0</name>
891                  <description>Accesses from an untrusted master are allowed.</description>
892                  <value>#0</value>
893                </enumeratedValue>
894                <enumeratedValue>
895                  <name>1</name>
896                  <description>Accesses from an untrusted master are not allowed.</description>
897                  <value>#1</value>
898                </enumeratedValue>
899              </enumeratedValues>
900            </field>
901            <field>
902              <name>WP5</name>
903              <description>Write Protect</description>
904              <bitOffset>9</bitOffset>
905              <bitWidth>1</bitWidth>
906              <access>read-write</access>
907              <enumeratedValues>
908                <enumeratedValue>
909                  <name>0</name>
910                  <description>This peripheral allows write accesses.</description>
911                  <value>#0</value>
912                </enumeratedValue>
913                <enumeratedValue>
914                  <name>1</name>
915                  <description>This peripheral is write protected.</description>
916                  <value>#1</value>
917                </enumeratedValue>
918              </enumeratedValues>
919            </field>
920            <field>
921              <name>SP5</name>
922              <description>Supervisor Protect</description>
923              <bitOffset>10</bitOffset>
924              <bitWidth>1</bitWidth>
925              <access>read-write</access>
926              <enumeratedValues>
927                <enumeratedValue>
928                  <name>0</name>
929                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
930                  <value>#0</value>
931                </enumeratedValue>
932                <enumeratedValue>
933                  <name>1</name>
934                  <description>This peripheral requires supervisor privilege level for accesses.</description>
935                  <value>#1</value>
936                </enumeratedValue>
937              </enumeratedValues>
938            </field>
939            <field>
940              <name>TP4</name>
941              <description>Trusted Protect</description>
942              <bitOffset>12</bitOffset>
943              <bitWidth>1</bitWidth>
944              <access>read-write</access>
945              <enumeratedValues>
946                <enumeratedValue>
947                  <name>0</name>
948                  <description>Accesses from an untrusted master are allowed.</description>
949                  <value>#0</value>
950                </enumeratedValue>
951                <enumeratedValue>
952                  <name>1</name>
953                  <description>Accesses from an untrusted master are not allowed.</description>
954                  <value>#1</value>
955                </enumeratedValue>
956              </enumeratedValues>
957            </field>
958            <field>
959              <name>WP4</name>
960              <description>Write Protect</description>
961              <bitOffset>13</bitOffset>
962              <bitWidth>1</bitWidth>
963              <access>read-write</access>
964              <enumeratedValues>
965                <enumeratedValue>
966                  <name>0</name>
967                  <description>This peripheral allows write accesses.</description>
968                  <value>#0</value>
969                </enumeratedValue>
970                <enumeratedValue>
971                  <name>1</name>
972                  <description>This peripheral is write protected.</description>
973                  <value>#1</value>
974                </enumeratedValue>
975              </enumeratedValues>
976            </field>
977            <field>
978              <name>SP4</name>
979              <description>Supervisor Protect</description>
980              <bitOffset>14</bitOffset>
981              <bitWidth>1</bitWidth>
982              <access>read-write</access>
983              <enumeratedValues>
984                <enumeratedValue>
985                  <name>0</name>
986                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
987                  <value>#0</value>
988                </enumeratedValue>
989                <enumeratedValue>
990                  <name>1</name>
991                  <description>This peripheral requires supervisor privilege level for accesses.</description>
992                  <value>#1</value>
993                </enumeratedValue>
994              </enumeratedValues>
995            </field>
996            <field>
997              <name>TP3</name>
998              <description>Trusted Protect</description>
999              <bitOffset>16</bitOffset>
1000              <bitWidth>1</bitWidth>
1001              <access>read-write</access>
1002              <enumeratedValues>
1003                <enumeratedValue>
1004                  <name>0</name>
1005                  <description>Accesses from an untrusted master are allowed.</description>
1006                  <value>#0</value>
1007                </enumeratedValue>
1008                <enumeratedValue>
1009                  <name>1</name>
1010                  <description>Accesses from an untrusted master are not allowed.</description>
1011                  <value>#1</value>
1012                </enumeratedValue>
1013              </enumeratedValues>
1014            </field>
1015            <field>
1016              <name>WP3</name>
1017              <description>Write Protect</description>
1018              <bitOffset>17</bitOffset>
1019              <bitWidth>1</bitWidth>
1020              <access>read-write</access>
1021              <enumeratedValues>
1022                <enumeratedValue>
1023                  <name>0</name>
1024                  <description>This peripheral allows write accesses.</description>
1025                  <value>#0</value>
1026                </enumeratedValue>
1027                <enumeratedValue>
1028                  <name>1</name>
1029                  <description>This peripheral is write protected.</description>
1030                  <value>#1</value>
1031                </enumeratedValue>
1032              </enumeratedValues>
1033            </field>
1034            <field>
1035              <name>SP3</name>
1036              <description>Supervisor Protect</description>
1037              <bitOffset>18</bitOffset>
1038              <bitWidth>1</bitWidth>
1039              <access>read-write</access>
1040              <enumeratedValues>
1041                <enumeratedValue>
1042                  <name>0</name>
1043                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1044                  <value>#0</value>
1045                </enumeratedValue>
1046                <enumeratedValue>
1047                  <name>1</name>
1048                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1049                  <value>#1</value>
1050                </enumeratedValue>
1051              </enumeratedValues>
1052            </field>
1053            <field>
1054              <name>TP2</name>
1055              <description>Trusted Protect</description>
1056              <bitOffset>20</bitOffset>
1057              <bitWidth>1</bitWidth>
1058              <access>read-write</access>
1059              <enumeratedValues>
1060                <enumeratedValue>
1061                  <name>0</name>
1062                  <description>Accesses from an untrusted master are allowed.</description>
1063                  <value>#0</value>
1064                </enumeratedValue>
1065                <enumeratedValue>
1066                  <name>1</name>
1067                  <description>Accesses from an untrusted master are not allowed.</description>
1068                  <value>#1</value>
1069                </enumeratedValue>
1070              </enumeratedValues>
1071            </field>
1072            <field>
1073              <name>WP2</name>
1074              <description>Write Protect</description>
1075              <bitOffset>21</bitOffset>
1076              <bitWidth>1</bitWidth>
1077              <access>read-write</access>
1078              <enumeratedValues>
1079                <enumeratedValue>
1080                  <name>0</name>
1081                  <description>This peripheral allows write accesses.</description>
1082                  <value>#0</value>
1083                </enumeratedValue>
1084                <enumeratedValue>
1085                  <name>1</name>
1086                  <description>This peripheral is write protected.</description>
1087                  <value>#1</value>
1088                </enumeratedValue>
1089              </enumeratedValues>
1090            </field>
1091            <field>
1092              <name>SP2</name>
1093              <description>Supervisor Protect</description>
1094              <bitOffset>22</bitOffset>
1095              <bitWidth>1</bitWidth>
1096              <access>read-write</access>
1097              <enumeratedValues>
1098                <enumeratedValue>
1099                  <name>0</name>
1100                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1101                  <value>#0</value>
1102                </enumeratedValue>
1103                <enumeratedValue>
1104                  <name>1</name>
1105                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1106                  <value>#1</value>
1107                </enumeratedValue>
1108              </enumeratedValues>
1109            </field>
1110            <field>
1111              <name>TP1</name>
1112              <description>Trusted Protect</description>
1113              <bitOffset>24</bitOffset>
1114              <bitWidth>1</bitWidth>
1115              <access>read-write</access>
1116              <enumeratedValues>
1117                <enumeratedValue>
1118                  <name>0</name>
1119                  <description>Accesses from an untrusted master are allowed.</description>
1120                  <value>#0</value>
1121                </enumeratedValue>
1122                <enumeratedValue>
1123                  <name>1</name>
1124                  <description>Accesses from an untrusted master are not allowed.</description>
1125                  <value>#1</value>
1126                </enumeratedValue>
1127              </enumeratedValues>
1128            </field>
1129            <field>
1130              <name>WP1</name>
1131              <description>Write Protect</description>
1132              <bitOffset>25</bitOffset>
1133              <bitWidth>1</bitWidth>
1134              <access>read-write</access>
1135              <enumeratedValues>
1136                <enumeratedValue>
1137                  <name>0</name>
1138                  <description>This peripheral allows write accesses.</description>
1139                  <value>#0</value>
1140                </enumeratedValue>
1141                <enumeratedValue>
1142                  <name>1</name>
1143                  <description>This peripheral is write protected.</description>
1144                  <value>#1</value>
1145                </enumeratedValue>
1146              </enumeratedValues>
1147            </field>
1148            <field>
1149              <name>SP1</name>
1150              <description>Supervisor Protect</description>
1151              <bitOffset>26</bitOffset>
1152              <bitWidth>1</bitWidth>
1153              <access>read-write</access>
1154              <enumeratedValues>
1155                <enumeratedValue>
1156                  <name>0</name>
1157                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1158                  <value>#0</value>
1159                </enumeratedValue>
1160                <enumeratedValue>
1161                  <name>1</name>
1162                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1163                  <value>#1</value>
1164                </enumeratedValue>
1165              </enumeratedValues>
1166            </field>
1167            <field>
1168              <name>TP0</name>
1169              <description>Trusted Protect</description>
1170              <bitOffset>28</bitOffset>
1171              <bitWidth>1</bitWidth>
1172              <access>read-write</access>
1173              <enumeratedValues>
1174                <enumeratedValue>
1175                  <name>0</name>
1176                  <description>Accesses from an untrusted master are allowed.</description>
1177                  <value>#0</value>
1178                </enumeratedValue>
1179                <enumeratedValue>
1180                  <name>1</name>
1181                  <description>Accesses from an untrusted master are not allowed.</description>
1182                  <value>#1</value>
1183                </enumeratedValue>
1184              </enumeratedValues>
1185            </field>
1186            <field>
1187              <name>WP0</name>
1188              <description>Write Protect</description>
1189              <bitOffset>29</bitOffset>
1190              <bitWidth>1</bitWidth>
1191              <access>read-write</access>
1192              <enumeratedValues>
1193                <enumeratedValue>
1194                  <name>0</name>
1195                  <description>This peripheral allows write accesses.</description>
1196                  <value>#0</value>
1197                </enumeratedValue>
1198                <enumeratedValue>
1199                  <name>1</name>
1200                  <description>This peripheral is write protected.</description>
1201                  <value>#1</value>
1202                </enumeratedValue>
1203              </enumeratedValues>
1204            </field>
1205            <field>
1206              <name>SP0</name>
1207              <description>Supervisor Protect</description>
1208              <bitOffset>30</bitOffset>
1209              <bitWidth>1</bitWidth>
1210              <access>read-write</access>
1211              <enumeratedValues>
1212                <enumeratedValue>
1213                  <name>0</name>
1214                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1215                  <value>#0</value>
1216                </enumeratedValue>
1217                <enumeratedValue>
1218                  <name>1</name>
1219                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1220                  <value>#1</value>
1221                </enumeratedValue>
1222              </enumeratedValues>
1223            </field>
1224          </fields>
1225        </register>
1226        <register>
1227          <name>PACRB</name>
1228          <description>Peripheral Access Control Register</description>
1229          <addressOffset>0x24</addressOffset>
1230          <size>32</size>
1231          <access>read-write</access>
1232          <resetValue>0x44004404</resetValue>
1233          <resetMask>0xFFFFFFFF</resetMask>
1234          <fields>
1235            <field>
1236              <name>TP7</name>
1237              <description>Trusted Protect</description>
1238              <bitOffset>0</bitOffset>
1239              <bitWidth>1</bitWidth>
1240              <access>read-write</access>
1241              <enumeratedValues>
1242                <enumeratedValue>
1243                  <name>0</name>
1244                  <description>Accesses from an untrusted master are allowed.</description>
1245                  <value>#0</value>
1246                </enumeratedValue>
1247                <enumeratedValue>
1248                  <name>1</name>
1249                  <description>Accesses from an untrusted master are not allowed.</description>
1250                  <value>#1</value>
1251                </enumeratedValue>
1252              </enumeratedValues>
1253            </field>
1254            <field>
1255              <name>WP7</name>
1256              <description>Write Protect</description>
1257              <bitOffset>1</bitOffset>
1258              <bitWidth>1</bitWidth>
1259              <access>read-write</access>
1260              <enumeratedValues>
1261                <enumeratedValue>
1262                  <name>0</name>
1263                  <description>This peripheral allows write accesses.</description>
1264                  <value>#0</value>
1265                </enumeratedValue>
1266                <enumeratedValue>
1267                  <name>1</name>
1268                  <description>This peripheral is write protected.</description>
1269                  <value>#1</value>
1270                </enumeratedValue>
1271              </enumeratedValues>
1272            </field>
1273            <field>
1274              <name>SP7</name>
1275              <description>Supervisor Protect</description>
1276              <bitOffset>2</bitOffset>
1277              <bitWidth>1</bitWidth>
1278              <access>read-write</access>
1279              <enumeratedValues>
1280                <enumeratedValue>
1281                  <name>0</name>
1282                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1283                  <value>#0</value>
1284                </enumeratedValue>
1285                <enumeratedValue>
1286                  <name>1</name>
1287                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1288                  <value>#1</value>
1289                </enumeratedValue>
1290              </enumeratedValues>
1291            </field>
1292            <field>
1293              <name>TP6</name>
1294              <description>Trusted Protect</description>
1295              <bitOffset>4</bitOffset>
1296              <bitWidth>1</bitWidth>
1297              <access>read-write</access>
1298              <enumeratedValues>
1299                <enumeratedValue>
1300                  <name>0</name>
1301                  <description>Accesses from an untrusted master are allowed.</description>
1302                  <value>#0</value>
1303                </enumeratedValue>
1304                <enumeratedValue>
1305                  <name>1</name>
1306                  <description>Accesses from an untrusted master are not allowed.</description>
1307                  <value>#1</value>
1308                </enumeratedValue>
1309              </enumeratedValues>
1310            </field>
1311            <field>
1312              <name>WP6</name>
1313              <description>Write Protect</description>
1314              <bitOffset>5</bitOffset>
1315              <bitWidth>1</bitWidth>
1316              <access>read-write</access>
1317              <enumeratedValues>
1318                <enumeratedValue>
1319                  <name>0</name>
1320                  <description>This peripheral allows write accesses.</description>
1321                  <value>#0</value>
1322                </enumeratedValue>
1323                <enumeratedValue>
1324                  <name>1</name>
1325                  <description>This peripheral is write protected.</description>
1326                  <value>#1</value>
1327                </enumeratedValue>
1328              </enumeratedValues>
1329            </field>
1330            <field>
1331              <name>SP6</name>
1332              <description>Supervisor Protect</description>
1333              <bitOffset>6</bitOffset>
1334              <bitWidth>1</bitWidth>
1335              <access>read-write</access>
1336              <enumeratedValues>
1337                <enumeratedValue>
1338                  <name>0</name>
1339                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1340                  <value>#0</value>
1341                </enumeratedValue>
1342                <enumeratedValue>
1343                  <name>1</name>
1344                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1345                  <value>#1</value>
1346                </enumeratedValue>
1347              </enumeratedValues>
1348            </field>
1349            <field>
1350              <name>TP5</name>
1351              <description>Trusted Protect</description>
1352              <bitOffset>8</bitOffset>
1353              <bitWidth>1</bitWidth>
1354              <access>read-write</access>
1355              <enumeratedValues>
1356                <enumeratedValue>
1357                  <name>0</name>
1358                  <description>Accesses from an untrusted master are allowed.</description>
1359                  <value>#0</value>
1360                </enumeratedValue>
1361                <enumeratedValue>
1362                  <name>1</name>
1363                  <description>Accesses from an untrusted master are not allowed.</description>
1364                  <value>#1</value>
1365                </enumeratedValue>
1366              </enumeratedValues>
1367            </field>
1368            <field>
1369              <name>WP5</name>
1370              <description>Write Protect</description>
1371              <bitOffset>9</bitOffset>
1372              <bitWidth>1</bitWidth>
1373              <access>read-write</access>
1374              <enumeratedValues>
1375                <enumeratedValue>
1376                  <name>0</name>
1377                  <description>This peripheral allows write accesses.</description>
1378                  <value>#0</value>
1379                </enumeratedValue>
1380                <enumeratedValue>
1381                  <name>1</name>
1382                  <description>This peripheral is write protected.</description>
1383                  <value>#1</value>
1384                </enumeratedValue>
1385              </enumeratedValues>
1386            </field>
1387            <field>
1388              <name>SP5</name>
1389              <description>Supervisor Protect</description>
1390              <bitOffset>10</bitOffset>
1391              <bitWidth>1</bitWidth>
1392              <access>read-write</access>
1393              <enumeratedValues>
1394                <enumeratedValue>
1395                  <name>0</name>
1396                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1397                  <value>#0</value>
1398                </enumeratedValue>
1399                <enumeratedValue>
1400                  <name>1</name>
1401                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1402                  <value>#1</value>
1403                </enumeratedValue>
1404              </enumeratedValues>
1405            </field>
1406            <field>
1407              <name>TP4</name>
1408              <description>Trusted Protect</description>
1409              <bitOffset>12</bitOffset>
1410              <bitWidth>1</bitWidth>
1411              <access>read-write</access>
1412              <enumeratedValues>
1413                <enumeratedValue>
1414                  <name>0</name>
1415                  <description>Accesses from an untrusted master are allowed.</description>
1416                  <value>#0</value>
1417                </enumeratedValue>
1418                <enumeratedValue>
1419                  <name>1</name>
1420                  <description>Accesses from an untrusted master are not allowed.</description>
1421                  <value>#1</value>
1422                </enumeratedValue>
1423              </enumeratedValues>
1424            </field>
1425            <field>
1426              <name>WP4</name>
1427              <description>Write Protect</description>
1428              <bitOffset>13</bitOffset>
1429              <bitWidth>1</bitWidth>
1430              <access>read-write</access>
1431              <enumeratedValues>
1432                <enumeratedValue>
1433                  <name>0</name>
1434                  <description>This peripheral allows write accesses.</description>
1435                  <value>#0</value>
1436                </enumeratedValue>
1437                <enumeratedValue>
1438                  <name>1</name>
1439                  <description>This peripheral is write protected.</description>
1440                  <value>#1</value>
1441                </enumeratedValue>
1442              </enumeratedValues>
1443            </field>
1444            <field>
1445              <name>SP4</name>
1446              <description>Supervisor Protect</description>
1447              <bitOffset>14</bitOffset>
1448              <bitWidth>1</bitWidth>
1449              <access>read-write</access>
1450              <enumeratedValues>
1451                <enumeratedValue>
1452                  <name>0</name>
1453                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1454                  <value>#0</value>
1455                </enumeratedValue>
1456                <enumeratedValue>
1457                  <name>1</name>
1458                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1459                  <value>#1</value>
1460                </enumeratedValue>
1461              </enumeratedValues>
1462            </field>
1463            <field>
1464              <name>TP3</name>
1465              <description>Trusted Protect</description>
1466              <bitOffset>16</bitOffset>
1467              <bitWidth>1</bitWidth>
1468              <access>read-write</access>
1469              <enumeratedValues>
1470                <enumeratedValue>
1471                  <name>0</name>
1472                  <description>Accesses from an untrusted master are allowed.</description>
1473                  <value>#0</value>
1474                </enumeratedValue>
1475                <enumeratedValue>
1476                  <name>1</name>
1477                  <description>Accesses from an untrusted master are not allowed.</description>
1478                  <value>#1</value>
1479                </enumeratedValue>
1480              </enumeratedValues>
1481            </field>
1482            <field>
1483              <name>WP3</name>
1484              <description>Write Protect</description>
1485              <bitOffset>17</bitOffset>
1486              <bitWidth>1</bitWidth>
1487              <access>read-write</access>
1488              <enumeratedValues>
1489                <enumeratedValue>
1490                  <name>0</name>
1491                  <description>This peripheral allows write accesses.</description>
1492                  <value>#0</value>
1493                </enumeratedValue>
1494                <enumeratedValue>
1495                  <name>1</name>
1496                  <description>This peripheral is write protected.</description>
1497                  <value>#1</value>
1498                </enumeratedValue>
1499              </enumeratedValues>
1500            </field>
1501            <field>
1502              <name>SP3</name>
1503              <description>Supervisor Protect</description>
1504              <bitOffset>18</bitOffset>
1505              <bitWidth>1</bitWidth>
1506              <access>read-write</access>
1507              <enumeratedValues>
1508                <enumeratedValue>
1509                  <name>0</name>
1510                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1511                  <value>#0</value>
1512                </enumeratedValue>
1513                <enumeratedValue>
1514                  <name>1</name>
1515                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1516                  <value>#1</value>
1517                </enumeratedValue>
1518              </enumeratedValues>
1519            </field>
1520            <field>
1521              <name>TP2</name>
1522              <description>Trusted Protect</description>
1523              <bitOffset>20</bitOffset>
1524              <bitWidth>1</bitWidth>
1525              <access>read-write</access>
1526              <enumeratedValues>
1527                <enumeratedValue>
1528                  <name>0</name>
1529                  <description>Accesses from an untrusted master are allowed.</description>
1530                  <value>#0</value>
1531                </enumeratedValue>
1532                <enumeratedValue>
1533                  <name>1</name>
1534                  <description>Accesses from an untrusted master are not allowed.</description>
1535                  <value>#1</value>
1536                </enumeratedValue>
1537              </enumeratedValues>
1538            </field>
1539            <field>
1540              <name>WP2</name>
1541              <description>Write Protect</description>
1542              <bitOffset>21</bitOffset>
1543              <bitWidth>1</bitWidth>
1544              <access>read-write</access>
1545              <enumeratedValues>
1546                <enumeratedValue>
1547                  <name>0</name>
1548                  <description>This peripheral allows write accesses.</description>
1549                  <value>#0</value>
1550                </enumeratedValue>
1551                <enumeratedValue>
1552                  <name>1</name>
1553                  <description>This peripheral is write protected.</description>
1554                  <value>#1</value>
1555                </enumeratedValue>
1556              </enumeratedValues>
1557            </field>
1558            <field>
1559              <name>SP2</name>
1560              <description>Supervisor Protect</description>
1561              <bitOffset>22</bitOffset>
1562              <bitWidth>1</bitWidth>
1563              <access>read-write</access>
1564              <enumeratedValues>
1565                <enumeratedValue>
1566                  <name>0</name>
1567                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1568                  <value>#0</value>
1569                </enumeratedValue>
1570                <enumeratedValue>
1571                  <name>1</name>
1572                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1573                  <value>#1</value>
1574                </enumeratedValue>
1575              </enumeratedValues>
1576            </field>
1577            <field>
1578              <name>TP1</name>
1579              <description>Trusted Protect</description>
1580              <bitOffset>24</bitOffset>
1581              <bitWidth>1</bitWidth>
1582              <access>read-write</access>
1583              <enumeratedValues>
1584                <enumeratedValue>
1585                  <name>0</name>
1586                  <description>Accesses from an untrusted master are allowed.</description>
1587                  <value>#0</value>
1588                </enumeratedValue>
1589                <enumeratedValue>
1590                  <name>1</name>
1591                  <description>Accesses from an untrusted master are not allowed.</description>
1592                  <value>#1</value>
1593                </enumeratedValue>
1594              </enumeratedValues>
1595            </field>
1596            <field>
1597              <name>WP1</name>
1598              <description>Write Protect</description>
1599              <bitOffset>25</bitOffset>
1600              <bitWidth>1</bitWidth>
1601              <access>read-write</access>
1602              <enumeratedValues>
1603                <enumeratedValue>
1604                  <name>0</name>
1605                  <description>This peripheral allows write accesses.</description>
1606                  <value>#0</value>
1607                </enumeratedValue>
1608                <enumeratedValue>
1609                  <name>1</name>
1610                  <description>This peripheral is write protected.</description>
1611                  <value>#1</value>
1612                </enumeratedValue>
1613              </enumeratedValues>
1614            </field>
1615            <field>
1616              <name>SP1</name>
1617              <description>Supervisor Protect</description>
1618              <bitOffset>26</bitOffset>
1619              <bitWidth>1</bitWidth>
1620              <access>read-write</access>
1621              <enumeratedValues>
1622                <enumeratedValue>
1623                  <name>0</name>
1624                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1625                  <value>#0</value>
1626                </enumeratedValue>
1627                <enumeratedValue>
1628                  <name>1</name>
1629                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1630                  <value>#1</value>
1631                </enumeratedValue>
1632              </enumeratedValues>
1633            </field>
1634            <field>
1635              <name>TP0</name>
1636              <description>Trusted Protect</description>
1637              <bitOffset>28</bitOffset>
1638              <bitWidth>1</bitWidth>
1639              <access>read-write</access>
1640              <enumeratedValues>
1641                <enumeratedValue>
1642                  <name>0</name>
1643                  <description>Accesses from an untrusted master are allowed.</description>
1644                  <value>#0</value>
1645                </enumeratedValue>
1646                <enumeratedValue>
1647                  <name>1</name>
1648                  <description>Accesses from an untrusted master are not allowed.</description>
1649                  <value>#1</value>
1650                </enumeratedValue>
1651              </enumeratedValues>
1652            </field>
1653            <field>
1654              <name>WP0</name>
1655              <description>Write Protect</description>
1656              <bitOffset>29</bitOffset>
1657              <bitWidth>1</bitWidth>
1658              <access>read-write</access>
1659              <enumeratedValues>
1660                <enumeratedValue>
1661                  <name>0</name>
1662                  <description>This peripheral allows write accesses.</description>
1663                  <value>#0</value>
1664                </enumeratedValue>
1665                <enumeratedValue>
1666                  <name>1</name>
1667                  <description>This peripheral is write protected.</description>
1668                  <value>#1</value>
1669                </enumeratedValue>
1670              </enumeratedValues>
1671            </field>
1672            <field>
1673              <name>SP0</name>
1674              <description>Supervisor Protect</description>
1675              <bitOffset>30</bitOffset>
1676              <bitWidth>1</bitWidth>
1677              <access>read-write</access>
1678              <enumeratedValues>
1679                <enumeratedValue>
1680                  <name>0</name>
1681                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1682                  <value>#0</value>
1683                </enumeratedValue>
1684                <enumeratedValue>
1685                  <name>1</name>
1686                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1687                  <value>#1</value>
1688                </enumeratedValue>
1689              </enumeratedValues>
1690            </field>
1691          </fields>
1692        </register>
1693        <register>
1694          <name>PACRC</name>
1695          <description>Peripheral Access Control Register</description>
1696          <addressOffset>0x28</addressOffset>
1697          <size>32</size>
1698          <access>read-write</access>
1699          <resetValue>0</resetValue>
1700          <resetMask>0xFFFFFFFF</resetMask>
1701          <fields>
1702            <field>
1703              <name>TP7</name>
1704              <description>Trusted Protect</description>
1705              <bitOffset>0</bitOffset>
1706              <bitWidth>1</bitWidth>
1707              <access>read-write</access>
1708              <enumeratedValues>
1709                <enumeratedValue>
1710                  <name>0</name>
1711                  <description>Accesses from an untrusted master are allowed.</description>
1712                  <value>#0</value>
1713                </enumeratedValue>
1714                <enumeratedValue>
1715                  <name>1</name>
1716                  <description>Accesses from an untrusted master are not allowed.</description>
1717                  <value>#1</value>
1718                </enumeratedValue>
1719              </enumeratedValues>
1720            </field>
1721            <field>
1722              <name>WP7</name>
1723              <description>Write Protect</description>
1724              <bitOffset>1</bitOffset>
1725              <bitWidth>1</bitWidth>
1726              <access>read-write</access>
1727              <enumeratedValues>
1728                <enumeratedValue>
1729                  <name>0</name>
1730                  <description>This peripheral allows write accesses.</description>
1731                  <value>#0</value>
1732                </enumeratedValue>
1733                <enumeratedValue>
1734                  <name>1</name>
1735                  <description>This peripheral is write protected.</description>
1736                  <value>#1</value>
1737                </enumeratedValue>
1738              </enumeratedValues>
1739            </field>
1740            <field>
1741              <name>SP7</name>
1742              <description>Supervisor Protect</description>
1743              <bitOffset>2</bitOffset>
1744              <bitWidth>1</bitWidth>
1745              <access>read-write</access>
1746              <enumeratedValues>
1747                <enumeratedValue>
1748                  <name>0</name>
1749                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1750                  <value>#0</value>
1751                </enumeratedValue>
1752                <enumeratedValue>
1753                  <name>1</name>
1754                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1755                  <value>#1</value>
1756                </enumeratedValue>
1757              </enumeratedValues>
1758            </field>
1759            <field>
1760              <name>TP6</name>
1761              <description>Trusted Protect</description>
1762              <bitOffset>4</bitOffset>
1763              <bitWidth>1</bitWidth>
1764              <access>read-write</access>
1765              <enumeratedValues>
1766                <enumeratedValue>
1767                  <name>0</name>
1768                  <description>Accesses from an untrusted master are allowed.</description>
1769                  <value>#0</value>
1770                </enumeratedValue>
1771                <enumeratedValue>
1772                  <name>1</name>
1773                  <description>Accesses from an untrusted master are not allowed.</description>
1774                  <value>#1</value>
1775                </enumeratedValue>
1776              </enumeratedValues>
1777            </field>
1778            <field>
1779              <name>WP6</name>
1780              <description>Write Protect</description>
1781              <bitOffset>5</bitOffset>
1782              <bitWidth>1</bitWidth>
1783              <access>read-write</access>
1784              <enumeratedValues>
1785                <enumeratedValue>
1786                  <name>0</name>
1787                  <description>This peripheral allows write accesses.</description>
1788                  <value>#0</value>
1789                </enumeratedValue>
1790                <enumeratedValue>
1791                  <name>1</name>
1792                  <description>This peripheral is write protected.</description>
1793                  <value>#1</value>
1794                </enumeratedValue>
1795              </enumeratedValues>
1796            </field>
1797            <field>
1798              <name>SP6</name>
1799              <description>Supervisor Protect</description>
1800              <bitOffset>6</bitOffset>
1801              <bitWidth>1</bitWidth>
1802              <access>read-write</access>
1803              <enumeratedValues>
1804                <enumeratedValue>
1805                  <name>0</name>
1806                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1807                  <value>#0</value>
1808                </enumeratedValue>
1809                <enumeratedValue>
1810                  <name>1</name>
1811                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1812                  <value>#1</value>
1813                </enumeratedValue>
1814              </enumeratedValues>
1815            </field>
1816            <field>
1817              <name>TP5</name>
1818              <description>Trusted Protect</description>
1819              <bitOffset>8</bitOffset>
1820              <bitWidth>1</bitWidth>
1821              <access>read-write</access>
1822              <enumeratedValues>
1823                <enumeratedValue>
1824                  <name>0</name>
1825                  <description>Accesses from an untrusted master are allowed.</description>
1826                  <value>#0</value>
1827                </enumeratedValue>
1828                <enumeratedValue>
1829                  <name>1</name>
1830                  <description>Accesses from an untrusted master are not allowed.</description>
1831                  <value>#1</value>
1832                </enumeratedValue>
1833              </enumeratedValues>
1834            </field>
1835            <field>
1836              <name>WP5</name>
1837              <description>Write Protect</description>
1838              <bitOffset>9</bitOffset>
1839              <bitWidth>1</bitWidth>
1840              <access>read-write</access>
1841              <enumeratedValues>
1842                <enumeratedValue>
1843                  <name>0</name>
1844                  <description>This peripheral allows write accesses.</description>
1845                  <value>#0</value>
1846                </enumeratedValue>
1847                <enumeratedValue>
1848                  <name>1</name>
1849                  <description>This peripheral is write protected.</description>
1850                  <value>#1</value>
1851                </enumeratedValue>
1852              </enumeratedValues>
1853            </field>
1854            <field>
1855              <name>SP5</name>
1856              <description>Supervisor Protect</description>
1857              <bitOffset>10</bitOffset>
1858              <bitWidth>1</bitWidth>
1859              <access>read-write</access>
1860              <enumeratedValues>
1861                <enumeratedValue>
1862                  <name>0</name>
1863                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1864                  <value>#0</value>
1865                </enumeratedValue>
1866                <enumeratedValue>
1867                  <name>1</name>
1868                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1869                  <value>#1</value>
1870                </enumeratedValue>
1871              </enumeratedValues>
1872            </field>
1873            <field>
1874              <name>TP4</name>
1875              <description>Trusted Protect</description>
1876              <bitOffset>12</bitOffset>
1877              <bitWidth>1</bitWidth>
1878              <access>read-write</access>
1879              <enumeratedValues>
1880                <enumeratedValue>
1881                  <name>0</name>
1882                  <description>Accesses from an untrusted master are allowed.</description>
1883                  <value>#0</value>
1884                </enumeratedValue>
1885                <enumeratedValue>
1886                  <name>1</name>
1887                  <description>Accesses from an untrusted master are not allowed.</description>
1888                  <value>#1</value>
1889                </enumeratedValue>
1890              </enumeratedValues>
1891            </field>
1892            <field>
1893              <name>WP4</name>
1894              <description>Write Protect</description>
1895              <bitOffset>13</bitOffset>
1896              <bitWidth>1</bitWidth>
1897              <access>read-write</access>
1898              <enumeratedValues>
1899                <enumeratedValue>
1900                  <name>0</name>
1901                  <description>This peripheral allows write accesses.</description>
1902                  <value>#0</value>
1903                </enumeratedValue>
1904                <enumeratedValue>
1905                  <name>1</name>
1906                  <description>This peripheral is write protected.</description>
1907                  <value>#1</value>
1908                </enumeratedValue>
1909              </enumeratedValues>
1910            </field>
1911            <field>
1912              <name>SP4</name>
1913              <description>Supervisor Protect</description>
1914              <bitOffset>14</bitOffset>
1915              <bitWidth>1</bitWidth>
1916              <access>read-write</access>
1917              <enumeratedValues>
1918                <enumeratedValue>
1919                  <name>0</name>
1920                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1921                  <value>#0</value>
1922                </enumeratedValue>
1923                <enumeratedValue>
1924                  <name>1</name>
1925                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1926                  <value>#1</value>
1927                </enumeratedValue>
1928              </enumeratedValues>
1929            </field>
1930            <field>
1931              <name>TP3</name>
1932              <description>Trusted Protect</description>
1933              <bitOffset>16</bitOffset>
1934              <bitWidth>1</bitWidth>
1935              <access>read-write</access>
1936              <enumeratedValues>
1937                <enumeratedValue>
1938                  <name>0</name>
1939                  <description>Accesses from an untrusted master are allowed.</description>
1940                  <value>#0</value>
1941                </enumeratedValue>
1942                <enumeratedValue>
1943                  <name>1</name>
1944                  <description>Accesses from an untrusted master are not allowed.</description>
1945                  <value>#1</value>
1946                </enumeratedValue>
1947              </enumeratedValues>
1948            </field>
1949            <field>
1950              <name>WP3</name>
1951              <description>Write Protect</description>
1952              <bitOffset>17</bitOffset>
1953              <bitWidth>1</bitWidth>
1954              <access>read-write</access>
1955              <enumeratedValues>
1956                <enumeratedValue>
1957                  <name>0</name>
1958                  <description>This peripheral allows write accesses.</description>
1959                  <value>#0</value>
1960                </enumeratedValue>
1961                <enumeratedValue>
1962                  <name>1</name>
1963                  <description>This peripheral is write protected.</description>
1964                  <value>#1</value>
1965                </enumeratedValue>
1966              </enumeratedValues>
1967            </field>
1968            <field>
1969              <name>SP3</name>
1970              <description>Supervisor Protect</description>
1971              <bitOffset>18</bitOffset>
1972              <bitWidth>1</bitWidth>
1973              <access>read-write</access>
1974              <enumeratedValues>
1975                <enumeratedValue>
1976                  <name>0</name>
1977                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
1978                  <value>#0</value>
1979                </enumeratedValue>
1980                <enumeratedValue>
1981                  <name>1</name>
1982                  <description>This peripheral requires supervisor privilege level for accesses.</description>
1983                  <value>#1</value>
1984                </enumeratedValue>
1985              </enumeratedValues>
1986            </field>
1987            <field>
1988              <name>TP2</name>
1989              <description>Trusted Protect</description>
1990              <bitOffset>20</bitOffset>
1991              <bitWidth>1</bitWidth>
1992              <access>read-write</access>
1993              <enumeratedValues>
1994                <enumeratedValue>
1995                  <name>0</name>
1996                  <description>Accesses from an untrusted master are allowed.</description>
1997                  <value>#0</value>
1998                </enumeratedValue>
1999                <enumeratedValue>
2000                  <name>1</name>
2001                  <description>Accesses from an untrusted master are not allowed.</description>
2002                  <value>#1</value>
2003                </enumeratedValue>
2004              </enumeratedValues>
2005            </field>
2006            <field>
2007              <name>WP2</name>
2008              <description>Write Protect</description>
2009              <bitOffset>21</bitOffset>
2010              <bitWidth>1</bitWidth>
2011              <access>read-write</access>
2012              <enumeratedValues>
2013                <enumeratedValue>
2014                  <name>0</name>
2015                  <description>This peripheral allows write accesses.</description>
2016                  <value>#0</value>
2017                </enumeratedValue>
2018                <enumeratedValue>
2019                  <name>1</name>
2020                  <description>This peripheral is write protected.</description>
2021                  <value>#1</value>
2022                </enumeratedValue>
2023              </enumeratedValues>
2024            </field>
2025            <field>
2026              <name>SP2</name>
2027              <description>Supervisor Protect</description>
2028              <bitOffset>22</bitOffset>
2029              <bitWidth>1</bitWidth>
2030              <access>read-write</access>
2031              <enumeratedValues>
2032                <enumeratedValue>
2033                  <name>0</name>
2034                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2035                  <value>#0</value>
2036                </enumeratedValue>
2037                <enumeratedValue>
2038                  <name>1</name>
2039                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2040                  <value>#1</value>
2041                </enumeratedValue>
2042              </enumeratedValues>
2043            </field>
2044            <field>
2045              <name>TP1</name>
2046              <description>Trusted Protect</description>
2047              <bitOffset>24</bitOffset>
2048              <bitWidth>1</bitWidth>
2049              <access>read-write</access>
2050              <enumeratedValues>
2051                <enumeratedValue>
2052                  <name>0</name>
2053                  <description>Accesses from an untrusted master are allowed.</description>
2054                  <value>#0</value>
2055                </enumeratedValue>
2056                <enumeratedValue>
2057                  <name>1</name>
2058                  <description>Accesses from an untrusted master are not allowed.</description>
2059                  <value>#1</value>
2060                </enumeratedValue>
2061              </enumeratedValues>
2062            </field>
2063            <field>
2064              <name>WP1</name>
2065              <description>Write Protect</description>
2066              <bitOffset>25</bitOffset>
2067              <bitWidth>1</bitWidth>
2068              <access>read-write</access>
2069              <enumeratedValues>
2070                <enumeratedValue>
2071                  <name>0</name>
2072                  <description>This peripheral allows write accesses.</description>
2073                  <value>#0</value>
2074                </enumeratedValue>
2075                <enumeratedValue>
2076                  <name>1</name>
2077                  <description>This peripheral is write protected.</description>
2078                  <value>#1</value>
2079                </enumeratedValue>
2080              </enumeratedValues>
2081            </field>
2082            <field>
2083              <name>SP1</name>
2084              <description>Supervisor Protect</description>
2085              <bitOffset>26</bitOffset>
2086              <bitWidth>1</bitWidth>
2087              <access>read-write</access>
2088              <enumeratedValues>
2089                <enumeratedValue>
2090                  <name>0</name>
2091                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2092                  <value>#0</value>
2093                </enumeratedValue>
2094                <enumeratedValue>
2095                  <name>1</name>
2096                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2097                  <value>#1</value>
2098                </enumeratedValue>
2099              </enumeratedValues>
2100            </field>
2101            <field>
2102              <name>TP0</name>
2103              <description>Trusted Protect</description>
2104              <bitOffset>28</bitOffset>
2105              <bitWidth>1</bitWidth>
2106              <access>read-write</access>
2107              <enumeratedValues>
2108                <enumeratedValue>
2109                  <name>0</name>
2110                  <description>Accesses from an untrusted master are allowed.</description>
2111                  <value>#0</value>
2112                </enumeratedValue>
2113                <enumeratedValue>
2114                  <name>1</name>
2115                  <description>Accesses from an untrusted master are not allowed.</description>
2116                  <value>#1</value>
2117                </enumeratedValue>
2118              </enumeratedValues>
2119            </field>
2120            <field>
2121              <name>WP0</name>
2122              <description>Write Protect</description>
2123              <bitOffset>29</bitOffset>
2124              <bitWidth>1</bitWidth>
2125              <access>read-write</access>
2126              <enumeratedValues>
2127                <enumeratedValue>
2128                  <name>0</name>
2129                  <description>This peripheral allows write accesses.</description>
2130                  <value>#0</value>
2131                </enumeratedValue>
2132                <enumeratedValue>
2133                  <name>1</name>
2134                  <description>This peripheral is write protected.</description>
2135                  <value>#1</value>
2136                </enumeratedValue>
2137              </enumeratedValues>
2138            </field>
2139            <field>
2140              <name>SP0</name>
2141              <description>Supervisor Protect</description>
2142              <bitOffset>30</bitOffset>
2143              <bitWidth>1</bitWidth>
2144              <access>read-write</access>
2145              <enumeratedValues>
2146                <enumeratedValue>
2147                  <name>0</name>
2148                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2149                  <value>#0</value>
2150                </enumeratedValue>
2151                <enumeratedValue>
2152                  <name>1</name>
2153                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2154                  <value>#1</value>
2155                </enumeratedValue>
2156              </enumeratedValues>
2157            </field>
2158          </fields>
2159        </register>
2160        <register>
2161          <name>PACRD</name>
2162          <description>Peripheral Access Control Register</description>
2163          <addressOffset>0x2C</addressOffset>
2164          <size>32</size>
2165          <access>read-write</access>
2166          <resetValue>0x4</resetValue>
2167          <resetMask>0xFFFFFFFF</resetMask>
2168          <fields>
2169            <field>
2170              <name>TP7</name>
2171              <description>Trusted Protect</description>
2172              <bitOffset>0</bitOffset>
2173              <bitWidth>1</bitWidth>
2174              <access>read-write</access>
2175              <enumeratedValues>
2176                <enumeratedValue>
2177                  <name>0</name>
2178                  <description>Accesses from an untrusted master are allowed.</description>
2179                  <value>#0</value>
2180                </enumeratedValue>
2181                <enumeratedValue>
2182                  <name>1</name>
2183                  <description>Accesses from an untrusted master are not allowed.</description>
2184                  <value>#1</value>
2185                </enumeratedValue>
2186              </enumeratedValues>
2187            </field>
2188            <field>
2189              <name>WP7</name>
2190              <description>Write Protect</description>
2191              <bitOffset>1</bitOffset>
2192              <bitWidth>1</bitWidth>
2193              <access>read-write</access>
2194              <enumeratedValues>
2195                <enumeratedValue>
2196                  <name>0</name>
2197                  <description>This peripheral allows write accesses.</description>
2198                  <value>#0</value>
2199                </enumeratedValue>
2200                <enumeratedValue>
2201                  <name>1</name>
2202                  <description>This peripheral is write protected.</description>
2203                  <value>#1</value>
2204                </enumeratedValue>
2205              </enumeratedValues>
2206            </field>
2207            <field>
2208              <name>SP7</name>
2209              <description>Supervisor Protect</description>
2210              <bitOffset>2</bitOffset>
2211              <bitWidth>1</bitWidth>
2212              <access>read-write</access>
2213              <enumeratedValues>
2214                <enumeratedValue>
2215                  <name>0</name>
2216                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2217                  <value>#0</value>
2218                </enumeratedValue>
2219                <enumeratedValue>
2220                  <name>1</name>
2221                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2222                  <value>#1</value>
2223                </enumeratedValue>
2224              </enumeratedValues>
2225            </field>
2226            <field>
2227              <name>TP6</name>
2228              <description>Trusted Protect</description>
2229              <bitOffset>4</bitOffset>
2230              <bitWidth>1</bitWidth>
2231              <access>read-write</access>
2232              <enumeratedValues>
2233                <enumeratedValue>
2234                  <name>0</name>
2235                  <description>Accesses from an untrusted master are allowed.</description>
2236                  <value>#0</value>
2237                </enumeratedValue>
2238                <enumeratedValue>
2239                  <name>1</name>
2240                  <description>Accesses from an untrusted master are not allowed.</description>
2241                  <value>#1</value>
2242                </enumeratedValue>
2243              </enumeratedValues>
2244            </field>
2245            <field>
2246              <name>WP6</name>
2247              <description>Write Protect</description>
2248              <bitOffset>5</bitOffset>
2249              <bitWidth>1</bitWidth>
2250              <access>read-write</access>
2251              <enumeratedValues>
2252                <enumeratedValue>
2253                  <name>0</name>
2254                  <description>This peripheral allows write accesses.</description>
2255                  <value>#0</value>
2256                </enumeratedValue>
2257                <enumeratedValue>
2258                  <name>1</name>
2259                  <description>This peripheral is write protected.</description>
2260                  <value>#1</value>
2261                </enumeratedValue>
2262              </enumeratedValues>
2263            </field>
2264            <field>
2265              <name>SP6</name>
2266              <description>Supervisor Protect</description>
2267              <bitOffset>6</bitOffset>
2268              <bitWidth>1</bitWidth>
2269              <access>read-write</access>
2270              <enumeratedValues>
2271                <enumeratedValue>
2272                  <name>0</name>
2273                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2274                  <value>#0</value>
2275                </enumeratedValue>
2276                <enumeratedValue>
2277                  <name>1</name>
2278                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2279                  <value>#1</value>
2280                </enumeratedValue>
2281              </enumeratedValues>
2282            </field>
2283            <field>
2284              <name>TP5</name>
2285              <description>Trusted Protect</description>
2286              <bitOffset>8</bitOffset>
2287              <bitWidth>1</bitWidth>
2288              <access>read-write</access>
2289              <enumeratedValues>
2290                <enumeratedValue>
2291                  <name>0</name>
2292                  <description>Accesses from an untrusted master are allowed.</description>
2293                  <value>#0</value>
2294                </enumeratedValue>
2295                <enumeratedValue>
2296                  <name>1</name>
2297                  <description>Accesses from an untrusted master are not allowed.</description>
2298                  <value>#1</value>
2299                </enumeratedValue>
2300              </enumeratedValues>
2301            </field>
2302            <field>
2303              <name>WP5</name>
2304              <description>Write Protect</description>
2305              <bitOffset>9</bitOffset>
2306              <bitWidth>1</bitWidth>
2307              <access>read-write</access>
2308              <enumeratedValues>
2309                <enumeratedValue>
2310                  <name>0</name>
2311                  <description>This peripheral allows write accesses.</description>
2312                  <value>#0</value>
2313                </enumeratedValue>
2314                <enumeratedValue>
2315                  <name>1</name>
2316                  <description>This peripheral is write protected.</description>
2317                  <value>#1</value>
2318                </enumeratedValue>
2319              </enumeratedValues>
2320            </field>
2321            <field>
2322              <name>SP5</name>
2323              <description>Supervisor Protect</description>
2324              <bitOffset>10</bitOffset>
2325              <bitWidth>1</bitWidth>
2326              <access>read-write</access>
2327              <enumeratedValues>
2328                <enumeratedValue>
2329                  <name>0</name>
2330                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2331                  <value>#0</value>
2332                </enumeratedValue>
2333                <enumeratedValue>
2334                  <name>1</name>
2335                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2336                  <value>#1</value>
2337                </enumeratedValue>
2338              </enumeratedValues>
2339            </field>
2340            <field>
2341              <name>TP4</name>
2342              <description>Trusted Protect</description>
2343              <bitOffset>12</bitOffset>
2344              <bitWidth>1</bitWidth>
2345              <access>read-write</access>
2346              <enumeratedValues>
2347                <enumeratedValue>
2348                  <name>0</name>
2349                  <description>Accesses from an untrusted master are allowed.</description>
2350                  <value>#0</value>
2351                </enumeratedValue>
2352                <enumeratedValue>
2353                  <name>1</name>
2354                  <description>Accesses from an untrusted master are not allowed.</description>
2355                  <value>#1</value>
2356                </enumeratedValue>
2357              </enumeratedValues>
2358            </field>
2359            <field>
2360              <name>WP4</name>
2361              <description>Write Protect</description>
2362              <bitOffset>13</bitOffset>
2363              <bitWidth>1</bitWidth>
2364              <access>read-write</access>
2365              <enumeratedValues>
2366                <enumeratedValue>
2367                  <name>0</name>
2368                  <description>This peripheral allows write accesses.</description>
2369                  <value>#0</value>
2370                </enumeratedValue>
2371                <enumeratedValue>
2372                  <name>1</name>
2373                  <description>This peripheral is write protected.</description>
2374                  <value>#1</value>
2375                </enumeratedValue>
2376              </enumeratedValues>
2377            </field>
2378            <field>
2379              <name>SP4</name>
2380              <description>Supervisor Protect</description>
2381              <bitOffset>14</bitOffset>
2382              <bitWidth>1</bitWidth>
2383              <access>read-write</access>
2384              <enumeratedValues>
2385                <enumeratedValue>
2386                  <name>0</name>
2387                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2388                  <value>#0</value>
2389                </enumeratedValue>
2390                <enumeratedValue>
2391                  <name>1</name>
2392                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2393                  <value>#1</value>
2394                </enumeratedValue>
2395              </enumeratedValues>
2396            </field>
2397            <field>
2398              <name>TP3</name>
2399              <description>Trusted Protect</description>
2400              <bitOffset>16</bitOffset>
2401              <bitWidth>1</bitWidth>
2402              <access>read-write</access>
2403              <enumeratedValues>
2404                <enumeratedValue>
2405                  <name>0</name>
2406                  <description>Accesses from an untrusted master are allowed.</description>
2407                  <value>#0</value>
2408                </enumeratedValue>
2409                <enumeratedValue>
2410                  <name>1</name>
2411                  <description>Accesses from an untrusted master are not allowed.</description>
2412                  <value>#1</value>
2413                </enumeratedValue>
2414              </enumeratedValues>
2415            </field>
2416            <field>
2417              <name>WP3</name>
2418              <description>Write Protect</description>
2419              <bitOffset>17</bitOffset>
2420              <bitWidth>1</bitWidth>
2421              <access>read-write</access>
2422              <enumeratedValues>
2423                <enumeratedValue>
2424                  <name>0</name>
2425                  <description>This peripheral allows write accesses.</description>
2426                  <value>#0</value>
2427                </enumeratedValue>
2428                <enumeratedValue>
2429                  <name>1</name>
2430                  <description>This peripheral is write protected.</description>
2431                  <value>#1</value>
2432                </enumeratedValue>
2433              </enumeratedValues>
2434            </field>
2435            <field>
2436              <name>SP3</name>
2437              <description>Supervisor Protect</description>
2438              <bitOffset>18</bitOffset>
2439              <bitWidth>1</bitWidth>
2440              <access>read-write</access>
2441              <enumeratedValues>
2442                <enumeratedValue>
2443                  <name>0</name>
2444                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2445                  <value>#0</value>
2446                </enumeratedValue>
2447                <enumeratedValue>
2448                  <name>1</name>
2449                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2450                  <value>#1</value>
2451                </enumeratedValue>
2452              </enumeratedValues>
2453            </field>
2454            <field>
2455              <name>TP2</name>
2456              <description>Trusted Protect</description>
2457              <bitOffset>20</bitOffset>
2458              <bitWidth>1</bitWidth>
2459              <access>read-write</access>
2460              <enumeratedValues>
2461                <enumeratedValue>
2462                  <name>0</name>
2463                  <description>Accesses from an untrusted master are allowed.</description>
2464                  <value>#0</value>
2465                </enumeratedValue>
2466                <enumeratedValue>
2467                  <name>1</name>
2468                  <description>Accesses from an untrusted master are not allowed.</description>
2469                  <value>#1</value>
2470                </enumeratedValue>
2471              </enumeratedValues>
2472            </field>
2473            <field>
2474              <name>WP2</name>
2475              <description>Write Protect</description>
2476              <bitOffset>21</bitOffset>
2477              <bitWidth>1</bitWidth>
2478              <access>read-write</access>
2479              <enumeratedValues>
2480                <enumeratedValue>
2481                  <name>0</name>
2482                  <description>This peripheral allows write accesses.</description>
2483                  <value>#0</value>
2484                </enumeratedValue>
2485                <enumeratedValue>
2486                  <name>1</name>
2487                  <description>This peripheral is write protected.</description>
2488                  <value>#1</value>
2489                </enumeratedValue>
2490              </enumeratedValues>
2491            </field>
2492            <field>
2493              <name>SP2</name>
2494              <description>Supervisor Protect</description>
2495              <bitOffset>22</bitOffset>
2496              <bitWidth>1</bitWidth>
2497              <access>read-write</access>
2498              <enumeratedValues>
2499                <enumeratedValue>
2500                  <name>0</name>
2501                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2502                  <value>#0</value>
2503                </enumeratedValue>
2504                <enumeratedValue>
2505                  <name>1</name>
2506                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2507                  <value>#1</value>
2508                </enumeratedValue>
2509              </enumeratedValues>
2510            </field>
2511            <field>
2512              <name>TP1</name>
2513              <description>Trusted Protect</description>
2514              <bitOffset>24</bitOffset>
2515              <bitWidth>1</bitWidth>
2516              <access>read-write</access>
2517              <enumeratedValues>
2518                <enumeratedValue>
2519                  <name>0</name>
2520                  <description>Accesses from an untrusted master are allowed.</description>
2521                  <value>#0</value>
2522                </enumeratedValue>
2523                <enumeratedValue>
2524                  <name>1</name>
2525                  <description>Accesses from an untrusted master are not allowed.</description>
2526                  <value>#1</value>
2527                </enumeratedValue>
2528              </enumeratedValues>
2529            </field>
2530            <field>
2531              <name>WP1</name>
2532              <description>Write Protect</description>
2533              <bitOffset>25</bitOffset>
2534              <bitWidth>1</bitWidth>
2535              <access>read-write</access>
2536              <enumeratedValues>
2537                <enumeratedValue>
2538                  <name>0</name>
2539                  <description>This peripheral allows write accesses.</description>
2540                  <value>#0</value>
2541                </enumeratedValue>
2542                <enumeratedValue>
2543                  <name>1</name>
2544                  <description>This peripheral is write protected.</description>
2545                  <value>#1</value>
2546                </enumeratedValue>
2547              </enumeratedValues>
2548            </field>
2549            <field>
2550              <name>SP1</name>
2551              <description>Supervisor Protect</description>
2552              <bitOffset>26</bitOffset>
2553              <bitWidth>1</bitWidth>
2554              <access>read-write</access>
2555              <enumeratedValues>
2556                <enumeratedValue>
2557                  <name>0</name>
2558                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2559                  <value>#0</value>
2560                </enumeratedValue>
2561                <enumeratedValue>
2562                  <name>1</name>
2563                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2564                  <value>#1</value>
2565                </enumeratedValue>
2566              </enumeratedValues>
2567            </field>
2568            <field>
2569              <name>TP0</name>
2570              <description>Trusted Protect</description>
2571              <bitOffset>28</bitOffset>
2572              <bitWidth>1</bitWidth>
2573              <access>read-write</access>
2574              <enumeratedValues>
2575                <enumeratedValue>
2576                  <name>0</name>
2577                  <description>Accesses from an untrusted master are allowed.</description>
2578                  <value>#0</value>
2579                </enumeratedValue>
2580                <enumeratedValue>
2581                  <name>1</name>
2582                  <description>Accesses from an untrusted master are not allowed.</description>
2583                  <value>#1</value>
2584                </enumeratedValue>
2585              </enumeratedValues>
2586            </field>
2587            <field>
2588              <name>WP0</name>
2589              <description>Write Protect</description>
2590              <bitOffset>29</bitOffset>
2591              <bitWidth>1</bitWidth>
2592              <access>read-write</access>
2593              <enumeratedValues>
2594                <enumeratedValue>
2595                  <name>0</name>
2596                  <description>This peripheral allows write accesses.</description>
2597                  <value>#0</value>
2598                </enumeratedValue>
2599                <enumeratedValue>
2600                  <name>1</name>
2601                  <description>This peripheral is write protected.</description>
2602                  <value>#1</value>
2603                </enumeratedValue>
2604              </enumeratedValues>
2605            </field>
2606            <field>
2607              <name>SP0</name>
2608              <description>Supervisor Protect</description>
2609              <bitOffset>30</bitOffset>
2610              <bitWidth>1</bitWidth>
2611              <access>read-write</access>
2612              <enumeratedValues>
2613                <enumeratedValue>
2614                  <name>0</name>
2615                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2616                  <value>#0</value>
2617                </enumeratedValue>
2618                <enumeratedValue>
2619                  <name>1</name>
2620                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2621                  <value>#1</value>
2622                </enumeratedValue>
2623              </enumeratedValues>
2624            </field>
2625          </fields>
2626        </register>
2627        <register>
2628          <name>PACRE</name>
2629          <description>Peripheral Access Control Register</description>
2630          <addressOffset>0x40</addressOffset>
2631          <size>32</size>
2632          <access>read-write</access>
2633          <resetValue>0x44000000</resetValue>
2634          <resetMask>0xFFFFFFFF</resetMask>
2635          <fields>
2636            <field>
2637              <name>TP7</name>
2638              <description>Trusted Protect</description>
2639              <bitOffset>0</bitOffset>
2640              <bitWidth>1</bitWidth>
2641              <access>read-write</access>
2642              <enumeratedValues>
2643                <enumeratedValue>
2644                  <name>0</name>
2645                  <description>Accesses from an untrusted master are allowed.</description>
2646                  <value>#0</value>
2647                </enumeratedValue>
2648                <enumeratedValue>
2649                  <name>1</name>
2650                  <description>Accesses from an untrusted master are not allowed.</description>
2651                  <value>#1</value>
2652                </enumeratedValue>
2653              </enumeratedValues>
2654            </field>
2655            <field>
2656              <name>WP7</name>
2657              <description>Write Protect</description>
2658              <bitOffset>1</bitOffset>
2659              <bitWidth>1</bitWidth>
2660              <access>read-write</access>
2661              <enumeratedValues>
2662                <enumeratedValue>
2663                  <name>0</name>
2664                  <description>This peripheral allows write accesses.</description>
2665                  <value>#0</value>
2666                </enumeratedValue>
2667                <enumeratedValue>
2668                  <name>1</name>
2669                  <description>This peripheral is write protected.</description>
2670                  <value>#1</value>
2671                </enumeratedValue>
2672              </enumeratedValues>
2673            </field>
2674            <field>
2675              <name>SP7</name>
2676              <description>Supervisor Protect</description>
2677              <bitOffset>2</bitOffset>
2678              <bitWidth>1</bitWidth>
2679              <access>read-write</access>
2680              <enumeratedValues>
2681                <enumeratedValue>
2682                  <name>0</name>
2683                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2684                  <value>#0</value>
2685                </enumeratedValue>
2686                <enumeratedValue>
2687                  <name>1</name>
2688                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2689                  <value>#1</value>
2690                </enumeratedValue>
2691              </enumeratedValues>
2692            </field>
2693            <field>
2694              <name>TP6</name>
2695              <description>Trusted Protect</description>
2696              <bitOffset>4</bitOffset>
2697              <bitWidth>1</bitWidth>
2698              <access>read-write</access>
2699              <enumeratedValues>
2700                <enumeratedValue>
2701                  <name>0</name>
2702                  <description>Accesses from an untrusted master are allowed.</description>
2703                  <value>#0</value>
2704                </enumeratedValue>
2705                <enumeratedValue>
2706                  <name>1</name>
2707                  <description>Accesses from an untrusted master are not allowed.</description>
2708                  <value>#1</value>
2709                </enumeratedValue>
2710              </enumeratedValues>
2711            </field>
2712            <field>
2713              <name>WP6</name>
2714              <description>Write Protect</description>
2715              <bitOffset>5</bitOffset>
2716              <bitWidth>1</bitWidth>
2717              <access>read-write</access>
2718              <enumeratedValues>
2719                <enumeratedValue>
2720                  <name>0</name>
2721                  <description>This peripheral allows write accesses.</description>
2722                  <value>#0</value>
2723                </enumeratedValue>
2724                <enumeratedValue>
2725                  <name>1</name>
2726                  <description>This peripheral is write protected.</description>
2727                  <value>#1</value>
2728                </enumeratedValue>
2729              </enumeratedValues>
2730            </field>
2731            <field>
2732              <name>SP6</name>
2733              <description>Supervisor Protect</description>
2734              <bitOffset>6</bitOffset>
2735              <bitWidth>1</bitWidth>
2736              <access>read-write</access>
2737              <enumeratedValues>
2738                <enumeratedValue>
2739                  <name>0</name>
2740                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2741                  <value>#0</value>
2742                </enumeratedValue>
2743                <enumeratedValue>
2744                  <name>1</name>
2745                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2746                  <value>#1</value>
2747                </enumeratedValue>
2748              </enumeratedValues>
2749            </field>
2750            <field>
2751              <name>TP5</name>
2752              <description>Trusted Protect</description>
2753              <bitOffset>8</bitOffset>
2754              <bitWidth>1</bitWidth>
2755              <access>read-write</access>
2756              <enumeratedValues>
2757                <enumeratedValue>
2758                  <name>0</name>
2759                  <description>Accesses from an untrusted master are allowed.</description>
2760                  <value>#0</value>
2761                </enumeratedValue>
2762                <enumeratedValue>
2763                  <name>1</name>
2764                  <description>Accesses from an untrusted master are not allowed.</description>
2765                  <value>#1</value>
2766                </enumeratedValue>
2767              </enumeratedValues>
2768            </field>
2769            <field>
2770              <name>WP5</name>
2771              <description>Write Protect</description>
2772              <bitOffset>9</bitOffset>
2773              <bitWidth>1</bitWidth>
2774              <access>read-write</access>
2775              <enumeratedValues>
2776                <enumeratedValue>
2777                  <name>0</name>
2778                  <description>This peripheral allows write accesses.</description>
2779                  <value>#0</value>
2780                </enumeratedValue>
2781                <enumeratedValue>
2782                  <name>1</name>
2783                  <description>This peripheral is write protected.</description>
2784                  <value>#1</value>
2785                </enumeratedValue>
2786              </enumeratedValues>
2787            </field>
2788            <field>
2789              <name>SP5</name>
2790              <description>Supervisor Protect</description>
2791              <bitOffset>10</bitOffset>
2792              <bitWidth>1</bitWidth>
2793              <access>read-write</access>
2794              <enumeratedValues>
2795                <enumeratedValue>
2796                  <name>0</name>
2797                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2798                  <value>#0</value>
2799                </enumeratedValue>
2800                <enumeratedValue>
2801                  <name>1</name>
2802                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2803                  <value>#1</value>
2804                </enumeratedValue>
2805              </enumeratedValues>
2806            </field>
2807            <field>
2808              <name>TP4</name>
2809              <description>Trusted Protect</description>
2810              <bitOffset>12</bitOffset>
2811              <bitWidth>1</bitWidth>
2812              <access>read-write</access>
2813              <enumeratedValues>
2814                <enumeratedValue>
2815                  <name>0</name>
2816                  <description>Accesses from an untrusted master are allowed.</description>
2817                  <value>#0</value>
2818                </enumeratedValue>
2819                <enumeratedValue>
2820                  <name>1</name>
2821                  <description>Accesses from an untrusted master are not allowed.</description>
2822                  <value>#1</value>
2823                </enumeratedValue>
2824              </enumeratedValues>
2825            </field>
2826            <field>
2827              <name>WP4</name>
2828              <description>Write Protect</description>
2829              <bitOffset>13</bitOffset>
2830              <bitWidth>1</bitWidth>
2831              <access>read-write</access>
2832              <enumeratedValues>
2833                <enumeratedValue>
2834                  <name>0</name>
2835                  <description>This peripheral allows write accesses.</description>
2836                  <value>#0</value>
2837                </enumeratedValue>
2838                <enumeratedValue>
2839                  <name>1</name>
2840                  <description>This peripheral is write protected.</description>
2841                  <value>#1</value>
2842                </enumeratedValue>
2843              </enumeratedValues>
2844            </field>
2845            <field>
2846              <name>SP4</name>
2847              <description>Supervisor Protect</description>
2848              <bitOffset>14</bitOffset>
2849              <bitWidth>1</bitWidth>
2850              <access>read-write</access>
2851              <enumeratedValues>
2852                <enumeratedValue>
2853                  <name>0</name>
2854                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2855                  <value>#0</value>
2856                </enumeratedValue>
2857                <enumeratedValue>
2858                  <name>1</name>
2859                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2860                  <value>#1</value>
2861                </enumeratedValue>
2862              </enumeratedValues>
2863            </field>
2864            <field>
2865              <name>TP3</name>
2866              <description>Trusted Protect</description>
2867              <bitOffset>16</bitOffset>
2868              <bitWidth>1</bitWidth>
2869              <access>read-write</access>
2870              <enumeratedValues>
2871                <enumeratedValue>
2872                  <name>0</name>
2873                  <description>Accesses from an untrusted master are allowed.</description>
2874                  <value>#0</value>
2875                </enumeratedValue>
2876                <enumeratedValue>
2877                  <name>1</name>
2878                  <description>Accesses from an untrusted master are not allowed.</description>
2879                  <value>#1</value>
2880                </enumeratedValue>
2881              </enumeratedValues>
2882            </field>
2883            <field>
2884              <name>WP3</name>
2885              <description>Write Protect</description>
2886              <bitOffset>17</bitOffset>
2887              <bitWidth>1</bitWidth>
2888              <access>read-write</access>
2889              <enumeratedValues>
2890                <enumeratedValue>
2891                  <name>0</name>
2892                  <description>This peripheral allows write accesses.</description>
2893                  <value>#0</value>
2894                </enumeratedValue>
2895                <enumeratedValue>
2896                  <name>1</name>
2897                  <description>This peripheral is write protected.</description>
2898                  <value>#1</value>
2899                </enumeratedValue>
2900              </enumeratedValues>
2901            </field>
2902            <field>
2903              <name>SP3</name>
2904              <description>Supervisor Protect</description>
2905              <bitOffset>18</bitOffset>
2906              <bitWidth>1</bitWidth>
2907              <access>read-write</access>
2908              <enumeratedValues>
2909                <enumeratedValue>
2910                  <name>0</name>
2911                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2912                  <value>#0</value>
2913                </enumeratedValue>
2914                <enumeratedValue>
2915                  <name>1</name>
2916                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2917                  <value>#1</value>
2918                </enumeratedValue>
2919              </enumeratedValues>
2920            </field>
2921            <field>
2922              <name>TP2</name>
2923              <description>Trusted Protect</description>
2924              <bitOffset>20</bitOffset>
2925              <bitWidth>1</bitWidth>
2926              <access>read-write</access>
2927              <enumeratedValues>
2928                <enumeratedValue>
2929                  <name>0</name>
2930                  <description>Accesses from an untrusted master are allowed.</description>
2931                  <value>#0</value>
2932                </enumeratedValue>
2933                <enumeratedValue>
2934                  <name>1</name>
2935                  <description>Accesses from an untrusted master are not allowed.</description>
2936                  <value>#1</value>
2937                </enumeratedValue>
2938              </enumeratedValues>
2939            </field>
2940            <field>
2941              <name>WP2</name>
2942              <description>Write Protect</description>
2943              <bitOffset>21</bitOffset>
2944              <bitWidth>1</bitWidth>
2945              <access>read-write</access>
2946              <enumeratedValues>
2947                <enumeratedValue>
2948                  <name>0</name>
2949                  <description>This peripheral allows write accesses.</description>
2950                  <value>#0</value>
2951                </enumeratedValue>
2952                <enumeratedValue>
2953                  <name>1</name>
2954                  <description>This peripheral is write protected.</description>
2955                  <value>#1</value>
2956                </enumeratedValue>
2957              </enumeratedValues>
2958            </field>
2959            <field>
2960              <name>SP2</name>
2961              <description>Supervisor Protect</description>
2962              <bitOffset>22</bitOffset>
2963              <bitWidth>1</bitWidth>
2964              <access>read-write</access>
2965              <enumeratedValues>
2966                <enumeratedValue>
2967                  <name>0</name>
2968                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
2969                  <value>#0</value>
2970                </enumeratedValue>
2971                <enumeratedValue>
2972                  <name>1</name>
2973                  <description>This peripheral requires supervisor privilege level for accesses.</description>
2974                  <value>#1</value>
2975                </enumeratedValue>
2976              </enumeratedValues>
2977            </field>
2978            <field>
2979              <name>TP1</name>
2980              <description>Trusted Protect</description>
2981              <bitOffset>24</bitOffset>
2982              <bitWidth>1</bitWidth>
2983              <access>read-write</access>
2984              <enumeratedValues>
2985                <enumeratedValue>
2986                  <name>0</name>
2987                  <description>Accesses from an untrusted master are allowed.</description>
2988                  <value>#0</value>
2989                </enumeratedValue>
2990                <enumeratedValue>
2991                  <name>1</name>
2992                  <description>Accesses from an untrusted master are not allowed.</description>
2993                  <value>#1</value>
2994                </enumeratedValue>
2995              </enumeratedValues>
2996            </field>
2997            <field>
2998              <name>WP1</name>
2999              <description>Write Protect</description>
3000              <bitOffset>25</bitOffset>
3001              <bitWidth>1</bitWidth>
3002              <access>read-write</access>
3003              <enumeratedValues>
3004                <enumeratedValue>
3005                  <name>0</name>
3006                  <description>This peripheral allows write accesses.</description>
3007                  <value>#0</value>
3008                </enumeratedValue>
3009                <enumeratedValue>
3010                  <name>1</name>
3011                  <description>This peripheral is write protected.</description>
3012                  <value>#1</value>
3013                </enumeratedValue>
3014              </enumeratedValues>
3015            </field>
3016            <field>
3017              <name>SP1</name>
3018              <description>Supervisor Protect</description>
3019              <bitOffset>26</bitOffset>
3020              <bitWidth>1</bitWidth>
3021              <access>read-write</access>
3022              <enumeratedValues>
3023                <enumeratedValue>
3024                  <name>0</name>
3025                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3026                  <value>#0</value>
3027                </enumeratedValue>
3028                <enumeratedValue>
3029                  <name>1</name>
3030                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3031                  <value>#1</value>
3032                </enumeratedValue>
3033              </enumeratedValues>
3034            </field>
3035            <field>
3036              <name>TP0</name>
3037              <description>Trusted Protect</description>
3038              <bitOffset>28</bitOffset>
3039              <bitWidth>1</bitWidth>
3040              <access>read-write</access>
3041              <enumeratedValues>
3042                <enumeratedValue>
3043                  <name>0</name>
3044                  <description>Accesses from an untrusted master are allowed.</description>
3045                  <value>#0</value>
3046                </enumeratedValue>
3047                <enumeratedValue>
3048                  <name>1</name>
3049                  <description>Accesses from an untrusted master are not allowed.</description>
3050                  <value>#1</value>
3051                </enumeratedValue>
3052              </enumeratedValues>
3053            </field>
3054            <field>
3055              <name>WP0</name>
3056              <description>Write Protect</description>
3057              <bitOffset>29</bitOffset>
3058              <bitWidth>1</bitWidth>
3059              <access>read-write</access>
3060              <enumeratedValues>
3061                <enumeratedValue>
3062                  <name>0</name>
3063                  <description>This peripheral allows write accesses.</description>
3064                  <value>#0</value>
3065                </enumeratedValue>
3066                <enumeratedValue>
3067                  <name>1</name>
3068                  <description>This peripheral is write protected.</description>
3069                  <value>#1</value>
3070                </enumeratedValue>
3071              </enumeratedValues>
3072            </field>
3073            <field>
3074              <name>SP0</name>
3075              <description>Supervisor Protect</description>
3076              <bitOffset>30</bitOffset>
3077              <bitWidth>1</bitWidth>
3078              <access>read-write</access>
3079              <enumeratedValues>
3080                <enumeratedValue>
3081                  <name>0</name>
3082                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3083                  <value>#0</value>
3084                </enumeratedValue>
3085                <enumeratedValue>
3086                  <name>1</name>
3087                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3088                  <value>#1</value>
3089                </enumeratedValue>
3090              </enumeratedValues>
3091            </field>
3092          </fields>
3093        </register>
3094        <register>
3095          <name>PACRF</name>
3096          <description>Peripheral Access Control Register</description>
3097          <addressOffset>0x44</addressOffset>
3098          <size>32</size>
3099          <access>read-write</access>
3100          <resetValue>0x4404</resetValue>
3101          <resetMask>0xFFFFFFFF</resetMask>
3102          <fields>
3103            <field>
3104              <name>TP7</name>
3105              <description>Trusted Protect</description>
3106              <bitOffset>0</bitOffset>
3107              <bitWidth>1</bitWidth>
3108              <access>read-write</access>
3109              <enumeratedValues>
3110                <enumeratedValue>
3111                  <name>0</name>
3112                  <description>Accesses from an untrusted master are allowed.</description>
3113                  <value>#0</value>
3114                </enumeratedValue>
3115                <enumeratedValue>
3116                  <name>1</name>
3117                  <description>Accesses from an untrusted master are not allowed.</description>
3118                  <value>#1</value>
3119                </enumeratedValue>
3120              </enumeratedValues>
3121            </field>
3122            <field>
3123              <name>WP7</name>
3124              <description>Write Protect</description>
3125              <bitOffset>1</bitOffset>
3126              <bitWidth>1</bitWidth>
3127              <access>read-write</access>
3128              <enumeratedValues>
3129                <enumeratedValue>
3130                  <name>0</name>
3131                  <description>This peripheral allows write accesses.</description>
3132                  <value>#0</value>
3133                </enumeratedValue>
3134                <enumeratedValue>
3135                  <name>1</name>
3136                  <description>This peripheral is write protected.</description>
3137                  <value>#1</value>
3138                </enumeratedValue>
3139              </enumeratedValues>
3140            </field>
3141            <field>
3142              <name>SP7</name>
3143              <description>Supervisor Protect</description>
3144              <bitOffset>2</bitOffset>
3145              <bitWidth>1</bitWidth>
3146              <access>read-write</access>
3147              <enumeratedValues>
3148                <enumeratedValue>
3149                  <name>0</name>
3150                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3151                  <value>#0</value>
3152                </enumeratedValue>
3153                <enumeratedValue>
3154                  <name>1</name>
3155                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3156                  <value>#1</value>
3157                </enumeratedValue>
3158              </enumeratedValues>
3159            </field>
3160            <field>
3161              <name>TP6</name>
3162              <description>Trusted Protect</description>
3163              <bitOffset>4</bitOffset>
3164              <bitWidth>1</bitWidth>
3165              <access>read-write</access>
3166              <enumeratedValues>
3167                <enumeratedValue>
3168                  <name>0</name>
3169                  <description>Accesses from an untrusted master are allowed.</description>
3170                  <value>#0</value>
3171                </enumeratedValue>
3172                <enumeratedValue>
3173                  <name>1</name>
3174                  <description>Accesses from an untrusted master are not allowed.</description>
3175                  <value>#1</value>
3176                </enumeratedValue>
3177              </enumeratedValues>
3178            </field>
3179            <field>
3180              <name>WP6</name>
3181              <description>Write Protect</description>
3182              <bitOffset>5</bitOffset>
3183              <bitWidth>1</bitWidth>
3184              <access>read-write</access>
3185              <enumeratedValues>
3186                <enumeratedValue>
3187                  <name>0</name>
3188                  <description>This peripheral allows write accesses.</description>
3189                  <value>#0</value>
3190                </enumeratedValue>
3191                <enumeratedValue>
3192                  <name>1</name>
3193                  <description>This peripheral is write protected.</description>
3194                  <value>#1</value>
3195                </enumeratedValue>
3196              </enumeratedValues>
3197            </field>
3198            <field>
3199              <name>SP6</name>
3200              <description>Supervisor Protect</description>
3201              <bitOffset>6</bitOffset>
3202              <bitWidth>1</bitWidth>
3203              <access>read-write</access>
3204              <enumeratedValues>
3205                <enumeratedValue>
3206                  <name>0</name>
3207                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3208                  <value>#0</value>
3209                </enumeratedValue>
3210                <enumeratedValue>
3211                  <name>1</name>
3212                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3213                  <value>#1</value>
3214                </enumeratedValue>
3215              </enumeratedValues>
3216            </field>
3217            <field>
3218              <name>TP5</name>
3219              <description>Trusted Protect</description>
3220              <bitOffset>8</bitOffset>
3221              <bitWidth>1</bitWidth>
3222              <access>read-write</access>
3223              <enumeratedValues>
3224                <enumeratedValue>
3225                  <name>0</name>
3226                  <description>Accesses from an untrusted master are allowed.</description>
3227                  <value>#0</value>
3228                </enumeratedValue>
3229                <enumeratedValue>
3230                  <name>1</name>
3231                  <description>Accesses from an untrusted master are not allowed.</description>
3232                  <value>#1</value>
3233                </enumeratedValue>
3234              </enumeratedValues>
3235            </field>
3236            <field>
3237              <name>WP5</name>
3238              <description>Write Protect</description>
3239              <bitOffset>9</bitOffset>
3240              <bitWidth>1</bitWidth>
3241              <access>read-write</access>
3242              <enumeratedValues>
3243                <enumeratedValue>
3244                  <name>0</name>
3245                  <description>This peripheral allows write accesses.</description>
3246                  <value>#0</value>
3247                </enumeratedValue>
3248                <enumeratedValue>
3249                  <name>1</name>
3250                  <description>This peripheral is write protected.</description>
3251                  <value>#1</value>
3252                </enumeratedValue>
3253              </enumeratedValues>
3254            </field>
3255            <field>
3256              <name>SP5</name>
3257              <description>Supervisor Protect</description>
3258              <bitOffset>10</bitOffset>
3259              <bitWidth>1</bitWidth>
3260              <access>read-write</access>
3261              <enumeratedValues>
3262                <enumeratedValue>
3263                  <name>0</name>
3264                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3265                  <value>#0</value>
3266                </enumeratedValue>
3267                <enumeratedValue>
3268                  <name>1</name>
3269                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3270                  <value>#1</value>
3271                </enumeratedValue>
3272              </enumeratedValues>
3273            </field>
3274            <field>
3275              <name>TP4</name>
3276              <description>Trusted Protect</description>
3277              <bitOffset>12</bitOffset>
3278              <bitWidth>1</bitWidth>
3279              <access>read-write</access>
3280              <enumeratedValues>
3281                <enumeratedValue>
3282                  <name>0</name>
3283                  <description>Accesses from an untrusted master are allowed.</description>
3284                  <value>#0</value>
3285                </enumeratedValue>
3286                <enumeratedValue>
3287                  <name>1</name>
3288                  <description>Accesses from an untrusted master are not allowed.</description>
3289                  <value>#1</value>
3290                </enumeratedValue>
3291              </enumeratedValues>
3292            </field>
3293            <field>
3294              <name>WP4</name>
3295              <description>Write Protect</description>
3296              <bitOffset>13</bitOffset>
3297              <bitWidth>1</bitWidth>
3298              <access>read-write</access>
3299              <enumeratedValues>
3300                <enumeratedValue>
3301                  <name>0</name>
3302                  <description>This peripheral allows write accesses.</description>
3303                  <value>#0</value>
3304                </enumeratedValue>
3305                <enumeratedValue>
3306                  <name>1</name>
3307                  <description>This peripheral is write protected.</description>
3308                  <value>#1</value>
3309                </enumeratedValue>
3310              </enumeratedValues>
3311            </field>
3312            <field>
3313              <name>SP4</name>
3314              <description>Supervisor Protect</description>
3315              <bitOffset>14</bitOffset>
3316              <bitWidth>1</bitWidth>
3317              <access>read-write</access>
3318              <enumeratedValues>
3319                <enumeratedValue>
3320                  <name>0</name>
3321                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3322                  <value>#0</value>
3323                </enumeratedValue>
3324                <enumeratedValue>
3325                  <name>1</name>
3326                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3327                  <value>#1</value>
3328                </enumeratedValue>
3329              </enumeratedValues>
3330            </field>
3331            <field>
3332              <name>TP3</name>
3333              <description>Trusted Protect</description>
3334              <bitOffset>16</bitOffset>
3335              <bitWidth>1</bitWidth>
3336              <access>read-write</access>
3337              <enumeratedValues>
3338                <enumeratedValue>
3339                  <name>0</name>
3340                  <description>Accesses from an untrusted master are allowed.</description>
3341                  <value>#0</value>
3342                </enumeratedValue>
3343                <enumeratedValue>
3344                  <name>1</name>
3345                  <description>Accesses from an untrusted master are not allowed.</description>
3346                  <value>#1</value>
3347                </enumeratedValue>
3348              </enumeratedValues>
3349            </field>
3350            <field>
3351              <name>WP3</name>
3352              <description>Write Protect</description>
3353              <bitOffset>17</bitOffset>
3354              <bitWidth>1</bitWidth>
3355              <access>read-write</access>
3356              <enumeratedValues>
3357                <enumeratedValue>
3358                  <name>0</name>
3359                  <description>This peripheral allows write accesses.</description>
3360                  <value>#0</value>
3361                </enumeratedValue>
3362                <enumeratedValue>
3363                  <name>1</name>
3364                  <description>This peripheral is write protected.</description>
3365                  <value>#1</value>
3366                </enumeratedValue>
3367              </enumeratedValues>
3368            </field>
3369            <field>
3370              <name>SP3</name>
3371              <description>Supervisor Protect</description>
3372              <bitOffset>18</bitOffset>
3373              <bitWidth>1</bitWidth>
3374              <access>read-write</access>
3375              <enumeratedValues>
3376                <enumeratedValue>
3377                  <name>0</name>
3378                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3379                  <value>#0</value>
3380                </enumeratedValue>
3381                <enumeratedValue>
3382                  <name>1</name>
3383                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3384                  <value>#1</value>
3385                </enumeratedValue>
3386              </enumeratedValues>
3387            </field>
3388            <field>
3389              <name>TP2</name>
3390              <description>Trusted Protect</description>
3391              <bitOffset>20</bitOffset>
3392              <bitWidth>1</bitWidth>
3393              <access>read-write</access>
3394              <enumeratedValues>
3395                <enumeratedValue>
3396                  <name>0</name>
3397                  <description>Accesses from an untrusted master are allowed.</description>
3398                  <value>#0</value>
3399                </enumeratedValue>
3400                <enumeratedValue>
3401                  <name>1</name>
3402                  <description>Accesses from an untrusted master are not allowed.</description>
3403                  <value>#1</value>
3404                </enumeratedValue>
3405              </enumeratedValues>
3406            </field>
3407            <field>
3408              <name>WP2</name>
3409              <description>Write Protect</description>
3410              <bitOffset>21</bitOffset>
3411              <bitWidth>1</bitWidth>
3412              <access>read-write</access>
3413              <enumeratedValues>
3414                <enumeratedValue>
3415                  <name>0</name>
3416                  <description>This peripheral allows write accesses.</description>
3417                  <value>#0</value>
3418                </enumeratedValue>
3419                <enumeratedValue>
3420                  <name>1</name>
3421                  <description>This peripheral is write protected.</description>
3422                  <value>#1</value>
3423                </enumeratedValue>
3424              </enumeratedValues>
3425            </field>
3426            <field>
3427              <name>SP2</name>
3428              <description>Supervisor Protect</description>
3429              <bitOffset>22</bitOffset>
3430              <bitWidth>1</bitWidth>
3431              <access>read-write</access>
3432              <enumeratedValues>
3433                <enumeratedValue>
3434                  <name>0</name>
3435                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3436                  <value>#0</value>
3437                </enumeratedValue>
3438                <enumeratedValue>
3439                  <name>1</name>
3440                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3441                  <value>#1</value>
3442                </enumeratedValue>
3443              </enumeratedValues>
3444            </field>
3445            <field>
3446              <name>TP1</name>
3447              <description>Trusted Protect</description>
3448              <bitOffset>24</bitOffset>
3449              <bitWidth>1</bitWidth>
3450              <access>read-write</access>
3451              <enumeratedValues>
3452                <enumeratedValue>
3453                  <name>0</name>
3454                  <description>Accesses from an untrusted master are allowed.</description>
3455                  <value>#0</value>
3456                </enumeratedValue>
3457                <enumeratedValue>
3458                  <name>1</name>
3459                  <description>Accesses from an untrusted master are not allowed.</description>
3460                  <value>#1</value>
3461                </enumeratedValue>
3462              </enumeratedValues>
3463            </field>
3464            <field>
3465              <name>WP1</name>
3466              <description>Write Protect</description>
3467              <bitOffset>25</bitOffset>
3468              <bitWidth>1</bitWidth>
3469              <access>read-write</access>
3470              <enumeratedValues>
3471                <enumeratedValue>
3472                  <name>0</name>
3473                  <description>This peripheral allows write accesses.</description>
3474                  <value>#0</value>
3475                </enumeratedValue>
3476                <enumeratedValue>
3477                  <name>1</name>
3478                  <description>This peripheral is write protected.</description>
3479                  <value>#1</value>
3480                </enumeratedValue>
3481              </enumeratedValues>
3482            </field>
3483            <field>
3484              <name>SP1</name>
3485              <description>Supervisor Protect</description>
3486              <bitOffset>26</bitOffset>
3487              <bitWidth>1</bitWidth>
3488              <access>read-write</access>
3489              <enumeratedValues>
3490                <enumeratedValue>
3491                  <name>0</name>
3492                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3493                  <value>#0</value>
3494                </enumeratedValue>
3495                <enumeratedValue>
3496                  <name>1</name>
3497                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3498                  <value>#1</value>
3499                </enumeratedValue>
3500              </enumeratedValues>
3501            </field>
3502            <field>
3503              <name>TP0</name>
3504              <description>Trusted Protect</description>
3505              <bitOffset>28</bitOffset>
3506              <bitWidth>1</bitWidth>
3507              <access>read-write</access>
3508              <enumeratedValues>
3509                <enumeratedValue>
3510                  <name>0</name>
3511                  <description>Accesses from an untrusted master are allowed.</description>
3512                  <value>#0</value>
3513                </enumeratedValue>
3514                <enumeratedValue>
3515                  <name>1</name>
3516                  <description>Accesses from an untrusted master are not allowed.</description>
3517                  <value>#1</value>
3518                </enumeratedValue>
3519              </enumeratedValues>
3520            </field>
3521            <field>
3522              <name>WP0</name>
3523              <description>Write Protect</description>
3524              <bitOffset>29</bitOffset>
3525              <bitWidth>1</bitWidth>
3526              <access>read-write</access>
3527              <enumeratedValues>
3528                <enumeratedValue>
3529                  <name>0</name>
3530                  <description>This peripheral allows write accesses.</description>
3531                  <value>#0</value>
3532                </enumeratedValue>
3533                <enumeratedValue>
3534                  <name>1</name>
3535                  <description>This peripheral is write protected.</description>
3536                  <value>#1</value>
3537                </enumeratedValue>
3538              </enumeratedValues>
3539            </field>
3540            <field>
3541              <name>SP0</name>
3542              <description>Supervisor Protect</description>
3543              <bitOffset>30</bitOffset>
3544              <bitWidth>1</bitWidth>
3545              <access>read-write</access>
3546              <enumeratedValues>
3547                <enumeratedValue>
3548                  <name>0</name>
3549                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3550                  <value>#0</value>
3551                </enumeratedValue>
3552                <enumeratedValue>
3553                  <name>1</name>
3554                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3555                  <value>#1</value>
3556                </enumeratedValue>
3557              </enumeratedValues>
3558            </field>
3559          </fields>
3560        </register>
3561        <register>
3562          <name>PACRG</name>
3563          <description>Peripheral Access Control Register</description>
3564          <addressOffset>0x48</addressOffset>
3565          <size>32</size>
3566          <access>read-write</access>
3567          <resetValue>0x400444</resetValue>
3568          <resetMask>0xFFFFFFFF</resetMask>
3569          <fields>
3570            <field>
3571              <name>TP7</name>
3572              <description>Trusted Protect</description>
3573              <bitOffset>0</bitOffset>
3574              <bitWidth>1</bitWidth>
3575              <access>read-write</access>
3576              <enumeratedValues>
3577                <enumeratedValue>
3578                  <name>0</name>
3579                  <description>Accesses from an untrusted master are allowed.</description>
3580                  <value>#0</value>
3581                </enumeratedValue>
3582                <enumeratedValue>
3583                  <name>1</name>
3584                  <description>Accesses from an untrusted master are not allowed.</description>
3585                  <value>#1</value>
3586                </enumeratedValue>
3587              </enumeratedValues>
3588            </field>
3589            <field>
3590              <name>WP7</name>
3591              <description>Write Protect</description>
3592              <bitOffset>1</bitOffset>
3593              <bitWidth>1</bitWidth>
3594              <access>read-write</access>
3595              <enumeratedValues>
3596                <enumeratedValue>
3597                  <name>0</name>
3598                  <description>This peripheral allows write accesses.</description>
3599                  <value>#0</value>
3600                </enumeratedValue>
3601                <enumeratedValue>
3602                  <name>1</name>
3603                  <description>This peripheral is write protected.</description>
3604                  <value>#1</value>
3605                </enumeratedValue>
3606              </enumeratedValues>
3607            </field>
3608            <field>
3609              <name>SP7</name>
3610              <description>Supervisor Protect</description>
3611              <bitOffset>2</bitOffset>
3612              <bitWidth>1</bitWidth>
3613              <access>read-write</access>
3614              <enumeratedValues>
3615                <enumeratedValue>
3616                  <name>0</name>
3617                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3618                  <value>#0</value>
3619                </enumeratedValue>
3620                <enumeratedValue>
3621                  <name>1</name>
3622                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3623                  <value>#1</value>
3624                </enumeratedValue>
3625              </enumeratedValues>
3626            </field>
3627            <field>
3628              <name>TP6</name>
3629              <description>Trusted Protect</description>
3630              <bitOffset>4</bitOffset>
3631              <bitWidth>1</bitWidth>
3632              <access>read-write</access>
3633              <enumeratedValues>
3634                <enumeratedValue>
3635                  <name>0</name>
3636                  <description>Accesses from an untrusted master are allowed.</description>
3637                  <value>#0</value>
3638                </enumeratedValue>
3639                <enumeratedValue>
3640                  <name>1</name>
3641                  <description>Accesses from an untrusted master are not allowed.</description>
3642                  <value>#1</value>
3643                </enumeratedValue>
3644              </enumeratedValues>
3645            </field>
3646            <field>
3647              <name>WP6</name>
3648              <description>Write Protect</description>
3649              <bitOffset>5</bitOffset>
3650              <bitWidth>1</bitWidth>
3651              <access>read-write</access>
3652              <enumeratedValues>
3653                <enumeratedValue>
3654                  <name>0</name>
3655                  <description>This peripheral allows write accesses.</description>
3656                  <value>#0</value>
3657                </enumeratedValue>
3658                <enumeratedValue>
3659                  <name>1</name>
3660                  <description>This peripheral is write protected.</description>
3661                  <value>#1</value>
3662                </enumeratedValue>
3663              </enumeratedValues>
3664            </field>
3665            <field>
3666              <name>SP6</name>
3667              <description>Supervisor Protect</description>
3668              <bitOffset>6</bitOffset>
3669              <bitWidth>1</bitWidth>
3670              <access>read-write</access>
3671              <enumeratedValues>
3672                <enumeratedValue>
3673                  <name>0</name>
3674                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3675                  <value>#0</value>
3676                </enumeratedValue>
3677                <enumeratedValue>
3678                  <name>1</name>
3679                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3680                  <value>#1</value>
3681                </enumeratedValue>
3682              </enumeratedValues>
3683            </field>
3684            <field>
3685              <name>TP5</name>
3686              <description>Trusted Protect</description>
3687              <bitOffset>8</bitOffset>
3688              <bitWidth>1</bitWidth>
3689              <access>read-write</access>
3690              <enumeratedValues>
3691                <enumeratedValue>
3692                  <name>0</name>
3693                  <description>Accesses from an untrusted master are allowed.</description>
3694                  <value>#0</value>
3695                </enumeratedValue>
3696                <enumeratedValue>
3697                  <name>1</name>
3698                  <description>Accesses from an untrusted master are not allowed.</description>
3699                  <value>#1</value>
3700                </enumeratedValue>
3701              </enumeratedValues>
3702            </field>
3703            <field>
3704              <name>WP5</name>
3705              <description>Write Protect</description>
3706              <bitOffset>9</bitOffset>
3707              <bitWidth>1</bitWidth>
3708              <access>read-write</access>
3709              <enumeratedValues>
3710                <enumeratedValue>
3711                  <name>0</name>
3712                  <description>This peripheral allows write accesses.</description>
3713                  <value>#0</value>
3714                </enumeratedValue>
3715                <enumeratedValue>
3716                  <name>1</name>
3717                  <description>This peripheral is write protected.</description>
3718                  <value>#1</value>
3719                </enumeratedValue>
3720              </enumeratedValues>
3721            </field>
3722            <field>
3723              <name>SP5</name>
3724              <description>Supervisor Protect</description>
3725              <bitOffset>10</bitOffset>
3726              <bitWidth>1</bitWidth>
3727              <access>read-write</access>
3728              <enumeratedValues>
3729                <enumeratedValue>
3730                  <name>0</name>
3731                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3732                  <value>#0</value>
3733                </enumeratedValue>
3734                <enumeratedValue>
3735                  <name>1</name>
3736                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3737                  <value>#1</value>
3738                </enumeratedValue>
3739              </enumeratedValues>
3740            </field>
3741            <field>
3742              <name>TP4</name>
3743              <description>Trusted Protect</description>
3744              <bitOffset>12</bitOffset>
3745              <bitWidth>1</bitWidth>
3746              <access>read-write</access>
3747              <enumeratedValues>
3748                <enumeratedValue>
3749                  <name>0</name>
3750                  <description>Accesses from an untrusted master are allowed.</description>
3751                  <value>#0</value>
3752                </enumeratedValue>
3753                <enumeratedValue>
3754                  <name>1</name>
3755                  <description>Accesses from an untrusted master are not allowed.</description>
3756                  <value>#1</value>
3757                </enumeratedValue>
3758              </enumeratedValues>
3759            </field>
3760            <field>
3761              <name>WP4</name>
3762              <description>Write Protect</description>
3763              <bitOffset>13</bitOffset>
3764              <bitWidth>1</bitWidth>
3765              <access>read-write</access>
3766              <enumeratedValues>
3767                <enumeratedValue>
3768                  <name>0</name>
3769                  <description>This peripheral allows write accesses.</description>
3770                  <value>#0</value>
3771                </enumeratedValue>
3772                <enumeratedValue>
3773                  <name>1</name>
3774                  <description>This peripheral is write protected.</description>
3775                  <value>#1</value>
3776                </enumeratedValue>
3777              </enumeratedValues>
3778            </field>
3779            <field>
3780              <name>SP4</name>
3781              <description>Supervisor Protect</description>
3782              <bitOffset>14</bitOffset>
3783              <bitWidth>1</bitWidth>
3784              <access>read-write</access>
3785              <enumeratedValues>
3786                <enumeratedValue>
3787                  <name>0</name>
3788                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3789                  <value>#0</value>
3790                </enumeratedValue>
3791                <enumeratedValue>
3792                  <name>1</name>
3793                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3794                  <value>#1</value>
3795                </enumeratedValue>
3796              </enumeratedValues>
3797            </field>
3798            <field>
3799              <name>TP3</name>
3800              <description>Trusted Protect</description>
3801              <bitOffset>16</bitOffset>
3802              <bitWidth>1</bitWidth>
3803              <access>read-write</access>
3804              <enumeratedValues>
3805                <enumeratedValue>
3806                  <name>0</name>
3807                  <description>Accesses from an untrusted master are allowed.</description>
3808                  <value>#0</value>
3809                </enumeratedValue>
3810                <enumeratedValue>
3811                  <name>1</name>
3812                  <description>Accesses from an untrusted master are not allowed.</description>
3813                  <value>#1</value>
3814                </enumeratedValue>
3815              </enumeratedValues>
3816            </field>
3817            <field>
3818              <name>WP3</name>
3819              <description>Write Protect</description>
3820              <bitOffset>17</bitOffset>
3821              <bitWidth>1</bitWidth>
3822              <access>read-write</access>
3823              <enumeratedValues>
3824                <enumeratedValue>
3825                  <name>0</name>
3826                  <description>This peripheral allows write accesses.</description>
3827                  <value>#0</value>
3828                </enumeratedValue>
3829                <enumeratedValue>
3830                  <name>1</name>
3831                  <description>This peripheral is write protected.</description>
3832                  <value>#1</value>
3833                </enumeratedValue>
3834              </enumeratedValues>
3835            </field>
3836            <field>
3837              <name>SP3</name>
3838              <description>Supervisor Protect</description>
3839              <bitOffset>18</bitOffset>
3840              <bitWidth>1</bitWidth>
3841              <access>read-write</access>
3842              <enumeratedValues>
3843                <enumeratedValue>
3844                  <name>0</name>
3845                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3846                  <value>#0</value>
3847                </enumeratedValue>
3848                <enumeratedValue>
3849                  <name>1</name>
3850                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3851                  <value>#1</value>
3852                </enumeratedValue>
3853              </enumeratedValues>
3854            </field>
3855            <field>
3856              <name>TP2</name>
3857              <description>Trusted Protect</description>
3858              <bitOffset>20</bitOffset>
3859              <bitWidth>1</bitWidth>
3860              <access>read-write</access>
3861              <enumeratedValues>
3862                <enumeratedValue>
3863                  <name>0</name>
3864                  <description>Accesses from an untrusted master are allowed.</description>
3865                  <value>#0</value>
3866                </enumeratedValue>
3867                <enumeratedValue>
3868                  <name>1</name>
3869                  <description>Accesses from an untrusted master are not allowed.</description>
3870                  <value>#1</value>
3871                </enumeratedValue>
3872              </enumeratedValues>
3873            </field>
3874            <field>
3875              <name>WP2</name>
3876              <description>Write Protect</description>
3877              <bitOffset>21</bitOffset>
3878              <bitWidth>1</bitWidth>
3879              <access>read-write</access>
3880              <enumeratedValues>
3881                <enumeratedValue>
3882                  <name>0</name>
3883                  <description>This peripheral allows write accesses.</description>
3884                  <value>#0</value>
3885                </enumeratedValue>
3886                <enumeratedValue>
3887                  <name>1</name>
3888                  <description>This peripheral is write protected.</description>
3889                  <value>#1</value>
3890                </enumeratedValue>
3891              </enumeratedValues>
3892            </field>
3893            <field>
3894              <name>SP2</name>
3895              <description>Supervisor Protect</description>
3896              <bitOffset>22</bitOffset>
3897              <bitWidth>1</bitWidth>
3898              <access>read-write</access>
3899              <enumeratedValues>
3900                <enumeratedValue>
3901                  <name>0</name>
3902                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3903                  <value>#0</value>
3904                </enumeratedValue>
3905                <enumeratedValue>
3906                  <name>1</name>
3907                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3908                  <value>#1</value>
3909                </enumeratedValue>
3910              </enumeratedValues>
3911            </field>
3912            <field>
3913              <name>TP1</name>
3914              <description>Trusted Protect</description>
3915              <bitOffset>24</bitOffset>
3916              <bitWidth>1</bitWidth>
3917              <access>read-write</access>
3918              <enumeratedValues>
3919                <enumeratedValue>
3920                  <name>0</name>
3921                  <description>Accesses from an untrusted master are allowed.</description>
3922                  <value>#0</value>
3923                </enumeratedValue>
3924                <enumeratedValue>
3925                  <name>1</name>
3926                  <description>Accesses from an untrusted master are not allowed.</description>
3927                  <value>#1</value>
3928                </enumeratedValue>
3929              </enumeratedValues>
3930            </field>
3931            <field>
3932              <name>WP1</name>
3933              <description>Write Protect</description>
3934              <bitOffset>25</bitOffset>
3935              <bitWidth>1</bitWidth>
3936              <access>read-write</access>
3937              <enumeratedValues>
3938                <enumeratedValue>
3939                  <name>0</name>
3940                  <description>This peripheral allows write accesses.</description>
3941                  <value>#0</value>
3942                </enumeratedValue>
3943                <enumeratedValue>
3944                  <name>1</name>
3945                  <description>This peripheral is write protected.</description>
3946                  <value>#1</value>
3947                </enumeratedValue>
3948              </enumeratedValues>
3949            </field>
3950            <field>
3951              <name>SP1</name>
3952              <description>Supervisor Protect</description>
3953              <bitOffset>26</bitOffset>
3954              <bitWidth>1</bitWidth>
3955              <access>read-write</access>
3956              <enumeratedValues>
3957                <enumeratedValue>
3958                  <name>0</name>
3959                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
3960                  <value>#0</value>
3961                </enumeratedValue>
3962                <enumeratedValue>
3963                  <name>1</name>
3964                  <description>This peripheral requires supervisor privilege level for accesses.</description>
3965                  <value>#1</value>
3966                </enumeratedValue>
3967              </enumeratedValues>
3968            </field>
3969            <field>
3970              <name>TP0</name>
3971              <description>Trusted Protect</description>
3972              <bitOffset>28</bitOffset>
3973              <bitWidth>1</bitWidth>
3974              <access>read-write</access>
3975              <enumeratedValues>
3976                <enumeratedValue>
3977                  <name>0</name>
3978                  <description>Accesses from an untrusted master are allowed.</description>
3979                  <value>#0</value>
3980                </enumeratedValue>
3981                <enumeratedValue>
3982                  <name>1</name>
3983                  <description>Accesses from an untrusted master are not allowed.</description>
3984                  <value>#1</value>
3985                </enumeratedValue>
3986              </enumeratedValues>
3987            </field>
3988            <field>
3989              <name>WP0</name>
3990              <description>Write Protect</description>
3991              <bitOffset>29</bitOffset>
3992              <bitWidth>1</bitWidth>
3993              <access>read-write</access>
3994              <enumeratedValues>
3995                <enumeratedValue>
3996                  <name>0</name>
3997                  <description>This peripheral allows write accesses.</description>
3998                  <value>#0</value>
3999                </enumeratedValue>
4000                <enumeratedValue>
4001                  <name>1</name>
4002                  <description>This peripheral is write protected.</description>
4003                  <value>#1</value>
4004                </enumeratedValue>
4005              </enumeratedValues>
4006            </field>
4007            <field>
4008              <name>SP0</name>
4009              <description>Supervisor Protect</description>
4010              <bitOffset>30</bitOffset>
4011              <bitWidth>1</bitWidth>
4012              <access>read-write</access>
4013              <enumeratedValues>
4014                <enumeratedValue>
4015                  <name>0</name>
4016                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4017                  <value>#0</value>
4018                </enumeratedValue>
4019                <enumeratedValue>
4020                  <name>1</name>
4021                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4022                  <value>#1</value>
4023                </enumeratedValue>
4024              </enumeratedValues>
4025            </field>
4026          </fields>
4027        </register>
4028        <register>
4029          <name>PACRH</name>
4030          <description>Peripheral Access Control Register</description>
4031          <addressOffset>0x4C</addressOffset>
4032          <size>32</size>
4033          <access>read-write</access>
4034          <resetValue>0x44440444</resetValue>
4035          <resetMask>0xFFFFFFFF</resetMask>
4036          <fields>
4037            <field>
4038              <name>TP7</name>
4039              <description>Trusted Protect</description>
4040              <bitOffset>0</bitOffset>
4041              <bitWidth>1</bitWidth>
4042              <access>read-write</access>
4043              <enumeratedValues>
4044                <enumeratedValue>
4045                  <name>0</name>
4046                  <description>Accesses from an untrusted master are allowed.</description>
4047                  <value>#0</value>
4048                </enumeratedValue>
4049                <enumeratedValue>
4050                  <name>1</name>
4051                  <description>Accesses from an untrusted master are not allowed.</description>
4052                  <value>#1</value>
4053                </enumeratedValue>
4054              </enumeratedValues>
4055            </field>
4056            <field>
4057              <name>WP7</name>
4058              <description>Write Protect</description>
4059              <bitOffset>1</bitOffset>
4060              <bitWidth>1</bitWidth>
4061              <access>read-write</access>
4062              <enumeratedValues>
4063                <enumeratedValue>
4064                  <name>0</name>
4065                  <description>This peripheral allows write accesses.</description>
4066                  <value>#0</value>
4067                </enumeratedValue>
4068                <enumeratedValue>
4069                  <name>1</name>
4070                  <description>This peripheral is write protected.</description>
4071                  <value>#1</value>
4072                </enumeratedValue>
4073              </enumeratedValues>
4074            </field>
4075            <field>
4076              <name>SP7</name>
4077              <description>Supervisor Protect</description>
4078              <bitOffset>2</bitOffset>
4079              <bitWidth>1</bitWidth>
4080              <access>read-write</access>
4081              <enumeratedValues>
4082                <enumeratedValue>
4083                  <name>0</name>
4084                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4085                  <value>#0</value>
4086                </enumeratedValue>
4087                <enumeratedValue>
4088                  <name>1</name>
4089                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4090                  <value>#1</value>
4091                </enumeratedValue>
4092              </enumeratedValues>
4093            </field>
4094            <field>
4095              <name>TP6</name>
4096              <description>Trusted Protect</description>
4097              <bitOffset>4</bitOffset>
4098              <bitWidth>1</bitWidth>
4099              <access>read-write</access>
4100              <enumeratedValues>
4101                <enumeratedValue>
4102                  <name>0</name>
4103                  <description>Accesses from an untrusted master are allowed.</description>
4104                  <value>#0</value>
4105                </enumeratedValue>
4106                <enumeratedValue>
4107                  <name>1</name>
4108                  <description>Accesses from an untrusted master are not allowed.</description>
4109                  <value>#1</value>
4110                </enumeratedValue>
4111              </enumeratedValues>
4112            </field>
4113            <field>
4114              <name>WP6</name>
4115              <description>Write Protect</description>
4116              <bitOffset>5</bitOffset>
4117              <bitWidth>1</bitWidth>
4118              <access>read-write</access>
4119              <enumeratedValues>
4120                <enumeratedValue>
4121                  <name>0</name>
4122                  <description>This peripheral allows write accesses.</description>
4123                  <value>#0</value>
4124                </enumeratedValue>
4125                <enumeratedValue>
4126                  <name>1</name>
4127                  <description>This peripheral is write protected.</description>
4128                  <value>#1</value>
4129                </enumeratedValue>
4130              </enumeratedValues>
4131            </field>
4132            <field>
4133              <name>SP6</name>
4134              <description>Supervisor Protect</description>
4135              <bitOffset>6</bitOffset>
4136              <bitWidth>1</bitWidth>
4137              <access>read-write</access>
4138              <enumeratedValues>
4139                <enumeratedValue>
4140                  <name>0</name>
4141                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4142                  <value>#0</value>
4143                </enumeratedValue>
4144                <enumeratedValue>
4145                  <name>1</name>
4146                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4147                  <value>#1</value>
4148                </enumeratedValue>
4149              </enumeratedValues>
4150            </field>
4151            <field>
4152              <name>TP5</name>
4153              <description>Trusted Protect</description>
4154              <bitOffset>8</bitOffset>
4155              <bitWidth>1</bitWidth>
4156              <access>read-write</access>
4157              <enumeratedValues>
4158                <enumeratedValue>
4159                  <name>0</name>
4160                  <description>Accesses from an untrusted master are allowed.</description>
4161                  <value>#0</value>
4162                </enumeratedValue>
4163                <enumeratedValue>
4164                  <name>1</name>
4165                  <description>Accesses from an untrusted master are not allowed.</description>
4166                  <value>#1</value>
4167                </enumeratedValue>
4168              </enumeratedValues>
4169            </field>
4170            <field>
4171              <name>WP5</name>
4172              <description>Write Protect</description>
4173              <bitOffset>9</bitOffset>
4174              <bitWidth>1</bitWidth>
4175              <access>read-write</access>
4176              <enumeratedValues>
4177                <enumeratedValue>
4178                  <name>0</name>
4179                  <description>This peripheral allows write accesses.</description>
4180                  <value>#0</value>
4181                </enumeratedValue>
4182                <enumeratedValue>
4183                  <name>1</name>
4184                  <description>This peripheral is write protected.</description>
4185                  <value>#1</value>
4186                </enumeratedValue>
4187              </enumeratedValues>
4188            </field>
4189            <field>
4190              <name>SP5</name>
4191              <description>Supervisor Protect</description>
4192              <bitOffset>10</bitOffset>
4193              <bitWidth>1</bitWidth>
4194              <access>read-write</access>
4195              <enumeratedValues>
4196                <enumeratedValue>
4197                  <name>0</name>
4198                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4199                  <value>#0</value>
4200                </enumeratedValue>
4201                <enumeratedValue>
4202                  <name>1</name>
4203                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4204                  <value>#1</value>
4205                </enumeratedValue>
4206              </enumeratedValues>
4207            </field>
4208            <field>
4209              <name>TP4</name>
4210              <description>Trusted Protect</description>
4211              <bitOffset>12</bitOffset>
4212              <bitWidth>1</bitWidth>
4213              <access>read-write</access>
4214              <enumeratedValues>
4215                <enumeratedValue>
4216                  <name>0</name>
4217                  <description>Accesses from an untrusted master are allowed.</description>
4218                  <value>#0</value>
4219                </enumeratedValue>
4220                <enumeratedValue>
4221                  <name>1</name>
4222                  <description>Accesses from an untrusted master are not allowed.</description>
4223                  <value>#1</value>
4224                </enumeratedValue>
4225              </enumeratedValues>
4226            </field>
4227            <field>
4228              <name>WP4</name>
4229              <description>Write Protect</description>
4230              <bitOffset>13</bitOffset>
4231              <bitWidth>1</bitWidth>
4232              <access>read-write</access>
4233              <enumeratedValues>
4234                <enumeratedValue>
4235                  <name>0</name>
4236                  <description>This peripheral allows write accesses.</description>
4237                  <value>#0</value>
4238                </enumeratedValue>
4239                <enumeratedValue>
4240                  <name>1</name>
4241                  <description>This peripheral is write protected.</description>
4242                  <value>#1</value>
4243                </enumeratedValue>
4244              </enumeratedValues>
4245            </field>
4246            <field>
4247              <name>SP4</name>
4248              <description>Supervisor Protect</description>
4249              <bitOffset>14</bitOffset>
4250              <bitWidth>1</bitWidth>
4251              <access>read-write</access>
4252              <enumeratedValues>
4253                <enumeratedValue>
4254                  <name>0</name>
4255                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4256                  <value>#0</value>
4257                </enumeratedValue>
4258                <enumeratedValue>
4259                  <name>1</name>
4260                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4261                  <value>#1</value>
4262                </enumeratedValue>
4263              </enumeratedValues>
4264            </field>
4265            <field>
4266              <name>TP3</name>
4267              <description>Trusted Protect</description>
4268              <bitOffset>16</bitOffset>
4269              <bitWidth>1</bitWidth>
4270              <access>read-write</access>
4271              <enumeratedValues>
4272                <enumeratedValue>
4273                  <name>0</name>
4274                  <description>Accesses from an untrusted master are allowed.</description>
4275                  <value>#0</value>
4276                </enumeratedValue>
4277                <enumeratedValue>
4278                  <name>1</name>
4279                  <description>Accesses from an untrusted master are not allowed.</description>
4280                  <value>#1</value>
4281                </enumeratedValue>
4282              </enumeratedValues>
4283            </field>
4284            <field>
4285              <name>WP3</name>
4286              <description>Write Protect</description>
4287              <bitOffset>17</bitOffset>
4288              <bitWidth>1</bitWidth>
4289              <access>read-write</access>
4290              <enumeratedValues>
4291                <enumeratedValue>
4292                  <name>0</name>
4293                  <description>This peripheral allows write accesses.</description>
4294                  <value>#0</value>
4295                </enumeratedValue>
4296                <enumeratedValue>
4297                  <name>1</name>
4298                  <description>This peripheral is write protected.</description>
4299                  <value>#1</value>
4300                </enumeratedValue>
4301              </enumeratedValues>
4302            </field>
4303            <field>
4304              <name>SP3</name>
4305              <description>Supervisor Protect</description>
4306              <bitOffset>18</bitOffset>
4307              <bitWidth>1</bitWidth>
4308              <access>read-write</access>
4309              <enumeratedValues>
4310                <enumeratedValue>
4311                  <name>0</name>
4312                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4313                  <value>#0</value>
4314                </enumeratedValue>
4315                <enumeratedValue>
4316                  <name>1</name>
4317                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4318                  <value>#1</value>
4319                </enumeratedValue>
4320              </enumeratedValues>
4321            </field>
4322            <field>
4323              <name>TP2</name>
4324              <description>Trusted Protect</description>
4325              <bitOffset>20</bitOffset>
4326              <bitWidth>1</bitWidth>
4327              <access>read-write</access>
4328              <enumeratedValues>
4329                <enumeratedValue>
4330                  <name>0</name>
4331                  <description>Accesses from an untrusted master are allowed.</description>
4332                  <value>#0</value>
4333                </enumeratedValue>
4334                <enumeratedValue>
4335                  <name>1</name>
4336                  <description>Accesses from an untrusted master are not allowed.</description>
4337                  <value>#1</value>
4338                </enumeratedValue>
4339              </enumeratedValues>
4340            </field>
4341            <field>
4342              <name>WP2</name>
4343              <description>Write Protect</description>
4344              <bitOffset>21</bitOffset>
4345              <bitWidth>1</bitWidth>
4346              <access>read-write</access>
4347              <enumeratedValues>
4348                <enumeratedValue>
4349                  <name>0</name>
4350                  <description>This peripheral allows write accesses.</description>
4351                  <value>#0</value>
4352                </enumeratedValue>
4353                <enumeratedValue>
4354                  <name>1</name>
4355                  <description>This peripheral is write protected.</description>
4356                  <value>#1</value>
4357                </enumeratedValue>
4358              </enumeratedValues>
4359            </field>
4360            <field>
4361              <name>SP2</name>
4362              <description>Supervisor Protect</description>
4363              <bitOffset>22</bitOffset>
4364              <bitWidth>1</bitWidth>
4365              <access>read-write</access>
4366              <enumeratedValues>
4367                <enumeratedValue>
4368                  <name>0</name>
4369                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4370                  <value>#0</value>
4371                </enumeratedValue>
4372                <enumeratedValue>
4373                  <name>1</name>
4374                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4375                  <value>#1</value>
4376                </enumeratedValue>
4377              </enumeratedValues>
4378            </field>
4379            <field>
4380              <name>TP1</name>
4381              <description>Trusted Protect</description>
4382              <bitOffset>24</bitOffset>
4383              <bitWidth>1</bitWidth>
4384              <access>read-write</access>
4385              <enumeratedValues>
4386                <enumeratedValue>
4387                  <name>0</name>
4388                  <description>Accesses from an untrusted master are allowed.</description>
4389                  <value>#0</value>
4390                </enumeratedValue>
4391                <enumeratedValue>
4392                  <name>1</name>
4393                  <description>Accesses from an untrusted master are not allowed.</description>
4394                  <value>#1</value>
4395                </enumeratedValue>
4396              </enumeratedValues>
4397            </field>
4398            <field>
4399              <name>WP1</name>
4400              <description>Write Protect</description>
4401              <bitOffset>25</bitOffset>
4402              <bitWidth>1</bitWidth>
4403              <access>read-write</access>
4404              <enumeratedValues>
4405                <enumeratedValue>
4406                  <name>0</name>
4407                  <description>This peripheral allows write accesses.</description>
4408                  <value>#0</value>
4409                </enumeratedValue>
4410                <enumeratedValue>
4411                  <name>1</name>
4412                  <description>This peripheral is write protected.</description>
4413                  <value>#1</value>
4414                </enumeratedValue>
4415              </enumeratedValues>
4416            </field>
4417            <field>
4418              <name>SP1</name>
4419              <description>Supervisor Protect</description>
4420              <bitOffset>26</bitOffset>
4421              <bitWidth>1</bitWidth>
4422              <access>read-write</access>
4423              <enumeratedValues>
4424                <enumeratedValue>
4425                  <name>0</name>
4426                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4427                  <value>#0</value>
4428                </enumeratedValue>
4429                <enumeratedValue>
4430                  <name>1</name>
4431                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4432                  <value>#1</value>
4433                </enumeratedValue>
4434              </enumeratedValues>
4435            </field>
4436            <field>
4437              <name>TP0</name>
4438              <description>Trusted Protect</description>
4439              <bitOffset>28</bitOffset>
4440              <bitWidth>1</bitWidth>
4441              <access>read-write</access>
4442              <enumeratedValues>
4443                <enumeratedValue>
4444                  <name>0</name>
4445                  <description>Accesses from an untrusted master are allowed.</description>
4446                  <value>#0</value>
4447                </enumeratedValue>
4448                <enumeratedValue>
4449                  <name>1</name>
4450                  <description>Accesses from an untrusted master are not allowed.</description>
4451                  <value>#1</value>
4452                </enumeratedValue>
4453              </enumeratedValues>
4454            </field>
4455            <field>
4456              <name>WP0</name>
4457              <description>Write Protect</description>
4458              <bitOffset>29</bitOffset>
4459              <bitWidth>1</bitWidth>
4460              <access>read-write</access>
4461              <enumeratedValues>
4462                <enumeratedValue>
4463                  <name>0</name>
4464                  <description>This peripheral allows write accesses.</description>
4465                  <value>#0</value>
4466                </enumeratedValue>
4467                <enumeratedValue>
4468                  <name>1</name>
4469                  <description>This peripheral is write protected.</description>
4470                  <value>#1</value>
4471                </enumeratedValue>
4472              </enumeratedValues>
4473            </field>
4474            <field>
4475              <name>SP0</name>
4476              <description>Supervisor Protect</description>
4477              <bitOffset>30</bitOffset>
4478              <bitWidth>1</bitWidth>
4479              <access>read-write</access>
4480              <enumeratedValues>
4481                <enumeratedValue>
4482                  <name>0</name>
4483                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4484                  <value>#0</value>
4485                </enumeratedValue>
4486                <enumeratedValue>
4487                  <name>1</name>
4488                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4489                  <value>#1</value>
4490                </enumeratedValue>
4491              </enumeratedValues>
4492            </field>
4493          </fields>
4494        </register>
4495        <register>
4496          <name>PACRI</name>
4497          <description>Peripheral Access Control Register</description>
4498          <addressOffset>0x50</addressOffset>
4499          <size>32</size>
4500          <access>read-write</access>
4501          <resetValue>0x44004404</resetValue>
4502          <resetMask>0xFFFFFFFF</resetMask>
4503          <fields>
4504            <field>
4505              <name>TP7</name>
4506              <description>Trusted Protect</description>
4507              <bitOffset>0</bitOffset>
4508              <bitWidth>1</bitWidth>
4509              <access>read-write</access>
4510              <enumeratedValues>
4511                <enumeratedValue>
4512                  <name>0</name>
4513                  <description>Accesses from an untrusted master are allowed.</description>
4514                  <value>#0</value>
4515                </enumeratedValue>
4516                <enumeratedValue>
4517                  <name>1</name>
4518                  <description>Accesses from an untrusted master are not allowed.</description>
4519                  <value>#1</value>
4520                </enumeratedValue>
4521              </enumeratedValues>
4522            </field>
4523            <field>
4524              <name>WP7</name>
4525              <description>Write Protect</description>
4526              <bitOffset>1</bitOffset>
4527              <bitWidth>1</bitWidth>
4528              <access>read-write</access>
4529              <enumeratedValues>
4530                <enumeratedValue>
4531                  <name>0</name>
4532                  <description>This peripheral allows write accesses.</description>
4533                  <value>#0</value>
4534                </enumeratedValue>
4535                <enumeratedValue>
4536                  <name>1</name>
4537                  <description>This peripheral is write protected.</description>
4538                  <value>#1</value>
4539                </enumeratedValue>
4540              </enumeratedValues>
4541            </field>
4542            <field>
4543              <name>SP7</name>
4544              <description>Supervisor Protect</description>
4545              <bitOffset>2</bitOffset>
4546              <bitWidth>1</bitWidth>
4547              <access>read-write</access>
4548              <enumeratedValues>
4549                <enumeratedValue>
4550                  <name>0</name>
4551                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4552                  <value>#0</value>
4553                </enumeratedValue>
4554                <enumeratedValue>
4555                  <name>1</name>
4556                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4557                  <value>#1</value>
4558                </enumeratedValue>
4559              </enumeratedValues>
4560            </field>
4561            <field>
4562              <name>TP6</name>
4563              <description>Trusted Protect</description>
4564              <bitOffset>4</bitOffset>
4565              <bitWidth>1</bitWidth>
4566              <access>read-write</access>
4567              <enumeratedValues>
4568                <enumeratedValue>
4569                  <name>0</name>
4570                  <description>Accesses from an untrusted master are allowed.</description>
4571                  <value>#0</value>
4572                </enumeratedValue>
4573                <enumeratedValue>
4574                  <name>1</name>
4575                  <description>Accesses from an untrusted master are not allowed.</description>
4576                  <value>#1</value>
4577                </enumeratedValue>
4578              </enumeratedValues>
4579            </field>
4580            <field>
4581              <name>WP6</name>
4582              <description>Write Protect</description>
4583              <bitOffset>5</bitOffset>
4584              <bitWidth>1</bitWidth>
4585              <access>read-write</access>
4586              <enumeratedValues>
4587                <enumeratedValue>
4588                  <name>0</name>
4589                  <description>This peripheral allows write accesses.</description>
4590                  <value>#0</value>
4591                </enumeratedValue>
4592                <enumeratedValue>
4593                  <name>1</name>
4594                  <description>This peripheral is write protected.</description>
4595                  <value>#1</value>
4596                </enumeratedValue>
4597              </enumeratedValues>
4598            </field>
4599            <field>
4600              <name>SP6</name>
4601              <description>Supervisor Protect</description>
4602              <bitOffset>6</bitOffset>
4603              <bitWidth>1</bitWidth>
4604              <access>read-write</access>
4605              <enumeratedValues>
4606                <enumeratedValue>
4607                  <name>0</name>
4608                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4609                  <value>#0</value>
4610                </enumeratedValue>
4611                <enumeratedValue>
4612                  <name>1</name>
4613                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4614                  <value>#1</value>
4615                </enumeratedValue>
4616              </enumeratedValues>
4617            </field>
4618            <field>
4619              <name>TP5</name>
4620              <description>Trusted Protect</description>
4621              <bitOffset>8</bitOffset>
4622              <bitWidth>1</bitWidth>
4623              <access>read-write</access>
4624              <enumeratedValues>
4625                <enumeratedValue>
4626                  <name>0</name>
4627                  <description>Accesses from an untrusted master are allowed.</description>
4628                  <value>#0</value>
4629                </enumeratedValue>
4630                <enumeratedValue>
4631                  <name>1</name>
4632                  <description>Accesses from an untrusted master are not allowed.</description>
4633                  <value>#1</value>
4634                </enumeratedValue>
4635              </enumeratedValues>
4636            </field>
4637            <field>
4638              <name>WP5</name>
4639              <description>Write Protect</description>
4640              <bitOffset>9</bitOffset>
4641              <bitWidth>1</bitWidth>
4642              <access>read-write</access>
4643              <enumeratedValues>
4644                <enumeratedValue>
4645                  <name>0</name>
4646                  <description>This peripheral allows write accesses.</description>
4647                  <value>#0</value>
4648                </enumeratedValue>
4649                <enumeratedValue>
4650                  <name>1</name>
4651                  <description>This peripheral is write protected.</description>
4652                  <value>#1</value>
4653                </enumeratedValue>
4654              </enumeratedValues>
4655            </field>
4656            <field>
4657              <name>SP5</name>
4658              <description>Supervisor Protect</description>
4659              <bitOffset>10</bitOffset>
4660              <bitWidth>1</bitWidth>
4661              <access>read-write</access>
4662              <enumeratedValues>
4663                <enumeratedValue>
4664                  <name>0</name>
4665                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4666                  <value>#0</value>
4667                </enumeratedValue>
4668                <enumeratedValue>
4669                  <name>1</name>
4670                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4671                  <value>#1</value>
4672                </enumeratedValue>
4673              </enumeratedValues>
4674            </field>
4675            <field>
4676              <name>TP4</name>
4677              <description>Trusted Protect</description>
4678              <bitOffset>12</bitOffset>
4679              <bitWidth>1</bitWidth>
4680              <access>read-write</access>
4681              <enumeratedValues>
4682                <enumeratedValue>
4683                  <name>0</name>
4684                  <description>Accesses from an untrusted master are allowed.</description>
4685                  <value>#0</value>
4686                </enumeratedValue>
4687                <enumeratedValue>
4688                  <name>1</name>
4689                  <description>Accesses from an untrusted master are not allowed.</description>
4690                  <value>#1</value>
4691                </enumeratedValue>
4692              </enumeratedValues>
4693            </field>
4694            <field>
4695              <name>WP4</name>
4696              <description>Write Protect</description>
4697              <bitOffset>13</bitOffset>
4698              <bitWidth>1</bitWidth>
4699              <access>read-write</access>
4700              <enumeratedValues>
4701                <enumeratedValue>
4702                  <name>0</name>
4703                  <description>This peripheral allows write accesses.</description>
4704                  <value>#0</value>
4705                </enumeratedValue>
4706                <enumeratedValue>
4707                  <name>1</name>
4708                  <description>This peripheral is write protected.</description>
4709                  <value>#1</value>
4710                </enumeratedValue>
4711              </enumeratedValues>
4712            </field>
4713            <field>
4714              <name>SP4</name>
4715              <description>Supervisor Protect</description>
4716              <bitOffset>14</bitOffset>
4717              <bitWidth>1</bitWidth>
4718              <access>read-write</access>
4719              <enumeratedValues>
4720                <enumeratedValue>
4721                  <name>0</name>
4722                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4723                  <value>#0</value>
4724                </enumeratedValue>
4725                <enumeratedValue>
4726                  <name>1</name>
4727                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4728                  <value>#1</value>
4729                </enumeratedValue>
4730              </enumeratedValues>
4731            </field>
4732            <field>
4733              <name>TP3</name>
4734              <description>Trusted Protect</description>
4735              <bitOffset>16</bitOffset>
4736              <bitWidth>1</bitWidth>
4737              <access>read-write</access>
4738              <enumeratedValues>
4739                <enumeratedValue>
4740                  <name>0</name>
4741                  <description>Accesses from an untrusted master are allowed.</description>
4742                  <value>#0</value>
4743                </enumeratedValue>
4744                <enumeratedValue>
4745                  <name>1</name>
4746                  <description>Accesses from an untrusted master are not allowed.</description>
4747                  <value>#1</value>
4748                </enumeratedValue>
4749              </enumeratedValues>
4750            </field>
4751            <field>
4752              <name>WP3</name>
4753              <description>Write Protect</description>
4754              <bitOffset>17</bitOffset>
4755              <bitWidth>1</bitWidth>
4756              <access>read-write</access>
4757              <enumeratedValues>
4758                <enumeratedValue>
4759                  <name>0</name>
4760                  <description>This peripheral allows write accesses.</description>
4761                  <value>#0</value>
4762                </enumeratedValue>
4763                <enumeratedValue>
4764                  <name>1</name>
4765                  <description>This peripheral is write protected.</description>
4766                  <value>#1</value>
4767                </enumeratedValue>
4768              </enumeratedValues>
4769            </field>
4770            <field>
4771              <name>SP3</name>
4772              <description>Supervisor Protect</description>
4773              <bitOffset>18</bitOffset>
4774              <bitWidth>1</bitWidth>
4775              <access>read-write</access>
4776              <enumeratedValues>
4777                <enumeratedValue>
4778                  <name>0</name>
4779                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4780                  <value>#0</value>
4781                </enumeratedValue>
4782                <enumeratedValue>
4783                  <name>1</name>
4784                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4785                  <value>#1</value>
4786                </enumeratedValue>
4787              </enumeratedValues>
4788            </field>
4789            <field>
4790              <name>TP2</name>
4791              <description>Trusted Protect</description>
4792              <bitOffset>20</bitOffset>
4793              <bitWidth>1</bitWidth>
4794              <access>read-write</access>
4795              <enumeratedValues>
4796                <enumeratedValue>
4797                  <name>0</name>
4798                  <description>Accesses from an untrusted master are allowed.</description>
4799                  <value>#0</value>
4800                </enumeratedValue>
4801                <enumeratedValue>
4802                  <name>1</name>
4803                  <description>Accesses from an untrusted master are not allowed.</description>
4804                  <value>#1</value>
4805                </enumeratedValue>
4806              </enumeratedValues>
4807            </field>
4808            <field>
4809              <name>WP2</name>
4810              <description>Write Protect</description>
4811              <bitOffset>21</bitOffset>
4812              <bitWidth>1</bitWidth>
4813              <access>read-write</access>
4814              <enumeratedValues>
4815                <enumeratedValue>
4816                  <name>0</name>
4817                  <description>This peripheral allows write accesses.</description>
4818                  <value>#0</value>
4819                </enumeratedValue>
4820                <enumeratedValue>
4821                  <name>1</name>
4822                  <description>This peripheral is write protected.</description>
4823                  <value>#1</value>
4824                </enumeratedValue>
4825              </enumeratedValues>
4826            </field>
4827            <field>
4828              <name>SP2</name>
4829              <description>Supervisor Protect</description>
4830              <bitOffset>22</bitOffset>
4831              <bitWidth>1</bitWidth>
4832              <access>read-write</access>
4833              <enumeratedValues>
4834                <enumeratedValue>
4835                  <name>0</name>
4836                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4837                  <value>#0</value>
4838                </enumeratedValue>
4839                <enumeratedValue>
4840                  <name>1</name>
4841                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4842                  <value>#1</value>
4843                </enumeratedValue>
4844              </enumeratedValues>
4845            </field>
4846            <field>
4847              <name>TP1</name>
4848              <description>Trusted Protect</description>
4849              <bitOffset>24</bitOffset>
4850              <bitWidth>1</bitWidth>
4851              <access>read-write</access>
4852              <enumeratedValues>
4853                <enumeratedValue>
4854                  <name>0</name>
4855                  <description>Accesses from an untrusted master are allowed.</description>
4856                  <value>#0</value>
4857                </enumeratedValue>
4858                <enumeratedValue>
4859                  <name>1</name>
4860                  <description>Accesses from an untrusted master are not allowed.</description>
4861                  <value>#1</value>
4862                </enumeratedValue>
4863              </enumeratedValues>
4864            </field>
4865            <field>
4866              <name>WP1</name>
4867              <description>Write Protect</description>
4868              <bitOffset>25</bitOffset>
4869              <bitWidth>1</bitWidth>
4870              <access>read-write</access>
4871              <enumeratedValues>
4872                <enumeratedValue>
4873                  <name>0</name>
4874                  <description>This peripheral allows write accesses.</description>
4875                  <value>#0</value>
4876                </enumeratedValue>
4877                <enumeratedValue>
4878                  <name>1</name>
4879                  <description>This peripheral is write protected.</description>
4880                  <value>#1</value>
4881                </enumeratedValue>
4882              </enumeratedValues>
4883            </field>
4884            <field>
4885              <name>SP1</name>
4886              <description>Supervisor Protect</description>
4887              <bitOffset>26</bitOffset>
4888              <bitWidth>1</bitWidth>
4889              <access>read-write</access>
4890              <enumeratedValues>
4891                <enumeratedValue>
4892                  <name>0</name>
4893                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4894                  <value>#0</value>
4895                </enumeratedValue>
4896                <enumeratedValue>
4897                  <name>1</name>
4898                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4899                  <value>#1</value>
4900                </enumeratedValue>
4901              </enumeratedValues>
4902            </field>
4903            <field>
4904              <name>TP0</name>
4905              <description>Trusted Protect</description>
4906              <bitOffset>28</bitOffset>
4907              <bitWidth>1</bitWidth>
4908              <access>read-write</access>
4909              <enumeratedValues>
4910                <enumeratedValue>
4911                  <name>0</name>
4912                  <description>Accesses from an untrusted master are allowed.</description>
4913                  <value>#0</value>
4914                </enumeratedValue>
4915                <enumeratedValue>
4916                  <name>1</name>
4917                  <description>Accesses from an untrusted master are not allowed.</description>
4918                  <value>#1</value>
4919                </enumeratedValue>
4920              </enumeratedValues>
4921            </field>
4922            <field>
4923              <name>WP0</name>
4924              <description>Write Protect</description>
4925              <bitOffset>29</bitOffset>
4926              <bitWidth>1</bitWidth>
4927              <access>read-write</access>
4928              <enumeratedValues>
4929                <enumeratedValue>
4930                  <name>0</name>
4931                  <description>This peripheral allows write accesses.</description>
4932                  <value>#0</value>
4933                </enumeratedValue>
4934                <enumeratedValue>
4935                  <name>1</name>
4936                  <description>This peripheral is write protected.</description>
4937                  <value>#1</value>
4938                </enumeratedValue>
4939              </enumeratedValues>
4940            </field>
4941            <field>
4942              <name>SP0</name>
4943              <description>Supervisor Protect</description>
4944              <bitOffset>30</bitOffset>
4945              <bitWidth>1</bitWidth>
4946              <access>read-write</access>
4947              <enumeratedValues>
4948                <enumeratedValue>
4949                  <name>0</name>
4950                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
4951                  <value>#0</value>
4952                </enumeratedValue>
4953                <enumeratedValue>
4954                  <name>1</name>
4955                  <description>This peripheral requires supervisor privilege level for accesses.</description>
4956                  <value>#1</value>
4957                </enumeratedValue>
4958              </enumeratedValues>
4959            </field>
4960          </fields>
4961        </register>
4962        <register>
4963          <name>PACRJ</name>
4964          <description>Peripheral Access Control Register</description>
4965          <addressOffset>0x54</addressOffset>
4966          <size>32</size>
4967          <access>read-write</access>
4968          <resetValue>0x44444400</resetValue>
4969          <resetMask>0xFFFFFFFF</resetMask>
4970          <fields>
4971            <field>
4972              <name>TP7</name>
4973              <description>Trusted Protect</description>
4974              <bitOffset>0</bitOffset>
4975              <bitWidth>1</bitWidth>
4976              <access>read-write</access>
4977              <enumeratedValues>
4978                <enumeratedValue>
4979                  <name>0</name>
4980                  <description>Accesses from an untrusted master are allowed.</description>
4981                  <value>#0</value>
4982                </enumeratedValue>
4983                <enumeratedValue>
4984                  <name>1</name>
4985                  <description>Accesses from an untrusted master are not allowed.</description>
4986                  <value>#1</value>
4987                </enumeratedValue>
4988              </enumeratedValues>
4989            </field>
4990            <field>
4991              <name>WP7</name>
4992              <description>Write Protect</description>
4993              <bitOffset>1</bitOffset>
4994              <bitWidth>1</bitWidth>
4995              <access>read-write</access>
4996              <enumeratedValues>
4997                <enumeratedValue>
4998                  <name>0</name>
4999                  <description>This peripheral allows write accesses.</description>
5000                  <value>#0</value>
5001                </enumeratedValue>
5002                <enumeratedValue>
5003                  <name>1</name>
5004                  <description>This peripheral is write protected.</description>
5005                  <value>#1</value>
5006                </enumeratedValue>
5007              </enumeratedValues>
5008            </field>
5009            <field>
5010              <name>SP7</name>
5011              <description>Supervisor Protect</description>
5012              <bitOffset>2</bitOffset>
5013              <bitWidth>1</bitWidth>
5014              <access>read-write</access>
5015              <enumeratedValues>
5016                <enumeratedValue>
5017                  <name>0</name>
5018                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5019                  <value>#0</value>
5020                </enumeratedValue>
5021                <enumeratedValue>
5022                  <name>1</name>
5023                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5024                  <value>#1</value>
5025                </enumeratedValue>
5026              </enumeratedValues>
5027            </field>
5028            <field>
5029              <name>TP6</name>
5030              <description>Trusted Protect</description>
5031              <bitOffset>4</bitOffset>
5032              <bitWidth>1</bitWidth>
5033              <access>read-write</access>
5034              <enumeratedValues>
5035                <enumeratedValue>
5036                  <name>0</name>
5037                  <description>Accesses from an untrusted master are allowed.</description>
5038                  <value>#0</value>
5039                </enumeratedValue>
5040                <enumeratedValue>
5041                  <name>1</name>
5042                  <description>Accesses from an untrusted master are not allowed.</description>
5043                  <value>#1</value>
5044                </enumeratedValue>
5045              </enumeratedValues>
5046            </field>
5047            <field>
5048              <name>WP6</name>
5049              <description>Write Protect</description>
5050              <bitOffset>5</bitOffset>
5051              <bitWidth>1</bitWidth>
5052              <access>read-write</access>
5053              <enumeratedValues>
5054                <enumeratedValue>
5055                  <name>0</name>
5056                  <description>This peripheral allows write accesses.</description>
5057                  <value>#0</value>
5058                </enumeratedValue>
5059                <enumeratedValue>
5060                  <name>1</name>
5061                  <description>This peripheral is write protected.</description>
5062                  <value>#1</value>
5063                </enumeratedValue>
5064              </enumeratedValues>
5065            </field>
5066            <field>
5067              <name>SP6</name>
5068              <description>Supervisor Protect</description>
5069              <bitOffset>6</bitOffset>
5070              <bitWidth>1</bitWidth>
5071              <access>read-write</access>
5072              <enumeratedValues>
5073                <enumeratedValue>
5074                  <name>0</name>
5075                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5076                  <value>#0</value>
5077                </enumeratedValue>
5078                <enumeratedValue>
5079                  <name>1</name>
5080                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5081                  <value>#1</value>
5082                </enumeratedValue>
5083              </enumeratedValues>
5084            </field>
5085            <field>
5086              <name>TP5</name>
5087              <description>Trusted Protect</description>
5088              <bitOffset>8</bitOffset>
5089              <bitWidth>1</bitWidth>
5090              <access>read-write</access>
5091              <enumeratedValues>
5092                <enumeratedValue>
5093                  <name>0</name>
5094                  <description>Accesses from an untrusted master are allowed.</description>
5095                  <value>#0</value>
5096                </enumeratedValue>
5097                <enumeratedValue>
5098                  <name>1</name>
5099                  <description>Accesses from an untrusted master are not allowed.</description>
5100                  <value>#1</value>
5101                </enumeratedValue>
5102              </enumeratedValues>
5103            </field>
5104            <field>
5105              <name>WP5</name>
5106              <description>Write Protect</description>
5107              <bitOffset>9</bitOffset>
5108              <bitWidth>1</bitWidth>
5109              <access>read-write</access>
5110              <enumeratedValues>
5111                <enumeratedValue>
5112                  <name>0</name>
5113                  <description>This peripheral allows write accesses.</description>
5114                  <value>#0</value>
5115                </enumeratedValue>
5116                <enumeratedValue>
5117                  <name>1</name>
5118                  <description>This peripheral is write protected.</description>
5119                  <value>#1</value>
5120                </enumeratedValue>
5121              </enumeratedValues>
5122            </field>
5123            <field>
5124              <name>SP5</name>
5125              <description>Supervisor Protect</description>
5126              <bitOffset>10</bitOffset>
5127              <bitWidth>1</bitWidth>
5128              <access>read-write</access>
5129              <enumeratedValues>
5130                <enumeratedValue>
5131                  <name>0</name>
5132                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5133                  <value>#0</value>
5134                </enumeratedValue>
5135                <enumeratedValue>
5136                  <name>1</name>
5137                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5138                  <value>#1</value>
5139                </enumeratedValue>
5140              </enumeratedValues>
5141            </field>
5142            <field>
5143              <name>TP4</name>
5144              <description>Trusted Protect</description>
5145              <bitOffset>12</bitOffset>
5146              <bitWidth>1</bitWidth>
5147              <access>read-write</access>
5148              <enumeratedValues>
5149                <enumeratedValue>
5150                  <name>0</name>
5151                  <description>Accesses from an untrusted master are allowed.</description>
5152                  <value>#0</value>
5153                </enumeratedValue>
5154                <enumeratedValue>
5155                  <name>1</name>
5156                  <description>Accesses from an untrusted master are not allowed.</description>
5157                  <value>#1</value>
5158                </enumeratedValue>
5159              </enumeratedValues>
5160            </field>
5161            <field>
5162              <name>WP4</name>
5163              <description>Write Protect</description>
5164              <bitOffset>13</bitOffset>
5165              <bitWidth>1</bitWidth>
5166              <access>read-write</access>
5167              <enumeratedValues>
5168                <enumeratedValue>
5169                  <name>0</name>
5170                  <description>This peripheral allows write accesses.</description>
5171                  <value>#0</value>
5172                </enumeratedValue>
5173                <enumeratedValue>
5174                  <name>1</name>
5175                  <description>This peripheral is write protected.</description>
5176                  <value>#1</value>
5177                </enumeratedValue>
5178              </enumeratedValues>
5179            </field>
5180            <field>
5181              <name>SP4</name>
5182              <description>Supervisor Protect</description>
5183              <bitOffset>14</bitOffset>
5184              <bitWidth>1</bitWidth>
5185              <access>read-write</access>
5186              <enumeratedValues>
5187                <enumeratedValue>
5188                  <name>0</name>
5189                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5190                  <value>#0</value>
5191                </enumeratedValue>
5192                <enumeratedValue>
5193                  <name>1</name>
5194                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5195                  <value>#1</value>
5196                </enumeratedValue>
5197              </enumeratedValues>
5198            </field>
5199            <field>
5200              <name>TP3</name>
5201              <description>Trusted Protect</description>
5202              <bitOffset>16</bitOffset>
5203              <bitWidth>1</bitWidth>
5204              <access>read-write</access>
5205              <enumeratedValues>
5206                <enumeratedValue>
5207                  <name>0</name>
5208                  <description>Accesses from an untrusted master are allowed.</description>
5209                  <value>#0</value>
5210                </enumeratedValue>
5211                <enumeratedValue>
5212                  <name>1</name>
5213                  <description>Accesses from an untrusted master are not allowed.</description>
5214                  <value>#1</value>
5215                </enumeratedValue>
5216              </enumeratedValues>
5217            </field>
5218            <field>
5219              <name>WP3</name>
5220              <description>Write Protect</description>
5221              <bitOffset>17</bitOffset>
5222              <bitWidth>1</bitWidth>
5223              <access>read-write</access>
5224              <enumeratedValues>
5225                <enumeratedValue>
5226                  <name>0</name>
5227                  <description>This peripheral allows write accesses.</description>
5228                  <value>#0</value>
5229                </enumeratedValue>
5230                <enumeratedValue>
5231                  <name>1</name>
5232                  <description>This peripheral is write protected.</description>
5233                  <value>#1</value>
5234                </enumeratedValue>
5235              </enumeratedValues>
5236            </field>
5237            <field>
5238              <name>SP3</name>
5239              <description>Supervisor Protect</description>
5240              <bitOffset>18</bitOffset>
5241              <bitWidth>1</bitWidth>
5242              <access>read-write</access>
5243              <enumeratedValues>
5244                <enumeratedValue>
5245                  <name>0</name>
5246                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5247                  <value>#0</value>
5248                </enumeratedValue>
5249                <enumeratedValue>
5250                  <name>1</name>
5251                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5252                  <value>#1</value>
5253                </enumeratedValue>
5254              </enumeratedValues>
5255            </field>
5256            <field>
5257              <name>TP2</name>
5258              <description>Trusted Protect</description>
5259              <bitOffset>20</bitOffset>
5260              <bitWidth>1</bitWidth>
5261              <access>read-write</access>
5262              <enumeratedValues>
5263                <enumeratedValue>
5264                  <name>0</name>
5265                  <description>Accesses from an untrusted master are allowed.</description>
5266                  <value>#0</value>
5267                </enumeratedValue>
5268                <enumeratedValue>
5269                  <name>1</name>
5270                  <description>Accesses from an untrusted master are not allowed.</description>
5271                  <value>#1</value>
5272                </enumeratedValue>
5273              </enumeratedValues>
5274            </field>
5275            <field>
5276              <name>WP2</name>
5277              <description>Write Protect</description>
5278              <bitOffset>21</bitOffset>
5279              <bitWidth>1</bitWidth>
5280              <access>read-write</access>
5281              <enumeratedValues>
5282                <enumeratedValue>
5283                  <name>0</name>
5284                  <description>This peripheral allows write accesses.</description>
5285                  <value>#0</value>
5286                </enumeratedValue>
5287                <enumeratedValue>
5288                  <name>1</name>
5289                  <description>This peripheral is write protected.</description>
5290                  <value>#1</value>
5291                </enumeratedValue>
5292              </enumeratedValues>
5293            </field>
5294            <field>
5295              <name>SP2</name>
5296              <description>Supervisor Protect</description>
5297              <bitOffset>22</bitOffset>
5298              <bitWidth>1</bitWidth>
5299              <access>read-write</access>
5300              <enumeratedValues>
5301                <enumeratedValue>
5302                  <name>0</name>
5303                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5304                  <value>#0</value>
5305                </enumeratedValue>
5306                <enumeratedValue>
5307                  <name>1</name>
5308                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5309                  <value>#1</value>
5310                </enumeratedValue>
5311              </enumeratedValues>
5312            </field>
5313            <field>
5314              <name>TP1</name>
5315              <description>Trusted Protect</description>
5316              <bitOffset>24</bitOffset>
5317              <bitWidth>1</bitWidth>
5318              <access>read-write</access>
5319              <enumeratedValues>
5320                <enumeratedValue>
5321                  <name>0</name>
5322                  <description>Accesses from an untrusted master are allowed.</description>
5323                  <value>#0</value>
5324                </enumeratedValue>
5325                <enumeratedValue>
5326                  <name>1</name>
5327                  <description>Accesses from an untrusted master are not allowed.</description>
5328                  <value>#1</value>
5329                </enumeratedValue>
5330              </enumeratedValues>
5331            </field>
5332            <field>
5333              <name>WP1</name>
5334              <description>Write Protect</description>
5335              <bitOffset>25</bitOffset>
5336              <bitWidth>1</bitWidth>
5337              <access>read-write</access>
5338              <enumeratedValues>
5339                <enumeratedValue>
5340                  <name>0</name>
5341                  <description>This peripheral allows write accesses.</description>
5342                  <value>#0</value>
5343                </enumeratedValue>
5344                <enumeratedValue>
5345                  <name>1</name>
5346                  <description>This peripheral is write protected.</description>
5347                  <value>#1</value>
5348                </enumeratedValue>
5349              </enumeratedValues>
5350            </field>
5351            <field>
5352              <name>SP1</name>
5353              <description>Supervisor Protect</description>
5354              <bitOffset>26</bitOffset>
5355              <bitWidth>1</bitWidth>
5356              <access>read-write</access>
5357              <enumeratedValues>
5358                <enumeratedValue>
5359                  <name>0</name>
5360                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5361                  <value>#0</value>
5362                </enumeratedValue>
5363                <enumeratedValue>
5364                  <name>1</name>
5365                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5366                  <value>#1</value>
5367                </enumeratedValue>
5368              </enumeratedValues>
5369            </field>
5370            <field>
5371              <name>TP0</name>
5372              <description>Trusted Protect</description>
5373              <bitOffset>28</bitOffset>
5374              <bitWidth>1</bitWidth>
5375              <access>read-write</access>
5376              <enumeratedValues>
5377                <enumeratedValue>
5378                  <name>0</name>
5379                  <description>Accesses from an untrusted master are allowed.</description>
5380                  <value>#0</value>
5381                </enumeratedValue>
5382                <enumeratedValue>
5383                  <name>1</name>
5384                  <description>Accesses from an untrusted master are not allowed.</description>
5385                  <value>#1</value>
5386                </enumeratedValue>
5387              </enumeratedValues>
5388            </field>
5389            <field>
5390              <name>WP0</name>
5391              <description>Write Protect</description>
5392              <bitOffset>29</bitOffset>
5393              <bitWidth>1</bitWidth>
5394              <access>read-write</access>
5395              <enumeratedValues>
5396                <enumeratedValue>
5397                  <name>0</name>
5398                  <description>This peripheral allows write accesses.</description>
5399                  <value>#0</value>
5400                </enumeratedValue>
5401                <enumeratedValue>
5402                  <name>1</name>
5403                  <description>This peripheral is write protected.</description>
5404                  <value>#1</value>
5405                </enumeratedValue>
5406              </enumeratedValues>
5407            </field>
5408            <field>
5409              <name>SP0</name>
5410              <description>Supervisor Protect</description>
5411              <bitOffset>30</bitOffset>
5412              <bitWidth>1</bitWidth>
5413              <access>read-write</access>
5414              <enumeratedValues>
5415                <enumeratedValue>
5416                  <name>0</name>
5417                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5418                  <value>#0</value>
5419                </enumeratedValue>
5420                <enumeratedValue>
5421                  <name>1</name>
5422                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5423                  <value>#1</value>
5424                </enumeratedValue>
5425              </enumeratedValues>
5426            </field>
5427          </fields>
5428        </register>
5429        <register>
5430          <name>PACRK</name>
5431          <description>Peripheral Access Control Register</description>
5432          <addressOffset>0x58</addressOffset>
5433          <size>32</size>
5434          <access>read-write</access>
5435          <resetValue>0x400000</resetValue>
5436          <resetMask>0xFFFFFFFF</resetMask>
5437          <fields>
5438            <field>
5439              <name>TP7</name>
5440              <description>Trusted Protect</description>
5441              <bitOffset>0</bitOffset>
5442              <bitWidth>1</bitWidth>
5443              <access>read-write</access>
5444              <enumeratedValues>
5445                <enumeratedValue>
5446                  <name>0</name>
5447                  <description>Accesses from an untrusted master are allowed.</description>
5448                  <value>#0</value>
5449                </enumeratedValue>
5450                <enumeratedValue>
5451                  <name>1</name>
5452                  <description>Accesses from an untrusted master are not allowed.</description>
5453                  <value>#1</value>
5454                </enumeratedValue>
5455              </enumeratedValues>
5456            </field>
5457            <field>
5458              <name>WP7</name>
5459              <description>Write Protect</description>
5460              <bitOffset>1</bitOffset>
5461              <bitWidth>1</bitWidth>
5462              <access>read-write</access>
5463              <enumeratedValues>
5464                <enumeratedValue>
5465                  <name>0</name>
5466                  <description>This peripheral allows write accesses.</description>
5467                  <value>#0</value>
5468                </enumeratedValue>
5469                <enumeratedValue>
5470                  <name>1</name>
5471                  <description>This peripheral is write protected.</description>
5472                  <value>#1</value>
5473                </enumeratedValue>
5474              </enumeratedValues>
5475            </field>
5476            <field>
5477              <name>SP7</name>
5478              <description>Supervisor Protect</description>
5479              <bitOffset>2</bitOffset>
5480              <bitWidth>1</bitWidth>
5481              <access>read-write</access>
5482              <enumeratedValues>
5483                <enumeratedValue>
5484                  <name>0</name>
5485                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5486                  <value>#0</value>
5487                </enumeratedValue>
5488                <enumeratedValue>
5489                  <name>1</name>
5490                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5491                  <value>#1</value>
5492                </enumeratedValue>
5493              </enumeratedValues>
5494            </field>
5495            <field>
5496              <name>TP6</name>
5497              <description>Trusted Protect</description>
5498              <bitOffset>4</bitOffset>
5499              <bitWidth>1</bitWidth>
5500              <access>read-write</access>
5501              <enumeratedValues>
5502                <enumeratedValue>
5503                  <name>0</name>
5504                  <description>Accesses from an untrusted master are allowed.</description>
5505                  <value>#0</value>
5506                </enumeratedValue>
5507                <enumeratedValue>
5508                  <name>1</name>
5509                  <description>Accesses from an untrusted master are not allowed.</description>
5510                  <value>#1</value>
5511                </enumeratedValue>
5512              </enumeratedValues>
5513            </field>
5514            <field>
5515              <name>WP6</name>
5516              <description>Write Protect</description>
5517              <bitOffset>5</bitOffset>
5518              <bitWidth>1</bitWidth>
5519              <access>read-write</access>
5520              <enumeratedValues>
5521                <enumeratedValue>
5522                  <name>0</name>
5523                  <description>This peripheral allows write accesses.</description>
5524                  <value>#0</value>
5525                </enumeratedValue>
5526                <enumeratedValue>
5527                  <name>1</name>
5528                  <description>This peripheral is write protected.</description>
5529                  <value>#1</value>
5530                </enumeratedValue>
5531              </enumeratedValues>
5532            </field>
5533            <field>
5534              <name>SP6</name>
5535              <description>Supervisor Protect</description>
5536              <bitOffset>6</bitOffset>
5537              <bitWidth>1</bitWidth>
5538              <access>read-write</access>
5539              <enumeratedValues>
5540                <enumeratedValue>
5541                  <name>0</name>
5542                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5543                  <value>#0</value>
5544                </enumeratedValue>
5545                <enumeratedValue>
5546                  <name>1</name>
5547                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5548                  <value>#1</value>
5549                </enumeratedValue>
5550              </enumeratedValues>
5551            </field>
5552            <field>
5553              <name>TP5</name>
5554              <description>Trusted Protect</description>
5555              <bitOffset>8</bitOffset>
5556              <bitWidth>1</bitWidth>
5557              <access>read-write</access>
5558              <enumeratedValues>
5559                <enumeratedValue>
5560                  <name>0</name>
5561                  <description>Accesses from an untrusted master are allowed.</description>
5562                  <value>#0</value>
5563                </enumeratedValue>
5564                <enumeratedValue>
5565                  <name>1</name>
5566                  <description>Accesses from an untrusted master are not allowed.</description>
5567                  <value>#1</value>
5568                </enumeratedValue>
5569              </enumeratedValues>
5570            </field>
5571            <field>
5572              <name>WP5</name>
5573              <description>Write Protect</description>
5574              <bitOffset>9</bitOffset>
5575              <bitWidth>1</bitWidth>
5576              <access>read-write</access>
5577              <enumeratedValues>
5578                <enumeratedValue>
5579                  <name>0</name>
5580                  <description>This peripheral allows write accesses.</description>
5581                  <value>#0</value>
5582                </enumeratedValue>
5583                <enumeratedValue>
5584                  <name>1</name>
5585                  <description>This peripheral is write protected.</description>
5586                  <value>#1</value>
5587                </enumeratedValue>
5588              </enumeratedValues>
5589            </field>
5590            <field>
5591              <name>SP5</name>
5592              <description>Supervisor Protect</description>
5593              <bitOffset>10</bitOffset>
5594              <bitWidth>1</bitWidth>
5595              <access>read-write</access>
5596              <enumeratedValues>
5597                <enumeratedValue>
5598                  <name>0</name>
5599                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5600                  <value>#0</value>
5601                </enumeratedValue>
5602                <enumeratedValue>
5603                  <name>1</name>
5604                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5605                  <value>#1</value>
5606                </enumeratedValue>
5607              </enumeratedValues>
5608            </field>
5609            <field>
5610              <name>TP4</name>
5611              <description>Trusted Protect</description>
5612              <bitOffset>12</bitOffset>
5613              <bitWidth>1</bitWidth>
5614              <access>read-write</access>
5615              <enumeratedValues>
5616                <enumeratedValue>
5617                  <name>0</name>
5618                  <description>Accesses from an untrusted master are allowed.</description>
5619                  <value>#0</value>
5620                </enumeratedValue>
5621                <enumeratedValue>
5622                  <name>1</name>
5623                  <description>Accesses from an untrusted master are not allowed.</description>
5624                  <value>#1</value>
5625                </enumeratedValue>
5626              </enumeratedValues>
5627            </field>
5628            <field>
5629              <name>WP4</name>
5630              <description>Write Protect</description>
5631              <bitOffset>13</bitOffset>
5632              <bitWidth>1</bitWidth>
5633              <access>read-write</access>
5634              <enumeratedValues>
5635                <enumeratedValue>
5636                  <name>0</name>
5637                  <description>This peripheral allows write accesses.</description>
5638                  <value>#0</value>
5639                </enumeratedValue>
5640                <enumeratedValue>
5641                  <name>1</name>
5642                  <description>This peripheral is write protected.</description>
5643                  <value>#1</value>
5644                </enumeratedValue>
5645              </enumeratedValues>
5646            </field>
5647            <field>
5648              <name>SP4</name>
5649              <description>Supervisor Protect</description>
5650              <bitOffset>14</bitOffset>
5651              <bitWidth>1</bitWidth>
5652              <access>read-write</access>
5653              <enumeratedValues>
5654                <enumeratedValue>
5655                  <name>0</name>
5656                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5657                  <value>#0</value>
5658                </enumeratedValue>
5659                <enumeratedValue>
5660                  <name>1</name>
5661                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5662                  <value>#1</value>
5663                </enumeratedValue>
5664              </enumeratedValues>
5665            </field>
5666            <field>
5667              <name>TP3</name>
5668              <description>Trusted Protect</description>
5669              <bitOffset>16</bitOffset>
5670              <bitWidth>1</bitWidth>
5671              <access>read-write</access>
5672              <enumeratedValues>
5673                <enumeratedValue>
5674                  <name>0</name>
5675                  <description>Accesses from an untrusted master are allowed.</description>
5676                  <value>#0</value>
5677                </enumeratedValue>
5678                <enumeratedValue>
5679                  <name>1</name>
5680                  <description>Accesses from an untrusted master are not allowed.</description>
5681                  <value>#1</value>
5682                </enumeratedValue>
5683              </enumeratedValues>
5684            </field>
5685            <field>
5686              <name>WP3</name>
5687              <description>Write Protect</description>
5688              <bitOffset>17</bitOffset>
5689              <bitWidth>1</bitWidth>
5690              <access>read-write</access>
5691              <enumeratedValues>
5692                <enumeratedValue>
5693                  <name>0</name>
5694                  <description>This peripheral allows write accesses.</description>
5695                  <value>#0</value>
5696                </enumeratedValue>
5697                <enumeratedValue>
5698                  <name>1</name>
5699                  <description>This peripheral is write protected.</description>
5700                  <value>#1</value>
5701                </enumeratedValue>
5702              </enumeratedValues>
5703            </field>
5704            <field>
5705              <name>SP3</name>
5706              <description>Supervisor Protect</description>
5707              <bitOffset>18</bitOffset>
5708              <bitWidth>1</bitWidth>
5709              <access>read-write</access>
5710              <enumeratedValues>
5711                <enumeratedValue>
5712                  <name>0</name>
5713                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5714                  <value>#0</value>
5715                </enumeratedValue>
5716                <enumeratedValue>
5717                  <name>1</name>
5718                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5719                  <value>#1</value>
5720                </enumeratedValue>
5721              </enumeratedValues>
5722            </field>
5723            <field>
5724              <name>TP2</name>
5725              <description>Trusted Protect</description>
5726              <bitOffset>20</bitOffset>
5727              <bitWidth>1</bitWidth>
5728              <access>read-write</access>
5729              <enumeratedValues>
5730                <enumeratedValue>
5731                  <name>0</name>
5732                  <description>Accesses from an untrusted master are allowed.</description>
5733                  <value>#0</value>
5734                </enumeratedValue>
5735                <enumeratedValue>
5736                  <name>1</name>
5737                  <description>Accesses from an untrusted master are not allowed.</description>
5738                  <value>#1</value>
5739                </enumeratedValue>
5740              </enumeratedValues>
5741            </field>
5742            <field>
5743              <name>WP2</name>
5744              <description>Write Protect</description>
5745              <bitOffset>21</bitOffset>
5746              <bitWidth>1</bitWidth>
5747              <access>read-write</access>
5748              <enumeratedValues>
5749                <enumeratedValue>
5750                  <name>0</name>
5751                  <description>This peripheral allows write accesses.</description>
5752                  <value>#0</value>
5753                </enumeratedValue>
5754                <enumeratedValue>
5755                  <name>1</name>
5756                  <description>This peripheral is write protected.</description>
5757                  <value>#1</value>
5758                </enumeratedValue>
5759              </enumeratedValues>
5760            </field>
5761            <field>
5762              <name>SP2</name>
5763              <description>Supervisor Protect</description>
5764              <bitOffset>22</bitOffset>
5765              <bitWidth>1</bitWidth>
5766              <access>read-write</access>
5767              <enumeratedValues>
5768                <enumeratedValue>
5769                  <name>0</name>
5770                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5771                  <value>#0</value>
5772                </enumeratedValue>
5773                <enumeratedValue>
5774                  <name>1</name>
5775                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5776                  <value>#1</value>
5777                </enumeratedValue>
5778              </enumeratedValues>
5779            </field>
5780            <field>
5781              <name>TP1</name>
5782              <description>Trusted Protect</description>
5783              <bitOffset>24</bitOffset>
5784              <bitWidth>1</bitWidth>
5785              <access>read-write</access>
5786              <enumeratedValues>
5787                <enumeratedValue>
5788                  <name>0</name>
5789                  <description>Accesses from an untrusted master are allowed.</description>
5790                  <value>#0</value>
5791                </enumeratedValue>
5792                <enumeratedValue>
5793                  <name>1</name>
5794                  <description>Accesses from an untrusted master are not allowed.</description>
5795                  <value>#1</value>
5796                </enumeratedValue>
5797              </enumeratedValues>
5798            </field>
5799            <field>
5800              <name>WP1</name>
5801              <description>Write Protect</description>
5802              <bitOffset>25</bitOffset>
5803              <bitWidth>1</bitWidth>
5804              <access>read-write</access>
5805              <enumeratedValues>
5806                <enumeratedValue>
5807                  <name>0</name>
5808                  <description>This peripheral allows write accesses.</description>
5809                  <value>#0</value>
5810                </enumeratedValue>
5811                <enumeratedValue>
5812                  <name>1</name>
5813                  <description>This peripheral is write protected.</description>
5814                  <value>#1</value>
5815                </enumeratedValue>
5816              </enumeratedValues>
5817            </field>
5818            <field>
5819              <name>SP1</name>
5820              <description>Supervisor Protect</description>
5821              <bitOffset>26</bitOffset>
5822              <bitWidth>1</bitWidth>
5823              <access>read-write</access>
5824              <enumeratedValues>
5825                <enumeratedValue>
5826                  <name>0</name>
5827                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5828                  <value>#0</value>
5829                </enumeratedValue>
5830                <enumeratedValue>
5831                  <name>1</name>
5832                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5833                  <value>#1</value>
5834                </enumeratedValue>
5835              </enumeratedValues>
5836            </field>
5837            <field>
5838              <name>TP0</name>
5839              <description>Trusted Protect</description>
5840              <bitOffset>28</bitOffset>
5841              <bitWidth>1</bitWidth>
5842              <access>read-write</access>
5843              <enumeratedValues>
5844                <enumeratedValue>
5845                  <name>0</name>
5846                  <description>Accesses from an untrusted master are allowed.</description>
5847                  <value>#0</value>
5848                </enumeratedValue>
5849                <enumeratedValue>
5850                  <name>1</name>
5851                  <description>Accesses from an untrusted master are not allowed.</description>
5852                  <value>#1</value>
5853                </enumeratedValue>
5854              </enumeratedValues>
5855            </field>
5856            <field>
5857              <name>WP0</name>
5858              <description>Write Protect</description>
5859              <bitOffset>29</bitOffset>
5860              <bitWidth>1</bitWidth>
5861              <access>read-write</access>
5862              <enumeratedValues>
5863                <enumeratedValue>
5864                  <name>0</name>
5865                  <description>This peripheral allows write accesses.</description>
5866                  <value>#0</value>
5867                </enumeratedValue>
5868                <enumeratedValue>
5869                  <name>1</name>
5870                  <description>This peripheral is write protected.</description>
5871                  <value>#1</value>
5872                </enumeratedValue>
5873              </enumeratedValues>
5874            </field>
5875            <field>
5876              <name>SP0</name>
5877              <description>Supervisor Protect</description>
5878              <bitOffset>30</bitOffset>
5879              <bitWidth>1</bitWidth>
5880              <access>read-write</access>
5881              <enumeratedValues>
5882                <enumeratedValue>
5883                  <name>0</name>
5884                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5885                  <value>#0</value>
5886                </enumeratedValue>
5887                <enumeratedValue>
5888                  <name>1</name>
5889                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5890                  <value>#1</value>
5891                </enumeratedValue>
5892              </enumeratedValues>
5893            </field>
5894          </fields>
5895        </register>
5896        <register>
5897          <name>PACRL</name>
5898          <description>Peripheral Access Control Register</description>
5899          <addressOffset>0x5C</addressOffset>
5900          <size>32</size>
5901          <access>read-write</access>
5902          <resetValue>0</resetValue>
5903          <resetMask>0xFFFFFFFF</resetMask>
5904          <fields>
5905            <field>
5906              <name>TP7</name>
5907              <description>Trusted Protect</description>
5908              <bitOffset>0</bitOffset>
5909              <bitWidth>1</bitWidth>
5910              <access>read-write</access>
5911              <enumeratedValues>
5912                <enumeratedValue>
5913                  <name>0</name>
5914                  <description>Accesses from an untrusted master are allowed.</description>
5915                  <value>#0</value>
5916                </enumeratedValue>
5917                <enumeratedValue>
5918                  <name>1</name>
5919                  <description>Accesses from an untrusted master are not allowed.</description>
5920                  <value>#1</value>
5921                </enumeratedValue>
5922              </enumeratedValues>
5923            </field>
5924            <field>
5925              <name>WP7</name>
5926              <description>Write Protect</description>
5927              <bitOffset>1</bitOffset>
5928              <bitWidth>1</bitWidth>
5929              <access>read-write</access>
5930              <enumeratedValues>
5931                <enumeratedValue>
5932                  <name>0</name>
5933                  <description>This peripheral allows write accesses.</description>
5934                  <value>#0</value>
5935                </enumeratedValue>
5936                <enumeratedValue>
5937                  <name>1</name>
5938                  <description>This peripheral is write protected.</description>
5939                  <value>#1</value>
5940                </enumeratedValue>
5941              </enumeratedValues>
5942            </field>
5943            <field>
5944              <name>SP7</name>
5945              <description>Supervisor Protect</description>
5946              <bitOffset>2</bitOffset>
5947              <bitWidth>1</bitWidth>
5948              <access>read-write</access>
5949              <enumeratedValues>
5950                <enumeratedValue>
5951                  <name>0</name>
5952                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
5953                  <value>#0</value>
5954                </enumeratedValue>
5955                <enumeratedValue>
5956                  <name>1</name>
5957                  <description>This peripheral requires supervisor privilege level for accesses.</description>
5958                  <value>#1</value>
5959                </enumeratedValue>
5960              </enumeratedValues>
5961            </field>
5962            <field>
5963              <name>TP6</name>
5964              <description>Trusted Protect</description>
5965              <bitOffset>4</bitOffset>
5966              <bitWidth>1</bitWidth>
5967              <access>read-write</access>
5968              <enumeratedValues>
5969                <enumeratedValue>
5970                  <name>0</name>
5971                  <description>Accesses from an untrusted master are allowed.</description>
5972                  <value>#0</value>
5973                </enumeratedValue>
5974                <enumeratedValue>
5975                  <name>1</name>
5976                  <description>Accesses from an untrusted master are not allowed.</description>
5977                  <value>#1</value>
5978                </enumeratedValue>
5979              </enumeratedValues>
5980            </field>
5981            <field>
5982              <name>WP6</name>
5983              <description>Write Protect</description>
5984              <bitOffset>5</bitOffset>
5985              <bitWidth>1</bitWidth>
5986              <access>read-write</access>
5987              <enumeratedValues>
5988                <enumeratedValue>
5989                  <name>0</name>
5990                  <description>This peripheral allows write accesses.</description>
5991                  <value>#0</value>
5992                </enumeratedValue>
5993                <enumeratedValue>
5994                  <name>1</name>
5995                  <description>This peripheral is write protected.</description>
5996                  <value>#1</value>
5997                </enumeratedValue>
5998              </enumeratedValues>
5999            </field>
6000            <field>
6001              <name>SP6</name>
6002              <description>Supervisor Protect</description>
6003              <bitOffset>6</bitOffset>
6004              <bitWidth>1</bitWidth>
6005              <access>read-write</access>
6006              <enumeratedValues>
6007                <enumeratedValue>
6008                  <name>0</name>
6009                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6010                  <value>#0</value>
6011                </enumeratedValue>
6012                <enumeratedValue>
6013                  <name>1</name>
6014                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6015                  <value>#1</value>
6016                </enumeratedValue>
6017              </enumeratedValues>
6018            </field>
6019            <field>
6020              <name>TP5</name>
6021              <description>Trusted Protect</description>
6022              <bitOffset>8</bitOffset>
6023              <bitWidth>1</bitWidth>
6024              <access>read-write</access>
6025              <enumeratedValues>
6026                <enumeratedValue>
6027                  <name>0</name>
6028                  <description>Accesses from an untrusted master are allowed.</description>
6029                  <value>#0</value>
6030                </enumeratedValue>
6031                <enumeratedValue>
6032                  <name>1</name>
6033                  <description>Accesses from an untrusted master are not allowed.</description>
6034                  <value>#1</value>
6035                </enumeratedValue>
6036              </enumeratedValues>
6037            </field>
6038            <field>
6039              <name>WP5</name>
6040              <description>Write Protect</description>
6041              <bitOffset>9</bitOffset>
6042              <bitWidth>1</bitWidth>
6043              <access>read-write</access>
6044              <enumeratedValues>
6045                <enumeratedValue>
6046                  <name>0</name>
6047                  <description>This peripheral allows write accesses.</description>
6048                  <value>#0</value>
6049                </enumeratedValue>
6050                <enumeratedValue>
6051                  <name>1</name>
6052                  <description>This peripheral is write protected.</description>
6053                  <value>#1</value>
6054                </enumeratedValue>
6055              </enumeratedValues>
6056            </field>
6057            <field>
6058              <name>SP5</name>
6059              <description>Supervisor Protect</description>
6060              <bitOffset>10</bitOffset>
6061              <bitWidth>1</bitWidth>
6062              <access>read-write</access>
6063              <enumeratedValues>
6064                <enumeratedValue>
6065                  <name>0</name>
6066                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6067                  <value>#0</value>
6068                </enumeratedValue>
6069                <enumeratedValue>
6070                  <name>1</name>
6071                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6072                  <value>#1</value>
6073                </enumeratedValue>
6074              </enumeratedValues>
6075            </field>
6076            <field>
6077              <name>TP4</name>
6078              <description>Trusted Protect</description>
6079              <bitOffset>12</bitOffset>
6080              <bitWidth>1</bitWidth>
6081              <access>read-write</access>
6082              <enumeratedValues>
6083                <enumeratedValue>
6084                  <name>0</name>
6085                  <description>Accesses from an untrusted master are allowed.</description>
6086                  <value>#0</value>
6087                </enumeratedValue>
6088                <enumeratedValue>
6089                  <name>1</name>
6090                  <description>Accesses from an untrusted master are not allowed.</description>
6091                  <value>#1</value>
6092                </enumeratedValue>
6093              </enumeratedValues>
6094            </field>
6095            <field>
6096              <name>WP4</name>
6097              <description>Write Protect</description>
6098              <bitOffset>13</bitOffset>
6099              <bitWidth>1</bitWidth>
6100              <access>read-write</access>
6101              <enumeratedValues>
6102                <enumeratedValue>
6103                  <name>0</name>
6104                  <description>This peripheral allows write accesses.</description>
6105                  <value>#0</value>
6106                </enumeratedValue>
6107                <enumeratedValue>
6108                  <name>1</name>
6109                  <description>This peripheral is write protected.</description>
6110                  <value>#1</value>
6111                </enumeratedValue>
6112              </enumeratedValues>
6113            </field>
6114            <field>
6115              <name>SP4</name>
6116              <description>Supervisor Protect</description>
6117              <bitOffset>14</bitOffset>
6118              <bitWidth>1</bitWidth>
6119              <access>read-write</access>
6120              <enumeratedValues>
6121                <enumeratedValue>
6122                  <name>0</name>
6123                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6124                  <value>#0</value>
6125                </enumeratedValue>
6126                <enumeratedValue>
6127                  <name>1</name>
6128                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6129                  <value>#1</value>
6130                </enumeratedValue>
6131              </enumeratedValues>
6132            </field>
6133            <field>
6134              <name>TP3</name>
6135              <description>Trusted Protect</description>
6136              <bitOffset>16</bitOffset>
6137              <bitWidth>1</bitWidth>
6138              <access>read-write</access>
6139              <enumeratedValues>
6140                <enumeratedValue>
6141                  <name>0</name>
6142                  <description>Accesses from an untrusted master are allowed.</description>
6143                  <value>#0</value>
6144                </enumeratedValue>
6145                <enumeratedValue>
6146                  <name>1</name>
6147                  <description>Accesses from an untrusted master are not allowed.</description>
6148                  <value>#1</value>
6149                </enumeratedValue>
6150              </enumeratedValues>
6151            </field>
6152            <field>
6153              <name>WP3</name>
6154              <description>Write Protect</description>
6155              <bitOffset>17</bitOffset>
6156              <bitWidth>1</bitWidth>
6157              <access>read-write</access>
6158              <enumeratedValues>
6159                <enumeratedValue>
6160                  <name>0</name>
6161                  <description>This peripheral allows write accesses.</description>
6162                  <value>#0</value>
6163                </enumeratedValue>
6164                <enumeratedValue>
6165                  <name>1</name>
6166                  <description>This peripheral is write protected.</description>
6167                  <value>#1</value>
6168                </enumeratedValue>
6169              </enumeratedValues>
6170            </field>
6171            <field>
6172              <name>SP3</name>
6173              <description>Supervisor Protect</description>
6174              <bitOffset>18</bitOffset>
6175              <bitWidth>1</bitWidth>
6176              <access>read-write</access>
6177              <enumeratedValues>
6178                <enumeratedValue>
6179                  <name>0</name>
6180                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6181                  <value>#0</value>
6182                </enumeratedValue>
6183                <enumeratedValue>
6184                  <name>1</name>
6185                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6186                  <value>#1</value>
6187                </enumeratedValue>
6188              </enumeratedValues>
6189            </field>
6190            <field>
6191              <name>TP2</name>
6192              <description>Trusted Protect</description>
6193              <bitOffset>20</bitOffset>
6194              <bitWidth>1</bitWidth>
6195              <access>read-write</access>
6196              <enumeratedValues>
6197                <enumeratedValue>
6198                  <name>0</name>
6199                  <description>Accesses from an untrusted master are allowed.</description>
6200                  <value>#0</value>
6201                </enumeratedValue>
6202                <enumeratedValue>
6203                  <name>1</name>
6204                  <description>Accesses from an untrusted master are not allowed.</description>
6205                  <value>#1</value>
6206                </enumeratedValue>
6207              </enumeratedValues>
6208            </field>
6209            <field>
6210              <name>WP2</name>
6211              <description>Write Protect</description>
6212              <bitOffset>21</bitOffset>
6213              <bitWidth>1</bitWidth>
6214              <access>read-write</access>
6215              <enumeratedValues>
6216                <enumeratedValue>
6217                  <name>0</name>
6218                  <description>This peripheral allows write accesses.</description>
6219                  <value>#0</value>
6220                </enumeratedValue>
6221                <enumeratedValue>
6222                  <name>1</name>
6223                  <description>This peripheral is write protected.</description>
6224                  <value>#1</value>
6225                </enumeratedValue>
6226              </enumeratedValues>
6227            </field>
6228            <field>
6229              <name>SP2</name>
6230              <description>Supervisor Protect</description>
6231              <bitOffset>22</bitOffset>
6232              <bitWidth>1</bitWidth>
6233              <access>read-write</access>
6234              <enumeratedValues>
6235                <enumeratedValue>
6236                  <name>0</name>
6237                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6238                  <value>#0</value>
6239                </enumeratedValue>
6240                <enumeratedValue>
6241                  <name>1</name>
6242                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6243                  <value>#1</value>
6244                </enumeratedValue>
6245              </enumeratedValues>
6246            </field>
6247            <field>
6248              <name>TP1</name>
6249              <description>Trusted Protect</description>
6250              <bitOffset>24</bitOffset>
6251              <bitWidth>1</bitWidth>
6252              <access>read-write</access>
6253              <enumeratedValues>
6254                <enumeratedValue>
6255                  <name>0</name>
6256                  <description>Accesses from an untrusted master are allowed.</description>
6257                  <value>#0</value>
6258                </enumeratedValue>
6259                <enumeratedValue>
6260                  <name>1</name>
6261                  <description>Accesses from an untrusted master are not allowed.</description>
6262                  <value>#1</value>
6263                </enumeratedValue>
6264              </enumeratedValues>
6265            </field>
6266            <field>
6267              <name>WP1</name>
6268              <description>Write Protect</description>
6269              <bitOffset>25</bitOffset>
6270              <bitWidth>1</bitWidth>
6271              <access>read-write</access>
6272              <enumeratedValues>
6273                <enumeratedValue>
6274                  <name>0</name>
6275                  <description>This peripheral allows write accesses.</description>
6276                  <value>#0</value>
6277                </enumeratedValue>
6278                <enumeratedValue>
6279                  <name>1</name>
6280                  <description>This peripheral is write protected.</description>
6281                  <value>#1</value>
6282                </enumeratedValue>
6283              </enumeratedValues>
6284            </field>
6285            <field>
6286              <name>SP1</name>
6287              <description>Supervisor Protect</description>
6288              <bitOffset>26</bitOffset>
6289              <bitWidth>1</bitWidth>
6290              <access>read-write</access>
6291              <enumeratedValues>
6292                <enumeratedValue>
6293                  <name>0</name>
6294                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6295                  <value>#0</value>
6296                </enumeratedValue>
6297                <enumeratedValue>
6298                  <name>1</name>
6299                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6300                  <value>#1</value>
6301                </enumeratedValue>
6302              </enumeratedValues>
6303            </field>
6304            <field>
6305              <name>TP0</name>
6306              <description>Trusted Protect</description>
6307              <bitOffset>28</bitOffset>
6308              <bitWidth>1</bitWidth>
6309              <access>read-write</access>
6310              <enumeratedValues>
6311                <enumeratedValue>
6312                  <name>0</name>
6313                  <description>Accesses from an untrusted master are allowed.</description>
6314                  <value>#0</value>
6315                </enumeratedValue>
6316                <enumeratedValue>
6317                  <name>1</name>
6318                  <description>Accesses from an untrusted master are not allowed.</description>
6319                  <value>#1</value>
6320                </enumeratedValue>
6321              </enumeratedValues>
6322            </field>
6323            <field>
6324              <name>WP0</name>
6325              <description>Write Protect</description>
6326              <bitOffset>29</bitOffset>
6327              <bitWidth>1</bitWidth>
6328              <access>read-write</access>
6329              <enumeratedValues>
6330                <enumeratedValue>
6331                  <name>0</name>
6332                  <description>This peripheral allows write accesses.</description>
6333                  <value>#0</value>
6334                </enumeratedValue>
6335                <enumeratedValue>
6336                  <name>1</name>
6337                  <description>This peripheral is write protected.</description>
6338                  <value>#1</value>
6339                </enumeratedValue>
6340              </enumeratedValues>
6341            </field>
6342            <field>
6343              <name>SP0</name>
6344              <description>Supervisor Protect</description>
6345              <bitOffset>30</bitOffset>
6346              <bitWidth>1</bitWidth>
6347              <access>read-write</access>
6348              <enumeratedValues>
6349                <enumeratedValue>
6350                  <name>0</name>
6351                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6352                  <value>#0</value>
6353                </enumeratedValue>
6354                <enumeratedValue>
6355                  <name>1</name>
6356                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6357                  <value>#1</value>
6358                </enumeratedValue>
6359              </enumeratedValues>
6360            </field>
6361          </fields>
6362        </register>
6363        <register>
6364          <name>PACRM</name>
6365          <description>Peripheral Access Control Register</description>
6366          <addressOffset>0x60</addressOffset>
6367          <size>32</size>
6368          <access>read-write</access>
6369          <resetValue>0x4404444</resetValue>
6370          <resetMask>0xFFFFFFFF</resetMask>
6371          <fields>
6372            <field>
6373              <name>TP7</name>
6374              <description>Trusted Protect</description>
6375              <bitOffset>0</bitOffset>
6376              <bitWidth>1</bitWidth>
6377              <access>read-write</access>
6378              <enumeratedValues>
6379                <enumeratedValue>
6380                  <name>0</name>
6381                  <description>Accesses from an untrusted master are allowed.</description>
6382                  <value>#0</value>
6383                </enumeratedValue>
6384                <enumeratedValue>
6385                  <name>1</name>
6386                  <description>Accesses from an untrusted master are not allowed.</description>
6387                  <value>#1</value>
6388                </enumeratedValue>
6389              </enumeratedValues>
6390            </field>
6391            <field>
6392              <name>WP7</name>
6393              <description>Write Protect</description>
6394              <bitOffset>1</bitOffset>
6395              <bitWidth>1</bitWidth>
6396              <access>read-write</access>
6397              <enumeratedValues>
6398                <enumeratedValue>
6399                  <name>0</name>
6400                  <description>This peripheral allows write accesses.</description>
6401                  <value>#0</value>
6402                </enumeratedValue>
6403                <enumeratedValue>
6404                  <name>1</name>
6405                  <description>This peripheral is write protected.</description>
6406                  <value>#1</value>
6407                </enumeratedValue>
6408              </enumeratedValues>
6409            </field>
6410            <field>
6411              <name>SP7</name>
6412              <description>Supervisor Protect</description>
6413              <bitOffset>2</bitOffset>
6414              <bitWidth>1</bitWidth>
6415              <access>read-write</access>
6416              <enumeratedValues>
6417                <enumeratedValue>
6418                  <name>0</name>
6419                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6420                  <value>#0</value>
6421                </enumeratedValue>
6422                <enumeratedValue>
6423                  <name>1</name>
6424                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6425                  <value>#1</value>
6426                </enumeratedValue>
6427              </enumeratedValues>
6428            </field>
6429            <field>
6430              <name>TP6</name>
6431              <description>Trusted Protect</description>
6432              <bitOffset>4</bitOffset>
6433              <bitWidth>1</bitWidth>
6434              <access>read-write</access>
6435              <enumeratedValues>
6436                <enumeratedValue>
6437                  <name>0</name>
6438                  <description>Accesses from an untrusted master are allowed.</description>
6439                  <value>#0</value>
6440                </enumeratedValue>
6441                <enumeratedValue>
6442                  <name>1</name>
6443                  <description>Accesses from an untrusted master are not allowed.</description>
6444                  <value>#1</value>
6445                </enumeratedValue>
6446              </enumeratedValues>
6447            </field>
6448            <field>
6449              <name>WP6</name>
6450              <description>Write Protect</description>
6451              <bitOffset>5</bitOffset>
6452              <bitWidth>1</bitWidth>
6453              <access>read-write</access>
6454              <enumeratedValues>
6455                <enumeratedValue>
6456                  <name>0</name>
6457                  <description>This peripheral allows write accesses.</description>
6458                  <value>#0</value>
6459                </enumeratedValue>
6460                <enumeratedValue>
6461                  <name>1</name>
6462                  <description>This peripheral is write protected.</description>
6463                  <value>#1</value>
6464                </enumeratedValue>
6465              </enumeratedValues>
6466            </field>
6467            <field>
6468              <name>SP6</name>
6469              <description>Supervisor Protect</description>
6470              <bitOffset>6</bitOffset>
6471              <bitWidth>1</bitWidth>
6472              <access>read-write</access>
6473              <enumeratedValues>
6474                <enumeratedValue>
6475                  <name>0</name>
6476                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6477                  <value>#0</value>
6478                </enumeratedValue>
6479                <enumeratedValue>
6480                  <name>1</name>
6481                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6482                  <value>#1</value>
6483                </enumeratedValue>
6484              </enumeratedValues>
6485            </field>
6486            <field>
6487              <name>TP5</name>
6488              <description>Trusted Protect</description>
6489              <bitOffset>8</bitOffset>
6490              <bitWidth>1</bitWidth>
6491              <access>read-write</access>
6492              <enumeratedValues>
6493                <enumeratedValue>
6494                  <name>0</name>
6495                  <description>Accesses from an untrusted master are allowed.</description>
6496                  <value>#0</value>
6497                </enumeratedValue>
6498                <enumeratedValue>
6499                  <name>1</name>
6500                  <description>Accesses from an untrusted master are not allowed.</description>
6501                  <value>#1</value>
6502                </enumeratedValue>
6503              </enumeratedValues>
6504            </field>
6505            <field>
6506              <name>WP5</name>
6507              <description>Write Protect</description>
6508              <bitOffset>9</bitOffset>
6509              <bitWidth>1</bitWidth>
6510              <access>read-write</access>
6511              <enumeratedValues>
6512                <enumeratedValue>
6513                  <name>0</name>
6514                  <description>This peripheral allows write accesses.</description>
6515                  <value>#0</value>
6516                </enumeratedValue>
6517                <enumeratedValue>
6518                  <name>1</name>
6519                  <description>This peripheral is write protected.</description>
6520                  <value>#1</value>
6521                </enumeratedValue>
6522              </enumeratedValues>
6523            </field>
6524            <field>
6525              <name>SP5</name>
6526              <description>Supervisor Protect</description>
6527              <bitOffset>10</bitOffset>
6528              <bitWidth>1</bitWidth>
6529              <access>read-write</access>
6530              <enumeratedValues>
6531                <enumeratedValue>
6532                  <name>0</name>
6533                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6534                  <value>#0</value>
6535                </enumeratedValue>
6536                <enumeratedValue>
6537                  <name>1</name>
6538                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6539                  <value>#1</value>
6540                </enumeratedValue>
6541              </enumeratedValues>
6542            </field>
6543            <field>
6544              <name>TP4</name>
6545              <description>Trusted Protect</description>
6546              <bitOffset>12</bitOffset>
6547              <bitWidth>1</bitWidth>
6548              <access>read-write</access>
6549              <enumeratedValues>
6550                <enumeratedValue>
6551                  <name>0</name>
6552                  <description>Accesses from an untrusted master are allowed.</description>
6553                  <value>#0</value>
6554                </enumeratedValue>
6555                <enumeratedValue>
6556                  <name>1</name>
6557                  <description>Accesses from an untrusted master are not allowed.</description>
6558                  <value>#1</value>
6559                </enumeratedValue>
6560              </enumeratedValues>
6561            </field>
6562            <field>
6563              <name>WP4</name>
6564              <description>Write Protect</description>
6565              <bitOffset>13</bitOffset>
6566              <bitWidth>1</bitWidth>
6567              <access>read-write</access>
6568              <enumeratedValues>
6569                <enumeratedValue>
6570                  <name>0</name>
6571                  <description>This peripheral allows write accesses.</description>
6572                  <value>#0</value>
6573                </enumeratedValue>
6574                <enumeratedValue>
6575                  <name>1</name>
6576                  <description>This peripheral is write protected.</description>
6577                  <value>#1</value>
6578                </enumeratedValue>
6579              </enumeratedValues>
6580            </field>
6581            <field>
6582              <name>SP4</name>
6583              <description>Supervisor Protect</description>
6584              <bitOffset>14</bitOffset>
6585              <bitWidth>1</bitWidth>
6586              <access>read-write</access>
6587              <enumeratedValues>
6588                <enumeratedValue>
6589                  <name>0</name>
6590                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6591                  <value>#0</value>
6592                </enumeratedValue>
6593                <enumeratedValue>
6594                  <name>1</name>
6595                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6596                  <value>#1</value>
6597                </enumeratedValue>
6598              </enumeratedValues>
6599            </field>
6600            <field>
6601              <name>TP3</name>
6602              <description>Trusted Protect</description>
6603              <bitOffset>16</bitOffset>
6604              <bitWidth>1</bitWidth>
6605              <access>read-write</access>
6606              <enumeratedValues>
6607                <enumeratedValue>
6608                  <name>0</name>
6609                  <description>Accesses from an untrusted master are allowed.</description>
6610                  <value>#0</value>
6611                </enumeratedValue>
6612                <enumeratedValue>
6613                  <name>1</name>
6614                  <description>Accesses from an untrusted master are not allowed.</description>
6615                  <value>#1</value>
6616                </enumeratedValue>
6617              </enumeratedValues>
6618            </field>
6619            <field>
6620              <name>WP3</name>
6621              <description>Write Protect</description>
6622              <bitOffset>17</bitOffset>
6623              <bitWidth>1</bitWidth>
6624              <access>read-write</access>
6625              <enumeratedValues>
6626                <enumeratedValue>
6627                  <name>0</name>
6628                  <description>This peripheral allows write accesses.</description>
6629                  <value>#0</value>
6630                </enumeratedValue>
6631                <enumeratedValue>
6632                  <name>1</name>
6633                  <description>This peripheral is write protected.</description>
6634                  <value>#1</value>
6635                </enumeratedValue>
6636              </enumeratedValues>
6637            </field>
6638            <field>
6639              <name>SP3</name>
6640              <description>Supervisor Protect</description>
6641              <bitOffset>18</bitOffset>
6642              <bitWidth>1</bitWidth>
6643              <access>read-write</access>
6644              <enumeratedValues>
6645                <enumeratedValue>
6646                  <name>0</name>
6647                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6648                  <value>#0</value>
6649                </enumeratedValue>
6650                <enumeratedValue>
6651                  <name>1</name>
6652                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6653                  <value>#1</value>
6654                </enumeratedValue>
6655              </enumeratedValues>
6656            </field>
6657            <field>
6658              <name>TP2</name>
6659              <description>Trusted Protect</description>
6660              <bitOffset>20</bitOffset>
6661              <bitWidth>1</bitWidth>
6662              <access>read-write</access>
6663              <enumeratedValues>
6664                <enumeratedValue>
6665                  <name>0</name>
6666                  <description>Accesses from an untrusted master are allowed.</description>
6667                  <value>#0</value>
6668                </enumeratedValue>
6669                <enumeratedValue>
6670                  <name>1</name>
6671                  <description>Accesses from an untrusted master are not allowed.</description>
6672                  <value>#1</value>
6673                </enumeratedValue>
6674              </enumeratedValues>
6675            </field>
6676            <field>
6677              <name>WP2</name>
6678              <description>Write Protect</description>
6679              <bitOffset>21</bitOffset>
6680              <bitWidth>1</bitWidth>
6681              <access>read-write</access>
6682              <enumeratedValues>
6683                <enumeratedValue>
6684                  <name>0</name>
6685                  <description>This peripheral allows write accesses.</description>
6686                  <value>#0</value>
6687                </enumeratedValue>
6688                <enumeratedValue>
6689                  <name>1</name>
6690                  <description>This peripheral is write protected.</description>
6691                  <value>#1</value>
6692                </enumeratedValue>
6693              </enumeratedValues>
6694            </field>
6695            <field>
6696              <name>SP2</name>
6697              <description>Supervisor Protect</description>
6698              <bitOffset>22</bitOffset>
6699              <bitWidth>1</bitWidth>
6700              <access>read-write</access>
6701              <enumeratedValues>
6702                <enumeratedValue>
6703                  <name>0</name>
6704                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6705                  <value>#0</value>
6706                </enumeratedValue>
6707                <enumeratedValue>
6708                  <name>1</name>
6709                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6710                  <value>#1</value>
6711                </enumeratedValue>
6712              </enumeratedValues>
6713            </field>
6714            <field>
6715              <name>TP1</name>
6716              <description>Trusted Protect</description>
6717              <bitOffset>24</bitOffset>
6718              <bitWidth>1</bitWidth>
6719              <access>read-write</access>
6720              <enumeratedValues>
6721                <enumeratedValue>
6722                  <name>0</name>
6723                  <description>Accesses from an untrusted master are allowed.</description>
6724                  <value>#0</value>
6725                </enumeratedValue>
6726                <enumeratedValue>
6727                  <name>1</name>
6728                  <description>Accesses from an untrusted master are not allowed.</description>
6729                  <value>#1</value>
6730                </enumeratedValue>
6731              </enumeratedValues>
6732            </field>
6733            <field>
6734              <name>WP1</name>
6735              <description>Write Protect</description>
6736              <bitOffset>25</bitOffset>
6737              <bitWidth>1</bitWidth>
6738              <access>read-write</access>
6739              <enumeratedValues>
6740                <enumeratedValue>
6741                  <name>0</name>
6742                  <description>This peripheral allows write accesses.</description>
6743                  <value>#0</value>
6744                </enumeratedValue>
6745                <enumeratedValue>
6746                  <name>1</name>
6747                  <description>This peripheral is write protected.</description>
6748                  <value>#1</value>
6749                </enumeratedValue>
6750              </enumeratedValues>
6751            </field>
6752            <field>
6753              <name>SP1</name>
6754              <description>Supervisor Protect</description>
6755              <bitOffset>26</bitOffset>
6756              <bitWidth>1</bitWidth>
6757              <access>read-write</access>
6758              <enumeratedValues>
6759                <enumeratedValue>
6760                  <name>0</name>
6761                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6762                  <value>#0</value>
6763                </enumeratedValue>
6764                <enumeratedValue>
6765                  <name>1</name>
6766                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6767                  <value>#1</value>
6768                </enumeratedValue>
6769              </enumeratedValues>
6770            </field>
6771            <field>
6772              <name>TP0</name>
6773              <description>Trusted Protect</description>
6774              <bitOffset>28</bitOffset>
6775              <bitWidth>1</bitWidth>
6776              <access>read-write</access>
6777              <enumeratedValues>
6778                <enumeratedValue>
6779                  <name>0</name>
6780                  <description>Accesses from an untrusted master are allowed.</description>
6781                  <value>#0</value>
6782                </enumeratedValue>
6783                <enumeratedValue>
6784                  <name>1</name>
6785                  <description>Accesses from an untrusted master are not allowed.</description>
6786                  <value>#1</value>
6787                </enumeratedValue>
6788              </enumeratedValues>
6789            </field>
6790            <field>
6791              <name>WP0</name>
6792              <description>Write Protect</description>
6793              <bitOffset>29</bitOffset>
6794              <bitWidth>1</bitWidth>
6795              <access>read-write</access>
6796              <enumeratedValues>
6797                <enumeratedValue>
6798                  <name>0</name>
6799                  <description>This peripheral allows write accesses.</description>
6800                  <value>#0</value>
6801                </enumeratedValue>
6802                <enumeratedValue>
6803                  <name>1</name>
6804                  <description>This peripheral is write protected.</description>
6805                  <value>#1</value>
6806                </enumeratedValue>
6807              </enumeratedValues>
6808            </field>
6809            <field>
6810              <name>SP0</name>
6811              <description>Supervisor Protect</description>
6812              <bitOffset>30</bitOffset>
6813              <bitWidth>1</bitWidth>
6814              <access>read-write</access>
6815              <enumeratedValues>
6816                <enumeratedValue>
6817                  <name>0</name>
6818                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6819                  <value>#0</value>
6820                </enumeratedValue>
6821                <enumeratedValue>
6822                  <name>1</name>
6823                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6824                  <value>#1</value>
6825                </enumeratedValue>
6826              </enumeratedValues>
6827            </field>
6828          </fields>
6829        </register>
6830        <register>
6831          <name>PACRN</name>
6832          <description>Peripheral Access Control Register</description>
6833          <addressOffset>0x64</addressOffset>
6834          <size>32</size>
6835          <access>read-write</access>
6836          <resetValue>0</resetValue>
6837          <resetMask>0xFFFFFFFF</resetMask>
6838          <fields>
6839            <field>
6840              <name>TP7</name>
6841              <description>Trusted Protect</description>
6842              <bitOffset>0</bitOffset>
6843              <bitWidth>1</bitWidth>
6844              <access>read-write</access>
6845              <enumeratedValues>
6846                <enumeratedValue>
6847                  <name>0</name>
6848                  <description>Accesses from an untrusted master are allowed.</description>
6849                  <value>#0</value>
6850                </enumeratedValue>
6851                <enumeratedValue>
6852                  <name>1</name>
6853                  <description>Accesses from an untrusted master are not allowed.</description>
6854                  <value>#1</value>
6855                </enumeratedValue>
6856              </enumeratedValues>
6857            </field>
6858            <field>
6859              <name>WP7</name>
6860              <description>Write Protect</description>
6861              <bitOffset>1</bitOffset>
6862              <bitWidth>1</bitWidth>
6863              <access>read-write</access>
6864              <enumeratedValues>
6865                <enumeratedValue>
6866                  <name>0</name>
6867                  <description>This peripheral allows write accesses.</description>
6868                  <value>#0</value>
6869                </enumeratedValue>
6870                <enumeratedValue>
6871                  <name>1</name>
6872                  <description>This peripheral is write protected.</description>
6873                  <value>#1</value>
6874                </enumeratedValue>
6875              </enumeratedValues>
6876            </field>
6877            <field>
6878              <name>SP7</name>
6879              <description>Supervisor Protect</description>
6880              <bitOffset>2</bitOffset>
6881              <bitWidth>1</bitWidth>
6882              <access>read-write</access>
6883              <enumeratedValues>
6884                <enumeratedValue>
6885                  <name>0</name>
6886                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6887                  <value>#0</value>
6888                </enumeratedValue>
6889                <enumeratedValue>
6890                  <name>1</name>
6891                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6892                  <value>#1</value>
6893                </enumeratedValue>
6894              </enumeratedValues>
6895            </field>
6896            <field>
6897              <name>TP6</name>
6898              <description>Trusted Protect</description>
6899              <bitOffset>4</bitOffset>
6900              <bitWidth>1</bitWidth>
6901              <access>read-write</access>
6902              <enumeratedValues>
6903                <enumeratedValue>
6904                  <name>0</name>
6905                  <description>Accesses from an untrusted master are allowed.</description>
6906                  <value>#0</value>
6907                </enumeratedValue>
6908                <enumeratedValue>
6909                  <name>1</name>
6910                  <description>Accesses from an untrusted master are not allowed.</description>
6911                  <value>#1</value>
6912                </enumeratedValue>
6913              </enumeratedValues>
6914            </field>
6915            <field>
6916              <name>WP6</name>
6917              <description>Write Protect</description>
6918              <bitOffset>5</bitOffset>
6919              <bitWidth>1</bitWidth>
6920              <access>read-write</access>
6921              <enumeratedValues>
6922                <enumeratedValue>
6923                  <name>0</name>
6924                  <description>This peripheral allows write accesses.</description>
6925                  <value>#0</value>
6926                </enumeratedValue>
6927                <enumeratedValue>
6928                  <name>1</name>
6929                  <description>This peripheral is write protected.</description>
6930                  <value>#1</value>
6931                </enumeratedValue>
6932              </enumeratedValues>
6933            </field>
6934            <field>
6935              <name>SP6</name>
6936              <description>Supervisor Protect</description>
6937              <bitOffset>6</bitOffset>
6938              <bitWidth>1</bitWidth>
6939              <access>read-write</access>
6940              <enumeratedValues>
6941                <enumeratedValue>
6942                  <name>0</name>
6943                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
6944                  <value>#0</value>
6945                </enumeratedValue>
6946                <enumeratedValue>
6947                  <name>1</name>
6948                  <description>This peripheral requires supervisor privilege level for accesses.</description>
6949                  <value>#1</value>
6950                </enumeratedValue>
6951              </enumeratedValues>
6952            </field>
6953            <field>
6954              <name>TP5</name>
6955              <description>Trusted Protect</description>
6956              <bitOffset>8</bitOffset>
6957              <bitWidth>1</bitWidth>
6958              <access>read-write</access>
6959              <enumeratedValues>
6960                <enumeratedValue>
6961                  <name>0</name>
6962                  <description>Accesses from an untrusted master are allowed.</description>
6963                  <value>#0</value>
6964                </enumeratedValue>
6965                <enumeratedValue>
6966                  <name>1</name>
6967                  <description>Accesses from an untrusted master are not allowed.</description>
6968                  <value>#1</value>
6969                </enumeratedValue>
6970              </enumeratedValues>
6971            </field>
6972            <field>
6973              <name>WP5</name>
6974              <description>Write Protect</description>
6975              <bitOffset>9</bitOffset>
6976              <bitWidth>1</bitWidth>
6977              <access>read-write</access>
6978              <enumeratedValues>
6979                <enumeratedValue>
6980                  <name>0</name>
6981                  <description>This peripheral allows write accesses.</description>
6982                  <value>#0</value>
6983                </enumeratedValue>
6984                <enumeratedValue>
6985                  <name>1</name>
6986                  <description>This peripheral is write protected.</description>
6987                  <value>#1</value>
6988                </enumeratedValue>
6989              </enumeratedValues>
6990            </field>
6991            <field>
6992              <name>SP5</name>
6993              <description>Supervisor Protect</description>
6994              <bitOffset>10</bitOffset>
6995              <bitWidth>1</bitWidth>
6996              <access>read-write</access>
6997              <enumeratedValues>
6998                <enumeratedValue>
6999                  <name>0</name>
7000                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7001                  <value>#0</value>
7002                </enumeratedValue>
7003                <enumeratedValue>
7004                  <name>1</name>
7005                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7006                  <value>#1</value>
7007                </enumeratedValue>
7008              </enumeratedValues>
7009            </field>
7010            <field>
7011              <name>TP4</name>
7012              <description>Trusted Protect</description>
7013              <bitOffset>12</bitOffset>
7014              <bitWidth>1</bitWidth>
7015              <access>read-write</access>
7016              <enumeratedValues>
7017                <enumeratedValue>
7018                  <name>0</name>
7019                  <description>Accesses from an untrusted master are allowed.</description>
7020                  <value>#0</value>
7021                </enumeratedValue>
7022                <enumeratedValue>
7023                  <name>1</name>
7024                  <description>Accesses from an untrusted master are not allowed.</description>
7025                  <value>#1</value>
7026                </enumeratedValue>
7027              </enumeratedValues>
7028            </field>
7029            <field>
7030              <name>WP4</name>
7031              <description>Write Protect</description>
7032              <bitOffset>13</bitOffset>
7033              <bitWidth>1</bitWidth>
7034              <access>read-write</access>
7035              <enumeratedValues>
7036                <enumeratedValue>
7037                  <name>0</name>
7038                  <description>This peripheral allows write accesses.</description>
7039                  <value>#0</value>
7040                </enumeratedValue>
7041                <enumeratedValue>
7042                  <name>1</name>
7043                  <description>This peripheral is write protected.</description>
7044                  <value>#1</value>
7045                </enumeratedValue>
7046              </enumeratedValues>
7047            </field>
7048            <field>
7049              <name>SP4</name>
7050              <description>Supervisor Protect</description>
7051              <bitOffset>14</bitOffset>
7052              <bitWidth>1</bitWidth>
7053              <access>read-write</access>
7054              <enumeratedValues>
7055                <enumeratedValue>
7056                  <name>0</name>
7057                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7058                  <value>#0</value>
7059                </enumeratedValue>
7060                <enumeratedValue>
7061                  <name>1</name>
7062                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7063                  <value>#1</value>
7064                </enumeratedValue>
7065              </enumeratedValues>
7066            </field>
7067            <field>
7068              <name>TP3</name>
7069              <description>Trusted Protect</description>
7070              <bitOffset>16</bitOffset>
7071              <bitWidth>1</bitWidth>
7072              <access>read-write</access>
7073              <enumeratedValues>
7074                <enumeratedValue>
7075                  <name>0</name>
7076                  <description>Accesses from an untrusted master are allowed.</description>
7077                  <value>#0</value>
7078                </enumeratedValue>
7079                <enumeratedValue>
7080                  <name>1</name>
7081                  <description>Accesses from an untrusted master are not allowed.</description>
7082                  <value>#1</value>
7083                </enumeratedValue>
7084              </enumeratedValues>
7085            </field>
7086            <field>
7087              <name>WP3</name>
7088              <description>Write Protect</description>
7089              <bitOffset>17</bitOffset>
7090              <bitWidth>1</bitWidth>
7091              <access>read-write</access>
7092              <enumeratedValues>
7093                <enumeratedValue>
7094                  <name>0</name>
7095                  <description>This peripheral allows write accesses.</description>
7096                  <value>#0</value>
7097                </enumeratedValue>
7098                <enumeratedValue>
7099                  <name>1</name>
7100                  <description>This peripheral is write protected.</description>
7101                  <value>#1</value>
7102                </enumeratedValue>
7103              </enumeratedValues>
7104            </field>
7105            <field>
7106              <name>SP3</name>
7107              <description>Supervisor Protect</description>
7108              <bitOffset>18</bitOffset>
7109              <bitWidth>1</bitWidth>
7110              <access>read-write</access>
7111              <enumeratedValues>
7112                <enumeratedValue>
7113                  <name>0</name>
7114                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7115                  <value>#0</value>
7116                </enumeratedValue>
7117                <enumeratedValue>
7118                  <name>1</name>
7119                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7120                  <value>#1</value>
7121                </enumeratedValue>
7122              </enumeratedValues>
7123            </field>
7124            <field>
7125              <name>TP2</name>
7126              <description>Trusted Protect</description>
7127              <bitOffset>20</bitOffset>
7128              <bitWidth>1</bitWidth>
7129              <access>read-write</access>
7130              <enumeratedValues>
7131                <enumeratedValue>
7132                  <name>0</name>
7133                  <description>Accesses from an untrusted master are allowed.</description>
7134                  <value>#0</value>
7135                </enumeratedValue>
7136                <enumeratedValue>
7137                  <name>1</name>
7138                  <description>Accesses from an untrusted master are not allowed.</description>
7139                  <value>#1</value>
7140                </enumeratedValue>
7141              </enumeratedValues>
7142            </field>
7143            <field>
7144              <name>WP2</name>
7145              <description>Write Protect</description>
7146              <bitOffset>21</bitOffset>
7147              <bitWidth>1</bitWidth>
7148              <access>read-write</access>
7149              <enumeratedValues>
7150                <enumeratedValue>
7151                  <name>0</name>
7152                  <description>This peripheral allows write accesses.</description>
7153                  <value>#0</value>
7154                </enumeratedValue>
7155                <enumeratedValue>
7156                  <name>1</name>
7157                  <description>This peripheral is write protected.</description>
7158                  <value>#1</value>
7159                </enumeratedValue>
7160              </enumeratedValues>
7161            </field>
7162            <field>
7163              <name>SP2</name>
7164              <description>Supervisor Protect</description>
7165              <bitOffset>22</bitOffset>
7166              <bitWidth>1</bitWidth>
7167              <access>read-write</access>
7168              <enumeratedValues>
7169                <enumeratedValue>
7170                  <name>0</name>
7171                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7172                  <value>#0</value>
7173                </enumeratedValue>
7174                <enumeratedValue>
7175                  <name>1</name>
7176                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7177                  <value>#1</value>
7178                </enumeratedValue>
7179              </enumeratedValues>
7180            </field>
7181            <field>
7182              <name>TP1</name>
7183              <description>Trusted Protect</description>
7184              <bitOffset>24</bitOffset>
7185              <bitWidth>1</bitWidth>
7186              <access>read-write</access>
7187              <enumeratedValues>
7188                <enumeratedValue>
7189                  <name>0</name>
7190                  <description>Accesses from an untrusted master are allowed.</description>
7191                  <value>#0</value>
7192                </enumeratedValue>
7193                <enumeratedValue>
7194                  <name>1</name>
7195                  <description>Accesses from an untrusted master are not allowed.</description>
7196                  <value>#1</value>
7197                </enumeratedValue>
7198              </enumeratedValues>
7199            </field>
7200            <field>
7201              <name>WP1</name>
7202              <description>Write Protect</description>
7203              <bitOffset>25</bitOffset>
7204              <bitWidth>1</bitWidth>
7205              <access>read-write</access>
7206              <enumeratedValues>
7207                <enumeratedValue>
7208                  <name>0</name>
7209                  <description>This peripheral allows write accesses.</description>
7210                  <value>#0</value>
7211                </enumeratedValue>
7212                <enumeratedValue>
7213                  <name>1</name>
7214                  <description>This peripheral is write protected.</description>
7215                  <value>#1</value>
7216                </enumeratedValue>
7217              </enumeratedValues>
7218            </field>
7219            <field>
7220              <name>SP1</name>
7221              <description>Supervisor Protect</description>
7222              <bitOffset>26</bitOffset>
7223              <bitWidth>1</bitWidth>
7224              <access>read-write</access>
7225              <enumeratedValues>
7226                <enumeratedValue>
7227                  <name>0</name>
7228                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7229                  <value>#0</value>
7230                </enumeratedValue>
7231                <enumeratedValue>
7232                  <name>1</name>
7233                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7234                  <value>#1</value>
7235                </enumeratedValue>
7236              </enumeratedValues>
7237            </field>
7238            <field>
7239              <name>TP0</name>
7240              <description>Trusted Protect</description>
7241              <bitOffset>28</bitOffset>
7242              <bitWidth>1</bitWidth>
7243              <access>read-write</access>
7244              <enumeratedValues>
7245                <enumeratedValue>
7246                  <name>0</name>
7247                  <description>Accesses from an untrusted master are allowed.</description>
7248                  <value>#0</value>
7249                </enumeratedValue>
7250                <enumeratedValue>
7251                  <name>1</name>
7252                  <description>Accesses from an untrusted master are not allowed.</description>
7253                  <value>#1</value>
7254                </enumeratedValue>
7255              </enumeratedValues>
7256            </field>
7257            <field>
7258              <name>WP0</name>
7259              <description>Write Protect</description>
7260              <bitOffset>29</bitOffset>
7261              <bitWidth>1</bitWidth>
7262              <access>read-write</access>
7263              <enumeratedValues>
7264                <enumeratedValue>
7265                  <name>0</name>
7266                  <description>This peripheral allows write accesses.</description>
7267                  <value>#0</value>
7268                </enumeratedValue>
7269                <enumeratedValue>
7270                  <name>1</name>
7271                  <description>This peripheral is write protected.</description>
7272                  <value>#1</value>
7273                </enumeratedValue>
7274              </enumeratedValues>
7275            </field>
7276            <field>
7277              <name>SP0</name>
7278              <description>Supervisor Protect</description>
7279              <bitOffset>30</bitOffset>
7280              <bitWidth>1</bitWidth>
7281              <access>read-write</access>
7282              <enumeratedValues>
7283                <enumeratedValue>
7284                  <name>0</name>
7285                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7286                  <value>#0</value>
7287                </enumeratedValue>
7288                <enumeratedValue>
7289                  <name>1</name>
7290                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7291                  <value>#1</value>
7292                </enumeratedValue>
7293              </enumeratedValues>
7294            </field>
7295          </fields>
7296        </register>
7297        <register>
7298          <name>PACRO</name>
7299          <description>Peripheral Access Control Register</description>
7300          <addressOffset>0x68</addressOffset>
7301          <size>32</size>
7302          <access>read-write</access>
7303          <resetValue>0x444000</resetValue>
7304          <resetMask>0xFFFFFFFF</resetMask>
7305          <fields>
7306            <field>
7307              <name>TP7</name>
7308              <description>Trusted Protect</description>
7309              <bitOffset>0</bitOffset>
7310              <bitWidth>1</bitWidth>
7311              <access>read-write</access>
7312              <enumeratedValues>
7313                <enumeratedValue>
7314                  <name>0</name>
7315                  <description>Accesses from an untrusted master are allowed.</description>
7316                  <value>#0</value>
7317                </enumeratedValue>
7318                <enumeratedValue>
7319                  <name>1</name>
7320                  <description>Accesses from an untrusted master are not allowed.</description>
7321                  <value>#1</value>
7322                </enumeratedValue>
7323              </enumeratedValues>
7324            </field>
7325            <field>
7326              <name>WP7</name>
7327              <description>Write Protect</description>
7328              <bitOffset>1</bitOffset>
7329              <bitWidth>1</bitWidth>
7330              <access>read-write</access>
7331              <enumeratedValues>
7332                <enumeratedValue>
7333                  <name>0</name>
7334                  <description>This peripheral allows write accesses.</description>
7335                  <value>#0</value>
7336                </enumeratedValue>
7337                <enumeratedValue>
7338                  <name>1</name>
7339                  <description>This peripheral is write protected.</description>
7340                  <value>#1</value>
7341                </enumeratedValue>
7342              </enumeratedValues>
7343            </field>
7344            <field>
7345              <name>SP7</name>
7346              <description>Supervisor Protect</description>
7347              <bitOffset>2</bitOffset>
7348              <bitWidth>1</bitWidth>
7349              <access>read-write</access>
7350              <enumeratedValues>
7351                <enumeratedValue>
7352                  <name>0</name>
7353                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7354                  <value>#0</value>
7355                </enumeratedValue>
7356                <enumeratedValue>
7357                  <name>1</name>
7358                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7359                  <value>#1</value>
7360                </enumeratedValue>
7361              </enumeratedValues>
7362            </field>
7363            <field>
7364              <name>TP6</name>
7365              <description>Trusted Protect</description>
7366              <bitOffset>4</bitOffset>
7367              <bitWidth>1</bitWidth>
7368              <access>read-write</access>
7369              <enumeratedValues>
7370                <enumeratedValue>
7371                  <name>0</name>
7372                  <description>Accesses from an untrusted master are allowed.</description>
7373                  <value>#0</value>
7374                </enumeratedValue>
7375                <enumeratedValue>
7376                  <name>1</name>
7377                  <description>Accesses from an untrusted master are not allowed.</description>
7378                  <value>#1</value>
7379                </enumeratedValue>
7380              </enumeratedValues>
7381            </field>
7382            <field>
7383              <name>WP6</name>
7384              <description>Write Protect</description>
7385              <bitOffset>5</bitOffset>
7386              <bitWidth>1</bitWidth>
7387              <access>read-write</access>
7388              <enumeratedValues>
7389                <enumeratedValue>
7390                  <name>0</name>
7391                  <description>This peripheral allows write accesses.</description>
7392                  <value>#0</value>
7393                </enumeratedValue>
7394                <enumeratedValue>
7395                  <name>1</name>
7396                  <description>This peripheral is write protected.</description>
7397                  <value>#1</value>
7398                </enumeratedValue>
7399              </enumeratedValues>
7400            </field>
7401            <field>
7402              <name>SP6</name>
7403              <description>Supervisor Protect</description>
7404              <bitOffset>6</bitOffset>
7405              <bitWidth>1</bitWidth>
7406              <access>read-write</access>
7407              <enumeratedValues>
7408                <enumeratedValue>
7409                  <name>0</name>
7410                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7411                  <value>#0</value>
7412                </enumeratedValue>
7413                <enumeratedValue>
7414                  <name>1</name>
7415                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7416                  <value>#1</value>
7417                </enumeratedValue>
7418              </enumeratedValues>
7419            </field>
7420            <field>
7421              <name>TP5</name>
7422              <description>Trusted Protect</description>
7423              <bitOffset>8</bitOffset>
7424              <bitWidth>1</bitWidth>
7425              <access>read-write</access>
7426              <enumeratedValues>
7427                <enumeratedValue>
7428                  <name>0</name>
7429                  <description>Accesses from an untrusted master are allowed.</description>
7430                  <value>#0</value>
7431                </enumeratedValue>
7432                <enumeratedValue>
7433                  <name>1</name>
7434                  <description>Accesses from an untrusted master are not allowed.</description>
7435                  <value>#1</value>
7436                </enumeratedValue>
7437              </enumeratedValues>
7438            </field>
7439            <field>
7440              <name>WP5</name>
7441              <description>Write Protect</description>
7442              <bitOffset>9</bitOffset>
7443              <bitWidth>1</bitWidth>
7444              <access>read-write</access>
7445              <enumeratedValues>
7446                <enumeratedValue>
7447                  <name>0</name>
7448                  <description>This peripheral allows write accesses.</description>
7449                  <value>#0</value>
7450                </enumeratedValue>
7451                <enumeratedValue>
7452                  <name>1</name>
7453                  <description>This peripheral is write protected.</description>
7454                  <value>#1</value>
7455                </enumeratedValue>
7456              </enumeratedValues>
7457            </field>
7458            <field>
7459              <name>SP5</name>
7460              <description>Supervisor Protect</description>
7461              <bitOffset>10</bitOffset>
7462              <bitWidth>1</bitWidth>
7463              <access>read-write</access>
7464              <enumeratedValues>
7465                <enumeratedValue>
7466                  <name>0</name>
7467                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7468                  <value>#0</value>
7469                </enumeratedValue>
7470                <enumeratedValue>
7471                  <name>1</name>
7472                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7473                  <value>#1</value>
7474                </enumeratedValue>
7475              </enumeratedValues>
7476            </field>
7477            <field>
7478              <name>TP4</name>
7479              <description>Trusted Protect</description>
7480              <bitOffset>12</bitOffset>
7481              <bitWidth>1</bitWidth>
7482              <access>read-write</access>
7483              <enumeratedValues>
7484                <enumeratedValue>
7485                  <name>0</name>
7486                  <description>Accesses from an untrusted master are allowed.</description>
7487                  <value>#0</value>
7488                </enumeratedValue>
7489                <enumeratedValue>
7490                  <name>1</name>
7491                  <description>Accesses from an untrusted master are not allowed.</description>
7492                  <value>#1</value>
7493                </enumeratedValue>
7494              </enumeratedValues>
7495            </field>
7496            <field>
7497              <name>WP4</name>
7498              <description>Write Protect</description>
7499              <bitOffset>13</bitOffset>
7500              <bitWidth>1</bitWidth>
7501              <access>read-write</access>
7502              <enumeratedValues>
7503                <enumeratedValue>
7504                  <name>0</name>
7505                  <description>This peripheral allows write accesses.</description>
7506                  <value>#0</value>
7507                </enumeratedValue>
7508                <enumeratedValue>
7509                  <name>1</name>
7510                  <description>This peripheral is write protected.</description>
7511                  <value>#1</value>
7512                </enumeratedValue>
7513              </enumeratedValues>
7514            </field>
7515            <field>
7516              <name>SP4</name>
7517              <description>Supervisor Protect</description>
7518              <bitOffset>14</bitOffset>
7519              <bitWidth>1</bitWidth>
7520              <access>read-write</access>
7521              <enumeratedValues>
7522                <enumeratedValue>
7523                  <name>0</name>
7524                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7525                  <value>#0</value>
7526                </enumeratedValue>
7527                <enumeratedValue>
7528                  <name>1</name>
7529                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7530                  <value>#1</value>
7531                </enumeratedValue>
7532              </enumeratedValues>
7533            </field>
7534            <field>
7535              <name>TP3</name>
7536              <description>Trusted Protect</description>
7537              <bitOffset>16</bitOffset>
7538              <bitWidth>1</bitWidth>
7539              <access>read-write</access>
7540              <enumeratedValues>
7541                <enumeratedValue>
7542                  <name>0</name>
7543                  <description>Accesses from an untrusted master are allowed.</description>
7544                  <value>#0</value>
7545                </enumeratedValue>
7546                <enumeratedValue>
7547                  <name>1</name>
7548                  <description>Accesses from an untrusted master are not allowed.</description>
7549                  <value>#1</value>
7550                </enumeratedValue>
7551              </enumeratedValues>
7552            </field>
7553            <field>
7554              <name>WP3</name>
7555              <description>Write Protect</description>
7556              <bitOffset>17</bitOffset>
7557              <bitWidth>1</bitWidth>
7558              <access>read-write</access>
7559              <enumeratedValues>
7560                <enumeratedValue>
7561                  <name>0</name>
7562                  <description>This peripheral allows write accesses.</description>
7563                  <value>#0</value>
7564                </enumeratedValue>
7565                <enumeratedValue>
7566                  <name>1</name>
7567                  <description>This peripheral is write protected.</description>
7568                  <value>#1</value>
7569                </enumeratedValue>
7570              </enumeratedValues>
7571            </field>
7572            <field>
7573              <name>SP3</name>
7574              <description>Supervisor Protect</description>
7575              <bitOffset>18</bitOffset>
7576              <bitWidth>1</bitWidth>
7577              <access>read-write</access>
7578              <enumeratedValues>
7579                <enumeratedValue>
7580                  <name>0</name>
7581                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7582                  <value>#0</value>
7583                </enumeratedValue>
7584                <enumeratedValue>
7585                  <name>1</name>
7586                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7587                  <value>#1</value>
7588                </enumeratedValue>
7589              </enumeratedValues>
7590            </field>
7591            <field>
7592              <name>TP2</name>
7593              <description>Trusted Protect</description>
7594              <bitOffset>20</bitOffset>
7595              <bitWidth>1</bitWidth>
7596              <access>read-write</access>
7597              <enumeratedValues>
7598                <enumeratedValue>
7599                  <name>0</name>
7600                  <description>Accesses from an untrusted master are allowed.</description>
7601                  <value>#0</value>
7602                </enumeratedValue>
7603                <enumeratedValue>
7604                  <name>1</name>
7605                  <description>Accesses from an untrusted master are not allowed.</description>
7606                  <value>#1</value>
7607                </enumeratedValue>
7608              </enumeratedValues>
7609            </field>
7610            <field>
7611              <name>WP2</name>
7612              <description>Write Protect</description>
7613              <bitOffset>21</bitOffset>
7614              <bitWidth>1</bitWidth>
7615              <access>read-write</access>
7616              <enumeratedValues>
7617                <enumeratedValue>
7618                  <name>0</name>
7619                  <description>This peripheral allows write accesses.</description>
7620                  <value>#0</value>
7621                </enumeratedValue>
7622                <enumeratedValue>
7623                  <name>1</name>
7624                  <description>This peripheral is write protected.</description>
7625                  <value>#1</value>
7626                </enumeratedValue>
7627              </enumeratedValues>
7628            </field>
7629            <field>
7630              <name>SP2</name>
7631              <description>Supervisor Protect</description>
7632              <bitOffset>22</bitOffset>
7633              <bitWidth>1</bitWidth>
7634              <access>read-write</access>
7635              <enumeratedValues>
7636                <enumeratedValue>
7637                  <name>0</name>
7638                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7639                  <value>#0</value>
7640                </enumeratedValue>
7641                <enumeratedValue>
7642                  <name>1</name>
7643                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7644                  <value>#1</value>
7645                </enumeratedValue>
7646              </enumeratedValues>
7647            </field>
7648            <field>
7649              <name>TP1</name>
7650              <description>Trusted Protect</description>
7651              <bitOffset>24</bitOffset>
7652              <bitWidth>1</bitWidth>
7653              <access>read-write</access>
7654              <enumeratedValues>
7655                <enumeratedValue>
7656                  <name>0</name>
7657                  <description>Accesses from an untrusted master are allowed.</description>
7658                  <value>#0</value>
7659                </enumeratedValue>
7660                <enumeratedValue>
7661                  <name>1</name>
7662                  <description>Accesses from an untrusted master are not allowed.</description>
7663                  <value>#1</value>
7664                </enumeratedValue>
7665              </enumeratedValues>
7666            </field>
7667            <field>
7668              <name>WP1</name>
7669              <description>Write Protect</description>
7670              <bitOffset>25</bitOffset>
7671              <bitWidth>1</bitWidth>
7672              <access>read-write</access>
7673              <enumeratedValues>
7674                <enumeratedValue>
7675                  <name>0</name>
7676                  <description>This peripheral allows write accesses.</description>
7677                  <value>#0</value>
7678                </enumeratedValue>
7679                <enumeratedValue>
7680                  <name>1</name>
7681                  <description>This peripheral is write protected.</description>
7682                  <value>#1</value>
7683                </enumeratedValue>
7684              </enumeratedValues>
7685            </field>
7686            <field>
7687              <name>SP1</name>
7688              <description>Supervisor Protect</description>
7689              <bitOffset>26</bitOffset>
7690              <bitWidth>1</bitWidth>
7691              <access>read-write</access>
7692              <enumeratedValues>
7693                <enumeratedValue>
7694                  <name>0</name>
7695                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7696                  <value>#0</value>
7697                </enumeratedValue>
7698                <enumeratedValue>
7699                  <name>1</name>
7700                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7701                  <value>#1</value>
7702                </enumeratedValue>
7703              </enumeratedValues>
7704            </field>
7705            <field>
7706              <name>TP0</name>
7707              <description>Trusted Protect</description>
7708              <bitOffset>28</bitOffset>
7709              <bitWidth>1</bitWidth>
7710              <access>read-write</access>
7711              <enumeratedValues>
7712                <enumeratedValue>
7713                  <name>0</name>
7714                  <description>Accesses from an untrusted master are allowed.</description>
7715                  <value>#0</value>
7716                </enumeratedValue>
7717                <enumeratedValue>
7718                  <name>1</name>
7719                  <description>Accesses from an untrusted master are not allowed.</description>
7720                  <value>#1</value>
7721                </enumeratedValue>
7722              </enumeratedValues>
7723            </field>
7724            <field>
7725              <name>WP0</name>
7726              <description>Write Protect</description>
7727              <bitOffset>29</bitOffset>
7728              <bitWidth>1</bitWidth>
7729              <access>read-write</access>
7730              <enumeratedValues>
7731                <enumeratedValue>
7732                  <name>0</name>
7733                  <description>This peripheral allows write accesses.</description>
7734                  <value>#0</value>
7735                </enumeratedValue>
7736                <enumeratedValue>
7737                  <name>1</name>
7738                  <description>This peripheral is write protected.</description>
7739                  <value>#1</value>
7740                </enumeratedValue>
7741              </enumeratedValues>
7742            </field>
7743            <field>
7744              <name>SP0</name>
7745              <description>Supervisor Protect</description>
7746              <bitOffset>30</bitOffset>
7747              <bitWidth>1</bitWidth>
7748              <access>read-write</access>
7749              <enumeratedValues>
7750                <enumeratedValue>
7751                  <name>0</name>
7752                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7753                  <value>#0</value>
7754                </enumeratedValue>
7755                <enumeratedValue>
7756                  <name>1</name>
7757                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7758                  <value>#1</value>
7759                </enumeratedValue>
7760              </enumeratedValues>
7761            </field>
7762          </fields>
7763        </register>
7764        <register>
7765          <name>PACRP</name>
7766          <description>Peripheral Access Control Register</description>
7767          <addressOffset>0x6C</addressOffset>
7768          <size>32</size>
7769          <access>read-write</access>
7770          <resetValue>0x44444444</resetValue>
7771          <resetMask>0xFFFFFFFF</resetMask>
7772          <fields>
7773            <field>
7774              <name>TP7</name>
7775              <description>Trusted Protect</description>
7776              <bitOffset>0</bitOffset>
7777              <bitWidth>1</bitWidth>
7778              <access>read-write</access>
7779              <enumeratedValues>
7780                <enumeratedValue>
7781                  <name>0</name>
7782                  <description>Accesses from an untrusted master are allowed.</description>
7783                  <value>#0</value>
7784                </enumeratedValue>
7785                <enumeratedValue>
7786                  <name>1</name>
7787                  <description>Accesses from an untrusted master are not allowed.</description>
7788                  <value>#1</value>
7789                </enumeratedValue>
7790              </enumeratedValues>
7791            </field>
7792            <field>
7793              <name>WP7</name>
7794              <description>Write Protect</description>
7795              <bitOffset>1</bitOffset>
7796              <bitWidth>1</bitWidth>
7797              <access>read-write</access>
7798              <enumeratedValues>
7799                <enumeratedValue>
7800                  <name>0</name>
7801                  <description>This peripheral allows write accesses.</description>
7802                  <value>#0</value>
7803                </enumeratedValue>
7804                <enumeratedValue>
7805                  <name>1</name>
7806                  <description>This peripheral is write protected.</description>
7807                  <value>#1</value>
7808                </enumeratedValue>
7809              </enumeratedValues>
7810            </field>
7811            <field>
7812              <name>SP7</name>
7813              <description>Supervisor Protect</description>
7814              <bitOffset>2</bitOffset>
7815              <bitWidth>1</bitWidth>
7816              <access>read-write</access>
7817              <enumeratedValues>
7818                <enumeratedValue>
7819                  <name>0</name>
7820                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7821                  <value>#0</value>
7822                </enumeratedValue>
7823                <enumeratedValue>
7824                  <name>1</name>
7825                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7826                  <value>#1</value>
7827                </enumeratedValue>
7828              </enumeratedValues>
7829            </field>
7830            <field>
7831              <name>TP6</name>
7832              <description>Trusted Protect</description>
7833              <bitOffset>4</bitOffset>
7834              <bitWidth>1</bitWidth>
7835              <access>read-write</access>
7836              <enumeratedValues>
7837                <enumeratedValue>
7838                  <name>0</name>
7839                  <description>Accesses from an untrusted master are allowed.</description>
7840                  <value>#0</value>
7841                </enumeratedValue>
7842                <enumeratedValue>
7843                  <name>1</name>
7844                  <description>Accesses from an untrusted master are not allowed.</description>
7845                  <value>#1</value>
7846                </enumeratedValue>
7847              </enumeratedValues>
7848            </field>
7849            <field>
7850              <name>WP6</name>
7851              <description>Write Protect</description>
7852              <bitOffset>5</bitOffset>
7853              <bitWidth>1</bitWidth>
7854              <access>read-write</access>
7855              <enumeratedValues>
7856                <enumeratedValue>
7857                  <name>0</name>
7858                  <description>This peripheral allows write accesses.</description>
7859                  <value>#0</value>
7860                </enumeratedValue>
7861                <enumeratedValue>
7862                  <name>1</name>
7863                  <description>This peripheral is write protected.</description>
7864                  <value>#1</value>
7865                </enumeratedValue>
7866              </enumeratedValues>
7867            </field>
7868            <field>
7869              <name>SP6</name>
7870              <description>Supervisor Protect</description>
7871              <bitOffset>6</bitOffset>
7872              <bitWidth>1</bitWidth>
7873              <access>read-write</access>
7874              <enumeratedValues>
7875                <enumeratedValue>
7876                  <name>0</name>
7877                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7878                  <value>#0</value>
7879                </enumeratedValue>
7880                <enumeratedValue>
7881                  <name>1</name>
7882                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7883                  <value>#1</value>
7884                </enumeratedValue>
7885              </enumeratedValues>
7886            </field>
7887            <field>
7888              <name>TP5</name>
7889              <description>Trusted Protect</description>
7890              <bitOffset>8</bitOffset>
7891              <bitWidth>1</bitWidth>
7892              <access>read-write</access>
7893              <enumeratedValues>
7894                <enumeratedValue>
7895                  <name>0</name>
7896                  <description>Accesses from an untrusted master are allowed.</description>
7897                  <value>#0</value>
7898                </enumeratedValue>
7899                <enumeratedValue>
7900                  <name>1</name>
7901                  <description>Accesses from an untrusted master are not allowed.</description>
7902                  <value>#1</value>
7903                </enumeratedValue>
7904              </enumeratedValues>
7905            </field>
7906            <field>
7907              <name>WP5</name>
7908              <description>Write Protect</description>
7909              <bitOffset>9</bitOffset>
7910              <bitWidth>1</bitWidth>
7911              <access>read-write</access>
7912              <enumeratedValues>
7913                <enumeratedValue>
7914                  <name>0</name>
7915                  <description>This peripheral allows write accesses.</description>
7916                  <value>#0</value>
7917                </enumeratedValue>
7918                <enumeratedValue>
7919                  <name>1</name>
7920                  <description>This peripheral is write protected.</description>
7921                  <value>#1</value>
7922                </enumeratedValue>
7923              </enumeratedValues>
7924            </field>
7925            <field>
7926              <name>SP5</name>
7927              <description>Supervisor Protect</description>
7928              <bitOffset>10</bitOffset>
7929              <bitWidth>1</bitWidth>
7930              <access>read-write</access>
7931              <enumeratedValues>
7932                <enumeratedValue>
7933                  <name>0</name>
7934                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7935                  <value>#0</value>
7936                </enumeratedValue>
7937                <enumeratedValue>
7938                  <name>1</name>
7939                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7940                  <value>#1</value>
7941                </enumeratedValue>
7942              </enumeratedValues>
7943            </field>
7944            <field>
7945              <name>TP4</name>
7946              <description>Trusted Protect</description>
7947              <bitOffset>12</bitOffset>
7948              <bitWidth>1</bitWidth>
7949              <access>read-write</access>
7950              <enumeratedValues>
7951                <enumeratedValue>
7952                  <name>0</name>
7953                  <description>Accesses from an untrusted master are allowed.</description>
7954                  <value>#0</value>
7955                </enumeratedValue>
7956                <enumeratedValue>
7957                  <name>1</name>
7958                  <description>Accesses from an untrusted master are not allowed.</description>
7959                  <value>#1</value>
7960                </enumeratedValue>
7961              </enumeratedValues>
7962            </field>
7963            <field>
7964              <name>WP4</name>
7965              <description>Write Protect</description>
7966              <bitOffset>13</bitOffset>
7967              <bitWidth>1</bitWidth>
7968              <access>read-write</access>
7969              <enumeratedValues>
7970                <enumeratedValue>
7971                  <name>0</name>
7972                  <description>This peripheral allows write accesses.</description>
7973                  <value>#0</value>
7974                </enumeratedValue>
7975                <enumeratedValue>
7976                  <name>1</name>
7977                  <description>This peripheral is write protected.</description>
7978                  <value>#1</value>
7979                </enumeratedValue>
7980              </enumeratedValues>
7981            </field>
7982            <field>
7983              <name>SP4</name>
7984              <description>Supervisor Protect</description>
7985              <bitOffset>14</bitOffset>
7986              <bitWidth>1</bitWidth>
7987              <access>read-write</access>
7988              <enumeratedValues>
7989                <enumeratedValue>
7990                  <name>0</name>
7991                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
7992                  <value>#0</value>
7993                </enumeratedValue>
7994                <enumeratedValue>
7995                  <name>1</name>
7996                  <description>This peripheral requires supervisor privilege level for accesses.</description>
7997                  <value>#1</value>
7998                </enumeratedValue>
7999              </enumeratedValues>
8000            </field>
8001            <field>
8002              <name>TP3</name>
8003              <description>Trusted Protect</description>
8004              <bitOffset>16</bitOffset>
8005              <bitWidth>1</bitWidth>
8006              <access>read-write</access>
8007              <enumeratedValues>
8008                <enumeratedValue>
8009                  <name>0</name>
8010                  <description>Accesses from an untrusted master are allowed.</description>
8011                  <value>#0</value>
8012                </enumeratedValue>
8013                <enumeratedValue>
8014                  <name>1</name>
8015                  <description>Accesses from an untrusted master are not allowed.</description>
8016                  <value>#1</value>
8017                </enumeratedValue>
8018              </enumeratedValues>
8019            </field>
8020            <field>
8021              <name>WP3</name>
8022              <description>Write Protect</description>
8023              <bitOffset>17</bitOffset>
8024              <bitWidth>1</bitWidth>
8025              <access>read-write</access>
8026              <enumeratedValues>
8027                <enumeratedValue>
8028                  <name>0</name>
8029                  <description>This peripheral allows write accesses.</description>
8030                  <value>#0</value>
8031                </enumeratedValue>
8032                <enumeratedValue>
8033                  <name>1</name>
8034                  <description>This peripheral is write protected.</description>
8035                  <value>#1</value>
8036                </enumeratedValue>
8037              </enumeratedValues>
8038            </field>
8039            <field>
8040              <name>SP3</name>
8041              <description>Supervisor Protect</description>
8042              <bitOffset>18</bitOffset>
8043              <bitWidth>1</bitWidth>
8044              <access>read-write</access>
8045              <enumeratedValues>
8046                <enumeratedValue>
8047                  <name>0</name>
8048                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
8049                  <value>#0</value>
8050                </enumeratedValue>
8051                <enumeratedValue>
8052                  <name>1</name>
8053                  <description>This peripheral requires supervisor privilege level for accesses.</description>
8054                  <value>#1</value>
8055                </enumeratedValue>
8056              </enumeratedValues>
8057            </field>
8058            <field>
8059              <name>TP2</name>
8060              <description>Trusted Protect</description>
8061              <bitOffset>20</bitOffset>
8062              <bitWidth>1</bitWidth>
8063              <access>read-write</access>
8064              <enumeratedValues>
8065                <enumeratedValue>
8066                  <name>0</name>
8067                  <description>Accesses from an untrusted master are allowed.</description>
8068                  <value>#0</value>
8069                </enumeratedValue>
8070                <enumeratedValue>
8071                  <name>1</name>
8072                  <description>Accesses from an untrusted master are not allowed.</description>
8073                  <value>#1</value>
8074                </enumeratedValue>
8075              </enumeratedValues>
8076            </field>
8077            <field>
8078              <name>WP2</name>
8079              <description>Write Protect</description>
8080              <bitOffset>21</bitOffset>
8081              <bitWidth>1</bitWidth>
8082              <access>read-write</access>
8083              <enumeratedValues>
8084                <enumeratedValue>
8085                  <name>0</name>
8086                  <description>This peripheral allows write accesses.</description>
8087                  <value>#0</value>
8088                </enumeratedValue>
8089                <enumeratedValue>
8090                  <name>1</name>
8091                  <description>This peripheral is write protected.</description>
8092                  <value>#1</value>
8093                </enumeratedValue>
8094              </enumeratedValues>
8095            </field>
8096            <field>
8097              <name>SP2</name>
8098              <description>Supervisor Protect</description>
8099              <bitOffset>22</bitOffset>
8100              <bitWidth>1</bitWidth>
8101              <access>read-write</access>
8102              <enumeratedValues>
8103                <enumeratedValue>
8104                  <name>0</name>
8105                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
8106                  <value>#0</value>
8107                </enumeratedValue>
8108                <enumeratedValue>
8109                  <name>1</name>
8110                  <description>This peripheral requires supervisor privilege level for accesses.</description>
8111                  <value>#1</value>
8112                </enumeratedValue>
8113              </enumeratedValues>
8114            </field>
8115            <field>
8116              <name>TP1</name>
8117              <description>Trusted Protect</description>
8118              <bitOffset>24</bitOffset>
8119              <bitWidth>1</bitWidth>
8120              <access>read-write</access>
8121              <enumeratedValues>
8122                <enumeratedValue>
8123                  <name>0</name>
8124                  <description>Accesses from an untrusted master are allowed.</description>
8125                  <value>#0</value>
8126                </enumeratedValue>
8127                <enumeratedValue>
8128                  <name>1</name>
8129                  <description>Accesses from an untrusted master are not allowed.</description>
8130                  <value>#1</value>
8131                </enumeratedValue>
8132              </enumeratedValues>
8133            </field>
8134            <field>
8135              <name>WP1</name>
8136              <description>Write Protect</description>
8137              <bitOffset>25</bitOffset>
8138              <bitWidth>1</bitWidth>
8139              <access>read-write</access>
8140              <enumeratedValues>
8141                <enumeratedValue>
8142                  <name>0</name>
8143                  <description>This peripheral allows write accesses.</description>
8144                  <value>#0</value>
8145                </enumeratedValue>
8146                <enumeratedValue>
8147                  <name>1</name>
8148                  <description>This peripheral is write protected.</description>
8149                  <value>#1</value>
8150                </enumeratedValue>
8151              </enumeratedValues>
8152            </field>
8153            <field>
8154              <name>SP1</name>
8155              <description>Supervisor Protect</description>
8156              <bitOffset>26</bitOffset>
8157              <bitWidth>1</bitWidth>
8158              <access>read-write</access>
8159              <enumeratedValues>
8160                <enumeratedValue>
8161                  <name>0</name>
8162                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
8163                  <value>#0</value>
8164                </enumeratedValue>
8165                <enumeratedValue>
8166                  <name>1</name>
8167                  <description>This peripheral requires supervisor privilege level for accesses.</description>
8168                  <value>#1</value>
8169                </enumeratedValue>
8170              </enumeratedValues>
8171            </field>
8172            <field>
8173              <name>TP0</name>
8174              <description>Trusted Protect</description>
8175              <bitOffset>28</bitOffset>
8176              <bitWidth>1</bitWidth>
8177              <access>read-write</access>
8178              <enumeratedValues>
8179                <enumeratedValue>
8180                  <name>0</name>
8181                  <description>Accesses from an untrusted master are allowed.</description>
8182                  <value>#0</value>
8183                </enumeratedValue>
8184                <enumeratedValue>
8185                  <name>1</name>
8186                  <description>Accesses from an untrusted master are not allowed.</description>
8187                  <value>#1</value>
8188                </enumeratedValue>
8189              </enumeratedValues>
8190            </field>
8191            <field>
8192              <name>WP0</name>
8193              <description>Write Protect</description>
8194              <bitOffset>29</bitOffset>
8195              <bitWidth>1</bitWidth>
8196              <access>read-write</access>
8197              <enumeratedValues>
8198                <enumeratedValue>
8199                  <name>0</name>
8200                  <description>This peripheral allows write accesses.</description>
8201                  <value>#0</value>
8202                </enumeratedValue>
8203                <enumeratedValue>
8204                  <name>1</name>
8205                  <description>This peripheral is write protected.</description>
8206                  <value>#1</value>
8207                </enumeratedValue>
8208              </enumeratedValues>
8209            </field>
8210            <field>
8211              <name>SP0</name>
8212              <description>Supervisor Protect</description>
8213              <bitOffset>30</bitOffset>
8214              <bitWidth>1</bitWidth>
8215              <access>read-write</access>
8216              <enumeratedValues>
8217                <enumeratedValue>
8218                  <name>0</name>
8219                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
8220                  <value>#0</value>
8221                </enumeratedValue>
8222                <enumeratedValue>
8223                  <name>1</name>
8224                  <description>This peripheral requires supervisor privilege level for accesses.</description>
8225                  <value>#1</value>
8226                </enumeratedValue>
8227              </enumeratedValues>
8228            </field>
8229          </fields>
8230        </register>
8231      </registers>
8232    </peripheral>
8233    <peripheral>
8234      <name>AIPS1</name>
8235      <description>AIPS-Lite Bridge</description>
8236      <groupName>AIPS</groupName>
8237      <prependToName>AIPS1_</prependToName>
8238      <baseAddress>0x40080000</baseAddress>
8239      <addressBlock>
8240        <offset>0</offset>
8241        <size>0x70</size>
8242        <usage>registers</usage>
8243      </addressBlock>
8244      <registers>
8245        <register>
8246          <name>MPRA</name>
8247          <description>Master Privilege Register A</description>
8248          <addressOffset>0</addressOffset>
8249          <size>32</size>
8250          <access>read-write</access>
8251          <resetValue>0x77700000</resetValue>
8252          <resetMask>0xFFFFFFFF</resetMask>
8253          <fields>
8254            <field>
8255              <name>MPL4</name>
8256              <description>Master 4 Privilege Level</description>
8257              <bitOffset>12</bitOffset>
8258              <bitWidth>1</bitWidth>
8259              <access>read-write</access>
8260              <enumeratedValues>
8261                <enumeratedValue>
8262                  <name>0</name>
8263                  <description>Accesses from this master are forced to user-mode.</description>
8264                  <value>#0</value>
8265                </enumeratedValue>
8266                <enumeratedValue>
8267                  <name>1</name>
8268                  <description>Accesses from this master are not forced to user-mode.</description>
8269                  <value>#1</value>
8270                </enumeratedValue>
8271              </enumeratedValues>
8272            </field>
8273            <field>
8274              <name>MTW4</name>
8275              <description>Master 4 Trusted For Writes</description>
8276              <bitOffset>13</bitOffset>
8277              <bitWidth>1</bitWidth>
8278              <access>read-write</access>
8279              <enumeratedValues>
8280                <enumeratedValue>
8281                  <name>0</name>
8282                  <description>This master is not trusted for write accesses.</description>
8283                  <value>#0</value>
8284                </enumeratedValue>
8285                <enumeratedValue>
8286                  <name>1</name>
8287                  <description>This master is trusted for write accesses.</description>
8288                  <value>#1</value>
8289                </enumeratedValue>
8290              </enumeratedValues>
8291            </field>
8292            <field>
8293              <name>MTR4</name>
8294              <description>Master 4 Trusted For Read</description>
8295              <bitOffset>14</bitOffset>
8296              <bitWidth>1</bitWidth>
8297              <access>read-write</access>
8298              <enumeratedValues>
8299                <enumeratedValue>
8300                  <name>0</name>
8301                  <description>This master is not trusted for read accesses.</description>
8302                  <value>#0</value>
8303                </enumeratedValue>
8304                <enumeratedValue>
8305                  <name>1</name>
8306                  <description>This master is trusted for read accesses.</description>
8307                  <value>#1</value>
8308                </enumeratedValue>
8309              </enumeratedValues>
8310            </field>
8311            <field>
8312              <name>MPL3</name>
8313              <description>Master 3 Privilege Level</description>
8314              <bitOffset>16</bitOffset>
8315              <bitWidth>1</bitWidth>
8316              <access>read-write</access>
8317              <enumeratedValues>
8318                <enumeratedValue>
8319                  <name>0</name>
8320                  <description>Accesses from this master are forced to user-mode.</description>
8321                  <value>#0</value>
8322                </enumeratedValue>
8323                <enumeratedValue>
8324                  <name>1</name>
8325                  <description>Accesses from this master are not forced to user-mode.</description>
8326                  <value>#1</value>
8327                </enumeratedValue>
8328              </enumeratedValues>
8329            </field>
8330            <field>
8331              <name>MTW3</name>
8332              <description>Master 3 Trusted For Writes</description>
8333              <bitOffset>17</bitOffset>
8334              <bitWidth>1</bitWidth>
8335              <access>read-write</access>
8336              <enumeratedValues>
8337                <enumeratedValue>
8338                  <name>0</name>
8339                  <description>This master is not trusted for write accesses.</description>
8340                  <value>#0</value>
8341                </enumeratedValue>
8342                <enumeratedValue>
8343                  <name>1</name>
8344                  <description>This master is trusted for write accesses.</description>
8345                  <value>#1</value>
8346                </enumeratedValue>
8347              </enumeratedValues>
8348            </field>
8349            <field>
8350              <name>MTR3</name>
8351              <description>Master 3 Trusted For Read</description>
8352              <bitOffset>18</bitOffset>
8353              <bitWidth>1</bitWidth>
8354              <access>read-write</access>
8355              <enumeratedValues>
8356                <enumeratedValue>
8357                  <name>0</name>
8358                  <description>This master is not trusted for read accesses.</description>
8359                  <value>#0</value>
8360                </enumeratedValue>
8361                <enumeratedValue>
8362                  <name>1</name>
8363                  <description>This master is trusted for read accesses.</description>
8364                  <value>#1</value>
8365                </enumeratedValue>
8366              </enumeratedValues>
8367            </field>
8368            <field>
8369              <name>MPL2</name>
8370              <description>Master 2 Privilege Level</description>
8371              <bitOffset>20</bitOffset>
8372              <bitWidth>1</bitWidth>
8373              <access>read-write</access>
8374              <enumeratedValues>
8375                <enumeratedValue>
8376                  <name>0</name>
8377                  <description>Accesses from this master are forced to user-mode.</description>
8378                  <value>#0</value>
8379                </enumeratedValue>
8380                <enumeratedValue>
8381                  <name>1</name>
8382                  <description>Accesses from this master are not forced to user-mode.</description>
8383                  <value>#1</value>
8384                </enumeratedValue>
8385              </enumeratedValues>
8386            </field>
8387            <field>
8388              <name>MTW2</name>
8389              <description>Master 2 Trusted For Writes</description>
8390              <bitOffset>21</bitOffset>
8391              <bitWidth>1</bitWidth>
8392              <access>read-write</access>
8393              <enumeratedValues>
8394                <enumeratedValue>
8395                  <name>0</name>
8396                  <description>This master is not trusted for write accesses.</description>
8397                  <value>#0</value>
8398                </enumeratedValue>
8399                <enumeratedValue>
8400                  <name>1</name>
8401                  <description>This master is trusted for write accesses.</description>
8402                  <value>#1</value>
8403                </enumeratedValue>
8404              </enumeratedValues>
8405            </field>
8406            <field>
8407              <name>MTR2</name>
8408              <description>Master 2 Trusted For Read</description>
8409              <bitOffset>22</bitOffset>
8410              <bitWidth>1</bitWidth>
8411              <access>read-write</access>
8412              <enumeratedValues>
8413                <enumeratedValue>
8414                  <name>0</name>
8415                  <description>This master is not trusted for read accesses.</description>
8416                  <value>#0</value>
8417                </enumeratedValue>
8418                <enumeratedValue>
8419                  <name>1</name>
8420                  <description>This master is trusted for read accesses.</description>
8421                  <value>#1</value>
8422                </enumeratedValue>
8423              </enumeratedValues>
8424            </field>
8425            <field>
8426              <name>MPL1</name>
8427              <description>Master 1 Privilege Level</description>
8428              <bitOffset>24</bitOffset>
8429              <bitWidth>1</bitWidth>
8430              <access>read-write</access>
8431              <enumeratedValues>
8432                <enumeratedValue>
8433                  <name>0</name>
8434                  <description>Accesses from this master are forced to user-mode.</description>
8435                  <value>#0</value>
8436                </enumeratedValue>
8437                <enumeratedValue>
8438                  <name>1</name>
8439                  <description>Accesses from this master are not forced to user-mode.</description>
8440                  <value>#1</value>
8441                </enumeratedValue>
8442              </enumeratedValues>
8443            </field>
8444            <field>
8445              <name>MTW1</name>
8446              <description>Master 1 Trusted for Writes</description>
8447              <bitOffset>25</bitOffset>
8448              <bitWidth>1</bitWidth>
8449              <access>read-write</access>
8450              <enumeratedValues>
8451                <enumeratedValue>
8452                  <name>0</name>
8453                  <description>This master is not trusted for write accesses.</description>
8454                  <value>#0</value>
8455                </enumeratedValue>
8456                <enumeratedValue>
8457                  <name>1</name>
8458                  <description>This master is trusted for write accesses.</description>
8459                  <value>#1</value>
8460                </enumeratedValue>
8461              </enumeratedValues>
8462            </field>
8463            <field>
8464              <name>MTR1</name>
8465              <description>Master 1 Trusted for Read</description>
8466              <bitOffset>26</bitOffset>
8467              <bitWidth>1</bitWidth>
8468              <access>read-write</access>
8469              <enumeratedValues>
8470                <enumeratedValue>
8471                  <name>0</name>
8472                  <description>This master is not trusted for read accesses.</description>
8473                  <value>#0</value>
8474                </enumeratedValue>
8475                <enumeratedValue>
8476                  <name>1</name>
8477                  <description>This master is trusted for read accesses.</description>
8478                  <value>#1</value>
8479                </enumeratedValue>
8480              </enumeratedValues>
8481            </field>
8482            <field>
8483              <name>MPL0</name>
8484              <description>Master 0 Privilege Level</description>
8485              <bitOffset>28</bitOffset>
8486              <bitWidth>1</bitWidth>
8487              <access>read-write</access>
8488              <enumeratedValues>
8489                <enumeratedValue>
8490                  <name>0</name>
8491                  <description>Accesses from this master are forced to user-mode.</description>
8492                  <value>#0</value>
8493                </enumeratedValue>
8494                <enumeratedValue>
8495                  <name>1</name>
8496                  <description>Accesses from this master are not forced to user-mode.</description>
8497                  <value>#1</value>
8498                </enumeratedValue>
8499              </enumeratedValues>
8500            </field>
8501            <field>
8502              <name>MTW0</name>
8503              <description>Master 0 Trusted For Writes</description>
8504              <bitOffset>29</bitOffset>
8505              <bitWidth>1</bitWidth>
8506              <access>read-write</access>
8507              <enumeratedValues>
8508                <enumeratedValue>
8509                  <name>0</name>
8510                  <description>This master is not trusted for write accesses.</description>
8511                  <value>#0</value>
8512                </enumeratedValue>
8513                <enumeratedValue>
8514                  <name>1</name>
8515                  <description>This master is trusted for write accesses.</description>
8516                  <value>#1</value>
8517                </enumeratedValue>
8518              </enumeratedValues>
8519            </field>
8520            <field>
8521              <name>MTR0</name>
8522              <description>Master 0 Trusted For Read</description>
8523              <bitOffset>30</bitOffset>
8524              <bitWidth>1</bitWidth>
8525              <access>read-write</access>
8526              <enumeratedValues>
8527                <enumeratedValue>
8528                  <name>0</name>
8529                  <description>This master is not trusted for read accesses.</description>
8530                  <value>#0</value>
8531                </enumeratedValue>
8532                <enumeratedValue>
8533                  <name>1</name>
8534                  <description>This master is trusted for read accesses.</description>
8535                  <value>#1</value>
8536                </enumeratedValue>
8537              </enumeratedValues>
8538            </field>
8539          </fields>
8540        </register>
8541        <register>
8542          <name>PACRA</name>
8543          <description>Peripheral Access Control Register</description>
8544          <addressOffset>0x20</addressOffset>
8545          <size>32</size>
8546          <access>read-write</access>
8547          <resetValue>0x40000000</resetValue>
8548          <resetMask>0xFFFFFFFF</resetMask>
8549          <fields>
8550            <field>
8551              <name>TP7</name>
8552              <description>Trusted Protect</description>
8553              <bitOffset>0</bitOffset>
8554              <bitWidth>1</bitWidth>
8555              <access>read-write</access>
8556              <enumeratedValues>
8557                <enumeratedValue>
8558                  <name>0</name>
8559                  <description>Accesses from an untrusted master are allowed.</description>
8560                  <value>#0</value>
8561                </enumeratedValue>
8562                <enumeratedValue>
8563                  <name>1</name>
8564                  <description>Accesses from an untrusted master are not allowed.</description>
8565                  <value>#1</value>
8566                </enumeratedValue>
8567              </enumeratedValues>
8568            </field>
8569            <field>
8570              <name>WP7</name>
8571              <description>Write Protect</description>
8572              <bitOffset>1</bitOffset>
8573              <bitWidth>1</bitWidth>
8574              <access>read-write</access>
8575              <enumeratedValues>
8576                <enumeratedValue>
8577                  <name>0</name>
8578                  <description>This peripheral allows write accesses.</description>
8579                  <value>#0</value>
8580                </enumeratedValue>
8581                <enumeratedValue>
8582                  <name>1</name>
8583                  <description>This peripheral is write protected.</description>
8584                  <value>#1</value>
8585                </enumeratedValue>
8586              </enumeratedValues>
8587            </field>
8588            <field>
8589              <name>SP7</name>
8590              <description>Supervisor Protect</description>
8591              <bitOffset>2</bitOffset>
8592              <bitWidth>1</bitWidth>
8593              <access>read-write</access>
8594              <enumeratedValues>
8595                <enumeratedValue>
8596                  <name>0</name>
8597                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
8598                  <value>#0</value>
8599                </enumeratedValue>
8600                <enumeratedValue>
8601                  <name>1</name>
8602                  <description>This peripheral requires supervisor privilege level for accesses.</description>
8603                  <value>#1</value>
8604                </enumeratedValue>
8605              </enumeratedValues>
8606            </field>
8607            <field>
8608              <name>TP6</name>
8609              <description>Trusted Protect</description>
8610              <bitOffset>4</bitOffset>
8611              <bitWidth>1</bitWidth>
8612              <access>read-write</access>
8613              <enumeratedValues>
8614                <enumeratedValue>
8615                  <name>0</name>
8616                  <description>Accesses from an untrusted master are allowed.</description>
8617                  <value>#0</value>
8618                </enumeratedValue>
8619                <enumeratedValue>
8620                  <name>1</name>
8621                  <description>Accesses from an untrusted master are not allowed.</description>
8622                  <value>#1</value>
8623                </enumeratedValue>
8624              </enumeratedValues>
8625            </field>
8626            <field>
8627              <name>WP6</name>
8628              <description>Write Protect</description>
8629              <bitOffset>5</bitOffset>
8630              <bitWidth>1</bitWidth>
8631              <access>read-write</access>
8632              <enumeratedValues>
8633                <enumeratedValue>
8634                  <name>0</name>
8635                  <description>This peripheral allows write accesses.</description>
8636                  <value>#0</value>
8637                </enumeratedValue>
8638                <enumeratedValue>
8639                  <name>1</name>
8640                  <description>This peripheral is write protected.</description>
8641                  <value>#1</value>
8642                </enumeratedValue>
8643              </enumeratedValues>
8644            </field>
8645            <field>
8646              <name>SP6</name>
8647              <description>Supervisor Protect</description>
8648              <bitOffset>6</bitOffset>
8649              <bitWidth>1</bitWidth>
8650              <access>read-write</access>
8651              <enumeratedValues>
8652                <enumeratedValue>
8653                  <name>0</name>
8654                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
8655                  <value>#0</value>
8656                </enumeratedValue>
8657                <enumeratedValue>
8658                  <name>1</name>
8659                  <description>This peripheral requires supervisor privilege level for accesses.</description>
8660                  <value>#1</value>
8661                </enumeratedValue>
8662              </enumeratedValues>
8663            </field>
8664            <field>
8665              <name>TP5</name>
8666              <description>Trusted Protect</description>
8667              <bitOffset>8</bitOffset>
8668              <bitWidth>1</bitWidth>
8669              <access>read-write</access>
8670              <enumeratedValues>
8671                <enumeratedValue>
8672                  <name>0</name>
8673                  <description>Accesses from an untrusted master are allowed.</description>
8674                  <value>#0</value>
8675                </enumeratedValue>
8676                <enumeratedValue>
8677                  <name>1</name>
8678                  <description>Accesses from an untrusted master are not allowed.</description>
8679                  <value>#1</value>
8680                </enumeratedValue>
8681              </enumeratedValues>
8682            </field>
8683            <field>
8684              <name>WP5</name>
8685              <description>Write Protect</description>
8686              <bitOffset>9</bitOffset>
8687              <bitWidth>1</bitWidth>
8688              <access>read-write</access>
8689              <enumeratedValues>
8690                <enumeratedValue>
8691                  <name>0</name>
8692                  <description>This peripheral allows write accesses.</description>
8693                  <value>#0</value>
8694                </enumeratedValue>
8695                <enumeratedValue>
8696                  <name>1</name>
8697                  <description>This peripheral is write protected.</description>
8698                  <value>#1</value>
8699                </enumeratedValue>
8700              </enumeratedValues>
8701            </field>
8702            <field>
8703              <name>SP5</name>
8704              <description>Supervisor Protect</description>
8705              <bitOffset>10</bitOffset>
8706              <bitWidth>1</bitWidth>
8707              <access>read-write</access>
8708              <enumeratedValues>
8709                <enumeratedValue>
8710                  <name>0</name>
8711                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
8712                  <value>#0</value>
8713                </enumeratedValue>
8714                <enumeratedValue>
8715                  <name>1</name>
8716                  <description>This peripheral requires supervisor privilege level for accesses.</description>
8717                  <value>#1</value>
8718                </enumeratedValue>
8719              </enumeratedValues>
8720            </field>
8721            <field>
8722              <name>TP4</name>
8723              <description>Trusted Protect</description>
8724              <bitOffset>12</bitOffset>
8725              <bitWidth>1</bitWidth>
8726              <access>read-write</access>
8727              <enumeratedValues>
8728                <enumeratedValue>
8729                  <name>0</name>
8730                  <description>Accesses from an untrusted master are allowed.</description>
8731                  <value>#0</value>
8732                </enumeratedValue>
8733                <enumeratedValue>
8734                  <name>1</name>
8735                  <description>Accesses from an untrusted master are not allowed.</description>
8736                  <value>#1</value>
8737                </enumeratedValue>
8738              </enumeratedValues>
8739            </field>
8740            <field>
8741              <name>WP4</name>
8742              <description>Write Protect</description>
8743              <bitOffset>13</bitOffset>
8744              <bitWidth>1</bitWidth>
8745              <access>read-write</access>
8746              <enumeratedValues>
8747                <enumeratedValue>
8748                  <name>0</name>
8749                  <description>This peripheral allows write accesses.</description>
8750                  <value>#0</value>
8751                </enumeratedValue>
8752                <enumeratedValue>
8753                  <name>1</name>
8754                  <description>This peripheral is write protected.</description>
8755                  <value>#1</value>
8756                </enumeratedValue>
8757              </enumeratedValues>
8758            </field>
8759            <field>
8760              <name>SP4</name>
8761              <description>Supervisor Protect</description>
8762              <bitOffset>14</bitOffset>
8763              <bitWidth>1</bitWidth>
8764              <access>read-write</access>
8765              <enumeratedValues>
8766                <enumeratedValue>
8767                  <name>0</name>
8768                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
8769                  <value>#0</value>
8770                </enumeratedValue>
8771                <enumeratedValue>
8772                  <name>1</name>
8773                  <description>This peripheral requires supervisor privilege level for accesses.</description>
8774                  <value>#1</value>
8775                </enumeratedValue>
8776              </enumeratedValues>
8777            </field>
8778            <field>
8779              <name>TP3</name>
8780              <description>Trusted Protect</description>
8781              <bitOffset>16</bitOffset>
8782              <bitWidth>1</bitWidth>
8783              <access>read-write</access>
8784              <enumeratedValues>
8785                <enumeratedValue>
8786                  <name>0</name>
8787                  <description>Accesses from an untrusted master are allowed.</description>
8788                  <value>#0</value>
8789                </enumeratedValue>
8790                <enumeratedValue>
8791                  <name>1</name>
8792                  <description>Accesses from an untrusted master are not allowed.</description>
8793                  <value>#1</value>
8794                </enumeratedValue>
8795              </enumeratedValues>
8796            </field>
8797            <field>
8798              <name>WP3</name>
8799              <description>Write Protect</description>
8800              <bitOffset>17</bitOffset>
8801              <bitWidth>1</bitWidth>
8802              <access>read-write</access>
8803              <enumeratedValues>
8804                <enumeratedValue>
8805                  <name>0</name>
8806                  <description>This peripheral allows write accesses.</description>
8807                  <value>#0</value>
8808                </enumeratedValue>
8809                <enumeratedValue>
8810                  <name>1</name>
8811                  <description>This peripheral is write protected.</description>
8812                  <value>#1</value>
8813                </enumeratedValue>
8814              </enumeratedValues>
8815            </field>
8816            <field>
8817              <name>SP3</name>
8818              <description>Supervisor Protect</description>
8819              <bitOffset>18</bitOffset>
8820              <bitWidth>1</bitWidth>
8821              <access>read-write</access>
8822              <enumeratedValues>
8823                <enumeratedValue>
8824                  <name>0</name>
8825                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
8826                  <value>#0</value>
8827                </enumeratedValue>
8828                <enumeratedValue>
8829                  <name>1</name>
8830                  <description>This peripheral requires supervisor privilege level for accesses.</description>
8831                  <value>#1</value>
8832                </enumeratedValue>
8833              </enumeratedValues>
8834            </field>
8835            <field>
8836              <name>TP2</name>
8837              <description>Trusted Protect</description>
8838              <bitOffset>20</bitOffset>
8839              <bitWidth>1</bitWidth>
8840              <access>read-write</access>
8841              <enumeratedValues>
8842                <enumeratedValue>
8843                  <name>0</name>
8844                  <description>Accesses from an untrusted master are allowed.</description>
8845                  <value>#0</value>
8846                </enumeratedValue>
8847                <enumeratedValue>
8848                  <name>1</name>
8849                  <description>Accesses from an untrusted master are not allowed.</description>
8850                  <value>#1</value>
8851                </enumeratedValue>
8852              </enumeratedValues>
8853            </field>
8854            <field>
8855              <name>WP2</name>
8856              <description>Write Protect</description>
8857              <bitOffset>21</bitOffset>
8858              <bitWidth>1</bitWidth>
8859              <access>read-write</access>
8860              <enumeratedValues>
8861                <enumeratedValue>
8862                  <name>0</name>
8863                  <description>This peripheral allows write accesses.</description>
8864                  <value>#0</value>
8865                </enumeratedValue>
8866                <enumeratedValue>
8867                  <name>1</name>
8868                  <description>This peripheral is write protected.</description>
8869                  <value>#1</value>
8870                </enumeratedValue>
8871              </enumeratedValues>
8872            </field>
8873            <field>
8874              <name>SP2</name>
8875              <description>Supervisor Protect</description>
8876              <bitOffset>22</bitOffset>
8877              <bitWidth>1</bitWidth>
8878              <access>read-write</access>
8879              <enumeratedValues>
8880                <enumeratedValue>
8881                  <name>0</name>
8882                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
8883                  <value>#0</value>
8884                </enumeratedValue>
8885                <enumeratedValue>
8886                  <name>1</name>
8887                  <description>This peripheral requires supervisor privilege level for accesses.</description>
8888                  <value>#1</value>
8889                </enumeratedValue>
8890              </enumeratedValues>
8891            </field>
8892            <field>
8893              <name>TP1</name>
8894              <description>Trusted Protect</description>
8895              <bitOffset>24</bitOffset>
8896              <bitWidth>1</bitWidth>
8897              <access>read-write</access>
8898              <enumeratedValues>
8899                <enumeratedValue>
8900                  <name>0</name>
8901                  <description>Accesses from an untrusted master are allowed.</description>
8902                  <value>#0</value>
8903                </enumeratedValue>
8904                <enumeratedValue>
8905                  <name>1</name>
8906                  <description>Accesses from an untrusted master are not allowed.</description>
8907                  <value>#1</value>
8908                </enumeratedValue>
8909              </enumeratedValues>
8910            </field>
8911            <field>
8912              <name>WP1</name>
8913              <description>Write Protect</description>
8914              <bitOffset>25</bitOffset>
8915              <bitWidth>1</bitWidth>
8916              <access>read-write</access>
8917              <enumeratedValues>
8918                <enumeratedValue>
8919                  <name>0</name>
8920                  <description>This peripheral allows write accesses.</description>
8921                  <value>#0</value>
8922                </enumeratedValue>
8923                <enumeratedValue>
8924                  <name>1</name>
8925                  <description>This peripheral is write protected.</description>
8926                  <value>#1</value>
8927                </enumeratedValue>
8928              </enumeratedValues>
8929            </field>
8930            <field>
8931              <name>SP1</name>
8932              <description>Supervisor Protect</description>
8933              <bitOffset>26</bitOffset>
8934              <bitWidth>1</bitWidth>
8935              <access>read-write</access>
8936              <enumeratedValues>
8937                <enumeratedValue>
8938                  <name>0</name>
8939                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
8940                  <value>#0</value>
8941                </enumeratedValue>
8942                <enumeratedValue>
8943                  <name>1</name>
8944                  <description>This peripheral requires supervisor privilege level for accesses.</description>
8945                  <value>#1</value>
8946                </enumeratedValue>
8947              </enumeratedValues>
8948            </field>
8949            <field>
8950              <name>TP0</name>
8951              <description>Trusted Protect</description>
8952              <bitOffset>28</bitOffset>
8953              <bitWidth>1</bitWidth>
8954              <access>read-write</access>
8955              <enumeratedValues>
8956                <enumeratedValue>
8957                  <name>0</name>
8958                  <description>Accesses from an untrusted master are allowed.</description>
8959                  <value>#0</value>
8960                </enumeratedValue>
8961                <enumeratedValue>
8962                  <name>1</name>
8963                  <description>Accesses from an untrusted master are not allowed.</description>
8964                  <value>#1</value>
8965                </enumeratedValue>
8966              </enumeratedValues>
8967            </field>
8968            <field>
8969              <name>WP0</name>
8970              <description>Write Protect</description>
8971              <bitOffset>29</bitOffset>
8972              <bitWidth>1</bitWidth>
8973              <access>read-write</access>
8974              <enumeratedValues>
8975                <enumeratedValue>
8976                  <name>0</name>
8977                  <description>This peripheral allows write accesses.</description>
8978                  <value>#0</value>
8979                </enumeratedValue>
8980                <enumeratedValue>
8981                  <name>1</name>
8982                  <description>This peripheral is write protected.</description>
8983                  <value>#1</value>
8984                </enumeratedValue>
8985              </enumeratedValues>
8986            </field>
8987            <field>
8988              <name>SP0</name>
8989              <description>Supervisor Protect</description>
8990              <bitOffset>30</bitOffset>
8991              <bitWidth>1</bitWidth>
8992              <access>read-write</access>
8993              <enumeratedValues>
8994                <enumeratedValue>
8995                  <name>0</name>
8996                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
8997                  <value>#0</value>
8998                </enumeratedValue>
8999                <enumeratedValue>
9000                  <name>1</name>
9001                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9002                  <value>#1</value>
9003                </enumeratedValue>
9004              </enumeratedValues>
9005            </field>
9006          </fields>
9007        </register>
9008        <register>
9009          <name>PACRB</name>
9010          <description>Peripheral Access Control Register</description>
9011          <addressOffset>0x24</addressOffset>
9012          <size>32</size>
9013          <access>read-write</access>
9014          <resetValue>0</resetValue>
9015          <resetMask>0xFFFFFFFF</resetMask>
9016          <fields>
9017            <field>
9018              <name>TP7</name>
9019              <description>Trusted Protect</description>
9020              <bitOffset>0</bitOffset>
9021              <bitWidth>1</bitWidth>
9022              <access>read-write</access>
9023              <enumeratedValues>
9024                <enumeratedValue>
9025                  <name>0</name>
9026                  <description>Accesses from an untrusted master are allowed.</description>
9027                  <value>#0</value>
9028                </enumeratedValue>
9029                <enumeratedValue>
9030                  <name>1</name>
9031                  <description>Accesses from an untrusted master are not allowed.</description>
9032                  <value>#1</value>
9033                </enumeratedValue>
9034              </enumeratedValues>
9035            </field>
9036            <field>
9037              <name>WP7</name>
9038              <description>Write Protect</description>
9039              <bitOffset>1</bitOffset>
9040              <bitWidth>1</bitWidth>
9041              <access>read-write</access>
9042              <enumeratedValues>
9043                <enumeratedValue>
9044                  <name>0</name>
9045                  <description>This peripheral allows write accesses.</description>
9046                  <value>#0</value>
9047                </enumeratedValue>
9048                <enumeratedValue>
9049                  <name>1</name>
9050                  <description>This peripheral is write protected.</description>
9051                  <value>#1</value>
9052                </enumeratedValue>
9053              </enumeratedValues>
9054            </field>
9055            <field>
9056              <name>SP7</name>
9057              <description>Supervisor Protect</description>
9058              <bitOffset>2</bitOffset>
9059              <bitWidth>1</bitWidth>
9060              <access>read-write</access>
9061              <enumeratedValues>
9062                <enumeratedValue>
9063                  <name>0</name>
9064                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9065                  <value>#0</value>
9066                </enumeratedValue>
9067                <enumeratedValue>
9068                  <name>1</name>
9069                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9070                  <value>#1</value>
9071                </enumeratedValue>
9072              </enumeratedValues>
9073            </field>
9074            <field>
9075              <name>TP6</name>
9076              <description>Trusted Protect</description>
9077              <bitOffset>4</bitOffset>
9078              <bitWidth>1</bitWidth>
9079              <access>read-write</access>
9080              <enumeratedValues>
9081                <enumeratedValue>
9082                  <name>0</name>
9083                  <description>Accesses from an untrusted master are allowed.</description>
9084                  <value>#0</value>
9085                </enumeratedValue>
9086                <enumeratedValue>
9087                  <name>1</name>
9088                  <description>Accesses from an untrusted master are not allowed.</description>
9089                  <value>#1</value>
9090                </enumeratedValue>
9091              </enumeratedValues>
9092            </field>
9093            <field>
9094              <name>WP6</name>
9095              <description>Write Protect</description>
9096              <bitOffset>5</bitOffset>
9097              <bitWidth>1</bitWidth>
9098              <access>read-write</access>
9099              <enumeratedValues>
9100                <enumeratedValue>
9101                  <name>0</name>
9102                  <description>This peripheral allows write accesses.</description>
9103                  <value>#0</value>
9104                </enumeratedValue>
9105                <enumeratedValue>
9106                  <name>1</name>
9107                  <description>This peripheral is write protected.</description>
9108                  <value>#1</value>
9109                </enumeratedValue>
9110              </enumeratedValues>
9111            </field>
9112            <field>
9113              <name>SP6</name>
9114              <description>Supervisor Protect</description>
9115              <bitOffset>6</bitOffset>
9116              <bitWidth>1</bitWidth>
9117              <access>read-write</access>
9118              <enumeratedValues>
9119                <enumeratedValue>
9120                  <name>0</name>
9121                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9122                  <value>#0</value>
9123                </enumeratedValue>
9124                <enumeratedValue>
9125                  <name>1</name>
9126                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9127                  <value>#1</value>
9128                </enumeratedValue>
9129              </enumeratedValues>
9130            </field>
9131            <field>
9132              <name>TP5</name>
9133              <description>Trusted Protect</description>
9134              <bitOffset>8</bitOffset>
9135              <bitWidth>1</bitWidth>
9136              <access>read-write</access>
9137              <enumeratedValues>
9138                <enumeratedValue>
9139                  <name>0</name>
9140                  <description>Accesses from an untrusted master are allowed.</description>
9141                  <value>#0</value>
9142                </enumeratedValue>
9143                <enumeratedValue>
9144                  <name>1</name>
9145                  <description>Accesses from an untrusted master are not allowed.</description>
9146                  <value>#1</value>
9147                </enumeratedValue>
9148              </enumeratedValues>
9149            </field>
9150            <field>
9151              <name>WP5</name>
9152              <description>Write Protect</description>
9153              <bitOffset>9</bitOffset>
9154              <bitWidth>1</bitWidth>
9155              <access>read-write</access>
9156              <enumeratedValues>
9157                <enumeratedValue>
9158                  <name>0</name>
9159                  <description>This peripheral allows write accesses.</description>
9160                  <value>#0</value>
9161                </enumeratedValue>
9162                <enumeratedValue>
9163                  <name>1</name>
9164                  <description>This peripheral is write protected.</description>
9165                  <value>#1</value>
9166                </enumeratedValue>
9167              </enumeratedValues>
9168            </field>
9169            <field>
9170              <name>SP5</name>
9171              <description>Supervisor Protect</description>
9172              <bitOffset>10</bitOffset>
9173              <bitWidth>1</bitWidth>
9174              <access>read-write</access>
9175              <enumeratedValues>
9176                <enumeratedValue>
9177                  <name>0</name>
9178                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9179                  <value>#0</value>
9180                </enumeratedValue>
9181                <enumeratedValue>
9182                  <name>1</name>
9183                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9184                  <value>#1</value>
9185                </enumeratedValue>
9186              </enumeratedValues>
9187            </field>
9188            <field>
9189              <name>TP4</name>
9190              <description>Trusted Protect</description>
9191              <bitOffset>12</bitOffset>
9192              <bitWidth>1</bitWidth>
9193              <access>read-write</access>
9194              <enumeratedValues>
9195                <enumeratedValue>
9196                  <name>0</name>
9197                  <description>Accesses from an untrusted master are allowed.</description>
9198                  <value>#0</value>
9199                </enumeratedValue>
9200                <enumeratedValue>
9201                  <name>1</name>
9202                  <description>Accesses from an untrusted master are not allowed.</description>
9203                  <value>#1</value>
9204                </enumeratedValue>
9205              </enumeratedValues>
9206            </field>
9207            <field>
9208              <name>WP4</name>
9209              <description>Write Protect</description>
9210              <bitOffset>13</bitOffset>
9211              <bitWidth>1</bitWidth>
9212              <access>read-write</access>
9213              <enumeratedValues>
9214                <enumeratedValue>
9215                  <name>0</name>
9216                  <description>This peripheral allows write accesses.</description>
9217                  <value>#0</value>
9218                </enumeratedValue>
9219                <enumeratedValue>
9220                  <name>1</name>
9221                  <description>This peripheral is write protected.</description>
9222                  <value>#1</value>
9223                </enumeratedValue>
9224              </enumeratedValues>
9225            </field>
9226            <field>
9227              <name>SP4</name>
9228              <description>Supervisor Protect</description>
9229              <bitOffset>14</bitOffset>
9230              <bitWidth>1</bitWidth>
9231              <access>read-write</access>
9232              <enumeratedValues>
9233                <enumeratedValue>
9234                  <name>0</name>
9235                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9236                  <value>#0</value>
9237                </enumeratedValue>
9238                <enumeratedValue>
9239                  <name>1</name>
9240                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9241                  <value>#1</value>
9242                </enumeratedValue>
9243              </enumeratedValues>
9244            </field>
9245            <field>
9246              <name>TP3</name>
9247              <description>Trusted Protect</description>
9248              <bitOffset>16</bitOffset>
9249              <bitWidth>1</bitWidth>
9250              <access>read-write</access>
9251              <enumeratedValues>
9252                <enumeratedValue>
9253                  <name>0</name>
9254                  <description>Accesses from an untrusted master are allowed.</description>
9255                  <value>#0</value>
9256                </enumeratedValue>
9257                <enumeratedValue>
9258                  <name>1</name>
9259                  <description>Accesses from an untrusted master are not allowed.</description>
9260                  <value>#1</value>
9261                </enumeratedValue>
9262              </enumeratedValues>
9263            </field>
9264            <field>
9265              <name>WP3</name>
9266              <description>Write Protect</description>
9267              <bitOffset>17</bitOffset>
9268              <bitWidth>1</bitWidth>
9269              <access>read-write</access>
9270              <enumeratedValues>
9271                <enumeratedValue>
9272                  <name>0</name>
9273                  <description>This peripheral allows write accesses.</description>
9274                  <value>#0</value>
9275                </enumeratedValue>
9276                <enumeratedValue>
9277                  <name>1</name>
9278                  <description>This peripheral is write protected.</description>
9279                  <value>#1</value>
9280                </enumeratedValue>
9281              </enumeratedValues>
9282            </field>
9283            <field>
9284              <name>SP3</name>
9285              <description>Supervisor Protect</description>
9286              <bitOffset>18</bitOffset>
9287              <bitWidth>1</bitWidth>
9288              <access>read-write</access>
9289              <enumeratedValues>
9290                <enumeratedValue>
9291                  <name>0</name>
9292                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9293                  <value>#0</value>
9294                </enumeratedValue>
9295                <enumeratedValue>
9296                  <name>1</name>
9297                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9298                  <value>#1</value>
9299                </enumeratedValue>
9300              </enumeratedValues>
9301            </field>
9302            <field>
9303              <name>TP2</name>
9304              <description>Trusted Protect</description>
9305              <bitOffset>20</bitOffset>
9306              <bitWidth>1</bitWidth>
9307              <access>read-write</access>
9308              <enumeratedValues>
9309                <enumeratedValue>
9310                  <name>0</name>
9311                  <description>Accesses from an untrusted master are allowed.</description>
9312                  <value>#0</value>
9313                </enumeratedValue>
9314                <enumeratedValue>
9315                  <name>1</name>
9316                  <description>Accesses from an untrusted master are not allowed.</description>
9317                  <value>#1</value>
9318                </enumeratedValue>
9319              </enumeratedValues>
9320            </field>
9321            <field>
9322              <name>WP2</name>
9323              <description>Write Protect</description>
9324              <bitOffset>21</bitOffset>
9325              <bitWidth>1</bitWidth>
9326              <access>read-write</access>
9327              <enumeratedValues>
9328                <enumeratedValue>
9329                  <name>0</name>
9330                  <description>This peripheral allows write accesses.</description>
9331                  <value>#0</value>
9332                </enumeratedValue>
9333                <enumeratedValue>
9334                  <name>1</name>
9335                  <description>This peripheral is write protected.</description>
9336                  <value>#1</value>
9337                </enumeratedValue>
9338              </enumeratedValues>
9339            </field>
9340            <field>
9341              <name>SP2</name>
9342              <description>Supervisor Protect</description>
9343              <bitOffset>22</bitOffset>
9344              <bitWidth>1</bitWidth>
9345              <access>read-write</access>
9346              <enumeratedValues>
9347                <enumeratedValue>
9348                  <name>0</name>
9349                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9350                  <value>#0</value>
9351                </enumeratedValue>
9352                <enumeratedValue>
9353                  <name>1</name>
9354                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9355                  <value>#1</value>
9356                </enumeratedValue>
9357              </enumeratedValues>
9358            </field>
9359            <field>
9360              <name>TP1</name>
9361              <description>Trusted Protect</description>
9362              <bitOffset>24</bitOffset>
9363              <bitWidth>1</bitWidth>
9364              <access>read-write</access>
9365              <enumeratedValues>
9366                <enumeratedValue>
9367                  <name>0</name>
9368                  <description>Accesses from an untrusted master are allowed.</description>
9369                  <value>#0</value>
9370                </enumeratedValue>
9371                <enumeratedValue>
9372                  <name>1</name>
9373                  <description>Accesses from an untrusted master are not allowed.</description>
9374                  <value>#1</value>
9375                </enumeratedValue>
9376              </enumeratedValues>
9377            </field>
9378            <field>
9379              <name>WP1</name>
9380              <description>Write Protect</description>
9381              <bitOffset>25</bitOffset>
9382              <bitWidth>1</bitWidth>
9383              <access>read-write</access>
9384              <enumeratedValues>
9385                <enumeratedValue>
9386                  <name>0</name>
9387                  <description>This peripheral allows write accesses.</description>
9388                  <value>#0</value>
9389                </enumeratedValue>
9390                <enumeratedValue>
9391                  <name>1</name>
9392                  <description>This peripheral is write protected.</description>
9393                  <value>#1</value>
9394                </enumeratedValue>
9395              </enumeratedValues>
9396            </field>
9397            <field>
9398              <name>SP1</name>
9399              <description>Supervisor Protect</description>
9400              <bitOffset>26</bitOffset>
9401              <bitWidth>1</bitWidth>
9402              <access>read-write</access>
9403              <enumeratedValues>
9404                <enumeratedValue>
9405                  <name>0</name>
9406                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9407                  <value>#0</value>
9408                </enumeratedValue>
9409                <enumeratedValue>
9410                  <name>1</name>
9411                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9412                  <value>#1</value>
9413                </enumeratedValue>
9414              </enumeratedValues>
9415            </field>
9416            <field>
9417              <name>TP0</name>
9418              <description>Trusted Protect</description>
9419              <bitOffset>28</bitOffset>
9420              <bitWidth>1</bitWidth>
9421              <access>read-write</access>
9422              <enumeratedValues>
9423                <enumeratedValue>
9424                  <name>0</name>
9425                  <description>Accesses from an untrusted master are allowed.</description>
9426                  <value>#0</value>
9427                </enumeratedValue>
9428                <enumeratedValue>
9429                  <name>1</name>
9430                  <description>Accesses from an untrusted master are not allowed.</description>
9431                  <value>#1</value>
9432                </enumeratedValue>
9433              </enumeratedValues>
9434            </field>
9435            <field>
9436              <name>WP0</name>
9437              <description>Write Protect</description>
9438              <bitOffset>29</bitOffset>
9439              <bitWidth>1</bitWidth>
9440              <access>read-write</access>
9441              <enumeratedValues>
9442                <enumeratedValue>
9443                  <name>0</name>
9444                  <description>This peripheral allows write accesses.</description>
9445                  <value>#0</value>
9446                </enumeratedValue>
9447                <enumeratedValue>
9448                  <name>1</name>
9449                  <description>This peripheral is write protected.</description>
9450                  <value>#1</value>
9451                </enumeratedValue>
9452              </enumeratedValues>
9453            </field>
9454            <field>
9455              <name>SP0</name>
9456              <description>Supervisor Protect</description>
9457              <bitOffset>30</bitOffset>
9458              <bitWidth>1</bitWidth>
9459              <access>read-write</access>
9460              <enumeratedValues>
9461                <enumeratedValue>
9462                  <name>0</name>
9463                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9464                  <value>#0</value>
9465                </enumeratedValue>
9466                <enumeratedValue>
9467                  <name>1</name>
9468                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9469                  <value>#1</value>
9470                </enumeratedValue>
9471              </enumeratedValues>
9472            </field>
9473          </fields>
9474        </register>
9475        <register>
9476          <name>PACRC</name>
9477          <description>Peripheral Access Control Register</description>
9478          <addressOffset>0x28</addressOffset>
9479          <size>32</size>
9480          <access>read-write</access>
9481          <resetValue>0</resetValue>
9482          <resetMask>0xFFFFFFFF</resetMask>
9483          <fields>
9484            <field>
9485              <name>TP7</name>
9486              <description>Trusted Protect</description>
9487              <bitOffset>0</bitOffset>
9488              <bitWidth>1</bitWidth>
9489              <access>read-write</access>
9490              <enumeratedValues>
9491                <enumeratedValue>
9492                  <name>0</name>
9493                  <description>Accesses from an untrusted master are allowed.</description>
9494                  <value>#0</value>
9495                </enumeratedValue>
9496                <enumeratedValue>
9497                  <name>1</name>
9498                  <description>Accesses from an untrusted master are not allowed.</description>
9499                  <value>#1</value>
9500                </enumeratedValue>
9501              </enumeratedValues>
9502            </field>
9503            <field>
9504              <name>WP7</name>
9505              <description>Write Protect</description>
9506              <bitOffset>1</bitOffset>
9507              <bitWidth>1</bitWidth>
9508              <access>read-write</access>
9509              <enumeratedValues>
9510                <enumeratedValue>
9511                  <name>0</name>
9512                  <description>This peripheral allows write accesses.</description>
9513                  <value>#0</value>
9514                </enumeratedValue>
9515                <enumeratedValue>
9516                  <name>1</name>
9517                  <description>This peripheral is write protected.</description>
9518                  <value>#1</value>
9519                </enumeratedValue>
9520              </enumeratedValues>
9521            </field>
9522            <field>
9523              <name>SP7</name>
9524              <description>Supervisor Protect</description>
9525              <bitOffset>2</bitOffset>
9526              <bitWidth>1</bitWidth>
9527              <access>read-write</access>
9528              <enumeratedValues>
9529                <enumeratedValue>
9530                  <name>0</name>
9531                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9532                  <value>#0</value>
9533                </enumeratedValue>
9534                <enumeratedValue>
9535                  <name>1</name>
9536                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9537                  <value>#1</value>
9538                </enumeratedValue>
9539              </enumeratedValues>
9540            </field>
9541            <field>
9542              <name>TP6</name>
9543              <description>Trusted Protect</description>
9544              <bitOffset>4</bitOffset>
9545              <bitWidth>1</bitWidth>
9546              <access>read-write</access>
9547              <enumeratedValues>
9548                <enumeratedValue>
9549                  <name>0</name>
9550                  <description>Accesses from an untrusted master are allowed.</description>
9551                  <value>#0</value>
9552                </enumeratedValue>
9553                <enumeratedValue>
9554                  <name>1</name>
9555                  <description>Accesses from an untrusted master are not allowed.</description>
9556                  <value>#1</value>
9557                </enumeratedValue>
9558              </enumeratedValues>
9559            </field>
9560            <field>
9561              <name>WP6</name>
9562              <description>Write Protect</description>
9563              <bitOffset>5</bitOffset>
9564              <bitWidth>1</bitWidth>
9565              <access>read-write</access>
9566              <enumeratedValues>
9567                <enumeratedValue>
9568                  <name>0</name>
9569                  <description>This peripheral allows write accesses.</description>
9570                  <value>#0</value>
9571                </enumeratedValue>
9572                <enumeratedValue>
9573                  <name>1</name>
9574                  <description>This peripheral is write protected.</description>
9575                  <value>#1</value>
9576                </enumeratedValue>
9577              </enumeratedValues>
9578            </field>
9579            <field>
9580              <name>SP6</name>
9581              <description>Supervisor Protect</description>
9582              <bitOffset>6</bitOffset>
9583              <bitWidth>1</bitWidth>
9584              <access>read-write</access>
9585              <enumeratedValues>
9586                <enumeratedValue>
9587                  <name>0</name>
9588                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9589                  <value>#0</value>
9590                </enumeratedValue>
9591                <enumeratedValue>
9592                  <name>1</name>
9593                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9594                  <value>#1</value>
9595                </enumeratedValue>
9596              </enumeratedValues>
9597            </field>
9598            <field>
9599              <name>TP5</name>
9600              <description>Trusted Protect</description>
9601              <bitOffset>8</bitOffset>
9602              <bitWidth>1</bitWidth>
9603              <access>read-write</access>
9604              <enumeratedValues>
9605                <enumeratedValue>
9606                  <name>0</name>
9607                  <description>Accesses from an untrusted master are allowed.</description>
9608                  <value>#0</value>
9609                </enumeratedValue>
9610                <enumeratedValue>
9611                  <name>1</name>
9612                  <description>Accesses from an untrusted master are not allowed.</description>
9613                  <value>#1</value>
9614                </enumeratedValue>
9615              </enumeratedValues>
9616            </field>
9617            <field>
9618              <name>WP5</name>
9619              <description>Write Protect</description>
9620              <bitOffset>9</bitOffset>
9621              <bitWidth>1</bitWidth>
9622              <access>read-write</access>
9623              <enumeratedValues>
9624                <enumeratedValue>
9625                  <name>0</name>
9626                  <description>This peripheral allows write accesses.</description>
9627                  <value>#0</value>
9628                </enumeratedValue>
9629                <enumeratedValue>
9630                  <name>1</name>
9631                  <description>This peripheral is write protected.</description>
9632                  <value>#1</value>
9633                </enumeratedValue>
9634              </enumeratedValues>
9635            </field>
9636            <field>
9637              <name>SP5</name>
9638              <description>Supervisor Protect</description>
9639              <bitOffset>10</bitOffset>
9640              <bitWidth>1</bitWidth>
9641              <access>read-write</access>
9642              <enumeratedValues>
9643                <enumeratedValue>
9644                  <name>0</name>
9645                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9646                  <value>#0</value>
9647                </enumeratedValue>
9648                <enumeratedValue>
9649                  <name>1</name>
9650                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9651                  <value>#1</value>
9652                </enumeratedValue>
9653              </enumeratedValues>
9654            </field>
9655            <field>
9656              <name>TP4</name>
9657              <description>Trusted Protect</description>
9658              <bitOffset>12</bitOffset>
9659              <bitWidth>1</bitWidth>
9660              <access>read-write</access>
9661              <enumeratedValues>
9662                <enumeratedValue>
9663                  <name>0</name>
9664                  <description>Accesses from an untrusted master are allowed.</description>
9665                  <value>#0</value>
9666                </enumeratedValue>
9667                <enumeratedValue>
9668                  <name>1</name>
9669                  <description>Accesses from an untrusted master are not allowed.</description>
9670                  <value>#1</value>
9671                </enumeratedValue>
9672              </enumeratedValues>
9673            </field>
9674            <field>
9675              <name>WP4</name>
9676              <description>Write Protect</description>
9677              <bitOffset>13</bitOffset>
9678              <bitWidth>1</bitWidth>
9679              <access>read-write</access>
9680              <enumeratedValues>
9681                <enumeratedValue>
9682                  <name>0</name>
9683                  <description>This peripheral allows write accesses.</description>
9684                  <value>#0</value>
9685                </enumeratedValue>
9686                <enumeratedValue>
9687                  <name>1</name>
9688                  <description>This peripheral is write protected.</description>
9689                  <value>#1</value>
9690                </enumeratedValue>
9691              </enumeratedValues>
9692            </field>
9693            <field>
9694              <name>SP4</name>
9695              <description>Supervisor Protect</description>
9696              <bitOffset>14</bitOffset>
9697              <bitWidth>1</bitWidth>
9698              <access>read-write</access>
9699              <enumeratedValues>
9700                <enumeratedValue>
9701                  <name>0</name>
9702                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9703                  <value>#0</value>
9704                </enumeratedValue>
9705                <enumeratedValue>
9706                  <name>1</name>
9707                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9708                  <value>#1</value>
9709                </enumeratedValue>
9710              </enumeratedValues>
9711            </field>
9712            <field>
9713              <name>TP3</name>
9714              <description>Trusted Protect</description>
9715              <bitOffset>16</bitOffset>
9716              <bitWidth>1</bitWidth>
9717              <access>read-write</access>
9718              <enumeratedValues>
9719                <enumeratedValue>
9720                  <name>0</name>
9721                  <description>Accesses from an untrusted master are allowed.</description>
9722                  <value>#0</value>
9723                </enumeratedValue>
9724                <enumeratedValue>
9725                  <name>1</name>
9726                  <description>Accesses from an untrusted master are not allowed.</description>
9727                  <value>#1</value>
9728                </enumeratedValue>
9729              </enumeratedValues>
9730            </field>
9731            <field>
9732              <name>WP3</name>
9733              <description>Write Protect</description>
9734              <bitOffset>17</bitOffset>
9735              <bitWidth>1</bitWidth>
9736              <access>read-write</access>
9737              <enumeratedValues>
9738                <enumeratedValue>
9739                  <name>0</name>
9740                  <description>This peripheral allows write accesses.</description>
9741                  <value>#0</value>
9742                </enumeratedValue>
9743                <enumeratedValue>
9744                  <name>1</name>
9745                  <description>This peripheral is write protected.</description>
9746                  <value>#1</value>
9747                </enumeratedValue>
9748              </enumeratedValues>
9749            </field>
9750            <field>
9751              <name>SP3</name>
9752              <description>Supervisor Protect</description>
9753              <bitOffset>18</bitOffset>
9754              <bitWidth>1</bitWidth>
9755              <access>read-write</access>
9756              <enumeratedValues>
9757                <enumeratedValue>
9758                  <name>0</name>
9759                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9760                  <value>#0</value>
9761                </enumeratedValue>
9762                <enumeratedValue>
9763                  <name>1</name>
9764                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9765                  <value>#1</value>
9766                </enumeratedValue>
9767              </enumeratedValues>
9768            </field>
9769            <field>
9770              <name>TP2</name>
9771              <description>Trusted Protect</description>
9772              <bitOffset>20</bitOffset>
9773              <bitWidth>1</bitWidth>
9774              <access>read-write</access>
9775              <enumeratedValues>
9776                <enumeratedValue>
9777                  <name>0</name>
9778                  <description>Accesses from an untrusted master are allowed.</description>
9779                  <value>#0</value>
9780                </enumeratedValue>
9781                <enumeratedValue>
9782                  <name>1</name>
9783                  <description>Accesses from an untrusted master are not allowed.</description>
9784                  <value>#1</value>
9785                </enumeratedValue>
9786              </enumeratedValues>
9787            </field>
9788            <field>
9789              <name>WP2</name>
9790              <description>Write Protect</description>
9791              <bitOffset>21</bitOffset>
9792              <bitWidth>1</bitWidth>
9793              <access>read-write</access>
9794              <enumeratedValues>
9795                <enumeratedValue>
9796                  <name>0</name>
9797                  <description>This peripheral allows write accesses.</description>
9798                  <value>#0</value>
9799                </enumeratedValue>
9800                <enumeratedValue>
9801                  <name>1</name>
9802                  <description>This peripheral is write protected.</description>
9803                  <value>#1</value>
9804                </enumeratedValue>
9805              </enumeratedValues>
9806            </field>
9807            <field>
9808              <name>SP2</name>
9809              <description>Supervisor Protect</description>
9810              <bitOffset>22</bitOffset>
9811              <bitWidth>1</bitWidth>
9812              <access>read-write</access>
9813              <enumeratedValues>
9814                <enumeratedValue>
9815                  <name>0</name>
9816                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9817                  <value>#0</value>
9818                </enumeratedValue>
9819                <enumeratedValue>
9820                  <name>1</name>
9821                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9822                  <value>#1</value>
9823                </enumeratedValue>
9824              </enumeratedValues>
9825            </field>
9826            <field>
9827              <name>TP1</name>
9828              <description>Trusted Protect</description>
9829              <bitOffset>24</bitOffset>
9830              <bitWidth>1</bitWidth>
9831              <access>read-write</access>
9832              <enumeratedValues>
9833                <enumeratedValue>
9834                  <name>0</name>
9835                  <description>Accesses from an untrusted master are allowed.</description>
9836                  <value>#0</value>
9837                </enumeratedValue>
9838                <enumeratedValue>
9839                  <name>1</name>
9840                  <description>Accesses from an untrusted master are not allowed.</description>
9841                  <value>#1</value>
9842                </enumeratedValue>
9843              </enumeratedValues>
9844            </field>
9845            <field>
9846              <name>WP1</name>
9847              <description>Write Protect</description>
9848              <bitOffset>25</bitOffset>
9849              <bitWidth>1</bitWidth>
9850              <access>read-write</access>
9851              <enumeratedValues>
9852                <enumeratedValue>
9853                  <name>0</name>
9854                  <description>This peripheral allows write accesses.</description>
9855                  <value>#0</value>
9856                </enumeratedValue>
9857                <enumeratedValue>
9858                  <name>1</name>
9859                  <description>This peripheral is write protected.</description>
9860                  <value>#1</value>
9861                </enumeratedValue>
9862              </enumeratedValues>
9863            </field>
9864            <field>
9865              <name>SP1</name>
9866              <description>Supervisor Protect</description>
9867              <bitOffset>26</bitOffset>
9868              <bitWidth>1</bitWidth>
9869              <access>read-write</access>
9870              <enumeratedValues>
9871                <enumeratedValue>
9872                  <name>0</name>
9873                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9874                  <value>#0</value>
9875                </enumeratedValue>
9876                <enumeratedValue>
9877                  <name>1</name>
9878                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9879                  <value>#1</value>
9880                </enumeratedValue>
9881              </enumeratedValues>
9882            </field>
9883            <field>
9884              <name>TP0</name>
9885              <description>Trusted Protect</description>
9886              <bitOffset>28</bitOffset>
9887              <bitWidth>1</bitWidth>
9888              <access>read-write</access>
9889              <enumeratedValues>
9890                <enumeratedValue>
9891                  <name>0</name>
9892                  <description>Accesses from an untrusted master are allowed.</description>
9893                  <value>#0</value>
9894                </enumeratedValue>
9895                <enumeratedValue>
9896                  <name>1</name>
9897                  <description>Accesses from an untrusted master are not allowed.</description>
9898                  <value>#1</value>
9899                </enumeratedValue>
9900              </enumeratedValues>
9901            </field>
9902            <field>
9903              <name>WP0</name>
9904              <description>Write Protect</description>
9905              <bitOffset>29</bitOffset>
9906              <bitWidth>1</bitWidth>
9907              <access>read-write</access>
9908              <enumeratedValues>
9909                <enumeratedValue>
9910                  <name>0</name>
9911                  <description>This peripheral allows write accesses.</description>
9912                  <value>#0</value>
9913                </enumeratedValue>
9914                <enumeratedValue>
9915                  <name>1</name>
9916                  <description>This peripheral is write protected.</description>
9917                  <value>#1</value>
9918                </enumeratedValue>
9919              </enumeratedValues>
9920            </field>
9921            <field>
9922              <name>SP0</name>
9923              <description>Supervisor Protect</description>
9924              <bitOffset>30</bitOffset>
9925              <bitWidth>1</bitWidth>
9926              <access>read-write</access>
9927              <enumeratedValues>
9928                <enumeratedValue>
9929                  <name>0</name>
9930                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9931                  <value>#0</value>
9932                </enumeratedValue>
9933                <enumeratedValue>
9934                  <name>1</name>
9935                  <description>This peripheral requires supervisor privilege level for accesses.</description>
9936                  <value>#1</value>
9937                </enumeratedValue>
9938              </enumeratedValues>
9939            </field>
9940          </fields>
9941        </register>
9942        <register>
9943          <name>PACRD</name>
9944          <description>Peripheral Access Control Register</description>
9945          <addressOffset>0x2C</addressOffset>
9946          <size>32</size>
9947          <access>read-write</access>
9948          <resetValue>0</resetValue>
9949          <resetMask>0xFFFFFFFF</resetMask>
9950          <fields>
9951            <field>
9952              <name>TP7</name>
9953              <description>Trusted Protect</description>
9954              <bitOffset>0</bitOffset>
9955              <bitWidth>1</bitWidth>
9956              <access>read-write</access>
9957              <enumeratedValues>
9958                <enumeratedValue>
9959                  <name>0</name>
9960                  <description>Accesses from an untrusted master are allowed.</description>
9961                  <value>#0</value>
9962                </enumeratedValue>
9963                <enumeratedValue>
9964                  <name>1</name>
9965                  <description>Accesses from an untrusted master are not allowed.</description>
9966                  <value>#1</value>
9967                </enumeratedValue>
9968              </enumeratedValues>
9969            </field>
9970            <field>
9971              <name>WP7</name>
9972              <description>Write Protect</description>
9973              <bitOffset>1</bitOffset>
9974              <bitWidth>1</bitWidth>
9975              <access>read-write</access>
9976              <enumeratedValues>
9977                <enumeratedValue>
9978                  <name>0</name>
9979                  <description>This peripheral allows write accesses.</description>
9980                  <value>#0</value>
9981                </enumeratedValue>
9982                <enumeratedValue>
9983                  <name>1</name>
9984                  <description>This peripheral is write protected.</description>
9985                  <value>#1</value>
9986                </enumeratedValue>
9987              </enumeratedValues>
9988            </field>
9989            <field>
9990              <name>SP7</name>
9991              <description>Supervisor Protect</description>
9992              <bitOffset>2</bitOffset>
9993              <bitWidth>1</bitWidth>
9994              <access>read-write</access>
9995              <enumeratedValues>
9996                <enumeratedValue>
9997                  <name>0</name>
9998                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
9999                  <value>#0</value>
10000                </enumeratedValue>
10001                <enumeratedValue>
10002                  <name>1</name>
10003                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10004                  <value>#1</value>
10005                </enumeratedValue>
10006              </enumeratedValues>
10007            </field>
10008            <field>
10009              <name>TP6</name>
10010              <description>Trusted Protect</description>
10011              <bitOffset>4</bitOffset>
10012              <bitWidth>1</bitWidth>
10013              <access>read-write</access>
10014              <enumeratedValues>
10015                <enumeratedValue>
10016                  <name>0</name>
10017                  <description>Accesses from an untrusted master are allowed.</description>
10018                  <value>#0</value>
10019                </enumeratedValue>
10020                <enumeratedValue>
10021                  <name>1</name>
10022                  <description>Accesses from an untrusted master are not allowed.</description>
10023                  <value>#1</value>
10024                </enumeratedValue>
10025              </enumeratedValues>
10026            </field>
10027            <field>
10028              <name>WP6</name>
10029              <description>Write Protect</description>
10030              <bitOffset>5</bitOffset>
10031              <bitWidth>1</bitWidth>
10032              <access>read-write</access>
10033              <enumeratedValues>
10034                <enumeratedValue>
10035                  <name>0</name>
10036                  <description>This peripheral allows write accesses.</description>
10037                  <value>#0</value>
10038                </enumeratedValue>
10039                <enumeratedValue>
10040                  <name>1</name>
10041                  <description>This peripheral is write protected.</description>
10042                  <value>#1</value>
10043                </enumeratedValue>
10044              </enumeratedValues>
10045            </field>
10046            <field>
10047              <name>SP6</name>
10048              <description>Supervisor Protect</description>
10049              <bitOffset>6</bitOffset>
10050              <bitWidth>1</bitWidth>
10051              <access>read-write</access>
10052              <enumeratedValues>
10053                <enumeratedValue>
10054                  <name>0</name>
10055                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10056                  <value>#0</value>
10057                </enumeratedValue>
10058                <enumeratedValue>
10059                  <name>1</name>
10060                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10061                  <value>#1</value>
10062                </enumeratedValue>
10063              </enumeratedValues>
10064            </field>
10065            <field>
10066              <name>TP5</name>
10067              <description>Trusted Protect</description>
10068              <bitOffset>8</bitOffset>
10069              <bitWidth>1</bitWidth>
10070              <access>read-write</access>
10071              <enumeratedValues>
10072                <enumeratedValue>
10073                  <name>0</name>
10074                  <description>Accesses from an untrusted master are allowed.</description>
10075                  <value>#0</value>
10076                </enumeratedValue>
10077                <enumeratedValue>
10078                  <name>1</name>
10079                  <description>Accesses from an untrusted master are not allowed.</description>
10080                  <value>#1</value>
10081                </enumeratedValue>
10082              </enumeratedValues>
10083            </field>
10084            <field>
10085              <name>WP5</name>
10086              <description>Write Protect</description>
10087              <bitOffset>9</bitOffset>
10088              <bitWidth>1</bitWidth>
10089              <access>read-write</access>
10090              <enumeratedValues>
10091                <enumeratedValue>
10092                  <name>0</name>
10093                  <description>This peripheral allows write accesses.</description>
10094                  <value>#0</value>
10095                </enumeratedValue>
10096                <enumeratedValue>
10097                  <name>1</name>
10098                  <description>This peripheral is write protected.</description>
10099                  <value>#1</value>
10100                </enumeratedValue>
10101              </enumeratedValues>
10102            </field>
10103            <field>
10104              <name>SP5</name>
10105              <description>Supervisor Protect</description>
10106              <bitOffset>10</bitOffset>
10107              <bitWidth>1</bitWidth>
10108              <access>read-write</access>
10109              <enumeratedValues>
10110                <enumeratedValue>
10111                  <name>0</name>
10112                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10113                  <value>#0</value>
10114                </enumeratedValue>
10115                <enumeratedValue>
10116                  <name>1</name>
10117                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10118                  <value>#1</value>
10119                </enumeratedValue>
10120              </enumeratedValues>
10121            </field>
10122            <field>
10123              <name>TP4</name>
10124              <description>Trusted Protect</description>
10125              <bitOffset>12</bitOffset>
10126              <bitWidth>1</bitWidth>
10127              <access>read-write</access>
10128              <enumeratedValues>
10129                <enumeratedValue>
10130                  <name>0</name>
10131                  <description>Accesses from an untrusted master are allowed.</description>
10132                  <value>#0</value>
10133                </enumeratedValue>
10134                <enumeratedValue>
10135                  <name>1</name>
10136                  <description>Accesses from an untrusted master are not allowed.</description>
10137                  <value>#1</value>
10138                </enumeratedValue>
10139              </enumeratedValues>
10140            </field>
10141            <field>
10142              <name>WP4</name>
10143              <description>Write Protect</description>
10144              <bitOffset>13</bitOffset>
10145              <bitWidth>1</bitWidth>
10146              <access>read-write</access>
10147              <enumeratedValues>
10148                <enumeratedValue>
10149                  <name>0</name>
10150                  <description>This peripheral allows write accesses.</description>
10151                  <value>#0</value>
10152                </enumeratedValue>
10153                <enumeratedValue>
10154                  <name>1</name>
10155                  <description>This peripheral is write protected.</description>
10156                  <value>#1</value>
10157                </enumeratedValue>
10158              </enumeratedValues>
10159            </field>
10160            <field>
10161              <name>SP4</name>
10162              <description>Supervisor Protect</description>
10163              <bitOffset>14</bitOffset>
10164              <bitWidth>1</bitWidth>
10165              <access>read-write</access>
10166              <enumeratedValues>
10167                <enumeratedValue>
10168                  <name>0</name>
10169                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10170                  <value>#0</value>
10171                </enumeratedValue>
10172                <enumeratedValue>
10173                  <name>1</name>
10174                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10175                  <value>#1</value>
10176                </enumeratedValue>
10177              </enumeratedValues>
10178            </field>
10179            <field>
10180              <name>TP3</name>
10181              <description>Trusted Protect</description>
10182              <bitOffset>16</bitOffset>
10183              <bitWidth>1</bitWidth>
10184              <access>read-write</access>
10185              <enumeratedValues>
10186                <enumeratedValue>
10187                  <name>0</name>
10188                  <description>Accesses from an untrusted master are allowed.</description>
10189                  <value>#0</value>
10190                </enumeratedValue>
10191                <enumeratedValue>
10192                  <name>1</name>
10193                  <description>Accesses from an untrusted master are not allowed.</description>
10194                  <value>#1</value>
10195                </enumeratedValue>
10196              </enumeratedValues>
10197            </field>
10198            <field>
10199              <name>WP3</name>
10200              <description>Write Protect</description>
10201              <bitOffset>17</bitOffset>
10202              <bitWidth>1</bitWidth>
10203              <access>read-write</access>
10204              <enumeratedValues>
10205                <enumeratedValue>
10206                  <name>0</name>
10207                  <description>This peripheral allows write accesses.</description>
10208                  <value>#0</value>
10209                </enumeratedValue>
10210                <enumeratedValue>
10211                  <name>1</name>
10212                  <description>This peripheral is write protected.</description>
10213                  <value>#1</value>
10214                </enumeratedValue>
10215              </enumeratedValues>
10216            </field>
10217            <field>
10218              <name>SP3</name>
10219              <description>Supervisor Protect</description>
10220              <bitOffset>18</bitOffset>
10221              <bitWidth>1</bitWidth>
10222              <access>read-write</access>
10223              <enumeratedValues>
10224                <enumeratedValue>
10225                  <name>0</name>
10226                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10227                  <value>#0</value>
10228                </enumeratedValue>
10229                <enumeratedValue>
10230                  <name>1</name>
10231                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10232                  <value>#1</value>
10233                </enumeratedValue>
10234              </enumeratedValues>
10235            </field>
10236            <field>
10237              <name>TP2</name>
10238              <description>Trusted Protect</description>
10239              <bitOffset>20</bitOffset>
10240              <bitWidth>1</bitWidth>
10241              <access>read-write</access>
10242              <enumeratedValues>
10243                <enumeratedValue>
10244                  <name>0</name>
10245                  <description>Accesses from an untrusted master are allowed.</description>
10246                  <value>#0</value>
10247                </enumeratedValue>
10248                <enumeratedValue>
10249                  <name>1</name>
10250                  <description>Accesses from an untrusted master are not allowed.</description>
10251                  <value>#1</value>
10252                </enumeratedValue>
10253              </enumeratedValues>
10254            </field>
10255            <field>
10256              <name>WP2</name>
10257              <description>Write Protect</description>
10258              <bitOffset>21</bitOffset>
10259              <bitWidth>1</bitWidth>
10260              <access>read-write</access>
10261              <enumeratedValues>
10262                <enumeratedValue>
10263                  <name>0</name>
10264                  <description>This peripheral allows write accesses.</description>
10265                  <value>#0</value>
10266                </enumeratedValue>
10267                <enumeratedValue>
10268                  <name>1</name>
10269                  <description>This peripheral is write protected.</description>
10270                  <value>#1</value>
10271                </enumeratedValue>
10272              </enumeratedValues>
10273            </field>
10274            <field>
10275              <name>SP2</name>
10276              <description>Supervisor Protect</description>
10277              <bitOffset>22</bitOffset>
10278              <bitWidth>1</bitWidth>
10279              <access>read-write</access>
10280              <enumeratedValues>
10281                <enumeratedValue>
10282                  <name>0</name>
10283                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10284                  <value>#0</value>
10285                </enumeratedValue>
10286                <enumeratedValue>
10287                  <name>1</name>
10288                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10289                  <value>#1</value>
10290                </enumeratedValue>
10291              </enumeratedValues>
10292            </field>
10293            <field>
10294              <name>TP1</name>
10295              <description>Trusted Protect</description>
10296              <bitOffset>24</bitOffset>
10297              <bitWidth>1</bitWidth>
10298              <access>read-write</access>
10299              <enumeratedValues>
10300                <enumeratedValue>
10301                  <name>0</name>
10302                  <description>Accesses from an untrusted master are allowed.</description>
10303                  <value>#0</value>
10304                </enumeratedValue>
10305                <enumeratedValue>
10306                  <name>1</name>
10307                  <description>Accesses from an untrusted master are not allowed.</description>
10308                  <value>#1</value>
10309                </enumeratedValue>
10310              </enumeratedValues>
10311            </field>
10312            <field>
10313              <name>WP1</name>
10314              <description>Write Protect</description>
10315              <bitOffset>25</bitOffset>
10316              <bitWidth>1</bitWidth>
10317              <access>read-write</access>
10318              <enumeratedValues>
10319                <enumeratedValue>
10320                  <name>0</name>
10321                  <description>This peripheral allows write accesses.</description>
10322                  <value>#0</value>
10323                </enumeratedValue>
10324                <enumeratedValue>
10325                  <name>1</name>
10326                  <description>This peripheral is write protected.</description>
10327                  <value>#1</value>
10328                </enumeratedValue>
10329              </enumeratedValues>
10330            </field>
10331            <field>
10332              <name>SP1</name>
10333              <description>Supervisor Protect</description>
10334              <bitOffset>26</bitOffset>
10335              <bitWidth>1</bitWidth>
10336              <access>read-write</access>
10337              <enumeratedValues>
10338                <enumeratedValue>
10339                  <name>0</name>
10340                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10341                  <value>#0</value>
10342                </enumeratedValue>
10343                <enumeratedValue>
10344                  <name>1</name>
10345                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10346                  <value>#1</value>
10347                </enumeratedValue>
10348              </enumeratedValues>
10349            </field>
10350            <field>
10351              <name>TP0</name>
10352              <description>Trusted Protect</description>
10353              <bitOffset>28</bitOffset>
10354              <bitWidth>1</bitWidth>
10355              <access>read-write</access>
10356              <enumeratedValues>
10357                <enumeratedValue>
10358                  <name>0</name>
10359                  <description>Accesses from an untrusted master are allowed.</description>
10360                  <value>#0</value>
10361                </enumeratedValue>
10362                <enumeratedValue>
10363                  <name>1</name>
10364                  <description>Accesses from an untrusted master are not allowed.</description>
10365                  <value>#1</value>
10366                </enumeratedValue>
10367              </enumeratedValues>
10368            </field>
10369            <field>
10370              <name>WP0</name>
10371              <description>Write Protect</description>
10372              <bitOffset>29</bitOffset>
10373              <bitWidth>1</bitWidth>
10374              <access>read-write</access>
10375              <enumeratedValues>
10376                <enumeratedValue>
10377                  <name>0</name>
10378                  <description>This peripheral allows write accesses.</description>
10379                  <value>#0</value>
10380                </enumeratedValue>
10381                <enumeratedValue>
10382                  <name>1</name>
10383                  <description>This peripheral is write protected.</description>
10384                  <value>#1</value>
10385                </enumeratedValue>
10386              </enumeratedValues>
10387            </field>
10388            <field>
10389              <name>SP0</name>
10390              <description>Supervisor Protect</description>
10391              <bitOffset>30</bitOffset>
10392              <bitWidth>1</bitWidth>
10393              <access>read-write</access>
10394              <enumeratedValues>
10395                <enumeratedValue>
10396                  <name>0</name>
10397                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10398                  <value>#0</value>
10399                </enumeratedValue>
10400                <enumeratedValue>
10401                  <name>1</name>
10402                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10403                  <value>#1</value>
10404                </enumeratedValue>
10405              </enumeratedValues>
10406            </field>
10407          </fields>
10408        </register>
10409        <register>
10410          <name>PACRE</name>
10411          <description>Peripheral Access Control Register</description>
10412          <addressOffset>0x40</addressOffset>
10413          <size>32</size>
10414          <access>read-write</access>
10415          <resetValue>0x40000000</resetValue>
10416          <resetMask>0xFFFFFFFF</resetMask>
10417          <fields>
10418            <field>
10419              <name>TP7</name>
10420              <description>Trusted Protect</description>
10421              <bitOffset>0</bitOffset>
10422              <bitWidth>1</bitWidth>
10423              <access>read-write</access>
10424              <enumeratedValues>
10425                <enumeratedValue>
10426                  <name>0</name>
10427                  <description>Accesses from an untrusted master are allowed.</description>
10428                  <value>#0</value>
10429                </enumeratedValue>
10430                <enumeratedValue>
10431                  <name>1</name>
10432                  <description>Accesses from an untrusted master are not allowed.</description>
10433                  <value>#1</value>
10434                </enumeratedValue>
10435              </enumeratedValues>
10436            </field>
10437            <field>
10438              <name>WP7</name>
10439              <description>Write Protect</description>
10440              <bitOffset>1</bitOffset>
10441              <bitWidth>1</bitWidth>
10442              <access>read-write</access>
10443              <enumeratedValues>
10444                <enumeratedValue>
10445                  <name>0</name>
10446                  <description>This peripheral allows write accesses.</description>
10447                  <value>#0</value>
10448                </enumeratedValue>
10449                <enumeratedValue>
10450                  <name>1</name>
10451                  <description>This peripheral is write protected.</description>
10452                  <value>#1</value>
10453                </enumeratedValue>
10454              </enumeratedValues>
10455            </field>
10456            <field>
10457              <name>SP7</name>
10458              <description>Supervisor Protect</description>
10459              <bitOffset>2</bitOffset>
10460              <bitWidth>1</bitWidth>
10461              <access>read-write</access>
10462              <enumeratedValues>
10463                <enumeratedValue>
10464                  <name>0</name>
10465                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10466                  <value>#0</value>
10467                </enumeratedValue>
10468                <enumeratedValue>
10469                  <name>1</name>
10470                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10471                  <value>#1</value>
10472                </enumeratedValue>
10473              </enumeratedValues>
10474            </field>
10475            <field>
10476              <name>TP6</name>
10477              <description>Trusted Protect</description>
10478              <bitOffset>4</bitOffset>
10479              <bitWidth>1</bitWidth>
10480              <access>read-write</access>
10481              <enumeratedValues>
10482                <enumeratedValue>
10483                  <name>0</name>
10484                  <description>Accesses from an untrusted master are allowed.</description>
10485                  <value>#0</value>
10486                </enumeratedValue>
10487                <enumeratedValue>
10488                  <name>1</name>
10489                  <description>Accesses from an untrusted master are not allowed.</description>
10490                  <value>#1</value>
10491                </enumeratedValue>
10492              </enumeratedValues>
10493            </field>
10494            <field>
10495              <name>WP6</name>
10496              <description>Write Protect</description>
10497              <bitOffset>5</bitOffset>
10498              <bitWidth>1</bitWidth>
10499              <access>read-write</access>
10500              <enumeratedValues>
10501                <enumeratedValue>
10502                  <name>0</name>
10503                  <description>This peripheral allows write accesses.</description>
10504                  <value>#0</value>
10505                </enumeratedValue>
10506                <enumeratedValue>
10507                  <name>1</name>
10508                  <description>This peripheral is write protected.</description>
10509                  <value>#1</value>
10510                </enumeratedValue>
10511              </enumeratedValues>
10512            </field>
10513            <field>
10514              <name>SP6</name>
10515              <description>Supervisor Protect</description>
10516              <bitOffset>6</bitOffset>
10517              <bitWidth>1</bitWidth>
10518              <access>read-write</access>
10519              <enumeratedValues>
10520                <enumeratedValue>
10521                  <name>0</name>
10522                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10523                  <value>#0</value>
10524                </enumeratedValue>
10525                <enumeratedValue>
10526                  <name>1</name>
10527                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10528                  <value>#1</value>
10529                </enumeratedValue>
10530              </enumeratedValues>
10531            </field>
10532            <field>
10533              <name>TP5</name>
10534              <description>Trusted Protect</description>
10535              <bitOffset>8</bitOffset>
10536              <bitWidth>1</bitWidth>
10537              <access>read-write</access>
10538              <enumeratedValues>
10539                <enumeratedValue>
10540                  <name>0</name>
10541                  <description>Accesses from an untrusted master are allowed.</description>
10542                  <value>#0</value>
10543                </enumeratedValue>
10544                <enumeratedValue>
10545                  <name>1</name>
10546                  <description>Accesses from an untrusted master are not allowed.</description>
10547                  <value>#1</value>
10548                </enumeratedValue>
10549              </enumeratedValues>
10550            </field>
10551            <field>
10552              <name>WP5</name>
10553              <description>Write Protect</description>
10554              <bitOffset>9</bitOffset>
10555              <bitWidth>1</bitWidth>
10556              <access>read-write</access>
10557              <enumeratedValues>
10558                <enumeratedValue>
10559                  <name>0</name>
10560                  <description>This peripheral allows write accesses.</description>
10561                  <value>#0</value>
10562                </enumeratedValue>
10563                <enumeratedValue>
10564                  <name>1</name>
10565                  <description>This peripheral is write protected.</description>
10566                  <value>#1</value>
10567                </enumeratedValue>
10568              </enumeratedValues>
10569            </field>
10570            <field>
10571              <name>SP5</name>
10572              <description>Supervisor Protect</description>
10573              <bitOffset>10</bitOffset>
10574              <bitWidth>1</bitWidth>
10575              <access>read-write</access>
10576              <enumeratedValues>
10577                <enumeratedValue>
10578                  <name>0</name>
10579                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10580                  <value>#0</value>
10581                </enumeratedValue>
10582                <enumeratedValue>
10583                  <name>1</name>
10584                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10585                  <value>#1</value>
10586                </enumeratedValue>
10587              </enumeratedValues>
10588            </field>
10589            <field>
10590              <name>TP4</name>
10591              <description>Trusted Protect</description>
10592              <bitOffset>12</bitOffset>
10593              <bitWidth>1</bitWidth>
10594              <access>read-write</access>
10595              <enumeratedValues>
10596                <enumeratedValue>
10597                  <name>0</name>
10598                  <description>Accesses from an untrusted master are allowed.</description>
10599                  <value>#0</value>
10600                </enumeratedValue>
10601                <enumeratedValue>
10602                  <name>1</name>
10603                  <description>Accesses from an untrusted master are not allowed.</description>
10604                  <value>#1</value>
10605                </enumeratedValue>
10606              </enumeratedValues>
10607            </field>
10608            <field>
10609              <name>WP4</name>
10610              <description>Write Protect</description>
10611              <bitOffset>13</bitOffset>
10612              <bitWidth>1</bitWidth>
10613              <access>read-write</access>
10614              <enumeratedValues>
10615                <enumeratedValue>
10616                  <name>0</name>
10617                  <description>This peripheral allows write accesses.</description>
10618                  <value>#0</value>
10619                </enumeratedValue>
10620                <enumeratedValue>
10621                  <name>1</name>
10622                  <description>This peripheral is write protected.</description>
10623                  <value>#1</value>
10624                </enumeratedValue>
10625              </enumeratedValues>
10626            </field>
10627            <field>
10628              <name>SP4</name>
10629              <description>Supervisor Protect</description>
10630              <bitOffset>14</bitOffset>
10631              <bitWidth>1</bitWidth>
10632              <access>read-write</access>
10633              <enumeratedValues>
10634                <enumeratedValue>
10635                  <name>0</name>
10636                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10637                  <value>#0</value>
10638                </enumeratedValue>
10639                <enumeratedValue>
10640                  <name>1</name>
10641                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10642                  <value>#1</value>
10643                </enumeratedValue>
10644              </enumeratedValues>
10645            </field>
10646            <field>
10647              <name>TP3</name>
10648              <description>Trusted Protect</description>
10649              <bitOffset>16</bitOffset>
10650              <bitWidth>1</bitWidth>
10651              <access>read-write</access>
10652              <enumeratedValues>
10653                <enumeratedValue>
10654                  <name>0</name>
10655                  <description>Accesses from an untrusted master are allowed.</description>
10656                  <value>#0</value>
10657                </enumeratedValue>
10658                <enumeratedValue>
10659                  <name>1</name>
10660                  <description>Accesses from an untrusted master are not allowed.</description>
10661                  <value>#1</value>
10662                </enumeratedValue>
10663              </enumeratedValues>
10664            </field>
10665            <field>
10666              <name>WP3</name>
10667              <description>Write Protect</description>
10668              <bitOffset>17</bitOffset>
10669              <bitWidth>1</bitWidth>
10670              <access>read-write</access>
10671              <enumeratedValues>
10672                <enumeratedValue>
10673                  <name>0</name>
10674                  <description>This peripheral allows write accesses.</description>
10675                  <value>#0</value>
10676                </enumeratedValue>
10677                <enumeratedValue>
10678                  <name>1</name>
10679                  <description>This peripheral is write protected.</description>
10680                  <value>#1</value>
10681                </enumeratedValue>
10682              </enumeratedValues>
10683            </field>
10684            <field>
10685              <name>SP3</name>
10686              <description>Supervisor Protect</description>
10687              <bitOffset>18</bitOffset>
10688              <bitWidth>1</bitWidth>
10689              <access>read-write</access>
10690              <enumeratedValues>
10691                <enumeratedValue>
10692                  <name>0</name>
10693                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10694                  <value>#0</value>
10695                </enumeratedValue>
10696                <enumeratedValue>
10697                  <name>1</name>
10698                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10699                  <value>#1</value>
10700                </enumeratedValue>
10701              </enumeratedValues>
10702            </field>
10703            <field>
10704              <name>TP2</name>
10705              <description>Trusted Protect</description>
10706              <bitOffset>20</bitOffset>
10707              <bitWidth>1</bitWidth>
10708              <access>read-write</access>
10709              <enumeratedValues>
10710                <enumeratedValue>
10711                  <name>0</name>
10712                  <description>Accesses from an untrusted master are allowed.</description>
10713                  <value>#0</value>
10714                </enumeratedValue>
10715                <enumeratedValue>
10716                  <name>1</name>
10717                  <description>Accesses from an untrusted master are not allowed.</description>
10718                  <value>#1</value>
10719                </enumeratedValue>
10720              </enumeratedValues>
10721            </field>
10722            <field>
10723              <name>WP2</name>
10724              <description>Write Protect</description>
10725              <bitOffset>21</bitOffset>
10726              <bitWidth>1</bitWidth>
10727              <access>read-write</access>
10728              <enumeratedValues>
10729                <enumeratedValue>
10730                  <name>0</name>
10731                  <description>This peripheral allows write accesses.</description>
10732                  <value>#0</value>
10733                </enumeratedValue>
10734                <enumeratedValue>
10735                  <name>1</name>
10736                  <description>This peripheral is write protected.</description>
10737                  <value>#1</value>
10738                </enumeratedValue>
10739              </enumeratedValues>
10740            </field>
10741            <field>
10742              <name>SP2</name>
10743              <description>Supervisor Protect</description>
10744              <bitOffset>22</bitOffset>
10745              <bitWidth>1</bitWidth>
10746              <access>read-write</access>
10747              <enumeratedValues>
10748                <enumeratedValue>
10749                  <name>0</name>
10750                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10751                  <value>#0</value>
10752                </enumeratedValue>
10753                <enumeratedValue>
10754                  <name>1</name>
10755                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10756                  <value>#1</value>
10757                </enumeratedValue>
10758              </enumeratedValues>
10759            </field>
10760            <field>
10761              <name>TP1</name>
10762              <description>Trusted Protect</description>
10763              <bitOffset>24</bitOffset>
10764              <bitWidth>1</bitWidth>
10765              <access>read-write</access>
10766              <enumeratedValues>
10767                <enumeratedValue>
10768                  <name>0</name>
10769                  <description>Accesses from an untrusted master are allowed.</description>
10770                  <value>#0</value>
10771                </enumeratedValue>
10772                <enumeratedValue>
10773                  <name>1</name>
10774                  <description>Accesses from an untrusted master are not allowed.</description>
10775                  <value>#1</value>
10776                </enumeratedValue>
10777              </enumeratedValues>
10778            </field>
10779            <field>
10780              <name>WP1</name>
10781              <description>Write Protect</description>
10782              <bitOffset>25</bitOffset>
10783              <bitWidth>1</bitWidth>
10784              <access>read-write</access>
10785              <enumeratedValues>
10786                <enumeratedValue>
10787                  <name>0</name>
10788                  <description>This peripheral allows write accesses.</description>
10789                  <value>#0</value>
10790                </enumeratedValue>
10791                <enumeratedValue>
10792                  <name>1</name>
10793                  <description>This peripheral is write protected.</description>
10794                  <value>#1</value>
10795                </enumeratedValue>
10796              </enumeratedValues>
10797            </field>
10798            <field>
10799              <name>SP1</name>
10800              <description>Supervisor Protect</description>
10801              <bitOffset>26</bitOffset>
10802              <bitWidth>1</bitWidth>
10803              <access>read-write</access>
10804              <enumeratedValues>
10805                <enumeratedValue>
10806                  <name>0</name>
10807                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10808                  <value>#0</value>
10809                </enumeratedValue>
10810                <enumeratedValue>
10811                  <name>1</name>
10812                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10813                  <value>#1</value>
10814                </enumeratedValue>
10815              </enumeratedValues>
10816            </field>
10817            <field>
10818              <name>TP0</name>
10819              <description>Trusted Protect</description>
10820              <bitOffset>28</bitOffset>
10821              <bitWidth>1</bitWidth>
10822              <access>read-write</access>
10823              <enumeratedValues>
10824                <enumeratedValue>
10825                  <name>0</name>
10826                  <description>Accesses from an untrusted master are allowed.</description>
10827                  <value>#0</value>
10828                </enumeratedValue>
10829                <enumeratedValue>
10830                  <name>1</name>
10831                  <description>Accesses from an untrusted master are not allowed.</description>
10832                  <value>#1</value>
10833                </enumeratedValue>
10834              </enumeratedValues>
10835            </field>
10836            <field>
10837              <name>WP0</name>
10838              <description>Write Protect</description>
10839              <bitOffset>29</bitOffset>
10840              <bitWidth>1</bitWidth>
10841              <access>read-write</access>
10842              <enumeratedValues>
10843                <enumeratedValue>
10844                  <name>0</name>
10845                  <description>This peripheral allows write accesses.</description>
10846                  <value>#0</value>
10847                </enumeratedValue>
10848                <enumeratedValue>
10849                  <name>1</name>
10850                  <description>This peripheral is write protected.</description>
10851                  <value>#1</value>
10852                </enumeratedValue>
10853              </enumeratedValues>
10854            </field>
10855            <field>
10856              <name>SP0</name>
10857              <description>Supervisor Protect</description>
10858              <bitOffset>30</bitOffset>
10859              <bitWidth>1</bitWidth>
10860              <access>read-write</access>
10861              <enumeratedValues>
10862                <enumeratedValue>
10863                  <name>0</name>
10864                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10865                  <value>#0</value>
10866                </enumeratedValue>
10867                <enumeratedValue>
10868                  <name>1</name>
10869                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10870                  <value>#1</value>
10871                </enumeratedValue>
10872              </enumeratedValues>
10873            </field>
10874          </fields>
10875        </register>
10876        <register>
10877          <name>PACRF</name>
10878          <description>Peripheral Access Control Register</description>
10879          <addressOffset>0x44</addressOffset>
10880          <size>32</size>
10881          <access>read-write</access>
10882          <resetValue>0x4000</resetValue>
10883          <resetMask>0xFFFFFFFF</resetMask>
10884          <fields>
10885            <field>
10886              <name>TP7</name>
10887              <description>Trusted Protect</description>
10888              <bitOffset>0</bitOffset>
10889              <bitWidth>1</bitWidth>
10890              <access>read-write</access>
10891              <enumeratedValues>
10892                <enumeratedValue>
10893                  <name>0</name>
10894                  <description>Accesses from an untrusted master are allowed.</description>
10895                  <value>#0</value>
10896                </enumeratedValue>
10897                <enumeratedValue>
10898                  <name>1</name>
10899                  <description>Accesses from an untrusted master are not allowed.</description>
10900                  <value>#1</value>
10901                </enumeratedValue>
10902              </enumeratedValues>
10903            </field>
10904            <field>
10905              <name>WP7</name>
10906              <description>Write Protect</description>
10907              <bitOffset>1</bitOffset>
10908              <bitWidth>1</bitWidth>
10909              <access>read-write</access>
10910              <enumeratedValues>
10911                <enumeratedValue>
10912                  <name>0</name>
10913                  <description>This peripheral allows write accesses.</description>
10914                  <value>#0</value>
10915                </enumeratedValue>
10916                <enumeratedValue>
10917                  <name>1</name>
10918                  <description>This peripheral is write protected.</description>
10919                  <value>#1</value>
10920                </enumeratedValue>
10921              </enumeratedValues>
10922            </field>
10923            <field>
10924              <name>SP7</name>
10925              <description>Supervisor Protect</description>
10926              <bitOffset>2</bitOffset>
10927              <bitWidth>1</bitWidth>
10928              <access>read-write</access>
10929              <enumeratedValues>
10930                <enumeratedValue>
10931                  <name>0</name>
10932                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10933                  <value>#0</value>
10934                </enumeratedValue>
10935                <enumeratedValue>
10936                  <name>1</name>
10937                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10938                  <value>#1</value>
10939                </enumeratedValue>
10940              </enumeratedValues>
10941            </field>
10942            <field>
10943              <name>TP6</name>
10944              <description>Trusted Protect</description>
10945              <bitOffset>4</bitOffset>
10946              <bitWidth>1</bitWidth>
10947              <access>read-write</access>
10948              <enumeratedValues>
10949                <enumeratedValue>
10950                  <name>0</name>
10951                  <description>Accesses from an untrusted master are allowed.</description>
10952                  <value>#0</value>
10953                </enumeratedValue>
10954                <enumeratedValue>
10955                  <name>1</name>
10956                  <description>Accesses from an untrusted master are not allowed.</description>
10957                  <value>#1</value>
10958                </enumeratedValue>
10959              </enumeratedValues>
10960            </field>
10961            <field>
10962              <name>WP6</name>
10963              <description>Write Protect</description>
10964              <bitOffset>5</bitOffset>
10965              <bitWidth>1</bitWidth>
10966              <access>read-write</access>
10967              <enumeratedValues>
10968                <enumeratedValue>
10969                  <name>0</name>
10970                  <description>This peripheral allows write accesses.</description>
10971                  <value>#0</value>
10972                </enumeratedValue>
10973                <enumeratedValue>
10974                  <name>1</name>
10975                  <description>This peripheral is write protected.</description>
10976                  <value>#1</value>
10977                </enumeratedValue>
10978              </enumeratedValues>
10979            </field>
10980            <field>
10981              <name>SP6</name>
10982              <description>Supervisor Protect</description>
10983              <bitOffset>6</bitOffset>
10984              <bitWidth>1</bitWidth>
10985              <access>read-write</access>
10986              <enumeratedValues>
10987                <enumeratedValue>
10988                  <name>0</name>
10989                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
10990                  <value>#0</value>
10991                </enumeratedValue>
10992                <enumeratedValue>
10993                  <name>1</name>
10994                  <description>This peripheral requires supervisor privilege level for accesses.</description>
10995                  <value>#1</value>
10996                </enumeratedValue>
10997              </enumeratedValues>
10998            </field>
10999            <field>
11000              <name>TP5</name>
11001              <description>Trusted Protect</description>
11002              <bitOffset>8</bitOffset>
11003              <bitWidth>1</bitWidth>
11004              <access>read-write</access>
11005              <enumeratedValues>
11006                <enumeratedValue>
11007                  <name>0</name>
11008                  <description>Accesses from an untrusted master are allowed.</description>
11009                  <value>#0</value>
11010                </enumeratedValue>
11011                <enumeratedValue>
11012                  <name>1</name>
11013                  <description>Accesses from an untrusted master are not allowed.</description>
11014                  <value>#1</value>
11015                </enumeratedValue>
11016              </enumeratedValues>
11017            </field>
11018            <field>
11019              <name>WP5</name>
11020              <description>Write Protect</description>
11021              <bitOffset>9</bitOffset>
11022              <bitWidth>1</bitWidth>
11023              <access>read-write</access>
11024              <enumeratedValues>
11025                <enumeratedValue>
11026                  <name>0</name>
11027                  <description>This peripheral allows write accesses.</description>
11028                  <value>#0</value>
11029                </enumeratedValue>
11030                <enumeratedValue>
11031                  <name>1</name>
11032                  <description>This peripheral is write protected.</description>
11033                  <value>#1</value>
11034                </enumeratedValue>
11035              </enumeratedValues>
11036            </field>
11037            <field>
11038              <name>SP5</name>
11039              <description>Supervisor Protect</description>
11040              <bitOffset>10</bitOffset>
11041              <bitWidth>1</bitWidth>
11042              <access>read-write</access>
11043              <enumeratedValues>
11044                <enumeratedValue>
11045                  <name>0</name>
11046                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11047                  <value>#0</value>
11048                </enumeratedValue>
11049                <enumeratedValue>
11050                  <name>1</name>
11051                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11052                  <value>#1</value>
11053                </enumeratedValue>
11054              </enumeratedValues>
11055            </field>
11056            <field>
11057              <name>TP4</name>
11058              <description>Trusted Protect</description>
11059              <bitOffset>12</bitOffset>
11060              <bitWidth>1</bitWidth>
11061              <access>read-write</access>
11062              <enumeratedValues>
11063                <enumeratedValue>
11064                  <name>0</name>
11065                  <description>Accesses from an untrusted master are allowed.</description>
11066                  <value>#0</value>
11067                </enumeratedValue>
11068                <enumeratedValue>
11069                  <name>1</name>
11070                  <description>Accesses from an untrusted master are not allowed.</description>
11071                  <value>#1</value>
11072                </enumeratedValue>
11073              </enumeratedValues>
11074            </field>
11075            <field>
11076              <name>WP4</name>
11077              <description>Write Protect</description>
11078              <bitOffset>13</bitOffset>
11079              <bitWidth>1</bitWidth>
11080              <access>read-write</access>
11081              <enumeratedValues>
11082                <enumeratedValue>
11083                  <name>0</name>
11084                  <description>This peripheral allows write accesses.</description>
11085                  <value>#0</value>
11086                </enumeratedValue>
11087                <enumeratedValue>
11088                  <name>1</name>
11089                  <description>This peripheral is write protected.</description>
11090                  <value>#1</value>
11091                </enumeratedValue>
11092              </enumeratedValues>
11093            </field>
11094            <field>
11095              <name>SP4</name>
11096              <description>Supervisor Protect</description>
11097              <bitOffset>14</bitOffset>
11098              <bitWidth>1</bitWidth>
11099              <access>read-write</access>
11100              <enumeratedValues>
11101                <enumeratedValue>
11102                  <name>0</name>
11103                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11104                  <value>#0</value>
11105                </enumeratedValue>
11106                <enumeratedValue>
11107                  <name>1</name>
11108                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11109                  <value>#1</value>
11110                </enumeratedValue>
11111              </enumeratedValues>
11112            </field>
11113            <field>
11114              <name>TP3</name>
11115              <description>Trusted Protect</description>
11116              <bitOffset>16</bitOffset>
11117              <bitWidth>1</bitWidth>
11118              <access>read-write</access>
11119              <enumeratedValues>
11120                <enumeratedValue>
11121                  <name>0</name>
11122                  <description>Accesses from an untrusted master are allowed.</description>
11123                  <value>#0</value>
11124                </enumeratedValue>
11125                <enumeratedValue>
11126                  <name>1</name>
11127                  <description>Accesses from an untrusted master are not allowed.</description>
11128                  <value>#1</value>
11129                </enumeratedValue>
11130              </enumeratedValues>
11131            </field>
11132            <field>
11133              <name>WP3</name>
11134              <description>Write Protect</description>
11135              <bitOffset>17</bitOffset>
11136              <bitWidth>1</bitWidth>
11137              <access>read-write</access>
11138              <enumeratedValues>
11139                <enumeratedValue>
11140                  <name>0</name>
11141                  <description>This peripheral allows write accesses.</description>
11142                  <value>#0</value>
11143                </enumeratedValue>
11144                <enumeratedValue>
11145                  <name>1</name>
11146                  <description>This peripheral is write protected.</description>
11147                  <value>#1</value>
11148                </enumeratedValue>
11149              </enumeratedValues>
11150            </field>
11151            <field>
11152              <name>SP3</name>
11153              <description>Supervisor Protect</description>
11154              <bitOffset>18</bitOffset>
11155              <bitWidth>1</bitWidth>
11156              <access>read-write</access>
11157              <enumeratedValues>
11158                <enumeratedValue>
11159                  <name>0</name>
11160                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11161                  <value>#0</value>
11162                </enumeratedValue>
11163                <enumeratedValue>
11164                  <name>1</name>
11165                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11166                  <value>#1</value>
11167                </enumeratedValue>
11168              </enumeratedValues>
11169            </field>
11170            <field>
11171              <name>TP2</name>
11172              <description>Trusted Protect</description>
11173              <bitOffset>20</bitOffset>
11174              <bitWidth>1</bitWidth>
11175              <access>read-write</access>
11176              <enumeratedValues>
11177                <enumeratedValue>
11178                  <name>0</name>
11179                  <description>Accesses from an untrusted master are allowed.</description>
11180                  <value>#0</value>
11181                </enumeratedValue>
11182                <enumeratedValue>
11183                  <name>1</name>
11184                  <description>Accesses from an untrusted master are not allowed.</description>
11185                  <value>#1</value>
11186                </enumeratedValue>
11187              </enumeratedValues>
11188            </field>
11189            <field>
11190              <name>WP2</name>
11191              <description>Write Protect</description>
11192              <bitOffset>21</bitOffset>
11193              <bitWidth>1</bitWidth>
11194              <access>read-write</access>
11195              <enumeratedValues>
11196                <enumeratedValue>
11197                  <name>0</name>
11198                  <description>This peripheral allows write accesses.</description>
11199                  <value>#0</value>
11200                </enumeratedValue>
11201                <enumeratedValue>
11202                  <name>1</name>
11203                  <description>This peripheral is write protected.</description>
11204                  <value>#1</value>
11205                </enumeratedValue>
11206              </enumeratedValues>
11207            </field>
11208            <field>
11209              <name>SP2</name>
11210              <description>Supervisor Protect</description>
11211              <bitOffset>22</bitOffset>
11212              <bitWidth>1</bitWidth>
11213              <access>read-write</access>
11214              <enumeratedValues>
11215                <enumeratedValue>
11216                  <name>0</name>
11217                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11218                  <value>#0</value>
11219                </enumeratedValue>
11220                <enumeratedValue>
11221                  <name>1</name>
11222                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11223                  <value>#1</value>
11224                </enumeratedValue>
11225              </enumeratedValues>
11226            </field>
11227            <field>
11228              <name>TP1</name>
11229              <description>Trusted Protect</description>
11230              <bitOffset>24</bitOffset>
11231              <bitWidth>1</bitWidth>
11232              <access>read-write</access>
11233              <enumeratedValues>
11234                <enumeratedValue>
11235                  <name>0</name>
11236                  <description>Accesses from an untrusted master are allowed.</description>
11237                  <value>#0</value>
11238                </enumeratedValue>
11239                <enumeratedValue>
11240                  <name>1</name>
11241                  <description>Accesses from an untrusted master are not allowed.</description>
11242                  <value>#1</value>
11243                </enumeratedValue>
11244              </enumeratedValues>
11245            </field>
11246            <field>
11247              <name>WP1</name>
11248              <description>Write Protect</description>
11249              <bitOffset>25</bitOffset>
11250              <bitWidth>1</bitWidth>
11251              <access>read-write</access>
11252              <enumeratedValues>
11253                <enumeratedValue>
11254                  <name>0</name>
11255                  <description>This peripheral allows write accesses.</description>
11256                  <value>#0</value>
11257                </enumeratedValue>
11258                <enumeratedValue>
11259                  <name>1</name>
11260                  <description>This peripheral is write protected.</description>
11261                  <value>#1</value>
11262                </enumeratedValue>
11263              </enumeratedValues>
11264            </field>
11265            <field>
11266              <name>SP1</name>
11267              <description>Supervisor Protect</description>
11268              <bitOffset>26</bitOffset>
11269              <bitWidth>1</bitWidth>
11270              <access>read-write</access>
11271              <enumeratedValues>
11272                <enumeratedValue>
11273                  <name>0</name>
11274                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11275                  <value>#0</value>
11276                </enumeratedValue>
11277                <enumeratedValue>
11278                  <name>1</name>
11279                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11280                  <value>#1</value>
11281                </enumeratedValue>
11282              </enumeratedValues>
11283            </field>
11284            <field>
11285              <name>TP0</name>
11286              <description>Trusted Protect</description>
11287              <bitOffset>28</bitOffset>
11288              <bitWidth>1</bitWidth>
11289              <access>read-write</access>
11290              <enumeratedValues>
11291                <enumeratedValue>
11292                  <name>0</name>
11293                  <description>Accesses from an untrusted master are allowed.</description>
11294                  <value>#0</value>
11295                </enumeratedValue>
11296                <enumeratedValue>
11297                  <name>1</name>
11298                  <description>Accesses from an untrusted master are not allowed.</description>
11299                  <value>#1</value>
11300                </enumeratedValue>
11301              </enumeratedValues>
11302            </field>
11303            <field>
11304              <name>WP0</name>
11305              <description>Write Protect</description>
11306              <bitOffset>29</bitOffset>
11307              <bitWidth>1</bitWidth>
11308              <access>read-write</access>
11309              <enumeratedValues>
11310                <enumeratedValue>
11311                  <name>0</name>
11312                  <description>This peripheral allows write accesses.</description>
11313                  <value>#0</value>
11314                </enumeratedValue>
11315                <enumeratedValue>
11316                  <name>1</name>
11317                  <description>This peripheral is write protected.</description>
11318                  <value>#1</value>
11319                </enumeratedValue>
11320              </enumeratedValues>
11321            </field>
11322            <field>
11323              <name>SP0</name>
11324              <description>Supervisor Protect</description>
11325              <bitOffset>30</bitOffset>
11326              <bitWidth>1</bitWidth>
11327              <access>read-write</access>
11328              <enumeratedValues>
11329                <enumeratedValue>
11330                  <name>0</name>
11331                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11332                  <value>#0</value>
11333                </enumeratedValue>
11334                <enumeratedValue>
11335                  <name>1</name>
11336                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11337                  <value>#1</value>
11338                </enumeratedValue>
11339              </enumeratedValues>
11340            </field>
11341          </fields>
11342        </register>
11343        <register>
11344          <name>PACRG</name>
11345          <description>Peripheral Access Control Register</description>
11346          <addressOffset>0x48</addressOffset>
11347          <size>32</size>
11348          <access>read-write</access>
11349          <resetValue>0x4000000</resetValue>
11350          <resetMask>0xFFFFFFFF</resetMask>
11351          <fields>
11352            <field>
11353              <name>TP7</name>
11354              <description>Trusted Protect</description>
11355              <bitOffset>0</bitOffset>
11356              <bitWidth>1</bitWidth>
11357              <access>read-write</access>
11358              <enumeratedValues>
11359                <enumeratedValue>
11360                  <name>0</name>
11361                  <description>Accesses from an untrusted master are allowed.</description>
11362                  <value>#0</value>
11363                </enumeratedValue>
11364                <enumeratedValue>
11365                  <name>1</name>
11366                  <description>Accesses from an untrusted master are not allowed.</description>
11367                  <value>#1</value>
11368                </enumeratedValue>
11369              </enumeratedValues>
11370            </field>
11371            <field>
11372              <name>WP7</name>
11373              <description>Write Protect</description>
11374              <bitOffset>1</bitOffset>
11375              <bitWidth>1</bitWidth>
11376              <access>read-write</access>
11377              <enumeratedValues>
11378                <enumeratedValue>
11379                  <name>0</name>
11380                  <description>This peripheral allows write accesses.</description>
11381                  <value>#0</value>
11382                </enumeratedValue>
11383                <enumeratedValue>
11384                  <name>1</name>
11385                  <description>This peripheral is write protected.</description>
11386                  <value>#1</value>
11387                </enumeratedValue>
11388              </enumeratedValues>
11389            </field>
11390            <field>
11391              <name>SP7</name>
11392              <description>Supervisor Protect</description>
11393              <bitOffset>2</bitOffset>
11394              <bitWidth>1</bitWidth>
11395              <access>read-write</access>
11396              <enumeratedValues>
11397                <enumeratedValue>
11398                  <name>0</name>
11399                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11400                  <value>#0</value>
11401                </enumeratedValue>
11402                <enumeratedValue>
11403                  <name>1</name>
11404                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11405                  <value>#1</value>
11406                </enumeratedValue>
11407              </enumeratedValues>
11408            </field>
11409            <field>
11410              <name>TP6</name>
11411              <description>Trusted Protect</description>
11412              <bitOffset>4</bitOffset>
11413              <bitWidth>1</bitWidth>
11414              <access>read-write</access>
11415              <enumeratedValues>
11416                <enumeratedValue>
11417                  <name>0</name>
11418                  <description>Accesses from an untrusted master are allowed.</description>
11419                  <value>#0</value>
11420                </enumeratedValue>
11421                <enumeratedValue>
11422                  <name>1</name>
11423                  <description>Accesses from an untrusted master are not allowed.</description>
11424                  <value>#1</value>
11425                </enumeratedValue>
11426              </enumeratedValues>
11427            </field>
11428            <field>
11429              <name>WP6</name>
11430              <description>Write Protect</description>
11431              <bitOffset>5</bitOffset>
11432              <bitWidth>1</bitWidth>
11433              <access>read-write</access>
11434              <enumeratedValues>
11435                <enumeratedValue>
11436                  <name>0</name>
11437                  <description>This peripheral allows write accesses.</description>
11438                  <value>#0</value>
11439                </enumeratedValue>
11440                <enumeratedValue>
11441                  <name>1</name>
11442                  <description>This peripheral is write protected.</description>
11443                  <value>#1</value>
11444                </enumeratedValue>
11445              </enumeratedValues>
11446            </field>
11447            <field>
11448              <name>SP6</name>
11449              <description>Supervisor Protect</description>
11450              <bitOffset>6</bitOffset>
11451              <bitWidth>1</bitWidth>
11452              <access>read-write</access>
11453              <enumeratedValues>
11454                <enumeratedValue>
11455                  <name>0</name>
11456                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11457                  <value>#0</value>
11458                </enumeratedValue>
11459                <enumeratedValue>
11460                  <name>1</name>
11461                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11462                  <value>#1</value>
11463                </enumeratedValue>
11464              </enumeratedValues>
11465            </field>
11466            <field>
11467              <name>TP5</name>
11468              <description>Trusted Protect</description>
11469              <bitOffset>8</bitOffset>
11470              <bitWidth>1</bitWidth>
11471              <access>read-write</access>
11472              <enumeratedValues>
11473                <enumeratedValue>
11474                  <name>0</name>
11475                  <description>Accesses from an untrusted master are allowed.</description>
11476                  <value>#0</value>
11477                </enumeratedValue>
11478                <enumeratedValue>
11479                  <name>1</name>
11480                  <description>Accesses from an untrusted master are not allowed.</description>
11481                  <value>#1</value>
11482                </enumeratedValue>
11483              </enumeratedValues>
11484            </field>
11485            <field>
11486              <name>WP5</name>
11487              <description>Write Protect</description>
11488              <bitOffset>9</bitOffset>
11489              <bitWidth>1</bitWidth>
11490              <access>read-write</access>
11491              <enumeratedValues>
11492                <enumeratedValue>
11493                  <name>0</name>
11494                  <description>This peripheral allows write accesses.</description>
11495                  <value>#0</value>
11496                </enumeratedValue>
11497                <enumeratedValue>
11498                  <name>1</name>
11499                  <description>This peripheral is write protected.</description>
11500                  <value>#1</value>
11501                </enumeratedValue>
11502              </enumeratedValues>
11503            </field>
11504            <field>
11505              <name>SP5</name>
11506              <description>Supervisor Protect</description>
11507              <bitOffset>10</bitOffset>
11508              <bitWidth>1</bitWidth>
11509              <access>read-write</access>
11510              <enumeratedValues>
11511                <enumeratedValue>
11512                  <name>0</name>
11513                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11514                  <value>#0</value>
11515                </enumeratedValue>
11516                <enumeratedValue>
11517                  <name>1</name>
11518                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11519                  <value>#1</value>
11520                </enumeratedValue>
11521              </enumeratedValues>
11522            </field>
11523            <field>
11524              <name>TP4</name>
11525              <description>Trusted Protect</description>
11526              <bitOffset>12</bitOffset>
11527              <bitWidth>1</bitWidth>
11528              <access>read-write</access>
11529              <enumeratedValues>
11530                <enumeratedValue>
11531                  <name>0</name>
11532                  <description>Accesses from an untrusted master are allowed.</description>
11533                  <value>#0</value>
11534                </enumeratedValue>
11535                <enumeratedValue>
11536                  <name>1</name>
11537                  <description>Accesses from an untrusted master are not allowed.</description>
11538                  <value>#1</value>
11539                </enumeratedValue>
11540              </enumeratedValues>
11541            </field>
11542            <field>
11543              <name>WP4</name>
11544              <description>Write Protect</description>
11545              <bitOffset>13</bitOffset>
11546              <bitWidth>1</bitWidth>
11547              <access>read-write</access>
11548              <enumeratedValues>
11549                <enumeratedValue>
11550                  <name>0</name>
11551                  <description>This peripheral allows write accesses.</description>
11552                  <value>#0</value>
11553                </enumeratedValue>
11554                <enumeratedValue>
11555                  <name>1</name>
11556                  <description>This peripheral is write protected.</description>
11557                  <value>#1</value>
11558                </enumeratedValue>
11559              </enumeratedValues>
11560            </field>
11561            <field>
11562              <name>SP4</name>
11563              <description>Supervisor Protect</description>
11564              <bitOffset>14</bitOffset>
11565              <bitWidth>1</bitWidth>
11566              <access>read-write</access>
11567              <enumeratedValues>
11568                <enumeratedValue>
11569                  <name>0</name>
11570                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11571                  <value>#0</value>
11572                </enumeratedValue>
11573                <enumeratedValue>
11574                  <name>1</name>
11575                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11576                  <value>#1</value>
11577                </enumeratedValue>
11578              </enumeratedValues>
11579            </field>
11580            <field>
11581              <name>TP3</name>
11582              <description>Trusted Protect</description>
11583              <bitOffset>16</bitOffset>
11584              <bitWidth>1</bitWidth>
11585              <access>read-write</access>
11586              <enumeratedValues>
11587                <enumeratedValue>
11588                  <name>0</name>
11589                  <description>Accesses from an untrusted master are allowed.</description>
11590                  <value>#0</value>
11591                </enumeratedValue>
11592                <enumeratedValue>
11593                  <name>1</name>
11594                  <description>Accesses from an untrusted master are not allowed.</description>
11595                  <value>#1</value>
11596                </enumeratedValue>
11597              </enumeratedValues>
11598            </field>
11599            <field>
11600              <name>WP3</name>
11601              <description>Write Protect</description>
11602              <bitOffset>17</bitOffset>
11603              <bitWidth>1</bitWidth>
11604              <access>read-write</access>
11605              <enumeratedValues>
11606                <enumeratedValue>
11607                  <name>0</name>
11608                  <description>This peripheral allows write accesses.</description>
11609                  <value>#0</value>
11610                </enumeratedValue>
11611                <enumeratedValue>
11612                  <name>1</name>
11613                  <description>This peripheral is write protected.</description>
11614                  <value>#1</value>
11615                </enumeratedValue>
11616              </enumeratedValues>
11617            </field>
11618            <field>
11619              <name>SP3</name>
11620              <description>Supervisor Protect</description>
11621              <bitOffset>18</bitOffset>
11622              <bitWidth>1</bitWidth>
11623              <access>read-write</access>
11624              <enumeratedValues>
11625                <enumeratedValue>
11626                  <name>0</name>
11627                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11628                  <value>#0</value>
11629                </enumeratedValue>
11630                <enumeratedValue>
11631                  <name>1</name>
11632                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11633                  <value>#1</value>
11634                </enumeratedValue>
11635              </enumeratedValues>
11636            </field>
11637            <field>
11638              <name>TP2</name>
11639              <description>Trusted Protect</description>
11640              <bitOffset>20</bitOffset>
11641              <bitWidth>1</bitWidth>
11642              <access>read-write</access>
11643              <enumeratedValues>
11644                <enumeratedValue>
11645                  <name>0</name>
11646                  <description>Accesses from an untrusted master are allowed.</description>
11647                  <value>#0</value>
11648                </enumeratedValue>
11649                <enumeratedValue>
11650                  <name>1</name>
11651                  <description>Accesses from an untrusted master are not allowed.</description>
11652                  <value>#1</value>
11653                </enumeratedValue>
11654              </enumeratedValues>
11655            </field>
11656            <field>
11657              <name>WP2</name>
11658              <description>Write Protect</description>
11659              <bitOffset>21</bitOffset>
11660              <bitWidth>1</bitWidth>
11661              <access>read-write</access>
11662              <enumeratedValues>
11663                <enumeratedValue>
11664                  <name>0</name>
11665                  <description>This peripheral allows write accesses.</description>
11666                  <value>#0</value>
11667                </enumeratedValue>
11668                <enumeratedValue>
11669                  <name>1</name>
11670                  <description>This peripheral is write protected.</description>
11671                  <value>#1</value>
11672                </enumeratedValue>
11673              </enumeratedValues>
11674            </field>
11675            <field>
11676              <name>SP2</name>
11677              <description>Supervisor Protect</description>
11678              <bitOffset>22</bitOffset>
11679              <bitWidth>1</bitWidth>
11680              <access>read-write</access>
11681              <enumeratedValues>
11682                <enumeratedValue>
11683                  <name>0</name>
11684                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11685                  <value>#0</value>
11686                </enumeratedValue>
11687                <enumeratedValue>
11688                  <name>1</name>
11689                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11690                  <value>#1</value>
11691                </enumeratedValue>
11692              </enumeratedValues>
11693            </field>
11694            <field>
11695              <name>TP1</name>
11696              <description>Trusted Protect</description>
11697              <bitOffset>24</bitOffset>
11698              <bitWidth>1</bitWidth>
11699              <access>read-write</access>
11700              <enumeratedValues>
11701                <enumeratedValue>
11702                  <name>0</name>
11703                  <description>Accesses from an untrusted master are allowed.</description>
11704                  <value>#0</value>
11705                </enumeratedValue>
11706                <enumeratedValue>
11707                  <name>1</name>
11708                  <description>Accesses from an untrusted master are not allowed.</description>
11709                  <value>#1</value>
11710                </enumeratedValue>
11711              </enumeratedValues>
11712            </field>
11713            <field>
11714              <name>WP1</name>
11715              <description>Write Protect</description>
11716              <bitOffset>25</bitOffset>
11717              <bitWidth>1</bitWidth>
11718              <access>read-write</access>
11719              <enumeratedValues>
11720                <enumeratedValue>
11721                  <name>0</name>
11722                  <description>This peripheral allows write accesses.</description>
11723                  <value>#0</value>
11724                </enumeratedValue>
11725                <enumeratedValue>
11726                  <name>1</name>
11727                  <description>This peripheral is write protected.</description>
11728                  <value>#1</value>
11729                </enumeratedValue>
11730              </enumeratedValues>
11731            </field>
11732            <field>
11733              <name>SP1</name>
11734              <description>Supervisor Protect</description>
11735              <bitOffset>26</bitOffset>
11736              <bitWidth>1</bitWidth>
11737              <access>read-write</access>
11738              <enumeratedValues>
11739                <enumeratedValue>
11740                  <name>0</name>
11741                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11742                  <value>#0</value>
11743                </enumeratedValue>
11744                <enumeratedValue>
11745                  <name>1</name>
11746                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11747                  <value>#1</value>
11748                </enumeratedValue>
11749              </enumeratedValues>
11750            </field>
11751            <field>
11752              <name>TP0</name>
11753              <description>Trusted Protect</description>
11754              <bitOffset>28</bitOffset>
11755              <bitWidth>1</bitWidth>
11756              <access>read-write</access>
11757              <enumeratedValues>
11758                <enumeratedValue>
11759                  <name>0</name>
11760                  <description>Accesses from an untrusted master are allowed.</description>
11761                  <value>#0</value>
11762                </enumeratedValue>
11763                <enumeratedValue>
11764                  <name>1</name>
11765                  <description>Accesses from an untrusted master are not allowed.</description>
11766                  <value>#1</value>
11767                </enumeratedValue>
11768              </enumeratedValues>
11769            </field>
11770            <field>
11771              <name>WP0</name>
11772              <description>Write Protect</description>
11773              <bitOffset>29</bitOffset>
11774              <bitWidth>1</bitWidth>
11775              <access>read-write</access>
11776              <enumeratedValues>
11777                <enumeratedValue>
11778                  <name>0</name>
11779                  <description>This peripheral allows write accesses.</description>
11780                  <value>#0</value>
11781                </enumeratedValue>
11782                <enumeratedValue>
11783                  <name>1</name>
11784                  <description>This peripheral is write protected.</description>
11785                  <value>#1</value>
11786                </enumeratedValue>
11787              </enumeratedValues>
11788            </field>
11789            <field>
11790              <name>SP0</name>
11791              <description>Supervisor Protect</description>
11792              <bitOffset>30</bitOffset>
11793              <bitWidth>1</bitWidth>
11794              <access>read-write</access>
11795              <enumeratedValues>
11796                <enumeratedValue>
11797                  <name>0</name>
11798                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11799                  <value>#0</value>
11800                </enumeratedValue>
11801                <enumeratedValue>
11802                  <name>1</name>
11803                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11804                  <value>#1</value>
11805                </enumeratedValue>
11806              </enumeratedValues>
11807            </field>
11808          </fields>
11809        </register>
11810        <register>
11811          <name>PACRH</name>
11812          <description>Peripheral Access Control Register</description>
11813          <addressOffset>0x4C</addressOffset>
11814          <size>32</size>
11815          <access>read-write</access>
11816          <resetValue>0x44000000</resetValue>
11817          <resetMask>0xFFFFFFFF</resetMask>
11818          <fields>
11819            <field>
11820              <name>TP7</name>
11821              <description>Trusted Protect</description>
11822              <bitOffset>0</bitOffset>
11823              <bitWidth>1</bitWidth>
11824              <access>read-write</access>
11825              <enumeratedValues>
11826                <enumeratedValue>
11827                  <name>0</name>
11828                  <description>Accesses from an untrusted master are allowed.</description>
11829                  <value>#0</value>
11830                </enumeratedValue>
11831                <enumeratedValue>
11832                  <name>1</name>
11833                  <description>Accesses from an untrusted master are not allowed.</description>
11834                  <value>#1</value>
11835                </enumeratedValue>
11836              </enumeratedValues>
11837            </field>
11838            <field>
11839              <name>WP7</name>
11840              <description>Write Protect</description>
11841              <bitOffset>1</bitOffset>
11842              <bitWidth>1</bitWidth>
11843              <access>read-write</access>
11844              <enumeratedValues>
11845                <enumeratedValue>
11846                  <name>0</name>
11847                  <description>This peripheral allows write accesses.</description>
11848                  <value>#0</value>
11849                </enumeratedValue>
11850                <enumeratedValue>
11851                  <name>1</name>
11852                  <description>This peripheral is write protected.</description>
11853                  <value>#1</value>
11854                </enumeratedValue>
11855              </enumeratedValues>
11856            </field>
11857            <field>
11858              <name>SP7</name>
11859              <description>Supervisor Protect</description>
11860              <bitOffset>2</bitOffset>
11861              <bitWidth>1</bitWidth>
11862              <access>read-write</access>
11863              <enumeratedValues>
11864                <enumeratedValue>
11865                  <name>0</name>
11866                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11867                  <value>#0</value>
11868                </enumeratedValue>
11869                <enumeratedValue>
11870                  <name>1</name>
11871                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11872                  <value>#1</value>
11873                </enumeratedValue>
11874              </enumeratedValues>
11875            </field>
11876            <field>
11877              <name>TP6</name>
11878              <description>Trusted Protect</description>
11879              <bitOffset>4</bitOffset>
11880              <bitWidth>1</bitWidth>
11881              <access>read-write</access>
11882              <enumeratedValues>
11883                <enumeratedValue>
11884                  <name>0</name>
11885                  <description>Accesses from an untrusted master are allowed.</description>
11886                  <value>#0</value>
11887                </enumeratedValue>
11888                <enumeratedValue>
11889                  <name>1</name>
11890                  <description>Accesses from an untrusted master are not allowed.</description>
11891                  <value>#1</value>
11892                </enumeratedValue>
11893              </enumeratedValues>
11894            </field>
11895            <field>
11896              <name>WP6</name>
11897              <description>Write Protect</description>
11898              <bitOffset>5</bitOffset>
11899              <bitWidth>1</bitWidth>
11900              <access>read-write</access>
11901              <enumeratedValues>
11902                <enumeratedValue>
11903                  <name>0</name>
11904                  <description>This peripheral allows write accesses.</description>
11905                  <value>#0</value>
11906                </enumeratedValue>
11907                <enumeratedValue>
11908                  <name>1</name>
11909                  <description>This peripheral is write protected.</description>
11910                  <value>#1</value>
11911                </enumeratedValue>
11912              </enumeratedValues>
11913            </field>
11914            <field>
11915              <name>SP6</name>
11916              <description>Supervisor Protect</description>
11917              <bitOffset>6</bitOffset>
11918              <bitWidth>1</bitWidth>
11919              <access>read-write</access>
11920              <enumeratedValues>
11921                <enumeratedValue>
11922                  <name>0</name>
11923                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11924                  <value>#0</value>
11925                </enumeratedValue>
11926                <enumeratedValue>
11927                  <name>1</name>
11928                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11929                  <value>#1</value>
11930                </enumeratedValue>
11931              </enumeratedValues>
11932            </field>
11933            <field>
11934              <name>TP5</name>
11935              <description>Trusted Protect</description>
11936              <bitOffset>8</bitOffset>
11937              <bitWidth>1</bitWidth>
11938              <access>read-write</access>
11939              <enumeratedValues>
11940                <enumeratedValue>
11941                  <name>0</name>
11942                  <description>Accesses from an untrusted master are allowed.</description>
11943                  <value>#0</value>
11944                </enumeratedValue>
11945                <enumeratedValue>
11946                  <name>1</name>
11947                  <description>Accesses from an untrusted master are not allowed.</description>
11948                  <value>#1</value>
11949                </enumeratedValue>
11950              </enumeratedValues>
11951            </field>
11952            <field>
11953              <name>WP5</name>
11954              <description>Write Protect</description>
11955              <bitOffset>9</bitOffset>
11956              <bitWidth>1</bitWidth>
11957              <access>read-write</access>
11958              <enumeratedValues>
11959                <enumeratedValue>
11960                  <name>0</name>
11961                  <description>This peripheral allows write accesses.</description>
11962                  <value>#0</value>
11963                </enumeratedValue>
11964                <enumeratedValue>
11965                  <name>1</name>
11966                  <description>This peripheral is write protected.</description>
11967                  <value>#1</value>
11968                </enumeratedValue>
11969              </enumeratedValues>
11970            </field>
11971            <field>
11972              <name>SP5</name>
11973              <description>Supervisor Protect</description>
11974              <bitOffset>10</bitOffset>
11975              <bitWidth>1</bitWidth>
11976              <access>read-write</access>
11977              <enumeratedValues>
11978                <enumeratedValue>
11979                  <name>0</name>
11980                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
11981                  <value>#0</value>
11982                </enumeratedValue>
11983                <enumeratedValue>
11984                  <name>1</name>
11985                  <description>This peripheral requires supervisor privilege level for accesses.</description>
11986                  <value>#1</value>
11987                </enumeratedValue>
11988              </enumeratedValues>
11989            </field>
11990            <field>
11991              <name>TP4</name>
11992              <description>Trusted Protect</description>
11993              <bitOffset>12</bitOffset>
11994              <bitWidth>1</bitWidth>
11995              <access>read-write</access>
11996              <enumeratedValues>
11997                <enumeratedValue>
11998                  <name>0</name>
11999                  <description>Accesses from an untrusted master are allowed.</description>
12000                  <value>#0</value>
12001                </enumeratedValue>
12002                <enumeratedValue>
12003                  <name>1</name>
12004                  <description>Accesses from an untrusted master are not allowed.</description>
12005                  <value>#1</value>
12006                </enumeratedValue>
12007              </enumeratedValues>
12008            </field>
12009            <field>
12010              <name>WP4</name>
12011              <description>Write Protect</description>
12012              <bitOffset>13</bitOffset>
12013              <bitWidth>1</bitWidth>
12014              <access>read-write</access>
12015              <enumeratedValues>
12016                <enumeratedValue>
12017                  <name>0</name>
12018                  <description>This peripheral allows write accesses.</description>
12019                  <value>#0</value>
12020                </enumeratedValue>
12021                <enumeratedValue>
12022                  <name>1</name>
12023                  <description>This peripheral is write protected.</description>
12024                  <value>#1</value>
12025                </enumeratedValue>
12026              </enumeratedValues>
12027            </field>
12028            <field>
12029              <name>SP4</name>
12030              <description>Supervisor Protect</description>
12031              <bitOffset>14</bitOffset>
12032              <bitWidth>1</bitWidth>
12033              <access>read-write</access>
12034              <enumeratedValues>
12035                <enumeratedValue>
12036                  <name>0</name>
12037                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12038                  <value>#0</value>
12039                </enumeratedValue>
12040                <enumeratedValue>
12041                  <name>1</name>
12042                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12043                  <value>#1</value>
12044                </enumeratedValue>
12045              </enumeratedValues>
12046            </field>
12047            <field>
12048              <name>TP3</name>
12049              <description>Trusted Protect</description>
12050              <bitOffset>16</bitOffset>
12051              <bitWidth>1</bitWidth>
12052              <access>read-write</access>
12053              <enumeratedValues>
12054                <enumeratedValue>
12055                  <name>0</name>
12056                  <description>Accesses from an untrusted master are allowed.</description>
12057                  <value>#0</value>
12058                </enumeratedValue>
12059                <enumeratedValue>
12060                  <name>1</name>
12061                  <description>Accesses from an untrusted master are not allowed.</description>
12062                  <value>#1</value>
12063                </enumeratedValue>
12064              </enumeratedValues>
12065            </field>
12066            <field>
12067              <name>WP3</name>
12068              <description>Write Protect</description>
12069              <bitOffset>17</bitOffset>
12070              <bitWidth>1</bitWidth>
12071              <access>read-write</access>
12072              <enumeratedValues>
12073                <enumeratedValue>
12074                  <name>0</name>
12075                  <description>This peripheral allows write accesses.</description>
12076                  <value>#0</value>
12077                </enumeratedValue>
12078                <enumeratedValue>
12079                  <name>1</name>
12080                  <description>This peripheral is write protected.</description>
12081                  <value>#1</value>
12082                </enumeratedValue>
12083              </enumeratedValues>
12084            </field>
12085            <field>
12086              <name>SP3</name>
12087              <description>Supervisor Protect</description>
12088              <bitOffset>18</bitOffset>
12089              <bitWidth>1</bitWidth>
12090              <access>read-write</access>
12091              <enumeratedValues>
12092                <enumeratedValue>
12093                  <name>0</name>
12094                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12095                  <value>#0</value>
12096                </enumeratedValue>
12097                <enumeratedValue>
12098                  <name>1</name>
12099                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12100                  <value>#1</value>
12101                </enumeratedValue>
12102              </enumeratedValues>
12103            </field>
12104            <field>
12105              <name>TP2</name>
12106              <description>Trusted Protect</description>
12107              <bitOffset>20</bitOffset>
12108              <bitWidth>1</bitWidth>
12109              <access>read-write</access>
12110              <enumeratedValues>
12111                <enumeratedValue>
12112                  <name>0</name>
12113                  <description>Accesses from an untrusted master are allowed.</description>
12114                  <value>#0</value>
12115                </enumeratedValue>
12116                <enumeratedValue>
12117                  <name>1</name>
12118                  <description>Accesses from an untrusted master are not allowed.</description>
12119                  <value>#1</value>
12120                </enumeratedValue>
12121              </enumeratedValues>
12122            </field>
12123            <field>
12124              <name>WP2</name>
12125              <description>Write Protect</description>
12126              <bitOffset>21</bitOffset>
12127              <bitWidth>1</bitWidth>
12128              <access>read-write</access>
12129              <enumeratedValues>
12130                <enumeratedValue>
12131                  <name>0</name>
12132                  <description>This peripheral allows write accesses.</description>
12133                  <value>#0</value>
12134                </enumeratedValue>
12135                <enumeratedValue>
12136                  <name>1</name>
12137                  <description>This peripheral is write protected.</description>
12138                  <value>#1</value>
12139                </enumeratedValue>
12140              </enumeratedValues>
12141            </field>
12142            <field>
12143              <name>SP2</name>
12144              <description>Supervisor Protect</description>
12145              <bitOffset>22</bitOffset>
12146              <bitWidth>1</bitWidth>
12147              <access>read-write</access>
12148              <enumeratedValues>
12149                <enumeratedValue>
12150                  <name>0</name>
12151                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12152                  <value>#0</value>
12153                </enumeratedValue>
12154                <enumeratedValue>
12155                  <name>1</name>
12156                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12157                  <value>#1</value>
12158                </enumeratedValue>
12159              </enumeratedValues>
12160            </field>
12161            <field>
12162              <name>TP1</name>
12163              <description>Trusted Protect</description>
12164              <bitOffset>24</bitOffset>
12165              <bitWidth>1</bitWidth>
12166              <access>read-write</access>
12167              <enumeratedValues>
12168                <enumeratedValue>
12169                  <name>0</name>
12170                  <description>Accesses from an untrusted master are allowed.</description>
12171                  <value>#0</value>
12172                </enumeratedValue>
12173                <enumeratedValue>
12174                  <name>1</name>
12175                  <description>Accesses from an untrusted master are not allowed.</description>
12176                  <value>#1</value>
12177                </enumeratedValue>
12178              </enumeratedValues>
12179            </field>
12180            <field>
12181              <name>WP1</name>
12182              <description>Write Protect</description>
12183              <bitOffset>25</bitOffset>
12184              <bitWidth>1</bitWidth>
12185              <access>read-write</access>
12186              <enumeratedValues>
12187                <enumeratedValue>
12188                  <name>0</name>
12189                  <description>This peripheral allows write accesses.</description>
12190                  <value>#0</value>
12191                </enumeratedValue>
12192                <enumeratedValue>
12193                  <name>1</name>
12194                  <description>This peripheral is write protected.</description>
12195                  <value>#1</value>
12196                </enumeratedValue>
12197              </enumeratedValues>
12198            </field>
12199            <field>
12200              <name>SP1</name>
12201              <description>Supervisor Protect</description>
12202              <bitOffset>26</bitOffset>
12203              <bitWidth>1</bitWidth>
12204              <access>read-write</access>
12205              <enumeratedValues>
12206                <enumeratedValue>
12207                  <name>0</name>
12208                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12209                  <value>#0</value>
12210                </enumeratedValue>
12211                <enumeratedValue>
12212                  <name>1</name>
12213                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12214                  <value>#1</value>
12215                </enumeratedValue>
12216              </enumeratedValues>
12217            </field>
12218            <field>
12219              <name>TP0</name>
12220              <description>Trusted Protect</description>
12221              <bitOffset>28</bitOffset>
12222              <bitWidth>1</bitWidth>
12223              <access>read-write</access>
12224              <enumeratedValues>
12225                <enumeratedValue>
12226                  <name>0</name>
12227                  <description>Accesses from an untrusted master are allowed.</description>
12228                  <value>#0</value>
12229                </enumeratedValue>
12230                <enumeratedValue>
12231                  <name>1</name>
12232                  <description>Accesses from an untrusted master are not allowed.</description>
12233                  <value>#1</value>
12234                </enumeratedValue>
12235              </enumeratedValues>
12236            </field>
12237            <field>
12238              <name>WP0</name>
12239              <description>Write Protect</description>
12240              <bitOffset>29</bitOffset>
12241              <bitWidth>1</bitWidth>
12242              <access>read-write</access>
12243              <enumeratedValues>
12244                <enumeratedValue>
12245                  <name>0</name>
12246                  <description>This peripheral allows write accesses.</description>
12247                  <value>#0</value>
12248                </enumeratedValue>
12249                <enumeratedValue>
12250                  <name>1</name>
12251                  <description>This peripheral is write protected.</description>
12252                  <value>#1</value>
12253                </enumeratedValue>
12254              </enumeratedValues>
12255            </field>
12256            <field>
12257              <name>SP0</name>
12258              <description>Supervisor Protect</description>
12259              <bitOffset>30</bitOffset>
12260              <bitWidth>1</bitWidth>
12261              <access>read-write</access>
12262              <enumeratedValues>
12263                <enumeratedValue>
12264                  <name>0</name>
12265                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12266                  <value>#0</value>
12267                </enumeratedValue>
12268                <enumeratedValue>
12269                  <name>1</name>
12270                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12271                  <value>#1</value>
12272                </enumeratedValue>
12273              </enumeratedValues>
12274            </field>
12275          </fields>
12276        </register>
12277        <register>
12278          <name>PACRI</name>
12279          <description>Peripheral Access Control Register</description>
12280          <addressOffset>0x50</addressOffset>
12281          <size>32</size>
12282          <access>read-write</access>
12283          <resetValue>0x4444</resetValue>
12284          <resetMask>0xFFFFFFFF</resetMask>
12285          <fields>
12286            <field>
12287              <name>TP7</name>
12288              <description>Trusted Protect</description>
12289              <bitOffset>0</bitOffset>
12290              <bitWidth>1</bitWidth>
12291              <access>read-write</access>
12292              <enumeratedValues>
12293                <enumeratedValue>
12294                  <name>0</name>
12295                  <description>Accesses from an untrusted master are allowed.</description>
12296                  <value>#0</value>
12297                </enumeratedValue>
12298                <enumeratedValue>
12299                  <name>1</name>
12300                  <description>Accesses from an untrusted master are not allowed.</description>
12301                  <value>#1</value>
12302                </enumeratedValue>
12303              </enumeratedValues>
12304            </field>
12305            <field>
12306              <name>WP7</name>
12307              <description>Write Protect</description>
12308              <bitOffset>1</bitOffset>
12309              <bitWidth>1</bitWidth>
12310              <access>read-write</access>
12311              <enumeratedValues>
12312                <enumeratedValue>
12313                  <name>0</name>
12314                  <description>This peripheral allows write accesses.</description>
12315                  <value>#0</value>
12316                </enumeratedValue>
12317                <enumeratedValue>
12318                  <name>1</name>
12319                  <description>This peripheral is write protected.</description>
12320                  <value>#1</value>
12321                </enumeratedValue>
12322              </enumeratedValues>
12323            </field>
12324            <field>
12325              <name>SP7</name>
12326              <description>Supervisor Protect</description>
12327              <bitOffset>2</bitOffset>
12328              <bitWidth>1</bitWidth>
12329              <access>read-write</access>
12330              <enumeratedValues>
12331                <enumeratedValue>
12332                  <name>0</name>
12333                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12334                  <value>#0</value>
12335                </enumeratedValue>
12336                <enumeratedValue>
12337                  <name>1</name>
12338                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12339                  <value>#1</value>
12340                </enumeratedValue>
12341              </enumeratedValues>
12342            </field>
12343            <field>
12344              <name>TP6</name>
12345              <description>Trusted Protect</description>
12346              <bitOffset>4</bitOffset>
12347              <bitWidth>1</bitWidth>
12348              <access>read-write</access>
12349              <enumeratedValues>
12350                <enumeratedValue>
12351                  <name>0</name>
12352                  <description>Accesses from an untrusted master are allowed.</description>
12353                  <value>#0</value>
12354                </enumeratedValue>
12355                <enumeratedValue>
12356                  <name>1</name>
12357                  <description>Accesses from an untrusted master are not allowed.</description>
12358                  <value>#1</value>
12359                </enumeratedValue>
12360              </enumeratedValues>
12361            </field>
12362            <field>
12363              <name>WP6</name>
12364              <description>Write Protect</description>
12365              <bitOffset>5</bitOffset>
12366              <bitWidth>1</bitWidth>
12367              <access>read-write</access>
12368              <enumeratedValues>
12369                <enumeratedValue>
12370                  <name>0</name>
12371                  <description>This peripheral allows write accesses.</description>
12372                  <value>#0</value>
12373                </enumeratedValue>
12374                <enumeratedValue>
12375                  <name>1</name>
12376                  <description>This peripheral is write protected.</description>
12377                  <value>#1</value>
12378                </enumeratedValue>
12379              </enumeratedValues>
12380            </field>
12381            <field>
12382              <name>SP6</name>
12383              <description>Supervisor Protect</description>
12384              <bitOffset>6</bitOffset>
12385              <bitWidth>1</bitWidth>
12386              <access>read-write</access>
12387              <enumeratedValues>
12388                <enumeratedValue>
12389                  <name>0</name>
12390                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12391                  <value>#0</value>
12392                </enumeratedValue>
12393                <enumeratedValue>
12394                  <name>1</name>
12395                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12396                  <value>#1</value>
12397                </enumeratedValue>
12398              </enumeratedValues>
12399            </field>
12400            <field>
12401              <name>TP5</name>
12402              <description>Trusted Protect</description>
12403              <bitOffset>8</bitOffset>
12404              <bitWidth>1</bitWidth>
12405              <access>read-write</access>
12406              <enumeratedValues>
12407                <enumeratedValue>
12408                  <name>0</name>
12409                  <description>Accesses from an untrusted master are allowed.</description>
12410                  <value>#0</value>
12411                </enumeratedValue>
12412                <enumeratedValue>
12413                  <name>1</name>
12414                  <description>Accesses from an untrusted master are not allowed.</description>
12415                  <value>#1</value>
12416                </enumeratedValue>
12417              </enumeratedValues>
12418            </field>
12419            <field>
12420              <name>WP5</name>
12421              <description>Write Protect</description>
12422              <bitOffset>9</bitOffset>
12423              <bitWidth>1</bitWidth>
12424              <access>read-write</access>
12425              <enumeratedValues>
12426                <enumeratedValue>
12427                  <name>0</name>
12428                  <description>This peripheral allows write accesses.</description>
12429                  <value>#0</value>
12430                </enumeratedValue>
12431                <enumeratedValue>
12432                  <name>1</name>
12433                  <description>This peripheral is write protected.</description>
12434                  <value>#1</value>
12435                </enumeratedValue>
12436              </enumeratedValues>
12437            </field>
12438            <field>
12439              <name>SP5</name>
12440              <description>Supervisor Protect</description>
12441              <bitOffset>10</bitOffset>
12442              <bitWidth>1</bitWidth>
12443              <access>read-write</access>
12444              <enumeratedValues>
12445                <enumeratedValue>
12446                  <name>0</name>
12447                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12448                  <value>#0</value>
12449                </enumeratedValue>
12450                <enumeratedValue>
12451                  <name>1</name>
12452                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12453                  <value>#1</value>
12454                </enumeratedValue>
12455              </enumeratedValues>
12456            </field>
12457            <field>
12458              <name>TP4</name>
12459              <description>Trusted Protect</description>
12460              <bitOffset>12</bitOffset>
12461              <bitWidth>1</bitWidth>
12462              <access>read-write</access>
12463              <enumeratedValues>
12464                <enumeratedValue>
12465                  <name>0</name>
12466                  <description>Accesses from an untrusted master are allowed.</description>
12467                  <value>#0</value>
12468                </enumeratedValue>
12469                <enumeratedValue>
12470                  <name>1</name>
12471                  <description>Accesses from an untrusted master are not allowed.</description>
12472                  <value>#1</value>
12473                </enumeratedValue>
12474              </enumeratedValues>
12475            </field>
12476            <field>
12477              <name>WP4</name>
12478              <description>Write Protect</description>
12479              <bitOffset>13</bitOffset>
12480              <bitWidth>1</bitWidth>
12481              <access>read-write</access>
12482              <enumeratedValues>
12483                <enumeratedValue>
12484                  <name>0</name>
12485                  <description>This peripheral allows write accesses.</description>
12486                  <value>#0</value>
12487                </enumeratedValue>
12488                <enumeratedValue>
12489                  <name>1</name>
12490                  <description>This peripheral is write protected.</description>
12491                  <value>#1</value>
12492                </enumeratedValue>
12493              </enumeratedValues>
12494            </field>
12495            <field>
12496              <name>SP4</name>
12497              <description>Supervisor Protect</description>
12498              <bitOffset>14</bitOffset>
12499              <bitWidth>1</bitWidth>
12500              <access>read-write</access>
12501              <enumeratedValues>
12502                <enumeratedValue>
12503                  <name>0</name>
12504                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12505                  <value>#0</value>
12506                </enumeratedValue>
12507                <enumeratedValue>
12508                  <name>1</name>
12509                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12510                  <value>#1</value>
12511                </enumeratedValue>
12512              </enumeratedValues>
12513            </field>
12514            <field>
12515              <name>TP3</name>
12516              <description>Trusted Protect</description>
12517              <bitOffset>16</bitOffset>
12518              <bitWidth>1</bitWidth>
12519              <access>read-write</access>
12520              <enumeratedValues>
12521                <enumeratedValue>
12522                  <name>0</name>
12523                  <description>Accesses from an untrusted master are allowed.</description>
12524                  <value>#0</value>
12525                </enumeratedValue>
12526                <enumeratedValue>
12527                  <name>1</name>
12528                  <description>Accesses from an untrusted master are not allowed.</description>
12529                  <value>#1</value>
12530                </enumeratedValue>
12531              </enumeratedValues>
12532            </field>
12533            <field>
12534              <name>WP3</name>
12535              <description>Write Protect</description>
12536              <bitOffset>17</bitOffset>
12537              <bitWidth>1</bitWidth>
12538              <access>read-write</access>
12539              <enumeratedValues>
12540                <enumeratedValue>
12541                  <name>0</name>
12542                  <description>This peripheral allows write accesses.</description>
12543                  <value>#0</value>
12544                </enumeratedValue>
12545                <enumeratedValue>
12546                  <name>1</name>
12547                  <description>This peripheral is write protected.</description>
12548                  <value>#1</value>
12549                </enumeratedValue>
12550              </enumeratedValues>
12551            </field>
12552            <field>
12553              <name>SP3</name>
12554              <description>Supervisor Protect</description>
12555              <bitOffset>18</bitOffset>
12556              <bitWidth>1</bitWidth>
12557              <access>read-write</access>
12558              <enumeratedValues>
12559                <enumeratedValue>
12560                  <name>0</name>
12561                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12562                  <value>#0</value>
12563                </enumeratedValue>
12564                <enumeratedValue>
12565                  <name>1</name>
12566                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12567                  <value>#1</value>
12568                </enumeratedValue>
12569              </enumeratedValues>
12570            </field>
12571            <field>
12572              <name>TP2</name>
12573              <description>Trusted Protect</description>
12574              <bitOffset>20</bitOffset>
12575              <bitWidth>1</bitWidth>
12576              <access>read-write</access>
12577              <enumeratedValues>
12578                <enumeratedValue>
12579                  <name>0</name>
12580                  <description>Accesses from an untrusted master are allowed.</description>
12581                  <value>#0</value>
12582                </enumeratedValue>
12583                <enumeratedValue>
12584                  <name>1</name>
12585                  <description>Accesses from an untrusted master are not allowed.</description>
12586                  <value>#1</value>
12587                </enumeratedValue>
12588              </enumeratedValues>
12589            </field>
12590            <field>
12591              <name>WP2</name>
12592              <description>Write Protect</description>
12593              <bitOffset>21</bitOffset>
12594              <bitWidth>1</bitWidth>
12595              <access>read-write</access>
12596              <enumeratedValues>
12597                <enumeratedValue>
12598                  <name>0</name>
12599                  <description>This peripheral allows write accesses.</description>
12600                  <value>#0</value>
12601                </enumeratedValue>
12602                <enumeratedValue>
12603                  <name>1</name>
12604                  <description>This peripheral is write protected.</description>
12605                  <value>#1</value>
12606                </enumeratedValue>
12607              </enumeratedValues>
12608            </field>
12609            <field>
12610              <name>SP2</name>
12611              <description>Supervisor Protect</description>
12612              <bitOffset>22</bitOffset>
12613              <bitWidth>1</bitWidth>
12614              <access>read-write</access>
12615              <enumeratedValues>
12616                <enumeratedValue>
12617                  <name>0</name>
12618                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12619                  <value>#0</value>
12620                </enumeratedValue>
12621                <enumeratedValue>
12622                  <name>1</name>
12623                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12624                  <value>#1</value>
12625                </enumeratedValue>
12626              </enumeratedValues>
12627            </field>
12628            <field>
12629              <name>TP1</name>
12630              <description>Trusted Protect</description>
12631              <bitOffset>24</bitOffset>
12632              <bitWidth>1</bitWidth>
12633              <access>read-write</access>
12634              <enumeratedValues>
12635                <enumeratedValue>
12636                  <name>0</name>
12637                  <description>Accesses from an untrusted master are allowed.</description>
12638                  <value>#0</value>
12639                </enumeratedValue>
12640                <enumeratedValue>
12641                  <name>1</name>
12642                  <description>Accesses from an untrusted master are not allowed.</description>
12643                  <value>#1</value>
12644                </enumeratedValue>
12645              </enumeratedValues>
12646            </field>
12647            <field>
12648              <name>WP1</name>
12649              <description>Write Protect</description>
12650              <bitOffset>25</bitOffset>
12651              <bitWidth>1</bitWidth>
12652              <access>read-write</access>
12653              <enumeratedValues>
12654                <enumeratedValue>
12655                  <name>0</name>
12656                  <description>This peripheral allows write accesses.</description>
12657                  <value>#0</value>
12658                </enumeratedValue>
12659                <enumeratedValue>
12660                  <name>1</name>
12661                  <description>This peripheral is write protected.</description>
12662                  <value>#1</value>
12663                </enumeratedValue>
12664              </enumeratedValues>
12665            </field>
12666            <field>
12667              <name>SP1</name>
12668              <description>Supervisor Protect</description>
12669              <bitOffset>26</bitOffset>
12670              <bitWidth>1</bitWidth>
12671              <access>read-write</access>
12672              <enumeratedValues>
12673                <enumeratedValue>
12674                  <name>0</name>
12675                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12676                  <value>#0</value>
12677                </enumeratedValue>
12678                <enumeratedValue>
12679                  <name>1</name>
12680                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12681                  <value>#1</value>
12682                </enumeratedValue>
12683              </enumeratedValues>
12684            </field>
12685            <field>
12686              <name>TP0</name>
12687              <description>Trusted Protect</description>
12688              <bitOffset>28</bitOffset>
12689              <bitWidth>1</bitWidth>
12690              <access>read-write</access>
12691              <enumeratedValues>
12692                <enumeratedValue>
12693                  <name>0</name>
12694                  <description>Accesses from an untrusted master are allowed.</description>
12695                  <value>#0</value>
12696                </enumeratedValue>
12697                <enumeratedValue>
12698                  <name>1</name>
12699                  <description>Accesses from an untrusted master are not allowed.</description>
12700                  <value>#1</value>
12701                </enumeratedValue>
12702              </enumeratedValues>
12703            </field>
12704            <field>
12705              <name>WP0</name>
12706              <description>Write Protect</description>
12707              <bitOffset>29</bitOffset>
12708              <bitWidth>1</bitWidth>
12709              <access>read-write</access>
12710              <enumeratedValues>
12711                <enumeratedValue>
12712                  <name>0</name>
12713                  <description>This peripheral allows write accesses.</description>
12714                  <value>#0</value>
12715                </enumeratedValue>
12716                <enumeratedValue>
12717                  <name>1</name>
12718                  <description>This peripheral is write protected.</description>
12719                  <value>#1</value>
12720                </enumeratedValue>
12721              </enumeratedValues>
12722            </field>
12723            <field>
12724              <name>SP0</name>
12725              <description>Supervisor Protect</description>
12726              <bitOffset>30</bitOffset>
12727              <bitWidth>1</bitWidth>
12728              <access>read-write</access>
12729              <enumeratedValues>
12730                <enumeratedValue>
12731                  <name>0</name>
12732                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12733                  <value>#0</value>
12734                </enumeratedValue>
12735                <enumeratedValue>
12736                  <name>1</name>
12737                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12738                  <value>#1</value>
12739                </enumeratedValue>
12740              </enumeratedValues>
12741            </field>
12742          </fields>
12743        </register>
12744        <register>
12745          <name>PACRJ</name>
12746          <description>Peripheral Access Control Register</description>
12747          <addressOffset>0x54</addressOffset>
12748          <size>32</size>
12749          <access>read-write</access>
12750          <resetValue>0x4404000</resetValue>
12751          <resetMask>0xFFFFFFFF</resetMask>
12752          <fields>
12753            <field>
12754              <name>TP7</name>
12755              <description>Trusted Protect</description>
12756              <bitOffset>0</bitOffset>
12757              <bitWidth>1</bitWidth>
12758              <access>read-write</access>
12759              <enumeratedValues>
12760                <enumeratedValue>
12761                  <name>0</name>
12762                  <description>Accesses from an untrusted master are allowed.</description>
12763                  <value>#0</value>
12764                </enumeratedValue>
12765                <enumeratedValue>
12766                  <name>1</name>
12767                  <description>Accesses from an untrusted master are not allowed.</description>
12768                  <value>#1</value>
12769                </enumeratedValue>
12770              </enumeratedValues>
12771            </field>
12772            <field>
12773              <name>WP7</name>
12774              <description>Write Protect</description>
12775              <bitOffset>1</bitOffset>
12776              <bitWidth>1</bitWidth>
12777              <access>read-write</access>
12778              <enumeratedValues>
12779                <enumeratedValue>
12780                  <name>0</name>
12781                  <description>This peripheral allows write accesses.</description>
12782                  <value>#0</value>
12783                </enumeratedValue>
12784                <enumeratedValue>
12785                  <name>1</name>
12786                  <description>This peripheral is write protected.</description>
12787                  <value>#1</value>
12788                </enumeratedValue>
12789              </enumeratedValues>
12790            </field>
12791            <field>
12792              <name>SP7</name>
12793              <description>Supervisor Protect</description>
12794              <bitOffset>2</bitOffset>
12795              <bitWidth>1</bitWidth>
12796              <access>read-write</access>
12797              <enumeratedValues>
12798                <enumeratedValue>
12799                  <name>0</name>
12800                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12801                  <value>#0</value>
12802                </enumeratedValue>
12803                <enumeratedValue>
12804                  <name>1</name>
12805                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12806                  <value>#1</value>
12807                </enumeratedValue>
12808              </enumeratedValues>
12809            </field>
12810            <field>
12811              <name>TP6</name>
12812              <description>Trusted Protect</description>
12813              <bitOffset>4</bitOffset>
12814              <bitWidth>1</bitWidth>
12815              <access>read-write</access>
12816              <enumeratedValues>
12817                <enumeratedValue>
12818                  <name>0</name>
12819                  <description>Accesses from an untrusted master are allowed.</description>
12820                  <value>#0</value>
12821                </enumeratedValue>
12822                <enumeratedValue>
12823                  <name>1</name>
12824                  <description>Accesses from an untrusted master are not allowed.</description>
12825                  <value>#1</value>
12826                </enumeratedValue>
12827              </enumeratedValues>
12828            </field>
12829            <field>
12830              <name>WP6</name>
12831              <description>Write Protect</description>
12832              <bitOffset>5</bitOffset>
12833              <bitWidth>1</bitWidth>
12834              <access>read-write</access>
12835              <enumeratedValues>
12836                <enumeratedValue>
12837                  <name>0</name>
12838                  <description>This peripheral allows write accesses.</description>
12839                  <value>#0</value>
12840                </enumeratedValue>
12841                <enumeratedValue>
12842                  <name>1</name>
12843                  <description>This peripheral is write protected.</description>
12844                  <value>#1</value>
12845                </enumeratedValue>
12846              </enumeratedValues>
12847            </field>
12848            <field>
12849              <name>SP6</name>
12850              <description>Supervisor Protect</description>
12851              <bitOffset>6</bitOffset>
12852              <bitWidth>1</bitWidth>
12853              <access>read-write</access>
12854              <enumeratedValues>
12855                <enumeratedValue>
12856                  <name>0</name>
12857                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12858                  <value>#0</value>
12859                </enumeratedValue>
12860                <enumeratedValue>
12861                  <name>1</name>
12862                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12863                  <value>#1</value>
12864                </enumeratedValue>
12865              </enumeratedValues>
12866            </field>
12867            <field>
12868              <name>TP5</name>
12869              <description>Trusted Protect</description>
12870              <bitOffset>8</bitOffset>
12871              <bitWidth>1</bitWidth>
12872              <access>read-write</access>
12873              <enumeratedValues>
12874                <enumeratedValue>
12875                  <name>0</name>
12876                  <description>Accesses from an untrusted master are allowed.</description>
12877                  <value>#0</value>
12878                </enumeratedValue>
12879                <enumeratedValue>
12880                  <name>1</name>
12881                  <description>Accesses from an untrusted master are not allowed.</description>
12882                  <value>#1</value>
12883                </enumeratedValue>
12884              </enumeratedValues>
12885            </field>
12886            <field>
12887              <name>WP5</name>
12888              <description>Write Protect</description>
12889              <bitOffset>9</bitOffset>
12890              <bitWidth>1</bitWidth>
12891              <access>read-write</access>
12892              <enumeratedValues>
12893                <enumeratedValue>
12894                  <name>0</name>
12895                  <description>This peripheral allows write accesses.</description>
12896                  <value>#0</value>
12897                </enumeratedValue>
12898                <enumeratedValue>
12899                  <name>1</name>
12900                  <description>This peripheral is write protected.</description>
12901                  <value>#1</value>
12902                </enumeratedValue>
12903              </enumeratedValues>
12904            </field>
12905            <field>
12906              <name>SP5</name>
12907              <description>Supervisor Protect</description>
12908              <bitOffset>10</bitOffset>
12909              <bitWidth>1</bitWidth>
12910              <access>read-write</access>
12911              <enumeratedValues>
12912                <enumeratedValue>
12913                  <name>0</name>
12914                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12915                  <value>#0</value>
12916                </enumeratedValue>
12917                <enumeratedValue>
12918                  <name>1</name>
12919                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12920                  <value>#1</value>
12921                </enumeratedValue>
12922              </enumeratedValues>
12923            </field>
12924            <field>
12925              <name>TP4</name>
12926              <description>Trusted Protect</description>
12927              <bitOffset>12</bitOffset>
12928              <bitWidth>1</bitWidth>
12929              <access>read-write</access>
12930              <enumeratedValues>
12931                <enumeratedValue>
12932                  <name>0</name>
12933                  <description>Accesses from an untrusted master are allowed.</description>
12934                  <value>#0</value>
12935                </enumeratedValue>
12936                <enumeratedValue>
12937                  <name>1</name>
12938                  <description>Accesses from an untrusted master are not allowed.</description>
12939                  <value>#1</value>
12940                </enumeratedValue>
12941              </enumeratedValues>
12942            </field>
12943            <field>
12944              <name>WP4</name>
12945              <description>Write Protect</description>
12946              <bitOffset>13</bitOffset>
12947              <bitWidth>1</bitWidth>
12948              <access>read-write</access>
12949              <enumeratedValues>
12950                <enumeratedValue>
12951                  <name>0</name>
12952                  <description>This peripheral allows write accesses.</description>
12953                  <value>#0</value>
12954                </enumeratedValue>
12955                <enumeratedValue>
12956                  <name>1</name>
12957                  <description>This peripheral is write protected.</description>
12958                  <value>#1</value>
12959                </enumeratedValue>
12960              </enumeratedValues>
12961            </field>
12962            <field>
12963              <name>SP4</name>
12964              <description>Supervisor Protect</description>
12965              <bitOffset>14</bitOffset>
12966              <bitWidth>1</bitWidth>
12967              <access>read-write</access>
12968              <enumeratedValues>
12969                <enumeratedValue>
12970                  <name>0</name>
12971                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
12972                  <value>#0</value>
12973                </enumeratedValue>
12974                <enumeratedValue>
12975                  <name>1</name>
12976                  <description>This peripheral requires supervisor privilege level for accesses.</description>
12977                  <value>#1</value>
12978                </enumeratedValue>
12979              </enumeratedValues>
12980            </field>
12981            <field>
12982              <name>TP3</name>
12983              <description>Trusted Protect</description>
12984              <bitOffset>16</bitOffset>
12985              <bitWidth>1</bitWidth>
12986              <access>read-write</access>
12987              <enumeratedValues>
12988                <enumeratedValue>
12989                  <name>0</name>
12990                  <description>Accesses from an untrusted master are allowed.</description>
12991                  <value>#0</value>
12992                </enumeratedValue>
12993                <enumeratedValue>
12994                  <name>1</name>
12995                  <description>Accesses from an untrusted master are not allowed.</description>
12996                  <value>#1</value>
12997                </enumeratedValue>
12998              </enumeratedValues>
12999            </field>
13000            <field>
13001              <name>WP3</name>
13002              <description>Write Protect</description>
13003              <bitOffset>17</bitOffset>
13004              <bitWidth>1</bitWidth>
13005              <access>read-write</access>
13006              <enumeratedValues>
13007                <enumeratedValue>
13008                  <name>0</name>
13009                  <description>This peripheral allows write accesses.</description>
13010                  <value>#0</value>
13011                </enumeratedValue>
13012                <enumeratedValue>
13013                  <name>1</name>
13014                  <description>This peripheral is write protected.</description>
13015                  <value>#1</value>
13016                </enumeratedValue>
13017              </enumeratedValues>
13018            </field>
13019            <field>
13020              <name>SP3</name>
13021              <description>Supervisor Protect</description>
13022              <bitOffset>18</bitOffset>
13023              <bitWidth>1</bitWidth>
13024              <access>read-write</access>
13025              <enumeratedValues>
13026                <enumeratedValue>
13027                  <name>0</name>
13028                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13029                  <value>#0</value>
13030                </enumeratedValue>
13031                <enumeratedValue>
13032                  <name>1</name>
13033                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13034                  <value>#1</value>
13035                </enumeratedValue>
13036              </enumeratedValues>
13037            </field>
13038            <field>
13039              <name>TP2</name>
13040              <description>Trusted Protect</description>
13041              <bitOffset>20</bitOffset>
13042              <bitWidth>1</bitWidth>
13043              <access>read-write</access>
13044              <enumeratedValues>
13045                <enumeratedValue>
13046                  <name>0</name>
13047                  <description>Accesses from an untrusted master are allowed.</description>
13048                  <value>#0</value>
13049                </enumeratedValue>
13050                <enumeratedValue>
13051                  <name>1</name>
13052                  <description>Accesses from an untrusted master are not allowed.</description>
13053                  <value>#1</value>
13054                </enumeratedValue>
13055              </enumeratedValues>
13056            </field>
13057            <field>
13058              <name>WP2</name>
13059              <description>Write Protect</description>
13060              <bitOffset>21</bitOffset>
13061              <bitWidth>1</bitWidth>
13062              <access>read-write</access>
13063              <enumeratedValues>
13064                <enumeratedValue>
13065                  <name>0</name>
13066                  <description>This peripheral allows write accesses.</description>
13067                  <value>#0</value>
13068                </enumeratedValue>
13069                <enumeratedValue>
13070                  <name>1</name>
13071                  <description>This peripheral is write protected.</description>
13072                  <value>#1</value>
13073                </enumeratedValue>
13074              </enumeratedValues>
13075            </field>
13076            <field>
13077              <name>SP2</name>
13078              <description>Supervisor Protect</description>
13079              <bitOffset>22</bitOffset>
13080              <bitWidth>1</bitWidth>
13081              <access>read-write</access>
13082              <enumeratedValues>
13083                <enumeratedValue>
13084                  <name>0</name>
13085                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13086                  <value>#0</value>
13087                </enumeratedValue>
13088                <enumeratedValue>
13089                  <name>1</name>
13090                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13091                  <value>#1</value>
13092                </enumeratedValue>
13093              </enumeratedValues>
13094            </field>
13095            <field>
13096              <name>TP1</name>
13097              <description>Trusted Protect</description>
13098              <bitOffset>24</bitOffset>
13099              <bitWidth>1</bitWidth>
13100              <access>read-write</access>
13101              <enumeratedValues>
13102                <enumeratedValue>
13103                  <name>0</name>
13104                  <description>Accesses from an untrusted master are allowed.</description>
13105                  <value>#0</value>
13106                </enumeratedValue>
13107                <enumeratedValue>
13108                  <name>1</name>
13109                  <description>Accesses from an untrusted master are not allowed.</description>
13110                  <value>#1</value>
13111                </enumeratedValue>
13112              </enumeratedValues>
13113            </field>
13114            <field>
13115              <name>WP1</name>
13116              <description>Write Protect</description>
13117              <bitOffset>25</bitOffset>
13118              <bitWidth>1</bitWidth>
13119              <access>read-write</access>
13120              <enumeratedValues>
13121                <enumeratedValue>
13122                  <name>0</name>
13123                  <description>This peripheral allows write accesses.</description>
13124                  <value>#0</value>
13125                </enumeratedValue>
13126                <enumeratedValue>
13127                  <name>1</name>
13128                  <description>This peripheral is write protected.</description>
13129                  <value>#1</value>
13130                </enumeratedValue>
13131              </enumeratedValues>
13132            </field>
13133            <field>
13134              <name>SP1</name>
13135              <description>Supervisor Protect</description>
13136              <bitOffset>26</bitOffset>
13137              <bitWidth>1</bitWidth>
13138              <access>read-write</access>
13139              <enumeratedValues>
13140                <enumeratedValue>
13141                  <name>0</name>
13142                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13143                  <value>#0</value>
13144                </enumeratedValue>
13145                <enumeratedValue>
13146                  <name>1</name>
13147                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13148                  <value>#1</value>
13149                </enumeratedValue>
13150              </enumeratedValues>
13151            </field>
13152            <field>
13153              <name>TP0</name>
13154              <description>Trusted Protect</description>
13155              <bitOffset>28</bitOffset>
13156              <bitWidth>1</bitWidth>
13157              <access>read-write</access>
13158              <enumeratedValues>
13159                <enumeratedValue>
13160                  <name>0</name>
13161                  <description>Accesses from an untrusted master are allowed.</description>
13162                  <value>#0</value>
13163                </enumeratedValue>
13164                <enumeratedValue>
13165                  <name>1</name>
13166                  <description>Accesses from an untrusted master are not allowed.</description>
13167                  <value>#1</value>
13168                </enumeratedValue>
13169              </enumeratedValues>
13170            </field>
13171            <field>
13172              <name>WP0</name>
13173              <description>Write Protect</description>
13174              <bitOffset>29</bitOffset>
13175              <bitWidth>1</bitWidth>
13176              <access>read-write</access>
13177              <enumeratedValues>
13178                <enumeratedValue>
13179                  <name>0</name>
13180                  <description>This peripheral allows write accesses.</description>
13181                  <value>#0</value>
13182                </enumeratedValue>
13183                <enumeratedValue>
13184                  <name>1</name>
13185                  <description>This peripheral is write protected.</description>
13186                  <value>#1</value>
13187                </enumeratedValue>
13188              </enumeratedValues>
13189            </field>
13190            <field>
13191              <name>SP0</name>
13192              <description>Supervisor Protect</description>
13193              <bitOffset>30</bitOffset>
13194              <bitWidth>1</bitWidth>
13195              <access>read-write</access>
13196              <enumeratedValues>
13197                <enumeratedValue>
13198                  <name>0</name>
13199                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13200                  <value>#0</value>
13201                </enumeratedValue>
13202                <enumeratedValue>
13203                  <name>1</name>
13204                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13205                  <value>#1</value>
13206                </enumeratedValue>
13207              </enumeratedValues>
13208            </field>
13209          </fields>
13210        </register>
13211        <register>
13212          <name>PACRK</name>
13213          <description>Peripheral Access Control Register</description>
13214          <addressOffset>0x58</addressOffset>
13215          <size>32</size>
13216          <access>read-write</access>
13217          <resetValue>0x4440</resetValue>
13218          <resetMask>0xFFFFFFFF</resetMask>
13219          <fields>
13220            <field>
13221              <name>TP7</name>
13222              <description>Trusted Protect</description>
13223              <bitOffset>0</bitOffset>
13224              <bitWidth>1</bitWidth>
13225              <access>read-write</access>
13226              <enumeratedValues>
13227                <enumeratedValue>
13228                  <name>0</name>
13229                  <description>Accesses from an untrusted master are allowed.</description>
13230                  <value>#0</value>
13231                </enumeratedValue>
13232                <enumeratedValue>
13233                  <name>1</name>
13234                  <description>Accesses from an untrusted master are not allowed.</description>
13235                  <value>#1</value>
13236                </enumeratedValue>
13237              </enumeratedValues>
13238            </field>
13239            <field>
13240              <name>WP7</name>
13241              <description>Write Protect</description>
13242              <bitOffset>1</bitOffset>
13243              <bitWidth>1</bitWidth>
13244              <access>read-write</access>
13245              <enumeratedValues>
13246                <enumeratedValue>
13247                  <name>0</name>
13248                  <description>This peripheral allows write accesses.</description>
13249                  <value>#0</value>
13250                </enumeratedValue>
13251                <enumeratedValue>
13252                  <name>1</name>
13253                  <description>This peripheral is write protected.</description>
13254                  <value>#1</value>
13255                </enumeratedValue>
13256              </enumeratedValues>
13257            </field>
13258            <field>
13259              <name>SP7</name>
13260              <description>Supervisor Protect</description>
13261              <bitOffset>2</bitOffset>
13262              <bitWidth>1</bitWidth>
13263              <access>read-write</access>
13264              <enumeratedValues>
13265                <enumeratedValue>
13266                  <name>0</name>
13267                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13268                  <value>#0</value>
13269                </enumeratedValue>
13270                <enumeratedValue>
13271                  <name>1</name>
13272                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13273                  <value>#1</value>
13274                </enumeratedValue>
13275              </enumeratedValues>
13276            </field>
13277            <field>
13278              <name>TP6</name>
13279              <description>Trusted Protect</description>
13280              <bitOffset>4</bitOffset>
13281              <bitWidth>1</bitWidth>
13282              <access>read-write</access>
13283              <enumeratedValues>
13284                <enumeratedValue>
13285                  <name>0</name>
13286                  <description>Accesses from an untrusted master are allowed.</description>
13287                  <value>#0</value>
13288                </enumeratedValue>
13289                <enumeratedValue>
13290                  <name>1</name>
13291                  <description>Accesses from an untrusted master are not allowed.</description>
13292                  <value>#1</value>
13293                </enumeratedValue>
13294              </enumeratedValues>
13295            </field>
13296            <field>
13297              <name>WP6</name>
13298              <description>Write Protect</description>
13299              <bitOffset>5</bitOffset>
13300              <bitWidth>1</bitWidth>
13301              <access>read-write</access>
13302              <enumeratedValues>
13303                <enumeratedValue>
13304                  <name>0</name>
13305                  <description>This peripheral allows write accesses.</description>
13306                  <value>#0</value>
13307                </enumeratedValue>
13308                <enumeratedValue>
13309                  <name>1</name>
13310                  <description>This peripheral is write protected.</description>
13311                  <value>#1</value>
13312                </enumeratedValue>
13313              </enumeratedValues>
13314            </field>
13315            <field>
13316              <name>SP6</name>
13317              <description>Supervisor Protect</description>
13318              <bitOffset>6</bitOffset>
13319              <bitWidth>1</bitWidth>
13320              <access>read-write</access>
13321              <enumeratedValues>
13322                <enumeratedValue>
13323                  <name>0</name>
13324                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13325                  <value>#0</value>
13326                </enumeratedValue>
13327                <enumeratedValue>
13328                  <name>1</name>
13329                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13330                  <value>#1</value>
13331                </enumeratedValue>
13332              </enumeratedValues>
13333            </field>
13334            <field>
13335              <name>TP5</name>
13336              <description>Trusted Protect</description>
13337              <bitOffset>8</bitOffset>
13338              <bitWidth>1</bitWidth>
13339              <access>read-write</access>
13340              <enumeratedValues>
13341                <enumeratedValue>
13342                  <name>0</name>
13343                  <description>Accesses from an untrusted master are allowed.</description>
13344                  <value>#0</value>
13345                </enumeratedValue>
13346                <enumeratedValue>
13347                  <name>1</name>
13348                  <description>Accesses from an untrusted master are not allowed.</description>
13349                  <value>#1</value>
13350                </enumeratedValue>
13351              </enumeratedValues>
13352            </field>
13353            <field>
13354              <name>WP5</name>
13355              <description>Write Protect</description>
13356              <bitOffset>9</bitOffset>
13357              <bitWidth>1</bitWidth>
13358              <access>read-write</access>
13359              <enumeratedValues>
13360                <enumeratedValue>
13361                  <name>0</name>
13362                  <description>This peripheral allows write accesses.</description>
13363                  <value>#0</value>
13364                </enumeratedValue>
13365                <enumeratedValue>
13366                  <name>1</name>
13367                  <description>This peripheral is write protected.</description>
13368                  <value>#1</value>
13369                </enumeratedValue>
13370              </enumeratedValues>
13371            </field>
13372            <field>
13373              <name>SP5</name>
13374              <description>Supervisor Protect</description>
13375              <bitOffset>10</bitOffset>
13376              <bitWidth>1</bitWidth>
13377              <access>read-write</access>
13378              <enumeratedValues>
13379                <enumeratedValue>
13380                  <name>0</name>
13381                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13382                  <value>#0</value>
13383                </enumeratedValue>
13384                <enumeratedValue>
13385                  <name>1</name>
13386                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13387                  <value>#1</value>
13388                </enumeratedValue>
13389              </enumeratedValues>
13390            </field>
13391            <field>
13392              <name>TP4</name>
13393              <description>Trusted Protect</description>
13394              <bitOffset>12</bitOffset>
13395              <bitWidth>1</bitWidth>
13396              <access>read-write</access>
13397              <enumeratedValues>
13398                <enumeratedValue>
13399                  <name>0</name>
13400                  <description>Accesses from an untrusted master are allowed.</description>
13401                  <value>#0</value>
13402                </enumeratedValue>
13403                <enumeratedValue>
13404                  <name>1</name>
13405                  <description>Accesses from an untrusted master are not allowed.</description>
13406                  <value>#1</value>
13407                </enumeratedValue>
13408              </enumeratedValues>
13409            </field>
13410            <field>
13411              <name>WP4</name>
13412              <description>Write Protect</description>
13413              <bitOffset>13</bitOffset>
13414              <bitWidth>1</bitWidth>
13415              <access>read-write</access>
13416              <enumeratedValues>
13417                <enumeratedValue>
13418                  <name>0</name>
13419                  <description>This peripheral allows write accesses.</description>
13420                  <value>#0</value>
13421                </enumeratedValue>
13422                <enumeratedValue>
13423                  <name>1</name>
13424                  <description>This peripheral is write protected.</description>
13425                  <value>#1</value>
13426                </enumeratedValue>
13427              </enumeratedValues>
13428            </field>
13429            <field>
13430              <name>SP4</name>
13431              <description>Supervisor Protect</description>
13432              <bitOffset>14</bitOffset>
13433              <bitWidth>1</bitWidth>
13434              <access>read-write</access>
13435              <enumeratedValues>
13436                <enumeratedValue>
13437                  <name>0</name>
13438                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13439                  <value>#0</value>
13440                </enumeratedValue>
13441                <enumeratedValue>
13442                  <name>1</name>
13443                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13444                  <value>#1</value>
13445                </enumeratedValue>
13446              </enumeratedValues>
13447            </field>
13448            <field>
13449              <name>TP3</name>
13450              <description>Trusted Protect</description>
13451              <bitOffset>16</bitOffset>
13452              <bitWidth>1</bitWidth>
13453              <access>read-write</access>
13454              <enumeratedValues>
13455                <enumeratedValue>
13456                  <name>0</name>
13457                  <description>Accesses from an untrusted master are allowed.</description>
13458                  <value>#0</value>
13459                </enumeratedValue>
13460                <enumeratedValue>
13461                  <name>1</name>
13462                  <description>Accesses from an untrusted master are not allowed.</description>
13463                  <value>#1</value>
13464                </enumeratedValue>
13465              </enumeratedValues>
13466            </field>
13467            <field>
13468              <name>WP3</name>
13469              <description>Write Protect</description>
13470              <bitOffset>17</bitOffset>
13471              <bitWidth>1</bitWidth>
13472              <access>read-write</access>
13473              <enumeratedValues>
13474                <enumeratedValue>
13475                  <name>0</name>
13476                  <description>This peripheral allows write accesses.</description>
13477                  <value>#0</value>
13478                </enumeratedValue>
13479                <enumeratedValue>
13480                  <name>1</name>
13481                  <description>This peripheral is write protected.</description>
13482                  <value>#1</value>
13483                </enumeratedValue>
13484              </enumeratedValues>
13485            </field>
13486            <field>
13487              <name>SP3</name>
13488              <description>Supervisor Protect</description>
13489              <bitOffset>18</bitOffset>
13490              <bitWidth>1</bitWidth>
13491              <access>read-write</access>
13492              <enumeratedValues>
13493                <enumeratedValue>
13494                  <name>0</name>
13495                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13496                  <value>#0</value>
13497                </enumeratedValue>
13498                <enumeratedValue>
13499                  <name>1</name>
13500                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13501                  <value>#1</value>
13502                </enumeratedValue>
13503              </enumeratedValues>
13504            </field>
13505            <field>
13506              <name>TP2</name>
13507              <description>Trusted Protect</description>
13508              <bitOffset>20</bitOffset>
13509              <bitWidth>1</bitWidth>
13510              <access>read-write</access>
13511              <enumeratedValues>
13512                <enumeratedValue>
13513                  <name>0</name>
13514                  <description>Accesses from an untrusted master are allowed.</description>
13515                  <value>#0</value>
13516                </enumeratedValue>
13517                <enumeratedValue>
13518                  <name>1</name>
13519                  <description>Accesses from an untrusted master are not allowed.</description>
13520                  <value>#1</value>
13521                </enumeratedValue>
13522              </enumeratedValues>
13523            </field>
13524            <field>
13525              <name>WP2</name>
13526              <description>Write Protect</description>
13527              <bitOffset>21</bitOffset>
13528              <bitWidth>1</bitWidth>
13529              <access>read-write</access>
13530              <enumeratedValues>
13531                <enumeratedValue>
13532                  <name>0</name>
13533                  <description>This peripheral allows write accesses.</description>
13534                  <value>#0</value>
13535                </enumeratedValue>
13536                <enumeratedValue>
13537                  <name>1</name>
13538                  <description>This peripheral is write protected.</description>
13539                  <value>#1</value>
13540                </enumeratedValue>
13541              </enumeratedValues>
13542            </field>
13543            <field>
13544              <name>SP2</name>
13545              <description>Supervisor Protect</description>
13546              <bitOffset>22</bitOffset>
13547              <bitWidth>1</bitWidth>
13548              <access>read-write</access>
13549              <enumeratedValues>
13550                <enumeratedValue>
13551                  <name>0</name>
13552                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13553                  <value>#0</value>
13554                </enumeratedValue>
13555                <enumeratedValue>
13556                  <name>1</name>
13557                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13558                  <value>#1</value>
13559                </enumeratedValue>
13560              </enumeratedValues>
13561            </field>
13562            <field>
13563              <name>TP1</name>
13564              <description>Trusted Protect</description>
13565              <bitOffset>24</bitOffset>
13566              <bitWidth>1</bitWidth>
13567              <access>read-write</access>
13568              <enumeratedValues>
13569                <enumeratedValue>
13570                  <name>0</name>
13571                  <description>Accesses from an untrusted master are allowed.</description>
13572                  <value>#0</value>
13573                </enumeratedValue>
13574                <enumeratedValue>
13575                  <name>1</name>
13576                  <description>Accesses from an untrusted master are not allowed.</description>
13577                  <value>#1</value>
13578                </enumeratedValue>
13579              </enumeratedValues>
13580            </field>
13581            <field>
13582              <name>WP1</name>
13583              <description>Write Protect</description>
13584              <bitOffset>25</bitOffset>
13585              <bitWidth>1</bitWidth>
13586              <access>read-write</access>
13587              <enumeratedValues>
13588                <enumeratedValue>
13589                  <name>0</name>
13590                  <description>This peripheral allows write accesses.</description>
13591                  <value>#0</value>
13592                </enumeratedValue>
13593                <enumeratedValue>
13594                  <name>1</name>
13595                  <description>This peripheral is write protected.</description>
13596                  <value>#1</value>
13597                </enumeratedValue>
13598              </enumeratedValues>
13599            </field>
13600            <field>
13601              <name>SP1</name>
13602              <description>Supervisor Protect</description>
13603              <bitOffset>26</bitOffset>
13604              <bitWidth>1</bitWidth>
13605              <access>read-write</access>
13606              <enumeratedValues>
13607                <enumeratedValue>
13608                  <name>0</name>
13609                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13610                  <value>#0</value>
13611                </enumeratedValue>
13612                <enumeratedValue>
13613                  <name>1</name>
13614                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13615                  <value>#1</value>
13616                </enumeratedValue>
13617              </enumeratedValues>
13618            </field>
13619            <field>
13620              <name>TP0</name>
13621              <description>Trusted Protect</description>
13622              <bitOffset>28</bitOffset>
13623              <bitWidth>1</bitWidth>
13624              <access>read-write</access>
13625              <enumeratedValues>
13626                <enumeratedValue>
13627                  <name>0</name>
13628                  <description>Accesses from an untrusted master are allowed.</description>
13629                  <value>#0</value>
13630                </enumeratedValue>
13631                <enumeratedValue>
13632                  <name>1</name>
13633                  <description>Accesses from an untrusted master are not allowed.</description>
13634                  <value>#1</value>
13635                </enumeratedValue>
13636              </enumeratedValues>
13637            </field>
13638            <field>
13639              <name>WP0</name>
13640              <description>Write Protect</description>
13641              <bitOffset>29</bitOffset>
13642              <bitWidth>1</bitWidth>
13643              <access>read-write</access>
13644              <enumeratedValues>
13645                <enumeratedValue>
13646                  <name>0</name>
13647                  <description>This peripheral allows write accesses.</description>
13648                  <value>#0</value>
13649                </enumeratedValue>
13650                <enumeratedValue>
13651                  <name>1</name>
13652                  <description>This peripheral is write protected.</description>
13653                  <value>#1</value>
13654                </enumeratedValue>
13655              </enumeratedValues>
13656            </field>
13657            <field>
13658              <name>SP0</name>
13659              <description>Supervisor Protect</description>
13660              <bitOffset>30</bitOffset>
13661              <bitWidth>1</bitWidth>
13662              <access>read-write</access>
13663              <enumeratedValues>
13664                <enumeratedValue>
13665                  <name>0</name>
13666                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13667                  <value>#0</value>
13668                </enumeratedValue>
13669                <enumeratedValue>
13670                  <name>1</name>
13671                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13672                  <value>#1</value>
13673                </enumeratedValue>
13674              </enumeratedValues>
13675            </field>
13676          </fields>
13677        </register>
13678        <register>
13679          <name>PACRL</name>
13680          <description>Peripheral Access Control Register</description>
13681          <addressOffset>0x5C</addressOffset>
13682          <size>32</size>
13683          <access>read-write</access>
13684          <resetValue>0x400004</resetValue>
13685          <resetMask>0xFFFFFFFF</resetMask>
13686          <fields>
13687            <field>
13688              <name>TP7</name>
13689              <description>Trusted Protect</description>
13690              <bitOffset>0</bitOffset>
13691              <bitWidth>1</bitWidth>
13692              <access>read-write</access>
13693              <enumeratedValues>
13694                <enumeratedValue>
13695                  <name>0</name>
13696                  <description>Accesses from an untrusted master are allowed.</description>
13697                  <value>#0</value>
13698                </enumeratedValue>
13699                <enumeratedValue>
13700                  <name>1</name>
13701                  <description>Accesses from an untrusted master are not allowed.</description>
13702                  <value>#1</value>
13703                </enumeratedValue>
13704              </enumeratedValues>
13705            </field>
13706            <field>
13707              <name>WP7</name>
13708              <description>Write Protect</description>
13709              <bitOffset>1</bitOffset>
13710              <bitWidth>1</bitWidth>
13711              <access>read-write</access>
13712              <enumeratedValues>
13713                <enumeratedValue>
13714                  <name>0</name>
13715                  <description>This peripheral allows write accesses.</description>
13716                  <value>#0</value>
13717                </enumeratedValue>
13718                <enumeratedValue>
13719                  <name>1</name>
13720                  <description>This peripheral is write protected.</description>
13721                  <value>#1</value>
13722                </enumeratedValue>
13723              </enumeratedValues>
13724            </field>
13725            <field>
13726              <name>SP7</name>
13727              <description>Supervisor Protect</description>
13728              <bitOffset>2</bitOffset>
13729              <bitWidth>1</bitWidth>
13730              <access>read-write</access>
13731              <enumeratedValues>
13732                <enumeratedValue>
13733                  <name>0</name>
13734                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13735                  <value>#0</value>
13736                </enumeratedValue>
13737                <enumeratedValue>
13738                  <name>1</name>
13739                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13740                  <value>#1</value>
13741                </enumeratedValue>
13742              </enumeratedValues>
13743            </field>
13744            <field>
13745              <name>TP6</name>
13746              <description>Trusted Protect</description>
13747              <bitOffset>4</bitOffset>
13748              <bitWidth>1</bitWidth>
13749              <access>read-write</access>
13750              <enumeratedValues>
13751                <enumeratedValue>
13752                  <name>0</name>
13753                  <description>Accesses from an untrusted master are allowed.</description>
13754                  <value>#0</value>
13755                </enumeratedValue>
13756                <enumeratedValue>
13757                  <name>1</name>
13758                  <description>Accesses from an untrusted master are not allowed.</description>
13759                  <value>#1</value>
13760                </enumeratedValue>
13761              </enumeratedValues>
13762            </field>
13763            <field>
13764              <name>WP6</name>
13765              <description>Write Protect</description>
13766              <bitOffset>5</bitOffset>
13767              <bitWidth>1</bitWidth>
13768              <access>read-write</access>
13769              <enumeratedValues>
13770                <enumeratedValue>
13771                  <name>0</name>
13772                  <description>This peripheral allows write accesses.</description>
13773                  <value>#0</value>
13774                </enumeratedValue>
13775                <enumeratedValue>
13776                  <name>1</name>
13777                  <description>This peripheral is write protected.</description>
13778                  <value>#1</value>
13779                </enumeratedValue>
13780              </enumeratedValues>
13781            </field>
13782            <field>
13783              <name>SP6</name>
13784              <description>Supervisor Protect</description>
13785              <bitOffset>6</bitOffset>
13786              <bitWidth>1</bitWidth>
13787              <access>read-write</access>
13788              <enumeratedValues>
13789                <enumeratedValue>
13790                  <name>0</name>
13791                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13792                  <value>#0</value>
13793                </enumeratedValue>
13794                <enumeratedValue>
13795                  <name>1</name>
13796                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13797                  <value>#1</value>
13798                </enumeratedValue>
13799              </enumeratedValues>
13800            </field>
13801            <field>
13802              <name>TP5</name>
13803              <description>Trusted Protect</description>
13804              <bitOffset>8</bitOffset>
13805              <bitWidth>1</bitWidth>
13806              <access>read-write</access>
13807              <enumeratedValues>
13808                <enumeratedValue>
13809                  <name>0</name>
13810                  <description>Accesses from an untrusted master are allowed.</description>
13811                  <value>#0</value>
13812                </enumeratedValue>
13813                <enumeratedValue>
13814                  <name>1</name>
13815                  <description>Accesses from an untrusted master are not allowed.</description>
13816                  <value>#1</value>
13817                </enumeratedValue>
13818              </enumeratedValues>
13819            </field>
13820            <field>
13821              <name>WP5</name>
13822              <description>Write Protect</description>
13823              <bitOffset>9</bitOffset>
13824              <bitWidth>1</bitWidth>
13825              <access>read-write</access>
13826              <enumeratedValues>
13827                <enumeratedValue>
13828                  <name>0</name>
13829                  <description>This peripheral allows write accesses.</description>
13830                  <value>#0</value>
13831                </enumeratedValue>
13832                <enumeratedValue>
13833                  <name>1</name>
13834                  <description>This peripheral is write protected.</description>
13835                  <value>#1</value>
13836                </enumeratedValue>
13837              </enumeratedValues>
13838            </field>
13839            <field>
13840              <name>SP5</name>
13841              <description>Supervisor Protect</description>
13842              <bitOffset>10</bitOffset>
13843              <bitWidth>1</bitWidth>
13844              <access>read-write</access>
13845              <enumeratedValues>
13846                <enumeratedValue>
13847                  <name>0</name>
13848                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13849                  <value>#0</value>
13850                </enumeratedValue>
13851                <enumeratedValue>
13852                  <name>1</name>
13853                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13854                  <value>#1</value>
13855                </enumeratedValue>
13856              </enumeratedValues>
13857            </field>
13858            <field>
13859              <name>TP4</name>
13860              <description>Trusted Protect</description>
13861              <bitOffset>12</bitOffset>
13862              <bitWidth>1</bitWidth>
13863              <access>read-write</access>
13864              <enumeratedValues>
13865                <enumeratedValue>
13866                  <name>0</name>
13867                  <description>Accesses from an untrusted master are allowed.</description>
13868                  <value>#0</value>
13869                </enumeratedValue>
13870                <enumeratedValue>
13871                  <name>1</name>
13872                  <description>Accesses from an untrusted master are not allowed.</description>
13873                  <value>#1</value>
13874                </enumeratedValue>
13875              </enumeratedValues>
13876            </field>
13877            <field>
13878              <name>WP4</name>
13879              <description>Write Protect</description>
13880              <bitOffset>13</bitOffset>
13881              <bitWidth>1</bitWidth>
13882              <access>read-write</access>
13883              <enumeratedValues>
13884                <enumeratedValue>
13885                  <name>0</name>
13886                  <description>This peripheral allows write accesses.</description>
13887                  <value>#0</value>
13888                </enumeratedValue>
13889                <enumeratedValue>
13890                  <name>1</name>
13891                  <description>This peripheral is write protected.</description>
13892                  <value>#1</value>
13893                </enumeratedValue>
13894              </enumeratedValues>
13895            </field>
13896            <field>
13897              <name>SP4</name>
13898              <description>Supervisor Protect</description>
13899              <bitOffset>14</bitOffset>
13900              <bitWidth>1</bitWidth>
13901              <access>read-write</access>
13902              <enumeratedValues>
13903                <enumeratedValue>
13904                  <name>0</name>
13905                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13906                  <value>#0</value>
13907                </enumeratedValue>
13908                <enumeratedValue>
13909                  <name>1</name>
13910                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13911                  <value>#1</value>
13912                </enumeratedValue>
13913              </enumeratedValues>
13914            </field>
13915            <field>
13916              <name>TP3</name>
13917              <description>Trusted Protect</description>
13918              <bitOffset>16</bitOffset>
13919              <bitWidth>1</bitWidth>
13920              <access>read-write</access>
13921              <enumeratedValues>
13922                <enumeratedValue>
13923                  <name>0</name>
13924                  <description>Accesses from an untrusted master are allowed.</description>
13925                  <value>#0</value>
13926                </enumeratedValue>
13927                <enumeratedValue>
13928                  <name>1</name>
13929                  <description>Accesses from an untrusted master are not allowed.</description>
13930                  <value>#1</value>
13931                </enumeratedValue>
13932              </enumeratedValues>
13933            </field>
13934            <field>
13935              <name>WP3</name>
13936              <description>Write Protect</description>
13937              <bitOffset>17</bitOffset>
13938              <bitWidth>1</bitWidth>
13939              <access>read-write</access>
13940              <enumeratedValues>
13941                <enumeratedValue>
13942                  <name>0</name>
13943                  <description>This peripheral allows write accesses.</description>
13944                  <value>#0</value>
13945                </enumeratedValue>
13946                <enumeratedValue>
13947                  <name>1</name>
13948                  <description>This peripheral is write protected.</description>
13949                  <value>#1</value>
13950                </enumeratedValue>
13951              </enumeratedValues>
13952            </field>
13953            <field>
13954              <name>SP3</name>
13955              <description>Supervisor Protect</description>
13956              <bitOffset>18</bitOffset>
13957              <bitWidth>1</bitWidth>
13958              <access>read-write</access>
13959              <enumeratedValues>
13960                <enumeratedValue>
13961                  <name>0</name>
13962                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
13963                  <value>#0</value>
13964                </enumeratedValue>
13965                <enumeratedValue>
13966                  <name>1</name>
13967                  <description>This peripheral requires supervisor privilege level for accesses.</description>
13968                  <value>#1</value>
13969                </enumeratedValue>
13970              </enumeratedValues>
13971            </field>
13972            <field>
13973              <name>TP2</name>
13974              <description>Trusted Protect</description>
13975              <bitOffset>20</bitOffset>
13976              <bitWidth>1</bitWidth>
13977              <access>read-write</access>
13978              <enumeratedValues>
13979                <enumeratedValue>
13980                  <name>0</name>
13981                  <description>Accesses from an untrusted master are allowed.</description>
13982                  <value>#0</value>
13983                </enumeratedValue>
13984                <enumeratedValue>
13985                  <name>1</name>
13986                  <description>Accesses from an untrusted master are not allowed.</description>
13987                  <value>#1</value>
13988                </enumeratedValue>
13989              </enumeratedValues>
13990            </field>
13991            <field>
13992              <name>WP2</name>
13993              <description>Write Protect</description>
13994              <bitOffset>21</bitOffset>
13995              <bitWidth>1</bitWidth>
13996              <access>read-write</access>
13997              <enumeratedValues>
13998                <enumeratedValue>
13999                  <name>0</name>
14000                  <description>This peripheral allows write accesses.</description>
14001                  <value>#0</value>
14002                </enumeratedValue>
14003                <enumeratedValue>
14004                  <name>1</name>
14005                  <description>This peripheral is write protected.</description>
14006                  <value>#1</value>
14007                </enumeratedValue>
14008              </enumeratedValues>
14009            </field>
14010            <field>
14011              <name>SP2</name>
14012              <description>Supervisor Protect</description>
14013              <bitOffset>22</bitOffset>
14014              <bitWidth>1</bitWidth>
14015              <access>read-write</access>
14016              <enumeratedValues>
14017                <enumeratedValue>
14018                  <name>0</name>
14019                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14020                  <value>#0</value>
14021                </enumeratedValue>
14022                <enumeratedValue>
14023                  <name>1</name>
14024                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14025                  <value>#1</value>
14026                </enumeratedValue>
14027              </enumeratedValues>
14028            </field>
14029            <field>
14030              <name>TP1</name>
14031              <description>Trusted Protect</description>
14032              <bitOffset>24</bitOffset>
14033              <bitWidth>1</bitWidth>
14034              <access>read-write</access>
14035              <enumeratedValues>
14036                <enumeratedValue>
14037                  <name>0</name>
14038                  <description>Accesses from an untrusted master are allowed.</description>
14039                  <value>#0</value>
14040                </enumeratedValue>
14041                <enumeratedValue>
14042                  <name>1</name>
14043                  <description>Accesses from an untrusted master are not allowed.</description>
14044                  <value>#1</value>
14045                </enumeratedValue>
14046              </enumeratedValues>
14047            </field>
14048            <field>
14049              <name>WP1</name>
14050              <description>Write Protect</description>
14051              <bitOffset>25</bitOffset>
14052              <bitWidth>1</bitWidth>
14053              <access>read-write</access>
14054              <enumeratedValues>
14055                <enumeratedValue>
14056                  <name>0</name>
14057                  <description>This peripheral allows write accesses.</description>
14058                  <value>#0</value>
14059                </enumeratedValue>
14060                <enumeratedValue>
14061                  <name>1</name>
14062                  <description>This peripheral is write protected.</description>
14063                  <value>#1</value>
14064                </enumeratedValue>
14065              </enumeratedValues>
14066            </field>
14067            <field>
14068              <name>SP1</name>
14069              <description>Supervisor Protect</description>
14070              <bitOffset>26</bitOffset>
14071              <bitWidth>1</bitWidth>
14072              <access>read-write</access>
14073              <enumeratedValues>
14074                <enumeratedValue>
14075                  <name>0</name>
14076                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14077                  <value>#0</value>
14078                </enumeratedValue>
14079                <enumeratedValue>
14080                  <name>1</name>
14081                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14082                  <value>#1</value>
14083                </enumeratedValue>
14084              </enumeratedValues>
14085            </field>
14086            <field>
14087              <name>TP0</name>
14088              <description>Trusted Protect</description>
14089              <bitOffset>28</bitOffset>
14090              <bitWidth>1</bitWidth>
14091              <access>read-write</access>
14092              <enumeratedValues>
14093                <enumeratedValue>
14094                  <name>0</name>
14095                  <description>Accesses from an untrusted master are allowed.</description>
14096                  <value>#0</value>
14097                </enumeratedValue>
14098                <enumeratedValue>
14099                  <name>1</name>
14100                  <description>Accesses from an untrusted master are not allowed.</description>
14101                  <value>#1</value>
14102                </enumeratedValue>
14103              </enumeratedValues>
14104            </field>
14105            <field>
14106              <name>WP0</name>
14107              <description>Write Protect</description>
14108              <bitOffset>29</bitOffset>
14109              <bitWidth>1</bitWidth>
14110              <access>read-write</access>
14111              <enumeratedValues>
14112                <enumeratedValue>
14113                  <name>0</name>
14114                  <description>This peripheral allows write accesses.</description>
14115                  <value>#0</value>
14116                </enumeratedValue>
14117                <enumeratedValue>
14118                  <name>1</name>
14119                  <description>This peripheral is write protected.</description>
14120                  <value>#1</value>
14121                </enumeratedValue>
14122              </enumeratedValues>
14123            </field>
14124            <field>
14125              <name>SP0</name>
14126              <description>Supervisor Protect</description>
14127              <bitOffset>30</bitOffset>
14128              <bitWidth>1</bitWidth>
14129              <access>read-write</access>
14130              <enumeratedValues>
14131                <enumeratedValue>
14132                  <name>0</name>
14133                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14134                  <value>#0</value>
14135                </enumeratedValue>
14136                <enumeratedValue>
14137                  <name>1</name>
14138                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14139                  <value>#1</value>
14140                </enumeratedValue>
14141              </enumeratedValues>
14142            </field>
14143          </fields>
14144        </register>
14145        <register>
14146          <name>PACRM</name>
14147          <description>Peripheral Access Control Register</description>
14148          <addressOffset>0x60</addressOffset>
14149          <size>32</size>
14150          <access>read-write</access>
14151          <resetValue>0x44</resetValue>
14152          <resetMask>0xFFFFFFFF</resetMask>
14153          <fields>
14154            <field>
14155              <name>TP7</name>
14156              <description>Trusted Protect</description>
14157              <bitOffset>0</bitOffset>
14158              <bitWidth>1</bitWidth>
14159              <access>read-write</access>
14160              <enumeratedValues>
14161                <enumeratedValue>
14162                  <name>0</name>
14163                  <description>Accesses from an untrusted master are allowed.</description>
14164                  <value>#0</value>
14165                </enumeratedValue>
14166                <enumeratedValue>
14167                  <name>1</name>
14168                  <description>Accesses from an untrusted master are not allowed.</description>
14169                  <value>#1</value>
14170                </enumeratedValue>
14171              </enumeratedValues>
14172            </field>
14173            <field>
14174              <name>WP7</name>
14175              <description>Write Protect</description>
14176              <bitOffset>1</bitOffset>
14177              <bitWidth>1</bitWidth>
14178              <access>read-write</access>
14179              <enumeratedValues>
14180                <enumeratedValue>
14181                  <name>0</name>
14182                  <description>This peripheral allows write accesses.</description>
14183                  <value>#0</value>
14184                </enumeratedValue>
14185                <enumeratedValue>
14186                  <name>1</name>
14187                  <description>This peripheral is write protected.</description>
14188                  <value>#1</value>
14189                </enumeratedValue>
14190              </enumeratedValues>
14191            </field>
14192            <field>
14193              <name>SP7</name>
14194              <description>Supervisor Protect</description>
14195              <bitOffset>2</bitOffset>
14196              <bitWidth>1</bitWidth>
14197              <access>read-write</access>
14198              <enumeratedValues>
14199                <enumeratedValue>
14200                  <name>0</name>
14201                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14202                  <value>#0</value>
14203                </enumeratedValue>
14204                <enumeratedValue>
14205                  <name>1</name>
14206                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14207                  <value>#1</value>
14208                </enumeratedValue>
14209              </enumeratedValues>
14210            </field>
14211            <field>
14212              <name>TP6</name>
14213              <description>Trusted Protect</description>
14214              <bitOffset>4</bitOffset>
14215              <bitWidth>1</bitWidth>
14216              <access>read-write</access>
14217              <enumeratedValues>
14218                <enumeratedValue>
14219                  <name>0</name>
14220                  <description>Accesses from an untrusted master are allowed.</description>
14221                  <value>#0</value>
14222                </enumeratedValue>
14223                <enumeratedValue>
14224                  <name>1</name>
14225                  <description>Accesses from an untrusted master are not allowed.</description>
14226                  <value>#1</value>
14227                </enumeratedValue>
14228              </enumeratedValues>
14229            </field>
14230            <field>
14231              <name>WP6</name>
14232              <description>Write Protect</description>
14233              <bitOffset>5</bitOffset>
14234              <bitWidth>1</bitWidth>
14235              <access>read-write</access>
14236              <enumeratedValues>
14237                <enumeratedValue>
14238                  <name>0</name>
14239                  <description>This peripheral allows write accesses.</description>
14240                  <value>#0</value>
14241                </enumeratedValue>
14242                <enumeratedValue>
14243                  <name>1</name>
14244                  <description>This peripheral is write protected.</description>
14245                  <value>#1</value>
14246                </enumeratedValue>
14247              </enumeratedValues>
14248            </field>
14249            <field>
14250              <name>SP6</name>
14251              <description>Supervisor Protect</description>
14252              <bitOffset>6</bitOffset>
14253              <bitWidth>1</bitWidth>
14254              <access>read-write</access>
14255              <enumeratedValues>
14256                <enumeratedValue>
14257                  <name>0</name>
14258                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14259                  <value>#0</value>
14260                </enumeratedValue>
14261                <enumeratedValue>
14262                  <name>1</name>
14263                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14264                  <value>#1</value>
14265                </enumeratedValue>
14266              </enumeratedValues>
14267            </field>
14268            <field>
14269              <name>TP5</name>
14270              <description>Trusted Protect</description>
14271              <bitOffset>8</bitOffset>
14272              <bitWidth>1</bitWidth>
14273              <access>read-write</access>
14274              <enumeratedValues>
14275                <enumeratedValue>
14276                  <name>0</name>
14277                  <description>Accesses from an untrusted master are allowed.</description>
14278                  <value>#0</value>
14279                </enumeratedValue>
14280                <enumeratedValue>
14281                  <name>1</name>
14282                  <description>Accesses from an untrusted master are not allowed.</description>
14283                  <value>#1</value>
14284                </enumeratedValue>
14285              </enumeratedValues>
14286            </field>
14287            <field>
14288              <name>WP5</name>
14289              <description>Write Protect</description>
14290              <bitOffset>9</bitOffset>
14291              <bitWidth>1</bitWidth>
14292              <access>read-write</access>
14293              <enumeratedValues>
14294                <enumeratedValue>
14295                  <name>0</name>
14296                  <description>This peripheral allows write accesses.</description>
14297                  <value>#0</value>
14298                </enumeratedValue>
14299                <enumeratedValue>
14300                  <name>1</name>
14301                  <description>This peripheral is write protected.</description>
14302                  <value>#1</value>
14303                </enumeratedValue>
14304              </enumeratedValues>
14305            </field>
14306            <field>
14307              <name>SP5</name>
14308              <description>Supervisor Protect</description>
14309              <bitOffset>10</bitOffset>
14310              <bitWidth>1</bitWidth>
14311              <access>read-write</access>
14312              <enumeratedValues>
14313                <enumeratedValue>
14314                  <name>0</name>
14315                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14316                  <value>#0</value>
14317                </enumeratedValue>
14318                <enumeratedValue>
14319                  <name>1</name>
14320                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14321                  <value>#1</value>
14322                </enumeratedValue>
14323              </enumeratedValues>
14324            </field>
14325            <field>
14326              <name>TP4</name>
14327              <description>Trusted Protect</description>
14328              <bitOffset>12</bitOffset>
14329              <bitWidth>1</bitWidth>
14330              <access>read-write</access>
14331              <enumeratedValues>
14332                <enumeratedValue>
14333                  <name>0</name>
14334                  <description>Accesses from an untrusted master are allowed.</description>
14335                  <value>#0</value>
14336                </enumeratedValue>
14337                <enumeratedValue>
14338                  <name>1</name>
14339                  <description>Accesses from an untrusted master are not allowed.</description>
14340                  <value>#1</value>
14341                </enumeratedValue>
14342              </enumeratedValues>
14343            </field>
14344            <field>
14345              <name>WP4</name>
14346              <description>Write Protect</description>
14347              <bitOffset>13</bitOffset>
14348              <bitWidth>1</bitWidth>
14349              <access>read-write</access>
14350              <enumeratedValues>
14351                <enumeratedValue>
14352                  <name>0</name>
14353                  <description>This peripheral allows write accesses.</description>
14354                  <value>#0</value>
14355                </enumeratedValue>
14356                <enumeratedValue>
14357                  <name>1</name>
14358                  <description>This peripheral is write protected.</description>
14359                  <value>#1</value>
14360                </enumeratedValue>
14361              </enumeratedValues>
14362            </field>
14363            <field>
14364              <name>SP4</name>
14365              <description>Supervisor Protect</description>
14366              <bitOffset>14</bitOffset>
14367              <bitWidth>1</bitWidth>
14368              <access>read-write</access>
14369              <enumeratedValues>
14370                <enumeratedValue>
14371                  <name>0</name>
14372                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14373                  <value>#0</value>
14374                </enumeratedValue>
14375                <enumeratedValue>
14376                  <name>1</name>
14377                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14378                  <value>#1</value>
14379                </enumeratedValue>
14380              </enumeratedValues>
14381            </field>
14382            <field>
14383              <name>TP3</name>
14384              <description>Trusted Protect</description>
14385              <bitOffset>16</bitOffset>
14386              <bitWidth>1</bitWidth>
14387              <access>read-write</access>
14388              <enumeratedValues>
14389                <enumeratedValue>
14390                  <name>0</name>
14391                  <description>Accesses from an untrusted master are allowed.</description>
14392                  <value>#0</value>
14393                </enumeratedValue>
14394                <enumeratedValue>
14395                  <name>1</name>
14396                  <description>Accesses from an untrusted master are not allowed.</description>
14397                  <value>#1</value>
14398                </enumeratedValue>
14399              </enumeratedValues>
14400            </field>
14401            <field>
14402              <name>WP3</name>
14403              <description>Write Protect</description>
14404              <bitOffset>17</bitOffset>
14405              <bitWidth>1</bitWidth>
14406              <access>read-write</access>
14407              <enumeratedValues>
14408                <enumeratedValue>
14409                  <name>0</name>
14410                  <description>This peripheral allows write accesses.</description>
14411                  <value>#0</value>
14412                </enumeratedValue>
14413                <enumeratedValue>
14414                  <name>1</name>
14415                  <description>This peripheral is write protected.</description>
14416                  <value>#1</value>
14417                </enumeratedValue>
14418              </enumeratedValues>
14419            </field>
14420            <field>
14421              <name>SP3</name>
14422              <description>Supervisor Protect</description>
14423              <bitOffset>18</bitOffset>
14424              <bitWidth>1</bitWidth>
14425              <access>read-write</access>
14426              <enumeratedValues>
14427                <enumeratedValue>
14428                  <name>0</name>
14429                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14430                  <value>#0</value>
14431                </enumeratedValue>
14432                <enumeratedValue>
14433                  <name>1</name>
14434                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14435                  <value>#1</value>
14436                </enumeratedValue>
14437              </enumeratedValues>
14438            </field>
14439            <field>
14440              <name>TP2</name>
14441              <description>Trusted Protect</description>
14442              <bitOffset>20</bitOffset>
14443              <bitWidth>1</bitWidth>
14444              <access>read-write</access>
14445              <enumeratedValues>
14446                <enumeratedValue>
14447                  <name>0</name>
14448                  <description>Accesses from an untrusted master are allowed.</description>
14449                  <value>#0</value>
14450                </enumeratedValue>
14451                <enumeratedValue>
14452                  <name>1</name>
14453                  <description>Accesses from an untrusted master are not allowed.</description>
14454                  <value>#1</value>
14455                </enumeratedValue>
14456              </enumeratedValues>
14457            </field>
14458            <field>
14459              <name>WP2</name>
14460              <description>Write Protect</description>
14461              <bitOffset>21</bitOffset>
14462              <bitWidth>1</bitWidth>
14463              <access>read-write</access>
14464              <enumeratedValues>
14465                <enumeratedValue>
14466                  <name>0</name>
14467                  <description>This peripheral allows write accesses.</description>
14468                  <value>#0</value>
14469                </enumeratedValue>
14470                <enumeratedValue>
14471                  <name>1</name>
14472                  <description>This peripheral is write protected.</description>
14473                  <value>#1</value>
14474                </enumeratedValue>
14475              </enumeratedValues>
14476            </field>
14477            <field>
14478              <name>SP2</name>
14479              <description>Supervisor Protect</description>
14480              <bitOffset>22</bitOffset>
14481              <bitWidth>1</bitWidth>
14482              <access>read-write</access>
14483              <enumeratedValues>
14484                <enumeratedValue>
14485                  <name>0</name>
14486                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14487                  <value>#0</value>
14488                </enumeratedValue>
14489                <enumeratedValue>
14490                  <name>1</name>
14491                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14492                  <value>#1</value>
14493                </enumeratedValue>
14494              </enumeratedValues>
14495            </field>
14496            <field>
14497              <name>TP1</name>
14498              <description>Trusted Protect</description>
14499              <bitOffset>24</bitOffset>
14500              <bitWidth>1</bitWidth>
14501              <access>read-write</access>
14502              <enumeratedValues>
14503                <enumeratedValue>
14504                  <name>0</name>
14505                  <description>Accesses from an untrusted master are allowed.</description>
14506                  <value>#0</value>
14507                </enumeratedValue>
14508                <enumeratedValue>
14509                  <name>1</name>
14510                  <description>Accesses from an untrusted master are not allowed.</description>
14511                  <value>#1</value>
14512                </enumeratedValue>
14513              </enumeratedValues>
14514            </field>
14515            <field>
14516              <name>WP1</name>
14517              <description>Write Protect</description>
14518              <bitOffset>25</bitOffset>
14519              <bitWidth>1</bitWidth>
14520              <access>read-write</access>
14521              <enumeratedValues>
14522                <enumeratedValue>
14523                  <name>0</name>
14524                  <description>This peripheral allows write accesses.</description>
14525                  <value>#0</value>
14526                </enumeratedValue>
14527                <enumeratedValue>
14528                  <name>1</name>
14529                  <description>This peripheral is write protected.</description>
14530                  <value>#1</value>
14531                </enumeratedValue>
14532              </enumeratedValues>
14533            </field>
14534            <field>
14535              <name>SP1</name>
14536              <description>Supervisor Protect</description>
14537              <bitOffset>26</bitOffset>
14538              <bitWidth>1</bitWidth>
14539              <access>read-write</access>
14540              <enumeratedValues>
14541                <enumeratedValue>
14542                  <name>0</name>
14543                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14544                  <value>#0</value>
14545                </enumeratedValue>
14546                <enumeratedValue>
14547                  <name>1</name>
14548                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14549                  <value>#1</value>
14550                </enumeratedValue>
14551              </enumeratedValues>
14552            </field>
14553            <field>
14554              <name>TP0</name>
14555              <description>Trusted Protect</description>
14556              <bitOffset>28</bitOffset>
14557              <bitWidth>1</bitWidth>
14558              <access>read-write</access>
14559              <enumeratedValues>
14560                <enumeratedValue>
14561                  <name>0</name>
14562                  <description>Accesses from an untrusted master are allowed.</description>
14563                  <value>#0</value>
14564                </enumeratedValue>
14565                <enumeratedValue>
14566                  <name>1</name>
14567                  <description>Accesses from an untrusted master are not allowed.</description>
14568                  <value>#1</value>
14569                </enumeratedValue>
14570              </enumeratedValues>
14571            </field>
14572            <field>
14573              <name>WP0</name>
14574              <description>Write Protect</description>
14575              <bitOffset>29</bitOffset>
14576              <bitWidth>1</bitWidth>
14577              <access>read-write</access>
14578              <enumeratedValues>
14579                <enumeratedValue>
14580                  <name>0</name>
14581                  <description>This peripheral allows write accesses.</description>
14582                  <value>#0</value>
14583                </enumeratedValue>
14584                <enumeratedValue>
14585                  <name>1</name>
14586                  <description>This peripheral is write protected.</description>
14587                  <value>#1</value>
14588                </enumeratedValue>
14589              </enumeratedValues>
14590            </field>
14591            <field>
14592              <name>SP0</name>
14593              <description>Supervisor Protect</description>
14594              <bitOffset>30</bitOffset>
14595              <bitWidth>1</bitWidth>
14596              <access>read-write</access>
14597              <enumeratedValues>
14598                <enumeratedValue>
14599                  <name>0</name>
14600                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14601                  <value>#0</value>
14602                </enumeratedValue>
14603                <enumeratedValue>
14604                  <name>1</name>
14605                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14606                  <value>#1</value>
14607                </enumeratedValue>
14608              </enumeratedValues>
14609            </field>
14610          </fields>
14611        </register>
14612        <register>
14613          <name>PACRN</name>
14614          <description>Peripheral Access Control Register</description>
14615          <addressOffset>0x64</addressOffset>
14616          <size>32</size>
14617          <access>read-write</access>
14618          <resetValue>0</resetValue>
14619          <resetMask>0xFFFFFFFF</resetMask>
14620          <fields>
14621            <field>
14622              <name>TP7</name>
14623              <description>Trusted Protect</description>
14624              <bitOffset>0</bitOffset>
14625              <bitWidth>1</bitWidth>
14626              <access>read-write</access>
14627              <enumeratedValues>
14628                <enumeratedValue>
14629                  <name>0</name>
14630                  <description>Accesses from an untrusted master are allowed.</description>
14631                  <value>#0</value>
14632                </enumeratedValue>
14633                <enumeratedValue>
14634                  <name>1</name>
14635                  <description>Accesses from an untrusted master are not allowed.</description>
14636                  <value>#1</value>
14637                </enumeratedValue>
14638              </enumeratedValues>
14639            </field>
14640            <field>
14641              <name>WP7</name>
14642              <description>Write Protect</description>
14643              <bitOffset>1</bitOffset>
14644              <bitWidth>1</bitWidth>
14645              <access>read-write</access>
14646              <enumeratedValues>
14647                <enumeratedValue>
14648                  <name>0</name>
14649                  <description>This peripheral allows write accesses.</description>
14650                  <value>#0</value>
14651                </enumeratedValue>
14652                <enumeratedValue>
14653                  <name>1</name>
14654                  <description>This peripheral is write protected.</description>
14655                  <value>#1</value>
14656                </enumeratedValue>
14657              </enumeratedValues>
14658            </field>
14659            <field>
14660              <name>SP7</name>
14661              <description>Supervisor Protect</description>
14662              <bitOffset>2</bitOffset>
14663              <bitWidth>1</bitWidth>
14664              <access>read-write</access>
14665              <enumeratedValues>
14666                <enumeratedValue>
14667                  <name>0</name>
14668                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14669                  <value>#0</value>
14670                </enumeratedValue>
14671                <enumeratedValue>
14672                  <name>1</name>
14673                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14674                  <value>#1</value>
14675                </enumeratedValue>
14676              </enumeratedValues>
14677            </field>
14678            <field>
14679              <name>TP6</name>
14680              <description>Trusted Protect</description>
14681              <bitOffset>4</bitOffset>
14682              <bitWidth>1</bitWidth>
14683              <access>read-write</access>
14684              <enumeratedValues>
14685                <enumeratedValue>
14686                  <name>0</name>
14687                  <description>Accesses from an untrusted master are allowed.</description>
14688                  <value>#0</value>
14689                </enumeratedValue>
14690                <enumeratedValue>
14691                  <name>1</name>
14692                  <description>Accesses from an untrusted master are not allowed.</description>
14693                  <value>#1</value>
14694                </enumeratedValue>
14695              </enumeratedValues>
14696            </field>
14697            <field>
14698              <name>WP6</name>
14699              <description>Write Protect</description>
14700              <bitOffset>5</bitOffset>
14701              <bitWidth>1</bitWidth>
14702              <access>read-write</access>
14703              <enumeratedValues>
14704                <enumeratedValue>
14705                  <name>0</name>
14706                  <description>This peripheral allows write accesses.</description>
14707                  <value>#0</value>
14708                </enumeratedValue>
14709                <enumeratedValue>
14710                  <name>1</name>
14711                  <description>This peripheral is write protected.</description>
14712                  <value>#1</value>
14713                </enumeratedValue>
14714              </enumeratedValues>
14715            </field>
14716            <field>
14717              <name>SP6</name>
14718              <description>Supervisor Protect</description>
14719              <bitOffset>6</bitOffset>
14720              <bitWidth>1</bitWidth>
14721              <access>read-write</access>
14722              <enumeratedValues>
14723                <enumeratedValue>
14724                  <name>0</name>
14725                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14726                  <value>#0</value>
14727                </enumeratedValue>
14728                <enumeratedValue>
14729                  <name>1</name>
14730                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14731                  <value>#1</value>
14732                </enumeratedValue>
14733              </enumeratedValues>
14734            </field>
14735            <field>
14736              <name>TP5</name>
14737              <description>Trusted Protect</description>
14738              <bitOffset>8</bitOffset>
14739              <bitWidth>1</bitWidth>
14740              <access>read-write</access>
14741              <enumeratedValues>
14742                <enumeratedValue>
14743                  <name>0</name>
14744                  <description>Accesses from an untrusted master are allowed.</description>
14745                  <value>#0</value>
14746                </enumeratedValue>
14747                <enumeratedValue>
14748                  <name>1</name>
14749                  <description>Accesses from an untrusted master are not allowed.</description>
14750                  <value>#1</value>
14751                </enumeratedValue>
14752              </enumeratedValues>
14753            </field>
14754            <field>
14755              <name>WP5</name>
14756              <description>Write Protect</description>
14757              <bitOffset>9</bitOffset>
14758              <bitWidth>1</bitWidth>
14759              <access>read-write</access>
14760              <enumeratedValues>
14761                <enumeratedValue>
14762                  <name>0</name>
14763                  <description>This peripheral allows write accesses.</description>
14764                  <value>#0</value>
14765                </enumeratedValue>
14766                <enumeratedValue>
14767                  <name>1</name>
14768                  <description>This peripheral is write protected.</description>
14769                  <value>#1</value>
14770                </enumeratedValue>
14771              </enumeratedValues>
14772            </field>
14773            <field>
14774              <name>SP5</name>
14775              <description>Supervisor Protect</description>
14776              <bitOffset>10</bitOffset>
14777              <bitWidth>1</bitWidth>
14778              <access>read-write</access>
14779              <enumeratedValues>
14780                <enumeratedValue>
14781                  <name>0</name>
14782                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14783                  <value>#0</value>
14784                </enumeratedValue>
14785                <enumeratedValue>
14786                  <name>1</name>
14787                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14788                  <value>#1</value>
14789                </enumeratedValue>
14790              </enumeratedValues>
14791            </field>
14792            <field>
14793              <name>TP4</name>
14794              <description>Trusted Protect</description>
14795              <bitOffset>12</bitOffset>
14796              <bitWidth>1</bitWidth>
14797              <access>read-write</access>
14798              <enumeratedValues>
14799                <enumeratedValue>
14800                  <name>0</name>
14801                  <description>Accesses from an untrusted master are allowed.</description>
14802                  <value>#0</value>
14803                </enumeratedValue>
14804                <enumeratedValue>
14805                  <name>1</name>
14806                  <description>Accesses from an untrusted master are not allowed.</description>
14807                  <value>#1</value>
14808                </enumeratedValue>
14809              </enumeratedValues>
14810            </field>
14811            <field>
14812              <name>WP4</name>
14813              <description>Write Protect</description>
14814              <bitOffset>13</bitOffset>
14815              <bitWidth>1</bitWidth>
14816              <access>read-write</access>
14817              <enumeratedValues>
14818                <enumeratedValue>
14819                  <name>0</name>
14820                  <description>This peripheral allows write accesses.</description>
14821                  <value>#0</value>
14822                </enumeratedValue>
14823                <enumeratedValue>
14824                  <name>1</name>
14825                  <description>This peripheral is write protected.</description>
14826                  <value>#1</value>
14827                </enumeratedValue>
14828              </enumeratedValues>
14829            </field>
14830            <field>
14831              <name>SP4</name>
14832              <description>Supervisor Protect</description>
14833              <bitOffset>14</bitOffset>
14834              <bitWidth>1</bitWidth>
14835              <access>read-write</access>
14836              <enumeratedValues>
14837                <enumeratedValue>
14838                  <name>0</name>
14839                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14840                  <value>#0</value>
14841                </enumeratedValue>
14842                <enumeratedValue>
14843                  <name>1</name>
14844                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14845                  <value>#1</value>
14846                </enumeratedValue>
14847              </enumeratedValues>
14848            </field>
14849            <field>
14850              <name>TP3</name>
14851              <description>Trusted Protect</description>
14852              <bitOffset>16</bitOffset>
14853              <bitWidth>1</bitWidth>
14854              <access>read-write</access>
14855              <enumeratedValues>
14856                <enumeratedValue>
14857                  <name>0</name>
14858                  <description>Accesses from an untrusted master are allowed.</description>
14859                  <value>#0</value>
14860                </enumeratedValue>
14861                <enumeratedValue>
14862                  <name>1</name>
14863                  <description>Accesses from an untrusted master are not allowed.</description>
14864                  <value>#1</value>
14865                </enumeratedValue>
14866              </enumeratedValues>
14867            </field>
14868            <field>
14869              <name>WP3</name>
14870              <description>Write Protect</description>
14871              <bitOffset>17</bitOffset>
14872              <bitWidth>1</bitWidth>
14873              <access>read-write</access>
14874              <enumeratedValues>
14875                <enumeratedValue>
14876                  <name>0</name>
14877                  <description>This peripheral allows write accesses.</description>
14878                  <value>#0</value>
14879                </enumeratedValue>
14880                <enumeratedValue>
14881                  <name>1</name>
14882                  <description>This peripheral is write protected.</description>
14883                  <value>#1</value>
14884                </enumeratedValue>
14885              </enumeratedValues>
14886            </field>
14887            <field>
14888              <name>SP3</name>
14889              <description>Supervisor Protect</description>
14890              <bitOffset>18</bitOffset>
14891              <bitWidth>1</bitWidth>
14892              <access>read-write</access>
14893              <enumeratedValues>
14894                <enumeratedValue>
14895                  <name>0</name>
14896                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14897                  <value>#0</value>
14898                </enumeratedValue>
14899                <enumeratedValue>
14900                  <name>1</name>
14901                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14902                  <value>#1</value>
14903                </enumeratedValue>
14904              </enumeratedValues>
14905            </field>
14906            <field>
14907              <name>TP2</name>
14908              <description>Trusted Protect</description>
14909              <bitOffset>20</bitOffset>
14910              <bitWidth>1</bitWidth>
14911              <access>read-write</access>
14912              <enumeratedValues>
14913                <enumeratedValue>
14914                  <name>0</name>
14915                  <description>Accesses from an untrusted master are allowed.</description>
14916                  <value>#0</value>
14917                </enumeratedValue>
14918                <enumeratedValue>
14919                  <name>1</name>
14920                  <description>Accesses from an untrusted master are not allowed.</description>
14921                  <value>#1</value>
14922                </enumeratedValue>
14923              </enumeratedValues>
14924            </field>
14925            <field>
14926              <name>WP2</name>
14927              <description>Write Protect</description>
14928              <bitOffset>21</bitOffset>
14929              <bitWidth>1</bitWidth>
14930              <access>read-write</access>
14931              <enumeratedValues>
14932                <enumeratedValue>
14933                  <name>0</name>
14934                  <description>This peripheral allows write accesses.</description>
14935                  <value>#0</value>
14936                </enumeratedValue>
14937                <enumeratedValue>
14938                  <name>1</name>
14939                  <description>This peripheral is write protected.</description>
14940                  <value>#1</value>
14941                </enumeratedValue>
14942              </enumeratedValues>
14943            </field>
14944            <field>
14945              <name>SP2</name>
14946              <description>Supervisor Protect</description>
14947              <bitOffset>22</bitOffset>
14948              <bitWidth>1</bitWidth>
14949              <access>read-write</access>
14950              <enumeratedValues>
14951                <enumeratedValue>
14952                  <name>0</name>
14953                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
14954                  <value>#0</value>
14955                </enumeratedValue>
14956                <enumeratedValue>
14957                  <name>1</name>
14958                  <description>This peripheral requires supervisor privilege level for accesses.</description>
14959                  <value>#1</value>
14960                </enumeratedValue>
14961              </enumeratedValues>
14962            </field>
14963            <field>
14964              <name>TP1</name>
14965              <description>Trusted Protect</description>
14966              <bitOffset>24</bitOffset>
14967              <bitWidth>1</bitWidth>
14968              <access>read-write</access>
14969              <enumeratedValues>
14970                <enumeratedValue>
14971                  <name>0</name>
14972                  <description>Accesses from an untrusted master are allowed.</description>
14973                  <value>#0</value>
14974                </enumeratedValue>
14975                <enumeratedValue>
14976                  <name>1</name>
14977                  <description>Accesses from an untrusted master are not allowed.</description>
14978                  <value>#1</value>
14979                </enumeratedValue>
14980              </enumeratedValues>
14981            </field>
14982            <field>
14983              <name>WP1</name>
14984              <description>Write Protect</description>
14985              <bitOffset>25</bitOffset>
14986              <bitWidth>1</bitWidth>
14987              <access>read-write</access>
14988              <enumeratedValues>
14989                <enumeratedValue>
14990                  <name>0</name>
14991                  <description>This peripheral allows write accesses.</description>
14992                  <value>#0</value>
14993                </enumeratedValue>
14994                <enumeratedValue>
14995                  <name>1</name>
14996                  <description>This peripheral is write protected.</description>
14997                  <value>#1</value>
14998                </enumeratedValue>
14999              </enumeratedValues>
15000            </field>
15001            <field>
15002              <name>SP1</name>
15003              <description>Supervisor Protect</description>
15004              <bitOffset>26</bitOffset>
15005              <bitWidth>1</bitWidth>
15006              <access>read-write</access>
15007              <enumeratedValues>
15008                <enumeratedValue>
15009                  <name>0</name>
15010                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15011                  <value>#0</value>
15012                </enumeratedValue>
15013                <enumeratedValue>
15014                  <name>1</name>
15015                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15016                  <value>#1</value>
15017                </enumeratedValue>
15018              </enumeratedValues>
15019            </field>
15020            <field>
15021              <name>TP0</name>
15022              <description>Trusted Protect</description>
15023              <bitOffset>28</bitOffset>
15024              <bitWidth>1</bitWidth>
15025              <access>read-write</access>
15026              <enumeratedValues>
15027                <enumeratedValue>
15028                  <name>0</name>
15029                  <description>Accesses from an untrusted master are allowed.</description>
15030                  <value>#0</value>
15031                </enumeratedValue>
15032                <enumeratedValue>
15033                  <name>1</name>
15034                  <description>Accesses from an untrusted master are not allowed.</description>
15035                  <value>#1</value>
15036                </enumeratedValue>
15037              </enumeratedValues>
15038            </field>
15039            <field>
15040              <name>WP0</name>
15041              <description>Write Protect</description>
15042              <bitOffset>29</bitOffset>
15043              <bitWidth>1</bitWidth>
15044              <access>read-write</access>
15045              <enumeratedValues>
15046                <enumeratedValue>
15047                  <name>0</name>
15048                  <description>This peripheral allows write accesses.</description>
15049                  <value>#0</value>
15050                </enumeratedValue>
15051                <enumeratedValue>
15052                  <name>1</name>
15053                  <description>This peripheral is write protected.</description>
15054                  <value>#1</value>
15055                </enumeratedValue>
15056              </enumeratedValues>
15057            </field>
15058            <field>
15059              <name>SP0</name>
15060              <description>Supervisor Protect</description>
15061              <bitOffset>30</bitOffset>
15062              <bitWidth>1</bitWidth>
15063              <access>read-write</access>
15064              <enumeratedValues>
15065                <enumeratedValue>
15066                  <name>0</name>
15067                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15068                  <value>#0</value>
15069                </enumeratedValue>
15070                <enumeratedValue>
15071                  <name>1</name>
15072                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15073                  <value>#1</value>
15074                </enumeratedValue>
15075              </enumeratedValues>
15076            </field>
15077          </fields>
15078        </register>
15079        <register>
15080          <name>PACRO</name>
15081          <description>Peripheral Access Control Register</description>
15082          <addressOffset>0x68</addressOffset>
15083          <size>32</size>
15084          <access>read-write</access>
15085          <resetValue>0</resetValue>
15086          <resetMask>0xFFFFFFFF</resetMask>
15087          <fields>
15088            <field>
15089              <name>TP7</name>
15090              <description>Trusted Protect</description>
15091              <bitOffset>0</bitOffset>
15092              <bitWidth>1</bitWidth>
15093              <access>read-write</access>
15094              <enumeratedValues>
15095                <enumeratedValue>
15096                  <name>0</name>
15097                  <description>Accesses from an untrusted master are allowed.</description>
15098                  <value>#0</value>
15099                </enumeratedValue>
15100                <enumeratedValue>
15101                  <name>1</name>
15102                  <description>Accesses from an untrusted master are not allowed.</description>
15103                  <value>#1</value>
15104                </enumeratedValue>
15105              </enumeratedValues>
15106            </field>
15107            <field>
15108              <name>WP7</name>
15109              <description>Write Protect</description>
15110              <bitOffset>1</bitOffset>
15111              <bitWidth>1</bitWidth>
15112              <access>read-write</access>
15113              <enumeratedValues>
15114                <enumeratedValue>
15115                  <name>0</name>
15116                  <description>This peripheral allows write accesses.</description>
15117                  <value>#0</value>
15118                </enumeratedValue>
15119                <enumeratedValue>
15120                  <name>1</name>
15121                  <description>This peripheral is write protected.</description>
15122                  <value>#1</value>
15123                </enumeratedValue>
15124              </enumeratedValues>
15125            </field>
15126            <field>
15127              <name>SP7</name>
15128              <description>Supervisor Protect</description>
15129              <bitOffset>2</bitOffset>
15130              <bitWidth>1</bitWidth>
15131              <access>read-write</access>
15132              <enumeratedValues>
15133                <enumeratedValue>
15134                  <name>0</name>
15135                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15136                  <value>#0</value>
15137                </enumeratedValue>
15138                <enumeratedValue>
15139                  <name>1</name>
15140                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15141                  <value>#1</value>
15142                </enumeratedValue>
15143              </enumeratedValues>
15144            </field>
15145            <field>
15146              <name>TP6</name>
15147              <description>Trusted Protect</description>
15148              <bitOffset>4</bitOffset>
15149              <bitWidth>1</bitWidth>
15150              <access>read-write</access>
15151              <enumeratedValues>
15152                <enumeratedValue>
15153                  <name>0</name>
15154                  <description>Accesses from an untrusted master are allowed.</description>
15155                  <value>#0</value>
15156                </enumeratedValue>
15157                <enumeratedValue>
15158                  <name>1</name>
15159                  <description>Accesses from an untrusted master are not allowed.</description>
15160                  <value>#1</value>
15161                </enumeratedValue>
15162              </enumeratedValues>
15163            </field>
15164            <field>
15165              <name>WP6</name>
15166              <description>Write Protect</description>
15167              <bitOffset>5</bitOffset>
15168              <bitWidth>1</bitWidth>
15169              <access>read-write</access>
15170              <enumeratedValues>
15171                <enumeratedValue>
15172                  <name>0</name>
15173                  <description>This peripheral allows write accesses.</description>
15174                  <value>#0</value>
15175                </enumeratedValue>
15176                <enumeratedValue>
15177                  <name>1</name>
15178                  <description>This peripheral is write protected.</description>
15179                  <value>#1</value>
15180                </enumeratedValue>
15181              </enumeratedValues>
15182            </field>
15183            <field>
15184              <name>SP6</name>
15185              <description>Supervisor Protect</description>
15186              <bitOffset>6</bitOffset>
15187              <bitWidth>1</bitWidth>
15188              <access>read-write</access>
15189              <enumeratedValues>
15190                <enumeratedValue>
15191                  <name>0</name>
15192                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15193                  <value>#0</value>
15194                </enumeratedValue>
15195                <enumeratedValue>
15196                  <name>1</name>
15197                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15198                  <value>#1</value>
15199                </enumeratedValue>
15200              </enumeratedValues>
15201            </field>
15202            <field>
15203              <name>TP5</name>
15204              <description>Trusted Protect</description>
15205              <bitOffset>8</bitOffset>
15206              <bitWidth>1</bitWidth>
15207              <access>read-write</access>
15208              <enumeratedValues>
15209                <enumeratedValue>
15210                  <name>0</name>
15211                  <description>Accesses from an untrusted master are allowed.</description>
15212                  <value>#0</value>
15213                </enumeratedValue>
15214                <enumeratedValue>
15215                  <name>1</name>
15216                  <description>Accesses from an untrusted master are not allowed.</description>
15217                  <value>#1</value>
15218                </enumeratedValue>
15219              </enumeratedValues>
15220            </field>
15221            <field>
15222              <name>WP5</name>
15223              <description>Write Protect</description>
15224              <bitOffset>9</bitOffset>
15225              <bitWidth>1</bitWidth>
15226              <access>read-write</access>
15227              <enumeratedValues>
15228                <enumeratedValue>
15229                  <name>0</name>
15230                  <description>This peripheral allows write accesses.</description>
15231                  <value>#0</value>
15232                </enumeratedValue>
15233                <enumeratedValue>
15234                  <name>1</name>
15235                  <description>This peripheral is write protected.</description>
15236                  <value>#1</value>
15237                </enumeratedValue>
15238              </enumeratedValues>
15239            </field>
15240            <field>
15241              <name>SP5</name>
15242              <description>Supervisor Protect</description>
15243              <bitOffset>10</bitOffset>
15244              <bitWidth>1</bitWidth>
15245              <access>read-write</access>
15246              <enumeratedValues>
15247                <enumeratedValue>
15248                  <name>0</name>
15249                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15250                  <value>#0</value>
15251                </enumeratedValue>
15252                <enumeratedValue>
15253                  <name>1</name>
15254                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15255                  <value>#1</value>
15256                </enumeratedValue>
15257              </enumeratedValues>
15258            </field>
15259            <field>
15260              <name>TP4</name>
15261              <description>Trusted Protect</description>
15262              <bitOffset>12</bitOffset>
15263              <bitWidth>1</bitWidth>
15264              <access>read-write</access>
15265              <enumeratedValues>
15266                <enumeratedValue>
15267                  <name>0</name>
15268                  <description>Accesses from an untrusted master are allowed.</description>
15269                  <value>#0</value>
15270                </enumeratedValue>
15271                <enumeratedValue>
15272                  <name>1</name>
15273                  <description>Accesses from an untrusted master are not allowed.</description>
15274                  <value>#1</value>
15275                </enumeratedValue>
15276              </enumeratedValues>
15277            </field>
15278            <field>
15279              <name>WP4</name>
15280              <description>Write Protect</description>
15281              <bitOffset>13</bitOffset>
15282              <bitWidth>1</bitWidth>
15283              <access>read-write</access>
15284              <enumeratedValues>
15285                <enumeratedValue>
15286                  <name>0</name>
15287                  <description>This peripheral allows write accesses.</description>
15288                  <value>#0</value>
15289                </enumeratedValue>
15290                <enumeratedValue>
15291                  <name>1</name>
15292                  <description>This peripheral is write protected.</description>
15293                  <value>#1</value>
15294                </enumeratedValue>
15295              </enumeratedValues>
15296            </field>
15297            <field>
15298              <name>SP4</name>
15299              <description>Supervisor Protect</description>
15300              <bitOffset>14</bitOffset>
15301              <bitWidth>1</bitWidth>
15302              <access>read-write</access>
15303              <enumeratedValues>
15304                <enumeratedValue>
15305                  <name>0</name>
15306                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15307                  <value>#0</value>
15308                </enumeratedValue>
15309                <enumeratedValue>
15310                  <name>1</name>
15311                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15312                  <value>#1</value>
15313                </enumeratedValue>
15314              </enumeratedValues>
15315            </field>
15316            <field>
15317              <name>TP3</name>
15318              <description>Trusted Protect</description>
15319              <bitOffset>16</bitOffset>
15320              <bitWidth>1</bitWidth>
15321              <access>read-write</access>
15322              <enumeratedValues>
15323                <enumeratedValue>
15324                  <name>0</name>
15325                  <description>Accesses from an untrusted master are allowed.</description>
15326                  <value>#0</value>
15327                </enumeratedValue>
15328                <enumeratedValue>
15329                  <name>1</name>
15330                  <description>Accesses from an untrusted master are not allowed.</description>
15331                  <value>#1</value>
15332                </enumeratedValue>
15333              </enumeratedValues>
15334            </field>
15335            <field>
15336              <name>WP3</name>
15337              <description>Write Protect</description>
15338              <bitOffset>17</bitOffset>
15339              <bitWidth>1</bitWidth>
15340              <access>read-write</access>
15341              <enumeratedValues>
15342                <enumeratedValue>
15343                  <name>0</name>
15344                  <description>This peripheral allows write accesses.</description>
15345                  <value>#0</value>
15346                </enumeratedValue>
15347                <enumeratedValue>
15348                  <name>1</name>
15349                  <description>This peripheral is write protected.</description>
15350                  <value>#1</value>
15351                </enumeratedValue>
15352              </enumeratedValues>
15353            </field>
15354            <field>
15355              <name>SP3</name>
15356              <description>Supervisor Protect</description>
15357              <bitOffset>18</bitOffset>
15358              <bitWidth>1</bitWidth>
15359              <access>read-write</access>
15360              <enumeratedValues>
15361                <enumeratedValue>
15362                  <name>0</name>
15363                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15364                  <value>#0</value>
15365                </enumeratedValue>
15366                <enumeratedValue>
15367                  <name>1</name>
15368                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15369                  <value>#1</value>
15370                </enumeratedValue>
15371              </enumeratedValues>
15372            </field>
15373            <field>
15374              <name>TP2</name>
15375              <description>Trusted Protect</description>
15376              <bitOffset>20</bitOffset>
15377              <bitWidth>1</bitWidth>
15378              <access>read-write</access>
15379              <enumeratedValues>
15380                <enumeratedValue>
15381                  <name>0</name>
15382                  <description>Accesses from an untrusted master are allowed.</description>
15383                  <value>#0</value>
15384                </enumeratedValue>
15385                <enumeratedValue>
15386                  <name>1</name>
15387                  <description>Accesses from an untrusted master are not allowed.</description>
15388                  <value>#1</value>
15389                </enumeratedValue>
15390              </enumeratedValues>
15391            </field>
15392            <field>
15393              <name>WP2</name>
15394              <description>Write Protect</description>
15395              <bitOffset>21</bitOffset>
15396              <bitWidth>1</bitWidth>
15397              <access>read-write</access>
15398              <enumeratedValues>
15399                <enumeratedValue>
15400                  <name>0</name>
15401                  <description>This peripheral allows write accesses.</description>
15402                  <value>#0</value>
15403                </enumeratedValue>
15404                <enumeratedValue>
15405                  <name>1</name>
15406                  <description>This peripheral is write protected.</description>
15407                  <value>#1</value>
15408                </enumeratedValue>
15409              </enumeratedValues>
15410            </field>
15411            <field>
15412              <name>SP2</name>
15413              <description>Supervisor Protect</description>
15414              <bitOffset>22</bitOffset>
15415              <bitWidth>1</bitWidth>
15416              <access>read-write</access>
15417              <enumeratedValues>
15418                <enumeratedValue>
15419                  <name>0</name>
15420                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15421                  <value>#0</value>
15422                </enumeratedValue>
15423                <enumeratedValue>
15424                  <name>1</name>
15425                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15426                  <value>#1</value>
15427                </enumeratedValue>
15428              </enumeratedValues>
15429            </field>
15430            <field>
15431              <name>TP1</name>
15432              <description>Trusted Protect</description>
15433              <bitOffset>24</bitOffset>
15434              <bitWidth>1</bitWidth>
15435              <access>read-write</access>
15436              <enumeratedValues>
15437                <enumeratedValue>
15438                  <name>0</name>
15439                  <description>Accesses from an untrusted master are allowed.</description>
15440                  <value>#0</value>
15441                </enumeratedValue>
15442                <enumeratedValue>
15443                  <name>1</name>
15444                  <description>Accesses from an untrusted master are not allowed.</description>
15445                  <value>#1</value>
15446                </enumeratedValue>
15447              </enumeratedValues>
15448            </field>
15449            <field>
15450              <name>WP1</name>
15451              <description>Write Protect</description>
15452              <bitOffset>25</bitOffset>
15453              <bitWidth>1</bitWidth>
15454              <access>read-write</access>
15455              <enumeratedValues>
15456                <enumeratedValue>
15457                  <name>0</name>
15458                  <description>This peripheral allows write accesses.</description>
15459                  <value>#0</value>
15460                </enumeratedValue>
15461                <enumeratedValue>
15462                  <name>1</name>
15463                  <description>This peripheral is write protected.</description>
15464                  <value>#1</value>
15465                </enumeratedValue>
15466              </enumeratedValues>
15467            </field>
15468            <field>
15469              <name>SP1</name>
15470              <description>Supervisor Protect</description>
15471              <bitOffset>26</bitOffset>
15472              <bitWidth>1</bitWidth>
15473              <access>read-write</access>
15474              <enumeratedValues>
15475                <enumeratedValue>
15476                  <name>0</name>
15477                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15478                  <value>#0</value>
15479                </enumeratedValue>
15480                <enumeratedValue>
15481                  <name>1</name>
15482                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15483                  <value>#1</value>
15484                </enumeratedValue>
15485              </enumeratedValues>
15486            </field>
15487            <field>
15488              <name>TP0</name>
15489              <description>Trusted Protect</description>
15490              <bitOffset>28</bitOffset>
15491              <bitWidth>1</bitWidth>
15492              <access>read-write</access>
15493              <enumeratedValues>
15494                <enumeratedValue>
15495                  <name>0</name>
15496                  <description>Accesses from an untrusted master are allowed.</description>
15497                  <value>#0</value>
15498                </enumeratedValue>
15499                <enumeratedValue>
15500                  <name>1</name>
15501                  <description>Accesses from an untrusted master are not allowed.</description>
15502                  <value>#1</value>
15503                </enumeratedValue>
15504              </enumeratedValues>
15505            </field>
15506            <field>
15507              <name>WP0</name>
15508              <description>Write Protect</description>
15509              <bitOffset>29</bitOffset>
15510              <bitWidth>1</bitWidth>
15511              <access>read-write</access>
15512              <enumeratedValues>
15513                <enumeratedValue>
15514                  <name>0</name>
15515                  <description>This peripheral allows write accesses.</description>
15516                  <value>#0</value>
15517                </enumeratedValue>
15518                <enumeratedValue>
15519                  <name>1</name>
15520                  <description>This peripheral is write protected.</description>
15521                  <value>#1</value>
15522                </enumeratedValue>
15523              </enumeratedValues>
15524            </field>
15525            <field>
15526              <name>SP0</name>
15527              <description>Supervisor Protect</description>
15528              <bitOffset>30</bitOffset>
15529              <bitWidth>1</bitWidth>
15530              <access>read-write</access>
15531              <enumeratedValues>
15532                <enumeratedValue>
15533                  <name>0</name>
15534                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15535                  <value>#0</value>
15536                </enumeratedValue>
15537                <enumeratedValue>
15538                  <name>1</name>
15539                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15540                  <value>#1</value>
15541                </enumeratedValue>
15542              </enumeratedValues>
15543            </field>
15544          </fields>
15545        </register>
15546        <register>
15547          <name>PACRP</name>
15548          <description>Peripheral Access Control Register</description>
15549          <addressOffset>0x6C</addressOffset>
15550          <size>32</size>
15551          <access>read-write</access>
15552          <resetValue>0</resetValue>
15553          <resetMask>0xFFFFFFFF</resetMask>
15554          <fields>
15555            <field>
15556              <name>TP7</name>
15557              <description>Trusted Protect</description>
15558              <bitOffset>0</bitOffset>
15559              <bitWidth>1</bitWidth>
15560              <access>read-write</access>
15561              <enumeratedValues>
15562                <enumeratedValue>
15563                  <name>0</name>
15564                  <description>Accesses from an untrusted master are allowed.</description>
15565                  <value>#0</value>
15566                </enumeratedValue>
15567                <enumeratedValue>
15568                  <name>1</name>
15569                  <description>Accesses from an untrusted master are not allowed.</description>
15570                  <value>#1</value>
15571                </enumeratedValue>
15572              </enumeratedValues>
15573            </field>
15574            <field>
15575              <name>WP7</name>
15576              <description>Write Protect</description>
15577              <bitOffset>1</bitOffset>
15578              <bitWidth>1</bitWidth>
15579              <access>read-write</access>
15580              <enumeratedValues>
15581                <enumeratedValue>
15582                  <name>0</name>
15583                  <description>This peripheral allows write accesses.</description>
15584                  <value>#0</value>
15585                </enumeratedValue>
15586                <enumeratedValue>
15587                  <name>1</name>
15588                  <description>This peripheral is write protected.</description>
15589                  <value>#1</value>
15590                </enumeratedValue>
15591              </enumeratedValues>
15592            </field>
15593            <field>
15594              <name>SP7</name>
15595              <description>Supervisor Protect</description>
15596              <bitOffset>2</bitOffset>
15597              <bitWidth>1</bitWidth>
15598              <access>read-write</access>
15599              <enumeratedValues>
15600                <enumeratedValue>
15601                  <name>0</name>
15602                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15603                  <value>#0</value>
15604                </enumeratedValue>
15605                <enumeratedValue>
15606                  <name>1</name>
15607                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15608                  <value>#1</value>
15609                </enumeratedValue>
15610              </enumeratedValues>
15611            </field>
15612            <field>
15613              <name>TP6</name>
15614              <description>Trusted Protect</description>
15615              <bitOffset>4</bitOffset>
15616              <bitWidth>1</bitWidth>
15617              <access>read-write</access>
15618              <enumeratedValues>
15619                <enumeratedValue>
15620                  <name>0</name>
15621                  <description>Accesses from an untrusted master are allowed.</description>
15622                  <value>#0</value>
15623                </enumeratedValue>
15624                <enumeratedValue>
15625                  <name>1</name>
15626                  <description>Accesses from an untrusted master are not allowed.</description>
15627                  <value>#1</value>
15628                </enumeratedValue>
15629              </enumeratedValues>
15630            </field>
15631            <field>
15632              <name>WP6</name>
15633              <description>Write Protect</description>
15634              <bitOffset>5</bitOffset>
15635              <bitWidth>1</bitWidth>
15636              <access>read-write</access>
15637              <enumeratedValues>
15638                <enumeratedValue>
15639                  <name>0</name>
15640                  <description>This peripheral allows write accesses.</description>
15641                  <value>#0</value>
15642                </enumeratedValue>
15643                <enumeratedValue>
15644                  <name>1</name>
15645                  <description>This peripheral is write protected.</description>
15646                  <value>#1</value>
15647                </enumeratedValue>
15648              </enumeratedValues>
15649            </field>
15650            <field>
15651              <name>SP6</name>
15652              <description>Supervisor Protect</description>
15653              <bitOffset>6</bitOffset>
15654              <bitWidth>1</bitWidth>
15655              <access>read-write</access>
15656              <enumeratedValues>
15657                <enumeratedValue>
15658                  <name>0</name>
15659                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15660                  <value>#0</value>
15661                </enumeratedValue>
15662                <enumeratedValue>
15663                  <name>1</name>
15664                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15665                  <value>#1</value>
15666                </enumeratedValue>
15667              </enumeratedValues>
15668            </field>
15669            <field>
15670              <name>TP5</name>
15671              <description>Trusted Protect</description>
15672              <bitOffset>8</bitOffset>
15673              <bitWidth>1</bitWidth>
15674              <access>read-write</access>
15675              <enumeratedValues>
15676                <enumeratedValue>
15677                  <name>0</name>
15678                  <description>Accesses from an untrusted master are allowed.</description>
15679                  <value>#0</value>
15680                </enumeratedValue>
15681                <enumeratedValue>
15682                  <name>1</name>
15683                  <description>Accesses from an untrusted master are not allowed.</description>
15684                  <value>#1</value>
15685                </enumeratedValue>
15686              </enumeratedValues>
15687            </field>
15688            <field>
15689              <name>WP5</name>
15690              <description>Write Protect</description>
15691              <bitOffset>9</bitOffset>
15692              <bitWidth>1</bitWidth>
15693              <access>read-write</access>
15694              <enumeratedValues>
15695                <enumeratedValue>
15696                  <name>0</name>
15697                  <description>This peripheral allows write accesses.</description>
15698                  <value>#0</value>
15699                </enumeratedValue>
15700                <enumeratedValue>
15701                  <name>1</name>
15702                  <description>This peripheral is write protected.</description>
15703                  <value>#1</value>
15704                </enumeratedValue>
15705              </enumeratedValues>
15706            </field>
15707            <field>
15708              <name>SP5</name>
15709              <description>Supervisor Protect</description>
15710              <bitOffset>10</bitOffset>
15711              <bitWidth>1</bitWidth>
15712              <access>read-write</access>
15713              <enumeratedValues>
15714                <enumeratedValue>
15715                  <name>0</name>
15716                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15717                  <value>#0</value>
15718                </enumeratedValue>
15719                <enumeratedValue>
15720                  <name>1</name>
15721                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15722                  <value>#1</value>
15723                </enumeratedValue>
15724              </enumeratedValues>
15725            </field>
15726            <field>
15727              <name>TP4</name>
15728              <description>Trusted Protect</description>
15729              <bitOffset>12</bitOffset>
15730              <bitWidth>1</bitWidth>
15731              <access>read-write</access>
15732              <enumeratedValues>
15733                <enumeratedValue>
15734                  <name>0</name>
15735                  <description>Accesses from an untrusted master are allowed.</description>
15736                  <value>#0</value>
15737                </enumeratedValue>
15738                <enumeratedValue>
15739                  <name>1</name>
15740                  <description>Accesses from an untrusted master are not allowed.</description>
15741                  <value>#1</value>
15742                </enumeratedValue>
15743              </enumeratedValues>
15744            </field>
15745            <field>
15746              <name>WP4</name>
15747              <description>Write Protect</description>
15748              <bitOffset>13</bitOffset>
15749              <bitWidth>1</bitWidth>
15750              <access>read-write</access>
15751              <enumeratedValues>
15752                <enumeratedValue>
15753                  <name>0</name>
15754                  <description>This peripheral allows write accesses.</description>
15755                  <value>#0</value>
15756                </enumeratedValue>
15757                <enumeratedValue>
15758                  <name>1</name>
15759                  <description>This peripheral is write protected.</description>
15760                  <value>#1</value>
15761                </enumeratedValue>
15762              </enumeratedValues>
15763            </field>
15764            <field>
15765              <name>SP4</name>
15766              <description>Supervisor Protect</description>
15767              <bitOffset>14</bitOffset>
15768              <bitWidth>1</bitWidth>
15769              <access>read-write</access>
15770              <enumeratedValues>
15771                <enumeratedValue>
15772                  <name>0</name>
15773                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15774                  <value>#0</value>
15775                </enumeratedValue>
15776                <enumeratedValue>
15777                  <name>1</name>
15778                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15779                  <value>#1</value>
15780                </enumeratedValue>
15781              </enumeratedValues>
15782            </field>
15783            <field>
15784              <name>TP3</name>
15785              <description>Trusted Protect</description>
15786              <bitOffset>16</bitOffset>
15787              <bitWidth>1</bitWidth>
15788              <access>read-write</access>
15789              <enumeratedValues>
15790                <enumeratedValue>
15791                  <name>0</name>
15792                  <description>Accesses from an untrusted master are allowed.</description>
15793                  <value>#0</value>
15794                </enumeratedValue>
15795                <enumeratedValue>
15796                  <name>1</name>
15797                  <description>Accesses from an untrusted master are not allowed.</description>
15798                  <value>#1</value>
15799                </enumeratedValue>
15800              </enumeratedValues>
15801            </field>
15802            <field>
15803              <name>WP3</name>
15804              <description>Write Protect</description>
15805              <bitOffset>17</bitOffset>
15806              <bitWidth>1</bitWidth>
15807              <access>read-write</access>
15808              <enumeratedValues>
15809                <enumeratedValue>
15810                  <name>0</name>
15811                  <description>This peripheral allows write accesses.</description>
15812                  <value>#0</value>
15813                </enumeratedValue>
15814                <enumeratedValue>
15815                  <name>1</name>
15816                  <description>This peripheral is write protected.</description>
15817                  <value>#1</value>
15818                </enumeratedValue>
15819              </enumeratedValues>
15820            </field>
15821            <field>
15822              <name>SP3</name>
15823              <description>Supervisor Protect</description>
15824              <bitOffset>18</bitOffset>
15825              <bitWidth>1</bitWidth>
15826              <access>read-write</access>
15827              <enumeratedValues>
15828                <enumeratedValue>
15829                  <name>0</name>
15830                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15831                  <value>#0</value>
15832                </enumeratedValue>
15833                <enumeratedValue>
15834                  <name>1</name>
15835                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15836                  <value>#1</value>
15837                </enumeratedValue>
15838              </enumeratedValues>
15839            </field>
15840            <field>
15841              <name>TP2</name>
15842              <description>Trusted Protect</description>
15843              <bitOffset>20</bitOffset>
15844              <bitWidth>1</bitWidth>
15845              <access>read-write</access>
15846              <enumeratedValues>
15847                <enumeratedValue>
15848                  <name>0</name>
15849                  <description>Accesses from an untrusted master are allowed.</description>
15850                  <value>#0</value>
15851                </enumeratedValue>
15852                <enumeratedValue>
15853                  <name>1</name>
15854                  <description>Accesses from an untrusted master are not allowed.</description>
15855                  <value>#1</value>
15856                </enumeratedValue>
15857              </enumeratedValues>
15858            </field>
15859            <field>
15860              <name>WP2</name>
15861              <description>Write Protect</description>
15862              <bitOffset>21</bitOffset>
15863              <bitWidth>1</bitWidth>
15864              <access>read-write</access>
15865              <enumeratedValues>
15866                <enumeratedValue>
15867                  <name>0</name>
15868                  <description>This peripheral allows write accesses.</description>
15869                  <value>#0</value>
15870                </enumeratedValue>
15871                <enumeratedValue>
15872                  <name>1</name>
15873                  <description>This peripheral is write protected.</description>
15874                  <value>#1</value>
15875                </enumeratedValue>
15876              </enumeratedValues>
15877            </field>
15878            <field>
15879              <name>SP2</name>
15880              <description>Supervisor Protect</description>
15881              <bitOffset>22</bitOffset>
15882              <bitWidth>1</bitWidth>
15883              <access>read-write</access>
15884              <enumeratedValues>
15885                <enumeratedValue>
15886                  <name>0</name>
15887                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15888                  <value>#0</value>
15889                </enumeratedValue>
15890                <enumeratedValue>
15891                  <name>1</name>
15892                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15893                  <value>#1</value>
15894                </enumeratedValue>
15895              </enumeratedValues>
15896            </field>
15897            <field>
15898              <name>TP1</name>
15899              <description>Trusted Protect</description>
15900              <bitOffset>24</bitOffset>
15901              <bitWidth>1</bitWidth>
15902              <access>read-write</access>
15903              <enumeratedValues>
15904                <enumeratedValue>
15905                  <name>0</name>
15906                  <description>Accesses from an untrusted master are allowed.</description>
15907                  <value>#0</value>
15908                </enumeratedValue>
15909                <enumeratedValue>
15910                  <name>1</name>
15911                  <description>Accesses from an untrusted master are not allowed.</description>
15912                  <value>#1</value>
15913                </enumeratedValue>
15914              </enumeratedValues>
15915            </field>
15916            <field>
15917              <name>WP1</name>
15918              <description>Write Protect</description>
15919              <bitOffset>25</bitOffset>
15920              <bitWidth>1</bitWidth>
15921              <access>read-write</access>
15922              <enumeratedValues>
15923                <enumeratedValue>
15924                  <name>0</name>
15925                  <description>This peripheral allows write accesses.</description>
15926                  <value>#0</value>
15927                </enumeratedValue>
15928                <enumeratedValue>
15929                  <name>1</name>
15930                  <description>This peripheral is write protected.</description>
15931                  <value>#1</value>
15932                </enumeratedValue>
15933              </enumeratedValues>
15934            </field>
15935            <field>
15936              <name>SP1</name>
15937              <description>Supervisor Protect</description>
15938              <bitOffset>26</bitOffset>
15939              <bitWidth>1</bitWidth>
15940              <access>read-write</access>
15941              <enumeratedValues>
15942                <enumeratedValue>
15943                  <name>0</name>
15944                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
15945                  <value>#0</value>
15946                </enumeratedValue>
15947                <enumeratedValue>
15948                  <name>1</name>
15949                  <description>This peripheral requires supervisor privilege level for accesses.</description>
15950                  <value>#1</value>
15951                </enumeratedValue>
15952              </enumeratedValues>
15953            </field>
15954            <field>
15955              <name>TP0</name>
15956              <description>Trusted Protect</description>
15957              <bitOffset>28</bitOffset>
15958              <bitWidth>1</bitWidth>
15959              <access>read-write</access>
15960              <enumeratedValues>
15961                <enumeratedValue>
15962                  <name>0</name>
15963                  <description>Accesses from an untrusted master are allowed.</description>
15964                  <value>#0</value>
15965                </enumeratedValue>
15966                <enumeratedValue>
15967                  <name>1</name>
15968                  <description>Accesses from an untrusted master are not allowed.</description>
15969                  <value>#1</value>
15970                </enumeratedValue>
15971              </enumeratedValues>
15972            </field>
15973            <field>
15974              <name>WP0</name>
15975              <description>Write Protect</description>
15976              <bitOffset>29</bitOffset>
15977              <bitWidth>1</bitWidth>
15978              <access>read-write</access>
15979              <enumeratedValues>
15980                <enumeratedValue>
15981                  <name>0</name>
15982                  <description>This peripheral allows write accesses.</description>
15983                  <value>#0</value>
15984                </enumeratedValue>
15985                <enumeratedValue>
15986                  <name>1</name>
15987                  <description>This peripheral is write protected.</description>
15988                  <value>#1</value>
15989                </enumeratedValue>
15990              </enumeratedValues>
15991            </field>
15992            <field>
15993              <name>SP0</name>
15994              <description>Supervisor Protect</description>
15995              <bitOffset>30</bitOffset>
15996              <bitWidth>1</bitWidth>
15997              <access>read-write</access>
15998              <enumeratedValues>
15999                <enumeratedValue>
16000                  <name>0</name>
16001                  <description>This peripheral does not require supervisor privilege level for accesses.</description>
16002                  <value>#0</value>
16003                </enumeratedValue>
16004                <enumeratedValue>
16005                  <name>1</name>
16006                  <description>This peripheral requires supervisor privilege level for accesses.</description>
16007                  <value>#1</value>
16008                </enumeratedValue>
16009              </enumeratedValues>
16010            </field>
16011          </fields>
16012        </register>
16013      </registers>
16014    </peripheral>
16015    <peripheral>
16016      <name>AXBS</name>
16017      <description>Crossbar switch</description>
16018      <prependToName>AXBS_</prependToName>
16019      <baseAddress>0x40004000</baseAddress>
16020      <addressBlock>
16021        <offset>0</offset>
16022        <size>0xC04</size>
16023        <usage>registers</usage>
16024      </addressBlock>
16025      <registers>
16026        <register>
16027          <dim>6</dim>
16028          <dimIncrement>0x100</dimIncrement>
16029          <dimIndex>0,1,2,3,4,5</dimIndex>
16030          <name>PRS%s</name>
16031          <description>Priority Registers Slave</description>
16032          <addressOffset>0</addressOffset>
16033          <size>32</size>
16034          <access>read-write</access>
16035          <resetValue>0x43210</resetValue>
16036          <resetMask>0xFFFFFFFF</resetMask>
16037          <fields>
16038            <field>
16039              <name>M0</name>
16040              <description>Master 0 Priority. Sets the arbitration priority for this port on the associated slave port.</description>
16041              <bitOffset>0</bitOffset>
16042              <bitWidth>3</bitWidth>
16043              <access>read-write</access>
16044              <enumeratedValues>
16045                <enumeratedValue>
16046                  <name>000</name>
16047                  <description>This master has level 1, or highest, priority when accessing the slave port.</description>
16048                  <value>#000</value>
16049                </enumeratedValue>
16050                <enumeratedValue>
16051                  <name>001</name>
16052                  <description>This master has level 2 priority when accessing the slave port.</description>
16053                  <value>#001</value>
16054                </enumeratedValue>
16055                <enumeratedValue>
16056                  <name>010</name>
16057                  <description>This master has level 3 priority when accessing the slave port.</description>
16058                  <value>#010</value>
16059                </enumeratedValue>
16060                <enumeratedValue>
16061                  <name>011</name>
16062                  <description>This master has level 4 priority when accessing the slave port.</description>
16063                  <value>#011</value>
16064                </enumeratedValue>
16065                <enumeratedValue>
16066                  <name>100</name>
16067                  <description>This master has level 5 priority when accessing the slave port.</description>
16068                  <value>#100</value>
16069                </enumeratedValue>
16070                <enumeratedValue>
16071                  <name>101</name>
16072                  <description>This master has level 6 priority when accessing the slave port.</description>
16073                  <value>#101</value>
16074                </enumeratedValue>
16075                <enumeratedValue>
16076                  <name>110</name>
16077                  <description>This master has level 7 priority when accessing the slave port.</description>
16078                  <value>#110</value>
16079                </enumeratedValue>
16080                <enumeratedValue>
16081                  <name>111</name>
16082                  <description>This master has level 8, or lowest, priority when accessing the slave port.</description>
16083                  <value>#111</value>
16084                </enumeratedValue>
16085              </enumeratedValues>
16086            </field>
16087            <field>
16088              <name>M1</name>
16089              <description>Master 1 Priority. Sets the arbitration priority for this port on the associated slave port.</description>
16090              <bitOffset>4</bitOffset>
16091              <bitWidth>3</bitWidth>
16092              <access>read-write</access>
16093              <enumeratedValues>
16094                <enumeratedValue>
16095                  <name>000</name>
16096                  <description>This master has level 1, or highest, priority when accessing the slave port.</description>
16097                  <value>#000</value>
16098                </enumeratedValue>
16099                <enumeratedValue>
16100                  <name>001</name>
16101                  <description>This master has level 2 priority when accessing the slave port.</description>
16102                  <value>#001</value>
16103                </enumeratedValue>
16104                <enumeratedValue>
16105                  <name>010</name>
16106                  <description>This master has level 3 priority when accessing the slave port.</description>
16107                  <value>#010</value>
16108                </enumeratedValue>
16109                <enumeratedValue>
16110                  <name>011</name>
16111                  <description>This master has level 4 priority when accessing the slave port.</description>
16112                  <value>#011</value>
16113                </enumeratedValue>
16114                <enumeratedValue>
16115                  <name>100</name>
16116                  <description>This master has level 5 priority when accessing the slave port.</description>
16117                  <value>#100</value>
16118                </enumeratedValue>
16119                <enumeratedValue>
16120                  <name>101</name>
16121                  <description>This master has level 6 priority when accessing the slave port.</description>
16122                  <value>#101</value>
16123                </enumeratedValue>
16124                <enumeratedValue>
16125                  <name>110</name>
16126                  <description>This master has level 7 priority when accessing the slave port.</description>
16127                  <value>#110</value>
16128                </enumeratedValue>
16129                <enumeratedValue>
16130                  <name>111</name>
16131                  <description>This master has level 8, or lowest, priority when accessing the slave port.</description>
16132                  <value>#111</value>
16133                </enumeratedValue>
16134              </enumeratedValues>
16135            </field>
16136            <field>
16137              <name>M2</name>
16138              <description>Master 2 Priority. Sets the arbitration priority for this port on the associated slave port.</description>
16139              <bitOffset>8</bitOffset>
16140              <bitWidth>3</bitWidth>
16141              <access>read-write</access>
16142              <enumeratedValues>
16143                <enumeratedValue>
16144                  <name>000</name>
16145                  <description>This master has level 1, or highest, priority when accessing the slave port.</description>
16146                  <value>#000</value>
16147                </enumeratedValue>
16148                <enumeratedValue>
16149                  <name>001</name>
16150                  <description>This master has level 2 priority when accessing the slave port.</description>
16151                  <value>#001</value>
16152                </enumeratedValue>
16153                <enumeratedValue>
16154                  <name>010</name>
16155                  <description>This master has level 3 priority when accessing the slave port.</description>
16156                  <value>#010</value>
16157                </enumeratedValue>
16158                <enumeratedValue>
16159                  <name>011</name>
16160                  <description>This master has level 4 priority when accessing the slave port.</description>
16161                  <value>#011</value>
16162                </enumeratedValue>
16163                <enumeratedValue>
16164                  <name>100</name>
16165                  <description>This master has level 5 priority when accessing the slave port.</description>
16166                  <value>#100</value>
16167                </enumeratedValue>
16168                <enumeratedValue>
16169                  <name>101</name>
16170                  <description>This master has level 6 priority when accessing the slave port.</description>
16171                  <value>#101</value>
16172                </enumeratedValue>
16173                <enumeratedValue>
16174                  <name>110</name>
16175                  <description>This master has level 7 priority when accessing the slave port.</description>
16176                  <value>#110</value>
16177                </enumeratedValue>
16178                <enumeratedValue>
16179                  <name>111</name>
16180                  <description>This master has level 8, or lowest, priority when accessing the slave port.</description>
16181                  <value>#111</value>
16182                </enumeratedValue>
16183              </enumeratedValues>
16184            </field>
16185            <field>
16186              <name>M3</name>
16187              <description>Master 3 Priority. Sets the arbitration priority for this port on the associated slave port.</description>
16188              <bitOffset>12</bitOffset>
16189              <bitWidth>3</bitWidth>
16190              <access>read-write</access>
16191              <enumeratedValues>
16192                <enumeratedValue>
16193                  <name>000</name>
16194                  <description>This master has level 1, or highest, priority when accessing the slave port.</description>
16195                  <value>#000</value>
16196                </enumeratedValue>
16197                <enumeratedValue>
16198                  <name>001</name>
16199                  <description>This master has level 2 priority when accessing the slave port.</description>
16200                  <value>#001</value>
16201                </enumeratedValue>
16202                <enumeratedValue>
16203                  <name>010</name>
16204                  <description>This master has level 3 priority when accessing the slave port.</description>
16205                  <value>#010</value>
16206                </enumeratedValue>
16207                <enumeratedValue>
16208                  <name>011</name>
16209                  <description>This master has level 4 priority when accessing the slave port.</description>
16210                  <value>#011</value>
16211                </enumeratedValue>
16212                <enumeratedValue>
16213                  <name>100</name>
16214                  <description>This master has level 5 priority when accessing the slave port.</description>
16215                  <value>#100</value>
16216                </enumeratedValue>
16217                <enumeratedValue>
16218                  <name>101</name>
16219                  <description>This master has level 6 priority when accessing the slave port.</description>
16220                  <value>#101</value>
16221                </enumeratedValue>
16222                <enumeratedValue>
16223                  <name>110</name>
16224                  <description>This master has level 7 priority when accessing the slave port.</description>
16225                  <value>#110</value>
16226                </enumeratedValue>
16227                <enumeratedValue>
16228                  <name>111</name>
16229                  <description>This master has level 8, or lowest, priority when accessing the slave port.</description>
16230                  <value>#111</value>
16231                </enumeratedValue>
16232              </enumeratedValues>
16233            </field>
16234            <field>
16235              <name>M4</name>
16236              <description>Master 4 Priority. Sets the arbitration priority for this port on the associated slave port.</description>
16237              <bitOffset>16</bitOffset>
16238              <bitWidth>3</bitWidth>
16239              <access>read-write</access>
16240              <enumeratedValues>
16241                <enumeratedValue>
16242                  <name>000</name>
16243                  <description>This master has level 1, or highest, priority when accessing the slave port.</description>
16244                  <value>#000</value>
16245                </enumeratedValue>
16246                <enumeratedValue>
16247                  <name>001</name>
16248                  <description>This master has level 2 priority when accessing the slave port.</description>
16249                  <value>#001</value>
16250                </enumeratedValue>
16251                <enumeratedValue>
16252                  <name>010</name>
16253                  <description>This master has level 3 priority when accessing the slave port.</description>
16254                  <value>#010</value>
16255                </enumeratedValue>
16256                <enumeratedValue>
16257                  <name>011</name>
16258                  <description>This master has level 4 priority when accessing the slave port.</description>
16259                  <value>#011</value>
16260                </enumeratedValue>
16261                <enumeratedValue>
16262                  <name>100</name>
16263                  <description>This master has level 5 priority when accessing the slave port.</description>
16264                  <value>#100</value>
16265                </enumeratedValue>
16266                <enumeratedValue>
16267                  <name>101</name>
16268                  <description>This master has level 6 priority when accessing the slave port.</description>
16269                  <value>#101</value>
16270                </enumeratedValue>
16271                <enumeratedValue>
16272                  <name>110</name>
16273                  <description>This master has level 7 priority when accessing the slave port.</description>
16274                  <value>#110</value>
16275                </enumeratedValue>
16276                <enumeratedValue>
16277                  <name>111</name>
16278                  <description>This master has level 8, or lowest, priority when accessing the slave port.</description>
16279                  <value>#111</value>
16280                </enumeratedValue>
16281              </enumeratedValues>
16282            </field>
16283          </fields>
16284        </register>
16285        <register>
16286          <dim>6</dim>
16287          <dimIncrement>0x100</dimIncrement>
16288          <dimIndex>0,1,2,3,4,5</dimIndex>
16289          <name>CRS%s</name>
16290          <description>Control Register</description>
16291          <addressOffset>0x10</addressOffset>
16292          <size>32</size>
16293          <access>read-write</access>
16294          <resetValue>0</resetValue>
16295          <resetMask>0xFFFFFFFF</resetMask>
16296          <fields>
16297            <field>
16298              <name>PARK</name>
16299              <description>Park</description>
16300              <bitOffset>0</bitOffset>
16301              <bitWidth>3</bitWidth>
16302              <access>read-write</access>
16303              <enumeratedValues>
16304                <enumeratedValue>
16305                  <name>000</name>
16306                  <description>Park on master port M0</description>
16307                  <value>#000</value>
16308                </enumeratedValue>
16309                <enumeratedValue>
16310                  <name>001</name>
16311                  <description>Park on master port M1</description>
16312                  <value>#001</value>
16313                </enumeratedValue>
16314                <enumeratedValue>
16315                  <name>010</name>
16316                  <description>Park on master port M2</description>
16317                  <value>#010</value>
16318                </enumeratedValue>
16319                <enumeratedValue>
16320                  <name>011</name>
16321                  <description>Park on master port M3</description>
16322                  <value>#011</value>
16323                </enumeratedValue>
16324                <enumeratedValue>
16325                  <name>100</name>
16326                  <description>Park on master port M4</description>
16327                  <value>#100</value>
16328                </enumeratedValue>
16329                <enumeratedValue>
16330                  <name>101</name>
16331                  <description>Park on master port M5</description>
16332                  <value>#101</value>
16333                </enumeratedValue>
16334                <enumeratedValue>
16335                  <name>110</name>
16336                  <description>Park on master port M6</description>
16337                  <value>#110</value>
16338                </enumeratedValue>
16339                <enumeratedValue>
16340                  <name>111</name>
16341                  <description>Park on master port M7</description>
16342                  <value>#111</value>
16343                </enumeratedValue>
16344              </enumeratedValues>
16345            </field>
16346            <field>
16347              <name>PCTL</name>
16348              <description>Parking Control</description>
16349              <bitOffset>4</bitOffset>
16350              <bitWidth>2</bitWidth>
16351              <access>read-write</access>
16352              <enumeratedValues>
16353                <enumeratedValue>
16354                  <name>00</name>
16355                  <description>When no master makes a request, the arbiter parks the slave port on the master port defined by the PARK field</description>
16356                  <value>#00</value>
16357                </enumeratedValue>
16358                <enumeratedValue>
16359                  <name>01</name>
16360                  <description>When no master makes a request, the arbiter parks the slave port on the last master to be in control of the slave port</description>
16361                  <value>#01</value>
16362                </enumeratedValue>
16363                <enumeratedValue>
16364                  <name>10</name>
16365                  <description>When no master makes a request, the slave port is not parked on a master and the arbiter drives all outputs to a constant safe state</description>
16366                  <value>#10</value>
16367                </enumeratedValue>
16368              </enumeratedValues>
16369            </field>
16370            <field>
16371              <name>ARB</name>
16372              <description>Arbitration Mode</description>
16373              <bitOffset>8</bitOffset>
16374              <bitWidth>2</bitWidth>
16375              <access>read-write</access>
16376              <enumeratedValues>
16377                <enumeratedValue>
16378                  <name>00</name>
16379                  <description>Fixed priority</description>
16380                  <value>#00</value>
16381                </enumeratedValue>
16382                <enumeratedValue>
16383                  <name>01</name>
16384                  <description>Round-robin, or rotating, priority</description>
16385                  <value>#01</value>
16386                </enumeratedValue>
16387              </enumeratedValues>
16388            </field>
16389            <field>
16390              <name>HLP</name>
16391              <description>Halt Low Priority</description>
16392              <bitOffset>30</bitOffset>
16393              <bitWidth>1</bitWidth>
16394              <access>read-write</access>
16395              <enumeratedValues>
16396                <enumeratedValue>
16397                  <name>0</name>
16398                  <description>The low power mode request has the highest priority for arbitration on this slave port</description>
16399                  <value>#0</value>
16400                </enumeratedValue>
16401                <enumeratedValue>
16402                  <name>1</name>
16403                  <description>The low power mode request has the lowest initial priority for arbitration on this slave port</description>
16404                  <value>#1</value>
16405                </enumeratedValue>
16406              </enumeratedValues>
16407            </field>
16408            <field>
16409              <name>RO</name>
16410              <description>Read Only</description>
16411              <bitOffset>31</bitOffset>
16412              <bitWidth>1</bitWidth>
16413              <access>read-write</access>
16414              <enumeratedValues>
16415                <enumeratedValue>
16416                  <name>0</name>
16417                  <description>The slave port&apos;s registers are writeable</description>
16418                  <value>#0</value>
16419                </enumeratedValue>
16420                <enumeratedValue>
16421                  <name>1</name>
16422                  <description>The slave port&apos;s registers are read-only and cannot be written. Attempted writes have no effect on the registers and result in a bus error response.</description>
16423                  <value>#1</value>
16424                </enumeratedValue>
16425              </enumeratedValues>
16426            </field>
16427          </fields>
16428        </register>
16429        <register>
16430          <dim>5</dim>
16431          <dimIncrement>0x100</dimIncrement>
16432          <dimIndex>0,1,2,3,4</dimIndex>
16433          <name>MGPCR%s</name>
16434          <description>Master General Purpose Control Register</description>
16435          <addressOffset>0x800</addressOffset>
16436          <size>32</size>
16437          <access>read-write</access>
16438          <resetValue>0</resetValue>
16439          <resetMask>0xFFFFFFFF</resetMask>
16440          <fields>
16441            <field>
16442              <name>AULB</name>
16443              <description>Arbitrates On Undefined Length Bursts</description>
16444              <bitOffset>0</bitOffset>
16445              <bitWidth>3</bitWidth>
16446              <access>read-write</access>
16447              <enumeratedValues>
16448                <enumeratedValue>
16449                  <name>000</name>
16450                  <description>No arbitration is allowed during an undefined length burst</description>
16451                  <value>#000</value>
16452                </enumeratedValue>
16453                <enumeratedValue>
16454                  <name>001</name>
16455                  <description>Arbitration is allowed at any time during an undefined length burst</description>
16456                  <value>#001</value>
16457                </enumeratedValue>
16458                <enumeratedValue>
16459                  <name>010</name>
16460                  <description>Arbitration is allowed after four beats of an undefined length burst</description>
16461                  <value>#010</value>
16462                </enumeratedValue>
16463                <enumeratedValue>
16464                  <name>011</name>
16465                  <description>Arbitration is allowed after eight beats of an undefined length burst</description>
16466                  <value>#011</value>
16467                </enumeratedValue>
16468                <enumeratedValue>
16469                  <name>100</name>
16470                  <description>Arbitration is allowed after 16 beats of an undefined length burst</description>
16471                  <value>#100</value>
16472                </enumeratedValue>
16473              </enumeratedValues>
16474            </field>
16475          </fields>
16476        </register>
16477      </registers>
16478    </peripheral>
16479    <peripheral>
16480      <name>DMA</name>
16481      <description>Enhanced direct memory access controller</description>
16482      <prependToName>DMA_</prependToName>
16483      <baseAddress>0x40008000</baseAddress>
16484      <addressBlock>
16485        <offset>0</offset>
16486        <size>0x1400</size>
16487        <usage>registers</usage>
16488      </addressBlock>
16489      <interrupt>
16490        <name>DMA0_DMA16</name>
16491        <value>0</value>
16492      </interrupt>
16493      <interrupt>
16494        <name>DMA1_DMA17</name>
16495        <value>1</value>
16496      </interrupt>
16497      <interrupt>
16498        <name>DMA2_DMA18</name>
16499        <value>2</value>
16500      </interrupt>
16501      <interrupt>
16502        <name>DMA3_DMA19</name>
16503        <value>3</value>
16504      </interrupt>
16505      <interrupt>
16506        <name>DMA4_DMA20</name>
16507        <value>4</value>
16508      </interrupt>
16509      <interrupt>
16510        <name>DMA5_DMA21</name>
16511        <value>5</value>
16512      </interrupt>
16513      <interrupt>
16514        <name>DMA6_DMA22</name>
16515        <value>6</value>
16516      </interrupt>
16517      <interrupt>
16518        <name>DMA7_DMA23</name>
16519        <value>7</value>
16520      </interrupt>
16521      <interrupt>
16522        <name>DMA8_DMA24</name>
16523        <value>8</value>
16524      </interrupt>
16525      <interrupt>
16526        <name>DMA9_DMA25</name>
16527        <value>9</value>
16528      </interrupt>
16529      <interrupt>
16530        <name>DMA10_DMA26</name>
16531        <value>10</value>
16532      </interrupt>
16533      <interrupt>
16534        <name>DMA11_DMA27</name>
16535        <value>11</value>
16536      </interrupt>
16537      <interrupt>
16538        <name>DMA12_DMA28</name>
16539        <value>12</value>
16540      </interrupt>
16541      <interrupt>
16542        <name>DMA13_DMA29</name>
16543        <value>13</value>
16544      </interrupt>
16545      <interrupt>
16546        <name>DMA14_DMA30</name>
16547        <value>14</value>
16548      </interrupt>
16549      <interrupt>
16550        <name>DMA15_DMA31</name>
16551        <value>15</value>
16552      </interrupt>
16553      <interrupt>
16554        <name>DMA_Error</name>
16555        <value>16</value>
16556      </interrupt>
16557      <registers>
16558        <register>
16559          <name>CR</name>
16560          <description>Control Register</description>
16561          <addressOffset>0</addressOffset>
16562          <size>32</size>
16563          <access>read-write</access>
16564          <resetValue>0x400</resetValue>
16565          <resetMask>0xFFFFFFFF</resetMask>
16566          <fields>
16567            <field>
16568              <name>EDBG</name>
16569              <description>Enable Debug</description>
16570              <bitOffset>1</bitOffset>
16571              <bitWidth>1</bitWidth>
16572              <access>read-write</access>
16573              <enumeratedValues>
16574                <enumeratedValue>
16575                  <name>0</name>
16576                  <description>When in debug mode, the DMA continues to operate.</description>
16577                  <value>#0</value>
16578                </enumeratedValue>
16579                <enumeratedValue>
16580                  <name>1</name>
16581                  <description>When in debug mode, the DMA stalls the start of a new channel. Executing channels are allowed to complete. Channel execution resumes when the system exits debug mode or the EDBG bit is cleared.</description>
16582                  <value>#1</value>
16583                </enumeratedValue>
16584              </enumeratedValues>
16585            </field>
16586            <field>
16587              <name>ERCA</name>
16588              <description>Enable Round Robin Channel Arbitration</description>
16589              <bitOffset>2</bitOffset>
16590              <bitWidth>1</bitWidth>
16591              <access>read-write</access>
16592              <enumeratedValues>
16593                <enumeratedValue>
16594                  <name>0</name>
16595                  <description>Fixed priority arbitration is used for channel selection within each group.</description>
16596                  <value>#0</value>
16597                </enumeratedValue>
16598                <enumeratedValue>
16599                  <name>1</name>
16600                  <description>Round robin arbitration is used for channel selection within each group.</description>
16601                  <value>#1</value>
16602                </enumeratedValue>
16603              </enumeratedValues>
16604            </field>
16605            <field>
16606              <name>ERGA</name>
16607              <description>Enable Round Robin Group Arbitration</description>
16608              <bitOffset>3</bitOffset>
16609              <bitWidth>1</bitWidth>
16610              <access>read-write</access>
16611              <enumeratedValues>
16612                <enumeratedValue>
16613                  <name>0</name>
16614                  <description>Fixed priority arbitration is used for selection among the groups.</description>
16615                  <value>#0</value>
16616                </enumeratedValue>
16617                <enumeratedValue>
16618                  <name>1</name>
16619                  <description>Round robin arbitration is used for selection among the groups.</description>
16620                  <value>#1</value>
16621                </enumeratedValue>
16622              </enumeratedValues>
16623            </field>
16624            <field>
16625              <name>HOE</name>
16626              <description>Halt On Error</description>
16627              <bitOffset>4</bitOffset>
16628              <bitWidth>1</bitWidth>
16629              <access>read-write</access>
16630              <enumeratedValues>
16631                <enumeratedValue>
16632                  <name>0</name>
16633                  <description>Normal operation</description>
16634                  <value>#0</value>
16635                </enumeratedValue>
16636                <enumeratedValue>
16637                  <name>1</name>
16638                  <description>Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared.</description>
16639                  <value>#1</value>
16640                </enumeratedValue>
16641              </enumeratedValues>
16642            </field>
16643            <field>
16644              <name>HALT</name>
16645              <description>Halt DMA Operations</description>
16646              <bitOffset>5</bitOffset>
16647              <bitWidth>1</bitWidth>
16648              <access>read-write</access>
16649              <enumeratedValues>
16650                <enumeratedValue>
16651                  <name>0</name>
16652                  <description>Normal operation</description>
16653                  <value>#0</value>
16654                </enumeratedValue>
16655                <enumeratedValue>
16656                  <name>1</name>
16657                  <description>Stall the start of any new channels. Executing channels are allowed to complete. Channel execution resumes when this bit is cleared.</description>
16658                  <value>#1</value>
16659                </enumeratedValue>
16660              </enumeratedValues>
16661            </field>
16662            <field>
16663              <name>CLM</name>
16664              <description>Continuous Link Mode</description>
16665              <bitOffset>6</bitOffset>
16666              <bitWidth>1</bitWidth>
16667              <access>read-write</access>
16668              <enumeratedValues>
16669                <enumeratedValue>
16670                  <name>0</name>
16671                  <description>A minor loop channel link made to itself goes through channel arbitration before being activated again.</description>
16672                  <value>#0</value>
16673                </enumeratedValue>
16674                <enumeratedValue>
16675                  <name>1</name>
16676                  <description>A minor loop channel link made to itself does not go through channel arbitration before being activated again. Upon minor loop completion, the channel activates again if that channel has a minor loop channel link enabled and the link channel is itself. This effectively applies the minor loop offsets and restarts the next minor loop.</description>
16677                  <value>#1</value>
16678                </enumeratedValue>
16679              </enumeratedValues>
16680            </field>
16681            <field>
16682              <name>EMLM</name>
16683              <description>Enable Minor Loop Mapping</description>
16684              <bitOffset>7</bitOffset>
16685              <bitWidth>1</bitWidth>
16686              <access>read-write</access>
16687              <enumeratedValues>
16688                <enumeratedValue>
16689                  <name>0</name>
16690                  <description>Disabled. TCDn.word2 is defined as a 32-bit NBYTES field.</description>
16691                  <value>#0</value>
16692                </enumeratedValue>
16693                <enumeratedValue>
16694                  <name>1</name>
16695                  <description>Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field. The individual enable fields allow the minor loop offset to be applied to the source address, the destination address, or both. The NBYTES field is reduced when either offset is enabled.</description>
16696                  <value>#1</value>
16697                </enumeratedValue>
16698              </enumeratedValues>
16699            </field>
16700            <field>
16701              <name>GRP0PRI</name>
16702              <description>Channel Group 0 Priority</description>
16703              <bitOffset>8</bitOffset>
16704              <bitWidth>1</bitWidth>
16705              <access>read-write</access>
16706            </field>
16707            <field>
16708              <name>GRP1PRI</name>
16709              <description>Channel Group 1 Priority</description>
16710              <bitOffset>10</bitOffset>
16711              <bitWidth>1</bitWidth>
16712              <access>read-write</access>
16713            </field>
16714            <field>
16715              <name>ECX</name>
16716              <description>Error Cancel Transfer</description>
16717              <bitOffset>16</bitOffset>
16718              <bitWidth>1</bitWidth>
16719              <access>read-write</access>
16720              <enumeratedValues>
16721                <enumeratedValue>
16722                  <name>0</name>
16723                  <description>Normal operation</description>
16724                  <value>#0</value>
16725                </enumeratedValue>
16726                <enumeratedValue>
16727                  <name>1</name>
16728                  <description>Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and generating an optional error interrupt.</description>
16729                  <value>#1</value>
16730                </enumeratedValue>
16731              </enumeratedValues>
16732            </field>
16733            <field>
16734              <name>CX</name>
16735              <description>Cancel Transfer</description>
16736              <bitOffset>17</bitOffset>
16737              <bitWidth>1</bitWidth>
16738              <access>read-write</access>
16739              <enumeratedValues>
16740                <enumeratedValue>
16741                  <name>0</name>
16742                  <description>Normal operation</description>
16743                  <value>#0</value>
16744                </enumeratedValue>
16745                <enumeratedValue>
16746                  <name>1</name>
16747                  <description>Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after the cancel has been honored. This cancel retires the channel normally as if the minor loop was completed.</description>
16748                  <value>#1</value>
16749                </enumeratedValue>
16750              </enumeratedValues>
16751            </field>
16752          </fields>
16753        </register>
16754        <register>
16755          <name>ES</name>
16756          <description>Error Status Register</description>
16757          <addressOffset>0x4</addressOffset>
16758          <size>32</size>
16759          <access>read-only</access>
16760          <resetValue>0</resetValue>
16761          <resetMask>0xFFFFFFFF</resetMask>
16762          <fields>
16763            <field>
16764              <name>DBE</name>
16765              <description>Destination Bus Error</description>
16766              <bitOffset>0</bitOffset>
16767              <bitWidth>1</bitWidth>
16768              <access>read-only</access>
16769              <enumeratedValues>
16770                <enumeratedValue>
16771                  <name>0</name>
16772                  <description>No destination bus error</description>
16773                  <value>#0</value>
16774                </enumeratedValue>
16775                <enumeratedValue>
16776                  <name>1</name>
16777                  <description>The last recorded error was a bus error on a destination write</description>
16778                  <value>#1</value>
16779                </enumeratedValue>
16780              </enumeratedValues>
16781            </field>
16782            <field>
16783              <name>SBE</name>
16784              <description>Source Bus Error</description>
16785              <bitOffset>1</bitOffset>
16786              <bitWidth>1</bitWidth>
16787              <access>read-only</access>
16788              <enumeratedValues>
16789                <enumeratedValue>
16790                  <name>0</name>
16791                  <description>No source bus error</description>
16792                  <value>#0</value>
16793                </enumeratedValue>
16794                <enumeratedValue>
16795                  <name>1</name>
16796                  <description>The last recorded error was a bus error on a source read</description>
16797                  <value>#1</value>
16798                </enumeratedValue>
16799              </enumeratedValues>
16800            </field>
16801            <field>
16802              <name>SGE</name>
16803              <description>Scatter/Gather Configuration Error</description>
16804              <bitOffset>2</bitOffset>
16805              <bitWidth>1</bitWidth>
16806              <access>read-only</access>
16807              <enumeratedValues>
16808                <enumeratedValue>
16809                  <name>0</name>
16810                  <description>No scatter/gather configuration error</description>
16811                  <value>#0</value>
16812                </enumeratedValue>
16813                <enumeratedValue>
16814                  <name>1</name>
16815                  <description>The last recorded error was a configuration error detected in the TCDn_DLASTSGA field. This field is checked at the beginning of a scatter/gather operation after major loop completion if TCDn_CSR[ESG] is enabled. TCDn_DLASTSGA is not on a 32 byte boundary.</description>
16816                  <value>#1</value>
16817                </enumeratedValue>
16818              </enumeratedValues>
16819            </field>
16820            <field>
16821              <name>NCE</name>
16822              <description>NBYTES/CITER Configuration Error</description>
16823              <bitOffset>3</bitOffset>
16824              <bitWidth>1</bitWidth>
16825              <access>read-only</access>
16826              <enumeratedValues>
16827                <enumeratedValue>
16828                  <name>0</name>
16829                  <description>No NBYTES/CITER configuration error</description>
16830                  <value>#0</value>
16831                </enumeratedValue>
16832                <enumeratedValue>
16833                  <name>1</name>
16834                  <description>The last recorded error was a configuration error detected in the TCDn_NBYTES or TCDn_CITER fields. TCDn_NBYTES is not a multiple of TCDn_ATTR[SSIZE] and TCDn_ATTR[DSIZE], or TCDn_CITER[CITER] is equal to zero, or TCDn_CITER[ELINK] is not equal to TCDn_BITER[ELINK]</description>
16835                  <value>#1</value>
16836                </enumeratedValue>
16837              </enumeratedValues>
16838            </field>
16839            <field>
16840              <name>DOE</name>
16841              <description>Destination Offset Error</description>
16842              <bitOffset>4</bitOffset>
16843              <bitWidth>1</bitWidth>
16844              <access>read-only</access>
16845              <enumeratedValues>
16846                <enumeratedValue>
16847                  <name>0</name>
16848                  <description>No destination offset configuration error</description>
16849                  <value>#0</value>
16850                </enumeratedValue>
16851                <enumeratedValue>
16852                  <name>1</name>
16853                  <description>The last recorded error was a configuration error detected in the TCDn_DOFF field. TCDn_DOFF is inconsistent with TCDn_ATTR[DSIZE].</description>
16854                  <value>#1</value>
16855                </enumeratedValue>
16856              </enumeratedValues>
16857            </field>
16858            <field>
16859              <name>DAE</name>
16860              <description>Destination Address Error</description>
16861              <bitOffset>5</bitOffset>
16862              <bitWidth>1</bitWidth>
16863              <access>read-only</access>
16864              <enumeratedValues>
16865                <enumeratedValue>
16866                  <name>0</name>
16867                  <description>No destination address configuration error</description>
16868                  <value>#0</value>
16869                </enumeratedValue>
16870                <enumeratedValue>
16871                  <name>1</name>
16872                  <description>The last recorded error was a configuration error detected in the TCDn_DADDR field. TCDn_DADDR is inconsistent with TCDn_ATTR[DSIZE].</description>
16873                  <value>#1</value>
16874                </enumeratedValue>
16875              </enumeratedValues>
16876            </field>
16877            <field>
16878              <name>SOE</name>
16879              <description>Source Offset Error</description>
16880              <bitOffset>6</bitOffset>
16881              <bitWidth>1</bitWidth>
16882              <access>read-only</access>
16883              <enumeratedValues>
16884                <enumeratedValue>
16885                  <name>0</name>
16886                  <description>No source offset configuration error</description>
16887                  <value>#0</value>
16888                </enumeratedValue>
16889                <enumeratedValue>
16890                  <name>1</name>
16891                  <description>The last recorded error was a configuration error detected in the TCDn_SOFF field. TCDn_SOFF is inconsistent with TCDn_ATTR[SSIZE].</description>
16892                  <value>#1</value>
16893                </enumeratedValue>
16894              </enumeratedValues>
16895            </field>
16896            <field>
16897              <name>SAE</name>
16898              <description>Source Address Error</description>
16899              <bitOffset>7</bitOffset>
16900              <bitWidth>1</bitWidth>
16901              <access>read-only</access>
16902              <enumeratedValues>
16903                <enumeratedValue>
16904                  <name>0</name>
16905                  <description>No source address configuration error.</description>
16906                  <value>#0</value>
16907                </enumeratedValue>
16908                <enumeratedValue>
16909                  <name>1</name>
16910                  <description>The last recorded error was a configuration error detected in the TCDn_SADDR field. TCDn_SADDR is inconsistent with TCDn_ATTR[SSIZE].</description>
16911                  <value>#1</value>
16912                </enumeratedValue>
16913              </enumeratedValues>
16914            </field>
16915            <field>
16916              <name>ERRCHN</name>
16917              <description>Error Channel Number or Canceled Channel Number</description>
16918              <bitOffset>8</bitOffset>
16919              <bitWidth>5</bitWidth>
16920              <access>read-only</access>
16921            </field>
16922            <field>
16923              <name>CPE</name>
16924              <description>Channel Priority Error</description>
16925              <bitOffset>14</bitOffset>
16926              <bitWidth>1</bitWidth>
16927              <access>read-only</access>
16928              <enumeratedValues>
16929                <enumeratedValue>
16930                  <name>0</name>
16931                  <description>No channel priority error</description>
16932                  <value>#0</value>
16933                </enumeratedValue>
16934                <enumeratedValue>
16935                  <name>1</name>
16936                  <description>The last recorded error was a configuration error in the channel priorities within a group. Channel priorities within a group are not unique.</description>
16937                  <value>#1</value>
16938                </enumeratedValue>
16939              </enumeratedValues>
16940            </field>
16941            <field>
16942              <name>GPE</name>
16943              <description>Group Priority Error</description>
16944              <bitOffset>15</bitOffset>
16945              <bitWidth>1</bitWidth>
16946              <access>read-only</access>
16947              <enumeratedValues>
16948                <enumeratedValue>
16949                  <name>0</name>
16950                  <description>No group priority error</description>
16951                  <value>#0</value>
16952                </enumeratedValue>
16953                <enumeratedValue>
16954                  <name>1</name>
16955                  <description>The last recorded error was a configuration error among the group priorities. All group priorities are not unique.</description>
16956                  <value>#1</value>
16957                </enumeratedValue>
16958              </enumeratedValues>
16959            </field>
16960            <field>
16961              <name>ECX</name>
16962              <description>Transfer Canceled</description>
16963              <bitOffset>16</bitOffset>
16964              <bitWidth>1</bitWidth>
16965              <access>read-only</access>
16966              <enumeratedValues>
16967                <enumeratedValue>
16968                  <name>0</name>
16969                  <description>No canceled transfers</description>
16970                  <value>#0</value>
16971                </enumeratedValue>
16972                <enumeratedValue>
16973                  <name>1</name>
16974                  <description>The last recorded entry was a canceled transfer by the error cancel transfer input</description>
16975                  <value>#1</value>
16976                </enumeratedValue>
16977              </enumeratedValues>
16978            </field>
16979            <field>
16980              <name>VLD</name>
16981              <description>Logical OR of all ERR status bits</description>
16982              <bitOffset>31</bitOffset>
16983              <bitWidth>1</bitWidth>
16984              <access>read-only</access>
16985              <enumeratedValues>
16986                <enumeratedValue>
16987                  <name>0</name>
16988                  <description>No ERR bits are set.</description>
16989                  <value>#0</value>
16990                </enumeratedValue>
16991                <enumeratedValue>
16992                  <name>1</name>
16993                  <description>At least one ERR bit is set indicating a valid error exists that has not been cleared.</description>
16994                  <value>#1</value>
16995                </enumeratedValue>
16996              </enumeratedValues>
16997            </field>
16998          </fields>
16999        </register>
17000        <register>
17001          <name>ERQ</name>
17002          <description>Enable Request Register</description>
17003          <addressOffset>0xC</addressOffset>
17004          <size>32</size>
17005          <access>read-write</access>
17006          <resetValue>0</resetValue>
17007          <resetMask>0xFFFFFFFF</resetMask>
17008          <fields>
17009            <field>
17010              <name>ERQ0</name>
17011              <description>Enable DMA Request 0</description>
17012              <bitOffset>0</bitOffset>
17013              <bitWidth>1</bitWidth>
17014              <access>read-write</access>
17015              <enumeratedValues>
17016                <enumeratedValue>
17017                  <name>0</name>
17018                  <description>The DMA request signal for the corresponding channel is disabled</description>
17019                  <value>#0</value>
17020                </enumeratedValue>
17021                <enumeratedValue>
17022                  <name>1</name>
17023                  <description>The DMA request signal for the corresponding channel is enabled</description>
17024                  <value>#1</value>
17025                </enumeratedValue>
17026              </enumeratedValues>
17027            </field>
17028            <field>
17029              <name>ERQ1</name>
17030              <description>Enable DMA Request 1</description>
17031              <bitOffset>1</bitOffset>
17032              <bitWidth>1</bitWidth>
17033              <access>read-write</access>
17034              <enumeratedValues>
17035                <enumeratedValue>
17036                  <name>0</name>
17037                  <description>The DMA request signal for the corresponding channel is disabled</description>
17038                  <value>#0</value>
17039                </enumeratedValue>
17040                <enumeratedValue>
17041                  <name>1</name>
17042                  <description>The DMA request signal for the corresponding channel is enabled</description>
17043                  <value>#1</value>
17044                </enumeratedValue>
17045              </enumeratedValues>
17046            </field>
17047            <field>
17048              <name>ERQ2</name>
17049              <description>Enable DMA Request 2</description>
17050              <bitOffset>2</bitOffset>
17051              <bitWidth>1</bitWidth>
17052              <access>read-write</access>
17053              <enumeratedValues>
17054                <enumeratedValue>
17055                  <name>0</name>
17056                  <description>The DMA request signal for the corresponding channel is disabled</description>
17057                  <value>#0</value>
17058                </enumeratedValue>
17059                <enumeratedValue>
17060                  <name>1</name>
17061                  <description>The DMA request signal for the corresponding channel is enabled</description>
17062                  <value>#1</value>
17063                </enumeratedValue>
17064              </enumeratedValues>
17065            </field>
17066            <field>
17067              <name>ERQ3</name>
17068              <description>Enable DMA Request 3</description>
17069              <bitOffset>3</bitOffset>
17070              <bitWidth>1</bitWidth>
17071              <access>read-write</access>
17072              <enumeratedValues>
17073                <enumeratedValue>
17074                  <name>0</name>
17075                  <description>The DMA request signal for the corresponding channel is disabled</description>
17076                  <value>#0</value>
17077                </enumeratedValue>
17078                <enumeratedValue>
17079                  <name>1</name>
17080                  <description>The DMA request signal for the corresponding channel is enabled</description>
17081                  <value>#1</value>
17082                </enumeratedValue>
17083              </enumeratedValues>
17084            </field>
17085            <field>
17086              <name>ERQ4</name>
17087              <description>Enable DMA Request 4</description>
17088              <bitOffset>4</bitOffset>
17089              <bitWidth>1</bitWidth>
17090              <access>read-write</access>
17091              <enumeratedValues>
17092                <enumeratedValue>
17093                  <name>0</name>
17094                  <description>The DMA request signal for the corresponding channel is disabled</description>
17095                  <value>#0</value>
17096                </enumeratedValue>
17097                <enumeratedValue>
17098                  <name>1</name>
17099                  <description>The DMA request signal for the corresponding channel is enabled</description>
17100                  <value>#1</value>
17101                </enumeratedValue>
17102              </enumeratedValues>
17103            </field>
17104            <field>
17105              <name>ERQ5</name>
17106              <description>Enable DMA Request 5</description>
17107              <bitOffset>5</bitOffset>
17108              <bitWidth>1</bitWidth>
17109              <access>read-write</access>
17110              <enumeratedValues>
17111                <enumeratedValue>
17112                  <name>0</name>
17113                  <description>The DMA request signal for the corresponding channel is disabled</description>
17114                  <value>#0</value>
17115                </enumeratedValue>
17116                <enumeratedValue>
17117                  <name>1</name>
17118                  <description>The DMA request signal for the corresponding channel is enabled</description>
17119                  <value>#1</value>
17120                </enumeratedValue>
17121              </enumeratedValues>
17122            </field>
17123            <field>
17124              <name>ERQ6</name>
17125              <description>Enable DMA Request 6</description>
17126              <bitOffset>6</bitOffset>
17127              <bitWidth>1</bitWidth>
17128              <access>read-write</access>
17129              <enumeratedValues>
17130                <enumeratedValue>
17131                  <name>0</name>
17132                  <description>The DMA request signal for the corresponding channel is disabled</description>
17133                  <value>#0</value>
17134                </enumeratedValue>
17135                <enumeratedValue>
17136                  <name>1</name>
17137                  <description>The DMA request signal for the corresponding channel is enabled</description>
17138                  <value>#1</value>
17139                </enumeratedValue>
17140              </enumeratedValues>
17141            </field>
17142            <field>
17143              <name>ERQ7</name>
17144              <description>Enable DMA Request 7</description>
17145              <bitOffset>7</bitOffset>
17146              <bitWidth>1</bitWidth>
17147              <access>read-write</access>
17148              <enumeratedValues>
17149                <enumeratedValue>
17150                  <name>0</name>
17151                  <description>The DMA request signal for the corresponding channel is disabled</description>
17152                  <value>#0</value>
17153                </enumeratedValue>
17154                <enumeratedValue>
17155                  <name>1</name>
17156                  <description>The DMA request signal for the corresponding channel is enabled</description>
17157                  <value>#1</value>
17158                </enumeratedValue>
17159              </enumeratedValues>
17160            </field>
17161            <field>
17162              <name>ERQ8</name>
17163              <description>Enable DMA Request 8</description>
17164              <bitOffset>8</bitOffset>
17165              <bitWidth>1</bitWidth>
17166              <access>read-write</access>
17167              <enumeratedValues>
17168                <enumeratedValue>
17169                  <name>0</name>
17170                  <description>The DMA request signal for the corresponding channel is disabled</description>
17171                  <value>#0</value>
17172                </enumeratedValue>
17173                <enumeratedValue>
17174                  <name>1</name>
17175                  <description>The DMA request signal for the corresponding channel is enabled</description>
17176                  <value>#1</value>
17177                </enumeratedValue>
17178              </enumeratedValues>
17179            </field>
17180            <field>
17181              <name>ERQ9</name>
17182              <description>Enable DMA Request 9</description>
17183              <bitOffset>9</bitOffset>
17184              <bitWidth>1</bitWidth>
17185              <access>read-write</access>
17186              <enumeratedValues>
17187                <enumeratedValue>
17188                  <name>0</name>
17189                  <description>The DMA request signal for the corresponding channel is disabled</description>
17190                  <value>#0</value>
17191                </enumeratedValue>
17192                <enumeratedValue>
17193                  <name>1</name>
17194                  <description>The DMA request signal for the corresponding channel is enabled</description>
17195                  <value>#1</value>
17196                </enumeratedValue>
17197              </enumeratedValues>
17198            </field>
17199            <field>
17200              <name>ERQ10</name>
17201              <description>Enable DMA Request 10</description>
17202              <bitOffset>10</bitOffset>
17203              <bitWidth>1</bitWidth>
17204              <access>read-write</access>
17205              <enumeratedValues>
17206                <enumeratedValue>
17207                  <name>0</name>
17208                  <description>The DMA request signal for the corresponding channel is disabled</description>
17209                  <value>#0</value>
17210                </enumeratedValue>
17211                <enumeratedValue>
17212                  <name>1</name>
17213                  <description>The DMA request signal for the corresponding channel is enabled</description>
17214                  <value>#1</value>
17215                </enumeratedValue>
17216              </enumeratedValues>
17217            </field>
17218            <field>
17219              <name>ERQ11</name>
17220              <description>Enable DMA Request 11</description>
17221              <bitOffset>11</bitOffset>
17222              <bitWidth>1</bitWidth>
17223              <access>read-write</access>
17224              <enumeratedValues>
17225                <enumeratedValue>
17226                  <name>0</name>
17227                  <description>The DMA request signal for the corresponding channel is disabled</description>
17228                  <value>#0</value>
17229                </enumeratedValue>
17230                <enumeratedValue>
17231                  <name>1</name>
17232                  <description>The DMA request signal for the corresponding channel is enabled</description>
17233                  <value>#1</value>
17234                </enumeratedValue>
17235              </enumeratedValues>
17236            </field>
17237            <field>
17238              <name>ERQ12</name>
17239              <description>Enable DMA Request 12</description>
17240              <bitOffset>12</bitOffset>
17241              <bitWidth>1</bitWidth>
17242              <access>read-write</access>
17243              <enumeratedValues>
17244                <enumeratedValue>
17245                  <name>0</name>
17246                  <description>The DMA request signal for the corresponding channel is disabled</description>
17247                  <value>#0</value>
17248                </enumeratedValue>
17249                <enumeratedValue>
17250                  <name>1</name>
17251                  <description>The DMA request signal for the corresponding channel is enabled</description>
17252                  <value>#1</value>
17253                </enumeratedValue>
17254              </enumeratedValues>
17255            </field>
17256            <field>
17257              <name>ERQ13</name>
17258              <description>Enable DMA Request 13</description>
17259              <bitOffset>13</bitOffset>
17260              <bitWidth>1</bitWidth>
17261              <access>read-write</access>
17262              <enumeratedValues>
17263                <enumeratedValue>
17264                  <name>0</name>
17265                  <description>The DMA request signal for the corresponding channel is disabled</description>
17266                  <value>#0</value>
17267                </enumeratedValue>
17268                <enumeratedValue>
17269                  <name>1</name>
17270                  <description>The DMA request signal for the corresponding channel is enabled</description>
17271                  <value>#1</value>
17272                </enumeratedValue>
17273              </enumeratedValues>
17274            </field>
17275            <field>
17276              <name>ERQ14</name>
17277              <description>Enable DMA Request 14</description>
17278              <bitOffset>14</bitOffset>
17279              <bitWidth>1</bitWidth>
17280              <access>read-write</access>
17281              <enumeratedValues>
17282                <enumeratedValue>
17283                  <name>0</name>
17284                  <description>The DMA request signal for the corresponding channel is disabled</description>
17285                  <value>#0</value>
17286                </enumeratedValue>
17287                <enumeratedValue>
17288                  <name>1</name>
17289                  <description>The DMA request signal for the corresponding channel is enabled</description>
17290                  <value>#1</value>
17291                </enumeratedValue>
17292              </enumeratedValues>
17293            </field>
17294            <field>
17295              <name>ERQ15</name>
17296              <description>Enable DMA Request 15</description>
17297              <bitOffset>15</bitOffset>
17298              <bitWidth>1</bitWidth>
17299              <access>read-write</access>
17300              <enumeratedValues>
17301                <enumeratedValue>
17302                  <name>0</name>
17303                  <description>The DMA request signal for the corresponding channel is disabled</description>
17304                  <value>#0</value>
17305                </enumeratedValue>
17306                <enumeratedValue>
17307                  <name>1</name>
17308                  <description>The DMA request signal for the corresponding channel is enabled</description>
17309                  <value>#1</value>
17310                </enumeratedValue>
17311              </enumeratedValues>
17312            </field>
17313            <field>
17314              <name>ERQ16</name>
17315              <description>Enable DMA Request 16</description>
17316              <bitOffset>16</bitOffset>
17317              <bitWidth>1</bitWidth>
17318              <access>read-write</access>
17319              <enumeratedValues>
17320                <enumeratedValue>
17321                  <name>0</name>
17322                  <description>The DMA request signal for the corresponding channel is disabled</description>
17323                  <value>#0</value>
17324                </enumeratedValue>
17325                <enumeratedValue>
17326                  <name>1</name>
17327                  <description>The DMA request signal for the corresponding channel is enabled</description>
17328                  <value>#1</value>
17329                </enumeratedValue>
17330              </enumeratedValues>
17331            </field>
17332            <field>
17333              <name>ERQ17</name>
17334              <description>Enable DMA Request 17</description>
17335              <bitOffset>17</bitOffset>
17336              <bitWidth>1</bitWidth>
17337              <access>read-write</access>
17338              <enumeratedValues>
17339                <enumeratedValue>
17340                  <name>0</name>
17341                  <description>The DMA request signal for the corresponding channel is disabled</description>
17342                  <value>#0</value>
17343                </enumeratedValue>
17344                <enumeratedValue>
17345                  <name>1</name>
17346                  <description>The DMA request signal for the corresponding channel is enabled</description>
17347                  <value>#1</value>
17348                </enumeratedValue>
17349              </enumeratedValues>
17350            </field>
17351            <field>
17352              <name>ERQ18</name>
17353              <description>Enable DMA Request 18</description>
17354              <bitOffset>18</bitOffset>
17355              <bitWidth>1</bitWidth>
17356              <access>read-write</access>
17357              <enumeratedValues>
17358                <enumeratedValue>
17359                  <name>0</name>
17360                  <description>The DMA request signal for the corresponding channel is disabled</description>
17361                  <value>#0</value>
17362                </enumeratedValue>
17363                <enumeratedValue>
17364                  <name>1</name>
17365                  <description>The DMA request signal for the corresponding channel is enabled</description>
17366                  <value>#1</value>
17367                </enumeratedValue>
17368              </enumeratedValues>
17369            </field>
17370            <field>
17371              <name>ERQ19</name>
17372              <description>Enable DMA Request 19</description>
17373              <bitOffset>19</bitOffset>
17374              <bitWidth>1</bitWidth>
17375              <access>read-write</access>
17376              <enumeratedValues>
17377                <enumeratedValue>
17378                  <name>0</name>
17379                  <description>The DMA request signal for the corresponding channel is disabled</description>
17380                  <value>#0</value>
17381                </enumeratedValue>
17382                <enumeratedValue>
17383                  <name>1</name>
17384                  <description>The DMA request signal for the corresponding channel is enabled</description>
17385                  <value>#1</value>
17386                </enumeratedValue>
17387              </enumeratedValues>
17388            </field>
17389            <field>
17390              <name>ERQ20</name>
17391              <description>Enable DMA Request 20</description>
17392              <bitOffset>20</bitOffset>
17393              <bitWidth>1</bitWidth>
17394              <access>read-write</access>
17395              <enumeratedValues>
17396                <enumeratedValue>
17397                  <name>0</name>
17398                  <description>The DMA request signal for the corresponding channel is disabled</description>
17399                  <value>#0</value>
17400                </enumeratedValue>
17401                <enumeratedValue>
17402                  <name>1</name>
17403                  <description>The DMA request signal for the corresponding channel is enabled</description>
17404                  <value>#1</value>
17405                </enumeratedValue>
17406              </enumeratedValues>
17407            </field>
17408            <field>
17409              <name>ERQ21</name>
17410              <description>Enable DMA Request 21</description>
17411              <bitOffset>21</bitOffset>
17412              <bitWidth>1</bitWidth>
17413              <access>read-write</access>
17414              <enumeratedValues>
17415                <enumeratedValue>
17416                  <name>0</name>
17417                  <description>The DMA request signal for the corresponding channel is disabled</description>
17418                  <value>#0</value>
17419                </enumeratedValue>
17420                <enumeratedValue>
17421                  <name>1</name>
17422                  <description>The DMA request signal for the corresponding channel is enabled</description>
17423                  <value>#1</value>
17424                </enumeratedValue>
17425              </enumeratedValues>
17426            </field>
17427            <field>
17428              <name>ERQ22</name>
17429              <description>Enable DMA Request 22</description>
17430              <bitOffset>22</bitOffset>
17431              <bitWidth>1</bitWidth>
17432              <access>read-write</access>
17433              <enumeratedValues>
17434                <enumeratedValue>
17435                  <name>0</name>
17436                  <description>The DMA request signal for the corresponding channel is disabled</description>
17437                  <value>#0</value>
17438                </enumeratedValue>
17439                <enumeratedValue>
17440                  <name>1</name>
17441                  <description>The DMA request signal for the corresponding channel is enabled</description>
17442                  <value>#1</value>
17443                </enumeratedValue>
17444              </enumeratedValues>
17445            </field>
17446            <field>
17447              <name>ERQ23</name>
17448              <description>Enable DMA Request 23</description>
17449              <bitOffset>23</bitOffset>
17450              <bitWidth>1</bitWidth>
17451              <access>read-write</access>
17452              <enumeratedValues>
17453                <enumeratedValue>
17454                  <name>0</name>
17455                  <description>The DMA request signal for the corresponding channel is disabled</description>
17456                  <value>#0</value>
17457                </enumeratedValue>
17458                <enumeratedValue>
17459                  <name>1</name>
17460                  <description>The DMA request signal for the corresponding channel is enabled</description>
17461                  <value>#1</value>
17462                </enumeratedValue>
17463              </enumeratedValues>
17464            </field>
17465            <field>
17466              <name>ERQ24</name>
17467              <description>Enable DMA Request 24</description>
17468              <bitOffset>24</bitOffset>
17469              <bitWidth>1</bitWidth>
17470              <access>read-write</access>
17471              <enumeratedValues>
17472                <enumeratedValue>
17473                  <name>0</name>
17474                  <description>The DMA request signal for the corresponding channel is disabled</description>
17475                  <value>#0</value>
17476                </enumeratedValue>
17477                <enumeratedValue>
17478                  <name>1</name>
17479                  <description>The DMA request signal for the corresponding channel is enabled</description>
17480                  <value>#1</value>
17481                </enumeratedValue>
17482              </enumeratedValues>
17483            </field>
17484            <field>
17485              <name>ERQ25</name>
17486              <description>Enable DMA Request 25</description>
17487              <bitOffset>25</bitOffset>
17488              <bitWidth>1</bitWidth>
17489              <access>read-write</access>
17490              <enumeratedValues>
17491                <enumeratedValue>
17492                  <name>0</name>
17493                  <description>The DMA request signal for the corresponding channel is disabled</description>
17494                  <value>#0</value>
17495                </enumeratedValue>
17496                <enumeratedValue>
17497                  <name>1</name>
17498                  <description>The DMA request signal for the corresponding channel is enabled</description>
17499                  <value>#1</value>
17500                </enumeratedValue>
17501              </enumeratedValues>
17502            </field>
17503            <field>
17504              <name>ERQ26</name>
17505              <description>Enable DMA Request 26</description>
17506              <bitOffset>26</bitOffset>
17507              <bitWidth>1</bitWidth>
17508              <access>read-write</access>
17509              <enumeratedValues>
17510                <enumeratedValue>
17511                  <name>0</name>
17512                  <description>The DMA request signal for the corresponding channel is disabled</description>
17513                  <value>#0</value>
17514                </enumeratedValue>
17515                <enumeratedValue>
17516                  <name>1</name>
17517                  <description>The DMA request signal for the corresponding channel is enabled</description>
17518                  <value>#1</value>
17519                </enumeratedValue>
17520              </enumeratedValues>
17521            </field>
17522            <field>
17523              <name>ERQ27</name>
17524              <description>Enable DMA Request 27</description>
17525              <bitOffset>27</bitOffset>
17526              <bitWidth>1</bitWidth>
17527              <access>read-write</access>
17528              <enumeratedValues>
17529                <enumeratedValue>
17530                  <name>0</name>
17531                  <description>The DMA request signal for the corresponding channel is disabled</description>
17532                  <value>#0</value>
17533                </enumeratedValue>
17534                <enumeratedValue>
17535                  <name>1</name>
17536                  <description>The DMA request signal for the corresponding channel is enabled</description>
17537                  <value>#1</value>
17538                </enumeratedValue>
17539              </enumeratedValues>
17540            </field>
17541            <field>
17542              <name>ERQ28</name>
17543              <description>Enable DMA Request 28</description>
17544              <bitOffset>28</bitOffset>
17545              <bitWidth>1</bitWidth>
17546              <access>read-write</access>
17547              <enumeratedValues>
17548                <enumeratedValue>
17549                  <name>0</name>
17550                  <description>The DMA request signal for the corresponding channel is disabled</description>
17551                  <value>#0</value>
17552                </enumeratedValue>
17553                <enumeratedValue>
17554                  <name>1</name>
17555                  <description>The DMA request signal for the corresponding channel is enabled</description>
17556                  <value>#1</value>
17557                </enumeratedValue>
17558              </enumeratedValues>
17559            </field>
17560            <field>
17561              <name>ERQ29</name>
17562              <description>Enable DMA Request 29</description>
17563              <bitOffset>29</bitOffset>
17564              <bitWidth>1</bitWidth>
17565              <access>read-write</access>
17566              <enumeratedValues>
17567                <enumeratedValue>
17568                  <name>0</name>
17569                  <description>The DMA request signal for the corresponding channel is disabled</description>
17570                  <value>#0</value>
17571                </enumeratedValue>
17572                <enumeratedValue>
17573                  <name>1</name>
17574                  <description>The DMA request signal for the corresponding channel is enabled</description>
17575                  <value>#1</value>
17576                </enumeratedValue>
17577              </enumeratedValues>
17578            </field>
17579            <field>
17580              <name>ERQ30</name>
17581              <description>Enable DMA Request 30</description>
17582              <bitOffset>30</bitOffset>
17583              <bitWidth>1</bitWidth>
17584              <access>read-write</access>
17585              <enumeratedValues>
17586                <enumeratedValue>
17587                  <name>0</name>
17588                  <description>The DMA request signal for the corresponding channel is disabled</description>
17589                  <value>#0</value>
17590                </enumeratedValue>
17591                <enumeratedValue>
17592                  <name>1</name>
17593                  <description>The DMA request signal for the corresponding channel is enabled</description>
17594                  <value>#1</value>
17595                </enumeratedValue>
17596              </enumeratedValues>
17597            </field>
17598            <field>
17599              <name>ERQ31</name>
17600              <description>Enable DMA Request 31</description>
17601              <bitOffset>31</bitOffset>
17602              <bitWidth>1</bitWidth>
17603              <access>read-write</access>
17604              <enumeratedValues>
17605                <enumeratedValue>
17606                  <name>0</name>
17607                  <description>The DMA request signal for the corresponding channel is disabled</description>
17608                  <value>#0</value>
17609                </enumeratedValue>
17610                <enumeratedValue>
17611                  <name>1</name>
17612                  <description>The DMA request signal for the corresponding channel is enabled</description>
17613                  <value>#1</value>
17614                </enumeratedValue>
17615              </enumeratedValues>
17616            </field>
17617          </fields>
17618        </register>
17619        <register>
17620          <name>EEI</name>
17621          <description>Enable Error Interrupt Register</description>
17622          <addressOffset>0x14</addressOffset>
17623          <size>32</size>
17624          <access>read-write</access>
17625          <resetValue>0</resetValue>
17626          <resetMask>0xFFFFFFFF</resetMask>
17627          <fields>
17628            <field>
17629              <name>EEI0</name>
17630              <description>Enable Error Interrupt 0</description>
17631              <bitOffset>0</bitOffset>
17632              <bitWidth>1</bitWidth>
17633              <access>read-write</access>
17634              <enumeratedValues>
17635                <enumeratedValue>
17636                  <name>0</name>
17637                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17638                  <value>#0</value>
17639                </enumeratedValue>
17640                <enumeratedValue>
17641                  <name>1</name>
17642                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17643                  <value>#1</value>
17644                </enumeratedValue>
17645              </enumeratedValues>
17646            </field>
17647            <field>
17648              <name>EEI1</name>
17649              <description>Enable Error Interrupt 1</description>
17650              <bitOffset>1</bitOffset>
17651              <bitWidth>1</bitWidth>
17652              <access>read-write</access>
17653              <enumeratedValues>
17654                <enumeratedValue>
17655                  <name>0</name>
17656                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17657                  <value>#0</value>
17658                </enumeratedValue>
17659                <enumeratedValue>
17660                  <name>1</name>
17661                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17662                  <value>#1</value>
17663                </enumeratedValue>
17664              </enumeratedValues>
17665            </field>
17666            <field>
17667              <name>EEI2</name>
17668              <description>Enable Error Interrupt 2</description>
17669              <bitOffset>2</bitOffset>
17670              <bitWidth>1</bitWidth>
17671              <access>read-write</access>
17672              <enumeratedValues>
17673                <enumeratedValue>
17674                  <name>0</name>
17675                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17676                  <value>#0</value>
17677                </enumeratedValue>
17678                <enumeratedValue>
17679                  <name>1</name>
17680                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17681                  <value>#1</value>
17682                </enumeratedValue>
17683              </enumeratedValues>
17684            </field>
17685            <field>
17686              <name>EEI3</name>
17687              <description>Enable Error Interrupt 3</description>
17688              <bitOffset>3</bitOffset>
17689              <bitWidth>1</bitWidth>
17690              <access>read-write</access>
17691              <enumeratedValues>
17692                <enumeratedValue>
17693                  <name>0</name>
17694                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17695                  <value>#0</value>
17696                </enumeratedValue>
17697                <enumeratedValue>
17698                  <name>1</name>
17699                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17700                  <value>#1</value>
17701                </enumeratedValue>
17702              </enumeratedValues>
17703            </field>
17704            <field>
17705              <name>EEI4</name>
17706              <description>Enable Error Interrupt 4</description>
17707              <bitOffset>4</bitOffset>
17708              <bitWidth>1</bitWidth>
17709              <access>read-write</access>
17710              <enumeratedValues>
17711                <enumeratedValue>
17712                  <name>0</name>
17713                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17714                  <value>#0</value>
17715                </enumeratedValue>
17716                <enumeratedValue>
17717                  <name>1</name>
17718                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17719                  <value>#1</value>
17720                </enumeratedValue>
17721              </enumeratedValues>
17722            </field>
17723            <field>
17724              <name>EEI5</name>
17725              <description>Enable Error Interrupt 5</description>
17726              <bitOffset>5</bitOffset>
17727              <bitWidth>1</bitWidth>
17728              <access>read-write</access>
17729              <enumeratedValues>
17730                <enumeratedValue>
17731                  <name>0</name>
17732                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17733                  <value>#0</value>
17734                </enumeratedValue>
17735                <enumeratedValue>
17736                  <name>1</name>
17737                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17738                  <value>#1</value>
17739                </enumeratedValue>
17740              </enumeratedValues>
17741            </field>
17742            <field>
17743              <name>EEI6</name>
17744              <description>Enable Error Interrupt 6</description>
17745              <bitOffset>6</bitOffset>
17746              <bitWidth>1</bitWidth>
17747              <access>read-write</access>
17748              <enumeratedValues>
17749                <enumeratedValue>
17750                  <name>0</name>
17751                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17752                  <value>#0</value>
17753                </enumeratedValue>
17754                <enumeratedValue>
17755                  <name>1</name>
17756                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17757                  <value>#1</value>
17758                </enumeratedValue>
17759              </enumeratedValues>
17760            </field>
17761            <field>
17762              <name>EEI7</name>
17763              <description>Enable Error Interrupt 7</description>
17764              <bitOffset>7</bitOffset>
17765              <bitWidth>1</bitWidth>
17766              <access>read-write</access>
17767              <enumeratedValues>
17768                <enumeratedValue>
17769                  <name>0</name>
17770                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17771                  <value>#0</value>
17772                </enumeratedValue>
17773                <enumeratedValue>
17774                  <name>1</name>
17775                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17776                  <value>#1</value>
17777                </enumeratedValue>
17778              </enumeratedValues>
17779            </field>
17780            <field>
17781              <name>EEI8</name>
17782              <description>Enable Error Interrupt 8</description>
17783              <bitOffset>8</bitOffset>
17784              <bitWidth>1</bitWidth>
17785              <access>read-write</access>
17786              <enumeratedValues>
17787                <enumeratedValue>
17788                  <name>0</name>
17789                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17790                  <value>#0</value>
17791                </enumeratedValue>
17792                <enumeratedValue>
17793                  <name>1</name>
17794                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17795                  <value>#1</value>
17796                </enumeratedValue>
17797              </enumeratedValues>
17798            </field>
17799            <field>
17800              <name>EEI9</name>
17801              <description>Enable Error Interrupt 9</description>
17802              <bitOffset>9</bitOffset>
17803              <bitWidth>1</bitWidth>
17804              <access>read-write</access>
17805              <enumeratedValues>
17806                <enumeratedValue>
17807                  <name>0</name>
17808                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17809                  <value>#0</value>
17810                </enumeratedValue>
17811                <enumeratedValue>
17812                  <name>1</name>
17813                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17814                  <value>#1</value>
17815                </enumeratedValue>
17816              </enumeratedValues>
17817            </field>
17818            <field>
17819              <name>EEI10</name>
17820              <description>Enable Error Interrupt 10</description>
17821              <bitOffset>10</bitOffset>
17822              <bitWidth>1</bitWidth>
17823              <access>read-write</access>
17824              <enumeratedValues>
17825                <enumeratedValue>
17826                  <name>0</name>
17827                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17828                  <value>#0</value>
17829                </enumeratedValue>
17830                <enumeratedValue>
17831                  <name>1</name>
17832                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17833                  <value>#1</value>
17834                </enumeratedValue>
17835              </enumeratedValues>
17836            </field>
17837            <field>
17838              <name>EEI11</name>
17839              <description>Enable Error Interrupt 11</description>
17840              <bitOffset>11</bitOffset>
17841              <bitWidth>1</bitWidth>
17842              <access>read-write</access>
17843              <enumeratedValues>
17844                <enumeratedValue>
17845                  <name>0</name>
17846                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17847                  <value>#0</value>
17848                </enumeratedValue>
17849                <enumeratedValue>
17850                  <name>1</name>
17851                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17852                  <value>#1</value>
17853                </enumeratedValue>
17854              </enumeratedValues>
17855            </field>
17856            <field>
17857              <name>EEI12</name>
17858              <description>Enable Error Interrupt 12</description>
17859              <bitOffset>12</bitOffset>
17860              <bitWidth>1</bitWidth>
17861              <access>read-write</access>
17862              <enumeratedValues>
17863                <enumeratedValue>
17864                  <name>0</name>
17865                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17866                  <value>#0</value>
17867                </enumeratedValue>
17868                <enumeratedValue>
17869                  <name>1</name>
17870                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17871                  <value>#1</value>
17872                </enumeratedValue>
17873              </enumeratedValues>
17874            </field>
17875            <field>
17876              <name>EEI13</name>
17877              <description>Enable Error Interrupt 13</description>
17878              <bitOffset>13</bitOffset>
17879              <bitWidth>1</bitWidth>
17880              <access>read-write</access>
17881              <enumeratedValues>
17882                <enumeratedValue>
17883                  <name>0</name>
17884                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17885                  <value>#0</value>
17886                </enumeratedValue>
17887                <enumeratedValue>
17888                  <name>1</name>
17889                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17890                  <value>#1</value>
17891                </enumeratedValue>
17892              </enumeratedValues>
17893            </field>
17894            <field>
17895              <name>EEI14</name>
17896              <description>Enable Error Interrupt 14</description>
17897              <bitOffset>14</bitOffset>
17898              <bitWidth>1</bitWidth>
17899              <access>read-write</access>
17900              <enumeratedValues>
17901                <enumeratedValue>
17902                  <name>0</name>
17903                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17904                  <value>#0</value>
17905                </enumeratedValue>
17906                <enumeratedValue>
17907                  <name>1</name>
17908                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17909                  <value>#1</value>
17910                </enumeratedValue>
17911              </enumeratedValues>
17912            </field>
17913            <field>
17914              <name>EEI15</name>
17915              <description>Enable Error Interrupt 15</description>
17916              <bitOffset>15</bitOffset>
17917              <bitWidth>1</bitWidth>
17918              <access>read-write</access>
17919              <enumeratedValues>
17920                <enumeratedValue>
17921                  <name>0</name>
17922                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17923                  <value>#0</value>
17924                </enumeratedValue>
17925                <enumeratedValue>
17926                  <name>1</name>
17927                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17928                  <value>#1</value>
17929                </enumeratedValue>
17930              </enumeratedValues>
17931            </field>
17932            <field>
17933              <name>EEI16</name>
17934              <description>Enable Error Interrupt 16</description>
17935              <bitOffset>16</bitOffset>
17936              <bitWidth>1</bitWidth>
17937              <access>read-write</access>
17938              <enumeratedValues>
17939                <enumeratedValue>
17940                  <name>0</name>
17941                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17942                  <value>#0</value>
17943                </enumeratedValue>
17944                <enumeratedValue>
17945                  <name>1</name>
17946                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17947                  <value>#1</value>
17948                </enumeratedValue>
17949              </enumeratedValues>
17950            </field>
17951            <field>
17952              <name>EEI17</name>
17953              <description>Enable Error Interrupt 17</description>
17954              <bitOffset>17</bitOffset>
17955              <bitWidth>1</bitWidth>
17956              <access>read-write</access>
17957              <enumeratedValues>
17958                <enumeratedValue>
17959                  <name>0</name>
17960                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17961                  <value>#0</value>
17962                </enumeratedValue>
17963                <enumeratedValue>
17964                  <name>1</name>
17965                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17966                  <value>#1</value>
17967                </enumeratedValue>
17968              </enumeratedValues>
17969            </field>
17970            <field>
17971              <name>EEI18</name>
17972              <description>Enable Error Interrupt 18</description>
17973              <bitOffset>18</bitOffset>
17974              <bitWidth>1</bitWidth>
17975              <access>read-write</access>
17976              <enumeratedValues>
17977                <enumeratedValue>
17978                  <name>0</name>
17979                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17980                  <value>#0</value>
17981                </enumeratedValue>
17982                <enumeratedValue>
17983                  <name>1</name>
17984                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
17985                  <value>#1</value>
17986                </enumeratedValue>
17987              </enumeratedValues>
17988            </field>
17989            <field>
17990              <name>EEI19</name>
17991              <description>Enable Error Interrupt 19</description>
17992              <bitOffset>19</bitOffset>
17993              <bitWidth>1</bitWidth>
17994              <access>read-write</access>
17995              <enumeratedValues>
17996                <enumeratedValue>
17997                  <name>0</name>
17998                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
17999                  <value>#0</value>
18000                </enumeratedValue>
18001                <enumeratedValue>
18002                  <name>1</name>
18003                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18004                  <value>#1</value>
18005                </enumeratedValue>
18006              </enumeratedValues>
18007            </field>
18008            <field>
18009              <name>EEI20</name>
18010              <description>Enable Error Interrupt 20</description>
18011              <bitOffset>20</bitOffset>
18012              <bitWidth>1</bitWidth>
18013              <access>read-write</access>
18014              <enumeratedValues>
18015                <enumeratedValue>
18016                  <name>0</name>
18017                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
18018                  <value>#0</value>
18019                </enumeratedValue>
18020                <enumeratedValue>
18021                  <name>1</name>
18022                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18023                  <value>#1</value>
18024                </enumeratedValue>
18025              </enumeratedValues>
18026            </field>
18027            <field>
18028              <name>EEI21</name>
18029              <description>Enable Error Interrupt 21</description>
18030              <bitOffset>21</bitOffset>
18031              <bitWidth>1</bitWidth>
18032              <access>read-write</access>
18033              <enumeratedValues>
18034                <enumeratedValue>
18035                  <name>0</name>
18036                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
18037                  <value>#0</value>
18038                </enumeratedValue>
18039                <enumeratedValue>
18040                  <name>1</name>
18041                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18042                  <value>#1</value>
18043                </enumeratedValue>
18044              </enumeratedValues>
18045            </field>
18046            <field>
18047              <name>EEI22</name>
18048              <description>Enable Error Interrupt 22</description>
18049              <bitOffset>22</bitOffset>
18050              <bitWidth>1</bitWidth>
18051              <access>read-write</access>
18052              <enumeratedValues>
18053                <enumeratedValue>
18054                  <name>0</name>
18055                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
18056                  <value>#0</value>
18057                </enumeratedValue>
18058                <enumeratedValue>
18059                  <name>1</name>
18060                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18061                  <value>#1</value>
18062                </enumeratedValue>
18063              </enumeratedValues>
18064            </field>
18065            <field>
18066              <name>EEI23</name>
18067              <description>Enable Error Interrupt 23</description>
18068              <bitOffset>23</bitOffset>
18069              <bitWidth>1</bitWidth>
18070              <access>read-write</access>
18071              <enumeratedValues>
18072                <enumeratedValue>
18073                  <name>0</name>
18074                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
18075                  <value>#0</value>
18076                </enumeratedValue>
18077                <enumeratedValue>
18078                  <name>1</name>
18079                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18080                  <value>#1</value>
18081                </enumeratedValue>
18082              </enumeratedValues>
18083            </field>
18084            <field>
18085              <name>EEI24</name>
18086              <description>Enable Error Interrupt 24</description>
18087              <bitOffset>24</bitOffset>
18088              <bitWidth>1</bitWidth>
18089              <access>read-write</access>
18090              <enumeratedValues>
18091                <enumeratedValue>
18092                  <name>0</name>
18093                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
18094                  <value>#0</value>
18095                </enumeratedValue>
18096                <enumeratedValue>
18097                  <name>1</name>
18098                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18099                  <value>#1</value>
18100                </enumeratedValue>
18101              </enumeratedValues>
18102            </field>
18103            <field>
18104              <name>EEI25</name>
18105              <description>Enable Error Interrupt 25</description>
18106              <bitOffset>25</bitOffset>
18107              <bitWidth>1</bitWidth>
18108              <access>read-write</access>
18109              <enumeratedValues>
18110                <enumeratedValue>
18111                  <name>0</name>
18112                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
18113                  <value>#0</value>
18114                </enumeratedValue>
18115                <enumeratedValue>
18116                  <name>1</name>
18117                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18118                  <value>#1</value>
18119                </enumeratedValue>
18120              </enumeratedValues>
18121            </field>
18122            <field>
18123              <name>EEI26</name>
18124              <description>Enable Error Interrupt 26</description>
18125              <bitOffset>26</bitOffset>
18126              <bitWidth>1</bitWidth>
18127              <access>read-write</access>
18128              <enumeratedValues>
18129                <enumeratedValue>
18130                  <name>0</name>
18131                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
18132                  <value>#0</value>
18133                </enumeratedValue>
18134                <enumeratedValue>
18135                  <name>1</name>
18136                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18137                  <value>#1</value>
18138                </enumeratedValue>
18139              </enumeratedValues>
18140            </field>
18141            <field>
18142              <name>EEI27</name>
18143              <description>Enable Error Interrupt 27</description>
18144              <bitOffset>27</bitOffset>
18145              <bitWidth>1</bitWidth>
18146              <access>read-write</access>
18147              <enumeratedValues>
18148                <enumeratedValue>
18149                  <name>0</name>
18150                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
18151                  <value>#0</value>
18152                </enumeratedValue>
18153                <enumeratedValue>
18154                  <name>1</name>
18155                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18156                  <value>#1</value>
18157                </enumeratedValue>
18158              </enumeratedValues>
18159            </field>
18160            <field>
18161              <name>EEI28</name>
18162              <description>Enable Error Interrupt 28</description>
18163              <bitOffset>28</bitOffset>
18164              <bitWidth>1</bitWidth>
18165              <access>read-write</access>
18166              <enumeratedValues>
18167                <enumeratedValue>
18168                  <name>0</name>
18169                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
18170                  <value>#0</value>
18171                </enumeratedValue>
18172                <enumeratedValue>
18173                  <name>1</name>
18174                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18175                  <value>#1</value>
18176                </enumeratedValue>
18177              </enumeratedValues>
18178            </field>
18179            <field>
18180              <name>EEI29</name>
18181              <description>Enable Error Interrupt 29</description>
18182              <bitOffset>29</bitOffset>
18183              <bitWidth>1</bitWidth>
18184              <access>read-write</access>
18185              <enumeratedValues>
18186                <enumeratedValue>
18187                  <name>0</name>
18188                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
18189                  <value>#0</value>
18190                </enumeratedValue>
18191                <enumeratedValue>
18192                  <name>1</name>
18193                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18194                  <value>#1</value>
18195                </enumeratedValue>
18196              </enumeratedValues>
18197            </field>
18198            <field>
18199              <name>EEI30</name>
18200              <description>Enable Error Interrupt 30</description>
18201              <bitOffset>30</bitOffset>
18202              <bitWidth>1</bitWidth>
18203              <access>read-write</access>
18204              <enumeratedValues>
18205                <enumeratedValue>
18206                  <name>0</name>
18207                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
18208                  <value>#0</value>
18209                </enumeratedValue>
18210                <enumeratedValue>
18211                  <name>1</name>
18212                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18213                  <value>#1</value>
18214                </enumeratedValue>
18215              </enumeratedValues>
18216            </field>
18217            <field>
18218              <name>EEI31</name>
18219              <description>Enable Error Interrupt 31</description>
18220              <bitOffset>31</bitOffset>
18221              <bitWidth>1</bitWidth>
18222              <access>read-write</access>
18223              <enumeratedValues>
18224                <enumeratedValue>
18225                  <name>0</name>
18226                  <description>The error signal for corresponding channel does not generate an error interrupt</description>
18227                  <value>#0</value>
18228                </enumeratedValue>
18229                <enumeratedValue>
18230                  <name>1</name>
18231                  <description>The assertion of the error signal for corresponding channel generates an error interrupt request</description>
18232                  <value>#1</value>
18233                </enumeratedValue>
18234              </enumeratedValues>
18235            </field>
18236          </fields>
18237        </register>
18238        <register>
18239          <name>CEEI</name>
18240          <description>Clear Enable Error Interrupt Register</description>
18241          <addressOffset>0x18</addressOffset>
18242          <size>8</size>
18243          <access>write-only</access>
18244          <resetValue>0</resetValue>
18245          <resetMask>0xFF</resetMask>
18246          <fields>
18247            <field>
18248              <name>CEEI</name>
18249              <description>Clear Enable Error Interrupt</description>
18250              <bitOffset>0</bitOffset>
18251              <bitWidth>5</bitWidth>
18252              <access>write-only</access>
18253            </field>
18254            <field>
18255              <name>CAEE</name>
18256              <description>Clear All Enable Error Interrupts</description>
18257              <bitOffset>6</bitOffset>
18258              <bitWidth>1</bitWidth>
18259              <access>write-only</access>
18260              <enumeratedValues>
18261                <enumeratedValue>
18262                  <name>0</name>
18263                  <description>Clear only the EEI bit specified in the CEEI field</description>
18264                  <value>#0</value>
18265                </enumeratedValue>
18266                <enumeratedValue>
18267                  <name>1</name>
18268                  <description>Clear all bits in EEI</description>
18269                  <value>#1</value>
18270                </enumeratedValue>
18271              </enumeratedValues>
18272            </field>
18273            <field>
18274              <name>NOP</name>
18275              <description>No Op enable</description>
18276              <bitOffset>7</bitOffset>
18277              <bitWidth>1</bitWidth>
18278              <access>write-only</access>
18279              <enumeratedValues>
18280                <enumeratedValue>
18281                  <name>0</name>
18282                  <description>Normal operation</description>
18283                  <value>#0</value>
18284                </enumeratedValue>
18285                <enumeratedValue>
18286                  <name>1</name>
18287                  <description>No operation, ignore the other bits in this register</description>
18288                  <value>#1</value>
18289                </enumeratedValue>
18290              </enumeratedValues>
18291            </field>
18292          </fields>
18293        </register>
18294        <register>
18295          <name>SEEI</name>
18296          <description>Set Enable Error Interrupt Register</description>
18297          <addressOffset>0x19</addressOffset>
18298          <size>8</size>
18299          <access>write-only</access>
18300          <resetValue>0</resetValue>
18301          <resetMask>0xFF</resetMask>
18302          <fields>
18303            <field>
18304              <name>SEEI</name>
18305              <description>Set Enable Error Interrupt</description>
18306              <bitOffset>0</bitOffset>
18307              <bitWidth>5</bitWidth>
18308              <access>write-only</access>
18309            </field>
18310            <field>
18311              <name>SAEE</name>
18312              <description>Sets All Enable Error Interrupts</description>
18313              <bitOffset>6</bitOffset>
18314              <bitWidth>1</bitWidth>
18315              <access>write-only</access>
18316              <enumeratedValues>
18317                <enumeratedValue>
18318                  <name>0</name>
18319                  <description>Set only the EEI bit specified in the SEEI field.</description>
18320                  <value>#0</value>
18321                </enumeratedValue>
18322                <enumeratedValue>
18323                  <name>1</name>
18324                  <description>Sets all bits in EEI</description>
18325                  <value>#1</value>
18326                </enumeratedValue>
18327              </enumeratedValues>
18328            </field>
18329            <field>
18330              <name>NOP</name>
18331              <description>No Op enable</description>
18332              <bitOffset>7</bitOffset>
18333              <bitWidth>1</bitWidth>
18334              <access>write-only</access>
18335              <enumeratedValues>
18336                <enumeratedValue>
18337                  <name>0</name>
18338                  <description>Normal operation</description>
18339                  <value>#0</value>
18340                </enumeratedValue>
18341                <enumeratedValue>
18342                  <name>1</name>
18343                  <description>No operation, ignore the other bits in this register</description>
18344                  <value>#1</value>
18345                </enumeratedValue>
18346              </enumeratedValues>
18347            </field>
18348          </fields>
18349        </register>
18350        <register>
18351          <name>CERQ</name>
18352          <description>Clear Enable Request Register</description>
18353          <addressOffset>0x1A</addressOffset>
18354          <size>8</size>
18355          <access>write-only</access>
18356          <resetValue>0</resetValue>
18357          <resetMask>0xFF</resetMask>
18358          <fields>
18359            <field>
18360              <name>CERQ</name>
18361              <description>Clear Enable Request</description>
18362              <bitOffset>0</bitOffset>
18363              <bitWidth>5</bitWidth>
18364              <access>write-only</access>
18365            </field>
18366            <field>
18367              <name>CAER</name>
18368              <description>Clear All Enable Requests</description>
18369              <bitOffset>6</bitOffset>
18370              <bitWidth>1</bitWidth>
18371              <access>write-only</access>
18372              <enumeratedValues>
18373                <enumeratedValue>
18374                  <name>0</name>
18375                  <description>Clear only the ERQ bit specified in the CERQ field</description>
18376                  <value>#0</value>
18377                </enumeratedValue>
18378                <enumeratedValue>
18379                  <name>1</name>
18380                  <description>Clear all bits in ERQ</description>
18381                  <value>#1</value>
18382                </enumeratedValue>
18383              </enumeratedValues>
18384            </field>
18385            <field>
18386              <name>NOP</name>
18387              <description>No Op enable</description>
18388              <bitOffset>7</bitOffset>
18389              <bitWidth>1</bitWidth>
18390              <access>write-only</access>
18391              <enumeratedValues>
18392                <enumeratedValue>
18393                  <name>0</name>
18394                  <description>Normal operation</description>
18395                  <value>#0</value>
18396                </enumeratedValue>
18397                <enumeratedValue>
18398                  <name>1</name>
18399                  <description>No operation, ignore the other bits in this register</description>
18400                  <value>#1</value>
18401                </enumeratedValue>
18402              </enumeratedValues>
18403            </field>
18404          </fields>
18405        </register>
18406        <register>
18407          <name>SERQ</name>
18408          <description>Set Enable Request Register</description>
18409          <addressOffset>0x1B</addressOffset>
18410          <size>8</size>
18411          <access>write-only</access>
18412          <resetValue>0</resetValue>
18413          <resetMask>0xFF</resetMask>
18414          <fields>
18415            <field>
18416              <name>SERQ</name>
18417              <description>Set Enable Request</description>
18418              <bitOffset>0</bitOffset>
18419              <bitWidth>5</bitWidth>
18420              <access>write-only</access>
18421            </field>
18422            <field>
18423              <name>SAER</name>
18424              <description>Set All Enable Requests</description>
18425              <bitOffset>6</bitOffset>
18426              <bitWidth>1</bitWidth>
18427              <access>write-only</access>
18428              <enumeratedValues>
18429                <enumeratedValue>
18430                  <name>0</name>
18431                  <description>Set only the ERQ bit specified in the SERQ field</description>
18432                  <value>#0</value>
18433                </enumeratedValue>
18434                <enumeratedValue>
18435                  <name>1</name>
18436                  <description>Set all bits in ERQ</description>
18437                  <value>#1</value>
18438                </enumeratedValue>
18439              </enumeratedValues>
18440            </field>
18441            <field>
18442              <name>NOP</name>
18443              <description>No Op enable</description>
18444              <bitOffset>7</bitOffset>
18445              <bitWidth>1</bitWidth>
18446              <access>write-only</access>
18447              <enumeratedValues>
18448                <enumeratedValue>
18449                  <name>0</name>
18450                  <description>Normal operation</description>
18451                  <value>#0</value>
18452                </enumeratedValue>
18453                <enumeratedValue>
18454                  <name>1</name>
18455                  <description>No operation, ignore the other bits in this register</description>
18456                  <value>#1</value>
18457                </enumeratedValue>
18458              </enumeratedValues>
18459            </field>
18460          </fields>
18461        </register>
18462        <register>
18463          <name>CDNE</name>
18464          <description>Clear DONE Status Bit Register</description>
18465          <addressOffset>0x1C</addressOffset>
18466          <size>8</size>
18467          <access>write-only</access>
18468          <resetValue>0</resetValue>
18469          <resetMask>0xFF</resetMask>
18470          <fields>
18471            <field>
18472              <name>CDNE</name>
18473              <description>Clear DONE Bit</description>
18474              <bitOffset>0</bitOffset>
18475              <bitWidth>5</bitWidth>
18476              <access>write-only</access>
18477            </field>
18478            <field>
18479              <name>CADN</name>
18480              <description>Clears All DONE Bits</description>
18481              <bitOffset>6</bitOffset>
18482              <bitWidth>1</bitWidth>
18483              <access>write-only</access>
18484              <enumeratedValues>
18485                <enumeratedValue>
18486                  <name>0</name>
18487                  <description>Clears only the TCDn_CSR[DONE] bit specified in the CDNE field</description>
18488                  <value>#0</value>
18489                </enumeratedValue>
18490                <enumeratedValue>
18491                  <name>1</name>
18492                  <description>Clears all bits in TCDn_CSR[DONE]</description>
18493                  <value>#1</value>
18494                </enumeratedValue>
18495              </enumeratedValues>
18496            </field>
18497            <field>
18498              <name>NOP</name>
18499              <description>No Op enable</description>
18500              <bitOffset>7</bitOffset>
18501              <bitWidth>1</bitWidth>
18502              <access>write-only</access>
18503              <enumeratedValues>
18504                <enumeratedValue>
18505                  <name>0</name>
18506                  <description>Normal operation</description>
18507                  <value>#0</value>
18508                </enumeratedValue>
18509                <enumeratedValue>
18510                  <name>1</name>
18511                  <description>No operation, ignore the other bits in this register</description>
18512                  <value>#1</value>
18513                </enumeratedValue>
18514              </enumeratedValues>
18515            </field>
18516          </fields>
18517        </register>
18518        <register>
18519          <name>SSRT</name>
18520          <description>Set START Bit Register</description>
18521          <addressOffset>0x1D</addressOffset>
18522          <size>8</size>
18523          <access>write-only</access>
18524          <resetValue>0</resetValue>
18525          <resetMask>0xFF</resetMask>
18526          <fields>
18527            <field>
18528              <name>SSRT</name>
18529              <description>Set START Bit</description>
18530              <bitOffset>0</bitOffset>
18531              <bitWidth>5</bitWidth>
18532              <access>write-only</access>
18533            </field>
18534            <field>
18535              <name>SAST</name>
18536              <description>Set All START Bits (activates all channels)</description>
18537              <bitOffset>6</bitOffset>
18538              <bitWidth>1</bitWidth>
18539              <access>write-only</access>
18540              <enumeratedValues>
18541                <enumeratedValue>
18542                  <name>0</name>
18543                  <description>Set only the TCDn_CSR[START] bit specified in the SSRT field</description>
18544                  <value>#0</value>
18545                </enumeratedValue>
18546                <enumeratedValue>
18547                  <name>1</name>
18548                  <description>Set all bits in TCDn_CSR[START]</description>
18549                  <value>#1</value>
18550                </enumeratedValue>
18551              </enumeratedValues>
18552            </field>
18553            <field>
18554              <name>NOP</name>
18555              <description>No Op enable</description>
18556              <bitOffset>7</bitOffset>
18557              <bitWidth>1</bitWidth>
18558              <access>write-only</access>
18559              <enumeratedValues>
18560                <enumeratedValue>
18561                  <name>0</name>
18562                  <description>Normal operation</description>
18563                  <value>#0</value>
18564                </enumeratedValue>
18565                <enumeratedValue>
18566                  <name>1</name>
18567                  <description>No operation, ignore the other bits in this register</description>
18568                  <value>#1</value>
18569                </enumeratedValue>
18570              </enumeratedValues>
18571            </field>
18572          </fields>
18573        </register>
18574        <register>
18575          <name>CERR</name>
18576          <description>Clear Error Register</description>
18577          <addressOffset>0x1E</addressOffset>
18578          <size>8</size>
18579          <access>write-only</access>
18580          <resetValue>0</resetValue>
18581          <resetMask>0xFF</resetMask>
18582          <fields>
18583            <field>
18584              <name>CERR</name>
18585              <description>Clear Error Indicator</description>
18586              <bitOffset>0</bitOffset>
18587              <bitWidth>5</bitWidth>
18588              <access>write-only</access>
18589            </field>
18590            <field>
18591              <name>CAEI</name>
18592              <description>Clear All Error Indicators</description>
18593              <bitOffset>6</bitOffset>
18594              <bitWidth>1</bitWidth>
18595              <access>write-only</access>
18596              <enumeratedValues>
18597                <enumeratedValue>
18598                  <name>0</name>
18599                  <description>Clear only the ERR bit specified in the CERR field</description>
18600                  <value>#0</value>
18601                </enumeratedValue>
18602                <enumeratedValue>
18603                  <name>1</name>
18604                  <description>Clear all bits in ERR</description>
18605                  <value>#1</value>
18606                </enumeratedValue>
18607              </enumeratedValues>
18608            </field>
18609            <field>
18610              <name>NOP</name>
18611              <description>No Op enable</description>
18612              <bitOffset>7</bitOffset>
18613              <bitWidth>1</bitWidth>
18614              <access>write-only</access>
18615              <enumeratedValues>
18616                <enumeratedValue>
18617                  <name>0</name>
18618                  <description>Normal operation</description>
18619                  <value>#0</value>
18620                </enumeratedValue>
18621                <enumeratedValue>
18622                  <name>1</name>
18623                  <description>No operation, ignore the other bits in this register</description>
18624                  <value>#1</value>
18625                </enumeratedValue>
18626              </enumeratedValues>
18627            </field>
18628          </fields>
18629        </register>
18630        <register>
18631          <name>CINT</name>
18632          <description>Clear Interrupt Request Register</description>
18633          <addressOffset>0x1F</addressOffset>
18634          <size>8</size>
18635          <access>write-only</access>
18636          <resetValue>0</resetValue>
18637          <resetMask>0xFF</resetMask>
18638          <fields>
18639            <field>
18640              <name>CINT</name>
18641              <description>Clear Interrupt Request</description>
18642              <bitOffset>0</bitOffset>
18643              <bitWidth>5</bitWidth>
18644              <access>write-only</access>
18645            </field>
18646            <field>
18647              <name>CAIR</name>
18648              <description>Clear All Interrupt Requests</description>
18649              <bitOffset>6</bitOffset>
18650              <bitWidth>1</bitWidth>
18651              <access>write-only</access>
18652              <enumeratedValues>
18653                <enumeratedValue>
18654                  <name>0</name>
18655                  <description>Clear only the INT bit specified in the CINT field</description>
18656                  <value>#0</value>
18657                </enumeratedValue>
18658                <enumeratedValue>
18659                  <name>1</name>
18660                  <description>Clear all bits in INT</description>
18661                  <value>#1</value>
18662                </enumeratedValue>
18663              </enumeratedValues>
18664            </field>
18665            <field>
18666              <name>NOP</name>
18667              <description>No Op enable</description>
18668              <bitOffset>7</bitOffset>
18669              <bitWidth>1</bitWidth>
18670              <access>write-only</access>
18671              <enumeratedValues>
18672                <enumeratedValue>
18673                  <name>0</name>
18674                  <description>Normal operation</description>
18675                  <value>#0</value>
18676                </enumeratedValue>
18677                <enumeratedValue>
18678                  <name>1</name>
18679                  <description>No operation, ignore the other bits in this register</description>
18680                  <value>#1</value>
18681                </enumeratedValue>
18682              </enumeratedValues>
18683            </field>
18684          </fields>
18685        </register>
18686        <register>
18687          <name>INT</name>
18688          <description>Interrupt Request Register</description>
18689          <addressOffset>0x24</addressOffset>
18690          <size>32</size>
18691          <access>read-write</access>
18692          <resetValue>0</resetValue>
18693          <resetMask>0xFFFFFFFF</resetMask>
18694          <fields>
18695            <field>
18696              <name>INT0</name>
18697              <description>Interrupt Request 0</description>
18698              <bitOffset>0</bitOffset>
18699              <bitWidth>1</bitWidth>
18700              <access>read-write</access>
18701              <enumeratedValues>
18702                <enumeratedValue>
18703                  <name>0</name>
18704                  <description>The interrupt request for corresponding channel is cleared</description>
18705                  <value>#0</value>
18706                </enumeratedValue>
18707                <enumeratedValue>
18708                  <name>1</name>
18709                  <description>The interrupt request for corresponding channel is active</description>
18710                  <value>#1</value>
18711                </enumeratedValue>
18712              </enumeratedValues>
18713            </field>
18714            <field>
18715              <name>INT1</name>
18716              <description>Interrupt Request 1</description>
18717              <bitOffset>1</bitOffset>
18718              <bitWidth>1</bitWidth>
18719              <access>read-write</access>
18720              <enumeratedValues>
18721                <enumeratedValue>
18722                  <name>0</name>
18723                  <description>The interrupt request for corresponding channel is cleared</description>
18724                  <value>#0</value>
18725                </enumeratedValue>
18726                <enumeratedValue>
18727                  <name>1</name>
18728                  <description>The interrupt request for corresponding channel is active</description>
18729                  <value>#1</value>
18730                </enumeratedValue>
18731              </enumeratedValues>
18732            </field>
18733            <field>
18734              <name>INT2</name>
18735              <description>Interrupt Request 2</description>
18736              <bitOffset>2</bitOffset>
18737              <bitWidth>1</bitWidth>
18738              <access>read-write</access>
18739              <enumeratedValues>
18740                <enumeratedValue>
18741                  <name>0</name>
18742                  <description>The interrupt request for corresponding channel is cleared</description>
18743                  <value>#0</value>
18744                </enumeratedValue>
18745                <enumeratedValue>
18746                  <name>1</name>
18747                  <description>The interrupt request for corresponding channel is active</description>
18748                  <value>#1</value>
18749                </enumeratedValue>
18750              </enumeratedValues>
18751            </field>
18752            <field>
18753              <name>INT3</name>
18754              <description>Interrupt Request 3</description>
18755              <bitOffset>3</bitOffset>
18756              <bitWidth>1</bitWidth>
18757              <access>read-write</access>
18758              <enumeratedValues>
18759                <enumeratedValue>
18760                  <name>0</name>
18761                  <description>The interrupt request for corresponding channel is cleared</description>
18762                  <value>#0</value>
18763                </enumeratedValue>
18764                <enumeratedValue>
18765                  <name>1</name>
18766                  <description>The interrupt request for corresponding channel is active</description>
18767                  <value>#1</value>
18768                </enumeratedValue>
18769              </enumeratedValues>
18770            </field>
18771            <field>
18772              <name>INT4</name>
18773              <description>Interrupt Request 4</description>
18774              <bitOffset>4</bitOffset>
18775              <bitWidth>1</bitWidth>
18776              <access>read-write</access>
18777              <enumeratedValues>
18778                <enumeratedValue>
18779                  <name>0</name>
18780                  <description>The interrupt request for corresponding channel is cleared</description>
18781                  <value>#0</value>
18782                </enumeratedValue>
18783                <enumeratedValue>
18784                  <name>1</name>
18785                  <description>The interrupt request for corresponding channel is active</description>
18786                  <value>#1</value>
18787                </enumeratedValue>
18788              </enumeratedValues>
18789            </field>
18790            <field>
18791              <name>INT5</name>
18792              <description>Interrupt Request 5</description>
18793              <bitOffset>5</bitOffset>
18794              <bitWidth>1</bitWidth>
18795              <access>read-write</access>
18796              <enumeratedValues>
18797                <enumeratedValue>
18798                  <name>0</name>
18799                  <description>The interrupt request for corresponding channel is cleared</description>
18800                  <value>#0</value>
18801                </enumeratedValue>
18802                <enumeratedValue>
18803                  <name>1</name>
18804                  <description>The interrupt request for corresponding channel is active</description>
18805                  <value>#1</value>
18806                </enumeratedValue>
18807              </enumeratedValues>
18808            </field>
18809            <field>
18810              <name>INT6</name>
18811              <description>Interrupt Request 6</description>
18812              <bitOffset>6</bitOffset>
18813              <bitWidth>1</bitWidth>
18814              <access>read-write</access>
18815              <enumeratedValues>
18816                <enumeratedValue>
18817                  <name>0</name>
18818                  <description>The interrupt request for corresponding channel is cleared</description>
18819                  <value>#0</value>
18820                </enumeratedValue>
18821                <enumeratedValue>
18822                  <name>1</name>
18823                  <description>The interrupt request for corresponding channel is active</description>
18824                  <value>#1</value>
18825                </enumeratedValue>
18826              </enumeratedValues>
18827            </field>
18828            <field>
18829              <name>INT7</name>
18830              <description>Interrupt Request 7</description>
18831              <bitOffset>7</bitOffset>
18832              <bitWidth>1</bitWidth>
18833              <access>read-write</access>
18834              <enumeratedValues>
18835                <enumeratedValue>
18836                  <name>0</name>
18837                  <description>The interrupt request for corresponding channel is cleared</description>
18838                  <value>#0</value>
18839                </enumeratedValue>
18840                <enumeratedValue>
18841                  <name>1</name>
18842                  <description>The interrupt request for corresponding channel is active</description>
18843                  <value>#1</value>
18844                </enumeratedValue>
18845              </enumeratedValues>
18846            </field>
18847            <field>
18848              <name>INT8</name>
18849              <description>Interrupt Request 8</description>
18850              <bitOffset>8</bitOffset>
18851              <bitWidth>1</bitWidth>
18852              <access>read-write</access>
18853              <enumeratedValues>
18854                <enumeratedValue>
18855                  <name>0</name>
18856                  <description>The interrupt request for corresponding channel is cleared</description>
18857                  <value>#0</value>
18858                </enumeratedValue>
18859                <enumeratedValue>
18860                  <name>1</name>
18861                  <description>The interrupt request for corresponding channel is active</description>
18862                  <value>#1</value>
18863                </enumeratedValue>
18864              </enumeratedValues>
18865            </field>
18866            <field>
18867              <name>INT9</name>
18868              <description>Interrupt Request 9</description>
18869              <bitOffset>9</bitOffset>
18870              <bitWidth>1</bitWidth>
18871              <access>read-write</access>
18872              <enumeratedValues>
18873                <enumeratedValue>
18874                  <name>0</name>
18875                  <description>The interrupt request for corresponding channel is cleared</description>
18876                  <value>#0</value>
18877                </enumeratedValue>
18878                <enumeratedValue>
18879                  <name>1</name>
18880                  <description>The interrupt request for corresponding channel is active</description>
18881                  <value>#1</value>
18882                </enumeratedValue>
18883              </enumeratedValues>
18884            </field>
18885            <field>
18886              <name>INT10</name>
18887              <description>Interrupt Request 10</description>
18888              <bitOffset>10</bitOffset>
18889              <bitWidth>1</bitWidth>
18890              <access>read-write</access>
18891              <enumeratedValues>
18892                <enumeratedValue>
18893                  <name>0</name>
18894                  <description>The interrupt request for corresponding channel is cleared</description>
18895                  <value>#0</value>
18896                </enumeratedValue>
18897                <enumeratedValue>
18898                  <name>1</name>
18899                  <description>The interrupt request for corresponding channel is active</description>
18900                  <value>#1</value>
18901                </enumeratedValue>
18902              </enumeratedValues>
18903            </field>
18904            <field>
18905              <name>INT11</name>
18906              <description>Interrupt Request 11</description>
18907              <bitOffset>11</bitOffset>
18908              <bitWidth>1</bitWidth>
18909              <access>read-write</access>
18910              <enumeratedValues>
18911                <enumeratedValue>
18912                  <name>0</name>
18913                  <description>The interrupt request for corresponding channel is cleared</description>
18914                  <value>#0</value>
18915                </enumeratedValue>
18916                <enumeratedValue>
18917                  <name>1</name>
18918                  <description>The interrupt request for corresponding channel is active</description>
18919                  <value>#1</value>
18920                </enumeratedValue>
18921              </enumeratedValues>
18922            </field>
18923            <field>
18924              <name>INT12</name>
18925              <description>Interrupt Request 12</description>
18926              <bitOffset>12</bitOffset>
18927              <bitWidth>1</bitWidth>
18928              <access>read-write</access>
18929              <enumeratedValues>
18930                <enumeratedValue>
18931                  <name>0</name>
18932                  <description>The interrupt request for corresponding channel is cleared</description>
18933                  <value>#0</value>
18934                </enumeratedValue>
18935                <enumeratedValue>
18936                  <name>1</name>
18937                  <description>The interrupt request for corresponding channel is active</description>
18938                  <value>#1</value>
18939                </enumeratedValue>
18940              </enumeratedValues>
18941            </field>
18942            <field>
18943              <name>INT13</name>
18944              <description>Interrupt Request 13</description>
18945              <bitOffset>13</bitOffset>
18946              <bitWidth>1</bitWidth>
18947              <access>read-write</access>
18948              <enumeratedValues>
18949                <enumeratedValue>
18950                  <name>0</name>
18951                  <description>The interrupt request for corresponding channel is cleared</description>
18952                  <value>#0</value>
18953                </enumeratedValue>
18954                <enumeratedValue>
18955                  <name>1</name>
18956                  <description>The interrupt request for corresponding channel is active</description>
18957                  <value>#1</value>
18958                </enumeratedValue>
18959              </enumeratedValues>
18960            </field>
18961            <field>
18962              <name>INT14</name>
18963              <description>Interrupt Request 14</description>
18964              <bitOffset>14</bitOffset>
18965              <bitWidth>1</bitWidth>
18966              <access>read-write</access>
18967              <enumeratedValues>
18968                <enumeratedValue>
18969                  <name>0</name>
18970                  <description>The interrupt request for corresponding channel is cleared</description>
18971                  <value>#0</value>
18972                </enumeratedValue>
18973                <enumeratedValue>
18974                  <name>1</name>
18975                  <description>The interrupt request for corresponding channel is active</description>
18976                  <value>#1</value>
18977                </enumeratedValue>
18978              </enumeratedValues>
18979            </field>
18980            <field>
18981              <name>INT15</name>
18982              <description>Interrupt Request 15</description>
18983              <bitOffset>15</bitOffset>
18984              <bitWidth>1</bitWidth>
18985              <access>read-write</access>
18986              <enumeratedValues>
18987                <enumeratedValue>
18988                  <name>0</name>
18989                  <description>The interrupt request for corresponding channel is cleared</description>
18990                  <value>#0</value>
18991                </enumeratedValue>
18992                <enumeratedValue>
18993                  <name>1</name>
18994                  <description>The interrupt request for corresponding channel is active</description>
18995                  <value>#1</value>
18996                </enumeratedValue>
18997              </enumeratedValues>
18998            </field>
18999            <field>
19000              <name>INT16</name>
19001              <description>Interrupt Request 16</description>
19002              <bitOffset>16</bitOffset>
19003              <bitWidth>1</bitWidth>
19004              <access>read-write</access>
19005              <enumeratedValues>
19006                <enumeratedValue>
19007                  <name>0</name>
19008                  <description>The interrupt request for corresponding channel is cleared</description>
19009                  <value>#0</value>
19010                </enumeratedValue>
19011                <enumeratedValue>
19012                  <name>1</name>
19013                  <description>The interrupt request for corresponding channel is active</description>
19014                  <value>#1</value>
19015                </enumeratedValue>
19016              </enumeratedValues>
19017            </field>
19018            <field>
19019              <name>INT17</name>
19020              <description>Interrupt Request 17</description>
19021              <bitOffset>17</bitOffset>
19022              <bitWidth>1</bitWidth>
19023              <access>read-write</access>
19024              <enumeratedValues>
19025                <enumeratedValue>
19026                  <name>0</name>
19027                  <description>The interrupt request for corresponding channel is cleared</description>
19028                  <value>#0</value>
19029                </enumeratedValue>
19030                <enumeratedValue>
19031                  <name>1</name>
19032                  <description>The interrupt request for corresponding channel is active</description>
19033                  <value>#1</value>
19034                </enumeratedValue>
19035              </enumeratedValues>
19036            </field>
19037            <field>
19038              <name>INT18</name>
19039              <description>Interrupt Request 18</description>
19040              <bitOffset>18</bitOffset>
19041              <bitWidth>1</bitWidth>
19042              <access>read-write</access>
19043              <enumeratedValues>
19044                <enumeratedValue>
19045                  <name>0</name>
19046                  <description>The interrupt request for corresponding channel is cleared</description>
19047                  <value>#0</value>
19048                </enumeratedValue>
19049                <enumeratedValue>
19050                  <name>1</name>
19051                  <description>The interrupt request for corresponding channel is active</description>
19052                  <value>#1</value>
19053                </enumeratedValue>
19054              </enumeratedValues>
19055            </field>
19056            <field>
19057              <name>INT19</name>
19058              <description>Interrupt Request 19</description>
19059              <bitOffset>19</bitOffset>
19060              <bitWidth>1</bitWidth>
19061              <access>read-write</access>
19062              <enumeratedValues>
19063                <enumeratedValue>
19064                  <name>0</name>
19065                  <description>The interrupt request for corresponding channel is cleared</description>
19066                  <value>#0</value>
19067                </enumeratedValue>
19068                <enumeratedValue>
19069                  <name>1</name>
19070                  <description>The interrupt request for corresponding channel is active</description>
19071                  <value>#1</value>
19072                </enumeratedValue>
19073              </enumeratedValues>
19074            </field>
19075            <field>
19076              <name>INT20</name>
19077              <description>Interrupt Request 20</description>
19078              <bitOffset>20</bitOffset>
19079              <bitWidth>1</bitWidth>
19080              <access>read-write</access>
19081              <enumeratedValues>
19082                <enumeratedValue>
19083                  <name>0</name>
19084                  <description>The interrupt request for corresponding channel is cleared</description>
19085                  <value>#0</value>
19086                </enumeratedValue>
19087                <enumeratedValue>
19088                  <name>1</name>
19089                  <description>The interrupt request for corresponding channel is active</description>
19090                  <value>#1</value>
19091                </enumeratedValue>
19092              </enumeratedValues>
19093            </field>
19094            <field>
19095              <name>INT21</name>
19096              <description>Interrupt Request 21</description>
19097              <bitOffset>21</bitOffset>
19098              <bitWidth>1</bitWidth>
19099              <access>read-write</access>
19100              <enumeratedValues>
19101                <enumeratedValue>
19102                  <name>0</name>
19103                  <description>The interrupt request for corresponding channel is cleared</description>
19104                  <value>#0</value>
19105                </enumeratedValue>
19106                <enumeratedValue>
19107                  <name>1</name>
19108                  <description>The interrupt request for corresponding channel is active</description>
19109                  <value>#1</value>
19110                </enumeratedValue>
19111              </enumeratedValues>
19112            </field>
19113            <field>
19114              <name>INT22</name>
19115              <description>Interrupt Request 22</description>
19116              <bitOffset>22</bitOffset>
19117              <bitWidth>1</bitWidth>
19118              <access>read-write</access>
19119              <enumeratedValues>
19120                <enumeratedValue>
19121                  <name>0</name>
19122                  <description>The interrupt request for corresponding channel is cleared</description>
19123                  <value>#0</value>
19124                </enumeratedValue>
19125                <enumeratedValue>
19126                  <name>1</name>
19127                  <description>The interrupt request for corresponding channel is active</description>
19128                  <value>#1</value>
19129                </enumeratedValue>
19130              </enumeratedValues>
19131            </field>
19132            <field>
19133              <name>INT23</name>
19134              <description>Interrupt Request 23</description>
19135              <bitOffset>23</bitOffset>
19136              <bitWidth>1</bitWidth>
19137              <access>read-write</access>
19138              <enumeratedValues>
19139                <enumeratedValue>
19140                  <name>0</name>
19141                  <description>The interrupt request for corresponding channel is cleared</description>
19142                  <value>#0</value>
19143                </enumeratedValue>
19144                <enumeratedValue>
19145                  <name>1</name>
19146                  <description>The interrupt request for corresponding channel is active</description>
19147                  <value>#1</value>
19148                </enumeratedValue>
19149              </enumeratedValues>
19150            </field>
19151            <field>
19152              <name>INT24</name>
19153              <description>Interrupt Request 24</description>
19154              <bitOffset>24</bitOffset>
19155              <bitWidth>1</bitWidth>
19156              <access>read-write</access>
19157              <enumeratedValues>
19158                <enumeratedValue>
19159                  <name>0</name>
19160                  <description>The interrupt request for corresponding channel is cleared</description>
19161                  <value>#0</value>
19162                </enumeratedValue>
19163                <enumeratedValue>
19164                  <name>1</name>
19165                  <description>The interrupt request for corresponding channel is active</description>
19166                  <value>#1</value>
19167                </enumeratedValue>
19168              </enumeratedValues>
19169            </field>
19170            <field>
19171              <name>INT25</name>
19172              <description>Interrupt Request 25</description>
19173              <bitOffset>25</bitOffset>
19174              <bitWidth>1</bitWidth>
19175              <access>read-write</access>
19176              <enumeratedValues>
19177                <enumeratedValue>
19178                  <name>0</name>
19179                  <description>The interrupt request for corresponding channel is cleared</description>
19180                  <value>#0</value>
19181                </enumeratedValue>
19182                <enumeratedValue>
19183                  <name>1</name>
19184                  <description>The interrupt request for corresponding channel is active</description>
19185                  <value>#1</value>
19186                </enumeratedValue>
19187              </enumeratedValues>
19188            </field>
19189            <field>
19190              <name>INT26</name>
19191              <description>Interrupt Request 26</description>
19192              <bitOffset>26</bitOffset>
19193              <bitWidth>1</bitWidth>
19194              <access>read-write</access>
19195              <enumeratedValues>
19196                <enumeratedValue>
19197                  <name>0</name>
19198                  <description>The interrupt request for corresponding channel is cleared</description>
19199                  <value>#0</value>
19200                </enumeratedValue>
19201                <enumeratedValue>
19202                  <name>1</name>
19203                  <description>The interrupt request for corresponding channel is active</description>
19204                  <value>#1</value>
19205                </enumeratedValue>
19206              </enumeratedValues>
19207            </field>
19208            <field>
19209              <name>INT27</name>
19210              <description>Interrupt Request 27</description>
19211              <bitOffset>27</bitOffset>
19212              <bitWidth>1</bitWidth>
19213              <access>read-write</access>
19214              <enumeratedValues>
19215                <enumeratedValue>
19216                  <name>0</name>
19217                  <description>The interrupt request for corresponding channel is cleared</description>
19218                  <value>#0</value>
19219                </enumeratedValue>
19220                <enumeratedValue>
19221                  <name>1</name>
19222                  <description>The interrupt request for corresponding channel is active</description>
19223                  <value>#1</value>
19224                </enumeratedValue>
19225              </enumeratedValues>
19226            </field>
19227            <field>
19228              <name>INT28</name>
19229              <description>Interrupt Request 28</description>
19230              <bitOffset>28</bitOffset>
19231              <bitWidth>1</bitWidth>
19232              <access>read-write</access>
19233              <enumeratedValues>
19234                <enumeratedValue>
19235                  <name>0</name>
19236                  <description>The interrupt request for corresponding channel is cleared</description>
19237                  <value>#0</value>
19238                </enumeratedValue>
19239                <enumeratedValue>
19240                  <name>1</name>
19241                  <description>The interrupt request for corresponding channel is active</description>
19242                  <value>#1</value>
19243                </enumeratedValue>
19244              </enumeratedValues>
19245            </field>
19246            <field>
19247              <name>INT29</name>
19248              <description>Interrupt Request 29</description>
19249              <bitOffset>29</bitOffset>
19250              <bitWidth>1</bitWidth>
19251              <access>read-write</access>
19252              <enumeratedValues>
19253                <enumeratedValue>
19254                  <name>0</name>
19255                  <description>The interrupt request for corresponding channel is cleared</description>
19256                  <value>#0</value>
19257                </enumeratedValue>
19258                <enumeratedValue>
19259                  <name>1</name>
19260                  <description>The interrupt request for corresponding channel is active</description>
19261                  <value>#1</value>
19262                </enumeratedValue>
19263              </enumeratedValues>
19264            </field>
19265            <field>
19266              <name>INT30</name>
19267              <description>Interrupt Request 30</description>
19268              <bitOffset>30</bitOffset>
19269              <bitWidth>1</bitWidth>
19270              <access>read-write</access>
19271              <enumeratedValues>
19272                <enumeratedValue>
19273                  <name>0</name>
19274                  <description>The interrupt request for corresponding channel is cleared</description>
19275                  <value>#0</value>
19276                </enumeratedValue>
19277                <enumeratedValue>
19278                  <name>1</name>
19279                  <description>The interrupt request for corresponding channel is active</description>
19280                  <value>#1</value>
19281                </enumeratedValue>
19282              </enumeratedValues>
19283            </field>
19284            <field>
19285              <name>INT31</name>
19286              <description>Interrupt Request 31</description>
19287              <bitOffset>31</bitOffset>
19288              <bitWidth>1</bitWidth>
19289              <access>read-write</access>
19290              <enumeratedValues>
19291                <enumeratedValue>
19292                  <name>0</name>
19293                  <description>The interrupt request for corresponding channel is cleared</description>
19294                  <value>#0</value>
19295                </enumeratedValue>
19296                <enumeratedValue>
19297                  <name>1</name>
19298                  <description>The interrupt request for corresponding channel is active</description>
19299                  <value>#1</value>
19300                </enumeratedValue>
19301              </enumeratedValues>
19302            </field>
19303          </fields>
19304        </register>
19305        <register>
19306          <name>ERR</name>
19307          <description>Error Register</description>
19308          <addressOffset>0x2C</addressOffset>
19309          <size>32</size>
19310          <access>read-write</access>
19311          <resetValue>0</resetValue>
19312          <resetMask>0xFFFFFFFF</resetMask>
19313          <fields>
19314            <field>
19315              <name>ERR0</name>
19316              <description>Error In Channel 0</description>
19317              <bitOffset>0</bitOffset>
19318              <bitWidth>1</bitWidth>
19319              <access>read-write</access>
19320              <enumeratedValues>
19321                <enumeratedValue>
19322                  <name>0</name>
19323                  <description>An error in this channel has not occurred</description>
19324                  <value>#0</value>
19325                </enumeratedValue>
19326                <enumeratedValue>
19327                  <name>1</name>
19328                  <description>An error in this channel has occurred</description>
19329                  <value>#1</value>
19330                </enumeratedValue>
19331              </enumeratedValues>
19332            </field>
19333            <field>
19334              <name>ERR1</name>
19335              <description>Error In Channel 1</description>
19336              <bitOffset>1</bitOffset>
19337              <bitWidth>1</bitWidth>
19338              <access>read-write</access>
19339              <enumeratedValues>
19340                <enumeratedValue>
19341                  <name>0</name>
19342                  <description>An error in this channel has not occurred</description>
19343                  <value>#0</value>
19344                </enumeratedValue>
19345                <enumeratedValue>
19346                  <name>1</name>
19347                  <description>An error in this channel has occurred</description>
19348                  <value>#1</value>
19349                </enumeratedValue>
19350              </enumeratedValues>
19351            </field>
19352            <field>
19353              <name>ERR2</name>
19354              <description>Error In Channel 2</description>
19355              <bitOffset>2</bitOffset>
19356              <bitWidth>1</bitWidth>
19357              <access>read-write</access>
19358              <enumeratedValues>
19359                <enumeratedValue>
19360                  <name>0</name>
19361                  <description>An error in this channel has not occurred</description>
19362                  <value>#0</value>
19363                </enumeratedValue>
19364                <enumeratedValue>
19365                  <name>1</name>
19366                  <description>An error in this channel has occurred</description>
19367                  <value>#1</value>
19368                </enumeratedValue>
19369              </enumeratedValues>
19370            </field>
19371            <field>
19372              <name>ERR3</name>
19373              <description>Error In Channel 3</description>
19374              <bitOffset>3</bitOffset>
19375              <bitWidth>1</bitWidth>
19376              <access>read-write</access>
19377              <enumeratedValues>
19378                <enumeratedValue>
19379                  <name>0</name>
19380                  <description>An error in this channel has not occurred</description>
19381                  <value>#0</value>
19382                </enumeratedValue>
19383                <enumeratedValue>
19384                  <name>1</name>
19385                  <description>An error in this channel has occurred</description>
19386                  <value>#1</value>
19387                </enumeratedValue>
19388              </enumeratedValues>
19389            </field>
19390            <field>
19391              <name>ERR4</name>
19392              <description>Error In Channel 4</description>
19393              <bitOffset>4</bitOffset>
19394              <bitWidth>1</bitWidth>
19395              <access>read-write</access>
19396              <enumeratedValues>
19397                <enumeratedValue>
19398                  <name>0</name>
19399                  <description>An error in this channel has not occurred</description>
19400                  <value>#0</value>
19401                </enumeratedValue>
19402                <enumeratedValue>
19403                  <name>1</name>
19404                  <description>An error in this channel has occurred</description>
19405                  <value>#1</value>
19406                </enumeratedValue>
19407              </enumeratedValues>
19408            </field>
19409            <field>
19410              <name>ERR5</name>
19411              <description>Error In Channel 5</description>
19412              <bitOffset>5</bitOffset>
19413              <bitWidth>1</bitWidth>
19414              <access>read-write</access>
19415              <enumeratedValues>
19416                <enumeratedValue>
19417                  <name>0</name>
19418                  <description>An error in this channel has not occurred</description>
19419                  <value>#0</value>
19420                </enumeratedValue>
19421                <enumeratedValue>
19422                  <name>1</name>
19423                  <description>An error in this channel has occurred</description>
19424                  <value>#1</value>
19425                </enumeratedValue>
19426              </enumeratedValues>
19427            </field>
19428            <field>
19429              <name>ERR6</name>
19430              <description>Error In Channel 6</description>
19431              <bitOffset>6</bitOffset>
19432              <bitWidth>1</bitWidth>
19433              <access>read-write</access>
19434              <enumeratedValues>
19435                <enumeratedValue>
19436                  <name>0</name>
19437                  <description>An error in this channel has not occurred</description>
19438                  <value>#0</value>
19439                </enumeratedValue>
19440                <enumeratedValue>
19441                  <name>1</name>
19442                  <description>An error in this channel has occurred</description>
19443                  <value>#1</value>
19444                </enumeratedValue>
19445              </enumeratedValues>
19446            </field>
19447            <field>
19448              <name>ERR7</name>
19449              <description>Error In Channel 7</description>
19450              <bitOffset>7</bitOffset>
19451              <bitWidth>1</bitWidth>
19452              <access>read-write</access>
19453              <enumeratedValues>
19454                <enumeratedValue>
19455                  <name>0</name>
19456                  <description>An error in this channel has not occurred</description>
19457                  <value>#0</value>
19458                </enumeratedValue>
19459                <enumeratedValue>
19460                  <name>1</name>
19461                  <description>An error in this channel has occurred</description>
19462                  <value>#1</value>
19463                </enumeratedValue>
19464              </enumeratedValues>
19465            </field>
19466            <field>
19467              <name>ERR8</name>
19468              <description>Error In Channel 8</description>
19469              <bitOffset>8</bitOffset>
19470              <bitWidth>1</bitWidth>
19471              <access>read-write</access>
19472              <enumeratedValues>
19473                <enumeratedValue>
19474                  <name>0</name>
19475                  <description>An error in this channel has not occurred</description>
19476                  <value>#0</value>
19477                </enumeratedValue>
19478                <enumeratedValue>
19479                  <name>1</name>
19480                  <description>An error in this channel has occurred</description>
19481                  <value>#1</value>
19482                </enumeratedValue>
19483              </enumeratedValues>
19484            </field>
19485            <field>
19486              <name>ERR9</name>
19487              <description>Error In Channel 9</description>
19488              <bitOffset>9</bitOffset>
19489              <bitWidth>1</bitWidth>
19490              <access>read-write</access>
19491              <enumeratedValues>
19492                <enumeratedValue>
19493                  <name>0</name>
19494                  <description>An error in this channel has not occurred</description>
19495                  <value>#0</value>
19496                </enumeratedValue>
19497                <enumeratedValue>
19498                  <name>1</name>
19499                  <description>An error in this channel has occurred</description>
19500                  <value>#1</value>
19501                </enumeratedValue>
19502              </enumeratedValues>
19503            </field>
19504            <field>
19505              <name>ERR10</name>
19506              <description>Error In Channel 10</description>
19507              <bitOffset>10</bitOffset>
19508              <bitWidth>1</bitWidth>
19509              <access>read-write</access>
19510              <enumeratedValues>
19511                <enumeratedValue>
19512                  <name>0</name>
19513                  <description>An error in this channel has not occurred</description>
19514                  <value>#0</value>
19515                </enumeratedValue>
19516                <enumeratedValue>
19517                  <name>1</name>
19518                  <description>An error in this channel has occurred</description>
19519                  <value>#1</value>
19520                </enumeratedValue>
19521              </enumeratedValues>
19522            </field>
19523            <field>
19524              <name>ERR11</name>
19525              <description>Error In Channel 11</description>
19526              <bitOffset>11</bitOffset>
19527              <bitWidth>1</bitWidth>
19528              <access>read-write</access>
19529              <enumeratedValues>
19530                <enumeratedValue>
19531                  <name>0</name>
19532                  <description>An error in this channel has not occurred</description>
19533                  <value>#0</value>
19534                </enumeratedValue>
19535                <enumeratedValue>
19536                  <name>1</name>
19537                  <description>An error in this channel has occurred</description>
19538                  <value>#1</value>
19539                </enumeratedValue>
19540              </enumeratedValues>
19541            </field>
19542            <field>
19543              <name>ERR12</name>
19544              <description>Error In Channel 12</description>
19545              <bitOffset>12</bitOffset>
19546              <bitWidth>1</bitWidth>
19547              <access>read-write</access>
19548              <enumeratedValues>
19549                <enumeratedValue>
19550                  <name>0</name>
19551                  <description>An error in this channel has not occurred</description>
19552                  <value>#0</value>
19553                </enumeratedValue>
19554                <enumeratedValue>
19555                  <name>1</name>
19556                  <description>An error in this channel has occurred</description>
19557                  <value>#1</value>
19558                </enumeratedValue>
19559              </enumeratedValues>
19560            </field>
19561            <field>
19562              <name>ERR13</name>
19563              <description>Error In Channel 13</description>
19564              <bitOffset>13</bitOffset>
19565              <bitWidth>1</bitWidth>
19566              <access>read-write</access>
19567              <enumeratedValues>
19568                <enumeratedValue>
19569                  <name>0</name>
19570                  <description>An error in this channel has not occurred</description>
19571                  <value>#0</value>
19572                </enumeratedValue>
19573                <enumeratedValue>
19574                  <name>1</name>
19575                  <description>An error in this channel has occurred</description>
19576                  <value>#1</value>
19577                </enumeratedValue>
19578              </enumeratedValues>
19579            </field>
19580            <field>
19581              <name>ERR14</name>
19582              <description>Error In Channel 14</description>
19583              <bitOffset>14</bitOffset>
19584              <bitWidth>1</bitWidth>
19585              <access>read-write</access>
19586              <enumeratedValues>
19587                <enumeratedValue>
19588                  <name>0</name>
19589                  <description>An error in this channel has not occurred</description>
19590                  <value>#0</value>
19591                </enumeratedValue>
19592                <enumeratedValue>
19593                  <name>1</name>
19594                  <description>An error in this channel has occurred</description>
19595                  <value>#1</value>
19596                </enumeratedValue>
19597              </enumeratedValues>
19598            </field>
19599            <field>
19600              <name>ERR15</name>
19601              <description>Error In Channel 15</description>
19602              <bitOffset>15</bitOffset>
19603              <bitWidth>1</bitWidth>
19604              <access>read-write</access>
19605              <enumeratedValues>
19606                <enumeratedValue>
19607                  <name>0</name>
19608                  <description>An error in this channel has not occurred</description>
19609                  <value>#0</value>
19610                </enumeratedValue>
19611                <enumeratedValue>
19612                  <name>1</name>
19613                  <description>An error in this channel has occurred</description>
19614                  <value>#1</value>
19615                </enumeratedValue>
19616              </enumeratedValues>
19617            </field>
19618            <field>
19619              <name>ERR16</name>
19620              <description>Error In Channel 16</description>
19621              <bitOffset>16</bitOffset>
19622              <bitWidth>1</bitWidth>
19623              <access>read-write</access>
19624              <enumeratedValues>
19625                <enumeratedValue>
19626                  <name>0</name>
19627                  <description>An error in this channel has not occurred</description>
19628                  <value>#0</value>
19629                </enumeratedValue>
19630                <enumeratedValue>
19631                  <name>1</name>
19632                  <description>An error in this channel has occurred</description>
19633                  <value>#1</value>
19634                </enumeratedValue>
19635              </enumeratedValues>
19636            </field>
19637            <field>
19638              <name>ERR17</name>
19639              <description>Error In Channel 17</description>
19640              <bitOffset>17</bitOffset>
19641              <bitWidth>1</bitWidth>
19642              <access>read-write</access>
19643              <enumeratedValues>
19644                <enumeratedValue>
19645                  <name>0</name>
19646                  <description>An error in this channel has not occurred</description>
19647                  <value>#0</value>
19648                </enumeratedValue>
19649                <enumeratedValue>
19650                  <name>1</name>
19651                  <description>An error in this channel has occurred</description>
19652                  <value>#1</value>
19653                </enumeratedValue>
19654              </enumeratedValues>
19655            </field>
19656            <field>
19657              <name>ERR18</name>
19658              <description>Error In Channel 18</description>
19659              <bitOffset>18</bitOffset>
19660              <bitWidth>1</bitWidth>
19661              <access>read-write</access>
19662              <enumeratedValues>
19663                <enumeratedValue>
19664                  <name>0</name>
19665                  <description>An error in this channel has not occurred</description>
19666                  <value>#0</value>
19667                </enumeratedValue>
19668                <enumeratedValue>
19669                  <name>1</name>
19670                  <description>An error in this channel has occurred</description>
19671                  <value>#1</value>
19672                </enumeratedValue>
19673              </enumeratedValues>
19674            </field>
19675            <field>
19676              <name>ERR19</name>
19677              <description>Error In Channel 19</description>
19678              <bitOffset>19</bitOffset>
19679              <bitWidth>1</bitWidth>
19680              <access>read-write</access>
19681              <enumeratedValues>
19682                <enumeratedValue>
19683                  <name>0</name>
19684                  <description>An error in this channel has not occurred</description>
19685                  <value>#0</value>
19686                </enumeratedValue>
19687                <enumeratedValue>
19688                  <name>1</name>
19689                  <description>An error in this channel has occurred</description>
19690                  <value>#1</value>
19691                </enumeratedValue>
19692              </enumeratedValues>
19693            </field>
19694            <field>
19695              <name>ERR20</name>
19696              <description>Error In Channel 20</description>
19697              <bitOffset>20</bitOffset>
19698              <bitWidth>1</bitWidth>
19699              <access>read-write</access>
19700              <enumeratedValues>
19701                <enumeratedValue>
19702                  <name>0</name>
19703                  <description>An error in this channel has not occurred</description>
19704                  <value>#0</value>
19705                </enumeratedValue>
19706                <enumeratedValue>
19707                  <name>1</name>
19708                  <description>An error in this channel has occurred</description>
19709                  <value>#1</value>
19710                </enumeratedValue>
19711              </enumeratedValues>
19712            </field>
19713            <field>
19714              <name>ERR21</name>
19715              <description>Error In Channel 21</description>
19716              <bitOffset>21</bitOffset>
19717              <bitWidth>1</bitWidth>
19718              <access>read-write</access>
19719              <enumeratedValues>
19720                <enumeratedValue>
19721                  <name>0</name>
19722                  <description>An error in this channel has not occurred</description>
19723                  <value>#0</value>
19724                </enumeratedValue>
19725                <enumeratedValue>
19726                  <name>1</name>
19727                  <description>An error in this channel has occurred</description>
19728                  <value>#1</value>
19729                </enumeratedValue>
19730              </enumeratedValues>
19731            </field>
19732            <field>
19733              <name>ERR22</name>
19734              <description>Error In Channel 22</description>
19735              <bitOffset>22</bitOffset>
19736              <bitWidth>1</bitWidth>
19737              <access>read-write</access>
19738              <enumeratedValues>
19739                <enumeratedValue>
19740                  <name>0</name>
19741                  <description>An error in this channel has not occurred</description>
19742                  <value>#0</value>
19743                </enumeratedValue>
19744                <enumeratedValue>
19745                  <name>1</name>
19746                  <description>An error in this channel has occurred</description>
19747                  <value>#1</value>
19748                </enumeratedValue>
19749              </enumeratedValues>
19750            </field>
19751            <field>
19752              <name>ERR23</name>
19753              <description>Error In Channel 23</description>
19754              <bitOffset>23</bitOffset>
19755              <bitWidth>1</bitWidth>
19756              <access>read-write</access>
19757              <enumeratedValues>
19758                <enumeratedValue>
19759                  <name>0</name>
19760                  <description>An error in this channel has not occurred</description>
19761                  <value>#0</value>
19762                </enumeratedValue>
19763                <enumeratedValue>
19764                  <name>1</name>
19765                  <description>An error in this channel has occurred</description>
19766                  <value>#1</value>
19767                </enumeratedValue>
19768              </enumeratedValues>
19769            </field>
19770            <field>
19771              <name>ERR24</name>
19772              <description>Error In Channel 24</description>
19773              <bitOffset>24</bitOffset>
19774              <bitWidth>1</bitWidth>
19775              <access>read-write</access>
19776              <enumeratedValues>
19777                <enumeratedValue>
19778                  <name>0</name>
19779                  <description>An error in this channel has not occurred</description>
19780                  <value>#0</value>
19781                </enumeratedValue>
19782                <enumeratedValue>
19783                  <name>1</name>
19784                  <description>An error in this channel has occurred</description>
19785                  <value>#1</value>
19786                </enumeratedValue>
19787              </enumeratedValues>
19788            </field>
19789            <field>
19790              <name>ERR25</name>
19791              <description>Error In Channel 25</description>
19792              <bitOffset>25</bitOffset>
19793              <bitWidth>1</bitWidth>
19794              <access>read-write</access>
19795              <enumeratedValues>
19796                <enumeratedValue>
19797                  <name>0</name>
19798                  <description>An error in this channel has not occurred</description>
19799                  <value>#0</value>
19800                </enumeratedValue>
19801                <enumeratedValue>
19802                  <name>1</name>
19803                  <description>An error in this channel has occurred</description>
19804                  <value>#1</value>
19805                </enumeratedValue>
19806              </enumeratedValues>
19807            </field>
19808            <field>
19809              <name>ERR26</name>
19810              <description>Error In Channel 26</description>
19811              <bitOffset>26</bitOffset>
19812              <bitWidth>1</bitWidth>
19813              <access>read-write</access>
19814              <enumeratedValues>
19815                <enumeratedValue>
19816                  <name>0</name>
19817                  <description>An error in this channel has not occurred</description>
19818                  <value>#0</value>
19819                </enumeratedValue>
19820                <enumeratedValue>
19821                  <name>1</name>
19822                  <description>An error in this channel has occurred</description>
19823                  <value>#1</value>
19824                </enumeratedValue>
19825              </enumeratedValues>
19826            </field>
19827            <field>
19828              <name>ERR27</name>
19829              <description>Error In Channel 27</description>
19830              <bitOffset>27</bitOffset>
19831              <bitWidth>1</bitWidth>
19832              <access>read-write</access>
19833              <enumeratedValues>
19834                <enumeratedValue>
19835                  <name>0</name>
19836                  <description>An error in this channel has not occurred</description>
19837                  <value>#0</value>
19838                </enumeratedValue>
19839                <enumeratedValue>
19840                  <name>1</name>
19841                  <description>An error in this channel has occurred</description>
19842                  <value>#1</value>
19843                </enumeratedValue>
19844              </enumeratedValues>
19845            </field>
19846            <field>
19847              <name>ERR28</name>
19848              <description>Error In Channel 28</description>
19849              <bitOffset>28</bitOffset>
19850              <bitWidth>1</bitWidth>
19851              <access>read-write</access>
19852              <enumeratedValues>
19853                <enumeratedValue>
19854                  <name>0</name>
19855                  <description>An error in this channel has not occurred</description>
19856                  <value>#0</value>
19857                </enumeratedValue>
19858                <enumeratedValue>
19859                  <name>1</name>
19860                  <description>An error in this channel has occurred</description>
19861                  <value>#1</value>
19862                </enumeratedValue>
19863              </enumeratedValues>
19864            </field>
19865            <field>
19866              <name>ERR29</name>
19867              <description>Error In Channel 29</description>
19868              <bitOffset>29</bitOffset>
19869              <bitWidth>1</bitWidth>
19870              <access>read-write</access>
19871              <enumeratedValues>
19872                <enumeratedValue>
19873                  <name>0</name>
19874                  <description>An error in this channel has not occurred</description>
19875                  <value>#0</value>
19876                </enumeratedValue>
19877                <enumeratedValue>
19878                  <name>1</name>
19879                  <description>An error in this channel has occurred</description>
19880                  <value>#1</value>
19881                </enumeratedValue>
19882              </enumeratedValues>
19883            </field>
19884            <field>
19885              <name>ERR30</name>
19886              <description>Error In Channel 30</description>
19887              <bitOffset>30</bitOffset>
19888              <bitWidth>1</bitWidth>
19889              <access>read-write</access>
19890              <enumeratedValues>
19891                <enumeratedValue>
19892                  <name>0</name>
19893                  <description>An error in this channel has not occurred</description>
19894                  <value>#0</value>
19895                </enumeratedValue>
19896                <enumeratedValue>
19897                  <name>1</name>
19898                  <description>An error in this channel has occurred</description>
19899                  <value>#1</value>
19900                </enumeratedValue>
19901              </enumeratedValues>
19902            </field>
19903            <field>
19904              <name>ERR31</name>
19905              <description>Error In Channel 31</description>
19906              <bitOffset>31</bitOffset>
19907              <bitWidth>1</bitWidth>
19908              <access>read-write</access>
19909              <enumeratedValues>
19910                <enumeratedValue>
19911                  <name>0</name>
19912                  <description>An error in this channel has not occurred</description>
19913                  <value>#0</value>
19914                </enumeratedValue>
19915                <enumeratedValue>
19916                  <name>1</name>
19917                  <description>An error in this channel has occurred</description>
19918                  <value>#1</value>
19919                </enumeratedValue>
19920              </enumeratedValues>
19921            </field>
19922          </fields>
19923        </register>
19924        <register>
19925          <name>HRS</name>
19926          <description>Hardware Request Status Register</description>
19927          <addressOffset>0x34</addressOffset>
19928          <size>32</size>
19929          <access>read-only</access>
19930          <resetValue>0</resetValue>
19931          <resetMask>0xFFFFFFFF</resetMask>
19932          <fields>
19933            <field>
19934              <name>HRS0</name>
19935              <description>Hardware Request Status Channel 0</description>
19936              <bitOffset>0</bitOffset>
19937              <bitWidth>1</bitWidth>
19938              <access>read-only</access>
19939              <enumeratedValues>
19940                <enumeratedValue>
19941                  <name>0</name>
19942                  <description>A hardware service request for channel 0 is not present</description>
19943                  <value>#0</value>
19944                </enumeratedValue>
19945                <enumeratedValue>
19946                  <name>1</name>
19947                  <description>A hardware service request for channel 0 is present</description>
19948                  <value>#1</value>
19949                </enumeratedValue>
19950              </enumeratedValues>
19951            </field>
19952            <field>
19953              <name>HRS1</name>
19954              <description>Hardware Request Status Channel 1</description>
19955              <bitOffset>1</bitOffset>
19956              <bitWidth>1</bitWidth>
19957              <access>read-only</access>
19958              <enumeratedValues>
19959                <enumeratedValue>
19960                  <name>0</name>
19961                  <description>A hardware service request for channel 1 is not present</description>
19962                  <value>#0</value>
19963                </enumeratedValue>
19964                <enumeratedValue>
19965                  <name>1</name>
19966                  <description>A hardware service request for channel 1 is present</description>
19967                  <value>#1</value>
19968                </enumeratedValue>
19969              </enumeratedValues>
19970            </field>
19971            <field>
19972              <name>HRS2</name>
19973              <description>Hardware Request Status Channel 2</description>
19974              <bitOffset>2</bitOffset>
19975              <bitWidth>1</bitWidth>
19976              <access>read-only</access>
19977              <enumeratedValues>
19978                <enumeratedValue>
19979                  <name>0</name>
19980                  <description>A hardware service request for channel 2 is not present</description>
19981                  <value>#0</value>
19982                </enumeratedValue>
19983                <enumeratedValue>
19984                  <name>1</name>
19985                  <description>A hardware service request for channel 2 is present</description>
19986                  <value>#1</value>
19987                </enumeratedValue>
19988              </enumeratedValues>
19989            </field>
19990            <field>
19991              <name>HRS3</name>
19992              <description>Hardware Request Status Channel 3</description>
19993              <bitOffset>3</bitOffset>
19994              <bitWidth>1</bitWidth>
19995              <access>read-only</access>
19996              <enumeratedValues>
19997                <enumeratedValue>
19998                  <name>0</name>
19999                  <description>A hardware service request for channel 3 is not present</description>
20000                  <value>#0</value>
20001                </enumeratedValue>
20002                <enumeratedValue>
20003                  <name>1</name>
20004                  <description>A hardware service request for channel 3 is present</description>
20005                  <value>#1</value>
20006                </enumeratedValue>
20007              </enumeratedValues>
20008            </field>
20009            <field>
20010              <name>HRS4</name>
20011              <description>Hardware Request Status Channel 4</description>
20012              <bitOffset>4</bitOffset>
20013              <bitWidth>1</bitWidth>
20014              <access>read-only</access>
20015              <enumeratedValues>
20016                <enumeratedValue>
20017                  <name>0</name>
20018                  <description>A hardware service request for channel 4 is not present</description>
20019                  <value>#0</value>
20020                </enumeratedValue>
20021                <enumeratedValue>
20022                  <name>1</name>
20023                  <description>A hardware service request for channel 4 is present</description>
20024                  <value>#1</value>
20025                </enumeratedValue>
20026              </enumeratedValues>
20027            </field>
20028            <field>
20029              <name>HRS5</name>
20030              <description>Hardware Request Status Channel 5</description>
20031              <bitOffset>5</bitOffset>
20032              <bitWidth>1</bitWidth>
20033              <access>read-only</access>
20034              <enumeratedValues>
20035                <enumeratedValue>
20036                  <name>0</name>
20037                  <description>A hardware service request for channel 5 is not present</description>
20038                  <value>#0</value>
20039                </enumeratedValue>
20040                <enumeratedValue>
20041                  <name>1</name>
20042                  <description>A hardware service request for channel 5 is present</description>
20043                  <value>#1</value>
20044                </enumeratedValue>
20045              </enumeratedValues>
20046            </field>
20047            <field>
20048              <name>HRS6</name>
20049              <description>Hardware Request Status Channel 6</description>
20050              <bitOffset>6</bitOffset>
20051              <bitWidth>1</bitWidth>
20052              <access>read-only</access>
20053              <enumeratedValues>
20054                <enumeratedValue>
20055                  <name>0</name>
20056                  <description>A hardware service request for channel 6 is not present</description>
20057                  <value>#0</value>
20058                </enumeratedValue>
20059                <enumeratedValue>
20060                  <name>1</name>
20061                  <description>A hardware service request for channel 6 is present</description>
20062                  <value>#1</value>
20063                </enumeratedValue>
20064              </enumeratedValues>
20065            </field>
20066            <field>
20067              <name>HRS7</name>
20068              <description>Hardware Request Status Channel 7</description>
20069              <bitOffset>7</bitOffset>
20070              <bitWidth>1</bitWidth>
20071              <access>read-only</access>
20072              <enumeratedValues>
20073                <enumeratedValue>
20074                  <name>0</name>
20075                  <description>A hardware service request for channel 7 is not present</description>
20076                  <value>#0</value>
20077                </enumeratedValue>
20078                <enumeratedValue>
20079                  <name>1</name>
20080                  <description>A hardware service request for channel 7 is present</description>
20081                  <value>#1</value>
20082                </enumeratedValue>
20083              </enumeratedValues>
20084            </field>
20085            <field>
20086              <name>HRS8</name>
20087              <description>Hardware Request Status Channel 8</description>
20088              <bitOffset>8</bitOffset>
20089              <bitWidth>1</bitWidth>
20090              <access>read-only</access>
20091              <enumeratedValues>
20092                <enumeratedValue>
20093                  <name>0</name>
20094                  <description>A hardware service request for channel 8 is not present</description>
20095                  <value>#0</value>
20096                </enumeratedValue>
20097                <enumeratedValue>
20098                  <name>1</name>
20099                  <description>A hardware service request for channel 8 is present</description>
20100                  <value>#1</value>
20101                </enumeratedValue>
20102              </enumeratedValues>
20103            </field>
20104            <field>
20105              <name>HRS9</name>
20106              <description>Hardware Request Status Channel 9</description>
20107              <bitOffset>9</bitOffset>
20108              <bitWidth>1</bitWidth>
20109              <access>read-only</access>
20110              <enumeratedValues>
20111                <enumeratedValue>
20112                  <name>0</name>
20113                  <description>A hardware service request for channel 9 is not present</description>
20114                  <value>#0</value>
20115                </enumeratedValue>
20116                <enumeratedValue>
20117                  <name>1</name>
20118                  <description>A hardware service request for channel 9 is present</description>
20119                  <value>#1</value>
20120                </enumeratedValue>
20121              </enumeratedValues>
20122            </field>
20123            <field>
20124              <name>HRS10</name>
20125              <description>Hardware Request Status Channel 10</description>
20126              <bitOffset>10</bitOffset>
20127              <bitWidth>1</bitWidth>
20128              <access>read-only</access>
20129              <enumeratedValues>
20130                <enumeratedValue>
20131                  <name>0</name>
20132                  <description>A hardware service request for channel 10 is not present</description>
20133                  <value>#0</value>
20134                </enumeratedValue>
20135                <enumeratedValue>
20136                  <name>1</name>
20137                  <description>A hardware service request for channel 10 is present</description>
20138                  <value>#1</value>
20139                </enumeratedValue>
20140              </enumeratedValues>
20141            </field>
20142            <field>
20143              <name>HRS11</name>
20144              <description>Hardware Request Status Channel 11</description>
20145              <bitOffset>11</bitOffset>
20146              <bitWidth>1</bitWidth>
20147              <access>read-only</access>
20148              <enumeratedValues>
20149                <enumeratedValue>
20150                  <name>0</name>
20151                  <description>A hardware service request for channel 11 is not present</description>
20152                  <value>#0</value>
20153                </enumeratedValue>
20154                <enumeratedValue>
20155                  <name>1</name>
20156                  <description>A hardware service request for channel 11 is present</description>
20157                  <value>#1</value>
20158                </enumeratedValue>
20159              </enumeratedValues>
20160            </field>
20161            <field>
20162              <name>HRS12</name>
20163              <description>Hardware Request Status Channel 12</description>
20164              <bitOffset>12</bitOffset>
20165              <bitWidth>1</bitWidth>
20166              <access>read-only</access>
20167              <enumeratedValues>
20168                <enumeratedValue>
20169                  <name>0</name>
20170                  <description>A hardware service request for channel 12 is not present</description>
20171                  <value>#0</value>
20172                </enumeratedValue>
20173                <enumeratedValue>
20174                  <name>1</name>
20175                  <description>A hardware service request for channel 12 is present</description>
20176                  <value>#1</value>
20177                </enumeratedValue>
20178              </enumeratedValues>
20179            </field>
20180            <field>
20181              <name>HRS13</name>
20182              <description>Hardware Request Status Channel 13</description>
20183              <bitOffset>13</bitOffset>
20184              <bitWidth>1</bitWidth>
20185              <access>read-only</access>
20186              <enumeratedValues>
20187                <enumeratedValue>
20188                  <name>0</name>
20189                  <description>A hardware service request for channel 13 is not present</description>
20190                  <value>#0</value>
20191                </enumeratedValue>
20192                <enumeratedValue>
20193                  <name>1</name>
20194                  <description>A hardware service request for channel 13 is present</description>
20195                  <value>#1</value>
20196                </enumeratedValue>
20197              </enumeratedValues>
20198            </field>
20199            <field>
20200              <name>HRS14</name>
20201              <description>Hardware Request Status Channel 14</description>
20202              <bitOffset>14</bitOffset>
20203              <bitWidth>1</bitWidth>
20204              <access>read-only</access>
20205              <enumeratedValues>
20206                <enumeratedValue>
20207                  <name>0</name>
20208                  <description>A hardware service request for channel 14 is not present</description>
20209                  <value>#0</value>
20210                </enumeratedValue>
20211                <enumeratedValue>
20212                  <name>1</name>
20213                  <description>A hardware service request for channel 14 is present</description>
20214                  <value>#1</value>
20215                </enumeratedValue>
20216              </enumeratedValues>
20217            </field>
20218            <field>
20219              <name>HRS15</name>
20220              <description>Hardware Request Status Channel 15</description>
20221              <bitOffset>15</bitOffset>
20222              <bitWidth>1</bitWidth>
20223              <access>read-only</access>
20224              <enumeratedValues>
20225                <enumeratedValue>
20226                  <name>0</name>
20227                  <description>A hardware service request for channel 15 is not present</description>
20228                  <value>#0</value>
20229                </enumeratedValue>
20230                <enumeratedValue>
20231                  <name>1</name>
20232                  <description>A hardware service request for channel 15 is present</description>
20233                  <value>#1</value>
20234                </enumeratedValue>
20235              </enumeratedValues>
20236            </field>
20237            <field>
20238              <name>HRS16</name>
20239              <description>Hardware Request Status Channel 16</description>
20240              <bitOffset>16</bitOffset>
20241              <bitWidth>1</bitWidth>
20242              <access>read-only</access>
20243              <enumeratedValues>
20244                <enumeratedValue>
20245                  <name>0</name>
20246                  <description>A hardware service request for channel 16 is not present</description>
20247                  <value>#0</value>
20248                </enumeratedValue>
20249                <enumeratedValue>
20250                  <name>1</name>
20251                  <description>A hardware service request for channel 16 is present</description>
20252                  <value>#1</value>
20253                </enumeratedValue>
20254              </enumeratedValues>
20255            </field>
20256            <field>
20257              <name>HRS17</name>
20258              <description>Hardware Request Status Channel 17</description>
20259              <bitOffset>17</bitOffset>
20260              <bitWidth>1</bitWidth>
20261              <access>read-only</access>
20262              <enumeratedValues>
20263                <enumeratedValue>
20264                  <name>0</name>
20265                  <description>A hardware service request for channel 17 is not present</description>
20266                  <value>#0</value>
20267                </enumeratedValue>
20268                <enumeratedValue>
20269                  <name>1</name>
20270                  <description>A hardware service request for channel 17 is present</description>
20271                  <value>#1</value>
20272                </enumeratedValue>
20273              </enumeratedValues>
20274            </field>
20275            <field>
20276              <name>HRS18</name>
20277              <description>Hardware Request Status Channel 18</description>
20278              <bitOffset>18</bitOffset>
20279              <bitWidth>1</bitWidth>
20280              <access>read-only</access>
20281              <enumeratedValues>
20282                <enumeratedValue>
20283                  <name>0</name>
20284                  <description>A hardware service request for channel 18 is not present</description>
20285                  <value>#0</value>
20286                </enumeratedValue>
20287                <enumeratedValue>
20288                  <name>1</name>
20289                  <description>A hardware service request for channel 18 is present</description>
20290                  <value>#1</value>
20291                </enumeratedValue>
20292              </enumeratedValues>
20293            </field>
20294            <field>
20295              <name>HRS19</name>
20296              <description>Hardware Request Status Channel 19</description>
20297              <bitOffset>19</bitOffset>
20298              <bitWidth>1</bitWidth>
20299              <access>read-only</access>
20300              <enumeratedValues>
20301                <enumeratedValue>
20302                  <name>0</name>
20303                  <description>A hardware service request for channel 19 is not present</description>
20304                  <value>#0</value>
20305                </enumeratedValue>
20306                <enumeratedValue>
20307                  <name>1</name>
20308                  <description>A hardware service request for channel 19 is present</description>
20309                  <value>#1</value>
20310                </enumeratedValue>
20311              </enumeratedValues>
20312            </field>
20313            <field>
20314              <name>HRS20</name>
20315              <description>Hardware Request Status Channel 20</description>
20316              <bitOffset>20</bitOffset>
20317              <bitWidth>1</bitWidth>
20318              <access>read-only</access>
20319              <enumeratedValues>
20320                <enumeratedValue>
20321                  <name>0</name>
20322                  <description>A hardware service request for channel 20 is not present</description>
20323                  <value>#0</value>
20324                </enumeratedValue>
20325                <enumeratedValue>
20326                  <name>1</name>
20327                  <description>A hardware service request for channel 20 is present</description>
20328                  <value>#1</value>
20329                </enumeratedValue>
20330              </enumeratedValues>
20331            </field>
20332            <field>
20333              <name>HRS21</name>
20334              <description>Hardware Request Status Channel 21</description>
20335              <bitOffset>21</bitOffset>
20336              <bitWidth>1</bitWidth>
20337              <access>read-only</access>
20338              <enumeratedValues>
20339                <enumeratedValue>
20340                  <name>0</name>
20341                  <description>A hardware service request for channel 21 is not present</description>
20342                  <value>#0</value>
20343                </enumeratedValue>
20344                <enumeratedValue>
20345                  <name>1</name>
20346                  <description>A hardware service request for channel 21 is present</description>
20347                  <value>#1</value>
20348                </enumeratedValue>
20349              </enumeratedValues>
20350            </field>
20351            <field>
20352              <name>HRS22</name>
20353              <description>Hardware Request Status Channel 22</description>
20354              <bitOffset>22</bitOffset>
20355              <bitWidth>1</bitWidth>
20356              <access>read-only</access>
20357              <enumeratedValues>
20358                <enumeratedValue>
20359                  <name>0</name>
20360                  <description>A hardware service request for channel 22 is not present</description>
20361                  <value>#0</value>
20362                </enumeratedValue>
20363                <enumeratedValue>
20364                  <name>1</name>
20365                  <description>A hardware service request for channel 22 is present</description>
20366                  <value>#1</value>
20367                </enumeratedValue>
20368              </enumeratedValues>
20369            </field>
20370            <field>
20371              <name>HRS23</name>
20372              <description>Hardware Request Status Channel 23</description>
20373              <bitOffset>23</bitOffset>
20374              <bitWidth>1</bitWidth>
20375              <access>read-only</access>
20376              <enumeratedValues>
20377                <enumeratedValue>
20378                  <name>0</name>
20379                  <description>A hardware service request for channel 23 is not present</description>
20380                  <value>#0</value>
20381                </enumeratedValue>
20382                <enumeratedValue>
20383                  <name>1</name>
20384                  <description>A hardware service request for channel 23 is present</description>
20385                  <value>#1</value>
20386                </enumeratedValue>
20387              </enumeratedValues>
20388            </field>
20389            <field>
20390              <name>HRS24</name>
20391              <description>Hardware Request Status Channel 24</description>
20392              <bitOffset>24</bitOffset>
20393              <bitWidth>1</bitWidth>
20394              <access>read-only</access>
20395              <enumeratedValues>
20396                <enumeratedValue>
20397                  <name>0</name>
20398                  <description>A hardware service request for channel 24 is not present</description>
20399                  <value>#0</value>
20400                </enumeratedValue>
20401                <enumeratedValue>
20402                  <name>1</name>
20403                  <description>A hardware service request for channel 24 is present</description>
20404                  <value>#1</value>
20405                </enumeratedValue>
20406              </enumeratedValues>
20407            </field>
20408            <field>
20409              <name>HRS25</name>
20410              <description>Hardware Request Status Channel 25</description>
20411              <bitOffset>25</bitOffset>
20412              <bitWidth>1</bitWidth>
20413              <access>read-only</access>
20414              <enumeratedValues>
20415                <enumeratedValue>
20416                  <name>0</name>
20417                  <description>A hardware service request for channel 25 is not present</description>
20418                  <value>#0</value>
20419                </enumeratedValue>
20420                <enumeratedValue>
20421                  <name>1</name>
20422                  <description>A hardware service request for channel 25 is present</description>
20423                  <value>#1</value>
20424                </enumeratedValue>
20425              </enumeratedValues>
20426            </field>
20427            <field>
20428              <name>HRS26</name>
20429              <description>Hardware Request Status Channel 26</description>
20430              <bitOffset>26</bitOffset>
20431              <bitWidth>1</bitWidth>
20432              <access>read-only</access>
20433              <enumeratedValues>
20434                <enumeratedValue>
20435                  <name>0</name>
20436                  <description>A hardware service request for channel 26 is not present</description>
20437                  <value>#0</value>
20438                </enumeratedValue>
20439                <enumeratedValue>
20440                  <name>1</name>
20441                  <description>A hardware service request for channel 26 is present</description>
20442                  <value>#1</value>
20443                </enumeratedValue>
20444              </enumeratedValues>
20445            </field>
20446            <field>
20447              <name>HRS27</name>
20448              <description>Hardware Request Status Channel 27</description>
20449              <bitOffset>27</bitOffset>
20450              <bitWidth>1</bitWidth>
20451              <access>read-only</access>
20452              <enumeratedValues>
20453                <enumeratedValue>
20454                  <name>0</name>
20455                  <description>A hardware service request for channel 27 is not present</description>
20456                  <value>#0</value>
20457                </enumeratedValue>
20458                <enumeratedValue>
20459                  <name>1</name>
20460                  <description>A hardware service request for channel 27 is present</description>
20461                  <value>#1</value>
20462                </enumeratedValue>
20463              </enumeratedValues>
20464            </field>
20465            <field>
20466              <name>HRS28</name>
20467              <description>Hardware Request Status Channel 28</description>
20468              <bitOffset>28</bitOffset>
20469              <bitWidth>1</bitWidth>
20470              <access>read-only</access>
20471              <enumeratedValues>
20472                <enumeratedValue>
20473                  <name>0</name>
20474                  <description>A hardware service request for channel 28 is not present</description>
20475                  <value>#0</value>
20476                </enumeratedValue>
20477                <enumeratedValue>
20478                  <name>1</name>
20479                  <description>A hardware service request for channel 28 is present</description>
20480                  <value>#1</value>
20481                </enumeratedValue>
20482              </enumeratedValues>
20483            </field>
20484            <field>
20485              <name>HRS29</name>
20486              <description>Hardware Request Status Channel 29</description>
20487              <bitOffset>29</bitOffset>
20488              <bitWidth>1</bitWidth>
20489              <access>read-only</access>
20490              <enumeratedValues>
20491                <enumeratedValue>
20492                  <name>0</name>
20493                  <description>A hardware service request for channel 29 is not preset</description>
20494                  <value>#0</value>
20495                </enumeratedValue>
20496                <enumeratedValue>
20497                  <name>1</name>
20498                  <description>A hardware service request for channel 29 is present</description>
20499                  <value>#1</value>
20500                </enumeratedValue>
20501              </enumeratedValues>
20502            </field>
20503            <field>
20504              <name>HRS30</name>
20505              <description>Hardware Request Status Channel 30</description>
20506              <bitOffset>30</bitOffset>
20507              <bitWidth>1</bitWidth>
20508              <access>read-only</access>
20509              <enumeratedValues>
20510                <enumeratedValue>
20511                  <name>0</name>
20512                  <description>A hardware service request for channel 30 is not present</description>
20513                  <value>#0</value>
20514                </enumeratedValue>
20515                <enumeratedValue>
20516                  <name>1</name>
20517                  <description>A hardware service request for for channel 30 is present</description>
20518                  <value>#1</value>
20519                </enumeratedValue>
20520              </enumeratedValues>
20521            </field>
20522            <field>
20523              <name>HRS31</name>
20524              <description>Hardware Request Status Channel 31</description>
20525              <bitOffset>31</bitOffset>
20526              <bitWidth>1</bitWidth>
20527              <access>read-only</access>
20528              <enumeratedValues>
20529                <enumeratedValue>
20530                  <name>0</name>
20531                  <description>A hardware service request for channel 31 is not present</description>
20532                  <value>#0</value>
20533                </enumeratedValue>
20534                <enumeratedValue>
20535                  <name>1</name>
20536                  <description>A hardware service request for channel 31 is present</description>
20537                  <value>#1</value>
20538                </enumeratedValue>
20539              </enumeratedValues>
20540            </field>
20541          </fields>
20542        </register>
20543        <register>
20544          <name>EARS</name>
20545          <description>Enable Asynchronous Request in Stop Register</description>
20546          <addressOffset>0x44</addressOffset>
20547          <size>32</size>
20548          <access>read-write</access>
20549          <resetValue>0</resetValue>
20550          <resetMask>0xFFFFFFFF</resetMask>
20551          <fields>
20552            <field>
20553              <name>EDREQ_0</name>
20554              <description>Enable asynchronous DMA request in stop mode for channel 0.</description>
20555              <bitOffset>0</bitOffset>
20556              <bitWidth>1</bitWidth>
20557              <access>read-write</access>
20558              <enumeratedValues>
20559                <enumeratedValue>
20560                  <name>0</name>
20561                  <description>Disable asynchronous DMA request for channel 0.</description>
20562                  <value>#0</value>
20563                </enumeratedValue>
20564                <enumeratedValue>
20565                  <name>1</name>
20566                  <description>Enable asynchronous DMA request for channel 0.</description>
20567                  <value>#1</value>
20568                </enumeratedValue>
20569              </enumeratedValues>
20570            </field>
20571            <field>
20572              <name>EDREQ_1</name>
20573              <description>Enable asynchronous DMA request in stop mode for channel 1.</description>
20574              <bitOffset>1</bitOffset>
20575              <bitWidth>1</bitWidth>
20576              <access>read-write</access>
20577              <enumeratedValues>
20578                <enumeratedValue>
20579                  <name>0</name>
20580                  <description>Disable asynchronous DMA request for channel 1</description>
20581                  <value>#0</value>
20582                </enumeratedValue>
20583                <enumeratedValue>
20584                  <name>1</name>
20585                  <description>Enable asynchronous DMA request for channel 1.</description>
20586                  <value>#1</value>
20587                </enumeratedValue>
20588              </enumeratedValues>
20589            </field>
20590            <field>
20591              <name>EDREQ_2</name>
20592              <description>Enable asynchronous DMA request in stop mode for channel 2.</description>
20593              <bitOffset>2</bitOffset>
20594              <bitWidth>1</bitWidth>
20595              <access>read-write</access>
20596              <enumeratedValues>
20597                <enumeratedValue>
20598                  <name>0</name>
20599                  <description>Disable asynchronous DMA request for channel 2.</description>
20600                  <value>#0</value>
20601                </enumeratedValue>
20602                <enumeratedValue>
20603                  <name>1</name>
20604                  <description>Enable asynchronous DMA request for channel 2.</description>
20605                  <value>#1</value>
20606                </enumeratedValue>
20607              </enumeratedValues>
20608            </field>
20609            <field>
20610              <name>EDREQ_3</name>
20611              <description>Enable asynchronous DMA request in stop mode for channel 3.</description>
20612              <bitOffset>3</bitOffset>
20613              <bitWidth>1</bitWidth>
20614              <access>read-write</access>
20615              <enumeratedValues>
20616                <enumeratedValue>
20617                  <name>0</name>
20618                  <description>Disable asynchronous DMA request for channel 3.</description>
20619                  <value>#0</value>
20620                </enumeratedValue>
20621                <enumeratedValue>
20622                  <name>1</name>
20623                  <description>Enable asynchronous DMA request for channel 3.</description>
20624                  <value>#1</value>
20625                </enumeratedValue>
20626              </enumeratedValues>
20627            </field>
20628            <field>
20629              <name>EDREQ_4</name>
20630              <description>Enable asynchronous DMA request in stop mode for channel 4</description>
20631              <bitOffset>4</bitOffset>
20632              <bitWidth>1</bitWidth>
20633              <access>read-write</access>
20634              <enumeratedValues>
20635                <enumeratedValue>
20636                  <name>0</name>
20637                  <description>Disable asynchronous DMA request for channel 4.</description>
20638                  <value>#0</value>
20639                </enumeratedValue>
20640                <enumeratedValue>
20641                  <name>1</name>
20642                  <description>Enable asynchronous DMA request for channel 4.</description>
20643                  <value>#1</value>
20644                </enumeratedValue>
20645              </enumeratedValues>
20646            </field>
20647            <field>
20648              <name>EDREQ_5</name>
20649              <description>Enable asynchronous DMA request in stop mode for channel 5</description>
20650              <bitOffset>5</bitOffset>
20651              <bitWidth>1</bitWidth>
20652              <access>read-write</access>
20653              <enumeratedValues>
20654                <enumeratedValue>
20655                  <name>0</name>
20656                  <description>Disable asynchronous DMA request for channel 5.</description>
20657                  <value>#0</value>
20658                </enumeratedValue>
20659                <enumeratedValue>
20660                  <name>1</name>
20661                  <description>Enable asynchronous DMA request for channel 5.</description>
20662                  <value>#1</value>
20663                </enumeratedValue>
20664              </enumeratedValues>
20665            </field>
20666            <field>
20667              <name>EDREQ_6</name>
20668              <description>Enable asynchronous DMA request in stop mode for channel 6</description>
20669              <bitOffset>6</bitOffset>
20670              <bitWidth>1</bitWidth>
20671              <access>read-write</access>
20672              <enumeratedValues>
20673                <enumeratedValue>
20674                  <name>0</name>
20675                  <description>Disable asynchronous DMA request for channel 6.</description>
20676                  <value>#0</value>
20677                </enumeratedValue>
20678                <enumeratedValue>
20679                  <name>1</name>
20680                  <description>Enable asynchronous DMA request for channel 6.</description>
20681                  <value>#1</value>
20682                </enumeratedValue>
20683              </enumeratedValues>
20684            </field>
20685            <field>
20686              <name>EDREQ_7</name>
20687              <description>Enable asynchronous DMA request in stop mode for channel 7</description>
20688              <bitOffset>7</bitOffset>
20689              <bitWidth>1</bitWidth>
20690              <access>read-write</access>
20691              <enumeratedValues>
20692                <enumeratedValue>
20693                  <name>0</name>
20694                  <description>Disable asynchronous DMA request for channel 7.</description>
20695                  <value>#0</value>
20696                </enumeratedValue>
20697                <enumeratedValue>
20698                  <name>1</name>
20699                  <description>Enable asynchronous DMA request for channel 7.</description>
20700                  <value>#1</value>
20701                </enumeratedValue>
20702              </enumeratedValues>
20703            </field>
20704            <field>
20705              <name>EDREQ_8</name>
20706              <description>Enable asynchronous DMA request in stop mode for channel 8</description>
20707              <bitOffset>8</bitOffset>
20708              <bitWidth>1</bitWidth>
20709              <access>read-write</access>
20710              <enumeratedValues>
20711                <enumeratedValue>
20712                  <name>0</name>
20713                  <description>Disable asynchronous DMA request for channel 8.</description>
20714                  <value>#0</value>
20715                </enumeratedValue>
20716                <enumeratedValue>
20717                  <name>1</name>
20718                  <description>Enable asynchronous DMA request for channel 8.</description>
20719                  <value>#1</value>
20720                </enumeratedValue>
20721              </enumeratedValues>
20722            </field>
20723            <field>
20724              <name>EDREQ_9</name>
20725              <description>Enable asynchronous DMA request in stop mode for channel 9</description>
20726              <bitOffset>9</bitOffset>
20727              <bitWidth>1</bitWidth>
20728              <access>read-write</access>
20729              <enumeratedValues>
20730                <enumeratedValue>
20731                  <name>0</name>
20732                  <description>Disable asynchronous DMA request for channel 9.</description>
20733                  <value>#0</value>
20734                </enumeratedValue>
20735                <enumeratedValue>
20736                  <name>1</name>
20737                  <description>Enable asynchronous DMA request for channel 9.</description>
20738                  <value>#1</value>
20739                </enumeratedValue>
20740              </enumeratedValues>
20741            </field>
20742            <field>
20743              <name>EDREQ_10</name>
20744              <description>Enable asynchronous DMA request in stop mode for channel 10</description>
20745              <bitOffset>10</bitOffset>
20746              <bitWidth>1</bitWidth>
20747              <access>read-write</access>
20748              <enumeratedValues>
20749                <enumeratedValue>
20750                  <name>0</name>
20751                  <description>Disable asynchronous DMA request for channel 10.</description>
20752                  <value>#0</value>
20753                </enumeratedValue>
20754                <enumeratedValue>
20755                  <name>1</name>
20756                  <description>Enable asynchronous DMA request for channel 10.</description>
20757                  <value>#1</value>
20758                </enumeratedValue>
20759              </enumeratedValues>
20760            </field>
20761            <field>
20762              <name>EDREQ_11</name>
20763              <description>Enable asynchronous DMA request in stop mode for channel 11</description>
20764              <bitOffset>11</bitOffset>
20765              <bitWidth>1</bitWidth>
20766              <access>read-write</access>
20767              <enumeratedValues>
20768                <enumeratedValue>
20769                  <name>0</name>
20770                  <description>Disable asynchronous DMA request for channel 11.</description>
20771                  <value>#0</value>
20772                </enumeratedValue>
20773                <enumeratedValue>
20774                  <name>1</name>
20775                  <description>Enable asynchronous DMA request for channel 11.</description>
20776                  <value>#1</value>
20777                </enumeratedValue>
20778              </enumeratedValues>
20779            </field>
20780            <field>
20781              <name>EDREQ_12</name>
20782              <description>Enable asynchronous DMA request in stop mode for channel 12</description>
20783              <bitOffset>12</bitOffset>
20784              <bitWidth>1</bitWidth>
20785              <access>read-write</access>
20786              <enumeratedValues>
20787                <enumeratedValue>
20788                  <name>0</name>
20789                  <description>Disable asynchronous DMA request for channel 12.</description>
20790                  <value>#0</value>
20791                </enumeratedValue>
20792                <enumeratedValue>
20793                  <name>1</name>
20794                  <description>Enable asynchronous DMA request for channel 12.</description>
20795                  <value>#1</value>
20796                </enumeratedValue>
20797              </enumeratedValues>
20798            </field>
20799            <field>
20800              <name>EDREQ_13</name>
20801              <description>Enable asynchronous DMA request in stop mode for channel 13</description>
20802              <bitOffset>13</bitOffset>
20803              <bitWidth>1</bitWidth>
20804              <access>read-write</access>
20805              <enumeratedValues>
20806                <enumeratedValue>
20807                  <name>0</name>
20808                  <description>Disable asynchronous DMA request for channel 13.</description>
20809                  <value>#0</value>
20810                </enumeratedValue>
20811                <enumeratedValue>
20812                  <name>1</name>
20813                  <description>Enable asynchronous DMA request for channel 13.</description>
20814                  <value>#1</value>
20815                </enumeratedValue>
20816              </enumeratedValues>
20817            </field>
20818            <field>
20819              <name>EDREQ_14</name>
20820              <description>Enable asynchronous DMA request in stop mode for channel 14</description>
20821              <bitOffset>14</bitOffset>
20822              <bitWidth>1</bitWidth>
20823              <access>read-write</access>
20824              <enumeratedValues>
20825                <enumeratedValue>
20826                  <name>0</name>
20827                  <description>Disable asynchronous DMA request for channel 14.</description>
20828                  <value>#0</value>
20829                </enumeratedValue>
20830                <enumeratedValue>
20831                  <name>1</name>
20832                  <description>Enable asynchronous DMA request for channel 14.</description>
20833                  <value>#1</value>
20834                </enumeratedValue>
20835              </enumeratedValues>
20836            </field>
20837            <field>
20838              <name>EDREQ_15</name>
20839              <description>Enable asynchronous DMA request in stop mode for channel 15</description>
20840              <bitOffset>15</bitOffset>
20841              <bitWidth>1</bitWidth>
20842              <access>read-write</access>
20843              <enumeratedValues>
20844                <enumeratedValue>
20845                  <name>0</name>
20846                  <description>Disable asynchronous DMA request for channel 15.</description>
20847                  <value>#0</value>
20848                </enumeratedValue>
20849                <enumeratedValue>
20850                  <name>1</name>
20851                  <description>Enable asynchronous DMA request for channel 15.</description>
20852                  <value>#1</value>
20853                </enumeratedValue>
20854              </enumeratedValues>
20855            </field>
20856            <field>
20857              <name>EDREQ_16</name>
20858              <description>Enable asynchronous DMA request in stop mode for channel 16</description>
20859              <bitOffset>16</bitOffset>
20860              <bitWidth>1</bitWidth>
20861              <access>read-write</access>
20862              <enumeratedValues>
20863                <enumeratedValue>
20864                  <name>0</name>
20865                  <description>Disable asynchronous DMA request for channel 16</description>
20866                  <value>#0</value>
20867                </enumeratedValue>
20868                <enumeratedValue>
20869                  <name>1</name>
20870                  <description>Enable asynchronous DMA request for channel 16</description>
20871                  <value>#1</value>
20872                </enumeratedValue>
20873              </enumeratedValues>
20874            </field>
20875            <field>
20876              <name>EDREQ_17</name>
20877              <description>Enable asynchronous DMA request in stop mode for channel 17</description>
20878              <bitOffset>17</bitOffset>
20879              <bitWidth>1</bitWidth>
20880              <access>read-write</access>
20881              <enumeratedValues>
20882                <enumeratedValue>
20883                  <name>0</name>
20884                  <description>Disable asynchronous DMA request for channel 17</description>
20885                  <value>#0</value>
20886                </enumeratedValue>
20887                <enumeratedValue>
20888                  <name>1</name>
20889                  <description>Enable asynchronous DMA request for channel 17</description>
20890                  <value>#1</value>
20891                </enumeratedValue>
20892              </enumeratedValues>
20893            </field>
20894            <field>
20895              <name>EDREQ_18</name>
20896              <description>Enable asynchronous DMA request in stop mode for channel 18</description>
20897              <bitOffset>18</bitOffset>
20898              <bitWidth>1</bitWidth>
20899              <access>read-write</access>
20900              <enumeratedValues>
20901                <enumeratedValue>
20902                  <name>0</name>
20903                  <description>Disable asynchronous DMA request for channel 18</description>
20904                  <value>#0</value>
20905                </enumeratedValue>
20906                <enumeratedValue>
20907                  <name>1</name>
20908                  <description>Enable asynchronous DMA request for channel 18</description>
20909                  <value>#1</value>
20910                </enumeratedValue>
20911              </enumeratedValues>
20912            </field>
20913            <field>
20914              <name>EDREQ_19</name>
20915              <description>Enable asynchronous DMA request in stop mode for channel 19</description>
20916              <bitOffset>19</bitOffset>
20917              <bitWidth>1</bitWidth>
20918              <access>read-write</access>
20919              <enumeratedValues>
20920                <enumeratedValue>
20921                  <name>0</name>
20922                  <description>Disable asynchronous DMA request for channel 19</description>
20923                  <value>#0</value>
20924                </enumeratedValue>
20925                <enumeratedValue>
20926                  <name>1</name>
20927                  <description>Enable asynchronous DMA request for channel 19</description>
20928                  <value>#1</value>
20929                </enumeratedValue>
20930              </enumeratedValues>
20931            </field>
20932            <field>
20933              <name>EDREQ_20</name>
20934              <description>Enable asynchronous DMA request in stop mode for channel 20</description>
20935              <bitOffset>20</bitOffset>
20936              <bitWidth>1</bitWidth>
20937              <access>read-write</access>
20938              <enumeratedValues>
20939                <enumeratedValue>
20940                  <name>0</name>
20941                  <description>Disable asynchronous DMA request for channel 20</description>
20942                  <value>#0</value>
20943                </enumeratedValue>
20944                <enumeratedValue>
20945                  <name>1</name>
20946                  <description>Enable asynchronous DMA request for channel 20</description>
20947                  <value>#1</value>
20948                </enumeratedValue>
20949              </enumeratedValues>
20950            </field>
20951            <field>
20952              <name>EDREQ_21</name>
20953              <description>Enable asynchronous DMA request in stop mode for channel 21</description>
20954              <bitOffset>21</bitOffset>
20955              <bitWidth>1</bitWidth>
20956              <access>read-write</access>
20957              <enumeratedValues>
20958                <enumeratedValue>
20959                  <name>0</name>
20960                  <description>Disable asynchronous DMA request for channel 21</description>
20961                  <value>#0</value>
20962                </enumeratedValue>
20963                <enumeratedValue>
20964                  <name>1</name>
20965                  <description>Enable asynchronous DMA request for channel 21</description>
20966                  <value>#1</value>
20967                </enumeratedValue>
20968              </enumeratedValues>
20969            </field>
20970            <field>
20971              <name>EDREQ_22</name>
20972              <description>Enable asynchronous DMA request in stop mode for channel 22</description>
20973              <bitOffset>22</bitOffset>
20974              <bitWidth>1</bitWidth>
20975              <access>read-write</access>
20976              <enumeratedValues>
20977                <enumeratedValue>
20978                  <name>0</name>
20979                  <description>Disable asynchronous DMA request for channel 22</description>
20980                  <value>#0</value>
20981                </enumeratedValue>
20982                <enumeratedValue>
20983                  <name>1</name>
20984                  <description>Enable asynchronous DMA request for channel 22</description>
20985                  <value>#1</value>
20986                </enumeratedValue>
20987              </enumeratedValues>
20988            </field>
20989            <field>
20990              <name>EDREQ_23</name>
20991              <description>Enable asynchronous DMA request in stop mode for channel 23</description>
20992              <bitOffset>23</bitOffset>
20993              <bitWidth>1</bitWidth>
20994              <access>read-write</access>
20995              <enumeratedValues>
20996                <enumeratedValue>
20997                  <name>0</name>
20998                  <description>Disable asynchronous DMA request for channel 23</description>
20999                  <value>#0</value>
21000                </enumeratedValue>
21001                <enumeratedValue>
21002                  <name>1</name>
21003                  <description>Enable asynchronous DMA request for channel 23</description>
21004                  <value>#1</value>
21005                </enumeratedValue>
21006              </enumeratedValues>
21007            </field>
21008            <field>
21009              <name>EDREQ_24</name>
21010              <description>Enable asynchronous DMA request in stop mode for channel 24</description>
21011              <bitOffset>24</bitOffset>
21012              <bitWidth>1</bitWidth>
21013              <access>read-write</access>
21014              <enumeratedValues>
21015                <enumeratedValue>
21016                  <name>0</name>
21017                  <description>Disable asynchronous DMA request for channel 24</description>
21018                  <value>#0</value>
21019                </enumeratedValue>
21020                <enumeratedValue>
21021                  <name>1</name>
21022                  <description>Enable asynchronous DMA request for channel 24</description>
21023                  <value>#1</value>
21024                </enumeratedValue>
21025              </enumeratedValues>
21026            </field>
21027            <field>
21028              <name>EDREQ_25</name>
21029              <description>Enable asynchronous DMA request in stop mode for channel 25</description>
21030              <bitOffset>25</bitOffset>
21031              <bitWidth>1</bitWidth>
21032              <access>read-write</access>
21033              <enumeratedValues>
21034                <enumeratedValue>
21035                  <name>0</name>
21036                  <description>Disable asynchronous DMA request for channel 25</description>
21037                  <value>#0</value>
21038                </enumeratedValue>
21039                <enumeratedValue>
21040                  <name>1</name>
21041                  <description>Enable asynchronous DMA request for channel 25</description>
21042                  <value>#1</value>
21043                </enumeratedValue>
21044              </enumeratedValues>
21045            </field>
21046            <field>
21047              <name>EDREQ_26</name>
21048              <description>Enable asynchronous DMA request in stop mode for channel 26</description>
21049              <bitOffset>26</bitOffset>
21050              <bitWidth>1</bitWidth>
21051              <access>read-write</access>
21052              <enumeratedValues>
21053                <enumeratedValue>
21054                  <name>0</name>
21055                  <description>Disable asynchronous DMA request for channel 26</description>
21056                  <value>#0</value>
21057                </enumeratedValue>
21058                <enumeratedValue>
21059                  <name>1</name>
21060                  <description>Enable asynchronous DMA request for channel 26</description>
21061                  <value>#1</value>
21062                </enumeratedValue>
21063              </enumeratedValues>
21064            </field>
21065            <field>
21066              <name>EDREQ_27</name>
21067              <description>Enable asynchronous DMA request in stop mode for channel 27</description>
21068              <bitOffset>27</bitOffset>
21069              <bitWidth>1</bitWidth>
21070              <access>read-write</access>
21071              <enumeratedValues>
21072                <enumeratedValue>
21073                  <name>0</name>
21074                  <description>Disable asynchronous DMA request for channel 27</description>
21075                  <value>#0</value>
21076                </enumeratedValue>
21077                <enumeratedValue>
21078                  <name>1</name>
21079                  <description>Enable asynchronous DMA request for channel 27</description>
21080                  <value>#1</value>
21081                </enumeratedValue>
21082              </enumeratedValues>
21083            </field>
21084            <field>
21085              <name>EDREQ_28</name>
21086              <description>Enable asynchronous DMA request in stop mode for channel 28</description>
21087              <bitOffset>28</bitOffset>
21088              <bitWidth>1</bitWidth>
21089              <access>read-write</access>
21090              <enumeratedValues>
21091                <enumeratedValue>
21092                  <name>0</name>
21093                  <description>Disable asynchronous DMA request for channel 28</description>
21094                  <value>#0</value>
21095                </enumeratedValue>
21096                <enumeratedValue>
21097                  <name>1</name>
21098                  <description>Enable asynchronous DMA request for channel 28</description>
21099                  <value>#1</value>
21100                </enumeratedValue>
21101              </enumeratedValues>
21102            </field>
21103            <field>
21104              <name>EDREQ_29</name>
21105              <description>Enable asynchronous DMA request in stop mode for channel 29</description>
21106              <bitOffset>29</bitOffset>
21107              <bitWidth>1</bitWidth>
21108              <access>read-write</access>
21109              <enumeratedValues>
21110                <enumeratedValue>
21111                  <name>0</name>
21112                  <description>Disable asynchronous DMA request for channel 29</description>
21113                  <value>#0</value>
21114                </enumeratedValue>
21115                <enumeratedValue>
21116                  <name>1</name>
21117                  <description>Enable asynchronous DMA request for channel 29</description>
21118                  <value>#1</value>
21119                </enumeratedValue>
21120              </enumeratedValues>
21121            </field>
21122            <field>
21123              <name>EDREQ_30</name>
21124              <description>Enable asynchronous DMA request in stop mode for channel 30</description>
21125              <bitOffset>30</bitOffset>
21126              <bitWidth>1</bitWidth>
21127              <access>read-write</access>
21128              <enumeratedValues>
21129                <enumeratedValue>
21130                  <name>0</name>
21131                  <description>Disable asynchronous DMA request for channel 30</description>
21132                  <value>#0</value>
21133                </enumeratedValue>
21134                <enumeratedValue>
21135                  <name>1</name>
21136                  <description>Enable asynchronous DMA request for channel 30</description>
21137                  <value>#1</value>
21138                </enumeratedValue>
21139              </enumeratedValues>
21140            </field>
21141            <field>
21142              <name>EDREQ_31</name>
21143              <description>Enable asynchronous DMA request in stop mode for channel 31</description>
21144              <bitOffset>31</bitOffset>
21145              <bitWidth>1</bitWidth>
21146              <access>read-write</access>
21147              <enumeratedValues>
21148                <enumeratedValue>
21149                  <name>0</name>
21150                  <description>Disable asynchronous DMA request for channel 31</description>
21151                  <value>#0</value>
21152                </enumeratedValue>
21153                <enumeratedValue>
21154                  <name>1</name>
21155                  <description>Enable asynchronous DMA request for channel 31</description>
21156                  <value>#1</value>
21157                </enumeratedValue>
21158              </enumeratedValues>
21159            </field>
21160          </fields>
21161        </register>
21162        <register>
21163          <dim>32</dim>
21164          <dimIncrement>0x1</dimIncrement>
21165          <dimIndex>3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12,19,18,17,16,23,22,21,20,27,26,25,24,31,30,29,28</dimIndex>
21166          <name>DCHPRI%s</name>
21167          <description>Channel n Priority Register</description>
21168          <addressOffset>0x100</addressOffset>
21169          <size>8</size>
21170          <access>read-write</access>
21171          <resetValue>0</resetValue>
21172          <resetMask>0xFF</resetMask>
21173          <fields>
21174            <field>
21175              <name>CHPRI</name>
21176              <description>Channel n Arbitration Priority</description>
21177              <bitOffset>0</bitOffset>
21178              <bitWidth>4</bitWidth>
21179              <access>read-write</access>
21180            </field>
21181            <field>
21182              <name>GRPPRI</name>
21183              <description>Channel n Current Group Priority</description>
21184              <bitOffset>4</bitOffset>
21185              <bitWidth>2</bitWidth>
21186              <access>read-only</access>
21187            </field>
21188            <field>
21189              <name>DPA</name>
21190              <description>Disable Preempt Ability.</description>
21191              <bitOffset>6</bitOffset>
21192              <bitWidth>1</bitWidth>
21193              <access>read-write</access>
21194              <enumeratedValues>
21195                <enumeratedValue>
21196                  <name>0</name>
21197                  <description>Channel n can suspend a lower priority channel.</description>
21198                  <value>#0</value>
21199                </enumeratedValue>
21200                <enumeratedValue>
21201                  <name>1</name>
21202                  <description>Channel n cannot suspend any channel, regardless of channel priority.</description>
21203                  <value>#1</value>
21204                </enumeratedValue>
21205              </enumeratedValues>
21206            </field>
21207            <field>
21208              <name>ECP</name>
21209              <description>Enable Channel Preemption.</description>
21210              <bitOffset>7</bitOffset>
21211              <bitWidth>1</bitWidth>
21212              <access>read-write</access>
21213              <enumeratedValues>
21214                <enumeratedValue>
21215                  <name>0</name>
21216                  <description>Channel n cannot be suspended by a higher priority channel&apos;s service request.</description>
21217                  <value>#0</value>
21218                </enumeratedValue>
21219                <enumeratedValue>
21220                  <name>1</name>
21221                  <description>Channel n can be temporarily suspended by the service request of a higher priority channel.</description>
21222                  <value>#1</value>
21223                </enumeratedValue>
21224              </enumeratedValues>
21225            </field>
21226          </fields>
21227        </register>
21228        <register>
21229          <dim>32</dim>
21230          <dimIncrement>0x20</dimIncrement>
21231          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21232          <name>TCD%s_SADDR</name>
21233          <description>TCD Source Address</description>
21234          <addressOffset>0x1000</addressOffset>
21235          <size>32</size>
21236          <access>read-write</access>
21237          <resetValue>0</resetValue>
21238          <resetMask>0</resetMask>
21239          <fields>
21240            <field>
21241              <name>SADDR</name>
21242              <description>Source Address</description>
21243              <bitOffset>0</bitOffset>
21244              <bitWidth>32</bitWidth>
21245              <access>read-write</access>
21246            </field>
21247          </fields>
21248        </register>
21249        <register>
21250          <dim>32</dim>
21251          <dimIncrement>0x20</dimIncrement>
21252          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21253          <name>TCD%s_SOFF</name>
21254          <description>TCD Signed Source Address Offset</description>
21255          <addressOffset>0x1004</addressOffset>
21256          <size>16</size>
21257          <access>read-write</access>
21258          <resetValue>0</resetValue>
21259          <resetMask>0</resetMask>
21260          <fields>
21261            <field>
21262              <name>SOFF</name>
21263              <description>Source address signed offset</description>
21264              <bitOffset>0</bitOffset>
21265              <bitWidth>16</bitWidth>
21266              <access>read-write</access>
21267            </field>
21268          </fields>
21269        </register>
21270        <register>
21271          <dim>32</dim>
21272          <dimIncrement>0x20</dimIncrement>
21273          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21274          <name>TCD%s_ATTR</name>
21275          <description>TCD Transfer Attributes</description>
21276          <addressOffset>0x1006</addressOffset>
21277          <size>16</size>
21278          <access>read-write</access>
21279          <resetValue>0</resetValue>
21280          <resetMask>0</resetMask>
21281          <fields>
21282            <field>
21283              <name>DSIZE</name>
21284              <description>Destination data transfer size</description>
21285              <bitOffset>0</bitOffset>
21286              <bitWidth>3</bitWidth>
21287              <access>read-write</access>
21288            </field>
21289            <field>
21290              <name>DMOD</name>
21291              <description>Destination Address Modulo</description>
21292              <bitOffset>3</bitOffset>
21293              <bitWidth>5</bitWidth>
21294              <access>read-write</access>
21295            </field>
21296            <field>
21297              <name>SSIZE</name>
21298              <description>Source data transfer size</description>
21299              <bitOffset>8</bitOffset>
21300              <bitWidth>3</bitWidth>
21301              <access>read-write</access>
21302              <enumeratedValues>
21303                <enumeratedValue>
21304                  <name>000</name>
21305                  <description>8-bit</description>
21306                  <value>#000</value>
21307                </enumeratedValue>
21308                <enumeratedValue>
21309                  <name>001</name>
21310                  <description>16-bit</description>
21311                  <value>#001</value>
21312                </enumeratedValue>
21313                <enumeratedValue>
21314                  <name>010</name>
21315                  <description>32-bit</description>
21316                  <value>#010</value>
21317                </enumeratedValue>
21318                <enumeratedValue>
21319                  <name>100</name>
21320                  <description>16-byte burst</description>
21321                  <value>#100</value>
21322                </enumeratedValue>
21323                <enumeratedValue>
21324                  <name>101</name>
21325                  <description>32-byte burst</description>
21326                  <value>#101</value>
21327                </enumeratedValue>
21328              </enumeratedValues>
21329            </field>
21330            <field>
21331              <name>SMOD</name>
21332              <description>Source Address Modulo</description>
21333              <bitOffset>11</bitOffset>
21334              <bitWidth>5</bitWidth>
21335              <access>read-write</access>
21336              <enumeratedValues>
21337                <enumeratedValue>
21338                  <name>0</name>
21339                  <description>Source address modulo feature is disabled</description>
21340                  <value>#00000</value>
21341                </enumeratedValue>
21342              </enumeratedValues>
21343            </field>
21344          </fields>
21345        </register>
21346        <register>
21347          <dim>32</dim>
21348          <dimIncrement>0x20</dimIncrement>
21349          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21350          <name>TCD%s_NBYTES_MLNO</name>
21351          <description>TCD Minor Byte Count (Minor Loop Mapping Disabled)</description>
21352          <alternateGroup>DMA</alternateGroup>
21353          <addressOffset>0x1008</addressOffset>
21354          <size>32</size>
21355          <access>read-write</access>
21356          <resetValue>0</resetValue>
21357          <resetMask>0</resetMask>
21358          <fields>
21359            <field>
21360              <name>NBYTES</name>
21361              <description>Minor Byte Transfer Count</description>
21362              <bitOffset>0</bitOffset>
21363              <bitWidth>32</bitWidth>
21364              <access>read-write</access>
21365            </field>
21366          </fields>
21367        </register>
21368        <register>
21369          <dim>32</dim>
21370          <dimIncrement>0x20</dimIncrement>
21371          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21372          <name>TCD%s_NBYTES_MLOFFNO</name>
21373          <description>TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)</description>
21374          <alternateGroup>DMA</alternateGroup>
21375          <addressOffset>0x1008</addressOffset>
21376          <size>32</size>
21377          <access>read-write</access>
21378          <resetValue>0</resetValue>
21379          <resetMask>0</resetMask>
21380          <fields>
21381            <field>
21382              <name>NBYTES</name>
21383              <description>Minor Byte Transfer Count</description>
21384              <bitOffset>0</bitOffset>
21385              <bitWidth>30</bitWidth>
21386              <access>read-write</access>
21387            </field>
21388            <field>
21389              <name>DMLOE</name>
21390              <description>Destination Minor Loop Offset enable</description>
21391              <bitOffset>30</bitOffset>
21392              <bitWidth>1</bitWidth>
21393              <access>read-write</access>
21394              <enumeratedValues>
21395                <enumeratedValue>
21396                  <name>0</name>
21397                  <description>The minor loop offset is not applied to the DADDR</description>
21398                  <value>#0</value>
21399                </enumeratedValue>
21400                <enumeratedValue>
21401                  <name>1</name>
21402                  <description>The minor loop offset is applied to the DADDR</description>
21403                  <value>#1</value>
21404                </enumeratedValue>
21405              </enumeratedValues>
21406            </field>
21407            <field>
21408              <name>SMLOE</name>
21409              <description>Source Minor Loop Offset Enable</description>
21410              <bitOffset>31</bitOffset>
21411              <bitWidth>1</bitWidth>
21412              <access>read-write</access>
21413              <enumeratedValues>
21414                <enumeratedValue>
21415                  <name>0</name>
21416                  <description>The minor loop offset is not applied to the SADDR</description>
21417                  <value>#0</value>
21418                </enumeratedValue>
21419                <enumeratedValue>
21420                  <name>1</name>
21421                  <description>The minor loop offset is applied to the SADDR</description>
21422                  <value>#1</value>
21423                </enumeratedValue>
21424              </enumeratedValues>
21425            </field>
21426          </fields>
21427        </register>
21428        <register>
21429          <dim>32</dim>
21430          <dimIncrement>0x20</dimIncrement>
21431          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21432          <name>TCD%s_NBYTES_MLOFFYES</name>
21433          <description>TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)</description>
21434          <alternateGroup>DMA</alternateGroup>
21435          <addressOffset>0x1008</addressOffset>
21436          <size>32</size>
21437          <access>read-write</access>
21438          <resetValue>0</resetValue>
21439          <resetMask>0</resetMask>
21440          <fields>
21441            <field>
21442              <name>NBYTES</name>
21443              <description>Minor Byte Transfer Count</description>
21444              <bitOffset>0</bitOffset>
21445              <bitWidth>10</bitWidth>
21446              <access>read-write</access>
21447            </field>
21448            <field>
21449              <name>MLOFF</name>
21450              <description>If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes.</description>
21451              <bitOffset>10</bitOffset>
21452              <bitWidth>20</bitWidth>
21453              <access>read-write</access>
21454            </field>
21455            <field>
21456              <name>DMLOE</name>
21457              <description>Destination Minor Loop Offset enable</description>
21458              <bitOffset>30</bitOffset>
21459              <bitWidth>1</bitWidth>
21460              <access>read-write</access>
21461              <enumeratedValues>
21462                <enumeratedValue>
21463                  <name>0</name>
21464                  <description>The minor loop offset is not applied to the DADDR</description>
21465                  <value>#0</value>
21466                </enumeratedValue>
21467                <enumeratedValue>
21468                  <name>1</name>
21469                  <description>The minor loop offset is applied to the DADDR</description>
21470                  <value>#1</value>
21471                </enumeratedValue>
21472              </enumeratedValues>
21473            </field>
21474            <field>
21475              <name>SMLOE</name>
21476              <description>Source Minor Loop Offset Enable</description>
21477              <bitOffset>31</bitOffset>
21478              <bitWidth>1</bitWidth>
21479              <access>read-write</access>
21480              <enumeratedValues>
21481                <enumeratedValue>
21482                  <name>0</name>
21483                  <description>The minor loop offset is not applied to the SADDR</description>
21484                  <value>#0</value>
21485                </enumeratedValue>
21486                <enumeratedValue>
21487                  <name>1</name>
21488                  <description>The minor loop offset is applied to the SADDR</description>
21489                  <value>#1</value>
21490                </enumeratedValue>
21491              </enumeratedValues>
21492            </field>
21493          </fields>
21494        </register>
21495        <register>
21496          <dim>32</dim>
21497          <dimIncrement>0x20</dimIncrement>
21498          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21499          <name>TCD%s_SLAST</name>
21500          <description>TCD Last Source Address Adjustment</description>
21501          <addressOffset>0x100C</addressOffset>
21502          <size>32</size>
21503          <access>read-write</access>
21504          <resetValue>0</resetValue>
21505          <resetMask>0</resetMask>
21506          <fields>
21507            <field>
21508              <name>SLAST</name>
21509              <description>Last Source Address Adjustment</description>
21510              <bitOffset>0</bitOffset>
21511              <bitWidth>32</bitWidth>
21512              <access>read-write</access>
21513            </field>
21514          </fields>
21515        </register>
21516        <register>
21517          <dim>32</dim>
21518          <dimIncrement>0x20</dimIncrement>
21519          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21520          <name>TCD%s_DADDR</name>
21521          <description>TCD Destination Address</description>
21522          <addressOffset>0x1010</addressOffset>
21523          <size>32</size>
21524          <access>read-write</access>
21525          <resetValue>0</resetValue>
21526          <resetMask>0</resetMask>
21527          <fields>
21528            <field>
21529              <name>DADDR</name>
21530              <description>Destination Address</description>
21531              <bitOffset>0</bitOffset>
21532              <bitWidth>32</bitWidth>
21533              <access>read-write</access>
21534            </field>
21535          </fields>
21536        </register>
21537        <register>
21538          <dim>32</dim>
21539          <dimIncrement>0x20</dimIncrement>
21540          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21541          <name>TCD%s_DOFF</name>
21542          <description>TCD Signed Destination Address Offset</description>
21543          <addressOffset>0x1014</addressOffset>
21544          <size>16</size>
21545          <access>read-write</access>
21546          <resetValue>0</resetValue>
21547          <resetMask>0</resetMask>
21548          <fields>
21549            <field>
21550              <name>DOFF</name>
21551              <description>Destination Address Signed Offset</description>
21552              <bitOffset>0</bitOffset>
21553              <bitWidth>16</bitWidth>
21554              <access>read-write</access>
21555            </field>
21556          </fields>
21557        </register>
21558        <register>
21559          <dim>32</dim>
21560          <dimIncrement>0x20</dimIncrement>
21561          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21562          <name>TCD%s_CITER_ELINKNO</name>
21563          <description>TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)</description>
21564          <alternateGroup>DMA</alternateGroup>
21565          <addressOffset>0x1016</addressOffset>
21566          <size>16</size>
21567          <access>read-write</access>
21568          <resetValue>0</resetValue>
21569          <resetMask>0</resetMask>
21570          <fields>
21571            <field>
21572              <name>CITER</name>
21573              <description>Current Major Iteration Count</description>
21574              <bitOffset>0</bitOffset>
21575              <bitWidth>15</bitWidth>
21576              <access>read-write</access>
21577            </field>
21578            <field>
21579              <name>ELINK</name>
21580              <description>Enable channel-to-channel linking on minor-loop complete</description>
21581              <bitOffset>15</bitOffset>
21582              <bitWidth>1</bitWidth>
21583              <access>read-write</access>
21584              <enumeratedValues>
21585                <enumeratedValue>
21586                  <name>0</name>
21587                  <description>The channel-to-channel linking is disabled</description>
21588                  <value>#0</value>
21589                </enumeratedValue>
21590                <enumeratedValue>
21591                  <name>1</name>
21592                  <description>The channel-to-channel linking is enabled</description>
21593                  <value>#1</value>
21594                </enumeratedValue>
21595              </enumeratedValues>
21596            </field>
21597          </fields>
21598        </register>
21599        <register>
21600          <dim>32</dim>
21601          <dimIncrement>0x20</dimIncrement>
21602          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21603          <name>TCD%s_CITER_ELINKYES</name>
21604          <description>TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)</description>
21605          <alternateGroup>DMA</alternateGroup>
21606          <addressOffset>0x1016</addressOffset>
21607          <size>16</size>
21608          <access>read-write</access>
21609          <resetValue>0</resetValue>
21610          <resetMask>0</resetMask>
21611          <fields>
21612            <field>
21613              <name>CITER</name>
21614              <description>Current Major Iteration Count</description>
21615              <bitOffset>0</bitOffset>
21616              <bitWidth>9</bitWidth>
21617              <access>read-write</access>
21618            </field>
21619            <field>
21620              <name>LINKCH</name>
21621              <description>Minor Loop Link Channel Number</description>
21622              <bitOffset>9</bitOffset>
21623              <bitWidth>5</bitWidth>
21624              <access>read-write</access>
21625            </field>
21626            <field>
21627              <name>ELINK</name>
21628              <description>Enable channel-to-channel linking on minor-loop complete</description>
21629              <bitOffset>15</bitOffset>
21630              <bitWidth>1</bitWidth>
21631              <access>read-write</access>
21632              <enumeratedValues>
21633                <enumeratedValue>
21634                  <name>0</name>
21635                  <description>The channel-to-channel linking is disabled</description>
21636                  <value>#0</value>
21637                </enumeratedValue>
21638                <enumeratedValue>
21639                  <name>1</name>
21640                  <description>The channel-to-channel linking is enabled</description>
21641                  <value>#1</value>
21642                </enumeratedValue>
21643              </enumeratedValues>
21644            </field>
21645          </fields>
21646        </register>
21647        <register>
21648          <dim>32</dim>
21649          <dimIncrement>0x20</dimIncrement>
21650          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21651          <name>TCD%s_DLASTSGA</name>
21652          <description>TCD Last Destination Address Adjustment/Scatter Gather Address</description>
21653          <addressOffset>0x1018</addressOffset>
21654          <size>32</size>
21655          <access>read-write</access>
21656          <resetValue>0</resetValue>
21657          <resetMask>0</resetMask>
21658          <fields>
21659            <field>
21660              <name>DLASTSGA</name>
21661              <description>Destination last address adjustment or the memory address for the next transfer control descriptor to be loaded into this channel (scatter/gather)</description>
21662              <bitOffset>0</bitOffset>
21663              <bitWidth>32</bitWidth>
21664              <access>read-write</access>
21665            </field>
21666          </fields>
21667        </register>
21668        <register>
21669          <dim>32</dim>
21670          <dimIncrement>0x20</dimIncrement>
21671          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21672          <name>TCD%s_CSR</name>
21673          <description>TCD Control and Status</description>
21674          <addressOffset>0x101C</addressOffset>
21675          <size>16</size>
21676          <access>read-write</access>
21677          <resetValue>0</resetValue>
21678          <resetMask>0</resetMask>
21679          <fields>
21680            <field>
21681              <name>START</name>
21682              <description>Channel Start</description>
21683              <bitOffset>0</bitOffset>
21684              <bitWidth>1</bitWidth>
21685              <access>read-write</access>
21686              <enumeratedValues>
21687                <enumeratedValue>
21688                  <name>0</name>
21689                  <description>The channel is not explicitly started.</description>
21690                  <value>#0</value>
21691                </enumeratedValue>
21692                <enumeratedValue>
21693                  <name>1</name>
21694                  <description>The channel is explicitly started via a software initiated service request.</description>
21695                  <value>#1</value>
21696                </enumeratedValue>
21697              </enumeratedValues>
21698            </field>
21699            <field>
21700              <name>INTMAJOR</name>
21701              <description>Enable an interrupt when major iteration count completes.</description>
21702              <bitOffset>1</bitOffset>
21703              <bitWidth>1</bitWidth>
21704              <access>read-write</access>
21705              <enumeratedValues>
21706                <enumeratedValue>
21707                  <name>0</name>
21708                  <description>The end-of-major loop interrupt is disabled.</description>
21709                  <value>#0</value>
21710                </enumeratedValue>
21711                <enumeratedValue>
21712                  <name>1</name>
21713                  <description>The end-of-major loop interrupt is enabled.</description>
21714                  <value>#1</value>
21715                </enumeratedValue>
21716              </enumeratedValues>
21717            </field>
21718            <field>
21719              <name>INTHALF</name>
21720              <description>Enable an interrupt when major counter is half complete.</description>
21721              <bitOffset>2</bitOffset>
21722              <bitWidth>1</bitWidth>
21723              <access>read-write</access>
21724              <enumeratedValues>
21725                <enumeratedValue>
21726                  <name>0</name>
21727                  <description>The half-point interrupt is disabled.</description>
21728                  <value>#0</value>
21729                </enumeratedValue>
21730                <enumeratedValue>
21731                  <name>1</name>
21732                  <description>The half-point interrupt is enabled.</description>
21733                  <value>#1</value>
21734                </enumeratedValue>
21735              </enumeratedValues>
21736            </field>
21737            <field>
21738              <name>DREQ</name>
21739              <description>Disable Request</description>
21740              <bitOffset>3</bitOffset>
21741              <bitWidth>1</bitWidth>
21742              <access>read-write</access>
21743              <enumeratedValues>
21744                <enumeratedValue>
21745                  <name>0</name>
21746                  <description>The channel&apos;s ERQ bit is not affected.</description>
21747                  <value>#0</value>
21748                </enumeratedValue>
21749                <enumeratedValue>
21750                  <name>1</name>
21751                  <description>The channel&apos;s ERQ bit is cleared when the major loop is complete.</description>
21752                  <value>#1</value>
21753                </enumeratedValue>
21754              </enumeratedValues>
21755            </field>
21756            <field>
21757              <name>ESG</name>
21758              <description>Enable Scatter/Gather Processing</description>
21759              <bitOffset>4</bitOffset>
21760              <bitWidth>1</bitWidth>
21761              <access>read-write</access>
21762              <enumeratedValues>
21763                <enumeratedValue>
21764                  <name>0</name>
21765                  <description>The current channel&apos;s TCD is normal format.</description>
21766                  <value>#0</value>
21767                </enumeratedValue>
21768                <enumeratedValue>
21769                  <name>1</name>
21770                  <description>The current channel&apos;s TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution.</description>
21771                  <value>#1</value>
21772                </enumeratedValue>
21773              </enumeratedValues>
21774            </field>
21775            <field>
21776              <name>MAJORELINK</name>
21777              <description>Enable channel-to-channel linking on major loop complete</description>
21778              <bitOffset>5</bitOffset>
21779              <bitWidth>1</bitWidth>
21780              <access>read-write</access>
21781              <enumeratedValues>
21782                <enumeratedValue>
21783                  <name>0</name>
21784                  <description>The channel-to-channel linking is disabled.</description>
21785                  <value>#0</value>
21786                </enumeratedValue>
21787                <enumeratedValue>
21788                  <name>1</name>
21789                  <description>The channel-to-channel linking is enabled.</description>
21790                  <value>#1</value>
21791                </enumeratedValue>
21792              </enumeratedValues>
21793            </field>
21794            <field>
21795              <name>ACTIVE</name>
21796              <description>Channel Active</description>
21797              <bitOffset>6</bitOffset>
21798              <bitWidth>1</bitWidth>
21799              <access>read-write</access>
21800            </field>
21801            <field>
21802              <name>DONE</name>
21803              <description>Channel Done</description>
21804              <bitOffset>7</bitOffset>
21805              <bitWidth>1</bitWidth>
21806              <access>read-write</access>
21807            </field>
21808            <field>
21809              <name>MAJORLINKCH</name>
21810              <description>Major Loop Link Channel Number</description>
21811              <bitOffset>8</bitOffset>
21812              <bitWidth>5</bitWidth>
21813              <access>read-write</access>
21814            </field>
21815            <field>
21816              <name>BWC</name>
21817              <description>Bandwidth Control</description>
21818              <bitOffset>14</bitOffset>
21819              <bitWidth>2</bitWidth>
21820              <access>read-write</access>
21821              <enumeratedValues>
21822                <enumeratedValue>
21823                  <name>00</name>
21824                  <description>No eDMA engine stalls.</description>
21825                  <value>#00</value>
21826                </enumeratedValue>
21827                <enumeratedValue>
21828                  <name>10</name>
21829                  <description>eDMA engine stalls for 4 cycles after each R/W.</description>
21830                  <value>#10</value>
21831                </enumeratedValue>
21832                <enumeratedValue>
21833                  <name>11</name>
21834                  <description>eDMA engine stalls for 8 cycles after each R/W.</description>
21835                  <value>#11</value>
21836                </enumeratedValue>
21837              </enumeratedValues>
21838            </field>
21839          </fields>
21840        </register>
21841        <register>
21842          <dim>32</dim>
21843          <dimIncrement>0x20</dimIncrement>
21844          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21845          <name>TCD%s_BITER_ELINKNO</name>
21846          <description>TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)</description>
21847          <alternateGroup>DMA</alternateGroup>
21848          <addressOffset>0x101E</addressOffset>
21849          <size>16</size>
21850          <access>read-write</access>
21851          <resetValue>0</resetValue>
21852          <resetMask>0</resetMask>
21853          <fields>
21854            <field>
21855              <name>BITER</name>
21856              <description>Starting Major Iteration Count</description>
21857              <bitOffset>0</bitOffset>
21858              <bitWidth>15</bitWidth>
21859              <access>read-write</access>
21860            </field>
21861            <field>
21862              <name>ELINK</name>
21863              <description>Enables channel-to-channel linking on minor loop complete</description>
21864              <bitOffset>15</bitOffset>
21865              <bitWidth>1</bitWidth>
21866              <access>read-write</access>
21867              <enumeratedValues>
21868                <enumeratedValue>
21869                  <name>0</name>
21870                  <description>The channel-to-channel linking is disabled</description>
21871                  <value>#0</value>
21872                </enumeratedValue>
21873                <enumeratedValue>
21874                  <name>1</name>
21875                  <description>The channel-to-channel linking is enabled</description>
21876                  <value>#1</value>
21877                </enumeratedValue>
21878              </enumeratedValues>
21879            </field>
21880          </fields>
21881        </register>
21882        <register>
21883          <dim>32</dim>
21884          <dimIncrement>0x20</dimIncrement>
21885          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
21886          <name>TCD%s_BITER_ELINKYES</name>
21887          <description>TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)</description>
21888          <alternateGroup>DMA</alternateGroup>
21889          <addressOffset>0x101E</addressOffset>
21890          <size>16</size>
21891          <access>read-write</access>
21892          <resetValue>0</resetValue>
21893          <resetMask>0</resetMask>
21894          <fields>
21895            <field>
21896              <name>BITER</name>
21897              <description>Starting major iteration count</description>
21898              <bitOffset>0</bitOffset>
21899              <bitWidth>9</bitWidth>
21900              <access>read-write</access>
21901            </field>
21902            <field>
21903              <name>LINKCH</name>
21904              <description>Link Channel Number</description>
21905              <bitOffset>9</bitOffset>
21906              <bitWidth>5</bitWidth>
21907              <access>read-write</access>
21908            </field>
21909            <field>
21910              <name>ELINK</name>
21911              <description>Enables channel-to-channel linking on minor loop complete</description>
21912              <bitOffset>15</bitOffset>
21913              <bitWidth>1</bitWidth>
21914              <access>read-write</access>
21915              <enumeratedValues>
21916                <enumeratedValue>
21917                  <name>0</name>
21918                  <description>The channel-to-channel linking is disabled</description>
21919                  <value>#0</value>
21920                </enumeratedValue>
21921                <enumeratedValue>
21922                  <name>1</name>
21923                  <description>The channel-to-channel linking is enabled</description>
21924                  <value>#1</value>
21925                </enumeratedValue>
21926              </enumeratedValues>
21927            </field>
21928          </fields>
21929        </register>
21930      </registers>
21931    </peripheral>
21932    <peripheral>
21933      <name>FB</name>
21934      <description>FlexBus external bus interface</description>
21935      <prependToName>FB_</prependToName>
21936      <baseAddress>0x4000C000</baseAddress>
21937      <addressBlock>
21938        <offset>0</offset>
21939        <size>0x64</size>
21940        <usage>registers</usage>
21941      </addressBlock>
21942      <registers>
21943        <register>
21944          <dim>6</dim>
21945          <dimIncrement>0xC</dimIncrement>
21946          <dimIndex>0,1,2,3,4,5</dimIndex>
21947          <name>CSAR%s</name>
21948          <description>Chip Select Address Register</description>
21949          <addressOffset>0</addressOffset>
21950          <size>32</size>
21951          <access>read-write</access>
21952          <resetValue>0</resetValue>
21953          <resetMask>0xFFFFFFFF</resetMask>
21954          <fields>
21955            <field>
21956              <name>BA</name>
21957              <description>Base Address</description>
21958              <bitOffset>16</bitOffset>
21959              <bitWidth>16</bitWidth>
21960              <access>read-write</access>
21961            </field>
21962          </fields>
21963        </register>
21964        <register>
21965          <dim>6</dim>
21966          <dimIncrement>0xC</dimIncrement>
21967          <dimIndex>0,1,2,3,4,5</dimIndex>
21968          <name>CSMR%s</name>
21969          <description>Chip Select Mask Register</description>
21970          <addressOffset>0x4</addressOffset>
21971          <size>32</size>
21972          <access>read-write</access>
21973          <resetValue>0</resetValue>
21974          <resetMask>0xFFFFFFFF</resetMask>
21975          <fields>
21976            <field>
21977              <name>V</name>
21978              <description>Valid</description>
21979              <bitOffset>0</bitOffset>
21980              <bitWidth>1</bitWidth>
21981              <access>read-write</access>
21982              <enumeratedValues>
21983                <enumeratedValue>
21984                  <name>0</name>
21985                  <description>Chip-select is invalid.</description>
21986                  <value>#0</value>
21987                </enumeratedValue>
21988                <enumeratedValue>
21989                  <name>1</name>
21990                  <description>Chip-select is valid.</description>
21991                  <value>#1</value>
21992                </enumeratedValue>
21993              </enumeratedValues>
21994            </field>
21995            <field>
21996              <name>WP</name>
21997              <description>Write Protect</description>
21998              <bitOffset>8</bitOffset>
21999              <bitWidth>1</bitWidth>
22000              <access>read-write</access>
22001              <enumeratedValues>
22002                <enumeratedValue>
22003                  <name>0</name>
22004                  <description>Write accesses are allowed.</description>
22005                  <value>#0</value>
22006                </enumeratedValue>
22007                <enumeratedValue>
22008                  <name>1</name>
22009                  <description>Write accesses are not allowed. Attempting to write to the range of addresses for which the WP bit is set results in a bus error termination of the internal cycle and no external cycle.</description>
22010                  <value>#1</value>
22011                </enumeratedValue>
22012              </enumeratedValues>
22013            </field>
22014            <field>
22015              <name>BAM</name>
22016              <description>Base Address Mask</description>
22017              <bitOffset>16</bitOffset>
22018              <bitWidth>16</bitWidth>
22019              <access>read-write</access>
22020              <enumeratedValues>
22021                <enumeratedValue>
22022                  <name>0</name>
22023                  <description>The corresponding address bit in CSAR is used in the chip-select decode.</description>
22024                  <value>#0</value>
22025                </enumeratedValue>
22026                <enumeratedValue>
22027                  <name>1</name>
22028                  <description>The corresponding address bit in CSAR is a don&apos;t care in the chip-select decode.</description>
22029                  <value>#1</value>
22030                </enumeratedValue>
22031              </enumeratedValues>
22032            </field>
22033          </fields>
22034        </register>
22035        <register>
22036          <dim>6</dim>
22037          <dimIncrement>0xC</dimIncrement>
22038          <dimIndex>0,1,2,3,4,5</dimIndex>
22039          <name>CSCR%s</name>
22040          <description>Chip Select Control Register</description>
22041          <addressOffset>0x8</addressOffset>
22042          <size>32</size>
22043          <access>read-write</access>
22044          <resetValue>0x3FFC00</resetValue>
22045          <resetMask>0xFFFFFFFF</resetMask>
22046          <fields>
22047            <field>
22048              <name>BSTW</name>
22049              <description>Burst-Write Enable</description>
22050              <bitOffset>3</bitOffset>
22051              <bitWidth>1</bitWidth>
22052              <access>read-write</access>
22053              <enumeratedValues>
22054                <enumeratedValue>
22055                  <name>0</name>
22056                  <description>Disabled. Data exceeding the specified port size is broken into individual, port-sized, non-burst writes. For example, a 32-bit write to an 8-bit port takes four byte writes.</description>
22057                  <value>#0</value>
22058                </enumeratedValue>
22059                <enumeratedValue>
22060                  <name>1</name>
22061                  <description>Enabled. Enables burst write of data larger than the specified port size, including 32-bit writes to 8- and 16-bit ports, 16-bit writes to 8-bit ports, and line writes to 8-, 16-, and 32-bit ports.</description>
22062                  <value>#1</value>
22063                </enumeratedValue>
22064              </enumeratedValues>
22065            </field>
22066            <field>
22067              <name>BSTR</name>
22068              <description>Burst-Read Enable</description>
22069              <bitOffset>4</bitOffset>
22070              <bitWidth>1</bitWidth>
22071              <access>read-write</access>
22072              <enumeratedValues>
22073                <enumeratedValue>
22074                  <name>0</name>
22075                  <description>Disabled. Data exceeding the specified port size is broken into individual, port-sized, non-burst reads. For example, a 32-bit read from an 8-bit port is broken into four 8-bit reads.</description>
22076                  <value>#0</value>
22077                </enumeratedValue>
22078                <enumeratedValue>
22079                  <name>1</name>
22080                  <description>Enabled. Enables data burst reads larger than the specified port size, including 32-bit reads from 8- and 16-bit ports, 16-bit reads from 8-bit ports, and line reads from 8-, 16-, and 32-bit ports.</description>
22081                  <value>#1</value>
22082                </enumeratedValue>
22083              </enumeratedValues>
22084            </field>
22085            <field>
22086              <name>BEM</name>
22087              <description>Byte-Enable Mode</description>
22088              <bitOffset>5</bitOffset>
22089              <bitWidth>1</bitWidth>
22090              <access>read-write</access>
22091              <enumeratedValues>
22092                <enumeratedValue>
22093                  <name>0</name>
22094                  <description>FB_BE is asserted for data write only.</description>
22095                  <value>#0</value>
22096                </enumeratedValue>
22097                <enumeratedValue>
22098                  <name>1</name>
22099                  <description>FB_BE is asserted for data read and write accesses.</description>
22100                  <value>#1</value>
22101                </enumeratedValue>
22102              </enumeratedValues>
22103            </field>
22104            <field>
22105              <name>PS</name>
22106              <description>Port Size</description>
22107              <bitOffset>6</bitOffset>
22108              <bitWidth>2</bitWidth>
22109              <access>read-write</access>
22110              <enumeratedValues>
22111                <enumeratedValue>
22112                  <name>00</name>
22113                  <description>32-bit port size. Valid data is sampled and driven on FB_D[31:0].</description>
22114                  <value>#00</value>
22115                </enumeratedValue>
22116                <enumeratedValue>
22117                  <name>01</name>
22118                  <description>8-bit port size. Valid data is sampled and driven on FB_D[31:24] when BLS is 0b, or FB_D[7:0] when BLS is 1b.</description>
22119                  <value>#01</value>
22120                </enumeratedValue>
22121              </enumeratedValues>
22122            </field>
22123            <field>
22124              <name>AA</name>
22125              <description>Auto-Acknowledge Enable</description>
22126              <bitOffset>8</bitOffset>
22127              <bitWidth>1</bitWidth>
22128              <access>read-write</access>
22129              <enumeratedValues>
22130                <enumeratedValue>
22131                  <name>0</name>
22132                  <description>Disabled. No internal transfer acknowledge is asserted and the cycle is terminated externally.</description>
22133                  <value>#0</value>
22134                </enumeratedValue>
22135                <enumeratedValue>
22136                  <name>1</name>
22137                  <description>Enabled. Internal transfer acknowledge is asserted as specified by WS.</description>
22138                  <value>#1</value>
22139                </enumeratedValue>
22140              </enumeratedValues>
22141            </field>
22142            <field>
22143              <name>BLS</name>
22144              <description>Byte-Lane Shift</description>
22145              <bitOffset>9</bitOffset>
22146              <bitWidth>1</bitWidth>
22147              <access>read-write</access>
22148              <enumeratedValues>
22149                <enumeratedValue>
22150                  <name>0</name>
22151                  <description>Not shifted. Data is left-aligned on FB_AD.</description>
22152                  <value>#0</value>
22153                </enumeratedValue>
22154                <enumeratedValue>
22155                  <name>1</name>
22156                  <description>Shifted. Data is right-aligned on FB_AD.</description>
22157                  <value>#1</value>
22158                </enumeratedValue>
22159              </enumeratedValues>
22160            </field>
22161            <field>
22162              <name>WS</name>
22163              <description>Wait States</description>
22164              <bitOffset>10</bitOffset>
22165              <bitWidth>6</bitWidth>
22166              <access>read-write</access>
22167            </field>
22168            <field>
22169              <name>WRAH</name>
22170              <description>Write Address Hold or Deselect</description>
22171              <bitOffset>16</bitOffset>
22172              <bitWidth>2</bitWidth>
22173              <access>read-write</access>
22174              <enumeratedValues>
22175                <enumeratedValue>
22176                  <name>00</name>
22177                  <description>1 cycle (default for all but FB_CS0 )</description>
22178                  <value>#00</value>
22179                </enumeratedValue>
22180                <enumeratedValue>
22181                  <name>01</name>
22182                  <description>2 cycles</description>
22183                  <value>#01</value>
22184                </enumeratedValue>
22185                <enumeratedValue>
22186                  <name>10</name>
22187                  <description>3 cycles</description>
22188                  <value>#10</value>
22189                </enumeratedValue>
22190                <enumeratedValue>
22191                  <name>11</name>
22192                  <description>4 cycles (default for FB_CS0 )</description>
22193                  <value>#11</value>
22194                </enumeratedValue>
22195              </enumeratedValues>
22196            </field>
22197            <field>
22198              <name>RDAH</name>
22199              <description>Read Address Hold or Deselect</description>
22200              <bitOffset>18</bitOffset>
22201              <bitWidth>2</bitWidth>
22202              <access>read-write</access>
22203              <enumeratedValues>
22204                <enumeratedValue>
22205                  <name>00</name>
22206                  <description>When AA is 1b, 1 cycle. When AA is 0b, 0 cycles.</description>
22207                  <value>#00</value>
22208                </enumeratedValue>
22209                <enumeratedValue>
22210                  <name>01</name>
22211                  <description>When AA is 1b, 2 cycles. When AA is 0b, 1 cycle.</description>
22212                  <value>#01</value>
22213                </enumeratedValue>
22214                <enumeratedValue>
22215                  <name>10</name>
22216                  <description>When AA is 1b, 3 cycles. When AA is 0b, 2 cycles.</description>
22217                  <value>#10</value>
22218                </enumeratedValue>
22219                <enumeratedValue>
22220                  <name>11</name>
22221                  <description>When AA is 1b, 4 cycles. When AA is 0b, 3 cycles.</description>
22222                  <value>#11</value>
22223                </enumeratedValue>
22224              </enumeratedValues>
22225            </field>
22226            <field>
22227              <name>ASET</name>
22228              <description>Address Setup</description>
22229              <bitOffset>20</bitOffset>
22230              <bitWidth>2</bitWidth>
22231              <access>read-write</access>
22232              <enumeratedValues>
22233                <enumeratedValue>
22234                  <name>00</name>
22235                  <description>Assert FB_CSn on the first rising clock edge after the address is asserted (default for all but FB_CS0 ).</description>
22236                  <value>#00</value>
22237                </enumeratedValue>
22238                <enumeratedValue>
22239                  <name>01</name>
22240                  <description>Assert FB_CSn on the second rising clock edge after the address is asserted.</description>
22241                  <value>#01</value>
22242                </enumeratedValue>
22243                <enumeratedValue>
22244                  <name>10</name>
22245                  <description>Assert FB_CSn on the third rising clock edge after the address is asserted.</description>
22246                  <value>#10</value>
22247                </enumeratedValue>
22248                <enumeratedValue>
22249                  <name>11</name>
22250                  <description>Assert FB_CSn on the fourth rising clock edge after the address is asserted (default for FB_CS0 ).</description>
22251                  <value>#11</value>
22252                </enumeratedValue>
22253              </enumeratedValues>
22254            </field>
22255            <field>
22256              <name>EXTS</name>
22257              <description>Extended Transfer Start/Extended Address Latch Enable Controls how long FB_TS /FB_ALE is asserted.</description>
22258              <bitOffset>22</bitOffset>
22259              <bitWidth>1</bitWidth>
22260              <access>read-write</access>
22261              <enumeratedValues>
22262                <enumeratedValue>
22263                  <name>0</name>
22264                  <description>Disabled. FB_TS /FB_ALE asserts for one bus clock cycle.</description>
22265                  <value>#0</value>
22266                </enumeratedValue>
22267                <enumeratedValue>
22268                  <name>1</name>
22269                  <description>Enabled. FB_TS /FB_ALE remains asserted until the first positive clock edge after FB_CSn asserts.</description>
22270                  <value>#1</value>
22271                </enumeratedValue>
22272              </enumeratedValues>
22273            </field>
22274            <field>
22275              <name>SWSEN</name>
22276              <description>Secondary Wait State Enable</description>
22277              <bitOffset>23</bitOffset>
22278              <bitWidth>1</bitWidth>
22279              <access>read-write</access>
22280              <enumeratedValues>
22281                <enumeratedValue>
22282                  <name>0</name>
22283                  <description>Disabled. A number of wait states (specified by WS) are inserted before an internal transfer acknowledge is generated for all transfers.</description>
22284                  <value>#0</value>
22285                </enumeratedValue>
22286                <enumeratedValue>
22287                  <name>1</name>
22288                  <description>Enabled. A number of wait states (specified by SWS) are inserted before an internal transfer acknowledge is generated for burst transfer secondary terminations.</description>
22289                  <value>#1</value>
22290                </enumeratedValue>
22291              </enumeratedValues>
22292            </field>
22293            <field>
22294              <name>SWS</name>
22295              <description>Secondary Wait States</description>
22296              <bitOffset>26</bitOffset>
22297              <bitWidth>6</bitWidth>
22298              <access>read-write</access>
22299            </field>
22300          </fields>
22301        </register>
22302        <register>
22303          <name>CSPMCR</name>
22304          <description>Chip Select port Multiplexing Control Register</description>
22305          <addressOffset>0x60</addressOffset>
22306          <size>32</size>
22307          <access>read-write</access>
22308          <resetValue>0</resetValue>
22309          <resetMask>0xFFFFFFFF</resetMask>
22310          <fields>
22311            <field>
22312              <name>GROUP5</name>
22313              <description>FlexBus Signal Group 5 Multiplex control</description>
22314              <bitOffset>12</bitOffset>
22315              <bitWidth>4</bitWidth>
22316              <access>read-write</access>
22317              <enumeratedValues>
22318                <enumeratedValue>
22319                  <name>0000</name>
22320                  <description>FB_TA</description>
22321                  <value>#0000</value>
22322                </enumeratedValue>
22323                <enumeratedValue>
22324                  <name>0001</name>
22325                  <description>FB_CS3 . You must also write 1b to CSCR[AA].</description>
22326                  <value>#0001</value>
22327                </enumeratedValue>
22328                <enumeratedValue>
22329                  <name>0010</name>
22330                  <description>FB_BE_7_0 . You must also write 1b to CSCR[AA].</description>
22331                  <value>#0010</value>
22332                </enumeratedValue>
22333              </enumeratedValues>
22334            </field>
22335            <field>
22336              <name>GROUP4</name>
22337              <description>FlexBus Signal Group 4 Multiplex control</description>
22338              <bitOffset>16</bitOffset>
22339              <bitWidth>4</bitWidth>
22340              <access>read-write</access>
22341              <enumeratedValues>
22342                <enumeratedValue>
22343                  <name>0000</name>
22344                  <description>FB_TBST</description>
22345                  <value>#0000</value>
22346                </enumeratedValue>
22347                <enumeratedValue>
22348                  <name>0001</name>
22349                  <description>FB_CS2</description>
22350                  <value>#0001</value>
22351                </enumeratedValue>
22352                <enumeratedValue>
22353                  <name>0010</name>
22354                  <description>FB_BE_15_8</description>
22355                  <value>#0010</value>
22356                </enumeratedValue>
22357              </enumeratedValues>
22358            </field>
22359            <field>
22360              <name>GROUP3</name>
22361              <description>FlexBus Signal Group 3 Multiplex control</description>
22362              <bitOffset>20</bitOffset>
22363              <bitWidth>4</bitWidth>
22364              <access>read-write</access>
22365              <enumeratedValues>
22366                <enumeratedValue>
22367                  <name>0000</name>
22368                  <description>FB_CS5</description>
22369                  <value>#0000</value>
22370                </enumeratedValue>
22371                <enumeratedValue>
22372                  <name>0001</name>
22373                  <description>FB_TSIZ1</description>
22374                  <value>#0001</value>
22375                </enumeratedValue>
22376                <enumeratedValue>
22377                  <name>0010</name>
22378                  <description>FB_BE_23_16</description>
22379                  <value>#0010</value>
22380                </enumeratedValue>
22381              </enumeratedValues>
22382            </field>
22383            <field>
22384              <name>GROUP2</name>
22385              <description>FlexBus Signal Group 2 Multiplex control</description>
22386              <bitOffset>24</bitOffset>
22387              <bitWidth>4</bitWidth>
22388              <access>read-write</access>
22389              <enumeratedValues>
22390                <enumeratedValue>
22391                  <name>0000</name>
22392                  <description>FB_CS4</description>
22393                  <value>#0000</value>
22394                </enumeratedValue>
22395                <enumeratedValue>
22396                  <name>0001</name>
22397                  <description>FB_TSIZ0</description>
22398                  <value>#0001</value>
22399                </enumeratedValue>
22400                <enumeratedValue>
22401                  <name>0010</name>
22402                  <description>FB_BE_31_24</description>
22403                  <value>#0010</value>
22404                </enumeratedValue>
22405              </enumeratedValues>
22406            </field>
22407            <field>
22408              <name>GROUP1</name>
22409              <description>FlexBus Signal Group 1 Multiplex control</description>
22410              <bitOffset>28</bitOffset>
22411              <bitWidth>4</bitWidth>
22412              <access>read-write</access>
22413              <enumeratedValues>
22414                <enumeratedValue>
22415                  <name>0000</name>
22416                  <description>FB_ALE</description>
22417                  <value>#0000</value>
22418                </enumeratedValue>
22419                <enumeratedValue>
22420                  <name>0001</name>
22421                  <description>FB_CS1</description>
22422                  <value>#0001</value>
22423                </enumeratedValue>
22424                <enumeratedValue>
22425                  <name>0010</name>
22426                  <description>FB_TS</description>
22427                  <value>#0010</value>
22428                </enumeratedValue>
22429              </enumeratedValues>
22430            </field>
22431          </fields>
22432        </register>
22433      </registers>
22434    </peripheral>
22435    <peripheral>
22436      <name>SYSMPU</name>
22437      <description>Memory protection unit</description>
22438      <prependToName>MPU_</prependToName>
22439      <baseAddress>0x4000D000</baseAddress>
22440      <addressBlock>
22441        <offset>0</offset>
22442        <size>0x830</size>
22443        <usage>registers</usage>
22444      </addressBlock>
22445      <registers>
22446        <register>
22447          <name>CESR</name>
22448          <description>Control/Error Status Register</description>
22449          <addressOffset>0</addressOffset>
22450          <size>32</size>
22451          <access>read-write</access>
22452          <resetValue>0x815101</resetValue>
22453          <resetMask>0xFFFFFFFF</resetMask>
22454          <fields>
22455            <field>
22456              <name>VLD</name>
22457              <description>Valid</description>
22458              <bitOffset>0</bitOffset>
22459              <bitWidth>1</bitWidth>
22460              <access>read-write</access>
22461              <enumeratedValues>
22462                <enumeratedValue>
22463                  <name>0</name>
22464                  <description>MPU is disabled. All accesses from all bus masters are allowed.</description>
22465                  <value>#0</value>
22466                </enumeratedValue>
22467                <enumeratedValue>
22468                  <name>1</name>
22469                  <description>MPU is enabled</description>
22470                  <value>#1</value>
22471                </enumeratedValue>
22472              </enumeratedValues>
22473            </field>
22474            <field>
22475              <name>NRGD</name>
22476              <description>Number Of Region Descriptors</description>
22477              <bitOffset>8</bitOffset>
22478              <bitWidth>4</bitWidth>
22479              <access>read-only</access>
22480              <enumeratedValues>
22481                <enumeratedValue>
22482                  <name>0000</name>
22483                  <description>8 region descriptors</description>
22484                  <value>#0000</value>
22485                </enumeratedValue>
22486                <enumeratedValue>
22487                  <name>0001</name>
22488                  <description>12 region descriptors</description>
22489                  <value>#0001</value>
22490                </enumeratedValue>
22491                <enumeratedValue>
22492                  <name>0010</name>
22493                  <description>16 region descriptors</description>
22494                  <value>#0010</value>
22495                </enumeratedValue>
22496              </enumeratedValues>
22497            </field>
22498            <field>
22499              <name>NSP</name>
22500              <description>Number Of Slave Ports</description>
22501              <bitOffset>12</bitOffset>
22502              <bitWidth>4</bitWidth>
22503              <access>read-only</access>
22504            </field>
22505            <field>
22506              <name>HRL</name>
22507              <description>Hardware Revision Level</description>
22508              <bitOffset>16</bitOffset>
22509              <bitWidth>4</bitWidth>
22510              <access>read-only</access>
22511            </field>
22512            <field>
22513              <name>SPERR</name>
22514              <description>Slave Port n Error</description>
22515              <bitOffset>27</bitOffset>
22516              <bitWidth>5</bitWidth>
22517              <access>read-write</access>
22518              <enumeratedValues>
22519                <enumeratedValue>
22520                  <name>0</name>
22521                  <description>No error has occurred for slave port n.</description>
22522                  <value>#00000</value>
22523                </enumeratedValue>
22524                <enumeratedValue>
22525                  <name>1</name>
22526                  <description>An error has occurred for slave port n.</description>
22527                  <value>#00001</value>
22528                </enumeratedValue>
22529              </enumeratedValues>
22530            </field>
22531          </fields>
22532        </register>
22533        <register>
22534          <dim>5</dim>
22535          <dimIncrement>0x8</dimIncrement>
22536          <dimIndex>0,1,2,3,4</dimIndex>
22537          <name>EAR%s</name>
22538          <description>Error Address Register, slave port n</description>
22539          <addressOffset>0x10</addressOffset>
22540          <size>32</size>
22541          <access>read-only</access>
22542          <resetValue>0</resetValue>
22543          <resetMask>0xFFFFFFFF</resetMask>
22544          <fields>
22545            <field>
22546              <name>EADDR</name>
22547              <description>Error Address</description>
22548              <bitOffset>0</bitOffset>
22549              <bitWidth>32</bitWidth>
22550              <access>read-only</access>
22551            </field>
22552          </fields>
22553        </register>
22554        <register>
22555          <dim>5</dim>
22556          <dimIncrement>0x8</dimIncrement>
22557          <dimIndex>0,1,2,3,4</dimIndex>
22558          <name>EDR%s</name>
22559          <description>Error Detail Register, slave port n</description>
22560          <addressOffset>0x14</addressOffset>
22561          <size>32</size>
22562          <access>read-only</access>
22563          <resetValue>0</resetValue>
22564          <resetMask>0xFFFFFFFF</resetMask>
22565          <fields>
22566            <field>
22567              <name>ERW</name>
22568              <description>Error Read/Write</description>
22569              <bitOffset>0</bitOffset>
22570              <bitWidth>1</bitWidth>
22571              <access>read-only</access>
22572              <enumeratedValues>
22573                <enumeratedValue>
22574                  <name>0</name>
22575                  <description>Read</description>
22576                  <value>#0</value>
22577                </enumeratedValue>
22578                <enumeratedValue>
22579                  <name>1</name>
22580                  <description>Write</description>
22581                  <value>#1</value>
22582                </enumeratedValue>
22583              </enumeratedValues>
22584            </field>
22585            <field>
22586              <name>EATTR</name>
22587              <description>Error Attributes</description>
22588              <bitOffset>1</bitOffset>
22589              <bitWidth>3</bitWidth>
22590              <access>read-only</access>
22591              <enumeratedValues>
22592                <enumeratedValue>
22593                  <name>000</name>
22594                  <description>User mode, instruction access</description>
22595                  <value>#000</value>
22596                </enumeratedValue>
22597                <enumeratedValue>
22598                  <name>001</name>
22599                  <description>User mode, data access</description>
22600                  <value>#001</value>
22601                </enumeratedValue>
22602                <enumeratedValue>
22603                  <name>010</name>
22604                  <description>Supervisor mode, instruction access</description>
22605                  <value>#010</value>
22606                </enumeratedValue>
22607                <enumeratedValue>
22608                  <name>011</name>
22609                  <description>Supervisor mode, data access</description>
22610                  <value>#011</value>
22611                </enumeratedValue>
22612              </enumeratedValues>
22613            </field>
22614            <field>
22615              <name>EMN</name>
22616              <description>Error Master Number</description>
22617              <bitOffset>4</bitOffset>
22618              <bitWidth>4</bitWidth>
22619              <access>read-only</access>
22620            </field>
22621            <field>
22622              <name>EPID</name>
22623              <description>Error Process Identification</description>
22624              <bitOffset>8</bitOffset>
22625              <bitWidth>8</bitWidth>
22626              <access>read-only</access>
22627            </field>
22628            <field>
22629              <name>EACD</name>
22630              <description>Error Access Control Detail</description>
22631              <bitOffset>16</bitOffset>
22632              <bitWidth>16</bitWidth>
22633              <access>read-only</access>
22634            </field>
22635          </fields>
22636        </register>
22637        <register>
22638          <dim>12</dim>
22639          <dimIncrement>0x10</dimIncrement>
22640          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11</dimIndex>
22641          <name>RGD%s_WORD0</name>
22642          <description>Region Descriptor n, Word 0</description>
22643          <addressOffset>0x400</addressOffset>
22644          <size>32</size>
22645          <access>read-write</access>
22646          <resetValue>0</resetValue>
22647          <resetMask>0xFFFFFFFF</resetMask>
22648          <fields>
22649            <field>
22650              <name>SRTADDR</name>
22651              <description>Start Address</description>
22652              <bitOffset>5</bitOffset>
22653              <bitWidth>27</bitWidth>
22654              <access>read-write</access>
22655            </field>
22656          </fields>
22657        </register>
22658        <register>
22659          <dim>12</dim>
22660          <dimIncrement>0x10</dimIncrement>
22661          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11</dimIndex>
22662          <name>RGD%s_WORD1</name>
22663          <description>Region Descriptor n, Word 1</description>
22664          <addressOffset>0x404</addressOffset>
22665          <size>32</size>
22666          <access>read-write</access>
22667          <resetValue>0xFFFFFFFF</resetValue>
22668          <resetMask>0xFFFFFFFF</resetMask>
22669          <fields>
22670            <field>
22671              <name>ENDADDR</name>
22672              <description>End Address</description>
22673              <bitOffset>5</bitOffset>
22674              <bitWidth>27</bitWidth>
22675              <access>read-write</access>
22676            </field>
22677          </fields>
22678        </register>
22679        <register>
22680          <dim>12</dim>
22681          <dimIncrement>0x10</dimIncrement>
22682          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11</dimIndex>
22683          <name>RGD%s_WORD2</name>
22684          <description>Region Descriptor n, Word 2</description>
22685          <addressOffset>0x408</addressOffset>
22686          <size>32</size>
22687          <access>read-write</access>
22688          <resetValue>0x61F7DF</resetValue>
22689          <resetMask>0xFFFFFFFF</resetMask>
22690          <fields>
22691            <field>
22692              <name>M0UM</name>
22693              <description>Bus Master 0 User Mode Access Control</description>
22694              <bitOffset>0</bitOffset>
22695              <bitWidth>3</bitWidth>
22696              <access>read-write</access>
22697            </field>
22698            <field>
22699              <name>M0SM</name>
22700              <description>Bus Master 0 Supervisor Mode Access Control</description>
22701              <bitOffset>3</bitOffset>
22702              <bitWidth>2</bitWidth>
22703              <access>read-write</access>
22704            </field>
22705            <field>
22706              <name>M0PE</name>
22707              <description>Bus Master 0 Process Identifier enable</description>
22708              <bitOffset>5</bitOffset>
22709              <bitWidth>1</bitWidth>
22710              <access>read-write</access>
22711            </field>
22712            <field>
22713              <name>M1UM</name>
22714              <description>Bus Master 1 User Mode Access Control</description>
22715              <bitOffset>6</bitOffset>
22716              <bitWidth>3</bitWidth>
22717              <access>read-write</access>
22718            </field>
22719            <field>
22720              <name>M1SM</name>
22721              <description>Bus Master 1 Supervisor Mode Access Control</description>
22722              <bitOffset>9</bitOffset>
22723              <bitWidth>2</bitWidth>
22724              <access>read-write</access>
22725            </field>
22726            <field>
22727              <name>M1PE</name>
22728              <description>Bus Master 1 Process Identifier enable</description>
22729              <bitOffset>11</bitOffset>
22730              <bitWidth>1</bitWidth>
22731              <access>read-write</access>
22732            </field>
22733            <field>
22734              <name>M2UM</name>
22735              <description>Bus Master 2 User Mode Access control</description>
22736              <bitOffset>12</bitOffset>
22737              <bitWidth>3</bitWidth>
22738              <access>read-write</access>
22739            </field>
22740            <field>
22741              <name>M2SM</name>
22742              <description>Bus Master 2 Supervisor Mode Access Control</description>
22743              <bitOffset>15</bitOffset>
22744              <bitWidth>2</bitWidth>
22745              <access>read-write</access>
22746            </field>
22747            <field>
22748              <name>M2PE</name>
22749              <description>Bus Master 2 Process Identifier Enable</description>
22750              <bitOffset>17</bitOffset>
22751              <bitWidth>1</bitWidth>
22752              <access>read-write</access>
22753            </field>
22754            <field>
22755              <name>M3UM</name>
22756              <description>Bus Master 3 User Mode Access Control</description>
22757              <bitOffset>18</bitOffset>
22758              <bitWidth>3</bitWidth>
22759              <access>read-write</access>
22760              <enumeratedValues>
22761                <enumeratedValue>
22762                  <name>0</name>
22763                  <description>An attempted access of that mode may be terminated with an access error (if not allowed by another descriptor) and the access not performed.</description>
22764                  <value>#000</value>
22765                </enumeratedValue>
22766                <enumeratedValue>
22767                  <name>1</name>
22768                  <description>Allows the given access type to occur</description>
22769                  <value>#001</value>
22770                </enumeratedValue>
22771              </enumeratedValues>
22772            </field>
22773            <field>
22774              <name>M3SM</name>
22775              <description>Bus Master 3 Supervisor Mode Access Control</description>
22776              <bitOffset>21</bitOffset>
22777              <bitWidth>2</bitWidth>
22778              <access>read-write</access>
22779              <enumeratedValues>
22780                <enumeratedValue>
22781                  <name>00</name>
22782                  <description>r/w/x; read, write and execute allowed</description>
22783                  <value>#00</value>
22784                </enumeratedValue>
22785                <enumeratedValue>
22786                  <name>01</name>
22787                  <description>r/x; read and execute allowed, but no write</description>
22788                  <value>#01</value>
22789                </enumeratedValue>
22790                <enumeratedValue>
22791                  <name>10</name>
22792                  <description>r/w; read and write allowed, but no execute</description>
22793                  <value>#10</value>
22794                </enumeratedValue>
22795                <enumeratedValue>
22796                  <name>11</name>
22797                  <description>Same as User mode defined in M3UM</description>
22798                  <value>#11</value>
22799                </enumeratedValue>
22800              </enumeratedValues>
22801            </field>
22802            <field>
22803              <name>M3PE</name>
22804              <description>Bus Master 3 Process Identifier Enable</description>
22805              <bitOffset>23</bitOffset>
22806              <bitWidth>1</bitWidth>
22807              <access>read-write</access>
22808              <enumeratedValues>
22809                <enumeratedValue>
22810                  <name>0</name>
22811                  <description>Do not include the process identifier in the evaluation</description>
22812                  <value>#0</value>
22813                </enumeratedValue>
22814                <enumeratedValue>
22815                  <name>1</name>
22816                  <description>Include the process identifier and mask (RGDn_WORD3) in the region hit evaluation</description>
22817                  <value>#1</value>
22818                </enumeratedValue>
22819              </enumeratedValues>
22820            </field>
22821            <field>
22822              <name>M4WE</name>
22823              <description>Bus Master 4 Write Enable</description>
22824              <bitOffset>24</bitOffset>
22825              <bitWidth>1</bitWidth>
22826              <access>read-write</access>
22827              <enumeratedValues>
22828                <enumeratedValue>
22829                  <name>0</name>
22830                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
22831                  <value>#0</value>
22832                </enumeratedValue>
22833                <enumeratedValue>
22834                  <name>1</name>
22835                  <description>Bus master 4 writes allowed</description>
22836                  <value>#1</value>
22837                </enumeratedValue>
22838              </enumeratedValues>
22839            </field>
22840            <field>
22841              <name>M4RE</name>
22842              <description>Bus Master 4 Read Enable</description>
22843              <bitOffset>25</bitOffset>
22844              <bitWidth>1</bitWidth>
22845              <access>read-write</access>
22846              <enumeratedValues>
22847                <enumeratedValue>
22848                  <name>0</name>
22849                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
22850                  <value>#0</value>
22851                </enumeratedValue>
22852                <enumeratedValue>
22853                  <name>1</name>
22854                  <description>Bus master 4 reads allowed</description>
22855                  <value>#1</value>
22856                </enumeratedValue>
22857              </enumeratedValues>
22858            </field>
22859            <field>
22860              <name>M5WE</name>
22861              <description>Bus Master 5 Write Enable</description>
22862              <bitOffset>26</bitOffset>
22863              <bitWidth>1</bitWidth>
22864              <access>read-write</access>
22865              <enumeratedValues>
22866                <enumeratedValue>
22867                  <name>0</name>
22868                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
22869                  <value>#0</value>
22870                </enumeratedValue>
22871                <enumeratedValue>
22872                  <name>1</name>
22873                  <description>Bus master 5 writes allowed</description>
22874                  <value>#1</value>
22875                </enumeratedValue>
22876              </enumeratedValues>
22877            </field>
22878            <field>
22879              <name>M5RE</name>
22880              <description>Bus Master 5 Read Enable</description>
22881              <bitOffset>27</bitOffset>
22882              <bitWidth>1</bitWidth>
22883              <access>read-write</access>
22884              <enumeratedValues>
22885                <enumeratedValue>
22886                  <name>0</name>
22887                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
22888                  <value>#0</value>
22889                </enumeratedValue>
22890                <enumeratedValue>
22891                  <name>1</name>
22892                  <description>Bus master 5 reads allowed</description>
22893                  <value>#1</value>
22894                </enumeratedValue>
22895              </enumeratedValues>
22896            </field>
22897            <field>
22898              <name>M6WE</name>
22899              <description>Bus Master 6 Write Enable</description>
22900              <bitOffset>28</bitOffset>
22901              <bitWidth>1</bitWidth>
22902              <access>read-write</access>
22903              <enumeratedValues>
22904                <enumeratedValue>
22905                  <name>0</name>
22906                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
22907                  <value>#0</value>
22908                </enumeratedValue>
22909                <enumeratedValue>
22910                  <name>1</name>
22911                  <description>Bus master 6 writes allowed</description>
22912                  <value>#1</value>
22913                </enumeratedValue>
22914              </enumeratedValues>
22915            </field>
22916            <field>
22917              <name>M6RE</name>
22918              <description>Bus Master 6 Read Enable</description>
22919              <bitOffset>29</bitOffset>
22920              <bitWidth>1</bitWidth>
22921              <access>read-write</access>
22922              <enumeratedValues>
22923                <enumeratedValue>
22924                  <name>0</name>
22925                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
22926                  <value>#0</value>
22927                </enumeratedValue>
22928                <enumeratedValue>
22929                  <name>1</name>
22930                  <description>Bus master 6 reads allowed</description>
22931                  <value>#1</value>
22932                </enumeratedValue>
22933              </enumeratedValues>
22934            </field>
22935            <field>
22936              <name>M7WE</name>
22937              <description>Bus Master 7 Write Enable</description>
22938              <bitOffset>30</bitOffset>
22939              <bitWidth>1</bitWidth>
22940              <access>read-write</access>
22941              <enumeratedValues>
22942                <enumeratedValue>
22943                  <name>0</name>
22944                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
22945                  <value>#0</value>
22946                </enumeratedValue>
22947                <enumeratedValue>
22948                  <name>1</name>
22949                  <description>Bus master 7 writes allowed</description>
22950                  <value>#1</value>
22951                </enumeratedValue>
22952              </enumeratedValues>
22953            </field>
22954            <field>
22955              <name>M7RE</name>
22956              <description>Bus Master 7 Read Enable</description>
22957              <bitOffset>31</bitOffset>
22958              <bitWidth>1</bitWidth>
22959              <access>read-write</access>
22960              <enumeratedValues>
22961                <enumeratedValue>
22962                  <name>0</name>
22963                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
22964                  <value>#0</value>
22965                </enumeratedValue>
22966                <enumeratedValue>
22967                  <name>1</name>
22968                  <description>Bus master 7 reads allowed</description>
22969                  <value>#1</value>
22970                </enumeratedValue>
22971              </enumeratedValues>
22972            </field>
22973          </fields>
22974        </register>
22975        <register>
22976          <dim>12</dim>
22977          <dimIncrement>0x10</dimIncrement>
22978          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11</dimIndex>
22979          <name>RGD%s_WORD3</name>
22980          <description>Region Descriptor n, Word 3</description>
22981          <addressOffset>0x40C</addressOffset>
22982          <size>32</size>
22983          <access>read-write</access>
22984          <resetValue>0x1</resetValue>
22985          <resetMask>0xFFFFFFFF</resetMask>
22986          <fields>
22987            <field>
22988              <name>VLD</name>
22989              <description>Valid</description>
22990              <bitOffset>0</bitOffset>
22991              <bitWidth>1</bitWidth>
22992              <access>read-write</access>
22993              <enumeratedValues>
22994                <enumeratedValue>
22995                  <name>0</name>
22996                  <description>Region descriptor is invalid</description>
22997                  <value>#0</value>
22998                </enumeratedValue>
22999                <enumeratedValue>
23000                  <name>1</name>
23001                  <description>Region descriptor is valid</description>
23002                  <value>#1</value>
23003                </enumeratedValue>
23004              </enumeratedValues>
23005            </field>
23006            <field>
23007              <name>PIDMASK</name>
23008              <description>Process Identifier Mask</description>
23009              <bitOffset>16</bitOffset>
23010              <bitWidth>8</bitWidth>
23011              <access>read-write</access>
23012            </field>
23013            <field>
23014              <name>PID</name>
23015              <description>Process Identifier</description>
23016              <bitOffset>24</bitOffset>
23017              <bitWidth>8</bitWidth>
23018              <access>read-write</access>
23019            </field>
23020          </fields>
23021        </register>
23022        <register>
23023          <dim>12</dim>
23024          <dimIncrement>0x4</dimIncrement>
23025          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11</dimIndex>
23026          <name>RGDAAC%s</name>
23027          <description>Region Descriptor Alternate Access Control n</description>
23028          <addressOffset>0x800</addressOffset>
23029          <size>32</size>
23030          <access>read-write</access>
23031          <resetValue>0x61F7DF</resetValue>
23032          <resetMask>0xFFFFFFFF</resetMask>
23033          <fields>
23034            <field>
23035              <name>M0UM</name>
23036              <description>Bus Master 0 User Mode Access Control</description>
23037              <bitOffset>0</bitOffset>
23038              <bitWidth>3</bitWidth>
23039              <access>read-write</access>
23040            </field>
23041            <field>
23042              <name>M0SM</name>
23043              <description>Bus Master 0 Supervisor Mode Access Control</description>
23044              <bitOffset>3</bitOffset>
23045              <bitWidth>2</bitWidth>
23046              <access>read-write</access>
23047            </field>
23048            <field>
23049              <name>M0PE</name>
23050              <description>Bus Master 0 Process Identifier Enable</description>
23051              <bitOffset>5</bitOffset>
23052              <bitWidth>1</bitWidth>
23053              <access>read-write</access>
23054            </field>
23055            <field>
23056              <name>M1UM</name>
23057              <description>Bus Master 1 User Mode Access Control</description>
23058              <bitOffset>6</bitOffset>
23059              <bitWidth>3</bitWidth>
23060              <access>read-write</access>
23061            </field>
23062            <field>
23063              <name>M1SM</name>
23064              <description>Bus Master 1 Supervisor Mode Access Control</description>
23065              <bitOffset>9</bitOffset>
23066              <bitWidth>2</bitWidth>
23067              <access>read-write</access>
23068            </field>
23069            <field>
23070              <name>M1PE</name>
23071              <description>Bus Master 1 Process Identifier Enable</description>
23072              <bitOffset>11</bitOffset>
23073              <bitWidth>1</bitWidth>
23074              <access>read-write</access>
23075            </field>
23076            <field>
23077              <name>M2UM</name>
23078              <description>Bus Master 2 User Mode Access Control</description>
23079              <bitOffset>12</bitOffset>
23080              <bitWidth>3</bitWidth>
23081              <access>read-write</access>
23082            </field>
23083            <field>
23084              <name>M2SM</name>
23085              <description>Bus Master 2 Supervisor Mode Access Control</description>
23086              <bitOffset>15</bitOffset>
23087              <bitWidth>2</bitWidth>
23088              <access>read-write</access>
23089            </field>
23090            <field>
23091              <name>M2PE</name>
23092              <description>Bus Master 2 Process Identifier Enable</description>
23093              <bitOffset>17</bitOffset>
23094              <bitWidth>1</bitWidth>
23095              <access>read-write</access>
23096            </field>
23097            <field>
23098              <name>M3UM</name>
23099              <description>Bus Master 3 User Mode Access Control</description>
23100              <bitOffset>18</bitOffset>
23101              <bitWidth>3</bitWidth>
23102              <access>read-write</access>
23103              <enumeratedValues>
23104                <enumeratedValue>
23105                  <name>0</name>
23106                  <description>An attempted access of that mode may be terminated with an access error (if not allowed by another descriptor) and the access not performed.</description>
23107                  <value>#000</value>
23108                </enumeratedValue>
23109                <enumeratedValue>
23110                  <name>1</name>
23111                  <description>Allows the given access type to occur</description>
23112                  <value>#001</value>
23113                </enumeratedValue>
23114              </enumeratedValues>
23115            </field>
23116            <field>
23117              <name>M3SM</name>
23118              <description>Bus Master 3 Supervisor Mode Access Control</description>
23119              <bitOffset>21</bitOffset>
23120              <bitWidth>2</bitWidth>
23121              <access>read-write</access>
23122              <enumeratedValues>
23123                <enumeratedValue>
23124                  <name>00</name>
23125                  <description>r/w/x; read, write and execute allowed</description>
23126                  <value>#00</value>
23127                </enumeratedValue>
23128                <enumeratedValue>
23129                  <name>01</name>
23130                  <description>r/x; read and execute allowed, but no write</description>
23131                  <value>#01</value>
23132                </enumeratedValue>
23133                <enumeratedValue>
23134                  <name>10</name>
23135                  <description>r/w; read and write allowed, but no execute</description>
23136                  <value>#10</value>
23137                </enumeratedValue>
23138                <enumeratedValue>
23139                  <name>11</name>
23140                  <description>Same as User mode defined in M3UM</description>
23141                  <value>#11</value>
23142                </enumeratedValue>
23143              </enumeratedValues>
23144            </field>
23145            <field>
23146              <name>M3PE</name>
23147              <description>Bus Master 3 Process Identifier Enable</description>
23148              <bitOffset>23</bitOffset>
23149              <bitWidth>1</bitWidth>
23150              <access>read-write</access>
23151              <enumeratedValues>
23152                <enumeratedValue>
23153                  <name>0</name>
23154                  <description>Do not include the process identifier in the evaluation</description>
23155                  <value>#0</value>
23156                </enumeratedValue>
23157                <enumeratedValue>
23158                  <name>1</name>
23159                  <description>Include the process identifier and mask (RGDn.RGDAAC) in the region hit evaluation</description>
23160                  <value>#1</value>
23161                </enumeratedValue>
23162              </enumeratedValues>
23163            </field>
23164            <field>
23165              <name>M4WE</name>
23166              <description>Bus Master 4 Write Enable</description>
23167              <bitOffset>24</bitOffset>
23168              <bitWidth>1</bitWidth>
23169              <access>read-write</access>
23170              <enumeratedValues>
23171                <enumeratedValue>
23172                  <name>0</name>
23173                  <description>Bus master 4 writes terminate with an access error and the write is not performed</description>
23174                  <value>#0</value>
23175                </enumeratedValue>
23176                <enumeratedValue>
23177                  <name>1</name>
23178                  <description>Bus master 4 writes allowed</description>
23179                  <value>#1</value>
23180                </enumeratedValue>
23181              </enumeratedValues>
23182            </field>
23183            <field>
23184              <name>M4RE</name>
23185              <description>Bus Master 4 Read Enable</description>
23186              <bitOffset>25</bitOffset>
23187              <bitWidth>1</bitWidth>
23188              <access>read-write</access>
23189              <enumeratedValues>
23190                <enumeratedValue>
23191                  <name>0</name>
23192                  <description>Bus master 4 reads terminate with an access error and the read is not performed</description>
23193                  <value>#0</value>
23194                </enumeratedValue>
23195                <enumeratedValue>
23196                  <name>1</name>
23197                  <description>Bus master 4 reads allowed</description>
23198                  <value>#1</value>
23199                </enumeratedValue>
23200              </enumeratedValues>
23201            </field>
23202            <field>
23203              <name>M5WE</name>
23204              <description>Bus Master 5 Write Enable</description>
23205              <bitOffset>26</bitOffset>
23206              <bitWidth>1</bitWidth>
23207              <access>read-write</access>
23208              <enumeratedValues>
23209                <enumeratedValue>
23210                  <name>0</name>
23211                  <description>Bus master 5 writes terminate with an access error and the write is not performed</description>
23212                  <value>#0</value>
23213                </enumeratedValue>
23214                <enumeratedValue>
23215                  <name>1</name>
23216                  <description>Bus master 5 writes allowed</description>
23217                  <value>#1</value>
23218                </enumeratedValue>
23219              </enumeratedValues>
23220            </field>
23221            <field>
23222              <name>M5RE</name>
23223              <description>Bus Master 5 Read Enable</description>
23224              <bitOffset>27</bitOffset>
23225              <bitWidth>1</bitWidth>
23226              <access>read-write</access>
23227              <enumeratedValues>
23228                <enumeratedValue>
23229                  <name>0</name>
23230                  <description>Bus master 5 reads terminate with an access error and the read is not performed</description>
23231                  <value>#0</value>
23232                </enumeratedValue>
23233                <enumeratedValue>
23234                  <name>1</name>
23235                  <description>Bus master 5 reads allowed</description>
23236                  <value>#1</value>
23237                </enumeratedValue>
23238              </enumeratedValues>
23239            </field>
23240            <field>
23241              <name>M6WE</name>
23242              <description>Bus Master 6 Write Enable</description>
23243              <bitOffset>28</bitOffset>
23244              <bitWidth>1</bitWidth>
23245              <access>read-write</access>
23246              <enumeratedValues>
23247                <enumeratedValue>
23248                  <name>0</name>
23249                  <description>Bus master 6 writes terminate with an access error and the write is not performed</description>
23250                  <value>#0</value>
23251                </enumeratedValue>
23252                <enumeratedValue>
23253                  <name>1</name>
23254                  <description>Bus master 6 writes allowed</description>
23255                  <value>#1</value>
23256                </enumeratedValue>
23257              </enumeratedValues>
23258            </field>
23259            <field>
23260              <name>M6RE</name>
23261              <description>Bus Master 6 Read Enable</description>
23262              <bitOffset>29</bitOffset>
23263              <bitWidth>1</bitWidth>
23264              <access>read-write</access>
23265              <enumeratedValues>
23266                <enumeratedValue>
23267                  <name>0</name>
23268                  <description>Bus master 6 reads terminate with an access error and the read is not performed</description>
23269                  <value>#0</value>
23270                </enumeratedValue>
23271                <enumeratedValue>
23272                  <name>1</name>
23273                  <description>Bus master 6 reads allowed</description>
23274                  <value>#1</value>
23275                </enumeratedValue>
23276              </enumeratedValues>
23277            </field>
23278            <field>
23279              <name>M7WE</name>
23280              <description>Bus Master 7 Write Enable</description>
23281              <bitOffset>30</bitOffset>
23282              <bitWidth>1</bitWidth>
23283              <access>read-write</access>
23284              <enumeratedValues>
23285                <enumeratedValue>
23286                  <name>0</name>
23287                  <description>Bus master 7 writes terminate with an access error and the write is not performed</description>
23288                  <value>#0</value>
23289                </enumeratedValue>
23290                <enumeratedValue>
23291                  <name>1</name>
23292                  <description>Bus master 7 writes allowed</description>
23293                  <value>#1</value>
23294                </enumeratedValue>
23295              </enumeratedValues>
23296            </field>
23297            <field>
23298              <name>M7RE</name>
23299              <description>Bus Master 7 Read Enable</description>
23300              <bitOffset>31</bitOffset>
23301              <bitWidth>1</bitWidth>
23302              <access>read-write</access>
23303              <enumeratedValues>
23304                <enumeratedValue>
23305                  <name>0</name>
23306                  <description>Bus master 7 reads terminate with an access error and the read is not performed</description>
23307                  <value>#0</value>
23308                </enumeratedValue>
23309                <enumeratedValue>
23310                  <name>1</name>
23311                  <description>Bus master 7 reads allowed</description>
23312                  <value>#1</value>
23313                </enumeratedValue>
23314              </enumeratedValues>
23315            </field>
23316          </fields>
23317        </register>
23318      </registers>
23319    </peripheral>
23320    <peripheral>
23321      <name>SDRAM</name>
23322      <description>Synchronous DRAM Controller</description>
23323      <prependToName>SDRAM_</prependToName>
23324      <baseAddress>0x4000F000</baseAddress>
23325      <addressBlock>
23326        <offset>0x42</offset>
23327        <size>0x16</size>
23328        <usage>registers</usage>
23329      </addressBlock>
23330      <registers>
23331        <register>
23332          <name>CTRL</name>
23333          <description>Control Register</description>
23334          <addressOffset>0x42</addressOffset>
23335          <size>16</size>
23336          <access>read-write</access>
23337          <resetValue>0</resetValue>
23338          <resetMask>0</resetMask>
23339          <fields>
23340            <field>
23341              <name>RC</name>
23342              <description>Refresh count</description>
23343              <bitOffset>0</bitOffset>
23344              <bitWidth>9</bitWidth>
23345              <access>read-write</access>
23346            </field>
23347            <field>
23348              <name>RTIM</name>
23349              <description>Refresh timing</description>
23350              <bitOffset>9</bitOffset>
23351              <bitWidth>2</bitWidth>
23352              <access>read-write</access>
23353              <enumeratedValues>
23354                <enumeratedValue>
23355                  <name>00</name>
23356                  <description>3 clocks</description>
23357                  <value>#00</value>
23358                </enumeratedValue>
23359                <enumeratedValue>
23360                  <name>01</name>
23361                  <description>6 clocks</description>
23362                  <value>#01</value>
23363                </enumeratedValue>
23364                <enumeratedValue>
23365                  <name>10</name>
23366                  <description>9 clocks</description>
23367                  <value>#10</value>
23368                </enumeratedValue>
23369                <enumeratedValue>
23370                  <name>11</name>
23371                  <description>9 clocks</description>
23372                  <value>#11</value>
23373                </enumeratedValue>
23374              </enumeratedValues>
23375            </field>
23376            <field>
23377              <name>IS</name>
23378              <description>Initiate self-refresh command.</description>
23379              <bitOffset>11</bitOffset>
23380              <bitWidth>1</bitWidth>
23381              <access>read-write</access>
23382              <enumeratedValues>
23383                <enumeratedValue>
23384                  <name>0</name>
23385                  <description>Take no action or issue a selfx command to exit self refresh.</description>
23386                  <value>#0</value>
23387                </enumeratedValue>
23388                <enumeratedValue>
23389                  <name>1</name>
23390                  <description>SDRAM controller sends a self command to both SDRAM blocks to put them in low-power, self-refresh state where they remain until IS is cleared. When IS is cleared, the controller sends a selfx command for the SDRAMs to exit self-refresh. The refresh counter is suspended while the SDRAMs are in self-refresh; the SDRAM controls the refresh period.</description>
23391                  <value>#1</value>
23392                </enumeratedValue>
23393              </enumeratedValues>
23394            </field>
23395          </fields>
23396        </register>
23397        <register>
23398          <dim>2</dim>
23399          <dimIncrement>0x8</dimIncrement>
23400          <dimIndex>0,1</dimIndex>
23401          <name>AC%s</name>
23402          <description>Address and Control Register</description>
23403          <addressOffset>0x48</addressOffset>
23404          <size>32</size>
23405          <access>read-write</access>
23406          <resetValue>0</resetValue>
23407          <resetMask>0x8040</resetMask>
23408          <fields>
23409            <field>
23410              <name>IP</name>
23411              <description>Initiate precharge all (pall) command.</description>
23412              <bitOffset>3</bitOffset>
23413              <bitWidth>1</bitWidth>
23414              <access>read-write</access>
23415              <enumeratedValues>
23416                <enumeratedValue>
23417                  <name>0</name>
23418                  <description>Take no action.</description>
23419                  <value>#0</value>
23420                </enumeratedValue>
23421                <enumeratedValue>
23422                  <name>1</name>
23423                  <description>A pall command is sent to the associated SDRAM block. During initialization, this command is executed after all DRAM controller registers are programmed. After IP is set, the next write to an appropriate SDRAM address generates the pall command to the SDRAM block.</description>
23424                  <value>#1</value>
23425                </enumeratedValue>
23426              </enumeratedValues>
23427            </field>
23428            <field>
23429              <name>PS</name>
23430              <description>Port size.</description>
23431              <bitOffset>4</bitOffset>
23432              <bitWidth>2</bitWidth>
23433              <access>read-write</access>
23434              <enumeratedValues>
23435                <enumeratedValue>
23436                  <name>00</name>
23437                  <description>32-bit port</description>
23438                  <value>#00</value>
23439                </enumeratedValue>
23440                <enumeratedValue>
23441                  <name>01</name>
23442                  <description>8-bit port</description>
23443                  <value>#01</value>
23444                </enumeratedValue>
23445                <enumeratedValue>
23446                  <name>10</name>
23447                  <description>16-bit port</description>
23448                  <value>#10</value>
23449                </enumeratedValue>
23450                <enumeratedValue>
23451                  <name>11</name>
23452                  <description>16-bit port</description>
23453                  <value>#11</value>
23454                </enumeratedValue>
23455              </enumeratedValues>
23456            </field>
23457            <field>
23458              <name>IMRS</name>
23459              <description>Initiate mode register set (mrs) command.</description>
23460              <bitOffset>6</bitOffset>
23461              <bitWidth>1</bitWidth>
23462              <access>read-write</access>
23463              <enumeratedValues>
23464                <enumeratedValue>
23465                  <name>0</name>
23466                  <description>Take no action</description>
23467                  <value>#0</value>
23468                </enumeratedValue>
23469                <enumeratedValue>
23470                  <name>1</name>
23471                  <description>Initiate mrs command</description>
23472                  <value>#1</value>
23473                </enumeratedValue>
23474              </enumeratedValues>
23475            </field>
23476            <field>
23477              <name>CBM</name>
23478              <description>Command bit location</description>
23479              <bitOffset>8</bitOffset>
23480              <bitWidth>3</bitWidth>
23481              <access>read-write</access>
23482            </field>
23483            <field>
23484              <name>CASL</name>
23485              <description>CAS Latency</description>
23486              <bitOffset>12</bitOffset>
23487              <bitWidth>2</bitWidth>
23488              <access>read-write</access>
23489            </field>
23490            <field>
23491              <name>RE</name>
23492              <description>Refresh enable</description>
23493              <bitOffset>15</bitOffset>
23494              <bitWidth>1</bitWidth>
23495              <access>read-write</access>
23496              <enumeratedValues>
23497                <enumeratedValue>
23498                  <name>0</name>
23499                  <description>Do not refresh associated DRAM block</description>
23500                  <value>#0</value>
23501                </enumeratedValue>
23502                <enumeratedValue>
23503                  <name>1</name>
23504                  <description>Refresh associated DRAM block</description>
23505                  <value>#1</value>
23506                </enumeratedValue>
23507              </enumeratedValues>
23508            </field>
23509            <field>
23510              <name>BA</name>
23511              <description>Base address register.</description>
23512              <bitOffset>18</bitOffset>
23513              <bitWidth>14</bitWidth>
23514              <access>read-write</access>
23515            </field>
23516          </fields>
23517        </register>
23518        <register>
23519          <dim>2</dim>
23520          <dimIncrement>0x8</dimIncrement>
23521          <dimIndex>0,1</dimIndex>
23522          <name>CM%s</name>
23523          <description>Control Mask</description>
23524          <addressOffset>0x4C</addressOffset>
23525          <size>32</size>
23526          <access>read-write</access>
23527          <resetValue>0</resetValue>
23528          <resetMask>0x1</resetMask>
23529          <fields>
23530            <field>
23531              <name>V</name>
23532              <description>Valid.</description>
23533              <bitOffset>0</bitOffset>
23534              <bitWidth>1</bitWidth>
23535              <access>read-write</access>
23536              <enumeratedValues>
23537                <enumeratedValue>
23538                  <name>0</name>
23539                  <description>Do not decode DRAM accesses.</description>
23540                  <value>#0</value>
23541                </enumeratedValue>
23542                <enumeratedValue>
23543                  <name>1</name>
23544                  <description>Registers controlling the DRAM block are initialized; DRAM accesses can be decoded</description>
23545                  <value>#1</value>
23546                </enumeratedValue>
23547              </enumeratedValues>
23548            </field>
23549            <field>
23550              <name>WP</name>
23551              <description>Write protect.</description>
23552              <bitOffset>8</bitOffset>
23553              <bitWidth>1</bitWidth>
23554              <access>read-write</access>
23555              <enumeratedValues>
23556                <enumeratedValue>
23557                  <name>0</name>
23558                  <description>Allow write accesses</description>
23559                  <value>#0</value>
23560                </enumeratedValue>
23561                <enumeratedValue>
23562                  <name>1</name>
23563                  <description>Ignore write accesses. The DRAM controller ignores write accesses to the memory block and an address exception occurs. Write accesses to a write-protected DRAM region are compared in the chip select module for a hit. If no hit occurs, an external bus cycle is generated. If this external bus cycle is not acknowledged, an access exception occurs.</description>
23564                  <value>#1</value>
23565                </enumeratedValue>
23566              </enumeratedValues>
23567            </field>
23568            <field>
23569              <name>BAM</name>
23570              <description>Base address mask.</description>
23571              <bitOffset>18</bitOffset>
23572              <bitWidth>14</bitWidth>
23573              <access>read-write</access>
23574              <enumeratedValues>
23575                <enumeratedValue>
23576                  <name>0</name>
23577                  <description>The associated address bit is used in decoding the DRAM hit to a memory block</description>
23578                  <value>#0</value>
23579                </enumeratedValue>
23580                <enumeratedValue>
23581                  <name>1</name>
23582                  <description>The associated address bit is not used in the DRAM hit decode</description>
23583                  <value>#1</value>
23584                </enumeratedValue>
23585              </enumeratedValues>
23586            </field>
23587          </fields>
23588        </register>
23589      </registers>
23590    </peripheral>
23591    <peripheral>
23592      <name>FMC</name>
23593      <description>Flash Memory Controller</description>
23594      <prependToName>FMC_</prependToName>
23595      <baseAddress>0x4001F000</baseAddress>
23596      <addressBlock>
23597        <offset>0</offset>
23598        <size>0x300</size>
23599        <usage>registers</usage>
23600      </addressBlock>
23601      <registers>
23602        <register>
23603          <name>PFAPR</name>
23604          <description>Flash Access Protection Register</description>
23605          <addressOffset>0</addressOffset>
23606          <size>32</size>
23607          <access>read-write</access>
23608          <resetValue>0x3F</resetValue>
23609          <resetMask>0xFFFFFFFF</resetMask>
23610          <fields>
23611            <field>
23612              <name>M0AP</name>
23613              <description>Master 0 Access Protection</description>
23614              <bitOffset>0</bitOffset>
23615              <bitWidth>2</bitWidth>
23616              <access>read-write</access>
23617              <enumeratedValues>
23618                <enumeratedValue>
23619                  <name>00</name>
23620                  <description>No access may be performed by this master</description>
23621                  <value>#00</value>
23622                </enumeratedValue>
23623                <enumeratedValue>
23624                  <name>01</name>
23625                  <description>Only read accesses may be performed by this master</description>
23626                  <value>#01</value>
23627                </enumeratedValue>
23628                <enumeratedValue>
23629                  <name>10</name>
23630                  <description>Only write accesses may be performed by this master</description>
23631                  <value>#10</value>
23632                </enumeratedValue>
23633                <enumeratedValue>
23634                  <name>11</name>
23635                  <description>Both read and write accesses may be performed by this master</description>
23636                  <value>#11</value>
23637                </enumeratedValue>
23638              </enumeratedValues>
23639            </field>
23640            <field>
23641              <name>M1AP</name>
23642              <description>Master 1 Access Protection</description>
23643              <bitOffset>2</bitOffset>
23644              <bitWidth>2</bitWidth>
23645              <access>read-write</access>
23646              <enumeratedValues>
23647                <enumeratedValue>
23648                  <name>00</name>
23649                  <description>No access may be performed by this master</description>
23650                  <value>#00</value>
23651                </enumeratedValue>
23652                <enumeratedValue>
23653                  <name>01</name>
23654                  <description>Only read accesses may be performed by this master</description>
23655                  <value>#01</value>
23656                </enumeratedValue>
23657                <enumeratedValue>
23658                  <name>10</name>
23659                  <description>Only write accesses may be performed by this master</description>
23660                  <value>#10</value>
23661                </enumeratedValue>
23662                <enumeratedValue>
23663                  <name>11</name>
23664                  <description>Both read and write accesses may be performed by this master</description>
23665                  <value>#11</value>
23666                </enumeratedValue>
23667              </enumeratedValues>
23668            </field>
23669            <field>
23670              <name>M2AP</name>
23671              <description>Master 2 Access Protection</description>
23672              <bitOffset>4</bitOffset>
23673              <bitWidth>2</bitWidth>
23674              <access>read-write</access>
23675              <enumeratedValues>
23676                <enumeratedValue>
23677                  <name>00</name>
23678                  <description>No access may be performed by this master</description>
23679                  <value>#00</value>
23680                </enumeratedValue>
23681                <enumeratedValue>
23682                  <name>01</name>
23683                  <description>Only read accesses may be performed by this master</description>
23684                  <value>#01</value>
23685                </enumeratedValue>
23686                <enumeratedValue>
23687                  <name>10</name>
23688                  <description>Only write accesses may be performed by this master</description>
23689                  <value>#10</value>
23690                </enumeratedValue>
23691                <enumeratedValue>
23692                  <name>11</name>
23693                  <description>Both read and write accesses may be performed by this master</description>
23694                  <value>#11</value>
23695                </enumeratedValue>
23696              </enumeratedValues>
23697            </field>
23698            <field>
23699              <name>M3AP</name>
23700              <description>Master 3 Access Protection</description>
23701              <bitOffset>6</bitOffset>
23702              <bitWidth>2</bitWidth>
23703              <access>read-write</access>
23704              <enumeratedValues>
23705                <enumeratedValue>
23706                  <name>00</name>
23707                  <description>No access may be performed by this master</description>
23708                  <value>#00</value>
23709                </enumeratedValue>
23710                <enumeratedValue>
23711                  <name>01</name>
23712                  <description>Only read accesses may be performed by this master</description>
23713                  <value>#01</value>
23714                </enumeratedValue>
23715                <enumeratedValue>
23716                  <name>10</name>
23717                  <description>Only write accesses may be performed by this master</description>
23718                  <value>#10</value>
23719                </enumeratedValue>
23720                <enumeratedValue>
23721                  <name>11</name>
23722                  <description>Both read and write accesses may be performed by this master</description>
23723                  <value>#11</value>
23724                </enumeratedValue>
23725              </enumeratedValues>
23726            </field>
23727            <field>
23728              <name>M4AP</name>
23729              <description>Master 4 Access Protection</description>
23730              <bitOffset>8</bitOffset>
23731              <bitWidth>2</bitWidth>
23732              <access>read-write</access>
23733              <enumeratedValues>
23734                <enumeratedValue>
23735                  <name>00</name>
23736                  <description>No access may be performed by this master</description>
23737                  <value>#00</value>
23738                </enumeratedValue>
23739                <enumeratedValue>
23740                  <name>01</name>
23741                  <description>Only read accesses may be performed by this master</description>
23742                  <value>#01</value>
23743                </enumeratedValue>
23744                <enumeratedValue>
23745                  <name>10</name>
23746                  <description>Only write accesses may be performed by this master</description>
23747                  <value>#10</value>
23748                </enumeratedValue>
23749                <enumeratedValue>
23750                  <name>11</name>
23751                  <description>Both read and write accesses may be performed by this master</description>
23752                  <value>#11</value>
23753                </enumeratedValue>
23754              </enumeratedValues>
23755            </field>
23756            <field>
23757              <name>M0PFD</name>
23758              <description>Master 0 Prefetch Disable</description>
23759              <bitOffset>16</bitOffset>
23760              <bitWidth>1</bitWidth>
23761              <access>read-write</access>
23762              <enumeratedValues>
23763                <enumeratedValue>
23764                  <name>0</name>
23765                  <description>Prefetching for this master is enabled.</description>
23766                  <value>#0</value>
23767                </enumeratedValue>
23768                <enumeratedValue>
23769                  <name>1</name>
23770                  <description>Prefetching for this master is disabled.</description>
23771                  <value>#1</value>
23772                </enumeratedValue>
23773              </enumeratedValues>
23774            </field>
23775            <field>
23776              <name>M1PFD</name>
23777              <description>Master 1 Prefetch Disable</description>
23778              <bitOffset>17</bitOffset>
23779              <bitWidth>1</bitWidth>
23780              <access>read-write</access>
23781              <enumeratedValues>
23782                <enumeratedValue>
23783                  <name>0</name>
23784                  <description>Prefetching for this master is enabled.</description>
23785                  <value>#0</value>
23786                </enumeratedValue>
23787                <enumeratedValue>
23788                  <name>1</name>
23789                  <description>Prefetching for this master is disabled.</description>
23790                  <value>#1</value>
23791                </enumeratedValue>
23792              </enumeratedValues>
23793            </field>
23794            <field>
23795              <name>M2PFD</name>
23796              <description>Master 2 Prefetch Disable</description>
23797              <bitOffset>18</bitOffset>
23798              <bitWidth>1</bitWidth>
23799              <access>read-write</access>
23800              <enumeratedValues>
23801                <enumeratedValue>
23802                  <name>0</name>
23803                  <description>Prefetching for this master is enabled.</description>
23804                  <value>#0</value>
23805                </enumeratedValue>
23806                <enumeratedValue>
23807                  <name>1</name>
23808                  <description>Prefetching for this master is disabled.</description>
23809                  <value>#1</value>
23810                </enumeratedValue>
23811              </enumeratedValues>
23812            </field>
23813            <field>
23814              <name>M3PFD</name>
23815              <description>Master 3 Prefetch Disable</description>
23816              <bitOffset>19</bitOffset>
23817              <bitWidth>1</bitWidth>
23818              <access>read-write</access>
23819              <enumeratedValues>
23820                <enumeratedValue>
23821                  <name>0</name>
23822                  <description>Prefetching for this master is enabled.</description>
23823                  <value>#0</value>
23824                </enumeratedValue>
23825                <enumeratedValue>
23826                  <name>1</name>
23827                  <description>Prefetching for this master is disabled.</description>
23828                  <value>#1</value>
23829                </enumeratedValue>
23830              </enumeratedValues>
23831            </field>
23832            <field>
23833              <name>M4PFD</name>
23834              <description>Master 4 Prefetch Disable</description>
23835              <bitOffset>20</bitOffset>
23836              <bitWidth>1</bitWidth>
23837              <access>read-write</access>
23838              <enumeratedValues>
23839                <enumeratedValue>
23840                  <name>0</name>
23841                  <description>Prefetching for this master is enabled.</description>
23842                  <value>#0</value>
23843                </enumeratedValue>
23844                <enumeratedValue>
23845                  <name>1</name>
23846                  <description>Prefetching for this master is disabled.</description>
23847                  <value>#1</value>
23848                </enumeratedValue>
23849              </enumeratedValues>
23850            </field>
23851          </fields>
23852        </register>
23853        <register>
23854          <name>PFB0CR</name>
23855          <description>Flash Bank 0 Control Register</description>
23856          <addressOffset>0x4</addressOffset>
23857          <size>32</size>
23858          <access>read-write</access>
23859          <resetValue>0x3004001F</resetValue>
23860          <resetMask>0xFFFFFFFF</resetMask>
23861          <fields>
23862            <field>
23863              <name>B0SEBE</name>
23864              <description>Bank 0 Single Entry Buffer Enable</description>
23865              <bitOffset>0</bitOffset>
23866              <bitWidth>1</bitWidth>
23867              <access>read-write</access>
23868              <enumeratedValues>
23869                <enumeratedValue>
23870                  <name>0</name>
23871                  <description>Single entry buffer is disabled.</description>
23872                  <value>#0</value>
23873                </enumeratedValue>
23874                <enumeratedValue>
23875                  <name>1</name>
23876                  <description>Single entry buffer is enabled.</description>
23877                  <value>#1</value>
23878                </enumeratedValue>
23879              </enumeratedValues>
23880            </field>
23881            <field>
23882              <name>B0IPE</name>
23883              <description>Bank 0 Instruction Prefetch Enable</description>
23884              <bitOffset>1</bitOffset>
23885              <bitWidth>1</bitWidth>
23886              <access>read-write</access>
23887              <enumeratedValues>
23888                <enumeratedValue>
23889                  <name>0</name>
23890                  <description>Do not prefetch in response to instruction fetches.</description>
23891                  <value>#0</value>
23892                </enumeratedValue>
23893                <enumeratedValue>
23894                  <name>1</name>
23895                  <description>Enable prefetches in response to instruction fetches.</description>
23896                  <value>#1</value>
23897                </enumeratedValue>
23898              </enumeratedValues>
23899            </field>
23900            <field>
23901              <name>B0DPE</name>
23902              <description>Bank 0 Data Prefetch Enable</description>
23903              <bitOffset>2</bitOffset>
23904              <bitWidth>1</bitWidth>
23905              <access>read-write</access>
23906              <enumeratedValues>
23907                <enumeratedValue>
23908                  <name>0</name>
23909                  <description>Do not prefetch in response to data references.</description>
23910                  <value>#0</value>
23911                </enumeratedValue>
23912                <enumeratedValue>
23913                  <name>1</name>
23914                  <description>Enable prefetches in response to data references.</description>
23915                  <value>#1</value>
23916                </enumeratedValue>
23917              </enumeratedValues>
23918            </field>
23919            <field>
23920              <name>B0ICE</name>
23921              <description>Bank 0 Instruction Cache Enable</description>
23922              <bitOffset>3</bitOffset>
23923              <bitWidth>1</bitWidth>
23924              <access>read-write</access>
23925              <enumeratedValues>
23926                <enumeratedValue>
23927                  <name>0</name>
23928                  <description>Do not cache instruction fetches.</description>
23929                  <value>#0</value>
23930                </enumeratedValue>
23931                <enumeratedValue>
23932                  <name>1</name>
23933                  <description>Cache instruction fetches.</description>
23934                  <value>#1</value>
23935                </enumeratedValue>
23936              </enumeratedValues>
23937            </field>
23938            <field>
23939              <name>B0DCE</name>
23940              <description>Bank 0 Data Cache Enable</description>
23941              <bitOffset>4</bitOffset>
23942              <bitWidth>1</bitWidth>
23943              <access>read-write</access>
23944              <enumeratedValues>
23945                <enumeratedValue>
23946                  <name>0</name>
23947                  <description>Do not cache data references.</description>
23948                  <value>#0</value>
23949                </enumeratedValue>
23950                <enumeratedValue>
23951                  <name>1</name>
23952                  <description>Cache data references.</description>
23953                  <value>#1</value>
23954                </enumeratedValue>
23955              </enumeratedValues>
23956            </field>
23957            <field>
23958              <name>CRC</name>
23959              <description>Cache Replacement Control</description>
23960              <bitOffset>5</bitOffset>
23961              <bitWidth>3</bitWidth>
23962              <access>read-write</access>
23963              <enumeratedValues>
23964                <enumeratedValue>
23965                  <name>000</name>
23966                  <description>LRU replacement algorithm per set across all four ways</description>
23967                  <value>#000</value>
23968                </enumeratedValue>
23969                <enumeratedValue>
23970                  <name>010</name>
23971                  <description>Independent LRU with ways [0-1] for ifetches, [2-3] for data</description>
23972                  <value>#010</value>
23973                </enumeratedValue>
23974                <enumeratedValue>
23975                  <name>011</name>
23976                  <description>Independent LRU with ways [0-2] for ifetches, [3] for data</description>
23977                  <value>#011</value>
23978                </enumeratedValue>
23979              </enumeratedValues>
23980            </field>
23981            <field>
23982              <name>B0MW</name>
23983              <description>Bank 0 Memory Width</description>
23984              <bitOffset>17</bitOffset>
23985              <bitWidth>2</bitWidth>
23986              <access>read-only</access>
23987              <enumeratedValues>
23988                <enumeratedValue>
23989                  <name>00</name>
23990                  <description>32 bits</description>
23991                  <value>#00</value>
23992                </enumeratedValue>
23993                <enumeratedValue>
23994                  <name>01</name>
23995                  <description>64 bits</description>
23996                  <value>#01</value>
23997                </enumeratedValue>
23998                <enumeratedValue>
23999                  <name>10</name>
24000                  <description>128 bits</description>
24001                  <value>#10</value>
24002                </enumeratedValue>
24003              </enumeratedValues>
24004            </field>
24005            <field>
24006              <name>S_B_INV</name>
24007              <description>Invalidate Prefetch Speculation Buffer</description>
24008              <bitOffset>19</bitOffset>
24009              <bitWidth>1</bitWidth>
24010              <access>write-only</access>
24011              <enumeratedValues>
24012                <enumeratedValue>
24013                  <name>0</name>
24014                  <description>Speculation buffer and single entry buffer are not affected.</description>
24015                  <value>#0</value>
24016                </enumeratedValue>
24017                <enumeratedValue>
24018                  <name>1</name>
24019                  <description>Invalidate (clear) speculation buffer and single entry buffer.</description>
24020                  <value>#1</value>
24021                </enumeratedValue>
24022              </enumeratedValues>
24023            </field>
24024            <field>
24025              <name>CINV_WAY</name>
24026              <description>Cache Invalidate Way x</description>
24027              <bitOffset>20</bitOffset>
24028              <bitWidth>4</bitWidth>
24029              <access>write-only</access>
24030              <enumeratedValues>
24031                <enumeratedValue>
24032                  <name>0</name>
24033                  <description>No cache way invalidation for the corresponding cache</description>
24034                  <value>#0000</value>
24035                </enumeratedValue>
24036                <enumeratedValue>
24037                  <name>1</name>
24038                  <description>Invalidate cache way for the corresponding cache: clear the tag, data, and vld bits of ways selected</description>
24039                  <value>#0001</value>
24040                </enumeratedValue>
24041              </enumeratedValues>
24042            </field>
24043            <field>
24044              <name>CLCK_WAY</name>
24045              <description>Cache Lock Way x</description>
24046              <bitOffset>24</bitOffset>
24047              <bitWidth>4</bitWidth>
24048              <access>read-write</access>
24049              <enumeratedValues>
24050                <enumeratedValue>
24051                  <name>0</name>
24052                  <description>Cache way is unlocked and may be displaced</description>
24053                  <value>#0000</value>
24054                </enumeratedValue>
24055                <enumeratedValue>
24056                  <name>1</name>
24057                  <description>Cache way is locked and its contents are not displaced</description>
24058                  <value>#0001</value>
24059                </enumeratedValue>
24060              </enumeratedValues>
24061            </field>
24062            <field>
24063              <name>B0RWSC</name>
24064              <description>Bank 0 Read Wait State Control</description>
24065              <bitOffset>28</bitOffset>
24066              <bitWidth>4</bitWidth>
24067              <access>read-only</access>
24068            </field>
24069          </fields>
24070        </register>
24071        <register>
24072          <name>Reserved</name>
24073          <description>Reserved</description>
24074          <addressOffset>0x8</addressOffset>
24075          <size>32</size>
24076          <access>read-only</access>
24077          <resetValue>0x30000000</resetValue>
24078          <resetMask>0xFFFFFFFF</resetMask>
24079        </register>
24080        <register>
24081          <dim>4</dim>
24082          <dimIncrement>0x4</dimIncrement>
24083          <dimIndex>0,1,2,3</dimIndex>
24084          <name>TAGVDW0S%s</name>
24085          <description>Cache Tag Storage</description>
24086          <addressOffset>0x100</addressOffset>
24087          <size>32</size>
24088          <access>read-write</access>
24089          <resetValue>0</resetValue>
24090          <resetMask>0xFFFFFFFF</resetMask>
24091          <fields>
24092            <field>
24093              <name>valid</name>
24094              <description>1-bit valid for cache entry</description>
24095              <bitOffset>0</bitOffset>
24096              <bitWidth>1</bitWidth>
24097              <access>read-write</access>
24098            </field>
24099            <field>
24100              <name>cache_tag</name>
24101              <description>14-bit tag for cache entry</description>
24102              <bitOffset>6</bitOffset>
24103              <bitWidth>14</bitWidth>
24104              <access>read-write</access>
24105            </field>
24106          </fields>
24107        </register>
24108        <register>
24109          <dim>4</dim>
24110          <dimIncrement>0x4</dimIncrement>
24111          <dimIndex>0,1,2,3</dimIndex>
24112          <name>TAGVDW1S%s</name>
24113          <description>Cache Tag Storage</description>
24114          <addressOffset>0x110</addressOffset>
24115          <size>32</size>
24116          <access>read-write</access>
24117          <resetValue>0</resetValue>
24118          <resetMask>0xFFFFFFFF</resetMask>
24119          <fields>
24120            <field>
24121              <name>valid</name>
24122              <description>1-bit valid for cache entry</description>
24123              <bitOffset>0</bitOffset>
24124              <bitWidth>1</bitWidth>
24125              <access>read-write</access>
24126            </field>
24127            <field>
24128              <name>cache_tag</name>
24129              <description>14-bit tag for cache entry</description>
24130              <bitOffset>6</bitOffset>
24131              <bitWidth>14</bitWidth>
24132              <access>read-write</access>
24133            </field>
24134          </fields>
24135        </register>
24136        <register>
24137          <dim>4</dim>
24138          <dimIncrement>0x4</dimIncrement>
24139          <dimIndex>0,1,2,3</dimIndex>
24140          <name>TAGVDW2S%s</name>
24141          <description>Cache Tag Storage</description>
24142          <addressOffset>0x120</addressOffset>
24143          <size>32</size>
24144          <access>read-write</access>
24145          <resetValue>0</resetValue>
24146          <resetMask>0xFFFFFFFF</resetMask>
24147          <fields>
24148            <field>
24149              <name>valid</name>
24150              <description>1-bit valid for cache entry</description>
24151              <bitOffset>0</bitOffset>
24152              <bitWidth>1</bitWidth>
24153              <access>read-write</access>
24154            </field>
24155            <field>
24156              <name>cache_tag</name>
24157              <description>14-bit tag for cache entry</description>
24158              <bitOffset>6</bitOffset>
24159              <bitWidth>14</bitWidth>
24160              <access>read-write</access>
24161            </field>
24162          </fields>
24163        </register>
24164        <register>
24165          <dim>4</dim>
24166          <dimIncrement>0x4</dimIncrement>
24167          <dimIndex>0,1,2,3</dimIndex>
24168          <name>TAGVDW3S%s</name>
24169          <description>Cache Tag Storage</description>
24170          <addressOffset>0x130</addressOffset>
24171          <size>32</size>
24172          <access>read-write</access>
24173          <resetValue>0</resetValue>
24174          <resetMask>0xFFFFFFFF</resetMask>
24175          <fields>
24176            <field>
24177              <name>valid</name>
24178              <description>1-bit valid for cache entry</description>
24179              <bitOffset>0</bitOffset>
24180              <bitWidth>1</bitWidth>
24181              <access>read-write</access>
24182            </field>
24183            <field>
24184              <name>cache_tag</name>
24185              <description>14-bit tag for cache entry</description>
24186              <bitOffset>6</bitOffset>
24187              <bitWidth>14</bitWidth>
24188              <access>read-write</access>
24189            </field>
24190          </fields>
24191        </register>
24192        <register>
24193          <dim>4</dim>
24194          <dimIncrement>0x10</dimIncrement>
24195          <dimIndex>0,1,2,3</dimIndex>
24196          <name>DATAW0S%sUM</name>
24197          <description>Cache Data Storage (uppermost word)</description>
24198          <addressOffset>0x200</addressOffset>
24199          <size>32</size>
24200          <access>read-write</access>
24201          <resetValue>0</resetValue>
24202          <resetMask>0xFFFFFFFF</resetMask>
24203          <fields>
24204            <field>
24205              <name>data</name>
24206              <description>Bits [127:96] of data entry</description>
24207              <bitOffset>0</bitOffset>
24208              <bitWidth>32</bitWidth>
24209              <access>read-write</access>
24210            </field>
24211          </fields>
24212        </register>
24213        <register>
24214          <dim>4</dim>
24215          <dimIncrement>0x10</dimIncrement>
24216          <dimIndex>0,1,2,3</dimIndex>
24217          <name>DATAW0S%sMU</name>
24218          <description>Cache Data Storage (mid-upper word)</description>
24219          <addressOffset>0x204</addressOffset>
24220          <size>32</size>
24221          <access>read-write</access>
24222          <resetValue>0</resetValue>
24223          <resetMask>0xFFFFFFFF</resetMask>
24224          <fields>
24225            <field>
24226              <name>data</name>
24227              <description>Bits [95:64] of data entry</description>
24228              <bitOffset>0</bitOffset>
24229              <bitWidth>32</bitWidth>
24230              <access>read-write</access>
24231            </field>
24232          </fields>
24233        </register>
24234        <register>
24235          <dim>4</dim>
24236          <dimIncrement>0x10</dimIncrement>
24237          <dimIndex>0,1,2,3</dimIndex>
24238          <name>DATAW0S%sML</name>
24239          <description>Cache Data Storage (mid-lower word)</description>
24240          <addressOffset>0x208</addressOffset>
24241          <size>32</size>
24242          <access>read-write</access>
24243          <resetValue>0</resetValue>
24244          <resetMask>0xFFFFFFFF</resetMask>
24245          <fields>
24246            <field>
24247              <name>data</name>
24248              <description>Bits [63:32] of data entry</description>
24249              <bitOffset>0</bitOffset>
24250              <bitWidth>32</bitWidth>
24251              <access>read-write</access>
24252            </field>
24253          </fields>
24254        </register>
24255        <register>
24256          <dim>4</dim>
24257          <dimIncrement>0x10</dimIncrement>
24258          <dimIndex>0,1,2,3</dimIndex>
24259          <name>DATAW0S%sLM</name>
24260          <description>Cache Data Storage (lowermost word)</description>
24261          <addressOffset>0x20C</addressOffset>
24262          <size>32</size>
24263          <access>read-write</access>
24264          <resetValue>0</resetValue>
24265          <resetMask>0xFFFFFFFF</resetMask>
24266          <fields>
24267            <field>
24268              <name>data</name>
24269              <description>Bits [31:0] of data entry</description>
24270              <bitOffset>0</bitOffset>
24271              <bitWidth>32</bitWidth>
24272              <access>read-write</access>
24273            </field>
24274          </fields>
24275        </register>
24276        <register>
24277          <dim>4</dim>
24278          <dimIncrement>0x10</dimIncrement>
24279          <dimIndex>0,1,2,3</dimIndex>
24280          <name>DATAW1S%sUM</name>
24281          <description>Cache Data Storage (uppermost word)</description>
24282          <addressOffset>0x240</addressOffset>
24283          <size>32</size>
24284          <access>read-write</access>
24285          <resetValue>0</resetValue>
24286          <resetMask>0xFFFFFFFF</resetMask>
24287          <fields>
24288            <field>
24289              <name>data</name>
24290              <description>Bits [127:96] of data entry</description>
24291              <bitOffset>0</bitOffset>
24292              <bitWidth>32</bitWidth>
24293              <access>read-write</access>
24294            </field>
24295          </fields>
24296        </register>
24297        <register>
24298          <dim>4</dim>
24299          <dimIncrement>0x10</dimIncrement>
24300          <dimIndex>0,1,2,3</dimIndex>
24301          <name>DATAW1S%sMU</name>
24302          <description>Cache Data Storage (mid-upper word)</description>
24303          <addressOffset>0x244</addressOffset>
24304          <size>32</size>
24305          <access>read-write</access>
24306          <resetValue>0</resetValue>
24307          <resetMask>0xFFFFFFFF</resetMask>
24308          <fields>
24309            <field>
24310              <name>data</name>
24311              <description>Bits [95:64] of data entry</description>
24312              <bitOffset>0</bitOffset>
24313              <bitWidth>32</bitWidth>
24314              <access>read-write</access>
24315            </field>
24316          </fields>
24317        </register>
24318        <register>
24319          <dim>4</dim>
24320          <dimIncrement>0x10</dimIncrement>
24321          <dimIndex>0,1,2,3</dimIndex>
24322          <name>DATAW1S%sML</name>
24323          <description>Cache Data Storage (mid-lower word)</description>
24324          <addressOffset>0x248</addressOffset>
24325          <size>32</size>
24326          <access>read-write</access>
24327          <resetValue>0</resetValue>
24328          <resetMask>0xFFFFFFFF</resetMask>
24329          <fields>
24330            <field>
24331              <name>data</name>
24332              <description>Bits [63:32] of data entry</description>
24333              <bitOffset>0</bitOffset>
24334              <bitWidth>32</bitWidth>
24335              <access>read-write</access>
24336            </field>
24337          </fields>
24338        </register>
24339        <register>
24340          <dim>4</dim>
24341          <dimIncrement>0x10</dimIncrement>
24342          <dimIndex>0,1,2,3</dimIndex>
24343          <name>DATAW1S%sLM</name>
24344          <description>Cache Data Storage (lowermost word)</description>
24345          <addressOffset>0x24C</addressOffset>
24346          <size>32</size>
24347          <access>read-write</access>
24348          <resetValue>0</resetValue>
24349          <resetMask>0xFFFFFFFF</resetMask>
24350          <fields>
24351            <field>
24352              <name>data</name>
24353              <description>Bits [31:0] of data entry</description>
24354              <bitOffset>0</bitOffset>
24355              <bitWidth>32</bitWidth>
24356              <access>read-write</access>
24357            </field>
24358          </fields>
24359        </register>
24360        <register>
24361          <dim>4</dim>
24362          <dimIncrement>0x10</dimIncrement>
24363          <dimIndex>0,1,2,3</dimIndex>
24364          <name>DATAW2S%sUM</name>
24365          <description>Cache Data Storage (uppermost word)</description>
24366          <addressOffset>0x280</addressOffset>
24367          <size>32</size>
24368          <access>read-write</access>
24369          <resetValue>0</resetValue>
24370          <resetMask>0xFFFFFFFF</resetMask>
24371          <fields>
24372            <field>
24373              <name>data</name>
24374              <description>Bits [127:96] of data entry</description>
24375              <bitOffset>0</bitOffset>
24376              <bitWidth>32</bitWidth>
24377              <access>read-write</access>
24378            </field>
24379          </fields>
24380        </register>
24381        <register>
24382          <dim>4</dim>
24383          <dimIncrement>0x10</dimIncrement>
24384          <dimIndex>0,1,2,3</dimIndex>
24385          <name>DATAW2S%sMU</name>
24386          <description>Cache Data Storage (mid-upper word)</description>
24387          <addressOffset>0x284</addressOffset>
24388          <size>32</size>
24389          <access>read-write</access>
24390          <resetValue>0</resetValue>
24391          <resetMask>0xFFFFFFFF</resetMask>
24392          <fields>
24393            <field>
24394              <name>data</name>
24395              <description>Bits [95:64] of data entry</description>
24396              <bitOffset>0</bitOffset>
24397              <bitWidth>32</bitWidth>
24398              <access>read-write</access>
24399            </field>
24400          </fields>
24401        </register>
24402        <register>
24403          <dim>4</dim>
24404          <dimIncrement>0x10</dimIncrement>
24405          <dimIndex>0,1,2,3</dimIndex>
24406          <name>DATAW2S%sML</name>
24407          <description>Cache Data Storage (mid-lower word)</description>
24408          <addressOffset>0x288</addressOffset>
24409          <size>32</size>
24410          <access>read-write</access>
24411          <resetValue>0</resetValue>
24412          <resetMask>0xFFFFFFFF</resetMask>
24413          <fields>
24414            <field>
24415              <name>data</name>
24416              <description>Bits [63:32] of data entry</description>
24417              <bitOffset>0</bitOffset>
24418              <bitWidth>32</bitWidth>
24419              <access>read-write</access>
24420            </field>
24421          </fields>
24422        </register>
24423        <register>
24424          <dim>4</dim>
24425          <dimIncrement>0x10</dimIncrement>
24426          <dimIndex>0,1,2,3</dimIndex>
24427          <name>DATAW2S%sLM</name>
24428          <description>Cache Data Storage (lowermost word)</description>
24429          <addressOffset>0x28C</addressOffset>
24430          <size>32</size>
24431          <access>read-write</access>
24432          <resetValue>0</resetValue>
24433          <resetMask>0xFFFFFFFF</resetMask>
24434          <fields>
24435            <field>
24436              <name>data</name>
24437              <description>Bits [31:0] of data entry</description>
24438              <bitOffset>0</bitOffset>
24439              <bitWidth>32</bitWidth>
24440              <access>read-write</access>
24441            </field>
24442          </fields>
24443        </register>
24444        <register>
24445          <dim>4</dim>
24446          <dimIncrement>0x10</dimIncrement>
24447          <dimIndex>0,1,2,3</dimIndex>
24448          <name>DATAW3S%sUM</name>
24449          <description>Cache Data Storage (uppermost word)</description>
24450          <addressOffset>0x2C0</addressOffset>
24451          <size>32</size>
24452          <access>read-write</access>
24453          <resetValue>0</resetValue>
24454          <resetMask>0xFFFFFFFF</resetMask>
24455          <fields>
24456            <field>
24457              <name>data</name>
24458              <description>Bits [127:96] of data entry</description>
24459              <bitOffset>0</bitOffset>
24460              <bitWidth>32</bitWidth>
24461              <access>read-write</access>
24462            </field>
24463          </fields>
24464        </register>
24465        <register>
24466          <dim>4</dim>
24467          <dimIncrement>0x10</dimIncrement>
24468          <dimIndex>0,1,2,3</dimIndex>
24469          <name>DATAW3S%sMU</name>
24470          <description>Cache Data Storage (mid-upper word)</description>
24471          <addressOffset>0x2C4</addressOffset>
24472          <size>32</size>
24473          <access>read-write</access>
24474          <resetValue>0</resetValue>
24475          <resetMask>0xFFFFFFFF</resetMask>
24476          <fields>
24477            <field>
24478              <name>data</name>
24479              <description>Bits [95:64] of data entry</description>
24480              <bitOffset>0</bitOffset>
24481              <bitWidth>32</bitWidth>
24482              <access>read-write</access>
24483            </field>
24484          </fields>
24485        </register>
24486        <register>
24487          <dim>4</dim>
24488          <dimIncrement>0x10</dimIncrement>
24489          <dimIndex>0,1,2,3</dimIndex>
24490          <name>DATAW3S%sML</name>
24491          <description>Cache Data Storage (mid-lower word)</description>
24492          <addressOffset>0x2C8</addressOffset>
24493          <size>32</size>
24494          <access>read-write</access>
24495          <resetValue>0</resetValue>
24496          <resetMask>0xFFFFFFFF</resetMask>
24497          <fields>
24498            <field>
24499              <name>data</name>
24500              <description>Bits [63:32] of data entry</description>
24501              <bitOffset>0</bitOffset>
24502              <bitWidth>32</bitWidth>
24503              <access>read-write</access>
24504            </field>
24505          </fields>
24506        </register>
24507        <register>
24508          <dim>4</dim>
24509          <dimIncrement>0x10</dimIncrement>
24510          <dimIndex>0,1,2,3</dimIndex>
24511          <name>DATAW3S%sLM</name>
24512          <description>Cache Data Storage (lowermost word)</description>
24513          <addressOffset>0x2CC</addressOffset>
24514          <size>32</size>
24515          <access>read-write</access>
24516          <resetValue>0</resetValue>
24517          <resetMask>0xFFFFFFFF</resetMask>
24518          <fields>
24519            <field>
24520              <name>data</name>
24521              <description>Bits [31:0] of data entry</description>
24522              <bitOffset>0</bitOffset>
24523              <bitWidth>32</bitWidth>
24524              <access>read-write</access>
24525            </field>
24526          </fields>
24527        </register>
24528      </registers>
24529    </peripheral>
24530    <peripheral>
24531      <name>FTFA</name>
24532      <description>Flash Memory Interface</description>
24533      <prependToName>FTFA_</prependToName>
24534      <baseAddress>0x40020000</baseAddress>
24535      <addressBlock>
24536        <offset>0</offset>
24537        <size>0x2C</size>
24538        <usage>registers</usage>
24539      </addressBlock>
24540      <interrupt>
24541        <name>FTFA</name>
24542        <value>18</value>
24543      </interrupt>
24544      <interrupt>
24545        <name>Read_Collision</name>
24546        <value>19</value>
24547      </interrupt>
24548      <registers>
24549        <register>
24550          <name>FSTAT</name>
24551          <description>Flash Status Register</description>
24552          <addressOffset>0</addressOffset>
24553          <size>8</size>
24554          <access>read-write</access>
24555          <resetValue>0</resetValue>
24556          <resetMask>0xFF</resetMask>
24557          <fields>
24558            <field>
24559              <name>MGSTAT0</name>
24560              <description>Memory Controller Command Completion Status Flag</description>
24561              <bitOffset>0</bitOffset>
24562              <bitWidth>1</bitWidth>
24563              <access>read-only</access>
24564            </field>
24565            <field>
24566              <name>FPVIOL</name>
24567              <description>Flash Protection Violation Flag</description>
24568              <bitOffset>4</bitOffset>
24569              <bitWidth>1</bitWidth>
24570              <access>read-write</access>
24571              <enumeratedValues>
24572                <enumeratedValue>
24573                  <name>0</name>
24574                  <description>No protection violation detected</description>
24575                  <value>#0</value>
24576                </enumeratedValue>
24577                <enumeratedValue>
24578                  <name>1</name>
24579                  <description>Protection violation detected</description>
24580                  <value>#1</value>
24581                </enumeratedValue>
24582              </enumeratedValues>
24583            </field>
24584            <field>
24585              <name>ACCERR</name>
24586              <description>Flash Access Error Flag</description>
24587              <bitOffset>5</bitOffset>
24588              <bitWidth>1</bitWidth>
24589              <access>read-write</access>
24590              <enumeratedValues>
24591                <enumeratedValue>
24592                  <name>0</name>
24593                  <description>No access error detected</description>
24594                  <value>#0</value>
24595                </enumeratedValue>
24596                <enumeratedValue>
24597                  <name>1</name>
24598                  <description>Access error detected</description>
24599                  <value>#1</value>
24600                </enumeratedValue>
24601              </enumeratedValues>
24602            </field>
24603            <field>
24604              <name>RDCOLERR</name>
24605              <description>Flash Read Collision Error Flag</description>
24606              <bitOffset>6</bitOffset>
24607              <bitWidth>1</bitWidth>
24608              <access>read-write</access>
24609              <enumeratedValues>
24610                <enumeratedValue>
24611                  <name>0</name>
24612                  <description>No collision error detected</description>
24613                  <value>#0</value>
24614                </enumeratedValue>
24615                <enumeratedValue>
24616                  <name>1</name>
24617                  <description>Collision error detected</description>
24618                  <value>#1</value>
24619                </enumeratedValue>
24620              </enumeratedValues>
24621            </field>
24622            <field>
24623              <name>CCIF</name>
24624              <description>Command Complete Interrupt Flag</description>
24625              <bitOffset>7</bitOffset>
24626              <bitWidth>1</bitWidth>
24627              <access>read-write</access>
24628              <enumeratedValues>
24629                <enumeratedValue>
24630                  <name>0</name>
24631                  <description>Flash command in progress</description>
24632                  <value>#0</value>
24633                </enumeratedValue>
24634                <enumeratedValue>
24635                  <name>1</name>
24636                  <description>Flash command has completed</description>
24637                  <value>#1</value>
24638                </enumeratedValue>
24639              </enumeratedValues>
24640            </field>
24641          </fields>
24642        </register>
24643        <register>
24644          <name>FCNFG</name>
24645          <description>Flash Configuration Register</description>
24646          <addressOffset>0x1</addressOffset>
24647          <size>8</size>
24648          <access>read-write</access>
24649          <resetValue>0</resetValue>
24650          <resetMask>0xFF</resetMask>
24651          <fields>
24652            <field>
24653              <name>ERSSUSP</name>
24654              <description>Erase Suspend</description>
24655              <bitOffset>4</bitOffset>
24656              <bitWidth>1</bitWidth>
24657              <access>read-write</access>
24658              <enumeratedValues>
24659                <enumeratedValue>
24660                  <name>0</name>
24661                  <description>No suspend requested</description>
24662                  <value>#0</value>
24663                </enumeratedValue>
24664                <enumeratedValue>
24665                  <name>1</name>
24666                  <description>Suspend the current Erase Flash Sector command execution.</description>
24667                  <value>#1</value>
24668                </enumeratedValue>
24669              </enumeratedValues>
24670            </field>
24671            <field>
24672              <name>ERSAREQ</name>
24673              <description>Erase All Request</description>
24674              <bitOffset>5</bitOffset>
24675              <bitWidth>1</bitWidth>
24676              <access>read-only</access>
24677              <enumeratedValues>
24678                <enumeratedValue>
24679                  <name>0</name>
24680                  <description>No request or request complete</description>
24681                  <value>#0</value>
24682                </enumeratedValue>
24683                <enumeratedValue>
24684                  <name>1</name>
24685                  <description>Request to: run the Erase All Blocks command, verify the erased state, program the security byte in the Flash Configuration Field to the unsecure state, and release MCU security by setting the FSEC[SEC] field to the unsecure state.</description>
24686                  <value>#1</value>
24687                </enumeratedValue>
24688              </enumeratedValues>
24689            </field>
24690            <field>
24691              <name>RDCOLLIE</name>
24692              <description>Read Collision Error Interrupt Enable</description>
24693              <bitOffset>6</bitOffset>
24694              <bitWidth>1</bitWidth>
24695              <access>read-write</access>
24696              <enumeratedValues>
24697                <enumeratedValue>
24698                  <name>0</name>
24699                  <description>Read collision error interrupt disabled</description>
24700                  <value>#0</value>
24701                </enumeratedValue>
24702                <enumeratedValue>
24703                  <name>1</name>
24704                  <description>Read collision error interrupt enabled. An interrupt request is generated whenever a flash memory read collision error is detected (see the description of FSTAT[RDCOLERR]).</description>
24705                  <value>#1</value>
24706                </enumeratedValue>
24707              </enumeratedValues>
24708            </field>
24709            <field>
24710              <name>CCIE</name>
24711              <description>Command Complete Interrupt Enable</description>
24712              <bitOffset>7</bitOffset>
24713              <bitWidth>1</bitWidth>
24714              <access>read-write</access>
24715              <enumeratedValues>
24716                <enumeratedValue>
24717                  <name>0</name>
24718                  <description>Command complete interrupt disabled</description>
24719                  <value>#0</value>
24720                </enumeratedValue>
24721                <enumeratedValue>
24722                  <name>1</name>
24723                  <description>Command complete interrupt enabled. An interrupt request is generated whenever the FSTAT[CCIF] flag is set.</description>
24724                  <value>#1</value>
24725                </enumeratedValue>
24726              </enumeratedValues>
24727            </field>
24728          </fields>
24729        </register>
24730        <register>
24731          <name>FSEC</name>
24732          <description>Flash Security Register</description>
24733          <addressOffset>0x2</addressOffset>
24734          <size>8</size>
24735          <access>read-only</access>
24736          <resetValue>0</resetValue>
24737          <resetMask>0</resetMask>
24738          <fields>
24739            <field>
24740              <name>SEC</name>
24741              <description>Flash Security</description>
24742              <bitOffset>0</bitOffset>
24743              <bitWidth>2</bitWidth>
24744              <access>read-only</access>
24745              <enumeratedValues>
24746                <enumeratedValue>
24747                  <name>00</name>
24748                  <description>MCU security status is secure.</description>
24749                  <value>#00</value>
24750                </enumeratedValue>
24751                <enumeratedValue>
24752                  <name>01</name>
24753                  <description>MCU security status is secure.</description>
24754                  <value>#01</value>
24755                </enumeratedValue>
24756                <enumeratedValue>
24757                  <name>10</name>
24758                  <description>MCU security status is unsecure. (The standard shipping condition of the flash memory module is unsecure.)</description>
24759                  <value>#10</value>
24760                </enumeratedValue>
24761                <enumeratedValue>
24762                  <name>11</name>
24763                  <description>MCU security status is secure.</description>
24764                  <value>#11</value>
24765                </enumeratedValue>
24766              </enumeratedValues>
24767            </field>
24768            <field>
24769              <name>FSLACC</name>
24770              <description>Freescale Failure Analysis Access Code</description>
24771              <bitOffset>2</bitOffset>
24772              <bitWidth>2</bitWidth>
24773              <access>read-only</access>
24774              <enumeratedValues>
24775                <enumeratedValue>
24776                  <name>00</name>
24777                  <description>Freescale factory access granted</description>
24778                  <value>#00</value>
24779                </enumeratedValue>
24780                <enumeratedValue>
24781                  <name>01</name>
24782                  <description>Freescale factory access denied</description>
24783                  <value>#01</value>
24784                </enumeratedValue>
24785                <enumeratedValue>
24786                  <name>10</name>
24787                  <description>Freescale factory access denied</description>
24788                  <value>#10</value>
24789                </enumeratedValue>
24790                <enumeratedValue>
24791                  <name>11</name>
24792                  <description>Freescale factory access granted</description>
24793                  <value>#11</value>
24794                </enumeratedValue>
24795              </enumeratedValues>
24796            </field>
24797            <field>
24798              <name>MEEN</name>
24799              <description>Mass Erase Enable</description>
24800              <bitOffset>4</bitOffset>
24801              <bitWidth>2</bitWidth>
24802              <access>read-only</access>
24803              <enumeratedValues>
24804                <enumeratedValue>
24805                  <name>00</name>
24806                  <description>Mass erase is enabled</description>
24807                  <value>#00</value>
24808                </enumeratedValue>
24809                <enumeratedValue>
24810                  <name>01</name>
24811                  <description>Mass erase is enabled</description>
24812                  <value>#01</value>
24813                </enumeratedValue>
24814                <enumeratedValue>
24815                  <name>10</name>
24816                  <description>Mass erase is disabled</description>
24817                  <value>#10</value>
24818                </enumeratedValue>
24819                <enumeratedValue>
24820                  <name>11</name>
24821                  <description>Mass erase is enabled</description>
24822                  <value>#11</value>
24823                </enumeratedValue>
24824              </enumeratedValues>
24825            </field>
24826            <field>
24827              <name>KEYEN</name>
24828              <description>Backdoor Key Security Enable</description>
24829              <bitOffset>6</bitOffset>
24830              <bitWidth>2</bitWidth>
24831              <access>read-only</access>
24832              <enumeratedValues>
24833                <enumeratedValue>
24834                  <name>00</name>
24835                  <description>Backdoor key access disabled</description>
24836                  <value>#00</value>
24837                </enumeratedValue>
24838                <enumeratedValue>
24839                  <name>01</name>
24840                  <description>Backdoor key access disabled (preferred KEYEN state to disable backdoor key access)</description>
24841                  <value>#01</value>
24842                </enumeratedValue>
24843                <enumeratedValue>
24844                  <name>10</name>
24845                  <description>Backdoor key access enabled</description>
24846                  <value>#10</value>
24847                </enumeratedValue>
24848                <enumeratedValue>
24849                  <name>11</name>
24850                  <description>Backdoor key access disabled</description>
24851                  <value>#11</value>
24852                </enumeratedValue>
24853              </enumeratedValues>
24854            </field>
24855          </fields>
24856        </register>
24857        <register>
24858          <name>FOPT</name>
24859          <description>Flash Option Register</description>
24860          <addressOffset>0x3</addressOffset>
24861          <size>8</size>
24862          <access>read-only</access>
24863          <resetValue>0</resetValue>
24864          <resetMask>0</resetMask>
24865          <fields>
24866            <field>
24867              <name>OPT</name>
24868              <description>Nonvolatile Option</description>
24869              <bitOffset>0</bitOffset>
24870              <bitWidth>8</bitWidth>
24871              <access>read-only</access>
24872            </field>
24873          </fields>
24874        </register>
24875        <register>
24876          <dim>12</dim>
24877          <dimIncrement>0x1</dimIncrement>
24878          <dimIndex>3,2,1,0,7,6,5,4,B,A,9,8</dimIndex>
24879          <name>FCCOB%s</name>
24880          <description>Flash Common Command Object Registers</description>
24881          <addressOffset>0x4</addressOffset>
24882          <size>8</size>
24883          <access>read-write</access>
24884          <resetValue>0</resetValue>
24885          <resetMask>0xFF</resetMask>
24886          <fields>
24887            <field>
24888              <name>CCOBn</name>
24889              <description>The FCCOB register provides a command code and relevant parameters to the memory controller</description>
24890              <bitOffset>0</bitOffset>
24891              <bitWidth>8</bitWidth>
24892              <access>read-write</access>
24893            </field>
24894          </fields>
24895        </register>
24896        <register>
24897          <dim>4</dim>
24898          <dimIncrement>0x1</dimIncrement>
24899          <dimIndex>3,2,1,0</dimIndex>
24900          <name>FPROT%s</name>
24901          <description>Program Flash Protection Registers</description>
24902          <addressOffset>0x10</addressOffset>
24903          <size>8</size>
24904          <access>read-write</access>
24905          <resetValue>0</resetValue>
24906          <resetMask>0</resetMask>
24907          <fields>
24908            <field>
24909              <name>PROT</name>
24910              <description>Program Flash Region Protect</description>
24911              <bitOffset>0</bitOffset>
24912              <bitWidth>8</bitWidth>
24913              <access>read-write</access>
24914              <enumeratedValues>
24915                <enumeratedValue>
24916                  <name>0</name>
24917                  <description>Program flash region is protected.</description>
24918                  <value>#0</value>
24919                </enumeratedValue>
24920                <enumeratedValue>
24921                  <name>1</name>
24922                  <description>Program flash region is not protected</description>
24923                  <value>#1</value>
24924                </enumeratedValue>
24925              </enumeratedValues>
24926            </field>
24927          </fields>
24928        </register>
24929        <register>
24930          <dim>8</dim>
24931          <dimIncrement>0x1</dimIncrement>
24932          <dimIndex>H3,H2,H1,H0,L3,L2,L1,L0</dimIndex>
24933          <name>XACC%s</name>
24934          <description>Execute-only Access Registers</description>
24935          <addressOffset>0x18</addressOffset>
24936          <size>8</size>
24937          <access>read-only</access>
24938          <resetValue>0</resetValue>
24939          <resetMask>0</resetMask>
24940          <fields>
24941            <field>
24942              <name>XA</name>
24943              <description>Execute-only access control</description>
24944              <bitOffset>0</bitOffset>
24945              <bitWidth>8</bitWidth>
24946              <access>read-only</access>
24947              <enumeratedValues>
24948                <enumeratedValue>
24949                  <name>0</name>
24950                  <description>Associated segment is accessible in execute mode only (as an instruction fetch)</description>
24951                  <value>#0</value>
24952                </enumeratedValue>
24953                <enumeratedValue>
24954                  <name>1</name>
24955                  <description>Associated segment is accessible as data or in execute mode</description>
24956                  <value>#1</value>
24957                </enumeratedValue>
24958              </enumeratedValues>
24959            </field>
24960          </fields>
24961        </register>
24962        <register>
24963          <dim>8</dim>
24964          <dimIncrement>0x1</dimIncrement>
24965          <dimIndex>H3,H2,H1,H0,L3,L2,L1,L0</dimIndex>
24966          <name>SACC%s</name>
24967          <description>Supervisor-only Access Registers</description>
24968          <addressOffset>0x20</addressOffset>
24969          <size>8</size>
24970          <access>read-only</access>
24971          <resetValue>0</resetValue>
24972          <resetMask>0</resetMask>
24973          <fields>
24974            <field>
24975              <name>SA</name>
24976              <description>Supervisor-only access control</description>
24977              <bitOffset>0</bitOffset>
24978              <bitWidth>8</bitWidth>
24979              <access>read-only</access>
24980              <enumeratedValues>
24981                <enumeratedValue>
24982                  <name>0</name>
24983                  <description>Associated segment is accessible in supervisor mode only</description>
24984                  <value>#0</value>
24985                </enumeratedValue>
24986                <enumeratedValue>
24987                  <name>1</name>
24988                  <description>Associated segment is accessible in user or supervisor mode</description>
24989                  <value>#1</value>
24990                </enumeratedValue>
24991              </enumeratedValues>
24992            </field>
24993          </fields>
24994        </register>
24995        <register>
24996          <name>FACSS</name>
24997          <description>Flash Access Segment Size Register</description>
24998          <addressOffset>0x28</addressOffset>
24999          <size>8</size>
25000          <access>read-only</access>
25001          <resetValue>0</resetValue>
25002          <resetMask>0</resetMask>
25003          <fields>
25004            <field>
25005              <name>SGSIZE</name>
25006              <description>Segment Size</description>
25007              <bitOffset>0</bitOffset>
25008              <bitWidth>8</bitWidth>
25009              <access>read-only</access>
25010            </field>
25011          </fields>
25012        </register>
25013        <register>
25014          <name>FACSN</name>
25015          <description>Flash Access Segment Number Register</description>
25016          <addressOffset>0x2B</addressOffset>
25017          <size>8</size>
25018          <access>read-only</access>
25019          <resetValue>0</resetValue>
25020          <resetMask>0</resetMask>
25021          <fields>
25022            <field>
25023              <name>NUMSG</name>
25024              <description>Number of Segments Indicator</description>
25025              <bitOffset>0</bitOffset>
25026              <bitWidth>8</bitWidth>
25027              <access>read-only</access>
25028              <enumeratedValues>
25029                <enumeratedValue>
25030                  <name>100000</name>
25031                  <description>Program flash memory is divided into 32 segments (64 Kbytes, 128 Kbytes)</description>
25032                  <value>#100000</value>
25033                </enumeratedValue>
25034                <enumeratedValue>
25035                  <name>101000</name>
25036                  <description>Program flash memory is divided into 40 segments (160 Kbytes)</description>
25037                  <value>#101000</value>
25038                </enumeratedValue>
25039                <enumeratedValue>
25040                  <name>1000000</name>
25041                  <description>Program flash memory is divided into 64 segments (256 Kbytes, 512 Kbytes)</description>
25042                  <value>#1000000</value>
25043                </enumeratedValue>
25044              </enumeratedValues>
25045            </field>
25046          </fields>
25047        </register>
25048      </registers>
25049    </peripheral>
25050    <peripheral>
25051      <name>DMAMUX</name>
25052      <description>DMA channel multiplexor</description>
25053      <prependToName>DMAMUX_</prependToName>
25054      <baseAddress>0x40021000</baseAddress>
25055      <addressBlock>
25056        <offset>0</offset>
25057        <size>0x20</size>
25058        <usage>registers</usage>
25059      </addressBlock>
25060      <registers>
25061        <register>
25062          <dim>32</dim>
25063          <dimIncrement>0x1</dimIncrement>
25064          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex>
25065          <name>CHCFG%s</name>
25066          <description>Channel Configuration register</description>
25067          <addressOffset>0</addressOffset>
25068          <size>8</size>
25069          <access>read-write</access>
25070          <resetValue>0</resetValue>
25071          <resetMask>0xFF</resetMask>
25072          <fields>
25073            <field>
25074              <name>SOURCE</name>
25075              <description>DMA Channel Source (Slot)</description>
25076              <bitOffset>0</bitOffset>
25077              <bitWidth>6</bitWidth>
25078              <access>read-write</access>
25079              <enumeratedValues>
25080                <enumeratedValue>
25081                  <name>0</name>
25082                  <description>Disable_Signal</description>
25083                  <value>#0</value>
25084                </enumeratedValue>
25085                <enumeratedValue>
25086                  <name>1</name>
25087                  <description>TSI0_Signal</description>
25088                  <value>#1</value>
25089                </enumeratedValue>
25090                <enumeratedValue>
25091                  <name>2</name>
25092                  <description>LPUART0_Rx_Signal</description>
25093                  <value>#10</value>
25094                </enumeratedValue>
25095                <enumeratedValue>
25096                  <name>3</name>
25097                  <description>LPUART0_Tx_Signal</description>
25098                  <value>#11</value>
25099                </enumeratedValue>
25100                <enumeratedValue>
25101                  <name>4</name>
25102                  <description>LPUART1_Rx_Signal</description>
25103                  <value>#100</value>
25104                </enumeratedValue>
25105                <enumeratedValue>
25106                  <name>5</name>
25107                  <description>LPUART1_Tx_Signal</description>
25108                  <value>#101</value>
25109                </enumeratedValue>
25110                <enumeratedValue>
25111                  <name>6</name>
25112                  <description>LPUART2_Rx_Signal</description>
25113                  <value>#110</value>
25114                </enumeratedValue>
25115                <enumeratedValue>
25116                  <name>7</name>
25117                  <description>LPUART2_Tx_Signal</description>
25118                  <value>#111</value>
25119                </enumeratedValue>
25120                <enumeratedValue>
25121                  <name>8</name>
25122                  <description>LPUART3_Rx_Signal</description>
25123                  <value>#1000</value>
25124                </enumeratedValue>
25125                <enumeratedValue>
25126                  <name>9</name>
25127                  <description>LPUART3_Tx_Signal</description>
25128                  <value>#1001</value>
25129                </enumeratedValue>
25130                <enumeratedValue>
25131                  <name>10</name>
25132                  <description>LPUART4_Rx_Signal</description>
25133                  <value>#1010</value>
25134                </enumeratedValue>
25135                <enumeratedValue>
25136                  <name>11</name>
25137                  <description>LPUART4_Tx_Signal</description>
25138                  <value>#1011</value>
25139                </enumeratedValue>
25140                <enumeratedValue>
25141                  <name>12</name>
25142                  <description>I2S0_Rx_Signal</description>
25143                  <value>#1100</value>
25144                </enumeratedValue>
25145                <enumeratedValue>
25146                  <name>13</name>
25147                  <description>I2S0_Tx_Signal</description>
25148                  <value>#1101</value>
25149                </enumeratedValue>
25150                <enumeratedValue>
25151                  <name>14</name>
25152                  <description>SPI0_Rx_Signal</description>
25153                  <value>#1110</value>
25154                </enumeratedValue>
25155                <enumeratedValue>
25156                  <name>15</name>
25157                  <description>SPI0_Tx_Signal</description>
25158                  <value>#1111</value>
25159                </enumeratedValue>
25160                <enumeratedValue>
25161                  <name>16</name>
25162                  <description>SPI1_Rx_Signal</description>
25163                  <value>#10000</value>
25164                </enumeratedValue>
25165                <enumeratedValue>
25166                  <name>17</name>
25167                  <description>SPI1_Tx_Signal</description>
25168                  <value>#10001</value>
25169                </enumeratedValue>
25170                <enumeratedValue>
25171                  <name>18</name>
25172                  <description>I2C0_I2C3_Signal</description>
25173                  <value>#10010</value>
25174                </enumeratedValue>
25175                <enumeratedValue>
25176                  <name>19</name>
25177                  <description>I2C1_I2C2_Signal</description>
25178                  <value>#10011</value>
25179                </enumeratedValue>
25180                <enumeratedValue>
25181                  <name>20</name>
25182                  <description>FTM0_Channel0_Signal</description>
25183                  <value>#10100</value>
25184                </enumeratedValue>
25185                <enumeratedValue>
25186                  <name>21</name>
25187                  <description>FTM0_Channel1_Signal</description>
25188                  <value>#10101</value>
25189                </enumeratedValue>
25190                <enumeratedValue>
25191                  <name>22</name>
25192                  <description>FTM0_Channel2_Signal</description>
25193                  <value>#10110</value>
25194                </enumeratedValue>
25195                <enumeratedValue>
25196                  <name>23</name>
25197                  <description>FTM0_Channel3_Signal</description>
25198                  <value>#10111</value>
25199                </enumeratedValue>
25200                <enumeratedValue>
25201                  <name>24</name>
25202                  <description>FTM0_Channel4_Signal</description>
25203                  <value>#11000</value>
25204                </enumeratedValue>
25205                <enumeratedValue>
25206                  <name>25</name>
25207                  <description>FTM0_Channel5_Signal</description>
25208                  <value>#11001</value>
25209                </enumeratedValue>
25210                <enumeratedValue>
25211                  <name>26</name>
25212                  <description>FTM0_Channel6_Signal</description>
25213                  <value>#11010</value>
25214                </enumeratedValue>
25215                <enumeratedValue>
25216                  <name>27</name>
25217                  <description>FTM0_Channel7_Signal</description>
25218                  <value>#11011</value>
25219                </enumeratedValue>
25220                <enumeratedValue>
25221                  <name>28</name>
25222                  <description>FTM1_Channel0_Signal</description>
25223                  <value>#11100</value>
25224                </enumeratedValue>
25225                <enumeratedValue>
25226                  <name>29</name>
25227                  <description>FTM1_Channel1_Signal</description>
25228                  <value>#11101</value>
25229                </enumeratedValue>
25230                <enumeratedValue>
25231                  <name>30</name>
25232                  <description>FTM2_Channel0_Signal</description>
25233                  <value>#11110</value>
25234                </enumeratedValue>
25235                <enumeratedValue>
25236                  <name>31</name>
25237                  <description>FTM2_Channel1_Signal</description>
25238                  <value>#11111</value>
25239                </enumeratedValue>
25240                <enumeratedValue>
25241                  <name>32</name>
25242                  <description>FTM3_Channel0_Signal</description>
25243                  <value>#100000</value>
25244                </enumeratedValue>
25245                <enumeratedValue>
25246                  <name>33</name>
25247                  <description>FTM3_Channel1_Signal</description>
25248                  <value>#100001</value>
25249                </enumeratedValue>
25250                <enumeratedValue>
25251                  <name>34</name>
25252                  <description>FTM3_Channel2_Signal</description>
25253                  <value>#100010</value>
25254                </enumeratedValue>
25255                <enumeratedValue>
25256                  <name>35</name>
25257                  <description>FTM3_Channel3_Signal</description>
25258                  <value>#100011</value>
25259                </enumeratedValue>
25260                <enumeratedValue>
25261                  <name>36</name>
25262                  <description>FTM3_Channel4_Signal</description>
25263                  <value>#100100</value>
25264                </enumeratedValue>
25265                <enumeratedValue>
25266                  <name>37</name>
25267                  <description>FTM3_Channel5_Signal</description>
25268                  <value>#100101</value>
25269                </enumeratedValue>
25270                <enumeratedValue>
25271                  <name>38</name>
25272                  <description>FTM3_Channel6_Signal</description>
25273                  <value>#100110</value>
25274                </enumeratedValue>
25275                <enumeratedValue>
25276                  <name>39</name>
25277                  <description>FTM3_Channel7_Signal</description>
25278                  <value>#100111</value>
25279                </enumeratedValue>
25280                <enumeratedValue>
25281                  <name>40</name>
25282                  <description>ADC0_Signal</description>
25283                  <value>#101000</value>
25284                </enumeratedValue>
25285                <enumeratedValue>
25286                  <name>42</name>
25287                  <description>CMP0_Signal</description>
25288                  <value>#101010</value>
25289                </enumeratedValue>
25290                <enumeratedValue>
25291                  <name>43</name>
25292                  <description>CMP1_Signal</description>
25293                  <value>#101011</value>
25294                </enumeratedValue>
25295                <enumeratedValue>
25296                  <name>45</name>
25297                  <description>DAC0_Signal</description>
25298                  <value>#101101</value>
25299                </enumeratedValue>
25300                <enumeratedValue>
25301                  <name>47</name>
25302                  <description>CMT_Signal</description>
25303                  <value>#101111</value>
25304                </enumeratedValue>
25305                <enumeratedValue>
25306                  <name>48</name>
25307                  <description>PDB_Signal</description>
25308                  <value>#110000</value>
25309                </enumeratedValue>
25310                <enumeratedValue>
25311                  <name>49</name>
25312                  <description>PortA_Signal</description>
25313                  <value>#110001</value>
25314                </enumeratedValue>
25315                <enumeratedValue>
25316                  <name>50</name>
25317                  <description>PortB_Signal</description>
25318                  <value>#110010</value>
25319                </enumeratedValue>
25320                <enumeratedValue>
25321                  <name>51</name>
25322                  <description>PortC_Signal</description>
25323                  <value>#110011</value>
25324                </enumeratedValue>
25325                <enumeratedValue>
25326                  <name>52</name>
25327                  <description>PortD_Signal</description>
25328                  <value>#110100</value>
25329                </enumeratedValue>
25330                <enumeratedValue>
25331                  <name>53</name>
25332                  <description>PortE_Signal</description>
25333                  <value>#110101</value>
25334                </enumeratedValue>
25335                <enumeratedValue>
25336                  <name>58</name>
25337                  <description>SPI2_Rx_Signal</description>
25338                  <value>#111010</value>
25339                </enumeratedValue>
25340                <enumeratedValue>
25341                  <name>59</name>
25342                  <description>SPI2_Tx_Signal</description>
25343                  <value>#111011</value>
25344                </enumeratedValue>
25345                <enumeratedValue>
25346                  <name>60</name>
25347                  <description>AlwaysOn60_Signal</description>
25348                  <value>#111100</value>
25349                </enumeratedValue>
25350                <enumeratedValue>
25351                  <name>61</name>
25352                  <description>AlwaysOn61_Signal</description>
25353                  <value>#111101</value>
25354                </enumeratedValue>
25355                <enumeratedValue>
25356                  <name>62</name>
25357                  <description>AlwaysOn62_Signal</description>
25358                  <value>#111110</value>
25359                </enumeratedValue>
25360                <enumeratedValue>
25361                  <name>63</name>
25362                  <description>AlwaysOn63_Signal</description>
25363                  <value>#111111</value>
25364                </enumeratedValue>
25365              </enumeratedValues>
25366            </field>
25367            <field>
25368              <name>TRIG</name>
25369              <description>DMA Channel Trigger Enable</description>
25370              <bitOffset>6</bitOffset>
25371              <bitWidth>1</bitWidth>
25372              <access>read-write</access>
25373              <enumeratedValues>
25374                <enumeratedValue>
25375                  <name>0</name>
25376                  <description>Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)</description>
25377                  <value>#0</value>
25378                </enumeratedValue>
25379                <enumeratedValue>
25380                  <name>1</name>
25381                  <description>Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode.</description>
25382                  <value>#1</value>
25383                </enumeratedValue>
25384              </enumeratedValues>
25385            </field>
25386            <field>
25387              <name>ENBL</name>
25388              <description>DMA Channel Enable</description>
25389              <bitOffset>7</bitOffset>
25390              <bitWidth>1</bitWidth>
25391              <access>read-write</access>
25392              <enumeratedValues>
25393                <enumeratedValue>
25394                  <name>0</name>
25395                  <description>DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel.</description>
25396                  <value>#0</value>
25397                </enumeratedValue>
25398                <enumeratedValue>
25399                  <name>1</name>
25400                  <description>DMA channel is enabled</description>
25401                  <value>#1</value>
25402                </enumeratedValue>
25403              </enumeratedValues>
25404            </field>
25405          </fields>
25406        </register>
25407      </registers>
25408    </peripheral>
25409    <peripheral>
25410      <name>SPI0</name>
25411      <description>Serial Peripheral Interface</description>
25412      <groupName>SPI</groupName>
25413      <prependToName>SPI0_</prependToName>
25414      <baseAddress>0x4002C000</baseAddress>
25415      <addressBlock>
25416        <offset>0</offset>
25417        <size>0x8C</size>
25418        <usage>registers</usage>
25419      </addressBlock>
25420      <interrupt>
25421        <name>SPI0</name>
25422        <value>26</value>
25423      </interrupt>
25424      <registers>
25425        <register>
25426          <name>MCR</name>
25427          <description>Module Configuration Register</description>
25428          <addressOffset>0</addressOffset>
25429          <size>32</size>
25430          <access>read-write</access>
25431          <resetValue>0x4001</resetValue>
25432          <resetMask>0xFFFFFFFF</resetMask>
25433          <fields>
25434            <field>
25435              <name>HALT</name>
25436              <description>Halt</description>
25437              <bitOffset>0</bitOffset>
25438              <bitWidth>1</bitWidth>
25439              <access>read-write</access>
25440              <enumeratedValues>
25441                <enumeratedValue>
25442                  <name>0</name>
25443                  <description>Start transfers.</description>
25444                  <value>#0</value>
25445                </enumeratedValue>
25446                <enumeratedValue>
25447                  <name>1</name>
25448                  <description>Stop transfers.</description>
25449                  <value>#1</value>
25450                </enumeratedValue>
25451              </enumeratedValues>
25452            </field>
25453            <field>
25454              <name>SMPL_PT</name>
25455              <description>Sample Point</description>
25456              <bitOffset>8</bitOffset>
25457              <bitWidth>2</bitWidth>
25458              <access>read-write</access>
25459              <enumeratedValues>
25460                <enumeratedValue>
25461                  <name>00</name>
25462                  <description>0 protocol clock cycles between SCK edge and SIN sample</description>
25463                  <value>#00</value>
25464                </enumeratedValue>
25465                <enumeratedValue>
25466                  <name>01</name>
25467                  <description>1 protocol clock cycle between SCK edge and SIN sample</description>
25468                  <value>#01</value>
25469                </enumeratedValue>
25470                <enumeratedValue>
25471                  <name>10</name>
25472                  <description>2 protocol clock cycles between SCK edge and SIN sample</description>
25473                  <value>#10</value>
25474                </enumeratedValue>
25475              </enumeratedValues>
25476            </field>
25477            <field>
25478              <name>CLR_RXF</name>
25479              <description>CLR_RXF</description>
25480              <bitOffset>10</bitOffset>
25481              <bitWidth>1</bitWidth>
25482              <access>write-only</access>
25483              <enumeratedValues>
25484                <enumeratedValue>
25485                  <name>0</name>
25486                  <description>Do not clear the RX FIFO counter.</description>
25487                  <value>#0</value>
25488                </enumeratedValue>
25489                <enumeratedValue>
25490                  <name>1</name>
25491                  <description>Clear the RX FIFO counter.</description>
25492                  <value>#1</value>
25493                </enumeratedValue>
25494              </enumeratedValues>
25495            </field>
25496            <field>
25497              <name>CLR_TXF</name>
25498              <description>Clear TX FIFO</description>
25499              <bitOffset>11</bitOffset>
25500              <bitWidth>1</bitWidth>
25501              <access>write-only</access>
25502              <enumeratedValues>
25503                <enumeratedValue>
25504                  <name>0</name>
25505                  <description>Do not clear the TX FIFO counter.</description>
25506                  <value>#0</value>
25507                </enumeratedValue>
25508                <enumeratedValue>
25509                  <name>1</name>
25510                  <description>Clear the TX FIFO counter.</description>
25511                  <value>#1</value>
25512                </enumeratedValue>
25513              </enumeratedValues>
25514            </field>
25515            <field>
25516              <name>DIS_RXF</name>
25517              <description>Disable Receive FIFO</description>
25518              <bitOffset>12</bitOffset>
25519              <bitWidth>1</bitWidth>
25520              <access>read-write</access>
25521              <enumeratedValues>
25522                <enumeratedValue>
25523                  <name>0</name>
25524                  <description>RX FIFO is enabled.</description>
25525                  <value>#0</value>
25526                </enumeratedValue>
25527                <enumeratedValue>
25528                  <name>1</name>
25529                  <description>RX FIFO is disabled.</description>
25530                  <value>#1</value>
25531                </enumeratedValue>
25532              </enumeratedValues>
25533            </field>
25534            <field>
25535              <name>DIS_TXF</name>
25536              <description>Disable Transmit FIFO</description>
25537              <bitOffset>13</bitOffset>
25538              <bitWidth>1</bitWidth>
25539              <access>read-write</access>
25540              <enumeratedValues>
25541                <enumeratedValue>
25542                  <name>0</name>
25543                  <description>TX FIFO is enabled.</description>
25544                  <value>#0</value>
25545                </enumeratedValue>
25546                <enumeratedValue>
25547                  <name>1</name>
25548                  <description>TX FIFO is disabled.</description>
25549                  <value>#1</value>
25550                </enumeratedValue>
25551              </enumeratedValues>
25552            </field>
25553            <field>
25554              <name>MDIS</name>
25555              <description>Module Disable</description>
25556              <bitOffset>14</bitOffset>
25557              <bitWidth>1</bitWidth>
25558              <access>read-write</access>
25559              <enumeratedValues>
25560                <enumeratedValue>
25561                  <name>0</name>
25562                  <description>Enables the module clocks.</description>
25563                  <value>#0</value>
25564                </enumeratedValue>
25565                <enumeratedValue>
25566                  <name>1</name>
25567                  <description>Allows external logic to disable the module clocks.</description>
25568                  <value>#1</value>
25569                </enumeratedValue>
25570              </enumeratedValues>
25571            </field>
25572            <field>
25573              <name>DOZE</name>
25574              <description>Doze Enable</description>
25575              <bitOffset>15</bitOffset>
25576              <bitWidth>1</bitWidth>
25577              <access>read-write</access>
25578              <enumeratedValues>
25579                <enumeratedValue>
25580                  <name>0</name>
25581                  <description>Doze mode has no effect on the module.</description>
25582                  <value>#0</value>
25583                </enumeratedValue>
25584                <enumeratedValue>
25585                  <name>1</name>
25586                  <description>Doze mode disables the module.</description>
25587                  <value>#1</value>
25588                </enumeratedValue>
25589              </enumeratedValues>
25590            </field>
25591            <field>
25592              <name>PCSIS0</name>
25593              <description>Peripheral Chip Select x Inactive State</description>
25594              <bitOffset>16</bitOffset>
25595              <bitWidth>1</bitWidth>
25596              <access>read-write</access>
25597              <enumeratedValues>
25598                <enumeratedValue>
25599                  <name>0</name>
25600                  <description>The inactive state of PCSx is low.</description>
25601                  <value>#0</value>
25602                </enumeratedValue>
25603                <enumeratedValue>
25604                  <name>1</name>
25605                  <description>The inactive state of PCSx is high.</description>
25606                  <value>#1</value>
25607                </enumeratedValue>
25608              </enumeratedValues>
25609            </field>
25610            <field>
25611              <name>PCSIS1</name>
25612              <description>Peripheral Chip Select x Inactive State</description>
25613              <bitOffset>17</bitOffset>
25614              <bitWidth>1</bitWidth>
25615              <access>read-write</access>
25616              <enumeratedValues>
25617                <enumeratedValue>
25618                  <name>0</name>
25619                  <description>The inactive state of PCSx is low.</description>
25620                  <value>#0</value>
25621                </enumeratedValue>
25622                <enumeratedValue>
25623                  <name>1</name>
25624                  <description>The inactive state of PCSx is high.</description>
25625                  <value>#1</value>
25626                </enumeratedValue>
25627              </enumeratedValues>
25628            </field>
25629            <field>
25630              <name>PCSIS2</name>
25631              <description>Peripheral Chip Select x Inactive State</description>
25632              <bitOffset>18</bitOffset>
25633              <bitWidth>1</bitWidth>
25634              <access>read-write</access>
25635              <enumeratedValues>
25636                <enumeratedValue>
25637                  <name>0</name>
25638                  <description>The inactive state of PCSx is low.</description>
25639                  <value>#0</value>
25640                </enumeratedValue>
25641                <enumeratedValue>
25642                  <name>1</name>
25643                  <description>The inactive state of PCSx is high.</description>
25644                  <value>#1</value>
25645                </enumeratedValue>
25646              </enumeratedValues>
25647            </field>
25648            <field>
25649              <name>PCSIS3</name>
25650              <description>Peripheral Chip Select x Inactive State</description>
25651              <bitOffset>19</bitOffset>
25652              <bitWidth>1</bitWidth>
25653              <access>read-write</access>
25654              <enumeratedValues>
25655                <enumeratedValue>
25656                  <name>0</name>
25657                  <description>The inactive state of PCSx is low.</description>
25658                  <value>#0</value>
25659                </enumeratedValue>
25660                <enumeratedValue>
25661                  <name>1</name>
25662                  <description>The inactive state of PCSx is high.</description>
25663                  <value>#1</value>
25664                </enumeratedValue>
25665              </enumeratedValues>
25666            </field>
25667            <field>
25668              <name>PCSIS4</name>
25669              <description>Peripheral Chip Select x Inactive State</description>
25670              <bitOffset>20</bitOffset>
25671              <bitWidth>1</bitWidth>
25672              <access>read-write</access>
25673              <enumeratedValues>
25674                <enumeratedValue>
25675                  <name>0</name>
25676                  <description>The inactive state of PCSx is low.</description>
25677                  <value>#0</value>
25678                </enumeratedValue>
25679                <enumeratedValue>
25680                  <name>1</name>
25681                  <description>The inactive state of PCSx is high.</description>
25682                  <value>#1</value>
25683                </enumeratedValue>
25684              </enumeratedValues>
25685            </field>
25686            <field>
25687              <name>PCSIS5</name>
25688              <description>Peripheral Chip Select x Inactive State</description>
25689              <bitOffset>21</bitOffset>
25690              <bitWidth>1</bitWidth>
25691              <access>read-write</access>
25692              <enumeratedValues>
25693                <enumeratedValue>
25694                  <name>0</name>
25695                  <description>The inactive state of PCSx is low.</description>
25696                  <value>#0</value>
25697                </enumeratedValue>
25698                <enumeratedValue>
25699                  <name>1</name>
25700                  <description>The inactive state of PCSx is high.</description>
25701                  <value>#1</value>
25702                </enumeratedValue>
25703              </enumeratedValues>
25704            </field>
25705            <field>
25706              <name>ROOE</name>
25707              <description>Receive FIFO Overflow Overwrite Enable</description>
25708              <bitOffset>24</bitOffset>
25709              <bitWidth>1</bitWidth>
25710              <access>read-write</access>
25711              <enumeratedValues>
25712                <enumeratedValue>
25713                  <name>0</name>
25714                  <description>Incoming data is ignored.</description>
25715                  <value>#0</value>
25716                </enumeratedValue>
25717                <enumeratedValue>
25718                  <name>1</name>
25719                  <description>Incoming data is shifted into the shift register.</description>
25720                  <value>#1</value>
25721                </enumeratedValue>
25722              </enumeratedValues>
25723            </field>
25724            <field>
25725              <name>PCSSE</name>
25726              <description>Peripheral Chip Select Strobe Enable</description>
25727              <bitOffset>25</bitOffset>
25728              <bitWidth>1</bitWidth>
25729              <access>read-write</access>
25730              <enumeratedValues>
25731                <enumeratedValue>
25732                  <name>0</name>
25733                  <description>PCS5/ PCSS is used as the Peripheral Chip Select[5] signal.</description>
25734                  <value>#0</value>
25735                </enumeratedValue>
25736                <enumeratedValue>
25737                  <name>1</name>
25738                  <description>PCS5/ PCSS is used as an active-low PCS Strobe signal.</description>
25739                  <value>#1</value>
25740                </enumeratedValue>
25741              </enumeratedValues>
25742            </field>
25743            <field>
25744              <name>MTFE</name>
25745              <description>Modified Transfer Format Enable</description>
25746              <bitOffset>26</bitOffset>
25747              <bitWidth>1</bitWidth>
25748              <access>read-write</access>
25749              <enumeratedValues>
25750                <enumeratedValue>
25751                  <name>0</name>
25752                  <description>Modified SPI transfer format disabled.</description>
25753                  <value>#0</value>
25754                </enumeratedValue>
25755                <enumeratedValue>
25756                  <name>1</name>
25757                  <description>Modified SPI transfer format enabled.</description>
25758                  <value>#1</value>
25759                </enumeratedValue>
25760              </enumeratedValues>
25761            </field>
25762            <field>
25763              <name>FRZ</name>
25764              <description>Freeze</description>
25765              <bitOffset>27</bitOffset>
25766              <bitWidth>1</bitWidth>
25767              <access>read-write</access>
25768              <enumeratedValues>
25769                <enumeratedValue>
25770                  <name>0</name>
25771                  <description>Do not halt serial transfers in Debug mode.</description>
25772                  <value>#0</value>
25773                </enumeratedValue>
25774                <enumeratedValue>
25775                  <name>1</name>
25776                  <description>Halt serial transfers in Debug mode.</description>
25777                  <value>#1</value>
25778                </enumeratedValue>
25779              </enumeratedValues>
25780            </field>
25781            <field>
25782              <name>DCONF</name>
25783              <description>SPI Configuration.</description>
25784              <bitOffset>28</bitOffset>
25785              <bitWidth>2</bitWidth>
25786              <access>read-only</access>
25787              <enumeratedValues>
25788                <enumeratedValue>
25789                  <name>00</name>
25790                  <description>SPI</description>
25791                  <value>#00</value>
25792                </enumeratedValue>
25793              </enumeratedValues>
25794            </field>
25795            <field>
25796              <name>CONT_SCKE</name>
25797              <description>Continuous SCK Enable</description>
25798              <bitOffset>30</bitOffset>
25799              <bitWidth>1</bitWidth>
25800              <access>read-write</access>
25801              <enumeratedValues>
25802                <enumeratedValue>
25803                  <name>0</name>
25804                  <description>Continuous SCK disabled.</description>
25805                  <value>#0</value>
25806                </enumeratedValue>
25807                <enumeratedValue>
25808                  <name>1</name>
25809                  <description>Continuous SCK enabled.</description>
25810                  <value>#1</value>
25811                </enumeratedValue>
25812              </enumeratedValues>
25813            </field>
25814            <field>
25815              <name>MSTR</name>
25816              <description>Master/Slave Mode Select</description>
25817              <bitOffset>31</bitOffset>
25818              <bitWidth>1</bitWidth>
25819              <access>read-write</access>
25820              <enumeratedValues>
25821                <enumeratedValue>
25822                  <name>0</name>
25823                  <description>Enables Slave mode</description>
25824                  <value>#0</value>
25825                </enumeratedValue>
25826                <enumeratedValue>
25827                  <name>1</name>
25828                  <description>Enables Master mode</description>
25829                  <value>#1</value>
25830                </enumeratedValue>
25831              </enumeratedValues>
25832            </field>
25833          </fields>
25834        </register>
25835        <register>
25836          <name>TCR</name>
25837          <description>Transfer Count Register</description>
25838          <addressOffset>0x8</addressOffset>
25839          <size>32</size>
25840          <access>read-write</access>
25841          <resetValue>0</resetValue>
25842          <resetMask>0xFFFFFFFF</resetMask>
25843          <fields>
25844            <field>
25845              <name>SPI_TCNT</name>
25846              <description>SPI Transfer Counter</description>
25847              <bitOffset>16</bitOffset>
25848              <bitWidth>16</bitWidth>
25849              <access>read-write</access>
25850            </field>
25851          </fields>
25852        </register>
25853        <register>
25854          <dim>2</dim>
25855          <dimIncrement>0x4</dimIncrement>
25856          <dimIndex>0,1</dimIndex>
25857          <name>CTAR%s</name>
25858          <description>Clock and Transfer Attributes Register (In Master Mode)</description>
25859          <alternateGroup>SPI0</alternateGroup>
25860          <addressOffset>0xC</addressOffset>
25861          <size>32</size>
25862          <access>read-write</access>
25863          <resetValue>0x78000000</resetValue>
25864          <resetMask>0xFFFFFFFF</resetMask>
25865          <fields>
25866            <field>
25867              <name>BR</name>
25868              <description>Baud Rate Scaler</description>
25869              <bitOffset>0</bitOffset>
25870              <bitWidth>4</bitWidth>
25871              <access>read-write</access>
25872            </field>
25873            <field>
25874              <name>DT</name>
25875              <description>Delay After Transfer Scaler</description>
25876              <bitOffset>4</bitOffset>
25877              <bitWidth>4</bitWidth>
25878              <access>read-write</access>
25879            </field>
25880            <field>
25881              <name>ASC</name>
25882              <description>After SCK Delay Scaler</description>
25883              <bitOffset>8</bitOffset>
25884              <bitWidth>4</bitWidth>
25885              <access>read-write</access>
25886            </field>
25887            <field>
25888              <name>CSSCK</name>
25889              <description>PCS to SCK Delay Scaler</description>
25890              <bitOffset>12</bitOffset>
25891              <bitWidth>4</bitWidth>
25892              <access>read-write</access>
25893            </field>
25894            <field>
25895              <name>PBR</name>
25896              <description>Baud Rate Prescaler</description>
25897              <bitOffset>16</bitOffset>
25898              <bitWidth>2</bitWidth>
25899              <access>read-write</access>
25900              <enumeratedValues>
25901                <enumeratedValue>
25902                  <name>00</name>
25903                  <description>Baud Rate Prescaler value is 2.</description>
25904                  <value>#00</value>
25905                </enumeratedValue>
25906                <enumeratedValue>
25907                  <name>01</name>
25908                  <description>Baud Rate Prescaler value is 3.</description>
25909                  <value>#01</value>
25910                </enumeratedValue>
25911                <enumeratedValue>
25912                  <name>10</name>
25913                  <description>Baud Rate Prescaler value is 5.</description>
25914                  <value>#10</value>
25915                </enumeratedValue>
25916                <enumeratedValue>
25917                  <name>11</name>
25918                  <description>Baud Rate Prescaler value is 7.</description>
25919                  <value>#11</value>
25920                </enumeratedValue>
25921              </enumeratedValues>
25922            </field>
25923            <field>
25924              <name>PDT</name>
25925              <description>Delay after Transfer Prescaler</description>
25926              <bitOffset>18</bitOffset>
25927              <bitWidth>2</bitWidth>
25928              <access>read-write</access>
25929              <enumeratedValues>
25930                <enumeratedValue>
25931                  <name>00</name>
25932                  <description>Delay after Transfer Prescaler value is 1.</description>
25933                  <value>#00</value>
25934                </enumeratedValue>
25935                <enumeratedValue>
25936                  <name>01</name>
25937                  <description>Delay after Transfer Prescaler value is 3.</description>
25938                  <value>#01</value>
25939                </enumeratedValue>
25940                <enumeratedValue>
25941                  <name>10</name>
25942                  <description>Delay after Transfer Prescaler value is 5.</description>
25943                  <value>#10</value>
25944                </enumeratedValue>
25945                <enumeratedValue>
25946                  <name>11</name>
25947                  <description>Delay after Transfer Prescaler value is 7.</description>
25948                  <value>#11</value>
25949                </enumeratedValue>
25950              </enumeratedValues>
25951            </field>
25952            <field>
25953              <name>PASC</name>
25954              <description>After SCK Delay Prescaler</description>
25955              <bitOffset>20</bitOffset>
25956              <bitWidth>2</bitWidth>
25957              <access>read-write</access>
25958              <enumeratedValues>
25959                <enumeratedValue>
25960                  <name>00</name>
25961                  <description>Delay after Transfer Prescaler value is 1.</description>
25962                  <value>#00</value>
25963                </enumeratedValue>
25964                <enumeratedValue>
25965                  <name>01</name>
25966                  <description>Delay after Transfer Prescaler value is 3.</description>
25967                  <value>#01</value>
25968                </enumeratedValue>
25969                <enumeratedValue>
25970                  <name>10</name>
25971                  <description>Delay after Transfer Prescaler value is 5.</description>
25972                  <value>#10</value>
25973                </enumeratedValue>
25974                <enumeratedValue>
25975                  <name>11</name>
25976                  <description>Delay after Transfer Prescaler value is 7.</description>
25977                  <value>#11</value>
25978                </enumeratedValue>
25979              </enumeratedValues>
25980            </field>
25981            <field>
25982              <name>PCSSCK</name>
25983              <description>PCS to SCK Delay Prescaler</description>
25984              <bitOffset>22</bitOffset>
25985              <bitWidth>2</bitWidth>
25986              <access>read-write</access>
25987              <enumeratedValues>
25988                <enumeratedValue>
25989                  <name>00</name>
25990                  <description>PCS to SCK Prescaler value is 1.</description>
25991                  <value>#00</value>
25992                </enumeratedValue>
25993                <enumeratedValue>
25994                  <name>01</name>
25995                  <description>PCS to SCK Prescaler value is 3.</description>
25996                  <value>#01</value>
25997                </enumeratedValue>
25998                <enumeratedValue>
25999                  <name>10</name>
26000                  <description>PCS to SCK Prescaler value is 5.</description>
26001                  <value>#10</value>
26002                </enumeratedValue>
26003                <enumeratedValue>
26004                  <name>11</name>
26005                  <description>PCS to SCK Prescaler value is 7.</description>
26006                  <value>#11</value>
26007                </enumeratedValue>
26008              </enumeratedValues>
26009            </field>
26010            <field>
26011              <name>LSBFE</name>
26012              <description>LSB First</description>
26013              <bitOffset>24</bitOffset>
26014              <bitWidth>1</bitWidth>
26015              <access>read-write</access>
26016              <enumeratedValues>
26017                <enumeratedValue>
26018                  <name>0</name>
26019                  <description>Data is transferred MSB first.</description>
26020                  <value>#0</value>
26021                </enumeratedValue>
26022                <enumeratedValue>
26023                  <name>1</name>
26024                  <description>Data is transferred LSB first.</description>
26025                  <value>#1</value>
26026                </enumeratedValue>
26027              </enumeratedValues>
26028            </field>
26029            <field>
26030              <name>CPHA</name>
26031              <description>Clock Phase</description>
26032              <bitOffset>25</bitOffset>
26033              <bitWidth>1</bitWidth>
26034              <access>read-write</access>
26035              <enumeratedValues>
26036                <enumeratedValue>
26037                  <name>0</name>
26038                  <description>Data is captured on the leading edge of SCK and changed on the following edge.</description>
26039                  <value>#0</value>
26040                </enumeratedValue>
26041                <enumeratedValue>
26042                  <name>1</name>
26043                  <description>Data is changed on the leading edge of SCK and captured on the following edge.</description>
26044                  <value>#1</value>
26045                </enumeratedValue>
26046              </enumeratedValues>
26047            </field>
26048            <field>
26049              <name>CPOL</name>
26050              <description>Clock Polarity</description>
26051              <bitOffset>26</bitOffset>
26052              <bitWidth>1</bitWidth>
26053              <access>read-write</access>
26054              <enumeratedValues>
26055                <enumeratedValue>
26056                  <name>0</name>
26057                  <description>The inactive state value of SCK is low.</description>
26058                  <value>#0</value>
26059                </enumeratedValue>
26060                <enumeratedValue>
26061                  <name>1</name>
26062                  <description>The inactive state value of SCK is high.</description>
26063                  <value>#1</value>
26064                </enumeratedValue>
26065              </enumeratedValues>
26066            </field>
26067            <field>
26068              <name>FMSZ</name>
26069              <description>Frame Size</description>
26070              <bitOffset>27</bitOffset>
26071              <bitWidth>4</bitWidth>
26072              <access>read-write</access>
26073            </field>
26074            <field>
26075              <name>DBR</name>
26076              <description>Double Baud Rate</description>
26077              <bitOffset>31</bitOffset>
26078              <bitWidth>1</bitWidth>
26079              <access>read-write</access>
26080              <enumeratedValues>
26081                <enumeratedValue>
26082                  <name>0</name>
26083                  <description>The baud rate is computed normally with a 50/50 duty cycle.</description>
26084                  <value>#0</value>
26085                </enumeratedValue>
26086                <enumeratedValue>
26087                  <name>1</name>
26088                  <description>The baud rate is doubled with the duty cycle depending on the Baud Rate Prescaler.</description>
26089                  <value>#1</value>
26090                </enumeratedValue>
26091              </enumeratedValues>
26092            </field>
26093          </fields>
26094        </register>
26095        <register>
26096          <name>CTAR_SLAVE</name>
26097          <description>Clock and Transfer Attributes Register (In Slave Mode)</description>
26098          <alternateGroup>SPI0</alternateGroup>
26099          <addressOffset>0xC</addressOffset>
26100          <size>32</size>
26101          <access>read-write</access>
26102          <resetValue>0x78000000</resetValue>
26103          <resetMask>0xFFFFFFFF</resetMask>
26104          <fields>
26105            <field>
26106              <name>CPHA</name>
26107              <description>Clock Phase</description>
26108              <bitOffset>25</bitOffset>
26109              <bitWidth>1</bitWidth>
26110              <access>read-write</access>
26111              <enumeratedValues>
26112                <enumeratedValue>
26113                  <name>0</name>
26114                  <description>Data is captured on the leading edge of SCK and changed on the following edge.</description>
26115                  <value>#0</value>
26116                </enumeratedValue>
26117                <enumeratedValue>
26118                  <name>1</name>
26119                  <description>Data is changed on the leading edge of SCK and captured on the following edge.</description>
26120                  <value>#1</value>
26121                </enumeratedValue>
26122              </enumeratedValues>
26123            </field>
26124            <field>
26125              <name>CPOL</name>
26126              <description>Clock Polarity</description>
26127              <bitOffset>26</bitOffset>
26128              <bitWidth>1</bitWidth>
26129              <access>read-write</access>
26130              <enumeratedValues>
26131                <enumeratedValue>
26132                  <name>0</name>
26133                  <description>The inactive state value of SCK is low.</description>
26134                  <value>#0</value>
26135                </enumeratedValue>
26136                <enumeratedValue>
26137                  <name>1</name>
26138                  <description>The inactive state value of SCK is high.</description>
26139                  <value>#1</value>
26140                </enumeratedValue>
26141              </enumeratedValues>
26142            </field>
26143            <field>
26144              <name>FMSZ</name>
26145              <description>Frame Size</description>
26146              <bitOffset>27</bitOffset>
26147              <bitWidth>4</bitWidth>
26148              <access>read-write</access>
26149            </field>
26150          </fields>
26151        </register>
26152        <register>
26153          <name>SR</name>
26154          <description>Status Register</description>
26155          <addressOffset>0x2C</addressOffset>
26156          <size>32</size>
26157          <access>read-write</access>
26158          <resetValue>0x2000000</resetValue>
26159          <resetMask>0xFFFFFFFF</resetMask>
26160          <fields>
26161            <field>
26162              <name>POPNXTPTR</name>
26163              <description>Pop Next Pointer</description>
26164              <bitOffset>0</bitOffset>
26165              <bitWidth>4</bitWidth>
26166              <access>read-only</access>
26167            </field>
26168            <field>
26169              <name>RXCTR</name>
26170              <description>RX FIFO Counter</description>
26171              <bitOffset>4</bitOffset>
26172              <bitWidth>4</bitWidth>
26173              <access>read-only</access>
26174            </field>
26175            <field>
26176              <name>TXNXTPTR</name>
26177              <description>Transmit Next Pointer</description>
26178              <bitOffset>8</bitOffset>
26179              <bitWidth>4</bitWidth>
26180              <access>read-only</access>
26181            </field>
26182            <field>
26183              <name>TXCTR</name>
26184              <description>TX FIFO Counter</description>
26185              <bitOffset>12</bitOffset>
26186              <bitWidth>4</bitWidth>
26187              <access>read-only</access>
26188            </field>
26189            <field>
26190              <name>RFDF</name>
26191              <description>Receive FIFO Drain Flag</description>
26192              <bitOffset>17</bitOffset>
26193              <bitWidth>1</bitWidth>
26194              <access>read-write</access>
26195              <enumeratedValues>
26196                <enumeratedValue>
26197                  <name>0</name>
26198                  <description>RX FIFO is empty.</description>
26199                  <value>#0</value>
26200                </enumeratedValue>
26201                <enumeratedValue>
26202                  <name>1</name>
26203                  <description>RX FIFO is not empty.</description>
26204                  <value>#1</value>
26205                </enumeratedValue>
26206              </enumeratedValues>
26207            </field>
26208            <field>
26209              <name>RFOF</name>
26210              <description>Receive FIFO Overflow Flag</description>
26211              <bitOffset>19</bitOffset>
26212              <bitWidth>1</bitWidth>
26213              <access>read-write</access>
26214              <enumeratedValues>
26215                <enumeratedValue>
26216                  <name>0</name>
26217                  <description>No Rx FIFO overflow.</description>
26218                  <value>#0</value>
26219                </enumeratedValue>
26220                <enumeratedValue>
26221                  <name>1</name>
26222                  <description>Rx FIFO overflow has occurred.</description>
26223                  <value>#1</value>
26224                </enumeratedValue>
26225              </enumeratedValues>
26226            </field>
26227            <field>
26228              <name>TFFF</name>
26229              <description>Transmit FIFO Fill Flag</description>
26230              <bitOffset>25</bitOffset>
26231              <bitWidth>1</bitWidth>
26232              <access>read-write</access>
26233              <enumeratedValues>
26234                <enumeratedValue>
26235                  <name>0</name>
26236                  <description>TX FIFO is full.</description>
26237                  <value>#0</value>
26238                </enumeratedValue>
26239                <enumeratedValue>
26240                  <name>1</name>
26241                  <description>TX FIFO is not full.</description>
26242                  <value>#1</value>
26243                </enumeratedValue>
26244              </enumeratedValues>
26245            </field>
26246            <field>
26247              <name>TFUF</name>
26248              <description>Transmit FIFO Underflow Flag</description>
26249              <bitOffset>27</bitOffset>
26250              <bitWidth>1</bitWidth>
26251              <access>read-write</access>
26252              <enumeratedValues>
26253                <enumeratedValue>
26254                  <name>0</name>
26255                  <description>No TX FIFO underflow.</description>
26256                  <value>#0</value>
26257                </enumeratedValue>
26258                <enumeratedValue>
26259                  <name>1</name>
26260                  <description>TX FIFO underflow has occurred.</description>
26261                  <value>#1</value>
26262                </enumeratedValue>
26263              </enumeratedValues>
26264            </field>
26265            <field>
26266              <name>EOQF</name>
26267              <description>End of Queue Flag</description>
26268              <bitOffset>28</bitOffset>
26269              <bitWidth>1</bitWidth>
26270              <access>read-write</access>
26271              <enumeratedValues>
26272                <enumeratedValue>
26273                  <name>0</name>
26274                  <description>EOQ is not set in the executing command.</description>
26275                  <value>#0</value>
26276                </enumeratedValue>
26277                <enumeratedValue>
26278                  <name>1</name>
26279                  <description>EOQ is set in the executing SPI command.</description>
26280                  <value>#1</value>
26281                </enumeratedValue>
26282              </enumeratedValues>
26283            </field>
26284            <field>
26285              <name>TXRXS</name>
26286              <description>TX and RX Status</description>
26287              <bitOffset>30</bitOffset>
26288              <bitWidth>1</bitWidth>
26289              <access>read-write</access>
26290              <enumeratedValues>
26291                <enumeratedValue>
26292                  <name>0</name>
26293                  <description>Transmit and receive operations are disabled (The module is in Stopped state).</description>
26294                  <value>#0</value>
26295                </enumeratedValue>
26296                <enumeratedValue>
26297                  <name>1</name>
26298                  <description>Transmit and receive operations are enabled (The module is in Running state).</description>
26299                  <value>#1</value>
26300                </enumeratedValue>
26301              </enumeratedValues>
26302            </field>
26303            <field>
26304              <name>TCF</name>
26305              <description>Transfer Complete Flag</description>
26306              <bitOffset>31</bitOffset>
26307              <bitWidth>1</bitWidth>
26308              <access>read-write</access>
26309              <enumeratedValues>
26310                <enumeratedValue>
26311                  <name>0</name>
26312                  <description>Transfer not complete.</description>
26313                  <value>#0</value>
26314                </enumeratedValue>
26315                <enumeratedValue>
26316                  <name>1</name>
26317                  <description>Transfer complete.</description>
26318                  <value>#1</value>
26319                </enumeratedValue>
26320              </enumeratedValues>
26321            </field>
26322          </fields>
26323        </register>
26324        <register>
26325          <name>RSER</name>
26326          <description>DMA/Interrupt Request Select and Enable Register</description>
26327          <addressOffset>0x30</addressOffset>
26328          <size>32</size>
26329          <access>read-write</access>
26330          <resetValue>0</resetValue>
26331          <resetMask>0xFFFFFFFF</resetMask>
26332          <fields>
26333            <field>
26334              <name>RFDF_DIRS</name>
26335              <description>Receive FIFO Drain DMA or Interrupt Request Select</description>
26336              <bitOffset>16</bitOffset>
26337              <bitWidth>1</bitWidth>
26338              <access>read-write</access>
26339              <enumeratedValues>
26340                <enumeratedValue>
26341                  <name>0</name>
26342                  <description>Interrupt request.</description>
26343                  <value>#0</value>
26344                </enumeratedValue>
26345                <enumeratedValue>
26346                  <name>1</name>
26347                  <description>DMA request.</description>
26348                  <value>#1</value>
26349                </enumeratedValue>
26350              </enumeratedValues>
26351            </field>
26352            <field>
26353              <name>RFDF_RE</name>
26354              <description>Receive FIFO Drain Request Enable</description>
26355              <bitOffset>17</bitOffset>
26356              <bitWidth>1</bitWidth>
26357              <access>read-write</access>
26358              <enumeratedValues>
26359                <enumeratedValue>
26360                  <name>0</name>
26361                  <description>RFDF interrupt or DMA requests are disabled.</description>
26362                  <value>#0</value>
26363                </enumeratedValue>
26364                <enumeratedValue>
26365                  <name>1</name>
26366                  <description>RFDF interrupt or DMA requests are enabled.</description>
26367                  <value>#1</value>
26368                </enumeratedValue>
26369              </enumeratedValues>
26370            </field>
26371            <field>
26372              <name>RFOF_RE</name>
26373              <description>Receive FIFO Overflow Request Enable</description>
26374              <bitOffset>19</bitOffset>
26375              <bitWidth>1</bitWidth>
26376              <access>read-write</access>
26377              <enumeratedValues>
26378                <enumeratedValue>
26379                  <name>0</name>
26380                  <description>RFOF interrupt requests are disabled.</description>
26381                  <value>#0</value>
26382                </enumeratedValue>
26383                <enumeratedValue>
26384                  <name>1</name>
26385                  <description>RFOF interrupt requests are enabled.</description>
26386                  <value>#1</value>
26387                </enumeratedValue>
26388              </enumeratedValues>
26389            </field>
26390            <field>
26391              <name>TFFF_DIRS</name>
26392              <description>Transmit FIFO Fill DMA or Interrupt Request Select</description>
26393              <bitOffset>24</bitOffset>
26394              <bitWidth>1</bitWidth>
26395              <access>read-write</access>
26396              <enumeratedValues>
26397                <enumeratedValue>
26398                  <name>0</name>
26399                  <description>TFFF flag generates interrupt requests.</description>
26400                  <value>#0</value>
26401                </enumeratedValue>
26402                <enumeratedValue>
26403                  <name>1</name>
26404                  <description>TFFF flag generates DMA requests.</description>
26405                  <value>#1</value>
26406                </enumeratedValue>
26407              </enumeratedValues>
26408            </field>
26409            <field>
26410              <name>TFFF_RE</name>
26411              <description>Transmit FIFO Fill Request Enable</description>
26412              <bitOffset>25</bitOffset>
26413              <bitWidth>1</bitWidth>
26414              <access>read-write</access>
26415              <enumeratedValues>
26416                <enumeratedValue>
26417                  <name>0</name>
26418                  <description>TFFF interrupts or DMA requests are disabled.</description>
26419                  <value>#0</value>
26420                </enumeratedValue>
26421                <enumeratedValue>
26422                  <name>1</name>
26423                  <description>TFFF interrupts or DMA requests are enabled.</description>
26424                  <value>#1</value>
26425                </enumeratedValue>
26426              </enumeratedValues>
26427            </field>
26428            <field>
26429              <name>TFUF_RE</name>
26430              <description>Transmit FIFO Underflow Request Enable</description>
26431              <bitOffset>27</bitOffset>
26432              <bitWidth>1</bitWidth>
26433              <access>read-write</access>
26434              <enumeratedValues>
26435                <enumeratedValue>
26436                  <name>0</name>
26437                  <description>TFUF interrupt requests are disabled.</description>
26438                  <value>#0</value>
26439                </enumeratedValue>
26440                <enumeratedValue>
26441                  <name>1</name>
26442                  <description>TFUF interrupt requests are enabled.</description>
26443                  <value>#1</value>
26444                </enumeratedValue>
26445              </enumeratedValues>
26446            </field>
26447            <field>
26448              <name>EOQF_RE</name>
26449              <description>Finished Request Enable</description>
26450              <bitOffset>28</bitOffset>
26451              <bitWidth>1</bitWidth>
26452              <access>read-write</access>
26453              <enumeratedValues>
26454                <enumeratedValue>
26455                  <name>0</name>
26456                  <description>EOQF interrupt requests are disabled.</description>
26457                  <value>#0</value>
26458                </enumeratedValue>
26459                <enumeratedValue>
26460                  <name>1</name>
26461                  <description>EOQF interrupt requests are enabled.</description>
26462                  <value>#1</value>
26463                </enumeratedValue>
26464              </enumeratedValues>
26465            </field>
26466            <field>
26467              <name>TCF_RE</name>
26468              <description>Transmission Complete Request Enable</description>
26469              <bitOffset>31</bitOffset>
26470              <bitWidth>1</bitWidth>
26471              <access>read-write</access>
26472              <enumeratedValues>
26473                <enumeratedValue>
26474                  <name>0</name>
26475                  <description>TCF interrupt requests are disabled.</description>
26476                  <value>#0</value>
26477                </enumeratedValue>
26478                <enumeratedValue>
26479                  <name>1</name>
26480                  <description>TCF interrupt requests are enabled.</description>
26481                  <value>#1</value>
26482                </enumeratedValue>
26483              </enumeratedValues>
26484            </field>
26485          </fields>
26486        </register>
26487        <register>
26488          <name>PUSHR</name>
26489          <description>PUSH TX FIFO Register In Master Mode</description>
26490          <alternateGroup>SPI0</alternateGroup>
26491          <addressOffset>0x34</addressOffset>
26492          <size>32</size>
26493          <access>read-write</access>
26494          <resetValue>0</resetValue>
26495          <resetMask>0xFFFFFFFF</resetMask>
26496          <fields>
26497            <field>
26498              <name>TXDATA</name>
26499              <description>Transmit Data</description>
26500              <bitOffset>0</bitOffset>
26501              <bitWidth>16</bitWidth>
26502              <access>read-write</access>
26503            </field>
26504            <field>
26505              <name>PCS0</name>
26506              <description>Select which PCS signals are to be asserted for the transfer</description>
26507              <bitOffset>16</bitOffset>
26508              <bitWidth>1</bitWidth>
26509              <access>read-write</access>
26510              <enumeratedValues>
26511                <enumeratedValue>
26512                  <name>0</name>
26513                  <description>Negate the PCS[x] signal.</description>
26514                  <value>#0</value>
26515                </enumeratedValue>
26516                <enumeratedValue>
26517                  <name>1</name>
26518                  <description>Assert the PCS[x] signal.</description>
26519                  <value>#1</value>
26520                </enumeratedValue>
26521              </enumeratedValues>
26522            </field>
26523            <field>
26524              <name>PCS1</name>
26525              <description>Select which PCS signals are to be asserted for the transfer</description>
26526              <bitOffset>17</bitOffset>
26527              <bitWidth>1</bitWidth>
26528              <access>read-write</access>
26529              <enumeratedValues>
26530                <enumeratedValue>
26531                  <name>0</name>
26532                  <description>Negate the PCS[x] signal.</description>
26533                  <value>#0</value>
26534                </enumeratedValue>
26535                <enumeratedValue>
26536                  <name>1</name>
26537                  <description>Assert the PCS[x] signal.</description>
26538                  <value>#1</value>
26539                </enumeratedValue>
26540              </enumeratedValues>
26541            </field>
26542            <field>
26543              <name>PCS2</name>
26544              <description>Select which PCS signals are to be asserted for the transfer</description>
26545              <bitOffset>18</bitOffset>
26546              <bitWidth>1</bitWidth>
26547              <access>read-write</access>
26548              <enumeratedValues>
26549                <enumeratedValue>
26550                  <name>0</name>
26551                  <description>Negate the PCS[x] signal.</description>
26552                  <value>#0</value>
26553                </enumeratedValue>
26554                <enumeratedValue>
26555                  <name>1</name>
26556                  <description>Assert the PCS[x] signal.</description>
26557                  <value>#1</value>
26558                </enumeratedValue>
26559              </enumeratedValues>
26560            </field>
26561            <field>
26562              <name>PCS3</name>
26563              <description>Select which PCS signals are to be asserted for the transfer</description>
26564              <bitOffset>19</bitOffset>
26565              <bitWidth>1</bitWidth>
26566              <access>read-write</access>
26567              <enumeratedValues>
26568                <enumeratedValue>
26569                  <name>0</name>
26570                  <description>Negate the PCS[x] signal.</description>
26571                  <value>#0</value>
26572                </enumeratedValue>
26573                <enumeratedValue>
26574                  <name>1</name>
26575                  <description>Assert the PCS[x] signal.</description>
26576                  <value>#1</value>
26577                </enumeratedValue>
26578              </enumeratedValues>
26579            </field>
26580            <field>
26581              <name>PCS4</name>
26582              <description>Select which PCS signals are to be asserted for the transfer</description>
26583              <bitOffset>20</bitOffset>
26584              <bitWidth>1</bitWidth>
26585              <access>read-write</access>
26586              <enumeratedValues>
26587                <enumeratedValue>
26588                  <name>0</name>
26589                  <description>Negate the PCS[x] signal.</description>
26590                  <value>#0</value>
26591                </enumeratedValue>
26592                <enumeratedValue>
26593                  <name>1</name>
26594                  <description>Assert the PCS[x] signal.</description>
26595                  <value>#1</value>
26596                </enumeratedValue>
26597              </enumeratedValues>
26598            </field>
26599            <field>
26600              <name>PCS5</name>
26601              <description>Select which PCS signals are to be asserted for the transfer</description>
26602              <bitOffset>21</bitOffset>
26603              <bitWidth>1</bitWidth>
26604              <access>read-write</access>
26605              <enumeratedValues>
26606                <enumeratedValue>
26607                  <name>0</name>
26608                  <description>Negate the PCS[x] signal.</description>
26609                  <value>#0</value>
26610                </enumeratedValue>
26611                <enumeratedValue>
26612                  <name>1</name>
26613                  <description>Assert the PCS[x] signal.</description>
26614                  <value>#1</value>
26615                </enumeratedValue>
26616              </enumeratedValues>
26617            </field>
26618            <field>
26619              <name>CTCNT</name>
26620              <description>Clear Transfer Counter</description>
26621              <bitOffset>26</bitOffset>
26622              <bitWidth>1</bitWidth>
26623              <access>read-write</access>
26624              <enumeratedValues>
26625                <enumeratedValue>
26626                  <name>0</name>
26627                  <description>Do not clear the TCR[TCNT] field.</description>
26628                  <value>#0</value>
26629                </enumeratedValue>
26630                <enumeratedValue>
26631                  <name>1</name>
26632                  <description>Clear the TCR[TCNT] field.</description>
26633                  <value>#1</value>
26634                </enumeratedValue>
26635              </enumeratedValues>
26636            </field>
26637            <field>
26638              <name>EOQ</name>
26639              <description>End Of Queue</description>
26640              <bitOffset>27</bitOffset>
26641              <bitWidth>1</bitWidth>
26642              <access>read-write</access>
26643              <enumeratedValues>
26644                <enumeratedValue>
26645                  <name>0</name>
26646                  <description>The SPI data is not the last data to transfer.</description>
26647                  <value>#0</value>
26648                </enumeratedValue>
26649                <enumeratedValue>
26650                  <name>1</name>
26651                  <description>The SPI data is the last data to transfer.</description>
26652                  <value>#1</value>
26653                </enumeratedValue>
26654              </enumeratedValues>
26655            </field>
26656            <field>
26657              <name>CTAS</name>
26658              <description>Clock and Transfer Attributes Select</description>
26659              <bitOffset>28</bitOffset>
26660              <bitWidth>3</bitWidth>
26661              <access>read-write</access>
26662              <enumeratedValues>
26663                <enumeratedValue>
26664                  <name>000</name>
26665                  <description>CTAR0</description>
26666                  <value>#000</value>
26667                </enumeratedValue>
26668                <enumeratedValue>
26669                  <name>001</name>
26670                  <description>CTAR1</description>
26671                  <value>#001</value>
26672                </enumeratedValue>
26673              </enumeratedValues>
26674            </field>
26675            <field>
26676              <name>CONT</name>
26677              <description>Continuous Peripheral Chip Select Enable</description>
26678              <bitOffset>31</bitOffset>
26679              <bitWidth>1</bitWidth>
26680              <access>read-write</access>
26681              <enumeratedValues>
26682                <enumeratedValue>
26683                  <name>0</name>
26684                  <description>Return PCSn signals to their inactive state between transfers.</description>
26685                  <value>#0</value>
26686                </enumeratedValue>
26687                <enumeratedValue>
26688                  <name>1</name>
26689                  <description>Keep PCSn signals asserted between transfers.</description>
26690                  <value>#1</value>
26691                </enumeratedValue>
26692              </enumeratedValues>
26693            </field>
26694          </fields>
26695        </register>
26696        <register>
26697          <name>PUSHR_SLAVE</name>
26698          <description>PUSH TX FIFO Register In Slave Mode</description>
26699          <alternateGroup>SPI0</alternateGroup>
26700          <addressOffset>0x34</addressOffset>
26701          <size>32</size>
26702          <access>read-write</access>
26703          <resetValue>0</resetValue>
26704          <resetMask>0xFFFFFFFF</resetMask>
26705          <fields>
26706            <field>
26707              <name>TXDATA</name>
26708              <description>Transmit Data</description>
26709              <bitOffset>0</bitOffset>
26710              <bitWidth>16</bitWidth>
26711              <access>read-write</access>
26712            </field>
26713          </fields>
26714        </register>
26715        <register>
26716          <name>POPR</name>
26717          <description>POP RX FIFO Register</description>
26718          <addressOffset>0x38</addressOffset>
26719          <size>32</size>
26720          <access>read-only</access>
26721          <resetValue>0</resetValue>
26722          <resetMask>0xFFFFFFFF</resetMask>
26723          <fields>
26724            <field>
26725              <name>RXDATA</name>
26726              <description>Received Data</description>
26727              <bitOffset>0</bitOffset>
26728              <bitWidth>32</bitWidth>
26729              <access>read-only</access>
26730            </field>
26731          </fields>
26732        </register>
26733        <register>
26734          <dim>4</dim>
26735          <dimIncrement>0x4</dimIncrement>
26736          <dimIndex>0,1,2,3</dimIndex>
26737          <name>TXFR%s</name>
26738          <description>Transmit FIFO Registers</description>
26739          <addressOffset>0x3C</addressOffset>
26740          <size>32</size>
26741          <access>read-only</access>
26742          <resetValue>0</resetValue>
26743          <resetMask>0xFFFFFFFF</resetMask>
26744          <fields>
26745            <field>
26746              <name>TXDATA</name>
26747              <description>Transmit Data</description>
26748              <bitOffset>0</bitOffset>
26749              <bitWidth>16</bitWidth>
26750              <access>read-only</access>
26751            </field>
26752            <field>
26753              <name>TXCMD_TXDATA</name>
26754              <description>Transmit Command or Transmit Data</description>
26755              <bitOffset>16</bitOffset>
26756              <bitWidth>16</bitWidth>
26757              <access>read-only</access>
26758            </field>
26759          </fields>
26760        </register>
26761        <register>
26762          <dim>4</dim>
26763          <dimIncrement>0x4</dimIncrement>
26764          <dimIndex>0,1,2,3</dimIndex>
26765          <name>RXFR%s</name>
26766          <description>Receive FIFO Registers</description>
26767          <addressOffset>0x7C</addressOffset>
26768          <size>32</size>
26769          <access>read-only</access>
26770          <resetValue>0</resetValue>
26771          <resetMask>0xFFFFFFFF</resetMask>
26772          <fields>
26773            <field>
26774              <name>RXDATA</name>
26775              <description>Receive Data</description>
26776              <bitOffset>0</bitOffset>
26777              <bitWidth>32</bitWidth>
26778              <access>read-only</access>
26779            </field>
26780          </fields>
26781        </register>
26782      </registers>
26783    </peripheral>
26784    <peripheral>
26785      <name>SPI1</name>
26786      <description>Serial Peripheral Interface</description>
26787      <groupName>SPI</groupName>
26788      <prependToName>SPI1_</prependToName>
26789      <baseAddress>0x4002D000</baseAddress>
26790      <addressBlock>
26791        <offset>0</offset>
26792        <size>0x8C</size>
26793        <usage>registers</usage>
26794      </addressBlock>
26795      <interrupt>
26796        <name>SPI1</name>
26797        <value>27</value>
26798      </interrupt>
26799      <registers>
26800        <register>
26801          <name>MCR</name>
26802          <description>Module Configuration Register</description>
26803          <addressOffset>0</addressOffset>
26804          <size>32</size>
26805          <access>read-write</access>
26806          <resetValue>0x4001</resetValue>
26807          <resetMask>0xFFFFFFFF</resetMask>
26808          <fields>
26809            <field>
26810              <name>HALT</name>
26811              <description>Halt</description>
26812              <bitOffset>0</bitOffset>
26813              <bitWidth>1</bitWidth>
26814              <access>read-write</access>
26815              <enumeratedValues>
26816                <enumeratedValue>
26817                  <name>0</name>
26818                  <description>Start transfers.</description>
26819                  <value>#0</value>
26820                </enumeratedValue>
26821                <enumeratedValue>
26822                  <name>1</name>
26823                  <description>Stop transfers.</description>
26824                  <value>#1</value>
26825                </enumeratedValue>
26826              </enumeratedValues>
26827            </field>
26828            <field>
26829              <name>SMPL_PT</name>
26830              <description>Sample Point</description>
26831              <bitOffset>8</bitOffset>
26832              <bitWidth>2</bitWidth>
26833              <access>read-write</access>
26834              <enumeratedValues>
26835                <enumeratedValue>
26836                  <name>00</name>
26837                  <description>0 protocol clock cycles between SCK edge and SIN sample</description>
26838                  <value>#00</value>
26839                </enumeratedValue>
26840                <enumeratedValue>
26841                  <name>01</name>
26842                  <description>1 protocol clock cycle between SCK edge and SIN sample</description>
26843                  <value>#01</value>
26844                </enumeratedValue>
26845                <enumeratedValue>
26846                  <name>10</name>
26847                  <description>2 protocol clock cycles between SCK edge and SIN sample</description>
26848                  <value>#10</value>
26849                </enumeratedValue>
26850              </enumeratedValues>
26851            </field>
26852            <field>
26853              <name>CLR_RXF</name>
26854              <description>CLR_RXF</description>
26855              <bitOffset>10</bitOffset>
26856              <bitWidth>1</bitWidth>
26857              <access>write-only</access>
26858              <enumeratedValues>
26859                <enumeratedValue>
26860                  <name>0</name>
26861                  <description>Do not clear the RX FIFO counter.</description>
26862                  <value>#0</value>
26863                </enumeratedValue>
26864                <enumeratedValue>
26865                  <name>1</name>
26866                  <description>Clear the RX FIFO counter.</description>
26867                  <value>#1</value>
26868                </enumeratedValue>
26869              </enumeratedValues>
26870            </field>
26871            <field>
26872              <name>CLR_TXF</name>
26873              <description>Clear TX FIFO</description>
26874              <bitOffset>11</bitOffset>
26875              <bitWidth>1</bitWidth>
26876              <access>write-only</access>
26877              <enumeratedValues>
26878                <enumeratedValue>
26879                  <name>0</name>
26880                  <description>Do not clear the TX FIFO counter.</description>
26881                  <value>#0</value>
26882                </enumeratedValue>
26883                <enumeratedValue>
26884                  <name>1</name>
26885                  <description>Clear the TX FIFO counter.</description>
26886                  <value>#1</value>
26887                </enumeratedValue>
26888              </enumeratedValues>
26889            </field>
26890            <field>
26891              <name>DIS_RXF</name>
26892              <description>Disable Receive FIFO</description>
26893              <bitOffset>12</bitOffset>
26894              <bitWidth>1</bitWidth>
26895              <access>read-write</access>
26896              <enumeratedValues>
26897                <enumeratedValue>
26898                  <name>0</name>
26899                  <description>RX FIFO is enabled.</description>
26900                  <value>#0</value>
26901                </enumeratedValue>
26902                <enumeratedValue>
26903                  <name>1</name>
26904                  <description>RX FIFO is disabled.</description>
26905                  <value>#1</value>
26906                </enumeratedValue>
26907              </enumeratedValues>
26908            </field>
26909            <field>
26910              <name>DIS_TXF</name>
26911              <description>Disable Transmit FIFO</description>
26912              <bitOffset>13</bitOffset>
26913              <bitWidth>1</bitWidth>
26914              <access>read-write</access>
26915              <enumeratedValues>
26916                <enumeratedValue>
26917                  <name>0</name>
26918                  <description>TX FIFO is enabled.</description>
26919                  <value>#0</value>
26920                </enumeratedValue>
26921                <enumeratedValue>
26922                  <name>1</name>
26923                  <description>TX FIFO is disabled.</description>
26924                  <value>#1</value>
26925                </enumeratedValue>
26926              </enumeratedValues>
26927            </field>
26928            <field>
26929              <name>MDIS</name>
26930              <description>Module Disable</description>
26931              <bitOffset>14</bitOffset>
26932              <bitWidth>1</bitWidth>
26933              <access>read-write</access>
26934              <enumeratedValues>
26935                <enumeratedValue>
26936                  <name>0</name>
26937                  <description>Enables the module clocks.</description>
26938                  <value>#0</value>
26939                </enumeratedValue>
26940                <enumeratedValue>
26941                  <name>1</name>
26942                  <description>Allows external logic to disable the module clocks.</description>
26943                  <value>#1</value>
26944                </enumeratedValue>
26945              </enumeratedValues>
26946            </field>
26947            <field>
26948              <name>DOZE</name>
26949              <description>Doze Enable</description>
26950              <bitOffset>15</bitOffset>
26951              <bitWidth>1</bitWidth>
26952              <access>read-write</access>
26953              <enumeratedValues>
26954                <enumeratedValue>
26955                  <name>0</name>
26956                  <description>Doze mode has no effect on the module.</description>
26957                  <value>#0</value>
26958                </enumeratedValue>
26959                <enumeratedValue>
26960                  <name>1</name>
26961                  <description>Doze mode disables the module.</description>
26962                  <value>#1</value>
26963                </enumeratedValue>
26964              </enumeratedValues>
26965            </field>
26966            <field>
26967              <name>PCSIS0</name>
26968              <description>Peripheral Chip Select x Inactive State</description>
26969              <bitOffset>16</bitOffset>
26970              <bitWidth>1</bitWidth>
26971              <access>read-write</access>
26972              <enumeratedValues>
26973                <enumeratedValue>
26974                  <name>0</name>
26975                  <description>The inactive state of PCSx is low.</description>
26976                  <value>#0</value>
26977                </enumeratedValue>
26978                <enumeratedValue>
26979                  <name>1</name>
26980                  <description>The inactive state of PCSx is high.</description>
26981                  <value>#1</value>
26982                </enumeratedValue>
26983              </enumeratedValues>
26984            </field>
26985            <field>
26986              <name>PCSIS1</name>
26987              <description>Peripheral Chip Select x Inactive State</description>
26988              <bitOffset>17</bitOffset>
26989              <bitWidth>1</bitWidth>
26990              <access>read-write</access>
26991              <enumeratedValues>
26992                <enumeratedValue>
26993                  <name>0</name>
26994                  <description>The inactive state of PCSx is low.</description>
26995                  <value>#0</value>
26996                </enumeratedValue>
26997                <enumeratedValue>
26998                  <name>1</name>
26999                  <description>The inactive state of PCSx is high.</description>
27000                  <value>#1</value>
27001                </enumeratedValue>
27002              </enumeratedValues>
27003            </field>
27004            <field>
27005              <name>PCSIS2</name>
27006              <description>Peripheral Chip Select x Inactive State</description>
27007              <bitOffset>18</bitOffset>
27008              <bitWidth>1</bitWidth>
27009              <access>read-write</access>
27010              <enumeratedValues>
27011                <enumeratedValue>
27012                  <name>0</name>
27013                  <description>The inactive state of PCSx is low.</description>
27014                  <value>#0</value>
27015                </enumeratedValue>
27016                <enumeratedValue>
27017                  <name>1</name>
27018                  <description>The inactive state of PCSx is high.</description>
27019                  <value>#1</value>
27020                </enumeratedValue>
27021              </enumeratedValues>
27022            </field>
27023            <field>
27024              <name>PCSIS3</name>
27025              <description>Peripheral Chip Select x Inactive State</description>
27026              <bitOffset>19</bitOffset>
27027              <bitWidth>1</bitWidth>
27028              <access>read-write</access>
27029              <enumeratedValues>
27030                <enumeratedValue>
27031                  <name>0</name>
27032                  <description>The inactive state of PCSx is low.</description>
27033                  <value>#0</value>
27034                </enumeratedValue>
27035                <enumeratedValue>
27036                  <name>1</name>
27037                  <description>The inactive state of PCSx is high.</description>
27038                  <value>#1</value>
27039                </enumeratedValue>
27040              </enumeratedValues>
27041            </field>
27042            <field>
27043              <name>PCSIS4</name>
27044              <description>Peripheral Chip Select x Inactive State</description>
27045              <bitOffset>20</bitOffset>
27046              <bitWidth>1</bitWidth>
27047              <access>read-write</access>
27048              <enumeratedValues>
27049                <enumeratedValue>
27050                  <name>0</name>
27051                  <description>The inactive state of PCSx is low.</description>
27052                  <value>#0</value>
27053                </enumeratedValue>
27054                <enumeratedValue>
27055                  <name>1</name>
27056                  <description>The inactive state of PCSx is high.</description>
27057                  <value>#1</value>
27058                </enumeratedValue>
27059              </enumeratedValues>
27060            </field>
27061            <field>
27062              <name>PCSIS5</name>
27063              <description>Peripheral Chip Select x Inactive State</description>
27064              <bitOffset>21</bitOffset>
27065              <bitWidth>1</bitWidth>
27066              <access>read-write</access>
27067              <enumeratedValues>
27068                <enumeratedValue>
27069                  <name>0</name>
27070                  <description>The inactive state of PCSx is low.</description>
27071                  <value>#0</value>
27072                </enumeratedValue>
27073                <enumeratedValue>
27074                  <name>1</name>
27075                  <description>The inactive state of PCSx is high.</description>
27076                  <value>#1</value>
27077                </enumeratedValue>
27078              </enumeratedValues>
27079            </field>
27080            <field>
27081              <name>ROOE</name>
27082              <description>Receive FIFO Overflow Overwrite Enable</description>
27083              <bitOffset>24</bitOffset>
27084              <bitWidth>1</bitWidth>
27085              <access>read-write</access>
27086              <enumeratedValues>
27087                <enumeratedValue>
27088                  <name>0</name>
27089                  <description>Incoming data is ignored.</description>
27090                  <value>#0</value>
27091                </enumeratedValue>
27092                <enumeratedValue>
27093                  <name>1</name>
27094                  <description>Incoming data is shifted into the shift register.</description>
27095                  <value>#1</value>
27096                </enumeratedValue>
27097              </enumeratedValues>
27098            </field>
27099            <field>
27100              <name>PCSSE</name>
27101              <description>Peripheral Chip Select Strobe Enable</description>
27102              <bitOffset>25</bitOffset>
27103              <bitWidth>1</bitWidth>
27104              <access>read-write</access>
27105              <enumeratedValues>
27106                <enumeratedValue>
27107                  <name>0</name>
27108                  <description>PCS5/ PCSS is used as the Peripheral Chip Select[5] signal.</description>
27109                  <value>#0</value>
27110                </enumeratedValue>
27111                <enumeratedValue>
27112                  <name>1</name>
27113                  <description>PCS5/ PCSS is used as an active-low PCS Strobe signal.</description>
27114                  <value>#1</value>
27115                </enumeratedValue>
27116              </enumeratedValues>
27117            </field>
27118            <field>
27119              <name>MTFE</name>
27120              <description>Modified Transfer Format Enable</description>
27121              <bitOffset>26</bitOffset>
27122              <bitWidth>1</bitWidth>
27123              <access>read-write</access>
27124              <enumeratedValues>
27125                <enumeratedValue>
27126                  <name>0</name>
27127                  <description>Modified SPI transfer format disabled.</description>
27128                  <value>#0</value>
27129                </enumeratedValue>
27130                <enumeratedValue>
27131                  <name>1</name>
27132                  <description>Modified SPI transfer format enabled.</description>
27133                  <value>#1</value>
27134                </enumeratedValue>
27135              </enumeratedValues>
27136            </field>
27137            <field>
27138              <name>FRZ</name>
27139              <description>Freeze</description>
27140              <bitOffset>27</bitOffset>
27141              <bitWidth>1</bitWidth>
27142              <access>read-write</access>
27143              <enumeratedValues>
27144                <enumeratedValue>
27145                  <name>0</name>
27146                  <description>Do not halt serial transfers in Debug mode.</description>
27147                  <value>#0</value>
27148                </enumeratedValue>
27149                <enumeratedValue>
27150                  <name>1</name>
27151                  <description>Halt serial transfers in Debug mode.</description>
27152                  <value>#1</value>
27153                </enumeratedValue>
27154              </enumeratedValues>
27155            </field>
27156            <field>
27157              <name>DCONF</name>
27158              <description>SPI Configuration.</description>
27159              <bitOffset>28</bitOffset>
27160              <bitWidth>2</bitWidth>
27161              <access>read-only</access>
27162              <enumeratedValues>
27163                <enumeratedValue>
27164                  <name>00</name>
27165                  <description>SPI</description>
27166                  <value>#00</value>
27167                </enumeratedValue>
27168              </enumeratedValues>
27169            </field>
27170            <field>
27171              <name>CONT_SCKE</name>
27172              <description>Continuous SCK Enable</description>
27173              <bitOffset>30</bitOffset>
27174              <bitWidth>1</bitWidth>
27175              <access>read-write</access>
27176              <enumeratedValues>
27177                <enumeratedValue>
27178                  <name>0</name>
27179                  <description>Continuous SCK disabled.</description>
27180                  <value>#0</value>
27181                </enumeratedValue>
27182                <enumeratedValue>
27183                  <name>1</name>
27184                  <description>Continuous SCK enabled.</description>
27185                  <value>#1</value>
27186                </enumeratedValue>
27187              </enumeratedValues>
27188            </field>
27189            <field>
27190              <name>MSTR</name>
27191              <description>Master/Slave Mode Select</description>
27192              <bitOffset>31</bitOffset>
27193              <bitWidth>1</bitWidth>
27194              <access>read-write</access>
27195              <enumeratedValues>
27196                <enumeratedValue>
27197                  <name>0</name>
27198                  <description>Enables Slave mode</description>
27199                  <value>#0</value>
27200                </enumeratedValue>
27201                <enumeratedValue>
27202                  <name>1</name>
27203                  <description>Enables Master mode</description>
27204                  <value>#1</value>
27205                </enumeratedValue>
27206              </enumeratedValues>
27207            </field>
27208          </fields>
27209        </register>
27210        <register>
27211          <name>TCR</name>
27212          <description>Transfer Count Register</description>
27213          <addressOffset>0x8</addressOffset>
27214          <size>32</size>
27215          <access>read-write</access>
27216          <resetValue>0</resetValue>
27217          <resetMask>0xFFFFFFFF</resetMask>
27218          <fields>
27219            <field>
27220              <name>SPI_TCNT</name>
27221              <description>SPI Transfer Counter</description>
27222              <bitOffset>16</bitOffset>
27223              <bitWidth>16</bitWidth>
27224              <access>read-write</access>
27225            </field>
27226          </fields>
27227        </register>
27228        <register>
27229          <dim>2</dim>
27230          <dimIncrement>0x4</dimIncrement>
27231          <dimIndex>0,1</dimIndex>
27232          <name>CTAR%s</name>
27233          <description>Clock and Transfer Attributes Register (In Master Mode)</description>
27234          <alternateGroup>SPI1</alternateGroup>
27235          <addressOffset>0xC</addressOffset>
27236          <size>32</size>
27237          <access>read-write</access>
27238          <resetValue>0x78000000</resetValue>
27239          <resetMask>0xFFFFFFFF</resetMask>
27240          <fields>
27241            <field>
27242              <name>BR</name>
27243              <description>Baud Rate Scaler</description>
27244              <bitOffset>0</bitOffset>
27245              <bitWidth>4</bitWidth>
27246              <access>read-write</access>
27247            </field>
27248            <field>
27249              <name>DT</name>
27250              <description>Delay After Transfer Scaler</description>
27251              <bitOffset>4</bitOffset>
27252              <bitWidth>4</bitWidth>
27253              <access>read-write</access>
27254            </field>
27255            <field>
27256              <name>ASC</name>
27257              <description>After SCK Delay Scaler</description>
27258              <bitOffset>8</bitOffset>
27259              <bitWidth>4</bitWidth>
27260              <access>read-write</access>
27261            </field>
27262            <field>
27263              <name>CSSCK</name>
27264              <description>PCS to SCK Delay Scaler</description>
27265              <bitOffset>12</bitOffset>
27266              <bitWidth>4</bitWidth>
27267              <access>read-write</access>
27268            </field>
27269            <field>
27270              <name>PBR</name>
27271              <description>Baud Rate Prescaler</description>
27272              <bitOffset>16</bitOffset>
27273              <bitWidth>2</bitWidth>
27274              <access>read-write</access>
27275              <enumeratedValues>
27276                <enumeratedValue>
27277                  <name>00</name>
27278                  <description>Baud Rate Prescaler value is 2.</description>
27279                  <value>#00</value>
27280                </enumeratedValue>
27281                <enumeratedValue>
27282                  <name>01</name>
27283                  <description>Baud Rate Prescaler value is 3.</description>
27284                  <value>#01</value>
27285                </enumeratedValue>
27286                <enumeratedValue>
27287                  <name>10</name>
27288                  <description>Baud Rate Prescaler value is 5.</description>
27289                  <value>#10</value>
27290                </enumeratedValue>
27291                <enumeratedValue>
27292                  <name>11</name>
27293                  <description>Baud Rate Prescaler value is 7.</description>
27294                  <value>#11</value>
27295                </enumeratedValue>
27296              </enumeratedValues>
27297            </field>
27298            <field>
27299              <name>PDT</name>
27300              <description>Delay after Transfer Prescaler</description>
27301              <bitOffset>18</bitOffset>
27302              <bitWidth>2</bitWidth>
27303              <access>read-write</access>
27304              <enumeratedValues>
27305                <enumeratedValue>
27306                  <name>00</name>
27307                  <description>Delay after Transfer Prescaler value is 1.</description>
27308                  <value>#00</value>
27309                </enumeratedValue>
27310                <enumeratedValue>
27311                  <name>01</name>
27312                  <description>Delay after Transfer Prescaler value is 3.</description>
27313                  <value>#01</value>
27314                </enumeratedValue>
27315                <enumeratedValue>
27316                  <name>10</name>
27317                  <description>Delay after Transfer Prescaler value is 5.</description>
27318                  <value>#10</value>
27319                </enumeratedValue>
27320                <enumeratedValue>
27321                  <name>11</name>
27322                  <description>Delay after Transfer Prescaler value is 7.</description>
27323                  <value>#11</value>
27324                </enumeratedValue>
27325              </enumeratedValues>
27326            </field>
27327            <field>
27328              <name>PASC</name>
27329              <description>After SCK Delay Prescaler</description>
27330              <bitOffset>20</bitOffset>
27331              <bitWidth>2</bitWidth>
27332              <access>read-write</access>
27333              <enumeratedValues>
27334                <enumeratedValue>
27335                  <name>00</name>
27336                  <description>Delay after Transfer Prescaler value is 1.</description>
27337                  <value>#00</value>
27338                </enumeratedValue>
27339                <enumeratedValue>
27340                  <name>01</name>
27341                  <description>Delay after Transfer Prescaler value is 3.</description>
27342                  <value>#01</value>
27343                </enumeratedValue>
27344                <enumeratedValue>
27345                  <name>10</name>
27346                  <description>Delay after Transfer Prescaler value is 5.</description>
27347                  <value>#10</value>
27348                </enumeratedValue>
27349                <enumeratedValue>
27350                  <name>11</name>
27351                  <description>Delay after Transfer Prescaler value is 7.</description>
27352                  <value>#11</value>
27353                </enumeratedValue>
27354              </enumeratedValues>
27355            </field>
27356            <field>
27357              <name>PCSSCK</name>
27358              <description>PCS to SCK Delay Prescaler</description>
27359              <bitOffset>22</bitOffset>
27360              <bitWidth>2</bitWidth>
27361              <access>read-write</access>
27362              <enumeratedValues>
27363                <enumeratedValue>
27364                  <name>00</name>
27365                  <description>PCS to SCK Prescaler value is 1.</description>
27366                  <value>#00</value>
27367                </enumeratedValue>
27368                <enumeratedValue>
27369                  <name>01</name>
27370                  <description>PCS to SCK Prescaler value is 3.</description>
27371                  <value>#01</value>
27372                </enumeratedValue>
27373                <enumeratedValue>
27374                  <name>10</name>
27375                  <description>PCS to SCK Prescaler value is 5.</description>
27376                  <value>#10</value>
27377                </enumeratedValue>
27378                <enumeratedValue>
27379                  <name>11</name>
27380                  <description>PCS to SCK Prescaler value is 7.</description>
27381                  <value>#11</value>
27382                </enumeratedValue>
27383              </enumeratedValues>
27384            </field>
27385            <field>
27386              <name>LSBFE</name>
27387              <description>LSB First</description>
27388              <bitOffset>24</bitOffset>
27389              <bitWidth>1</bitWidth>
27390              <access>read-write</access>
27391              <enumeratedValues>
27392                <enumeratedValue>
27393                  <name>0</name>
27394                  <description>Data is transferred MSB first.</description>
27395                  <value>#0</value>
27396                </enumeratedValue>
27397                <enumeratedValue>
27398                  <name>1</name>
27399                  <description>Data is transferred LSB first.</description>
27400                  <value>#1</value>
27401                </enumeratedValue>
27402              </enumeratedValues>
27403            </field>
27404            <field>
27405              <name>CPHA</name>
27406              <description>Clock Phase</description>
27407              <bitOffset>25</bitOffset>
27408              <bitWidth>1</bitWidth>
27409              <access>read-write</access>
27410              <enumeratedValues>
27411                <enumeratedValue>
27412                  <name>0</name>
27413                  <description>Data is captured on the leading edge of SCK and changed on the following edge.</description>
27414                  <value>#0</value>
27415                </enumeratedValue>
27416                <enumeratedValue>
27417                  <name>1</name>
27418                  <description>Data is changed on the leading edge of SCK and captured on the following edge.</description>
27419                  <value>#1</value>
27420                </enumeratedValue>
27421              </enumeratedValues>
27422            </field>
27423            <field>
27424              <name>CPOL</name>
27425              <description>Clock Polarity</description>
27426              <bitOffset>26</bitOffset>
27427              <bitWidth>1</bitWidth>
27428              <access>read-write</access>
27429              <enumeratedValues>
27430                <enumeratedValue>
27431                  <name>0</name>
27432                  <description>The inactive state value of SCK is low.</description>
27433                  <value>#0</value>
27434                </enumeratedValue>
27435                <enumeratedValue>
27436                  <name>1</name>
27437                  <description>The inactive state value of SCK is high.</description>
27438                  <value>#1</value>
27439                </enumeratedValue>
27440              </enumeratedValues>
27441            </field>
27442            <field>
27443              <name>FMSZ</name>
27444              <description>Frame Size</description>
27445              <bitOffset>27</bitOffset>
27446              <bitWidth>4</bitWidth>
27447              <access>read-write</access>
27448            </field>
27449            <field>
27450              <name>DBR</name>
27451              <description>Double Baud Rate</description>
27452              <bitOffset>31</bitOffset>
27453              <bitWidth>1</bitWidth>
27454              <access>read-write</access>
27455              <enumeratedValues>
27456                <enumeratedValue>
27457                  <name>0</name>
27458                  <description>The baud rate is computed normally with a 50/50 duty cycle.</description>
27459                  <value>#0</value>
27460                </enumeratedValue>
27461                <enumeratedValue>
27462                  <name>1</name>
27463                  <description>The baud rate is doubled with the duty cycle depending on the Baud Rate Prescaler.</description>
27464                  <value>#1</value>
27465                </enumeratedValue>
27466              </enumeratedValues>
27467            </field>
27468          </fields>
27469        </register>
27470        <register>
27471          <name>CTAR_SLAVE</name>
27472          <description>Clock and Transfer Attributes Register (In Slave Mode)</description>
27473          <alternateGroup>SPI1</alternateGroup>
27474          <addressOffset>0xC</addressOffset>
27475          <size>32</size>
27476          <access>read-write</access>
27477          <resetValue>0x78000000</resetValue>
27478          <resetMask>0xFFFFFFFF</resetMask>
27479          <fields>
27480            <field>
27481              <name>CPHA</name>
27482              <description>Clock Phase</description>
27483              <bitOffset>25</bitOffset>
27484              <bitWidth>1</bitWidth>
27485              <access>read-write</access>
27486              <enumeratedValues>
27487                <enumeratedValue>
27488                  <name>0</name>
27489                  <description>Data is captured on the leading edge of SCK and changed on the following edge.</description>
27490                  <value>#0</value>
27491                </enumeratedValue>
27492                <enumeratedValue>
27493                  <name>1</name>
27494                  <description>Data is changed on the leading edge of SCK and captured on the following edge.</description>
27495                  <value>#1</value>
27496                </enumeratedValue>
27497              </enumeratedValues>
27498            </field>
27499            <field>
27500              <name>CPOL</name>
27501              <description>Clock Polarity</description>
27502              <bitOffset>26</bitOffset>
27503              <bitWidth>1</bitWidth>
27504              <access>read-write</access>
27505              <enumeratedValues>
27506                <enumeratedValue>
27507                  <name>0</name>
27508                  <description>The inactive state value of SCK is low.</description>
27509                  <value>#0</value>
27510                </enumeratedValue>
27511                <enumeratedValue>
27512                  <name>1</name>
27513                  <description>The inactive state value of SCK is high.</description>
27514                  <value>#1</value>
27515                </enumeratedValue>
27516              </enumeratedValues>
27517            </field>
27518            <field>
27519              <name>FMSZ</name>
27520              <description>Frame Size</description>
27521              <bitOffset>27</bitOffset>
27522              <bitWidth>4</bitWidth>
27523              <access>read-write</access>
27524            </field>
27525          </fields>
27526        </register>
27527        <register>
27528          <name>SR</name>
27529          <description>Status Register</description>
27530          <addressOffset>0x2C</addressOffset>
27531          <size>32</size>
27532          <access>read-write</access>
27533          <resetValue>0x2000000</resetValue>
27534          <resetMask>0xFFFFFFFF</resetMask>
27535          <fields>
27536            <field>
27537              <name>POPNXTPTR</name>
27538              <description>Pop Next Pointer</description>
27539              <bitOffset>0</bitOffset>
27540              <bitWidth>4</bitWidth>
27541              <access>read-only</access>
27542            </field>
27543            <field>
27544              <name>RXCTR</name>
27545              <description>RX FIFO Counter</description>
27546              <bitOffset>4</bitOffset>
27547              <bitWidth>4</bitWidth>
27548              <access>read-only</access>
27549            </field>
27550            <field>
27551              <name>TXNXTPTR</name>
27552              <description>Transmit Next Pointer</description>
27553              <bitOffset>8</bitOffset>
27554              <bitWidth>4</bitWidth>
27555              <access>read-only</access>
27556            </field>
27557            <field>
27558              <name>TXCTR</name>
27559              <description>TX FIFO Counter</description>
27560              <bitOffset>12</bitOffset>
27561              <bitWidth>4</bitWidth>
27562              <access>read-only</access>
27563            </field>
27564            <field>
27565              <name>RFDF</name>
27566              <description>Receive FIFO Drain Flag</description>
27567              <bitOffset>17</bitOffset>
27568              <bitWidth>1</bitWidth>
27569              <access>read-write</access>
27570              <enumeratedValues>
27571                <enumeratedValue>
27572                  <name>0</name>
27573                  <description>RX FIFO is empty.</description>
27574                  <value>#0</value>
27575                </enumeratedValue>
27576                <enumeratedValue>
27577                  <name>1</name>
27578                  <description>RX FIFO is not empty.</description>
27579                  <value>#1</value>
27580                </enumeratedValue>
27581              </enumeratedValues>
27582            </field>
27583            <field>
27584              <name>RFOF</name>
27585              <description>Receive FIFO Overflow Flag</description>
27586              <bitOffset>19</bitOffset>
27587              <bitWidth>1</bitWidth>
27588              <access>read-write</access>
27589              <enumeratedValues>
27590                <enumeratedValue>
27591                  <name>0</name>
27592                  <description>No Rx FIFO overflow.</description>
27593                  <value>#0</value>
27594                </enumeratedValue>
27595                <enumeratedValue>
27596                  <name>1</name>
27597                  <description>Rx FIFO overflow has occurred.</description>
27598                  <value>#1</value>
27599                </enumeratedValue>
27600              </enumeratedValues>
27601            </field>
27602            <field>
27603              <name>TFFF</name>
27604              <description>Transmit FIFO Fill Flag</description>
27605              <bitOffset>25</bitOffset>
27606              <bitWidth>1</bitWidth>
27607              <access>read-write</access>
27608              <enumeratedValues>
27609                <enumeratedValue>
27610                  <name>0</name>
27611                  <description>TX FIFO is full.</description>
27612                  <value>#0</value>
27613                </enumeratedValue>
27614                <enumeratedValue>
27615                  <name>1</name>
27616                  <description>TX FIFO is not full.</description>
27617                  <value>#1</value>
27618                </enumeratedValue>
27619              </enumeratedValues>
27620            </field>
27621            <field>
27622              <name>TFUF</name>
27623              <description>Transmit FIFO Underflow Flag</description>
27624              <bitOffset>27</bitOffset>
27625              <bitWidth>1</bitWidth>
27626              <access>read-write</access>
27627              <enumeratedValues>
27628                <enumeratedValue>
27629                  <name>0</name>
27630                  <description>No TX FIFO underflow.</description>
27631                  <value>#0</value>
27632                </enumeratedValue>
27633                <enumeratedValue>
27634                  <name>1</name>
27635                  <description>TX FIFO underflow has occurred.</description>
27636                  <value>#1</value>
27637                </enumeratedValue>
27638              </enumeratedValues>
27639            </field>
27640            <field>
27641              <name>EOQF</name>
27642              <description>End of Queue Flag</description>
27643              <bitOffset>28</bitOffset>
27644              <bitWidth>1</bitWidth>
27645              <access>read-write</access>
27646              <enumeratedValues>
27647                <enumeratedValue>
27648                  <name>0</name>
27649                  <description>EOQ is not set in the executing command.</description>
27650                  <value>#0</value>
27651                </enumeratedValue>
27652                <enumeratedValue>
27653                  <name>1</name>
27654                  <description>EOQ is set in the executing SPI command.</description>
27655                  <value>#1</value>
27656                </enumeratedValue>
27657              </enumeratedValues>
27658            </field>
27659            <field>
27660              <name>TXRXS</name>
27661              <description>TX and RX Status</description>
27662              <bitOffset>30</bitOffset>
27663              <bitWidth>1</bitWidth>
27664              <access>read-write</access>
27665              <enumeratedValues>
27666                <enumeratedValue>
27667                  <name>0</name>
27668                  <description>Transmit and receive operations are disabled (The module is in Stopped state).</description>
27669                  <value>#0</value>
27670                </enumeratedValue>
27671                <enumeratedValue>
27672                  <name>1</name>
27673                  <description>Transmit and receive operations are enabled (The module is in Running state).</description>
27674                  <value>#1</value>
27675                </enumeratedValue>
27676              </enumeratedValues>
27677            </field>
27678            <field>
27679              <name>TCF</name>
27680              <description>Transfer Complete Flag</description>
27681              <bitOffset>31</bitOffset>
27682              <bitWidth>1</bitWidth>
27683              <access>read-write</access>
27684              <enumeratedValues>
27685                <enumeratedValue>
27686                  <name>0</name>
27687                  <description>Transfer not complete.</description>
27688                  <value>#0</value>
27689                </enumeratedValue>
27690                <enumeratedValue>
27691                  <name>1</name>
27692                  <description>Transfer complete.</description>
27693                  <value>#1</value>
27694                </enumeratedValue>
27695              </enumeratedValues>
27696            </field>
27697          </fields>
27698        </register>
27699        <register>
27700          <name>RSER</name>
27701          <description>DMA/Interrupt Request Select and Enable Register</description>
27702          <addressOffset>0x30</addressOffset>
27703          <size>32</size>
27704          <access>read-write</access>
27705          <resetValue>0</resetValue>
27706          <resetMask>0xFFFFFFFF</resetMask>
27707          <fields>
27708            <field>
27709              <name>RFDF_DIRS</name>
27710              <description>Receive FIFO Drain DMA or Interrupt Request Select</description>
27711              <bitOffset>16</bitOffset>
27712              <bitWidth>1</bitWidth>
27713              <access>read-write</access>
27714              <enumeratedValues>
27715                <enumeratedValue>
27716                  <name>0</name>
27717                  <description>Interrupt request.</description>
27718                  <value>#0</value>
27719                </enumeratedValue>
27720                <enumeratedValue>
27721                  <name>1</name>
27722                  <description>DMA request.</description>
27723                  <value>#1</value>
27724                </enumeratedValue>
27725              </enumeratedValues>
27726            </field>
27727            <field>
27728              <name>RFDF_RE</name>
27729              <description>Receive FIFO Drain Request Enable</description>
27730              <bitOffset>17</bitOffset>
27731              <bitWidth>1</bitWidth>
27732              <access>read-write</access>
27733              <enumeratedValues>
27734                <enumeratedValue>
27735                  <name>0</name>
27736                  <description>RFDF interrupt or DMA requests are disabled.</description>
27737                  <value>#0</value>
27738                </enumeratedValue>
27739                <enumeratedValue>
27740                  <name>1</name>
27741                  <description>RFDF interrupt or DMA requests are enabled.</description>
27742                  <value>#1</value>
27743                </enumeratedValue>
27744              </enumeratedValues>
27745            </field>
27746            <field>
27747              <name>RFOF_RE</name>
27748              <description>Receive FIFO Overflow Request Enable</description>
27749              <bitOffset>19</bitOffset>
27750              <bitWidth>1</bitWidth>
27751              <access>read-write</access>
27752              <enumeratedValues>
27753                <enumeratedValue>
27754                  <name>0</name>
27755                  <description>RFOF interrupt requests are disabled.</description>
27756                  <value>#0</value>
27757                </enumeratedValue>
27758                <enumeratedValue>
27759                  <name>1</name>
27760                  <description>RFOF interrupt requests are enabled.</description>
27761                  <value>#1</value>
27762                </enumeratedValue>
27763              </enumeratedValues>
27764            </field>
27765            <field>
27766              <name>TFFF_DIRS</name>
27767              <description>Transmit FIFO Fill DMA or Interrupt Request Select</description>
27768              <bitOffset>24</bitOffset>
27769              <bitWidth>1</bitWidth>
27770              <access>read-write</access>
27771              <enumeratedValues>
27772                <enumeratedValue>
27773                  <name>0</name>
27774                  <description>TFFF flag generates interrupt requests.</description>
27775                  <value>#0</value>
27776                </enumeratedValue>
27777                <enumeratedValue>
27778                  <name>1</name>
27779                  <description>TFFF flag generates DMA requests.</description>
27780                  <value>#1</value>
27781                </enumeratedValue>
27782              </enumeratedValues>
27783            </field>
27784            <field>
27785              <name>TFFF_RE</name>
27786              <description>Transmit FIFO Fill Request Enable</description>
27787              <bitOffset>25</bitOffset>
27788              <bitWidth>1</bitWidth>
27789              <access>read-write</access>
27790              <enumeratedValues>
27791                <enumeratedValue>
27792                  <name>0</name>
27793                  <description>TFFF interrupts or DMA requests are disabled.</description>
27794                  <value>#0</value>
27795                </enumeratedValue>
27796                <enumeratedValue>
27797                  <name>1</name>
27798                  <description>TFFF interrupts or DMA requests are enabled.</description>
27799                  <value>#1</value>
27800                </enumeratedValue>
27801              </enumeratedValues>
27802            </field>
27803            <field>
27804              <name>TFUF_RE</name>
27805              <description>Transmit FIFO Underflow Request Enable</description>
27806              <bitOffset>27</bitOffset>
27807              <bitWidth>1</bitWidth>
27808              <access>read-write</access>
27809              <enumeratedValues>
27810                <enumeratedValue>
27811                  <name>0</name>
27812                  <description>TFUF interrupt requests are disabled.</description>
27813                  <value>#0</value>
27814                </enumeratedValue>
27815                <enumeratedValue>
27816                  <name>1</name>
27817                  <description>TFUF interrupt requests are enabled.</description>
27818                  <value>#1</value>
27819                </enumeratedValue>
27820              </enumeratedValues>
27821            </field>
27822            <field>
27823              <name>EOQF_RE</name>
27824              <description>Finished Request Enable</description>
27825              <bitOffset>28</bitOffset>
27826              <bitWidth>1</bitWidth>
27827              <access>read-write</access>
27828              <enumeratedValues>
27829                <enumeratedValue>
27830                  <name>0</name>
27831                  <description>EOQF interrupt requests are disabled.</description>
27832                  <value>#0</value>
27833                </enumeratedValue>
27834                <enumeratedValue>
27835                  <name>1</name>
27836                  <description>EOQF interrupt requests are enabled.</description>
27837                  <value>#1</value>
27838                </enumeratedValue>
27839              </enumeratedValues>
27840            </field>
27841            <field>
27842              <name>TCF_RE</name>
27843              <description>Transmission Complete Request Enable</description>
27844              <bitOffset>31</bitOffset>
27845              <bitWidth>1</bitWidth>
27846              <access>read-write</access>
27847              <enumeratedValues>
27848                <enumeratedValue>
27849                  <name>0</name>
27850                  <description>TCF interrupt requests are disabled.</description>
27851                  <value>#0</value>
27852                </enumeratedValue>
27853                <enumeratedValue>
27854                  <name>1</name>
27855                  <description>TCF interrupt requests are enabled.</description>
27856                  <value>#1</value>
27857                </enumeratedValue>
27858              </enumeratedValues>
27859            </field>
27860          </fields>
27861        </register>
27862        <register>
27863          <name>PUSHR</name>
27864          <description>PUSH TX FIFO Register In Master Mode</description>
27865          <alternateGroup>SPI1</alternateGroup>
27866          <addressOffset>0x34</addressOffset>
27867          <size>32</size>
27868          <access>read-write</access>
27869          <resetValue>0</resetValue>
27870          <resetMask>0xFFFFFFFF</resetMask>
27871          <fields>
27872            <field>
27873              <name>TXDATA</name>
27874              <description>Transmit Data</description>
27875              <bitOffset>0</bitOffset>
27876              <bitWidth>16</bitWidth>
27877              <access>read-write</access>
27878            </field>
27879            <field>
27880              <name>PCS0</name>
27881              <description>Select which PCS signals are to be asserted for the transfer</description>
27882              <bitOffset>16</bitOffset>
27883              <bitWidth>1</bitWidth>
27884              <access>read-write</access>
27885              <enumeratedValues>
27886                <enumeratedValue>
27887                  <name>0</name>
27888                  <description>Negate the PCS[x] signal.</description>
27889                  <value>#0</value>
27890                </enumeratedValue>
27891                <enumeratedValue>
27892                  <name>1</name>
27893                  <description>Assert the PCS[x] signal.</description>
27894                  <value>#1</value>
27895                </enumeratedValue>
27896              </enumeratedValues>
27897            </field>
27898            <field>
27899              <name>PCS1</name>
27900              <description>Select which PCS signals are to be asserted for the transfer</description>
27901              <bitOffset>17</bitOffset>
27902              <bitWidth>1</bitWidth>
27903              <access>read-write</access>
27904              <enumeratedValues>
27905                <enumeratedValue>
27906                  <name>0</name>
27907                  <description>Negate the PCS[x] signal.</description>
27908                  <value>#0</value>
27909                </enumeratedValue>
27910                <enumeratedValue>
27911                  <name>1</name>
27912                  <description>Assert the PCS[x] signal.</description>
27913                  <value>#1</value>
27914                </enumeratedValue>
27915              </enumeratedValues>
27916            </field>
27917            <field>
27918              <name>PCS2</name>
27919              <description>Select which PCS signals are to be asserted for the transfer</description>
27920              <bitOffset>18</bitOffset>
27921              <bitWidth>1</bitWidth>
27922              <access>read-write</access>
27923              <enumeratedValues>
27924                <enumeratedValue>
27925                  <name>0</name>
27926                  <description>Negate the PCS[x] signal.</description>
27927                  <value>#0</value>
27928                </enumeratedValue>
27929                <enumeratedValue>
27930                  <name>1</name>
27931                  <description>Assert the PCS[x] signal.</description>
27932                  <value>#1</value>
27933                </enumeratedValue>
27934              </enumeratedValues>
27935            </field>
27936            <field>
27937              <name>PCS3</name>
27938              <description>Select which PCS signals are to be asserted for the transfer</description>
27939              <bitOffset>19</bitOffset>
27940              <bitWidth>1</bitWidth>
27941              <access>read-write</access>
27942              <enumeratedValues>
27943                <enumeratedValue>
27944                  <name>0</name>
27945                  <description>Negate the PCS[x] signal.</description>
27946                  <value>#0</value>
27947                </enumeratedValue>
27948                <enumeratedValue>
27949                  <name>1</name>
27950                  <description>Assert the PCS[x] signal.</description>
27951                  <value>#1</value>
27952                </enumeratedValue>
27953              </enumeratedValues>
27954            </field>
27955            <field>
27956              <name>PCS4</name>
27957              <description>Select which PCS signals are to be asserted for the transfer</description>
27958              <bitOffset>20</bitOffset>
27959              <bitWidth>1</bitWidth>
27960              <access>read-write</access>
27961              <enumeratedValues>
27962                <enumeratedValue>
27963                  <name>0</name>
27964                  <description>Negate the PCS[x] signal.</description>
27965                  <value>#0</value>
27966                </enumeratedValue>
27967                <enumeratedValue>
27968                  <name>1</name>
27969                  <description>Assert the PCS[x] signal.</description>
27970                  <value>#1</value>
27971                </enumeratedValue>
27972              </enumeratedValues>
27973            </field>
27974            <field>
27975              <name>PCS5</name>
27976              <description>Select which PCS signals are to be asserted for the transfer</description>
27977              <bitOffset>21</bitOffset>
27978              <bitWidth>1</bitWidth>
27979              <access>read-write</access>
27980              <enumeratedValues>
27981                <enumeratedValue>
27982                  <name>0</name>
27983                  <description>Negate the PCS[x] signal.</description>
27984                  <value>#0</value>
27985                </enumeratedValue>
27986                <enumeratedValue>
27987                  <name>1</name>
27988                  <description>Assert the PCS[x] signal.</description>
27989                  <value>#1</value>
27990                </enumeratedValue>
27991              </enumeratedValues>
27992            </field>
27993            <field>
27994              <name>CTCNT</name>
27995              <description>Clear Transfer Counter</description>
27996              <bitOffset>26</bitOffset>
27997              <bitWidth>1</bitWidth>
27998              <access>read-write</access>
27999              <enumeratedValues>
28000                <enumeratedValue>
28001                  <name>0</name>
28002                  <description>Do not clear the TCR[TCNT] field.</description>
28003                  <value>#0</value>
28004                </enumeratedValue>
28005                <enumeratedValue>
28006                  <name>1</name>
28007                  <description>Clear the TCR[TCNT] field.</description>
28008                  <value>#1</value>
28009                </enumeratedValue>
28010              </enumeratedValues>
28011            </field>
28012            <field>
28013              <name>EOQ</name>
28014              <description>End Of Queue</description>
28015              <bitOffset>27</bitOffset>
28016              <bitWidth>1</bitWidth>
28017              <access>read-write</access>
28018              <enumeratedValues>
28019                <enumeratedValue>
28020                  <name>0</name>
28021                  <description>The SPI data is not the last data to transfer.</description>
28022                  <value>#0</value>
28023                </enumeratedValue>
28024                <enumeratedValue>
28025                  <name>1</name>
28026                  <description>The SPI data is the last data to transfer.</description>
28027                  <value>#1</value>
28028                </enumeratedValue>
28029              </enumeratedValues>
28030            </field>
28031            <field>
28032              <name>CTAS</name>
28033              <description>Clock and Transfer Attributes Select</description>
28034              <bitOffset>28</bitOffset>
28035              <bitWidth>3</bitWidth>
28036              <access>read-write</access>
28037              <enumeratedValues>
28038                <enumeratedValue>
28039                  <name>000</name>
28040                  <description>CTAR0</description>
28041                  <value>#000</value>
28042                </enumeratedValue>
28043                <enumeratedValue>
28044                  <name>001</name>
28045                  <description>CTAR1</description>
28046                  <value>#001</value>
28047                </enumeratedValue>
28048              </enumeratedValues>
28049            </field>
28050            <field>
28051              <name>CONT</name>
28052              <description>Continuous Peripheral Chip Select Enable</description>
28053              <bitOffset>31</bitOffset>
28054              <bitWidth>1</bitWidth>
28055              <access>read-write</access>
28056              <enumeratedValues>
28057                <enumeratedValue>
28058                  <name>0</name>
28059                  <description>Return PCSn signals to their inactive state between transfers.</description>
28060                  <value>#0</value>
28061                </enumeratedValue>
28062                <enumeratedValue>
28063                  <name>1</name>
28064                  <description>Keep PCSn signals asserted between transfers.</description>
28065                  <value>#1</value>
28066                </enumeratedValue>
28067              </enumeratedValues>
28068            </field>
28069          </fields>
28070        </register>
28071        <register>
28072          <name>PUSHR_SLAVE</name>
28073          <description>PUSH TX FIFO Register In Slave Mode</description>
28074          <alternateGroup>SPI1</alternateGroup>
28075          <addressOffset>0x34</addressOffset>
28076          <size>32</size>
28077          <access>read-write</access>
28078          <resetValue>0</resetValue>
28079          <resetMask>0xFFFFFFFF</resetMask>
28080          <fields>
28081            <field>
28082              <name>TXDATA</name>
28083              <description>Transmit Data</description>
28084              <bitOffset>0</bitOffset>
28085              <bitWidth>16</bitWidth>
28086              <access>read-write</access>
28087            </field>
28088          </fields>
28089        </register>
28090        <register>
28091          <name>POPR</name>
28092          <description>POP RX FIFO Register</description>
28093          <addressOffset>0x38</addressOffset>
28094          <size>32</size>
28095          <access>read-only</access>
28096          <resetValue>0</resetValue>
28097          <resetMask>0xFFFFFFFF</resetMask>
28098          <fields>
28099            <field>
28100              <name>RXDATA</name>
28101              <description>Received Data</description>
28102              <bitOffset>0</bitOffset>
28103              <bitWidth>32</bitWidth>
28104              <access>read-only</access>
28105            </field>
28106          </fields>
28107        </register>
28108        <register>
28109          <dim>4</dim>
28110          <dimIncrement>0x4</dimIncrement>
28111          <dimIndex>0,1,2,3</dimIndex>
28112          <name>TXFR%s</name>
28113          <description>Transmit FIFO Registers</description>
28114          <addressOffset>0x3C</addressOffset>
28115          <size>32</size>
28116          <access>read-only</access>
28117          <resetValue>0</resetValue>
28118          <resetMask>0xFFFFFFFF</resetMask>
28119          <fields>
28120            <field>
28121              <name>TXDATA</name>
28122              <description>Transmit Data</description>
28123              <bitOffset>0</bitOffset>
28124              <bitWidth>16</bitWidth>
28125              <access>read-only</access>
28126            </field>
28127            <field>
28128              <name>TXCMD_TXDATA</name>
28129              <description>Transmit Command or Transmit Data</description>
28130              <bitOffset>16</bitOffset>
28131              <bitWidth>16</bitWidth>
28132              <access>read-only</access>
28133            </field>
28134          </fields>
28135        </register>
28136        <register>
28137          <dim>4</dim>
28138          <dimIncrement>0x4</dimIncrement>
28139          <dimIndex>0,1,2,3</dimIndex>
28140          <name>RXFR%s</name>
28141          <description>Receive FIFO Registers</description>
28142          <addressOffset>0x7C</addressOffset>
28143          <size>32</size>
28144          <access>read-only</access>
28145          <resetValue>0</resetValue>
28146          <resetMask>0xFFFFFFFF</resetMask>
28147          <fields>
28148            <field>
28149              <name>RXDATA</name>
28150              <description>Receive Data</description>
28151              <bitOffset>0</bitOffset>
28152              <bitWidth>32</bitWidth>
28153              <access>read-only</access>
28154            </field>
28155          </fields>
28156        </register>
28157      </registers>
28158    </peripheral>
28159    <peripheral>
28160      <name>SPI2</name>
28161      <description>Serial Peripheral Interface</description>
28162      <groupName>SPI</groupName>
28163      <prependToName>SPI2_</prependToName>
28164      <baseAddress>0x400AC000</baseAddress>
28165      <addressBlock>
28166        <offset>0</offset>
28167        <size>0x8C</size>
28168        <usage>registers</usage>
28169      </addressBlock>
28170      <interrupt>
28171        <name>SPI2</name>
28172        <value>65</value>
28173      </interrupt>
28174      <registers>
28175        <register>
28176          <name>MCR</name>
28177          <description>Module Configuration Register</description>
28178          <addressOffset>0</addressOffset>
28179          <size>32</size>
28180          <access>read-write</access>
28181          <resetValue>0x4001</resetValue>
28182          <resetMask>0xFFFFFFFF</resetMask>
28183          <fields>
28184            <field>
28185              <name>HALT</name>
28186              <description>Halt</description>
28187              <bitOffset>0</bitOffset>
28188              <bitWidth>1</bitWidth>
28189              <access>read-write</access>
28190              <enumeratedValues>
28191                <enumeratedValue>
28192                  <name>0</name>
28193                  <description>Start transfers.</description>
28194                  <value>#0</value>
28195                </enumeratedValue>
28196                <enumeratedValue>
28197                  <name>1</name>
28198                  <description>Stop transfers.</description>
28199                  <value>#1</value>
28200                </enumeratedValue>
28201              </enumeratedValues>
28202            </field>
28203            <field>
28204              <name>SMPL_PT</name>
28205              <description>Sample Point</description>
28206              <bitOffset>8</bitOffset>
28207              <bitWidth>2</bitWidth>
28208              <access>read-write</access>
28209              <enumeratedValues>
28210                <enumeratedValue>
28211                  <name>00</name>
28212                  <description>0 protocol clock cycles between SCK edge and SIN sample</description>
28213                  <value>#00</value>
28214                </enumeratedValue>
28215                <enumeratedValue>
28216                  <name>01</name>
28217                  <description>1 protocol clock cycle between SCK edge and SIN sample</description>
28218                  <value>#01</value>
28219                </enumeratedValue>
28220                <enumeratedValue>
28221                  <name>10</name>
28222                  <description>2 protocol clock cycles between SCK edge and SIN sample</description>
28223                  <value>#10</value>
28224                </enumeratedValue>
28225              </enumeratedValues>
28226            </field>
28227            <field>
28228              <name>CLR_RXF</name>
28229              <description>CLR_RXF</description>
28230              <bitOffset>10</bitOffset>
28231              <bitWidth>1</bitWidth>
28232              <access>write-only</access>
28233              <enumeratedValues>
28234                <enumeratedValue>
28235                  <name>0</name>
28236                  <description>Do not clear the RX FIFO counter.</description>
28237                  <value>#0</value>
28238                </enumeratedValue>
28239                <enumeratedValue>
28240                  <name>1</name>
28241                  <description>Clear the RX FIFO counter.</description>
28242                  <value>#1</value>
28243                </enumeratedValue>
28244              </enumeratedValues>
28245            </field>
28246            <field>
28247              <name>CLR_TXF</name>
28248              <description>Clear TX FIFO</description>
28249              <bitOffset>11</bitOffset>
28250              <bitWidth>1</bitWidth>
28251              <access>write-only</access>
28252              <enumeratedValues>
28253                <enumeratedValue>
28254                  <name>0</name>
28255                  <description>Do not clear the TX FIFO counter.</description>
28256                  <value>#0</value>
28257                </enumeratedValue>
28258                <enumeratedValue>
28259                  <name>1</name>
28260                  <description>Clear the TX FIFO counter.</description>
28261                  <value>#1</value>
28262                </enumeratedValue>
28263              </enumeratedValues>
28264            </field>
28265            <field>
28266              <name>DIS_RXF</name>
28267              <description>Disable Receive FIFO</description>
28268              <bitOffset>12</bitOffset>
28269              <bitWidth>1</bitWidth>
28270              <access>read-write</access>
28271              <enumeratedValues>
28272                <enumeratedValue>
28273                  <name>0</name>
28274                  <description>RX FIFO is enabled.</description>
28275                  <value>#0</value>
28276                </enumeratedValue>
28277                <enumeratedValue>
28278                  <name>1</name>
28279                  <description>RX FIFO is disabled.</description>
28280                  <value>#1</value>
28281                </enumeratedValue>
28282              </enumeratedValues>
28283            </field>
28284            <field>
28285              <name>DIS_TXF</name>
28286              <description>Disable Transmit FIFO</description>
28287              <bitOffset>13</bitOffset>
28288              <bitWidth>1</bitWidth>
28289              <access>read-write</access>
28290              <enumeratedValues>
28291                <enumeratedValue>
28292                  <name>0</name>
28293                  <description>TX FIFO is enabled.</description>
28294                  <value>#0</value>
28295                </enumeratedValue>
28296                <enumeratedValue>
28297                  <name>1</name>
28298                  <description>TX FIFO is disabled.</description>
28299                  <value>#1</value>
28300                </enumeratedValue>
28301              </enumeratedValues>
28302            </field>
28303            <field>
28304              <name>MDIS</name>
28305              <description>Module Disable</description>
28306              <bitOffset>14</bitOffset>
28307              <bitWidth>1</bitWidth>
28308              <access>read-write</access>
28309              <enumeratedValues>
28310                <enumeratedValue>
28311                  <name>0</name>
28312                  <description>Enables the module clocks.</description>
28313                  <value>#0</value>
28314                </enumeratedValue>
28315                <enumeratedValue>
28316                  <name>1</name>
28317                  <description>Allows external logic to disable the module clocks.</description>
28318                  <value>#1</value>
28319                </enumeratedValue>
28320              </enumeratedValues>
28321            </field>
28322            <field>
28323              <name>DOZE</name>
28324              <description>Doze Enable</description>
28325              <bitOffset>15</bitOffset>
28326              <bitWidth>1</bitWidth>
28327              <access>read-write</access>
28328              <enumeratedValues>
28329                <enumeratedValue>
28330                  <name>0</name>
28331                  <description>Doze mode has no effect on the module.</description>
28332                  <value>#0</value>
28333                </enumeratedValue>
28334                <enumeratedValue>
28335                  <name>1</name>
28336                  <description>Doze mode disables the module.</description>
28337                  <value>#1</value>
28338                </enumeratedValue>
28339              </enumeratedValues>
28340            </field>
28341            <field>
28342              <name>PCSIS0</name>
28343              <description>Peripheral Chip Select x Inactive State</description>
28344              <bitOffset>16</bitOffset>
28345              <bitWidth>1</bitWidth>
28346              <access>read-write</access>
28347              <enumeratedValues>
28348                <enumeratedValue>
28349                  <name>0</name>
28350                  <description>The inactive state of PCSx is low.</description>
28351                  <value>#0</value>
28352                </enumeratedValue>
28353                <enumeratedValue>
28354                  <name>1</name>
28355                  <description>The inactive state of PCSx is high.</description>
28356                  <value>#1</value>
28357                </enumeratedValue>
28358              </enumeratedValues>
28359            </field>
28360            <field>
28361              <name>PCSIS1</name>
28362              <description>Peripheral Chip Select x Inactive State</description>
28363              <bitOffset>17</bitOffset>
28364              <bitWidth>1</bitWidth>
28365              <access>read-write</access>
28366              <enumeratedValues>
28367                <enumeratedValue>
28368                  <name>0</name>
28369                  <description>The inactive state of PCSx is low.</description>
28370                  <value>#0</value>
28371                </enumeratedValue>
28372                <enumeratedValue>
28373                  <name>1</name>
28374                  <description>The inactive state of PCSx is high.</description>
28375                  <value>#1</value>
28376                </enumeratedValue>
28377              </enumeratedValues>
28378            </field>
28379            <field>
28380              <name>PCSIS2</name>
28381              <description>Peripheral Chip Select x Inactive State</description>
28382              <bitOffset>18</bitOffset>
28383              <bitWidth>1</bitWidth>
28384              <access>read-write</access>
28385              <enumeratedValues>
28386                <enumeratedValue>
28387                  <name>0</name>
28388                  <description>The inactive state of PCSx is low.</description>
28389                  <value>#0</value>
28390                </enumeratedValue>
28391                <enumeratedValue>
28392                  <name>1</name>
28393                  <description>The inactive state of PCSx is high.</description>
28394                  <value>#1</value>
28395                </enumeratedValue>
28396              </enumeratedValues>
28397            </field>
28398            <field>
28399              <name>PCSIS3</name>
28400              <description>Peripheral Chip Select x Inactive State</description>
28401              <bitOffset>19</bitOffset>
28402              <bitWidth>1</bitWidth>
28403              <access>read-write</access>
28404              <enumeratedValues>
28405                <enumeratedValue>
28406                  <name>0</name>
28407                  <description>The inactive state of PCSx is low.</description>
28408                  <value>#0</value>
28409                </enumeratedValue>
28410                <enumeratedValue>
28411                  <name>1</name>
28412                  <description>The inactive state of PCSx is high.</description>
28413                  <value>#1</value>
28414                </enumeratedValue>
28415              </enumeratedValues>
28416            </field>
28417            <field>
28418              <name>PCSIS4</name>
28419              <description>Peripheral Chip Select x Inactive State</description>
28420              <bitOffset>20</bitOffset>
28421              <bitWidth>1</bitWidth>
28422              <access>read-write</access>
28423              <enumeratedValues>
28424                <enumeratedValue>
28425                  <name>0</name>
28426                  <description>The inactive state of PCSx is low.</description>
28427                  <value>#0</value>
28428                </enumeratedValue>
28429                <enumeratedValue>
28430                  <name>1</name>
28431                  <description>The inactive state of PCSx is high.</description>
28432                  <value>#1</value>
28433                </enumeratedValue>
28434              </enumeratedValues>
28435            </field>
28436            <field>
28437              <name>PCSIS5</name>
28438              <description>Peripheral Chip Select x Inactive State</description>
28439              <bitOffset>21</bitOffset>
28440              <bitWidth>1</bitWidth>
28441              <access>read-write</access>
28442              <enumeratedValues>
28443                <enumeratedValue>
28444                  <name>0</name>
28445                  <description>The inactive state of PCSx is low.</description>
28446                  <value>#0</value>
28447                </enumeratedValue>
28448                <enumeratedValue>
28449                  <name>1</name>
28450                  <description>The inactive state of PCSx is high.</description>
28451                  <value>#1</value>
28452                </enumeratedValue>
28453              </enumeratedValues>
28454            </field>
28455            <field>
28456              <name>ROOE</name>
28457              <description>Receive FIFO Overflow Overwrite Enable</description>
28458              <bitOffset>24</bitOffset>
28459              <bitWidth>1</bitWidth>
28460              <access>read-write</access>
28461              <enumeratedValues>
28462                <enumeratedValue>
28463                  <name>0</name>
28464                  <description>Incoming data is ignored.</description>
28465                  <value>#0</value>
28466                </enumeratedValue>
28467                <enumeratedValue>
28468                  <name>1</name>
28469                  <description>Incoming data is shifted into the shift register.</description>
28470                  <value>#1</value>
28471                </enumeratedValue>
28472              </enumeratedValues>
28473            </field>
28474            <field>
28475              <name>PCSSE</name>
28476              <description>Peripheral Chip Select Strobe Enable</description>
28477              <bitOffset>25</bitOffset>
28478              <bitWidth>1</bitWidth>
28479              <access>read-write</access>
28480              <enumeratedValues>
28481                <enumeratedValue>
28482                  <name>0</name>
28483                  <description>PCS5/ PCSS is used as the Peripheral Chip Select[5] signal.</description>
28484                  <value>#0</value>
28485                </enumeratedValue>
28486                <enumeratedValue>
28487                  <name>1</name>
28488                  <description>PCS5/ PCSS is used as an active-low PCS Strobe signal.</description>
28489                  <value>#1</value>
28490                </enumeratedValue>
28491              </enumeratedValues>
28492            </field>
28493            <field>
28494              <name>MTFE</name>
28495              <description>Modified Transfer Format Enable</description>
28496              <bitOffset>26</bitOffset>
28497              <bitWidth>1</bitWidth>
28498              <access>read-write</access>
28499              <enumeratedValues>
28500                <enumeratedValue>
28501                  <name>0</name>
28502                  <description>Modified SPI transfer format disabled.</description>
28503                  <value>#0</value>
28504                </enumeratedValue>
28505                <enumeratedValue>
28506                  <name>1</name>
28507                  <description>Modified SPI transfer format enabled.</description>
28508                  <value>#1</value>
28509                </enumeratedValue>
28510              </enumeratedValues>
28511            </field>
28512            <field>
28513              <name>FRZ</name>
28514              <description>Freeze</description>
28515              <bitOffset>27</bitOffset>
28516              <bitWidth>1</bitWidth>
28517              <access>read-write</access>
28518              <enumeratedValues>
28519                <enumeratedValue>
28520                  <name>0</name>
28521                  <description>Do not halt serial transfers in Debug mode.</description>
28522                  <value>#0</value>
28523                </enumeratedValue>
28524                <enumeratedValue>
28525                  <name>1</name>
28526                  <description>Halt serial transfers in Debug mode.</description>
28527                  <value>#1</value>
28528                </enumeratedValue>
28529              </enumeratedValues>
28530            </field>
28531            <field>
28532              <name>DCONF</name>
28533              <description>SPI Configuration.</description>
28534              <bitOffset>28</bitOffset>
28535              <bitWidth>2</bitWidth>
28536              <access>read-only</access>
28537              <enumeratedValues>
28538                <enumeratedValue>
28539                  <name>00</name>
28540                  <description>SPI</description>
28541                  <value>#00</value>
28542                </enumeratedValue>
28543              </enumeratedValues>
28544            </field>
28545            <field>
28546              <name>CONT_SCKE</name>
28547              <description>Continuous SCK Enable</description>
28548              <bitOffset>30</bitOffset>
28549              <bitWidth>1</bitWidth>
28550              <access>read-write</access>
28551              <enumeratedValues>
28552                <enumeratedValue>
28553                  <name>0</name>
28554                  <description>Continuous SCK disabled.</description>
28555                  <value>#0</value>
28556                </enumeratedValue>
28557                <enumeratedValue>
28558                  <name>1</name>
28559                  <description>Continuous SCK enabled.</description>
28560                  <value>#1</value>
28561                </enumeratedValue>
28562              </enumeratedValues>
28563            </field>
28564            <field>
28565              <name>MSTR</name>
28566              <description>Master/Slave Mode Select</description>
28567              <bitOffset>31</bitOffset>
28568              <bitWidth>1</bitWidth>
28569              <access>read-write</access>
28570              <enumeratedValues>
28571                <enumeratedValue>
28572                  <name>0</name>
28573                  <description>Enables Slave mode</description>
28574                  <value>#0</value>
28575                </enumeratedValue>
28576                <enumeratedValue>
28577                  <name>1</name>
28578                  <description>Enables Master mode</description>
28579                  <value>#1</value>
28580                </enumeratedValue>
28581              </enumeratedValues>
28582            </field>
28583          </fields>
28584        </register>
28585        <register>
28586          <name>TCR</name>
28587          <description>Transfer Count Register</description>
28588          <addressOffset>0x8</addressOffset>
28589          <size>32</size>
28590          <access>read-write</access>
28591          <resetValue>0</resetValue>
28592          <resetMask>0xFFFFFFFF</resetMask>
28593          <fields>
28594            <field>
28595              <name>SPI_TCNT</name>
28596              <description>SPI Transfer Counter</description>
28597              <bitOffset>16</bitOffset>
28598              <bitWidth>16</bitWidth>
28599              <access>read-write</access>
28600            </field>
28601          </fields>
28602        </register>
28603        <register>
28604          <dim>2</dim>
28605          <dimIncrement>0x4</dimIncrement>
28606          <dimIndex>0,1</dimIndex>
28607          <name>CTAR%s</name>
28608          <description>Clock and Transfer Attributes Register (In Master Mode)</description>
28609          <alternateGroup>SPI2</alternateGroup>
28610          <addressOffset>0xC</addressOffset>
28611          <size>32</size>
28612          <access>read-write</access>
28613          <resetValue>0x78000000</resetValue>
28614          <resetMask>0xFFFFFFFF</resetMask>
28615          <fields>
28616            <field>
28617              <name>BR</name>
28618              <description>Baud Rate Scaler</description>
28619              <bitOffset>0</bitOffset>
28620              <bitWidth>4</bitWidth>
28621              <access>read-write</access>
28622            </field>
28623            <field>
28624              <name>DT</name>
28625              <description>Delay After Transfer Scaler</description>
28626              <bitOffset>4</bitOffset>
28627              <bitWidth>4</bitWidth>
28628              <access>read-write</access>
28629            </field>
28630            <field>
28631              <name>ASC</name>
28632              <description>After SCK Delay Scaler</description>
28633              <bitOffset>8</bitOffset>
28634              <bitWidth>4</bitWidth>
28635              <access>read-write</access>
28636            </field>
28637            <field>
28638              <name>CSSCK</name>
28639              <description>PCS to SCK Delay Scaler</description>
28640              <bitOffset>12</bitOffset>
28641              <bitWidth>4</bitWidth>
28642              <access>read-write</access>
28643            </field>
28644            <field>
28645              <name>PBR</name>
28646              <description>Baud Rate Prescaler</description>
28647              <bitOffset>16</bitOffset>
28648              <bitWidth>2</bitWidth>
28649              <access>read-write</access>
28650              <enumeratedValues>
28651                <enumeratedValue>
28652                  <name>00</name>
28653                  <description>Baud Rate Prescaler value is 2.</description>
28654                  <value>#00</value>
28655                </enumeratedValue>
28656                <enumeratedValue>
28657                  <name>01</name>
28658                  <description>Baud Rate Prescaler value is 3.</description>
28659                  <value>#01</value>
28660                </enumeratedValue>
28661                <enumeratedValue>
28662                  <name>10</name>
28663                  <description>Baud Rate Prescaler value is 5.</description>
28664                  <value>#10</value>
28665                </enumeratedValue>
28666                <enumeratedValue>
28667                  <name>11</name>
28668                  <description>Baud Rate Prescaler value is 7.</description>
28669                  <value>#11</value>
28670                </enumeratedValue>
28671              </enumeratedValues>
28672            </field>
28673            <field>
28674              <name>PDT</name>
28675              <description>Delay after Transfer Prescaler</description>
28676              <bitOffset>18</bitOffset>
28677              <bitWidth>2</bitWidth>
28678              <access>read-write</access>
28679              <enumeratedValues>
28680                <enumeratedValue>
28681                  <name>00</name>
28682                  <description>Delay after Transfer Prescaler value is 1.</description>
28683                  <value>#00</value>
28684                </enumeratedValue>
28685                <enumeratedValue>
28686                  <name>01</name>
28687                  <description>Delay after Transfer Prescaler value is 3.</description>
28688                  <value>#01</value>
28689                </enumeratedValue>
28690                <enumeratedValue>
28691                  <name>10</name>
28692                  <description>Delay after Transfer Prescaler value is 5.</description>
28693                  <value>#10</value>
28694                </enumeratedValue>
28695                <enumeratedValue>
28696                  <name>11</name>
28697                  <description>Delay after Transfer Prescaler value is 7.</description>
28698                  <value>#11</value>
28699                </enumeratedValue>
28700              </enumeratedValues>
28701            </field>
28702            <field>
28703              <name>PASC</name>
28704              <description>After SCK Delay Prescaler</description>
28705              <bitOffset>20</bitOffset>
28706              <bitWidth>2</bitWidth>
28707              <access>read-write</access>
28708              <enumeratedValues>
28709                <enumeratedValue>
28710                  <name>00</name>
28711                  <description>Delay after Transfer Prescaler value is 1.</description>
28712                  <value>#00</value>
28713                </enumeratedValue>
28714                <enumeratedValue>
28715                  <name>01</name>
28716                  <description>Delay after Transfer Prescaler value is 3.</description>
28717                  <value>#01</value>
28718                </enumeratedValue>
28719                <enumeratedValue>
28720                  <name>10</name>
28721                  <description>Delay after Transfer Prescaler value is 5.</description>
28722                  <value>#10</value>
28723                </enumeratedValue>
28724                <enumeratedValue>
28725                  <name>11</name>
28726                  <description>Delay after Transfer Prescaler value is 7.</description>
28727                  <value>#11</value>
28728                </enumeratedValue>
28729              </enumeratedValues>
28730            </field>
28731            <field>
28732              <name>PCSSCK</name>
28733              <description>PCS to SCK Delay Prescaler</description>
28734              <bitOffset>22</bitOffset>
28735              <bitWidth>2</bitWidth>
28736              <access>read-write</access>
28737              <enumeratedValues>
28738                <enumeratedValue>
28739                  <name>00</name>
28740                  <description>PCS to SCK Prescaler value is 1.</description>
28741                  <value>#00</value>
28742                </enumeratedValue>
28743                <enumeratedValue>
28744                  <name>01</name>
28745                  <description>PCS to SCK Prescaler value is 3.</description>
28746                  <value>#01</value>
28747                </enumeratedValue>
28748                <enumeratedValue>
28749                  <name>10</name>
28750                  <description>PCS to SCK Prescaler value is 5.</description>
28751                  <value>#10</value>
28752                </enumeratedValue>
28753                <enumeratedValue>
28754                  <name>11</name>
28755                  <description>PCS to SCK Prescaler value is 7.</description>
28756                  <value>#11</value>
28757                </enumeratedValue>
28758              </enumeratedValues>
28759            </field>
28760            <field>
28761              <name>LSBFE</name>
28762              <description>LSB First</description>
28763              <bitOffset>24</bitOffset>
28764              <bitWidth>1</bitWidth>
28765              <access>read-write</access>
28766              <enumeratedValues>
28767                <enumeratedValue>
28768                  <name>0</name>
28769                  <description>Data is transferred MSB first.</description>
28770                  <value>#0</value>
28771                </enumeratedValue>
28772                <enumeratedValue>
28773                  <name>1</name>
28774                  <description>Data is transferred LSB first.</description>
28775                  <value>#1</value>
28776                </enumeratedValue>
28777              </enumeratedValues>
28778            </field>
28779            <field>
28780              <name>CPHA</name>
28781              <description>Clock Phase</description>
28782              <bitOffset>25</bitOffset>
28783              <bitWidth>1</bitWidth>
28784              <access>read-write</access>
28785              <enumeratedValues>
28786                <enumeratedValue>
28787                  <name>0</name>
28788                  <description>Data is captured on the leading edge of SCK and changed on the following edge.</description>
28789                  <value>#0</value>
28790                </enumeratedValue>
28791                <enumeratedValue>
28792                  <name>1</name>
28793                  <description>Data is changed on the leading edge of SCK and captured on the following edge.</description>
28794                  <value>#1</value>
28795                </enumeratedValue>
28796              </enumeratedValues>
28797            </field>
28798            <field>
28799              <name>CPOL</name>
28800              <description>Clock Polarity</description>
28801              <bitOffset>26</bitOffset>
28802              <bitWidth>1</bitWidth>
28803              <access>read-write</access>
28804              <enumeratedValues>
28805                <enumeratedValue>
28806                  <name>0</name>
28807                  <description>The inactive state value of SCK is low.</description>
28808                  <value>#0</value>
28809                </enumeratedValue>
28810                <enumeratedValue>
28811                  <name>1</name>
28812                  <description>The inactive state value of SCK is high.</description>
28813                  <value>#1</value>
28814                </enumeratedValue>
28815              </enumeratedValues>
28816            </field>
28817            <field>
28818              <name>FMSZ</name>
28819              <description>Frame Size</description>
28820              <bitOffset>27</bitOffset>
28821              <bitWidth>4</bitWidth>
28822              <access>read-write</access>
28823            </field>
28824            <field>
28825              <name>DBR</name>
28826              <description>Double Baud Rate</description>
28827              <bitOffset>31</bitOffset>
28828              <bitWidth>1</bitWidth>
28829              <access>read-write</access>
28830              <enumeratedValues>
28831                <enumeratedValue>
28832                  <name>0</name>
28833                  <description>The baud rate is computed normally with a 50/50 duty cycle.</description>
28834                  <value>#0</value>
28835                </enumeratedValue>
28836                <enumeratedValue>
28837                  <name>1</name>
28838                  <description>The baud rate is doubled with the duty cycle depending on the Baud Rate Prescaler.</description>
28839                  <value>#1</value>
28840                </enumeratedValue>
28841              </enumeratedValues>
28842            </field>
28843          </fields>
28844        </register>
28845        <register>
28846          <name>CTAR_SLAVE</name>
28847          <description>Clock and Transfer Attributes Register (In Slave Mode)</description>
28848          <alternateGroup>SPI2</alternateGroup>
28849          <addressOffset>0xC</addressOffset>
28850          <size>32</size>
28851          <access>read-write</access>
28852          <resetValue>0x78000000</resetValue>
28853          <resetMask>0xFFFFFFFF</resetMask>
28854          <fields>
28855            <field>
28856              <name>CPHA</name>
28857              <description>Clock Phase</description>
28858              <bitOffset>25</bitOffset>
28859              <bitWidth>1</bitWidth>
28860              <access>read-write</access>
28861              <enumeratedValues>
28862                <enumeratedValue>
28863                  <name>0</name>
28864                  <description>Data is captured on the leading edge of SCK and changed on the following edge.</description>
28865                  <value>#0</value>
28866                </enumeratedValue>
28867                <enumeratedValue>
28868                  <name>1</name>
28869                  <description>Data is changed on the leading edge of SCK and captured on the following edge.</description>
28870                  <value>#1</value>
28871                </enumeratedValue>
28872              </enumeratedValues>
28873            </field>
28874            <field>
28875              <name>CPOL</name>
28876              <description>Clock Polarity</description>
28877              <bitOffset>26</bitOffset>
28878              <bitWidth>1</bitWidth>
28879              <access>read-write</access>
28880              <enumeratedValues>
28881                <enumeratedValue>
28882                  <name>0</name>
28883                  <description>The inactive state value of SCK is low.</description>
28884                  <value>#0</value>
28885                </enumeratedValue>
28886                <enumeratedValue>
28887                  <name>1</name>
28888                  <description>The inactive state value of SCK is high.</description>
28889                  <value>#1</value>
28890                </enumeratedValue>
28891              </enumeratedValues>
28892            </field>
28893            <field>
28894              <name>FMSZ</name>
28895              <description>Frame Size</description>
28896              <bitOffset>27</bitOffset>
28897              <bitWidth>4</bitWidth>
28898              <access>read-write</access>
28899            </field>
28900          </fields>
28901        </register>
28902        <register>
28903          <name>SR</name>
28904          <description>Status Register</description>
28905          <addressOffset>0x2C</addressOffset>
28906          <size>32</size>
28907          <access>read-write</access>
28908          <resetValue>0x2000000</resetValue>
28909          <resetMask>0xFFFFFFFF</resetMask>
28910          <fields>
28911            <field>
28912              <name>POPNXTPTR</name>
28913              <description>Pop Next Pointer</description>
28914              <bitOffset>0</bitOffset>
28915              <bitWidth>4</bitWidth>
28916              <access>read-only</access>
28917            </field>
28918            <field>
28919              <name>RXCTR</name>
28920              <description>RX FIFO Counter</description>
28921              <bitOffset>4</bitOffset>
28922              <bitWidth>4</bitWidth>
28923              <access>read-only</access>
28924            </field>
28925            <field>
28926              <name>TXNXTPTR</name>
28927              <description>Transmit Next Pointer</description>
28928              <bitOffset>8</bitOffset>
28929              <bitWidth>4</bitWidth>
28930              <access>read-only</access>
28931            </field>
28932            <field>
28933              <name>TXCTR</name>
28934              <description>TX FIFO Counter</description>
28935              <bitOffset>12</bitOffset>
28936              <bitWidth>4</bitWidth>
28937              <access>read-only</access>
28938            </field>
28939            <field>
28940              <name>RFDF</name>
28941              <description>Receive FIFO Drain Flag</description>
28942              <bitOffset>17</bitOffset>
28943              <bitWidth>1</bitWidth>
28944              <access>read-write</access>
28945              <enumeratedValues>
28946                <enumeratedValue>
28947                  <name>0</name>
28948                  <description>RX FIFO is empty.</description>
28949                  <value>#0</value>
28950                </enumeratedValue>
28951                <enumeratedValue>
28952                  <name>1</name>
28953                  <description>RX FIFO is not empty.</description>
28954                  <value>#1</value>
28955                </enumeratedValue>
28956              </enumeratedValues>
28957            </field>
28958            <field>
28959              <name>RFOF</name>
28960              <description>Receive FIFO Overflow Flag</description>
28961              <bitOffset>19</bitOffset>
28962              <bitWidth>1</bitWidth>
28963              <access>read-write</access>
28964              <enumeratedValues>
28965                <enumeratedValue>
28966                  <name>0</name>
28967                  <description>No Rx FIFO overflow.</description>
28968                  <value>#0</value>
28969                </enumeratedValue>
28970                <enumeratedValue>
28971                  <name>1</name>
28972                  <description>Rx FIFO overflow has occurred.</description>
28973                  <value>#1</value>
28974                </enumeratedValue>
28975              </enumeratedValues>
28976            </field>
28977            <field>
28978              <name>TFFF</name>
28979              <description>Transmit FIFO Fill Flag</description>
28980              <bitOffset>25</bitOffset>
28981              <bitWidth>1</bitWidth>
28982              <access>read-write</access>
28983              <enumeratedValues>
28984                <enumeratedValue>
28985                  <name>0</name>
28986                  <description>TX FIFO is full.</description>
28987                  <value>#0</value>
28988                </enumeratedValue>
28989                <enumeratedValue>
28990                  <name>1</name>
28991                  <description>TX FIFO is not full.</description>
28992                  <value>#1</value>
28993                </enumeratedValue>
28994              </enumeratedValues>
28995            </field>
28996            <field>
28997              <name>TFUF</name>
28998              <description>Transmit FIFO Underflow Flag</description>
28999              <bitOffset>27</bitOffset>
29000              <bitWidth>1</bitWidth>
29001              <access>read-write</access>
29002              <enumeratedValues>
29003                <enumeratedValue>
29004                  <name>0</name>
29005                  <description>No TX FIFO underflow.</description>
29006                  <value>#0</value>
29007                </enumeratedValue>
29008                <enumeratedValue>
29009                  <name>1</name>
29010                  <description>TX FIFO underflow has occurred.</description>
29011                  <value>#1</value>
29012                </enumeratedValue>
29013              </enumeratedValues>
29014            </field>
29015            <field>
29016              <name>EOQF</name>
29017              <description>End of Queue Flag</description>
29018              <bitOffset>28</bitOffset>
29019              <bitWidth>1</bitWidth>
29020              <access>read-write</access>
29021              <enumeratedValues>
29022                <enumeratedValue>
29023                  <name>0</name>
29024                  <description>EOQ is not set in the executing command.</description>
29025                  <value>#0</value>
29026                </enumeratedValue>
29027                <enumeratedValue>
29028                  <name>1</name>
29029                  <description>EOQ is set in the executing SPI command.</description>
29030                  <value>#1</value>
29031                </enumeratedValue>
29032              </enumeratedValues>
29033            </field>
29034            <field>
29035              <name>TXRXS</name>
29036              <description>TX and RX Status</description>
29037              <bitOffset>30</bitOffset>
29038              <bitWidth>1</bitWidth>
29039              <access>read-write</access>
29040              <enumeratedValues>
29041                <enumeratedValue>
29042                  <name>0</name>
29043                  <description>Transmit and receive operations are disabled (The module is in Stopped state).</description>
29044                  <value>#0</value>
29045                </enumeratedValue>
29046                <enumeratedValue>
29047                  <name>1</name>
29048                  <description>Transmit and receive operations are enabled (The module is in Running state).</description>
29049                  <value>#1</value>
29050                </enumeratedValue>
29051              </enumeratedValues>
29052            </field>
29053            <field>
29054              <name>TCF</name>
29055              <description>Transfer Complete Flag</description>
29056              <bitOffset>31</bitOffset>
29057              <bitWidth>1</bitWidth>
29058              <access>read-write</access>
29059              <enumeratedValues>
29060                <enumeratedValue>
29061                  <name>0</name>
29062                  <description>Transfer not complete.</description>
29063                  <value>#0</value>
29064                </enumeratedValue>
29065                <enumeratedValue>
29066                  <name>1</name>
29067                  <description>Transfer complete.</description>
29068                  <value>#1</value>
29069                </enumeratedValue>
29070              </enumeratedValues>
29071            </field>
29072          </fields>
29073        </register>
29074        <register>
29075          <name>RSER</name>
29076          <description>DMA/Interrupt Request Select and Enable Register</description>
29077          <addressOffset>0x30</addressOffset>
29078          <size>32</size>
29079          <access>read-write</access>
29080          <resetValue>0</resetValue>
29081          <resetMask>0xFFFFFFFF</resetMask>
29082          <fields>
29083            <field>
29084              <name>RFDF_DIRS</name>
29085              <description>Receive FIFO Drain DMA or Interrupt Request Select</description>
29086              <bitOffset>16</bitOffset>
29087              <bitWidth>1</bitWidth>
29088              <access>read-write</access>
29089              <enumeratedValues>
29090                <enumeratedValue>
29091                  <name>0</name>
29092                  <description>Interrupt request.</description>
29093                  <value>#0</value>
29094                </enumeratedValue>
29095                <enumeratedValue>
29096                  <name>1</name>
29097                  <description>DMA request.</description>
29098                  <value>#1</value>
29099                </enumeratedValue>
29100              </enumeratedValues>
29101            </field>
29102            <field>
29103              <name>RFDF_RE</name>
29104              <description>Receive FIFO Drain Request Enable</description>
29105              <bitOffset>17</bitOffset>
29106              <bitWidth>1</bitWidth>
29107              <access>read-write</access>
29108              <enumeratedValues>
29109                <enumeratedValue>
29110                  <name>0</name>
29111                  <description>RFDF interrupt or DMA requests are disabled.</description>
29112                  <value>#0</value>
29113                </enumeratedValue>
29114                <enumeratedValue>
29115                  <name>1</name>
29116                  <description>RFDF interrupt or DMA requests are enabled.</description>
29117                  <value>#1</value>
29118                </enumeratedValue>
29119              </enumeratedValues>
29120            </field>
29121            <field>
29122              <name>RFOF_RE</name>
29123              <description>Receive FIFO Overflow Request Enable</description>
29124              <bitOffset>19</bitOffset>
29125              <bitWidth>1</bitWidth>
29126              <access>read-write</access>
29127              <enumeratedValues>
29128                <enumeratedValue>
29129                  <name>0</name>
29130                  <description>RFOF interrupt requests are disabled.</description>
29131                  <value>#0</value>
29132                </enumeratedValue>
29133                <enumeratedValue>
29134                  <name>1</name>
29135                  <description>RFOF interrupt requests are enabled.</description>
29136                  <value>#1</value>
29137                </enumeratedValue>
29138              </enumeratedValues>
29139            </field>
29140            <field>
29141              <name>TFFF_DIRS</name>
29142              <description>Transmit FIFO Fill DMA or Interrupt Request Select</description>
29143              <bitOffset>24</bitOffset>
29144              <bitWidth>1</bitWidth>
29145              <access>read-write</access>
29146              <enumeratedValues>
29147                <enumeratedValue>
29148                  <name>0</name>
29149                  <description>TFFF flag generates interrupt requests.</description>
29150                  <value>#0</value>
29151                </enumeratedValue>
29152                <enumeratedValue>
29153                  <name>1</name>
29154                  <description>TFFF flag generates DMA requests.</description>
29155                  <value>#1</value>
29156                </enumeratedValue>
29157              </enumeratedValues>
29158            </field>
29159            <field>
29160              <name>TFFF_RE</name>
29161              <description>Transmit FIFO Fill Request Enable</description>
29162              <bitOffset>25</bitOffset>
29163              <bitWidth>1</bitWidth>
29164              <access>read-write</access>
29165              <enumeratedValues>
29166                <enumeratedValue>
29167                  <name>0</name>
29168                  <description>TFFF interrupts or DMA requests are disabled.</description>
29169                  <value>#0</value>
29170                </enumeratedValue>
29171                <enumeratedValue>
29172                  <name>1</name>
29173                  <description>TFFF interrupts or DMA requests are enabled.</description>
29174                  <value>#1</value>
29175                </enumeratedValue>
29176              </enumeratedValues>
29177            </field>
29178            <field>
29179              <name>TFUF_RE</name>
29180              <description>Transmit FIFO Underflow Request Enable</description>
29181              <bitOffset>27</bitOffset>
29182              <bitWidth>1</bitWidth>
29183              <access>read-write</access>
29184              <enumeratedValues>
29185                <enumeratedValue>
29186                  <name>0</name>
29187                  <description>TFUF interrupt requests are disabled.</description>
29188                  <value>#0</value>
29189                </enumeratedValue>
29190                <enumeratedValue>
29191                  <name>1</name>
29192                  <description>TFUF interrupt requests are enabled.</description>
29193                  <value>#1</value>
29194                </enumeratedValue>
29195              </enumeratedValues>
29196            </field>
29197            <field>
29198              <name>EOQF_RE</name>
29199              <description>Finished Request Enable</description>
29200              <bitOffset>28</bitOffset>
29201              <bitWidth>1</bitWidth>
29202              <access>read-write</access>
29203              <enumeratedValues>
29204                <enumeratedValue>
29205                  <name>0</name>
29206                  <description>EOQF interrupt requests are disabled.</description>
29207                  <value>#0</value>
29208                </enumeratedValue>
29209                <enumeratedValue>
29210                  <name>1</name>
29211                  <description>EOQF interrupt requests are enabled.</description>
29212                  <value>#1</value>
29213                </enumeratedValue>
29214              </enumeratedValues>
29215            </field>
29216            <field>
29217              <name>TCF_RE</name>
29218              <description>Transmission Complete Request Enable</description>
29219              <bitOffset>31</bitOffset>
29220              <bitWidth>1</bitWidth>
29221              <access>read-write</access>
29222              <enumeratedValues>
29223                <enumeratedValue>
29224                  <name>0</name>
29225                  <description>TCF interrupt requests are disabled.</description>
29226                  <value>#0</value>
29227                </enumeratedValue>
29228                <enumeratedValue>
29229                  <name>1</name>
29230                  <description>TCF interrupt requests are enabled.</description>
29231                  <value>#1</value>
29232                </enumeratedValue>
29233              </enumeratedValues>
29234            </field>
29235          </fields>
29236        </register>
29237        <register>
29238          <name>PUSHR</name>
29239          <description>PUSH TX FIFO Register In Master Mode</description>
29240          <alternateGroup>SPI2</alternateGroup>
29241          <addressOffset>0x34</addressOffset>
29242          <size>32</size>
29243          <access>read-write</access>
29244          <resetValue>0</resetValue>
29245          <resetMask>0xFFFFFFFF</resetMask>
29246          <fields>
29247            <field>
29248              <name>TXDATA</name>
29249              <description>Transmit Data</description>
29250              <bitOffset>0</bitOffset>
29251              <bitWidth>16</bitWidth>
29252              <access>read-write</access>
29253            </field>
29254            <field>
29255              <name>PCS0</name>
29256              <description>Select which PCS signals are to be asserted for the transfer</description>
29257              <bitOffset>16</bitOffset>
29258              <bitWidth>1</bitWidth>
29259              <access>read-write</access>
29260              <enumeratedValues>
29261                <enumeratedValue>
29262                  <name>0</name>
29263                  <description>Negate the PCS[x] signal.</description>
29264                  <value>#0</value>
29265                </enumeratedValue>
29266                <enumeratedValue>
29267                  <name>1</name>
29268                  <description>Assert the PCS[x] signal.</description>
29269                  <value>#1</value>
29270                </enumeratedValue>
29271              </enumeratedValues>
29272            </field>
29273            <field>
29274              <name>PCS1</name>
29275              <description>Select which PCS signals are to be asserted for the transfer</description>
29276              <bitOffset>17</bitOffset>
29277              <bitWidth>1</bitWidth>
29278              <access>read-write</access>
29279              <enumeratedValues>
29280                <enumeratedValue>
29281                  <name>0</name>
29282                  <description>Negate the PCS[x] signal.</description>
29283                  <value>#0</value>
29284                </enumeratedValue>
29285                <enumeratedValue>
29286                  <name>1</name>
29287                  <description>Assert the PCS[x] signal.</description>
29288                  <value>#1</value>
29289                </enumeratedValue>
29290              </enumeratedValues>
29291            </field>
29292            <field>
29293              <name>PCS2</name>
29294              <description>Select which PCS signals are to be asserted for the transfer</description>
29295              <bitOffset>18</bitOffset>
29296              <bitWidth>1</bitWidth>
29297              <access>read-write</access>
29298              <enumeratedValues>
29299                <enumeratedValue>
29300                  <name>0</name>
29301                  <description>Negate the PCS[x] signal.</description>
29302                  <value>#0</value>
29303                </enumeratedValue>
29304                <enumeratedValue>
29305                  <name>1</name>
29306                  <description>Assert the PCS[x] signal.</description>
29307                  <value>#1</value>
29308                </enumeratedValue>
29309              </enumeratedValues>
29310            </field>
29311            <field>
29312              <name>PCS3</name>
29313              <description>Select which PCS signals are to be asserted for the transfer</description>
29314              <bitOffset>19</bitOffset>
29315              <bitWidth>1</bitWidth>
29316              <access>read-write</access>
29317              <enumeratedValues>
29318                <enumeratedValue>
29319                  <name>0</name>
29320                  <description>Negate the PCS[x] signal.</description>
29321                  <value>#0</value>
29322                </enumeratedValue>
29323                <enumeratedValue>
29324                  <name>1</name>
29325                  <description>Assert the PCS[x] signal.</description>
29326                  <value>#1</value>
29327                </enumeratedValue>
29328              </enumeratedValues>
29329            </field>
29330            <field>
29331              <name>PCS4</name>
29332              <description>Select which PCS signals are to be asserted for the transfer</description>
29333              <bitOffset>20</bitOffset>
29334              <bitWidth>1</bitWidth>
29335              <access>read-write</access>
29336              <enumeratedValues>
29337                <enumeratedValue>
29338                  <name>0</name>
29339                  <description>Negate the PCS[x] signal.</description>
29340                  <value>#0</value>
29341                </enumeratedValue>
29342                <enumeratedValue>
29343                  <name>1</name>
29344                  <description>Assert the PCS[x] signal.</description>
29345                  <value>#1</value>
29346                </enumeratedValue>
29347              </enumeratedValues>
29348            </field>
29349            <field>
29350              <name>PCS5</name>
29351              <description>Select which PCS signals are to be asserted for the transfer</description>
29352              <bitOffset>21</bitOffset>
29353              <bitWidth>1</bitWidth>
29354              <access>read-write</access>
29355              <enumeratedValues>
29356                <enumeratedValue>
29357                  <name>0</name>
29358                  <description>Negate the PCS[x] signal.</description>
29359                  <value>#0</value>
29360                </enumeratedValue>
29361                <enumeratedValue>
29362                  <name>1</name>
29363                  <description>Assert the PCS[x] signal.</description>
29364                  <value>#1</value>
29365                </enumeratedValue>
29366              </enumeratedValues>
29367            </field>
29368            <field>
29369              <name>CTCNT</name>
29370              <description>Clear Transfer Counter</description>
29371              <bitOffset>26</bitOffset>
29372              <bitWidth>1</bitWidth>
29373              <access>read-write</access>
29374              <enumeratedValues>
29375                <enumeratedValue>
29376                  <name>0</name>
29377                  <description>Do not clear the TCR[TCNT] field.</description>
29378                  <value>#0</value>
29379                </enumeratedValue>
29380                <enumeratedValue>
29381                  <name>1</name>
29382                  <description>Clear the TCR[TCNT] field.</description>
29383                  <value>#1</value>
29384                </enumeratedValue>
29385              </enumeratedValues>
29386            </field>
29387            <field>
29388              <name>EOQ</name>
29389              <description>End Of Queue</description>
29390              <bitOffset>27</bitOffset>
29391              <bitWidth>1</bitWidth>
29392              <access>read-write</access>
29393              <enumeratedValues>
29394                <enumeratedValue>
29395                  <name>0</name>
29396                  <description>The SPI data is not the last data to transfer.</description>
29397                  <value>#0</value>
29398                </enumeratedValue>
29399                <enumeratedValue>
29400                  <name>1</name>
29401                  <description>The SPI data is the last data to transfer.</description>
29402                  <value>#1</value>
29403                </enumeratedValue>
29404              </enumeratedValues>
29405            </field>
29406            <field>
29407              <name>CTAS</name>
29408              <description>Clock and Transfer Attributes Select</description>
29409              <bitOffset>28</bitOffset>
29410              <bitWidth>3</bitWidth>
29411              <access>read-write</access>
29412              <enumeratedValues>
29413                <enumeratedValue>
29414                  <name>000</name>
29415                  <description>CTAR0</description>
29416                  <value>#000</value>
29417                </enumeratedValue>
29418                <enumeratedValue>
29419                  <name>001</name>
29420                  <description>CTAR1</description>
29421                  <value>#001</value>
29422                </enumeratedValue>
29423              </enumeratedValues>
29424            </field>
29425            <field>
29426              <name>CONT</name>
29427              <description>Continuous Peripheral Chip Select Enable</description>
29428              <bitOffset>31</bitOffset>
29429              <bitWidth>1</bitWidth>
29430              <access>read-write</access>
29431              <enumeratedValues>
29432                <enumeratedValue>
29433                  <name>0</name>
29434                  <description>Return PCSn signals to their inactive state between transfers.</description>
29435                  <value>#0</value>
29436                </enumeratedValue>
29437                <enumeratedValue>
29438                  <name>1</name>
29439                  <description>Keep PCSn signals asserted between transfers.</description>
29440                  <value>#1</value>
29441                </enumeratedValue>
29442              </enumeratedValues>
29443            </field>
29444          </fields>
29445        </register>
29446        <register>
29447          <name>PUSHR_SLAVE</name>
29448          <description>PUSH TX FIFO Register In Slave Mode</description>
29449          <alternateGroup>SPI2</alternateGroup>
29450          <addressOffset>0x34</addressOffset>
29451          <size>32</size>
29452          <access>read-write</access>
29453          <resetValue>0</resetValue>
29454          <resetMask>0xFFFFFFFF</resetMask>
29455          <fields>
29456            <field>
29457              <name>TXDATA</name>
29458              <description>Transmit Data</description>
29459              <bitOffset>0</bitOffset>
29460              <bitWidth>16</bitWidth>
29461              <access>read-write</access>
29462            </field>
29463          </fields>
29464        </register>
29465        <register>
29466          <name>POPR</name>
29467          <description>POP RX FIFO Register</description>
29468          <addressOffset>0x38</addressOffset>
29469          <size>32</size>
29470          <access>read-only</access>
29471          <resetValue>0</resetValue>
29472          <resetMask>0xFFFFFFFF</resetMask>
29473          <fields>
29474            <field>
29475              <name>RXDATA</name>
29476              <description>Received Data</description>
29477              <bitOffset>0</bitOffset>
29478              <bitWidth>32</bitWidth>
29479              <access>read-only</access>
29480            </field>
29481          </fields>
29482        </register>
29483        <register>
29484          <dim>4</dim>
29485          <dimIncrement>0x4</dimIncrement>
29486          <dimIndex>0,1,2,3</dimIndex>
29487          <name>TXFR%s</name>
29488          <description>Transmit FIFO Registers</description>
29489          <addressOffset>0x3C</addressOffset>
29490          <size>32</size>
29491          <access>read-only</access>
29492          <resetValue>0</resetValue>
29493          <resetMask>0xFFFFFFFF</resetMask>
29494          <fields>
29495            <field>
29496              <name>TXDATA</name>
29497              <description>Transmit Data</description>
29498              <bitOffset>0</bitOffset>
29499              <bitWidth>16</bitWidth>
29500              <access>read-only</access>
29501            </field>
29502            <field>
29503              <name>TXCMD_TXDATA</name>
29504              <description>Transmit Command or Transmit Data</description>
29505              <bitOffset>16</bitOffset>
29506              <bitWidth>16</bitWidth>
29507              <access>read-only</access>
29508            </field>
29509          </fields>
29510        </register>
29511        <register>
29512          <dim>4</dim>
29513          <dimIncrement>0x4</dimIncrement>
29514          <dimIndex>0,1,2,3</dimIndex>
29515          <name>RXFR%s</name>
29516          <description>Receive FIFO Registers</description>
29517          <addressOffset>0x7C</addressOffset>
29518          <size>32</size>
29519          <access>read-only</access>
29520          <resetValue>0</resetValue>
29521          <resetMask>0xFFFFFFFF</resetMask>
29522          <fields>
29523            <field>
29524              <name>RXDATA</name>
29525              <description>Receive Data</description>
29526              <bitOffset>0</bitOffset>
29527              <bitWidth>32</bitWidth>
29528              <access>read-only</access>
29529            </field>
29530          </fields>
29531        </register>
29532      </registers>
29533    </peripheral>
29534    <peripheral>
29535      <name>I2S0</name>
29536      <description>Inter-IC Sound / Synchronous Audio Interface</description>
29537      <prependToName>I2S0_</prependToName>
29538      <baseAddress>0x4002F000</baseAddress>
29539      <addressBlock>
29540        <offset>0</offset>
29541        <size>0x108</size>
29542        <usage>registers</usage>
29543      </addressBlock>
29544      <interrupt>
29545        <name>I2S0_Tx</name>
29546        <value>28</value>
29547      </interrupt>
29548      <interrupt>
29549        <name>I2S0_Rx</name>
29550        <value>29</value>
29551      </interrupt>
29552      <registers>
29553        <register>
29554          <name>TCSR</name>
29555          <description>SAI Transmit Control Register</description>
29556          <addressOffset>0</addressOffset>
29557          <size>32</size>
29558          <access>read-write</access>
29559          <resetValue>0</resetValue>
29560          <resetMask>0xFFFFFFFF</resetMask>
29561          <fields>
29562            <field>
29563              <name>FRDE</name>
29564              <description>FIFO Request DMA Enable</description>
29565              <bitOffset>0</bitOffset>
29566              <bitWidth>1</bitWidth>
29567              <access>read-write</access>
29568              <enumeratedValues>
29569                <enumeratedValue>
29570                  <name>0</name>
29571                  <description>Disables the DMA request.</description>
29572                  <value>#0</value>
29573                </enumeratedValue>
29574                <enumeratedValue>
29575                  <name>1</name>
29576                  <description>Enables the DMA request.</description>
29577                  <value>#1</value>
29578                </enumeratedValue>
29579              </enumeratedValues>
29580            </field>
29581            <field>
29582              <name>FWDE</name>
29583              <description>FIFO Warning DMA Enable</description>
29584              <bitOffset>1</bitOffset>
29585              <bitWidth>1</bitWidth>
29586              <access>read-write</access>
29587              <enumeratedValues>
29588                <enumeratedValue>
29589                  <name>0</name>
29590                  <description>Disables the DMA request.</description>
29591                  <value>#0</value>
29592                </enumeratedValue>
29593                <enumeratedValue>
29594                  <name>1</name>
29595                  <description>Enables the DMA request.</description>
29596                  <value>#1</value>
29597                </enumeratedValue>
29598              </enumeratedValues>
29599            </field>
29600            <field>
29601              <name>FRIE</name>
29602              <description>FIFO Request Interrupt Enable</description>
29603              <bitOffset>8</bitOffset>
29604              <bitWidth>1</bitWidth>
29605              <access>read-write</access>
29606              <enumeratedValues>
29607                <enumeratedValue>
29608                  <name>0</name>
29609                  <description>Disables the interrupt.</description>
29610                  <value>#0</value>
29611                </enumeratedValue>
29612                <enumeratedValue>
29613                  <name>1</name>
29614                  <description>Enables the interrupt.</description>
29615                  <value>#1</value>
29616                </enumeratedValue>
29617              </enumeratedValues>
29618            </field>
29619            <field>
29620              <name>FWIE</name>
29621              <description>FIFO Warning Interrupt Enable</description>
29622              <bitOffset>9</bitOffset>
29623              <bitWidth>1</bitWidth>
29624              <access>read-write</access>
29625              <enumeratedValues>
29626                <enumeratedValue>
29627                  <name>0</name>
29628                  <description>Disables the interrupt.</description>
29629                  <value>#0</value>
29630                </enumeratedValue>
29631                <enumeratedValue>
29632                  <name>1</name>
29633                  <description>Enables the interrupt.</description>
29634                  <value>#1</value>
29635                </enumeratedValue>
29636              </enumeratedValues>
29637            </field>
29638            <field>
29639              <name>FEIE</name>
29640              <description>FIFO Error Interrupt Enable</description>
29641              <bitOffset>10</bitOffset>
29642              <bitWidth>1</bitWidth>
29643              <access>read-write</access>
29644              <enumeratedValues>
29645                <enumeratedValue>
29646                  <name>0</name>
29647                  <description>Disables the interrupt.</description>
29648                  <value>#0</value>
29649                </enumeratedValue>
29650                <enumeratedValue>
29651                  <name>1</name>
29652                  <description>Enables the interrupt.</description>
29653                  <value>#1</value>
29654                </enumeratedValue>
29655              </enumeratedValues>
29656            </field>
29657            <field>
29658              <name>SEIE</name>
29659              <description>Sync Error Interrupt Enable</description>
29660              <bitOffset>11</bitOffset>
29661              <bitWidth>1</bitWidth>
29662              <access>read-write</access>
29663              <enumeratedValues>
29664                <enumeratedValue>
29665                  <name>0</name>
29666                  <description>Disables interrupt.</description>
29667                  <value>#0</value>
29668                </enumeratedValue>
29669                <enumeratedValue>
29670                  <name>1</name>
29671                  <description>Enables interrupt.</description>
29672                  <value>#1</value>
29673                </enumeratedValue>
29674              </enumeratedValues>
29675            </field>
29676            <field>
29677              <name>WSIE</name>
29678              <description>Word Start Interrupt Enable</description>
29679              <bitOffset>12</bitOffset>
29680              <bitWidth>1</bitWidth>
29681              <access>read-write</access>
29682              <enumeratedValues>
29683                <enumeratedValue>
29684                  <name>0</name>
29685                  <description>Disables interrupt.</description>
29686                  <value>#0</value>
29687                </enumeratedValue>
29688                <enumeratedValue>
29689                  <name>1</name>
29690                  <description>Enables interrupt.</description>
29691                  <value>#1</value>
29692                </enumeratedValue>
29693              </enumeratedValues>
29694            </field>
29695            <field>
29696              <name>FRF</name>
29697              <description>FIFO Request Flag</description>
29698              <bitOffset>16</bitOffset>
29699              <bitWidth>1</bitWidth>
29700              <access>read-only</access>
29701              <enumeratedValues>
29702                <enumeratedValue>
29703                  <name>0</name>
29704                  <description>Transmit FIFO watermark has not been reached.</description>
29705                  <value>#0</value>
29706                </enumeratedValue>
29707                <enumeratedValue>
29708                  <name>1</name>
29709                  <description>Transmit FIFO watermark has been reached.</description>
29710                  <value>#1</value>
29711                </enumeratedValue>
29712              </enumeratedValues>
29713            </field>
29714            <field>
29715              <name>FWF</name>
29716              <description>FIFO Warning Flag</description>
29717              <bitOffset>17</bitOffset>
29718              <bitWidth>1</bitWidth>
29719              <access>read-only</access>
29720              <enumeratedValues>
29721                <enumeratedValue>
29722                  <name>0</name>
29723                  <description>No enabled transmit FIFO is empty.</description>
29724                  <value>#0</value>
29725                </enumeratedValue>
29726                <enumeratedValue>
29727                  <name>1</name>
29728                  <description>Enabled transmit FIFO is empty.</description>
29729                  <value>#1</value>
29730                </enumeratedValue>
29731              </enumeratedValues>
29732            </field>
29733            <field>
29734              <name>FEF</name>
29735              <description>FIFO Error Flag</description>
29736              <bitOffset>18</bitOffset>
29737              <bitWidth>1</bitWidth>
29738              <access>read-write</access>
29739              <enumeratedValues>
29740                <enumeratedValue>
29741                  <name>0</name>
29742                  <description>Transmit underrun not detected.</description>
29743                  <value>#0</value>
29744                </enumeratedValue>
29745                <enumeratedValue>
29746                  <name>1</name>
29747                  <description>Transmit underrun detected.</description>
29748                  <value>#1</value>
29749                </enumeratedValue>
29750              </enumeratedValues>
29751            </field>
29752            <field>
29753              <name>SEF</name>
29754              <description>Sync Error Flag</description>
29755              <bitOffset>19</bitOffset>
29756              <bitWidth>1</bitWidth>
29757              <access>read-write</access>
29758              <enumeratedValues>
29759                <enumeratedValue>
29760                  <name>0</name>
29761                  <description>Sync error not detected.</description>
29762                  <value>#0</value>
29763                </enumeratedValue>
29764                <enumeratedValue>
29765                  <name>1</name>
29766                  <description>Frame sync error detected.</description>
29767                  <value>#1</value>
29768                </enumeratedValue>
29769              </enumeratedValues>
29770            </field>
29771            <field>
29772              <name>WSF</name>
29773              <description>Word Start Flag</description>
29774              <bitOffset>20</bitOffset>
29775              <bitWidth>1</bitWidth>
29776              <access>read-write</access>
29777              <enumeratedValues>
29778                <enumeratedValue>
29779                  <name>0</name>
29780                  <description>Start of word not detected.</description>
29781                  <value>#0</value>
29782                </enumeratedValue>
29783                <enumeratedValue>
29784                  <name>1</name>
29785                  <description>Start of word detected.</description>
29786                  <value>#1</value>
29787                </enumeratedValue>
29788              </enumeratedValues>
29789            </field>
29790            <field>
29791              <name>SR</name>
29792              <description>Software Reset</description>
29793              <bitOffset>24</bitOffset>
29794              <bitWidth>1</bitWidth>
29795              <access>read-write</access>
29796              <enumeratedValues>
29797                <enumeratedValue>
29798                  <name>0</name>
29799                  <description>No effect.</description>
29800                  <value>#0</value>
29801                </enumeratedValue>
29802                <enumeratedValue>
29803                  <name>1</name>
29804                  <description>Software reset.</description>
29805                  <value>#1</value>
29806                </enumeratedValue>
29807              </enumeratedValues>
29808            </field>
29809            <field>
29810              <name>FR</name>
29811              <description>FIFO Reset</description>
29812              <bitOffset>25</bitOffset>
29813              <bitWidth>1</bitWidth>
29814              <access>write-only</access>
29815              <enumeratedValues>
29816                <enumeratedValue>
29817                  <name>0</name>
29818                  <description>No effect.</description>
29819                  <value>#0</value>
29820                </enumeratedValue>
29821                <enumeratedValue>
29822                  <name>1</name>
29823                  <description>FIFO reset.</description>
29824                  <value>#1</value>
29825                </enumeratedValue>
29826              </enumeratedValues>
29827            </field>
29828            <field>
29829              <name>BCE</name>
29830              <description>Bit Clock Enable</description>
29831              <bitOffset>28</bitOffset>
29832              <bitWidth>1</bitWidth>
29833              <access>read-write</access>
29834              <enumeratedValues>
29835                <enumeratedValue>
29836                  <name>0</name>
29837                  <description>Transmit bit clock is disabled.</description>
29838                  <value>#0</value>
29839                </enumeratedValue>
29840                <enumeratedValue>
29841                  <name>1</name>
29842                  <description>Transmit bit clock is enabled.</description>
29843                  <value>#1</value>
29844                </enumeratedValue>
29845              </enumeratedValues>
29846            </field>
29847            <field>
29848              <name>DBGE</name>
29849              <description>Debug Enable</description>
29850              <bitOffset>29</bitOffset>
29851              <bitWidth>1</bitWidth>
29852              <access>read-write</access>
29853              <enumeratedValues>
29854                <enumeratedValue>
29855                  <name>0</name>
29856                  <description>Transmitter is disabled in Debug mode, after completing the current frame.</description>
29857                  <value>#0</value>
29858                </enumeratedValue>
29859                <enumeratedValue>
29860                  <name>1</name>
29861                  <description>Transmitter is enabled in Debug mode.</description>
29862                  <value>#1</value>
29863                </enumeratedValue>
29864              </enumeratedValues>
29865            </field>
29866            <field>
29867              <name>STOPE</name>
29868              <description>Stop Enable</description>
29869              <bitOffset>30</bitOffset>
29870              <bitWidth>1</bitWidth>
29871              <access>read-write</access>
29872              <enumeratedValues>
29873                <enumeratedValue>
29874                  <name>0</name>
29875                  <description>Transmitter disabled in Stop mode.</description>
29876                  <value>#0</value>
29877                </enumeratedValue>
29878                <enumeratedValue>
29879                  <name>1</name>
29880                  <description>Transmitter enabled in Stop mode.</description>
29881                  <value>#1</value>
29882                </enumeratedValue>
29883              </enumeratedValues>
29884            </field>
29885            <field>
29886              <name>TE</name>
29887              <description>Transmitter Enable</description>
29888              <bitOffset>31</bitOffset>
29889              <bitWidth>1</bitWidth>
29890              <access>read-write</access>
29891              <enumeratedValues>
29892                <enumeratedValue>
29893                  <name>0</name>
29894                  <description>Transmitter is disabled.</description>
29895                  <value>#0</value>
29896                </enumeratedValue>
29897                <enumeratedValue>
29898                  <name>1</name>
29899                  <description>Transmitter is enabled, or transmitter has been disabled and has not yet reached end of frame.</description>
29900                  <value>#1</value>
29901                </enumeratedValue>
29902              </enumeratedValues>
29903            </field>
29904          </fields>
29905        </register>
29906        <register>
29907          <name>TCR1</name>
29908          <description>SAI Transmit Configuration 1 Register</description>
29909          <addressOffset>0x4</addressOffset>
29910          <size>32</size>
29911          <access>read-write</access>
29912          <resetValue>0</resetValue>
29913          <resetMask>0xFFFFFFFF</resetMask>
29914          <fields>
29915            <field>
29916              <name>TFW</name>
29917              <description>Transmit FIFO Watermark</description>
29918              <bitOffset>0</bitOffset>
29919              <bitWidth>3</bitWidth>
29920              <access>read-write</access>
29921            </field>
29922          </fields>
29923        </register>
29924        <register>
29925          <name>TCR2</name>
29926          <description>SAI Transmit Configuration 2 Register</description>
29927          <addressOffset>0x8</addressOffset>
29928          <size>32</size>
29929          <access>read-write</access>
29930          <resetValue>0</resetValue>
29931          <resetMask>0xFFFFFFFF</resetMask>
29932          <fields>
29933            <field>
29934              <name>DIV</name>
29935              <description>Bit Clock Divide</description>
29936              <bitOffset>0</bitOffset>
29937              <bitWidth>8</bitWidth>
29938              <access>read-write</access>
29939            </field>
29940            <field>
29941              <name>BCD</name>
29942              <description>Bit Clock Direction</description>
29943              <bitOffset>24</bitOffset>
29944              <bitWidth>1</bitWidth>
29945              <access>read-write</access>
29946              <enumeratedValues>
29947                <enumeratedValue>
29948                  <name>0</name>
29949                  <description>Bit clock is generated externally in Slave mode.</description>
29950                  <value>#0</value>
29951                </enumeratedValue>
29952                <enumeratedValue>
29953                  <name>1</name>
29954                  <description>Bit clock is generated internally in Master mode.</description>
29955                  <value>#1</value>
29956                </enumeratedValue>
29957              </enumeratedValues>
29958            </field>
29959            <field>
29960              <name>BCP</name>
29961              <description>Bit Clock Polarity</description>
29962              <bitOffset>25</bitOffset>
29963              <bitWidth>1</bitWidth>
29964              <access>read-write</access>
29965              <enumeratedValues>
29966                <enumeratedValue>
29967                  <name>0</name>
29968                  <description>Bit clock is active high with drive outputs on rising edge and sample inputs on falling edge.</description>
29969                  <value>#0</value>
29970                </enumeratedValue>
29971                <enumeratedValue>
29972                  <name>1</name>
29973                  <description>Bit clock is active low with drive outputs on falling edge and sample inputs on rising edge.</description>
29974                  <value>#1</value>
29975                </enumeratedValue>
29976              </enumeratedValues>
29977            </field>
29978            <field>
29979              <name>MSEL</name>
29980              <description>MCLK Select</description>
29981              <bitOffset>26</bitOffset>
29982              <bitWidth>2</bitWidth>
29983              <access>read-write</access>
29984              <enumeratedValues>
29985                <enumeratedValue>
29986                  <name>00</name>
29987                  <description>Bus Clock selected.</description>
29988                  <value>#00</value>
29989                </enumeratedValue>
29990                <enumeratedValue>
29991                  <name>01</name>
29992                  <description>Master Clock (MCLK) 1 option selected.</description>
29993                  <value>#01</value>
29994                </enumeratedValue>
29995                <enumeratedValue>
29996                  <name>10</name>
29997                  <description>Master Clock (MCLK) 2 option selected.</description>
29998                  <value>#10</value>
29999                </enumeratedValue>
30000                <enumeratedValue>
30001                  <name>11</name>
30002                  <description>Master Clock (MCLK) 3 option selected.</description>
30003                  <value>#11</value>
30004                </enumeratedValue>
30005              </enumeratedValues>
30006            </field>
30007            <field>
30008              <name>BCI</name>
30009              <description>Bit Clock Input</description>
30010              <bitOffset>28</bitOffset>
30011              <bitWidth>1</bitWidth>
30012              <access>read-write</access>
30013              <enumeratedValues>
30014                <enumeratedValue>
30015                  <name>0</name>
30016                  <description>No effect.</description>
30017                  <value>#0</value>
30018                </enumeratedValue>
30019                <enumeratedValue>
30020                  <name>1</name>
30021                  <description>Internal logic is clocked as if bit clock was externally generated.</description>
30022                  <value>#1</value>
30023                </enumeratedValue>
30024              </enumeratedValues>
30025            </field>
30026            <field>
30027              <name>BCS</name>
30028              <description>Bit Clock Swap</description>
30029              <bitOffset>29</bitOffset>
30030              <bitWidth>1</bitWidth>
30031              <access>read-write</access>
30032              <enumeratedValues>
30033                <enumeratedValue>
30034                  <name>0</name>
30035                  <description>Use the normal bit clock source.</description>
30036                  <value>#0</value>
30037                </enumeratedValue>
30038                <enumeratedValue>
30039                  <name>1</name>
30040                  <description>Swap the bit clock source.</description>
30041                  <value>#1</value>
30042                </enumeratedValue>
30043              </enumeratedValues>
30044            </field>
30045            <field>
30046              <name>SYNC</name>
30047              <description>Synchronous Mode</description>
30048              <bitOffset>30</bitOffset>
30049              <bitWidth>2</bitWidth>
30050              <access>read-write</access>
30051              <enumeratedValues>
30052                <enumeratedValue>
30053                  <name>00</name>
30054                  <description>Asynchronous mode.</description>
30055                  <value>#00</value>
30056                </enumeratedValue>
30057                <enumeratedValue>
30058                  <name>01</name>
30059                  <description>Synchronous with receiver.</description>
30060                  <value>#01</value>
30061                </enumeratedValue>
30062                <enumeratedValue>
30063                  <name>10</name>
30064                  <description>Synchronous with another SAI transmitter.</description>
30065                  <value>#10</value>
30066                </enumeratedValue>
30067                <enumeratedValue>
30068                  <name>11</name>
30069                  <description>Synchronous with another SAI receiver.</description>
30070                  <value>#11</value>
30071                </enumeratedValue>
30072              </enumeratedValues>
30073            </field>
30074          </fields>
30075        </register>
30076        <register>
30077          <name>TCR3</name>
30078          <description>SAI Transmit Configuration 3 Register</description>
30079          <addressOffset>0xC</addressOffset>
30080          <size>32</size>
30081          <access>read-write</access>
30082          <resetValue>0</resetValue>
30083          <resetMask>0xFFFFFFFF</resetMask>
30084          <fields>
30085            <field>
30086              <name>WDFL</name>
30087              <description>Word Flag Configuration</description>
30088              <bitOffset>0</bitOffset>
30089              <bitWidth>5</bitWidth>
30090              <access>read-write</access>
30091            </field>
30092            <field>
30093              <name>TCE0</name>
30094              <description>Transmit Channel Enable</description>
30095              <bitOffset>16</bitOffset>
30096              <bitWidth>1</bitWidth>
30097              <access>read-write</access>
30098              <enumeratedValues>
30099                <enumeratedValue>
30100                  <name>0</name>
30101                  <description>Transmit data channel N is disabled.</description>
30102                  <value>#00</value>
30103                </enumeratedValue>
30104                <enumeratedValue>
30105                  <name>1</name>
30106                  <description>Transmit data channel N is enabled.</description>
30107                  <value>#01</value>
30108                </enumeratedValue>
30109              </enumeratedValues>
30110            </field>
30111            <field>
30112              <name>TCE1</name>
30113              <description>Transmit Channel Enable</description>
30114              <bitOffset>17</bitOffset>
30115              <bitWidth>1</bitWidth>
30116              <access>read-write</access>
30117              <enumeratedValues>
30118                <enumeratedValue>
30119                  <name>0</name>
30120                  <description>Transmit data channel N is disabled.</description>
30121                  <value>#00</value>
30122                </enumeratedValue>
30123                <enumeratedValue>
30124                  <name>1</name>
30125                  <description>Transmit data channel N is enabled.</description>
30126                  <value>#01</value>
30127                </enumeratedValue>
30128              </enumeratedValues>
30129            </field>
30130            <field>
30131              <name>CFR0</name>
30132              <description>Channel FIFO Reset</description>
30133              <bitOffset>24</bitOffset>
30134              <bitWidth>1</bitWidth>
30135              <access>write-only</access>
30136              <enumeratedValues>
30137                <enumeratedValue>
30138                  <name>0</name>
30139                  <description>No effect.</description>
30140                  <value>#00</value>
30141                </enumeratedValue>
30142                <enumeratedValue>
30143                  <name>1</name>
30144                  <description>Transmit data channel N FIFO is reset.</description>
30145                  <value>#01</value>
30146                </enumeratedValue>
30147              </enumeratedValues>
30148            </field>
30149            <field>
30150              <name>CFR1</name>
30151              <description>Channel FIFO Reset</description>
30152              <bitOffset>25</bitOffset>
30153              <bitWidth>1</bitWidth>
30154              <access>write-only</access>
30155              <enumeratedValues>
30156                <enumeratedValue>
30157                  <name>0</name>
30158                  <description>No effect.</description>
30159                  <value>#00</value>
30160                </enumeratedValue>
30161                <enumeratedValue>
30162                  <name>1</name>
30163                  <description>Transmit data channel N FIFO is reset.</description>
30164                  <value>#01</value>
30165                </enumeratedValue>
30166              </enumeratedValues>
30167            </field>
30168          </fields>
30169        </register>
30170        <register>
30171          <name>TCR4</name>
30172          <description>SAI Transmit Configuration 4 Register</description>
30173          <addressOffset>0x10</addressOffset>
30174          <size>32</size>
30175          <access>read-write</access>
30176          <resetValue>0</resetValue>
30177          <resetMask>0xFFFFFFFF</resetMask>
30178          <fields>
30179            <field>
30180              <name>FSD</name>
30181              <description>Frame Sync Direction</description>
30182              <bitOffset>0</bitOffset>
30183              <bitWidth>1</bitWidth>
30184              <access>read-write</access>
30185              <enumeratedValues>
30186                <enumeratedValue>
30187                  <name>0</name>
30188                  <description>Frame sync is generated externally in Slave mode.</description>
30189                  <value>#0</value>
30190                </enumeratedValue>
30191                <enumeratedValue>
30192                  <name>1</name>
30193                  <description>Frame sync is generated internally in Master mode.</description>
30194                  <value>#1</value>
30195                </enumeratedValue>
30196              </enumeratedValues>
30197            </field>
30198            <field>
30199              <name>FSP</name>
30200              <description>Frame Sync Polarity</description>
30201              <bitOffset>1</bitOffset>
30202              <bitWidth>1</bitWidth>
30203              <access>read-write</access>
30204              <enumeratedValues>
30205                <enumeratedValue>
30206                  <name>0</name>
30207                  <description>Frame sync is active high.</description>
30208                  <value>#0</value>
30209                </enumeratedValue>
30210                <enumeratedValue>
30211                  <name>1</name>
30212                  <description>Frame sync is active low.</description>
30213                  <value>#1</value>
30214                </enumeratedValue>
30215              </enumeratedValues>
30216            </field>
30217            <field>
30218              <name>ONDEM</name>
30219              <description>On Demand Mode</description>
30220              <bitOffset>2</bitOffset>
30221              <bitWidth>1</bitWidth>
30222              <access>read-write</access>
30223              <enumeratedValues>
30224                <enumeratedValue>
30225                  <name>0</name>
30226                  <description>Internal frame sync is generated continuously.</description>
30227                  <value>#0</value>
30228                </enumeratedValue>
30229                <enumeratedValue>
30230                  <name>1</name>
30231                  <description>Internal frame sync is generated when the FIFO warning flag is clear.</description>
30232                  <value>#1</value>
30233                </enumeratedValue>
30234              </enumeratedValues>
30235            </field>
30236            <field>
30237              <name>FSE</name>
30238              <description>Frame Sync Early</description>
30239              <bitOffset>3</bitOffset>
30240              <bitWidth>1</bitWidth>
30241              <access>read-write</access>
30242              <enumeratedValues>
30243                <enumeratedValue>
30244                  <name>0</name>
30245                  <description>Frame sync asserts with the first bit of the frame.</description>
30246                  <value>#0</value>
30247                </enumeratedValue>
30248                <enumeratedValue>
30249                  <name>1</name>
30250                  <description>Frame sync asserts one bit before the first bit of the frame.</description>
30251                  <value>#1</value>
30252                </enumeratedValue>
30253              </enumeratedValues>
30254            </field>
30255            <field>
30256              <name>MF</name>
30257              <description>MSB First</description>
30258              <bitOffset>4</bitOffset>
30259              <bitWidth>1</bitWidth>
30260              <access>read-write</access>
30261              <enumeratedValues>
30262                <enumeratedValue>
30263                  <name>0</name>
30264                  <description>LSB is transmitted first.</description>
30265                  <value>#0</value>
30266                </enumeratedValue>
30267                <enumeratedValue>
30268                  <name>1</name>
30269                  <description>MSB is transmitted first.</description>
30270                  <value>#1</value>
30271                </enumeratedValue>
30272              </enumeratedValues>
30273            </field>
30274            <field>
30275              <name>SYWD</name>
30276              <description>Sync Width</description>
30277              <bitOffset>8</bitOffset>
30278              <bitWidth>5</bitWidth>
30279              <access>read-write</access>
30280            </field>
30281            <field>
30282              <name>FRSZ</name>
30283              <description>Frame size</description>
30284              <bitOffset>16</bitOffset>
30285              <bitWidth>5</bitWidth>
30286              <access>read-write</access>
30287            </field>
30288            <field>
30289              <name>FPACK</name>
30290              <description>FIFO Packing Mode</description>
30291              <bitOffset>24</bitOffset>
30292              <bitWidth>2</bitWidth>
30293              <access>read-write</access>
30294              <enumeratedValues>
30295                <enumeratedValue>
30296                  <name>00</name>
30297                  <description>FIFO packing is disabled</description>
30298                  <value>#00</value>
30299                </enumeratedValue>
30300                <enumeratedValue>
30301                  <name>10</name>
30302                  <description>8-bit FIFO packing is enabled</description>
30303                  <value>#10</value>
30304                </enumeratedValue>
30305                <enumeratedValue>
30306                  <name>11</name>
30307                  <description>16-bit FIFO packing is enabled</description>
30308                  <value>#11</value>
30309                </enumeratedValue>
30310              </enumeratedValues>
30311            </field>
30312            <field>
30313              <name>FCOMB</name>
30314              <description>FIFO Combine Mode</description>
30315              <bitOffset>26</bitOffset>
30316              <bitWidth>2</bitWidth>
30317              <access>read-write</access>
30318              <enumeratedValues>
30319                <enumeratedValue>
30320                  <name>00</name>
30321                  <description>FIFO combine mode disabled.</description>
30322                  <value>#00</value>
30323                </enumeratedValue>
30324                <enumeratedValue>
30325                  <name>01</name>
30326                  <description>FIFO combine mode enabled on FIFO reads (from transmit shift registers).</description>
30327                  <value>#01</value>
30328                </enumeratedValue>
30329                <enumeratedValue>
30330                  <name>10</name>
30331                  <description>FIFO combine mode enabled on FIFO writes (by software).</description>
30332                  <value>#10</value>
30333                </enumeratedValue>
30334                <enumeratedValue>
30335                  <name>11</name>
30336                  <description>FIFO combine mode enabled on FIFO reads (from transmit shift registers) and writes (by software).</description>
30337                  <value>#11</value>
30338                </enumeratedValue>
30339              </enumeratedValues>
30340            </field>
30341            <field>
30342              <name>FCONT</name>
30343              <description>FIFO Continue on Error</description>
30344              <bitOffset>28</bitOffset>
30345              <bitWidth>1</bitWidth>
30346              <access>read-write</access>
30347              <enumeratedValues>
30348                <enumeratedValue>
30349                  <name>0</name>
30350                  <description>On FIFO error, the SAI will continue from the start of the next frame after the FIFO error flag has been cleared.</description>
30351                  <value>#0</value>
30352                </enumeratedValue>
30353                <enumeratedValue>
30354                  <name>1</name>
30355                  <description>On FIFO error, the SAI will continue from the same word that caused the FIFO error to set after the FIFO warning flag has been cleared.</description>
30356                  <value>#1</value>
30357                </enumeratedValue>
30358              </enumeratedValues>
30359            </field>
30360          </fields>
30361        </register>
30362        <register>
30363          <name>TCR5</name>
30364          <description>SAI Transmit Configuration 5 Register</description>
30365          <addressOffset>0x14</addressOffset>
30366          <size>32</size>
30367          <access>read-write</access>
30368          <resetValue>0</resetValue>
30369          <resetMask>0xFFFFFFFF</resetMask>
30370          <fields>
30371            <field>
30372              <name>FBT</name>
30373              <description>First Bit Shifted</description>
30374              <bitOffset>8</bitOffset>
30375              <bitWidth>5</bitWidth>
30376              <access>read-write</access>
30377            </field>
30378            <field>
30379              <name>W0W</name>
30380              <description>Word 0 Width</description>
30381              <bitOffset>16</bitOffset>
30382              <bitWidth>5</bitWidth>
30383              <access>read-write</access>
30384            </field>
30385            <field>
30386              <name>WNW</name>
30387              <description>Word N Width</description>
30388              <bitOffset>24</bitOffset>
30389              <bitWidth>5</bitWidth>
30390              <access>read-write</access>
30391            </field>
30392          </fields>
30393        </register>
30394        <register>
30395          <dim>2</dim>
30396          <dimIncrement>0x4</dimIncrement>
30397          <dimIndex>0,1</dimIndex>
30398          <name>TDR%s</name>
30399          <description>SAI Transmit Data Register</description>
30400          <addressOffset>0x20</addressOffset>
30401          <size>32</size>
30402          <access>write-only</access>
30403          <resetValue>0</resetValue>
30404          <resetMask>0xFFFFFFFF</resetMask>
30405          <fields>
30406            <field>
30407              <name>TDR</name>
30408              <description>Transmit Data Register</description>
30409              <bitOffset>0</bitOffset>
30410              <bitWidth>32</bitWidth>
30411              <access>write-only</access>
30412            </field>
30413          </fields>
30414        </register>
30415        <register>
30416          <dim>2</dim>
30417          <dimIncrement>0x4</dimIncrement>
30418          <dimIndex>0,1</dimIndex>
30419          <name>TFR%s</name>
30420          <description>SAI Transmit FIFO Register</description>
30421          <addressOffset>0x40</addressOffset>
30422          <size>32</size>
30423          <access>read-only</access>
30424          <resetValue>0</resetValue>
30425          <resetMask>0xFFFFFFFF</resetMask>
30426          <fields>
30427            <field>
30428              <name>RFP</name>
30429              <description>Read FIFO Pointer</description>
30430              <bitOffset>0</bitOffset>
30431              <bitWidth>4</bitWidth>
30432              <access>read-only</access>
30433            </field>
30434            <field>
30435              <name>WFP</name>
30436              <description>Write FIFO Pointer</description>
30437              <bitOffset>16</bitOffset>
30438              <bitWidth>4</bitWidth>
30439              <access>read-only</access>
30440            </field>
30441            <field>
30442              <name>WCP</name>
30443              <description>Write Channel Pointer</description>
30444              <bitOffset>31</bitOffset>
30445              <bitWidth>1</bitWidth>
30446              <access>read-only</access>
30447              <enumeratedValues>
30448                <enumeratedValue>
30449                  <name>0</name>
30450                  <description>No effect.</description>
30451                  <value>#0</value>
30452                </enumeratedValue>
30453                <enumeratedValue>
30454                  <name>1</name>
30455                  <description>FIFO combine is enabled for FIFO writes and this FIFO will be written on the next FIFO write.</description>
30456                  <value>#1</value>
30457                </enumeratedValue>
30458              </enumeratedValues>
30459            </field>
30460          </fields>
30461        </register>
30462        <register>
30463          <name>TMR</name>
30464          <description>SAI Transmit Mask Register</description>
30465          <addressOffset>0x60</addressOffset>
30466          <size>32</size>
30467          <access>read-write</access>
30468          <resetValue>0</resetValue>
30469          <resetMask>0xFFFFFFFF</resetMask>
30470          <fields>
30471            <field>
30472              <name>TWM0</name>
30473              <description>Transmit Word Mask</description>
30474              <bitOffset>0</bitOffset>
30475              <bitWidth>1</bitWidth>
30476              <access>read-write</access>
30477              <enumeratedValues>
30478                <enumeratedValue>
30479                  <name>0</name>
30480                  <description>Word N is enabled.</description>
30481                  <value>#0</value>
30482                </enumeratedValue>
30483                <enumeratedValue>
30484                  <name>1</name>
30485                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30486                  <value>#1</value>
30487                </enumeratedValue>
30488              </enumeratedValues>
30489            </field>
30490            <field>
30491              <name>TWM1</name>
30492              <description>Transmit Word Mask</description>
30493              <bitOffset>1</bitOffset>
30494              <bitWidth>1</bitWidth>
30495              <access>read-write</access>
30496              <enumeratedValues>
30497                <enumeratedValue>
30498                  <name>0</name>
30499                  <description>Word N is enabled.</description>
30500                  <value>#0</value>
30501                </enumeratedValue>
30502                <enumeratedValue>
30503                  <name>1</name>
30504                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30505                  <value>#1</value>
30506                </enumeratedValue>
30507              </enumeratedValues>
30508            </field>
30509            <field>
30510              <name>TWM2</name>
30511              <description>Transmit Word Mask</description>
30512              <bitOffset>2</bitOffset>
30513              <bitWidth>1</bitWidth>
30514              <access>read-write</access>
30515              <enumeratedValues>
30516                <enumeratedValue>
30517                  <name>0</name>
30518                  <description>Word N is enabled.</description>
30519                  <value>#0</value>
30520                </enumeratedValue>
30521                <enumeratedValue>
30522                  <name>1</name>
30523                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30524                  <value>#1</value>
30525                </enumeratedValue>
30526              </enumeratedValues>
30527            </field>
30528            <field>
30529              <name>TWM3</name>
30530              <description>Transmit Word Mask</description>
30531              <bitOffset>3</bitOffset>
30532              <bitWidth>1</bitWidth>
30533              <access>read-write</access>
30534              <enumeratedValues>
30535                <enumeratedValue>
30536                  <name>0</name>
30537                  <description>Word N is enabled.</description>
30538                  <value>#0</value>
30539                </enumeratedValue>
30540                <enumeratedValue>
30541                  <name>1</name>
30542                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30543                  <value>#1</value>
30544                </enumeratedValue>
30545              </enumeratedValues>
30546            </field>
30547            <field>
30548              <name>TWM4</name>
30549              <description>Transmit Word Mask</description>
30550              <bitOffset>4</bitOffset>
30551              <bitWidth>1</bitWidth>
30552              <access>read-write</access>
30553              <enumeratedValues>
30554                <enumeratedValue>
30555                  <name>0</name>
30556                  <description>Word N is enabled.</description>
30557                  <value>#0</value>
30558                </enumeratedValue>
30559                <enumeratedValue>
30560                  <name>1</name>
30561                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30562                  <value>#1</value>
30563                </enumeratedValue>
30564              </enumeratedValues>
30565            </field>
30566            <field>
30567              <name>TWM5</name>
30568              <description>Transmit Word Mask</description>
30569              <bitOffset>5</bitOffset>
30570              <bitWidth>1</bitWidth>
30571              <access>read-write</access>
30572              <enumeratedValues>
30573                <enumeratedValue>
30574                  <name>0</name>
30575                  <description>Word N is enabled.</description>
30576                  <value>#0</value>
30577                </enumeratedValue>
30578                <enumeratedValue>
30579                  <name>1</name>
30580                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30581                  <value>#1</value>
30582                </enumeratedValue>
30583              </enumeratedValues>
30584            </field>
30585            <field>
30586              <name>TWM6</name>
30587              <description>Transmit Word Mask</description>
30588              <bitOffset>6</bitOffset>
30589              <bitWidth>1</bitWidth>
30590              <access>read-write</access>
30591              <enumeratedValues>
30592                <enumeratedValue>
30593                  <name>0</name>
30594                  <description>Word N is enabled.</description>
30595                  <value>#0</value>
30596                </enumeratedValue>
30597                <enumeratedValue>
30598                  <name>1</name>
30599                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30600                  <value>#1</value>
30601                </enumeratedValue>
30602              </enumeratedValues>
30603            </field>
30604            <field>
30605              <name>TWM7</name>
30606              <description>Transmit Word Mask</description>
30607              <bitOffset>7</bitOffset>
30608              <bitWidth>1</bitWidth>
30609              <access>read-write</access>
30610              <enumeratedValues>
30611                <enumeratedValue>
30612                  <name>0</name>
30613                  <description>Word N is enabled.</description>
30614                  <value>#0</value>
30615                </enumeratedValue>
30616                <enumeratedValue>
30617                  <name>1</name>
30618                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30619                  <value>#1</value>
30620                </enumeratedValue>
30621              </enumeratedValues>
30622            </field>
30623            <field>
30624              <name>TWM8</name>
30625              <description>Transmit Word Mask</description>
30626              <bitOffset>8</bitOffset>
30627              <bitWidth>1</bitWidth>
30628              <access>read-write</access>
30629              <enumeratedValues>
30630                <enumeratedValue>
30631                  <name>0</name>
30632                  <description>Word N is enabled.</description>
30633                  <value>#0</value>
30634                </enumeratedValue>
30635                <enumeratedValue>
30636                  <name>1</name>
30637                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30638                  <value>#1</value>
30639                </enumeratedValue>
30640              </enumeratedValues>
30641            </field>
30642            <field>
30643              <name>TWM9</name>
30644              <description>Transmit Word Mask</description>
30645              <bitOffset>9</bitOffset>
30646              <bitWidth>1</bitWidth>
30647              <access>read-write</access>
30648              <enumeratedValues>
30649                <enumeratedValue>
30650                  <name>0</name>
30651                  <description>Word N is enabled.</description>
30652                  <value>#0</value>
30653                </enumeratedValue>
30654                <enumeratedValue>
30655                  <name>1</name>
30656                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30657                  <value>#1</value>
30658                </enumeratedValue>
30659              </enumeratedValues>
30660            </field>
30661            <field>
30662              <name>TWM10</name>
30663              <description>Transmit Word Mask</description>
30664              <bitOffset>10</bitOffset>
30665              <bitWidth>1</bitWidth>
30666              <access>read-write</access>
30667              <enumeratedValues>
30668                <enumeratedValue>
30669                  <name>0</name>
30670                  <description>Word N is enabled.</description>
30671                  <value>#0</value>
30672                </enumeratedValue>
30673                <enumeratedValue>
30674                  <name>1</name>
30675                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30676                  <value>#1</value>
30677                </enumeratedValue>
30678              </enumeratedValues>
30679            </field>
30680            <field>
30681              <name>TWM11</name>
30682              <description>Transmit Word Mask</description>
30683              <bitOffset>11</bitOffset>
30684              <bitWidth>1</bitWidth>
30685              <access>read-write</access>
30686              <enumeratedValues>
30687                <enumeratedValue>
30688                  <name>0</name>
30689                  <description>Word N is enabled.</description>
30690                  <value>#0</value>
30691                </enumeratedValue>
30692                <enumeratedValue>
30693                  <name>1</name>
30694                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30695                  <value>#1</value>
30696                </enumeratedValue>
30697              </enumeratedValues>
30698            </field>
30699            <field>
30700              <name>TWM12</name>
30701              <description>Transmit Word Mask</description>
30702              <bitOffset>12</bitOffset>
30703              <bitWidth>1</bitWidth>
30704              <access>read-write</access>
30705              <enumeratedValues>
30706                <enumeratedValue>
30707                  <name>0</name>
30708                  <description>Word N is enabled.</description>
30709                  <value>#0</value>
30710                </enumeratedValue>
30711                <enumeratedValue>
30712                  <name>1</name>
30713                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30714                  <value>#1</value>
30715                </enumeratedValue>
30716              </enumeratedValues>
30717            </field>
30718            <field>
30719              <name>TWM13</name>
30720              <description>Transmit Word Mask</description>
30721              <bitOffset>13</bitOffset>
30722              <bitWidth>1</bitWidth>
30723              <access>read-write</access>
30724              <enumeratedValues>
30725                <enumeratedValue>
30726                  <name>0</name>
30727                  <description>Word N is enabled.</description>
30728                  <value>#0</value>
30729                </enumeratedValue>
30730                <enumeratedValue>
30731                  <name>1</name>
30732                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30733                  <value>#1</value>
30734                </enumeratedValue>
30735              </enumeratedValues>
30736            </field>
30737            <field>
30738              <name>TWM14</name>
30739              <description>Transmit Word Mask</description>
30740              <bitOffset>14</bitOffset>
30741              <bitWidth>1</bitWidth>
30742              <access>read-write</access>
30743              <enumeratedValues>
30744                <enumeratedValue>
30745                  <name>0</name>
30746                  <description>Word N is enabled.</description>
30747                  <value>#0</value>
30748                </enumeratedValue>
30749                <enumeratedValue>
30750                  <name>1</name>
30751                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30752                  <value>#1</value>
30753                </enumeratedValue>
30754              </enumeratedValues>
30755            </field>
30756            <field>
30757              <name>TWM15</name>
30758              <description>Transmit Word Mask</description>
30759              <bitOffset>15</bitOffset>
30760              <bitWidth>1</bitWidth>
30761              <access>read-write</access>
30762              <enumeratedValues>
30763                <enumeratedValue>
30764                  <name>0</name>
30765                  <description>Word N is enabled.</description>
30766                  <value>#0</value>
30767                </enumeratedValue>
30768                <enumeratedValue>
30769                  <name>1</name>
30770                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30771                  <value>#1</value>
30772                </enumeratedValue>
30773              </enumeratedValues>
30774            </field>
30775            <field>
30776              <name>TWM16</name>
30777              <description>Transmit Word Mask</description>
30778              <bitOffset>16</bitOffset>
30779              <bitWidth>1</bitWidth>
30780              <access>read-write</access>
30781              <enumeratedValues>
30782                <enumeratedValue>
30783                  <name>0</name>
30784                  <description>Word N is enabled.</description>
30785                  <value>#0</value>
30786                </enumeratedValue>
30787                <enumeratedValue>
30788                  <name>1</name>
30789                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30790                  <value>#1</value>
30791                </enumeratedValue>
30792              </enumeratedValues>
30793            </field>
30794            <field>
30795              <name>TWM17</name>
30796              <description>Transmit Word Mask</description>
30797              <bitOffset>17</bitOffset>
30798              <bitWidth>1</bitWidth>
30799              <access>read-write</access>
30800              <enumeratedValues>
30801                <enumeratedValue>
30802                  <name>0</name>
30803                  <description>Word N is enabled.</description>
30804                  <value>#0</value>
30805                </enumeratedValue>
30806                <enumeratedValue>
30807                  <name>1</name>
30808                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30809                  <value>#1</value>
30810                </enumeratedValue>
30811              </enumeratedValues>
30812            </field>
30813            <field>
30814              <name>TWM18</name>
30815              <description>Transmit Word Mask</description>
30816              <bitOffset>18</bitOffset>
30817              <bitWidth>1</bitWidth>
30818              <access>read-write</access>
30819              <enumeratedValues>
30820                <enumeratedValue>
30821                  <name>0</name>
30822                  <description>Word N is enabled.</description>
30823                  <value>#0</value>
30824                </enumeratedValue>
30825                <enumeratedValue>
30826                  <name>1</name>
30827                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30828                  <value>#1</value>
30829                </enumeratedValue>
30830              </enumeratedValues>
30831            </field>
30832            <field>
30833              <name>TWM19</name>
30834              <description>Transmit Word Mask</description>
30835              <bitOffset>19</bitOffset>
30836              <bitWidth>1</bitWidth>
30837              <access>read-write</access>
30838              <enumeratedValues>
30839                <enumeratedValue>
30840                  <name>0</name>
30841                  <description>Word N is enabled.</description>
30842                  <value>#0</value>
30843                </enumeratedValue>
30844                <enumeratedValue>
30845                  <name>1</name>
30846                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30847                  <value>#1</value>
30848                </enumeratedValue>
30849              </enumeratedValues>
30850            </field>
30851            <field>
30852              <name>TWM20</name>
30853              <description>Transmit Word Mask</description>
30854              <bitOffset>20</bitOffset>
30855              <bitWidth>1</bitWidth>
30856              <access>read-write</access>
30857              <enumeratedValues>
30858                <enumeratedValue>
30859                  <name>0</name>
30860                  <description>Word N is enabled.</description>
30861                  <value>#0</value>
30862                </enumeratedValue>
30863                <enumeratedValue>
30864                  <name>1</name>
30865                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30866                  <value>#1</value>
30867                </enumeratedValue>
30868              </enumeratedValues>
30869            </field>
30870            <field>
30871              <name>TWM21</name>
30872              <description>Transmit Word Mask</description>
30873              <bitOffset>21</bitOffset>
30874              <bitWidth>1</bitWidth>
30875              <access>read-write</access>
30876              <enumeratedValues>
30877                <enumeratedValue>
30878                  <name>0</name>
30879                  <description>Word N is enabled.</description>
30880                  <value>#0</value>
30881                </enumeratedValue>
30882                <enumeratedValue>
30883                  <name>1</name>
30884                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30885                  <value>#1</value>
30886                </enumeratedValue>
30887              </enumeratedValues>
30888            </field>
30889            <field>
30890              <name>TWM22</name>
30891              <description>Transmit Word Mask</description>
30892              <bitOffset>22</bitOffset>
30893              <bitWidth>1</bitWidth>
30894              <access>read-write</access>
30895              <enumeratedValues>
30896                <enumeratedValue>
30897                  <name>0</name>
30898                  <description>Word N is enabled.</description>
30899                  <value>#0</value>
30900                </enumeratedValue>
30901                <enumeratedValue>
30902                  <name>1</name>
30903                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30904                  <value>#1</value>
30905                </enumeratedValue>
30906              </enumeratedValues>
30907            </field>
30908            <field>
30909              <name>TWM23</name>
30910              <description>Transmit Word Mask</description>
30911              <bitOffset>23</bitOffset>
30912              <bitWidth>1</bitWidth>
30913              <access>read-write</access>
30914              <enumeratedValues>
30915                <enumeratedValue>
30916                  <name>0</name>
30917                  <description>Word N is enabled.</description>
30918                  <value>#0</value>
30919                </enumeratedValue>
30920                <enumeratedValue>
30921                  <name>1</name>
30922                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30923                  <value>#1</value>
30924                </enumeratedValue>
30925              </enumeratedValues>
30926            </field>
30927            <field>
30928              <name>TWM24</name>
30929              <description>Transmit Word Mask</description>
30930              <bitOffset>24</bitOffset>
30931              <bitWidth>1</bitWidth>
30932              <access>read-write</access>
30933              <enumeratedValues>
30934                <enumeratedValue>
30935                  <name>0</name>
30936                  <description>Word N is enabled.</description>
30937                  <value>#0</value>
30938                </enumeratedValue>
30939                <enumeratedValue>
30940                  <name>1</name>
30941                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30942                  <value>#1</value>
30943                </enumeratedValue>
30944              </enumeratedValues>
30945            </field>
30946            <field>
30947              <name>TWM25</name>
30948              <description>Transmit Word Mask</description>
30949              <bitOffset>25</bitOffset>
30950              <bitWidth>1</bitWidth>
30951              <access>read-write</access>
30952              <enumeratedValues>
30953                <enumeratedValue>
30954                  <name>0</name>
30955                  <description>Word N is enabled.</description>
30956                  <value>#0</value>
30957                </enumeratedValue>
30958                <enumeratedValue>
30959                  <name>1</name>
30960                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30961                  <value>#1</value>
30962                </enumeratedValue>
30963              </enumeratedValues>
30964            </field>
30965            <field>
30966              <name>TWM26</name>
30967              <description>Transmit Word Mask</description>
30968              <bitOffset>26</bitOffset>
30969              <bitWidth>1</bitWidth>
30970              <access>read-write</access>
30971              <enumeratedValues>
30972                <enumeratedValue>
30973                  <name>0</name>
30974                  <description>Word N is enabled.</description>
30975                  <value>#0</value>
30976                </enumeratedValue>
30977                <enumeratedValue>
30978                  <name>1</name>
30979                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30980                  <value>#1</value>
30981                </enumeratedValue>
30982              </enumeratedValues>
30983            </field>
30984            <field>
30985              <name>TWM27</name>
30986              <description>Transmit Word Mask</description>
30987              <bitOffset>27</bitOffset>
30988              <bitWidth>1</bitWidth>
30989              <access>read-write</access>
30990              <enumeratedValues>
30991                <enumeratedValue>
30992                  <name>0</name>
30993                  <description>Word N is enabled.</description>
30994                  <value>#0</value>
30995                </enumeratedValue>
30996                <enumeratedValue>
30997                  <name>1</name>
30998                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
30999                  <value>#1</value>
31000                </enumeratedValue>
31001              </enumeratedValues>
31002            </field>
31003            <field>
31004              <name>TWM28</name>
31005              <description>Transmit Word Mask</description>
31006              <bitOffset>28</bitOffset>
31007              <bitWidth>1</bitWidth>
31008              <access>read-write</access>
31009              <enumeratedValues>
31010                <enumeratedValue>
31011                  <name>0</name>
31012                  <description>Word N is enabled.</description>
31013                  <value>#0</value>
31014                </enumeratedValue>
31015                <enumeratedValue>
31016                  <name>1</name>
31017                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
31018                  <value>#1</value>
31019                </enumeratedValue>
31020              </enumeratedValues>
31021            </field>
31022            <field>
31023              <name>TWM29</name>
31024              <description>Transmit Word Mask</description>
31025              <bitOffset>29</bitOffset>
31026              <bitWidth>1</bitWidth>
31027              <access>read-write</access>
31028              <enumeratedValues>
31029                <enumeratedValue>
31030                  <name>0</name>
31031                  <description>Word N is enabled.</description>
31032                  <value>#0</value>
31033                </enumeratedValue>
31034                <enumeratedValue>
31035                  <name>1</name>
31036                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
31037                  <value>#1</value>
31038                </enumeratedValue>
31039              </enumeratedValues>
31040            </field>
31041            <field>
31042              <name>TWM30</name>
31043              <description>Transmit Word Mask</description>
31044              <bitOffset>30</bitOffset>
31045              <bitWidth>1</bitWidth>
31046              <access>read-write</access>
31047              <enumeratedValues>
31048                <enumeratedValue>
31049                  <name>0</name>
31050                  <description>Word N is enabled.</description>
31051                  <value>#0</value>
31052                </enumeratedValue>
31053                <enumeratedValue>
31054                  <name>1</name>
31055                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
31056                  <value>#1</value>
31057                </enumeratedValue>
31058              </enumeratedValues>
31059            </field>
31060            <field>
31061              <name>TWM31</name>
31062              <description>Transmit Word Mask</description>
31063              <bitOffset>31</bitOffset>
31064              <bitWidth>1</bitWidth>
31065              <access>read-write</access>
31066              <enumeratedValues>
31067                <enumeratedValue>
31068                  <name>0</name>
31069                  <description>Word N is enabled.</description>
31070                  <value>#0</value>
31071                </enumeratedValue>
31072                <enumeratedValue>
31073                  <name>1</name>
31074                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
31075                  <value>#1</value>
31076                </enumeratedValue>
31077              </enumeratedValues>
31078            </field>
31079          </fields>
31080        </register>
31081        <register>
31082          <name>RCSR</name>
31083          <description>SAI Receive Control Register</description>
31084          <addressOffset>0x80</addressOffset>
31085          <size>32</size>
31086          <access>read-write</access>
31087          <resetValue>0</resetValue>
31088          <resetMask>0xFFFFFFFF</resetMask>
31089          <fields>
31090            <field>
31091              <name>FRDE</name>
31092              <description>FIFO Request DMA Enable</description>
31093              <bitOffset>0</bitOffset>
31094              <bitWidth>1</bitWidth>
31095              <access>read-write</access>
31096              <enumeratedValues>
31097                <enumeratedValue>
31098                  <name>0</name>
31099                  <description>Disables the DMA request.</description>
31100                  <value>#0</value>
31101                </enumeratedValue>
31102                <enumeratedValue>
31103                  <name>1</name>
31104                  <description>Enables the DMA request.</description>
31105                  <value>#1</value>
31106                </enumeratedValue>
31107              </enumeratedValues>
31108            </field>
31109            <field>
31110              <name>FWDE</name>
31111              <description>FIFO Warning DMA Enable</description>
31112              <bitOffset>1</bitOffset>
31113              <bitWidth>1</bitWidth>
31114              <access>read-write</access>
31115              <enumeratedValues>
31116                <enumeratedValue>
31117                  <name>0</name>
31118                  <description>Disables the DMA request.</description>
31119                  <value>#0</value>
31120                </enumeratedValue>
31121                <enumeratedValue>
31122                  <name>1</name>
31123                  <description>Enables the DMA request.</description>
31124                  <value>#1</value>
31125                </enumeratedValue>
31126              </enumeratedValues>
31127            </field>
31128            <field>
31129              <name>FRIE</name>
31130              <description>FIFO Request Interrupt Enable</description>
31131              <bitOffset>8</bitOffset>
31132              <bitWidth>1</bitWidth>
31133              <access>read-write</access>
31134              <enumeratedValues>
31135                <enumeratedValue>
31136                  <name>0</name>
31137                  <description>Disables the interrupt.</description>
31138                  <value>#0</value>
31139                </enumeratedValue>
31140                <enumeratedValue>
31141                  <name>1</name>
31142                  <description>Enables the interrupt.</description>
31143                  <value>#1</value>
31144                </enumeratedValue>
31145              </enumeratedValues>
31146            </field>
31147            <field>
31148              <name>FWIE</name>
31149              <description>FIFO Warning Interrupt Enable</description>
31150              <bitOffset>9</bitOffset>
31151              <bitWidth>1</bitWidth>
31152              <access>read-write</access>
31153              <enumeratedValues>
31154                <enumeratedValue>
31155                  <name>0</name>
31156                  <description>Disables the interrupt.</description>
31157                  <value>#0</value>
31158                </enumeratedValue>
31159                <enumeratedValue>
31160                  <name>1</name>
31161                  <description>Enables the interrupt.</description>
31162                  <value>#1</value>
31163                </enumeratedValue>
31164              </enumeratedValues>
31165            </field>
31166            <field>
31167              <name>FEIE</name>
31168              <description>FIFO Error Interrupt Enable</description>
31169              <bitOffset>10</bitOffset>
31170              <bitWidth>1</bitWidth>
31171              <access>read-write</access>
31172              <enumeratedValues>
31173                <enumeratedValue>
31174                  <name>0</name>
31175                  <description>Disables the interrupt.</description>
31176                  <value>#0</value>
31177                </enumeratedValue>
31178                <enumeratedValue>
31179                  <name>1</name>
31180                  <description>Enables the interrupt.</description>
31181                  <value>#1</value>
31182                </enumeratedValue>
31183              </enumeratedValues>
31184            </field>
31185            <field>
31186              <name>SEIE</name>
31187              <description>Sync Error Interrupt Enable</description>
31188              <bitOffset>11</bitOffset>
31189              <bitWidth>1</bitWidth>
31190              <access>read-write</access>
31191              <enumeratedValues>
31192                <enumeratedValue>
31193                  <name>0</name>
31194                  <description>Disables interrupt.</description>
31195                  <value>#0</value>
31196                </enumeratedValue>
31197                <enumeratedValue>
31198                  <name>1</name>
31199                  <description>Enables interrupt.</description>
31200                  <value>#1</value>
31201                </enumeratedValue>
31202              </enumeratedValues>
31203            </field>
31204            <field>
31205              <name>WSIE</name>
31206              <description>Word Start Interrupt Enable</description>
31207              <bitOffset>12</bitOffset>
31208              <bitWidth>1</bitWidth>
31209              <access>read-write</access>
31210              <enumeratedValues>
31211                <enumeratedValue>
31212                  <name>0</name>
31213                  <description>Disables interrupt.</description>
31214                  <value>#0</value>
31215                </enumeratedValue>
31216                <enumeratedValue>
31217                  <name>1</name>
31218                  <description>Enables interrupt.</description>
31219                  <value>#1</value>
31220                </enumeratedValue>
31221              </enumeratedValues>
31222            </field>
31223            <field>
31224              <name>FRF</name>
31225              <description>FIFO Request Flag</description>
31226              <bitOffset>16</bitOffset>
31227              <bitWidth>1</bitWidth>
31228              <access>read-only</access>
31229              <enumeratedValues>
31230                <enumeratedValue>
31231                  <name>0</name>
31232                  <description>Receive FIFO watermark not reached.</description>
31233                  <value>#0</value>
31234                </enumeratedValue>
31235                <enumeratedValue>
31236                  <name>1</name>
31237                  <description>Receive FIFO watermark has been reached.</description>
31238                  <value>#1</value>
31239                </enumeratedValue>
31240              </enumeratedValues>
31241            </field>
31242            <field>
31243              <name>FWF</name>
31244              <description>FIFO Warning Flag</description>
31245              <bitOffset>17</bitOffset>
31246              <bitWidth>1</bitWidth>
31247              <access>read-only</access>
31248              <enumeratedValues>
31249                <enumeratedValue>
31250                  <name>0</name>
31251                  <description>No enabled receive FIFO is full.</description>
31252                  <value>#0</value>
31253                </enumeratedValue>
31254                <enumeratedValue>
31255                  <name>1</name>
31256                  <description>Enabled receive FIFO is full.</description>
31257                  <value>#1</value>
31258                </enumeratedValue>
31259              </enumeratedValues>
31260            </field>
31261            <field>
31262              <name>FEF</name>
31263              <description>FIFO Error Flag</description>
31264              <bitOffset>18</bitOffset>
31265              <bitWidth>1</bitWidth>
31266              <access>read-write</access>
31267              <enumeratedValues>
31268                <enumeratedValue>
31269                  <name>0</name>
31270                  <description>Receive overflow not detected.</description>
31271                  <value>#0</value>
31272                </enumeratedValue>
31273                <enumeratedValue>
31274                  <name>1</name>
31275                  <description>Receive overflow detected.</description>
31276                  <value>#1</value>
31277                </enumeratedValue>
31278              </enumeratedValues>
31279            </field>
31280            <field>
31281              <name>SEF</name>
31282              <description>Sync Error Flag</description>
31283              <bitOffset>19</bitOffset>
31284              <bitWidth>1</bitWidth>
31285              <access>read-write</access>
31286              <enumeratedValues>
31287                <enumeratedValue>
31288                  <name>0</name>
31289                  <description>Sync error not detected.</description>
31290                  <value>#0</value>
31291                </enumeratedValue>
31292                <enumeratedValue>
31293                  <name>1</name>
31294                  <description>Frame sync error detected.</description>
31295                  <value>#1</value>
31296                </enumeratedValue>
31297              </enumeratedValues>
31298            </field>
31299            <field>
31300              <name>WSF</name>
31301              <description>Word Start Flag</description>
31302              <bitOffset>20</bitOffset>
31303              <bitWidth>1</bitWidth>
31304              <access>read-write</access>
31305              <enumeratedValues>
31306                <enumeratedValue>
31307                  <name>0</name>
31308                  <description>Start of word not detected.</description>
31309                  <value>#0</value>
31310                </enumeratedValue>
31311                <enumeratedValue>
31312                  <name>1</name>
31313                  <description>Start of word detected.</description>
31314                  <value>#1</value>
31315                </enumeratedValue>
31316              </enumeratedValues>
31317            </field>
31318            <field>
31319              <name>SR</name>
31320              <description>Software Reset</description>
31321              <bitOffset>24</bitOffset>
31322              <bitWidth>1</bitWidth>
31323              <access>read-write</access>
31324              <enumeratedValues>
31325                <enumeratedValue>
31326                  <name>0</name>
31327                  <description>No effect.</description>
31328                  <value>#0</value>
31329                </enumeratedValue>
31330                <enumeratedValue>
31331                  <name>1</name>
31332                  <description>Software reset.</description>
31333                  <value>#1</value>
31334                </enumeratedValue>
31335              </enumeratedValues>
31336            </field>
31337            <field>
31338              <name>FR</name>
31339              <description>FIFO Reset</description>
31340              <bitOffset>25</bitOffset>
31341              <bitWidth>1</bitWidth>
31342              <access>write-only</access>
31343              <enumeratedValues>
31344                <enumeratedValue>
31345                  <name>0</name>
31346                  <description>No effect.</description>
31347                  <value>#0</value>
31348                </enumeratedValue>
31349                <enumeratedValue>
31350                  <name>1</name>
31351                  <description>FIFO reset.</description>
31352                  <value>#1</value>
31353                </enumeratedValue>
31354              </enumeratedValues>
31355            </field>
31356            <field>
31357              <name>BCE</name>
31358              <description>Bit Clock Enable</description>
31359              <bitOffset>28</bitOffset>
31360              <bitWidth>1</bitWidth>
31361              <access>read-write</access>
31362              <enumeratedValues>
31363                <enumeratedValue>
31364                  <name>0</name>
31365                  <description>Receive bit clock is disabled.</description>
31366                  <value>#0</value>
31367                </enumeratedValue>
31368                <enumeratedValue>
31369                  <name>1</name>
31370                  <description>Receive bit clock is enabled.</description>
31371                  <value>#1</value>
31372                </enumeratedValue>
31373              </enumeratedValues>
31374            </field>
31375            <field>
31376              <name>DBGE</name>
31377              <description>Debug Enable</description>
31378              <bitOffset>29</bitOffset>
31379              <bitWidth>1</bitWidth>
31380              <access>read-write</access>
31381              <enumeratedValues>
31382                <enumeratedValue>
31383                  <name>0</name>
31384                  <description>Receiver is disabled in Debug mode, after completing the current frame.</description>
31385                  <value>#0</value>
31386                </enumeratedValue>
31387                <enumeratedValue>
31388                  <name>1</name>
31389                  <description>Receiver is enabled in Debug mode.</description>
31390                  <value>#1</value>
31391                </enumeratedValue>
31392              </enumeratedValues>
31393            </field>
31394            <field>
31395              <name>STOPE</name>
31396              <description>Stop Enable</description>
31397              <bitOffset>30</bitOffset>
31398              <bitWidth>1</bitWidth>
31399              <access>read-write</access>
31400              <enumeratedValues>
31401                <enumeratedValue>
31402                  <name>0</name>
31403                  <description>Receiver disabled in Stop mode.</description>
31404                  <value>#0</value>
31405                </enumeratedValue>
31406                <enumeratedValue>
31407                  <name>1</name>
31408                  <description>Receiver enabled in Stop mode.</description>
31409                  <value>#1</value>
31410                </enumeratedValue>
31411              </enumeratedValues>
31412            </field>
31413            <field>
31414              <name>RE</name>
31415              <description>Receiver Enable</description>
31416              <bitOffset>31</bitOffset>
31417              <bitWidth>1</bitWidth>
31418              <access>read-write</access>
31419              <enumeratedValues>
31420                <enumeratedValue>
31421                  <name>0</name>
31422                  <description>Receiver is disabled.</description>
31423                  <value>#0</value>
31424                </enumeratedValue>
31425                <enumeratedValue>
31426                  <name>1</name>
31427                  <description>Receiver is enabled, or receiver has been disabled and has not yet reached end of frame.</description>
31428                  <value>#1</value>
31429                </enumeratedValue>
31430              </enumeratedValues>
31431            </field>
31432          </fields>
31433        </register>
31434        <register>
31435          <name>RCR1</name>
31436          <description>SAI Receive Configuration 1 Register</description>
31437          <addressOffset>0x84</addressOffset>
31438          <size>32</size>
31439          <access>read-write</access>
31440          <resetValue>0</resetValue>
31441          <resetMask>0xFFFFFFFF</resetMask>
31442          <fields>
31443            <field>
31444              <name>RFW</name>
31445              <description>Receive FIFO Watermark</description>
31446              <bitOffset>0</bitOffset>
31447              <bitWidth>3</bitWidth>
31448              <access>read-write</access>
31449            </field>
31450          </fields>
31451        </register>
31452        <register>
31453          <name>RCR2</name>
31454          <description>SAI Receive Configuration 2 Register</description>
31455          <addressOffset>0x88</addressOffset>
31456          <size>32</size>
31457          <access>read-write</access>
31458          <resetValue>0</resetValue>
31459          <resetMask>0xFFFFFFFF</resetMask>
31460          <fields>
31461            <field>
31462              <name>DIV</name>
31463              <description>Bit Clock Divide</description>
31464              <bitOffset>0</bitOffset>
31465              <bitWidth>8</bitWidth>
31466              <access>read-write</access>
31467            </field>
31468            <field>
31469              <name>BCD</name>
31470              <description>Bit Clock Direction</description>
31471              <bitOffset>24</bitOffset>
31472              <bitWidth>1</bitWidth>
31473              <access>read-write</access>
31474              <enumeratedValues>
31475                <enumeratedValue>
31476                  <name>0</name>
31477                  <description>Bit clock is generated externally in Slave mode.</description>
31478                  <value>#0</value>
31479                </enumeratedValue>
31480                <enumeratedValue>
31481                  <name>1</name>
31482                  <description>Bit clock is generated internally in Master mode.</description>
31483                  <value>#1</value>
31484                </enumeratedValue>
31485              </enumeratedValues>
31486            </field>
31487            <field>
31488              <name>BCP</name>
31489              <description>Bit Clock Polarity</description>
31490              <bitOffset>25</bitOffset>
31491              <bitWidth>1</bitWidth>
31492              <access>read-write</access>
31493              <enumeratedValues>
31494                <enumeratedValue>
31495                  <name>0</name>
31496                  <description>Bit Clock is active high with drive outputs on rising edge and sample inputs on falling edge.</description>
31497                  <value>#0</value>
31498                </enumeratedValue>
31499                <enumeratedValue>
31500                  <name>1</name>
31501                  <description>Bit Clock is active low with drive outputs on falling edge and sample inputs on rising edge.</description>
31502                  <value>#1</value>
31503                </enumeratedValue>
31504              </enumeratedValues>
31505            </field>
31506            <field>
31507              <name>MSEL</name>
31508              <description>MCLK Select</description>
31509              <bitOffset>26</bitOffset>
31510              <bitWidth>2</bitWidth>
31511              <access>read-write</access>
31512              <enumeratedValues>
31513                <enumeratedValue>
31514                  <name>00</name>
31515                  <description>Bus Clock selected.</description>
31516                  <value>#00</value>
31517                </enumeratedValue>
31518                <enumeratedValue>
31519                  <name>01</name>
31520                  <description>Master Clock (MCLK) 1 option selected.</description>
31521                  <value>#01</value>
31522                </enumeratedValue>
31523                <enumeratedValue>
31524                  <name>10</name>
31525                  <description>Master Clock (MCLK) 2 option selected.</description>
31526                  <value>#10</value>
31527                </enumeratedValue>
31528                <enumeratedValue>
31529                  <name>11</name>
31530                  <description>Master Clock (MCLK) 3 option selected.</description>
31531                  <value>#11</value>
31532                </enumeratedValue>
31533              </enumeratedValues>
31534            </field>
31535            <field>
31536              <name>BCI</name>
31537              <description>Bit Clock Input</description>
31538              <bitOffset>28</bitOffset>
31539              <bitWidth>1</bitWidth>
31540              <access>read-write</access>
31541              <enumeratedValues>
31542                <enumeratedValue>
31543                  <name>0</name>
31544                  <description>No effect.</description>
31545                  <value>#0</value>
31546                </enumeratedValue>
31547                <enumeratedValue>
31548                  <name>1</name>
31549                  <description>Internal logic is clocked as if bit clock was externally generated.</description>
31550                  <value>#1</value>
31551                </enumeratedValue>
31552              </enumeratedValues>
31553            </field>
31554            <field>
31555              <name>BCS</name>
31556              <description>Bit Clock Swap</description>
31557              <bitOffset>29</bitOffset>
31558              <bitWidth>1</bitWidth>
31559              <access>read-write</access>
31560              <enumeratedValues>
31561                <enumeratedValue>
31562                  <name>0</name>
31563                  <description>Use the normal bit clock source.</description>
31564                  <value>#0</value>
31565                </enumeratedValue>
31566                <enumeratedValue>
31567                  <name>1</name>
31568                  <description>Swap the bit clock source.</description>
31569                  <value>#1</value>
31570                </enumeratedValue>
31571              </enumeratedValues>
31572            </field>
31573            <field>
31574              <name>SYNC</name>
31575              <description>Synchronous Mode</description>
31576              <bitOffset>30</bitOffset>
31577              <bitWidth>2</bitWidth>
31578              <access>read-write</access>
31579              <enumeratedValues>
31580                <enumeratedValue>
31581                  <name>00</name>
31582                  <description>Asynchronous mode.</description>
31583                  <value>#00</value>
31584                </enumeratedValue>
31585                <enumeratedValue>
31586                  <name>01</name>
31587                  <description>Synchronous with transmitter.</description>
31588                  <value>#01</value>
31589                </enumeratedValue>
31590                <enumeratedValue>
31591                  <name>10</name>
31592                  <description>Synchronous with another SAI receiver.</description>
31593                  <value>#10</value>
31594                </enumeratedValue>
31595                <enumeratedValue>
31596                  <name>11</name>
31597                  <description>Synchronous with another SAI transmitter.</description>
31598                  <value>#11</value>
31599                </enumeratedValue>
31600              </enumeratedValues>
31601            </field>
31602          </fields>
31603        </register>
31604        <register>
31605          <name>RCR3</name>
31606          <description>SAI Receive Configuration 3 Register</description>
31607          <addressOffset>0x8C</addressOffset>
31608          <size>32</size>
31609          <access>read-write</access>
31610          <resetValue>0</resetValue>
31611          <resetMask>0xFFFFFFFF</resetMask>
31612          <fields>
31613            <field>
31614              <name>WDFL</name>
31615              <description>Word Flag Configuration</description>
31616              <bitOffset>0</bitOffset>
31617              <bitWidth>5</bitWidth>
31618              <access>read-write</access>
31619            </field>
31620            <field>
31621              <name>RCE0</name>
31622              <description>Receive Channel Enable</description>
31623              <bitOffset>16</bitOffset>
31624              <bitWidth>1</bitWidth>
31625              <access>read-write</access>
31626              <enumeratedValues>
31627                <enumeratedValue>
31628                  <name>0</name>
31629                  <description>Receive data channel N is disabled.</description>
31630                  <value>#00</value>
31631                </enumeratedValue>
31632                <enumeratedValue>
31633                  <name>1</name>
31634                  <description>Receive data channel N is enabled.</description>
31635                  <value>#01</value>
31636                </enumeratedValue>
31637              </enumeratedValues>
31638            </field>
31639            <field>
31640              <name>RCE1</name>
31641              <description>Receive Channel Enable</description>
31642              <bitOffset>17</bitOffset>
31643              <bitWidth>1</bitWidth>
31644              <access>read-write</access>
31645              <enumeratedValues>
31646                <enumeratedValue>
31647                  <name>0</name>
31648                  <description>Receive data channel N is disabled.</description>
31649                  <value>#00</value>
31650                </enumeratedValue>
31651                <enumeratedValue>
31652                  <name>1</name>
31653                  <description>Receive data channel N is enabled.</description>
31654                  <value>#01</value>
31655                </enumeratedValue>
31656              </enumeratedValues>
31657            </field>
31658            <field>
31659              <name>CFR0</name>
31660              <description>Channel FIFO Reset</description>
31661              <bitOffset>24</bitOffset>
31662              <bitWidth>1</bitWidth>
31663              <access>write-only</access>
31664              <enumeratedValues>
31665                <enumeratedValue>
31666                  <name>0</name>
31667                  <description>No effect.</description>
31668                  <value>#00</value>
31669                </enumeratedValue>
31670                <enumeratedValue>
31671                  <name>1</name>
31672                  <description>Receive data channel N FIFO is reset.</description>
31673                  <value>#01</value>
31674                </enumeratedValue>
31675              </enumeratedValues>
31676            </field>
31677            <field>
31678              <name>CFR1</name>
31679              <description>Channel FIFO Reset</description>
31680              <bitOffset>25</bitOffset>
31681              <bitWidth>1</bitWidth>
31682              <access>write-only</access>
31683              <enumeratedValues>
31684                <enumeratedValue>
31685                  <name>0</name>
31686                  <description>No effect.</description>
31687                  <value>#00</value>
31688                </enumeratedValue>
31689                <enumeratedValue>
31690                  <name>1</name>
31691                  <description>Receive data channel N FIFO is reset.</description>
31692                  <value>#01</value>
31693                </enumeratedValue>
31694              </enumeratedValues>
31695            </field>
31696          </fields>
31697        </register>
31698        <register>
31699          <name>RCR4</name>
31700          <description>SAI Receive Configuration 4 Register</description>
31701          <addressOffset>0x90</addressOffset>
31702          <size>32</size>
31703          <access>read-write</access>
31704          <resetValue>0</resetValue>
31705          <resetMask>0xFFFFFFFF</resetMask>
31706          <fields>
31707            <field>
31708              <name>FSD</name>
31709              <description>Frame Sync Direction</description>
31710              <bitOffset>0</bitOffset>
31711              <bitWidth>1</bitWidth>
31712              <access>read-write</access>
31713              <enumeratedValues>
31714                <enumeratedValue>
31715                  <name>0</name>
31716                  <description>Frame Sync is generated externally in Slave mode.</description>
31717                  <value>#0</value>
31718                </enumeratedValue>
31719                <enumeratedValue>
31720                  <name>1</name>
31721                  <description>Frame Sync is generated internally in Master mode.</description>
31722                  <value>#1</value>
31723                </enumeratedValue>
31724              </enumeratedValues>
31725            </field>
31726            <field>
31727              <name>FSP</name>
31728              <description>Frame Sync Polarity</description>
31729              <bitOffset>1</bitOffset>
31730              <bitWidth>1</bitWidth>
31731              <access>read-write</access>
31732              <enumeratedValues>
31733                <enumeratedValue>
31734                  <name>0</name>
31735                  <description>Frame sync is active high.</description>
31736                  <value>#0</value>
31737                </enumeratedValue>
31738                <enumeratedValue>
31739                  <name>1</name>
31740                  <description>Frame sync is active low.</description>
31741                  <value>#1</value>
31742                </enumeratedValue>
31743              </enumeratedValues>
31744            </field>
31745            <field>
31746              <name>ONDEM</name>
31747              <description>On Demand Mode</description>
31748              <bitOffset>2</bitOffset>
31749              <bitWidth>1</bitWidth>
31750              <access>read-write</access>
31751              <enumeratedValues>
31752                <enumeratedValue>
31753                  <name>0</name>
31754                  <description>Internal frame sync is generated continuously.</description>
31755                  <value>#0</value>
31756                </enumeratedValue>
31757                <enumeratedValue>
31758                  <name>1</name>
31759                  <description>Internal frame sync is generated when the FIFO warning flag is clear.</description>
31760                  <value>#1</value>
31761                </enumeratedValue>
31762              </enumeratedValues>
31763            </field>
31764            <field>
31765              <name>FSE</name>
31766              <description>Frame Sync Early</description>
31767              <bitOffset>3</bitOffset>
31768              <bitWidth>1</bitWidth>
31769              <access>read-write</access>
31770              <enumeratedValues>
31771                <enumeratedValue>
31772                  <name>0</name>
31773                  <description>Frame sync asserts with the first bit of the frame.</description>
31774                  <value>#0</value>
31775                </enumeratedValue>
31776                <enumeratedValue>
31777                  <name>1</name>
31778                  <description>Frame sync asserts one bit before the first bit of the frame.</description>
31779                  <value>#1</value>
31780                </enumeratedValue>
31781              </enumeratedValues>
31782            </field>
31783            <field>
31784              <name>MF</name>
31785              <description>MSB First</description>
31786              <bitOffset>4</bitOffset>
31787              <bitWidth>1</bitWidth>
31788              <access>read-write</access>
31789              <enumeratedValues>
31790                <enumeratedValue>
31791                  <name>0</name>
31792                  <description>LSB is received first.</description>
31793                  <value>#0</value>
31794                </enumeratedValue>
31795                <enumeratedValue>
31796                  <name>1</name>
31797                  <description>MSB is received first.</description>
31798                  <value>#1</value>
31799                </enumeratedValue>
31800              </enumeratedValues>
31801            </field>
31802            <field>
31803              <name>SYWD</name>
31804              <description>Sync Width</description>
31805              <bitOffset>8</bitOffset>
31806              <bitWidth>5</bitWidth>
31807              <access>read-write</access>
31808            </field>
31809            <field>
31810              <name>FRSZ</name>
31811              <description>Frame Size</description>
31812              <bitOffset>16</bitOffset>
31813              <bitWidth>5</bitWidth>
31814              <access>read-write</access>
31815            </field>
31816            <field>
31817              <name>FPACK</name>
31818              <description>FIFO Packing Mode</description>
31819              <bitOffset>24</bitOffset>
31820              <bitWidth>2</bitWidth>
31821              <access>read-write</access>
31822              <enumeratedValues>
31823                <enumeratedValue>
31824                  <name>00</name>
31825                  <description>FIFO packing is disabled</description>
31826                  <value>#00</value>
31827                </enumeratedValue>
31828                <enumeratedValue>
31829                  <name>10</name>
31830                  <description>8-bit FIFO packing is enabled</description>
31831                  <value>#10</value>
31832                </enumeratedValue>
31833                <enumeratedValue>
31834                  <name>11</name>
31835                  <description>16-bit FIFO packing is enabled</description>
31836                  <value>#11</value>
31837                </enumeratedValue>
31838              </enumeratedValues>
31839            </field>
31840            <field>
31841              <name>FCOMB</name>
31842              <description>FIFO Combine Mode</description>
31843              <bitOffset>26</bitOffset>
31844              <bitWidth>2</bitWidth>
31845              <access>read-write</access>
31846              <enumeratedValues>
31847                <enumeratedValue>
31848                  <name>00</name>
31849                  <description>FIFO combine mode disabled.</description>
31850                  <value>#00</value>
31851                </enumeratedValue>
31852                <enumeratedValue>
31853                  <name>01</name>
31854                  <description>FIFO combine mode enabled on FIFO writes (from receive shift registers).</description>
31855                  <value>#01</value>
31856                </enumeratedValue>
31857                <enumeratedValue>
31858                  <name>10</name>
31859                  <description>FIFO combine mode enabled on FIFO reads (by software).</description>
31860                  <value>#10</value>
31861                </enumeratedValue>
31862                <enumeratedValue>
31863                  <name>11</name>
31864                  <description>FIFO combine mode enabled on FIFO writes (from receive shift registers) and reads (by software).</description>
31865                  <value>#11</value>
31866                </enumeratedValue>
31867              </enumeratedValues>
31868            </field>
31869            <field>
31870              <name>FCONT</name>
31871              <description>FIFO Continue on Error</description>
31872              <bitOffset>28</bitOffset>
31873              <bitWidth>1</bitWidth>
31874              <access>read-write</access>
31875              <enumeratedValues>
31876                <enumeratedValue>
31877                  <name>0</name>
31878                  <description>On FIFO error, the SAI will continue from the start of the next frame after the FIFO error flag has been cleared.</description>
31879                  <value>#0</value>
31880                </enumeratedValue>
31881                <enumeratedValue>
31882                  <name>1</name>
31883                  <description>On FIFO error, the SAI will continue from the same word that caused the FIFO error to set after the FIFO warning flag has been cleared.</description>
31884                  <value>#1</value>
31885                </enumeratedValue>
31886              </enumeratedValues>
31887            </field>
31888          </fields>
31889        </register>
31890        <register>
31891          <name>RCR5</name>
31892          <description>SAI Receive Configuration 5 Register</description>
31893          <addressOffset>0x94</addressOffset>
31894          <size>32</size>
31895          <access>read-write</access>
31896          <resetValue>0</resetValue>
31897          <resetMask>0xFFFFFFFF</resetMask>
31898          <fields>
31899            <field>
31900              <name>FBT</name>
31901              <description>First Bit Shifted</description>
31902              <bitOffset>8</bitOffset>
31903              <bitWidth>5</bitWidth>
31904              <access>read-write</access>
31905            </field>
31906            <field>
31907              <name>W0W</name>
31908              <description>Word 0 Width</description>
31909              <bitOffset>16</bitOffset>
31910              <bitWidth>5</bitWidth>
31911              <access>read-write</access>
31912            </field>
31913            <field>
31914              <name>WNW</name>
31915              <description>Word N Width</description>
31916              <bitOffset>24</bitOffset>
31917              <bitWidth>5</bitWidth>
31918              <access>read-write</access>
31919            </field>
31920          </fields>
31921        </register>
31922        <register>
31923          <dim>2</dim>
31924          <dimIncrement>0x4</dimIncrement>
31925          <dimIndex>0,1</dimIndex>
31926          <name>RDR%s</name>
31927          <description>SAI Receive Data Register</description>
31928          <addressOffset>0xA0</addressOffset>
31929          <size>32</size>
31930          <access>read-only</access>
31931          <resetValue>0</resetValue>
31932          <resetMask>0xFFFFFFFF</resetMask>
31933          <fields>
31934            <field>
31935              <name>RDR</name>
31936              <description>Receive Data Register</description>
31937              <bitOffset>0</bitOffset>
31938              <bitWidth>32</bitWidth>
31939              <access>read-only</access>
31940            </field>
31941          </fields>
31942        </register>
31943        <register>
31944          <dim>2</dim>
31945          <dimIncrement>0x4</dimIncrement>
31946          <dimIndex>0,1</dimIndex>
31947          <name>RFR%s</name>
31948          <description>SAI Receive FIFO Register</description>
31949          <addressOffset>0xC0</addressOffset>
31950          <size>32</size>
31951          <access>read-only</access>
31952          <resetValue>0</resetValue>
31953          <resetMask>0xFFFFFFFF</resetMask>
31954          <fields>
31955            <field>
31956              <name>RFP</name>
31957              <description>Read FIFO Pointer</description>
31958              <bitOffset>0</bitOffset>
31959              <bitWidth>4</bitWidth>
31960              <access>read-only</access>
31961            </field>
31962            <field>
31963              <name>RCP</name>
31964              <description>Receive Channel Pointer</description>
31965              <bitOffset>15</bitOffset>
31966              <bitWidth>1</bitWidth>
31967              <access>read-only</access>
31968              <enumeratedValues>
31969                <enumeratedValue>
31970                  <name>0</name>
31971                  <description>No effect.</description>
31972                  <value>#0</value>
31973                </enumeratedValue>
31974                <enumeratedValue>
31975                  <name>1</name>
31976                  <description>FIFO combine is enabled for FIFO reads and this FIFO will be read on the next FIFO read.</description>
31977                  <value>#1</value>
31978                </enumeratedValue>
31979              </enumeratedValues>
31980            </field>
31981            <field>
31982              <name>WFP</name>
31983              <description>Write FIFO Pointer</description>
31984              <bitOffset>16</bitOffset>
31985              <bitWidth>4</bitWidth>
31986              <access>read-only</access>
31987            </field>
31988          </fields>
31989        </register>
31990        <register>
31991          <name>RMR</name>
31992          <description>SAI Receive Mask Register</description>
31993          <addressOffset>0xE0</addressOffset>
31994          <size>32</size>
31995          <access>read-write</access>
31996          <resetValue>0</resetValue>
31997          <resetMask>0xFFFFFFFF</resetMask>
31998          <fields>
31999            <field>
32000              <name>RWM0</name>
32001              <description>Receive Word Mask</description>
32002              <bitOffset>0</bitOffset>
32003              <bitWidth>1</bitWidth>
32004              <access>read-write</access>
32005              <enumeratedValues>
32006                <enumeratedValue>
32007                  <name>0</name>
32008                  <description>Word N is enabled.</description>
32009                  <value>#0</value>
32010                </enumeratedValue>
32011                <enumeratedValue>
32012                  <name>1</name>
32013                  <description>Word N is masked.</description>
32014                  <value>#1</value>
32015                </enumeratedValue>
32016              </enumeratedValues>
32017            </field>
32018            <field>
32019              <name>RWM1</name>
32020              <description>Receive Word Mask</description>
32021              <bitOffset>1</bitOffset>
32022              <bitWidth>1</bitWidth>
32023              <access>read-write</access>
32024              <enumeratedValues>
32025                <enumeratedValue>
32026                  <name>0</name>
32027                  <description>Word N is enabled.</description>
32028                  <value>#0</value>
32029                </enumeratedValue>
32030                <enumeratedValue>
32031                  <name>1</name>
32032                  <description>Word N is masked.</description>
32033                  <value>#1</value>
32034                </enumeratedValue>
32035              </enumeratedValues>
32036            </field>
32037            <field>
32038              <name>RWM2</name>
32039              <description>Receive Word Mask</description>
32040              <bitOffset>2</bitOffset>
32041              <bitWidth>1</bitWidth>
32042              <access>read-write</access>
32043              <enumeratedValues>
32044                <enumeratedValue>
32045                  <name>0</name>
32046                  <description>Word N is enabled.</description>
32047                  <value>#0</value>
32048                </enumeratedValue>
32049                <enumeratedValue>
32050                  <name>1</name>
32051                  <description>Word N is masked.</description>
32052                  <value>#1</value>
32053                </enumeratedValue>
32054              </enumeratedValues>
32055            </field>
32056            <field>
32057              <name>RWM3</name>
32058              <description>Receive Word Mask</description>
32059              <bitOffset>3</bitOffset>
32060              <bitWidth>1</bitWidth>
32061              <access>read-write</access>
32062              <enumeratedValues>
32063                <enumeratedValue>
32064                  <name>0</name>
32065                  <description>Word N is enabled.</description>
32066                  <value>#0</value>
32067                </enumeratedValue>
32068                <enumeratedValue>
32069                  <name>1</name>
32070                  <description>Word N is masked.</description>
32071                  <value>#1</value>
32072                </enumeratedValue>
32073              </enumeratedValues>
32074            </field>
32075            <field>
32076              <name>RWM4</name>
32077              <description>Receive Word Mask</description>
32078              <bitOffset>4</bitOffset>
32079              <bitWidth>1</bitWidth>
32080              <access>read-write</access>
32081              <enumeratedValues>
32082                <enumeratedValue>
32083                  <name>0</name>
32084                  <description>Word N is enabled.</description>
32085                  <value>#0</value>
32086                </enumeratedValue>
32087                <enumeratedValue>
32088                  <name>1</name>
32089                  <description>Word N is masked.</description>
32090                  <value>#1</value>
32091                </enumeratedValue>
32092              </enumeratedValues>
32093            </field>
32094            <field>
32095              <name>RWM5</name>
32096              <description>Receive Word Mask</description>
32097              <bitOffset>5</bitOffset>
32098              <bitWidth>1</bitWidth>
32099              <access>read-write</access>
32100              <enumeratedValues>
32101                <enumeratedValue>
32102                  <name>0</name>
32103                  <description>Word N is enabled.</description>
32104                  <value>#0</value>
32105                </enumeratedValue>
32106                <enumeratedValue>
32107                  <name>1</name>
32108                  <description>Word N is masked.</description>
32109                  <value>#1</value>
32110                </enumeratedValue>
32111              </enumeratedValues>
32112            </field>
32113            <field>
32114              <name>RWM6</name>
32115              <description>Receive Word Mask</description>
32116              <bitOffset>6</bitOffset>
32117              <bitWidth>1</bitWidth>
32118              <access>read-write</access>
32119              <enumeratedValues>
32120                <enumeratedValue>
32121                  <name>0</name>
32122                  <description>Word N is enabled.</description>
32123                  <value>#0</value>
32124                </enumeratedValue>
32125                <enumeratedValue>
32126                  <name>1</name>
32127                  <description>Word N is masked.</description>
32128                  <value>#1</value>
32129                </enumeratedValue>
32130              </enumeratedValues>
32131            </field>
32132            <field>
32133              <name>RWM7</name>
32134              <description>Receive Word Mask</description>
32135              <bitOffset>7</bitOffset>
32136              <bitWidth>1</bitWidth>
32137              <access>read-write</access>
32138              <enumeratedValues>
32139                <enumeratedValue>
32140                  <name>0</name>
32141                  <description>Word N is enabled.</description>
32142                  <value>#0</value>
32143                </enumeratedValue>
32144                <enumeratedValue>
32145                  <name>1</name>
32146                  <description>Word N is masked.</description>
32147                  <value>#1</value>
32148                </enumeratedValue>
32149              </enumeratedValues>
32150            </field>
32151            <field>
32152              <name>RWM8</name>
32153              <description>Receive Word Mask</description>
32154              <bitOffset>8</bitOffset>
32155              <bitWidth>1</bitWidth>
32156              <access>read-write</access>
32157              <enumeratedValues>
32158                <enumeratedValue>
32159                  <name>0</name>
32160                  <description>Word N is enabled.</description>
32161                  <value>#0</value>
32162                </enumeratedValue>
32163                <enumeratedValue>
32164                  <name>1</name>
32165                  <description>Word N is masked.</description>
32166                  <value>#1</value>
32167                </enumeratedValue>
32168              </enumeratedValues>
32169            </field>
32170            <field>
32171              <name>RWM9</name>
32172              <description>Receive Word Mask</description>
32173              <bitOffset>9</bitOffset>
32174              <bitWidth>1</bitWidth>
32175              <access>read-write</access>
32176              <enumeratedValues>
32177                <enumeratedValue>
32178                  <name>0</name>
32179                  <description>Word N is enabled.</description>
32180                  <value>#0</value>
32181                </enumeratedValue>
32182                <enumeratedValue>
32183                  <name>1</name>
32184                  <description>Word N is masked.</description>
32185                  <value>#1</value>
32186                </enumeratedValue>
32187              </enumeratedValues>
32188            </field>
32189            <field>
32190              <name>RWM10</name>
32191              <description>Receive Word Mask</description>
32192              <bitOffset>10</bitOffset>
32193              <bitWidth>1</bitWidth>
32194              <access>read-write</access>
32195              <enumeratedValues>
32196                <enumeratedValue>
32197                  <name>0</name>
32198                  <description>Word N is enabled.</description>
32199                  <value>#0</value>
32200                </enumeratedValue>
32201                <enumeratedValue>
32202                  <name>1</name>
32203                  <description>Word N is masked.</description>
32204                  <value>#1</value>
32205                </enumeratedValue>
32206              </enumeratedValues>
32207            </field>
32208            <field>
32209              <name>RWM11</name>
32210              <description>Receive Word Mask</description>
32211              <bitOffset>11</bitOffset>
32212              <bitWidth>1</bitWidth>
32213              <access>read-write</access>
32214              <enumeratedValues>
32215                <enumeratedValue>
32216                  <name>0</name>
32217                  <description>Word N is enabled.</description>
32218                  <value>#0</value>
32219                </enumeratedValue>
32220                <enumeratedValue>
32221                  <name>1</name>
32222                  <description>Word N is masked.</description>
32223                  <value>#1</value>
32224                </enumeratedValue>
32225              </enumeratedValues>
32226            </field>
32227            <field>
32228              <name>RWM12</name>
32229              <description>Receive Word Mask</description>
32230              <bitOffset>12</bitOffset>
32231              <bitWidth>1</bitWidth>
32232              <access>read-write</access>
32233              <enumeratedValues>
32234                <enumeratedValue>
32235                  <name>0</name>
32236                  <description>Word N is enabled.</description>
32237                  <value>#0</value>
32238                </enumeratedValue>
32239                <enumeratedValue>
32240                  <name>1</name>
32241                  <description>Word N is masked.</description>
32242                  <value>#1</value>
32243                </enumeratedValue>
32244              </enumeratedValues>
32245            </field>
32246            <field>
32247              <name>RWM13</name>
32248              <description>Receive Word Mask</description>
32249              <bitOffset>13</bitOffset>
32250              <bitWidth>1</bitWidth>
32251              <access>read-write</access>
32252              <enumeratedValues>
32253                <enumeratedValue>
32254                  <name>0</name>
32255                  <description>Word N is enabled.</description>
32256                  <value>#0</value>
32257                </enumeratedValue>
32258                <enumeratedValue>
32259                  <name>1</name>
32260                  <description>Word N is masked.</description>
32261                  <value>#1</value>
32262                </enumeratedValue>
32263              </enumeratedValues>
32264            </field>
32265            <field>
32266              <name>RWM14</name>
32267              <description>Receive Word Mask</description>
32268              <bitOffset>14</bitOffset>
32269              <bitWidth>1</bitWidth>
32270              <access>read-write</access>
32271              <enumeratedValues>
32272                <enumeratedValue>
32273                  <name>0</name>
32274                  <description>Word N is enabled.</description>
32275                  <value>#0</value>
32276                </enumeratedValue>
32277                <enumeratedValue>
32278                  <name>1</name>
32279                  <description>Word N is masked.</description>
32280                  <value>#1</value>
32281                </enumeratedValue>
32282              </enumeratedValues>
32283            </field>
32284            <field>
32285              <name>RWM15</name>
32286              <description>Receive Word Mask</description>
32287              <bitOffset>15</bitOffset>
32288              <bitWidth>1</bitWidth>
32289              <access>read-write</access>
32290              <enumeratedValues>
32291                <enumeratedValue>
32292                  <name>0</name>
32293                  <description>Word N is enabled.</description>
32294                  <value>#0</value>
32295                </enumeratedValue>
32296                <enumeratedValue>
32297                  <name>1</name>
32298                  <description>Word N is masked.</description>
32299                  <value>#1</value>
32300                </enumeratedValue>
32301              </enumeratedValues>
32302            </field>
32303            <field>
32304              <name>RWM16</name>
32305              <description>Receive Word Mask</description>
32306              <bitOffset>16</bitOffset>
32307              <bitWidth>1</bitWidth>
32308              <access>read-write</access>
32309              <enumeratedValues>
32310                <enumeratedValue>
32311                  <name>0</name>
32312                  <description>Word N is enabled.</description>
32313                  <value>#0</value>
32314                </enumeratedValue>
32315                <enumeratedValue>
32316                  <name>1</name>
32317                  <description>Word N is masked.</description>
32318                  <value>#1</value>
32319                </enumeratedValue>
32320              </enumeratedValues>
32321            </field>
32322            <field>
32323              <name>RWM17</name>
32324              <description>Receive Word Mask</description>
32325              <bitOffset>17</bitOffset>
32326              <bitWidth>1</bitWidth>
32327              <access>read-write</access>
32328              <enumeratedValues>
32329                <enumeratedValue>
32330                  <name>0</name>
32331                  <description>Word N is enabled.</description>
32332                  <value>#0</value>
32333                </enumeratedValue>
32334                <enumeratedValue>
32335                  <name>1</name>
32336                  <description>Word N is masked.</description>
32337                  <value>#1</value>
32338                </enumeratedValue>
32339              </enumeratedValues>
32340            </field>
32341            <field>
32342              <name>RWM18</name>
32343              <description>Receive Word Mask</description>
32344              <bitOffset>18</bitOffset>
32345              <bitWidth>1</bitWidth>
32346              <access>read-write</access>
32347              <enumeratedValues>
32348                <enumeratedValue>
32349                  <name>0</name>
32350                  <description>Word N is enabled.</description>
32351                  <value>#0</value>
32352                </enumeratedValue>
32353                <enumeratedValue>
32354                  <name>1</name>
32355                  <description>Word N is masked.</description>
32356                  <value>#1</value>
32357                </enumeratedValue>
32358              </enumeratedValues>
32359            </field>
32360            <field>
32361              <name>RWM19</name>
32362              <description>Receive Word Mask</description>
32363              <bitOffset>19</bitOffset>
32364              <bitWidth>1</bitWidth>
32365              <access>read-write</access>
32366              <enumeratedValues>
32367                <enumeratedValue>
32368                  <name>0</name>
32369                  <description>Word N is enabled.</description>
32370                  <value>#0</value>
32371                </enumeratedValue>
32372                <enumeratedValue>
32373                  <name>1</name>
32374                  <description>Word N is masked.</description>
32375                  <value>#1</value>
32376                </enumeratedValue>
32377              </enumeratedValues>
32378            </field>
32379            <field>
32380              <name>RWM20</name>
32381              <description>Receive Word Mask</description>
32382              <bitOffset>20</bitOffset>
32383              <bitWidth>1</bitWidth>
32384              <access>read-write</access>
32385              <enumeratedValues>
32386                <enumeratedValue>
32387                  <name>0</name>
32388                  <description>Word N is enabled.</description>
32389                  <value>#0</value>
32390                </enumeratedValue>
32391                <enumeratedValue>
32392                  <name>1</name>
32393                  <description>Word N is masked.</description>
32394                  <value>#1</value>
32395                </enumeratedValue>
32396              </enumeratedValues>
32397            </field>
32398            <field>
32399              <name>RWM21</name>
32400              <description>Receive Word Mask</description>
32401              <bitOffset>21</bitOffset>
32402              <bitWidth>1</bitWidth>
32403              <access>read-write</access>
32404              <enumeratedValues>
32405                <enumeratedValue>
32406                  <name>0</name>
32407                  <description>Word N is enabled.</description>
32408                  <value>#0</value>
32409                </enumeratedValue>
32410                <enumeratedValue>
32411                  <name>1</name>
32412                  <description>Word N is masked.</description>
32413                  <value>#1</value>
32414                </enumeratedValue>
32415              </enumeratedValues>
32416            </field>
32417            <field>
32418              <name>RWM22</name>
32419              <description>Receive Word Mask</description>
32420              <bitOffset>22</bitOffset>
32421              <bitWidth>1</bitWidth>
32422              <access>read-write</access>
32423              <enumeratedValues>
32424                <enumeratedValue>
32425                  <name>0</name>
32426                  <description>Word N is enabled.</description>
32427                  <value>#0</value>
32428                </enumeratedValue>
32429                <enumeratedValue>
32430                  <name>1</name>
32431                  <description>Word N is masked.</description>
32432                  <value>#1</value>
32433                </enumeratedValue>
32434              </enumeratedValues>
32435            </field>
32436            <field>
32437              <name>RWM23</name>
32438              <description>Receive Word Mask</description>
32439              <bitOffset>23</bitOffset>
32440              <bitWidth>1</bitWidth>
32441              <access>read-write</access>
32442              <enumeratedValues>
32443                <enumeratedValue>
32444                  <name>0</name>
32445                  <description>Word N is enabled.</description>
32446                  <value>#0</value>
32447                </enumeratedValue>
32448                <enumeratedValue>
32449                  <name>1</name>
32450                  <description>Word N is masked.</description>
32451                  <value>#1</value>
32452                </enumeratedValue>
32453              </enumeratedValues>
32454            </field>
32455            <field>
32456              <name>RWM24</name>
32457              <description>Receive Word Mask</description>
32458              <bitOffset>24</bitOffset>
32459              <bitWidth>1</bitWidth>
32460              <access>read-write</access>
32461              <enumeratedValues>
32462                <enumeratedValue>
32463                  <name>0</name>
32464                  <description>Word N is enabled.</description>
32465                  <value>#0</value>
32466                </enumeratedValue>
32467                <enumeratedValue>
32468                  <name>1</name>
32469                  <description>Word N is masked.</description>
32470                  <value>#1</value>
32471                </enumeratedValue>
32472              </enumeratedValues>
32473            </field>
32474            <field>
32475              <name>RWM25</name>
32476              <description>Receive Word Mask</description>
32477              <bitOffset>25</bitOffset>
32478              <bitWidth>1</bitWidth>
32479              <access>read-write</access>
32480              <enumeratedValues>
32481                <enumeratedValue>
32482                  <name>0</name>
32483                  <description>Word N is enabled.</description>
32484                  <value>#0</value>
32485                </enumeratedValue>
32486                <enumeratedValue>
32487                  <name>1</name>
32488                  <description>Word N is masked.</description>
32489                  <value>#1</value>
32490                </enumeratedValue>
32491              </enumeratedValues>
32492            </field>
32493            <field>
32494              <name>RWM26</name>
32495              <description>Receive Word Mask</description>
32496              <bitOffset>26</bitOffset>
32497              <bitWidth>1</bitWidth>
32498              <access>read-write</access>
32499              <enumeratedValues>
32500                <enumeratedValue>
32501                  <name>0</name>
32502                  <description>Word N is enabled.</description>
32503                  <value>#0</value>
32504                </enumeratedValue>
32505                <enumeratedValue>
32506                  <name>1</name>
32507                  <description>Word N is masked.</description>
32508                  <value>#1</value>
32509                </enumeratedValue>
32510              </enumeratedValues>
32511            </field>
32512            <field>
32513              <name>RWM27</name>
32514              <description>Receive Word Mask</description>
32515              <bitOffset>27</bitOffset>
32516              <bitWidth>1</bitWidth>
32517              <access>read-write</access>
32518              <enumeratedValues>
32519                <enumeratedValue>
32520                  <name>0</name>
32521                  <description>Word N is enabled.</description>
32522                  <value>#0</value>
32523                </enumeratedValue>
32524                <enumeratedValue>
32525                  <name>1</name>
32526                  <description>Word N is masked.</description>
32527                  <value>#1</value>
32528                </enumeratedValue>
32529              </enumeratedValues>
32530            </field>
32531            <field>
32532              <name>RWM28</name>
32533              <description>Receive Word Mask</description>
32534              <bitOffset>28</bitOffset>
32535              <bitWidth>1</bitWidth>
32536              <access>read-write</access>
32537              <enumeratedValues>
32538                <enumeratedValue>
32539                  <name>0</name>
32540                  <description>Word N is enabled.</description>
32541                  <value>#0</value>
32542                </enumeratedValue>
32543                <enumeratedValue>
32544                  <name>1</name>
32545                  <description>Word N is masked.</description>
32546                  <value>#1</value>
32547                </enumeratedValue>
32548              </enumeratedValues>
32549            </field>
32550            <field>
32551              <name>RWM29</name>
32552              <description>Receive Word Mask</description>
32553              <bitOffset>29</bitOffset>
32554              <bitWidth>1</bitWidth>
32555              <access>read-write</access>
32556              <enumeratedValues>
32557                <enumeratedValue>
32558                  <name>0</name>
32559                  <description>Word N is enabled.</description>
32560                  <value>#0</value>
32561                </enumeratedValue>
32562                <enumeratedValue>
32563                  <name>1</name>
32564                  <description>Word N is masked.</description>
32565                  <value>#1</value>
32566                </enumeratedValue>
32567              </enumeratedValues>
32568            </field>
32569            <field>
32570              <name>RWM30</name>
32571              <description>Receive Word Mask</description>
32572              <bitOffset>30</bitOffset>
32573              <bitWidth>1</bitWidth>
32574              <access>read-write</access>
32575              <enumeratedValues>
32576                <enumeratedValue>
32577                  <name>0</name>
32578                  <description>Word N is enabled.</description>
32579                  <value>#0</value>
32580                </enumeratedValue>
32581                <enumeratedValue>
32582                  <name>1</name>
32583                  <description>Word N is masked.</description>
32584                  <value>#1</value>
32585                </enumeratedValue>
32586              </enumeratedValues>
32587            </field>
32588            <field>
32589              <name>RWM31</name>
32590              <description>Receive Word Mask</description>
32591              <bitOffset>31</bitOffset>
32592              <bitWidth>1</bitWidth>
32593              <access>read-write</access>
32594              <enumeratedValues>
32595                <enumeratedValue>
32596                  <name>0</name>
32597                  <description>Word N is enabled.</description>
32598                  <value>#0</value>
32599                </enumeratedValue>
32600                <enumeratedValue>
32601                  <name>1</name>
32602                  <description>Word N is masked.</description>
32603                  <value>#1</value>
32604                </enumeratedValue>
32605              </enumeratedValues>
32606            </field>
32607          </fields>
32608        </register>
32609        <register>
32610          <name>MCR</name>
32611          <description>SAI MCLK Control Register</description>
32612          <addressOffset>0x100</addressOffset>
32613          <size>32</size>
32614          <access>read-write</access>
32615          <resetValue>0</resetValue>
32616          <resetMask>0xFFFFFFFF</resetMask>
32617          <fields>
32618            <field>
32619              <name>MICS</name>
32620              <description>MCLK Input Clock Select</description>
32621              <bitOffset>24</bitOffset>
32622              <bitWidth>2</bitWidth>
32623              <access>read-write</access>
32624              <enumeratedValues>
32625                <enumeratedValue>
32626                  <name>00</name>
32627                  <description>MCLK divider input clock 0 is selected.</description>
32628                  <value>#00</value>
32629                </enumeratedValue>
32630                <enumeratedValue>
32631                  <name>10</name>
32632                  <description>MCLK divider input clock 2 is selected.</description>
32633                  <value>#10</value>
32634                </enumeratedValue>
32635                <enumeratedValue>
32636                  <name>11</name>
32637                  <description>MCLK divider input clock 3 is selected.</description>
32638                  <value>#11</value>
32639                </enumeratedValue>
32640              </enumeratedValues>
32641            </field>
32642            <field>
32643              <name>MOE</name>
32644              <description>MCLK Output Enable</description>
32645              <bitOffset>30</bitOffset>
32646              <bitWidth>1</bitWidth>
32647              <access>read-write</access>
32648              <enumeratedValues>
32649                <enumeratedValue>
32650                  <name>0</name>
32651                  <description>MCLK signal pin is configured as an input that bypasses the MCLK divider.</description>
32652                  <value>#0</value>
32653                </enumeratedValue>
32654                <enumeratedValue>
32655                  <name>1</name>
32656                  <description>MCLK signal pin is configured as an output from the MCLK divider and the MCLK divider is enabled.</description>
32657                  <value>#1</value>
32658                </enumeratedValue>
32659              </enumeratedValues>
32660            </field>
32661            <field>
32662              <name>DUF</name>
32663              <description>Divider Update Flag</description>
32664              <bitOffset>31</bitOffset>
32665              <bitWidth>1</bitWidth>
32666              <access>read-only</access>
32667              <enumeratedValues>
32668                <enumeratedValue>
32669                  <name>0</name>
32670                  <description>MCLK divider ratio is not being updated currently.</description>
32671                  <value>#0</value>
32672                </enumeratedValue>
32673                <enumeratedValue>
32674                  <name>1</name>
32675                  <description>MCLK divider ratio is updating on-the-fly. Further updates to the MCLK divider ratio are blocked while this flag remains set.</description>
32676                  <value>#1</value>
32677                </enumeratedValue>
32678              </enumeratedValues>
32679            </field>
32680          </fields>
32681        </register>
32682        <register>
32683          <name>MDR</name>
32684          <description>SAI MCLK Divide Register</description>
32685          <addressOffset>0x104</addressOffset>
32686          <size>32</size>
32687          <access>read-write</access>
32688          <resetValue>0</resetValue>
32689          <resetMask>0xFFFFFFFF</resetMask>
32690          <fields>
32691            <field>
32692              <name>DIVIDE</name>
32693              <description>MCLK Divide</description>
32694              <bitOffset>0</bitOffset>
32695              <bitWidth>12</bitWidth>
32696              <access>read-write</access>
32697            </field>
32698            <field>
32699              <name>FRACT</name>
32700              <description>MCLK Fraction</description>
32701              <bitOffset>12</bitOffset>
32702              <bitWidth>8</bitWidth>
32703              <access>read-write</access>
32704            </field>
32705          </fields>
32706        </register>
32707      </registers>
32708    </peripheral>
32709    <peripheral>
32710      <name>CRC</name>
32711      <description>Cyclic Redundancy Check</description>
32712      <prependToName>CRC_</prependToName>
32713      <baseAddress>0x40032000</baseAddress>
32714      <addressBlock>
32715        <offset>0</offset>
32716        <size>0xC</size>
32717        <usage>registers</usage>
32718      </addressBlock>
32719      <registers>
32720        <register>
32721          <name>DATA</name>
32722          <description>CRC Data register</description>
32723          <alternateGroup>CRC</alternateGroup>
32724          <addressOffset>0</addressOffset>
32725          <size>32</size>
32726          <access>read-write</access>
32727          <resetValue>0xFFFFFFFF</resetValue>
32728          <resetMask>0xFFFFFFFF</resetMask>
32729          <fields>
32730            <field>
32731              <name>LL</name>
32732              <description>CRC Low Lower Byte</description>
32733              <bitOffset>0</bitOffset>
32734              <bitWidth>8</bitWidth>
32735              <access>read-write</access>
32736            </field>
32737            <field>
32738              <name>LU</name>
32739              <description>CRC Low Upper Byte</description>
32740              <bitOffset>8</bitOffset>
32741              <bitWidth>8</bitWidth>
32742              <access>read-write</access>
32743            </field>
32744            <field>
32745              <name>HL</name>
32746              <description>CRC High Lower Byte</description>
32747              <bitOffset>16</bitOffset>
32748              <bitWidth>8</bitWidth>
32749              <access>read-write</access>
32750            </field>
32751            <field>
32752              <name>HU</name>
32753              <description>CRC High Upper Byte</description>
32754              <bitOffset>24</bitOffset>
32755              <bitWidth>8</bitWidth>
32756              <access>read-write</access>
32757            </field>
32758          </fields>
32759        </register>
32760        <register>
32761          <name>DATAL</name>
32762          <description>CRC_DATAL register.</description>
32763          <alternateGroup>CRC</alternateGroup>
32764          <addressOffset>0</addressOffset>
32765          <size>16</size>
32766          <access>read-write</access>
32767          <resetValue>0xFFFF</resetValue>
32768          <resetMask>0xFFFF</resetMask>
32769          <fields>
32770            <field>
32771              <name>DATAL</name>
32772              <description>DATAL stores the lower 16 bits of the 16/32 bit CRC</description>
32773              <bitOffset>0</bitOffset>
32774              <bitWidth>16</bitWidth>
32775              <access>read-write</access>
32776            </field>
32777          </fields>
32778        </register>
32779        <register>
32780          <name>DATALL</name>
32781          <description>CRC_DATALL register.</description>
32782          <alternateGroup>CRC</alternateGroup>
32783          <addressOffset>0</addressOffset>
32784          <size>8</size>
32785          <access>read-write</access>
32786          <resetValue>0xFF</resetValue>
32787          <resetMask>0xFF</resetMask>
32788          <fields>
32789            <field>
32790              <name>DATALL</name>
32791              <description>CRCLL stores the first 8 bits of the 32 bit DATA</description>
32792              <bitOffset>0</bitOffset>
32793              <bitWidth>8</bitWidth>
32794              <access>read-write</access>
32795            </field>
32796          </fields>
32797        </register>
32798        <register>
32799          <name>DATALU</name>
32800          <description>CRC_DATALU register.</description>
32801          <addressOffset>0x1</addressOffset>
32802          <size>8</size>
32803          <access>read-write</access>
32804          <resetValue>0xFF</resetValue>
32805          <resetMask>0xFF</resetMask>
32806          <fields>
32807            <field>
32808              <name>DATALU</name>
32809              <description>DATALL stores the second 8 bits of the 32 bit CRC</description>
32810              <bitOffset>0</bitOffset>
32811              <bitWidth>8</bitWidth>
32812              <access>read-write</access>
32813            </field>
32814          </fields>
32815        </register>
32816        <register>
32817          <name>DATAH</name>
32818          <description>CRC_DATAH register.</description>
32819          <alternateGroup>CRC</alternateGroup>
32820          <addressOffset>0x2</addressOffset>
32821          <size>16</size>
32822          <access>read-write</access>
32823          <resetValue>0xFFFF</resetValue>
32824          <resetMask>0xFFFF</resetMask>
32825          <fields>
32826            <field>
32827              <name>DATAH</name>
32828              <description>DATAH stores the high 16 bits of the 16/32 bit CRC</description>
32829              <bitOffset>0</bitOffset>
32830              <bitWidth>16</bitWidth>
32831              <access>read-write</access>
32832            </field>
32833          </fields>
32834        </register>
32835        <register>
32836          <name>DATAHL</name>
32837          <description>CRC_DATAHL register.</description>
32838          <alternateGroup>CRC</alternateGroup>
32839          <addressOffset>0x2</addressOffset>
32840          <size>8</size>
32841          <access>read-write</access>
32842          <resetValue>0xFF</resetValue>
32843          <resetMask>0xFF</resetMask>
32844          <fields>
32845            <field>
32846              <name>DATAHL</name>
32847              <description>DATAHL stores the third 8 bits of the 32 bit CRC</description>
32848              <bitOffset>0</bitOffset>
32849              <bitWidth>8</bitWidth>
32850              <access>read-write</access>
32851            </field>
32852          </fields>
32853        </register>
32854        <register>
32855          <name>DATAHU</name>
32856          <description>CRC_DATAHU register.</description>
32857          <addressOffset>0x3</addressOffset>
32858          <size>8</size>
32859          <access>read-write</access>
32860          <resetValue>0xFF</resetValue>
32861          <resetMask>0xFF</resetMask>
32862          <fields>
32863            <field>
32864              <name>DATAHU</name>
32865              <description>DATAHU stores the fourth 8 bits of the 32 bit CRC</description>
32866              <bitOffset>0</bitOffset>
32867              <bitWidth>8</bitWidth>
32868              <access>read-write</access>
32869            </field>
32870          </fields>
32871        </register>
32872        <register>
32873          <name>GPOLY</name>
32874          <description>CRC Polynomial register</description>
32875          <alternateGroup>CRC</alternateGroup>
32876          <addressOffset>0x4</addressOffset>
32877          <size>32</size>
32878          <access>read-write</access>
32879          <resetValue>0x1021</resetValue>
32880          <resetMask>0xFFFFFFFF</resetMask>
32881          <fields>
32882            <field>
32883              <name>LOW</name>
32884              <description>Low Polynominal Half-word</description>
32885              <bitOffset>0</bitOffset>
32886              <bitWidth>16</bitWidth>
32887              <access>read-write</access>
32888            </field>
32889            <field>
32890              <name>HIGH</name>
32891              <description>High Polynominal Half-word</description>
32892              <bitOffset>16</bitOffset>
32893              <bitWidth>16</bitWidth>
32894              <access>read-write</access>
32895            </field>
32896          </fields>
32897        </register>
32898        <register>
32899          <name>GPOLYL</name>
32900          <description>CRC_GPOLYL register.</description>
32901          <alternateGroup>CRC</alternateGroup>
32902          <addressOffset>0x4</addressOffset>
32903          <size>16</size>
32904          <access>read-write</access>
32905          <resetValue>0xFFFF</resetValue>
32906          <resetMask>0xFFFF</resetMask>
32907          <fields>
32908            <field>
32909              <name>GPOLYL</name>
32910              <description>POLYL stores the lower 16 bits of the 16/32 bit CRC polynomial value</description>
32911              <bitOffset>0</bitOffset>
32912              <bitWidth>16</bitWidth>
32913              <access>read-write</access>
32914            </field>
32915          </fields>
32916        </register>
32917        <register>
32918          <name>GPOLYLL</name>
32919          <description>CRC_GPOLYLL register.</description>
32920          <alternateGroup>CRC</alternateGroup>
32921          <addressOffset>0x4</addressOffset>
32922          <size>8</size>
32923          <access>read-write</access>
32924          <resetValue>0xFF</resetValue>
32925          <resetMask>0xFF</resetMask>
32926          <fields>
32927            <field>
32928              <name>GPOLYLL</name>
32929              <description>POLYLL stores the first 8 bits of the 32 bit CRC</description>
32930              <bitOffset>0</bitOffset>
32931              <bitWidth>8</bitWidth>
32932              <access>read-write</access>
32933            </field>
32934          </fields>
32935        </register>
32936        <register>
32937          <name>GPOLYLU</name>
32938          <description>CRC_GPOLYLU register.</description>
32939          <addressOffset>0x5</addressOffset>
32940          <size>8</size>
32941          <access>read-write</access>
32942          <resetValue>0xFF</resetValue>
32943          <resetMask>0xFF</resetMask>
32944          <fields>
32945            <field>
32946              <name>GPOLYLU</name>
32947              <description>POLYLL stores the second 8 bits of the 32 bit CRC</description>
32948              <bitOffset>0</bitOffset>
32949              <bitWidth>8</bitWidth>
32950              <access>read-write</access>
32951            </field>
32952          </fields>
32953        </register>
32954        <register>
32955          <name>GPOLYH</name>
32956          <description>CRC_GPOLYH register.</description>
32957          <alternateGroup>CRC</alternateGroup>
32958          <addressOffset>0x6</addressOffset>
32959          <size>16</size>
32960          <access>read-write</access>
32961          <resetValue>0xFFFF</resetValue>
32962          <resetMask>0xFFFF</resetMask>
32963          <fields>
32964            <field>
32965              <name>GPOLYH</name>
32966              <description>POLYH stores the high 16 bits of the 16/32 bit CRC polynomial value</description>
32967              <bitOffset>0</bitOffset>
32968              <bitWidth>16</bitWidth>
32969              <access>read-write</access>
32970            </field>
32971          </fields>
32972        </register>
32973        <register>
32974          <name>GPOLYHL</name>
32975          <description>CRC_GPOLYHL register.</description>
32976          <alternateGroup>CRC</alternateGroup>
32977          <addressOffset>0x6</addressOffset>
32978          <size>8</size>
32979          <access>read-write</access>
32980          <resetValue>0xFF</resetValue>
32981          <resetMask>0xFF</resetMask>
32982          <fields>
32983            <field>
32984              <name>GPOLYHL</name>
32985              <description>POLYHL stores the third 8 bits of the 32 bit CRC</description>
32986              <bitOffset>0</bitOffset>
32987              <bitWidth>8</bitWidth>
32988              <access>read-write</access>
32989            </field>
32990          </fields>
32991        </register>
32992        <register>
32993          <name>GPOLYHU</name>
32994          <description>CRC_GPOLYHU register.</description>
32995          <addressOffset>0x7</addressOffset>
32996          <size>8</size>
32997          <access>read-write</access>
32998          <resetValue>0xFF</resetValue>
32999          <resetMask>0xFF</resetMask>
33000          <fields>
33001            <field>
33002              <name>GPOLYHU</name>
33003              <description>POLYHU stores the fourth 8 bits of the 32 bit CRC</description>
33004              <bitOffset>0</bitOffset>
33005              <bitWidth>8</bitWidth>
33006              <access>read-write</access>
33007            </field>
33008          </fields>
33009        </register>
33010        <register>
33011          <name>CTRL</name>
33012          <description>CRC Control register</description>
33013          <addressOffset>0x8</addressOffset>
33014          <size>32</size>
33015          <access>read-write</access>
33016          <resetValue>0</resetValue>
33017          <resetMask>0xFFFFFFFF</resetMask>
33018          <fields>
33019            <field>
33020              <name>TCRC</name>
33021              <description>Width of CRC protocol.</description>
33022              <bitOffset>24</bitOffset>
33023              <bitWidth>1</bitWidth>
33024              <access>read-write</access>
33025              <enumeratedValues>
33026                <enumeratedValue>
33027                  <name>0</name>
33028                  <description>16-bit CRC protocol.</description>
33029                  <value>#0</value>
33030                </enumeratedValue>
33031                <enumeratedValue>
33032                  <name>1</name>
33033                  <description>32-bit CRC protocol.</description>
33034                  <value>#1</value>
33035                </enumeratedValue>
33036              </enumeratedValues>
33037            </field>
33038            <field>
33039              <name>WAS</name>
33040              <description>Write CRC Data Register As Seed</description>
33041              <bitOffset>25</bitOffset>
33042              <bitWidth>1</bitWidth>
33043              <access>read-write</access>
33044              <enumeratedValues>
33045                <enumeratedValue>
33046                  <name>0</name>
33047                  <description>Writes to the CRC data register are data values.</description>
33048                  <value>#0</value>
33049                </enumeratedValue>
33050                <enumeratedValue>
33051                  <name>1</name>
33052                  <description>Writes to the CRC data register are seed values.</description>
33053                  <value>#1</value>
33054                </enumeratedValue>
33055              </enumeratedValues>
33056            </field>
33057            <field>
33058              <name>FXOR</name>
33059              <description>Complement Read Of CRC Data Register</description>
33060              <bitOffset>26</bitOffset>
33061              <bitWidth>1</bitWidth>
33062              <access>read-write</access>
33063              <enumeratedValues>
33064                <enumeratedValue>
33065                  <name>0</name>
33066                  <description>No XOR on reading.</description>
33067                  <value>#0</value>
33068                </enumeratedValue>
33069                <enumeratedValue>
33070                  <name>1</name>
33071                  <description>Invert or complement the read value of the CRC Data register.</description>
33072                  <value>#1</value>
33073                </enumeratedValue>
33074              </enumeratedValues>
33075            </field>
33076            <field>
33077              <name>TOTR</name>
33078              <description>Type Of Transpose For Read</description>
33079              <bitOffset>28</bitOffset>
33080              <bitWidth>2</bitWidth>
33081              <access>read-write</access>
33082              <enumeratedValues>
33083                <enumeratedValue>
33084                  <name>00</name>
33085                  <description>No transposition.</description>
33086                  <value>#00</value>
33087                </enumeratedValue>
33088                <enumeratedValue>
33089                  <name>01</name>
33090                  <description>Bits in bytes are transposed; bytes are not transposed.</description>
33091                  <value>#01</value>
33092                </enumeratedValue>
33093                <enumeratedValue>
33094                  <name>10</name>
33095                  <description>Both bits in bytes and bytes are transposed.</description>
33096                  <value>#10</value>
33097                </enumeratedValue>
33098                <enumeratedValue>
33099                  <name>11</name>
33100                  <description>Only bytes are transposed; no bits in a byte are transposed.</description>
33101                  <value>#11</value>
33102                </enumeratedValue>
33103              </enumeratedValues>
33104            </field>
33105            <field>
33106              <name>TOT</name>
33107              <description>Type Of Transpose For Writes</description>
33108              <bitOffset>30</bitOffset>
33109              <bitWidth>2</bitWidth>
33110              <access>read-write</access>
33111              <enumeratedValues>
33112                <enumeratedValue>
33113                  <name>00</name>
33114                  <description>No transposition.</description>
33115                  <value>#00</value>
33116                </enumeratedValue>
33117                <enumeratedValue>
33118                  <name>01</name>
33119                  <description>Bits in bytes are transposed; bytes are not transposed.</description>
33120                  <value>#01</value>
33121                </enumeratedValue>
33122                <enumeratedValue>
33123                  <name>10</name>
33124                  <description>Both bits in bytes and bytes are transposed.</description>
33125                  <value>#10</value>
33126                </enumeratedValue>
33127                <enumeratedValue>
33128                  <name>11</name>
33129                  <description>Only bytes are transposed; no bits in a byte are transposed.</description>
33130                  <value>#11</value>
33131                </enumeratedValue>
33132              </enumeratedValues>
33133            </field>
33134          </fields>
33135        </register>
33136        <register>
33137          <name>CTRLHU</name>
33138          <description>CRC_CTRLHU register.</description>
33139          <addressOffset>0xB</addressOffset>
33140          <size>8</size>
33141          <access>read-write</access>
33142          <resetValue>0</resetValue>
33143          <resetMask>0xFF</resetMask>
33144          <fields>
33145            <field>
33146              <name>TCRC</name>
33147              <description>no description available</description>
33148              <bitOffset>0</bitOffset>
33149              <bitWidth>1</bitWidth>
33150              <access>read-write</access>
33151              <enumeratedValues>
33152                <enumeratedValue>
33153                  <name>0</name>
33154                  <description>16-bit CRC protocol.</description>
33155                  <value>#0</value>
33156                </enumeratedValue>
33157                <enumeratedValue>
33158                  <name>1</name>
33159                  <description>32-bit CRC protocol.</description>
33160                  <value>#1</value>
33161                </enumeratedValue>
33162              </enumeratedValues>
33163            </field>
33164            <field>
33165              <name>WAS</name>
33166              <description>no description available</description>
33167              <bitOffset>1</bitOffset>
33168              <bitWidth>1</bitWidth>
33169              <access>read-write</access>
33170              <enumeratedValues>
33171                <enumeratedValue>
33172                  <name>0</name>
33173                  <description>Writes to CRC data register are data values.</description>
33174                  <value>#0</value>
33175                </enumeratedValue>
33176                <enumeratedValue>
33177                  <name>1</name>
33178                  <description>Writes to CRC data reguster are seed values.</description>
33179                  <value>#1</value>
33180                </enumeratedValue>
33181              </enumeratedValues>
33182            </field>
33183            <field>
33184              <name>FXOR</name>
33185              <description>no description available</description>
33186              <bitOffset>2</bitOffset>
33187              <bitWidth>1</bitWidth>
33188              <access>read-write</access>
33189              <enumeratedValues>
33190                <enumeratedValue>
33191                  <name>0</name>
33192                  <description>No XOR on reading.</description>
33193                  <value>#0</value>
33194                </enumeratedValue>
33195                <enumeratedValue>
33196                  <name>1</name>
33197                  <description>Invert or complement the read value of CRC data register.</description>
33198                  <value>#1</value>
33199                </enumeratedValue>
33200              </enumeratedValues>
33201            </field>
33202            <field>
33203              <name>TOTR</name>
33204              <description>no description available</description>
33205              <bitOffset>4</bitOffset>
33206              <bitWidth>2</bitWidth>
33207              <access>read-write</access>
33208              <enumeratedValues>
33209                <enumeratedValue>
33210                  <name>00</name>
33211                  <description>No Transposition.</description>
33212                  <value>#00</value>
33213                </enumeratedValue>
33214                <enumeratedValue>
33215                  <name>01</name>
33216                  <description>Bits in bytes are transposed, bytes are not transposed.</description>
33217                  <value>#01</value>
33218                </enumeratedValue>
33219                <enumeratedValue>
33220                  <name>10</name>
33221                  <description>Both bits in bytes and bytes are transposed.</description>
33222                  <value>#10</value>
33223                </enumeratedValue>
33224                <enumeratedValue>
33225                  <name>11</name>
33226                  <description>Only bytes are transposed; no bits in a byte are transposed.</description>
33227                  <value>#11</value>
33228                </enumeratedValue>
33229              </enumeratedValues>
33230            </field>
33231            <field>
33232              <name>TOT</name>
33233              <description>no description available</description>
33234              <bitOffset>6</bitOffset>
33235              <bitWidth>2</bitWidth>
33236              <access>read-write</access>
33237              <enumeratedValues>
33238                <enumeratedValue>
33239                  <name>00</name>
33240                  <description>No Transposition.</description>
33241                  <value>#00</value>
33242                </enumeratedValue>
33243                <enumeratedValue>
33244                  <name>01</name>
33245                  <description>Bits in bytes are transposed, bytes are not transposed.</description>
33246                  <value>#01</value>
33247                </enumeratedValue>
33248                <enumeratedValue>
33249                  <name>10</name>
33250                  <description>Both bits in bytes and bytes are transposed.</description>
33251                  <value>#10</value>
33252                </enumeratedValue>
33253                <enumeratedValue>
33254                  <name>11</name>
33255                  <description>Only bytes are transposed; no bits in a byte are transposed.</description>
33256                  <value>#11</value>
33257                </enumeratedValue>
33258              </enumeratedValues>
33259            </field>
33260          </fields>
33261        </register>
33262      </registers>
33263    </peripheral>
33264    <peripheral>
33265      <name>USBDCD</name>
33266      <description>USB Device Charger Detection module</description>
33267      <prependToName>USBDCD_</prependToName>
33268      <baseAddress>0x40035000</baseAddress>
33269      <addressBlock>
33270        <offset>0</offset>
33271        <size>0x1C</size>
33272        <usage>registers</usage>
33273      </addressBlock>
33274      <interrupt>
33275        <name>USBDCD</name>
33276        <value>54</value>
33277      </interrupt>
33278      <registers>
33279        <register>
33280          <name>CONTROL</name>
33281          <description>Control register</description>
33282          <addressOffset>0</addressOffset>
33283          <size>32</size>
33284          <access>read-write</access>
33285          <resetValue>0x10000</resetValue>
33286          <resetMask>0xFFFFFFFF</resetMask>
33287          <fields>
33288            <field>
33289              <name>IACK</name>
33290              <description>Interrupt Acknowledge</description>
33291              <bitOffset>0</bitOffset>
33292              <bitWidth>1</bitWidth>
33293              <access>write-only</access>
33294              <enumeratedValues>
33295                <enumeratedValue>
33296                  <name>0</name>
33297                  <description>Do not clear the interrupt.</description>
33298                  <value>#0</value>
33299                </enumeratedValue>
33300                <enumeratedValue>
33301                  <name>1</name>
33302                  <description>Clear the IF bit (interrupt flag).</description>
33303                  <value>#1</value>
33304                </enumeratedValue>
33305              </enumeratedValues>
33306            </field>
33307            <field>
33308              <name>IF</name>
33309              <description>Interrupt Flag</description>
33310              <bitOffset>8</bitOffset>
33311              <bitWidth>1</bitWidth>
33312              <access>read-only</access>
33313              <enumeratedValues>
33314                <enumeratedValue>
33315                  <name>0</name>
33316                  <description>No interrupt is pending.</description>
33317                  <value>#0</value>
33318                </enumeratedValue>
33319                <enumeratedValue>
33320                  <name>1</name>
33321                  <description>An interrupt is pending.</description>
33322                  <value>#1</value>
33323                </enumeratedValue>
33324              </enumeratedValues>
33325            </field>
33326            <field>
33327              <name>IE</name>
33328              <description>Interrupt Enable</description>
33329              <bitOffset>16</bitOffset>
33330              <bitWidth>1</bitWidth>
33331              <access>read-write</access>
33332              <enumeratedValues>
33333                <enumeratedValue>
33334                  <name>0</name>
33335                  <description>Disable interrupts to the system.</description>
33336                  <value>#0</value>
33337                </enumeratedValue>
33338                <enumeratedValue>
33339                  <name>1</name>
33340                  <description>Enable interrupts to the system.</description>
33341                  <value>#1</value>
33342                </enumeratedValue>
33343              </enumeratedValues>
33344            </field>
33345            <field>
33346              <name>BC12</name>
33347              <description>BC1.2 compatibility. This bit cannot be changed after start detection.</description>
33348              <bitOffset>17</bitOffset>
33349              <bitWidth>1</bitWidth>
33350              <access>read-write</access>
33351              <enumeratedValues>
33352                <enumeratedValue>
33353                  <name>0</name>
33354                  <description>Compatible with BC1.1 (default)</description>
33355                  <value>#0</value>
33356                </enumeratedValue>
33357                <enumeratedValue>
33358                  <name>1</name>
33359                  <description>Compatible with BC1.2</description>
33360                  <value>#1</value>
33361                </enumeratedValue>
33362              </enumeratedValues>
33363            </field>
33364            <field>
33365              <name>START</name>
33366              <description>Start Change Detection Sequence</description>
33367              <bitOffset>24</bitOffset>
33368              <bitWidth>1</bitWidth>
33369              <access>write-only</access>
33370              <enumeratedValues>
33371                <enumeratedValue>
33372                  <name>0</name>
33373                  <description>Do not start the sequence. Writes of this value have no effect.</description>
33374                  <value>#0</value>
33375                </enumeratedValue>
33376                <enumeratedValue>
33377                  <name>1</name>
33378                  <description>Initiate the charger detection sequence. If the sequence is already running, writes of this value have no effect.</description>
33379                  <value>#1</value>
33380                </enumeratedValue>
33381              </enumeratedValues>
33382            </field>
33383            <field>
33384              <name>SR</name>
33385              <description>Software Reset</description>
33386              <bitOffset>25</bitOffset>
33387              <bitWidth>1</bitWidth>
33388              <access>write-only</access>
33389              <enumeratedValues>
33390                <enumeratedValue>
33391                  <name>0</name>
33392                  <description>Do not perform a software reset.</description>
33393                  <value>#0</value>
33394                </enumeratedValue>
33395                <enumeratedValue>
33396                  <name>1</name>
33397                  <description>Perform a software reset.</description>
33398                  <value>#1</value>
33399                </enumeratedValue>
33400              </enumeratedValues>
33401            </field>
33402          </fields>
33403        </register>
33404        <register>
33405          <name>CLOCK</name>
33406          <description>Clock register</description>
33407          <addressOffset>0x4</addressOffset>
33408          <size>32</size>
33409          <access>read-write</access>
33410          <resetValue>0xC1</resetValue>
33411          <resetMask>0xFFFFFFFF</resetMask>
33412          <fields>
33413            <field>
33414              <name>CLOCK_UNIT</name>
33415              <description>Unit of Measurement Encoding for Clock Speed</description>
33416              <bitOffset>0</bitOffset>
33417              <bitWidth>1</bitWidth>
33418              <access>read-write</access>
33419              <enumeratedValues>
33420                <enumeratedValue>
33421                  <name>0</name>
33422                  <description>kHz Speed (between 1 kHz and 1023 kHz)</description>
33423                  <value>#0</value>
33424                </enumeratedValue>
33425                <enumeratedValue>
33426                  <name>1</name>
33427                  <description>MHz Speed (between 1 MHz and 1023 MHz)</description>
33428                  <value>#1</value>
33429                </enumeratedValue>
33430              </enumeratedValues>
33431            </field>
33432            <field>
33433              <name>CLOCK_SPEED</name>
33434              <description>Numerical Value of Clock Speed in Binary</description>
33435              <bitOffset>2</bitOffset>
33436              <bitWidth>10</bitWidth>
33437              <access>read-write</access>
33438            </field>
33439          </fields>
33440        </register>
33441        <register>
33442          <name>STATUS</name>
33443          <description>Status register</description>
33444          <addressOffset>0x8</addressOffset>
33445          <size>32</size>
33446          <access>read-only</access>
33447          <resetValue>0</resetValue>
33448          <resetMask>0xFFFFFFFF</resetMask>
33449          <fields>
33450            <field>
33451              <name>SEQ_RES</name>
33452              <description>Charger Detection Sequence Results</description>
33453              <bitOffset>16</bitOffset>
33454              <bitWidth>2</bitWidth>
33455              <access>read-only</access>
33456              <enumeratedValues>
33457                <enumeratedValue>
33458                  <name>00</name>
33459                  <description>No results to report.</description>
33460                  <value>#00</value>
33461                </enumeratedValue>
33462                <enumeratedValue>
33463                  <name>01</name>
33464                  <description>Attached to an SDP. Must comply with USB 2.0 by drawing only 2.5 mA (max) until connected.</description>
33465                  <value>#01</value>
33466                </enumeratedValue>
33467                <enumeratedValue>
33468                  <name>10</name>
33469                  <description>Attached to a charging port. The exact meaning depends on bit 18: 0: Attached to either a CDP or a DCP. The charger type detection has not completed. 1: Attached to a CDP. The charger type detection has completed.</description>
33470                  <value>#10</value>
33471                </enumeratedValue>
33472                <enumeratedValue>
33473                  <name>11</name>
33474                  <description>Attached to a DCP.</description>
33475                  <value>#11</value>
33476                </enumeratedValue>
33477              </enumeratedValues>
33478            </field>
33479            <field>
33480              <name>SEQ_STAT</name>
33481              <description>Charger Detection Sequence Status</description>
33482              <bitOffset>18</bitOffset>
33483              <bitWidth>2</bitWidth>
33484              <access>read-only</access>
33485              <enumeratedValues>
33486                <enumeratedValue>
33487                  <name>00</name>
33488                  <description>The module is either not enabled, or the module is enabled but the data pins have not yet been detected.</description>
33489                  <value>#00</value>
33490                </enumeratedValue>
33491                <enumeratedValue>
33492                  <name>01</name>
33493                  <description>Data pin contact detection is complete.</description>
33494                  <value>#01</value>
33495                </enumeratedValue>
33496                <enumeratedValue>
33497                  <name>10</name>
33498                  <description>Charging port detection is complete.</description>
33499                  <value>#10</value>
33500                </enumeratedValue>
33501                <enumeratedValue>
33502                  <name>11</name>
33503                  <description>Charger type detection is complete.</description>
33504                  <value>#11</value>
33505                </enumeratedValue>
33506              </enumeratedValues>
33507            </field>
33508            <field>
33509              <name>ERR</name>
33510              <description>Error Flag</description>
33511              <bitOffset>20</bitOffset>
33512              <bitWidth>1</bitWidth>
33513              <access>read-only</access>
33514              <enumeratedValues>
33515                <enumeratedValue>
33516                  <name>0</name>
33517                  <description>No sequence errors.</description>
33518                  <value>#0</value>
33519                </enumeratedValue>
33520                <enumeratedValue>
33521                  <name>1</name>
33522                  <description>Error in the detection sequence. See the SEQ_STAT field to determine the phase in which the error occurred.</description>
33523                  <value>#1</value>
33524                </enumeratedValue>
33525              </enumeratedValues>
33526            </field>
33527            <field>
33528              <name>TO</name>
33529              <description>Timeout Flag</description>
33530              <bitOffset>21</bitOffset>
33531              <bitWidth>1</bitWidth>
33532              <access>read-only</access>
33533              <enumeratedValues>
33534                <enumeratedValue>
33535                  <name>0</name>
33536                  <description>The detection sequence has not been running for over 1 s.</description>
33537                  <value>#0</value>
33538                </enumeratedValue>
33539                <enumeratedValue>
33540                  <name>1</name>
33541                  <description>It has been over 1 s since the data pin contact was detected and debounced.</description>
33542                  <value>#1</value>
33543                </enumeratedValue>
33544              </enumeratedValues>
33545            </field>
33546            <field>
33547              <name>ACTIVE</name>
33548              <description>Active Status Indicator</description>
33549              <bitOffset>22</bitOffset>
33550              <bitWidth>1</bitWidth>
33551              <access>read-only</access>
33552              <enumeratedValues>
33553                <enumeratedValue>
33554                  <name>0</name>
33555                  <description>The sequence is not running.</description>
33556                  <value>#0</value>
33557                </enumeratedValue>
33558                <enumeratedValue>
33559                  <name>1</name>
33560                  <description>The sequence is running.</description>
33561                  <value>#1</value>
33562                </enumeratedValue>
33563              </enumeratedValues>
33564            </field>
33565          </fields>
33566        </register>
33567        <register>
33568          <name>SIGNAL_OVERRIDE</name>
33569          <description>Signal Override Register</description>
33570          <addressOffset>0xC</addressOffset>
33571          <size>32</size>
33572          <access>read-write</access>
33573          <resetValue>0</resetValue>
33574          <resetMask>0xFFFFFFFF</resetMask>
33575          <fields>
33576            <field>
33577              <name>PS</name>
33578              <description>Phase Selection</description>
33579              <bitOffset>0</bitOffset>
33580              <bitWidth>2</bitWidth>
33581              <access>read-write</access>
33582              <enumeratedValues>
33583                <enumeratedValue>
33584                  <name>00</name>
33585                  <description>No overrides. Bit field must remain at this value during normal USB data communication to prevent unexpected conditions on USB_DP and USB_DM pins. (Default)</description>
33586                  <value>#00</value>
33587                </enumeratedValue>
33588                <enumeratedValue>
33589                  <name>01</name>
33590                  <description>Reserved, not for customer use.</description>
33591                  <value>#01</value>
33592                </enumeratedValue>
33593                <enumeratedValue>
33594                  <name>10</name>
33595                  <description>Enables VDP_SRC voltage source for the USB_DP pin and IDM_SINK current source for the USB_DM pin.</description>
33596                  <value>#10</value>
33597                </enumeratedValue>
33598                <enumeratedValue>
33599                  <name>11</name>
33600                  <description>Reserved, not for customer use.</description>
33601                  <value>#11</value>
33602                </enumeratedValue>
33603              </enumeratedValues>
33604            </field>
33605          </fields>
33606        </register>
33607        <register>
33608          <name>TIMER0</name>
33609          <description>TIMER0 register</description>
33610          <addressOffset>0x10</addressOffset>
33611          <size>32</size>
33612          <access>read-write</access>
33613          <resetValue>0x100000</resetValue>
33614          <resetMask>0xFFFFFFFF</resetMask>
33615          <fields>
33616            <field>
33617              <name>TUNITCON</name>
33618              <description>Unit Connection Timer Elapse (in ms)</description>
33619              <bitOffset>0</bitOffset>
33620              <bitWidth>12</bitWidth>
33621              <access>read-only</access>
33622            </field>
33623            <field>
33624              <name>TSEQ_INIT</name>
33625              <description>Sequence Initiation Time</description>
33626              <bitOffset>16</bitOffset>
33627              <bitWidth>10</bitWidth>
33628              <access>read-write</access>
33629            </field>
33630          </fields>
33631        </register>
33632        <register>
33633          <name>TIMER1</name>
33634          <description>TIMER1 register</description>
33635          <addressOffset>0x14</addressOffset>
33636          <size>32</size>
33637          <access>read-write</access>
33638          <resetValue>0xA0028</resetValue>
33639          <resetMask>0xFFFFFFFF</resetMask>
33640          <fields>
33641            <field>
33642              <name>TVDPSRC_ON</name>
33643              <description>Time Period Comparator Enabled</description>
33644              <bitOffset>0</bitOffset>
33645              <bitWidth>10</bitWidth>
33646              <access>read-write</access>
33647            </field>
33648            <field>
33649              <name>TDCD_DBNC</name>
33650              <description>Time Period to Debounce D+ Signal</description>
33651              <bitOffset>16</bitOffset>
33652              <bitWidth>10</bitWidth>
33653              <access>read-write</access>
33654            </field>
33655          </fields>
33656        </register>
33657        <register>
33658          <name>TIMER2_BC11</name>
33659          <description>TIMER2_BC11 register</description>
33660          <alternateGroup>USBDCD</alternateGroup>
33661          <addressOffset>0x18</addressOffset>
33662          <size>32</size>
33663          <access>read-write</access>
33664          <resetValue>0x280001</resetValue>
33665          <resetMask>0xFFFFFFFF</resetMask>
33666          <fields>
33667            <field>
33668              <name>CHECK_DM</name>
33669              <description>Time Before Check of D- Line</description>
33670              <bitOffset>0</bitOffset>
33671              <bitWidth>4</bitWidth>
33672              <access>read-write</access>
33673            </field>
33674            <field>
33675              <name>TVDPSRC_CON</name>
33676              <description>Time Period Before Enabling D+ Pullup</description>
33677              <bitOffset>16</bitOffset>
33678              <bitWidth>10</bitWidth>
33679              <access>read-write</access>
33680            </field>
33681          </fields>
33682        </register>
33683        <register>
33684          <name>TIMER2_BC12</name>
33685          <description>TIMER2_BC12 register</description>
33686          <alternateGroup>USBDCD</alternateGroup>
33687          <addressOffset>0x18</addressOffset>
33688          <size>32</size>
33689          <access>read-write</access>
33690          <resetValue>0x10028</resetValue>
33691          <resetMask>0xFFFFFFFF</resetMask>
33692          <fields>
33693            <field>
33694              <name>TVDMSRC_ON</name>
33695              <description>Sets the amount of time (in ms) that the module enables the VDM_SRC. Valid values are 0-40ms.</description>
33696              <bitOffset>0</bitOffset>
33697              <bitWidth>10</bitWidth>
33698              <access>read-write</access>
33699            </field>
33700            <field>
33701              <name>TWAIT_AFTER_PRD</name>
33702              <description>Sets the amount of time (in ms) that the module waits after primary detection before start to secondary detection</description>
33703              <bitOffset>16</bitOffset>
33704              <bitWidth>10</bitWidth>
33705              <access>read-write</access>
33706            </field>
33707          </fields>
33708        </register>
33709      </registers>
33710    </peripheral>
33711    <peripheral>
33712      <name>PDB0</name>
33713      <description>Programmable Delay Block</description>
33714      <prependToName>PDB0_</prependToName>
33715      <baseAddress>0x40036000</baseAddress>
33716      <addressBlock>
33717        <offset>0</offset>
33718        <size>0x19C</size>
33719        <usage>registers</usage>
33720      </addressBlock>
33721      <interrupt>
33722        <name>PDB0</name>
33723        <value>52</value>
33724      </interrupt>
33725      <registers>
33726        <register>
33727          <name>SC</name>
33728          <description>Status and Control register</description>
33729          <addressOffset>0</addressOffset>
33730          <size>32</size>
33731          <access>read-write</access>
33732          <resetValue>0</resetValue>
33733          <resetMask>0xFFFFFFFF</resetMask>
33734          <fields>
33735            <field>
33736              <name>LDOK</name>
33737              <description>Load OK</description>
33738              <bitOffset>0</bitOffset>
33739              <bitWidth>1</bitWidth>
33740              <access>read-write</access>
33741            </field>
33742            <field>
33743              <name>CONT</name>
33744              <description>Continuous Mode Enable</description>
33745              <bitOffset>1</bitOffset>
33746              <bitWidth>1</bitWidth>
33747              <access>read-write</access>
33748              <enumeratedValues>
33749                <enumeratedValue>
33750                  <name>0</name>
33751                  <description>PDB operation in One-Shot mode</description>
33752                  <value>#0</value>
33753                </enumeratedValue>
33754                <enumeratedValue>
33755                  <name>1</name>
33756                  <description>PDB operation in Continuous mode</description>
33757                  <value>#1</value>
33758                </enumeratedValue>
33759              </enumeratedValues>
33760            </field>
33761            <field>
33762              <name>MULT</name>
33763              <description>Multiplication Factor Select for Prescaler</description>
33764              <bitOffset>2</bitOffset>
33765              <bitWidth>2</bitWidth>
33766              <access>read-write</access>
33767              <enumeratedValues>
33768                <enumeratedValue>
33769                  <name>00</name>
33770                  <description>Multiplication factor is 1.</description>
33771                  <value>#00</value>
33772                </enumeratedValue>
33773                <enumeratedValue>
33774                  <name>01</name>
33775                  <description>Multiplication factor is 10.</description>
33776                  <value>#01</value>
33777                </enumeratedValue>
33778                <enumeratedValue>
33779                  <name>10</name>
33780                  <description>Multiplication factor is 20.</description>
33781                  <value>#10</value>
33782                </enumeratedValue>
33783                <enumeratedValue>
33784                  <name>11</name>
33785                  <description>Multiplication factor is 40.</description>
33786                  <value>#11</value>
33787                </enumeratedValue>
33788              </enumeratedValues>
33789            </field>
33790            <field>
33791              <name>PDBIE</name>
33792              <description>PDB Interrupt Enable</description>
33793              <bitOffset>5</bitOffset>
33794              <bitWidth>1</bitWidth>
33795              <access>read-write</access>
33796              <enumeratedValues>
33797                <enumeratedValue>
33798                  <name>0</name>
33799                  <description>PDB interrupt disabled.</description>
33800                  <value>#0</value>
33801                </enumeratedValue>
33802                <enumeratedValue>
33803                  <name>1</name>
33804                  <description>PDB interrupt enabled.</description>
33805                  <value>#1</value>
33806                </enumeratedValue>
33807              </enumeratedValues>
33808            </field>
33809            <field>
33810              <name>PDBIF</name>
33811              <description>PDB Interrupt Flag</description>
33812              <bitOffset>6</bitOffset>
33813              <bitWidth>1</bitWidth>
33814              <access>read-write</access>
33815            </field>
33816            <field>
33817              <name>PDBEN</name>
33818              <description>PDB Enable</description>
33819              <bitOffset>7</bitOffset>
33820              <bitWidth>1</bitWidth>
33821              <access>read-write</access>
33822              <enumeratedValues>
33823                <enumeratedValue>
33824                  <name>0</name>
33825                  <description>PDB disabled. Counter is off.</description>
33826                  <value>#0</value>
33827                </enumeratedValue>
33828                <enumeratedValue>
33829                  <name>1</name>
33830                  <description>PDB enabled.</description>
33831                  <value>#1</value>
33832                </enumeratedValue>
33833              </enumeratedValues>
33834            </field>
33835            <field>
33836              <name>TRGSEL</name>
33837              <description>Trigger Input Source Select</description>
33838              <bitOffset>8</bitOffset>
33839              <bitWidth>4</bitWidth>
33840              <access>read-write</access>
33841              <enumeratedValues>
33842                <enumeratedValue>
33843                  <name>0000</name>
33844                  <description>Trigger-In 0 is selected.</description>
33845                  <value>#0000</value>
33846                </enumeratedValue>
33847                <enumeratedValue>
33848                  <name>0001</name>
33849                  <description>Trigger-In 1 is selected.</description>
33850                  <value>#0001</value>
33851                </enumeratedValue>
33852                <enumeratedValue>
33853                  <name>0010</name>
33854                  <description>Trigger-In 2 is selected.</description>
33855                  <value>#0010</value>
33856                </enumeratedValue>
33857                <enumeratedValue>
33858                  <name>0011</name>
33859                  <description>Trigger-In 3 is selected.</description>
33860                  <value>#0011</value>
33861                </enumeratedValue>
33862                <enumeratedValue>
33863                  <name>0100</name>
33864                  <description>Trigger-In 4 is selected.</description>
33865                  <value>#0100</value>
33866                </enumeratedValue>
33867                <enumeratedValue>
33868                  <name>0101</name>
33869                  <description>Trigger-In 5 is selected.</description>
33870                  <value>#0101</value>
33871                </enumeratedValue>
33872                <enumeratedValue>
33873                  <name>0110</name>
33874                  <description>Trigger-In 6 is selected.</description>
33875                  <value>#0110</value>
33876                </enumeratedValue>
33877                <enumeratedValue>
33878                  <name>0111</name>
33879                  <description>Trigger-In 7 is selected.</description>
33880                  <value>#0111</value>
33881                </enumeratedValue>
33882                <enumeratedValue>
33883                  <name>1000</name>
33884                  <description>Trigger-In 8 is selected.</description>
33885                  <value>#1000</value>
33886                </enumeratedValue>
33887                <enumeratedValue>
33888                  <name>1001</name>
33889                  <description>Trigger-In 9 is selected.</description>
33890                  <value>#1001</value>
33891                </enumeratedValue>
33892                <enumeratedValue>
33893                  <name>1010</name>
33894                  <description>Trigger-In 10 is selected.</description>
33895                  <value>#1010</value>
33896                </enumeratedValue>
33897                <enumeratedValue>
33898                  <name>1011</name>
33899                  <description>Trigger-In 11 is selected.</description>
33900                  <value>#1011</value>
33901                </enumeratedValue>
33902                <enumeratedValue>
33903                  <name>1100</name>
33904                  <description>Trigger-In 12 is selected.</description>
33905                  <value>#1100</value>
33906                </enumeratedValue>
33907                <enumeratedValue>
33908                  <name>1101</name>
33909                  <description>Trigger-In 13 is selected.</description>
33910                  <value>#1101</value>
33911                </enumeratedValue>
33912                <enumeratedValue>
33913                  <name>1110</name>
33914                  <description>Trigger-In 14 is selected.</description>
33915                  <value>#1110</value>
33916                </enumeratedValue>
33917                <enumeratedValue>
33918                  <name>1111</name>
33919                  <description>Software trigger is selected.</description>
33920                  <value>#1111</value>
33921                </enumeratedValue>
33922              </enumeratedValues>
33923            </field>
33924            <field>
33925              <name>PRESCALER</name>
33926              <description>Prescaler Divider Select</description>
33927              <bitOffset>12</bitOffset>
33928              <bitWidth>3</bitWidth>
33929              <access>read-write</access>
33930              <enumeratedValues>
33931                <enumeratedValue>
33932                  <name>000</name>
33933                  <description>Counting uses the peripheral clock divided by multiplication factor selected by MULT.</description>
33934                  <value>#000</value>
33935                </enumeratedValue>
33936                <enumeratedValue>
33937                  <name>001</name>
33938                  <description>Counting uses the peripheral clock divided by twice of the multiplication factor selected by MULT.</description>
33939                  <value>#001</value>
33940                </enumeratedValue>
33941                <enumeratedValue>
33942                  <name>010</name>
33943                  <description>Counting uses the peripheral clock divided by four times of the multiplication factor selected by MULT.</description>
33944                  <value>#010</value>
33945                </enumeratedValue>
33946                <enumeratedValue>
33947                  <name>011</name>
33948                  <description>Counting uses the peripheral clock divided by eight times of the multiplication factor selected by MULT.</description>
33949                  <value>#011</value>
33950                </enumeratedValue>
33951                <enumeratedValue>
33952                  <name>100</name>
33953                  <description>Counting uses the peripheral clock divided by 16 times of the multiplication factor selected by MULT.</description>
33954                  <value>#100</value>
33955                </enumeratedValue>
33956                <enumeratedValue>
33957                  <name>101</name>
33958                  <description>Counting uses the peripheral clock divided by 32 times of the multiplication factor selected by MULT.</description>
33959                  <value>#101</value>
33960                </enumeratedValue>
33961                <enumeratedValue>
33962                  <name>110</name>
33963                  <description>Counting uses the peripheral clock divided by 64 times of the multiplication factor selected by MULT.</description>
33964                  <value>#110</value>
33965                </enumeratedValue>
33966                <enumeratedValue>
33967                  <name>111</name>
33968                  <description>Counting uses the peripheral clock divided by 128 times of the multiplication factor selected by MULT.</description>
33969                  <value>#111</value>
33970                </enumeratedValue>
33971              </enumeratedValues>
33972            </field>
33973            <field>
33974              <name>DMAEN</name>
33975              <description>DMA Enable</description>
33976              <bitOffset>15</bitOffset>
33977              <bitWidth>1</bitWidth>
33978              <access>read-write</access>
33979              <enumeratedValues>
33980                <enumeratedValue>
33981                  <name>0</name>
33982                  <description>DMA disabled.</description>
33983                  <value>#0</value>
33984                </enumeratedValue>
33985                <enumeratedValue>
33986                  <name>1</name>
33987                  <description>DMA enabled.</description>
33988                  <value>#1</value>
33989                </enumeratedValue>
33990              </enumeratedValues>
33991            </field>
33992            <field>
33993              <name>SWTRIG</name>
33994              <description>Software Trigger</description>
33995              <bitOffset>16</bitOffset>
33996              <bitWidth>1</bitWidth>
33997              <access>write-only</access>
33998            </field>
33999            <field>
34000              <name>PDBEIE</name>
34001              <description>PDB Sequence Error Interrupt Enable</description>
34002              <bitOffset>17</bitOffset>
34003              <bitWidth>1</bitWidth>
34004              <access>read-write</access>
34005              <enumeratedValues>
34006                <enumeratedValue>
34007                  <name>0</name>
34008                  <description>PDB sequence error interrupt disabled.</description>
34009                  <value>#0</value>
34010                </enumeratedValue>
34011                <enumeratedValue>
34012                  <name>1</name>
34013                  <description>PDB sequence error interrupt enabled.</description>
34014                  <value>#1</value>
34015                </enumeratedValue>
34016              </enumeratedValues>
34017            </field>
34018            <field>
34019              <name>LDMOD</name>
34020              <description>Load Mode Select</description>
34021              <bitOffset>18</bitOffset>
34022              <bitWidth>2</bitWidth>
34023              <access>read-write</access>
34024              <enumeratedValues>
34025                <enumeratedValue>
34026                  <name>00</name>
34027                  <description>The internal registers are loaded with the values from their buffers immediately after 1 is written to LDOK.</description>
34028                  <value>#00</value>
34029                </enumeratedValue>
34030                <enumeratedValue>
34031                  <name>01</name>
34032                  <description>The internal registers are loaded with the values from their buffers when the PDB counter reaches the MOD register value after 1 is written to LDOK.</description>
34033                  <value>#01</value>
34034                </enumeratedValue>
34035                <enumeratedValue>
34036                  <name>10</name>
34037                  <description>The internal registers are loaded with the values from their buffers when a trigger input event is detected after 1 is written to LDOK.</description>
34038                  <value>#10</value>
34039                </enumeratedValue>
34040                <enumeratedValue>
34041                  <name>11</name>
34042                  <description>The internal registers are loaded with the values from their buffers when either the PDB counter reaches the MOD register value or a trigger input event is detected, after 1 is written to LDOK.</description>
34043                  <value>#11</value>
34044                </enumeratedValue>
34045              </enumeratedValues>
34046            </field>
34047          </fields>
34048        </register>
34049        <register>
34050          <name>MOD</name>
34051          <description>Modulus register</description>
34052          <addressOffset>0x4</addressOffset>
34053          <size>32</size>
34054          <access>read-write</access>
34055          <resetValue>0xFFFF</resetValue>
34056          <resetMask>0xFFFFFFFF</resetMask>
34057          <fields>
34058            <field>
34059              <name>MOD</name>
34060              <description>PDB Modulus</description>
34061              <bitOffset>0</bitOffset>
34062              <bitWidth>16</bitWidth>
34063              <access>read-write</access>
34064            </field>
34065          </fields>
34066        </register>
34067        <register>
34068          <name>CNT</name>
34069          <description>Counter register</description>
34070          <addressOffset>0x8</addressOffset>
34071          <size>32</size>
34072          <access>read-only</access>
34073          <resetValue>0</resetValue>
34074          <resetMask>0xFFFFFFFF</resetMask>
34075          <fields>
34076            <field>
34077              <name>CNT</name>
34078              <description>PDB Counter</description>
34079              <bitOffset>0</bitOffset>
34080              <bitWidth>16</bitWidth>
34081              <access>read-only</access>
34082            </field>
34083          </fields>
34084        </register>
34085        <register>
34086          <name>IDLY</name>
34087          <description>Interrupt Delay register</description>
34088          <addressOffset>0xC</addressOffset>
34089          <size>32</size>
34090          <access>read-write</access>
34091          <resetValue>0xFFFF</resetValue>
34092          <resetMask>0xFFFFFFFF</resetMask>
34093          <fields>
34094            <field>
34095              <name>IDLY</name>
34096              <description>PDB Interrupt Delay</description>
34097              <bitOffset>0</bitOffset>
34098              <bitWidth>16</bitWidth>
34099              <access>read-write</access>
34100            </field>
34101          </fields>
34102        </register>
34103        <register>
34104          <name>CHC1</name>
34105          <description>Channel n Control register 1</description>
34106          <addressOffset>0x10</addressOffset>
34107          <size>32</size>
34108          <access>read-write</access>
34109          <resetValue>0</resetValue>
34110          <resetMask>0xFFFFFFFF</resetMask>
34111          <fields>
34112            <field>
34113              <name>EN0</name>
34114              <description>PDB Channel Pre-Trigger Enable</description>
34115              <bitOffset>0</bitOffset>
34116              <bitWidth>1</bitWidth>
34117              <access>read-write</access>
34118              <enumeratedValues>
34119                <enumeratedValue>
34120                  <name>0</name>
34121                  <description>PDB channel&apos;s corresponding pre-trigger disabled.</description>
34122                  <value>#0</value>
34123                </enumeratedValue>
34124                <enumeratedValue>
34125                  <name>1</name>
34126                  <description>PDB channel&apos;s corresponding pre-trigger enabled.</description>
34127                  <value>#1</value>
34128                </enumeratedValue>
34129              </enumeratedValues>
34130            </field>
34131            <field>
34132              <name>EN1</name>
34133              <description>PDB Channel Pre-Trigger Enable</description>
34134              <bitOffset>1</bitOffset>
34135              <bitWidth>1</bitWidth>
34136              <access>read-write</access>
34137              <enumeratedValues>
34138                <enumeratedValue>
34139                  <name>0</name>
34140                  <description>PDB channel&apos;s corresponding pre-trigger disabled.</description>
34141                  <value>#0</value>
34142                </enumeratedValue>
34143                <enumeratedValue>
34144                  <name>1</name>
34145                  <description>PDB channel&apos;s corresponding pre-trigger enabled.</description>
34146                  <value>#1</value>
34147                </enumeratedValue>
34148              </enumeratedValues>
34149            </field>
34150            <field>
34151              <name>EN2</name>
34152              <description>PDB Channel Pre-Trigger Enable</description>
34153              <bitOffset>2</bitOffset>
34154              <bitWidth>1</bitWidth>
34155              <access>read-write</access>
34156              <enumeratedValues>
34157                <enumeratedValue>
34158                  <name>0</name>
34159                  <description>PDB channel&apos;s corresponding pre-trigger disabled.</description>
34160                  <value>#0</value>
34161                </enumeratedValue>
34162                <enumeratedValue>
34163                  <name>1</name>
34164                  <description>PDB channel&apos;s corresponding pre-trigger enabled.</description>
34165                  <value>#1</value>
34166                </enumeratedValue>
34167              </enumeratedValues>
34168            </field>
34169            <field>
34170              <name>EN3</name>
34171              <description>PDB Channel Pre-Trigger Enable</description>
34172              <bitOffset>3</bitOffset>
34173              <bitWidth>1</bitWidth>
34174              <access>read-write</access>
34175              <enumeratedValues>
34176                <enumeratedValue>
34177                  <name>0</name>
34178                  <description>PDB channel&apos;s corresponding pre-trigger disabled.</description>
34179                  <value>#0</value>
34180                </enumeratedValue>
34181                <enumeratedValue>
34182                  <name>1</name>
34183                  <description>PDB channel&apos;s corresponding pre-trigger enabled.</description>
34184                  <value>#1</value>
34185                </enumeratedValue>
34186              </enumeratedValues>
34187            </field>
34188            <field>
34189              <name>EN4</name>
34190              <description>PDB Channel Pre-Trigger Enable</description>
34191              <bitOffset>4</bitOffset>
34192              <bitWidth>1</bitWidth>
34193              <access>read-write</access>
34194              <enumeratedValues>
34195                <enumeratedValue>
34196                  <name>0</name>
34197                  <description>PDB channel&apos;s corresponding pre-trigger disabled.</description>
34198                  <value>#0</value>
34199                </enumeratedValue>
34200                <enumeratedValue>
34201                  <name>1</name>
34202                  <description>PDB channel&apos;s corresponding pre-trigger enabled.</description>
34203                  <value>#1</value>
34204                </enumeratedValue>
34205              </enumeratedValues>
34206            </field>
34207            <field>
34208              <name>EN5</name>
34209              <description>PDB Channel Pre-Trigger Enable</description>
34210              <bitOffset>5</bitOffset>
34211              <bitWidth>1</bitWidth>
34212              <access>read-write</access>
34213              <enumeratedValues>
34214                <enumeratedValue>
34215                  <name>0</name>
34216                  <description>PDB channel&apos;s corresponding pre-trigger disabled.</description>
34217                  <value>#0</value>
34218                </enumeratedValue>
34219                <enumeratedValue>
34220                  <name>1</name>
34221                  <description>PDB channel&apos;s corresponding pre-trigger enabled.</description>
34222                  <value>#1</value>
34223                </enumeratedValue>
34224              </enumeratedValues>
34225            </field>
34226            <field>
34227              <name>EN6</name>
34228              <description>PDB Channel Pre-Trigger Enable</description>
34229              <bitOffset>6</bitOffset>
34230              <bitWidth>1</bitWidth>
34231              <access>read-write</access>
34232              <enumeratedValues>
34233                <enumeratedValue>
34234                  <name>0</name>
34235                  <description>PDB channel&apos;s corresponding pre-trigger disabled.</description>
34236                  <value>#0</value>
34237                </enumeratedValue>
34238                <enumeratedValue>
34239                  <name>1</name>
34240                  <description>PDB channel&apos;s corresponding pre-trigger enabled.</description>
34241                  <value>#1</value>
34242                </enumeratedValue>
34243              </enumeratedValues>
34244            </field>
34245            <field>
34246              <name>EN7</name>
34247              <description>PDB Channel Pre-Trigger Enable</description>
34248              <bitOffset>7</bitOffset>
34249              <bitWidth>1</bitWidth>
34250              <access>read-write</access>
34251              <enumeratedValues>
34252                <enumeratedValue>
34253                  <name>0</name>
34254                  <description>PDB channel&apos;s corresponding pre-trigger disabled.</description>
34255                  <value>#0</value>
34256                </enumeratedValue>
34257                <enumeratedValue>
34258                  <name>1</name>
34259                  <description>PDB channel&apos;s corresponding pre-trigger enabled.</description>
34260                  <value>#1</value>
34261                </enumeratedValue>
34262              </enumeratedValues>
34263            </field>
34264            <field>
34265              <name>TOS0</name>
34266              <description>PDB Channel Pre-Trigger Output Select</description>
34267              <bitOffset>8</bitOffset>
34268              <bitWidth>1</bitWidth>
34269              <access>read-write</access>
34270              <enumeratedValues>
34271                <enumeratedValue>
34272                  <name>0</name>
34273                  <description>PDB channel&apos;s corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1.</description>
34274                  <value>#0</value>
34275                </enumeratedValue>
34276                <enumeratedValue>
34277                  <name>1</name>
34278                  <description>PDB channel&apos;s corresponding pre-trigger asserts when the counter reaches the channel delay register plus one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1.</description>
34279                  <value>#1</value>
34280                </enumeratedValue>
34281              </enumeratedValues>
34282            </field>
34283            <field>
34284              <name>TOS1</name>
34285              <description>PDB Channel Pre-Trigger Output Select</description>
34286              <bitOffset>9</bitOffset>
34287              <bitWidth>1</bitWidth>
34288              <access>read-write</access>
34289              <enumeratedValues>
34290                <enumeratedValue>
34291                  <name>0</name>
34292                  <description>PDB channel&apos;s corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1.</description>
34293                  <value>#0</value>
34294                </enumeratedValue>
34295                <enumeratedValue>
34296                  <name>1</name>
34297                  <description>PDB channel&apos;s corresponding pre-trigger asserts when the counter reaches the channel delay register plus one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1.</description>
34298                  <value>#1</value>
34299                </enumeratedValue>
34300              </enumeratedValues>
34301            </field>
34302            <field>
34303              <name>TOS2</name>
34304              <description>PDB Channel Pre-Trigger Output Select</description>
34305              <bitOffset>10</bitOffset>
34306              <bitWidth>1</bitWidth>
34307              <access>read-write</access>
34308              <enumeratedValues>
34309                <enumeratedValue>
34310                  <name>0</name>
34311                  <description>PDB channel&apos;s corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1.</description>
34312                  <value>#0</value>
34313                </enumeratedValue>
34314                <enumeratedValue>
34315                  <name>1</name>
34316                  <description>PDB channel&apos;s corresponding pre-trigger asserts when the counter reaches the channel delay register plus one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1.</description>
34317                  <value>#1</value>
34318                </enumeratedValue>
34319              </enumeratedValues>
34320            </field>
34321            <field>
34322              <name>TOS3</name>
34323              <description>PDB Channel Pre-Trigger Output Select</description>
34324              <bitOffset>11</bitOffset>
34325              <bitWidth>1</bitWidth>
34326              <access>read-write</access>
34327              <enumeratedValues>
34328                <enumeratedValue>
34329                  <name>0</name>
34330                  <description>PDB channel&apos;s corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1.</description>
34331                  <value>#0</value>
34332                </enumeratedValue>
34333                <enumeratedValue>
34334                  <name>1</name>
34335                  <description>PDB channel&apos;s corresponding pre-trigger asserts when the counter reaches the channel delay register plus one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1.</description>
34336                  <value>#1</value>
34337                </enumeratedValue>
34338              </enumeratedValues>
34339            </field>
34340            <field>
34341              <name>TOS4</name>
34342              <description>PDB Channel Pre-Trigger Output Select</description>
34343              <bitOffset>12</bitOffset>
34344              <bitWidth>1</bitWidth>
34345              <access>read-write</access>
34346              <enumeratedValues>
34347                <enumeratedValue>
34348                  <name>0</name>
34349                  <description>PDB channel&apos;s corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1.</description>
34350                  <value>#0</value>
34351                </enumeratedValue>
34352                <enumeratedValue>
34353                  <name>1</name>
34354                  <description>PDB channel&apos;s corresponding pre-trigger asserts when the counter reaches the channel delay register plus one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1.</description>
34355                  <value>#1</value>
34356                </enumeratedValue>
34357              </enumeratedValues>
34358            </field>
34359            <field>
34360              <name>TOS5</name>
34361              <description>PDB Channel Pre-Trigger Output Select</description>
34362              <bitOffset>13</bitOffset>
34363              <bitWidth>1</bitWidth>
34364              <access>read-write</access>
34365              <enumeratedValues>
34366                <enumeratedValue>
34367                  <name>0</name>
34368                  <description>PDB channel&apos;s corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1.</description>
34369                  <value>#0</value>
34370                </enumeratedValue>
34371                <enumeratedValue>
34372                  <name>1</name>
34373                  <description>PDB channel&apos;s corresponding pre-trigger asserts when the counter reaches the channel delay register plus one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1.</description>
34374                  <value>#1</value>
34375                </enumeratedValue>
34376              </enumeratedValues>
34377            </field>
34378            <field>
34379              <name>TOS6</name>
34380              <description>PDB Channel Pre-Trigger Output Select</description>
34381              <bitOffset>14</bitOffset>
34382              <bitWidth>1</bitWidth>
34383              <access>read-write</access>
34384              <enumeratedValues>
34385                <enumeratedValue>
34386                  <name>0</name>
34387                  <description>PDB channel&apos;s corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1.</description>
34388                  <value>#0</value>
34389                </enumeratedValue>
34390                <enumeratedValue>
34391                  <name>1</name>
34392                  <description>PDB channel&apos;s corresponding pre-trigger asserts when the counter reaches the channel delay register plus one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1.</description>
34393                  <value>#1</value>
34394                </enumeratedValue>
34395              </enumeratedValues>
34396            </field>
34397            <field>
34398              <name>TOS7</name>
34399              <description>PDB Channel Pre-Trigger Output Select</description>
34400              <bitOffset>15</bitOffset>
34401              <bitWidth>1</bitWidth>
34402              <access>read-write</access>
34403              <enumeratedValues>
34404                <enumeratedValue>
34405                  <name>0</name>
34406                  <description>PDB channel&apos;s corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1.</description>
34407                  <value>#0</value>
34408                </enumeratedValue>
34409                <enumeratedValue>
34410                  <name>1</name>
34411                  <description>PDB channel&apos;s corresponding pre-trigger asserts when the counter reaches the channel delay register plus one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1.</description>
34412                  <value>#1</value>
34413                </enumeratedValue>
34414              </enumeratedValues>
34415            </field>
34416            <field>
34417              <name>BB0</name>
34418              <description>PDB Channel Pre-Trigger Back-to-Back Operation Enable</description>
34419              <bitOffset>16</bitOffset>
34420              <bitWidth>1</bitWidth>
34421              <access>read-write</access>
34422              <enumeratedValues>
34423                <enumeratedValue>
34424                  <name>0</name>
34425                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation disabled.</description>
34426                  <value>#0</value>
34427                </enumeratedValue>
34428                <enumeratedValue>
34429                  <name>1</name>
34430                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation enabled.</description>
34431                  <value>#1</value>
34432                </enumeratedValue>
34433              </enumeratedValues>
34434            </field>
34435            <field>
34436              <name>BB1</name>
34437              <description>PDB Channel Pre-Trigger Back-to-Back Operation Enable</description>
34438              <bitOffset>17</bitOffset>
34439              <bitWidth>1</bitWidth>
34440              <access>read-write</access>
34441              <enumeratedValues>
34442                <enumeratedValue>
34443                  <name>0</name>
34444                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation disabled.</description>
34445                  <value>#0</value>
34446                </enumeratedValue>
34447                <enumeratedValue>
34448                  <name>1</name>
34449                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation enabled.</description>
34450                  <value>#1</value>
34451                </enumeratedValue>
34452              </enumeratedValues>
34453            </field>
34454            <field>
34455              <name>BB2</name>
34456              <description>PDB Channel Pre-Trigger Back-to-Back Operation Enable</description>
34457              <bitOffset>18</bitOffset>
34458              <bitWidth>1</bitWidth>
34459              <access>read-write</access>
34460              <enumeratedValues>
34461                <enumeratedValue>
34462                  <name>0</name>
34463                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation disabled.</description>
34464                  <value>#0</value>
34465                </enumeratedValue>
34466                <enumeratedValue>
34467                  <name>1</name>
34468                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation enabled.</description>
34469                  <value>#1</value>
34470                </enumeratedValue>
34471              </enumeratedValues>
34472            </field>
34473            <field>
34474              <name>BB3</name>
34475              <description>PDB Channel Pre-Trigger Back-to-Back Operation Enable</description>
34476              <bitOffset>19</bitOffset>
34477              <bitWidth>1</bitWidth>
34478              <access>read-write</access>
34479              <enumeratedValues>
34480                <enumeratedValue>
34481                  <name>0</name>
34482                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation disabled.</description>
34483                  <value>#0</value>
34484                </enumeratedValue>
34485                <enumeratedValue>
34486                  <name>1</name>
34487                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation enabled.</description>
34488                  <value>#1</value>
34489                </enumeratedValue>
34490              </enumeratedValues>
34491            </field>
34492            <field>
34493              <name>BB4</name>
34494              <description>PDB Channel Pre-Trigger Back-to-Back Operation Enable</description>
34495              <bitOffset>20</bitOffset>
34496              <bitWidth>1</bitWidth>
34497              <access>read-write</access>
34498              <enumeratedValues>
34499                <enumeratedValue>
34500                  <name>0</name>
34501                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation disabled.</description>
34502                  <value>#0</value>
34503                </enumeratedValue>
34504                <enumeratedValue>
34505                  <name>1</name>
34506                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation enabled.</description>
34507                  <value>#1</value>
34508                </enumeratedValue>
34509              </enumeratedValues>
34510            </field>
34511            <field>
34512              <name>BB5</name>
34513              <description>PDB Channel Pre-Trigger Back-to-Back Operation Enable</description>
34514              <bitOffset>21</bitOffset>
34515              <bitWidth>1</bitWidth>
34516              <access>read-write</access>
34517              <enumeratedValues>
34518                <enumeratedValue>
34519                  <name>0</name>
34520                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation disabled.</description>
34521                  <value>#0</value>
34522                </enumeratedValue>
34523                <enumeratedValue>
34524                  <name>1</name>
34525                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation enabled.</description>
34526                  <value>#1</value>
34527                </enumeratedValue>
34528              </enumeratedValues>
34529            </field>
34530            <field>
34531              <name>BB6</name>
34532              <description>PDB Channel Pre-Trigger Back-to-Back Operation Enable</description>
34533              <bitOffset>22</bitOffset>
34534              <bitWidth>1</bitWidth>
34535              <access>read-write</access>
34536              <enumeratedValues>
34537                <enumeratedValue>
34538                  <name>0</name>
34539                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation disabled.</description>
34540                  <value>#0</value>
34541                </enumeratedValue>
34542                <enumeratedValue>
34543                  <name>1</name>
34544                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation enabled.</description>
34545                  <value>#1</value>
34546                </enumeratedValue>
34547              </enumeratedValues>
34548            </field>
34549            <field>
34550              <name>BB7</name>
34551              <description>PDB Channel Pre-Trigger Back-to-Back Operation Enable</description>
34552              <bitOffset>23</bitOffset>
34553              <bitWidth>1</bitWidth>
34554              <access>read-write</access>
34555              <enumeratedValues>
34556                <enumeratedValue>
34557                  <name>0</name>
34558                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation disabled.</description>
34559                  <value>#0</value>
34560                </enumeratedValue>
34561                <enumeratedValue>
34562                  <name>1</name>
34563                  <description>PDB channel&apos;s corresponding pre-trigger back-to-back operation enabled.</description>
34564                  <value>#1</value>
34565                </enumeratedValue>
34566              </enumeratedValues>
34567            </field>
34568          </fields>
34569        </register>
34570        <register>
34571          <name>CHS</name>
34572          <description>Channel n Status register</description>
34573          <addressOffset>0x14</addressOffset>
34574          <size>32</size>
34575          <access>read-write</access>
34576          <resetValue>0</resetValue>
34577          <resetMask>0xFFFFFFFF</resetMask>
34578          <fields>
34579            <field>
34580              <name>ERR0</name>
34581              <description>PDB Channel Sequence Error Flags</description>
34582              <bitOffset>0</bitOffset>
34583              <bitWidth>1</bitWidth>
34584              <access>read-write</access>
34585              <enumeratedValues>
34586                <enumeratedValue>
34587                  <name>0</name>
34588                  <description>Sequence error not detected on PDB channel&apos;s corresponding pre-trigger.</description>
34589                  <value>#0</value>
34590                </enumeratedValue>
34591                <enumeratedValue>
34592                  <name>1</name>
34593                  <description>Sequence error detected on PDB channel&apos;s corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel&apos;s corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0&apos;s to clear the sequence error flags.</description>
34594                  <value>#1</value>
34595                </enumeratedValue>
34596              </enumeratedValues>
34597            </field>
34598            <field>
34599              <name>ERR1</name>
34600              <description>PDB Channel Sequence Error Flags</description>
34601              <bitOffset>1</bitOffset>
34602              <bitWidth>1</bitWidth>
34603              <access>read-write</access>
34604              <enumeratedValues>
34605                <enumeratedValue>
34606                  <name>0</name>
34607                  <description>Sequence error not detected on PDB channel&apos;s corresponding pre-trigger.</description>
34608                  <value>#0</value>
34609                </enumeratedValue>
34610                <enumeratedValue>
34611                  <name>1</name>
34612                  <description>Sequence error detected on PDB channel&apos;s corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel&apos;s corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0&apos;s to clear the sequence error flags.</description>
34613                  <value>#1</value>
34614                </enumeratedValue>
34615              </enumeratedValues>
34616            </field>
34617            <field>
34618              <name>ERR2</name>
34619              <description>PDB Channel Sequence Error Flags</description>
34620              <bitOffset>2</bitOffset>
34621              <bitWidth>1</bitWidth>
34622              <access>read-write</access>
34623              <enumeratedValues>
34624                <enumeratedValue>
34625                  <name>0</name>
34626                  <description>Sequence error not detected on PDB channel&apos;s corresponding pre-trigger.</description>
34627                  <value>#0</value>
34628                </enumeratedValue>
34629                <enumeratedValue>
34630                  <name>1</name>
34631                  <description>Sequence error detected on PDB channel&apos;s corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel&apos;s corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0&apos;s to clear the sequence error flags.</description>
34632                  <value>#1</value>
34633                </enumeratedValue>
34634              </enumeratedValues>
34635            </field>
34636            <field>
34637              <name>ERR3</name>
34638              <description>PDB Channel Sequence Error Flags</description>
34639              <bitOffset>3</bitOffset>
34640              <bitWidth>1</bitWidth>
34641              <access>read-write</access>
34642              <enumeratedValues>
34643                <enumeratedValue>
34644                  <name>0</name>
34645                  <description>Sequence error not detected on PDB channel&apos;s corresponding pre-trigger.</description>
34646                  <value>#0</value>
34647                </enumeratedValue>
34648                <enumeratedValue>
34649                  <name>1</name>
34650                  <description>Sequence error detected on PDB channel&apos;s corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel&apos;s corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0&apos;s to clear the sequence error flags.</description>
34651                  <value>#1</value>
34652                </enumeratedValue>
34653              </enumeratedValues>
34654            </field>
34655            <field>
34656              <name>ERR4</name>
34657              <description>PDB Channel Sequence Error Flags</description>
34658              <bitOffset>4</bitOffset>
34659              <bitWidth>1</bitWidth>
34660              <access>read-write</access>
34661              <enumeratedValues>
34662                <enumeratedValue>
34663                  <name>0</name>
34664                  <description>Sequence error not detected on PDB channel&apos;s corresponding pre-trigger.</description>
34665                  <value>#0</value>
34666                </enumeratedValue>
34667                <enumeratedValue>
34668                  <name>1</name>
34669                  <description>Sequence error detected on PDB channel&apos;s corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel&apos;s corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0&apos;s to clear the sequence error flags.</description>
34670                  <value>#1</value>
34671                </enumeratedValue>
34672              </enumeratedValues>
34673            </field>
34674            <field>
34675              <name>ERR5</name>
34676              <description>PDB Channel Sequence Error Flags</description>
34677              <bitOffset>5</bitOffset>
34678              <bitWidth>1</bitWidth>
34679              <access>read-write</access>
34680              <enumeratedValues>
34681                <enumeratedValue>
34682                  <name>0</name>
34683                  <description>Sequence error not detected on PDB channel&apos;s corresponding pre-trigger.</description>
34684                  <value>#0</value>
34685                </enumeratedValue>
34686                <enumeratedValue>
34687                  <name>1</name>
34688                  <description>Sequence error detected on PDB channel&apos;s corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel&apos;s corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0&apos;s to clear the sequence error flags.</description>
34689                  <value>#1</value>
34690                </enumeratedValue>
34691              </enumeratedValues>
34692            </field>
34693            <field>
34694              <name>ERR6</name>
34695              <description>PDB Channel Sequence Error Flags</description>
34696              <bitOffset>6</bitOffset>
34697              <bitWidth>1</bitWidth>
34698              <access>read-write</access>
34699              <enumeratedValues>
34700                <enumeratedValue>
34701                  <name>0</name>
34702                  <description>Sequence error not detected on PDB channel&apos;s corresponding pre-trigger.</description>
34703                  <value>#0</value>
34704                </enumeratedValue>
34705                <enumeratedValue>
34706                  <name>1</name>
34707                  <description>Sequence error detected on PDB channel&apos;s corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel&apos;s corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0&apos;s to clear the sequence error flags.</description>
34708                  <value>#1</value>
34709                </enumeratedValue>
34710              </enumeratedValues>
34711            </field>
34712            <field>
34713              <name>ERR7</name>
34714              <description>PDB Channel Sequence Error Flags</description>
34715              <bitOffset>7</bitOffset>
34716              <bitWidth>1</bitWidth>
34717              <access>read-write</access>
34718              <enumeratedValues>
34719                <enumeratedValue>
34720                  <name>0</name>
34721                  <description>Sequence error not detected on PDB channel&apos;s corresponding pre-trigger.</description>
34722                  <value>#0</value>
34723                </enumeratedValue>
34724                <enumeratedValue>
34725                  <name>1</name>
34726                  <description>Sequence error detected on PDB channel&apos;s corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel&apos;s corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0&apos;s to clear the sequence error flags.</description>
34727                  <value>#1</value>
34728                </enumeratedValue>
34729              </enumeratedValues>
34730            </field>
34731            <field>
34732              <name>CF</name>
34733              <description>PDB Channel Flags</description>
34734              <bitOffset>16</bitOffset>
34735              <bitWidth>8</bitWidth>
34736              <access>read-write</access>
34737            </field>
34738          </fields>
34739        </register>
34740        <register>
34741          <name>CHDLY0</name>
34742          <description>Channel n Delay 0 register</description>
34743          <addressOffset>0x18</addressOffset>
34744          <size>32</size>
34745          <access>read-write</access>
34746          <resetValue>0</resetValue>
34747          <resetMask>0xFFFFFFFF</resetMask>
34748          <fields>
34749            <field>
34750              <name>DLY</name>
34751              <description>PDB Channel Delay</description>
34752              <bitOffset>0</bitOffset>
34753              <bitWidth>16</bitWidth>
34754              <access>read-write</access>
34755            </field>
34756          </fields>
34757        </register>
34758        <register>
34759          <name>CHDLY1</name>
34760          <description>Channel n Delay 1 register</description>
34761          <addressOffset>0x1C</addressOffset>
34762          <size>32</size>
34763          <access>read-write</access>
34764          <resetValue>0</resetValue>
34765          <resetMask>0xFFFFFFFF</resetMask>
34766          <fields>
34767            <field>
34768              <name>DLY</name>
34769              <description>PDB Channel Delay</description>
34770              <bitOffset>0</bitOffset>
34771              <bitWidth>16</bitWidth>
34772              <access>read-write</access>
34773            </field>
34774          </fields>
34775        </register>
34776        <register>
34777          <name>DACINTC</name>
34778          <description>DAC Interval Trigger n Control register</description>
34779          <addressOffset>0x150</addressOffset>
34780          <size>32</size>
34781          <access>read-write</access>
34782          <resetValue>0</resetValue>
34783          <resetMask>0xFFFFFFFF</resetMask>
34784          <fields>
34785            <field>
34786              <name>TOE</name>
34787              <description>DAC Interval Trigger Enable</description>
34788              <bitOffset>0</bitOffset>
34789              <bitWidth>1</bitWidth>
34790              <access>read-write</access>
34791              <enumeratedValues>
34792                <enumeratedValue>
34793                  <name>0</name>
34794                  <description>DAC interval trigger disabled.</description>
34795                  <value>#0</value>
34796                </enumeratedValue>
34797                <enumeratedValue>
34798                  <name>1</name>
34799                  <description>DAC interval trigger enabled.</description>
34800                  <value>#1</value>
34801                </enumeratedValue>
34802              </enumeratedValues>
34803            </field>
34804            <field>
34805              <name>EXT</name>
34806              <description>DAC External Trigger Input Enable</description>
34807              <bitOffset>1</bitOffset>
34808              <bitWidth>1</bitWidth>
34809              <access>read-write</access>
34810              <enumeratedValues>
34811                <enumeratedValue>
34812                  <name>0</name>
34813                  <description>DAC external trigger input disabled. DAC interval counter is reset and started counting when a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1.</description>
34814                  <value>#0</value>
34815                </enumeratedValue>
34816                <enumeratedValue>
34817                  <name>1</name>
34818                  <description>DAC external trigger input enabled. DAC interval counter is bypassed and DAC external trigger input triggers the DAC interval trigger.</description>
34819                  <value>#1</value>
34820                </enumeratedValue>
34821              </enumeratedValues>
34822            </field>
34823          </fields>
34824        </register>
34825        <register>
34826          <name>DACINT</name>
34827          <description>DAC Interval n register</description>
34828          <addressOffset>0x154</addressOffset>
34829          <size>32</size>
34830          <access>read-write</access>
34831          <resetValue>0</resetValue>
34832          <resetMask>0xFFFFFFFF</resetMask>
34833          <fields>
34834            <field>
34835              <name>INT</name>
34836              <description>DAC Interval</description>
34837              <bitOffset>0</bitOffset>
34838              <bitWidth>16</bitWidth>
34839              <access>read-write</access>
34840            </field>
34841          </fields>
34842        </register>
34843        <register>
34844          <name>POEN</name>
34845          <description>Pulse-Out n Enable register</description>
34846          <addressOffset>0x190</addressOffset>
34847          <size>32</size>
34848          <access>read-write</access>
34849          <resetValue>0</resetValue>
34850          <resetMask>0xFFFFFFFF</resetMask>
34851          <fields>
34852            <field>
34853              <name>POEN0</name>
34854              <description>PDB Pulse-Out Enable</description>
34855              <bitOffset>0</bitOffset>
34856              <bitWidth>1</bitWidth>
34857              <access>read-write</access>
34858              <enumeratedValues>
34859                <enumeratedValue>
34860                  <name>0</name>
34861                  <description>PDB Pulse-Out disabled</description>
34862                  <value>#0</value>
34863                </enumeratedValue>
34864                <enumeratedValue>
34865                  <name>1</name>
34866                  <description>PDB Pulse-Out enabled</description>
34867                  <value>#1</value>
34868                </enumeratedValue>
34869              </enumeratedValues>
34870            </field>
34871            <field>
34872              <name>POEN1</name>
34873              <description>PDB Pulse-Out Enable</description>
34874              <bitOffset>1</bitOffset>
34875              <bitWidth>1</bitWidth>
34876              <access>read-write</access>
34877              <enumeratedValues>
34878                <enumeratedValue>
34879                  <name>0</name>
34880                  <description>PDB Pulse-Out disabled</description>
34881                  <value>#0</value>
34882                </enumeratedValue>
34883                <enumeratedValue>
34884                  <name>1</name>
34885                  <description>PDB Pulse-Out enabled</description>
34886                  <value>#1</value>
34887                </enumeratedValue>
34888              </enumeratedValues>
34889            </field>
34890            <field>
34891              <name>POEN2</name>
34892              <description>PDB Pulse-Out Enable</description>
34893              <bitOffset>2</bitOffset>
34894              <bitWidth>1</bitWidth>
34895              <access>read-write</access>
34896              <enumeratedValues>
34897                <enumeratedValue>
34898                  <name>0</name>
34899                  <description>PDB Pulse-Out disabled</description>
34900                  <value>#0</value>
34901                </enumeratedValue>
34902                <enumeratedValue>
34903                  <name>1</name>
34904                  <description>PDB Pulse-Out enabled</description>
34905                  <value>#1</value>
34906                </enumeratedValue>
34907              </enumeratedValues>
34908            </field>
34909            <field>
34910              <name>POEN3</name>
34911              <description>PDB Pulse-Out Enable</description>
34912              <bitOffset>3</bitOffset>
34913              <bitWidth>1</bitWidth>
34914              <access>read-write</access>
34915              <enumeratedValues>
34916                <enumeratedValue>
34917                  <name>0</name>
34918                  <description>PDB Pulse-Out disabled</description>
34919                  <value>#0</value>
34920                </enumeratedValue>
34921                <enumeratedValue>
34922                  <name>1</name>
34923                  <description>PDB Pulse-Out enabled</description>
34924                  <value>#1</value>
34925                </enumeratedValue>
34926              </enumeratedValues>
34927            </field>
34928            <field>
34929              <name>POEN4</name>
34930              <description>PDB Pulse-Out Enable</description>
34931              <bitOffset>4</bitOffset>
34932              <bitWidth>1</bitWidth>
34933              <access>read-write</access>
34934              <enumeratedValues>
34935                <enumeratedValue>
34936                  <name>0</name>
34937                  <description>PDB Pulse-Out disabled</description>
34938                  <value>#0</value>
34939                </enumeratedValue>
34940                <enumeratedValue>
34941                  <name>1</name>
34942                  <description>PDB Pulse-Out enabled</description>
34943                  <value>#1</value>
34944                </enumeratedValue>
34945              </enumeratedValues>
34946            </field>
34947            <field>
34948              <name>POEN5</name>
34949              <description>PDB Pulse-Out Enable</description>
34950              <bitOffset>5</bitOffset>
34951              <bitWidth>1</bitWidth>
34952              <access>read-write</access>
34953              <enumeratedValues>
34954                <enumeratedValue>
34955                  <name>0</name>
34956                  <description>PDB Pulse-Out disabled</description>
34957                  <value>#0</value>
34958                </enumeratedValue>
34959                <enumeratedValue>
34960                  <name>1</name>
34961                  <description>PDB Pulse-Out enabled</description>
34962                  <value>#1</value>
34963                </enumeratedValue>
34964              </enumeratedValues>
34965            </field>
34966            <field>
34967              <name>POEN6</name>
34968              <description>PDB Pulse-Out Enable</description>
34969              <bitOffset>6</bitOffset>
34970              <bitWidth>1</bitWidth>
34971              <access>read-write</access>
34972              <enumeratedValues>
34973                <enumeratedValue>
34974                  <name>0</name>
34975                  <description>PDB Pulse-Out disabled</description>
34976                  <value>#0</value>
34977                </enumeratedValue>
34978                <enumeratedValue>
34979                  <name>1</name>
34980                  <description>PDB Pulse-Out enabled</description>
34981                  <value>#1</value>
34982                </enumeratedValue>
34983              </enumeratedValues>
34984            </field>
34985            <field>
34986              <name>POEN7</name>
34987              <description>PDB Pulse-Out Enable</description>
34988              <bitOffset>7</bitOffset>
34989              <bitWidth>1</bitWidth>
34990              <access>read-write</access>
34991              <enumeratedValues>
34992                <enumeratedValue>
34993                  <name>0</name>
34994                  <description>PDB Pulse-Out disabled</description>
34995                  <value>#0</value>
34996                </enumeratedValue>
34997                <enumeratedValue>
34998                  <name>1</name>
34999                  <description>PDB Pulse-Out enabled</description>
35000                  <value>#1</value>
35001                </enumeratedValue>
35002              </enumeratedValues>
35003            </field>
35004          </fields>
35005        </register>
35006        <register>
35007          <dim>2</dim>
35008          <dimIncrement>0x4</dimIncrement>
35009          <dimIndex>0,1</dimIndex>
35010          <name>PO%sDLY</name>
35011          <description>Pulse-Out n Delay register</description>
35012          <addressOffset>0x194</addressOffset>
35013          <size>32</size>
35014          <access>read-write</access>
35015          <resetValue>0</resetValue>
35016          <resetMask>0xFFFFFFFF</resetMask>
35017          <fields>
35018            <field>
35019              <name>DLY2</name>
35020              <description>PDB Pulse-Out Delay 2</description>
35021              <bitOffset>0</bitOffset>
35022              <bitWidth>16</bitWidth>
35023              <access>read-write</access>
35024            </field>
35025            <field>
35026              <name>DLY1</name>
35027              <description>PDB Pulse-Out Delay 1</description>
35028              <bitOffset>16</bitOffset>
35029              <bitWidth>16</bitWidth>
35030              <access>read-write</access>
35031            </field>
35032          </fields>
35033        </register>
35034      </registers>
35035    </peripheral>
35036    <peripheral>
35037      <name>PIT0</name>
35038      <description>Periodic Interrupt Timer</description>
35039      <prependToName>PIT0_</prependToName>
35040      <baseAddress>0x40037000</baseAddress>
35041      <addressBlock>
35042        <offset>0</offset>
35043        <size>0x140</size>
35044        <usage>registers</usage>
35045      </addressBlock>
35046      <interrupt>
35047        <name>PIT0CH0</name>
35048        <value>48</value>
35049      </interrupt>
35050      <interrupt>
35051        <name>PIT0CH1</name>
35052        <value>49</value>
35053      </interrupt>
35054      <interrupt>
35055        <name>PIT0CH2</name>
35056        <value>50</value>
35057      </interrupt>
35058      <interrupt>
35059        <name>PIT0CH3</name>
35060        <value>51</value>
35061      </interrupt>
35062      <registers>
35063        <register>
35064          <name>MCR</name>
35065          <description>PIT Module Control Register</description>
35066          <addressOffset>0</addressOffset>
35067          <size>32</size>
35068          <access>read-write</access>
35069          <resetValue>0x2</resetValue>
35070          <resetMask>0xFFFFFFFF</resetMask>
35071          <fields>
35072            <field>
35073              <name>FRZ</name>
35074              <description>Freeze</description>
35075              <bitOffset>0</bitOffset>
35076              <bitWidth>1</bitWidth>
35077              <access>read-write</access>
35078              <enumeratedValues>
35079                <enumeratedValue>
35080                  <name>0</name>
35081                  <description>Timers continue to run in Debug mode.</description>
35082                  <value>#0</value>
35083                </enumeratedValue>
35084                <enumeratedValue>
35085                  <name>1</name>
35086                  <description>Timers are stopped in Debug mode.</description>
35087                  <value>#1</value>
35088                </enumeratedValue>
35089              </enumeratedValues>
35090            </field>
35091            <field>
35092              <name>MDIS</name>
35093              <description>Module Disable - (PIT section)</description>
35094              <bitOffset>1</bitOffset>
35095              <bitWidth>1</bitWidth>
35096              <access>read-write</access>
35097              <enumeratedValues>
35098                <enumeratedValue>
35099                  <name>0</name>
35100                  <description>Clock for standard PIT timers is enabled.</description>
35101                  <value>#0</value>
35102                </enumeratedValue>
35103                <enumeratedValue>
35104                  <name>1</name>
35105                  <description>Clock for standard PIT timers is disabled.</description>
35106                  <value>#1</value>
35107                </enumeratedValue>
35108              </enumeratedValues>
35109            </field>
35110          </fields>
35111        </register>
35112        <register>
35113          <name>LTMR64H</name>
35114          <description>PIT Upper Lifetime Timer Register</description>
35115          <addressOffset>0xE0</addressOffset>
35116          <size>32</size>
35117          <access>read-only</access>
35118          <resetValue>0</resetValue>
35119          <resetMask>0xFFFFFFFF</resetMask>
35120          <fields>
35121            <field>
35122              <name>LTH</name>
35123              <description>Life Timer value</description>
35124              <bitOffset>0</bitOffset>
35125              <bitWidth>32</bitWidth>
35126              <access>read-only</access>
35127            </field>
35128          </fields>
35129        </register>
35130        <register>
35131          <name>LTMR64L</name>
35132          <description>PIT Lower Lifetime Timer Register</description>
35133          <addressOffset>0xE4</addressOffset>
35134          <size>32</size>
35135          <access>read-only</access>
35136          <resetValue>0</resetValue>
35137          <resetMask>0xFFFFFFFF</resetMask>
35138          <fields>
35139            <field>
35140              <name>LTL</name>
35141              <description>Life Timer value</description>
35142              <bitOffset>0</bitOffset>
35143              <bitWidth>32</bitWidth>
35144              <access>read-only</access>
35145            </field>
35146          </fields>
35147        </register>
35148        <register>
35149          <dim>4</dim>
35150          <dimIncrement>0x10</dimIncrement>
35151          <dimIndex>0,1,2,3</dimIndex>
35152          <name>LDVAL%s</name>
35153          <description>Timer Load Value Register</description>
35154          <addressOffset>0x100</addressOffset>
35155          <size>32</size>
35156          <access>read-write</access>
35157          <resetValue>0</resetValue>
35158          <resetMask>0xFFFFFFFF</resetMask>
35159          <fields>
35160            <field>
35161              <name>TSV</name>
35162              <description>Timer Start Value</description>
35163              <bitOffset>0</bitOffset>
35164              <bitWidth>32</bitWidth>
35165              <access>read-write</access>
35166            </field>
35167          </fields>
35168        </register>
35169        <register>
35170          <dim>4</dim>
35171          <dimIncrement>0x10</dimIncrement>
35172          <dimIndex>0,1,2,3</dimIndex>
35173          <name>CVAL%s</name>
35174          <description>Current Timer Value Register</description>
35175          <addressOffset>0x104</addressOffset>
35176          <size>32</size>
35177          <access>read-only</access>
35178          <resetValue>0</resetValue>
35179          <resetMask>0xFFFFFFFF</resetMask>
35180          <fields>
35181            <field>
35182              <name>TVL</name>
35183              <description>Current Timer Value</description>
35184              <bitOffset>0</bitOffset>
35185              <bitWidth>32</bitWidth>
35186              <access>read-only</access>
35187            </field>
35188          </fields>
35189        </register>
35190        <register>
35191          <dim>4</dim>
35192          <dimIncrement>0x10</dimIncrement>
35193          <dimIndex>0,1,2,3</dimIndex>
35194          <name>TCTRL%s</name>
35195          <description>Timer Control Register</description>
35196          <addressOffset>0x108</addressOffset>
35197          <size>32</size>
35198          <access>read-write</access>
35199          <resetValue>0</resetValue>
35200          <resetMask>0xFFFFFFFF</resetMask>
35201          <fields>
35202            <field>
35203              <name>TEN</name>
35204              <description>Timer Enable</description>
35205              <bitOffset>0</bitOffset>
35206              <bitWidth>1</bitWidth>
35207              <access>read-write</access>
35208              <enumeratedValues>
35209                <enumeratedValue>
35210                  <name>0</name>
35211                  <description>Timer n is disabled.</description>
35212                  <value>#0</value>
35213                </enumeratedValue>
35214                <enumeratedValue>
35215                  <name>1</name>
35216                  <description>Timer n is enabled.</description>
35217                  <value>#1</value>
35218                </enumeratedValue>
35219              </enumeratedValues>
35220            </field>
35221            <field>
35222              <name>TIE</name>
35223              <description>Timer Interrupt Enable</description>
35224              <bitOffset>1</bitOffset>
35225              <bitWidth>1</bitWidth>
35226              <access>read-write</access>
35227              <enumeratedValues>
35228                <enumeratedValue>
35229                  <name>0</name>
35230                  <description>Interrupt requests from Timer n are disabled.</description>
35231                  <value>#0</value>
35232                </enumeratedValue>
35233                <enumeratedValue>
35234                  <name>1</name>
35235                  <description>Interrupt will be requested whenever TIF is set.</description>
35236                  <value>#1</value>
35237                </enumeratedValue>
35238              </enumeratedValues>
35239            </field>
35240            <field>
35241              <name>CHN</name>
35242              <description>Chain Mode</description>
35243              <bitOffset>2</bitOffset>
35244              <bitWidth>1</bitWidth>
35245              <access>read-write</access>
35246              <enumeratedValues>
35247                <enumeratedValue>
35248                  <name>0</name>
35249                  <description>Timer is not chained.</description>
35250                  <value>#0</value>
35251                </enumeratedValue>
35252                <enumeratedValue>
35253                  <name>1</name>
35254                  <description>Timer is chained to previous timer. For example, for Channel 2, if this field is set, Timer 2 is chained to Timer 1.</description>
35255                  <value>#1</value>
35256                </enumeratedValue>
35257              </enumeratedValues>
35258            </field>
35259          </fields>
35260        </register>
35261        <register>
35262          <dim>4</dim>
35263          <dimIncrement>0x10</dimIncrement>
35264          <dimIndex>0,1,2,3</dimIndex>
35265          <name>TFLG%s</name>
35266          <description>Timer Flag Register</description>
35267          <addressOffset>0x10C</addressOffset>
35268          <size>32</size>
35269          <access>read-write</access>
35270          <resetValue>0</resetValue>
35271          <resetMask>0xFFFFFFFF</resetMask>
35272          <fields>
35273            <field>
35274              <name>TIF</name>
35275              <description>Timer Interrupt Flag</description>
35276              <bitOffset>0</bitOffset>
35277              <bitWidth>1</bitWidth>
35278              <access>read-write</access>
35279              <enumeratedValues>
35280                <enumeratedValue>
35281                  <name>0</name>
35282                  <description>Timeout has not yet occurred.</description>
35283                  <value>#0</value>
35284                </enumeratedValue>
35285                <enumeratedValue>
35286                  <name>1</name>
35287                  <description>Timeout has occurred.</description>
35288                  <value>#1</value>
35289                </enumeratedValue>
35290              </enumeratedValues>
35291            </field>
35292          </fields>
35293        </register>
35294      </registers>
35295    </peripheral>
35296    <peripheral>
35297      <name>FTM0</name>
35298      <description>FlexTimer Module</description>
35299      <groupName>FTM</groupName>
35300      <prependToName>FTM0_</prependToName>
35301      <baseAddress>0x40038000</baseAddress>
35302      <addressBlock>
35303        <offset>0</offset>
35304        <size>0x9C</size>
35305        <usage>registers</usage>
35306      </addressBlock>
35307      <interrupt>
35308        <name>FTM0</name>
35309        <value>42</value>
35310      </interrupt>
35311      <registers>
35312        <register>
35313          <name>SC</name>
35314          <description>Status And Control</description>
35315          <addressOffset>0</addressOffset>
35316          <size>32</size>
35317          <access>read-write</access>
35318          <resetValue>0</resetValue>
35319          <resetMask>0xFFFFFFFF</resetMask>
35320          <fields>
35321            <field>
35322              <name>PS</name>
35323              <description>Prescale Factor Selection</description>
35324              <bitOffset>0</bitOffset>
35325              <bitWidth>3</bitWidth>
35326              <access>read-write</access>
35327              <enumeratedValues>
35328                <enumeratedValue>
35329                  <name>000</name>
35330                  <description>Divide by 1</description>
35331                  <value>#000</value>
35332                </enumeratedValue>
35333                <enumeratedValue>
35334                  <name>001</name>
35335                  <description>Divide by 2</description>
35336                  <value>#001</value>
35337                </enumeratedValue>
35338                <enumeratedValue>
35339                  <name>010</name>
35340                  <description>Divide by 4</description>
35341                  <value>#010</value>
35342                </enumeratedValue>
35343                <enumeratedValue>
35344                  <name>011</name>
35345                  <description>Divide by 8</description>
35346                  <value>#011</value>
35347                </enumeratedValue>
35348                <enumeratedValue>
35349                  <name>100</name>
35350                  <description>Divide by 16</description>
35351                  <value>#100</value>
35352                </enumeratedValue>
35353                <enumeratedValue>
35354                  <name>101</name>
35355                  <description>Divide by 32</description>
35356                  <value>#101</value>
35357                </enumeratedValue>
35358                <enumeratedValue>
35359                  <name>110</name>
35360                  <description>Divide by 64</description>
35361                  <value>#110</value>
35362                </enumeratedValue>
35363                <enumeratedValue>
35364                  <name>111</name>
35365                  <description>Divide by 128</description>
35366                  <value>#111</value>
35367                </enumeratedValue>
35368              </enumeratedValues>
35369            </field>
35370            <field>
35371              <name>CLKS</name>
35372              <description>Clock Source Selection</description>
35373              <bitOffset>3</bitOffset>
35374              <bitWidth>2</bitWidth>
35375              <access>read-write</access>
35376              <enumeratedValues>
35377                <enumeratedValue>
35378                  <name>00</name>
35379                  <description>No clock selected. This in effect disables the FTM counter.</description>
35380                  <value>#00</value>
35381                </enumeratedValue>
35382                <enumeratedValue>
35383                  <name>01</name>
35384                  <description>System clock</description>
35385                  <value>#01</value>
35386                </enumeratedValue>
35387                <enumeratedValue>
35388                  <name>10</name>
35389                  <description>Fixed frequency clock</description>
35390                  <value>#10</value>
35391                </enumeratedValue>
35392                <enumeratedValue>
35393                  <name>11</name>
35394                  <description>External clock</description>
35395                  <value>#11</value>
35396                </enumeratedValue>
35397              </enumeratedValues>
35398            </field>
35399            <field>
35400              <name>CPWMS</name>
35401              <description>Center-Aligned PWM Select</description>
35402              <bitOffset>5</bitOffset>
35403              <bitWidth>1</bitWidth>
35404              <access>read-write</access>
35405              <enumeratedValues>
35406                <enumeratedValue>
35407                  <name>0</name>
35408                  <description>FTM counter operates in Up Counting mode.</description>
35409                  <value>#0</value>
35410                </enumeratedValue>
35411                <enumeratedValue>
35412                  <name>1</name>
35413                  <description>FTM counter operates in Up-Down Counting mode.</description>
35414                  <value>#1</value>
35415                </enumeratedValue>
35416              </enumeratedValues>
35417            </field>
35418            <field>
35419              <name>TOIE</name>
35420              <description>Timer Overflow Interrupt Enable</description>
35421              <bitOffset>6</bitOffset>
35422              <bitWidth>1</bitWidth>
35423              <access>read-write</access>
35424              <enumeratedValues>
35425                <enumeratedValue>
35426                  <name>0</name>
35427                  <description>Disable TOF interrupts. Use software polling.</description>
35428                  <value>#0</value>
35429                </enumeratedValue>
35430                <enumeratedValue>
35431                  <name>1</name>
35432                  <description>Enable TOF interrupts. An interrupt is generated when TOF equals one.</description>
35433                  <value>#1</value>
35434                </enumeratedValue>
35435              </enumeratedValues>
35436            </field>
35437            <field>
35438              <name>TOF</name>
35439              <description>Timer Overflow Flag</description>
35440              <bitOffset>7</bitOffset>
35441              <bitWidth>1</bitWidth>
35442              <access>read-write</access>
35443              <enumeratedValues>
35444                <enumeratedValue>
35445                  <name>0</name>
35446                  <description>FTM counter has not overflowed.</description>
35447                  <value>#0</value>
35448                </enumeratedValue>
35449                <enumeratedValue>
35450                  <name>1</name>
35451                  <description>FTM counter has overflowed.</description>
35452                  <value>#1</value>
35453                </enumeratedValue>
35454              </enumeratedValues>
35455            </field>
35456          </fields>
35457        </register>
35458        <register>
35459          <name>CNT</name>
35460          <description>Counter</description>
35461          <addressOffset>0x4</addressOffset>
35462          <size>32</size>
35463          <access>read-write</access>
35464          <resetValue>0</resetValue>
35465          <resetMask>0xFFFFFFFF</resetMask>
35466          <fields>
35467            <field>
35468              <name>COUNT</name>
35469              <description>Counter Value</description>
35470              <bitOffset>0</bitOffset>
35471              <bitWidth>16</bitWidth>
35472              <access>read-write</access>
35473            </field>
35474          </fields>
35475        </register>
35476        <register>
35477          <name>MOD</name>
35478          <description>Modulo</description>
35479          <addressOffset>0x8</addressOffset>
35480          <size>32</size>
35481          <access>read-write</access>
35482          <resetValue>0</resetValue>
35483          <resetMask>0xFFFFFFFF</resetMask>
35484          <fields>
35485            <field>
35486              <name>MOD</name>
35487              <description>Modulo Value</description>
35488              <bitOffset>0</bitOffset>
35489              <bitWidth>16</bitWidth>
35490              <access>read-write</access>
35491            </field>
35492          </fields>
35493        </register>
35494        <register>
35495          <dim>8</dim>
35496          <dimIncrement>0x8</dimIncrement>
35497          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
35498          <name>C%sSC</name>
35499          <description>Channel (n) Status And Control</description>
35500          <addressOffset>0xC</addressOffset>
35501          <size>32</size>
35502          <access>read-write</access>
35503          <resetValue>0</resetValue>
35504          <resetMask>0xFFFFFFFF</resetMask>
35505          <fields>
35506            <field>
35507              <name>DMA</name>
35508              <description>DMA Enable</description>
35509              <bitOffset>0</bitOffset>
35510              <bitWidth>1</bitWidth>
35511              <access>read-write</access>
35512              <enumeratedValues>
35513                <enumeratedValue>
35514                  <name>0</name>
35515                  <description>Disable DMA transfers.</description>
35516                  <value>#0</value>
35517                </enumeratedValue>
35518                <enumeratedValue>
35519                  <name>1</name>
35520                  <description>Enable DMA transfers.</description>
35521                  <value>#1</value>
35522                </enumeratedValue>
35523              </enumeratedValues>
35524            </field>
35525            <field>
35526              <name>ICRST</name>
35527              <description>FTM counter reset by the selected input capture event.</description>
35528              <bitOffset>1</bitOffset>
35529              <bitWidth>1</bitWidth>
35530              <access>read-write</access>
35531              <enumeratedValues>
35532                <enumeratedValue>
35533                  <name>0</name>
35534                  <description>FTM counter is not reset when the selected channel (n) input event is detected.</description>
35535                  <value>#0</value>
35536                </enumeratedValue>
35537                <enumeratedValue>
35538                  <name>1</name>
35539                  <description>FTM counter is reset when the selected channel (n) input event is detected.</description>
35540                  <value>#1</value>
35541                </enumeratedValue>
35542              </enumeratedValues>
35543            </field>
35544            <field>
35545              <name>ELSA</name>
35546              <description>Edge or Level Select</description>
35547              <bitOffset>2</bitOffset>
35548              <bitWidth>1</bitWidth>
35549              <access>read-write</access>
35550            </field>
35551            <field>
35552              <name>ELSB</name>
35553              <description>Edge or Level Select</description>
35554              <bitOffset>3</bitOffset>
35555              <bitWidth>1</bitWidth>
35556              <access>read-write</access>
35557            </field>
35558            <field>
35559              <name>MSA</name>
35560              <description>Channel Mode Select</description>
35561              <bitOffset>4</bitOffset>
35562              <bitWidth>1</bitWidth>
35563              <access>read-write</access>
35564            </field>
35565            <field>
35566              <name>MSB</name>
35567              <description>Channel Mode Select</description>
35568              <bitOffset>5</bitOffset>
35569              <bitWidth>1</bitWidth>
35570              <access>read-write</access>
35571            </field>
35572            <field>
35573              <name>CHIE</name>
35574              <description>Channel Interrupt Enable</description>
35575              <bitOffset>6</bitOffset>
35576              <bitWidth>1</bitWidth>
35577              <access>read-write</access>
35578              <enumeratedValues>
35579                <enumeratedValue>
35580                  <name>0</name>
35581                  <description>Disable channel interrupts. Use software polling.</description>
35582                  <value>#0</value>
35583                </enumeratedValue>
35584                <enumeratedValue>
35585                  <name>1</name>
35586                  <description>Enable channel interrupts.</description>
35587                  <value>#1</value>
35588                </enumeratedValue>
35589              </enumeratedValues>
35590            </field>
35591            <field>
35592              <name>CHF</name>
35593              <description>Channel Flag</description>
35594              <bitOffset>7</bitOffset>
35595              <bitWidth>1</bitWidth>
35596              <access>read-write</access>
35597              <enumeratedValues>
35598                <enumeratedValue>
35599                  <name>0</name>
35600                  <description>No channel event has occurred.</description>
35601                  <value>#0</value>
35602                </enumeratedValue>
35603                <enumeratedValue>
35604                  <name>1</name>
35605                  <description>A channel event has occurred.</description>
35606                  <value>#1</value>
35607                </enumeratedValue>
35608              </enumeratedValues>
35609            </field>
35610          </fields>
35611        </register>
35612        <register>
35613          <dim>8</dim>
35614          <dimIncrement>0x8</dimIncrement>
35615          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
35616          <name>C%sV</name>
35617          <description>Channel (n) Value</description>
35618          <addressOffset>0x10</addressOffset>
35619          <size>32</size>
35620          <access>read-write</access>
35621          <resetValue>0</resetValue>
35622          <resetMask>0xFFFFFFFF</resetMask>
35623          <fields>
35624            <field>
35625              <name>VAL</name>
35626              <description>Channel Value</description>
35627              <bitOffset>0</bitOffset>
35628              <bitWidth>16</bitWidth>
35629              <access>read-write</access>
35630            </field>
35631          </fields>
35632        </register>
35633        <register>
35634          <name>CNTIN</name>
35635          <description>Counter Initial Value</description>
35636          <addressOffset>0x4C</addressOffset>
35637          <size>32</size>
35638          <access>read-write</access>
35639          <resetValue>0</resetValue>
35640          <resetMask>0xFFFFFFFF</resetMask>
35641          <fields>
35642            <field>
35643              <name>INIT</name>
35644              <description>Initial Value Of The FTM Counter</description>
35645              <bitOffset>0</bitOffset>
35646              <bitWidth>16</bitWidth>
35647              <access>read-write</access>
35648            </field>
35649          </fields>
35650        </register>
35651        <register>
35652          <name>STATUS</name>
35653          <description>Capture And Compare Status</description>
35654          <addressOffset>0x50</addressOffset>
35655          <size>32</size>
35656          <access>read-write</access>
35657          <resetValue>0</resetValue>
35658          <resetMask>0xFFFFFFFF</resetMask>
35659          <fields>
35660            <field>
35661              <name>CH0F</name>
35662              <description>Channel 0 Flag</description>
35663              <bitOffset>0</bitOffset>
35664              <bitWidth>1</bitWidth>
35665              <access>read-write</access>
35666              <enumeratedValues>
35667                <enumeratedValue>
35668                  <name>0</name>
35669                  <description>No channel event has occurred.</description>
35670                  <value>#0</value>
35671                </enumeratedValue>
35672                <enumeratedValue>
35673                  <name>1</name>
35674                  <description>A channel event has occurred.</description>
35675                  <value>#1</value>
35676                </enumeratedValue>
35677              </enumeratedValues>
35678            </field>
35679            <field>
35680              <name>CH1F</name>
35681              <description>Channel 1 Flag</description>
35682              <bitOffset>1</bitOffset>
35683              <bitWidth>1</bitWidth>
35684              <access>read-write</access>
35685              <enumeratedValues>
35686                <enumeratedValue>
35687                  <name>0</name>
35688                  <description>No channel event has occurred.</description>
35689                  <value>#0</value>
35690                </enumeratedValue>
35691                <enumeratedValue>
35692                  <name>1</name>
35693                  <description>A channel event has occurred.</description>
35694                  <value>#1</value>
35695                </enumeratedValue>
35696              </enumeratedValues>
35697            </field>
35698            <field>
35699              <name>CH2F</name>
35700              <description>Channel 2 Flag</description>
35701              <bitOffset>2</bitOffset>
35702              <bitWidth>1</bitWidth>
35703              <access>read-write</access>
35704              <enumeratedValues>
35705                <enumeratedValue>
35706                  <name>0</name>
35707                  <description>No channel event has occurred.</description>
35708                  <value>#0</value>
35709                </enumeratedValue>
35710                <enumeratedValue>
35711                  <name>1</name>
35712                  <description>A channel event has occurred.</description>
35713                  <value>#1</value>
35714                </enumeratedValue>
35715              </enumeratedValues>
35716            </field>
35717            <field>
35718              <name>CH3F</name>
35719              <description>Channel 3 Flag</description>
35720              <bitOffset>3</bitOffset>
35721              <bitWidth>1</bitWidth>
35722              <access>read-write</access>
35723              <enumeratedValues>
35724                <enumeratedValue>
35725                  <name>0</name>
35726                  <description>No channel event has occurred.</description>
35727                  <value>#0</value>
35728                </enumeratedValue>
35729                <enumeratedValue>
35730                  <name>1</name>
35731                  <description>A channel event has occurred.</description>
35732                  <value>#1</value>
35733                </enumeratedValue>
35734              </enumeratedValues>
35735            </field>
35736            <field>
35737              <name>CH4F</name>
35738              <description>Channel 4 Flag</description>
35739              <bitOffset>4</bitOffset>
35740              <bitWidth>1</bitWidth>
35741              <access>read-write</access>
35742              <enumeratedValues>
35743                <enumeratedValue>
35744                  <name>0</name>
35745                  <description>No channel event has occurred.</description>
35746                  <value>#0</value>
35747                </enumeratedValue>
35748                <enumeratedValue>
35749                  <name>1</name>
35750                  <description>A channel event has occurred.</description>
35751                  <value>#1</value>
35752                </enumeratedValue>
35753              </enumeratedValues>
35754            </field>
35755            <field>
35756              <name>CH5F</name>
35757              <description>Channel 5 Flag</description>
35758              <bitOffset>5</bitOffset>
35759              <bitWidth>1</bitWidth>
35760              <access>read-write</access>
35761              <enumeratedValues>
35762                <enumeratedValue>
35763                  <name>0</name>
35764                  <description>No channel event has occurred.</description>
35765                  <value>#0</value>
35766                </enumeratedValue>
35767                <enumeratedValue>
35768                  <name>1</name>
35769                  <description>A channel event has occurred.</description>
35770                  <value>#1</value>
35771                </enumeratedValue>
35772              </enumeratedValues>
35773            </field>
35774            <field>
35775              <name>CH6F</name>
35776              <description>Channel 6 Flag</description>
35777              <bitOffset>6</bitOffset>
35778              <bitWidth>1</bitWidth>
35779              <access>read-write</access>
35780              <enumeratedValues>
35781                <enumeratedValue>
35782                  <name>0</name>
35783                  <description>No channel event has occurred.</description>
35784                  <value>#0</value>
35785                </enumeratedValue>
35786                <enumeratedValue>
35787                  <name>1</name>
35788                  <description>A channel event has occurred.</description>
35789                  <value>#1</value>
35790                </enumeratedValue>
35791              </enumeratedValues>
35792            </field>
35793            <field>
35794              <name>CH7F</name>
35795              <description>Channel 7 Flag</description>
35796              <bitOffset>7</bitOffset>
35797              <bitWidth>1</bitWidth>
35798              <access>read-write</access>
35799              <enumeratedValues>
35800                <enumeratedValue>
35801                  <name>0</name>
35802                  <description>No channel event has occurred.</description>
35803                  <value>#0</value>
35804                </enumeratedValue>
35805                <enumeratedValue>
35806                  <name>1</name>
35807                  <description>A channel event has occurred.</description>
35808                  <value>#1</value>
35809                </enumeratedValue>
35810              </enumeratedValues>
35811            </field>
35812          </fields>
35813        </register>
35814        <register>
35815          <name>MODE</name>
35816          <description>Features Mode Selection</description>
35817          <addressOffset>0x54</addressOffset>
35818          <size>32</size>
35819          <access>read-write</access>
35820          <resetValue>0x4</resetValue>
35821          <resetMask>0xFFFFFFFF</resetMask>
35822          <fields>
35823            <field>
35824              <name>FTMEN</name>
35825              <description>FTM Enable</description>
35826              <bitOffset>0</bitOffset>
35827              <bitWidth>1</bitWidth>
35828              <access>read-write</access>
35829              <enumeratedValues>
35830                <enumeratedValue>
35831                  <name>0</name>
35832                  <description>TPM compatibility. Free running counter and synchronization compatible with TPM.</description>
35833                  <value>#0</value>
35834                </enumeratedValue>
35835                <enumeratedValue>
35836                  <name>1</name>
35837                  <description>Free running counter and synchronization are different from TPM behavior.</description>
35838                  <value>#1</value>
35839                </enumeratedValue>
35840              </enumeratedValues>
35841            </field>
35842            <field>
35843              <name>INIT</name>
35844              <description>Initialize The Channels Output</description>
35845              <bitOffset>1</bitOffset>
35846              <bitWidth>1</bitWidth>
35847              <access>read-write</access>
35848            </field>
35849            <field>
35850              <name>WPDIS</name>
35851              <description>Write Protection Disable</description>
35852              <bitOffset>2</bitOffset>
35853              <bitWidth>1</bitWidth>
35854              <access>read-write</access>
35855              <enumeratedValues>
35856                <enumeratedValue>
35857                  <name>0</name>
35858                  <description>Write protection is enabled.</description>
35859                  <value>#0</value>
35860                </enumeratedValue>
35861                <enumeratedValue>
35862                  <name>1</name>
35863                  <description>Write protection is disabled.</description>
35864                  <value>#1</value>
35865                </enumeratedValue>
35866              </enumeratedValues>
35867            </field>
35868            <field>
35869              <name>PWMSYNC</name>
35870              <description>PWM Synchronization Mode</description>
35871              <bitOffset>3</bitOffset>
35872              <bitWidth>1</bitWidth>
35873              <access>read-write</access>
35874              <enumeratedValues>
35875                <enumeratedValue>
35876                  <name>0</name>
35877                  <description>No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization.</description>
35878                  <value>#0</value>
35879                </enumeratedValue>
35880                <enumeratedValue>
35881                  <name>1</name>
35882                  <description>Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization.</description>
35883                  <value>#1</value>
35884                </enumeratedValue>
35885              </enumeratedValues>
35886            </field>
35887            <field>
35888              <name>CAPTEST</name>
35889              <description>Capture Test Mode Enable</description>
35890              <bitOffset>4</bitOffset>
35891              <bitWidth>1</bitWidth>
35892              <access>read-write</access>
35893              <enumeratedValues>
35894                <enumeratedValue>
35895                  <name>0</name>
35896                  <description>Capture test mode is disabled.</description>
35897                  <value>#0</value>
35898                </enumeratedValue>
35899                <enumeratedValue>
35900                  <name>1</name>
35901                  <description>Capture test mode is enabled.</description>
35902                  <value>#1</value>
35903                </enumeratedValue>
35904              </enumeratedValues>
35905            </field>
35906            <field>
35907              <name>FAULTM</name>
35908              <description>Fault Control Mode</description>
35909              <bitOffset>5</bitOffset>
35910              <bitWidth>2</bitWidth>
35911              <access>read-write</access>
35912              <enumeratedValues>
35913                <enumeratedValue>
35914                  <name>00</name>
35915                  <description>Fault control is disabled for all channels.</description>
35916                  <value>#00</value>
35917                </enumeratedValue>
35918                <enumeratedValue>
35919                  <name>01</name>
35920                  <description>Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing.</description>
35921                  <value>#01</value>
35922                </enumeratedValue>
35923                <enumeratedValue>
35924                  <name>10</name>
35925                  <description>Fault control is enabled for all channels, and the selected mode is the manual fault clearing.</description>
35926                  <value>#10</value>
35927                </enumeratedValue>
35928                <enumeratedValue>
35929                  <name>11</name>
35930                  <description>Fault control is enabled for all channels, and the selected mode is the automatic fault clearing.</description>
35931                  <value>#11</value>
35932                </enumeratedValue>
35933              </enumeratedValues>
35934            </field>
35935            <field>
35936              <name>FAULTIE</name>
35937              <description>Fault Interrupt Enable</description>
35938              <bitOffset>7</bitOffset>
35939              <bitWidth>1</bitWidth>
35940              <access>read-write</access>
35941              <enumeratedValues>
35942                <enumeratedValue>
35943                  <name>0</name>
35944                  <description>Fault control interrupt is disabled.</description>
35945                  <value>#0</value>
35946                </enumeratedValue>
35947                <enumeratedValue>
35948                  <name>1</name>
35949                  <description>Fault control interrupt is enabled.</description>
35950                  <value>#1</value>
35951                </enumeratedValue>
35952              </enumeratedValues>
35953            </field>
35954          </fields>
35955        </register>
35956        <register>
35957          <name>SYNC</name>
35958          <description>Synchronization</description>
35959          <addressOffset>0x58</addressOffset>
35960          <size>32</size>
35961          <access>read-write</access>
35962          <resetValue>0</resetValue>
35963          <resetMask>0xFFFFFFFF</resetMask>
35964          <fields>
35965            <field>
35966              <name>CNTMIN</name>
35967              <description>Minimum Loading Point Enable</description>
35968              <bitOffset>0</bitOffset>
35969              <bitWidth>1</bitWidth>
35970              <access>read-write</access>
35971              <enumeratedValues>
35972                <enumeratedValue>
35973                  <name>0</name>
35974                  <description>The minimum loading point is disabled.</description>
35975                  <value>#0</value>
35976                </enumeratedValue>
35977                <enumeratedValue>
35978                  <name>1</name>
35979                  <description>The minimum loading point is enabled.</description>
35980                  <value>#1</value>
35981                </enumeratedValue>
35982              </enumeratedValues>
35983            </field>
35984            <field>
35985              <name>CNTMAX</name>
35986              <description>Maximum Loading Point Enable</description>
35987              <bitOffset>1</bitOffset>
35988              <bitWidth>1</bitWidth>
35989              <access>read-write</access>
35990              <enumeratedValues>
35991                <enumeratedValue>
35992                  <name>0</name>
35993                  <description>The maximum loading point is disabled.</description>
35994                  <value>#0</value>
35995                </enumeratedValue>
35996                <enumeratedValue>
35997                  <name>1</name>
35998                  <description>The maximum loading point is enabled.</description>
35999                  <value>#1</value>
36000                </enumeratedValue>
36001              </enumeratedValues>
36002            </field>
36003            <field>
36004              <name>REINIT</name>
36005              <description>FTM Counter Reinitialization By Synchronization (FTM counter synchronization)</description>
36006              <bitOffset>2</bitOffset>
36007              <bitWidth>1</bitWidth>
36008              <access>read-write</access>
36009              <enumeratedValues>
36010                <enumeratedValue>
36011                  <name>0</name>
36012                  <description>FTM counter continues to count normally.</description>
36013                  <value>#0</value>
36014                </enumeratedValue>
36015                <enumeratedValue>
36016                  <name>1</name>
36017                  <description>FTM counter is updated with its initial value when the selected trigger is detected.</description>
36018                  <value>#1</value>
36019                </enumeratedValue>
36020              </enumeratedValues>
36021            </field>
36022            <field>
36023              <name>SYNCHOM</name>
36024              <description>Output Mask Synchronization</description>
36025              <bitOffset>3</bitOffset>
36026              <bitWidth>1</bitWidth>
36027              <access>read-write</access>
36028              <enumeratedValues>
36029                <enumeratedValue>
36030                  <name>0</name>
36031                  <description>OUTMASK register is updated with the value of its buffer in all rising edges of the system clock.</description>
36032                  <value>#0</value>
36033                </enumeratedValue>
36034                <enumeratedValue>
36035                  <name>1</name>
36036                  <description>OUTMASK register is updated with the value of its buffer only by the PWM synchronization.</description>
36037                  <value>#1</value>
36038                </enumeratedValue>
36039              </enumeratedValues>
36040            </field>
36041            <field>
36042              <name>TRIG0</name>
36043              <description>PWM Synchronization Hardware Trigger 0</description>
36044              <bitOffset>4</bitOffset>
36045              <bitWidth>1</bitWidth>
36046              <access>read-write</access>
36047              <enumeratedValues>
36048                <enumeratedValue>
36049                  <name>0</name>
36050                  <description>Trigger is disabled.</description>
36051                  <value>#0</value>
36052                </enumeratedValue>
36053                <enumeratedValue>
36054                  <name>1</name>
36055                  <description>Trigger is enabled.</description>
36056                  <value>#1</value>
36057                </enumeratedValue>
36058              </enumeratedValues>
36059            </field>
36060            <field>
36061              <name>TRIG1</name>
36062              <description>PWM Synchronization Hardware Trigger 1</description>
36063              <bitOffset>5</bitOffset>
36064              <bitWidth>1</bitWidth>
36065              <access>read-write</access>
36066              <enumeratedValues>
36067                <enumeratedValue>
36068                  <name>0</name>
36069                  <description>Trigger is disabled.</description>
36070                  <value>#0</value>
36071                </enumeratedValue>
36072                <enumeratedValue>
36073                  <name>1</name>
36074                  <description>Trigger is enabled.</description>
36075                  <value>#1</value>
36076                </enumeratedValue>
36077              </enumeratedValues>
36078            </field>
36079            <field>
36080              <name>TRIG2</name>
36081              <description>PWM Synchronization Hardware Trigger 2</description>
36082              <bitOffset>6</bitOffset>
36083              <bitWidth>1</bitWidth>
36084              <access>read-write</access>
36085              <enumeratedValues>
36086                <enumeratedValue>
36087                  <name>0</name>
36088                  <description>Trigger is disabled.</description>
36089                  <value>#0</value>
36090                </enumeratedValue>
36091                <enumeratedValue>
36092                  <name>1</name>
36093                  <description>Trigger is enabled.</description>
36094                  <value>#1</value>
36095                </enumeratedValue>
36096              </enumeratedValues>
36097            </field>
36098            <field>
36099              <name>SWSYNC</name>
36100              <description>PWM Synchronization Software Trigger</description>
36101              <bitOffset>7</bitOffset>
36102              <bitWidth>1</bitWidth>
36103              <access>read-write</access>
36104              <enumeratedValues>
36105                <enumeratedValue>
36106                  <name>0</name>
36107                  <description>Software trigger is not selected.</description>
36108                  <value>#0</value>
36109                </enumeratedValue>
36110                <enumeratedValue>
36111                  <name>1</name>
36112                  <description>Software trigger is selected.</description>
36113                  <value>#1</value>
36114                </enumeratedValue>
36115              </enumeratedValues>
36116            </field>
36117          </fields>
36118        </register>
36119        <register>
36120          <name>OUTINIT</name>
36121          <description>Initial State For Channels Output</description>
36122          <addressOffset>0x5C</addressOffset>
36123          <size>32</size>
36124          <access>read-write</access>
36125          <resetValue>0</resetValue>
36126          <resetMask>0xFFFFFFFF</resetMask>
36127          <fields>
36128            <field>
36129              <name>CH0OI</name>
36130              <description>Channel 0 Output Initialization Value</description>
36131              <bitOffset>0</bitOffset>
36132              <bitWidth>1</bitWidth>
36133              <access>read-write</access>
36134              <enumeratedValues>
36135                <enumeratedValue>
36136                  <name>0</name>
36137                  <description>The initialization value is 0.</description>
36138                  <value>#0</value>
36139                </enumeratedValue>
36140                <enumeratedValue>
36141                  <name>1</name>
36142                  <description>The initialization value is 1.</description>
36143                  <value>#1</value>
36144                </enumeratedValue>
36145              </enumeratedValues>
36146            </field>
36147            <field>
36148              <name>CH1OI</name>
36149              <description>Channel 1 Output Initialization Value</description>
36150              <bitOffset>1</bitOffset>
36151              <bitWidth>1</bitWidth>
36152              <access>read-write</access>
36153              <enumeratedValues>
36154                <enumeratedValue>
36155                  <name>0</name>
36156                  <description>The initialization value is 0.</description>
36157                  <value>#0</value>
36158                </enumeratedValue>
36159                <enumeratedValue>
36160                  <name>1</name>
36161                  <description>The initialization value is 1.</description>
36162                  <value>#1</value>
36163                </enumeratedValue>
36164              </enumeratedValues>
36165            </field>
36166            <field>
36167              <name>CH2OI</name>
36168              <description>Channel 2 Output Initialization Value</description>
36169              <bitOffset>2</bitOffset>
36170              <bitWidth>1</bitWidth>
36171              <access>read-write</access>
36172              <enumeratedValues>
36173                <enumeratedValue>
36174                  <name>0</name>
36175                  <description>The initialization value is 0.</description>
36176                  <value>#0</value>
36177                </enumeratedValue>
36178                <enumeratedValue>
36179                  <name>1</name>
36180                  <description>The initialization value is 1.</description>
36181                  <value>#1</value>
36182                </enumeratedValue>
36183              </enumeratedValues>
36184            </field>
36185            <field>
36186              <name>CH3OI</name>
36187              <description>Channel 3 Output Initialization Value</description>
36188              <bitOffset>3</bitOffset>
36189              <bitWidth>1</bitWidth>
36190              <access>read-write</access>
36191              <enumeratedValues>
36192                <enumeratedValue>
36193                  <name>0</name>
36194                  <description>The initialization value is 0.</description>
36195                  <value>#0</value>
36196                </enumeratedValue>
36197                <enumeratedValue>
36198                  <name>1</name>
36199                  <description>The initialization value is 1.</description>
36200                  <value>#1</value>
36201                </enumeratedValue>
36202              </enumeratedValues>
36203            </field>
36204            <field>
36205              <name>CH4OI</name>
36206              <description>Channel 4 Output Initialization Value</description>
36207              <bitOffset>4</bitOffset>
36208              <bitWidth>1</bitWidth>
36209              <access>read-write</access>
36210              <enumeratedValues>
36211                <enumeratedValue>
36212                  <name>0</name>
36213                  <description>The initialization value is 0.</description>
36214                  <value>#0</value>
36215                </enumeratedValue>
36216                <enumeratedValue>
36217                  <name>1</name>
36218                  <description>The initialization value is 1.</description>
36219                  <value>#1</value>
36220                </enumeratedValue>
36221              </enumeratedValues>
36222            </field>
36223            <field>
36224              <name>CH5OI</name>
36225              <description>Channel 5 Output Initialization Value</description>
36226              <bitOffset>5</bitOffset>
36227              <bitWidth>1</bitWidth>
36228              <access>read-write</access>
36229              <enumeratedValues>
36230                <enumeratedValue>
36231                  <name>0</name>
36232                  <description>The initialization value is 0.</description>
36233                  <value>#0</value>
36234                </enumeratedValue>
36235                <enumeratedValue>
36236                  <name>1</name>
36237                  <description>The initialization value is 1.</description>
36238                  <value>#1</value>
36239                </enumeratedValue>
36240              </enumeratedValues>
36241            </field>
36242            <field>
36243              <name>CH6OI</name>
36244              <description>Channel 6 Output Initialization Value</description>
36245              <bitOffset>6</bitOffset>
36246              <bitWidth>1</bitWidth>
36247              <access>read-write</access>
36248              <enumeratedValues>
36249                <enumeratedValue>
36250                  <name>0</name>
36251                  <description>The initialization value is 0.</description>
36252                  <value>#0</value>
36253                </enumeratedValue>
36254                <enumeratedValue>
36255                  <name>1</name>
36256                  <description>The initialization value is 1.</description>
36257                  <value>#1</value>
36258                </enumeratedValue>
36259              </enumeratedValues>
36260            </field>
36261            <field>
36262              <name>CH7OI</name>
36263              <description>Channel 7 Output Initialization Value</description>
36264              <bitOffset>7</bitOffset>
36265              <bitWidth>1</bitWidth>
36266              <access>read-write</access>
36267              <enumeratedValues>
36268                <enumeratedValue>
36269                  <name>0</name>
36270                  <description>The initialization value is 0.</description>
36271                  <value>#0</value>
36272                </enumeratedValue>
36273                <enumeratedValue>
36274                  <name>1</name>
36275                  <description>The initialization value is 1.</description>
36276                  <value>#1</value>
36277                </enumeratedValue>
36278              </enumeratedValues>
36279            </field>
36280          </fields>
36281        </register>
36282        <register>
36283          <name>OUTMASK</name>
36284          <description>Output Mask</description>
36285          <addressOffset>0x60</addressOffset>
36286          <size>32</size>
36287          <access>read-write</access>
36288          <resetValue>0</resetValue>
36289          <resetMask>0xFFFFFFFF</resetMask>
36290          <fields>
36291            <field>
36292              <name>CH0OM</name>
36293              <description>Channel 0 Output Mask</description>
36294              <bitOffset>0</bitOffset>
36295              <bitWidth>1</bitWidth>
36296              <access>read-write</access>
36297              <enumeratedValues>
36298                <enumeratedValue>
36299                  <name>0</name>
36300                  <description>Channel output is not masked. It continues to operate normally.</description>
36301                  <value>#0</value>
36302                </enumeratedValue>
36303                <enumeratedValue>
36304                  <name>1</name>
36305                  <description>Channel output is masked. It is forced to its inactive state.</description>
36306                  <value>#1</value>
36307                </enumeratedValue>
36308              </enumeratedValues>
36309            </field>
36310            <field>
36311              <name>CH1OM</name>
36312              <description>Channel 1 Output Mask</description>
36313              <bitOffset>1</bitOffset>
36314              <bitWidth>1</bitWidth>
36315              <access>read-write</access>
36316              <enumeratedValues>
36317                <enumeratedValue>
36318                  <name>0</name>
36319                  <description>Channel output is not masked. It continues to operate normally.</description>
36320                  <value>#0</value>
36321                </enumeratedValue>
36322                <enumeratedValue>
36323                  <name>1</name>
36324                  <description>Channel output is masked. It is forced to its inactive state.</description>
36325                  <value>#1</value>
36326                </enumeratedValue>
36327              </enumeratedValues>
36328            </field>
36329            <field>
36330              <name>CH2OM</name>
36331              <description>Channel 2 Output Mask</description>
36332              <bitOffset>2</bitOffset>
36333              <bitWidth>1</bitWidth>
36334              <access>read-write</access>
36335              <enumeratedValues>
36336                <enumeratedValue>
36337                  <name>0</name>
36338                  <description>Channel output is not masked. It continues to operate normally.</description>
36339                  <value>#0</value>
36340                </enumeratedValue>
36341                <enumeratedValue>
36342                  <name>1</name>
36343                  <description>Channel output is masked. It is forced to its inactive state.</description>
36344                  <value>#1</value>
36345                </enumeratedValue>
36346              </enumeratedValues>
36347            </field>
36348            <field>
36349              <name>CH3OM</name>
36350              <description>Channel 3 Output Mask</description>
36351              <bitOffset>3</bitOffset>
36352              <bitWidth>1</bitWidth>
36353              <access>read-write</access>
36354              <enumeratedValues>
36355                <enumeratedValue>
36356                  <name>0</name>
36357                  <description>Channel output is not masked. It continues to operate normally.</description>
36358                  <value>#0</value>
36359                </enumeratedValue>
36360                <enumeratedValue>
36361                  <name>1</name>
36362                  <description>Channel output is masked. It is forced to its inactive state.</description>
36363                  <value>#1</value>
36364                </enumeratedValue>
36365              </enumeratedValues>
36366            </field>
36367            <field>
36368              <name>CH4OM</name>
36369              <description>Channel 4 Output Mask</description>
36370              <bitOffset>4</bitOffset>
36371              <bitWidth>1</bitWidth>
36372              <access>read-write</access>
36373              <enumeratedValues>
36374                <enumeratedValue>
36375                  <name>0</name>
36376                  <description>Channel output is not masked. It continues to operate normally.</description>
36377                  <value>#0</value>
36378                </enumeratedValue>
36379                <enumeratedValue>
36380                  <name>1</name>
36381                  <description>Channel output is masked. It is forced to its inactive state.</description>
36382                  <value>#1</value>
36383                </enumeratedValue>
36384              </enumeratedValues>
36385            </field>
36386            <field>
36387              <name>CH5OM</name>
36388              <description>Channel 5 Output Mask</description>
36389              <bitOffset>5</bitOffset>
36390              <bitWidth>1</bitWidth>
36391              <access>read-write</access>
36392              <enumeratedValues>
36393                <enumeratedValue>
36394                  <name>0</name>
36395                  <description>Channel output is not masked. It continues to operate normally.</description>
36396                  <value>#0</value>
36397                </enumeratedValue>
36398                <enumeratedValue>
36399                  <name>1</name>
36400                  <description>Channel output is masked. It is forced to its inactive state.</description>
36401                  <value>#1</value>
36402                </enumeratedValue>
36403              </enumeratedValues>
36404            </field>
36405            <field>
36406              <name>CH6OM</name>
36407              <description>Channel 6 Output Mask</description>
36408              <bitOffset>6</bitOffset>
36409              <bitWidth>1</bitWidth>
36410              <access>read-write</access>
36411              <enumeratedValues>
36412                <enumeratedValue>
36413                  <name>0</name>
36414                  <description>Channel output is not masked. It continues to operate normally.</description>
36415                  <value>#0</value>
36416                </enumeratedValue>
36417                <enumeratedValue>
36418                  <name>1</name>
36419                  <description>Channel output is masked. It is forced to its inactive state.</description>
36420                  <value>#1</value>
36421                </enumeratedValue>
36422              </enumeratedValues>
36423            </field>
36424            <field>
36425              <name>CH7OM</name>
36426              <description>Channel 7 Output Mask</description>
36427              <bitOffset>7</bitOffset>
36428              <bitWidth>1</bitWidth>
36429              <access>read-write</access>
36430              <enumeratedValues>
36431                <enumeratedValue>
36432                  <name>0</name>
36433                  <description>Channel output is not masked. It continues to operate normally.</description>
36434                  <value>#0</value>
36435                </enumeratedValue>
36436                <enumeratedValue>
36437                  <name>1</name>
36438                  <description>Channel output is masked. It is forced to its inactive state.</description>
36439                  <value>#1</value>
36440                </enumeratedValue>
36441              </enumeratedValues>
36442            </field>
36443          </fields>
36444        </register>
36445        <register>
36446          <name>COMBINE</name>
36447          <description>Function For Linked Channels</description>
36448          <addressOffset>0x64</addressOffset>
36449          <size>32</size>
36450          <access>read-write</access>
36451          <resetValue>0</resetValue>
36452          <resetMask>0xFFFFFFFF</resetMask>
36453          <fields>
36454            <field>
36455              <name>COMBINE0</name>
36456              <description>Combine Channels For n = 0</description>
36457              <bitOffset>0</bitOffset>
36458              <bitWidth>1</bitWidth>
36459              <access>read-write</access>
36460              <enumeratedValues>
36461                <enumeratedValue>
36462                  <name>0</name>
36463                  <description>Channels (n) and (n+1) are independent.</description>
36464                  <value>#0</value>
36465                </enumeratedValue>
36466                <enumeratedValue>
36467                  <name>1</name>
36468                  <description>Channels (n) and (n+1) are combined.</description>
36469                  <value>#1</value>
36470                </enumeratedValue>
36471              </enumeratedValues>
36472            </field>
36473            <field>
36474              <name>COMP0</name>
36475              <description>Complement Of Channel (n) For n = 0</description>
36476              <bitOffset>1</bitOffset>
36477              <bitWidth>1</bitWidth>
36478              <access>read-write</access>
36479              <enumeratedValues>
36480                <enumeratedValue>
36481                  <name>0</name>
36482                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
36483                  <value>#0</value>
36484                </enumeratedValue>
36485                <enumeratedValue>
36486                  <name>1</name>
36487                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
36488                  <value>#1</value>
36489                </enumeratedValue>
36490              </enumeratedValues>
36491            </field>
36492            <field>
36493              <name>DECAPEN0</name>
36494              <description>Dual Edge Capture Mode Enable For n = 0</description>
36495              <bitOffset>2</bitOffset>
36496              <bitWidth>1</bitWidth>
36497              <access>read-write</access>
36498              <enumeratedValues>
36499                <enumeratedValue>
36500                  <name>0</name>
36501                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
36502                  <value>#0</value>
36503                </enumeratedValue>
36504                <enumeratedValue>
36505                  <name>1</name>
36506                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
36507                  <value>#1</value>
36508                </enumeratedValue>
36509              </enumeratedValues>
36510            </field>
36511            <field>
36512              <name>DECAP0</name>
36513              <description>Dual Edge Capture Mode Captures For n = 0</description>
36514              <bitOffset>3</bitOffset>
36515              <bitWidth>1</bitWidth>
36516              <access>read-write</access>
36517              <enumeratedValues>
36518                <enumeratedValue>
36519                  <name>0</name>
36520                  <description>The dual edge captures are inactive.</description>
36521                  <value>#0</value>
36522                </enumeratedValue>
36523                <enumeratedValue>
36524                  <name>1</name>
36525                  <description>The dual edge captures are active.</description>
36526                  <value>#1</value>
36527                </enumeratedValue>
36528              </enumeratedValues>
36529            </field>
36530            <field>
36531              <name>DTEN0</name>
36532              <description>Deadtime Enable For n = 0</description>
36533              <bitOffset>4</bitOffset>
36534              <bitWidth>1</bitWidth>
36535              <access>read-write</access>
36536              <enumeratedValues>
36537                <enumeratedValue>
36538                  <name>0</name>
36539                  <description>The deadtime insertion in this pair of channels is disabled.</description>
36540                  <value>#0</value>
36541                </enumeratedValue>
36542                <enumeratedValue>
36543                  <name>1</name>
36544                  <description>The deadtime insertion in this pair of channels is enabled.</description>
36545                  <value>#1</value>
36546                </enumeratedValue>
36547              </enumeratedValues>
36548            </field>
36549            <field>
36550              <name>SYNCEN0</name>
36551              <description>Synchronization Enable For n = 0</description>
36552              <bitOffset>5</bitOffset>
36553              <bitWidth>1</bitWidth>
36554              <access>read-write</access>
36555              <enumeratedValues>
36556                <enumeratedValue>
36557                  <name>0</name>
36558                  <description>The PWM synchronization in this pair of channels is disabled.</description>
36559                  <value>#0</value>
36560                </enumeratedValue>
36561                <enumeratedValue>
36562                  <name>1</name>
36563                  <description>The PWM synchronization in this pair of channels is enabled.</description>
36564                  <value>#1</value>
36565                </enumeratedValue>
36566              </enumeratedValues>
36567            </field>
36568            <field>
36569              <name>FAULTEN0</name>
36570              <description>Fault Control Enable For n = 0</description>
36571              <bitOffset>6</bitOffset>
36572              <bitWidth>1</bitWidth>
36573              <access>read-write</access>
36574              <enumeratedValues>
36575                <enumeratedValue>
36576                  <name>0</name>
36577                  <description>The fault control in this pair of channels is disabled.</description>
36578                  <value>#0</value>
36579                </enumeratedValue>
36580                <enumeratedValue>
36581                  <name>1</name>
36582                  <description>The fault control in this pair of channels is enabled.</description>
36583                  <value>#1</value>
36584                </enumeratedValue>
36585              </enumeratedValues>
36586            </field>
36587            <field>
36588              <name>COMBINE1</name>
36589              <description>Combine Channels For n = 2</description>
36590              <bitOffset>8</bitOffset>
36591              <bitWidth>1</bitWidth>
36592              <access>read-write</access>
36593              <enumeratedValues>
36594                <enumeratedValue>
36595                  <name>0</name>
36596                  <description>Channels (n) and (n+1) are independent.</description>
36597                  <value>#0</value>
36598                </enumeratedValue>
36599                <enumeratedValue>
36600                  <name>1</name>
36601                  <description>Channels (n) and (n+1) are combined.</description>
36602                  <value>#1</value>
36603                </enumeratedValue>
36604              </enumeratedValues>
36605            </field>
36606            <field>
36607              <name>COMP1</name>
36608              <description>Complement Of Channel (n) For n = 2</description>
36609              <bitOffset>9</bitOffset>
36610              <bitWidth>1</bitWidth>
36611              <access>read-write</access>
36612              <enumeratedValues>
36613                <enumeratedValue>
36614                  <name>0</name>
36615                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
36616                  <value>#0</value>
36617                </enumeratedValue>
36618                <enumeratedValue>
36619                  <name>1</name>
36620                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
36621                  <value>#1</value>
36622                </enumeratedValue>
36623              </enumeratedValues>
36624            </field>
36625            <field>
36626              <name>DECAPEN1</name>
36627              <description>Dual Edge Capture Mode Enable For n = 2</description>
36628              <bitOffset>10</bitOffset>
36629              <bitWidth>1</bitWidth>
36630              <access>read-write</access>
36631              <enumeratedValues>
36632                <enumeratedValue>
36633                  <name>0</name>
36634                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
36635                  <value>#0</value>
36636                </enumeratedValue>
36637                <enumeratedValue>
36638                  <name>1</name>
36639                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
36640                  <value>#1</value>
36641                </enumeratedValue>
36642              </enumeratedValues>
36643            </field>
36644            <field>
36645              <name>DECAP1</name>
36646              <description>Dual Edge Capture Mode Captures For n = 2</description>
36647              <bitOffset>11</bitOffset>
36648              <bitWidth>1</bitWidth>
36649              <access>read-write</access>
36650              <enumeratedValues>
36651                <enumeratedValue>
36652                  <name>0</name>
36653                  <description>The dual edge captures are inactive.</description>
36654                  <value>#0</value>
36655                </enumeratedValue>
36656                <enumeratedValue>
36657                  <name>1</name>
36658                  <description>The dual edge captures are active.</description>
36659                  <value>#1</value>
36660                </enumeratedValue>
36661              </enumeratedValues>
36662            </field>
36663            <field>
36664              <name>DTEN1</name>
36665              <description>Deadtime Enable For n = 2</description>
36666              <bitOffset>12</bitOffset>
36667              <bitWidth>1</bitWidth>
36668              <access>read-write</access>
36669              <enumeratedValues>
36670                <enumeratedValue>
36671                  <name>0</name>
36672                  <description>The deadtime insertion in this pair of channels is disabled.</description>
36673                  <value>#0</value>
36674                </enumeratedValue>
36675                <enumeratedValue>
36676                  <name>1</name>
36677                  <description>The deadtime insertion in this pair of channels is enabled.</description>
36678                  <value>#1</value>
36679                </enumeratedValue>
36680              </enumeratedValues>
36681            </field>
36682            <field>
36683              <name>SYNCEN1</name>
36684              <description>Synchronization Enable For n = 2</description>
36685              <bitOffset>13</bitOffset>
36686              <bitWidth>1</bitWidth>
36687              <access>read-write</access>
36688              <enumeratedValues>
36689                <enumeratedValue>
36690                  <name>0</name>
36691                  <description>The PWM synchronization in this pair of channels is disabled.</description>
36692                  <value>#0</value>
36693                </enumeratedValue>
36694                <enumeratedValue>
36695                  <name>1</name>
36696                  <description>The PWM synchronization in this pair of channels is enabled.</description>
36697                  <value>#1</value>
36698                </enumeratedValue>
36699              </enumeratedValues>
36700            </field>
36701            <field>
36702              <name>FAULTEN1</name>
36703              <description>Fault Control Enable For n = 2</description>
36704              <bitOffset>14</bitOffset>
36705              <bitWidth>1</bitWidth>
36706              <access>read-write</access>
36707              <enumeratedValues>
36708                <enumeratedValue>
36709                  <name>0</name>
36710                  <description>The fault control in this pair of channels is disabled.</description>
36711                  <value>#0</value>
36712                </enumeratedValue>
36713                <enumeratedValue>
36714                  <name>1</name>
36715                  <description>The fault control in this pair of channels is enabled.</description>
36716                  <value>#1</value>
36717                </enumeratedValue>
36718              </enumeratedValues>
36719            </field>
36720            <field>
36721              <name>COMBINE2</name>
36722              <description>Combine Channels For n = 4</description>
36723              <bitOffset>16</bitOffset>
36724              <bitWidth>1</bitWidth>
36725              <access>read-write</access>
36726              <enumeratedValues>
36727                <enumeratedValue>
36728                  <name>0</name>
36729                  <description>Channels (n) and (n+1) are independent.</description>
36730                  <value>#0</value>
36731                </enumeratedValue>
36732                <enumeratedValue>
36733                  <name>1</name>
36734                  <description>Channels (n) and (n+1) are combined.</description>
36735                  <value>#1</value>
36736                </enumeratedValue>
36737              </enumeratedValues>
36738            </field>
36739            <field>
36740              <name>COMP2</name>
36741              <description>Complement Of Channel (n) For n = 4</description>
36742              <bitOffset>17</bitOffset>
36743              <bitWidth>1</bitWidth>
36744              <access>read-write</access>
36745              <enumeratedValues>
36746                <enumeratedValue>
36747                  <name>0</name>
36748                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
36749                  <value>#0</value>
36750                </enumeratedValue>
36751                <enumeratedValue>
36752                  <name>1</name>
36753                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
36754                  <value>#1</value>
36755                </enumeratedValue>
36756              </enumeratedValues>
36757            </field>
36758            <field>
36759              <name>DECAPEN2</name>
36760              <description>Dual Edge Capture Mode Enable For n = 4</description>
36761              <bitOffset>18</bitOffset>
36762              <bitWidth>1</bitWidth>
36763              <access>read-write</access>
36764              <enumeratedValues>
36765                <enumeratedValue>
36766                  <name>0</name>
36767                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
36768                  <value>#0</value>
36769                </enumeratedValue>
36770                <enumeratedValue>
36771                  <name>1</name>
36772                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
36773                  <value>#1</value>
36774                </enumeratedValue>
36775              </enumeratedValues>
36776            </field>
36777            <field>
36778              <name>DECAP2</name>
36779              <description>Dual Edge Capture Mode Captures For n = 4</description>
36780              <bitOffset>19</bitOffset>
36781              <bitWidth>1</bitWidth>
36782              <access>read-write</access>
36783              <enumeratedValues>
36784                <enumeratedValue>
36785                  <name>0</name>
36786                  <description>The dual edge captures are inactive.</description>
36787                  <value>#0</value>
36788                </enumeratedValue>
36789                <enumeratedValue>
36790                  <name>1</name>
36791                  <description>The dual edge captures are active.</description>
36792                  <value>#1</value>
36793                </enumeratedValue>
36794              </enumeratedValues>
36795            </field>
36796            <field>
36797              <name>DTEN2</name>
36798              <description>Deadtime Enable For n = 4</description>
36799              <bitOffset>20</bitOffset>
36800              <bitWidth>1</bitWidth>
36801              <access>read-write</access>
36802              <enumeratedValues>
36803                <enumeratedValue>
36804                  <name>0</name>
36805                  <description>The deadtime insertion in this pair of channels is disabled.</description>
36806                  <value>#0</value>
36807                </enumeratedValue>
36808                <enumeratedValue>
36809                  <name>1</name>
36810                  <description>The deadtime insertion in this pair of channels is enabled.</description>
36811                  <value>#1</value>
36812                </enumeratedValue>
36813              </enumeratedValues>
36814            </field>
36815            <field>
36816              <name>SYNCEN2</name>
36817              <description>Synchronization Enable For n = 4</description>
36818              <bitOffset>21</bitOffset>
36819              <bitWidth>1</bitWidth>
36820              <access>read-write</access>
36821              <enumeratedValues>
36822                <enumeratedValue>
36823                  <name>0</name>
36824                  <description>The PWM synchronization in this pair of channels is disabled.</description>
36825                  <value>#0</value>
36826                </enumeratedValue>
36827                <enumeratedValue>
36828                  <name>1</name>
36829                  <description>The PWM synchronization in this pair of channels is enabled.</description>
36830                  <value>#1</value>
36831                </enumeratedValue>
36832              </enumeratedValues>
36833            </field>
36834            <field>
36835              <name>FAULTEN2</name>
36836              <description>Fault Control Enable For n = 4</description>
36837              <bitOffset>22</bitOffset>
36838              <bitWidth>1</bitWidth>
36839              <access>read-write</access>
36840              <enumeratedValues>
36841                <enumeratedValue>
36842                  <name>0</name>
36843                  <description>The fault control in this pair of channels is disabled.</description>
36844                  <value>#0</value>
36845                </enumeratedValue>
36846                <enumeratedValue>
36847                  <name>1</name>
36848                  <description>The fault control in this pair of channels is enabled.</description>
36849                  <value>#1</value>
36850                </enumeratedValue>
36851              </enumeratedValues>
36852            </field>
36853            <field>
36854              <name>COMBINE3</name>
36855              <description>Combine Channels For n = 6</description>
36856              <bitOffset>24</bitOffset>
36857              <bitWidth>1</bitWidth>
36858              <access>read-write</access>
36859              <enumeratedValues>
36860                <enumeratedValue>
36861                  <name>0</name>
36862                  <description>Channels (n) and (n+1) are independent.</description>
36863                  <value>#0</value>
36864                </enumeratedValue>
36865                <enumeratedValue>
36866                  <name>1</name>
36867                  <description>Channels (n) and (n+1) are combined.</description>
36868                  <value>#1</value>
36869                </enumeratedValue>
36870              </enumeratedValues>
36871            </field>
36872            <field>
36873              <name>COMP3</name>
36874              <description>Complement Of Channel (n) for n = 6</description>
36875              <bitOffset>25</bitOffset>
36876              <bitWidth>1</bitWidth>
36877              <access>read-write</access>
36878              <enumeratedValues>
36879                <enumeratedValue>
36880                  <name>0</name>
36881                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
36882                  <value>#0</value>
36883                </enumeratedValue>
36884                <enumeratedValue>
36885                  <name>1</name>
36886                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
36887                  <value>#1</value>
36888                </enumeratedValue>
36889              </enumeratedValues>
36890            </field>
36891            <field>
36892              <name>DECAPEN3</name>
36893              <description>Dual Edge Capture Mode Enable For n = 6</description>
36894              <bitOffset>26</bitOffset>
36895              <bitWidth>1</bitWidth>
36896              <access>read-write</access>
36897              <enumeratedValues>
36898                <enumeratedValue>
36899                  <name>0</name>
36900                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
36901                  <value>#0</value>
36902                </enumeratedValue>
36903                <enumeratedValue>
36904                  <name>1</name>
36905                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
36906                  <value>#1</value>
36907                </enumeratedValue>
36908              </enumeratedValues>
36909            </field>
36910            <field>
36911              <name>DECAP3</name>
36912              <description>Dual Edge Capture Mode Captures For n = 6</description>
36913              <bitOffset>27</bitOffset>
36914              <bitWidth>1</bitWidth>
36915              <access>read-write</access>
36916              <enumeratedValues>
36917                <enumeratedValue>
36918                  <name>0</name>
36919                  <description>The dual edge captures are inactive.</description>
36920                  <value>#0</value>
36921                </enumeratedValue>
36922                <enumeratedValue>
36923                  <name>1</name>
36924                  <description>The dual edge captures are active.</description>
36925                  <value>#1</value>
36926                </enumeratedValue>
36927              </enumeratedValues>
36928            </field>
36929            <field>
36930              <name>DTEN3</name>
36931              <description>Deadtime Enable For n = 6</description>
36932              <bitOffset>28</bitOffset>
36933              <bitWidth>1</bitWidth>
36934              <access>read-write</access>
36935              <enumeratedValues>
36936                <enumeratedValue>
36937                  <name>0</name>
36938                  <description>The deadtime insertion in this pair of channels is disabled.</description>
36939                  <value>#0</value>
36940                </enumeratedValue>
36941                <enumeratedValue>
36942                  <name>1</name>
36943                  <description>The deadtime insertion in this pair of channels is enabled.</description>
36944                  <value>#1</value>
36945                </enumeratedValue>
36946              </enumeratedValues>
36947            </field>
36948            <field>
36949              <name>SYNCEN3</name>
36950              <description>Synchronization Enable For n = 6</description>
36951              <bitOffset>29</bitOffset>
36952              <bitWidth>1</bitWidth>
36953              <access>read-write</access>
36954              <enumeratedValues>
36955                <enumeratedValue>
36956                  <name>0</name>
36957                  <description>The PWM synchronization in this pair of channels is disabled.</description>
36958                  <value>#0</value>
36959                </enumeratedValue>
36960                <enumeratedValue>
36961                  <name>1</name>
36962                  <description>The PWM synchronization in this pair of channels is enabled.</description>
36963                  <value>#1</value>
36964                </enumeratedValue>
36965              </enumeratedValues>
36966            </field>
36967            <field>
36968              <name>FAULTEN3</name>
36969              <description>Fault Control Enable For n = 6</description>
36970              <bitOffset>30</bitOffset>
36971              <bitWidth>1</bitWidth>
36972              <access>read-write</access>
36973              <enumeratedValues>
36974                <enumeratedValue>
36975                  <name>0</name>
36976                  <description>The fault control in this pair of channels is disabled.</description>
36977                  <value>#0</value>
36978                </enumeratedValue>
36979                <enumeratedValue>
36980                  <name>1</name>
36981                  <description>The fault control in this pair of channels is enabled.</description>
36982                  <value>#1</value>
36983                </enumeratedValue>
36984              </enumeratedValues>
36985            </field>
36986          </fields>
36987        </register>
36988        <register>
36989          <name>DEADTIME</name>
36990          <description>Deadtime Insertion Control</description>
36991          <addressOffset>0x68</addressOffset>
36992          <size>32</size>
36993          <access>read-write</access>
36994          <resetValue>0</resetValue>
36995          <resetMask>0xFFFFFFFF</resetMask>
36996          <fields>
36997            <field>
36998              <name>DTVAL</name>
36999              <description>Deadtime Value</description>
37000              <bitOffset>0</bitOffset>
37001              <bitWidth>6</bitWidth>
37002              <access>read-write</access>
37003            </field>
37004            <field>
37005              <name>DTPS</name>
37006              <description>Deadtime Prescaler Value</description>
37007              <bitOffset>6</bitOffset>
37008              <bitWidth>2</bitWidth>
37009              <access>read-write</access>
37010              <enumeratedValues>
37011                <enumeratedValue>
37012                  <name>10</name>
37013                  <description>Divide the system clock by 4.</description>
37014                  <value>#10</value>
37015                </enumeratedValue>
37016                <enumeratedValue>
37017                  <name>11</name>
37018                  <description>Divide the system clock by 16.</description>
37019                  <value>#11</value>
37020                </enumeratedValue>
37021              </enumeratedValues>
37022            </field>
37023          </fields>
37024        </register>
37025        <register>
37026          <name>EXTTRIG</name>
37027          <description>FTM External Trigger</description>
37028          <addressOffset>0x6C</addressOffset>
37029          <size>32</size>
37030          <access>read-write</access>
37031          <resetValue>0</resetValue>
37032          <resetMask>0xFFFFFFFF</resetMask>
37033          <fields>
37034            <field>
37035              <name>CH2TRIG</name>
37036              <description>Channel 2 Trigger Enable</description>
37037              <bitOffset>0</bitOffset>
37038              <bitWidth>1</bitWidth>
37039              <access>read-write</access>
37040              <enumeratedValues>
37041                <enumeratedValue>
37042                  <name>0</name>
37043                  <description>The generation of the channel trigger is disabled.</description>
37044                  <value>#0</value>
37045                </enumeratedValue>
37046                <enumeratedValue>
37047                  <name>1</name>
37048                  <description>The generation of the channel trigger is enabled.</description>
37049                  <value>#1</value>
37050                </enumeratedValue>
37051              </enumeratedValues>
37052            </field>
37053            <field>
37054              <name>CH3TRIG</name>
37055              <description>Channel 3 Trigger Enable</description>
37056              <bitOffset>1</bitOffset>
37057              <bitWidth>1</bitWidth>
37058              <access>read-write</access>
37059              <enumeratedValues>
37060                <enumeratedValue>
37061                  <name>0</name>
37062                  <description>The generation of the channel trigger is disabled.</description>
37063                  <value>#0</value>
37064                </enumeratedValue>
37065                <enumeratedValue>
37066                  <name>1</name>
37067                  <description>The generation of the channel trigger is enabled.</description>
37068                  <value>#1</value>
37069                </enumeratedValue>
37070              </enumeratedValues>
37071            </field>
37072            <field>
37073              <name>CH4TRIG</name>
37074              <description>Channel 4 Trigger Enable</description>
37075              <bitOffset>2</bitOffset>
37076              <bitWidth>1</bitWidth>
37077              <access>read-write</access>
37078              <enumeratedValues>
37079                <enumeratedValue>
37080                  <name>0</name>
37081                  <description>The generation of the channel trigger is disabled.</description>
37082                  <value>#0</value>
37083                </enumeratedValue>
37084                <enumeratedValue>
37085                  <name>1</name>
37086                  <description>The generation of the channel trigger is enabled.</description>
37087                  <value>#1</value>
37088                </enumeratedValue>
37089              </enumeratedValues>
37090            </field>
37091            <field>
37092              <name>CH5TRIG</name>
37093              <description>Channel 5 Trigger Enable</description>
37094              <bitOffset>3</bitOffset>
37095              <bitWidth>1</bitWidth>
37096              <access>read-write</access>
37097              <enumeratedValues>
37098                <enumeratedValue>
37099                  <name>0</name>
37100                  <description>The generation of the channel trigger is disabled.</description>
37101                  <value>#0</value>
37102                </enumeratedValue>
37103                <enumeratedValue>
37104                  <name>1</name>
37105                  <description>The generation of the channel trigger is enabled.</description>
37106                  <value>#1</value>
37107                </enumeratedValue>
37108              </enumeratedValues>
37109            </field>
37110            <field>
37111              <name>CH0TRIG</name>
37112              <description>Channel 0 Trigger Enable</description>
37113              <bitOffset>4</bitOffset>
37114              <bitWidth>1</bitWidth>
37115              <access>read-write</access>
37116              <enumeratedValues>
37117                <enumeratedValue>
37118                  <name>0</name>
37119                  <description>The generation of the channel trigger is disabled.</description>
37120                  <value>#0</value>
37121                </enumeratedValue>
37122                <enumeratedValue>
37123                  <name>1</name>
37124                  <description>The generation of the channel trigger is enabled.</description>
37125                  <value>#1</value>
37126                </enumeratedValue>
37127              </enumeratedValues>
37128            </field>
37129            <field>
37130              <name>CH1TRIG</name>
37131              <description>Channel 1 Trigger Enable</description>
37132              <bitOffset>5</bitOffset>
37133              <bitWidth>1</bitWidth>
37134              <access>read-write</access>
37135              <enumeratedValues>
37136                <enumeratedValue>
37137                  <name>0</name>
37138                  <description>The generation of the channel trigger is disabled.</description>
37139                  <value>#0</value>
37140                </enumeratedValue>
37141                <enumeratedValue>
37142                  <name>1</name>
37143                  <description>The generation of the channel trigger is enabled.</description>
37144                  <value>#1</value>
37145                </enumeratedValue>
37146              </enumeratedValues>
37147            </field>
37148            <field>
37149              <name>INITTRIGEN</name>
37150              <description>Initialization Trigger Enable</description>
37151              <bitOffset>6</bitOffset>
37152              <bitWidth>1</bitWidth>
37153              <access>read-write</access>
37154              <enumeratedValues>
37155                <enumeratedValue>
37156                  <name>0</name>
37157                  <description>The generation of initialization trigger is disabled.</description>
37158                  <value>#0</value>
37159                </enumeratedValue>
37160                <enumeratedValue>
37161                  <name>1</name>
37162                  <description>The generation of initialization trigger is enabled.</description>
37163                  <value>#1</value>
37164                </enumeratedValue>
37165              </enumeratedValues>
37166            </field>
37167            <field>
37168              <name>TRIGF</name>
37169              <description>Channel Trigger Flag</description>
37170              <bitOffset>7</bitOffset>
37171              <bitWidth>1</bitWidth>
37172              <access>read-write</access>
37173              <enumeratedValues>
37174                <enumeratedValue>
37175                  <name>0</name>
37176                  <description>No channel trigger was generated.</description>
37177                  <value>#0</value>
37178                </enumeratedValue>
37179                <enumeratedValue>
37180                  <name>1</name>
37181                  <description>A channel trigger was generated.</description>
37182                  <value>#1</value>
37183                </enumeratedValue>
37184              </enumeratedValues>
37185            </field>
37186          </fields>
37187        </register>
37188        <register>
37189          <name>POL</name>
37190          <description>Channels Polarity</description>
37191          <addressOffset>0x70</addressOffset>
37192          <size>32</size>
37193          <access>read-write</access>
37194          <resetValue>0</resetValue>
37195          <resetMask>0xFFFFFFFF</resetMask>
37196          <fields>
37197            <field>
37198              <name>POL0</name>
37199              <description>Channel 0 Polarity</description>
37200              <bitOffset>0</bitOffset>
37201              <bitWidth>1</bitWidth>
37202              <access>read-write</access>
37203              <enumeratedValues>
37204                <enumeratedValue>
37205                  <name>0</name>
37206                  <description>The channel polarity is active high.</description>
37207                  <value>#0</value>
37208                </enumeratedValue>
37209                <enumeratedValue>
37210                  <name>1</name>
37211                  <description>The channel polarity is active low.</description>
37212                  <value>#1</value>
37213                </enumeratedValue>
37214              </enumeratedValues>
37215            </field>
37216            <field>
37217              <name>POL1</name>
37218              <description>Channel 1 Polarity</description>
37219              <bitOffset>1</bitOffset>
37220              <bitWidth>1</bitWidth>
37221              <access>read-write</access>
37222              <enumeratedValues>
37223                <enumeratedValue>
37224                  <name>0</name>
37225                  <description>The channel polarity is active high.</description>
37226                  <value>#0</value>
37227                </enumeratedValue>
37228                <enumeratedValue>
37229                  <name>1</name>
37230                  <description>The channel polarity is active low.</description>
37231                  <value>#1</value>
37232                </enumeratedValue>
37233              </enumeratedValues>
37234            </field>
37235            <field>
37236              <name>POL2</name>
37237              <description>Channel 2 Polarity</description>
37238              <bitOffset>2</bitOffset>
37239              <bitWidth>1</bitWidth>
37240              <access>read-write</access>
37241              <enumeratedValues>
37242                <enumeratedValue>
37243                  <name>0</name>
37244                  <description>The channel polarity is active high.</description>
37245                  <value>#0</value>
37246                </enumeratedValue>
37247                <enumeratedValue>
37248                  <name>1</name>
37249                  <description>The channel polarity is active low.</description>
37250                  <value>#1</value>
37251                </enumeratedValue>
37252              </enumeratedValues>
37253            </field>
37254            <field>
37255              <name>POL3</name>
37256              <description>Channel 3 Polarity</description>
37257              <bitOffset>3</bitOffset>
37258              <bitWidth>1</bitWidth>
37259              <access>read-write</access>
37260              <enumeratedValues>
37261                <enumeratedValue>
37262                  <name>0</name>
37263                  <description>The channel polarity is active high.</description>
37264                  <value>#0</value>
37265                </enumeratedValue>
37266                <enumeratedValue>
37267                  <name>1</name>
37268                  <description>The channel polarity is active low.</description>
37269                  <value>#1</value>
37270                </enumeratedValue>
37271              </enumeratedValues>
37272            </field>
37273            <field>
37274              <name>POL4</name>
37275              <description>Channel 4 Polarity</description>
37276              <bitOffset>4</bitOffset>
37277              <bitWidth>1</bitWidth>
37278              <access>read-write</access>
37279              <enumeratedValues>
37280                <enumeratedValue>
37281                  <name>0</name>
37282                  <description>The channel polarity is active high.</description>
37283                  <value>#0</value>
37284                </enumeratedValue>
37285                <enumeratedValue>
37286                  <name>1</name>
37287                  <description>The channel polarity is active low.</description>
37288                  <value>#1</value>
37289                </enumeratedValue>
37290              </enumeratedValues>
37291            </field>
37292            <field>
37293              <name>POL5</name>
37294              <description>Channel 5 Polarity</description>
37295              <bitOffset>5</bitOffset>
37296              <bitWidth>1</bitWidth>
37297              <access>read-write</access>
37298              <enumeratedValues>
37299                <enumeratedValue>
37300                  <name>0</name>
37301                  <description>The channel polarity is active high.</description>
37302                  <value>#0</value>
37303                </enumeratedValue>
37304                <enumeratedValue>
37305                  <name>1</name>
37306                  <description>The channel polarity is active low.</description>
37307                  <value>#1</value>
37308                </enumeratedValue>
37309              </enumeratedValues>
37310            </field>
37311            <field>
37312              <name>POL6</name>
37313              <description>Channel 6 Polarity</description>
37314              <bitOffset>6</bitOffset>
37315              <bitWidth>1</bitWidth>
37316              <access>read-write</access>
37317              <enumeratedValues>
37318                <enumeratedValue>
37319                  <name>0</name>
37320                  <description>The channel polarity is active high.</description>
37321                  <value>#0</value>
37322                </enumeratedValue>
37323                <enumeratedValue>
37324                  <name>1</name>
37325                  <description>The channel polarity is active low.</description>
37326                  <value>#1</value>
37327                </enumeratedValue>
37328              </enumeratedValues>
37329            </field>
37330            <field>
37331              <name>POL7</name>
37332              <description>Channel 7 Polarity</description>
37333              <bitOffset>7</bitOffset>
37334              <bitWidth>1</bitWidth>
37335              <access>read-write</access>
37336              <enumeratedValues>
37337                <enumeratedValue>
37338                  <name>0</name>
37339                  <description>The channel polarity is active high.</description>
37340                  <value>#0</value>
37341                </enumeratedValue>
37342                <enumeratedValue>
37343                  <name>1</name>
37344                  <description>The channel polarity is active low.</description>
37345                  <value>#1</value>
37346                </enumeratedValue>
37347              </enumeratedValues>
37348            </field>
37349          </fields>
37350        </register>
37351        <register>
37352          <name>FMS</name>
37353          <description>Fault Mode Status</description>
37354          <addressOffset>0x74</addressOffset>
37355          <size>32</size>
37356          <access>read-write</access>
37357          <resetValue>0</resetValue>
37358          <resetMask>0xFFFFFFFF</resetMask>
37359          <fields>
37360            <field>
37361              <name>FAULTF0</name>
37362              <description>Fault Detection Flag 0</description>
37363              <bitOffset>0</bitOffset>
37364              <bitWidth>1</bitWidth>
37365              <access>read-write</access>
37366              <enumeratedValues>
37367                <enumeratedValue>
37368                  <name>0</name>
37369                  <description>No fault condition was detected at the fault input.</description>
37370                  <value>#0</value>
37371                </enumeratedValue>
37372                <enumeratedValue>
37373                  <name>1</name>
37374                  <description>A fault condition was detected at the fault input.</description>
37375                  <value>#1</value>
37376                </enumeratedValue>
37377              </enumeratedValues>
37378            </field>
37379            <field>
37380              <name>FAULTF1</name>
37381              <description>Fault Detection Flag 1</description>
37382              <bitOffset>1</bitOffset>
37383              <bitWidth>1</bitWidth>
37384              <access>read-write</access>
37385              <enumeratedValues>
37386                <enumeratedValue>
37387                  <name>0</name>
37388                  <description>No fault condition was detected at the fault input.</description>
37389                  <value>#0</value>
37390                </enumeratedValue>
37391                <enumeratedValue>
37392                  <name>1</name>
37393                  <description>A fault condition was detected at the fault input.</description>
37394                  <value>#1</value>
37395                </enumeratedValue>
37396              </enumeratedValues>
37397            </field>
37398            <field>
37399              <name>FAULTF2</name>
37400              <description>Fault Detection Flag 2</description>
37401              <bitOffset>2</bitOffset>
37402              <bitWidth>1</bitWidth>
37403              <access>read-write</access>
37404              <enumeratedValues>
37405                <enumeratedValue>
37406                  <name>0</name>
37407                  <description>No fault condition was detected at the fault input.</description>
37408                  <value>#0</value>
37409                </enumeratedValue>
37410                <enumeratedValue>
37411                  <name>1</name>
37412                  <description>A fault condition was detected at the fault input.</description>
37413                  <value>#1</value>
37414                </enumeratedValue>
37415              </enumeratedValues>
37416            </field>
37417            <field>
37418              <name>FAULTF3</name>
37419              <description>Fault Detection Flag 3</description>
37420              <bitOffset>3</bitOffset>
37421              <bitWidth>1</bitWidth>
37422              <access>read-write</access>
37423              <enumeratedValues>
37424                <enumeratedValue>
37425                  <name>0</name>
37426                  <description>No fault condition was detected at the fault input.</description>
37427                  <value>#0</value>
37428                </enumeratedValue>
37429                <enumeratedValue>
37430                  <name>1</name>
37431                  <description>A fault condition was detected at the fault input.</description>
37432                  <value>#1</value>
37433                </enumeratedValue>
37434              </enumeratedValues>
37435            </field>
37436            <field>
37437              <name>FAULTIN</name>
37438              <description>Fault Inputs</description>
37439              <bitOffset>5</bitOffset>
37440              <bitWidth>1</bitWidth>
37441              <access>read-only</access>
37442              <enumeratedValues>
37443                <enumeratedValue>
37444                  <name>0</name>
37445                  <description>The logic OR of the enabled fault inputs is 0.</description>
37446                  <value>#0</value>
37447                </enumeratedValue>
37448                <enumeratedValue>
37449                  <name>1</name>
37450                  <description>The logic OR of the enabled fault inputs is 1.</description>
37451                  <value>#1</value>
37452                </enumeratedValue>
37453              </enumeratedValues>
37454            </field>
37455            <field>
37456              <name>WPEN</name>
37457              <description>Write Protection Enable</description>
37458              <bitOffset>6</bitOffset>
37459              <bitWidth>1</bitWidth>
37460              <access>read-write</access>
37461              <enumeratedValues>
37462                <enumeratedValue>
37463                  <name>0</name>
37464                  <description>Write protection is disabled. Write protected bits can be written.</description>
37465                  <value>#0</value>
37466                </enumeratedValue>
37467                <enumeratedValue>
37468                  <name>1</name>
37469                  <description>Write protection is enabled. Write protected bits cannot be written.</description>
37470                  <value>#1</value>
37471                </enumeratedValue>
37472              </enumeratedValues>
37473            </field>
37474            <field>
37475              <name>FAULTF</name>
37476              <description>Fault Detection Flag</description>
37477              <bitOffset>7</bitOffset>
37478              <bitWidth>1</bitWidth>
37479              <access>read-write</access>
37480              <enumeratedValues>
37481                <enumeratedValue>
37482                  <name>0</name>
37483                  <description>No fault condition was detected.</description>
37484                  <value>#0</value>
37485                </enumeratedValue>
37486                <enumeratedValue>
37487                  <name>1</name>
37488                  <description>A fault condition was detected.</description>
37489                  <value>#1</value>
37490                </enumeratedValue>
37491              </enumeratedValues>
37492            </field>
37493          </fields>
37494        </register>
37495        <register>
37496          <name>FILTER</name>
37497          <description>Input Capture Filter Control</description>
37498          <addressOffset>0x78</addressOffset>
37499          <size>32</size>
37500          <access>read-write</access>
37501          <resetValue>0</resetValue>
37502          <resetMask>0xFFFFFFFF</resetMask>
37503          <fields>
37504            <field>
37505              <name>CH0FVAL</name>
37506              <description>Channel 0 Input Filter</description>
37507              <bitOffset>0</bitOffset>
37508              <bitWidth>4</bitWidth>
37509              <access>read-write</access>
37510            </field>
37511            <field>
37512              <name>CH1FVAL</name>
37513              <description>Channel 1 Input Filter</description>
37514              <bitOffset>4</bitOffset>
37515              <bitWidth>4</bitWidth>
37516              <access>read-write</access>
37517            </field>
37518            <field>
37519              <name>CH2FVAL</name>
37520              <description>Channel 2 Input Filter</description>
37521              <bitOffset>8</bitOffset>
37522              <bitWidth>4</bitWidth>
37523              <access>read-write</access>
37524            </field>
37525            <field>
37526              <name>CH3FVAL</name>
37527              <description>Channel 3 Input Filter</description>
37528              <bitOffset>12</bitOffset>
37529              <bitWidth>4</bitWidth>
37530              <access>read-write</access>
37531            </field>
37532          </fields>
37533        </register>
37534        <register>
37535          <name>FLTCTRL</name>
37536          <description>Fault Control</description>
37537          <addressOffset>0x7C</addressOffset>
37538          <size>32</size>
37539          <access>read-write</access>
37540          <resetValue>0</resetValue>
37541          <resetMask>0xFFFFFFFF</resetMask>
37542          <fields>
37543            <field>
37544              <name>FAULT0EN</name>
37545              <description>Fault Input 0 Enable</description>
37546              <bitOffset>0</bitOffset>
37547              <bitWidth>1</bitWidth>
37548              <access>read-write</access>
37549              <enumeratedValues>
37550                <enumeratedValue>
37551                  <name>0</name>
37552                  <description>Fault input is disabled.</description>
37553                  <value>#0</value>
37554                </enumeratedValue>
37555                <enumeratedValue>
37556                  <name>1</name>
37557                  <description>Fault input is enabled.</description>
37558                  <value>#1</value>
37559                </enumeratedValue>
37560              </enumeratedValues>
37561            </field>
37562            <field>
37563              <name>FAULT1EN</name>
37564              <description>Fault Input 1 Enable</description>
37565              <bitOffset>1</bitOffset>
37566              <bitWidth>1</bitWidth>
37567              <access>read-write</access>
37568              <enumeratedValues>
37569                <enumeratedValue>
37570                  <name>0</name>
37571                  <description>Fault input is disabled.</description>
37572                  <value>#0</value>
37573                </enumeratedValue>
37574                <enumeratedValue>
37575                  <name>1</name>
37576                  <description>Fault input is enabled.</description>
37577                  <value>#1</value>
37578                </enumeratedValue>
37579              </enumeratedValues>
37580            </field>
37581            <field>
37582              <name>FAULT2EN</name>
37583              <description>Fault Input 2 Enable</description>
37584              <bitOffset>2</bitOffset>
37585              <bitWidth>1</bitWidth>
37586              <access>read-write</access>
37587              <enumeratedValues>
37588                <enumeratedValue>
37589                  <name>0</name>
37590                  <description>Fault input is disabled.</description>
37591                  <value>#0</value>
37592                </enumeratedValue>
37593                <enumeratedValue>
37594                  <name>1</name>
37595                  <description>Fault input is enabled.</description>
37596                  <value>#1</value>
37597                </enumeratedValue>
37598              </enumeratedValues>
37599            </field>
37600            <field>
37601              <name>FAULT3EN</name>
37602              <description>Fault Input 3 Enable</description>
37603              <bitOffset>3</bitOffset>
37604              <bitWidth>1</bitWidth>
37605              <access>read-write</access>
37606              <enumeratedValues>
37607                <enumeratedValue>
37608                  <name>0</name>
37609                  <description>Fault input is disabled.</description>
37610                  <value>#0</value>
37611                </enumeratedValue>
37612                <enumeratedValue>
37613                  <name>1</name>
37614                  <description>Fault input is enabled.</description>
37615                  <value>#1</value>
37616                </enumeratedValue>
37617              </enumeratedValues>
37618            </field>
37619            <field>
37620              <name>FFLTR0EN</name>
37621              <description>Fault Input 0 Filter Enable</description>
37622              <bitOffset>4</bitOffset>
37623              <bitWidth>1</bitWidth>
37624              <access>read-write</access>
37625              <enumeratedValues>
37626                <enumeratedValue>
37627                  <name>0</name>
37628                  <description>Fault input filter is disabled.</description>
37629                  <value>#0</value>
37630                </enumeratedValue>
37631                <enumeratedValue>
37632                  <name>1</name>
37633                  <description>Fault input filter is enabled.</description>
37634                  <value>#1</value>
37635                </enumeratedValue>
37636              </enumeratedValues>
37637            </field>
37638            <field>
37639              <name>FFLTR1EN</name>
37640              <description>Fault Input 1 Filter Enable</description>
37641              <bitOffset>5</bitOffset>
37642              <bitWidth>1</bitWidth>
37643              <access>read-write</access>
37644              <enumeratedValues>
37645                <enumeratedValue>
37646                  <name>0</name>
37647                  <description>Fault input filter is disabled.</description>
37648                  <value>#0</value>
37649                </enumeratedValue>
37650                <enumeratedValue>
37651                  <name>1</name>
37652                  <description>Fault input filter is enabled.</description>
37653                  <value>#1</value>
37654                </enumeratedValue>
37655              </enumeratedValues>
37656            </field>
37657            <field>
37658              <name>FFLTR2EN</name>
37659              <description>Fault Input 2 Filter Enable</description>
37660              <bitOffset>6</bitOffset>
37661              <bitWidth>1</bitWidth>
37662              <access>read-write</access>
37663              <enumeratedValues>
37664                <enumeratedValue>
37665                  <name>0</name>
37666                  <description>Fault input filter is disabled.</description>
37667                  <value>#0</value>
37668                </enumeratedValue>
37669                <enumeratedValue>
37670                  <name>1</name>
37671                  <description>Fault input filter is enabled.</description>
37672                  <value>#1</value>
37673                </enumeratedValue>
37674              </enumeratedValues>
37675            </field>
37676            <field>
37677              <name>FFLTR3EN</name>
37678              <description>Fault Input 3 Filter Enable</description>
37679              <bitOffset>7</bitOffset>
37680              <bitWidth>1</bitWidth>
37681              <access>read-write</access>
37682              <enumeratedValues>
37683                <enumeratedValue>
37684                  <name>0</name>
37685                  <description>Fault input filter is disabled.</description>
37686                  <value>#0</value>
37687                </enumeratedValue>
37688                <enumeratedValue>
37689                  <name>1</name>
37690                  <description>Fault input filter is enabled.</description>
37691                  <value>#1</value>
37692                </enumeratedValue>
37693              </enumeratedValues>
37694            </field>
37695            <field>
37696              <name>FFVAL</name>
37697              <description>Fault Input Filter</description>
37698              <bitOffset>8</bitOffset>
37699              <bitWidth>4</bitWidth>
37700              <access>read-write</access>
37701            </field>
37702          </fields>
37703        </register>
37704        <register>
37705          <name>QDCTRL</name>
37706          <description>Quadrature Decoder Control And Status</description>
37707          <addressOffset>0x80</addressOffset>
37708          <size>32</size>
37709          <access>read-write</access>
37710          <resetValue>0</resetValue>
37711          <resetMask>0xFFFFFFFF</resetMask>
37712          <fields>
37713            <field>
37714              <name>QUADEN</name>
37715              <description>Quadrature Decoder Mode Enable</description>
37716              <bitOffset>0</bitOffset>
37717              <bitWidth>1</bitWidth>
37718              <access>read-write</access>
37719              <enumeratedValues>
37720                <enumeratedValue>
37721                  <name>0</name>
37722                  <description>Quadrature Decoder mode is disabled.</description>
37723                  <value>#0</value>
37724                </enumeratedValue>
37725                <enumeratedValue>
37726                  <name>1</name>
37727                  <description>Quadrature Decoder mode is enabled.</description>
37728                  <value>#1</value>
37729                </enumeratedValue>
37730              </enumeratedValues>
37731            </field>
37732            <field>
37733              <name>TOFDIR</name>
37734              <description>Timer Overflow Direction In Quadrature Decoder Mode</description>
37735              <bitOffset>1</bitOffset>
37736              <bitWidth>1</bitWidth>
37737              <access>read-only</access>
37738              <enumeratedValues>
37739                <enumeratedValue>
37740                  <name>0</name>
37741                  <description>TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter changes from its minimum value (CNTIN register) to its maximum value (MOD register).</description>
37742                  <value>#0</value>
37743                </enumeratedValue>
37744                <enumeratedValue>
37745                  <name>1</name>
37746                  <description>TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter changes from its maximum value (MOD register) to its minimum value (CNTIN register).</description>
37747                  <value>#1</value>
37748                </enumeratedValue>
37749              </enumeratedValues>
37750            </field>
37751            <field>
37752              <name>QUADIR</name>
37753              <description>FTM Counter Direction In Quadrature Decoder Mode</description>
37754              <bitOffset>2</bitOffset>
37755              <bitWidth>1</bitWidth>
37756              <access>read-only</access>
37757              <enumeratedValues>
37758                <enumeratedValue>
37759                  <name>0</name>
37760                  <description>Counting direction is decreasing (FTM counter decrement).</description>
37761                  <value>#0</value>
37762                </enumeratedValue>
37763                <enumeratedValue>
37764                  <name>1</name>
37765                  <description>Counting direction is increasing (FTM counter increment).</description>
37766                  <value>#1</value>
37767                </enumeratedValue>
37768              </enumeratedValues>
37769            </field>
37770            <field>
37771              <name>QUADMODE</name>
37772              <description>Quadrature Decoder Mode</description>
37773              <bitOffset>3</bitOffset>
37774              <bitWidth>1</bitWidth>
37775              <access>read-write</access>
37776              <enumeratedValues>
37777                <enumeratedValue>
37778                  <name>0</name>
37779                  <description>Phase A and phase B encoding mode.</description>
37780                  <value>#0</value>
37781                </enumeratedValue>
37782                <enumeratedValue>
37783                  <name>1</name>
37784                  <description>Count and direction encoding mode.</description>
37785                  <value>#1</value>
37786                </enumeratedValue>
37787              </enumeratedValues>
37788            </field>
37789            <field>
37790              <name>PHBPOL</name>
37791              <description>Phase B Input Polarity</description>
37792              <bitOffset>4</bitOffset>
37793              <bitWidth>1</bitWidth>
37794              <access>read-write</access>
37795              <enumeratedValues>
37796                <enumeratedValue>
37797                  <name>0</name>
37798                  <description>Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal.</description>
37799                  <value>#0</value>
37800                </enumeratedValue>
37801                <enumeratedValue>
37802                  <name>1</name>
37803                  <description>Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal.</description>
37804                  <value>#1</value>
37805                </enumeratedValue>
37806              </enumeratedValues>
37807            </field>
37808            <field>
37809              <name>PHAPOL</name>
37810              <description>Phase A Input Polarity</description>
37811              <bitOffset>5</bitOffset>
37812              <bitWidth>1</bitWidth>
37813              <access>read-write</access>
37814              <enumeratedValues>
37815                <enumeratedValue>
37816                  <name>0</name>
37817                  <description>Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal.</description>
37818                  <value>#0</value>
37819                </enumeratedValue>
37820                <enumeratedValue>
37821                  <name>1</name>
37822                  <description>Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal.</description>
37823                  <value>#1</value>
37824                </enumeratedValue>
37825              </enumeratedValues>
37826            </field>
37827            <field>
37828              <name>PHBFLTREN</name>
37829              <description>Phase B Input Filter Enable</description>
37830              <bitOffset>6</bitOffset>
37831              <bitWidth>1</bitWidth>
37832              <access>read-write</access>
37833              <enumeratedValues>
37834                <enumeratedValue>
37835                  <name>0</name>
37836                  <description>Phase B input filter is disabled.</description>
37837                  <value>#0</value>
37838                </enumeratedValue>
37839                <enumeratedValue>
37840                  <name>1</name>
37841                  <description>Phase B input filter is enabled.</description>
37842                  <value>#1</value>
37843                </enumeratedValue>
37844              </enumeratedValues>
37845            </field>
37846            <field>
37847              <name>PHAFLTREN</name>
37848              <description>Phase A Input Filter Enable</description>
37849              <bitOffset>7</bitOffset>
37850              <bitWidth>1</bitWidth>
37851              <access>read-write</access>
37852              <enumeratedValues>
37853                <enumeratedValue>
37854                  <name>0</name>
37855                  <description>Phase A input filter is disabled.</description>
37856                  <value>#0</value>
37857                </enumeratedValue>
37858                <enumeratedValue>
37859                  <name>1</name>
37860                  <description>Phase A input filter is enabled.</description>
37861                  <value>#1</value>
37862                </enumeratedValue>
37863              </enumeratedValues>
37864            </field>
37865          </fields>
37866        </register>
37867        <register>
37868          <name>CONF</name>
37869          <description>Configuration</description>
37870          <addressOffset>0x84</addressOffset>
37871          <size>32</size>
37872          <access>read-write</access>
37873          <resetValue>0</resetValue>
37874          <resetMask>0xFFFFFFFF</resetMask>
37875          <fields>
37876            <field>
37877              <name>NUMTOF</name>
37878              <description>TOF Frequency</description>
37879              <bitOffset>0</bitOffset>
37880              <bitWidth>5</bitWidth>
37881              <access>read-write</access>
37882            </field>
37883            <field>
37884              <name>BDMMODE</name>
37885              <description>BDM Mode</description>
37886              <bitOffset>6</bitOffset>
37887              <bitWidth>2</bitWidth>
37888              <access>read-write</access>
37889            </field>
37890            <field>
37891              <name>GTBEEN</name>
37892              <description>Global Time Base Enable</description>
37893              <bitOffset>9</bitOffset>
37894              <bitWidth>1</bitWidth>
37895              <access>read-write</access>
37896              <enumeratedValues>
37897                <enumeratedValue>
37898                  <name>0</name>
37899                  <description>Use of an external global time base is disabled.</description>
37900                  <value>#0</value>
37901                </enumeratedValue>
37902                <enumeratedValue>
37903                  <name>1</name>
37904                  <description>Use of an external global time base is enabled.</description>
37905                  <value>#1</value>
37906                </enumeratedValue>
37907              </enumeratedValues>
37908            </field>
37909            <field>
37910              <name>GTBEOUT</name>
37911              <description>Global Time Base Output</description>
37912              <bitOffset>10</bitOffset>
37913              <bitWidth>1</bitWidth>
37914              <access>read-write</access>
37915              <enumeratedValues>
37916                <enumeratedValue>
37917                  <name>0</name>
37918                  <description>A global time base signal generation is disabled.</description>
37919                  <value>#0</value>
37920                </enumeratedValue>
37921                <enumeratedValue>
37922                  <name>1</name>
37923                  <description>A global time base signal generation is enabled.</description>
37924                  <value>#1</value>
37925                </enumeratedValue>
37926              </enumeratedValues>
37927            </field>
37928          </fields>
37929        </register>
37930        <register>
37931          <name>FLTPOL</name>
37932          <description>FTM Fault Input Polarity</description>
37933          <addressOffset>0x88</addressOffset>
37934          <size>32</size>
37935          <access>read-write</access>
37936          <resetValue>0</resetValue>
37937          <resetMask>0xFFFFFFFF</resetMask>
37938          <fields>
37939            <field>
37940              <name>FLT0POL</name>
37941              <description>Fault Input 0 Polarity</description>
37942              <bitOffset>0</bitOffset>
37943              <bitWidth>1</bitWidth>
37944              <access>read-write</access>
37945              <enumeratedValues>
37946                <enumeratedValue>
37947                  <name>0</name>
37948                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
37949                  <value>#0</value>
37950                </enumeratedValue>
37951                <enumeratedValue>
37952                  <name>1</name>
37953                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
37954                  <value>#1</value>
37955                </enumeratedValue>
37956              </enumeratedValues>
37957            </field>
37958            <field>
37959              <name>FLT1POL</name>
37960              <description>Fault Input 1 Polarity</description>
37961              <bitOffset>1</bitOffset>
37962              <bitWidth>1</bitWidth>
37963              <access>read-write</access>
37964              <enumeratedValues>
37965                <enumeratedValue>
37966                  <name>0</name>
37967                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
37968                  <value>#0</value>
37969                </enumeratedValue>
37970                <enumeratedValue>
37971                  <name>1</name>
37972                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
37973                  <value>#1</value>
37974                </enumeratedValue>
37975              </enumeratedValues>
37976            </field>
37977            <field>
37978              <name>FLT2POL</name>
37979              <description>Fault Input 2 Polarity</description>
37980              <bitOffset>2</bitOffset>
37981              <bitWidth>1</bitWidth>
37982              <access>read-write</access>
37983              <enumeratedValues>
37984                <enumeratedValue>
37985                  <name>0</name>
37986                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
37987                  <value>#0</value>
37988                </enumeratedValue>
37989                <enumeratedValue>
37990                  <name>1</name>
37991                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
37992                  <value>#1</value>
37993                </enumeratedValue>
37994              </enumeratedValues>
37995            </field>
37996            <field>
37997              <name>FLT3POL</name>
37998              <description>Fault Input 3 Polarity</description>
37999              <bitOffset>3</bitOffset>
38000              <bitWidth>1</bitWidth>
38001              <access>read-write</access>
38002              <enumeratedValues>
38003                <enumeratedValue>
38004                  <name>0</name>
38005                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
38006                  <value>#0</value>
38007                </enumeratedValue>
38008                <enumeratedValue>
38009                  <name>1</name>
38010                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
38011                  <value>#1</value>
38012                </enumeratedValue>
38013              </enumeratedValues>
38014            </field>
38015          </fields>
38016        </register>
38017        <register>
38018          <name>SYNCONF</name>
38019          <description>Synchronization Configuration</description>
38020          <addressOffset>0x8C</addressOffset>
38021          <size>32</size>
38022          <access>read-write</access>
38023          <resetValue>0</resetValue>
38024          <resetMask>0xFFFFFFFF</resetMask>
38025          <fields>
38026            <field>
38027              <name>HWTRIGMODE</name>
38028              <description>Hardware Trigger Mode</description>
38029              <bitOffset>0</bitOffset>
38030              <bitWidth>1</bitWidth>
38031              <access>read-write</access>
38032              <enumeratedValues>
38033                <enumeratedValue>
38034                  <name>0</name>
38035                  <description>FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2.</description>
38036                  <value>#0</value>
38037                </enumeratedValue>
38038                <enumeratedValue>
38039                  <name>1</name>
38040                  <description>FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2.</description>
38041                  <value>#1</value>
38042                </enumeratedValue>
38043              </enumeratedValues>
38044            </field>
38045            <field>
38046              <name>CNTINC</name>
38047              <description>CNTIN Register Synchronization</description>
38048              <bitOffset>2</bitOffset>
38049              <bitWidth>1</bitWidth>
38050              <access>read-write</access>
38051              <enumeratedValues>
38052                <enumeratedValue>
38053                  <name>0</name>
38054                  <description>CNTIN register is updated with its buffer value at all rising edges of system clock.</description>
38055                  <value>#0</value>
38056                </enumeratedValue>
38057                <enumeratedValue>
38058                  <name>1</name>
38059                  <description>CNTIN register is updated with its buffer value by the PWM synchronization.</description>
38060                  <value>#1</value>
38061                </enumeratedValue>
38062              </enumeratedValues>
38063            </field>
38064            <field>
38065              <name>INVC</name>
38066              <description>INVCTRL Register Synchronization</description>
38067              <bitOffset>4</bitOffset>
38068              <bitWidth>1</bitWidth>
38069              <access>read-write</access>
38070              <enumeratedValues>
38071                <enumeratedValue>
38072                  <name>0</name>
38073                  <description>INVCTRL register is updated with its buffer value at all rising edges of system clock.</description>
38074                  <value>#0</value>
38075                </enumeratedValue>
38076                <enumeratedValue>
38077                  <name>1</name>
38078                  <description>INVCTRL register is updated with its buffer value by the PWM synchronization.</description>
38079                  <value>#1</value>
38080                </enumeratedValue>
38081              </enumeratedValues>
38082            </field>
38083            <field>
38084              <name>SWOC</name>
38085              <description>SWOCTRL Register Synchronization</description>
38086              <bitOffset>5</bitOffset>
38087              <bitWidth>1</bitWidth>
38088              <access>read-write</access>
38089              <enumeratedValues>
38090                <enumeratedValue>
38091                  <name>0</name>
38092                  <description>SWOCTRL register is updated with its buffer value at all rising edges of system clock.</description>
38093                  <value>#0</value>
38094                </enumeratedValue>
38095                <enumeratedValue>
38096                  <name>1</name>
38097                  <description>SWOCTRL register is updated with its buffer value by the PWM synchronization.</description>
38098                  <value>#1</value>
38099                </enumeratedValue>
38100              </enumeratedValues>
38101            </field>
38102            <field>
38103              <name>SYNCMODE</name>
38104              <description>Synchronization Mode</description>
38105              <bitOffset>7</bitOffset>
38106              <bitWidth>1</bitWidth>
38107              <access>read-write</access>
38108              <enumeratedValues>
38109                <enumeratedValue>
38110                  <name>0</name>
38111                  <description>Legacy PWM synchronization is selected.</description>
38112                  <value>#0</value>
38113                </enumeratedValue>
38114                <enumeratedValue>
38115                  <name>1</name>
38116                  <description>Enhanced PWM synchronization is selected.</description>
38117                  <value>#1</value>
38118                </enumeratedValue>
38119              </enumeratedValues>
38120            </field>
38121            <field>
38122              <name>SWRSTCNT</name>
38123              <description>FTM counter synchronization is activated by the software trigger.</description>
38124              <bitOffset>8</bitOffset>
38125              <bitWidth>1</bitWidth>
38126              <access>read-write</access>
38127              <enumeratedValues>
38128                <enumeratedValue>
38129                  <name>0</name>
38130                  <description>The software trigger does not activate the FTM counter synchronization.</description>
38131                  <value>#0</value>
38132                </enumeratedValue>
38133                <enumeratedValue>
38134                  <name>1</name>
38135                  <description>The software trigger activates the FTM counter synchronization.</description>
38136                  <value>#1</value>
38137                </enumeratedValue>
38138              </enumeratedValues>
38139            </field>
38140            <field>
38141              <name>SWWRBUF</name>
38142              <description>MOD, CNTIN, and CV registers synchronization is activated by the software trigger.</description>
38143              <bitOffset>9</bitOffset>
38144              <bitWidth>1</bitWidth>
38145              <access>read-write</access>
38146              <enumeratedValues>
38147                <enumeratedValue>
38148                  <name>0</name>
38149                  <description>The software trigger does not activate MOD, CNTIN, and CV registers synchronization.</description>
38150                  <value>#0</value>
38151                </enumeratedValue>
38152                <enumeratedValue>
38153                  <name>1</name>
38154                  <description>The software trigger activates MOD, CNTIN, and CV registers synchronization.</description>
38155                  <value>#1</value>
38156                </enumeratedValue>
38157              </enumeratedValues>
38158            </field>
38159            <field>
38160              <name>SWOM</name>
38161              <description>Output mask synchronization is activated by the software trigger.</description>
38162              <bitOffset>10</bitOffset>
38163              <bitWidth>1</bitWidth>
38164              <access>read-write</access>
38165              <enumeratedValues>
38166                <enumeratedValue>
38167                  <name>0</name>
38168                  <description>The software trigger does not activate the OUTMASK register synchronization.</description>
38169                  <value>#0</value>
38170                </enumeratedValue>
38171                <enumeratedValue>
38172                  <name>1</name>
38173                  <description>The software trigger activates the OUTMASK register synchronization.</description>
38174                  <value>#1</value>
38175                </enumeratedValue>
38176              </enumeratedValues>
38177            </field>
38178            <field>
38179              <name>SWINVC</name>
38180              <description>Inverting control synchronization is activated by the software trigger.</description>
38181              <bitOffset>11</bitOffset>
38182              <bitWidth>1</bitWidth>
38183              <access>read-write</access>
38184              <enumeratedValues>
38185                <enumeratedValue>
38186                  <name>0</name>
38187                  <description>The software trigger does not activate the INVCTRL register synchronization.</description>
38188                  <value>#0</value>
38189                </enumeratedValue>
38190                <enumeratedValue>
38191                  <name>1</name>
38192                  <description>The software trigger activates the INVCTRL register synchronization.</description>
38193                  <value>#1</value>
38194                </enumeratedValue>
38195              </enumeratedValues>
38196            </field>
38197            <field>
38198              <name>SWSOC</name>
38199              <description>Software output control synchronization is activated by the software trigger.</description>
38200              <bitOffset>12</bitOffset>
38201              <bitWidth>1</bitWidth>
38202              <access>read-write</access>
38203              <enumeratedValues>
38204                <enumeratedValue>
38205                  <name>0</name>
38206                  <description>The software trigger does not activate the SWOCTRL register synchronization.</description>
38207                  <value>#0</value>
38208                </enumeratedValue>
38209                <enumeratedValue>
38210                  <name>1</name>
38211                  <description>The software trigger activates the SWOCTRL register synchronization.</description>
38212                  <value>#1</value>
38213                </enumeratedValue>
38214              </enumeratedValues>
38215            </field>
38216            <field>
38217              <name>HWRSTCNT</name>
38218              <description>FTM counter synchronization is activated by a hardware trigger.</description>
38219              <bitOffset>16</bitOffset>
38220              <bitWidth>1</bitWidth>
38221              <access>read-write</access>
38222              <enumeratedValues>
38223                <enumeratedValue>
38224                  <name>0</name>
38225                  <description>A hardware trigger does not activate the FTM counter synchronization.</description>
38226                  <value>#0</value>
38227                </enumeratedValue>
38228                <enumeratedValue>
38229                  <name>1</name>
38230                  <description>A hardware trigger activates the FTM counter synchronization.</description>
38231                  <value>#1</value>
38232                </enumeratedValue>
38233              </enumeratedValues>
38234            </field>
38235            <field>
38236              <name>HWWRBUF</name>
38237              <description>MOD, CNTIN, and CV registers synchronization is activated by a hardware trigger.</description>
38238              <bitOffset>17</bitOffset>
38239              <bitWidth>1</bitWidth>
38240              <access>read-write</access>
38241              <enumeratedValues>
38242                <enumeratedValue>
38243                  <name>0</name>
38244                  <description>A hardware trigger does not activate MOD, CNTIN, and CV registers synchronization.</description>
38245                  <value>#0</value>
38246                </enumeratedValue>
38247                <enumeratedValue>
38248                  <name>1</name>
38249                  <description>A hardware trigger activates MOD, CNTIN, and CV registers synchronization.</description>
38250                  <value>#1</value>
38251                </enumeratedValue>
38252              </enumeratedValues>
38253            </field>
38254            <field>
38255              <name>HWOM</name>
38256              <description>Output mask synchronization is activated by a hardware trigger.</description>
38257              <bitOffset>18</bitOffset>
38258              <bitWidth>1</bitWidth>
38259              <access>read-write</access>
38260              <enumeratedValues>
38261                <enumeratedValue>
38262                  <name>0</name>
38263                  <description>A hardware trigger does not activate the OUTMASK register synchronization.</description>
38264                  <value>#0</value>
38265                </enumeratedValue>
38266                <enumeratedValue>
38267                  <name>1</name>
38268                  <description>A hardware trigger activates the OUTMASK register synchronization.</description>
38269                  <value>#1</value>
38270                </enumeratedValue>
38271              </enumeratedValues>
38272            </field>
38273            <field>
38274              <name>HWINVC</name>
38275              <description>Inverting control synchronization is activated by a hardware trigger.</description>
38276              <bitOffset>19</bitOffset>
38277              <bitWidth>1</bitWidth>
38278              <access>read-write</access>
38279              <enumeratedValues>
38280                <enumeratedValue>
38281                  <name>0</name>
38282                  <description>A hardware trigger does not activate the INVCTRL register synchronization.</description>
38283                  <value>#0</value>
38284                </enumeratedValue>
38285                <enumeratedValue>
38286                  <name>1</name>
38287                  <description>A hardware trigger activates the INVCTRL register synchronization.</description>
38288                  <value>#1</value>
38289                </enumeratedValue>
38290              </enumeratedValues>
38291            </field>
38292            <field>
38293              <name>HWSOC</name>
38294              <description>Software output control synchronization is activated by a hardware trigger.</description>
38295              <bitOffset>20</bitOffset>
38296              <bitWidth>1</bitWidth>
38297              <access>read-write</access>
38298              <enumeratedValues>
38299                <enumeratedValue>
38300                  <name>0</name>
38301                  <description>A hardware trigger does not activate the SWOCTRL register synchronization.</description>
38302                  <value>#0</value>
38303                </enumeratedValue>
38304                <enumeratedValue>
38305                  <name>1</name>
38306                  <description>A hardware trigger activates the SWOCTRL register synchronization.</description>
38307                  <value>#1</value>
38308                </enumeratedValue>
38309              </enumeratedValues>
38310            </field>
38311          </fields>
38312        </register>
38313        <register>
38314          <name>INVCTRL</name>
38315          <description>FTM Inverting Control</description>
38316          <addressOffset>0x90</addressOffset>
38317          <size>32</size>
38318          <access>read-write</access>
38319          <resetValue>0</resetValue>
38320          <resetMask>0xFFFFFFFF</resetMask>
38321          <fields>
38322            <field>
38323              <name>INV0EN</name>
38324              <description>Pair Channels 0 Inverting Enable</description>
38325              <bitOffset>0</bitOffset>
38326              <bitWidth>1</bitWidth>
38327              <access>read-write</access>
38328              <enumeratedValues>
38329                <enumeratedValue>
38330                  <name>0</name>
38331                  <description>Inverting is disabled.</description>
38332                  <value>#0</value>
38333                </enumeratedValue>
38334                <enumeratedValue>
38335                  <name>1</name>
38336                  <description>Inverting is enabled.</description>
38337                  <value>#1</value>
38338                </enumeratedValue>
38339              </enumeratedValues>
38340            </field>
38341            <field>
38342              <name>INV1EN</name>
38343              <description>Pair Channels 1 Inverting Enable</description>
38344              <bitOffset>1</bitOffset>
38345              <bitWidth>1</bitWidth>
38346              <access>read-write</access>
38347              <enumeratedValues>
38348                <enumeratedValue>
38349                  <name>0</name>
38350                  <description>Inverting is disabled.</description>
38351                  <value>#0</value>
38352                </enumeratedValue>
38353                <enumeratedValue>
38354                  <name>1</name>
38355                  <description>Inverting is enabled.</description>
38356                  <value>#1</value>
38357                </enumeratedValue>
38358              </enumeratedValues>
38359            </field>
38360            <field>
38361              <name>INV2EN</name>
38362              <description>Pair Channels 2 Inverting Enable</description>
38363              <bitOffset>2</bitOffset>
38364              <bitWidth>1</bitWidth>
38365              <access>read-write</access>
38366              <enumeratedValues>
38367                <enumeratedValue>
38368                  <name>0</name>
38369                  <description>Inverting is disabled.</description>
38370                  <value>#0</value>
38371                </enumeratedValue>
38372                <enumeratedValue>
38373                  <name>1</name>
38374                  <description>Inverting is enabled.</description>
38375                  <value>#1</value>
38376                </enumeratedValue>
38377              </enumeratedValues>
38378            </field>
38379            <field>
38380              <name>INV3EN</name>
38381              <description>Pair Channels 3 Inverting Enable</description>
38382              <bitOffset>3</bitOffset>
38383              <bitWidth>1</bitWidth>
38384              <access>read-write</access>
38385              <enumeratedValues>
38386                <enumeratedValue>
38387                  <name>0</name>
38388                  <description>Inverting is disabled.</description>
38389                  <value>#0</value>
38390                </enumeratedValue>
38391                <enumeratedValue>
38392                  <name>1</name>
38393                  <description>Inverting is enabled.</description>
38394                  <value>#1</value>
38395                </enumeratedValue>
38396              </enumeratedValues>
38397            </field>
38398          </fields>
38399        </register>
38400        <register>
38401          <name>SWOCTRL</name>
38402          <description>FTM Software Output Control</description>
38403          <addressOffset>0x94</addressOffset>
38404          <size>32</size>
38405          <access>read-write</access>
38406          <resetValue>0</resetValue>
38407          <resetMask>0xFFFFFFFF</resetMask>
38408          <fields>
38409            <field>
38410              <name>CH0OC</name>
38411              <description>Channel 0 Software Output Control Enable</description>
38412              <bitOffset>0</bitOffset>
38413              <bitWidth>1</bitWidth>
38414              <access>read-write</access>
38415              <enumeratedValues>
38416                <enumeratedValue>
38417                  <name>0</name>
38418                  <description>The channel output is not affected by software output control.</description>
38419                  <value>#0</value>
38420                </enumeratedValue>
38421                <enumeratedValue>
38422                  <name>1</name>
38423                  <description>The channel output is affected by software output control.</description>
38424                  <value>#1</value>
38425                </enumeratedValue>
38426              </enumeratedValues>
38427            </field>
38428            <field>
38429              <name>CH1OC</name>
38430              <description>Channel 1 Software Output Control Enable</description>
38431              <bitOffset>1</bitOffset>
38432              <bitWidth>1</bitWidth>
38433              <access>read-write</access>
38434              <enumeratedValues>
38435                <enumeratedValue>
38436                  <name>0</name>
38437                  <description>The channel output is not affected by software output control.</description>
38438                  <value>#0</value>
38439                </enumeratedValue>
38440                <enumeratedValue>
38441                  <name>1</name>
38442                  <description>The channel output is affected by software output control.</description>
38443                  <value>#1</value>
38444                </enumeratedValue>
38445              </enumeratedValues>
38446            </field>
38447            <field>
38448              <name>CH2OC</name>
38449              <description>Channel 2 Software Output Control Enable</description>
38450              <bitOffset>2</bitOffset>
38451              <bitWidth>1</bitWidth>
38452              <access>read-write</access>
38453              <enumeratedValues>
38454                <enumeratedValue>
38455                  <name>0</name>
38456                  <description>The channel output is not affected by software output control.</description>
38457                  <value>#0</value>
38458                </enumeratedValue>
38459                <enumeratedValue>
38460                  <name>1</name>
38461                  <description>The channel output is affected by software output control.</description>
38462                  <value>#1</value>
38463                </enumeratedValue>
38464              </enumeratedValues>
38465            </field>
38466            <field>
38467              <name>CH3OC</name>
38468              <description>Channel 3 Software Output Control Enable</description>
38469              <bitOffset>3</bitOffset>
38470              <bitWidth>1</bitWidth>
38471              <access>read-write</access>
38472              <enumeratedValues>
38473                <enumeratedValue>
38474                  <name>0</name>
38475                  <description>The channel output is not affected by software output control.</description>
38476                  <value>#0</value>
38477                </enumeratedValue>
38478                <enumeratedValue>
38479                  <name>1</name>
38480                  <description>The channel output is affected by software output control.</description>
38481                  <value>#1</value>
38482                </enumeratedValue>
38483              </enumeratedValues>
38484            </field>
38485            <field>
38486              <name>CH4OC</name>
38487              <description>Channel 4 Software Output Control Enable</description>
38488              <bitOffset>4</bitOffset>
38489              <bitWidth>1</bitWidth>
38490              <access>read-write</access>
38491              <enumeratedValues>
38492                <enumeratedValue>
38493                  <name>0</name>
38494                  <description>The channel output is not affected by software output control.</description>
38495                  <value>#0</value>
38496                </enumeratedValue>
38497                <enumeratedValue>
38498                  <name>1</name>
38499                  <description>The channel output is affected by software output control.</description>
38500                  <value>#1</value>
38501                </enumeratedValue>
38502              </enumeratedValues>
38503            </field>
38504            <field>
38505              <name>CH5OC</name>
38506              <description>Channel 5 Software Output Control Enable</description>
38507              <bitOffset>5</bitOffset>
38508              <bitWidth>1</bitWidth>
38509              <access>read-write</access>
38510              <enumeratedValues>
38511                <enumeratedValue>
38512                  <name>0</name>
38513                  <description>The channel output is not affected by software output control.</description>
38514                  <value>#0</value>
38515                </enumeratedValue>
38516                <enumeratedValue>
38517                  <name>1</name>
38518                  <description>The channel output is affected by software output control.</description>
38519                  <value>#1</value>
38520                </enumeratedValue>
38521              </enumeratedValues>
38522            </field>
38523            <field>
38524              <name>CH6OC</name>
38525              <description>Channel 6 Software Output Control Enable</description>
38526              <bitOffset>6</bitOffset>
38527              <bitWidth>1</bitWidth>
38528              <access>read-write</access>
38529              <enumeratedValues>
38530                <enumeratedValue>
38531                  <name>0</name>
38532                  <description>The channel output is not affected by software output control.</description>
38533                  <value>#0</value>
38534                </enumeratedValue>
38535                <enumeratedValue>
38536                  <name>1</name>
38537                  <description>The channel output is affected by software output control.</description>
38538                  <value>#1</value>
38539                </enumeratedValue>
38540              </enumeratedValues>
38541            </field>
38542            <field>
38543              <name>CH7OC</name>
38544              <description>Channel 7 Software Output Control Enable</description>
38545              <bitOffset>7</bitOffset>
38546              <bitWidth>1</bitWidth>
38547              <access>read-write</access>
38548              <enumeratedValues>
38549                <enumeratedValue>
38550                  <name>0</name>
38551                  <description>The channel output is not affected by software output control.</description>
38552                  <value>#0</value>
38553                </enumeratedValue>
38554                <enumeratedValue>
38555                  <name>1</name>
38556                  <description>The channel output is affected by software output control.</description>
38557                  <value>#1</value>
38558                </enumeratedValue>
38559              </enumeratedValues>
38560            </field>
38561            <field>
38562              <name>CH0OCV</name>
38563              <description>Channel 0 Software Output Control Value</description>
38564              <bitOffset>8</bitOffset>
38565              <bitWidth>1</bitWidth>
38566              <access>read-write</access>
38567              <enumeratedValues>
38568                <enumeratedValue>
38569                  <name>0</name>
38570                  <description>The software output control forces 0 to the channel output.</description>
38571                  <value>#0</value>
38572                </enumeratedValue>
38573                <enumeratedValue>
38574                  <name>1</name>
38575                  <description>The software output control forces 1 to the channel output.</description>
38576                  <value>#1</value>
38577                </enumeratedValue>
38578              </enumeratedValues>
38579            </field>
38580            <field>
38581              <name>CH1OCV</name>
38582              <description>Channel 1 Software Output Control Value</description>
38583              <bitOffset>9</bitOffset>
38584              <bitWidth>1</bitWidth>
38585              <access>read-write</access>
38586              <enumeratedValues>
38587                <enumeratedValue>
38588                  <name>0</name>
38589                  <description>The software output control forces 0 to the channel output.</description>
38590                  <value>#0</value>
38591                </enumeratedValue>
38592                <enumeratedValue>
38593                  <name>1</name>
38594                  <description>The software output control forces 1 to the channel output.</description>
38595                  <value>#1</value>
38596                </enumeratedValue>
38597              </enumeratedValues>
38598            </field>
38599            <field>
38600              <name>CH2OCV</name>
38601              <description>Channel 2 Software Output Control Value</description>
38602              <bitOffset>10</bitOffset>
38603              <bitWidth>1</bitWidth>
38604              <access>read-write</access>
38605              <enumeratedValues>
38606                <enumeratedValue>
38607                  <name>0</name>
38608                  <description>The software output control forces 0 to the channel output.</description>
38609                  <value>#0</value>
38610                </enumeratedValue>
38611                <enumeratedValue>
38612                  <name>1</name>
38613                  <description>The software output control forces 1 to the channel output.</description>
38614                  <value>#1</value>
38615                </enumeratedValue>
38616              </enumeratedValues>
38617            </field>
38618            <field>
38619              <name>CH3OCV</name>
38620              <description>Channel 3 Software Output Control Value</description>
38621              <bitOffset>11</bitOffset>
38622              <bitWidth>1</bitWidth>
38623              <access>read-write</access>
38624              <enumeratedValues>
38625                <enumeratedValue>
38626                  <name>0</name>
38627                  <description>The software output control forces 0 to the channel output.</description>
38628                  <value>#0</value>
38629                </enumeratedValue>
38630                <enumeratedValue>
38631                  <name>1</name>
38632                  <description>The software output control forces 1 to the channel output.</description>
38633                  <value>#1</value>
38634                </enumeratedValue>
38635              </enumeratedValues>
38636            </field>
38637            <field>
38638              <name>CH4OCV</name>
38639              <description>Channel 4 Software Output Control Value</description>
38640              <bitOffset>12</bitOffset>
38641              <bitWidth>1</bitWidth>
38642              <access>read-write</access>
38643              <enumeratedValues>
38644                <enumeratedValue>
38645                  <name>0</name>
38646                  <description>The software output control forces 0 to the channel output.</description>
38647                  <value>#0</value>
38648                </enumeratedValue>
38649                <enumeratedValue>
38650                  <name>1</name>
38651                  <description>The software output control forces 1 to the channel output.</description>
38652                  <value>#1</value>
38653                </enumeratedValue>
38654              </enumeratedValues>
38655            </field>
38656            <field>
38657              <name>CH5OCV</name>
38658              <description>Channel 5 Software Output Control Value</description>
38659              <bitOffset>13</bitOffset>
38660              <bitWidth>1</bitWidth>
38661              <access>read-write</access>
38662              <enumeratedValues>
38663                <enumeratedValue>
38664                  <name>0</name>
38665                  <description>The software output control forces 0 to the channel output.</description>
38666                  <value>#0</value>
38667                </enumeratedValue>
38668                <enumeratedValue>
38669                  <name>1</name>
38670                  <description>The software output control forces 1 to the channel output.</description>
38671                  <value>#1</value>
38672                </enumeratedValue>
38673              </enumeratedValues>
38674            </field>
38675            <field>
38676              <name>CH6OCV</name>
38677              <description>Channel 6 Software Output Control Value</description>
38678              <bitOffset>14</bitOffset>
38679              <bitWidth>1</bitWidth>
38680              <access>read-write</access>
38681              <enumeratedValues>
38682                <enumeratedValue>
38683                  <name>0</name>
38684                  <description>The software output control forces 0 to the channel output.</description>
38685                  <value>#0</value>
38686                </enumeratedValue>
38687                <enumeratedValue>
38688                  <name>1</name>
38689                  <description>The software output control forces 1 to the channel output.</description>
38690                  <value>#1</value>
38691                </enumeratedValue>
38692              </enumeratedValues>
38693            </field>
38694            <field>
38695              <name>CH7OCV</name>
38696              <description>Channel 7 Software Output Control Value</description>
38697              <bitOffset>15</bitOffset>
38698              <bitWidth>1</bitWidth>
38699              <access>read-write</access>
38700              <enumeratedValues>
38701                <enumeratedValue>
38702                  <name>0</name>
38703                  <description>The software output control forces 0 to the channel output.</description>
38704                  <value>#0</value>
38705                </enumeratedValue>
38706                <enumeratedValue>
38707                  <name>1</name>
38708                  <description>The software output control forces 1 to the channel output.</description>
38709                  <value>#1</value>
38710                </enumeratedValue>
38711              </enumeratedValues>
38712            </field>
38713          </fields>
38714        </register>
38715        <register>
38716          <name>PWMLOAD</name>
38717          <description>FTM PWM Load</description>
38718          <addressOffset>0x98</addressOffset>
38719          <size>32</size>
38720          <access>read-write</access>
38721          <resetValue>0</resetValue>
38722          <resetMask>0xFFFFFFFF</resetMask>
38723          <fields>
38724            <field>
38725              <name>CH0SEL</name>
38726              <description>Channel 0 Select</description>
38727              <bitOffset>0</bitOffset>
38728              <bitWidth>1</bitWidth>
38729              <access>read-write</access>
38730              <enumeratedValues>
38731                <enumeratedValue>
38732                  <name>0</name>
38733                  <description>Do not include the channel in the matching process.</description>
38734                  <value>#0</value>
38735                </enumeratedValue>
38736                <enumeratedValue>
38737                  <name>1</name>
38738                  <description>Include the channel in the matching process.</description>
38739                  <value>#1</value>
38740                </enumeratedValue>
38741              </enumeratedValues>
38742            </field>
38743            <field>
38744              <name>CH1SEL</name>
38745              <description>Channel 1 Select</description>
38746              <bitOffset>1</bitOffset>
38747              <bitWidth>1</bitWidth>
38748              <access>read-write</access>
38749              <enumeratedValues>
38750                <enumeratedValue>
38751                  <name>0</name>
38752                  <description>Do not include the channel in the matching process.</description>
38753                  <value>#0</value>
38754                </enumeratedValue>
38755                <enumeratedValue>
38756                  <name>1</name>
38757                  <description>Include the channel in the matching process.</description>
38758                  <value>#1</value>
38759                </enumeratedValue>
38760              </enumeratedValues>
38761            </field>
38762            <field>
38763              <name>CH2SEL</name>
38764              <description>Channel 2 Select</description>
38765              <bitOffset>2</bitOffset>
38766              <bitWidth>1</bitWidth>
38767              <access>read-write</access>
38768              <enumeratedValues>
38769                <enumeratedValue>
38770                  <name>0</name>
38771                  <description>Do not include the channel in the matching process.</description>
38772                  <value>#0</value>
38773                </enumeratedValue>
38774                <enumeratedValue>
38775                  <name>1</name>
38776                  <description>Include the channel in the matching process.</description>
38777                  <value>#1</value>
38778                </enumeratedValue>
38779              </enumeratedValues>
38780            </field>
38781            <field>
38782              <name>CH3SEL</name>
38783              <description>Channel 3 Select</description>
38784              <bitOffset>3</bitOffset>
38785              <bitWidth>1</bitWidth>
38786              <access>read-write</access>
38787              <enumeratedValues>
38788                <enumeratedValue>
38789                  <name>0</name>
38790                  <description>Do not include the channel in the matching process.</description>
38791                  <value>#0</value>
38792                </enumeratedValue>
38793                <enumeratedValue>
38794                  <name>1</name>
38795                  <description>Include the channel in the matching process.</description>
38796                  <value>#1</value>
38797                </enumeratedValue>
38798              </enumeratedValues>
38799            </field>
38800            <field>
38801              <name>CH4SEL</name>
38802              <description>Channel 4 Select</description>
38803              <bitOffset>4</bitOffset>
38804              <bitWidth>1</bitWidth>
38805              <access>read-write</access>
38806              <enumeratedValues>
38807                <enumeratedValue>
38808                  <name>0</name>
38809                  <description>Do not include the channel in the matching process.</description>
38810                  <value>#0</value>
38811                </enumeratedValue>
38812                <enumeratedValue>
38813                  <name>1</name>
38814                  <description>Include the channel in the matching process.</description>
38815                  <value>#1</value>
38816                </enumeratedValue>
38817              </enumeratedValues>
38818            </field>
38819            <field>
38820              <name>CH5SEL</name>
38821              <description>Channel 5 Select</description>
38822              <bitOffset>5</bitOffset>
38823              <bitWidth>1</bitWidth>
38824              <access>read-write</access>
38825              <enumeratedValues>
38826                <enumeratedValue>
38827                  <name>0</name>
38828                  <description>Do not include the channel in the matching process.</description>
38829                  <value>#0</value>
38830                </enumeratedValue>
38831                <enumeratedValue>
38832                  <name>1</name>
38833                  <description>Include the channel in the matching process.</description>
38834                  <value>#1</value>
38835                </enumeratedValue>
38836              </enumeratedValues>
38837            </field>
38838            <field>
38839              <name>CH6SEL</name>
38840              <description>Channel 6 Select</description>
38841              <bitOffset>6</bitOffset>
38842              <bitWidth>1</bitWidth>
38843              <access>read-write</access>
38844              <enumeratedValues>
38845                <enumeratedValue>
38846                  <name>0</name>
38847                  <description>Do not include the channel in the matching process.</description>
38848                  <value>#0</value>
38849                </enumeratedValue>
38850                <enumeratedValue>
38851                  <name>1</name>
38852                  <description>Include the channel in the matching process.</description>
38853                  <value>#1</value>
38854                </enumeratedValue>
38855              </enumeratedValues>
38856            </field>
38857            <field>
38858              <name>CH7SEL</name>
38859              <description>Channel 7 Select</description>
38860              <bitOffset>7</bitOffset>
38861              <bitWidth>1</bitWidth>
38862              <access>read-write</access>
38863              <enumeratedValues>
38864                <enumeratedValue>
38865                  <name>0</name>
38866                  <description>Do not include the channel in the matching process.</description>
38867                  <value>#0</value>
38868                </enumeratedValue>
38869                <enumeratedValue>
38870                  <name>1</name>
38871                  <description>Include the channel in the matching process.</description>
38872                  <value>#1</value>
38873                </enumeratedValue>
38874              </enumeratedValues>
38875            </field>
38876            <field>
38877              <name>LDOK</name>
38878              <description>Load Enable</description>
38879              <bitOffset>9</bitOffset>
38880              <bitWidth>1</bitWidth>
38881              <access>read-write</access>
38882              <enumeratedValues>
38883                <enumeratedValue>
38884                  <name>0</name>
38885                  <description>Loading updated values is disabled.</description>
38886                  <value>#0</value>
38887                </enumeratedValue>
38888                <enumeratedValue>
38889                  <name>1</name>
38890                  <description>Loading updated values is enabled.</description>
38891                  <value>#1</value>
38892                </enumeratedValue>
38893              </enumeratedValues>
38894            </field>
38895          </fields>
38896        </register>
38897      </registers>
38898    </peripheral>
38899    <peripheral>
38900      <name>FTM1</name>
38901      <description>FlexTimer Module</description>
38902      <groupName>FTM</groupName>
38903      <prependToName>FTM1_</prependToName>
38904      <baseAddress>0x40039000</baseAddress>
38905      <addressBlock>
38906        <offset>0</offset>
38907        <size>0x9C</size>
38908        <usage>registers</usage>
38909      </addressBlock>
38910      <interrupt>
38911        <name>FTM1</name>
38912        <value>43</value>
38913      </interrupt>
38914      <registers>
38915        <register>
38916          <name>SC</name>
38917          <description>Status And Control</description>
38918          <addressOffset>0</addressOffset>
38919          <size>32</size>
38920          <access>read-write</access>
38921          <resetValue>0</resetValue>
38922          <resetMask>0xFFFFFFFF</resetMask>
38923          <fields>
38924            <field>
38925              <name>PS</name>
38926              <description>Prescale Factor Selection</description>
38927              <bitOffset>0</bitOffset>
38928              <bitWidth>3</bitWidth>
38929              <access>read-write</access>
38930              <enumeratedValues>
38931                <enumeratedValue>
38932                  <name>000</name>
38933                  <description>Divide by 1</description>
38934                  <value>#000</value>
38935                </enumeratedValue>
38936                <enumeratedValue>
38937                  <name>001</name>
38938                  <description>Divide by 2</description>
38939                  <value>#001</value>
38940                </enumeratedValue>
38941                <enumeratedValue>
38942                  <name>010</name>
38943                  <description>Divide by 4</description>
38944                  <value>#010</value>
38945                </enumeratedValue>
38946                <enumeratedValue>
38947                  <name>011</name>
38948                  <description>Divide by 8</description>
38949                  <value>#011</value>
38950                </enumeratedValue>
38951                <enumeratedValue>
38952                  <name>100</name>
38953                  <description>Divide by 16</description>
38954                  <value>#100</value>
38955                </enumeratedValue>
38956                <enumeratedValue>
38957                  <name>101</name>
38958                  <description>Divide by 32</description>
38959                  <value>#101</value>
38960                </enumeratedValue>
38961                <enumeratedValue>
38962                  <name>110</name>
38963                  <description>Divide by 64</description>
38964                  <value>#110</value>
38965                </enumeratedValue>
38966                <enumeratedValue>
38967                  <name>111</name>
38968                  <description>Divide by 128</description>
38969                  <value>#111</value>
38970                </enumeratedValue>
38971              </enumeratedValues>
38972            </field>
38973            <field>
38974              <name>CLKS</name>
38975              <description>Clock Source Selection</description>
38976              <bitOffset>3</bitOffset>
38977              <bitWidth>2</bitWidth>
38978              <access>read-write</access>
38979              <enumeratedValues>
38980                <enumeratedValue>
38981                  <name>00</name>
38982                  <description>No clock selected. This in effect disables the FTM counter.</description>
38983                  <value>#00</value>
38984                </enumeratedValue>
38985                <enumeratedValue>
38986                  <name>01</name>
38987                  <description>System clock</description>
38988                  <value>#01</value>
38989                </enumeratedValue>
38990                <enumeratedValue>
38991                  <name>10</name>
38992                  <description>Fixed frequency clock</description>
38993                  <value>#10</value>
38994                </enumeratedValue>
38995                <enumeratedValue>
38996                  <name>11</name>
38997                  <description>External clock</description>
38998                  <value>#11</value>
38999                </enumeratedValue>
39000              </enumeratedValues>
39001            </field>
39002            <field>
39003              <name>CPWMS</name>
39004              <description>Center-Aligned PWM Select</description>
39005              <bitOffset>5</bitOffset>
39006              <bitWidth>1</bitWidth>
39007              <access>read-write</access>
39008              <enumeratedValues>
39009                <enumeratedValue>
39010                  <name>0</name>
39011                  <description>FTM counter operates in Up Counting mode.</description>
39012                  <value>#0</value>
39013                </enumeratedValue>
39014                <enumeratedValue>
39015                  <name>1</name>
39016                  <description>FTM counter operates in Up-Down Counting mode.</description>
39017                  <value>#1</value>
39018                </enumeratedValue>
39019              </enumeratedValues>
39020            </field>
39021            <field>
39022              <name>TOIE</name>
39023              <description>Timer Overflow Interrupt Enable</description>
39024              <bitOffset>6</bitOffset>
39025              <bitWidth>1</bitWidth>
39026              <access>read-write</access>
39027              <enumeratedValues>
39028                <enumeratedValue>
39029                  <name>0</name>
39030                  <description>Disable TOF interrupts. Use software polling.</description>
39031                  <value>#0</value>
39032                </enumeratedValue>
39033                <enumeratedValue>
39034                  <name>1</name>
39035                  <description>Enable TOF interrupts. An interrupt is generated when TOF equals one.</description>
39036                  <value>#1</value>
39037                </enumeratedValue>
39038              </enumeratedValues>
39039            </field>
39040            <field>
39041              <name>TOF</name>
39042              <description>Timer Overflow Flag</description>
39043              <bitOffset>7</bitOffset>
39044              <bitWidth>1</bitWidth>
39045              <access>read-write</access>
39046              <enumeratedValues>
39047                <enumeratedValue>
39048                  <name>0</name>
39049                  <description>FTM counter has not overflowed.</description>
39050                  <value>#0</value>
39051                </enumeratedValue>
39052                <enumeratedValue>
39053                  <name>1</name>
39054                  <description>FTM counter has overflowed.</description>
39055                  <value>#1</value>
39056                </enumeratedValue>
39057              </enumeratedValues>
39058            </field>
39059          </fields>
39060        </register>
39061        <register>
39062          <name>CNT</name>
39063          <description>Counter</description>
39064          <addressOffset>0x4</addressOffset>
39065          <size>32</size>
39066          <access>read-write</access>
39067          <resetValue>0</resetValue>
39068          <resetMask>0xFFFFFFFF</resetMask>
39069          <fields>
39070            <field>
39071              <name>COUNT</name>
39072              <description>Counter Value</description>
39073              <bitOffset>0</bitOffset>
39074              <bitWidth>16</bitWidth>
39075              <access>read-write</access>
39076            </field>
39077          </fields>
39078        </register>
39079        <register>
39080          <name>MOD</name>
39081          <description>Modulo</description>
39082          <addressOffset>0x8</addressOffset>
39083          <size>32</size>
39084          <access>read-write</access>
39085          <resetValue>0</resetValue>
39086          <resetMask>0xFFFFFFFF</resetMask>
39087          <fields>
39088            <field>
39089              <name>MOD</name>
39090              <description>Modulo Value</description>
39091              <bitOffset>0</bitOffset>
39092              <bitWidth>16</bitWidth>
39093              <access>read-write</access>
39094            </field>
39095          </fields>
39096        </register>
39097        <register>
39098          <dim>2</dim>
39099          <dimIncrement>0x8</dimIncrement>
39100          <dimIndex>0,1</dimIndex>
39101          <name>C%sSC</name>
39102          <description>Channel (n) Status And Control</description>
39103          <addressOffset>0xC</addressOffset>
39104          <size>32</size>
39105          <access>read-write</access>
39106          <resetValue>0</resetValue>
39107          <resetMask>0xFFFFFFFF</resetMask>
39108          <fields>
39109            <field>
39110              <name>DMA</name>
39111              <description>DMA Enable</description>
39112              <bitOffset>0</bitOffset>
39113              <bitWidth>1</bitWidth>
39114              <access>read-write</access>
39115              <enumeratedValues>
39116                <enumeratedValue>
39117                  <name>0</name>
39118                  <description>Disable DMA transfers.</description>
39119                  <value>#0</value>
39120                </enumeratedValue>
39121                <enumeratedValue>
39122                  <name>1</name>
39123                  <description>Enable DMA transfers.</description>
39124                  <value>#1</value>
39125                </enumeratedValue>
39126              </enumeratedValues>
39127            </field>
39128            <field>
39129              <name>ICRST</name>
39130              <description>FTM counter reset by the selected input capture event.</description>
39131              <bitOffset>1</bitOffset>
39132              <bitWidth>1</bitWidth>
39133              <access>read-write</access>
39134              <enumeratedValues>
39135                <enumeratedValue>
39136                  <name>0</name>
39137                  <description>FTM counter is not reset when the selected channel (n) input event is detected.</description>
39138                  <value>#0</value>
39139                </enumeratedValue>
39140                <enumeratedValue>
39141                  <name>1</name>
39142                  <description>FTM counter is reset when the selected channel (n) input event is detected.</description>
39143                  <value>#1</value>
39144                </enumeratedValue>
39145              </enumeratedValues>
39146            </field>
39147            <field>
39148              <name>ELSA</name>
39149              <description>Edge or Level Select</description>
39150              <bitOffset>2</bitOffset>
39151              <bitWidth>1</bitWidth>
39152              <access>read-write</access>
39153            </field>
39154            <field>
39155              <name>ELSB</name>
39156              <description>Edge or Level Select</description>
39157              <bitOffset>3</bitOffset>
39158              <bitWidth>1</bitWidth>
39159              <access>read-write</access>
39160            </field>
39161            <field>
39162              <name>MSA</name>
39163              <description>Channel Mode Select</description>
39164              <bitOffset>4</bitOffset>
39165              <bitWidth>1</bitWidth>
39166              <access>read-write</access>
39167            </field>
39168            <field>
39169              <name>MSB</name>
39170              <description>Channel Mode Select</description>
39171              <bitOffset>5</bitOffset>
39172              <bitWidth>1</bitWidth>
39173              <access>read-write</access>
39174            </field>
39175            <field>
39176              <name>CHIE</name>
39177              <description>Channel Interrupt Enable</description>
39178              <bitOffset>6</bitOffset>
39179              <bitWidth>1</bitWidth>
39180              <access>read-write</access>
39181              <enumeratedValues>
39182                <enumeratedValue>
39183                  <name>0</name>
39184                  <description>Disable channel interrupts. Use software polling.</description>
39185                  <value>#0</value>
39186                </enumeratedValue>
39187                <enumeratedValue>
39188                  <name>1</name>
39189                  <description>Enable channel interrupts.</description>
39190                  <value>#1</value>
39191                </enumeratedValue>
39192              </enumeratedValues>
39193            </field>
39194            <field>
39195              <name>CHF</name>
39196              <description>Channel Flag</description>
39197              <bitOffset>7</bitOffset>
39198              <bitWidth>1</bitWidth>
39199              <access>read-write</access>
39200              <enumeratedValues>
39201                <enumeratedValue>
39202                  <name>0</name>
39203                  <description>No channel event has occurred.</description>
39204                  <value>#0</value>
39205                </enumeratedValue>
39206                <enumeratedValue>
39207                  <name>1</name>
39208                  <description>A channel event has occurred.</description>
39209                  <value>#1</value>
39210                </enumeratedValue>
39211              </enumeratedValues>
39212            </field>
39213          </fields>
39214        </register>
39215        <register>
39216          <dim>2</dim>
39217          <dimIncrement>0x8</dimIncrement>
39218          <dimIndex>0,1</dimIndex>
39219          <name>C%sV</name>
39220          <description>Channel (n) Value</description>
39221          <addressOffset>0x10</addressOffset>
39222          <size>32</size>
39223          <access>read-write</access>
39224          <resetValue>0</resetValue>
39225          <resetMask>0xFFFFFFFF</resetMask>
39226          <fields>
39227            <field>
39228              <name>VAL</name>
39229              <description>Channel Value</description>
39230              <bitOffset>0</bitOffset>
39231              <bitWidth>16</bitWidth>
39232              <access>read-write</access>
39233            </field>
39234          </fields>
39235        </register>
39236        <register>
39237          <name>CNTIN</name>
39238          <description>Counter Initial Value</description>
39239          <addressOffset>0x4C</addressOffset>
39240          <size>32</size>
39241          <access>read-write</access>
39242          <resetValue>0</resetValue>
39243          <resetMask>0xFFFFFFFF</resetMask>
39244          <fields>
39245            <field>
39246              <name>INIT</name>
39247              <description>Initial Value Of The FTM Counter</description>
39248              <bitOffset>0</bitOffset>
39249              <bitWidth>16</bitWidth>
39250              <access>read-write</access>
39251            </field>
39252          </fields>
39253        </register>
39254        <register>
39255          <name>STATUS</name>
39256          <description>Capture And Compare Status</description>
39257          <addressOffset>0x50</addressOffset>
39258          <size>32</size>
39259          <access>read-write</access>
39260          <resetValue>0</resetValue>
39261          <resetMask>0xFFFFFFFF</resetMask>
39262          <fields>
39263            <field>
39264              <name>CH0F</name>
39265              <description>Channel 0 Flag</description>
39266              <bitOffset>0</bitOffset>
39267              <bitWidth>1</bitWidth>
39268              <access>read-write</access>
39269              <enumeratedValues>
39270                <enumeratedValue>
39271                  <name>0</name>
39272                  <description>No channel event has occurred.</description>
39273                  <value>#0</value>
39274                </enumeratedValue>
39275                <enumeratedValue>
39276                  <name>1</name>
39277                  <description>A channel event has occurred.</description>
39278                  <value>#1</value>
39279                </enumeratedValue>
39280              </enumeratedValues>
39281            </field>
39282            <field>
39283              <name>CH1F</name>
39284              <description>Channel 1 Flag</description>
39285              <bitOffset>1</bitOffset>
39286              <bitWidth>1</bitWidth>
39287              <access>read-write</access>
39288              <enumeratedValues>
39289                <enumeratedValue>
39290                  <name>0</name>
39291                  <description>No channel event has occurred.</description>
39292                  <value>#0</value>
39293                </enumeratedValue>
39294                <enumeratedValue>
39295                  <name>1</name>
39296                  <description>A channel event has occurred.</description>
39297                  <value>#1</value>
39298                </enumeratedValue>
39299              </enumeratedValues>
39300            </field>
39301            <field>
39302              <name>CH2F</name>
39303              <description>Channel 2 Flag</description>
39304              <bitOffset>2</bitOffset>
39305              <bitWidth>1</bitWidth>
39306              <access>read-write</access>
39307              <enumeratedValues>
39308                <enumeratedValue>
39309                  <name>0</name>
39310                  <description>No channel event has occurred.</description>
39311                  <value>#0</value>
39312                </enumeratedValue>
39313                <enumeratedValue>
39314                  <name>1</name>
39315                  <description>A channel event has occurred.</description>
39316                  <value>#1</value>
39317                </enumeratedValue>
39318              </enumeratedValues>
39319            </field>
39320            <field>
39321              <name>CH3F</name>
39322              <description>Channel 3 Flag</description>
39323              <bitOffset>3</bitOffset>
39324              <bitWidth>1</bitWidth>
39325              <access>read-write</access>
39326              <enumeratedValues>
39327                <enumeratedValue>
39328                  <name>0</name>
39329                  <description>No channel event has occurred.</description>
39330                  <value>#0</value>
39331                </enumeratedValue>
39332                <enumeratedValue>
39333                  <name>1</name>
39334                  <description>A channel event has occurred.</description>
39335                  <value>#1</value>
39336                </enumeratedValue>
39337              </enumeratedValues>
39338            </field>
39339            <field>
39340              <name>CH4F</name>
39341              <description>Channel 4 Flag</description>
39342              <bitOffset>4</bitOffset>
39343              <bitWidth>1</bitWidth>
39344              <access>read-write</access>
39345              <enumeratedValues>
39346                <enumeratedValue>
39347                  <name>0</name>
39348                  <description>No channel event has occurred.</description>
39349                  <value>#0</value>
39350                </enumeratedValue>
39351                <enumeratedValue>
39352                  <name>1</name>
39353                  <description>A channel event has occurred.</description>
39354                  <value>#1</value>
39355                </enumeratedValue>
39356              </enumeratedValues>
39357            </field>
39358            <field>
39359              <name>CH5F</name>
39360              <description>Channel 5 Flag</description>
39361              <bitOffset>5</bitOffset>
39362              <bitWidth>1</bitWidth>
39363              <access>read-write</access>
39364              <enumeratedValues>
39365                <enumeratedValue>
39366                  <name>0</name>
39367                  <description>No channel event has occurred.</description>
39368                  <value>#0</value>
39369                </enumeratedValue>
39370                <enumeratedValue>
39371                  <name>1</name>
39372                  <description>A channel event has occurred.</description>
39373                  <value>#1</value>
39374                </enumeratedValue>
39375              </enumeratedValues>
39376            </field>
39377            <field>
39378              <name>CH6F</name>
39379              <description>Channel 6 Flag</description>
39380              <bitOffset>6</bitOffset>
39381              <bitWidth>1</bitWidth>
39382              <access>read-write</access>
39383              <enumeratedValues>
39384                <enumeratedValue>
39385                  <name>0</name>
39386                  <description>No channel event has occurred.</description>
39387                  <value>#0</value>
39388                </enumeratedValue>
39389                <enumeratedValue>
39390                  <name>1</name>
39391                  <description>A channel event has occurred.</description>
39392                  <value>#1</value>
39393                </enumeratedValue>
39394              </enumeratedValues>
39395            </field>
39396            <field>
39397              <name>CH7F</name>
39398              <description>Channel 7 Flag</description>
39399              <bitOffset>7</bitOffset>
39400              <bitWidth>1</bitWidth>
39401              <access>read-write</access>
39402              <enumeratedValues>
39403                <enumeratedValue>
39404                  <name>0</name>
39405                  <description>No channel event has occurred.</description>
39406                  <value>#0</value>
39407                </enumeratedValue>
39408                <enumeratedValue>
39409                  <name>1</name>
39410                  <description>A channel event has occurred.</description>
39411                  <value>#1</value>
39412                </enumeratedValue>
39413              </enumeratedValues>
39414            </field>
39415          </fields>
39416        </register>
39417        <register>
39418          <name>MODE</name>
39419          <description>Features Mode Selection</description>
39420          <addressOffset>0x54</addressOffset>
39421          <size>32</size>
39422          <access>read-write</access>
39423          <resetValue>0x4</resetValue>
39424          <resetMask>0xFFFFFFFF</resetMask>
39425          <fields>
39426            <field>
39427              <name>FTMEN</name>
39428              <description>FTM Enable</description>
39429              <bitOffset>0</bitOffset>
39430              <bitWidth>1</bitWidth>
39431              <access>read-write</access>
39432              <enumeratedValues>
39433                <enumeratedValue>
39434                  <name>0</name>
39435                  <description>TPM compatibility. Free running counter and synchronization compatible with TPM.</description>
39436                  <value>#0</value>
39437                </enumeratedValue>
39438                <enumeratedValue>
39439                  <name>1</name>
39440                  <description>Free running counter and synchronization are different from TPM behavior.</description>
39441                  <value>#1</value>
39442                </enumeratedValue>
39443              </enumeratedValues>
39444            </field>
39445            <field>
39446              <name>INIT</name>
39447              <description>Initialize The Channels Output</description>
39448              <bitOffset>1</bitOffset>
39449              <bitWidth>1</bitWidth>
39450              <access>read-write</access>
39451            </field>
39452            <field>
39453              <name>WPDIS</name>
39454              <description>Write Protection Disable</description>
39455              <bitOffset>2</bitOffset>
39456              <bitWidth>1</bitWidth>
39457              <access>read-write</access>
39458              <enumeratedValues>
39459                <enumeratedValue>
39460                  <name>0</name>
39461                  <description>Write protection is enabled.</description>
39462                  <value>#0</value>
39463                </enumeratedValue>
39464                <enumeratedValue>
39465                  <name>1</name>
39466                  <description>Write protection is disabled.</description>
39467                  <value>#1</value>
39468                </enumeratedValue>
39469              </enumeratedValues>
39470            </field>
39471            <field>
39472              <name>PWMSYNC</name>
39473              <description>PWM Synchronization Mode</description>
39474              <bitOffset>3</bitOffset>
39475              <bitWidth>1</bitWidth>
39476              <access>read-write</access>
39477              <enumeratedValues>
39478                <enumeratedValue>
39479                  <name>0</name>
39480                  <description>No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization.</description>
39481                  <value>#0</value>
39482                </enumeratedValue>
39483                <enumeratedValue>
39484                  <name>1</name>
39485                  <description>Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization.</description>
39486                  <value>#1</value>
39487                </enumeratedValue>
39488              </enumeratedValues>
39489            </field>
39490            <field>
39491              <name>CAPTEST</name>
39492              <description>Capture Test Mode Enable</description>
39493              <bitOffset>4</bitOffset>
39494              <bitWidth>1</bitWidth>
39495              <access>read-write</access>
39496              <enumeratedValues>
39497                <enumeratedValue>
39498                  <name>0</name>
39499                  <description>Capture test mode is disabled.</description>
39500                  <value>#0</value>
39501                </enumeratedValue>
39502                <enumeratedValue>
39503                  <name>1</name>
39504                  <description>Capture test mode is enabled.</description>
39505                  <value>#1</value>
39506                </enumeratedValue>
39507              </enumeratedValues>
39508            </field>
39509            <field>
39510              <name>FAULTM</name>
39511              <description>Fault Control Mode</description>
39512              <bitOffset>5</bitOffset>
39513              <bitWidth>2</bitWidth>
39514              <access>read-write</access>
39515              <enumeratedValues>
39516                <enumeratedValue>
39517                  <name>00</name>
39518                  <description>Fault control is disabled for all channels.</description>
39519                  <value>#00</value>
39520                </enumeratedValue>
39521                <enumeratedValue>
39522                  <name>01</name>
39523                  <description>Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing.</description>
39524                  <value>#01</value>
39525                </enumeratedValue>
39526                <enumeratedValue>
39527                  <name>10</name>
39528                  <description>Fault control is enabled for all channels, and the selected mode is the manual fault clearing.</description>
39529                  <value>#10</value>
39530                </enumeratedValue>
39531                <enumeratedValue>
39532                  <name>11</name>
39533                  <description>Fault control is enabled for all channels, and the selected mode is the automatic fault clearing.</description>
39534                  <value>#11</value>
39535                </enumeratedValue>
39536              </enumeratedValues>
39537            </field>
39538            <field>
39539              <name>FAULTIE</name>
39540              <description>Fault Interrupt Enable</description>
39541              <bitOffset>7</bitOffset>
39542              <bitWidth>1</bitWidth>
39543              <access>read-write</access>
39544              <enumeratedValues>
39545                <enumeratedValue>
39546                  <name>0</name>
39547                  <description>Fault control interrupt is disabled.</description>
39548                  <value>#0</value>
39549                </enumeratedValue>
39550                <enumeratedValue>
39551                  <name>1</name>
39552                  <description>Fault control interrupt is enabled.</description>
39553                  <value>#1</value>
39554                </enumeratedValue>
39555              </enumeratedValues>
39556            </field>
39557          </fields>
39558        </register>
39559        <register>
39560          <name>SYNC</name>
39561          <description>Synchronization</description>
39562          <addressOffset>0x58</addressOffset>
39563          <size>32</size>
39564          <access>read-write</access>
39565          <resetValue>0</resetValue>
39566          <resetMask>0xFFFFFFFF</resetMask>
39567          <fields>
39568            <field>
39569              <name>CNTMIN</name>
39570              <description>Minimum Loading Point Enable</description>
39571              <bitOffset>0</bitOffset>
39572              <bitWidth>1</bitWidth>
39573              <access>read-write</access>
39574              <enumeratedValues>
39575                <enumeratedValue>
39576                  <name>0</name>
39577                  <description>The minimum loading point is disabled.</description>
39578                  <value>#0</value>
39579                </enumeratedValue>
39580                <enumeratedValue>
39581                  <name>1</name>
39582                  <description>The minimum loading point is enabled.</description>
39583                  <value>#1</value>
39584                </enumeratedValue>
39585              </enumeratedValues>
39586            </field>
39587            <field>
39588              <name>CNTMAX</name>
39589              <description>Maximum Loading Point Enable</description>
39590              <bitOffset>1</bitOffset>
39591              <bitWidth>1</bitWidth>
39592              <access>read-write</access>
39593              <enumeratedValues>
39594                <enumeratedValue>
39595                  <name>0</name>
39596                  <description>The maximum loading point is disabled.</description>
39597                  <value>#0</value>
39598                </enumeratedValue>
39599                <enumeratedValue>
39600                  <name>1</name>
39601                  <description>The maximum loading point is enabled.</description>
39602                  <value>#1</value>
39603                </enumeratedValue>
39604              </enumeratedValues>
39605            </field>
39606            <field>
39607              <name>REINIT</name>
39608              <description>FTM Counter Reinitialization By Synchronization (FTM counter synchronization)</description>
39609              <bitOffset>2</bitOffset>
39610              <bitWidth>1</bitWidth>
39611              <access>read-write</access>
39612              <enumeratedValues>
39613                <enumeratedValue>
39614                  <name>0</name>
39615                  <description>FTM counter continues to count normally.</description>
39616                  <value>#0</value>
39617                </enumeratedValue>
39618                <enumeratedValue>
39619                  <name>1</name>
39620                  <description>FTM counter is updated with its initial value when the selected trigger is detected.</description>
39621                  <value>#1</value>
39622                </enumeratedValue>
39623              </enumeratedValues>
39624            </field>
39625            <field>
39626              <name>SYNCHOM</name>
39627              <description>Output Mask Synchronization</description>
39628              <bitOffset>3</bitOffset>
39629              <bitWidth>1</bitWidth>
39630              <access>read-write</access>
39631              <enumeratedValues>
39632                <enumeratedValue>
39633                  <name>0</name>
39634                  <description>OUTMASK register is updated with the value of its buffer in all rising edges of the system clock.</description>
39635                  <value>#0</value>
39636                </enumeratedValue>
39637                <enumeratedValue>
39638                  <name>1</name>
39639                  <description>OUTMASK register is updated with the value of its buffer only by the PWM synchronization.</description>
39640                  <value>#1</value>
39641                </enumeratedValue>
39642              </enumeratedValues>
39643            </field>
39644            <field>
39645              <name>TRIG0</name>
39646              <description>PWM Synchronization Hardware Trigger 0</description>
39647              <bitOffset>4</bitOffset>
39648              <bitWidth>1</bitWidth>
39649              <access>read-write</access>
39650              <enumeratedValues>
39651                <enumeratedValue>
39652                  <name>0</name>
39653                  <description>Trigger is disabled.</description>
39654                  <value>#0</value>
39655                </enumeratedValue>
39656                <enumeratedValue>
39657                  <name>1</name>
39658                  <description>Trigger is enabled.</description>
39659                  <value>#1</value>
39660                </enumeratedValue>
39661              </enumeratedValues>
39662            </field>
39663            <field>
39664              <name>TRIG1</name>
39665              <description>PWM Synchronization Hardware Trigger 1</description>
39666              <bitOffset>5</bitOffset>
39667              <bitWidth>1</bitWidth>
39668              <access>read-write</access>
39669              <enumeratedValues>
39670                <enumeratedValue>
39671                  <name>0</name>
39672                  <description>Trigger is disabled.</description>
39673                  <value>#0</value>
39674                </enumeratedValue>
39675                <enumeratedValue>
39676                  <name>1</name>
39677                  <description>Trigger is enabled.</description>
39678                  <value>#1</value>
39679                </enumeratedValue>
39680              </enumeratedValues>
39681            </field>
39682            <field>
39683              <name>TRIG2</name>
39684              <description>PWM Synchronization Hardware Trigger 2</description>
39685              <bitOffset>6</bitOffset>
39686              <bitWidth>1</bitWidth>
39687              <access>read-write</access>
39688              <enumeratedValues>
39689                <enumeratedValue>
39690                  <name>0</name>
39691                  <description>Trigger is disabled.</description>
39692                  <value>#0</value>
39693                </enumeratedValue>
39694                <enumeratedValue>
39695                  <name>1</name>
39696                  <description>Trigger is enabled.</description>
39697                  <value>#1</value>
39698                </enumeratedValue>
39699              </enumeratedValues>
39700            </field>
39701            <field>
39702              <name>SWSYNC</name>
39703              <description>PWM Synchronization Software Trigger</description>
39704              <bitOffset>7</bitOffset>
39705              <bitWidth>1</bitWidth>
39706              <access>read-write</access>
39707              <enumeratedValues>
39708                <enumeratedValue>
39709                  <name>0</name>
39710                  <description>Software trigger is not selected.</description>
39711                  <value>#0</value>
39712                </enumeratedValue>
39713                <enumeratedValue>
39714                  <name>1</name>
39715                  <description>Software trigger is selected.</description>
39716                  <value>#1</value>
39717                </enumeratedValue>
39718              </enumeratedValues>
39719            </field>
39720          </fields>
39721        </register>
39722        <register>
39723          <name>OUTINIT</name>
39724          <description>Initial State For Channels Output</description>
39725          <addressOffset>0x5C</addressOffset>
39726          <size>32</size>
39727          <access>read-write</access>
39728          <resetValue>0</resetValue>
39729          <resetMask>0xFFFFFFFF</resetMask>
39730          <fields>
39731            <field>
39732              <name>CH0OI</name>
39733              <description>Channel 0 Output Initialization Value</description>
39734              <bitOffset>0</bitOffset>
39735              <bitWidth>1</bitWidth>
39736              <access>read-write</access>
39737              <enumeratedValues>
39738                <enumeratedValue>
39739                  <name>0</name>
39740                  <description>The initialization value is 0.</description>
39741                  <value>#0</value>
39742                </enumeratedValue>
39743                <enumeratedValue>
39744                  <name>1</name>
39745                  <description>The initialization value is 1.</description>
39746                  <value>#1</value>
39747                </enumeratedValue>
39748              </enumeratedValues>
39749            </field>
39750            <field>
39751              <name>CH1OI</name>
39752              <description>Channel 1 Output Initialization Value</description>
39753              <bitOffset>1</bitOffset>
39754              <bitWidth>1</bitWidth>
39755              <access>read-write</access>
39756              <enumeratedValues>
39757                <enumeratedValue>
39758                  <name>0</name>
39759                  <description>The initialization value is 0.</description>
39760                  <value>#0</value>
39761                </enumeratedValue>
39762                <enumeratedValue>
39763                  <name>1</name>
39764                  <description>The initialization value is 1.</description>
39765                  <value>#1</value>
39766                </enumeratedValue>
39767              </enumeratedValues>
39768            </field>
39769            <field>
39770              <name>CH2OI</name>
39771              <description>Channel 2 Output Initialization Value</description>
39772              <bitOffset>2</bitOffset>
39773              <bitWidth>1</bitWidth>
39774              <access>read-write</access>
39775              <enumeratedValues>
39776                <enumeratedValue>
39777                  <name>0</name>
39778                  <description>The initialization value is 0.</description>
39779                  <value>#0</value>
39780                </enumeratedValue>
39781                <enumeratedValue>
39782                  <name>1</name>
39783                  <description>The initialization value is 1.</description>
39784                  <value>#1</value>
39785                </enumeratedValue>
39786              </enumeratedValues>
39787            </field>
39788            <field>
39789              <name>CH3OI</name>
39790              <description>Channel 3 Output Initialization Value</description>
39791              <bitOffset>3</bitOffset>
39792              <bitWidth>1</bitWidth>
39793              <access>read-write</access>
39794              <enumeratedValues>
39795                <enumeratedValue>
39796                  <name>0</name>
39797                  <description>The initialization value is 0.</description>
39798                  <value>#0</value>
39799                </enumeratedValue>
39800                <enumeratedValue>
39801                  <name>1</name>
39802                  <description>The initialization value is 1.</description>
39803                  <value>#1</value>
39804                </enumeratedValue>
39805              </enumeratedValues>
39806            </field>
39807            <field>
39808              <name>CH4OI</name>
39809              <description>Channel 4 Output Initialization Value</description>
39810              <bitOffset>4</bitOffset>
39811              <bitWidth>1</bitWidth>
39812              <access>read-write</access>
39813              <enumeratedValues>
39814                <enumeratedValue>
39815                  <name>0</name>
39816                  <description>The initialization value is 0.</description>
39817                  <value>#0</value>
39818                </enumeratedValue>
39819                <enumeratedValue>
39820                  <name>1</name>
39821                  <description>The initialization value is 1.</description>
39822                  <value>#1</value>
39823                </enumeratedValue>
39824              </enumeratedValues>
39825            </field>
39826            <field>
39827              <name>CH5OI</name>
39828              <description>Channel 5 Output Initialization Value</description>
39829              <bitOffset>5</bitOffset>
39830              <bitWidth>1</bitWidth>
39831              <access>read-write</access>
39832              <enumeratedValues>
39833                <enumeratedValue>
39834                  <name>0</name>
39835                  <description>The initialization value is 0.</description>
39836                  <value>#0</value>
39837                </enumeratedValue>
39838                <enumeratedValue>
39839                  <name>1</name>
39840                  <description>The initialization value is 1.</description>
39841                  <value>#1</value>
39842                </enumeratedValue>
39843              </enumeratedValues>
39844            </field>
39845            <field>
39846              <name>CH6OI</name>
39847              <description>Channel 6 Output Initialization Value</description>
39848              <bitOffset>6</bitOffset>
39849              <bitWidth>1</bitWidth>
39850              <access>read-write</access>
39851              <enumeratedValues>
39852                <enumeratedValue>
39853                  <name>0</name>
39854                  <description>The initialization value is 0.</description>
39855                  <value>#0</value>
39856                </enumeratedValue>
39857                <enumeratedValue>
39858                  <name>1</name>
39859                  <description>The initialization value is 1.</description>
39860                  <value>#1</value>
39861                </enumeratedValue>
39862              </enumeratedValues>
39863            </field>
39864            <field>
39865              <name>CH7OI</name>
39866              <description>Channel 7 Output Initialization Value</description>
39867              <bitOffset>7</bitOffset>
39868              <bitWidth>1</bitWidth>
39869              <access>read-write</access>
39870              <enumeratedValues>
39871                <enumeratedValue>
39872                  <name>0</name>
39873                  <description>The initialization value is 0.</description>
39874                  <value>#0</value>
39875                </enumeratedValue>
39876                <enumeratedValue>
39877                  <name>1</name>
39878                  <description>The initialization value is 1.</description>
39879                  <value>#1</value>
39880                </enumeratedValue>
39881              </enumeratedValues>
39882            </field>
39883          </fields>
39884        </register>
39885        <register>
39886          <name>OUTMASK</name>
39887          <description>Output Mask</description>
39888          <addressOffset>0x60</addressOffset>
39889          <size>32</size>
39890          <access>read-write</access>
39891          <resetValue>0</resetValue>
39892          <resetMask>0xFFFFFFFF</resetMask>
39893          <fields>
39894            <field>
39895              <name>CH0OM</name>
39896              <description>Channel 0 Output Mask</description>
39897              <bitOffset>0</bitOffset>
39898              <bitWidth>1</bitWidth>
39899              <access>read-write</access>
39900              <enumeratedValues>
39901                <enumeratedValue>
39902                  <name>0</name>
39903                  <description>Channel output is not masked. It continues to operate normally.</description>
39904                  <value>#0</value>
39905                </enumeratedValue>
39906                <enumeratedValue>
39907                  <name>1</name>
39908                  <description>Channel output is masked. It is forced to its inactive state.</description>
39909                  <value>#1</value>
39910                </enumeratedValue>
39911              </enumeratedValues>
39912            </field>
39913            <field>
39914              <name>CH1OM</name>
39915              <description>Channel 1 Output Mask</description>
39916              <bitOffset>1</bitOffset>
39917              <bitWidth>1</bitWidth>
39918              <access>read-write</access>
39919              <enumeratedValues>
39920                <enumeratedValue>
39921                  <name>0</name>
39922                  <description>Channel output is not masked. It continues to operate normally.</description>
39923                  <value>#0</value>
39924                </enumeratedValue>
39925                <enumeratedValue>
39926                  <name>1</name>
39927                  <description>Channel output is masked. It is forced to its inactive state.</description>
39928                  <value>#1</value>
39929                </enumeratedValue>
39930              </enumeratedValues>
39931            </field>
39932            <field>
39933              <name>CH2OM</name>
39934              <description>Channel 2 Output Mask</description>
39935              <bitOffset>2</bitOffset>
39936              <bitWidth>1</bitWidth>
39937              <access>read-write</access>
39938              <enumeratedValues>
39939                <enumeratedValue>
39940                  <name>0</name>
39941                  <description>Channel output is not masked. It continues to operate normally.</description>
39942                  <value>#0</value>
39943                </enumeratedValue>
39944                <enumeratedValue>
39945                  <name>1</name>
39946                  <description>Channel output is masked. It is forced to its inactive state.</description>
39947                  <value>#1</value>
39948                </enumeratedValue>
39949              </enumeratedValues>
39950            </field>
39951            <field>
39952              <name>CH3OM</name>
39953              <description>Channel 3 Output Mask</description>
39954              <bitOffset>3</bitOffset>
39955              <bitWidth>1</bitWidth>
39956              <access>read-write</access>
39957              <enumeratedValues>
39958                <enumeratedValue>
39959                  <name>0</name>
39960                  <description>Channel output is not masked. It continues to operate normally.</description>
39961                  <value>#0</value>
39962                </enumeratedValue>
39963                <enumeratedValue>
39964                  <name>1</name>
39965                  <description>Channel output is masked. It is forced to its inactive state.</description>
39966                  <value>#1</value>
39967                </enumeratedValue>
39968              </enumeratedValues>
39969            </field>
39970            <field>
39971              <name>CH4OM</name>
39972              <description>Channel 4 Output Mask</description>
39973              <bitOffset>4</bitOffset>
39974              <bitWidth>1</bitWidth>
39975              <access>read-write</access>
39976              <enumeratedValues>
39977                <enumeratedValue>
39978                  <name>0</name>
39979                  <description>Channel output is not masked. It continues to operate normally.</description>
39980                  <value>#0</value>
39981                </enumeratedValue>
39982                <enumeratedValue>
39983                  <name>1</name>
39984                  <description>Channel output is masked. It is forced to its inactive state.</description>
39985                  <value>#1</value>
39986                </enumeratedValue>
39987              </enumeratedValues>
39988            </field>
39989            <field>
39990              <name>CH5OM</name>
39991              <description>Channel 5 Output Mask</description>
39992              <bitOffset>5</bitOffset>
39993              <bitWidth>1</bitWidth>
39994              <access>read-write</access>
39995              <enumeratedValues>
39996                <enumeratedValue>
39997                  <name>0</name>
39998                  <description>Channel output is not masked. It continues to operate normally.</description>
39999                  <value>#0</value>
40000                </enumeratedValue>
40001                <enumeratedValue>
40002                  <name>1</name>
40003                  <description>Channel output is masked. It is forced to its inactive state.</description>
40004                  <value>#1</value>
40005                </enumeratedValue>
40006              </enumeratedValues>
40007            </field>
40008            <field>
40009              <name>CH6OM</name>
40010              <description>Channel 6 Output Mask</description>
40011              <bitOffset>6</bitOffset>
40012              <bitWidth>1</bitWidth>
40013              <access>read-write</access>
40014              <enumeratedValues>
40015                <enumeratedValue>
40016                  <name>0</name>
40017                  <description>Channel output is not masked. It continues to operate normally.</description>
40018                  <value>#0</value>
40019                </enumeratedValue>
40020                <enumeratedValue>
40021                  <name>1</name>
40022                  <description>Channel output is masked. It is forced to its inactive state.</description>
40023                  <value>#1</value>
40024                </enumeratedValue>
40025              </enumeratedValues>
40026            </field>
40027            <field>
40028              <name>CH7OM</name>
40029              <description>Channel 7 Output Mask</description>
40030              <bitOffset>7</bitOffset>
40031              <bitWidth>1</bitWidth>
40032              <access>read-write</access>
40033              <enumeratedValues>
40034                <enumeratedValue>
40035                  <name>0</name>
40036                  <description>Channel output is not masked. It continues to operate normally.</description>
40037                  <value>#0</value>
40038                </enumeratedValue>
40039                <enumeratedValue>
40040                  <name>1</name>
40041                  <description>Channel output is masked. It is forced to its inactive state.</description>
40042                  <value>#1</value>
40043                </enumeratedValue>
40044              </enumeratedValues>
40045            </field>
40046          </fields>
40047        </register>
40048        <register>
40049          <name>COMBINE</name>
40050          <description>Function For Linked Channels</description>
40051          <addressOffset>0x64</addressOffset>
40052          <size>32</size>
40053          <access>read-write</access>
40054          <resetValue>0</resetValue>
40055          <resetMask>0xFFFFFFFF</resetMask>
40056          <fields>
40057            <field>
40058              <name>COMBINE0</name>
40059              <description>Combine Channels For n = 0</description>
40060              <bitOffset>0</bitOffset>
40061              <bitWidth>1</bitWidth>
40062              <access>read-write</access>
40063              <enumeratedValues>
40064                <enumeratedValue>
40065                  <name>0</name>
40066                  <description>Channels (n) and (n+1) are independent.</description>
40067                  <value>#0</value>
40068                </enumeratedValue>
40069                <enumeratedValue>
40070                  <name>1</name>
40071                  <description>Channels (n) and (n+1) are combined.</description>
40072                  <value>#1</value>
40073                </enumeratedValue>
40074              </enumeratedValues>
40075            </field>
40076            <field>
40077              <name>COMP0</name>
40078              <description>Complement Of Channel (n) For n = 0</description>
40079              <bitOffset>1</bitOffset>
40080              <bitWidth>1</bitWidth>
40081              <access>read-write</access>
40082              <enumeratedValues>
40083                <enumeratedValue>
40084                  <name>0</name>
40085                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
40086                  <value>#0</value>
40087                </enumeratedValue>
40088                <enumeratedValue>
40089                  <name>1</name>
40090                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
40091                  <value>#1</value>
40092                </enumeratedValue>
40093              </enumeratedValues>
40094            </field>
40095            <field>
40096              <name>DECAPEN0</name>
40097              <description>Dual Edge Capture Mode Enable For n = 0</description>
40098              <bitOffset>2</bitOffset>
40099              <bitWidth>1</bitWidth>
40100              <access>read-write</access>
40101              <enumeratedValues>
40102                <enumeratedValue>
40103                  <name>0</name>
40104                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
40105                  <value>#0</value>
40106                </enumeratedValue>
40107                <enumeratedValue>
40108                  <name>1</name>
40109                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
40110                  <value>#1</value>
40111                </enumeratedValue>
40112              </enumeratedValues>
40113            </field>
40114            <field>
40115              <name>DECAP0</name>
40116              <description>Dual Edge Capture Mode Captures For n = 0</description>
40117              <bitOffset>3</bitOffset>
40118              <bitWidth>1</bitWidth>
40119              <access>read-write</access>
40120              <enumeratedValues>
40121                <enumeratedValue>
40122                  <name>0</name>
40123                  <description>The dual edge captures are inactive.</description>
40124                  <value>#0</value>
40125                </enumeratedValue>
40126                <enumeratedValue>
40127                  <name>1</name>
40128                  <description>The dual edge captures are active.</description>
40129                  <value>#1</value>
40130                </enumeratedValue>
40131              </enumeratedValues>
40132            </field>
40133            <field>
40134              <name>DTEN0</name>
40135              <description>Deadtime Enable For n = 0</description>
40136              <bitOffset>4</bitOffset>
40137              <bitWidth>1</bitWidth>
40138              <access>read-write</access>
40139              <enumeratedValues>
40140                <enumeratedValue>
40141                  <name>0</name>
40142                  <description>The deadtime insertion in this pair of channels is disabled.</description>
40143                  <value>#0</value>
40144                </enumeratedValue>
40145                <enumeratedValue>
40146                  <name>1</name>
40147                  <description>The deadtime insertion in this pair of channels is enabled.</description>
40148                  <value>#1</value>
40149                </enumeratedValue>
40150              </enumeratedValues>
40151            </field>
40152            <field>
40153              <name>SYNCEN0</name>
40154              <description>Synchronization Enable For n = 0</description>
40155              <bitOffset>5</bitOffset>
40156              <bitWidth>1</bitWidth>
40157              <access>read-write</access>
40158              <enumeratedValues>
40159                <enumeratedValue>
40160                  <name>0</name>
40161                  <description>The PWM synchronization in this pair of channels is disabled.</description>
40162                  <value>#0</value>
40163                </enumeratedValue>
40164                <enumeratedValue>
40165                  <name>1</name>
40166                  <description>The PWM synchronization in this pair of channels is enabled.</description>
40167                  <value>#1</value>
40168                </enumeratedValue>
40169              </enumeratedValues>
40170            </field>
40171            <field>
40172              <name>FAULTEN0</name>
40173              <description>Fault Control Enable For n = 0</description>
40174              <bitOffset>6</bitOffset>
40175              <bitWidth>1</bitWidth>
40176              <access>read-write</access>
40177              <enumeratedValues>
40178                <enumeratedValue>
40179                  <name>0</name>
40180                  <description>The fault control in this pair of channels is disabled.</description>
40181                  <value>#0</value>
40182                </enumeratedValue>
40183                <enumeratedValue>
40184                  <name>1</name>
40185                  <description>The fault control in this pair of channels is enabled.</description>
40186                  <value>#1</value>
40187                </enumeratedValue>
40188              </enumeratedValues>
40189            </field>
40190            <field>
40191              <name>COMBINE1</name>
40192              <description>Combine Channels For n = 2</description>
40193              <bitOffset>8</bitOffset>
40194              <bitWidth>1</bitWidth>
40195              <access>read-write</access>
40196              <enumeratedValues>
40197                <enumeratedValue>
40198                  <name>0</name>
40199                  <description>Channels (n) and (n+1) are independent.</description>
40200                  <value>#0</value>
40201                </enumeratedValue>
40202                <enumeratedValue>
40203                  <name>1</name>
40204                  <description>Channels (n) and (n+1) are combined.</description>
40205                  <value>#1</value>
40206                </enumeratedValue>
40207              </enumeratedValues>
40208            </field>
40209            <field>
40210              <name>COMP1</name>
40211              <description>Complement Of Channel (n) For n = 2</description>
40212              <bitOffset>9</bitOffset>
40213              <bitWidth>1</bitWidth>
40214              <access>read-write</access>
40215              <enumeratedValues>
40216                <enumeratedValue>
40217                  <name>0</name>
40218                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
40219                  <value>#0</value>
40220                </enumeratedValue>
40221                <enumeratedValue>
40222                  <name>1</name>
40223                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
40224                  <value>#1</value>
40225                </enumeratedValue>
40226              </enumeratedValues>
40227            </field>
40228            <field>
40229              <name>DECAPEN1</name>
40230              <description>Dual Edge Capture Mode Enable For n = 2</description>
40231              <bitOffset>10</bitOffset>
40232              <bitWidth>1</bitWidth>
40233              <access>read-write</access>
40234              <enumeratedValues>
40235                <enumeratedValue>
40236                  <name>0</name>
40237                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
40238                  <value>#0</value>
40239                </enumeratedValue>
40240                <enumeratedValue>
40241                  <name>1</name>
40242                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
40243                  <value>#1</value>
40244                </enumeratedValue>
40245              </enumeratedValues>
40246            </field>
40247            <field>
40248              <name>DECAP1</name>
40249              <description>Dual Edge Capture Mode Captures For n = 2</description>
40250              <bitOffset>11</bitOffset>
40251              <bitWidth>1</bitWidth>
40252              <access>read-write</access>
40253              <enumeratedValues>
40254                <enumeratedValue>
40255                  <name>0</name>
40256                  <description>The dual edge captures are inactive.</description>
40257                  <value>#0</value>
40258                </enumeratedValue>
40259                <enumeratedValue>
40260                  <name>1</name>
40261                  <description>The dual edge captures are active.</description>
40262                  <value>#1</value>
40263                </enumeratedValue>
40264              </enumeratedValues>
40265            </field>
40266            <field>
40267              <name>DTEN1</name>
40268              <description>Deadtime Enable For n = 2</description>
40269              <bitOffset>12</bitOffset>
40270              <bitWidth>1</bitWidth>
40271              <access>read-write</access>
40272              <enumeratedValues>
40273                <enumeratedValue>
40274                  <name>0</name>
40275                  <description>The deadtime insertion in this pair of channels is disabled.</description>
40276                  <value>#0</value>
40277                </enumeratedValue>
40278                <enumeratedValue>
40279                  <name>1</name>
40280                  <description>The deadtime insertion in this pair of channels is enabled.</description>
40281                  <value>#1</value>
40282                </enumeratedValue>
40283              </enumeratedValues>
40284            </field>
40285            <field>
40286              <name>SYNCEN1</name>
40287              <description>Synchronization Enable For n = 2</description>
40288              <bitOffset>13</bitOffset>
40289              <bitWidth>1</bitWidth>
40290              <access>read-write</access>
40291              <enumeratedValues>
40292                <enumeratedValue>
40293                  <name>0</name>
40294                  <description>The PWM synchronization in this pair of channels is disabled.</description>
40295                  <value>#0</value>
40296                </enumeratedValue>
40297                <enumeratedValue>
40298                  <name>1</name>
40299                  <description>The PWM synchronization in this pair of channels is enabled.</description>
40300                  <value>#1</value>
40301                </enumeratedValue>
40302              </enumeratedValues>
40303            </field>
40304            <field>
40305              <name>FAULTEN1</name>
40306              <description>Fault Control Enable For n = 2</description>
40307              <bitOffset>14</bitOffset>
40308              <bitWidth>1</bitWidth>
40309              <access>read-write</access>
40310              <enumeratedValues>
40311                <enumeratedValue>
40312                  <name>0</name>
40313                  <description>The fault control in this pair of channels is disabled.</description>
40314                  <value>#0</value>
40315                </enumeratedValue>
40316                <enumeratedValue>
40317                  <name>1</name>
40318                  <description>The fault control in this pair of channels is enabled.</description>
40319                  <value>#1</value>
40320                </enumeratedValue>
40321              </enumeratedValues>
40322            </field>
40323            <field>
40324              <name>COMBINE2</name>
40325              <description>Combine Channels For n = 4</description>
40326              <bitOffset>16</bitOffset>
40327              <bitWidth>1</bitWidth>
40328              <access>read-write</access>
40329              <enumeratedValues>
40330                <enumeratedValue>
40331                  <name>0</name>
40332                  <description>Channels (n) and (n+1) are independent.</description>
40333                  <value>#0</value>
40334                </enumeratedValue>
40335                <enumeratedValue>
40336                  <name>1</name>
40337                  <description>Channels (n) and (n+1) are combined.</description>
40338                  <value>#1</value>
40339                </enumeratedValue>
40340              </enumeratedValues>
40341            </field>
40342            <field>
40343              <name>COMP2</name>
40344              <description>Complement Of Channel (n) For n = 4</description>
40345              <bitOffset>17</bitOffset>
40346              <bitWidth>1</bitWidth>
40347              <access>read-write</access>
40348              <enumeratedValues>
40349                <enumeratedValue>
40350                  <name>0</name>
40351                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
40352                  <value>#0</value>
40353                </enumeratedValue>
40354                <enumeratedValue>
40355                  <name>1</name>
40356                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
40357                  <value>#1</value>
40358                </enumeratedValue>
40359              </enumeratedValues>
40360            </field>
40361            <field>
40362              <name>DECAPEN2</name>
40363              <description>Dual Edge Capture Mode Enable For n = 4</description>
40364              <bitOffset>18</bitOffset>
40365              <bitWidth>1</bitWidth>
40366              <access>read-write</access>
40367              <enumeratedValues>
40368                <enumeratedValue>
40369                  <name>0</name>
40370                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
40371                  <value>#0</value>
40372                </enumeratedValue>
40373                <enumeratedValue>
40374                  <name>1</name>
40375                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
40376                  <value>#1</value>
40377                </enumeratedValue>
40378              </enumeratedValues>
40379            </field>
40380            <field>
40381              <name>DECAP2</name>
40382              <description>Dual Edge Capture Mode Captures For n = 4</description>
40383              <bitOffset>19</bitOffset>
40384              <bitWidth>1</bitWidth>
40385              <access>read-write</access>
40386              <enumeratedValues>
40387                <enumeratedValue>
40388                  <name>0</name>
40389                  <description>The dual edge captures are inactive.</description>
40390                  <value>#0</value>
40391                </enumeratedValue>
40392                <enumeratedValue>
40393                  <name>1</name>
40394                  <description>The dual edge captures are active.</description>
40395                  <value>#1</value>
40396                </enumeratedValue>
40397              </enumeratedValues>
40398            </field>
40399            <field>
40400              <name>DTEN2</name>
40401              <description>Deadtime Enable For n = 4</description>
40402              <bitOffset>20</bitOffset>
40403              <bitWidth>1</bitWidth>
40404              <access>read-write</access>
40405              <enumeratedValues>
40406                <enumeratedValue>
40407                  <name>0</name>
40408                  <description>The deadtime insertion in this pair of channels is disabled.</description>
40409                  <value>#0</value>
40410                </enumeratedValue>
40411                <enumeratedValue>
40412                  <name>1</name>
40413                  <description>The deadtime insertion in this pair of channels is enabled.</description>
40414                  <value>#1</value>
40415                </enumeratedValue>
40416              </enumeratedValues>
40417            </field>
40418            <field>
40419              <name>SYNCEN2</name>
40420              <description>Synchronization Enable For n = 4</description>
40421              <bitOffset>21</bitOffset>
40422              <bitWidth>1</bitWidth>
40423              <access>read-write</access>
40424              <enumeratedValues>
40425                <enumeratedValue>
40426                  <name>0</name>
40427                  <description>The PWM synchronization in this pair of channels is disabled.</description>
40428                  <value>#0</value>
40429                </enumeratedValue>
40430                <enumeratedValue>
40431                  <name>1</name>
40432                  <description>The PWM synchronization in this pair of channels is enabled.</description>
40433                  <value>#1</value>
40434                </enumeratedValue>
40435              </enumeratedValues>
40436            </field>
40437            <field>
40438              <name>FAULTEN2</name>
40439              <description>Fault Control Enable For n = 4</description>
40440              <bitOffset>22</bitOffset>
40441              <bitWidth>1</bitWidth>
40442              <access>read-write</access>
40443              <enumeratedValues>
40444                <enumeratedValue>
40445                  <name>0</name>
40446                  <description>The fault control in this pair of channels is disabled.</description>
40447                  <value>#0</value>
40448                </enumeratedValue>
40449                <enumeratedValue>
40450                  <name>1</name>
40451                  <description>The fault control in this pair of channels is enabled.</description>
40452                  <value>#1</value>
40453                </enumeratedValue>
40454              </enumeratedValues>
40455            </field>
40456            <field>
40457              <name>COMBINE3</name>
40458              <description>Combine Channels For n = 6</description>
40459              <bitOffset>24</bitOffset>
40460              <bitWidth>1</bitWidth>
40461              <access>read-write</access>
40462              <enumeratedValues>
40463                <enumeratedValue>
40464                  <name>0</name>
40465                  <description>Channels (n) and (n+1) are independent.</description>
40466                  <value>#0</value>
40467                </enumeratedValue>
40468                <enumeratedValue>
40469                  <name>1</name>
40470                  <description>Channels (n) and (n+1) are combined.</description>
40471                  <value>#1</value>
40472                </enumeratedValue>
40473              </enumeratedValues>
40474            </field>
40475            <field>
40476              <name>COMP3</name>
40477              <description>Complement Of Channel (n) for n = 6</description>
40478              <bitOffset>25</bitOffset>
40479              <bitWidth>1</bitWidth>
40480              <access>read-write</access>
40481              <enumeratedValues>
40482                <enumeratedValue>
40483                  <name>0</name>
40484                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
40485                  <value>#0</value>
40486                </enumeratedValue>
40487                <enumeratedValue>
40488                  <name>1</name>
40489                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
40490                  <value>#1</value>
40491                </enumeratedValue>
40492              </enumeratedValues>
40493            </field>
40494            <field>
40495              <name>DECAPEN3</name>
40496              <description>Dual Edge Capture Mode Enable For n = 6</description>
40497              <bitOffset>26</bitOffset>
40498              <bitWidth>1</bitWidth>
40499              <access>read-write</access>
40500              <enumeratedValues>
40501                <enumeratedValue>
40502                  <name>0</name>
40503                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
40504                  <value>#0</value>
40505                </enumeratedValue>
40506                <enumeratedValue>
40507                  <name>1</name>
40508                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
40509                  <value>#1</value>
40510                </enumeratedValue>
40511              </enumeratedValues>
40512            </field>
40513            <field>
40514              <name>DECAP3</name>
40515              <description>Dual Edge Capture Mode Captures For n = 6</description>
40516              <bitOffset>27</bitOffset>
40517              <bitWidth>1</bitWidth>
40518              <access>read-write</access>
40519              <enumeratedValues>
40520                <enumeratedValue>
40521                  <name>0</name>
40522                  <description>The dual edge captures are inactive.</description>
40523                  <value>#0</value>
40524                </enumeratedValue>
40525                <enumeratedValue>
40526                  <name>1</name>
40527                  <description>The dual edge captures are active.</description>
40528                  <value>#1</value>
40529                </enumeratedValue>
40530              </enumeratedValues>
40531            </field>
40532            <field>
40533              <name>DTEN3</name>
40534              <description>Deadtime Enable For n = 6</description>
40535              <bitOffset>28</bitOffset>
40536              <bitWidth>1</bitWidth>
40537              <access>read-write</access>
40538              <enumeratedValues>
40539                <enumeratedValue>
40540                  <name>0</name>
40541                  <description>The deadtime insertion in this pair of channels is disabled.</description>
40542                  <value>#0</value>
40543                </enumeratedValue>
40544                <enumeratedValue>
40545                  <name>1</name>
40546                  <description>The deadtime insertion in this pair of channels is enabled.</description>
40547                  <value>#1</value>
40548                </enumeratedValue>
40549              </enumeratedValues>
40550            </field>
40551            <field>
40552              <name>SYNCEN3</name>
40553              <description>Synchronization Enable For n = 6</description>
40554              <bitOffset>29</bitOffset>
40555              <bitWidth>1</bitWidth>
40556              <access>read-write</access>
40557              <enumeratedValues>
40558                <enumeratedValue>
40559                  <name>0</name>
40560                  <description>The PWM synchronization in this pair of channels is disabled.</description>
40561                  <value>#0</value>
40562                </enumeratedValue>
40563                <enumeratedValue>
40564                  <name>1</name>
40565                  <description>The PWM synchronization in this pair of channels is enabled.</description>
40566                  <value>#1</value>
40567                </enumeratedValue>
40568              </enumeratedValues>
40569            </field>
40570            <field>
40571              <name>FAULTEN3</name>
40572              <description>Fault Control Enable For n = 6</description>
40573              <bitOffset>30</bitOffset>
40574              <bitWidth>1</bitWidth>
40575              <access>read-write</access>
40576              <enumeratedValues>
40577                <enumeratedValue>
40578                  <name>0</name>
40579                  <description>The fault control in this pair of channels is disabled.</description>
40580                  <value>#0</value>
40581                </enumeratedValue>
40582                <enumeratedValue>
40583                  <name>1</name>
40584                  <description>The fault control in this pair of channels is enabled.</description>
40585                  <value>#1</value>
40586                </enumeratedValue>
40587              </enumeratedValues>
40588            </field>
40589          </fields>
40590        </register>
40591        <register>
40592          <name>DEADTIME</name>
40593          <description>Deadtime Insertion Control</description>
40594          <addressOffset>0x68</addressOffset>
40595          <size>32</size>
40596          <access>read-write</access>
40597          <resetValue>0</resetValue>
40598          <resetMask>0xFFFFFFFF</resetMask>
40599          <fields>
40600            <field>
40601              <name>DTVAL</name>
40602              <description>Deadtime Value</description>
40603              <bitOffset>0</bitOffset>
40604              <bitWidth>6</bitWidth>
40605              <access>read-write</access>
40606            </field>
40607            <field>
40608              <name>DTPS</name>
40609              <description>Deadtime Prescaler Value</description>
40610              <bitOffset>6</bitOffset>
40611              <bitWidth>2</bitWidth>
40612              <access>read-write</access>
40613              <enumeratedValues>
40614                <enumeratedValue>
40615                  <name>10</name>
40616                  <description>Divide the system clock by 4.</description>
40617                  <value>#10</value>
40618                </enumeratedValue>
40619                <enumeratedValue>
40620                  <name>11</name>
40621                  <description>Divide the system clock by 16.</description>
40622                  <value>#11</value>
40623                </enumeratedValue>
40624              </enumeratedValues>
40625            </field>
40626          </fields>
40627        </register>
40628        <register>
40629          <name>EXTTRIG</name>
40630          <description>FTM External Trigger</description>
40631          <addressOffset>0x6C</addressOffset>
40632          <size>32</size>
40633          <access>read-write</access>
40634          <resetValue>0</resetValue>
40635          <resetMask>0xFFFFFFFF</resetMask>
40636          <fields>
40637            <field>
40638              <name>CH2TRIG</name>
40639              <description>Channel 2 Trigger Enable</description>
40640              <bitOffset>0</bitOffset>
40641              <bitWidth>1</bitWidth>
40642              <access>read-write</access>
40643              <enumeratedValues>
40644                <enumeratedValue>
40645                  <name>0</name>
40646                  <description>The generation of the channel trigger is disabled.</description>
40647                  <value>#0</value>
40648                </enumeratedValue>
40649                <enumeratedValue>
40650                  <name>1</name>
40651                  <description>The generation of the channel trigger is enabled.</description>
40652                  <value>#1</value>
40653                </enumeratedValue>
40654              </enumeratedValues>
40655            </field>
40656            <field>
40657              <name>CH3TRIG</name>
40658              <description>Channel 3 Trigger Enable</description>
40659              <bitOffset>1</bitOffset>
40660              <bitWidth>1</bitWidth>
40661              <access>read-write</access>
40662              <enumeratedValues>
40663                <enumeratedValue>
40664                  <name>0</name>
40665                  <description>The generation of the channel trigger is disabled.</description>
40666                  <value>#0</value>
40667                </enumeratedValue>
40668                <enumeratedValue>
40669                  <name>1</name>
40670                  <description>The generation of the channel trigger is enabled.</description>
40671                  <value>#1</value>
40672                </enumeratedValue>
40673              </enumeratedValues>
40674            </field>
40675            <field>
40676              <name>CH4TRIG</name>
40677              <description>Channel 4 Trigger Enable</description>
40678              <bitOffset>2</bitOffset>
40679              <bitWidth>1</bitWidth>
40680              <access>read-write</access>
40681              <enumeratedValues>
40682                <enumeratedValue>
40683                  <name>0</name>
40684                  <description>The generation of the channel trigger is disabled.</description>
40685                  <value>#0</value>
40686                </enumeratedValue>
40687                <enumeratedValue>
40688                  <name>1</name>
40689                  <description>The generation of the channel trigger is enabled.</description>
40690                  <value>#1</value>
40691                </enumeratedValue>
40692              </enumeratedValues>
40693            </field>
40694            <field>
40695              <name>CH5TRIG</name>
40696              <description>Channel 5 Trigger Enable</description>
40697              <bitOffset>3</bitOffset>
40698              <bitWidth>1</bitWidth>
40699              <access>read-write</access>
40700              <enumeratedValues>
40701                <enumeratedValue>
40702                  <name>0</name>
40703                  <description>The generation of the channel trigger is disabled.</description>
40704                  <value>#0</value>
40705                </enumeratedValue>
40706                <enumeratedValue>
40707                  <name>1</name>
40708                  <description>The generation of the channel trigger is enabled.</description>
40709                  <value>#1</value>
40710                </enumeratedValue>
40711              </enumeratedValues>
40712            </field>
40713            <field>
40714              <name>CH0TRIG</name>
40715              <description>Channel 0 Trigger Enable</description>
40716              <bitOffset>4</bitOffset>
40717              <bitWidth>1</bitWidth>
40718              <access>read-write</access>
40719              <enumeratedValues>
40720                <enumeratedValue>
40721                  <name>0</name>
40722                  <description>The generation of the channel trigger is disabled.</description>
40723                  <value>#0</value>
40724                </enumeratedValue>
40725                <enumeratedValue>
40726                  <name>1</name>
40727                  <description>The generation of the channel trigger is enabled.</description>
40728                  <value>#1</value>
40729                </enumeratedValue>
40730              </enumeratedValues>
40731            </field>
40732            <field>
40733              <name>CH1TRIG</name>
40734              <description>Channel 1 Trigger Enable</description>
40735              <bitOffset>5</bitOffset>
40736              <bitWidth>1</bitWidth>
40737              <access>read-write</access>
40738              <enumeratedValues>
40739                <enumeratedValue>
40740                  <name>0</name>
40741                  <description>The generation of the channel trigger is disabled.</description>
40742                  <value>#0</value>
40743                </enumeratedValue>
40744                <enumeratedValue>
40745                  <name>1</name>
40746                  <description>The generation of the channel trigger is enabled.</description>
40747                  <value>#1</value>
40748                </enumeratedValue>
40749              </enumeratedValues>
40750            </field>
40751            <field>
40752              <name>INITTRIGEN</name>
40753              <description>Initialization Trigger Enable</description>
40754              <bitOffset>6</bitOffset>
40755              <bitWidth>1</bitWidth>
40756              <access>read-write</access>
40757              <enumeratedValues>
40758                <enumeratedValue>
40759                  <name>0</name>
40760                  <description>The generation of initialization trigger is disabled.</description>
40761                  <value>#0</value>
40762                </enumeratedValue>
40763                <enumeratedValue>
40764                  <name>1</name>
40765                  <description>The generation of initialization trigger is enabled.</description>
40766                  <value>#1</value>
40767                </enumeratedValue>
40768              </enumeratedValues>
40769            </field>
40770            <field>
40771              <name>TRIGF</name>
40772              <description>Channel Trigger Flag</description>
40773              <bitOffset>7</bitOffset>
40774              <bitWidth>1</bitWidth>
40775              <access>read-write</access>
40776              <enumeratedValues>
40777                <enumeratedValue>
40778                  <name>0</name>
40779                  <description>No channel trigger was generated.</description>
40780                  <value>#0</value>
40781                </enumeratedValue>
40782                <enumeratedValue>
40783                  <name>1</name>
40784                  <description>A channel trigger was generated.</description>
40785                  <value>#1</value>
40786                </enumeratedValue>
40787              </enumeratedValues>
40788            </field>
40789          </fields>
40790        </register>
40791        <register>
40792          <name>POL</name>
40793          <description>Channels Polarity</description>
40794          <addressOffset>0x70</addressOffset>
40795          <size>32</size>
40796          <access>read-write</access>
40797          <resetValue>0</resetValue>
40798          <resetMask>0xFFFFFFFF</resetMask>
40799          <fields>
40800            <field>
40801              <name>POL0</name>
40802              <description>Channel 0 Polarity</description>
40803              <bitOffset>0</bitOffset>
40804              <bitWidth>1</bitWidth>
40805              <access>read-write</access>
40806              <enumeratedValues>
40807                <enumeratedValue>
40808                  <name>0</name>
40809                  <description>The channel polarity is active high.</description>
40810                  <value>#0</value>
40811                </enumeratedValue>
40812                <enumeratedValue>
40813                  <name>1</name>
40814                  <description>The channel polarity is active low.</description>
40815                  <value>#1</value>
40816                </enumeratedValue>
40817              </enumeratedValues>
40818            </field>
40819            <field>
40820              <name>POL1</name>
40821              <description>Channel 1 Polarity</description>
40822              <bitOffset>1</bitOffset>
40823              <bitWidth>1</bitWidth>
40824              <access>read-write</access>
40825              <enumeratedValues>
40826                <enumeratedValue>
40827                  <name>0</name>
40828                  <description>The channel polarity is active high.</description>
40829                  <value>#0</value>
40830                </enumeratedValue>
40831                <enumeratedValue>
40832                  <name>1</name>
40833                  <description>The channel polarity is active low.</description>
40834                  <value>#1</value>
40835                </enumeratedValue>
40836              </enumeratedValues>
40837            </field>
40838            <field>
40839              <name>POL2</name>
40840              <description>Channel 2 Polarity</description>
40841              <bitOffset>2</bitOffset>
40842              <bitWidth>1</bitWidth>
40843              <access>read-write</access>
40844              <enumeratedValues>
40845                <enumeratedValue>
40846                  <name>0</name>
40847                  <description>The channel polarity is active high.</description>
40848                  <value>#0</value>
40849                </enumeratedValue>
40850                <enumeratedValue>
40851                  <name>1</name>
40852                  <description>The channel polarity is active low.</description>
40853                  <value>#1</value>
40854                </enumeratedValue>
40855              </enumeratedValues>
40856            </field>
40857            <field>
40858              <name>POL3</name>
40859              <description>Channel 3 Polarity</description>
40860              <bitOffset>3</bitOffset>
40861              <bitWidth>1</bitWidth>
40862              <access>read-write</access>
40863              <enumeratedValues>
40864                <enumeratedValue>
40865                  <name>0</name>
40866                  <description>The channel polarity is active high.</description>
40867                  <value>#0</value>
40868                </enumeratedValue>
40869                <enumeratedValue>
40870                  <name>1</name>
40871                  <description>The channel polarity is active low.</description>
40872                  <value>#1</value>
40873                </enumeratedValue>
40874              </enumeratedValues>
40875            </field>
40876            <field>
40877              <name>POL4</name>
40878              <description>Channel 4 Polarity</description>
40879              <bitOffset>4</bitOffset>
40880              <bitWidth>1</bitWidth>
40881              <access>read-write</access>
40882              <enumeratedValues>
40883                <enumeratedValue>
40884                  <name>0</name>
40885                  <description>The channel polarity is active high.</description>
40886                  <value>#0</value>
40887                </enumeratedValue>
40888                <enumeratedValue>
40889                  <name>1</name>
40890                  <description>The channel polarity is active low.</description>
40891                  <value>#1</value>
40892                </enumeratedValue>
40893              </enumeratedValues>
40894            </field>
40895            <field>
40896              <name>POL5</name>
40897              <description>Channel 5 Polarity</description>
40898              <bitOffset>5</bitOffset>
40899              <bitWidth>1</bitWidth>
40900              <access>read-write</access>
40901              <enumeratedValues>
40902                <enumeratedValue>
40903                  <name>0</name>
40904                  <description>The channel polarity is active high.</description>
40905                  <value>#0</value>
40906                </enumeratedValue>
40907                <enumeratedValue>
40908                  <name>1</name>
40909                  <description>The channel polarity is active low.</description>
40910                  <value>#1</value>
40911                </enumeratedValue>
40912              </enumeratedValues>
40913            </field>
40914            <field>
40915              <name>POL6</name>
40916              <description>Channel 6 Polarity</description>
40917              <bitOffset>6</bitOffset>
40918              <bitWidth>1</bitWidth>
40919              <access>read-write</access>
40920              <enumeratedValues>
40921                <enumeratedValue>
40922                  <name>0</name>
40923                  <description>The channel polarity is active high.</description>
40924                  <value>#0</value>
40925                </enumeratedValue>
40926                <enumeratedValue>
40927                  <name>1</name>
40928                  <description>The channel polarity is active low.</description>
40929                  <value>#1</value>
40930                </enumeratedValue>
40931              </enumeratedValues>
40932            </field>
40933            <field>
40934              <name>POL7</name>
40935              <description>Channel 7 Polarity</description>
40936              <bitOffset>7</bitOffset>
40937              <bitWidth>1</bitWidth>
40938              <access>read-write</access>
40939              <enumeratedValues>
40940                <enumeratedValue>
40941                  <name>0</name>
40942                  <description>The channel polarity is active high.</description>
40943                  <value>#0</value>
40944                </enumeratedValue>
40945                <enumeratedValue>
40946                  <name>1</name>
40947                  <description>The channel polarity is active low.</description>
40948                  <value>#1</value>
40949                </enumeratedValue>
40950              </enumeratedValues>
40951            </field>
40952          </fields>
40953        </register>
40954        <register>
40955          <name>FMS</name>
40956          <description>Fault Mode Status</description>
40957          <addressOffset>0x74</addressOffset>
40958          <size>32</size>
40959          <access>read-write</access>
40960          <resetValue>0</resetValue>
40961          <resetMask>0xFFFFFFFF</resetMask>
40962          <fields>
40963            <field>
40964              <name>FAULTF0</name>
40965              <description>Fault Detection Flag 0</description>
40966              <bitOffset>0</bitOffset>
40967              <bitWidth>1</bitWidth>
40968              <access>read-write</access>
40969              <enumeratedValues>
40970                <enumeratedValue>
40971                  <name>0</name>
40972                  <description>No fault condition was detected at the fault input.</description>
40973                  <value>#0</value>
40974                </enumeratedValue>
40975                <enumeratedValue>
40976                  <name>1</name>
40977                  <description>A fault condition was detected at the fault input.</description>
40978                  <value>#1</value>
40979                </enumeratedValue>
40980              </enumeratedValues>
40981            </field>
40982            <field>
40983              <name>FAULTF1</name>
40984              <description>Fault Detection Flag 1</description>
40985              <bitOffset>1</bitOffset>
40986              <bitWidth>1</bitWidth>
40987              <access>read-write</access>
40988              <enumeratedValues>
40989                <enumeratedValue>
40990                  <name>0</name>
40991                  <description>No fault condition was detected at the fault input.</description>
40992                  <value>#0</value>
40993                </enumeratedValue>
40994                <enumeratedValue>
40995                  <name>1</name>
40996                  <description>A fault condition was detected at the fault input.</description>
40997                  <value>#1</value>
40998                </enumeratedValue>
40999              </enumeratedValues>
41000            </field>
41001            <field>
41002              <name>FAULTF2</name>
41003              <description>Fault Detection Flag 2</description>
41004              <bitOffset>2</bitOffset>
41005              <bitWidth>1</bitWidth>
41006              <access>read-write</access>
41007              <enumeratedValues>
41008                <enumeratedValue>
41009                  <name>0</name>
41010                  <description>No fault condition was detected at the fault input.</description>
41011                  <value>#0</value>
41012                </enumeratedValue>
41013                <enumeratedValue>
41014                  <name>1</name>
41015                  <description>A fault condition was detected at the fault input.</description>
41016                  <value>#1</value>
41017                </enumeratedValue>
41018              </enumeratedValues>
41019            </field>
41020            <field>
41021              <name>FAULTF3</name>
41022              <description>Fault Detection Flag 3</description>
41023              <bitOffset>3</bitOffset>
41024              <bitWidth>1</bitWidth>
41025              <access>read-write</access>
41026              <enumeratedValues>
41027                <enumeratedValue>
41028                  <name>0</name>
41029                  <description>No fault condition was detected at the fault input.</description>
41030                  <value>#0</value>
41031                </enumeratedValue>
41032                <enumeratedValue>
41033                  <name>1</name>
41034                  <description>A fault condition was detected at the fault input.</description>
41035                  <value>#1</value>
41036                </enumeratedValue>
41037              </enumeratedValues>
41038            </field>
41039            <field>
41040              <name>FAULTIN</name>
41041              <description>Fault Inputs</description>
41042              <bitOffset>5</bitOffset>
41043              <bitWidth>1</bitWidth>
41044              <access>read-only</access>
41045              <enumeratedValues>
41046                <enumeratedValue>
41047                  <name>0</name>
41048                  <description>The logic OR of the enabled fault inputs is 0.</description>
41049                  <value>#0</value>
41050                </enumeratedValue>
41051                <enumeratedValue>
41052                  <name>1</name>
41053                  <description>The logic OR of the enabled fault inputs is 1.</description>
41054                  <value>#1</value>
41055                </enumeratedValue>
41056              </enumeratedValues>
41057            </field>
41058            <field>
41059              <name>WPEN</name>
41060              <description>Write Protection Enable</description>
41061              <bitOffset>6</bitOffset>
41062              <bitWidth>1</bitWidth>
41063              <access>read-write</access>
41064              <enumeratedValues>
41065                <enumeratedValue>
41066                  <name>0</name>
41067                  <description>Write protection is disabled. Write protected bits can be written.</description>
41068                  <value>#0</value>
41069                </enumeratedValue>
41070                <enumeratedValue>
41071                  <name>1</name>
41072                  <description>Write protection is enabled. Write protected bits cannot be written.</description>
41073                  <value>#1</value>
41074                </enumeratedValue>
41075              </enumeratedValues>
41076            </field>
41077            <field>
41078              <name>FAULTF</name>
41079              <description>Fault Detection Flag</description>
41080              <bitOffset>7</bitOffset>
41081              <bitWidth>1</bitWidth>
41082              <access>read-write</access>
41083              <enumeratedValues>
41084                <enumeratedValue>
41085                  <name>0</name>
41086                  <description>No fault condition was detected.</description>
41087                  <value>#0</value>
41088                </enumeratedValue>
41089                <enumeratedValue>
41090                  <name>1</name>
41091                  <description>A fault condition was detected.</description>
41092                  <value>#1</value>
41093                </enumeratedValue>
41094              </enumeratedValues>
41095            </field>
41096          </fields>
41097        </register>
41098        <register>
41099          <name>FILTER</name>
41100          <description>Input Capture Filter Control</description>
41101          <addressOffset>0x78</addressOffset>
41102          <size>32</size>
41103          <access>read-write</access>
41104          <resetValue>0</resetValue>
41105          <resetMask>0xFFFFFFFF</resetMask>
41106          <fields>
41107            <field>
41108              <name>CH0FVAL</name>
41109              <description>Channel 0 Input Filter</description>
41110              <bitOffset>0</bitOffset>
41111              <bitWidth>4</bitWidth>
41112              <access>read-write</access>
41113            </field>
41114            <field>
41115              <name>CH1FVAL</name>
41116              <description>Channel 1 Input Filter</description>
41117              <bitOffset>4</bitOffset>
41118              <bitWidth>4</bitWidth>
41119              <access>read-write</access>
41120            </field>
41121            <field>
41122              <name>CH2FVAL</name>
41123              <description>Channel 2 Input Filter</description>
41124              <bitOffset>8</bitOffset>
41125              <bitWidth>4</bitWidth>
41126              <access>read-write</access>
41127            </field>
41128            <field>
41129              <name>CH3FVAL</name>
41130              <description>Channel 3 Input Filter</description>
41131              <bitOffset>12</bitOffset>
41132              <bitWidth>4</bitWidth>
41133              <access>read-write</access>
41134            </field>
41135          </fields>
41136        </register>
41137        <register>
41138          <name>FLTCTRL</name>
41139          <description>Fault Control</description>
41140          <addressOffset>0x7C</addressOffset>
41141          <size>32</size>
41142          <access>read-write</access>
41143          <resetValue>0</resetValue>
41144          <resetMask>0xFFFFFFFF</resetMask>
41145          <fields>
41146            <field>
41147              <name>FAULT0EN</name>
41148              <description>Fault Input 0 Enable</description>
41149              <bitOffset>0</bitOffset>
41150              <bitWidth>1</bitWidth>
41151              <access>read-write</access>
41152              <enumeratedValues>
41153                <enumeratedValue>
41154                  <name>0</name>
41155                  <description>Fault input is disabled.</description>
41156                  <value>#0</value>
41157                </enumeratedValue>
41158                <enumeratedValue>
41159                  <name>1</name>
41160                  <description>Fault input is enabled.</description>
41161                  <value>#1</value>
41162                </enumeratedValue>
41163              </enumeratedValues>
41164            </field>
41165            <field>
41166              <name>FAULT1EN</name>
41167              <description>Fault Input 1 Enable</description>
41168              <bitOffset>1</bitOffset>
41169              <bitWidth>1</bitWidth>
41170              <access>read-write</access>
41171              <enumeratedValues>
41172                <enumeratedValue>
41173                  <name>0</name>
41174                  <description>Fault input is disabled.</description>
41175                  <value>#0</value>
41176                </enumeratedValue>
41177                <enumeratedValue>
41178                  <name>1</name>
41179                  <description>Fault input is enabled.</description>
41180                  <value>#1</value>
41181                </enumeratedValue>
41182              </enumeratedValues>
41183            </field>
41184            <field>
41185              <name>FAULT2EN</name>
41186              <description>Fault Input 2 Enable</description>
41187              <bitOffset>2</bitOffset>
41188              <bitWidth>1</bitWidth>
41189              <access>read-write</access>
41190              <enumeratedValues>
41191                <enumeratedValue>
41192                  <name>0</name>
41193                  <description>Fault input is disabled.</description>
41194                  <value>#0</value>
41195                </enumeratedValue>
41196                <enumeratedValue>
41197                  <name>1</name>
41198                  <description>Fault input is enabled.</description>
41199                  <value>#1</value>
41200                </enumeratedValue>
41201              </enumeratedValues>
41202            </field>
41203            <field>
41204              <name>FAULT3EN</name>
41205              <description>Fault Input 3 Enable</description>
41206              <bitOffset>3</bitOffset>
41207              <bitWidth>1</bitWidth>
41208              <access>read-write</access>
41209              <enumeratedValues>
41210                <enumeratedValue>
41211                  <name>0</name>
41212                  <description>Fault input is disabled.</description>
41213                  <value>#0</value>
41214                </enumeratedValue>
41215                <enumeratedValue>
41216                  <name>1</name>
41217                  <description>Fault input is enabled.</description>
41218                  <value>#1</value>
41219                </enumeratedValue>
41220              </enumeratedValues>
41221            </field>
41222            <field>
41223              <name>FFLTR0EN</name>
41224              <description>Fault Input 0 Filter Enable</description>
41225              <bitOffset>4</bitOffset>
41226              <bitWidth>1</bitWidth>
41227              <access>read-write</access>
41228              <enumeratedValues>
41229                <enumeratedValue>
41230                  <name>0</name>
41231                  <description>Fault input filter is disabled.</description>
41232                  <value>#0</value>
41233                </enumeratedValue>
41234                <enumeratedValue>
41235                  <name>1</name>
41236                  <description>Fault input filter is enabled.</description>
41237                  <value>#1</value>
41238                </enumeratedValue>
41239              </enumeratedValues>
41240            </field>
41241            <field>
41242              <name>FFLTR1EN</name>
41243              <description>Fault Input 1 Filter Enable</description>
41244              <bitOffset>5</bitOffset>
41245              <bitWidth>1</bitWidth>
41246              <access>read-write</access>
41247              <enumeratedValues>
41248                <enumeratedValue>
41249                  <name>0</name>
41250                  <description>Fault input filter is disabled.</description>
41251                  <value>#0</value>
41252                </enumeratedValue>
41253                <enumeratedValue>
41254                  <name>1</name>
41255                  <description>Fault input filter is enabled.</description>
41256                  <value>#1</value>
41257                </enumeratedValue>
41258              </enumeratedValues>
41259            </field>
41260            <field>
41261              <name>FFLTR2EN</name>
41262              <description>Fault Input 2 Filter Enable</description>
41263              <bitOffset>6</bitOffset>
41264              <bitWidth>1</bitWidth>
41265              <access>read-write</access>
41266              <enumeratedValues>
41267                <enumeratedValue>
41268                  <name>0</name>
41269                  <description>Fault input filter is disabled.</description>
41270                  <value>#0</value>
41271                </enumeratedValue>
41272                <enumeratedValue>
41273                  <name>1</name>
41274                  <description>Fault input filter is enabled.</description>
41275                  <value>#1</value>
41276                </enumeratedValue>
41277              </enumeratedValues>
41278            </field>
41279            <field>
41280              <name>FFLTR3EN</name>
41281              <description>Fault Input 3 Filter Enable</description>
41282              <bitOffset>7</bitOffset>
41283              <bitWidth>1</bitWidth>
41284              <access>read-write</access>
41285              <enumeratedValues>
41286                <enumeratedValue>
41287                  <name>0</name>
41288                  <description>Fault input filter is disabled.</description>
41289                  <value>#0</value>
41290                </enumeratedValue>
41291                <enumeratedValue>
41292                  <name>1</name>
41293                  <description>Fault input filter is enabled.</description>
41294                  <value>#1</value>
41295                </enumeratedValue>
41296              </enumeratedValues>
41297            </field>
41298            <field>
41299              <name>FFVAL</name>
41300              <description>Fault Input Filter</description>
41301              <bitOffset>8</bitOffset>
41302              <bitWidth>4</bitWidth>
41303              <access>read-write</access>
41304            </field>
41305          </fields>
41306        </register>
41307        <register>
41308          <name>QDCTRL</name>
41309          <description>Quadrature Decoder Control And Status</description>
41310          <addressOffset>0x80</addressOffset>
41311          <size>32</size>
41312          <access>read-write</access>
41313          <resetValue>0</resetValue>
41314          <resetMask>0xFFFFFFFF</resetMask>
41315          <fields>
41316            <field>
41317              <name>QUADEN</name>
41318              <description>Quadrature Decoder Mode Enable</description>
41319              <bitOffset>0</bitOffset>
41320              <bitWidth>1</bitWidth>
41321              <access>read-write</access>
41322              <enumeratedValues>
41323                <enumeratedValue>
41324                  <name>0</name>
41325                  <description>Quadrature Decoder mode is disabled.</description>
41326                  <value>#0</value>
41327                </enumeratedValue>
41328                <enumeratedValue>
41329                  <name>1</name>
41330                  <description>Quadrature Decoder mode is enabled.</description>
41331                  <value>#1</value>
41332                </enumeratedValue>
41333              </enumeratedValues>
41334            </field>
41335            <field>
41336              <name>TOFDIR</name>
41337              <description>Timer Overflow Direction In Quadrature Decoder Mode</description>
41338              <bitOffset>1</bitOffset>
41339              <bitWidth>1</bitWidth>
41340              <access>read-only</access>
41341              <enumeratedValues>
41342                <enumeratedValue>
41343                  <name>0</name>
41344                  <description>TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter changes from its minimum value (CNTIN register) to its maximum value (MOD register).</description>
41345                  <value>#0</value>
41346                </enumeratedValue>
41347                <enumeratedValue>
41348                  <name>1</name>
41349                  <description>TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter changes from its maximum value (MOD register) to its minimum value (CNTIN register).</description>
41350                  <value>#1</value>
41351                </enumeratedValue>
41352              </enumeratedValues>
41353            </field>
41354            <field>
41355              <name>QUADIR</name>
41356              <description>FTM Counter Direction In Quadrature Decoder Mode</description>
41357              <bitOffset>2</bitOffset>
41358              <bitWidth>1</bitWidth>
41359              <access>read-only</access>
41360              <enumeratedValues>
41361                <enumeratedValue>
41362                  <name>0</name>
41363                  <description>Counting direction is decreasing (FTM counter decrement).</description>
41364                  <value>#0</value>
41365                </enumeratedValue>
41366                <enumeratedValue>
41367                  <name>1</name>
41368                  <description>Counting direction is increasing (FTM counter increment).</description>
41369                  <value>#1</value>
41370                </enumeratedValue>
41371              </enumeratedValues>
41372            </field>
41373            <field>
41374              <name>QUADMODE</name>
41375              <description>Quadrature Decoder Mode</description>
41376              <bitOffset>3</bitOffset>
41377              <bitWidth>1</bitWidth>
41378              <access>read-write</access>
41379              <enumeratedValues>
41380                <enumeratedValue>
41381                  <name>0</name>
41382                  <description>Phase A and phase B encoding mode.</description>
41383                  <value>#0</value>
41384                </enumeratedValue>
41385                <enumeratedValue>
41386                  <name>1</name>
41387                  <description>Count and direction encoding mode.</description>
41388                  <value>#1</value>
41389                </enumeratedValue>
41390              </enumeratedValues>
41391            </field>
41392            <field>
41393              <name>PHBPOL</name>
41394              <description>Phase B Input Polarity</description>
41395              <bitOffset>4</bitOffset>
41396              <bitWidth>1</bitWidth>
41397              <access>read-write</access>
41398              <enumeratedValues>
41399                <enumeratedValue>
41400                  <name>0</name>
41401                  <description>Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal.</description>
41402                  <value>#0</value>
41403                </enumeratedValue>
41404                <enumeratedValue>
41405                  <name>1</name>
41406                  <description>Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal.</description>
41407                  <value>#1</value>
41408                </enumeratedValue>
41409              </enumeratedValues>
41410            </field>
41411            <field>
41412              <name>PHAPOL</name>
41413              <description>Phase A Input Polarity</description>
41414              <bitOffset>5</bitOffset>
41415              <bitWidth>1</bitWidth>
41416              <access>read-write</access>
41417              <enumeratedValues>
41418                <enumeratedValue>
41419                  <name>0</name>
41420                  <description>Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal.</description>
41421                  <value>#0</value>
41422                </enumeratedValue>
41423                <enumeratedValue>
41424                  <name>1</name>
41425                  <description>Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal.</description>
41426                  <value>#1</value>
41427                </enumeratedValue>
41428              </enumeratedValues>
41429            </field>
41430            <field>
41431              <name>PHBFLTREN</name>
41432              <description>Phase B Input Filter Enable</description>
41433              <bitOffset>6</bitOffset>
41434              <bitWidth>1</bitWidth>
41435              <access>read-write</access>
41436              <enumeratedValues>
41437                <enumeratedValue>
41438                  <name>0</name>
41439                  <description>Phase B input filter is disabled.</description>
41440                  <value>#0</value>
41441                </enumeratedValue>
41442                <enumeratedValue>
41443                  <name>1</name>
41444                  <description>Phase B input filter is enabled.</description>
41445                  <value>#1</value>
41446                </enumeratedValue>
41447              </enumeratedValues>
41448            </field>
41449            <field>
41450              <name>PHAFLTREN</name>
41451              <description>Phase A Input Filter Enable</description>
41452              <bitOffset>7</bitOffset>
41453              <bitWidth>1</bitWidth>
41454              <access>read-write</access>
41455              <enumeratedValues>
41456                <enumeratedValue>
41457                  <name>0</name>
41458                  <description>Phase A input filter is disabled.</description>
41459                  <value>#0</value>
41460                </enumeratedValue>
41461                <enumeratedValue>
41462                  <name>1</name>
41463                  <description>Phase A input filter is enabled.</description>
41464                  <value>#1</value>
41465                </enumeratedValue>
41466              </enumeratedValues>
41467            </field>
41468          </fields>
41469        </register>
41470        <register>
41471          <name>CONF</name>
41472          <description>Configuration</description>
41473          <addressOffset>0x84</addressOffset>
41474          <size>32</size>
41475          <access>read-write</access>
41476          <resetValue>0</resetValue>
41477          <resetMask>0xFFFFFFFF</resetMask>
41478          <fields>
41479            <field>
41480              <name>NUMTOF</name>
41481              <description>TOF Frequency</description>
41482              <bitOffset>0</bitOffset>
41483              <bitWidth>5</bitWidth>
41484              <access>read-write</access>
41485            </field>
41486            <field>
41487              <name>BDMMODE</name>
41488              <description>BDM Mode</description>
41489              <bitOffset>6</bitOffset>
41490              <bitWidth>2</bitWidth>
41491              <access>read-write</access>
41492            </field>
41493            <field>
41494              <name>GTBEEN</name>
41495              <description>Global Time Base Enable</description>
41496              <bitOffset>9</bitOffset>
41497              <bitWidth>1</bitWidth>
41498              <access>read-write</access>
41499              <enumeratedValues>
41500                <enumeratedValue>
41501                  <name>0</name>
41502                  <description>Use of an external global time base is disabled.</description>
41503                  <value>#0</value>
41504                </enumeratedValue>
41505                <enumeratedValue>
41506                  <name>1</name>
41507                  <description>Use of an external global time base is enabled.</description>
41508                  <value>#1</value>
41509                </enumeratedValue>
41510              </enumeratedValues>
41511            </field>
41512            <field>
41513              <name>GTBEOUT</name>
41514              <description>Global Time Base Output</description>
41515              <bitOffset>10</bitOffset>
41516              <bitWidth>1</bitWidth>
41517              <access>read-write</access>
41518              <enumeratedValues>
41519                <enumeratedValue>
41520                  <name>0</name>
41521                  <description>A global time base signal generation is disabled.</description>
41522                  <value>#0</value>
41523                </enumeratedValue>
41524                <enumeratedValue>
41525                  <name>1</name>
41526                  <description>A global time base signal generation is enabled.</description>
41527                  <value>#1</value>
41528                </enumeratedValue>
41529              </enumeratedValues>
41530            </field>
41531          </fields>
41532        </register>
41533        <register>
41534          <name>FLTPOL</name>
41535          <description>FTM Fault Input Polarity</description>
41536          <addressOffset>0x88</addressOffset>
41537          <size>32</size>
41538          <access>read-write</access>
41539          <resetValue>0</resetValue>
41540          <resetMask>0xFFFFFFFF</resetMask>
41541          <fields>
41542            <field>
41543              <name>FLT0POL</name>
41544              <description>Fault Input 0 Polarity</description>
41545              <bitOffset>0</bitOffset>
41546              <bitWidth>1</bitWidth>
41547              <access>read-write</access>
41548              <enumeratedValues>
41549                <enumeratedValue>
41550                  <name>0</name>
41551                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
41552                  <value>#0</value>
41553                </enumeratedValue>
41554                <enumeratedValue>
41555                  <name>1</name>
41556                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
41557                  <value>#1</value>
41558                </enumeratedValue>
41559              </enumeratedValues>
41560            </field>
41561            <field>
41562              <name>FLT1POL</name>
41563              <description>Fault Input 1 Polarity</description>
41564              <bitOffset>1</bitOffset>
41565              <bitWidth>1</bitWidth>
41566              <access>read-write</access>
41567              <enumeratedValues>
41568                <enumeratedValue>
41569                  <name>0</name>
41570                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
41571                  <value>#0</value>
41572                </enumeratedValue>
41573                <enumeratedValue>
41574                  <name>1</name>
41575                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
41576                  <value>#1</value>
41577                </enumeratedValue>
41578              </enumeratedValues>
41579            </field>
41580            <field>
41581              <name>FLT2POL</name>
41582              <description>Fault Input 2 Polarity</description>
41583              <bitOffset>2</bitOffset>
41584              <bitWidth>1</bitWidth>
41585              <access>read-write</access>
41586              <enumeratedValues>
41587                <enumeratedValue>
41588                  <name>0</name>
41589                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
41590                  <value>#0</value>
41591                </enumeratedValue>
41592                <enumeratedValue>
41593                  <name>1</name>
41594                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
41595                  <value>#1</value>
41596                </enumeratedValue>
41597              </enumeratedValues>
41598            </field>
41599            <field>
41600              <name>FLT3POL</name>
41601              <description>Fault Input 3 Polarity</description>
41602              <bitOffset>3</bitOffset>
41603              <bitWidth>1</bitWidth>
41604              <access>read-write</access>
41605              <enumeratedValues>
41606                <enumeratedValue>
41607                  <name>0</name>
41608                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
41609                  <value>#0</value>
41610                </enumeratedValue>
41611                <enumeratedValue>
41612                  <name>1</name>
41613                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
41614                  <value>#1</value>
41615                </enumeratedValue>
41616              </enumeratedValues>
41617            </field>
41618          </fields>
41619        </register>
41620        <register>
41621          <name>SYNCONF</name>
41622          <description>Synchronization Configuration</description>
41623          <addressOffset>0x8C</addressOffset>
41624          <size>32</size>
41625          <access>read-write</access>
41626          <resetValue>0</resetValue>
41627          <resetMask>0xFFFFFFFF</resetMask>
41628          <fields>
41629            <field>
41630              <name>HWTRIGMODE</name>
41631              <description>Hardware Trigger Mode</description>
41632              <bitOffset>0</bitOffset>
41633              <bitWidth>1</bitWidth>
41634              <access>read-write</access>
41635              <enumeratedValues>
41636                <enumeratedValue>
41637                  <name>0</name>
41638                  <description>FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2.</description>
41639                  <value>#0</value>
41640                </enumeratedValue>
41641                <enumeratedValue>
41642                  <name>1</name>
41643                  <description>FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2.</description>
41644                  <value>#1</value>
41645                </enumeratedValue>
41646              </enumeratedValues>
41647            </field>
41648            <field>
41649              <name>CNTINC</name>
41650              <description>CNTIN Register Synchronization</description>
41651              <bitOffset>2</bitOffset>
41652              <bitWidth>1</bitWidth>
41653              <access>read-write</access>
41654              <enumeratedValues>
41655                <enumeratedValue>
41656                  <name>0</name>
41657                  <description>CNTIN register is updated with its buffer value at all rising edges of system clock.</description>
41658                  <value>#0</value>
41659                </enumeratedValue>
41660                <enumeratedValue>
41661                  <name>1</name>
41662                  <description>CNTIN register is updated with its buffer value by the PWM synchronization.</description>
41663                  <value>#1</value>
41664                </enumeratedValue>
41665              </enumeratedValues>
41666            </field>
41667            <field>
41668              <name>INVC</name>
41669              <description>INVCTRL Register Synchronization</description>
41670              <bitOffset>4</bitOffset>
41671              <bitWidth>1</bitWidth>
41672              <access>read-write</access>
41673              <enumeratedValues>
41674                <enumeratedValue>
41675                  <name>0</name>
41676                  <description>INVCTRL register is updated with its buffer value at all rising edges of system clock.</description>
41677                  <value>#0</value>
41678                </enumeratedValue>
41679                <enumeratedValue>
41680                  <name>1</name>
41681                  <description>INVCTRL register is updated with its buffer value by the PWM synchronization.</description>
41682                  <value>#1</value>
41683                </enumeratedValue>
41684              </enumeratedValues>
41685            </field>
41686            <field>
41687              <name>SWOC</name>
41688              <description>SWOCTRL Register Synchronization</description>
41689              <bitOffset>5</bitOffset>
41690              <bitWidth>1</bitWidth>
41691              <access>read-write</access>
41692              <enumeratedValues>
41693                <enumeratedValue>
41694                  <name>0</name>
41695                  <description>SWOCTRL register is updated with its buffer value at all rising edges of system clock.</description>
41696                  <value>#0</value>
41697                </enumeratedValue>
41698                <enumeratedValue>
41699                  <name>1</name>
41700                  <description>SWOCTRL register is updated with its buffer value by the PWM synchronization.</description>
41701                  <value>#1</value>
41702                </enumeratedValue>
41703              </enumeratedValues>
41704            </field>
41705            <field>
41706              <name>SYNCMODE</name>
41707              <description>Synchronization Mode</description>
41708              <bitOffset>7</bitOffset>
41709              <bitWidth>1</bitWidth>
41710              <access>read-write</access>
41711              <enumeratedValues>
41712                <enumeratedValue>
41713                  <name>0</name>
41714                  <description>Legacy PWM synchronization is selected.</description>
41715                  <value>#0</value>
41716                </enumeratedValue>
41717                <enumeratedValue>
41718                  <name>1</name>
41719                  <description>Enhanced PWM synchronization is selected.</description>
41720                  <value>#1</value>
41721                </enumeratedValue>
41722              </enumeratedValues>
41723            </field>
41724            <field>
41725              <name>SWRSTCNT</name>
41726              <description>FTM counter synchronization is activated by the software trigger.</description>
41727              <bitOffset>8</bitOffset>
41728              <bitWidth>1</bitWidth>
41729              <access>read-write</access>
41730              <enumeratedValues>
41731                <enumeratedValue>
41732                  <name>0</name>
41733                  <description>The software trigger does not activate the FTM counter synchronization.</description>
41734                  <value>#0</value>
41735                </enumeratedValue>
41736                <enumeratedValue>
41737                  <name>1</name>
41738                  <description>The software trigger activates the FTM counter synchronization.</description>
41739                  <value>#1</value>
41740                </enumeratedValue>
41741              </enumeratedValues>
41742            </field>
41743            <field>
41744              <name>SWWRBUF</name>
41745              <description>MOD, CNTIN, and CV registers synchronization is activated by the software trigger.</description>
41746              <bitOffset>9</bitOffset>
41747              <bitWidth>1</bitWidth>
41748              <access>read-write</access>
41749              <enumeratedValues>
41750                <enumeratedValue>
41751                  <name>0</name>
41752                  <description>The software trigger does not activate MOD, CNTIN, and CV registers synchronization.</description>
41753                  <value>#0</value>
41754                </enumeratedValue>
41755                <enumeratedValue>
41756                  <name>1</name>
41757                  <description>The software trigger activates MOD, CNTIN, and CV registers synchronization.</description>
41758                  <value>#1</value>
41759                </enumeratedValue>
41760              </enumeratedValues>
41761            </field>
41762            <field>
41763              <name>SWOM</name>
41764              <description>Output mask synchronization is activated by the software trigger.</description>
41765              <bitOffset>10</bitOffset>
41766              <bitWidth>1</bitWidth>
41767              <access>read-write</access>
41768              <enumeratedValues>
41769                <enumeratedValue>
41770                  <name>0</name>
41771                  <description>The software trigger does not activate the OUTMASK register synchronization.</description>
41772                  <value>#0</value>
41773                </enumeratedValue>
41774                <enumeratedValue>
41775                  <name>1</name>
41776                  <description>The software trigger activates the OUTMASK register synchronization.</description>
41777                  <value>#1</value>
41778                </enumeratedValue>
41779              </enumeratedValues>
41780            </field>
41781            <field>
41782              <name>SWINVC</name>
41783              <description>Inverting control synchronization is activated by the software trigger.</description>
41784              <bitOffset>11</bitOffset>
41785              <bitWidth>1</bitWidth>
41786              <access>read-write</access>
41787              <enumeratedValues>
41788                <enumeratedValue>
41789                  <name>0</name>
41790                  <description>The software trigger does not activate the INVCTRL register synchronization.</description>
41791                  <value>#0</value>
41792                </enumeratedValue>
41793                <enumeratedValue>
41794                  <name>1</name>
41795                  <description>The software trigger activates the INVCTRL register synchronization.</description>
41796                  <value>#1</value>
41797                </enumeratedValue>
41798              </enumeratedValues>
41799            </field>
41800            <field>
41801              <name>SWSOC</name>
41802              <description>Software output control synchronization is activated by the software trigger.</description>
41803              <bitOffset>12</bitOffset>
41804              <bitWidth>1</bitWidth>
41805              <access>read-write</access>
41806              <enumeratedValues>
41807                <enumeratedValue>
41808                  <name>0</name>
41809                  <description>The software trigger does not activate the SWOCTRL register synchronization.</description>
41810                  <value>#0</value>
41811                </enumeratedValue>
41812                <enumeratedValue>
41813                  <name>1</name>
41814                  <description>The software trigger activates the SWOCTRL register synchronization.</description>
41815                  <value>#1</value>
41816                </enumeratedValue>
41817              </enumeratedValues>
41818            </field>
41819            <field>
41820              <name>HWRSTCNT</name>
41821              <description>FTM counter synchronization is activated by a hardware trigger.</description>
41822              <bitOffset>16</bitOffset>
41823              <bitWidth>1</bitWidth>
41824              <access>read-write</access>
41825              <enumeratedValues>
41826                <enumeratedValue>
41827                  <name>0</name>
41828                  <description>A hardware trigger does not activate the FTM counter synchronization.</description>
41829                  <value>#0</value>
41830                </enumeratedValue>
41831                <enumeratedValue>
41832                  <name>1</name>
41833                  <description>A hardware trigger activates the FTM counter synchronization.</description>
41834                  <value>#1</value>
41835                </enumeratedValue>
41836              </enumeratedValues>
41837            </field>
41838            <field>
41839              <name>HWWRBUF</name>
41840              <description>MOD, CNTIN, and CV registers synchronization is activated by a hardware trigger.</description>
41841              <bitOffset>17</bitOffset>
41842              <bitWidth>1</bitWidth>
41843              <access>read-write</access>
41844              <enumeratedValues>
41845                <enumeratedValue>
41846                  <name>0</name>
41847                  <description>A hardware trigger does not activate MOD, CNTIN, and CV registers synchronization.</description>
41848                  <value>#0</value>
41849                </enumeratedValue>
41850                <enumeratedValue>
41851                  <name>1</name>
41852                  <description>A hardware trigger activates MOD, CNTIN, and CV registers synchronization.</description>
41853                  <value>#1</value>
41854                </enumeratedValue>
41855              </enumeratedValues>
41856            </field>
41857            <field>
41858              <name>HWOM</name>
41859              <description>Output mask synchronization is activated by a hardware trigger.</description>
41860              <bitOffset>18</bitOffset>
41861              <bitWidth>1</bitWidth>
41862              <access>read-write</access>
41863              <enumeratedValues>
41864                <enumeratedValue>
41865                  <name>0</name>
41866                  <description>A hardware trigger does not activate the OUTMASK register synchronization.</description>
41867                  <value>#0</value>
41868                </enumeratedValue>
41869                <enumeratedValue>
41870                  <name>1</name>
41871                  <description>A hardware trigger activates the OUTMASK register synchronization.</description>
41872                  <value>#1</value>
41873                </enumeratedValue>
41874              </enumeratedValues>
41875            </field>
41876            <field>
41877              <name>HWINVC</name>
41878              <description>Inverting control synchronization is activated by a hardware trigger.</description>
41879              <bitOffset>19</bitOffset>
41880              <bitWidth>1</bitWidth>
41881              <access>read-write</access>
41882              <enumeratedValues>
41883                <enumeratedValue>
41884                  <name>0</name>
41885                  <description>A hardware trigger does not activate the INVCTRL register synchronization.</description>
41886                  <value>#0</value>
41887                </enumeratedValue>
41888                <enumeratedValue>
41889                  <name>1</name>
41890                  <description>A hardware trigger activates the INVCTRL register synchronization.</description>
41891                  <value>#1</value>
41892                </enumeratedValue>
41893              </enumeratedValues>
41894            </field>
41895            <field>
41896              <name>HWSOC</name>
41897              <description>Software output control synchronization is activated by a hardware trigger.</description>
41898              <bitOffset>20</bitOffset>
41899              <bitWidth>1</bitWidth>
41900              <access>read-write</access>
41901              <enumeratedValues>
41902                <enumeratedValue>
41903                  <name>0</name>
41904                  <description>A hardware trigger does not activate the SWOCTRL register synchronization.</description>
41905                  <value>#0</value>
41906                </enumeratedValue>
41907                <enumeratedValue>
41908                  <name>1</name>
41909                  <description>A hardware trigger activates the SWOCTRL register synchronization.</description>
41910                  <value>#1</value>
41911                </enumeratedValue>
41912              </enumeratedValues>
41913            </field>
41914          </fields>
41915        </register>
41916        <register>
41917          <name>INVCTRL</name>
41918          <description>FTM Inverting Control</description>
41919          <addressOffset>0x90</addressOffset>
41920          <size>32</size>
41921          <access>read-write</access>
41922          <resetValue>0</resetValue>
41923          <resetMask>0xFFFFFFFF</resetMask>
41924          <fields>
41925            <field>
41926              <name>INV0EN</name>
41927              <description>Pair Channels 0 Inverting Enable</description>
41928              <bitOffset>0</bitOffset>
41929              <bitWidth>1</bitWidth>
41930              <access>read-write</access>
41931              <enumeratedValues>
41932                <enumeratedValue>
41933                  <name>0</name>
41934                  <description>Inverting is disabled.</description>
41935                  <value>#0</value>
41936                </enumeratedValue>
41937                <enumeratedValue>
41938                  <name>1</name>
41939                  <description>Inverting is enabled.</description>
41940                  <value>#1</value>
41941                </enumeratedValue>
41942              </enumeratedValues>
41943            </field>
41944            <field>
41945              <name>INV1EN</name>
41946              <description>Pair Channels 1 Inverting Enable</description>
41947              <bitOffset>1</bitOffset>
41948              <bitWidth>1</bitWidth>
41949              <access>read-write</access>
41950              <enumeratedValues>
41951                <enumeratedValue>
41952                  <name>0</name>
41953                  <description>Inverting is disabled.</description>
41954                  <value>#0</value>
41955                </enumeratedValue>
41956                <enumeratedValue>
41957                  <name>1</name>
41958                  <description>Inverting is enabled.</description>
41959                  <value>#1</value>
41960                </enumeratedValue>
41961              </enumeratedValues>
41962            </field>
41963            <field>
41964              <name>INV2EN</name>
41965              <description>Pair Channels 2 Inverting Enable</description>
41966              <bitOffset>2</bitOffset>
41967              <bitWidth>1</bitWidth>
41968              <access>read-write</access>
41969              <enumeratedValues>
41970                <enumeratedValue>
41971                  <name>0</name>
41972                  <description>Inverting is disabled.</description>
41973                  <value>#0</value>
41974                </enumeratedValue>
41975                <enumeratedValue>
41976                  <name>1</name>
41977                  <description>Inverting is enabled.</description>
41978                  <value>#1</value>
41979                </enumeratedValue>
41980              </enumeratedValues>
41981            </field>
41982            <field>
41983              <name>INV3EN</name>
41984              <description>Pair Channels 3 Inverting Enable</description>
41985              <bitOffset>3</bitOffset>
41986              <bitWidth>1</bitWidth>
41987              <access>read-write</access>
41988              <enumeratedValues>
41989                <enumeratedValue>
41990                  <name>0</name>
41991                  <description>Inverting is disabled.</description>
41992                  <value>#0</value>
41993                </enumeratedValue>
41994                <enumeratedValue>
41995                  <name>1</name>
41996                  <description>Inverting is enabled.</description>
41997                  <value>#1</value>
41998                </enumeratedValue>
41999              </enumeratedValues>
42000            </field>
42001          </fields>
42002        </register>
42003        <register>
42004          <name>SWOCTRL</name>
42005          <description>FTM Software Output Control</description>
42006          <addressOffset>0x94</addressOffset>
42007          <size>32</size>
42008          <access>read-write</access>
42009          <resetValue>0</resetValue>
42010          <resetMask>0xFFFFFFFF</resetMask>
42011          <fields>
42012            <field>
42013              <name>CH0OC</name>
42014              <description>Channel 0 Software Output Control Enable</description>
42015              <bitOffset>0</bitOffset>
42016              <bitWidth>1</bitWidth>
42017              <access>read-write</access>
42018              <enumeratedValues>
42019                <enumeratedValue>
42020                  <name>0</name>
42021                  <description>The channel output is not affected by software output control.</description>
42022                  <value>#0</value>
42023                </enumeratedValue>
42024                <enumeratedValue>
42025                  <name>1</name>
42026                  <description>The channel output is affected by software output control.</description>
42027                  <value>#1</value>
42028                </enumeratedValue>
42029              </enumeratedValues>
42030            </field>
42031            <field>
42032              <name>CH1OC</name>
42033              <description>Channel 1 Software Output Control Enable</description>
42034              <bitOffset>1</bitOffset>
42035              <bitWidth>1</bitWidth>
42036              <access>read-write</access>
42037              <enumeratedValues>
42038                <enumeratedValue>
42039                  <name>0</name>
42040                  <description>The channel output is not affected by software output control.</description>
42041                  <value>#0</value>
42042                </enumeratedValue>
42043                <enumeratedValue>
42044                  <name>1</name>
42045                  <description>The channel output is affected by software output control.</description>
42046                  <value>#1</value>
42047                </enumeratedValue>
42048              </enumeratedValues>
42049            </field>
42050            <field>
42051              <name>CH2OC</name>
42052              <description>Channel 2 Software Output Control Enable</description>
42053              <bitOffset>2</bitOffset>
42054              <bitWidth>1</bitWidth>
42055              <access>read-write</access>
42056              <enumeratedValues>
42057                <enumeratedValue>
42058                  <name>0</name>
42059                  <description>The channel output is not affected by software output control.</description>
42060                  <value>#0</value>
42061                </enumeratedValue>
42062                <enumeratedValue>
42063                  <name>1</name>
42064                  <description>The channel output is affected by software output control.</description>
42065                  <value>#1</value>
42066                </enumeratedValue>
42067              </enumeratedValues>
42068            </field>
42069            <field>
42070              <name>CH3OC</name>
42071              <description>Channel 3 Software Output Control Enable</description>
42072              <bitOffset>3</bitOffset>
42073              <bitWidth>1</bitWidth>
42074              <access>read-write</access>
42075              <enumeratedValues>
42076                <enumeratedValue>
42077                  <name>0</name>
42078                  <description>The channel output is not affected by software output control.</description>
42079                  <value>#0</value>
42080                </enumeratedValue>
42081                <enumeratedValue>
42082                  <name>1</name>
42083                  <description>The channel output is affected by software output control.</description>
42084                  <value>#1</value>
42085                </enumeratedValue>
42086              </enumeratedValues>
42087            </field>
42088            <field>
42089              <name>CH4OC</name>
42090              <description>Channel 4 Software Output Control Enable</description>
42091              <bitOffset>4</bitOffset>
42092              <bitWidth>1</bitWidth>
42093              <access>read-write</access>
42094              <enumeratedValues>
42095                <enumeratedValue>
42096                  <name>0</name>
42097                  <description>The channel output is not affected by software output control.</description>
42098                  <value>#0</value>
42099                </enumeratedValue>
42100                <enumeratedValue>
42101                  <name>1</name>
42102                  <description>The channel output is affected by software output control.</description>
42103                  <value>#1</value>
42104                </enumeratedValue>
42105              </enumeratedValues>
42106            </field>
42107            <field>
42108              <name>CH5OC</name>
42109              <description>Channel 5 Software Output Control Enable</description>
42110              <bitOffset>5</bitOffset>
42111              <bitWidth>1</bitWidth>
42112              <access>read-write</access>
42113              <enumeratedValues>
42114                <enumeratedValue>
42115                  <name>0</name>
42116                  <description>The channel output is not affected by software output control.</description>
42117                  <value>#0</value>
42118                </enumeratedValue>
42119                <enumeratedValue>
42120                  <name>1</name>
42121                  <description>The channel output is affected by software output control.</description>
42122                  <value>#1</value>
42123                </enumeratedValue>
42124              </enumeratedValues>
42125            </field>
42126            <field>
42127              <name>CH6OC</name>
42128              <description>Channel 6 Software Output Control Enable</description>
42129              <bitOffset>6</bitOffset>
42130              <bitWidth>1</bitWidth>
42131              <access>read-write</access>
42132              <enumeratedValues>
42133                <enumeratedValue>
42134                  <name>0</name>
42135                  <description>The channel output is not affected by software output control.</description>
42136                  <value>#0</value>
42137                </enumeratedValue>
42138                <enumeratedValue>
42139                  <name>1</name>
42140                  <description>The channel output is affected by software output control.</description>
42141                  <value>#1</value>
42142                </enumeratedValue>
42143              </enumeratedValues>
42144            </field>
42145            <field>
42146              <name>CH7OC</name>
42147              <description>Channel 7 Software Output Control Enable</description>
42148              <bitOffset>7</bitOffset>
42149              <bitWidth>1</bitWidth>
42150              <access>read-write</access>
42151              <enumeratedValues>
42152                <enumeratedValue>
42153                  <name>0</name>
42154                  <description>The channel output is not affected by software output control.</description>
42155                  <value>#0</value>
42156                </enumeratedValue>
42157                <enumeratedValue>
42158                  <name>1</name>
42159                  <description>The channel output is affected by software output control.</description>
42160                  <value>#1</value>
42161                </enumeratedValue>
42162              </enumeratedValues>
42163            </field>
42164            <field>
42165              <name>CH0OCV</name>
42166              <description>Channel 0 Software Output Control Value</description>
42167              <bitOffset>8</bitOffset>
42168              <bitWidth>1</bitWidth>
42169              <access>read-write</access>
42170              <enumeratedValues>
42171                <enumeratedValue>
42172                  <name>0</name>
42173                  <description>The software output control forces 0 to the channel output.</description>
42174                  <value>#0</value>
42175                </enumeratedValue>
42176                <enumeratedValue>
42177                  <name>1</name>
42178                  <description>The software output control forces 1 to the channel output.</description>
42179                  <value>#1</value>
42180                </enumeratedValue>
42181              </enumeratedValues>
42182            </field>
42183            <field>
42184              <name>CH1OCV</name>
42185              <description>Channel 1 Software Output Control Value</description>
42186              <bitOffset>9</bitOffset>
42187              <bitWidth>1</bitWidth>
42188              <access>read-write</access>
42189              <enumeratedValues>
42190                <enumeratedValue>
42191                  <name>0</name>
42192                  <description>The software output control forces 0 to the channel output.</description>
42193                  <value>#0</value>
42194                </enumeratedValue>
42195                <enumeratedValue>
42196                  <name>1</name>
42197                  <description>The software output control forces 1 to the channel output.</description>
42198                  <value>#1</value>
42199                </enumeratedValue>
42200              </enumeratedValues>
42201            </field>
42202            <field>
42203              <name>CH2OCV</name>
42204              <description>Channel 2 Software Output Control Value</description>
42205              <bitOffset>10</bitOffset>
42206              <bitWidth>1</bitWidth>
42207              <access>read-write</access>
42208              <enumeratedValues>
42209                <enumeratedValue>
42210                  <name>0</name>
42211                  <description>The software output control forces 0 to the channel output.</description>
42212                  <value>#0</value>
42213                </enumeratedValue>
42214                <enumeratedValue>
42215                  <name>1</name>
42216                  <description>The software output control forces 1 to the channel output.</description>
42217                  <value>#1</value>
42218                </enumeratedValue>
42219              </enumeratedValues>
42220            </field>
42221            <field>
42222              <name>CH3OCV</name>
42223              <description>Channel 3 Software Output Control Value</description>
42224              <bitOffset>11</bitOffset>
42225              <bitWidth>1</bitWidth>
42226              <access>read-write</access>
42227              <enumeratedValues>
42228                <enumeratedValue>
42229                  <name>0</name>
42230                  <description>The software output control forces 0 to the channel output.</description>
42231                  <value>#0</value>
42232                </enumeratedValue>
42233                <enumeratedValue>
42234                  <name>1</name>
42235                  <description>The software output control forces 1 to the channel output.</description>
42236                  <value>#1</value>
42237                </enumeratedValue>
42238              </enumeratedValues>
42239            </field>
42240            <field>
42241              <name>CH4OCV</name>
42242              <description>Channel 4 Software Output Control Value</description>
42243              <bitOffset>12</bitOffset>
42244              <bitWidth>1</bitWidth>
42245              <access>read-write</access>
42246              <enumeratedValues>
42247                <enumeratedValue>
42248                  <name>0</name>
42249                  <description>The software output control forces 0 to the channel output.</description>
42250                  <value>#0</value>
42251                </enumeratedValue>
42252                <enumeratedValue>
42253                  <name>1</name>
42254                  <description>The software output control forces 1 to the channel output.</description>
42255                  <value>#1</value>
42256                </enumeratedValue>
42257              </enumeratedValues>
42258            </field>
42259            <field>
42260              <name>CH5OCV</name>
42261              <description>Channel 5 Software Output Control Value</description>
42262              <bitOffset>13</bitOffset>
42263              <bitWidth>1</bitWidth>
42264              <access>read-write</access>
42265              <enumeratedValues>
42266                <enumeratedValue>
42267                  <name>0</name>
42268                  <description>The software output control forces 0 to the channel output.</description>
42269                  <value>#0</value>
42270                </enumeratedValue>
42271                <enumeratedValue>
42272                  <name>1</name>
42273                  <description>The software output control forces 1 to the channel output.</description>
42274                  <value>#1</value>
42275                </enumeratedValue>
42276              </enumeratedValues>
42277            </field>
42278            <field>
42279              <name>CH6OCV</name>
42280              <description>Channel 6 Software Output Control Value</description>
42281              <bitOffset>14</bitOffset>
42282              <bitWidth>1</bitWidth>
42283              <access>read-write</access>
42284              <enumeratedValues>
42285                <enumeratedValue>
42286                  <name>0</name>
42287                  <description>The software output control forces 0 to the channel output.</description>
42288                  <value>#0</value>
42289                </enumeratedValue>
42290                <enumeratedValue>
42291                  <name>1</name>
42292                  <description>The software output control forces 1 to the channel output.</description>
42293                  <value>#1</value>
42294                </enumeratedValue>
42295              </enumeratedValues>
42296            </field>
42297            <field>
42298              <name>CH7OCV</name>
42299              <description>Channel 7 Software Output Control Value</description>
42300              <bitOffset>15</bitOffset>
42301              <bitWidth>1</bitWidth>
42302              <access>read-write</access>
42303              <enumeratedValues>
42304                <enumeratedValue>
42305                  <name>0</name>
42306                  <description>The software output control forces 0 to the channel output.</description>
42307                  <value>#0</value>
42308                </enumeratedValue>
42309                <enumeratedValue>
42310                  <name>1</name>
42311                  <description>The software output control forces 1 to the channel output.</description>
42312                  <value>#1</value>
42313                </enumeratedValue>
42314              </enumeratedValues>
42315            </field>
42316          </fields>
42317        </register>
42318        <register>
42319          <name>PWMLOAD</name>
42320          <description>FTM PWM Load</description>
42321          <addressOffset>0x98</addressOffset>
42322          <size>32</size>
42323          <access>read-write</access>
42324          <resetValue>0</resetValue>
42325          <resetMask>0xFFFFFFFF</resetMask>
42326          <fields>
42327            <field>
42328              <name>CH0SEL</name>
42329              <description>Channel 0 Select</description>
42330              <bitOffset>0</bitOffset>
42331              <bitWidth>1</bitWidth>
42332              <access>read-write</access>
42333              <enumeratedValues>
42334                <enumeratedValue>
42335                  <name>0</name>
42336                  <description>Do not include the channel in the matching process.</description>
42337                  <value>#0</value>
42338                </enumeratedValue>
42339                <enumeratedValue>
42340                  <name>1</name>
42341                  <description>Include the channel in the matching process.</description>
42342                  <value>#1</value>
42343                </enumeratedValue>
42344              </enumeratedValues>
42345            </field>
42346            <field>
42347              <name>CH1SEL</name>
42348              <description>Channel 1 Select</description>
42349              <bitOffset>1</bitOffset>
42350              <bitWidth>1</bitWidth>
42351              <access>read-write</access>
42352              <enumeratedValues>
42353                <enumeratedValue>
42354                  <name>0</name>
42355                  <description>Do not include the channel in the matching process.</description>
42356                  <value>#0</value>
42357                </enumeratedValue>
42358                <enumeratedValue>
42359                  <name>1</name>
42360                  <description>Include the channel in the matching process.</description>
42361                  <value>#1</value>
42362                </enumeratedValue>
42363              </enumeratedValues>
42364            </field>
42365            <field>
42366              <name>CH2SEL</name>
42367              <description>Channel 2 Select</description>
42368              <bitOffset>2</bitOffset>
42369              <bitWidth>1</bitWidth>
42370              <access>read-write</access>
42371              <enumeratedValues>
42372                <enumeratedValue>
42373                  <name>0</name>
42374                  <description>Do not include the channel in the matching process.</description>
42375                  <value>#0</value>
42376                </enumeratedValue>
42377                <enumeratedValue>
42378                  <name>1</name>
42379                  <description>Include the channel in the matching process.</description>
42380                  <value>#1</value>
42381                </enumeratedValue>
42382              </enumeratedValues>
42383            </field>
42384            <field>
42385              <name>CH3SEL</name>
42386              <description>Channel 3 Select</description>
42387              <bitOffset>3</bitOffset>
42388              <bitWidth>1</bitWidth>
42389              <access>read-write</access>
42390              <enumeratedValues>
42391                <enumeratedValue>
42392                  <name>0</name>
42393                  <description>Do not include the channel in the matching process.</description>
42394                  <value>#0</value>
42395                </enumeratedValue>
42396                <enumeratedValue>
42397                  <name>1</name>
42398                  <description>Include the channel in the matching process.</description>
42399                  <value>#1</value>
42400                </enumeratedValue>
42401              </enumeratedValues>
42402            </field>
42403            <field>
42404              <name>CH4SEL</name>
42405              <description>Channel 4 Select</description>
42406              <bitOffset>4</bitOffset>
42407              <bitWidth>1</bitWidth>
42408              <access>read-write</access>
42409              <enumeratedValues>
42410                <enumeratedValue>
42411                  <name>0</name>
42412                  <description>Do not include the channel in the matching process.</description>
42413                  <value>#0</value>
42414                </enumeratedValue>
42415                <enumeratedValue>
42416                  <name>1</name>
42417                  <description>Include the channel in the matching process.</description>
42418                  <value>#1</value>
42419                </enumeratedValue>
42420              </enumeratedValues>
42421            </field>
42422            <field>
42423              <name>CH5SEL</name>
42424              <description>Channel 5 Select</description>
42425              <bitOffset>5</bitOffset>
42426              <bitWidth>1</bitWidth>
42427              <access>read-write</access>
42428              <enumeratedValues>
42429                <enumeratedValue>
42430                  <name>0</name>
42431                  <description>Do not include the channel in the matching process.</description>
42432                  <value>#0</value>
42433                </enumeratedValue>
42434                <enumeratedValue>
42435                  <name>1</name>
42436                  <description>Include the channel in the matching process.</description>
42437                  <value>#1</value>
42438                </enumeratedValue>
42439              </enumeratedValues>
42440            </field>
42441            <field>
42442              <name>CH6SEL</name>
42443              <description>Channel 6 Select</description>
42444              <bitOffset>6</bitOffset>
42445              <bitWidth>1</bitWidth>
42446              <access>read-write</access>
42447              <enumeratedValues>
42448                <enumeratedValue>
42449                  <name>0</name>
42450                  <description>Do not include the channel in the matching process.</description>
42451                  <value>#0</value>
42452                </enumeratedValue>
42453                <enumeratedValue>
42454                  <name>1</name>
42455                  <description>Include the channel in the matching process.</description>
42456                  <value>#1</value>
42457                </enumeratedValue>
42458              </enumeratedValues>
42459            </field>
42460            <field>
42461              <name>CH7SEL</name>
42462              <description>Channel 7 Select</description>
42463              <bitOffset>7</bitOffset>
42464              <bitWidth>1</bitWidth>
42465              <access>read-write</access>
42466              <enumeratedValues>
42467                <enumeratedValue>
42468                  <name>0</name>
42469                  <description>Do not include the channel in the matching process.</description>
42470                  <value>#0</value>
42471                </enumeratedValue>
42472                <enumeratedValue>
42473                  <name>1</name>
42474                  <description>Include the channel in the matching process.</description>
42475                  <value>#1</value>
42476                </enumeratedValue>
42477              </enumeratedValues>
42478            </field>
42479            <field>
42480              <name>LDOK</name>
42481              <description>Load Enable</description>
42482              <bitOffset>9</bitOffset>
42483              <bitWidth>1</bitWidth>
42484              <access>read-write</access>
42485              <enumeratedValues>
42486                <enumeratedValue>
42487                  <name>0</name>
42488                  <description>Loading updated values is disabled.</description>
42489                  <value>#0</value>
42490                </enumeratedValue>
42491                <enumeratedValue>
42492                  <name>1</name>
42493                  <description>Loading updated values is enabled.</description>
42494                  <value>#1</value>
42495                </enumeratedValue>
42496              </enumeratedValues>
42497            </field>
42498          </fields>
42499        </register>
42500      </registers>
42501    </peripheral>
42502    <peripheral>
42503      <name>FTM2</name>
42504      <description>FlexTimer Module</description>
42505      <groupName>FTM</groupName>
42506      <prependToName>FTM2_</prependToName>
42507      <baseAddress>0x4003A000</baseAddress>
42508      <addressBlock>
42509        <offset>0</offset>
42510        <size>0x9C</size>
42511        <usage>registers</usage>
42512      </addressBlock>
42513      <interrupt>
42514        <name>FTM2</name>
42515        <value>44</value>
42516      </interrupt>
42517      <registers>
42518        <register>
42519          <name>SC</name>
42520          <description>Status And Control</description>
42521          <addressOffset>0</addressOffset>
42522          <size>32</size>
42523          <access>read-write</access>
42524          <resetValue>0</resetValue>
42525          <resetMask>0xFFFFFFFF</resetMask>
42526          <fields>
42527            <field>
42528              <name>PS</name>
42529              <description>Prescale Factor Selection</description>
42530              <bitOffset>0</bitOffset>
42531              <bitWidth>3</bitWidth>
42532              <access>read-write</access>
42533              <enumeratedValues>
42534                <enumeratedValue>
42535                  <name>000</name>
42536                  <description>Divide by 1</description>
42537                  <value>#000</value>
42538                </enumeratedValue>
42539                <enumeratedValue>
42540                  <name>001</name>
42541                  <description>Divide by 2</description>
42542                  <value>#001</value>
42543                </enumeratedValue>
42544                <enumeratedValue>
42545                  <name>010</name>
42546                  <description>Divide by 4</description>
42547                  <value>#010</value>
42548                </enumeratedValue>
42549                <enumeratedValue>
42550                  <name>011</name>
42551                  <description>Divide by 8</description>
42552                  <value>#011</value>
42553                </enumeratedValue>
42554                <enumeratedValue>
42555                  <name>100</name>
42556                  <description>Divide by 16</description>
42557                  <value>#100</value>
42558                </enumeratedValue>
42559                <enumeratedValue>
42560                  <name>101</name>
42561                  <description>Divide by 32</description>
42562                  <value>#101</value>
42563                </enumeratedValue>
42564                <enumeratedValue>
42565                  <name>110</name>
42566                  <description>Divide by 64</description>
42567                  <value>#110</value>
42568                </enumeratedValue>
42569                <enumeratedValue>
42570                  <name>111</name>
42571                  <description>Divide by 128</description>
42572                  <value>#111</value>
42573                </enumeratedValue>
42574              </enumeratedValues>
42575            </field>
42576            <field>
42577              <name>CLKS</name>
42578              <description>Clock Source Selection</description>
42579              <bitOffset>3</bitOffset>
42580              <bitWidth>2</bitWidth>
42581              <access>read-write</access>
42582              <enumeratedValues>
42583                <enumeratedValue>
42584                  <name>00</name>
42585                  <description>No clock selected. This in effect disables the FTM counter.</description>
42586                  <value>#00</value>
42587                </enumeratedValue>
42588                <enumeratedValue>
42589                  <name>01</name>
42590                  <description>System clock</description>
42591                  <value>#01</value>
42592                </enumeratedValue>
42593                <enumeratedValue>
42594                  <name>10</name>
42595                  <description>Fixed frequency clock</description>
42596                  <value>#10</value>
42597                </enumeratedValue>
42598                <enumeratedValue>
42599                  <name>11</name>
42600                  <description>External clock</description>
42601                  <value>#11</value>
42602                </enumeratedValue>
42603              </enumeratedValues>
42604            </field>
42605            <field>
42606              <name>CPWMS</name>
42607              <description>Center-Aligned PWM Select</description>
42608              <bitOffset>5</bitOffset>
42609              <bitWidth>1</bitWidth>
42610              <access>read-write</access>
42611              <enumeratedValues>
42612                <enumeratedValue>
42613                  <name>0</name>
42614                  <description>FTM counter operates in Up Counting mode.</description>
42615                  <value>#0</value>
42616                </enumeratedValue>
42617                <enumeratedValue>
42618                  <name>1</name>
42619                  <description>FTM counter operates in Up-Down Counting mode.</description>
42620                  <value>#1</value>
42621                </enumeratedValue>
42622              </enumeratedValues>
42623            </field>
42624            <field>
42625              <name>TOIE</name>
42626              <description>Timer Overflow Interrupt Enable</description>
42627              <bitOffset>6</bitOffset>
42628              <bitWidth>1</bitWidth>
42629              <access>read-write</access>
42630              <enumeratedValues>
42631                <enumeratedValue>
42632                  <name>0</name>
42633                  <description>Disable TOF interrupts. Use software polling.</description>
42634                  <value>#0</value>
42635                </enumeratedValue>
42636                <enumeratedValue>
42637                  <name>1</name>
42638                  <description>Enable TOF interrupts. An interrupt is generated when TOF equals one.</description>
42639                  <value>#1</value>
42640                </enumeratedValue>
42641              </enumeratedValues>
42642            </field>
42643            <field>
42644              <name>TOF</name>
42645              <description>Timer Overflow Flag</description>
42646              <bitOffset>7</bitOffset>
42647              <bitWidth>1</bitWidth>
42648              <access>read-write</access>
42649              <enumeratedValues>
42650                <enumeratedValue>
42651                  <name>0</name>
42652                  <description>FTM counter has not overflowed.</description>
42653                  <value>#0</value>
42654                </enumeratedValue>
42655                <enumeratedValue>
42656                  <name>1</name>
42657                  <description>FTM counter has overflowed.</description>
42658                  <value>#1</value>
42659                </enumeratedValue>
42660              </enumeratedValues>
42661            </field>
42662          </fields>
42663        </register>
42664        <register>
42665          <name>CNT</name>
42666          <description>Counter</description>
42667          <addressOffset>0x4</addressOffset>
42668          <size>32</size>
42669          <access>read-write</access>
42670          <resetValue>0</resetValue>
42671          <resetMask>0xFFFFFFFF</resetMask>
42672          <fields>
42673            <field>
42674              <name>COUNT</name>
42675              <description>Counter Value</description>
42676              <bitOffset>0</bitOffset>
42677              <bitWidth>16</bitWidth>
42678              <access>read-write</access>
42679            </field>
42680          </fields>
42681        </register>
42682        <register>
42683          <name>MOD</name>
42684          <description>Modulo</description>
42685          <addressOffset>0x8</addressOffset>
42686          <size>32</size>
42687          <access>read-write</access>
42688          <resetValue>0</resetValue>
42689          <resetMask>0xFFFFFFFF</resetMask>
42690          <fields>
42691            <field>
42692              <name>MOD</name>
42693              <description>Modulo Value</description>
42694              <bitOffset>0</bitOffset>
42695              <bitWidth>16</bitWidth>
42696              <access>read-write</access>
42697            </field>
42698          </fields>
42699        </register>
42700        <register>
42701          <dim>2</dim>
42702          <dimIncrement>0x8</dimIncrement>
42703          <dimIndex>0,1</dimIndex>
42704          <name>C%sSC</name>
42705          <description>Channel (n) Status And Control</description>
42706          <addressOffset>0xC</addressOffset>
42707          <size>32</size>
42708          <access>read-write</access>
42709          <resetValue>0</resetValue>
42710          <resetMask>0xFFFFFFFF</resetMask>
42711          <fields>
42712            <field>
42713              <name>DMA</name>
42714              <description>DMA Enable</description>
42715              <bitOffset>0</bitOffset>
42716              <bitWidth>1</bitWidth>
42717              <access>read-write</access>
42718              <enumeratedValues>
42719                <enumeratedValue>
42720                  <name>0</name>
42721                  <description>Disable DMA transfers.</description>
42722                  <value>#0</value>
42723                </enumeratedValue>
42724                <enumeratedValue>
42725                  <name>1</name>
42726                  <description>Enable DMA transfers.</description>
42727                  <value>#1</value>
42728                </enumeratedValue>
42729              </enumeratedValues>
42730            </field>
42731            <field>
42732              <name>ICRST</name>
42733              <description>FTM counter reset by the selected input capture event.</description>
42734              <bitOffset>1</bitOffset>
42735              <bitWidth>1</bitWidth>
42736              <access>read-write</access>
42737              <enumeratedValues>
42738                <enumeratedValue>
42739                  <name>0</name>
42740                  <description>FTM counter is not reset when the selected channel (n) input event is detected.</description>
42741                  <value>#0</value>
42742                </enumeratedValue>
42743                <enumeratedValue>
42744                  <name>1</name>
42745                  <description>FTM counter is reset when the selected channel (n) input event is detected.</description>
42746                  <value>#1</value>
42747                </enumeratedValue>
42748              </enumeratedValues>
42749            </field>
42750            <field>
42751              <name>ELSA</name>
42752              <description>Edge or Level Select</description>
42753              <bitOffset>2</bitOffset>
42754              <bitWidth>1</bitWidth>
42755              <access>read-write</access>
42756            </field>
42757            <field>
42758              <name>ELSB</name>
42759              <description>Edge or Level Select</description>
42760              <bitOffset>3</bitOffset>
42761              <bitWidth>1</bitWidth>
42762              <access>read-write</access>
42763            </field>
42764            <field>
42765              <name>MSA</name>
42766              <description>Channel Mode Select</description>
42767              <bitOffset>4</bitOffset>
42768              <bitWidth>1</bitWidth>
42769              <access>read-write</access>
42770            </field>
42771            <field>
42772              <name>MSB</name>
42773              <description>Channel Mode Select</description>
42774              <bitOffset>5</bitOffset>
42775              <bitWidth>1</bitWidth>
42776              <access>read-write</access>
42777            </field>
42778            <field>
42779              <name>CHIE</name>
42780              <description>Channel Interrupt Enable</description>
42781              <bitOffset>6</bitOffset>
42782              <bitWidth>1</bitWidth>
42783              <access>read-write</access>
42784              <enumeratedValues>
42785                <enumeratedValue>
42786                  <name>0</name>
42787                  <description>Disable channel interrupts. Use software polling.</description>
42788                  <value>#0</value>
42789                </enumeratedValue>
42790                <enumeratedValue>
42791                  <name>1</name>
42792                  <description>Enable channel interrupts.</description>
42793                  <value>#1</value>
42794                </enumeratedValue>
42795              </enumeratedValues>
42796            </field>
42797            <field>
42798              <name>CHF</name>
42799              <description>Channel Flag</description>
42800              <bitOffset>7</bitOffset>
42801              <bitWidth>1</bitWidth>
42802              <access>read-write</access>
42803              <enumeratedValues>
42804                <enumeratedValue>
42805                  <name>0</name>
42806                  <description>No channel event has occurred.</description>
42807                  <value>#0</value>
42808                </enumeratedValue>
42809                <enumeratedValue>
42810                  <name>1</name>
42811                  <description>A channel event has occurred.</description>
42812                  <value>#1</value>
42813                </enumeratedValue>
42814              </enumeratedValues>
42815            </field>
42816          </fields>
42817        </register>
42818        <register>
42819          <dim>2</dim>
42820          <dimIncrement>0x8</dimIncrement>
42821          <dimIndex>0,1</dimIndex>
42822          <name>C%sV</name>
42823          <description>Channel (n) Value</description>
42824          <addressOffset>0x10</addressOffset>
42825          <size>32</size>
42826          <access>read-write</access>
42827          <resetValue>0</resetValue>
42828          <resetMask>0xFFFFFFFF</resetMask>
42829          <fields>
42830            <field>
42831              <name>VAL</name>
42832              <description>Channel Value</description>
42833              <bitOffset>0</bitOffset>
42834              <bitWidth>16</bitWidth>
42835              <access>read-write</access>
42836            </field>
42837          </fields>
42838        </register>
42839        <register>
42840          <name>CNTIN</name>
42841          <description>Counter Initial Value</description>
42842          <addressOffset>0x4C</addressOffset>
42843          <size>32</size>
42844          <access>read-write</access>
42845          <resetValue>0</resetValue>
42846          <resetMask>0xFFFFFFFF</resetMask>
42847          <fields>
42848            <field>
42849              <name>INIT</name>
42850              <description>Initial Value Of The FTM Counter</description>
42851              <bitOffset>0</bitOffset>
42852              <bitWidth>16</bitWidth>
42853              <access>read-write</access>
42854            </field>
42855          </fields>
42856        </register>
42857        <register>
42858          <name>STATUS</name>
42859          <description>Capture And Compare Status</description>
42860          <addressOffset>0x50</addressOffset>
42861          <size>32</size>
42862          <access>read-write</access>
42863          <resetValue>0</resetValue>
42864          <resetMask>0xFFFFFFFF</resetMask>
42865          <fields>
42866            <field>
42867              <name>CH0F</name>
42868              <description>Channel 0 Flag</description>
42869              <bitOffset>0</bitOffset>
42870              <bitWidth>1</bitWidth>
42871              <access>read-write</access>
42872              <enumeratedValues>
42873                <enumeratedValue>
42874                  <name>0</name>
42875                  <description>No channel event has occurred.</description>
42876                  <value>#0</value>
42877                </enumeratedValue>
42878                <enumeratedValue>
42879                  <name>1</name>
42880                  <description>A channel event has occurred.</description>
42881                  <value>#1</value>
42882                </enumeratedValue>
42883              </enumeratedValues>
42884            </field>
42885            <field>
42886              <name>CH1F</name>
42887              <description>Channel 1 Flag</description>
42888              <bitOffset>1</bitOffset>
42889              <bitWidth>1</bitWidth>
42890              <access>read-write</access>
42891              <enumeratedValues>
42892                <enumeratedValue>
42893                  <name>0</name>
42894                  <description>No channel event has occurred.</description>
42895                  <value>#0</value>
42896                </enumeratedValue>
42897                <enumeratedValue>
42898                  <name>1</name>
42899                  <description>A channel event has occurred.</description>
42900                  <value>#1</value>
42901                </enumeratedValue>
42902              </enumeratedValues>
42903            </field>
42904            <field>
42905              <name>CH2F</name>
42906              <description>Channel 2 Flag</description>
42907              <bitOffset>2</bitOffset>
42908              <bitWidth>1</bitWidth>
42909              <access>read-write</access>
42910              <enumeratedValues>
42911                <enumeratedValue>
42912                  <name>0</name>
42913                  <description>No channel event has occurred.</description>
42914                  <value>#0</value>
42915                </enumeratedValue>
42916                <enumeratedValue>
42917                  <name>1</name>
42918                  <description>A channel event has occurred.</description>
42919                  <value>#1</value>
42920                </enumeratedValue>
42921              </enumeratedValues>
42922            </field>
42923            <field>
42924              <name>CH3F</name>
42925              <description>Channel 3 Flag</description>
42926              <bitOffset>3</bitOffset>
42927              <bitWidth>1</bitWidth>
42928              <access>read-write</access>
42929              <enumeratedValues>
42930                <enumeratedValue>
42931                  <name>0</name>
42932                  <description>No channel event has occurred.</description>
42933                  <value>#0</value>
42934                </enumeratedValue>
42935                <enumeratedValue>
42936                  <name>1</name>
42937                  <description>A channel event has occurred.</description>
42938                  <value>#1</value>
42939                </enumeratedValue>
42940              </enumeratedValues>
42941            </field>
42942            <field>
42943              <name>CH4F</name>
42944              <description>Channel 4 Flag</description>
42945              <bitOffset>4</bitOffset>
42946              <bitWidth>1</bitWidth>
42947              <access>read-write</access>
42948              <enumeratedValues>
42949                <enumeratedValue>
42950                  <name>0</name>
42951                  <description>No channel event has occurred.</description>
42952                  <value>#0</value>
42953                </enumeratedValue>
42954                <enumeratedValue>
42955                  <name>1</name>
42956                  <description>A channel event has occurred.</description>
42957                  <value>#1</value>
42958                </enumeratedValue>
42959              </enumeratedValues>
42960            </field>
42961            <field>
42962              <name>CH5F</name>
42963              <description>Channel 5 Flag</description>
42964              <bitOffset>5</bitOffset>
42965              <bitWidth>1</bitWidth>
42966              <access>read-write</access>
42967              <enumeratedValues>
42968                <enumeratedValue>
42969                  <name>0</name>
42970                  <description>No channel event has occurred.</description>
42971                  <value>#0</value>
42972                </enumeratedValue>
42973                <enumeratedValue>
42974                  <name>1</name>
42975                  <description>A channel event has occurred.</description>
42976                  <value>#1</value>
42977                </enumeratedValue>
42978              </enumeratedValues>
42979            </field>
42980            <field>
42981              <name>CH6F</name>
42982              <description>Channel 6 Flag</description>
42983              <bitOffset>6</bitOffset>
42984              <bitWidth>1</bitWidth>
42985              <access>read-write</access>
42986              <enumeratedValues>
42987                <enumeratedValue>
42988                  <name>0</name>
42989                  <description>No channel event has occurred.</description>
42990                  <value>#0</value>
42991                </enumeratedValue>
42992                <enumeratedValue>
42993                  <name>1</name>
42994                  <description>A channel event has occurred.</description>
42995                  <value>#1</value>
42996                </enumeratedValue>
42997              </enumeratedValues>
42998            </field>
42999            <field>
43000              <name>CH7F</name>
43001              <description>Channel 7 Flag</description>
43002              <bitOffset>7</bitOffset>
43003              <bitWidth>1</bitWidth>
43004              <access>read-write</access>
43005              <enumeratedValues>
43006                <enumeratedValue>
43007                  <name>0</name>
43008                  <description>No channel event has occurred.</description>
43009                  <value>#0</value>
43010                </enumeratedValue>
43011                <enumeratedValue>
43012                  <name>1</name>
43013                  <description>A channel event has occurred.</description>
43014                  <value>#1</value>
43015                </enumeratedValue>
43016              </enumeratedValues>
43017            </field>
43018          </fields>
43019        </register>
43020        <register>
43021          <name>MODE</name>
43022          <description>Features Mode Selection</description>
43023          <addressOffset>0x54</addressOffset>
43024          <size>32</size>
43025          <access>read-write</access>
43026          <resetValue>0x4</resetValue>
43027          <resetMask>0xFFFFFFFF</resetMask>
43028          <fields>
43029            <field>
43030              <name>FTMEN</name>
43031              <description>FTM Enable</description>
43032              <bitOffset>0</bitOffset>
43033              <bitWidth>1</bitWidth>
43034              <access>read-write</access>
43035              <enumeratedValues>
43036                <enumeratedValue>
43037                  <name>0</name>
43038                  <description>TPM compatibility. Free running counter and synchronization compatible with TPM.</description>
43039                  <value>#0</value>
43040                </enumeratedValue>
43041                <enumeratedValue>
43042                  <name>1</name>
43043                  <description>Free running counter and synchronization are different from TPM behavior.</description>
43044                  <value>#1</value>
43045                </enumeratedValue>
43046              </enumeratedValues>
43047            </field>
43048            <field>
43049              <name>INIT</name>
43050              <description>Initialize The Channels Output</description>
43051              <bitOffset>1</bitOffset>
43052              <bitWidth>1</bitWidth>
43053              <access>read-write</access>
43054            </field>
43055            <field>
43056              <name>WPDIS</name>
43057              <description>Write Protection Disable</description>
43058              <bitOffset>2</bitOffset>
43059              <bitWidth>1</bitWidth>
43060              <access>read-write</access>
43061              <enumeratedValues>
43062                <enumeratedValue>
43063                  <name>0</name>
43064                  <description>Write protection is enabled.</description>
43065                  <value>#0</value>
43066                </enumeratedValue>
43067                <enumeratedValue>
43068                  <name>1</name>
43069                  <description>Write protection is disabled.</description>
43070                  <value>#1</value>
43071                </enumeratedValue>
43072              </enumeratedValues>
43073            </field>
43074            <field>
43075              <name>PWMSYNC</name>
43076              <description>PWM Synchronization Mode</description>
43077              <bitOffset>3</bitOffset>
43078              <bitWidth>1</bitWidth>
43079              <access>read-write</access>
43080              <enumeratedValues>
43081                <enumeratedValue>
43082                  <name>0</name>
43083                  <description>No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization.</description>
43084                  <value>#0</value>
43085                </enumeratedValue>
43086                <enumeratedValue>
43087                  <name>1</name>
43088                  <description>Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization.</description>
43089                  <value>#1</value>
43090                </enumeratedValue>
43091              </enumeratedValues>
43092            </field>
43093            <field>
43094              <name>CAPTEST</name>
43095              <description>Capture Test Mode Enable</description>
43096              <bitOffset>4</bitOffset>
43097              <bitWidth>1</bitWidth>
43098              <access>read-write</access>
43099              <enumeratedValues>
43100                <enumeratedValue>
43101                  <name>0</name>
43102                  <description>Capture test mode is disabled.</description>
43103                  <value>#0</value>
43104                </enumeratedValue>
43105                <enumeratedValue>
43106                  <name>1</name>
43107                  <description>Capture test mode is enabled.</description>
43108                  <value>#1</value>
43109                </enumeratedValue>
43110              </enumeratedValues>
43111            </field>
43112            <field>
43113              <name>FAULTM</name>
43114              <description>Fault Control Mode</description>
43115              <bitOffset>5</bitOffset>
43116              <bitWidth>2</bitWidth>
43117              <access>read-write</access>
43118              <enumeratedValues>
43119                <enumeratedValue>
43120                  <name>00</name>
43121                  <description>Fault control is disabled for all channels.</description>
43122                  <value>#00</value>
43123                </enumeratedValue>
43124                <enumeratedValue>
43125                  <name>01</name>
43126                  <description>Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing.</description>
43127                  <value>#01</value>
43128                </enumeratedValue>
43129                <enumeratedValue>
43130                  <name>10</name>
43131                  <description>Fault control is enabled for all channels, and the selected mode is the manual fault clearing.</description>
43132                  <value>#10</value>
43133                </enumeratedValue>
43134                <enumeratedValue>
43135                  <name>11</name>
43136                  <description>Fault control is enabled for all channels, and the selected mode is the automatic fault clearing.</description>
43137                  <value>#11</value>
43138                </enumeratedValue>
43139              </enumeratedValues>
43140            </field>
43141            <field>
43142              <name>FAULTIE</name>
43143              <description>Fault Interrupt Enable</description>
43144              <bitOffset>7</bitOffset>
43145              <bitWidth>1</bitWidth>
43146              <access>read-write</access>
43147              <enumeratedValues>
43148                <enumeratedValue>
43149                  <name>0</name>
43150                  <description>Fault control interrupt is disabled.</description>
43151                  <value>#0</value>
43152                </enumeratedValue>
43153                <enumeratedValue>
43154                  <name>1</name>
43155                  <description>Fault control interrupt is enabled.</description>
43156                  <value>#1</value>
43157                </enumeratedValue>
43158              </enumeratedValues>
43159            </field>
43160          </fields>
43161        </register>
43162        <register>
43163          <name>SYNC</name>
43164          <description>Synchronization</description>
43165          <addressOffset>0x58</addressOffset>
43166          <size>32</size>
43167          <access>read-write</access>
43168          <resetValue>0</resetValue>
43169          <resetMask>0xFFFFFFFF</resetMask>
43170          <fields>
43171            <field>
43172              <name>CNTMIN</name>
43173              <description>Minimum Loading Point Enable</description>
43174              <bitOffset>0</bitOffset>
43175              <bitWidth>1</bitWidth>
43176              <access>read-write</access>
43177              <enumeratedValues>
43178                <enumeratedValue>
43179                  <name>0</name>
43180                  <description>The minimum loading point is disabled.</description>
43181                  <value>#0</value>
43182                </enumeratedValue>
43183                <enumeratedValue>
43184                  <name>1</name>
43185                  <description>The minimum loading point is enabled.</description>
43186                  <value>#1</value>
43187                </enumeratedValue>
43188              </enumeratedValues>
43189            </field>
43190            <field>
43191              <name>CNTMAX</name>
43192              <description>Maximum Loading Point Enable</description>
43193              <bitOffset>1</bitOffset>
43194              <bitWidth>1</bitWidth>
43195              <access>read-write</access>
43196              <enumeratedValues>
43197                <enumeratedValue>
43198                  <name>0</name>
43199                  <description>The maximum loading point is disabled.</description>
43200                  <value>#0</value>
43201                </enumeratedValue>
43202                <enumeratedValue>
43203                  <name>1</name>
43204                  <description>The maximum loading point is enabled.</description>
43205                  <value>#1</value>
43206                </enumeratedValue>
43207              </enumeratedValues>
43208            </field>
43209            <field>
43210              <name>REINIT</name>
43211              <description>FTM Counter Reinitialization By Synchronization (FTM counter synchronization)</description>
43212              <bitOffset>2</bitOffset>
43213              <bitWidth>1</bitWidth>
43214              <access>read-write</access>
43215              <enumeratedValues>
43216                <enumeratedValue>
43217                  <name>0</name>
43218                  <description>FTM counter continues to count normally.</description>
43219                  <value>#0</value>
43220                </enumeratedValue>
43221                <enumeratedValue>
43222                  <name>1</name>
43223                  <description>FTM counter is updated with its initial value when the selected trigger is detected.</description>
43224                  <value>#1</value>
43225                </enumeratedValue>
43226              </enumeratedValues>
43227            </field>
43228            <field>
43229              <name>SYNCHOM</name>
43230              <description>Output Mask Synchronization</description>
43231              <bitOffset>3</bitOffset>
43232              <bitWidth>1</bitWidth>
43233              <access>read-write</access>
43234              <enumeratedValues>
43235                <enumeratedValue>
43236                  <name>0</name>
43237                  <description>OUTMASK register is updated with the value of its buffer in all rising edges of the system clock.</description>
43238                  <value>#0</value>
43239                </enumeratedValue>
43240                <enumeratedValue>
43241                  <name>1</name>
43242                  <description>OUTMASK register is updated with the value of its buffer only by the PWM synchronization.</description>
43243                  <value>#1</value>
43244                </enumeratedValue>
43245              </enumeratedValues>
43246            </field>
43247            <field>
43248              <name>TRIG0</name>
43249              <description>PWM Synchronization Hardware Trigger 0</description>
43250              <bitOffset>4</bitOffset>
43251              <bitWidth>1</bitWidth>
43252              <access>read-write</access>
43253              <enumeratedValues>
43254                <enumeratedValue>
43255                  <name>0</name>
43256                  <description>Trigger is disabled.</description>
43257                  <value>#0</value>
43258                </enumeratedValue>
43259                <enumeratedValue>
43260                  <name>1</name>
43261                  <description>Trigger is enabled.</description>
43262                  <value>#1</value>
43263                </enumeratedValue>
43264              </enumeratedValues>
43265            </field>
43266            <field>
43267              <name>TRIG1</name>
43268              <description>PWM Synchronization Hardware Trigger 1</description>
43269              <bitOffset>5</bitOffset>
43270              <bitWidth>1</bitWidth>
43271              <access>read-write</access>
43272              <enumeratedValues>
43273                <enumeratedValue>
43274                  <name>0</name>
43275                  <description>Trigger is disabled.</description>
43276                  <value>#0</value>
43277                </enumeratedValue>
43278                <enumeratedValue>
43279                  <name>1</name>
43280                  <description>Trigger is enabled.</description>
43281                  <value>#1</value>
43282                </enumeratedValue>
43283              </enumeratedValues>
43284            </field>
43285            <field>
43286              <name>TRIG2</name>
43287              <description>PWM Synchronization Hardware Trigger 2</description>
43288              <bitOffset>6</bitOffset>
43289              <bitWidth>1</bitWidth>
43290              <access>read-write</access>
43291              <enumeratedValues>
43292                <enumeratedValue>
43293                  <name>0</name>
43294                  <description>Trigger is disabled.</description>
43295                  <value>#0</value>
43296                </enumeratedValue>
43297                <enumeratedValue>
43298                  <name>1</name>
43299                  <description>Trigger is enabled.</description>
43300                  <value>#1</value>
43301                </enumeratedValue>
43302              </enumeratedValues>
43303            </field>
43304            <field>
43305              <name>SWSYNC</name>
43306              <description>PWM Synchronization Software Trigger</description>
43307              <bitOffset>7</bitOffset>
43308              <bitWidth>1</bitWidth>
43309              <access>read-write</access>
43310              <enumeratedValues>
43311                <enumeratedValue>
43312                  <name>0</name>
43313                  <description>Software trigger is not selected.</description>
43314                  <value>#0</value>
43315                </enumeratedValue>
43316                <enumeratedValue>
43317                  <name>1</name>
43318                  <description>Software trigger is selected.</description>
43319                  <value>#1</value>
43320                </enumeratedValue>
43321              </enumeratedValues>
43322            </field>
43323          </fields>
43324        </register>
43325        <register>
43326          <name>OUTINIT</name>
43327          <description>Initial State For Channels Output</description>
43328          <addressOffset>0x5C</addressOffset>
43329          <size>32</size>
43330          <access>read-write</access>
43331          <resetValue>0</resetValue>
43332          <resetMask>0xFFFFFFFF</resetMask>
43333          <fields>
43334            <field>
43335              <name>CH0OI</name>
43336              <description>Channel 0 Output Initialization Value</description>
43337              <bitOffset>0</bitOffset>
43338              <bitWidth>1</bitWidth>
43339              <access>read-write</access>
43340              <enumeratedValues>
43341                <enumeratedValue>
43342                  <name>0</name>
43343                  <description>The initialization value is 0.</description>
43344                  <value>#0</value>
43345                </enumeratedValue>
43346                <enumeratedValue>
43347                  <name>1</name>
43348                  <description>The initialization value is 1.</description>
43349                  <value>#1</value>
43350                </enumeratedValue>
43351              </enumeratedValues>
43352            </field>
43353            <field>
43354              <name>CH1OI</name>
43355              <description>Channel 1 Output Initialization Value</description>
43356              <bitOffset>1</bitOffset>
43357              <bitWidth>1</bitWidth>
43358              <access>read-write</access>
43359              <enumeratedValues>
43360                <enumeratedValue>
43361                  <name>0</name>
43362                  <description>The initialization value is 0.</description>
43363                  <value>#0</value>
43364                </enumeratedValue>
43365                <enumeratedValue>
43366                  <name>1</name>
43367                  <description>The initialization value is 1.</description>
43368                  <value>#1</value>
43369                </enumeratedValue>
43370              </enumeratedValues>
43371            </field>
43372            <field>
43373              <name>CH2OI</name>
43374              <description>Channel 2 Output Initialization Value</description>
43375              <bitOffset>2</bitOffset>
43376              <bitWidth>1</bitWidth>
43377              <access>read-write</access>
43378              <enumeratedValues>
43379                <enumeratedValue>
43380                  <name>0</name>
43381                  <description>The initialization value is 0.</description>
43382                  <value>#0</value>
43383                </enumeratedValue>
43384                <enumeratedValue>
43385                  <name>1</name>
43386                  <description>The initialization value is 1.</description>
43387                  <value>#1</value>
43388                </enumeratedValue>
43389              </enumeratedValues>
43390            </field>
43391            <field>
43392              <name>CH3OI</name>
43393              <description>Channel 3 Output Initialization Value</description>
43394              <bitOffset>3</bitOffset>
43395              <bitWidth>1</bitWidth>
43396              <access>read-write</access>
43397              <enumeratedValues>
43398                <enumeratedValue>
43399                  <name>0</name>
43400                  <description>The initialization value is 0.</description>
43401                  <value>#0</value>
43402                </enumeratedValue>
43403                <enumeratedValue>
43404                  <name>1</name>
43405                  <description>The initialization value is 1.</description>
43406                  <value>#1</value>
43407                </enumeratedValue>
43408              </enumeratedValues>
43409            </field>
43410            <field>
43411              <name>CH4OI</name>
43412              <description>Channel 4 Output Initialization Value</description>
43413              <bitOffset>4</bitOffset>
43414              <bitWidth>1</bitWidth>
43415              <access>read-write</access>
43416              <enumeratedValues>
43417                <enumeratedValue>
43418                  <name>0</name>
43419                  <description>The initialization value is 0.</description>
43420                  <value>#0</value>
43421                </enumeratedValue>
43422                <enumeratedValue>
43423                  <name>1</name>
43424                  <description>The initialization value is 1.</description>
43425                  <value>#1</value>
43426                </enumeratedValue>
43427              </enumeratedValues>
43428            </field>
43429            <field>
43430              <name>CH5OI</name>
43431              <description>Channel 5 Output Initialization Value</description>
43432              <bitOffset>5</bitOffset>
43433              <bitWidth>1</bitWidth>
43434              <access>read-write</access>
43435              <enumeratedValues>
43436                <enumeratedValue>
43437                  <name>0</name>
43438                  <description>The initialization value is 0.</description>
43439                  <value>#0</value>
43440                </enumeratedValue>
43441                <enumeratedValue>
43442                  <name>1</name>
43443                  <description>The initialization value is 1.</description>
43444                  <value>#1</value>
43445                </enumeratedValue>
43446              </enumeratedValues>
43447            </field>
43448            <field>
43449              <name>CH6OI</name>
43450              <description>Channel 6 Output Initialization Value</description>
43451              <bitOffset>6</bitOffset>
43452              <bitWidth>1</bitWidth>
43453              <access>read-write</access>
43454              <enumeratedValues>
43455                <enumeratedValue>
43456                  <name>0</name>
43457                  <description>The initialization value is 0.</description>
43458                  <value>#0</value>
43459                </enumeratedValue>
43460                <enumeratedValue>
43461                  <name>1</name>
43462                  <description>The initialization value is 1.</description>
43463                  <value>#1</value>
43464                </enumeratedValue>
43465              </enumeratedValues>
43466            </field>
43467            <field>
43468              <name>CH7OI</name>
43469              <description>Channel 7 Output Initialization Value</description>
43470              <bitOffset>7</bitOffset>
43471              <bitWidth>1</bitWidth>
43472              <access>read-write</access>
43473              <enumeratedValues>
43474                <enumeratedValue>
43475                  <name>0</name>
43476                  <description>The initialization value is 0.</description>
43477                  <value>#0</value>
43478                </enumeratedValue>
43479                <enumeratedValue>
43480                  <name>1</name>
43481                  <description>The initialization value is 1.</description>
43482                  <value>#1</value>
43483                </enumeratedValue>
43484              </enumeratedValues>
43485            </field>
43486          </fields>
43487        </register>
43488        <register>
43489          <name>OUTMASK</name>
43490          <description>Output Mask</description>
43491          <addressOffset>0x60</addressOffset>
43492          <size>32</size>
43493          <access>read-write</access>
43494          <resetValue>0</resetValue>
43495          <resetMask>0xFFFFFFFF</resetMask>
43496          <fields>
43497            <field>
43498              <name>CH0OM</name>
43499              <description>Channel 0 Output Mask</description>
43500              <bitOffset>0</bitOffset>
43501              <bitWidth>1</bitWidth>
43502              <access>read-write</access>
43503              <enumeratedValues>
43504                <enumeratedValue>
43505                  <name>0</name>
43506                  <description>Channel output is not masked. It continues to operate normally.</description>
43507                  <value>#0</value>
43508                </enumeratedValue>
43509                <enumeratedValue>
43510                  <name>1</name>
43511                  <description>Channel output is masked. It is forced to its inactive state.</description>
43512                  <value>#1</value>
43513                </enumeratedValue>
43514              </enumeratedValues>
43515            </field>
43516            <field>
43517              <name>CH1OM</name>
43518              <description>Channel 1 Output Mask</description>
43519              <bitOffset>1</bitOffset>
43520              <bitWidth>1</bitWidth>
43521              <access>read-write</access>
43522              <enumeratedValues>
43523                <enumeratedValue>
43524                  <name>0</name>
43525                  <description>Channel output is not masked. It continues to operate normally.</description>
43526                  <value>#0</value>
43527                </enumeratedValue>
43528                <enumeratedValue>
43529                  <name>1</name>
43530                  <description>Channel output is masked. It is forced to its inactive state.</description>
43531                  <value>#1</value>
43532                </enumeratedValue>
43533              </enumeratedValues>
43534            </field>
43535            <field>
43536              <name>CH2OM</name>
43537              <description>Channel 2 Output Mask</description>
43538              <bitOffset>2</bitOffset>
43539              <bitWidth>1</bitWidth>
43540              <access>read-write</access>
43541              <enumeratedValues>
43542                <enumeratedValue>
43543                  <name>0</name>
43544                  <description>Channel output is not masked. It continues to operate normally.</description>
43545                  <value>#0</value>
43546                </enumeratedValue>
43547                <enumeratedValue>
43548                  <name>1</name>
43549                  <description>Channel output is masked. It is forced to its inactive state.</description>
43550                  <value>#1</value>
43551                </enumeratedValue>
43552              </enumeratedValues>
43553            </field>
43554            <field>
43555              <name>CH3OM</name>
43556              <description>Channel 3 Output Mask</description>
43557              <bitOffset>3</bitOffset>
43558              <bitWidth>1</bitWidth>
43559              <access>read-write</access>
43560              <enumeratedValues>
43561                <enumeratedValue>
43562                  <name>0</name>
43563                  <description>Channel output is not masked. It continues to operate normally.</description>
43564                  <value>#0</value>
43565                </enumeratedValue>
43566                <enumeratedValue>
43567                  <name>1</name>
43568                  <description>Channel output is masked. It is forced to its inactive state.</description>
43569                  <value>#1</value>
43570                </enumeratedValue>
43571              </enumeratedValues>
43572            </field>
43573            <field>
43574              <name>CH4OM</name>
43575              <description>Channel 4 Output Mask</description>
43576              <bitOffset>4</bitOffset>
43577              <bitWidth>1</bitWidth>
43578              <access>read-write</access>
43579              <enumeratedValues>
43580                <enumeratedValue>
43581                  <name>0</name>
43582                  <description>Channel output is not masked. It continues to operate normally.</description>
43583                  <value>#0</value>
43584                </enumeratedValue>
43585                <enumeratedValue>
43586                  <name>1</name>
43587                  <description>Channel output is masked. It is forced to its inactive state.</description>
43588                  <value>#1</value>
43589                </enumeratedValue>
43590              </enumeratedValues>
43591            </field>
43592            <field>
43593              <name>CH5OM</name>
43594              <description>Channel 5 Output Mask</description>
43595              <bitOffset>5</bitOffset>
43596              <bitWidth>1</bitWidth>
43597              <access>read-write</access>
43598              <enumeratedValues>
43599                <enumeratedValue>
43600                  <name>0</name>
43601                  <description>Channel output is not masked. It continues to operate normally.</description>
43602                  <value>#0</value>
43603                </enumeratedValue>
43604                <enumeratedValue>
43605                  <name>1</name>
43606                  <description>Channel output is masked. It is forced to its inactive state.</description>
43607                  <value>#1</value>
43608                </enumeratedValue>
43609              </enumeratedValues>
43610            </field>
43611            <field>
43612              <name>CH6OM</name>
43613              <description>Channel 6 Output Mask</description>
43614              <bitOffset>6</bitOffset>
43615              <bitWidth>1</bitWidth>
43616              <access>read-write</access>
43617              <enumeratedValues>
43618                <enumeratedValue>
43619                  <name>0</name>
43620                  <description>Channel output is not masked. It continues to operate normally.</description>
43621                  <value>#0</value>
43622                </enumeratedValue>
43623                <enumeratedValue>
43624                  <name>1</name>
43625                  <description>Channel output is masked. It is forced to its inactive state.</description>
43626                  <value>#1</value>
43627                </enumeratedValue>
43628              </enumeratedValues>
43629            </field>
43630            <field>
43631              <name>CH7OM</name>
43632              <description>Channel 7 Output Mask</description>
43633              <bitOffset>7</bitOffset>
43634              <bitWidth>1</bitWidth>
43635              <access>read-write</access>
43636              <enumeratedValues>
43637                <enumeratedValue>
43638                  <name>0</name>
43639                  <description>Channel output is not masked. It continues to operate normally.</description>
43640                  <value>#0</value>
43641                </enumeratedValue>
43642                <enumeratedValue>
43643                  <name>1</name>
43644                  <description>Channel output is masked. It is forced to its inactive state.</description>
43645                  <value>#1</value>
43646                </enumeratedValue>
43647              </enumeratedValues>
43648            </field>
43649          </fields>
43650        </register>
43651        <register>
43652          <name>COMBINE</name>
43653          <description>Function For Linked Channels</description>
43654          <addressOffset>0x64</addressOffset>
43655          <size>32</size>
43656          <access>read-write</access>
43657          <resetValue>0</resetValue>
43658          <resetMask>0xFFFFFFFF</resetMask>
43659          <fields>
43660            <field>
43661              <name>COMBINE0</name>
43662              <description>Combine Channels For n = 0</description>
43663              <bitOffset>0</bitOffset>
43664              <bitWidth>1</bitWidth>
43665              <access>read-write</access>
43666              <enumeratedValues>
43667                <enumeratedValue>
43668                  <name>0</name>
43669                  <description>Channels (n) and (n+1) are independent.</description>
43670                  <value>#0</value>
43671                </enumeratedValue>
43672                <enumeratedValue>
43673                  <name>1</name>
43674                  <description>Channels (n) and (n+1) are combined.</description>
43675                  <value>#1</value>
43676                </enumeratedValue>
43677              </enumeratedValues>
43678            </field>
43679            <field>
43680              <name>COMP0</name>
43681              <description>Complement Of Channel (n) For n = 0</description>
43682              <bitOffset>1</bitOffset>
43683              <bitWidth>1</bitWidth>
43684              <access>read-write</access>
43685              <enumeratedValues>
43686                <enumeratedValue>
43687                  <name>0</name>
43688                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
43689                  <value>#0</value>
43690                </enumeratedValue>
43691                <enumeratedValue>
43692                  <name>1</name>
43693                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
43694                  <value>#1</value>
43695                </enumeratedValue>
43696              </enumeratedValues>
43697            </field>
43698            <field>
43699              <name>DECAPEN0</name>
43700              <description>Dual Edge Capture Mode Enable For n = 0</description>
43701              <bitOffset>2</bitOffset>
43702              <bitWidth>1</bitWidth>
43703              <access>read-write</access>
43704              <enumeratedValues>
43705                <enumeratedValue>
43706                  <name>0</name>
43707                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
43708                  <value>#0</value>
43709                </enumeratedValue>
43710                <enumeratedValue>
43711                  <name>1</name>
43712                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
43713                  <value>#1</value>
43714                </enumeratedValue>
43715              </enumeratedValues>
43716            </field>
43717            <field>
43718              <name>DECAP0</name>
43719              <description>Dual Edge Capture Mode Captures For n = 0</description>
43720              <bitOffset>3</bitOffset>
43721              <bitWidth>1</bitWidth>
43722              <access>read-write</access>
43723              <enumeratedValues>
43724                <enumeratedValue>
43725                  <name>0</name>
43726                  <description>The dual edge captures are inactive.</description>
43727                  <value>#0</value>
43728                </enumeratedValue>
43729                <enumeratedValue>
43730                  <name>1</name>
43731                  <description>The dual edge captures are active.</description>
43732                  <value>#1</value>
43733                </enumeratedValue>
43734              </enumeratedValues>
43735            </field>
43736            <field>
43737              <name>DTEN0</name>
43738              <description>Deadtime Enable For n = 0</description>
43739              <bitOffset>4</bitOffset>
43740              <bitWidth>1</bitWidth>
43741              <access>read-write</access>
43742              <enumeratedValues>
43743                <enumeratedValue>
43744                  <name>0</name>
43745                  <description>The deadtime insertion in this pair of channels is disabled.</description>
43746                  <value>#0</value>
43747                </enumeratedValue>
43748                <enumeratedValue>
43749                  <name>1</name>
43750                  <description>The deadtime insertion in this pair of channels is enabled.</description>
43751                  <value>#1</value>
43752                </enumeratedValue>
43753              </enumeratedValues>
43754            </field>
43755            <field>
43756              <name>SYNCEN0</name>
43757              <description>Synchronization Enable For n = 0</description>
43758              <bitOffset>5</bitOffset>
43759              <bitWidth>1</bitWidth>
43760              <access>read-write</access>
43761              <enumeratedValues>
43762                <enumeratedValue>
43763                  <name>0</name>
43764                  <description>The PWM synchronization in this pair of channels is disabled.</description>
43765                  <value>#0</value>
43766                </enumeratedValue>
43767                <enumeratedValue>
43768                  <name>1</name>
43769                  <description>The PWM synchronization in this pair of channels is enabled.</description>
43770                  <value>#1</value>
43771                </enumeratedValue>
43772              </enumeratedValues>
43773            </field>
43774            <field>
43775              <name>FAULTEN0</name>
43776              <description>Fault Control Enable For n = 0</description>
43777              <bitOffset>6</bitOffset>
43778              <bitWidth>1</bitWidth>
43779              <access>read-write</access>
43780              <enumeratedValues>
43781                <enumeratedValue>
43782                  <name>0</name>
43783                  <description>The fault control in this pair of channels is disabled.</description>
43784                  <value>#0</value>
43785                </enumeratedValue>
43786                <enumeratedValue>
43787                  <name>1</name>
43788                  <description>The fault control in this pair of channels is enabled.</description>
43789                  <value>#1</value>
43790                </enumeratedValue>
43791              </enumeratedValues>
43792            </field>
43793            <field>
43794              <name>COMBINE1</name>
43795              <description>Combine Channels For n = 2</description>
43796              <bitOffset>8</bitOffset>
43797              <bitWidth>1</bitWidth>
43798              <access>read-write</access>
43799              <enumeratedValues>
43800                <enumeratedValue>
43801                  <name>0</name>
43802                  <description>Channels (n) and (n+1) are independent.</description>
43803                  <value>#0</value>
43804                </enumeratedValue>
43805                <enumeratedValue>
43806                  <name>1</name>
43807                  <description>Channels (n) and (n+1) are combined.</description>
43808                  <value>#1</value>
43809                </enumeratedValue>
43810              </enumeratedValues>
43811            </field>
43812            <field>
43813              <name>COMP1</name>
43814              <description>Complement Of Channel (n) For n = 2</description>
43815              <bitOffset>9</bitOffset>
43816              <bitWidth>1</bitWidth>
43817              <access>read-write</access>
43818              <enumeratedValues>
43819                <enumeratedValue>
43820                  <name>0</name>
43821                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
43822                  <value>#0</value>
43823                </enumeratedValue>
43824                <enumeratedValue>
43825                  <name>1</name>
43826                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
43827                  <value>#1</value>
43828                </enumeratedValue>
43829              </enumeratedValues>
43830            </field>
43831            <field>
43832              <name>DECAPEN1</name>
43833              <description>Dual Edge Capture Mode Enable For n = 2</description>
43834              <bitOffset>10</bitOffset>
43835              <bitWidth>1</bitWidth>
43836              <access>read-write</access>
43837              <enumeratedValues>
43838                <enumeratedValue>
43839                  <name>0</name>
43840                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
43841                  <value>#0</value>
43842                </enumeratedValue>
43843                <enumeratedValue>
43844                  <name>1</name>
43845                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
43846                  <value>#1</value>
43847                </enumeratedValue>
43848              </enumeratedValues>
43849            </field>
43850            <field>
43851              <name>DECAP1</name>
43852              <description>Dual Edge Capture Mode Captures For n = 2</description>
43853              <bitOffset>11</bitOffset>
43854              <bitWidth>1</bitWidth>
43855              <access>read-write</access>
43856              <enumeratedValues>
43857                <enumeratedValue>
43858                  <name>0</name>
43859                  <description>The dual edge captures are inactive.</description>
43860                  <value>#0</value>
43861                </enumeratedValue>
43862                <enumeratedValue>
43863                  <name>1</name>
43864                  <description>The dual edge captures are active.</description>
43865                  <value>#1</value>
43866                </enumeratedValue>
43867              </enumeratedValues>
43868            </field>
43869            <field>
43870              <name>DTEN1</name>
43871              <description>Deadtime Enable For n = 2</description>
43872              <bitOffset>12</bitOffset>
43873              <bitWidth>1</bitWidth>
43874              <access>read-write</access>
43875              <enumeratedValues>
43876                <enumeratedValue>
43877                  <name>0</name>
43878                  <description>The deadtime insertion in this pair of channels is disabled.</description>
43879                  <value>#0</value>
43880                </enumeratedValue>
43881                <enumeratedValue>
43882                  <name>1</name>
43883                  <description>The deadtime insertion in this pair of channels is enabled.</description>
43884                  <value>#1</value>
43885                </enumeratedValue>
43886              </enumeratedValues>
43887            </field>
43888            <field>
43889              <name>SYNCEN1</name>
43890              <description>Synchronization Enable For n = 2</description>
43891              <bitOffset>13</bitOffset>
43892              <bitWidth>1</bitWidth>
43893              <access>read-write</access>
43894              <enumeratedValues>
43895                <enumeratedValue>
43896                  <name>0</name>
43897                  <description>The PWM synchronization in this pair of channels is disabled.</description>
43898                  <value>#0</value>
43899                </enumeratedValue>
43900                <enumeratedValue>
43901                  <name>1</name>
43902                  <description>The PWM synchronization in this pair of channels is enabled.</description>
43903                  <value>#1</value>
43904                </enumeratedValue>
43905              </enumeratedValues>
43906            </field>
43907            <field>
43908              <name>FAULTEN1</name>
43909              <description>Fault Control Enable For n = 2</description>
43910              <bitOffset>14</bitOffset>
43911              <bitWidth>1</bitWidth>
43912              <access>read-write</access>
43913              <enumeratedValues>
43914                <enumeratedValue>
43915                  <name>0</name>
43916                  <description>The fault control in this pair of channels is disabled.</description>
43917                  <value>#0</value>
43918                </enumeratedValue>
43919                <enumeratedValue>
43920                  <name>1</name>
43921                  <description>The fault control in this pair of channels is enabled.</description>
43922                  <value>#1</value>
43923                </enumeratedValue>
43924              </enumeratedValues>
43925            </field>
43926            <field>
43927              <name>COMBINE2</name>
43928              <description>Combine Channels For n = 4</description>
43929              <bitOffset>16</bitOffset>
43930              <bitWidth>1</bitWidth>
43931              <access>read-write</access>
43932              <enumeratedValues>
43933                <enumeratedValue>
43934                  <name>0</name>
43935                  <description>Channels (n) and (n+1) are independent.</description>
43936                  <value>#0</value>
43937                </enumeratedValue>
43938                <enumeratedValue>
43939                  <name>1</name>
43940                  <description>Channels (n) and (n+1) are combined.</description>
43941                  <value>#1</value>
43942                </enumeratedValue>
43943              </enumeratedValues>
43944            </field>
43945            <field>
43946              <name>COMP2</name>
43947              <description>Complement Of Channel (n) For n = 4</description>
43948              <bitOffset>17</bitOffset>
43949              <bitWidth>1</bitWidth>
43950              <access>read-write</access>
43951              <enumeratedValues>
43952                <enumeratedValue>
43953                  <name>0</name>
43954                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
43955                  <value>#0</value>
43956                </enumeratedValue>
43957                <enumeratedValue>
43958                  <name>1</name>
43959                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
43960                  <value>#1</value>
43961                </enumeratedValue>
43962              </enumeratedValues>
43963            </field>
43964            <field>
43965              <name>DECAPEN2</name>
43966              <description>Dual Edge Capture Mode Enable For n = 4</description>
43967              <bitOffset>18</bitOffset>
43968              <bitWidth>1</bitWidth>
43969              <access>read-write</access>
43970              <enumeratedValues>
43971                <enumeratedValue>
43972                  <name>0</name>
43973                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
43974                  <value>#0</value>
43975                </enumeratedValue>
43976                <enumeratedValue>
43977                  <name>1</name>
43978                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
43979                  <value>#1</value>
43980                </enumeratedValue>
43981              </enumeratedValues>
43982            </field>
43983            <field>
43984              <name>DECAP2</name>
43985              <description>Dual Edge Capture Mode Captures For n = 4</description>
43986              <bitOffset>19</bitOffset>
43987              <bitWidth>1</bitWidth>
43988              <access>read-write</access>
43989              <enumeratedValues>
43990                <enumeratedValue>
43991                  <name>0</name>
43992                  <description>The dual edge captures are inactive.</description>
43993                  <value>#0</value>
43994                </enumeratedValue>
43995                <enumeratedValue>
43996                  <name>1</name>
43997                  <description>The dual edge captures are active.</description>
43998                  <value>#1</value>
43999                </enumeratedValue>
44000              </enumeratedValues>
44001            </field>
44002            <field>
44003              <name>DTEN2</name>
44004              <description>Deadtime Enable For n = 4</description>
44005              <bitOffset>20</bitOffset>
44006              <bitWidth>1</bitWidth>
44007              <access>read-write</access>
44008              <enumeratedValues>
44009                <enumeratedValue>
44010                  <name>0</name>
44011                  <description>The deadtime insertion in this pair of channels is disabled.</description>
44012                  <value>#0</value>
44013                </enumeratedValue>
44014                <enumeratedValue>
44015                  <name>1</name>
44016                  <description>The deadtime insertion in this pair of channels is enabled.</description>
44017                  <value>#1</value>
44018                </enumeratedValue>
44019              </enumeratedValues>
44020            </field>
44021            <field>
44022              <name>SYNCEN2</name>
44023              <description>Synchronization Enable For n = 4</description>
44024              <bitOffset>21</bitOffset>
44025              <bitWidth>1</bitWidth>
44026              <access>read-write</access>
44027              <enumeratedValues>
44028                <enumeratedValue>
44029                  <name>0</name>
44030                  <description>The PWM synchronization in this pair of channels is disabled.</description>
44031                  <value>#0</value>
44032                </enumeratedValue>
44033                <enumeratedValue>
44034                  <name>1</name>
44035                  <description>The PWM synchronization in this pair of channels is enabled.</description>
44036                  <value>#1</value>
44037                </enumeratedValue>
44038              </enumeratedValues>
44039            </field>
44040            <field>
44041              <name>FAULTEN2</name>
44042              <description>Fault Control Enable For n = 4</description>
44043              <bitOffset>22</bitOffset>
44044              <bitWidth>1</bitWidth>
44045              <access>read-write</access>
44046              <enumeratedValues>
44047                <enumeratedValue>
44048                  <name>0</name>
44049                  <description>The fault control in this pair of channels is disabled.</description>
44050                  <value>#0</value>
44051                </enumeratedValue>
44052                <enumeratedValue>
44053                  <name>1</name>
44054                  <description>The fault control in this pair of channels is enabled.</description>
44055                  <value>#1</value>
44056                </enumeratedValue>
44057              </enumeratedValues>
44058            </field>
44059            <field>
44060              <name>COMBINE3</name>
44061              <description>Combine Channels For n = 6</description>
44062              <bitOffset>24</bitOffset>
44063              <bitWidth>1</bitWidth>
44064              <access>read-write</access>
44065              <enumeratedValues>
44066                <enumeratedValue>
44067                  <name>0</name>
44068                  <description>Channels (n) and (n+1) are independent.</description>
44069                  <value>#0</value>
44070                </enumeratedValue>
44071                <enumeratedValue>
44072                  <name>1</name>
44073                  <description>Channels (n) and (n+1) are combined.</description>
44074                  <value>#1</value>
44075                </enumeratedValue>
44076              </enumeratedValues>
44077            </field>
44078            <field>
44079              <name>COMP3</name>
44080              <description>Complement Of Channel (n) for n = 6</description>
44081              <bitOffset>25</bitOffset>
44082              <bitWidth>1</bitWidth>
44083              <access>read-write</access>
44084              <enumeratedValues>
44085                <enumeratedValue>
44086                  <name>0</name>
44087                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
44088                  <value>#0</value>
44089                </enumeratedValue>
44090                <enumeratedValue>
44091                  <name>1</name>
44092                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
44093                  <value>#1</value>
44094                </enumeratedValue>
44095              </enumeratedValues>
44096            </field>
44097            <field>
44098              <name>DECAPEN3</name>
44099              <description>Dual Edge Capture Mode Enable For n = 6</description>
44100              <bitOffset>26</bitOffset>
44101              <bitWidth>1</bitWidth>
44102              <access>read-write</access>
44103              <enumeratedValues>
44104                <enumeratedValue>
44105                  <name>0</name>
44106                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
44107                  <value>#0</value>
44108                </enumeratedValue>
44109                <enumeratedValue>
44110                  <name>1</name>
44111                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
44112                  <value>#1</value>
44113                </enumeratedValue>
44114              </enumeratedValues>
44115            </field>
44116            <field>
44117              <name>DECAP3</name>
44118              <description>Dual Edge Capture Mode Captures For n = 6</description>
44119              <bitOffset>27</bitOffset>
44120              <bitWidth>1</bitWidth>
44121              <access>read-write</access>
44122              <enumeratedValues>
44123                <enumeratedValue>
44124                  <name>0</name>
44125                  <description>The dual edge captures are inactive.</description>
44126                  <value>#0</value>
44127                </enumeratedValue>
44128                <enumeratedValue>
44129                  <name>1</name>
44130                  <description>The dual edge captures are active.</description>
44131                  <value>#1</value>
44132                </enumeratedValue>
44133              </enumeratedValues>
44134            </field>
44135            <field>
44136              <name>DTEN3</name>
44137              <description>Deadtime Enable For n = 6</description>
44138              <bitOffset>28</bitOffset>
44139              <bitWidth>1</bitWidth>
44140              <access>read-write</access>
44141              <enumeratedValues>
44142                <enumeratedValue>
44143                  <name>0</name>
44144                  <description>The deadtime insertion in this pair of channels is disabled.</description>
44145                  <value>#0</value>
44146                </enumeratedValue>
44147                <enumeratedValue>
44148                  <name>1</name>
44149                  <description>The deadtime insertion in this pair of channels is enabled.</description>
44150                  <value>#1</value>
44151                </enumeratedValue>
44152              </enumeratedValues>
44153            </field>
44154            <field>
44155              <name>SYNCEN3</name>
44156              <description>Synchronization Enable For n = 6</description>
44157              <bitOffset>29</bitOffset>
44158              <bitWidth>1</bitWidth>
44159              <access>read-write</access>
44160              <enumeratedValues>
44161                <enumeratedValue>
44162                  <name>0</name>
44163                  <description>The PWM synchronization in this pair of channels is disabled.</description>
44164                  <value>#0</value>
44165                </enumeratedValue>
44166                <enumeratedValue>
44167                  <name>1</name>
44168                  <description>The PWM synchronization in this pair of channels is enabled.</description>
44169                  <value>#1</value>
44170                </enumeratedValue>
44171              </enumeratedValues>
44172            </field>
44173            <field>
44174              <name>FAULTEN3</name>
44175              <description>Fault Control Enable For n = 6</description>
44176              <bitOffset>30</bitOffset>
44177              <bitWidth>1</bitWidth>
44178              <access>read-write</access>
44179              <enumeratedValues>
44180                <enumeratedValue>
44181                  <name>0</name>
44182                  <description>The fault control in this pair of channels is disabled.</description>
44183                  <value>#0</value>
44184                </enumeratedValue>
44185                <enumeratedValue>
44186                  <name>1</name>
44187                  <description>The fault control in this pair of channels is enabled.</description>
44188                  <value>#1</value>
44189                </enumeratedValue>
44190              </enumeratedValues>
44191            </field>
44192          </fields>
44193        </register>
44194        <register>
44195          <name>DEADTIME</name>
44196          <description>Deadtime Insertion Control</description>
44197          <addressOffset>0x68</addressOffset>
44198          <size>32</size>
44199          <access>read-write</access>
44200          <resetValue>0</resetValue>
44201          <resetMask>0xFFFFFFFF</resetMask>
44202          <fields>
44203            <field>
44204              <name>DTVAL</name>
44205              <description>Deadtime Value</description>
44206              <bitOffset>0</bitOffset>
44207              <bitWidth>6</bitWidth>
44208              <access>read-write</access>
44209            </field>
44210            <field>
44211              <name>DTPS</name>
44212              <description>Deadtime Prescaler Value</description>
44213              <bitOffset>6</bitOffset>
44214              <bitWidth>2</bitWidth>
44215              <access>read-write</access>
44216              <enumeratedValues>
44217                <enumeratedValue>
44218                  <name>10</name>
44219                  <description>Divide the system clock by 4.</description>
44220                  <value>#10</value>
44221                </enumeratedValue>
44222                <enumeratedValue>
44223                  <name>11</name>
44224                  <description>Divide the system clock by 16.</description>
44225                  <value>#11</value>
44226                </enumeratedValue>
44227              </enumeratedValues>
44228            </field>
44229          </fields>
44230        </register>
44231        <register>
44232          <name>EXTTRIG</name>
44233          <description>FTM External Trigger</description>
44234          <addressOffset>0x6C</addressOffset>
44235          <size>32</size>
44236          <access>read-write</access>
44237          <resetValue>0</resetValue>
44238          <resetMask>0xFFFFFFFF</resetMask>
44239          <fields>
44240            <field>
44241              <name>CH2TRIG</name>
44242              <description>Channel 2 Trigger Enable</description>
44243              <bitOffset>0</bitOffset>
44244              <bitWidth>1</bitWidth>
44245              <access>read-write</access>
44246              <enumeratedValues>
44247                <enumeratedValue>
44248                  <name>0</name>
44249                  <description>The generation of the channel trigger is disabled.</description>
44250                  <value>#0</value>
44251                </enumeratedValue>
44252                <enumeratedValue>
44253                  <name>1</name>
44254                  <description>The generation of the channel trigger is enabled.</description>
44255                  <value>#1</value>
44256                </enumeratedValue>
44257              </enumeratedValues>
44258            </field>
44259            <field>
44260              <name>CH3TRIG</name>
44261              <description>Channel 3 Trigger Enable</description>
44262              <bitOffset>1</bitOffset>
44263              <bitWidth>1</bitWidth>
44264              <access>read-write</access>
44265              <enumeratedValues>
44266                <enumeratedValue>
44267                  <name>0</name>
44268                  <description>The generation of the channel trigger is disabled.</description>
44269                  <value>#0</value>
44270                </enumeratedValue>
44271                <enumeratedValue>
44272                  <name>1</name>
44273                  <description>The generation of the channel trigger is enabled.</description>
44274                  <value>#1</value>
44275                </enumeratedValue>
44276              </enumeratedValues>
44277            </field>
44278            <field>
44279              <name>CH4TRIG</name>
44280              <description>Channel 4 Trigger Enable</description>
44281              <bitOffset>2</bitOffset>
44282              <bitWidth>1</bitWidth>
44283              <access>read-write</access>
44284              <enumeratedValues>
44285                <enumeratedValue>
44286                  <name>0</name>
44287                  <description>The generation of the channel trigger is disabled.</description>
44288                  <value>#0</value>
44289                </enumeratedValue>
44290                <enumeratedValue>
44291                  <name>1</name>
44292                  <description>The generation of the channel trigger is enabled.</description>
44293                  <value>#1</value>
44294                </enumeratedValue>
44295              </enumeratedValues>
44296            </field>
44297            <field>
44298              <name>CH5TRIG</name>
44299              <description>Channel 5 Trigger Enable</description>
44300              <bitOffset>3</bitOffset>
44301              <bitWidth>1</bitWidth>
44302              <access>read-write</access>
44303              <enumeratedValues>
44304                <enumeratedValue>
44305                  <name>0</name>
44306                  <description>The generation of the channel trigger is disabled.</description>
44307                  <value>#0</value>
44308                </enumeratedValue>
44309                <enumeratedValue>
44310                  <name>1</name>
44311                  <description>The generation of the channel trigger is enabled.</description>
44312                  <value>#1</value>
44313                </enumeratedValue>
44314              </enumeratedValues>
44315            </field>
44316            <field>
44317              <name>CH0TRIG</name>
44318              <description>Channel 0 Trigger Enable</description>
44319              <bitOffset>4</bitOffset>
44320              <bitWidth>1</bitWidth>
44321              <access>read-write</access>
44322              <enumeratedValues>
44323                <enumeratedValue>
44324                  <name>0</name>
44325                  <description>The generation of the channel trigger is disabled.</description>
44326                  <value>#0</value>
44327                </enumeratedValue>
44328                <enumeratedValue>
44329                  <name>1</name>
44330                  <description>The generation of the channel trigger is enabled.</description>
44331                  <value>#1</value>
44332                </enumeratedValue>
44333              </enumeratedValues>
44334            </field>
44335            <field>
44336              <name>CH1TRIG</name>
44337              <description>Channel 1 Trigger Enable</description>
44338              <bitOffset>5</bitOffset>
44339              <bitWidth>1</bitWidth>
44340              <access>read-write</access>
44341              <enumeratedValues>
44342                <enumeratedValue>
44343                  <name>0</name>
44344                  <description>The generation of the channel trigger is disabled.</description>
44345                  <value>#0</value>
44346                </enumeratedValue>
44347                <enumeratedValue>
44348                  <name>1</name>
44349                  <description>The generation of the channel trigger is enabled.</description>
44350                  <value>#1</value>
44351                </enumeratedValue>
44352              </enumeratedValues>
44353            </field>
44354            <field>
44355              <name>INITTRIGEN</name>
44356              <description>Initialization Trigger Enable</description>
44357              <bitOffset>6</bitOffset>
44358              <bitWidth>1</bitWidth>
44359              <access>read-write</access>
44360              <enumeratedValues>
44361                <enumeratedValue>
44362                  <name>0</name>
44363                  <description>The generation of initialization trigger is disabled.</description>
44364                  <value>#0</value>
44365                </enumeratedValue>
44366                <enumeratedValue>
44367                  <name>1</name>
44368                  <description>The generation of initialization trigger is enabled.</description>
44369                  <value>#1</value>
44370                </enumeratedValue>
44371              </enumeratedValues>
44372            </field>
44373            <field>
44374              <name>TRIGF</name>
44375              <description>Channel Trigger Flag</description>
44376              <bitOffset>7</bitOffset>
44377              <bitWidth>1</bitWidth>
44378              <access>read-write</access>
44379              <enumeratedValues>
44380                <enumeratedValue>
44381                  <name>0</name>
44382                  <description>No channel trigger was generated.</description>
44383                  <value>#0</value>
44384                </enumeratedValue>
44385                <enumeratedValue>
44386                  <name>1</name>
44387                  <description>A channel trigger was generated.</description>
44388                  <value>#1</value>
44389                </enumeratedValue>
44390              </enumeratedValues>
44391            </field>
44392          </fields>
44393        </register>
44394        <register>
44395          <name>POL</name>
44396          <description>Channels Polarity</description>
44397          <addressOffset>0x70</addressOffset>
44398          <size>32</size>
44399          <access>read-write</access>
44400          <resetValue>0</resetValue>
44401          <resetMask>0xFFFFFFFF</resetMask>
44402          <fields>
44403            <field>
44404              <name>POL0</name>
44405              <description>Channel 0 Polarity</description>
44406              <bitOffset>0</bitOffset>
44407              <bitWidth>1</bitWidth>
44408              <access>read-write</access>
44409              <enumeratedValues>
44410                <enumeratedValue>
44411                  <name>0</name>
44412                  <description>The channel polarity is active high.</description>
44413                  <value>#0</value>
44414                </enumeratedValue>
44415                <enumeratedValue>
44416                  <name>1</name>
44417                  <description>The channel polarity is active low.</description>
44418                  <value>#1</value>
44419                </enumeratedValue>
44420              </enumeratedValues>
44421            </field>
44422            <field>
44423              <name>POL1</name>
44424              <description>Channel 1 Polarity</description>
44425              <bitOffset>1</bitOffset>
44426              <bitWidth>1</bitWidth>
44427              <access>read-write</access>
44428              <enumeratedValues>
44429                <enumeratedValue>
44430                  <name>0</name>
44431                  <description>The channel polarity is active high.</description>
44432                  <value>#0</value>
44433                </enumeratedValue>
44434                <enumeratedValue>
44435                  <name>1</name>
44436                  <description>The channel polarity is active low.</description>
44437                  <value>#1</value>
44438                </enumeratedValue>
44439              </enumeratedValues>
44440            </field>
44441            <field>
44442              <name>POL2</name>
44443              <description>Channel 2 Polarity</description>
44444              <bitOffset>2</bitOffset>
44445              <bitWidth>1</bitWidth>
44446              <access>read-write</access>
44447              <enumeratedValues>
44448                <enumeratedValue>
44449                  <name>0</name>
44450                  <description>The channel polarity is active high.</description>
44451                  <value>#0</value>
44452                </enumeratedValue>
44453                <enumeratedValue>
44454                  <name>1</name>
44455                  <description>The channel polarity is active low.</description>
44456                  <value>#1</value>
44457                </enumeratedValue>
44458              </enumeratedValues>
44459            </field>
44460            <field>
44461              <name>POL3</name>
44462              <description>Channel 3 Polarity</description>
44463              <bitOffset>3</bitOffset>
44464              <bitWidth>1</bitWidth>
44465              <access>read-write</access>
44466              <enumeratedValues>
44467                <enumeratedValue>
44468                  <name>0</name>
44469                  <description>The channel polarity is active high.</description>
44470                  <value>#0</value>
44471                </enumeratedValue>
44472                <enumeratedValue>
44473                  <name>1</name>
44474                  <description>The channel polarity is active low.</description>
44475                  <value>#1</value>
44476                </enumeratedValue>
44477              </enumeratedValues>
44478            </field>
44479            <field>
44480              <name>POL4</name>
44481              <description>Channel 4 Polarity</description>
44482              <bitOffset>4</bitOffset>
44483              <bitWidth>1</bitWidth>
44484              <access>read-write</access>
44485              <enumeratedValues>
44486                <enumeratedValue>
44487                  <name>0</name>
44488                  <description>The channel polarity is active high.</description>
44489                  <value>#0</value>
44490                </enumeratedValue>
44491                <enumeratedValue>
44492                  <name>1</name>
44493                  <description>The channel polarity is active low.</description>
44494                  <value>#1</value>
44495                </enumeratedValue>
44496              </enumeratedValues>
44497            </field>
44498            <field>
44499              <name>POL5</name>
44500              <description>Channel 5 Polarity</description>
44501              <bitOffset>5</bitOffset>
44502              <bitWidth>1</bitWidth>
44503              <access>read-write</access>
44504              <enumeratedValues>
44505                <enumeratedValue>
44506                  <name>0</name>
44507                  <description>The channel polarity is active high.</description>
44508                  <value>#0</value>
44509                </enumeratedValue>
44510                <enumeratedValue>
44511                  <name>1</name>
44512                  <description>The channel polarity is active low.</description>
44513                  <value>#1</value>
44514                </enumeratedValue>
44515              </enumeratedValues>
44516            </field>
44517            <field>
44518              <name>POL6</name>
44519              <description>Channel 6 Polarity</description>
44520              <bitOffset>6</bitOffset>
44521              <bitWidth>1</bitWidth>
44522              <access>read-write</access>
44523              <enumeratedValues>
44524                <enumeratedValue>
44525                  <name>0</name>
44526                  <description>The channel polarity is active high.</description>
44527                  <value>#0</value>
44528                </enumeratedValue>
44529                <enumeratedValue>
44530                  <name>1</name>
44531                  <description>The channel polarity is active low.</description>
44532                  <value>#1</value>
44533                </enumeratedValue>
44534              </enumeratedValues>
44535            </field>
44536            <field>
44537              <name>POL7</name>
44538              <description>Channel 7 Polarity</description>
44539              <bitOffset>7</bitOffset>
44540              <bitWidth>1</bitWidth>
44541              <access>read-write</access>
44542              <enumeratedValues>
44543                <enumeratedValue>
44544                  <name>0</name>
44545                  <description>The channel polarity is active high.</description>
44546                  <value>#0</value>
44547                </enumeratedValue>
44548                <enumeratedValue>
44549                  <name>1</name>
44550                  <description>The channel polarity is active low.</description>
44551                  <value>#1</value>
44552                </enumeratedValue>
44553              </enumeratedValues>
44554            </field>
44555          </fields>
44556        </register>
44557        <register>
44558          <name>FMS</name>
44559          <description>Fault Mode Status</description>
44560          <addressOffset>0x74</addressOffset>
44561          <size>32</size>
44562          <access>read-write</access>
44563          <resetValue>0</resetValue>
44564          <resetMask>0xFFFFFFFF</resetMask>
44565          <fields>
44566            <field>
44567              <name>FAULTF0</name>
44568              <description>Fault Detection Flag 0</description>
44569              <bitOffset>0</bitOffset>
44570              <bitWidth>1</bitWidth>
44571              <access>read-write</access>
44572              <enumeratedValues>
44573                <enumeratedValue>
44574                  <name>0</name>
44575                  <description>No fault condition was detected at the fault input.</description>
44576                  <value>#0</value>
44577                </enumeratedValue>
44578                <enumeratedValue>
44579                  <name>1</name>
44580                  <description>A fault condition was detected at the fault input.</description>
44581                  <value>#1</value>
44582                </enumeratedValue>
44583              </enumeratedValues>
44584            </field>
44585            <field>
44586              <name>FAULTF1</name>
44587              <description>Fault Detection Flag 1</description>
44588              <bitOffset>1</bitOffset>
44589              <bitWidth>1</bitWidth>
44590              <access>read-write</access>
44591              <enumeratedValues>
44592                <enumeratedValue>
44593                  <name>0</name>
44594                  <description>No fault condition was detected at the fault input.</description>
44595                  <value>#0</value>
44596                </enumeratedValue>
44597                <enumeratedValue>
44598                  <name>1</name>
44599                  <description>A fault condition was detected at the fault input.</description>
44600                  <value>#1</value>
44601                </enumeratedValue>
44602              </enumeratedValues>
44603            </field>
44604            <field>
44605              <name>FAULTF2</name>
44606              <description>Fault Detection Flag 2</description>
44607              <bitOffset>2</bitOffset>
44608              <bitWidth>1</bitWidth>
44609              <access>read-write</access>
44610              <enumeratedValues>
44611                <enumeratedValue>
44612                  <name>0</name>
44613                  <description>No fault condition was detected at the fault input.</description>
44614                  <value>#0</value>
44615                </enumeratedValue>
44616                <enumeratedValue>
44617                  <name>1</name>
44618                  <description>A fault condition was detected at the fault input.</description>
44619                  <value>#1</value>
44620                </enumeratedValue>
44621              </enumeratedValues>
44622            </field>
44623            <field>
44624              <name>FAULTF3</name>
44625              <description>Fault Detection Flag 3</description>
44626              <bitOffset>3</bitOffset>
44627              <bitWidth>1</bitWidth>
44628              <access>read-write</access>
44629              <enumeratedValues>
44630                <enumeratedValue>
44631                  <name>0</name>
44632                  <description>No fault condition was detected at the fault input.</description>
44633                  <value>#0</value>
44634                </enumeratedValue>
44635                <enumeratedValue>
44636                  <name>1</name>
44637                  <description>A fault condition was detected at the fault input.</description>
44638                  <value>#1</value>
44639                </enumeratedValue>
44640              </enumeratedValues>
44641            </field>
44642            <field>
44643              <name>FAULTIN</name>
44644              <description>Fault Inputs</description>
44645              <bitOffset>5</bitOffset>
44646              <bitWidth>1</bitWidth>
44647              <access>read-only</access>
44648              <enumeratedValues>
44649                <enumeratedValue>
44650                  <name>0</name>
44651                  <description>The logic OR of the enabled fault inputs is 0.</description>
44652                  <value>#0</value>
44653                </enumeratedValue>
44654                <enumeratedValue>
44655                  <name>1</name>
44656                  <description>The logic OR of the enabled fault inputs is 1.</description>
44657                  <value>#1</value>
44658                </enumeratedValue>
44659              </enumeratedValues>
44660            </field>
44661            <field>
44662              <name>WPEN</name>
44663              <description>Write Protection Enable</description>
44664              <bitOffset>6</bitOffset>
44665              <bitWidth>1</bitWidth>
44666              <access>read-write</access>
44667              <enumeratedValues>
44668                <enumeratedValue>
44669                  <name>0</name>
44670                  <description>Write protection is disabled. Write protected bits can be written.</description>
44671                  <value>#0</value>
44672                </enumeratedValue>
44673                <enumeratedValue>
44674                  <name>1</name>
44675                  <description>Write protection is enabled. Write protected bits cannot be written.</description>
44676                  <value>#1</value>
44677                </enumeratedValue>
44678              </enumeratedValues>
44679            </field>
44680            <field>
44681              <name>FAULTF</name>
44682              <description>Fault Detection Flag</description>
44683              <bitOffset>7</bitOffset>
44684              <bitWidth>1</bitWidth>
44685              <access>read-write</access>
44686              <enumeratedValues>
44687                <enumeratedValue>
44688                  <name>0</name>
44689                  <description>No fault condition was detected.</description>
44690                  <value>#0</value>
44691                </enumeratedValue>
44692                <enumeratedValue>
44693                  <name>1</name>
44694                  <description>A fault condition was detected.</description>
44695                  <value>#1</value>
44696                </enumeratedValue>
44697              </enumeratedValues>
44698            </field>
44699          </fields>
44700        </register>
44701        <register>
44702          <name>FILTER</name>
44703          <description>Input Capture Filter Control</description>
44704          <addressOffset>0x78</addressOffset>
44705          <size>32</size>
44706          <access>read-write</access>
44707          <resetValue>0</resetValue>
44708          <resetMask>0xFFFFFFFF</resetMask>
44709          <fields>
44710            <field>
44711              <name>CH0FVAL</name>
44712              <description>Channel 0 Input Filter</description>
44713              <bitOffset>0</bitOffset>
44714              <bitWidth>4</bitWidth>
44715              <access>read-write</access>
44716            </field>
44717            <field>
44718              <name>CH1FVAL</name>
44719              <description>Channel 1 Input Filter</description>
44720              <bitOffset>4</bitOffset>
44721              <bitWidth>4</bitWidth>
44722              <access>read-write</access>
44723            </field>
44724            <field>
44725              <name>CH2FVAL</name>
44726              <description>Channel 2 Input Filter</description>
44727              <bitOffset>8</bitOffset>
44728              <bitWidth>4</bitWidth>
44729              <access>read-write</access>
44730            </field>
44731            <field>
44732              <name>CH3FVAL</name>
44733              <description>Channel 3 Input Filter</description>
44734              <bitOffset>12</bitOffset>
44735              <bitWidth>4</bitWidth>
44736              <access>read-write</access>
44737            </field>
44738          </fields>
44739        </register>
44740        <register>
44741          <name>FLTCTRL</name>
44742          <description>Fault Control</description>
44743          <addressOffset>0x7C</addressOffset>
44744          <size>32</size>
44745          <access>read-write</access>
44746          <resetValue>0</resetValue>
44747          <resetMask>0xFFFFFFFF</resetMask>
44748          <fields>
44749            <field>
44750              <name>FAULT0EN</name>
44751              <description>Fault Input 0 Enable</description>
44752              <bitOffset>0</bitOffset>
44753              <bitWidth>1</bitWidth>
44754              <access>read-write</access>
44755              <enumeratedValues>
44756                <enumeratedValue>
44757                  <name>0</name>
44758                  <description>Fault input is disabled.</description>
44759                  <value>#0</value>
44760                </enumeratedValue>
44761                <enumeratedValue>
44762                  <name>1</name>
44763                  <description>Fault input is enabled.</description>
44764                  <value>#1</value>
44765                </enumeratedValue>
44766              </enumeratedValues>
44767            </field>
44768            <field>
44769              <name>FAULT1EN</name>
44770              <description>Fault Input 1 Enable</description>
44771              <bitOffset>1</bitOffset>
44772              <bitWidth>1</bitWidth>
44773              <access>read-write</access>
44774              <enumeratedValues>
44775                <enumeratedValue>
44776                  <name>0</name>
44777                  <description>Fault input is disabled.</description>
44778                  <value>#0</value>
44779                </enumeratedValue>
44780                <enumeratedValue>
44781                  <name>1</name>
44782                  <description>Fault input is enabled.</description>
44783                  <value>#1</value>
44784                </enumeratedValue>
44785              </enumeratedValues>
44786            </field>
44787            <field>
44788              <name>FAULT2EN</name>
44789              <description>Fault Input 2 Enable</description>
44790              <bitOffset>2</bitOffset>
44791              <bitWidth>1</bitWidth>
44792              <access>read-write</access>
44793              <enumeratedValues>
44794                <enumeratedValue>
44795                  <name>0</name>
44796                  <description>Fault input is disabled.</description>
44797                  <value>#0</value>
44798                </enumeratedValue>
44799                <enumeratedValue>
44800                  <name>1</name>
44801                  <description>Fault input is enabled.</description>
44802                  <value>#1</value>
44803                </enumeratedValue>
44804              </enumeratedValues>
44805            </field>
44806            <field>
44807              <name>FAULT3EN</name>
44808              <description>Fault Input 3 Enable</description>
44809              <bitOffset>3</bitOffset>
44810              <bitWidth>1</bitWidth>
44811              <access>read-write</access>
44812              <enumeratedValues>
44813                <enumeratedValue>
44814                  <name>0</name>
44815                  <description>Fault input is disabled.</description>
44816                  <value>#0</value>
44817                </enumeratedValue>
44818                <enumeratedValue>
44819                  <name>1</name>
44820                  <description>Fault input is enabled.</description>
44821                  <value>#1</value>
44822                </enumeratedValue>
44823              </enumeratedValues>
44824            </field>
44825            <field>
44826              <name>FFLTR0EN</name>
44827              <description>Fault Input 0 Filter Enable</description>
44828              <bitOffset>4</bitOffset>
44829              <bitWidth>1</bitWidth>
44830              <access>read-write</access>
44831              <enumeratedValues>
44832                <enumeratedValue>
44833                  <name>0</name>
44834                  <description>Fault input filter is disabled.</description>
44835                  <value>#0</value>
44836                </enumeratedValue>
44837                <enumeratedValue>
44838                  <name>1</name>
44839                  <description>Fault input filter is enabled.</description>
44840                  <value>#1</value>
44841                </enumeratedValue>
44842              </enumeratedValues>
44843            </field>
44844            <field>
44845              <name>FFLTR1EN</name>
44846              <description>Fault Input 1 Filter Enable</description>
44847              <bitOffset>5</bitOffset>
44848              <bitWidth>1</bitWidth>
44849              <access>read-write</access>
44850              <enumeratedValues>
44851                <enumeratedValue>
44852                  <name>0</name>
44853                  <description>Fault input filter is disabled.</description>
44854                  <value>#0</value>
44855                </enumeratedValue>
44856                <enumeratedValue>
44857                  <name>1</name>
44858                  <description>Fault input filter is enabled.</description>
44859                  <value>#1</value>
44860                </enumeratedValue>
44861              </enumeratedValues>
44862            </field>
44863            <field>
44864              <name>FFLTR2EN</name>
44865              <description>Fault Input 2 Filter Enable</description>
44866              <bitOffset>6</bitOffset>
44867              <bitWidth>1</bitWidth>
44868              <access>read-write</access>
44869              <enumeratedValues>
44870                <enumeratedValue>
44871                  <name>0</name>
44872                  <description>Fault input filter is disabled.</description>
44873                  <value>#0</value>
44874                </enumeratedValue>
44875                <enumeratedValue>
44876                  <name>1</name>
44877                  <description>Fault input filter is enabled.</description>
44878                  <value>#1</value>
44879                </enumeratedValue>
44880              </enumeratedValues>
44881            </field>
44882            <field>
44883              <name>FFLTR3EN</name>
44884              <description>Fault Input 3 Filter Enable</description>
44885              <bitOffset>7</bitOffset>
44886              <bitWidth>1</bitWidth>
44887              <access>read-write</access>
44888              <enumeratedValues>
44889                <enumeratedValue>
44890                  <name>0</name>
44891                  <description>Fault input filter is disabled.</description>
44892                  <value>#0</value>
44893                </enumeratedValue>
44894                <enumeratedValue>
44895                  <name>1</name>
44896                  <description>Fault input filter is enabled.</description>
44897                  <value>#1</value>
44898                </enumeratedValue>
44899              </enumeratedValues>
44900            </field>
44901            <field>
44902              <name>FFVAL</name>
44903              <description>Fault Input Filter</description>
44904              <bitOffset>8</bitOffset>
44905              <bitWidth>4</bitWidth>
44906              <access>read-write</access>
44907            </field>
44908          </fields>
44909        </register>
44910        <register>
44911          <name>QDCTRL</name>
44912          <description>Quadrature Decoder Control And Status</description>
44913          <addressOffset>0x80</addressOffset>
44914          <size>32</size>
44915          <access>read-write</access>
44916          <resetValue>0</resetValue>
44917          <resetMask>0xFFFFFFFF</resetMask>
44918          <fields>
44919            <field>
44920              <name>QUADEN</name>
44921              <description>Quadrature Decoder Mode Enable</description>
44922              <bitOffset>0</bitOffset>
44923              <bitWidth>1</bitWidth>
44924              <access>read-write</access>
44925              <enumeratedValues>
44926                <enumeratedValue>
44927                  <name>0</name>
44928                  <description>Quadrature Decoder mode is disabled.</description>
44929                  <value>#0</value>
44930                </enumeratedValue>
44931                <enumeratedValue>
44932                  <name>1</name>
44933                  <description>Quadrature Decoder mode is enabled.</description>
44934                  <value>#1</value>
44935                </enumeratedValue>
44936              </enumeratedValues>
44937            </field>
44938            <field>
44939              <name>TOFDIR</name>
44940              <description>Timer Overflow Direction In Quadrature Decoder Mode</description>
44941              <bitOffset>1</bitOffset>
44942              <bitWidth>1</bitWidth>
44943              <access>read-only</access>
44944              <enumeratedValues>
44945                <enumeratedValue>
44946                  <name>0</name>
44947                  <description>TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter changes from its minimum value (CNTIN register) to its maximum value (MOD register).</description>
44948                  <value>#0</value>
44949                </enumeratedValue>
44950                <enumeratedValue>
44951                  <name>1</name>
44952                  <description>TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter changes from its maximum value (MOD register) to its minimum value (CNTIN register).</description>
44953                  <value>#1</value>
44954                </enumeratedValue>
44955              </enumeratedValues>
44956            </field>
44957            <field>
44958              <name>QUADIR</name>
44959              <description>FTM Counter Direction In Quadrature Decoder Mode</description>
44960              <bitOffset>2</bitOffset>
44961              <bitWidth>1</bitWidth>
44962              <access>read-only</access>
44963              <enumeratedValues>
44964                <enumeratedValue>
44965                  <name>0</name>
44966                  <description>Counting direction is decreasing (FTM counter decrement).</description>
44967                  <value>#0</value>
44968                </enumeratedValue>
44969                <enumeratedValue>
44970                  <name>1</name>
44971                  <description>Counting direction is increasing (FTM counter increment).</description>
44972                  <value>#1</value>
44973                </enumeratedValue>
44974              </enumeratedValues>
44975            </field>
44976            <field>
44977              <name>QUADMODE</name>
44978              <description>Quadrature Decoder Mode</description>
44979              <bitOffset>3</bitOffset>
44980              <bitWidth>1</bitWidth>
44981              <access>read-write</access>
44982              <enumeratedValues>
44983                <enumeratedValue>
44984                  <name>0</name>
44985                  <description>Phase A and phase B encoding mode.</description>
44986                  <value>#0</value>
44987                </enumeratedValue>
44988                <enumeratedValue>
44989                  <name>1</name>
44990                  <description>Count and direction encoding mode.</description>
44991                  <value>#1</value>
44992                </enumeratedValue>
44993              </enumeratedValues>
44994            </field>
44995            <field>
44996              <name>PHBPOL</name>
44997              <description>Phase B Input Polarity</description>
44998              <bitOffset>4</bitOffset>
44999              <bitWidth>1</bitWidth>
45000              <access>read-write</access>
45001              <enumeratedValues>
45002                <enumeratedValue>
45003                  <name>0</name>
45004                  <description>Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal.</description>
45005                  <value>#0</value>
45006                </enumeratedValue>
45007                <enumeratedValue>
45008                  <name>1</name>
45009                  <description>Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal.</description>
45010                  <value>#1</value>
45011                </enumeratedValue>
45012              </enumeratedValues>
45013            </field>
45014            <field>
45015              <name>PHAPOL</name>
45016              <description>Phase A Input Polarity</description>
45017              <bitOffset>5</bitOffset>
45018              <bitWidth>1</bitWidth>
45019              <access>read-write</access>
45020              <enumeratedValues>
45021                <enumeratedValue>
45022                  <name>0</name>
45023                  <description>Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal.</description>
45024                  <value>#0</value>
45025                </enumeratedValue>
45026                <enumeratedValue>
45027                  <name>1</name>
45028                  <description>Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal.</description>
45029                  <value>#1</value>
45030                </enumeratedValue>
45031              </enumeratedValues>
45032            </field>
45033            <field>
45034              <name>PHBFLTREN</name>
45035              <description>Phase B Input Filter Enable</description>
45036              <bitOffset>6</bitOffset>
45037              <bitWidth>1</bitWidth>
45038              <access>read-write</access>
45039              <enumeratedValues>
45040                <enumeratedValue>
45041                  <name>0</name>
45042                  <description>Phase B input filter is disabled.</description>
45043                  <value>#0</value>
45044                </enumeratedValue>
45045                <enumeratedValue>
45046                  <name>1</name>
45047                  <description>Phase B input filter is enabled.</description>
45048                  <value>#1</value>
45049                </enumeratedValue>
45050              </enumeratedValues>
45051            </field>
45052            <field>
45053              <name>PHAFLTREN</name>
45054              <description>Phase A Input Filter Enable</description>
45055              <bitOffset>7</bitOffset>
45056              <bitWidth>1</bitWidth>
45057              <access>read-write</access>
45058              <enumeratedValues>
45059                <enumeratedValue>
45060                  <name>0</name>
45061                  <description>Phase A input filter is disabled.</description>
45062                  <value>#0</value>
45063                </enumeratedValue>
45064                <enumeratedValue>
45065                  <name>1</name>
45066                  <description>Phase A input filter is enabled.</description>
45067                  <value>#1</value>
45068                </enumeratedValue>
45069              </enumeratedValues>
45070            </field>
45071          </fields>
45072        </register>
45073        <register>
45074          <name>CONF</name>
45075          <description>Configuration</description>
45076          <addressOffset>0x84</addressOffset>
45077          <size>32</size>
45078          <access>read-write</access>
45079          <resetValue>0</resetValue>
45080          <resetMask>0xFFFFFFFF</resetMask>
45081          <fields>
45082            <field>
45083              <name>NUMTOF</name>
45084              <description>TOF Frequency</description>
45085              <bitOffset>0</bitOffset>
45086              <bitWidth>5</bitWidth>
45087              <access>read-write</access>
45088            </field>
45089            <field>
45090              <name>BDMMODE</name>
45091              <description>BDM Mode</description>
45092              <bitOffset>6</bitOffset>
45093              <bitWidth>2</bitWidth>
45094              <access>read-write</access>
45095            </field>
45096            <field>
45097              <name>GTBEEN</name>
45098              <description>Global Time Base Enable</description>
45099              <bitOffset>9</bitOffset>
45100              <bitWidth>1</bitWidth>
45101              <access>read-write</access>
45102              <enumeratedValues>
45103                <enumeratedValue>
45104                  <name>0</name>
45105                  <description>Use of an external global time base is disabled.</description>
45106                  <value>#0</value>
45107                </enumeratedValue>
45108                <enumeratedValue>
45109                  <name>1</name>
45110                  <description>Use of an external global time base is enabled.</description>
45111                  <value>#1</value>
45112                </enumeratedValue>
45113              </enumeratedValues>
45114            </field>
45115            <field>
45116              <name>GTBEOUT</name>
45117              <description>Global Time Base Output</description>
45118              <bitOffset>10</bitOffset>
45119              <bitWidth>1</bitWidth>
45120              <access>read-write</access>
45121              <enumeratedValues>
45122                <enumeratedValue>
45123                  <name>0</name>
45124                  <description>A global time base signal generation is disabled.</description>
45125                  <value>#0</value>
45126                </enumeratedValue>
45127                <enumeratedValue>
45128                  <name>1</name>
45129                  <description>A global time base signal generation is enabled.</description>
45130                  <value>#1</value>
45131                </enumeratedValue>
45132              </enumeratedValues>
45133            </field>
45134          </fields>
45135        </register>
45136        <register>
45137          <name>FLTPOL</name>
45138          <description>FTM Fault Input Polarity</description>
45139          <addressOffset>0x88</addressOffset>
45140          <size>32</size>
45141          <access>read-write</access>
45142          <resetValue>0</resetValue>
45143          <resetMask>0xFFFFFFFF</resetMask>
45144          <fields>
45145            <field>
45146              <name>FLT0POL</name>
45147              <description>Fault Input 0 Polarity</description>
45148              <bitOffset>0</bitOffset>
45149              <bitWidth>1</bitWidth>
45150              <access>read-write</access>
45151              <enumeratedValues>
45152                <enumeratedValue>
45153                  <name>0</name>
45154                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
45155                  <value>#0</value>
45156                </enumeratedValue>
45157                <enumeratedValue>
45158                  <name>1</name>
45159                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
45160                  <value>#1</value>
45161                </enumeratedValue>
45162              </enumeratedValues>
45163            </field>
45164            <field>
45165              <name>FLT1POL</name>
45166              <description>Fault Input 1 Polarity</description>
45167              <bitOffset>1</bitOffset>
45168              <bitWidth>1</bitWidth>
45169              <access>read-write</access>
45170              <enumeratedValues>
45171                <enumeratedValue>
45172                  <name>0</name>
45173                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
45174                  <value>#0</value>
45175                </enumeratedValue>
45176                <enumeratedValue>
45177                  <name>1</name>
45178                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
45179                  <value>#1</value>
45180                </enumeratedValue>
45181              </enumeratedValues>
45182            </field>
45183            <field>
45184              <name>FLT2POL</name>
45185              <description>Fault Input 2 Polarity</description>
45186              <bitOffset>2</bitOffset>
45187              <bitWidth>1</bitWidth>
45188              <access>read-write</access>
45189              <enumeratedValues>
45190                <enumeratedValue>
45191                  <name>0</name>
45192                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
45193                  <value>#0</value>
45194                </enumeratedValue>
45195                <enumeratedValue>
45196                  <name>1</name>
45197                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
45198                  <value>#1</value>
45199                </enumeratedValue>
45200              </enumeratedValues>
45201            </field>
45202            <field>
45203              <name>FLT3POL</name>
45204              <description>Fault Input 3 Polarity</description>
45205              <bitOffset>3</bitOffset>
45206              <bitWidth>1</bitWidth>
45207              <access>read-write</access>
45208              <enumeratedValues>
45209                <enumeratedValue>
45210                  <name>0</name>
45211                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
45212                  <value>#0</value>
45213                </enumeratedValue>
45214                <enumeratedValue>
45215                  <name>1</name>
45216                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
45217                  <value>#1</value>
45218                </enumeratedValue>
45219              </enumeratedValues>
45220            </field>
45221          </fields>
45222        </register>
45223        <register>
45224          <name>SYNCONF</name>
45225          <description>Synchronization Configuration</description>
45226          <addressOffset>0x8C</addressOffset>
45227          <size>32</size>
45228          <access>read-write</access>
45229          <resetValue>0</resetValue>
45230          <resetMask>0xFFFFFFFF</resetMask>
45231          <fields>
45232            <field>
45233              <name>HWTRIGMODE</name>
45234              <description>Hardware Trigger Mode</description>
45235              <bitOffset>0</bitOffset>
45236              <bitWidth>1</bitWidth>
45237              <access>read-write</access>
45238              <enumeratedValues>
45239                <enumeratedValue>
45240                  <name>0</name>
45241                  <description>FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2.</description>
45242                  <value>#0</value>
45243                </enumeratedValue>
45244                <enumeratedValue>
45245                  <name>1</name>
45246                  <description>FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2.</description>
45247                  <value>#1</value>
45248                </enumeratedValue>
45249              </enumeratedValues>
45250            </field>
45251            <field>
45252              <name>CNTINC</name>
45253              <description>CNTIN Register Synchronization</description>
45254              <bitOffset>2</bitOffset>
45255              <bitWidth>1</bitWidth>
45256              <access>read-write</access>
45257              <enumeratedValues>
45258                <enumeratedValue>
45259                  <name>0</name>
45260                  <description>CNTIN register is updated with its buffer value at all rising edges of system clock.</description>
45261                  <value>#0</value>
45262                </enumeratedValue>
45263                <enumeratedValue>
45264                  <name>1</name>
45265                  <description>CNTIN register is updated with its buffer value by the PWM synchronization.</description>
45266                  <value>#1</value>
45267                </enumeratedValue>
45268              </enumeratedValues>
45269            </field>
45270            <field>
45271              <name>INVC</name>
45272              <description>INVCTRL Register Synchronization</description>
45273              <bitOffset>4</bitOffset>
45274              <bitWidth>1</bitWidth>
45275              <access>read-write</access>
45276              <enumeratedValues>
45277                <enumeratedValue>
45278                  <name>0</name>
45279                  <description>INVCTRL register is updated with its buffer value at all rising edges of system clock.</description>
45280                  <value>#0</value>
45281                </enumeratedValue>
45282                <enumeratedValue>
45283                  <name>1</name>
45284                  <description>INVCTRL register is updated with its buffer value by the PWM synchronization.</description>
45285                  <value>#1</value>
45286                </enumeratedValue>
45287              </enumeratedValues>
45288            </field>
45289            <field>
45290              <name>SWOC</name>
45291              <description>SWOCTRL Register Synchronization</description>
45292              <bitOffset>5</bitOffset>
45293              <bitWidth>1</bitWidth>
45294              <access>read-write</access>
45295              <enumeratedValues>
45296                <enumeratedValue>
45297                  <name>0</name>
45298                  <description>SWOCTRL register is updated with its buffer value at all rising edges of system clock.</description>
45299                  <value>#0</value>
45300                </enumeratedValue>
45301                <enumeratedValue>
45302                  <name>1</name>
45303                  <description>SWOCTRL register is updated with its buffer value by the PWM synchronization.</description>
45304                  <value>#1</value>
45305                </enumeratedValue>
45306              </enumeratedValues>
45307            </field>
45308            <field>
45309              <name>SYNCMODE</name>
45310              <description>Synchronization Mode</description>
45311              <bitOffset>7</bitOffset>
45312              <bitWidth>1</bitWidth>
45313              <access>read-write</access>
45314              <enumeratedValues>
45315                <enumeratedValue>
45316                  <name>0</name>
45317                  <description>Legacy PWM synchronization is selected.</description>
45318                  <value>#0</value>
45319                </enumeratedValue>
45320                <enumeratedValue>
45321                  <name>1</name>
45322                  <description>Enhanced PWM synchronization is selected.</description>
45323                  <value>#1</value>
45324                </enumeratedValue>
45325              </enumeratedValues>
45326            </field>
45327            <field>
45328              <name>SWRSTCNT</name>
45329              <description>FTM counter synchronization is activated by the software trigger.</description>
45330              <bitOffset>8</bitOffset>
45331              <bitWidth>1</bitWidth>
45332              <access>read-write</access>
45333              <enumeratedValues>
45334                <enumeratedValue>
45335                  <name>0</name>
45336                  <description>The software trigger does not activate the FTM counter synchronization.</description>
45337                  <value>#0</value>
45338                </enumeratedValue>
45339                <enumeratedValue>
45340                  <name>1</name>
45341                  <description>The software trigger activates the FTM counter synchronization.</description>
45342                  <value>#1</value>
45343                </enumeratedValue>
45344              </enumeratedValues>
45345            </field>
45346            <field>
45347              <name>SWWRBUF</name>
45348              <description>MOD, CNTIN, and CV registers synchronization is activated by the software trigger.</description>
45349              <bitOffset>9</bitOffset>
45350              <bitWidth>1</bitWidth>
45351              <access>read-write</access>
45352              <enumeratedValues>
45353                <enumeratedValue>
45354                  <name>0</name>
45355                  <description>The software trigger does not activate MOD, CNTIN, and CV registers synchronization.</description>
45356                  <value>#0</value>
45357                </enumeratedValue>
45358                <enumeratedValue>
45359                  <name>1</name>
45360                  <description>The software trigger activates MOD, CNTIN, and CV registers synchronization.</description>
45361                  <value>#1</value>
45362                </enumeratedValue>
45363              </enumeratedValues>
45364            </field>
45365            <field>
45366              <name>SWOM</name>
45367              <description>Output mask synchronization is activated by the software trigger.</description>
45368              <bitOffset>10</bitOffset>
45369              <bitWidth>1</bitWidth>
45370              <access>read-write</access>
45371              <enumeratedValues>
45372                <enumeratedValue>
45373                  <name>0</name>
45374                  <description>The software trigger does not activate the OUTMASK register synchronization.</description>
45375                  <value>#0</value>
45376                </enumeratedValue>
45377                <enumeratedValue>
45378                  <name>1</name>
45379                  <description>The software trigger activates the OUTMASK register synchronization.</description>
45380                  <value>#1</value>
45381                </enumeratedValue>
45382              </enumeratedValues>
45383            </field>
45384            <field>
45385              <name>SWINVC</name>
45386              <description>Inverting control synchronization is activated by the software trigger.</description>
45387              <bitOffset>11</bitOffset>
45388              <bitWidth>1</bitWidth>
45389              <access>read-write</access>
45390              <enumeratedValues>
45391                <enumeratedValue>
45392                  <name>0</name>
45393                  <description>The software trigger does not activate the INVCTRL register synchronization.</description>
45394                  <value>#0</value>
45395                </enumeratedValue>
45396                <enumeratedValue>
45397                  <name>1</name>
45398                  <description>The software trigger activates the INVCTRL register synchronization.</description>
45399                  <value>#1</value>
45400                </enumeratedValue>
45401              </enumeratedValues>
45402            </field>
45403            <field>
45404              <name>SWSOC</name>
45405              <description>Software output control synchronization is activated by the software trigger.</description>
45406              <bitOffset>12</bitOffset>
45407              <bitWidth>1</bitWidth>
45408              <access>read-write</access>
45409              <enumeratedValues>
45410                <enumeratedValue>
45411                  <name>0</name>
45412                  <description>The software trigger does not activate the SWOCTRL register synchronization.</description>
45413                  <value>#0</value>
45414                </enumeratedValue>
45415                <enumeratedValue>
45416                  <name>1</name>
45417                  <description>The software trigger activates the SWOCTRL register synchronization.</description>
45418                  <value>#1</value>
45419                </enumeratedValue>
45420              </enumeratedValues>
45421            </field>
45422            <field>
45423              <name>HWRSTCNT</name>
45424              <description>FTM counter synchronization is activated by a hardware trigger.</description>
45425              <bitOffset>16</bitOffset>
45426              <bitWidth>1</bitWidth>
45427              <access>read-write</access>
45428              <enumeratedValues>
45429                <enumeratedValue>
45430                  <name>0</name>
45431                  <description>A hardware trigger does not activate the FTM counter synchronization.</description>
45432                  <value>#0</value>
45433                </enumeratedValue>
45434                <enumeratedValue>
45435                  <name>1</name>
45436                  <description>A hardware trigger activates the FTM counter synchronization.</description>
45437                  <value>#1</value>
45438                </enumeratedValue>
45439              </enumeratedValues>
45440            </field>
45441            <field>
45442              <name>HWWRBUF</name>
45443              <description>MOD, CNTIN, and CV registers synchronization is activated by a hardware trigger.</description>
45444              <bitOffset>17</bitOffset>
45445              <bitWidth>1</bitWidth>
45446              <access>read-write</access>
45447              <enumeratedValues>
45448                <enumeratedValue>
45449                  <name>0</name>
45450                  <description>A hardware trigger does not activate MOD, CNTIN, and CV registers synchronization.</description>
45451                  <value>#0</value>
45452                </enumeratedValue>
45453                <enumeratedValue>
45454                  <name>1</name>
45455                  <description>A hardware trigger activates MOD, CNTIN, and CV registers synchronization.</description>
45456                  <value>#1</value>
45457                </enumeratedValue>
45458              </enumeratedValues>
45459            </field>
45460            <field>
45461              <name>HWOM</name>
45462              <description>Output mask synchronization is activated by a hardware trigger.</description>
45463              <bitOffset>18</bitOffset>
45464              <bitWidth>1</bitWidth>
45465              <access>read-write</access>
45466              <enumeratedValues>
45467                <enumeratedValue>
45468                  <name>0</name>
45469                  <description>A hardware trigger does not activate the OUTMASK register synchronization.</description>
45470                  <value>#0</value>
45471                </enumeratedValue>
45472                <enumeratedValue>
45473                  <name>1</name>
45474                  <description>A hardware trigger activates the OUTMASK register synchronization.</description>
45475                  <value>#1</value>
45476                </enumeratedValue>
45477              </enumeratedValues>
45478            </field>
45479            <field>
45480              <name>HWINVC</name>
45481              <description>Inverting control synchronization is activated by a hardware trigger.</description>
45482              <bitOffset>19</bitOffset>
45483              <bitWidth>1</bitWidth>
45484              <access>read-write</access>
45485              <enumeratedValues>
45486                <enumeratedValue>
45487                  <name>0</name>
45488                  <description>A hardware trigger does not activate the INVCTRL register synchronization.</description>
45489                  <value>#0</value>
45490                </enumeratedValue>
45491                <enumeratedValue>
45492                  <name>1</name>
45493                  <description>A hardware trigger activates the INVCTRL register synchronization.</description>
45494                  <value>#1</value>
45495                </enumeratedValue>
45496              </enumeratedValues>
45497            </field>
45498            <field>
45499              <name>HWSOC</name>
45500              <description>Software output control synchronization is activated by a hardware trigger.</description>
45501              <bitOffset>20</bitOffset>
45502              <bitWidth>1</bitWidth>
45503              <access>read-write</access>
45504              <enumeratedValues>
45505                <enumeratedValue>
45506                  <name>0</name>
45507                  <description>A hardware trigger does not activate the SWOCTRL register synchronization.</description>
45508                  <value>#0</value>
45509                </enumeratedValue>
45510                <enumeratedValue>
45511                  <name>1</name>
45512                  <description>A hardware trigger activates the SWOCTRL register synchronization.</description>
45513                  <value>#1</value>
45514                </enumeratedValue>
45515              </enumeratedValues>
45516            </field>
45517          </fields>
45518        </register>
45519        <register>
45520          <name>INVCTRL</name>
45521          <description>FTM Inverting Control</description>
45522          <addressOffset>0x90</addressOffset>
45523          <size>32</size>
45524          <access>read-write</access>
45525          <resetValue>0</resetValue>
45526          <resetMask>0xFFFFFFFF</resetMask>
45527          <fields>
45528            <field>
45529              <name>INV0EN</name>
45530              <description>Pair Channels 0 Inverting Enable</description>
45531              <bitOffset>0</bitOffset>
45532              <bitWidth>1</bitWidth>
45533              <access>read-write</access>
45534              <enumeratedValues>
45535                <enumeratedValue>
45536                  <name>0</name>
45537                  <description>Inverting is disabled.</description>
45538                  <value>#0</value>
45539                </enumeratedValue>
45540                <enumeratedValue>
45541                  <name>1</name>
45542                  <description>Inverting is enabled.</description>
45543                  <value>#1</value>
45544                </enumeratedValue>
45545              </enumeratedValues>
45546            </field>
45547            <field>
45548              <name>INV1EN</name>
45549              <description>Pair Channels 1 Inverting Enable</description>
45550              <bitOffset>1</bitOffset>
45551              <bitWidth>1</bitWidth>
45552              <access>read-write</access>
45553              <enumeratedValues>
45554                <enumeratedValue>
45555                  <name>0</name>
45556                  <description>Inverting is disabled.</description>
45557                  <value>#0</value>
45558                </enumeratedValue>
45559                <enumeratedValue>
45560                  <name>1</name>
45561                  <description>Inverting is enabled.</description>
45562                  <value>#1</value>
45563                </enumeratedValue>
45564              </enumeratedValues>
45565            </field>
45566            <field>
45567              <name>INV2EN</name>
45568              <description>Pair Channels 2 Inverting Enable</description>
45569              <bitOffset>2</bitOffset>
45570              <bitWidth>1</bitWidth>
45571              <access>read-write</access>
45572              <enumeratedValues>
45573                <enumeratedValue>
45574                  <name>0</name>
45575                  <description>Inverting is disabled.</description>
45576                  <value>#0</value>
45577                </enumeratedValue>
45578                <enumeratedValue>
45579                  <name>1</name>
45580                  <description>Inverting is enabled.</description>
45581                  <value>#1</value>
45582                </enumeratedValue>
45583              </enumeratedValues>
45584            </field>
45585            <field>
45586              <name>INV3EN</name>
45587              <description>Pair Channels 3 Inverting Enable</description>
45588              <bitOffset>3</bitOffset>
45589              <bitWidth>1</bitWidth>
45590              <access>read-write</access>
45591              <enumeratedValues>
45592                <enumeratedValue>
45593                  <name>0</name>
45594                  <description>Inverting is disabled.</description>
45595                  <value>#0</value>
45596                </enumeratedValue>
45597                <enumeratedValue>
45598                  <name>1</name>
45599                  <description>Inverting is enabled.</description>
45600                  <value>#1</value>
45601                </enumeratedValue>
45602              </enumeratedValues>
45603            </field>
45604          </fields>
45605        </register>
45606        <register>
45607          <name>SWOCTRL</name>
45608          <description>FTM Software Output Control</description>
45609          <addressOffset>0x94</addressOffset>
45610          <size>32</size>
45611          <access>read-write</access>
45612          <resetValue>0</resetValue>
45613          <resetMask>0xFFFFFFFF</resetMask>
45614          <fields>
45615            <field>
45616              <name>CH0OC</name>
45617              <description>Channel 0 Software Output Control Enable</description>
45618              <bitOffset>0</bitOffset>
45619              <bitWidth>1</bitWidth>
45620              <access>read-write</access>
45621              <enumeratedValues>
45622                <enumeratedValue>
45623                  <name>0</name>
45624                  <description>The channel output is not affected by software output control.</description>
45625                  <value>#0</value>
45626                </enumeratedValue>
45627                <enumeratedValue>
45628                  <name>1</name>
45629                  <description>The channel output is affected by software output control.</description>
45630                  <value>#1</value>
45631                </enumeratedValue>
45632              </enumeratedValues>
45633            </field>
45634            <field>
45635              <name>CH1OC</name>
45636              <description>Channel 1 Software Output Control Enable</description>
45637              <bitOffset>1</bitOffset>
45638              <bitWidth>1</bitWidth>
45639              <access>read-write</access>
45640              <enumeratedValues>
45641                <enumeratedValue>
45642                  <name>0</name>
45643                  <description>The channel output is not affected by software output control.</description>
45644                  <value>#0</value>
45645                </enumeratedValue>
45646                <enumeratedValue>
45647                  <name>1</name>
45648                  <description>The channel output is affected by software output control.</description>
45649                  <value>#1</value>
45650                </enumeratedValue>
45651              </enumeratedValues>
45652            </field>
45653            <field>
45654              <name>CH2OC</name>
45655              <description>Channel 2 Software Output Control Enable</description>
45656              <bitOffset>2</bitOffset>
45657              <bitWidth>1</bitWidth>
45658              <access>read-write</access>
45659              <enumeratedValues>
45660                <enumeratedValue>
45661                  <name>0</name>
45662                  <description>The channel output is not affected by software output control.</description>
45663                  <value>#0</value>
45664                </enumeratedValue>
45665                <enumeratedValue>
45666                  <name>1</name>
45667                  <description>The channel output is affected by software output control.</description>
45668                  <value>#1</value>
45669                </enumeratedValue>
45670              </enumeratedValues>
45671            </field>
45672            <field>
45673              <name>CH3OC</name>
45674              <description>Channel 3 Software Output Control Enable</description>
45675              <bitOffset>3</bitOffset>
45676              <bitWidth>1</bitWidth>
45677              <access>read-write</access>
45678              <enumeratedValues>
45679                <enumeratedValue>
45680                  <name>0</name>
45681                  <description>The channel output is not affected by software output control.</description>
45682                  <value>#0</value>
45683                </enumeratedValue>
45684                <enumeratedValue>
45685                  <name>1</name>
45686                  <description>The channel output is affected by software output control.</description>
45687                  <value>#1</value>
45688                </enumeratedValue>
45689              </enumeratedValues>
45690            </field>
45691            <field>
45692              <name>CH4OC</name>
45693              <description>Channel 4 Software Output Control Enable</description>
45694              <bitOffset>4</bitOffset>
45695              <bitWidth>1</bitWidth>
45696              <access>read-write</access>
45697              <enumeratedValues>
45698                <enumeratedValue>
45699                  <name>0</name>
45700                  <description>The channel output is not affected by software output control.</description>
45701                  <value>#0</value>
45702                </enumeratedValue>
45703                <enumeratedValue>
45704                  <name>1</name>
45705                  <description>The channel output is affected by software output control.</description>
45706                  <value>#1</value>
45707                </enumeratedValue>
45708              </enumeratedValues>
45709            </field>
45710            <field>
45711              <name>CH5OC</name>
45712              <description>Channel 5 Software Output Control Enable</description>
45713              <bitOffset>5</bitOffset>
45714              <bitWidth>1</bitWidth>
45715              <access>read-write</access>
45716              <enumeratedValues>
45717                <enumeratedValue>
45718                  <name>0</name>
45719                  <description>The channel output is not affected by software output control.</description>
45720                  <value>#0</value>
45721                </enumeratedValue>
45722                <enumeratedValue>
45723                  <name>1</name>
45724                  <description>The channel output is affected by software output control.</description>
45725                  <value>#1</value>
45726                </enumeratedValue>
45727              </enumeratedValues>
45728            </field>
45729            <field>
45730              <name>CH6OC</name>
45731              <description>Channel 6 Software Output Control Enable</description>
45732              <bitOffset>6</bitOffset>
45733              <bitWidth>1</bitWidth>
45734              <access>read-write</access>
45735              <enumeratedValues>
45736                <enumeratedValue>
45737                  <name>0</name>
45738                  <description>The channel output is not affected by software output control.</description>
45739                  <value>#0</value>
45740                </enumeratedValue>
45741                <enumeratedValue>
45742                  <name>1</name>
45743                  <description>The channel output is affected by software output control.</description>
45744                  <value>#1</value>
45745                </enumeratedValue>
45746              </enumeratedValues>
45747            </field>
45748            <field>
45749              <name>CH7OC</name>
45750              <description>Channel 7 Software Output Control Enable</description>
45751              <bitOffset>7</bitOffset>
45752              <bitWidth>1</bitWidth>
45753              <access>read-write</access>
45754              <enumeratedValues>
45755                <enumeratedValue>
45756                  <name>0</name>
45757                  <description>The channel output is not affected by software output control.</description>
45758                  <value>#0</value>
45759                </enumeratedValue>
45760                <enumeratedValue>
45761                  <name>1</name>
45762                  <description>The channel output is affected by software output control.</description>
45763                  <value>#1</value>
45764                </enumeratedValue>
45765              </enumeratedValues>
45766            </field>
45767            <field>
45768              <name>CH0OCV</name>
45769              <description>Channel 0 Software Output Control Value</description>
45770              <bitOffset>8</bitOffset>
45771              <bitWidth>1</bitWidth>
45772              <access>read-write</access>
45773              <enumeratedValues>
45774                <enumeratedValue>
45775                  <name>0</name>
45776                  <description>The software output control forces 0 to the channel output.</description>
45777                  <value>#0</value>
45778                </enumeratedValue>
45779                <enumeratedValue>
45780                  <name>1</name>
45781                  <description>The software output control forces 1 to the channel output.</description>
45782                  <value>#1</value>
45783                </enumeratedValue>
45784              </enumeratedValues>
45785            </field>
45786            <field>
45787              <name>CH1OCV</name>
45788              <description>Channel 1 Software Output Control Value</description>
45789              <bitOffset>9</bitOffset>
45790              <bitWidth>1</bitWidth>
45791              <access>read-write</access>
45792              <enumeratedValues>
45793                <enumeratedValue>
45794                  <name>0</name>
45795                  <description>The software output control forces 0 to the channel output.</description>
45796                  <value>#0</value>
45797                </enumeratedValue>
45798                <enumeratedValue>
45799                  <name>1</name>
45800                  <description>The software output control forces 1 to the channel output.</description>
45801                  <value>#1</value>
45802                </enumeratedValue>
45803              </enumeratedValues>
45804            </field>
45805            <field>
45806              <name>CH2OCV</name>
45807              <description>Channel 2 Software Output Control Value</description>
45808              <bitOffset>10</bitOffset>
45809              <bitWidth>1</bitWidth>
45810              <access>read-write</access>
45811              <enumeratedValues>
45812                <enumeratedValue>
45813                  <name>0</name>
45814                  <description>The software output control forces 0 to the channel output.</description>
45815                  <value>#0</value>
45816                </enumeratedValue>
45817                <enumeratedValue>
45818                  <name>1</name>
45819                  <description>The software output control forces 1 to the channel output.</description>
45820                  <value>#1</value>
45821                </enumeratedValue>
45822              </enumeratedValues>
45823            </field>
45824            <field>
45825              <name>CH3OCV</name>
45826              <description>Channel 3 Software Output Control Value</description>
45827              <bitOffset>11</bitOffset>
45828              <bitWidth>1</bitWidth>
45829              <access>read-write</access>
45830              <enumeratedValues>
45831                <enumeratedValue>
45832                  <name>0</name>
45833                  <description>The software output control forces 0 to the channel output.</description>
45834                  <value>#0</value>
45835                </enumeratedValue>
45836                <enumeratedValue>
45837                  <name>1</name>
45838                  <description>The software output control forces 1 to the channel output.</description>
45839                  <value>#1</value>
45840                </enumeratedValue>
45841              </enumeratedValues>
45842            </field>
45843            <field>
45844              <name>CH4OCV</name>
45845              <description>Channel 4 Software Output Control Value</description>
45846              <bitOffset>12</bitOffset>
45847              <bitWidth>1</bitWidth>
45848              <access>read-write</access>
45849              <enumeratedValues>
45850                <enumeratedValue>
45851                  <name>0</name>
45852                  <description>The software output control forces 0 to the channel output.</description>
45853                  <value>#0</value>
45854                </enumeratedValue>
45855                <enumeratedValue>
45856                  <name>1</name>
45857                  <description>The software output control forces 1 to the channel output.</description>
45858                  <value>#1</value>
45859                </enumeratedValue>
45860              </enumeratedValues>
45861            </field>
45862            <field>
45863              <name>CH5OCV</name>
45864              <description>Channel 5 Software Output Control Value</description>
45865              <bitOffset>13</bitOffset>
45866              <bitWidth>1</bitWidth>
45867              <access>read-write</access>
45868              <enumeratedValues>
45869                <enumeratedValue>
45870                  <name>0</name>
45871                  <description>The software output control forces 0 to the channel output.</description>
45872                  <value>#0</value>
45873                </enumeratedValue>
45874                <enumeratedValue>
45875                  <name>1</name>
45876                  <description>The software output control forces 1 to the channel output.</description>
45877                  <value>#1</value>
45878                </enumeratedValue>
45879              </enumeratedValues>
45880            </field>
45881            <field>
45882              <name>CH6OCV</name>
45883              <description>Channel 6 Software Output Control Value</description>
45884              <bitOffset>14</bitOffset>
45885              <bitWidth>1</bitWidth>
45886              <access>read-write</access>
45887              <enumeratedValues>
45888                <enumeratedValue>
45889                  <name>0</name>
45890                  <description>The software output control forces 0 to the channel output.</description>
45891                  <value>#0</value>
45892                </enumeratedValue>
45893                <enumeratedValue>
45894                  <name>1</name>
45895                  <description>The software output control forces 1 to the channel output.</description>
45896                  <value>#1</value>
45897                </enumeratedValue>
45898              </enumeratedValues>
45899            </field>
45900            <field>
45901              <name>CH7OCV</name>
45902              <description>Channel 7 Software Output Control Value</description>
45903              <bitOffset>15</bitOffset>
45904              <bitWidth>1</bitWidth>
45905              <access>read-write</access>
45906              <enumeratedValues>
45907                <enumeratedValue>
45908                  <name>0</name>
45909                  <description>The software output control forces 0 to the channel output.</description>
45910                  <value>#0</value>
45911                </enumeratedValue>
45912                <enumeratedValue>
45913                  <name>1</name>
45914                  <description>The software output control forces 1 to the channel output.</description>
45915                  <value>#1</value>
45916                </enumeratedValue>
45917              </enumeratedValues>
45918            </field>
45919          </fields>
45920        </register>
45921        <register>
45922          <name>PWMLOAD</name>
45923          <description>FTM PWM Load</description>
45924          <addressOffset>0x98</addressOffset>
45925          <size>32</size>
45926          <access>read-write</access>
45927          <resetValue>0</resetValue>
45928          <resetMask>0xFFFFFFFF</resetMask>
45929          <fields>
45930            <field>
45931              <name>CH0SEL</name>
45932              <description>Channel 0 Select</description>
45933              <bitOffset>0</bitOffset>
45934              <bitWidth>1</bitWidth>
45935              <access>read-write</access>
45936              <enumeratedValues>
45937                <enumeratedValue>
45938                  <name>0</name>
45939                  <description>Do not include the channel in the matching process.</description>
45940                  <value>#0</value>
45941                </enumeratedValue>
45942                <enumeratedValue>
45943                  <name>1</name>
45944                  <description>Include the channel in the matching process.</description>
45945                  <value>#1</value>
45946                </enumeratedValue>
45947              </enumeratedValues>
45948            </field>
45949            <field>
45950              <name>CH1SEL</name>
45951              <description>Channel 1 Select</description>
45952              <bitOffset>1</bitOffset>
45953              <bitWidth>1</bitWidth>
45954              <access>read-write</access>
45955              <enumeratedValues>
45956                <enumeratedValue>
45957                  <name>0</name>
45958                  <description>Do not include the channel in the matching process.</description>
45959                  <value>#0</value>
45960                </enumeratedValue>
45961                <enumeratedValue>
45962                  <name>1</name>
45963                  <description>Include the channel in the matching process.</description>
45964                  <value>#1</value>
45965                </enumeratedValue>
45966              </enumeratedValues>
45967            </field>
45968            <field>
45969              <name>CH2SEL</name>
45970              <description>Channel 2 Select</description>
45971              <bitOffset>2</bitOffset>
45972              <bitWidth>1</bitWidth>
45973              <access>read-write</access>
45974              <enumeratedValues>
45975                <enumeratedValue>
45976                  <name>0</name>
45977                  <description>Do not include the channel in the matching process.</description>
45978                  <value>#0</value>
45979                </enumeratedValue>
45980                <enumeratedValue>
45981                  <name>1</name>
45982                  <description>Include the channel in the matching process.</description>
45983                  <value>#1</value>
45984                </enumeratedValue>
45985              </enumeratedValues>
45986            </field>
45987            <field>
45988              <name>CH3SEL</name>
45989              <description>Channel 3 Select</description>
45990              <bitOffset>3</bitOffset>
45991              <bitWidth>1</bitWidth>
45992              <access>read-write</access>
45993              <enumeratedValues>
45994                <enumeratedValue>
45995                  <name>0</name>
45996                  <description>Do not include the channel in the matching process.</description>
45997                  <value>#0</value>
45998                </enumeratedValue>
45999                <enumeratedValue>
46000                  <name>1</name>
46001                  <description>Include the channel in the matching process.</description>
46002                  <value>#1</value>
46003                </enumeratedValue>
46004              </enumeratedValues>
46005            </field>
46006            <field>
46007              <name>CH4SEL</name>
46008              <description>Channel 4 Select</description>
46009              <bitOffset>4</bitOffset>
46010              <bitWidth>1</bitWidth>
46011              <access>read-write</access>
46012              <enumeratedValues>
46013                <enumeratedValue>
46014                  <name>0</name>
46015                  <description>Do not include the channel in the matching process.</description>
46016                  <value>#0</value>
46017                </enumeratedValue>
46018                <enumeratedValue>
46019                  <name>1</name>
46020                  <description>Include the channel in the matching process.</description>
46021                  <value>#1</value>
46022                </enumeratedValue>
46023              </enumeratedValues>
46024            </field>
46025            <field>
46026              <name>CH5SEL</name>
46027              <description>Channel 5 Select</description>
46028              <bitOffset>5</bitOffset>
46029              <bitWidth>1</bitWidth>
46030              <access>read-write</access>
46031              <enumeratedValues>
46032                <enumeratedValue>
46033                  <name>0</name>
46034                  <description>Do not include the channel in the matching process.</description>
46035                  <value>#0</value>
46036                </enumeratedValue>
46037                <enumeratedValue>
46038                  <name>1</name>
46039                  <description>Include the channel in the matching process.</description>
46040                  <value>#1</value>
46041                </enumeratedValue>
46042              </enumeratedValues>
46043            </field>
46044            <field>
46045              <name>CH6SEL</name>
46046              <description>Channel 6 Select</description>
46047              <bitOffset>6</bitOffset>
46048              <bitWidth>1</bitWidth>
46049              <access>read-write</access>
46050              <enumeratedValues>
46051                <enumeratedValue>
46052                  <name>0</name>
46053                  <description>Do not include the channel in the matching process.</description>
46054                  <value>#0</value>
46055                </enumeratedValue>
46056                <enumeratedValue>
46057                  <name>1</name>
46058                  <description>Include the channel in the matching process.</description>
46059                  <value>#1</value>
46060                </enumeratedValue>
46061              </enumeratedValues>
46062            </field>
46063            <field>
46064              <name>CH7SEL</name>
46065              <description>Channel 7 Select</description>
46066              <bitOffset>7</bitOffset>
46067              <bitWidth>1</bitWidth>
46068              <access>read-write</access>
46069              <enumeratedValues>
46070                <enumeratedValue>
46071                  <name>0</name>
46072                  <description>Do not include the channel in the matching process.</description>
46073                  <value>#0</value>
46074                </enumeratedValue>
46075                <enumeratedValue>
46076                  <name>1</name>
46077                  <description>Include the channel in the matching process.</description>
46078                  <value>#1</value>
46079                </enumeratedValue>
46080              </enumeratedValues>
46081            </field>
46082            <field>
46083              <name>LDOK</name>
46084              <description>Load Enable</description>
46085              <bitOffset>9</bitOffset>
46086              <bitWidth>1</bitWidth>
46087              <access>read-write</access>
46088              <enumeratedValues>
46089                <enumeratedValue>
46090                  <name>0</name>
46091                  <description>Loading updated values is disabled.</description>
46092                  <value>#0</value>
46093                </enumeratedValue>
46094                <enumeratedValue>
46095                  <name>1</name>
46096                  <description>Loading updated values is enabled.</description>
46097                  <value>#1</value>
46098                </enumeratedValue>
46099              </enumeratedValues>
46100            </field>
46101          </fields>
46102        </register>
46103      </registers>
46104    </peripheral>
46105    <peripheral>
46106      <name>FTM3</name>
46107      <description>FlexTimer Module</description>
46108      <groupName>FTM</groupName>
46109      <prependToName>FTM3_</prependToName>
46110      <baseAddress>0x400B9000</baseAddress>
46111      <addressBlock>
46112        <offset>0</offset>
46113        <size>0x9C</size>
46114        <usage>registers</usage>
46115      </addressBlock>
46116      <interrupt>
46117        <name>FTM3</name>
46118        <value>71</value>
46119      </interrupt>
46120      <registers>
46121        <register>
46122          <name>SC</name>
46123          <description>Status And Control</description>
46124          <addressOffset>0</addressOffset>
46125          <size>32</size>
46126          <access>read-write</access>
46127          <resetValue>0</resetValue>
46128          <resetMask>0xFFFFFFFF</resetMask>
46129          <fields>
46130            <field>
46131              <name>PS</name>
46132              <description>Prescale Factor Selection</description>
46133              <bitOffset>0</bitOffset>
46134              <bitWidth>3</bitWidth>
46135              <access>read-write</access>
46136              <enumeratedValues>
46137                <enumeratedValue>
46138                  <name>000</name>
46139                  <description>Divide by 1</description>
46140                  <value>#000</value>
46141                </enumeratedValue>
46142                <enumeratedValue>
46143                  <name>001</name>
46144                  <description>Divide by 2</description>
46145                  <value>#001</value>
46146                </enumeratedValue>
46147                <enumeratedValue>
46148                  <name>010</name>
46149                  <description>Divide by 4</description>
46150                  <value>#010</value>
46151                </enumeratedValue>
46152                <enumeratedValue>
46153                  <name>011</name>
46154                  <description>Divide by 8</description>
46155                  <value>#011</value>
46156                </enumeratedValue>
46157                <enumeratedValue>
46158                  <name>100</name>
46159                  <description>Divide by 16</description>
46160                  <value>#100</value>
46161                </enumeratedValue>
46162                <enumeratedValue>
46163                  <name>101</name>
46164                  <description>Divide by 32</description>
46165                  <value>#101</value>
46166                </enumeratedValue>
46167                <enumeratedValue>
46168                  <name>110</name>
46169                  <description>Divide by 64</description>
46170                  <value>#110</value>
46171                </enumeratedValue>
46172                <enumeratedValue>
46173                  <name>111</name>
46174                  <description>Divide by 128</description>
46175                  <value>#111</value>
46176                </enumeratedValue>
46177              </enumeratedValues>
46178            </field>
46179            <field>
46180              <name>CLKS</name>
46181              <description>Clock Source Selection</description>
46182              <bitOffset>3</bitOffset>
46183              <bitWidth>2</bitWidth>
46184              <access>read-write</access>
46185              <enumeratedValues>
46186                <enumeratedValue>
46187                  <name>00</name>
46188                  <description>No clock selected. This in effect disables the FTM counter.</description>
46189                  <value>#00</value>
46190                </enumeratedValue>
46191                <enumeratedValue>
46192                  <name>01</name>
46193                  <description>System clock</description>
46194                  <value>#01</value>
46195                </enumeratedValue>
46196                <enumeratedValue>
46197                  <name>10</name>
46198                  <description>Fixed frequency clock</description>
46199                  <value>#10</value>
46200                </enumeratedValue>
46201                <enumeratedValue>
46202                  <name>11</name>
46203                  <description>External clock</description>
46204                  <value>#11</value>
46205                </enumeratedValue>
46206              </enumeratedValues>
46207            </field>
46208            <field>
46209              <name>CPWMS</name>
46210              <description>Center-Aligned PWM Select</description>
46211              <bitOffset>5</bitOffset>
46212              <bitWidth>1</bitWidth>
46213              <access>read-write</access>
46214              <enumeratedValues>
46215                <enumeratedValue>
46216                  <name>0</name>
46217                  <description>FTM counter operates in Up Counting mode.</description>
46218                  <value>#0</value>
46219                </enumeratedValue>
46220                <enumeratedValue>
46221                  <name>1</name>
46222                  <description>FTM counter operates in Up-Down Counting mode.</description>
46223                  <value>#1</value>
46224                </enumeratedValue>
46225              </enumeratedValues>
46226            </field>
46227            <field>
46228              <name>TOIE</name>
46229              <description>Timer Overflow Interrupt Enable</description>
46230              <bitOffset>6</bitOffset>
46231              <bitWidth>1</bitWidth>
46232              <access>read-write</access>
46233              <enumeratedValues>
46234                <enumeratedValue>
46235                  <name>0</name>
46236                  <description>Disable TOF interrupts. Use software polling.</description>
46237                  <value>#0</value>
46238                </enumeratedValue>
46239                <enumeratedValue>
46240                  <name>1</name>
46241                  <description>Enable TOF interrupts. An interrupt is generated when TOF equals one.</description>
46242                  <value>#1</value>
46243                </enumeratedValue>
46244              </enumeratedValues>
46245            </field>
46246            <field>
46247              <name>TOF</name>
46248              <description>Timer Overflow Flag</description>
46249              <bitOffset>7</bitOffset>
46250              <bitWidth>1</bitWidth>
46251              <access>read-write</access>
46252              <enumeratedValues>
46253                <enumeratedValue>
46254                  <name>0</name>
46255                  <description>FTM counter has not overflowed.</description>
46256                  <value>#0</value>
46257                </enumeratedValue>
46258                <enumeratedValue>
46259                  <name>1</name>
46260                  <description>FTM counter has overflowed.</description>
46261                  <value>#1</value>
46262                </enumeratedValue>
46263              </enumeratedValues>
46264            </field>
46265          </fields>
46266        </register>
46267        <register>
46268          <name>CNT</name>
46269          <description>Counter</description>
46270          <addressOffset>0x4</addressOffset>
46271          <size>32</size>
46272          <access>read-write</access>
46273          <resetValue>0</resetValue>
46274          <resetMask>0xFFFFFFFF</resetMask>
46275          <fields>
46276            <field>
46277              <name>COUNT</name>
46278              <description>Counter Value</description>
46279              <bitOffset>0</bitOffset>
46280              <bitWidth>16</bitWidth>
46281              <access>read-write</access>
46282            </field>
46283          </fields>
46284        </register>
46285        <register>
46286          <name>MOD</name>
46287          <description>Modulo</description>
46288          <addressOffset>0x8</addressOffset>
46289          <size>32</size>
46290          <access>read-write</access>
46291          <resetValue>0</resetValue>
46292          <resetMask>0xFFFFFFFF</resetMask>
46293          <fields>
46294            <field>
46295              <name>MOD</name>
46296              <description>Modulo Value</description>
46297              <bitOffset>0</bitOffset>
46298              <bitWidth>16</bitWidth>
46299              <access>read-write</access>
46300            </field>
46301          </fields>
46302        </register>
46303        <register>
46304          <dim>8</dim>
46305          <dimIncrement>0x8</dimIncrement>
46306          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
46307          <name>C%sSC</name>
46308          <description>Channel (n) Status And Control</description>
46309          <addressOffset>0xC</addressOffset>
46310          <size>32</size>
46311          <access>read-write</access>
46312          <resetValue>0</resetValue>
46313          <resetMask>0xFFFFFFFF</resetMask>
46314          <fields>
46315            <field>
46316              <name>DMA</name>
46317              <description>DMA Enable</description>
46318              <bitOffset>0</bitOffset>
46319              <bitWidth>1</bitWidth>
46320              <access>read-write</access>
46321              <enumeratedValues>
46322                <enumeratedValue>
46323                  <name>0</name>
46324                  <description>Disable DMA transfers.</description>
46325                  <value>#0</value>
46326                </enumeratedValue>
46327                <enumeratedValue>
46328                  <name>1</name>
46329                  <description>Enable DMA transfers.</description>
46330                  <value>#1</value>
46331                </enumeratedValue>
46332              </enumeratedValues>
46333            </field>
46334            <field>
46335              <name>ICRST</name>
46336              <description>FTM counter reset by the selected input capture event.</description>
46337              <bitOffset>1</bitOffset>
46338              <bitWidth>1</bitWidth>
46339              <access>read-write</access>
46340              <enumeratedValues>
46341                <enumeratedValue>
46342                  <name>0</name>
46343                  <description>FTM counter is not reset when the selected channel (n) input event is detected.</description>
46344                  <value>#0</value>
46345                </enumeratedValue>
46346                <enumeratedValue>
46347                  <name>1</name>
46348                  <description>FTM counter is reset when the selected channel (n) input event is detected.</description>
46349                  <value>#1</value>
46350                </enumeratedValue>
46351              </enumeratedValues>
46352            </field>
46353            <field>
46354              <name>ELSA</name>
46355              <description>Edge or Level Select</description>
46356              <bitOffset>2</bitOffset>
46357              <bitWidth>1</bitWidth>
46358              <access>read-write</access>
46359            </field>
46360            <field>
46361              <name>ELSB</name>
46362              <description>Edge or Level Select</description>
46363              <bitOffset>3</bitOffset>
46364              <bitWidth>1</bitWidth>
46365              <access>read-write</access>
46366            </field>
46367            <field>
46368              <name>MSA</name>
46369              <description>Channel Mode Select</description>
46370              <bitOffset>4</bitOffset>
46371              <bitWidth>1</bitWidth>
46372              <access>read-write</access>
46373            </field>
46374            <field>
46375              <name>MSB</name>
46376              <description>Channel Mode Select</description>
46377              <bitOffset>5</bitOffset>
46378              <bitWidth>1</bitWidth>
46379              <access>read-write</access>
46380            </field>
46381            <field>
46382              <name>CHIE</name>
46383              <description>Channel Interrupt Enable</description>
46384              <bitOffset>6</bitOffset>
46385              <bitWidth>1</bitWidth>
46386              <access>read-write</access>
46387              <enumeratedValues>
46388                <enumeratedValue>
46389                  <name>0</name>
46390                  <description>Disable channel interrupts. Use software polling.</description>
46391                  <value>#0</value>
46392                </enumeratedValue>
46393                <enumeratedValue>
46394                  <name>1</name>
46395                  <description>Enable channel interrupts.</description>
46396                  <value>#1</value>
46397                </enumeratedValue>
46398              </enumeratedValues>
46399            </field>
46400            <field>
46401              <name>CHF</name>
46402              <description>Channel Flag</description>
46403              <bitOffset>7</bitOffset>
46404              <bitWidth>1</bitWidth>
46405              <access>read-write</access>
46406              <enumeratedValues>
46407                <enumeratedValue>
46408                  <name>0</name>
46409                  <description>No channel event has occurred.</description>
46410                  <value>#0</value>
46411                </enumeratedValue>
46412                <enumeratedValue>
46413                  <name>1</name>
46414                  <description>A channel event has occurred.</description>
46415                  <value>#1</value>
46416                </enumeratedValue>
46417              </enumeratedValues>
46418            </field>
46419          </fields>
46420        </register>
46421        <register>
46422          <dim>8</dim>
46423          <dimIncrement>0x8</dimIncrement>
46424          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
46425          <name>C%sV</name>
46426          <description>Channel (n) Value</description>
46427          <addressOffset>0x10</addressOffset>
46428          <size>32</size>
46429          <access>read-write</access>
46430          <resetValue>0</resetValue>
46431          <resetMask>0xFFFFFFFF</resetMask>
46432          <fields>
46433            <field>
46434              <name>VAL</name>
46435              <description>Channel Value</description>
46436              <bitOffset>0</bitOffset>
46437              <bitWidth>16</bitWidth>
46438              <access>read-write</access>
46439            </field>
46440          </fields>
46441        </register>
46442        <register>
46443          <name>CNTIN</name>
46444          <description>Counter Initial Value</description>
46445          <addressOffset>0x4C</addressOffset>
46446          <size>32</size>
46447          <access>read-write</access>
46448          <resetValue>0</resetValue>
46449          <resetMask>0xFFFFFFFF</resetMask>
46450          <fields>
46451            <field>
46452              <name>INIT</name>
46453              <description>Initial Value Of The FTM Counter</description>
46454              <bitOffset>0</bitOffset>
46455              <bitWidth>16</bitWidth>
46456              <access>read-write</access>
46457            </field>
46458          </fields>
46459        </register>
46460        <register>
46461          <name>STATUS</name>
46462          <description>Capture And Compare Status</description>
46463          <addressOffset>0x50</addressOffset>
46464          <size>32</size>
46465          <access>read-write</access>
46466          <resetValue>0</resetValue>
46467          <resetMask>0xFFFFFFFF</resetMask>
46468          <fields>
46469            <field>
46470              <name>CH0F</name>
46471              <description>Channel 0 Flag</description>
46472              <bitOffset>0</bitOffset>
46473              <bitWidth>1</bitWidth>
46474              <access>read-write</access>
46475              <enumeratedValues>
46476                <enumeratedValue>
46477                  <name>0</name>
46478                  <description>No channel event has occurred.</description>
46479                  <value>#0</value>
46480                </enumeratedValue>
46481                <enumeratedValue>
46482                  <name>1</name>
46483                  <description>A channel event has occurred.</description>
46484                  <value>#1</value>
46485                </enumeratedValue>
46486              </enumeratedValues>
46487            </field>
46488            <field>
46489              <name>CH1F</name>
46490              <description>Channel 1 Flag</description>
46491              <bitOffset>1</bitOffset>
46492              <bitWidth>1</bitWidth>
46493              <access>read-write</access>
46494              <enumeratedValues>
46495                <enumeratedValue>
46496                  <name>0</name>
46497                  <description>No channel event has occurred.</description>
46498                  <value>#0</value>
46499                </enumeratedValue>
46500                <enumeratedValue>
46501                  <name>1</name>
46502                  <description>A channel event has occurred.</description>
46503                  <value>#1</value>
46504                </enumeratedValue>
46505              </enumeratedValues>
46506            </field>
46507            <field>
46508              <name>CH2F</name>
46509              <description>Channel 2 Flag</description>
46510              <bitOffset>2</bitOffset>
46511              <bitWidth>1</bitWidth>
46512              <access>read-write</access>
46513              <enumeratedValues>
46514                <enumeratedValue>
46515                  <name>0</name>
46516                  <description>No channel event has occurred.</description>
46517                  <value>#0</value>
46518                </enumeratedValue>
46519                <enumeratedValue>
46520                  <name>1</name>
46521                  <description>A channel event has occurred.</description>
46522                  <value>#1</value>
46523                </enumeratedValue>
46524              </enumeratedValues>
46525            </field>
46526            <field>
46527              <name>CH3F</name>
46528              <description>Channel 3 Flag</description>
46529              <bitOffset>3</bitOffset>
46530              <bitWidth>1</bitWidth>
46531              <access>read-write</access>
46532              <enumeratedValues>
46533                <enumeratedValue>
46534                  <name>0</name>
46535                  <description>No channel event has occurred.</description>
46536                  <value>#0</value>
46537                </enumeratedValue>
46538                <enumeratedValue>
46539                  <name>1</name>
46540                  <description>A channel event has occurred.</description>
46541                  <value>#1</value>
46542                </enumeratedValue>
46543              </enumeratedValues>
46544            </field>
46545            <field>
46546              <name>CH4F</name>
46547              <description>Channel 4 Flag</description>
46548              <bitOffset>4</bitOffset>
46549              <bitWidth>1</bitWidth>
46550              <access>read-write</access>
46551              <enumeratedValues>
46552                <enumeratedValue>
46553                  <name>0</name>
46554                  <description>No channel event has occurred.</description>
46555                  <value>#0</value>
46556                </enumeratedValue>
46557                <enumeratedValue>
46558                  <name>1</name>
46559                  <description>A channel event has occurred.</description>
46560                  <value>#1</value>
46561                </enumeratedValue>
46562              </enumeratedValues>
46563            </field>
46564            <field>
46565              <name>CH5F</name>
46566              <description>Channel 5 Flag</description>
46567              <bitOffset>5</bitOffset>
46568              <bitWidth>1</bitWidth>
46569              <access>read-write</access>
46570              <enumeratedValues>
46571                <enumeratedValue>
46572                  <name>0</name>
46573                  <description>No channel event has occurred.</description>
46574                  <value>#0</value>
46575                </enumeratedValue>
46576                <enumeratedValue>
46577                  <name>1</name>
46578                  <description>A channel event has occurred.</description>
46579                  <value>#1</value>
46580                </enumeratedValue>
46581              </enumeratedValues>
46582            </field>
46583            <field>
46584              <name>CH6F</name>
46585              <description>Channel 6 Flag</description>
46586              <bitOffset>6</bitOffset>
46587              <bitWidth>1</bitWidth>
46588              <access>read-write</access>
46589              <enumeratedValues>
46590                <enumeratedValue>
46591                  <name>0</name>
46592                  <description>No channel event has occurred.</description>
46593                  <value>#0</value>
46594                </enumeratedValue>
46595                <enumeratedValue>
46596                  <name>1</name>
46597                  <description>A channel event has occurred.</description>
46598                  <value>#1</value>
46599                </enumeratedValue>
46600              </enumeratedValues>
46601            </field>
46602            <field>
46603              <name>CH7F</name>
46604              <description>Channel 7 Flag</description>
46605              <bitOffset>7</bitOffset>
46606              <bitWidth>1</bitWidth>
46607              <access>read-write</access>
46608              <enumeratedValues>
46609                <enumeratedValue>
46610                  <name>0</name>
46611                  <description>No channel event has occurred.</description>
46612                  <value>#0</value>
46613                </enumeratedValue>
46614                <enumeratedValue>
46615                  <name>1</name>
46616                  <description>A channel event has occurred.</description>
46617                  <value>#1</value>
46618                </enumeratedValue>
46619              </enumeratedValues>
46620            </field>
46621          </fields>
46622        </register>
46623        <register>
46624          <name>MODE</name>
46625          <description>Features Mode Selection</description>
46626          <addressOffset>0x54</addressOffset>
46627          <size>32</size>
46628          <access>read-write</access>
46629          <resetValue>0x4</resetValue>
46630          <resetMask>0xFFFFFFFF</resetMask>
46631          <fields>
46632            <field>
46633              <name>FTMEN</name>
46634              <description>FTM Enable</description>
46635              <bitOffset>0</bitOffset>
46636              <bitWidth>1</bitWidth>
46637              <access>read-write</access>
46638              <enumeratedValues>
46639                <enumeratedValue>
46640                  <name>0</name>
46641                  <description>TPM compatibility. Free running counter and synchronization compatible with TPM.</description>
46642                  <value>#0</value>
46643                </enumeratedValue>
46644                <enumeratedValue>
46645                  <name>1</name>
46646                  <description>Free running counter and synchronization are different from TPM behavior.</description>
46647                  <value>#1</value>
46648                </enumeratedValue>
46649              </enumeratedValues>
46650            </field>
46651            <field>
46652              <name>INIT</name>
46653              <description>Initialize The Channels Output</description>
46654              <bitOffset>1</bitOffset>
46655              <bitWidth>1</bitWidth>
46656              <access>read-write</access>
46657            </field>
46658            <field>
46659              <name>WPDIS</name>
46660              <description>Write Protection Disable</description>
46661              <bitOffset>2</bitOffset>
46662              <bitWidth>1</bitWidth>
46663              <access>read-write</access>
46664              <enumeratedValues>
46665                <enumeratedValue>
46666                  <name>0</name>
46667                  <description>Write protection is enabled.</description>
46668                  <value>#0</value>
46669                </enumeratedValue>
46670                <enumeratedValue>
46671                  <name>1</name>
46672                  <description>Write protection is disabled.</description>
46673                  <value>#1</value>
46674                </enumeratedValue>
46675              </enumeratedValues>
46676            </field>
46677            <field>
46678              <name>PWMSYNC</name>
46679              <description>PWM Synchronization Mode</description>
46680              <bitOffset>3</bitOffset>
46681              <bitWidth>1</bitWidth>
46682              <access>read-write</access>
46683              <enumeratedValues>
46684                <enumeratedValue>
46685                  <name>0</name>
46686                  <description>No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization.</description>
46687                  <value>#0</value>
46688                </enumeratedValue>
46689                <enumeratedValue>
46690                  <name>1</name>
46691                  <description>Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization.</description>
46692                  <value>#1</value>
46693                </enumeratedValue>
46694              </enumeratedValues>
46695            </field>
46696            <field>
46697              <name>CAPTEST</name>
46698              <description>Capture Test Mode Enable</description>
46699              <bitOffset>4</bitOffset>
46700              <bitWidth>1</bitWidth>
46701              <access>read-write</access>
46702              <enumeratedValues>
46703                <enumeratedValue>
46704                  <name>0</name>
46705                  <description>Capture test mode is disabled.</description>
46706                  <value>#0</value>
46707                </enumeratedValue>
46708                <enumeratedValue>
46709                  <name>1</name>
46710                  <description>Capture test mode is enabled.</description>
46711                  <value>#1</value>
46712                </enumeratedValue>
46713              </enumeratedValues>
46714            </field>
46715            <field>
46716              <name>FAULTM</name>
46717              <description>Fault Control Mode</description>
46718              <bitOffset>5</bitOffset>
46719              <bitWidth>2</bitWidth>
46720              <access>read-write</access>
46721              <enumeratedValues>
46722                <enumeratedValue>
46723                  <name>00</name>
46724                  <description>Fault control is disabled for all channels.</description>
46725                  <value>#00</value>
46726                </enumeratedValue>
46727                <enumeratedValue>
46728                  <name>01</name>
46729                  <description>Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing.</description>
46730                  <value>#01</value>
46731                </enumeratedValue>
46732                <enumeratedValue>
46733                  <name>10</name>
46734                  <description>Fault control is enabled for all channels, and the selected mode is the manual fault clearing.</description>
46735                  <value>#10</value>
46736                </enumeratedValue>
46737                <enumeratedValue>
46738                  <name>11</name>
46739                  <description>Fault control is enabled for all channels, and the selected mode is the automatic fault clearing.</description>
46740                  <value>#11</value>
46741                </enumeratedValue>
46742              </enumeratedValues>
46743            </field>
46744            <field>
46745              <name>FAULTIE</name>
46746              <description>Fault Interrupt Enable</description>
46747              <bitOffset>7</bitOffset>
46748              <bitWidth>1</bitWidth>
46749              <access>read-write</access>
46750              <enumeratedValues>
46751                <enumeratedValue>
46752                  <name>0</name>
46753                  <description>Fault control interrupt is disabled.</description>
46754                  <value>#0</value>
46755                </enumeratedValue>
46756                <enumeratedValue>
46757                  <name>1</name>
46758                  <description>Fault control interrupt is enabled.</description>
46759                  <value>#1</value>
46760                </enumeratedValue>
46761              </enumeratedValues>
46762            </field>
46763          </fields>
46764        </register>
46765        <register>
46766          <name>SYNC</name>
46767          <description>Synchronization</description>
46768          <addressOffset>0x58</addressOffset>
46769          <size>32</size>
46770          <access>read-write</access>
46771          <resetValue>0</resetValue>
46772          <resetMask>0xFFFFFFFF</resetMask>
46773          <fields>
46774            <field>
46775              <name>CNTMIN</name>
46776              <description>Minimum Loading Point Enable</description>
46777              <bitOffset>0</bitOffset>
46778              <bitWidth>1</bitWidth>
46779              <access>read-write</access>
46780              <enumeratedValues>
46781                <enumeratedValue>
46782                  <name>0</name>
46783                  <description>The minimum loading point is disabled.</description>
46784                  <value>#0</value>
46785                </enumeratedValue>
46786                <enumeratedValue>
46787                  <name>1</name>
46788                  <description>The minimum loading point is enabled.</description>
46789                  <value>#1</value>
46790                </enumeratedValue>
46791              </enumeratedValues>
46792            </field>
46793            <field>
46794              <name>CNTMAX</name>
46795              <description>Maximum Loading Point Enable</description>
46796              <bitOffset>1</bitOffset>
46797              <bitWidth>1</bitWidth>
46798              <access>read-write</access>
46799              <enumeratedValues>
46800                <enumeratedValue>
46801                  <name>0</name>
46802                  <description>The maximum loading point is disabled.</description>
46803                  <value>#0</value>
46804                </enumeratedValue>
46805                <enumeratedValue>
46806                  <name>1</name>
46807                  <description>The maximum loading point is enabled.</description>
46808                  <value>#1</value>
46809                </enumeratedValue>
46810              </enumeratedValues>
46811            </field>
46812            <field>
46813              <name>REINIT</name>
46814              <description>FTM Counter Reinitialization By Synchronization (FTM counter synchronization)</description>
46815              <bitOffset>2</bitOffset>
46816              <bitWidth>1</bitWidth>
46817              <access>read-write</access>
46818              <enumeratedValues>
46819                <enumeratedValue>
46820                  <name>0</name>
46821                  <description>FTM counter continues to count normally.</description>
46822                  <value>#0</value>
46823                </enumeratedValue>
46824                <enumeratedValue>
46825                  <name>1</name>
46826                  <description>FTM counter is updated with its initial value when the selected trigger is detected.</description>
46827                  <value>#1</value>
46828                </enumeratedValue>
46829              </enumeratedValues>
46830            </field>
46831            <field>
46832              <name>SYNCHOM</name>
46833              <description>Output Mask Synchronization</description>
46834              <bitOffset>3</bitOffset>
46835              <bitWidth>1</bitWidth>
46836              <access>read-write</access>
46837              <enumeratedValues>
46838                <enumeratedValue>
46839                  <name>0</name>
46840                  <description>OUTMASK register is updated with the value of its buffer in all rising edges of the system clock.</description>
46841                  <value>#0</value>
46842                </enumeratedValue>
46843                <enumeratedValue>
46844                  <name>1</name>
46845                  <description>OUTMASK register is updated with the value of its buffer only by the PWM synchronization.</description>
46846                  <value>#1</value>
46847                </enumeratedValue>
46848              </enumeratedValues>
46849            </field>
46850            <field>
46851              <name>TRIG0</name>
46852              <description>PWM Synchronization Hardware Trigger 0</description>
46853              <bitOffset>4</bitOffset>
46854              <bitWidth>1</bitWidth>
46855              <access>read-write</access>
46856              <enumeratedValues>
46857                <enumeratedValue>
46858                  <name>0</name>
46859                  <description>Trigger is disabled.</description>
46860                  <value>#0</value>
46861                </enumeratedValue>
46862                <enumeratedValue>
46863                  <name>1</name>
46864                  <description>Trigger is enabled.</description>
46865                  <value>#1</value>
46866                </enumeratedValue>
46867              </enumeratedValues>
46868            </field>
46869            <field>
46870              <name>TRIG1</name>
46871              <description>PWM Synchronization Hardware Trigger 1</description>
46872              <bitOffset>5</bitOffset>
46873              <bitWidth>1</bitWidth>
46874              <access>read-write</access>
46875              <enumeratedValues>
46876                <enumeratedValue>
46877                  <name>0</name>
46878                  <description>Trigger is disabled.</description>
46879                  <value>#0</value>
46880                </enumeratedValue>
46881                <enumeratedValue>
46882                  <name>1</name>
46883                  <description>Trigger is enabled.</description>
46884                  <value>#1</value>
46885                </enumeratedValue>
46886              </enumeratedValues>
46887            </field>
46888            <field>
46889              <name>TRIG2</name>
46890              <description>PWM Synchronization Hardware Trigger 2</description>
46891              <bitOffset>6</bitOffset>
46892              <bitWidth>1</bitWidth>
46893              <access>read-write</access>
46894              <enumeratedValues>
46895                <enumeratedValue>
46896                  <name>0</name>
46897                  <description>Trigger is disabled.</description>
46898                  <value>#0</value>
46899                </enumeratedValue>
46900                <enumeratedValue>
46901                  <name>1</name>
46902                  <description>Trigger is enabled.</description>
46903                  <value>#1</value>
46904                </enumeratedValue>
46905              </enumeratedValues>
46906            </field>
46907            <field>
46908              <name>SWSYNC</name>
46909              <description>PWM Synchronization Software Trigger</description>
46910              <bitOffset>7</bitOffset>
46911              <bitWidth>1</bitWidth>
46912              <access>read-write</access>
46913              <enumeratedValues>
46914                <enumeratedValue>
46915                  <name>0</name>
46916                  <description>Software trigger is not selected.</description>
46917                  <value>#0</value>
46918                </enumeratedValue>
46919                <enumeratedValue>
46920                  <name>1</name>
46921                  <description>Software trigger is selected.</description>
46922                  <value>#1</value>
46923                </enumeratedValue>
46924              </enumeratedValues>
46925            </field>
46926          </fields>
46927        </register>
46928        <register>
46929          <name>OUTINIT</name>
46930          <description>Initial State For Channels Output</description>
46931          <addressOffset>0x5C</addressOffset>
46932          <size>32</size>
46933          <access>read-write</access>
46934          <resetValue>0</resetValue>
46935          <resetMask>0xFFFFFFFF</resetMask>
46936          <fields>
46937            <field>
46938              <name>CH0OI</name>
46939              <description>Channel 0 Output Initialization Value</description>
46940              <bitOffset>0</bitOffset>
46941              <bitWidth>1</bitWidth>
46942              <access>read-write</access>
46943              <enumeratedValues>
46944                <enumeratedValue>
46945                  <name>0</name>
46946                  <description>The initialization value is 0.</description>
46947                  <value>#0</value>
46948                </enumeratedValue>
46949                <enumeratedValue>
46950                  <name>1</name>
46951                  <description>The initialization value is 1.</description>
46952                  <value>#1</value>
46953                </enumeratedValue>
46954              </enumeratedValues>
46955            </field>
46956            <field>
46957              <name>CH1OI</name>
46958              <description>Channel 1 Output Initialization Value</description>
46959              <bitOffset>1</bitOffset>
46960              <bitWidth>1</bitWidth>
46961              <access>read-write</access>
46962              <enumeratedValues>
46963                <enumeratedValue>
46964                  <name>0</name>
46965                  <description>The initialization value is 0.</description>
46966                  <value>#0</value>
46967                </enumeratedValue>
46968                <enumeratedValue>
46969                  <name>1</name>
46970                  <description>The initialization value is 1.</description>
46971                  <value>#1</value>
46972                </enumeratedValue>
46973              </enumeratedValues>
46974            </field>
46975            <field>
46976              <name>CH2OI</name>
46977              <description>Channel 2 Output Initialization Value</description>
46978              <bitOffset>2</bitOffset>
46979              <bitWidth>1</bitWidth>
46980              <access>read-write</access>
46981              <enumeratedValues>
46982                <enumeratedValue>
46983                  <name>0</name>
46984                  <description>The initialization value is 0.</description>
46985                  <value>#0</value>
46986                </enumeratedValue>
46987                <enumeratedValue>
46988                  <name>1</name>
46989                  <description>The initialization value is 1.</description>
46990                  <value>#1</value>
46991                </enumeratedValue>
46992              </enumeratedValues>
46993            </field>
46994            <field>
46995              <name>CH3OI</name>
46996              <description>Channel 3 Output Initialization Value</description>
46997              <bitOffset>3</bitOffset>
46998              <bitWidth>1</bitWidth>
46999              <access>read-write</access>
47000              <enumeratedValues>
47001                <enumeratedValue>
47002                  <name>0</name>
47003                  <description>The initialization value is 0.</description>
47004                  <value>#0</value>
47005                </enumeratedValue>
47006                <enumeratedValue>
47007                  <name>1</name>
47008                  <description>The initialization value is 1.</description>
47009                  <value>#1</value>
47010                </enumeratedValue>
47011              </enumeratedValues>
47012            </field>
47013            <field>
47014              <name>CH4OI</name>
47015              <description>Channel 4 Output Initialization Value</description>
47016              <bitOffset>4</bitOffset>
47017              <bitWidth>1</bitWidth>
47018              <access>read-write</access>
47019              <enumeratedValues>
47020                <enumeratedValue>
47021                  <name>0</name>
47022                  <description>The initialization value is 0.</description>
47023                  <value>#0</value>
47024                </enumeratedValue>
47025                <enumeratedValue>
47026                  <name>1</name>
47027                  <description>The initialization value is 1.</description>
47028                  <value>#1</value>
47029                </enumeratedValue>
47030              </enumeratedValues>
47031            </field>
47032            <field>
47033              <name>CH5OI</name>
47034              <description>Channel 5 Output Initialization Value</description>
47035              <bitOffset>5</bitOffset>
47036              <bitWidth>1</bitWidth>
47037              <access>read-write</access>
47038              <enumeratedValues>
47039                <enumeratedValue>
47040                  <name>0</name>
47041                  <description>The initialization value is 0.</description>
47042                  <value>#0</value>
47043                </enumeratedValue>
47044                <enumeratedValue>
47045                  <name>1</name>
47046                  <description>The initialization value is 1.</description>
47047                  <value>#1</value>
47048                </enumeratedValue>
47049              </enumeratedValues>
47050            </field>
47051            <field>
47052              <name>CH6OI</name>
47053              <description>Channel 6 Output Initialization Value</description>
47054              <bitOffset>6</bitOffset>
47055              <bitWidth>1</bitWidth>
47056              <access>read-write</access>
47057              <enumeratedValues>
47058                <enumeratedValue>
47059                  <name>0</name>
47060                  <description>The initialization value is 0.</description>
47061                  <value>#0</value>
47062                </enumeratedValue>
47063                <enumeratedValue>
47064                  <name>1</name>
47065                  <description>The initialization value is 1.</description>
47066                  <value>#1</value>
47067                </enumeratedValue>
47068              </enumeratedValues>
47069            </field>
47070            <field>
47071              <name>CH7OI</name>
47072              <description>Channel 7 Output Initialization Value</description>
47073              <bitOffset>7</bitOffset>
47074              <bitWidth>1</bitWidth>
47075              <access>read-write</access>
47076              <enumeratedValues>
47077                <enumeratedValue>
47078                  <name>0</name>
47079                  <description>The initialization value is 0.</description>
47080                  <value>#0</value>
47081                </enumeratedValue>
47082                <enumeratedValue>
47083                  <name>1</name>
47084                  <description>The initialization value is 1.</description>
47085                  <value>#1</value>
47086                </enumeratedValue>
47087              </enumeratedValues>
47088            </field>
47089          </fields>
47090        </register>
47091        <register>
47092          <name>OUTMASK</name>
47093          <description>Output Mask</description>
47094          <addressOffset>0x60</addressOffset>
47095          <size>32</size>
47096          <access>read-write</access>
47097          <resetValue>0</resetValue>
47098          <resetMask>0xFFFFFFFF</resetMask>
47099          <fields>
47100            <field>
47101              <name>CH0OM</name>
47102              <description>Channel 0 Output Mask</description>
47103              <bitOffset>0</bitOffset>
47104              <bitWidth>1</bitWidth>
47105              <access>read-write</access>
47106              <enumeratedValues>
47107                <enumeratedValue>
47108                  <name>0</name>
47109                  <description>Channel output is not masked. It continues to operate normally.</description>
47110                  <value>#0</value>
47111                </enumeratedValue>
47112                <enumeratedValue>
47113                  <name>1</name>
47114                  <description>Channel output is masked. It is forced to its inactive state.</description>
47115                  <value>#1</value>
47116                </enumeratedValue>
47117              </enumeratedValues>
47118            </field>
47119            <field>
47120              <name>CH1OM</name>
47121              <description>Channel 1 Output Mask</description>
47122              <bitOffset>1</bitOffset>
47123              <bitWidth>1</bitWidth>
47124              <access>read-write</access>
47125              <enumeratedValues>
47126                <enumeratedValue>
47127                  <name>0</name>
47128                  <description>Channel output is not masked. It continues to operate normally.</description>
47129                  <value>#0</value>
47130                </enumeratedValue>
47131                <enumeratedValue>
47132                  <name>1</name>
47133                  <description>Channel output is masked. It is forced to its inactive state.</description>
47134                  <value>#1</value>
47135                </enumeratedValue>
47136              </enumeratedValues>
47137            </field>
47138            <field>
47139              <name>CH2OM</name>
47140              <description>Channel 2 Output Mask</description>
47141              <bitOffset>2</bitOffset>
47142              <bitWidth>1</bitWidth>
47143              <access>read-write</access>
47144              <enumeratedValues>
47145                <enumeratedValue>
47146                  <name>0</name>
47147                  <description>Channel output is not masked. It continues to operate normally.</description>
47148                  <value>#0</value>
47149                </enumeratedValue>
47150                <enumeratedValue>
47151                  <name>1</name>
47152                  <description>Channel output is masked. It is forced to its inactive state.</description>
47153                  <value>#1</value>
47154                </enumeratedValue>
47155              </enumeratedValues>
47156            </field>
47157            <field>
47158              <name>CH3OM</name>
47159              <description>Channel 3 Output Mask</description>
47160              <bitOffset>3</bitOffset>
47161              <bitWidth>1</bitWidth>
47162              <access>read-write</access>
47163              <enumeratedValues>
47164                <enumeratedValue>
47165                  <name>0</name>
47166                  <description>Channel output is not masked. It continues to operate normally.</description>
47167                  <value>#0</value>
47168                </enumeratedValue>
47169                <enumeratedValue>
47170                  <name>1</name>
47171                  <description>Channel output is masked. It is forced to its inactive state.</description>
47172                  <value>#1</value>
47173                </enumeratedValue>
47174              </enumeratedValues>
47175            </field>
47176            <field>
47177              <name>CH4OM</name>
47178              <description>Channel 4 Output Mask</description>
47179              <bitOffset>4</bitOffset>
47180              <bitWidth>1</bitWidth>
47181              <access>read-write</access>
47182              <enumeratedValues>
47183                <enumeratedValue>
47184                  <name>0</name>
47185                  <description>Channel output is not masked. It continues to operate normally.</description>
47186                  <value>#0</value>
47187                </enumeratedValue>
47188                <enumeratedValue>
47189                  <name>1</name>
47190                  <description>Channel output is masked. It is forced to its inactive state.</description>
47191                  <value>#1</value>
47192                </enumeratedValue>
47193              </enumeratedValues>
47194            </field>
47195            <field>
47196              <name>CH5OM</name>
47197              <description>Channel 5 Output Mask</description>
47198              <bitOffset>5</bitOffset>
47199              <bitWidth>1</bitWidth>
47200              <access>read-write</access>
47201              <enumeratedValues>
47202                <enumeratedValue>
47203                  <name>0</name>
47204                  <description>Channel output is not masked. It continues to operate normally.</description>
47205                  <value>#0</value>
47206                </enumeratedValue>
47207                <enumeratedValue>
47208                  <name>1</name>
47209                  <description>Channel output is masked. It is forced to its inactive state.</description>
47210                  <value>#1</value>
47211                </enumeratedValue>
47212              </enumeratedValues>
47213            </field>
47214            <field>
47215              <name>CH6OM</name>
47216              <description>Channel 6 Output Mask</description>
47217              <bitOffset>6</bitOffset>
47218              <bitWidth>1</bitWidth>
47219              <access>read-write</access>
47220              <enumeratedValues>
47221                <enumeratedValue>
47222                  <name>0</name>
47223                  <description>Channel output is not masked. It continues to operate normally.</description>
47224                  <value>#0</value>
47225                </enumeratedValue>
47226                <enumeratedValue>
47227                  <name>1</name>
47228                  <description>Channel output is masked. It is forced to its inactive state.</description>
47229                  <value>#1</value>
47230                </enumeratedValue>
47231              </enumeratedValues>
47232            </field>
47233            <field>
47234              <name>CH7OM</name>
47235              <description>Channel 7 Output Mask</description>
47236              <bitOffset>7</bitOffset>
47237              <bitWidth>1</bitWidth>
47238              <access>read-write</access>
47239              <enumeratedValues>
47240                <enumeratedValue>
47241                  <name>0</name>
47242                  <description>Channel output is not masked. It continues to operate normally.</description>
47243                  <value>#0</value>
47244                </enumeratedValue>
47245                <enumeratedValue>
47246                  <name>1</name>
47247                  <description>Channel output is masked. It is forced to its inactive state.</description>
47248                  <value>#1</value>
47249                </enumeratedValue>
47250              </enumeratedValues>
47251            </field>
47252          </fields>
47253        </register>
47254        <register>
47255          <name>COMBINE</name>
47256          <description>Function For Linked Channels</description>
47257          <addressOffset>0x64</addressOffset>
47258          <size>32</size>
47259          <access>read-write</access>
47260          <resetValue>0</resetValue>
47261          <resetMask>0xFFFFFFFF</resetMask>
47262          <fields>
47263            <field>
47264              <name>COMBINE0</name>
47265              <description>Combine Channels For n = 0</description>
47266              <bitOffset>0</bitOffset>
47267              <bitWidth>1</bitWidth>
47268              <access>read-write</access>
47269              <enumeratedValues>
47270                <enumeratedValue>
47271                  <name>0</name>
47272                  <description>Channels (n) and (n+1) are independent.</description>
47273                  <value>#0</value>
47274                </enumeratedValue>
47275                <enumeratedValue>
47276                  <name>1</name>
47277                  <description>Channels (n) and (n+1) are combined.</description>
47278                  <value>#1</value>
47279                </enumeratedValue>
47280              </enumeratedValues>
47281            </field>
47282            <field>
47283              <name>COMP0</name>
47284              <description>Complement Of Channel (n) For n = 0</description>
47285              <bitOffset>1</bitOffset>
47286              <bitWidth>1</bitWidth>
47287              <access>read-write</access>
47288              <enumeratedValues>
47289                <enumeratedValue>
47290                  <name>0</name>
47291                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
47292                  <value>#0</value>
47293                </enumeratedValue>
47294                <enumeratedValue>
47295                  <name>1</name>
47296                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
47297                  <value>#1</value>
47298                </enumeratedValue>
47299              </enumeratedValues>
47300            </field>
47301            <field>
47302              <name>DECAPEN0</name>
47303              <description>Dual Edge Capture Mode Enable For n = 0</description>
47304              <bitOffset>2</bitOffset>
47305              <bitWidth>1</bitWidth>
47306              <access>read-write</access>
47307              <enumeratedValues>
47308                <enumeratedValue>
47309                  <name>0</name>
47310                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
47311                  <value>#0</value>
47312                </enumeratedValue>
47313                <enumeratedValue>
47314                  <name>1</name>
47315                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
47316                  <value>#1</value>
47317                </enumeratedValue>
47318              </enumeratedValues>
47319            </field>
47320            <field>
47321              <name>DECAP0</name>
47322              <description>Dual Edge Capture Mode Captures For n = 0</description>
47323              <bitOffset>3</bitOffset>
47324              <bitWidth>1</bitWidth>
47325              <access>read-write</access>
47326              <enumeratedValues>
47327                <enumeratedValue>
47328                  <name>0</name>
47329                  <description>The dual edge captures are inactive.</description>
47330                  <value>#0</value>
47331                </enumeratedValue>
47332                <enumeratedValue>
47333                  <name>1</name>
47334                  <description>The dual edge captures are active.</description>
47335                  <value>#1</value>
47336                </enumeratedValue>
47337              </enumeratedValues>
47338            </field>
47339            <field>
47340              <name>DTEN0</name>
47341              <description>Deadtime Enable For n = 0</description>
47342              <bitOffset>4</bitOffset>
47343              <bitWidth>1</bitWidth>
47344              <access>read-write</access>
47345              <enumeratedValues>
47346                <enumeratedValue>
47347                  <name>0</name>
47348                  <description>The deadtime insertion in this pair of channels is disabled.</description>
47349                  <value>#0</value>
47350                </enumeratedValue>
47351                <enumeratedValue>
47352                  <name>1</name>
47353                  <description>The deadtime insertion in this pair of channels is enabled.</description>
47354                  <value>#1</value>
47355                </enumeratedValue>
47356              </enumeratedValues>
47357            </field>
47358            <field>
47359              <name>SYNCEN0</name>
47360              <description>Synchronization Enable For n = 0</description>
47361              <bitOffset>5</bitOffset>
47362              <bitWidth>1</bitWidth>
47363              <access>read-write</access>
47364              <enumeratedValues>
47365                <enumeratedValue>
47366                  <name>0</name>
47367                  <description>The PWM synchronization in this pair of channels is disabled.</description>
47368                  <value>#0</value>
47369                </enumeratedValue>
47370                <enumeratedValue>
47371                  <name>1</name>
47372                  <description>The PWM synchronization in this pair of channels is enabled.</description>
47373                  <value>#1</value>
47374                </enumeratedValue>
47375              </enumeratedValues>
47376            </field>
47377            <field>
47378              <name>FAULTEN0</name>
47379              <description>Fault Control Enable For n = 0</description>
47380              <bitOffset>6</bitOffset>
47381              <bitWidth>1</bitWidth>
47382              <access>read-write</access>
47383              <enumeratedValues>
47384                <enumeratedValue>
47385                  <name>0</name>
47386                  <description>The fault control in this pair of channels is disabled.</description>
47387                  <value>#0</value>
47388                </enumeratedValue>
47389                <enumeratedValue>
47390                  <name>1</name>
47391                  <description>The fault control in this pair of channels is enabled.</description>
47392                  <value>#1</value>
47393                </enumeratedValue>
47394              </enumeratedValues>
47395            </field>
47396            <field>
47397              <name>COMBINE1</name>
47398              <description>Combine Channels For n = 2</description>
47399              <bitOffset>8</bitOffset>
47400              <bitWidth>1</bitWidth>
47401              <access>read-write</access>
47402              <enumeratedValues>
47403                <enumeratedValue>
47404                  <name>0</name>
47405                  <description>Channels (n) and (n+1) are independent.</description>
47406                  <value>#0</value>
47407                </enumeratedValue>
47408                <enumeratedValue>
47409                  <name>1</name>
47410                  <description>Channels (n) and (n+1) are combined.</description>
47411                  <value>#1</value>
47412                </enumeratedValue>
47413              </enumeratedValues>
47414            </field>
47415            <field>
47416              <name>COMP1</name>
47417              <description>Complement Of Channel (n) For n = 2</description>
47418              <bitOffset>9</bitOffset>
47419              <bitWidth>1</bitWidth>
47420              <access>read-write</access>
47421              <enumeratedValues>
47422                <enumeratedValue>
47423                  <name>0</name>
47424                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
47425                  <value>#0</value>
47426                </enumeratedValue>
47427                <enumeratedValue>
47428                  <name>1</name>
47429                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
47430                  <value>#1</value>
47431                </enumeratedValue>
47432              </enumeratedValues>
47433            </field>
47434            <field>
47435              <name>DECAPEN1</name>
47436              <description>Dual Edge Capture Mode Enable For n = 2</description>
47437              <bitOffset>10</bitOffset>
47438              <bitWidth>1</bitWidth>
47439              <access>read-write</access>
47440              <enumeratedValues>
47441                <enumeratedValue>
47442                  <name>0</name>
47443                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
47444                  <value>#0</value>
47445                </enumeratedValue>
47446                <enumeratedValue>
47447                  <name>1</name>
47448                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
47449                  <value>#1</value>
47450                </enumeratedValue>
47451              </enumeratedValues>
47452            </field>
47453            <field>
47454              <name>DECAP1</name>
47455              <description>Dual Edge Capture Mode Captures For n = 2</description>
47456              <bitOffset>11</bitOffset>
47457              <bitWidth>1</bitWidth>
47458              <access>read-write</access>
47459              <enumeratedValues>
47460                <enumeratedValue>
47461                  <name>0</name>
47462                  <description>The dual edge captures are inactive.</description>
47463                  <value>#0</value>
47464                </enumeratedValue>
47465                <enumeratedValue>
47466                  <name>1</name>
47467                  <description>The dual edge captures are active.</description>
47468                  <value>#1</value>
47469                </enumeratedValue>
47470              </enumeratedValues>
47471            </field>
47472            <field>
47473              <name>DTEN1</name>
47474              <description>Deadtime Enable For n = 2</description>
47475              <bitOffset>12</bitOffset>
47476              <bitWidth>1</bitWidth>
47477              <access>read-write</access>
47478              <enumeratedValues>
47479                <enumeratedValue>
47480                  <name>0</name>
47481                  <description>The deadtime insertion in this pair of channels is disabled.</description>
47482                  <value>#0</value>
47483                </enumeratedValue>
47484                <enumeratedValue>
47485                  <name>1</name>
47486                  <description>The deadtime insertion in this pair of channels is enabled.</description>
47487                  <value>#1</value>
47488                </enumeratedValue>
47489              </enumeratedValues>
47490            </field>
47491            <field>
47492              <name>SYNCEN1</name>
47493              <description>Synchronization Enable For n = 2</description>
47494              <bitOffset>13</bitOffset>
47495              <bitWidth>1</bitWidth>
47496              <access>read-write</access>
47497              <enumeratedValues>
47498                <enumeratedValue>
47499                  <name>0</name>
47500                  <description>The PWM synchronization in this pair of channels is disabled.</description>
47501                  <value>#0</value>
47502                </enumeratedValue>
47503                <enumeratedValue>
47504                  <name>1</name>
47505                  <description>The PWM synchronization in this pair of channels is enabled.</description>
47506                  <value>#1</value>
47507                </enumeratedValue>
47508              </enumeratedValues>
47509            </field>
47510            <field>
47511              <name>FAULTEN1</name>
47512              <description>Fault Control Enable For n = 2</description>
47513              <bitOffset>14</bitOffset>
47514              <bitWidth>1</bitWidth>
47515              <access>read-write</access>
47516              <enumeratedValues>
47517                <enumeratedValue>
47518                  <name>0</name>
47519                  <description>The fault control in this pair of channels is disabled.</description>
47520                  <value>#0</value>
47521                </enumeratedValue>
47522                <enumeratedValue>
47523                  <name>1</name>
47524                  <description>The fault control in this pair of channels is enabled.</description>
47525                  <value>#1</value>
47526                </enumeratedValue>
47527              </enumeratedValues>
47528            </field>
47529            <field>
47530              <name>COMBINE2</name>
47531              <description>Combine Channels For n = 4</description>
47532              <bitOffset>16</bitOffset>
47533              <bitWidth>1</bitWidth>
47534              <access>read-write</access>
47535              <enumeratedValues>
47536                <enumeratedValue>
47537                  <name>0</name>
47538                  <description>Channels (n) and (n+1) are independent.</description>
47539                  <value>#0</value>
47540                </enumeratedValue>
47541                <enumeratedValue>
47542                  <name>1</name>
47543                  <description>Channels (n) and (n+1) are combined.</description>
47544                  <value>#1</value>
47545                </enumeratedValue>
47546              </enumeratedValues>
47547            </field>
47548            <field>
47549              <name>COMP2</name>
47550              <description>Complement Of Channel (n) For n = 4</description>
47551              <bitOffset>17</bitOffset>
47552              <bitWidth>1</bitWidth>
47553              <access>read-write</access>
47554              <enumeratedValues>
47555                <enumeratedValue>
47556                  <name>0</name>
47557                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
47558                  <value>#0</value>
47559                </enumeratedValue>
47560                <enumeratedValue>
47561                  <name>1</name>
47562                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
47563                  <value>#1</value>
47564                </enumeratedValue>
47565              </enumeratedValues>
47566            </field>
47567            <field>
47568              <name>DECAPEN2</name>
47569              <description>Dual Edge Capture Mode Enable For n = 4</description>
47570              <bitOffset>18</bitOffset>
47571              <bitWidth>1</bitWidth>
47572              <access>read-write</access>
47573              <enumeratedValues>
47574                <enumeratedValue>
47575                  <name>0</name>
47576                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
47577                  <value>#0</value>
47578                </enumeratedValue>
47579                <enumeratedValue>
47580                  <name>1</name>
47581                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
47582                  <value>#1</value>
47583                </enumeratedValue>
47584              </enumeratedValues>
47585            </field>
47586            <field>
47587              <name>DECAP2</name>
47588              <description>Dual Edge Capture Mode Captures For n = 4</description>
47589              <bitOffset>19</bitOffset>
47590              <bitWidth>1</bitWidth>
47591              <access>read-write</access>
47592              <enumeratedValues>
47593                <enumeratedValue>
47594                  <name>0</name>
47595                  <description>The dual edge captures are inactive.</description>
47596                  <value>#0</value>
47597                </enumeratedValue>
47598                <enumeratedValue>
47599                  <name>1</name>
47600                  <description>The dual edge captures are active.</description>
47601                  <value>#1</value>
47602                </enumeratedValue>
47603              </enumeratedValues>
47604            </field>
47605            <field>
47606              <name>DTEN2</name>
47607              <description>Deadtime Enable For n = 4</description>
47608              <bitOffset>20</bitOffset>
47609              <bitWidth>1</bitWidth>
47610              <access>read-write</access>
47611              <enumeratedValues>
47612                <enumeratedValue>
47613                  <name>0</name>
47614                  <description>The deadtime insertion in this pair of channels is disabled.</description>
47615                  <value>#0</value>
47616                </enumeratedValue>
47617                <enumeratedValue>
47618                  <name>1</name>
47619                  <description>The deadtime insertion in this pair of channels is enabled.</description>
47620                  <value>#1</value>
47621                </enumeratedValue>
47622              </enumeratedValues>
47623            </field>
47624            <field>
47625              <name>SYNCEN2</name>
47626              <description>Synchronization Enable For n = 4</description>
47627              <bitOffset>21</bitOffset>
47628              <bitWidth>1</bitWidth>
47629              <access>read-write</access>
47630              <enumeratedValues>
47631                <enumeratedValue>
47632                  <name>0</name>
47633                  <description>The PWM synchronization in this pair of channels is disabled.</description>
47634                  <value>#0</value>
47635                </enumeratedValue>
47636                <enumeratedValue>
47637                  <name>1</name>
47638                  <description>The PWM synchronization in this pair of channels is enabled.</description>
47639                  <value>#1</value>
47640                </enumeratedValue>
47641              </enumeratedValues>
47642            </field>
47643            <field>
47644              <name>FAULTEN2</name>
47645              <description>Fault Control Enable For n = 4</description>
47646              <bitOffset>22</bitOffset>
47647              <bitWidth>1</bitWidth>
47648              <access>read-write</access>
47649              <enumeratedValues>
47650                <enumeratedValue>
47651                  <name>0</name>
47652                  <description>The fault control in this pair of channels is disabled.</description>
47653                  <value>#0</value>
47654                </enumeratedValue>
47655                <enumeratedValue>
47656                  <name>1</name>
47657                  <description>The fault control in this pair of channels is enabled.</description>
47658                  <value>#1</value>
47659                </enumeratedValue>
47660              </enumeratedValues>
47661            </field>
47662            <field>
47663              <name>COMBINE3</name>
47664              <description>Combine Channels For n = 6</description>
47665              <bitOffset>24</bitOffset>
47666              <bitWidth>1</bitWidth>
47667              <access>read-write</access>
47668              <enumeratedValues>
47669                <enumeratedValue>
47670                  <name>0</name>
47671                  <description>Channels (n) and (n+1) are independent.</description>
47672                  <value>#0</value>
47673                </enumeratedValue>
47674                <enumeratedValue>
47675                  <name>1</name>
47676                  <description>Channels (n) and (n+1) are combined.</description>
47677                  <value>#1</value>
47678                </enumeratedValue>
47679              </enumeratedValues>
47680            </field>
47681            <field>
47682              <name>COMP3</name>
47683              <description>Complement Of Channel (n) for n = 6</description>
47684              <bitOffset>25</bitOffset>
47685              <bitWidth>1</bitWidth>
47686              <access>read-write</access>
47687              <enumeratedValues>
47688                <enumeratedValue>
47689                  <name>0</name>
47690                  <description>The channel (n+1) output is the same as the channel (n) output.</description>
47691                  <value>#0</value>
47692                </enumeratedValue>
47693                <enumeratedValue>
47694                  <name>1</name>
47695                  <description>The channel (n+1) output is the complement of the channel (n) output.</description>
47696                  <value>#1</value>
47697                </enumeratedValue>
47698              </enumeratedValues>
47699            </field>
47700            <field>
47701              <name>DECAPEN3</name>
47702              <description>Dual Edge Capture Mode Enable For n = 6</description>
47703              <bitOffset>26</bitOffset>
47704              <bitWidth>1</bitWidth>
47705              <access>read-write</access>
47706              <enumeratedValues>
47707                <enumeratedValue>
47708                  <name>0</name>
47709                  <description>The Dual Edge Capture mode in this pair of channels is disabled.</description>
47710                  <value>#0</value>
47711                </enumeratedValue>
47712                <enumeratedValue>
47713                  <name>1</name>
47714                  <description>The Dual Edge Capture mode in this pair of channels is enabled.</description>
47715                  <value>#1</value>
47716                </enumeratedValue>
47717              </enumeratedValues>
47718            </field>
47719            <field>
47720              <name>DECAP3</name>
47721              <description>Dual Edge Capture Mode Captures For n = 6</description>
47722              <bitOffset>27</bitOffset>
47723              <bitWidth>1</bitWidth>
47724              <access>read-write</access>
47725              <enumeratedValues>
47726                <enumeratedValue>
47727                  <name>0</name>
47728                  <description>The dual edge captures are inactive.</description>
47729                  <value>#0</value>
47730                </enumeratedValue>
47731                <enumeratedValue>
47732                  <name>1</name>
47733                  <description>The dual edge captures are active.</description>
47734                  <value>#1</value>
47735                </enumeratedValue>
47736              </enumeratedValues>
47737            </field>
47738            <field>
47739              <name>DTEN3</name>
47740              <description>Deadtime Enable For n = 6</description>
47741              <bitOffset>28</bitOffset>
47742              <bitWidth>1</bitWidth>
47743              <access>read-write</access>
47744              <enumeratedValues>
47745                <enumeratedValue>
47746                  <name>0</name>
47747                  <description>The deadtime insertion in this pair of channels is disabled.</description>
47748                  <value>#0</value>
47749                </enumeratedValue>
47750                <enumeratedValue>
47751                  <name>1</name>
47752                  <description>The deadtime insertion in this pair of channels is enabled.</description>
47753                  <value>#1</value>
47754                </enumeratedValue>
47755              </enumeratedValues>
47756            </field>
47757            <field>
47758              <name>SYNCEN3</name>
47759              <description>Synchronization Enable For n = 6</description>
47760              <bitOffset>29</bitOffset>
47761              <bitWidth>1</bitWidth>
47762              <access>read-write</access>
47763              <enumeratedValues>
47764                <enumeratedValue>
47765                  <name>0</name>
47766                  <description>The PWM synchronization in this pair of channels is disabled.</description>
47767                  <value>#0</value>
47768                </enumeratedValue>
47769                <enumeratedValue>
47770                  <name>1</name>
47771                  <description>The PWM synchronization in this pair of channels is enabled.</description>
47772                  <value>#1</value>
47773                </enumeratedValue>
47774              </enumeratedValues>
47775            </field>
47776            <field>
47777              <name>FAULTEN3</name>
47778              <description>Fault Control Enable For n = 6</description>
47779              <bitOffset>30</bitOffset>
47780              <bitWidth>1</bitWidth>
47781              <access>read-write</access>
47782              <enumeratedValues>
47783                <enumeratedValue>
47784                  <name>0</name>
47785                  <description>The fault control in this pair of channels is disabled.</description>
47786                  <value>#0</value>
47787                </enumeratedValue>
47788                <enumeratedValue>
47789                  <name>1</name>
47790                  <description>The fault control in this pair of channels is enabled.</description>
47791                  <value>#1</value>
47792                </enumeratedValue>
47793              </enumeratedValues>
47794            </field>
47795          </fields>
47796        </register>
47797        <register>
47798          <name>DEADTIME</name>
47799          <description>Deadtime Insertion Control</description>
47800          <addressOffset>0x68</addressOffset>
47801          <size>32</size>
47802          <access>read-write</access>
47803          <resetValue>0</resetValue>
47804          <resetMask>0xFFFFFFFF</resetMask>
47805          <fields>
47806            <field>
47807              <name>DTVAL</name>
47808              <description>Deadtime Value</description>
47809              <bitOffset>0</bitOffset>
47810              <bitWidth>6</bitWidth>
47811              <access>read-write</access>
47812            </field>
47813            <field>
47814              <name>DTPS</name>
47815              <description>Deadtime Prescaler Value</description>
47816              <bitOffset>6</bitOffset>
47817              <bitWidth>2</bitWidth>
47818              <access>read-write</access>
47819              <enumeratedValues>
47820                <enumeratedValue>
47821                  <name>10</name>
47822                  <description>Divide the system clock by 4.</description>
47823                  <value>#10</value>
47824                </enumeratedValue>
47825                <enumeratedValue>
47826                  <name>11</name>
47827                  <description>Divide the system clock by 16.</description>
47828                  <value>#11</value>
47829                </enumeratedValue>
47830              </enumeratedValues>
47831            </field>
47832          </fields>
47833        </register>
47834        <register>
47835          <name>EXTTRIG</name>
47836          <description>FTM External Trigger</description>
47837          <addressOffset>0x6C</addressOffset>
47838          <size>32</size>
47839          <access>read-write</access>
47840          <resetValue>0</resetValue>
47841          <resetMask>0xFFFFFFFF</resetMask>
47842          <fields>
47843            <field>
47844              <name>CH2TRIG</name>
47845              <description>Channel 2 Trigger Enable</description>
47846              <bitOffset>0</bitOffset>
47847              <bitWidth>1</bitWidth>
47848              <access>read-write</access>
47849              <enumeratedValues>
47850                <enumeratedValue>
47851                  <name>0</name>
47852                  <description>The generation of the channel trigger is disabled.</description>
47853                  <value>#0</value>
47854                </enumeratedValue>
47855                <enumeratedValue>
47856                  <name>1</name>
47857                  <description>The generation of the channel trigger is enabled.</description>
47858                  <value>#1</value>
47859                </enumeratedValue>
47860              </enumeratedValues>
47861            </field>
47862            <field>
47863              <name>CH3TRIG</name>
47864              <description>Channel 3 Trigger Enable</description>
47865              <bitOffset>1</bitOffset>
47866              <bitWidth>1</bitWidth>
47867              <access>read-write</access>
47868              <enumeratedValues>
47869                <enumeratedValue>
47870                  <name>0</name>
47871                  <description>The generation of the channel trigger is disabled.</description>
47872                  <value>#0</value>
47873                </enumeratedValue>
47874                <enumeratedValue>
47875                  <name>1</name>
47876                  <description>The generation of the channel trigger is enabled.</description>
47877                  <value>#1</value>
47878                </enumeratedValue>
47879              </enumeratedValues>
47880            </field>
47881            <field>
47882              <name>CH4TRIG</name>
47883              <description>Channel 4 Trigger Enable</description>
47884              <bitOffset>2</bitOffset>
47885              <bitWidth>1</bitWidth>
47886              <access>read-write</access>
47887              <enumeratedValues>
47888                <enumeratedValue>
47889                  <name>0</name>
47890                  <description>The generation of the channel trigger is disabled.</description>
47891                  <value>#0</value>
47892                </enumeratedValue>
47893                <enumeratedValue>
47894                  <name>1</name>
47895                  <description>The generation of the channel trigger is enabled.</description>
47896                  <value>#1</value>
47897                </enumeratedValue>
47898              </enumeratedValues>
47899            </field>
47900            <field>
47901              <name>CH5TRIG</name>
47902              <description>Channel 5 Trigger Enable</description>
47903              <bitOffset>3</bitOffset>
47904              <bitWidth>1</bitWidth>
47905              <access>read-write</access>
47906              <enumeratedValues>
47907                <enumeratedValue>
47908                  <name>0</name>
47909                  <description>The generation of the channel trigger is disabled.</description>
47910                  <value>#0</value>
47911                </enumeratedValue>
47912                <enumeratedValue>
47913                  <name>1</name>
47914                  <description>The generation of the channel trigger is enabled.</description>
47915                  <value>#1</value>
47916                </enumeratedValue>
47917              </enumeratedValues>
47918            </field>
47919            <field>
47920              <name>CH0TRIG</name>
47921              <description>Channel 0 Trigger Enable</description>
47922              <bitOffset>4</bitOffset>
47923              <bitWidth>1</bitWidth>
47924              <access>read-write</access>
47925              <enumeratedValues>
47926                <enumeratedValue>
47927                  <name>0</name>
47928                  <description>The generation of the channel trigger is disabled.</description>
47929                  <value>#0</value>
47930                </enumeratedValue>
47931                <enumeratedValue>
47932                  <name>1</name>
47933                  <description>The generation of the channel trigger is enabled.</description>
47934                  <value>#1</value>
47935                </enumeratedValue>
47936              </enumeratedValues>
47937            </field>
47938            <field>
47939              <name>CH1TRIG</name>
47940              <description>Channel 1 Trigger Enable</description>
47941              <bitOffset>5</bitOffset>
47942              <bitWidth>1</bitWidth>
47943              <access>read-write</access>
47944              <enumeratedValues>
47945                <enumeratedValue>
47946                  <name>0</name>
47947                  <description>The generation of the channel trigger is disabled.</description>
47948                  <value>#0</value>
47949                </enumeratedValue>
47950                <enumeratedValue>
47951                  <name>1</name>
47952                  <description>The generation of the channel trigger is enabled.</description>
47953                  <value>#1</value>
47954                </enumeratedValue>
47955              </enumeratedValues>
47956            </field>
47957            <field>
47958              <name>INITTRIGEN</name>
47959              <description>Initialization Trigger Enable</description>
47960              <bitOffset>6</bitOffset>
47961              <bitWidth>1</bitWidth>
47962              <access>read-write</access>
47963              <enumeratedValues>
47964                <enumeratedValue>
47965                  <name>0</name>
47966                  <description>The generation of initialization trigger is disabled.</description>
47967                  <value>#0</value>
47968                </enumeratedValue>
47969                <enumeratedValue>
47970                  <name>1</name>
47971                  <description>The generation of initialization trigger is enabled.</description>
47972                  <value>#1</value>
47973                </enumeratedValue>
47974              </enumeratedValues>
47975            </field>
47976            <field>
47977              <name>TRIGF</name>
47978              <description>Channel Trigger Flag</description>
47979              <bitOffset>7</bitOffset>
47980              <bitWidth>1</bitWidth>
47981              <access>read-write</access>
47982              <enumeratedValues>
47983                <enumeratedValue>
47984                  <name>0</name>
47985                  <description>No channel trigger was generated.</description>
47986                  <value>#0</value>
47987                </enumeratedValue>
47988                <enumeratedValue>
47989                  <name>1</name>
47990                  <description>A channel trigger was generated.</description>
47991                  <value>#1</value>
47992                </enumeratedValue>
47993              </enumeratedValues>
47994            </field>
47995          </fields>
47996        </register>
47997        <register>
47998          <name>POL</name>
47999          <description>Channels Polarity</description>
48000          <addressOffset>0x70</addressOffset>
48001          <size>32</size>
48002          <access>read-write</access>
48003          <resetValue>0</resetValue>
48004          <resetMask>0xFFFFFFFF</resetMask>
48005          <fields>
48006            <field>
48007              <name>POL0</name>
48008              <description>Channel 0 Polarity</description>
48009              <bitOffset>0</bitOffset>
48010              <bitWidth>1</bitWidth>
48011              <access>read-write</access>
48012              <enumeratedValues>
48013                <enumeratedValue>
48014                  <name>0</name>
48015                  <description>The channel polarity is active high.</description>
48016                  <value>#0</value>
48017                </enumeratedValue>
48018                <enumeratedValue>
48019                  <name>1</name>
48020                  <description>The channel polarity is active low.</description>
48021                  <value>#1</value>
48022                </enumeratedValue>
48023              </enumeratedValues>
48024            </field>
48025            <field>
48026              <name>POL1</name>
48027              <description>Channel 1 Polarity</description>
48028              <bitOffset>1</bitOffset>
48029              <bitWidth>1</bitWidth>
48030              <access>read-write</access>
48031              <enumeratedValues>
48032                <enumeratedValue>
48033                  <name>0</name>
48034                  <description>The channel polarity is active high.</description>
48035                  <value>#0</value>
48036                </enumeratedValue>
48037                <enumeratedValue>
48038                  <name>1</name>
48039                  <description>The channel polarity is active low.</description>
48040                  <value>#1</value>
48041                </enumeratedValue>
48042              </enumeratedValues>
48043            </field>
48044            <field>
48045              <name>POL2</name>
48046              <description>Channel 2 Polarity</description>
48047              <bitOffset>2</bitOffset>
48048              <bitWidth>1</bitWidth>
48049              <access>read-write</access>
48050              <enumeratedValues>
48051                <enumeratedValue>
48052                  <name>0</name>
48053                  <description>The channel polarity is active high.</description>
48054                  <value>#0</value>
48055                </enumeratedValue>
48056                <enumeratedValue>
48057                  <name>1</name>
48058                  <description>The channel polarity is active low.</description>
48059                  <value>#1</value>
48060                </enumeratedValue>
48061              </enumeratedValues>
48062            </field>
48063            <field>
48064              <name>POL3</name>
48065              <description>Channel 3 Polarity</description>
48066              <bitOffset>3</bitOffset>
48067              <bitWidth>1</bitWidth>
48068              <access>read-write</access>
48069              <enumeratedValues>
48070                <enumeratedValue>
48071                  <name>0</name>
48072                  <description>The channel polarity is active high.</description>
48073                  <value>#0</value>
48074                </enumeratedValue>
48075                <enumeratedValue>
48076                  <name>1</name>
48077                  <description>The channel polarity is active low.</description>
48078                  <value>#1</value>
48079                </enumeratedValue>
48080              </enumeratedValues>
48081            </field>
48082            <field>
48083              <name>POL4</name>
48084              <description>Channel 4 Polarity</description>
48085              <bitOffset>4</bitOffset>
48086              <bitWidth>1</bitWidth>
48087              <access>read-write</access>
48088              <enumeratedValues>
48089                <enumeratedValue>
48090                  <name>0</name>
48091                  <description>The channel polarity is active high.</description>
48092                  <value>#0</value>
48093                </enumeratedValue>
48094                <enumeratedValue>
48095                  <name>1</name>
48096                  <description>The channel polarity is active low.</description>
48097                  <value>#1</value>
48098                </enumeratedValue>
48099              </enumeratedValues>
48100            </field>
48101            <field>
48102              <name>POL5</name>
48103              <description>Channel 5 Polarity</description>
48104              <bitOffset>5</bitOffset>
48105              <bitWidth>1</bitWidth>
48106              <access>read-write</access>
48107              <enumeratedValues>
48108                <enumeratedValue>
48109                  <name>0</name>
48110                  <description>The channel polarity is active high.</description>
48111                  <value>#0</value>
48112                </enumeratedValue>
48113                <enumeratedValue>
48114                  <name>1</name>
48115                  <description>The channel polarity is active low.</description>
48116                  <value>#1</value>
48117                </enumeratedValue>
48118              </enumeratedValues>
48119            </field>
48120            <field>
48121              <name>POL6</name>
48122              <description>Channel 6 Polarity</description>
48123              <bitOffset>6</bitOffset>
48124              <bitWidth>1</bitWidth>
48125              <access>read-write</access>
48126              <enumeratedValues>
48127                <enumeratedValue>
48128                  <name>0</name>
48129                  <description>The channel polarity is active high.</description>
48130                  <value>#0</value>
48131                </enumeratedValue>
48132                <enumeratedValue>
48133                  <name>1</name>
48134                  <description>The channel polarity is active low.</description>
48135                  <value>#1</value>
48136                </enumeratedValue>
48137              </enumeratedValues>
48138            </field>
48139            <field>
48140              <name>POL7</name>
48141              <description>Channel 7 Polarity</description>
48142              <bitOffset>7</bitOffset>
48143              <bitWidth>1</bitWidth>
48144              <access>read-write</access>
48145              <enumeratedValues>
48146                <enumeratedValue>
48147                  <name>0</name>
48148                  <description>The channel polarity is active high.</description>
48149                  <value>#0</value>
48150                </enumeratedValue>
48151                <enumeratedValue>
48152                  <name>1</name>
48153                  <description>The channel polarity is active low.</description>
48154                  <value>#1</value>
48155                </enumeratedValue>
48156              </enumeratedValues>
48157            </field>
48158          </fields>
48159        </register>
48160        <register>
48161          <name>FMS</name>
48162          <description>Fault Mode Status</description>
48163          <addressOffset>0x74</addressOffset>
48164          <size>32</size>
48165          <access>read-write</access>
48166          <resetValue>0</resetValue>
48167          <resetMask>0xFFFFFFFF</resetMask>
48168          <fields>
48169            <field>
48170              <name>FAULTF0</name>
48171              <description>Fault Detection Flag 0</description>
48172              <bitOffset>0</bitOffset>
48173              <bitWidth>1</bitWidth>
48174              <access>read-write</access>
48175              <enumeratedValues>
48176                <enumeratedValue>
48177                  <name>0</name>
48178                  <description>No fault condition was detected at the fault input.</description>
48179                  <value>#0</value>
48180                </enumeratedValue>
48181                <enumeratedValue>
48182                  <name>1</name>
48183                  <description>A fault condition was detected at the fault input.</description>
48184                  <value>#1</value>
48185                </enumeratedValue>
48186              </enumeratedValues>
48187            </field>
48188            <field>
48189              <name>FAULTF1</name>
48190              <description>Fault Detection Flag 1</description>
48191              <bitOffset>1</bitOffset>
48192              <bitWidth>1</bitWidth>
48193              <access>read-write</access>
48194              <enumeratedValues>
48195                <enumeratedValue>
48196                  <name>0</name>
48197                  <description>No fault condition was detected at the fault input.</description>
48198                  <value>#0</value>
48199                </enumeratedValue>
48200                <enumeratedValue>
48201                  <name>1</name>
48202                  <description>A fault condition was detected at the fault input.</description>
48203                  <value>#1</value>
48204                </enumeratedValue>
48205              </enumeratedValues>
48206            </field>
48207            <field>
48208              <name>FAULTF2</name>
48209              <description>Fault Detection Flag 2</description>
48210              <bitOffset>2</bitOffset>
48211              <bitWidth>1</bitWidth>
48212              <access>read-write</access>
48213              <enumeratedValues>
48214                <enumeratedValue>
48215                  <name>0</name>
48216                  <description>No fault condition was detected at the fault input.</description>
48217                  <value>#0</value>
48218                </enumeratedValue>
48219                <enumeratedValue>
48220                  <name>1</name>
48221                  <description>A fault condition was detected at the fault input.</description>
48222                  <value>#1</value>
48223                </enumeratedValue>
48224              </enumeratedValues>
48225            </field>
48226            <field>
48227              <name>FAULTF3</name>
48228              <description>Fault Detection Flag 3</description>
48229              <bitOffset>3</bitOffset>
48230              <bitWidth>1</bitWidth>
48231              <access>read-write</access>
48232              <enumeratedValues>
48233                <enumeratedValue>
48234                  <name>0</name>
48235                  <description>No fault condition was detected at the fault input.</description>
48236                  <value>#0</value>
48237                </enumeratedValue>
48238                <enumeratedValue>
48239                  <name>1</name>
48240                  <description>A fault condition was detected at the fault input.</description>
48241                  <value>#1</value>
48242                </enumeratedValue>
48243              </enumeratedValues>
48244            </field>
48245            <field>
48246              <name>FAULTIN</name>
48247              <description>Fault Inputs</description>
48248              <bitOffset>5</bitOffset>
48249              <bitWidth>1</bitWidth>
48250              <access>read-only</access>
48251              <enumeratedValues>
48252                <enumeratedValue>
48253                  <name>0</name>
48254                  <description>The logic OR of the enabled fault inputs is 0.</description>
48255                  <value>#0</value>
48256                </enumeratedValue>
48257                <enumeratedValue>
48258                  <name>1</name>
48259                  <description>The logic OR of the enabled fault inputs is 1.</description>
48260                  <value>#1</value>
48261                </enumeratedValue>
48262              </enumeratedValues>
48263            </field>
48264            <field>
48265              <name>WPEN</name>
48266              <description>Write Protection Enable</description>
48267              <bitOffset>6</bitOffset>
48268              <bitWidth>1</bitWidth>
48269              <access>read-write</access>
48270              <enumeratedValues>
48271                <enumeratedValue>
48272                  <name>0</name>
48273                  <description>Write protection is disabled. Write protected bits can be written.</description>
48274                  <value>#0</value>
48275                </enumeratedValue>
48276                <enumeratedValue>
48277                  <name>1</name>
48278                  <description>Write protection is enabled. Write protected bits cannot be written.</description>
48279                  <value>#1</value>
48280                </enumeratedValue>
48281              </enumeratedValues>
48282            </field>
48283            <field>
48284              <name>FAULTF</name>
48285              <description>Fault Detection Flag</description>
48286              <bitOffset>7</bitOffset>
48287              <bitWidth>1</bitWidth>
48288              <access>read-write</access>
48289              <enumeratedValues>
48290                <enumeratedValue>
48291                  <name>0</name>
48292                  <description>No fault condition was detected.</description>
48293                  <value>#0</value>
48294                </enumeratedValue>
48295                <enumeratedValue>
48296                  <name>1</name>
48297                  <description>A fault condition was detected.</description>
48298                  <value>#1</value>
48299                </enumeratedValue>
48300              </enumeratedValues>
48301            </field>
48302          </fields>
48303        </register>
48304        <register>
48305          <name>FILTER</name>
48306          <description>Input Capture Filter Control</description>
48307          <addressOffset>0x78</addressOffset>
48308          <size>32</size>
48309          <access>read-write</access>
48310          <resetValue>0</resetValue>
48311          <resetMask>0xFFFFFFFF</resetMask>
48312          <fields>
48313            <field>
48314              <name>CH0FVAL</name>
48315              <description>Channel 0 Input Filter</description>
48316              <bitOffset>0</bitOffset>
48317              <bitWidth>4</bitWidth>
48318              <access>read-write</access>
48319            </field>
48320            <field>
48321              <name>CH1FVAL</name>
48322              <description>Channel 1 Input Filter</description>
48323              <bitOffset>4</bitOffset>
48324              <bitWidth>4</bitWidth>
48325              <access>read-write</access>
48326            </field>
48327            <field>
48328              <name>CH2FVAL</name>
48329              <description>Channel 2 Input Filter</description>
48330              <bitOffset>8</bitOffset>
48331              <bitWidth>4</bitWidth>
48332              <access>read-write</access>
48333            </field>
48334            <field>
48335              <name>CH3FVAL</name>
48336              <description>Channel 3 Input Filter</description>
48337              <bitOffset>12</bitOffset>
48338              <bitWidth>4</bitWidth>
48339              <access>read-write</access>
48340            </field>
48341          </fields>
48342        </register>
48343        <register>
48344          <name>FLTCTRL</name>
48345          <description>Fault Control</description>
48346          <addressOffset>0x7C</addressOffset>
48347          <size>32</size>
48348          <access>read-write</access>
48349          <resetValue>0</resetValue>
48350          <resetMask>0xFFFFFFFF</resetMask>
48351          <fields>
48352            <field>
48353              <name>FAULT0EN</name>
48354              <description>Fault Input 0 Enable</description>
48355              <bitOffset>0</bitOffset>
48356              <bitWidth>1</bitWidth>
48357              <access>read-write</access>
48358              <enumeratedValues>
48359                <enumeratedValue>
48360                  <name>0</name>
48361                  <description>Fault input is disabled.</description>
48362                  <value>#0</value>
48363                </enumeratedValue>
48364                <enumeratedValue>
48365                  <name>1</name>
48366                  <description>Fault input is enabled.</description>
48367                  <value>#1</value>
48368                </enumeratedValue>
48369              </enumeratedValues>
48370            </field>
48371            <field>
48372              <name>FAULT1EN</name>
48373              <description>Fault Input 1 Enable</description>
48374              <bitOffset>1</bitOffset>
48375              <bitWidth>1</bitWidth>
48376              <access>read-write</access>
48377              <enumeratedValues>
48378                <enumeratedValue>
48379                  <name>0</name>
48380                  <description>Fault input is disabled.</description>
48381                  <value>#0</value>
48382                </enumeratedValue>
48383                <enumeratedValue>
48384                  <name>1</name>
48385                  <description>Fault input is enabled.</description>
48386                  <value>#1</value>
48387                </enumeratedValue>
48388              </enumeratedValues>
48389            </field>
48390            <field>
48391              <name>FAULT2EN</name>
48392              <description>Fault Input 2 Enable</description>
48393              <bitOffset>2</bitOffset>
48394              <bitWidth>1</bitWidth>
48395              <access>read-write</access>
48396              <enumeratedValues>
48397                <enumeratedValue>
48398                  <name>0</name>
48399                  <description>Fault input is disabled.</description>
48400                  <value>#0</value>
48401                </enumeratedValue>
48402                <enumeratedValue>
48403                  <name>1</name>
48404                  <description>Fault input is enabled.</description>
48405                  <value>#1</value>
48406                </enumeratedValue>
48407              </enumeratedValues>
48408            </field>
48409            <field>
48410              <name>FAULT3EN</name>
48411              <description>Fault Input 3 Enable</description>
48412              <bitOffset>3</bitOffset>
48413              <bitWidth>1</bitWidth>
48414              <access>read-write</access>
48415              <enumeratedValues>
48416                <enumeratedValue>
48417                  <name>0</name>
48418                  <description>Fault input is disabled.</description>
48419                  <value>#0</value>
48420                </enumeratedValue>
48421                <enumeratedValue>
48422                  <name>1</name>
48423                  <description>Fault input is enabled.</description>
48424                  <value>#1</value>
48425                </enumeratedValue>
48426              </enumeratedValues>
48427            </field>
48428            <field>
48429              <name>FFLTR0EN</name>
48430              <description>Fault Input 0 Filter Enable</description>
48431              <bitOffset>4</bitOffset>
48432              <bitWidth>1</bitWidth>
48433              <access>read-write</access>
48434              <enumeratedValues>
48435                <enumeratedValue>
48436                  <name>0</name>
48437                  <description>Fault input filter is disabled.</description>
48438                  <value>#0</value>
48439                </enumeratedValue>
48440                <enumeratedValue>
48441                  <name>1</name>
48442                  <description>Fault input filter is enabled.</description>
48443                  <value>#1</value>
48444                </enumeratedValue>
48445              </enumeratedValues>
48446            </field>
48447            <field>
48448              <name>FFLTR1EN</name>
48449              <description>Fault Input 1 Filter Enable</description>
48450              <bitOffset>5</bitOffset>
48451              <bitWidth>1</bitWidth>
48452              <access>read-write</access>
48453              <enumeratedValues>
48454                <enumeratedValue>
48455                  <name>0</name>
48456                  <description>Fault input filter is disabled.</description>
48457                  <value>#0</value>
48458                </enumeratedValue>
48459                <enumeratedValue>
48460                  <name>1</name>
48461                  <description>Fault input filter is enabled.</description>
48462                  <value>#1</value>
48463                </enumeratedValue>
48464              </enumeratedValues>
48465            </field>
48466            <field>
48467              <name>FFLTR2EN</name>
48468              <description>Fault Input 2 Filter Enable</description>
48469              <bitOffset>6</bitOffset>
48470              <bitWidth>1</bitWidth>
48471              <access>read-write</access>
48472              <enumeratedValues>
48473                <enumeratedValue>
48474                  <name>0</name>
48475                  <description>Fault input filter is disabled.</description>
48476                  <value>#0</value>
48477                </enumeratedValue>
48478                <enumeratedValue>
48479                  <name>1</name>
48480                  <description>Fault input filter is enabled.</description>
48481                  <value>#1</value>
48482                </enumeratedValue>
48483              </enumeratedValues>
48484            </field>
48485            <field>
48486              <name>FFLTR3EN</name>
48487              <description>Fault Input 3 Filter Enable</description>
48488              <bitOffset>7</bitOffset>
48489              <bitWidth>1</bitWidth>
48490              <access>read-write</access>
48491              <enumeratedValues>
48492                <enumeratedValue>
48493                  <name>0</name>
48494                  <description>Fault input filter is disabled.</description>
48495                  <value>#0</value>
48496                </enumeratedValue>
48497                <enumeratedValue>
48498                  <name>1</name>
48499                  <description>Fault input filter is enabled.</description>
48500                  <value>#1</value>
48501                </enumeratedValue>
48502              </enumeratedValues>
48503            </field>
48504            <field>
48505              <name>FFVAL</name>
48506              <description>Fault Input Filter</description>
48507              <bitOffset>8</bitOffset>
48508              <bitWidth>4</bitWidth>
48509              <access>read-write</access>
48510            </field>
48511          </fields>
48512        </register>
48513        <register>
48514          <name>QDCTRL</name>
48515          <description>Quadrature Decoder Control And Status</description>
48516          <addressOffset>0x80</addressOffset>
48517          <size>32</size>
48518          <access>read-write</access>
48519          <resetValue>0</resetValue>
48520          <resetMask>0xFFFFFFFF</resetMask>
48521          <fields>
48522            <field>
48523              <name>QUADEN</name>
48524              <description>Quadrature Decoder Mode Enable</description>
48525              <bitOffset>0</bitOffset>
48526              <bitWidth>1</bitWidth>
48527              <access>read-write</access>
48528              <enumeratedValues>
48529                <enumeratedValue>
48530                  <name>0</name>
48531                  <description>Quadrature Decoder mode is disabled.</description>
48532                  <value>#0</value>
48533                </enumeratedValue>
48534                <enumeratedValue>
48535                  <name>1</name>
48536                  <description>Quadrature Decoder mode is enabled.</description>
48537                  <value>#1</value>
48538                </enumeratedValue>
48539              </enumeratedValues>
48540            </field>
48541            <field>
48542              <name>TOFDIR</name>
48543              <description>Timer Overflow Direction In Quadrature Decoder Mode</description>
48544              <bitOffset>1</bitOffset>
48545              <bitWidth>1</bitWidth>
48546              <access>read-only</access>
48547              <enumeratedValues>
48548                <enumeratedValue>
48549                  <name>0</name>
48550                  <description>TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter changes from its minimum value (CNTIN register) to its maximum value (MOD register).</description>
48551                  <value>#0</value>
48552                </enumeratedValue>
48553                <enumeratedValue>
48554                  <name>1</name>
48555                  <description>TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter changes from its maximum value (MOD register) to its minimum value (CNTIN register).</description>
48556                  <value>#1</value>
48557                </enumeratedValue>
48558              </enumeratedValues>
48559            </field>
48560            <field>
48561              <name>QUADIR</name>
48562              <description>FTM Counter Direction In Quadrature Decoder Mode</description>
48563              <bitOffset>2</bitOffset>
48564              <bitWidth>1</bitWidth>
48565              <access>read-only</access>
48566              <enumeratedValues>
48567                <enumeratedValue>
48568                  <name>0</name>
48569                  <description>Counting direction is decreasing (FTM counter decrement).</description>
48570                  <value>#0</value>
48571                </enumeratedValue>
48572                <enumeratedValue>
48573                  <name>1</name>
48574                  <description>Counting direction is increasing (FTM counter increment).</description>
48575                  <value>#1</value>
48576                </enumeratedValue>
48577              </enumeratedValues>
48578            </field>
48579            <field>
48580              <name>QUADMODE</name>
48581              <description>Quadrature Decoder Mode</description>
48582              <bitOffset>3</bitOffset>
48583              <bitWidth>1</bitWidth>
48584              <access>read-write</access>
48585              <enumeratedValues>
48586                <enumeratedValue>
48587                  <name>0</name>
48588                  <description>Phase A and phase B encoding mode.</description>
48589                  <value>#0</value>
48590                </enumeratedValue>
48591                <enumeratedValue>
48592                  <name>1</name>
48593                  <description>Count and direction encoding mode.</description>
48594                  <value>#1</value>
48595                </enumeratedValue>
48596              </enumeratedValues>
48597            </field>
48598            <field>
48599              <name>PHBPOL</name>
48600              <description>Phase B Input Polarity</description>
48601              <bitOffset>4</bitOffset>
48602              <bitWidth>1</bitWidth>
48603              <access>read-write</access>
48604              <enumeratedValues>
48605                <enumeratedValue>
48606                  <name>0</name>
48607                  <description>Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal.</description>
48608                  <value>#0</value>
48609                </enumeratedValue>
48610                <enumeratedValue>
48611                  <name>1</name>
48612                  <description>Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal.</description>
48613                  <value>#1</value>
48614                </enumeratedValue>
48615              </enumeratedValues>
48616            </field>
48617            <field>
48618              <name>PHAPOL</name>
48619              <description>Phase A Input Polarity</description>
48620              <bitOffset>5</bitOffset>
48621              <bitWidth>1</bitWidth>
48622              <access>read-write</access>
48623              <enumeratedValues>
48624                <enumeratedValue>
48625                  <name>0</name>
48626                  <description>Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal.</description>
48627                  <value>#0</value>
48628                </enumeratedValue>
48629                <enumeratedValue>
48630                  <name>1</name>
48631                  <description>Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal.</description>
48632                  <value>#1</value>
48633                </enumeratedValue>
48634              </enumeratedValues>
48635            </field>
48636            <field>
48637              <name>PHBFLTREN</name>
48638              <description>Phase B Input Filter Enable</description>
48639              <bitOffset>6</bitOffset>
48640              <bitWidth>1</bitWidth>
48641              <access>read-write</access>
48642              <enumeratedValues>
48643                <enumeratedValue>
48644                  <name>0</name>
48645                  <description>Phase B input filter is disabled.</description>
48646                  <value>#0</value>
48647                </enumeratedValue>
48648                <enumeratedValue>
48649                  <name>1</name>
48650                  <description>Phase B input filter is enabled.</description>
48651                  <value>#1</value>
48652                </enumeratedValue>
48653              </enumeratedValues>
48654            </field>
48655            <field>
48656              <name>PHAFLTREN</name>
48657              <description>Phase A Input Filter Enable</description>
48658              <bitOffset>7</bitOffset>
48659              <bitWidth>1</bitWidth>
48660              <access>read-write</access>
48661              <enumeratedValues>
48662                <enumeratedValue>
48663                  <name>0</name>
48664                  <description>Phase A input filter is disabled.</description>
48665                  <value>#0</value>
48666                </enumeratedValue>
48667                <enumeratedValue>
48668                  <name>1</name>
48669                  <description>Phase A input filter is enabled.</description>
48670                  <value>#1</value>
48671                </enumeratedValue>
48672              </enumeratedValues>
48673            </field>
48674          </fields>
48675        </register>
48676        <register>
48677          <name>CONF</name>
48678          <description>Configuration</description>
48679          <addressOffset>0x84</addressOffset>
48680          <size>32</size>
48681          <access>read-write</access>
48682          <resetValue>0</resetValue>
48683          <resetMask>0xFFFFFFFF</resetMask>
48684          <fields>
48685            <field>
48686              <name>NUMTOF</name>
48687              <description>TOF Frequency</description>
48688              <bitOffset>0</bitOffset>
48689              <bitWidth>5</bitWidth>
48690              <access>read-write</access>
48691            </field>
48692            <field>
48693              <name>BDMMODE</name>
48694              <description>BDM Mode</description>
48695              <bitOffset>6</bitOffset>
48696              <bitWidth>2</bitWidth>
48697              <access>read-write</access>
48698            </field>
48699            <field>
48700              <name>GTBEEN</name>
48701              <description>Global Time Base Enable</description>
48702              <bitOffset>9</bitOffset>
48703              <bitWidth>1</bitWidth>
48704              <access>read-write</access>
48705              <enumeratedValues>
48706                <enumeratedValue>
48707                  <name>0</name>
48708                  <description>Use of an external global time base is disabled.</description>
48709                  <value>#0</value>
48710                </enumeratedValue>
48711                <enumeratedValue>
48712                  <name>1</name>
48713                  <description>Use of an external global time base is enabled.</description>
48714                  <value>#1</value>
48715                </enumeratedValue>
48716              </enumeratedValues>
48717            </field>
48718            <field>
48719              <name>GTBEOUT</name>
48720              <description>Global Time Base Output</description>
48721              <bitOffset>10</bitOffset>
48722              <bitWidth>1</bitWidth>
48723              <access>read-write</access>
48724              <enumeratedValues>
48725                <enumeratedValue>
48726                  <name>0</name>
48727                  <description>A global time base signal generation is disabled.</description>
48728                  <value>#0</value>
48729                </enumeratedValue>
48730                <enumeratedValue>
48731                  <name>1</name>
48732                  <description>A global time base signal generation is enabled.</description>
48733                  <value>#1</value>
48734                </enumeratedValue>
48735              </enumeratedValues>
48736            </field>
48737          </fields>
48738        </register>
48739        <register>
48740          <name>FLTPOL</name>
48741          <description>FTM Fault Input Polarity</description>
48742          <addressOffset>0x88</addressOffset>
48743          <size>32</size>
48744          <access>read-write</access>
48745          <resetValue>0</resetValue>
48746          <resetMask>0xFFFFFFFF</resetMask>
48747          <fields>
48748            <field>
48749              <name>FLT0POL</name>
48750              <description>Fault Input 0 Polarity</description>
48751              <bitOffset>0</bitOffset>
48752              <bitWidth>1</bitWidth>
48753              <access>read-write</access>
48754              <enumeratedValues>
48755                <enumeratedValue>
48756                  <name>0</name>
48757                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
48758                  <value>#0</value>
48759                </enumeratedValue>
48760                <enumeratedValue>
48761                  <name>1</name>
48762                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
48763                  <value>#1</value>
48764                </enumeratedValue>
48765              </enumeratedValues>
48766            </field>
48767            <field>
48768              <name>FLT1POL</name>
48769              <description>Fault Input 1 Polarity</description>
48770              <bitOffset>1</bitOffset>
48771              <bitWidth>1</bitWidth>
48772              <access>read-write</access>
48773              <enumeratedValues>
48774                <enumeratedValue>
48775                  <name>0</name>
48776                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
48777                  <value>#0</value>
48778                </enumeratedValue>
48779                <enumeratedValue>
48780                  <name>1</name>
48781                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
48782                  <value>#1</value>
48783                </enumeratedValue>
48784              </enumeratedValues>
48785            </field>
48786            <field>
48787              <name>FLT2POL</name>
48788              <description>Fault Input 2 Polarity</description>
48789              <bitOffset>2</bitOffset>
48790              <bitWidth>1</bitWidth>
48791              <access>read-write</access>
48792              <enumeratedValues>
48793                <enumeratedValue>
48794                  <name>0</name>
48795                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
48796                  <value>#0</value>
48797                </enumeratedValue>
48798                <enumeratedValue>
48799                  <name>1</name>
48800                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
48801                  <value>#1</value>
48802                </enumeratedValue>
48803              </enumeratedValues>
48804            </field>
48805            <field>
48806              <name>FLT3POL</name>
48807              <description>Fault Input 3 Polarity</description>
48808              <bitOffset>3</bitOffset>
48809              <bitWidth>1</bitWidth>
48810              <access>read-write</access>
48811              <enumeratedValues>
48812                <enumeratedValue>
48813                  <name>0</name>
48814                  <description>The fault input polarity is active high. A 1 at the fault input indicates a fault.</description>
48815                  <value>#0</value>
48816                </enumeratedValue>
48817                <enumeratedValue>
48818                  <name>1</name>
48819                  <description>The fault input polarity is active low. A 0 at the fault input indicates a fault.</description>
48820                  <value>#1</value>
48821                </enumeratedValue>
48822              </enumeratedValues>
48823            </field>
48824          </fields>
48825        </register>
48826        <register>
48827          <name>SYNCONF</name>
48828          <description>Synchronization Configuration</description>
48829          <addressOffset>0x8C</addressOffset>
48830          <size>32</size>
48831          <access>read-write</access>
48832          <resetValue>0</resetValue>
48833          <resetMask>0xFFFFFFFF</resetMask>
48834          <fields>
48835            <field>
48836              <name>HWTRIGMODE</name>
48837              <description>Hardware Trigger Mode</description>
48838              <bitOffset>0</bitOffset>
48839              <bitWidth>1</bitWidth>
48840              <access>read-write</access>
48841              <enumeratedValues>
48842                <enumeratedValue>
48843                  <name>0</name>
48844                  <description>FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2.</description>
48845                  <value>#0</value>
48846                </enumeratedValue>
48847                <enumeratedValue>
48848                  <name>1</name>
48849                  <description>FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2.</description>
48850                  <value>#1</value>
48851                </enumeratedValue>
48852              </enumeratedValues>
48853            </field>
48854            <field>
48855              <name>CNTINC</name>
48856              <description>CNTIN Register Synchronization</description>
48857              <bitOffset>2</bitOffset>
48858              <bitWidth>1</bitWidth>
48859              <access>read-write</access>
48860              <enumeratedValues>
48861                <enumeratedValue>
48862                  <name>0</name>
48863                  <description>CNTIN register is updated with its buffer value at all rising edges of system clock.</description>
48864                  <value>#0</value>
48865                </enumeratedValue>
48866                <enumeratedValue>
48867                  <name>1</name>
48868                  <description>CNTIN register is updated with its buffer value by the PWM synchronization.</description>
48869                  <value>#1</value>
48870                </enumeratedValue>
48871              </enumeratedValues>
48872            </field>
48873            <field>
48874              <name>INVC</name>
48875              <description>INVCTRL Register Synchronization</description>
48876              <bitOffset>4</bitOffset>
48877              <bitWidth>1</bitWidth>
48878              <access>read-write</access>
48879              <enumeratedValues>
48880                <enumeratedValue>
48881                  <name>0</name>
48882                  <description>INVCTRL register is updated with its buffer value at all rising edges of system clock.</description>
48883                  <value>#0</value>
48884                </enumeratedValue>
48885                <enumeratedValue>
48886                  <name>1</name>
48887                  <description>INVCTRL register is updated with its buffer value by the PWM synchronization.</description>
48888                  <value>#1</value>
48889                </enumeratedValue>
48890              </enumeratedValues>
48891            </field>
48892            <field>
48893              <name>SWOC</name>
48894              <description>SWOCTRL Register Synchronization</description>
48895              <bitOffset>5</bitOffset>
48896              <bitWidth>1</bitWidth>
48897              <access>read-write</access>
48898              <enumeratedValues>
48899                <enumeratedValue>
48900                  <name>0</name>
48901                  <description>SWOCTRL register is updated with its buffer value at all rising edges of system clock.</description>
48902                  <value>#0</value>
48903                </enumeratedValue>
48904                <enumeratedValue>
48905                  <name>1</name>
48906                  <description>SWOCTRL register is updated with its buffer value by the PWM synchronization.</description>
48907                  <value>#1</value>
48908                </enumeratedValue>
48909              </enumeratedValues>
48910            </field>
48911            <field>
48912              <name>SYNCMODE</name>
48913              <description>Synchronization Mode</description>
48914              <bitOffset>7</bitOffset>
48915              <bitWidth>1</bitWidth>
48916              <access>read-write</access>
48917              <enumeratedValues>
48918                <enumeratedValue>
48919                  <name>0</name>
48920                  <description>Legacy PWM synchronization is selected.</description>
48921                  <value>#0</value>
48922                </enumeratedValue>
48923                <enumeratedValue>
48924                  <name>1</name>
48925                  <description>Enhanced PWM synchronization is selected.</description>
48926                  <value>#1</value>
48927                </enumeratedValue>
48928              </enumeratedValues>
48929            </field>
48930            <field>
48931              <name>SWRSTCNT</name>
48932              <description>FTM counter synchronization is activated by the software trigger.</description>
48933              <bitOffset>8</bitOffset>
48934              <bitWidth>1</bitWidth>
48935              <access>read-write</access>
48936              <enumeratedValues>
48937                <enumeratedValue>
48938                  <name>0</name>
48939                  <description>The software trigger does not activate the FTM counter synchronization.</description>
48940                  <value>#0</value>
48941                </enumeratedValue>
48942                <enumeratedValue>
48943                  <name>1</name>
48944                  <description>The software trigger activates the FTM counter synchronization.</description>
48945                  <value>#1</value>
48946                </enumeratedValue>
48947              </enumeratedValues>
48948            </field>
48949            <field>
48950              <name>SWWRBUF</name>
48951              <description>MOD, CNTIN, and CV registers synchronization is activated by the software trigger.</description>
48952              <bitOffset>9</bitOffset>
48953              <bitWidth>1</bitWidth>
48954              <access>read-write</access>
48955              <enumeratedValues>
48956                <enumeratedValue>
48957                  <name>0</name>
48958                  <description>The software trigger does not activate MOD, CNTIN, and CV registers synchronization.</description>
48959                  <value>#0</value>
48960                </enumeratedValue>
48961                <enumeratedValue>
48962                  <name>1</name>
48963                  <description>The software trigger activates MOD, CNTIN, and CV registers synchronization.</description>
48964                  <value>#1</value>
48965                </enumeratedValue>
48966              </enumeratedValues>
48967            </field>
48968            <field>
48969              <name>SWOM</name>
48970              <description>Output mask synchronization is activated by the software trigger.</description>
48971              <bitOffset>10</bitOffset>
48972              <bitWidth>1</bitWidth>
48973              <access>read-write</access>
48974              <enumeratedValues>
48975                <enumeratedValue>
48976                  <name>0</name>
48977                  <description>The software trigger does not activate the OUTMASK register synchronization.</description>
48978                  <value>#0</value>
48979                </enumeratedValue>
48980                <enumeratedValue>
48981                  <name>1</name>
48982                  <description>The software trigger activates the OUTMASK register synchronization.</description>
48983                  <value>#1</value>
48984                </enumeratedValue>
48985              </enumeratedValues>
48986            </field>
48987            <field>
48988              <name>SWINVC</name>
48989              <description>Inverting control synchronization is activated by the software trigger.</description>
48990              <bitOffset>11</bitOffset>
48991              <bitWidth>1</bitWidth>
48992              <access>read-write</access>
48993              <enumeratedValues>
48994                <enumeratedValue>
48995                  <name>0</name>
48996                  <description>The software trigger does not activate the INVCTRL register synchronization.</description>
48997                  <value>#0</value>
48998                </enumeratedValue>
48999                <enumeratedValue>
49000                  <name>1</name>
49001                  <description>The software trigger activates the INVCTRL register synchronization.</description>
49002                  <value>#1</value>
49003                </enumeratedValue>
49004              </enumeratedValues>
49005            </field>
49006            <field>
49007              <name>SWSOC</name>
49008              <description>Software output control synchronization is activated by the software trigger.</description>
49009              <bitOffset>12</bitOffset>
49010              <bitWidth>1</bitWidth>
49011              <access>read-write</access>
49012              <enumeratedValues>
49013                <enumeratedValue>
49014                  <name>0</name>
49015                  <description>The software trigger does not activate the SWOCTRL register synchronization.</description>
49016                  <value>#0</value>
49017                </enumeratedValue>
49018                <enumeratedValue>
49019                  <name>1</name>
49020                  <description>The software trigger activates the SWOCTRL register synchronization.</description>
49021                  <value>#1</value>
49022                </enumeratedValue>
49023              </enumeratedValues>
49024            </field>
49025            <field>
49026              <name>HWRSTCNT</name>
49027              <description>FTM counter synchronization is activated by a hardware trigger.</description>
49028              <bitOffset>16</bitOffset>
49029              <bitWidth>1</bitWidth>
49030              <access>read-write</access>
49031              <enumeratedValues>
49032                <enumeratedValue>
49033                  <name>0</name>
49034                  <description>A hardware trigger does not activate the FTM counter synchronization.</description>
49035                  <value>#0</value>
49036                </enumeratedValue>
49037                <enumeratedValue>
49038                  <name>1</name>
49039                  <description>A hardware trigger activates the FTM counter synchronization.</description>
49040                  <value>#1</value>
49041                </enumeratedValue>
49042              </enumeratedValues>
49043            </field>
49044            <field>
49045              <name>HWWRBUF</name>
49046              <description>MOD, CNTIN, and CV registers synchronization is activated by a hardware trigger.</description>
49047              <bitOffset>17</bitOffset>
49048              <bitWidth>1</bitWidth>
49049              <access>read-write</access>
49050              <enumeratedValues>
49051                <enumeratedValue>
49052                  <name>0</name>
49053                  <description>A hardware trigger does not activate MOD, CNTIN, and CV registers synchronization.</description>
49054                  <value>#0</value>
49055                </enumeratedValue>
49056                <enumeratedValue>
49057                  <name>1</name>
49058                  <description>A hardware trigger activates MOD, CNTIN, and CV registers synchronization.</description>
49059                  <value>#1</value>
49060                </enumeratedValue>
49061              </enumeratedValues>
49062            </field>
49063            <field>
49064              <name>HWOM</name>
49065              <description>Output mask synchronization is activated by a hardware trigger.</description>
49066              <bitOffset>18</bitOffset>
49067              <bitWidth>1</bitWidth>
49068              <access>read-write</access>
49069              <enumeratedValues>
49070                <enumeratedValue>
49071                  <name>0</name>
49072                  <description>A hardware trigger does not activate the OUTMASK register synchronization.</description>
49073                  <value>#0</value>
49074                </enumeratedValue>
49075                <enumeratedValue>
49076                  <name>1</name>
49077                  <description>A hardware trigger activates the OUTMASK register synchronization.</description>
49078                  <value>#1</value>
49079                </enumeratedValue>
49080              </enumeratedValues>
49081            </field>
49082            <field>
49083              <name>HWINVC</name>
49084              <description>Inverting control synchronization is activated by a hardware trigger.</description>
49085              <bitOffset>19</bitOffset>
49086              <bitWidth>1</bitWidth>
49087              <access>read-write</access>
49088              <enumeratedValues>
49089                <enumeratedValue>
49090                  <name>0</name>
49091                  <description>A hardware trigger does not activate the INVCTRL register synchronization.</description>
49092                  <value>#0</value>
49093                </enumeratedValue>
49094                <enumeratedValue>
49095                  <name>1</name>
49096                  <description>A hardware trigger activates the INVCTRL register synchronization.</description>
49097                  <value>#1</value>
49098                </enumeratedValue>
49099              </enumeratedValues>
49100            </field>
49101            <field>
49102              <name>HWSOC</name>
49103              <description>Software output control synchronization is activated by a hardware trigger.</description>
49104              <bitOffset>20</bitOffset>
49105              <bitWidth>1</bitWidth>
49106              <access>read-write</access>
49107              <enumeratedValues>
49108                <enumeratedValue>
49109                  <name>0</name>
49110                  <description>A hardware trigger does not activate the SWOCTRL register synchronization.</description>
49111                  <value>#0</value>
49112                </enumeratedValue>
49113                <enumeratedValue>
49114                  <name>1</name>
49115                  <description>A hardware trigger activates the SWOCTRL register synchronization.</description>
49116                  <value>#1</value>
49117                </enumeratedValue>
49118              </enumeratedValues>
49119            </field>
49120          </fields>
49121        </register>
49122        <register>
49123          <name>INVCTRL</name>
49124          <description>FTM Inverting Control</description>
49125          <addressOffset>0x90</addressOffset>
49126          <size>32</size>
49127          <access>read-write</access>
49128          <resetValue>0</resetValue>
49129          <resetMask>0xFFFFFFFF</resetMask>
49130          <fields>
49131            <field>
49132              <name>INV0EN</name>
49133              <description>Pair Channels 0 Inverting Enable</description>
49134              <bitOffset>0</bitOffset>
49135              <bitWidth>1</bitWidth>
49136              <access>read-write</access>
49137              <enumeratedValues>
49138                <enumeratedValue>
49139                  <name>0</name>
49140                  <description>Inverting is disabled.</description>
49141                  <value>#0</value>
49142                </enumeratedValue>
49143                <enumeratedValue>
49144                  <name>1</name>
49145                  <description>Inverting is enabled.</description>
49146                  <value>#1</value>
49147                </enumeratedValue>
49148              </enumeratedValues>
49149            </field>
49150            <field>
49151              <name>INV1EN</name>
49152              <description>Pair Channels 1 Inverting Enable</description>
49153              <bitOffset>1</bitOffset>
49154              <bitWidth>1</bitWidth>
49155              <access>read-write</access>
49156              <enumeratedValues>
49157                <enumeratedValue>
49158                  <name>0</name>
49159                  <description>Inverting is disabled.</description>
49160                  <value>#0</value>
49161                </enumeratedValue>
49162                <enumeratedValue>
49163                  <name>1</name>
49164                  <description>Inverting is enabled.</description>
49165                  <value>#1</value>
49166                </enumeratedValue>
49167              </enumeratedValues>
49168            </field>
49169            <field>
49170              <name>INV2EN</name>
49171              <description>Pair Channels 2 Inverting Enable</description>
49172              <bitOffset>2</bitOffset>
49173              <bitWidth>1</bitWidth>
49174              <access>read-write</access>
49175              <enumeratedValues>
49176                <enumeratedValue>
49177                  <name>0</name>
49178                  <description>Inverting is disabled.</description>
49179                  <value>#0</value>
49180                </enumeratedValue>
49181                <enumeratedValue>
49182                  <name>1</name>
49183                  <description>Inverting is enabled.</description>
49184                  <value>#1</value>
49185                </enumeratedValue>
49186              </enumeratedValues>
49187            </field>
49188            <field>
49189              <name>INV3EN</name>
49190              <description>Pair Channels 3 Inverting Enable</description>
49191              <bitOffset>3</bitOffset>
49192              <bitWidth>1</bitWidth>
49193              <access>read-write</access>
49194              <enumeratedValues>
49195                <enumeratedValue>
49196                  <name>0</name>
49197                  <description>Inverting is disabled.</description>
49198                  <value>#0</value>
49199                </enumeratedValue>
49200                <enumeratedValue>
49201                  <name>1</name>
49202                  <description>Inverting is enabled.</description>
49203                  <value>#1</value>
49204                </enumeratedValue>
49205              </enumeratedValues>
49206            </field>
49207          </fields>
49208        </register>
49209        <register>
49210          <name>SWOCTRL</name>
49211          <description>FTM Software Output Control</description>
49212          <addressOffset>0x94</addressOffset>
49213          <size>32</size>
49214          <access>read-write</access>
49215          <resetValue>0</resetValue>
49216          <resetMask>0xFFFFFFFF</resetMask>
49217          <fields>
49218            <field>
49219              <name>CH0OC</name>
49220              <description>Channel 0 Software Output Control Enable</description>
49221              <bitOffset>0</bitOffset>
49222              <bitWidth>1</bitWidth>
49223              <access>read-write</access>
49224              <enumeratedValues>
49225                <enumeratedValue>
49226                  <name>0</name>
49227                  <description>The channel output is not affected by software output control.</description>
49228                  <value>#0</value>
49229                </enumeratedValue>
49230                <enumeratedValue>
49231                  <name>1</name>
49232                  <description>The channel output is affected by software output control.</description>
49233                  <value>#1</value>
49234                </enumeratedValue>
49235              </enumeratedValues>
49236            </field>
49237            <field>
49238              <name>CH1OC</name>
49239              <description>Channel 1 Software Output Control Enable</description>
49240              <bitOffset>1</bitOffset>
49241              <bitWidth>1</bitWidth>
49242              <access>read-write</access>
49243              <enumeratedValues>
49244                <enumeratedValue>
49245                  <name>0</name>
49246                  <description>The channel output is not affected by software output control.</description>
49247                  <value>#0</value>
49248                </enumeratedValue>
49249                <enumeratedValue>
49250                  <name>1</name>
49251                  <description>The channel output is affected by software output control.</description>
49252                  <value>#1</value>
49253                </enumeratedValue>
49254              </enumeratedValues>
49255            </field>
49256            <field>
49257              <name>CH2OC</name>
49258              <description>Channel 2 Software Output Control Enable</description>
49259              <bitOffset>2</bitOffset>
49260              <bitWidth>1</bitWidth>
49261              <access>read-write</access>
49262              <enumeratedValues>
49263                <enumeratedValue>
49264                  <name>0</name>
49265                  <description>The channel output is not affected by software output control.</description>
49266                  <value>#0</value>
49267                </enumeratedValue>
49268                <enumeratedValue>
49269                  <name>1</name>
49270                  <description>The channel output is affected by software output control.</description>
49271                  <value>#1</value>
49272                </enumeratedValue>
49273              </enumeratedValues>
49274            </field>
49275            <field>
49276              <name>CH3OC</name>
49277              <description>Channel 3 Software Output Control Enable</description>
49278              <bitOffset>3</bitOffset>
49279              <bitWidth>1</bitWidth>
49280              <access>read-write</access>
49281              <enumeratedValues>
49282                <enumeratedValue>
49283                  <name>0</name>
49284                  <description>The channel output is not affected by software output control.</description>
49285                  <value>#0</value>
49286                </enumeratedValue>
49287                <enumeratedValue>
49288                  <name>1</name>
49289                  <description>The channel output is affected by software output control.</description>
49290                  <value>#1</value>
49291                </enumeratedValue>
49292              </enumeratedValues>
49293            </field>
49294            <field>
49295              <name>CH4OC</name>
49296              <description>Channel 4 Software Output Control Enable</description>
49297              <bitOffset>4</bitOffset>
49298              <bitWidth>1</bitWidth>
49299              <access>read-write</access>
49300              <enumeratedValues>
49301                <enumeratedValue>
49302                  <name>0</name>
49303                  <description>The channel output is not affected by software output control.</description>
49304                  <value>#0</value>
49305                </enumeratedValue>
49306                <enumeratedValue>
49307                  <name>1</name>
49308                  <description>The channel output is affected by software output control.</description>
49309                  <value>#1</value>
49310                </enumeratedValue>
49311              </enumeratedValues>
49312            </field>
49313            <field>
49314              <name>CH5OC</name>
49315              <description>Channel 5 Software Output Control Enable</description>
49316              <bitOffset>5</bitOffset>
49317              <bitWidth>1</bitWidth>
49318              <access>read-write</access>
49319              <enumeratedValues>
49320                <enumeratedValue>
49321                  <name>0</name>
49322                  <description>The channel output is not affected by software output control.</description>
49323                  <value>#0</value>
49324                </enumeratedValue>
49325                <enumeratedValue>
49326                  <name>1</name>
49327                  <description>The channel output is affected by software output control.</description>
49328                  <value>#1</value>
49329                </enumeratedValue>
49330              </enumeratedValues>
49331            </field>
49332            <field>
49333              <name>CH6OC</name>
49334              <description>Channel 6 Software Output Control Enable</description>
49335              <bitOffset>6</bitOffset>
49336              <bitWidth>1</bitWidth>
49337              <access>read-write</access>
49338              <enumeratedValues>
49339                <enumeratedValue>
49340                  <name>0</name>
49341                  <description>The channel output is not affected by software output control.</description>
49342                  <value>#0</value>
49343                </enumeratedValue>
49344                <enumeratedValue>
49345                  <name>1</name>
49346                  <description>The channel output is affected by software output control.</description>
49347                  <value>#1</value>
49348                </enumeratedValue>
49349              </enumeratedValues>
49350            </field>
49351            <field>
49352              <name>CH7OC</name>
49353              <description>Channel 7 Software Output Control Enable</description>
49354              <bitOffset>7</bitOffset>
49355              <bitWidth>1</bitWidth>
49356              <access>read-write</access>
49357              <enumeratedValues>
49358                <enumeratedValue>
49359                  <name>0</name>
49360                  <description>The channel output is not affected by software output control.</description>
49361                  <value>#0</value>
49362                </enumeratedValue>
49363                <enumeratedValue>
49364                  <name>1</name>
49365                  <description>The channel output is affected by software output control.</description>
49366                  <value>#1</value>
49367                </enumeratedValue>
49368              </enumeratedValues>
49369            </field>
49370            <field>
49371              <name>CH0OCV</name>
49372              <description>Channel 0 Software Output Control Value</description>
49373              <bitOffset>8</bitOffset>
49374              <bitWidth>1</bitWidth>
49375              <access>read-write</access>
49376              <enumeratedValues>
49377                <enumeratedValue>
49378                  <name>0</name>
49379                  <description>The software output control forces 0 to the channel output.</description>
49380                  <value>#0</value>
49381                </enumeratedValue>
49382                <enumeratedValue>
49383                  <name>1</name>
49384                  <description>The software output control forces 1 to the channel output.</description>
49385                  <value>#1</value>
49386                </enumeratedValue>
49387              </enumeratedValues>
49388            </field>
49389            <field>
49390              <name>CH1OCV</name>
49391              <description>Channel 1 Software Output Control Value</description>
49392              <bitOffset>9</bitOffset>
49393              <bitWidth>1</bitWidth>
49394              <access>read-write</access>
49395              <enumeratedValues>
49396                <enumeratedValue>
49397                  <name>0</name>
49398                  <description>The software output control forces 0 to the channel output.</description>
49399                  <value>#0</value>
49400                </enumeratedValue>
49401                <enumeratedValue>
49402                  <name>1</name>
49403                  <description>The software output control forces 1 to the channel output.</description>
49404                  <value>#1</value>
49405                </enumeratedValue>
49406              </enumeratedValues>
49407            </field>
49408            <field>
49409              <name>CH2OCV</name>
49410              <description>Channel 2 Software Output Control Value</description>
49411              <bitOffset>10</bitOffset>
49412              <bitWidth>1</bitWidth>
49413              <access>read-write</access>
49414              <enumeratedValues>
49415                <enumeratedValue>
49416                  <name>0</name>
49417                  <description>The software output control forces 0 to the channel output.</description>
49418                  <value>#0</value>
49419                </enumeratedValue>
49420                <enumeratedValue>
49421                  <name>1</name>
49422                  <description>The software output control forces 1 to the channel output.</description>
49423                  <value>#1</value>
49424                </enumeratedValue>
49425              </enumeratedValues>
49426            </field>
49427            <field>
49428              <name>CH3OCV</name>
49429              <description>Channel 3 Software Output Control Value</description>
49430              <bitOffset>11</bitOffset>
49431              <bitWidth>1</bitWidth>
49432              <access>read-write</access>
49433              <enumeratedValues>
49434                <enumeratedValue>
49435                  <name>0</name>
49436                  <description>The software output control forces 0 to the channel output.</description>
49437                  <value>#0</value>
49438                </enumeratedValue>
49439                <enumeratedValue>
49440                  <name>1</name>
49441                  <description>The software output control forces 1 to the channel output.</description>
49442                  <value>#1</value>
49443                </enumeratedValue>
49444              </enumeratedValues>
49445            </field>
49446            <field>
49447              <name>CH4OCV</name>
49448              <description>Channel 4 Software Output Control Value</description>
49449              <bitOffset>12</bitOffset>
49450              <bitWidth>1</bitWidth>
49451              <access>read-write</access>
49452              <enumeratedValues>
49453                <enumeratedValue>
49454                  <name>0</name>
49455                  <description>The software output control forces 0 to the channel output.</description>
49456                  <value>#0</value>
49457                </enumeratedValue>
49458                <enumeratedValue>
49459                  <name>1</name>
49460                  <description>The software output control forces 1 to the channel output.</description>
49461                  <value>#1</value>
49462                </enumeratedValue>
49463              </enumeratedValues>
49464            </field>
49465            <field>
49466              <name>CH5OCV</name>
49467              <description>Channel 5 Software Output Control Value</description>
49468              <bitOffset>13</bitOffset>
49469              <bitWidth>1</bitWidth>
49470              <access>read-write</access>
49471              <enumeratedValues>
49472                <enumeratedValue>
49473                  <name>0</name>
49474                  <description>The software output control forces 0 to the channel output.</description>
49475                  <value>#0</value>
49476                </enumeratedValue>
49477                <enumeratedValue>
49478                  <name>1</name>
49479                  <description>The software output control forces 1 to the channel output.</description>
49480                  <value>#1</value>
49481                </enumeratedValue>
49482              </enumeratedValues>
49483            </field>
49484            <field>
49485              <name>CH6OCV</name>
49486              <description>Channel 6 Software Output Control Value</description>
49487              <bitOffset>14</bitOffset>
49488              <bitWidth>1</bitWidth>
49489              <access>read-write</access>
49490              <enumeratedValues>
49491                <enumeratedValue>
49492                  <name>0</name>
49493                  <description>The software output control forces 0 to the channel output.</description>
49494                  <value>#0</value>
49495                </enumeratedValue>
49496                <enumeratedValue>
49497                  <name>1</name>
49498                  <description>The software output control forces 1 to the channel output.</description>
49499                  <value>#1</value>
49500                </enumeratedValue>
49501              </enumeratedValues>
49502            </field>
49503            <field>
49504              <name>CH7OCV</name>
49505              <description>Channel 7 Software Output Control Value</description>
49506              <bitOffset>15</bitOffset>
49507              <bitWidth>1</bitWidth>
49508              <access>read-write</access>
49509              <enumeratedValues>
49510                <enumeratedValue>
49511                  <name>0</name>
49512                  <description>The software output control forces 0 to the channel output.</description>
49513                  <value>#0</value>
49514                </enumeratedValue>
49515                <enumeratedValue>
49516                  <name>1</name>
49517                  <description>The software output control forces 1 to the channel output.</description>
49518                  <value>#1</value>
49519                </enumeratedValue>
49520              </enumeratedValues>
49521            </field>
49522          </fields>
49523        </register>
49524        <register>
49525          <name>PWMLOAD</name>
49526          <description>FTM PWM Load</description>
49527          <addressOffset>0x98</addressOffset>
49528          <size>32</size>
49529          <access>read-write</access>
49530          <resetValue>0</resetValue>
49531          <resetMask>0xFFFFFFFF</resetMask>
49532          <fields>
49533            <field>
49534              <name>CH0SEL</name>
49535              <description>Channel 0 Select</description>
49536              <bitOffset>0</bitOffset>
49537              <bitWidth>1</bitWidth>
49538              <access>read-write</access>
49539              <enumeratedValues>
49540                <enumeratedValue>
49541                  <name>0</name>
49542                  <description>Do not include the channel in the matching process.</description>
49543                  <value>#0</value>
49544                </enumeratedValue>
49545                <enumeratedValue>
49546                  <name>1</name>
49547                  <description>Include the channel in the matching process.</description>
49548                  <value>#1</value>
49549                </enumeratedValue>
49550              </enumeratedValues>
49551            </field>
49552            <field>
49553              <name>CH1SEL</name>
49554              <description>Channel 1 Select</description>
49555              <bitOffset>1</bitOffset>
49556              <bitWidth>1</bitWidth>
49557              <access>read-write</access>
49558              <enumeratedValues>
49559                <enumeratedValue>
49560                  <name>0</name>
49561                  <description>Do not include the channel in the matching process.</description>
49562                  <value>#0</value>
49563                </enumeratedValue>
49564                <enumeratedValue>
49565                  <name>1</name>
49566                  <description>Include the channel in the matching process.</description>
49567                  <value>#1</value>
49568                </enumeratedValue>
49569              </enumeratedValues>
49570            </field>
49571            <field>
49572              <name>CH2SEL</name>
49573              <description>Channel 2 Select</description>
49574              <bitOffset>2</bitOffset>
49575              <bitWidth>1</bitWidth>
49576              <access>read-write</access>
49577              <enumeratedValues>
49578                <enumeratedValue>
49579                  <name>0</name>
49580                  <description>Do not include the channel in the matching process.</description>
49581                  <value>#0</value>
49582                </enumeratedValue>
49583                <enumeratedValue>
49584                  <name>1</name>
49585                  <description>Include the channel in the matching process.</description>
49586                  <value>#1</value>
49587                </enumeratedValue>
49588              </enumeratedValues>
49589            </field>
49590            <field>
49591              <name>CH3SEL</name>
49592              <description>Channel 3 Select</description>
49593              <bitOffset>3</bitOffset>
49594              <bitWidth>1</bitWidth>
49595              <access>read-write</access>
49596              <enumeratedValues>
49597                <enumeratedValue>
49598                  <name>0</name>
49599                  <description>Do not include the channel in the matching process.</description>
49600                  <value>#0</value>
49601                </enumeratedValue>
49602                <enumeratedValue>
49603                  <name>1</name>
49604                  <description>Include the channel in the matching process.</description>
49605                  <value>#1</value>
49606                </enumeratedValue>
49607              </enumeratedValues>
49608            </field>
49609            <field>
49610              <name>CH4SEL</name>
49611              <description>Channel 4 Select</description>
49612              <bitOffset>4</bitOffset>
49613              <bitWidth>1</bitWidth>
49614              <access>read-write</access>
49615              <enumeratedValues>
49616                <enumeratedValue>
49617                  <name>0</name>
49618                  <description>Do not include the channel in the matching process.</description>
49619                  <value>#0</value>
49620                </enumeratedValue>
49621                <enumeratedValue>
49622                  <name>1</name>
49623                  <description>Include the channel in the matching process.</description>
49624                  <value>#1</value>
49625                </enumeratedValue>
49626              </enumeratedValues>
49627            </field>
49628            <field>
49629              <name>CH5SEL</name>
49630              <description>Channel 5 Select</description>
49631              <bitOffset>5</bitOffset>
49632              <bitWidth>1</bitWidth>
49633              <access>read-write</access>
49634              <enumeratedValues>
49635                <enumeratedValue>
49636                  <name>0</name>
49637                  <description>Do not include the channel in the matching process.</description>
49638                  <value>#0</value>
49639                </enumeratedValue>
49640                <enumeratedValue>
49641                  <name>1</name>
49642                  <description>Include the channel in the matching process.</description>
49643                  <value>#1</value>
49644                </enumeratedValue>
49645              </enumeratedValues>
49646            </field>
49647            <field>
49648              <name>CH6SEL</name>
49649              <description>Channel 6 Select</description>
49650              <bitOffset>6</bitOffset>
49651              <bitWidth>1</bitWidth>
49652              <access>read-write</access>
49653              <enumeratedValues>
49654                <enumeratedValue>
49655                  <name>0</name>
49656                  <description>Do not include the channel in the matching process.</description>
49657                  <value>#0</value>
49658                </enumeratedValue>
49659                <enumeratedValue>
49660                  <name>1</name>
49661                  <description>Include the channel in the matching process.</description>
49662                  <value>#1</value>
49663                </enumeratedValue>
49664              </enumeratedValues>
49665            </field>
49666            <field>
49667              <name>CH7SEL</name>
49668              <description>Channel 7 Select</description>
49669              <bitOffset>7</bitOffset>
49670              <bitWidth>1</bitWidth>
49671              <access>read-write</access>
49672              <enumeratedValues>
49673                <enumeratedValue>
49674                  <name>0</name>
49675                  <description>Do not include the channel in the matching process.</description>
49676                  <value>#0</value>
49677                </enumeratedValue>
49678                <enumeratedValue>
49679                  <name>1</name>
49680                  <description>Include the channel in the matching process.</description>
49681                  <value>#1</value>
49682                </enumeratedValue>
49683              </enumeratedValues>
49684            </field>
49685            <field>
49686              <name>LDOK</name>
49687              <description>Load Enable</description>
49688              <bitOffset>9</bitOffset>
49689              <bitWidth>1</bitWidth>
49690              <access>read-write</access>
49691              <enumeratedValues>
49692                <enumeratedValue>
49693                  <name>0</name>
49694                  <description>Loading updated values is disabled.</description>
49695                  <value>#0</value>
49696                </enumeratedValue>
49697                <enumeratedValue>
49698                  <name>1</name>
49699                  <description>Loading updated values is enabled.</description>
49700                  <value>#1</value>
49701                </enumeratedValue>
49702              </enumeratedValues>
49703            </field>
49704          </fields>
49705        </register>
49706      </registers>
49707    </peripheral>
49708    <peripheral>
49709      <name>ADC0</name>
49710      <description>Analog-to-Digital Converter</description>
49711      <prependToName>ADC0_</prependToName>
49712      <baseAddress>0x4003B000</baseAddress>
49713      <addressBlock>
49714        <offset>0</offset>
49715        <size>0x70</size>
49716        <usage>registers</usage>
49717      </addressBlock>
49718      <interrupt>
49719        <name>ADC0</name>
49720        <value>39</value>
49721      </interrupt>
49722      <registers>
49723        <register>
49724          <dim>2</dim>
49725          <dimIncrement>0x4</dimIncrement>
49726          <dimIndex>A,B</dimIndex>
49727          <name>SC1%s</name>
49728          <description>ADC Status and Control Registers 1</description>
49729          <addressOffset>0</addressOffset>
49730          <size>32</size>
49731          <access>read-write</access>
49732          <resetValue>0x1F</resetValue>
49733          <resetMask>0xFFFFFFFF</resetMask>
49734          <fields>
49735            <field>
49736              <name>ADCH</name>
49737              <description>Input channel select</description>
49738              <bitOffset>0</bitOffset>
49739              <bitWidth>5</bitWidth>
49740              <access>read-write</access>
49741              <enumeratedValues>
49742                <enumeratedValue>
49743                  <name>00000</name>
49744                  <description>When DIFF=0, DADP0 is selected as input; when DIFF=1, DAD0 is selected as input.</description>
49745                  <value>#00000</value>
49746                </enumeratedValue>
49747                <enumeratedValue>
49748                  <name>00001</name>
49749                  <description>When DIFF=0, DADP1 is selected as input; when DIFF=1, DAD1 is selected as input.</description>
49750                  <value>#00001</value>
49751                </enumeratedValue>
49752                <enumeratedValue>
49753                  <name>00010</name>
49754                  <description>When DIFF=0, DADP2 is selected as input; when DIFF=1, DAD2 is selected as input.</description>
49755                  <value>#00010</value>
49756                </enumeratedValue>
49757                <enumeratedValue>
49758                  <name>00011</name>
49759                  <description>When DIFF=0, DADP3 is selected as input; when DIFF=1, DAD3 is selected as input.</description>
49760                  <value>#00011</value>
49761                </enumeratedValue>
49762                <enumeratedValue>
49763                  <name>00100</name>
49764                  <description>When DIFF=0, AD4 is selected as input; when DIFF=1, it is reserved.</description>
49765                  <value>#00100</value>
49766                </enumeratedValue>
49767                <enumeratedValue>
49768                  <name>00101</name>
49769                  <description>When DIFF=0, AD5 is selected as input; when DIFF=1, it is reserved.</description>
49770                  <value>#00101</value>
49771                </enumeratedValue>
49772                <enumeratedValue>
49773                  <name>00110</name>
49774                  <description>When DIFF=0, AD6 is selected as input; when DIFF=1, it is reserved.</description>
49775                  <value>#00110</value>
49776                </enumeratedValue>
49777                <enumeratedValue>
49778                  <name>00111</name>
49779                  <description>When DIFF=0, AD7 is selected as input; when DIFF=1, it is reserved.</description>
49780                  <value>#00111</value>
49781                </enumeratedValue>
49782                <enumeratedValue>
49783                  <name>01000</name>
49784                  <description>When DIFF=0, AD8 is selected as input; when DIFF=1, it is reserved.</description>
49785                  <value>#01000</value>
49786                </enumeratedValue>
49787                <enumeratedValue>
49788                  <name>01001</name>
49789                  <description>When DIFF=0, AD9 is selected as input; when DIFF=1, it is reserved.</description>
49790                  <value>#01001</value>
49791                </enumeratedValue>
49792                <enumeratedValue>
49793                  <name>01010</name>
49794                  <description>When DIFF=0, AD10 is selected as input; when DIFF=1, it is reserved.</description>
49795                  <value>#01010</value>
49796                </enumeratedValue>
49797                <enumeratedValue>
49798                  <name>01011</name>
49799                  <description>When DIFF=0, AD11 is selected as input; when DIFF=1, it is reserved.</description>
49800                  <value>#01011</value>
49801                </enumeratedValue>
49802                <enumeratedValue>
49803                  <name>01100</name>
49804                  <description>When DIFF=0, AD12 is selected as input; when DIFF=1, it is reserved.</description>
49805                  <value>#01100</value>
49806                </enumeratedValue>
49807                <enumeratedValue>
49808                  <name>01101</name>
49809                  <description>When DIFF=0, AD13 is selected as input; when DIFF=1, it is reserved.</description>
49810                  <value>#01101</value>
49811                </enumeratedValue>
49812                <enumeratedValue>
49813                  <name>01110</name>
49814                  <description>When DIFF=0, AD14 is selected as input; when DIFF=1, it is reserved.</description>
49815                  <value>#01110</value>
49816                </enumeratedValue>
49817                <enumeratedValue>
49818                  <name>01111</name>
49819                  <description>When DIFF=0, AD15 is selected as input; when DIFF=1, it is reserved.</description>
49820                  <value>#01111</value>
49821                </enumeratedValue>
49822                <enumeratedValue>
49823                  <name>10000</name>
49824                  <description>When DIFF=0, AD16 is selected as input; when DIFF=1, it is reserved.</description>
49825                  <value>#10000</value>
49826                </enumeratedValue>
49827                <enumeratedValue>
49828                  <name>10001</name>
49829                  <description>When DIFF=0, AD17 is selected as input; when DIFF=1, it is reserved.</description>
49830                  <value>#10001</value>
49831                </enumeratedValue>
49832                <enumeratedValue>
49833                  <name>10010</name>
49834                  <description>When DIFF=0, AD18 is selected as input; when DIFF=1, it is reserved.</description>
49835                  <value>#10010</value>
49836                </enumeratedValue>
49837                <enumeratedValue>
49838                  <name>10011</name>
49839                  <description>When DIFF=0, AD19 is selected as input; when DIFF=1, it is reserved.</description>
49840                  <value>#10011</value>
49841                </enumeratedValue>
49842                <enumeratedValue>
49843                  <name>10100</name>
49844                  <description>When DIFF=0, AD20 is selected as input; when DIFF=1, it is reserved.</description>
49845                  <value>#10100</value>
49846                </enumeratedValue>
49847                <enumeratedValue>
49848                  <name>10101</name>
49849                  <description>When DIFF=0, AD21 is selected as input; when DIFF=1, it is reserved.</description>
49850                  <value>#10101</value>
49851                </enumeratedValue>
49852                <enumeratedValue>
49853                  <name>10110</name>
49854                  <description>When DIFF=0, AD22 is selected as input; when DIFF=1, it is reserved.</description>
49855                  <value>#10110</value>
49856                </enumeratedValue>
49857                <enumeratedValue>
49858                  <name>10111</name>
49859                  <description>When DIFF=0, AD23 is selected as input; when DIFF=1, it is reserved.</description>
49860                  <value>#10111</value>
49861                </enumeratedValue>
49862                <enumeratedValue>
49863                  <name>11010</name>
49864                  <description>When DIFF=0, Temp Sensor (single-ended) is selected as input; when DIFF=1, Temp Sensor (differential) is selected as input.</description>
49865                  <value>#11010</value>
49866                </enumeratedValue>
49867                <enumeratedValue>
49868                  <name>11011</name>
49869                  <description>When DIFF=0, Bandgap (single-ended) is selected as input; when DIFF=1, Bandgap (differential) is selected as input.</description>
49870                  <value>#11011</value>
49871                </enumeratedValue>
49872                <enumeratedValue>
49873                  <name>11101</name>
49874                  <description>When DIFF=0,VREFSH is selected as input; when DIFF=1, -VREFSH (differential) is selected as input. Voltage reference selected is determined by SC2[REFSEL].</description>
49875                  <value>#11101</value>
49876                </enumeratedValue>
49877                <enumeratedValue>
49878                  <name>11110</name>
49879                  <description>When DIFF=0,VREFSL is selected as input; when DIFF=1, it is reserved. Voltage reference selected is determined by SC2[REFSEL].</description>
49880                  <value>#11110</value>
49881                </enumeratedValue>
49882                <enumeratedValue>
49883                  <name>11111</name>
49884                  <description>Module is disabled.</description>
49885                  <value>#11111</value>
49886                </enumeratedValue>
49887              </enumeratedValues>
49888            </field>
49889            <field>
49890              <name>DIFF</name>
49891              <description>Differential Mode Enable</description>
49892              <bitOffset>5</bitOffset>
49893              <bitWidth>1</bitWidth>
49894              <access>read-write</access>
49895              <enumeratedValues>
49896                <enumeratedValue>
49897                  <name>0</name>
49898                  <description>Single-ended conversions and input channels are selected.</description>
49899                  <value>#0</value>
49900                </enumeratedValue>
49901                <enumeratedValue>
49902                  <name>1</name>
49903                  <description>Differential conversions and input channels are selected.</description>
49904                  <value>#1</value>
49905                </enumeratedValue>
49906              </enumeratedValues>
49907            </field>
49908            <field>
49909              <name>AIEN</name>
49910              <description>Interrupt Enable</description>
49911              <bitOffset>6</bitOffset>
49912              <bitWidth>1</bitWidth>
49913              <access>read-write</access>
49914              <enumeratedValues>
49915                <enumeratedValue>
49916                  <name>0</name>
49917                  <description>Conversion complete interrupt is disabled.</description>
49918                  <value>#0</value>
49919                </enumeratedValue>
49920                <enumeratedValue>
49921                  <name>1</name>
49922                  <description>Conversion complete interrupt is enabled.</description>
49923                  <value>#1</value>
49924                </enumeratedValue>
49925              </enumeratedValues>
49926            </field>
49927            <field>
49928              <name>COCO</name>
49929              <description>Conversion Complete Flag</description>
49930              <bitOffset>7</bitOffset>
49931              <bitWidth>1</bitWidth>
49932              <access>read-only</access>
49933              <enumeratedValues>
49934                <enumeratedValue>
49935                  <name>0</name>
49936                  <description>Conversion is not completed.</description>
49937                  <value>#0</value>
49938                </enumeratedValue>
49939                <enumeratedValue>
49940                  <name>1</name>
49941                  <description>Conversion is completed.</description>
49942                  <value>#1</value>
49943                </enumeratedValue>
49944              </enumeratedValues>
49945            </field>
49946          </fields>
49947        </register>
49948        <register>
49949          <name>CFG1</name>
49950          <description>ADC Configuration Register 1</description>
49951          <addressOffset>0x8</addressOffset>
49952          <size>32</size>
49953          <access>read-write</access>
49954          <resetValue>0</resetValue>
49955          <resetMask>0xFFFFFFFF</resetMask>
49956          <fields>
49957            <field>
49958              <name>ADICLK</name>
49959              <description>Input Clock Select</description>
49960              <bitOffset>0</bitOffset>
49961              <bitWidth>2</bitWidth>
49962              <access>read-write</access>
49963              <enumeratedValues>
49964                <enumeratedValue>
49965                  <name>00</name>
49966                  <description>Bus clock</description>
49967                  <value>#00</value>
49968                </enumeratedValue>
49969                <enumeratedValue>
49970                  <name>01</name>
49971                  <description>Alternate clock 2 (ALTCLK2)</description>
49972                  <value>#01</value>
49973                </enumeratedValue>
49974                <enumeratedValue>
49975                  <name>10</name>
49976                  <description>Alternate clock (ALTCLK)</description>
49977                  <value>#10</value>
49978                </enumeratedValue>
49979                <enumeratedValue>
49980                  <name>11</name>
49981                  <description>Asynchronous clock (ADACK)</description>
49982                  <value>#11</value>
49983                </enumeratedValue>
49984              </enumeratedValues>
49985            </field>
49986            <field>
49987              <name>MODE</name>
49988              <description>Conversion mode selection</description>
49989              <bitOffset>2</bitOffset>
49990              <bitWidth>2</bitWidth>
49991              <access>read-write</access>
49992              <enumeratedValues>
49993                <enumeratedValue>
49994                  <name>00</name>
49995                  <description>When DIFF=0:It is single-ended 8-bit conversion; when DIFF=1, it is differential 9-bit conversion with 2&apos;s complement output.</description>
49996                  <value>#00</value>
49997                </enumeratedValue>
49998                <enumeratedValue>
49999                  <name>01</name>
50000                  <description>When DIFF=0:It is single-ended 12-bit conversion ; when DIFF=1, it is differential 13-bit conversion with 2&apos;s complement output.</description>
50001                  <value>#01</value>
50002                </enumeratedValue>
50003                <enumeratedValue>
50004                  <name>10</name>
50005                  <description>When DIFF=0:It is single-ended 10-bit conversion. ; when DIFF=1, it is differential 11-bit conversion with 2&apos;s complement output</description>
50006                  <value>#10</value>
50007                </enumeratedValue>
50008                <enumeratedValue>
50009                  <name>11</name>
50010                  <description>When DIFF=0:It is single-ended 16-bit conversion..; when DIFF=1, it is differential 16-bit conversion with 2&apos;s complement output</description>
50011                  <value>#11</value>
50012                </enumeratedValue>
50013              </enumeratedValues>
50014            </field>
50015            <field>
50016              <name>ADLSMP</name>
50017              <description>Sample Time Configuration</description>
50018              <bitOffset>4</bitOffset>
50019              <bitWidth>1</bitWidth>
50020              <access>read-write</access>
50021              <enumeratedValues>
50022                <enumeratedValue>
50023                  <name>0</name>
50024                  <description>Short sample time.</description>
50025                  <value>#0</value>
50026                </enumeratedValue>
50027                <enumeratedValue>
50028                  <name>1</name>
50029                  <description>Long sample time.</description>
50030                  <value>#1</value>
50031                </enumeratedValue>
50032              </enumeratedValues>
50033            </field>
50034            <field>
50035              <name>ADIV</name>
50036              <description>Clock Divide Select</description>
50037              <bitOffset>5</bitOffset>
50038              <bitWidth>2</bitWidth>
50039              <access>read-write</access>
50040              <enumeratedValues>
50041                <enumeratedValue>
50042                  <name>00</name>
50043                  <description>The divide ratio is 1 and the clock rate is input clock.</description>
50044                  <value>#00</value>
50045                </enumeratedValue>
50046                <enumeratedValue>
50047                  <name>01</name>
50048                  <description>The divide ratio is 2 and the clock rate is (input clock)/2.</description>
50049                  <value>#01</value>
50050                </enumeratedValue>
50051                <enumeratedValue>
50052                  <name>10</name>
50053                  <description>The divide ratio is 4 and the clock rate is (input clock)/4.</description>
50054                  <value>#10</value>
50055                </enumeratedValue>
50056                <enumeratedValue>
50057                  <name>11</name>
50058                  <description>The divide ratio is 8 and the clock rate is (input clock)/8.</description>
50059                  <value>#11</value>
50060                </enumeratedValue>
50061              </enumeratedValues>
50062            </field>
50063            <field>
50064              <name>ADLPC</name>
50065              <description>Low-Power Configuration</description>
50066              <bitOffset>7</bitOffset>
50067              <bitWidth>1</bitWidth>
50068              <access>read-write</access>
50069              <enumeratedValues>
50070                <enumeratedValue>
50071                  <name>0</name>
50072                  <description>Normal power configuration.</description>
50073                  <value>#0</value>
50074                </enumeratedValue>
50075                <enumeratedValue>
50076                  <name>1</name>
50077                  <description>Low-power configuration. The power is reduced at the expense of maximum clock speed.</description>
50078                  <value>#1</value>
50079                </enumeratedValue>
50080              </enumeratedValues>
50081            </field>
50082          </fields>
50083        </register>
50084        <register>
50085          <name>CFG2</name>
50086          <description>ADC Configuration Register 2</description>
50087          <addressOffset>0xC</addressOffset>
50088          <size>32</size>
50089          <access>read-write</access>
50090          <resetValue>0</resetValue>
50091          <resetMask>0xFFFFFFFF</resetMask>
50092          <fields>
50093            <field>
50094              <name>ADLSTS</name>
50095              <description>Long Sample Time Select</description>
50096              <bitOffset>0</bitOffset>
50097              <bitWidth>2</bitWidth>
50098              <access>read-write</access>
50099              <enumeratedValues>
50100                <enumeratedValue>
50101                  <name>00</name>
50102                  <description>Default longest sample time; 20 extra ADCK cycles; 24 ADCK cycles total.</description>
50103                  <value>#00</value>
50104                </enumeratedValue>
50105                <enumeratedValue>
50106                  <name>01</name>
50107                  <description>12 extra ADCK cycles; 16 ADCK cycles total sample time.</description>
50108                  <value>#01</value>
50109                </enumeratedValue>
50110                <enumeratedValue>
50111                  <name>10</name>
50112                  <description>6 extra ADCK cycles; 10 ADCK cycles total sample time.</description>
50113                  <value>#10</value>
50114                </enumeratedValue>
50115                <enumeratedValue>
50116                  <name>11</name>
50117                  <description>2 extra ADCK cycles; 6 ADCK cycles total sample time.</description>
50118                  <value>#11</value>
50119                </enumeratedValue>
50120              </enumeratedValues>
50121            </field>
50122            <field>
50123              <name>ADHSC</name>
50124              <description>High-Speed Configuration</description>
50125              <bitOffset>2</bitOffset>
50126              <bitWidth>1</bitWidth>
50127              <access>read-write</access>
50128              <enumeratedValues>
50129                <enumeratedValue>
50130                  <name>0</name>
50131                  <description>Normal conversion sequence selected.</description>
50132                  <value>#0</value>
50133                </enumeratedValue>
50134                <enumeratedValue>
50135                  <name>1</name>
50136                  <description>High-speed conversion sequence selected with 2 additional ADCK cycles to total conversion time.</description>
50137                  <value>#1</value>
50138                </enumeratedValue>
50139              </enumeratedValues>
50140            </field>
50141            <field>
50142              <name>ADACKEN</name>
50143              <description>Asynchronous Clock Output Enable</description>
50144              <bitOffset>3</bitOffset>
50145              <bitWidth>1</bitWidth>
50146              <access>read-write</access>
50147              <enumeratedValues>
50148                <enumeratedValue>
50149                  <name>0</name>
50150                  <description>Asynchronous clock output disabled; Asynchronous clock is enabled only if selected by ADICLK and a conversion is active.</description>
50151                  <value>#0</value>
50152                </enumeratedValue>
50153                <enumeratedValue>
50154                  <name>1</name>
50155                  <description>Asynchronous clock and clock output is enabled regardless of the state of the ADC.</description>
50156                  <value>#1</value>
50157                </enumeratedValue>
50158              </enumeratedValues>
50159            </field>
50160            <field>
50161              <name>MUXSEL</name>
50162              <description>ADC Mux Select</description>
50163              <bitOffset>4</bitOffset>
50164              <bitWidth>1</bitWidth>
50165              <access>read-write</access>
50166              <enumeratedValues>
50167                <enumeratedValue>
50168                  <name>0</name>
50169                  <description>ADxxa channels are selected.</description>
50170                  <value>#0</value>
50171                </enumeratedValue>
50172                <enumeratedValue>
50173                  <name>1</name>
50174                  <description>ADxxb channels are selected.</description>
50175                  <value>#1</value>
50176                </enumeratedValue>
50177              </enumeratedValues>
50178            </field>
50179          </fields>
50180        </register>
50181        <register>
50182          <dim>2</dim>
50183          <dimIncrement>0x4</dimIncrement>
50184          <dimIndex>A,B</dimIndex>
50185          <name>R%s</name>
50186          <description>ADC Data Result Register</description>
50187          <addressOffset>0x10</addressOffset>
50188          <size>32</size>
50189          <access>read-only</access>
50190          <resetValue>0</resetValue>
50191          <resetMask>0xFFFFFFFF</resetMask>
50192          <fields>
50193            <field>
50194              <name>D</name>
50195              <description>Data result</description>
50196              <bitOffset>0</bitOffset>
50197              <bitWidth>16</bitWidth>
50198              <access>read-only</access>
50199            </field>
50200          </fields>
50201        </register>
50202        <register>
50203          <dim>2</dim>
50204          <dimIncrement>0x4</dimIncrement>
50205          <dimIndex>1,2</dimIndex>
50206          <name>CV%s</name>
50207          <description>Compare Value Registers</description>
50208          <addressOffset>0x18</addressOffset>
50209          <size>32</size>
50210          <access>read-write</access>
50211          <resetValue>0</resetValue>
50212          <resetMask>0xFFFFFFFF</resetMask>
50213          <fields>
50214            <field>
50215              <name>CV</name>
50216              <description>Compare Value.</description>
50217              <bitOffset>0</bitOffset>
50218              <bitWidth>16</bitWidth>
50219              <access>read-write</access>
50220            </field>
50221          </fields>
50222        </register>
50223        <register>
50224          <name>SC2</name>
50225          <description>Status and Control Register 2</description>
50226          <addressOffset>0x20</addressOffset>
50227          <size>32</size>
50228          <access>read-write</access>
50229          <resetValue>0</resetValue>
50230          <resetMask>0xFFFFFFFF</resetMask>
50231          <fields>
50232            <field>
50233              <name>REFSEL</name>
50234              <description>Voltage Reference Selection</description>
50235              <bitOffset>0</bitOffset>
50236              <bitWidth>2</bitWidth>
50237              <access>read-write</access>
50238              <enumeratedValues>
50239                <enumeratedValue>
50240                  <name>00</name>
50241                  <description>Default voltage reference pin pair, that is, external pins VREFH and VREFL</description>
50242                  <value>#00</value>
50243                </enumeratedValue>
50244                <enumeratedValue>
50245                  <name>01</name>
50246                  <description>Alternate reference pair, that is, VALTH and VALTL . This pair may be additional external pins or internal sources depending on the MCU configuration. See the chip configuration information for details specific to this MCU</description>
50247                  <value>#01</value>
50248                </enumeratedValue>
50249              </enumeratedValues>
50250            </field>
50251            <field>
50252              <name>DMAEN</name>
50253              <description>DMA Enable</description>
50254              <bitOffset>2</bitOffset>
50255              <bitWidth>1</bitWidth>
50256              <access>read-write</access>
50257              <enumeratedValues>
50258                <enumeratedValue>
50259                  <name>0</name>
50260                  <description>DMA is disabled.</description>
50261                  <value>#0</value>
50262                </enumeratedValue>
50263                <enumeratedValue>
50264                  <name>1</name>
50265                  <description>DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event noted when any of the SC1n[COCO] flags is asserted.</description>
50266                  <value>#1</value>
50267                </enumeratedValue>
50268              </enumeratedValues>
50269            </field>
50270            <field>
50271              <name>ACREN</name>
50272              <description>Compare Function Range Enable</description>
50273              <bitOffset>3</bitOffset>
50274              <bitWidth>1</bitWidth>
50275              <access>read-write</access>
50276              <enumeratedValues>
50277                <enumeratedValue>
50278                  <name>0</name>
50279                  <description>Range function disabled. Only CV1 is compared.</description>
50280                  <value>#0</value>
50281                </enumeratedValue>
50282                <enumeratedValue>
50283                  <name>1</name>
50284                  <description>Range function enabled. Both CV1 and CV2 are compared.</description>
50285                  <value>#1</value>
50286                </enumeratedValue>
50287              </enumeratedValues>
50288            </field>
50289            <field>
50290              <name>ACFGT</name>
50291              <description>Compare Function Greater Than Enable</description>
50292              <bitOffset>4</bitOffset>
50293              <bitWidth>1</bitWidth>
50294              <access>read-write</access>
50295              <enumeratedValues>
50296                <enumeratedValue>
50297                  <name>0</name>
50298                  <description>Configures less than threshold, outside range not inclusive and inside range not inclusive; functionality based on the values placed in CV1 and CV2.</description>
50299                  <value>#0</value>
50300                </enumeratedValue>
50301                <enumeratedValue>
50302                  <name>1</name>
50303                  <description>Configures greater than or equal to threshold, outside and inside ranges inclusive; functionality based on the values placed in CV1 and CV2.</description>
50304                  <value>#1</value>
50305                </enumeratedValue>
50306              </enumeratedValues>
50307            </field>
50308            <field>
50309              <name>ACFE</name>
50310              <description>Compare Function Enable</description>
50311              <bitOffset>5</bitOffset>
50312              <bitWidth>1</bitWidth>
50313              <access>read-write</access>
50314              <enumeratedValues>
50315                <enumeratedValue>
50316                  <name>0</name>
50317                  <description>Compare function disabled.</description>
50318                  <value>#0</value>
50319                </enumeratedValue>
50320                <enumeratedValue>
50321                  <name>1</name>
50322                  <description>Compare function enabled.</description>
50323                  <value>#1</value>
50324                </enumeratedValue>
50325              </enumeratedValues>
50326            </field>
50327            <field>
50328              <name>ADTRG</name>
50329              <description>Conversion Trigger Select</description>
50330              <bitOffset>6</bitOffset>
50331              <bitWidth>1</bitWidth>
50332              <access>read-write</access>
50333              <enumeratedValues>
50334                <enumeratedValue>
50335                  <name>0</name>
50336                  <description>Software trigger selected.</description>
50337                  <value>#0</value>
50338                </enumeratedValue>
50339                <enumeratedValue>
50340                  <name>1</name>
50341                  <description>Hardware trigger selected.</description>
50342                  <value>#1</value>
50343                </enumeratedValue>
50344              </enumeratedValues>
50345            </field>
50346            <field>
50347              <name>ADACT</name>
50348              <description>Conversion Active</description>
50349              <bitOffset>7</bitOffset>
50350              <bitWidth>1</bitWidth>
50351              <access>read-only</access>
50352              <enumeratedValues>
50353                <enumeratedValue>
50354                  <name>0</name>
50355                  <description>Conversion not in progress.</description>
50356                  <value>#0</value>
50357                </enumeratedValue>
50358                <enumeratedValue>
50359                  <name>1</name>
50360                  <description>Conversion in progress.</description>
50361                  <value>#1</value>
50362                </enumeratedValue>
50363              </enumeratedValues>
50364            </field>
50365          </fields>
50366        </register>
50367        <register>
50368          <name>SC3</name>
50369          <description>Status and Control Register 3</description>
50370          <addressOffset>0x24</addressOffset>
50371          <size>32</size>
50372          <access>read-write</access>
50373          <resetValue>0</resetValue>
50374          <resetMask>0xFFFFFFFF</resetMask>
50375          <fields>
50376            <field>
50377              <name>AVGS</name>
50378              <description>Hardware Average Select</description>
50379              <bitOffset>0</bitOffset>
50380              <bitWidth>2</bitWidth>
50381              <access>read-write</access>
50382              <enumeratedValues>
50383                <enumeratedValue>
50384                  <name>00</name>
50385                  <description>4 samples averaged.</description>
50386                  <value>#00</value>
50387                </enumeratedValue>
50388                <enumeratedValue>
50389                  <name>01</name>
50390                  <description>8 samples averaged.</description>
50391                  <value>#01</value>
50392                </enumeratedValue>
50393                <enumeratedValue>
50394                  <name>10</name>
50395                  <description>16 samples averaged.</description>
50396                  <value>#10</value>
50397                </enumeratedValue>
50398                <enumeratedValue>
50399                  <name>11</name>
50400                  <description>32 samples averaged.</description>
50401                  <value>#11</value>
50402                </enumeratedValue>
50403              </enumeratedValues>
50404            </field>
50405            <field>
50406              <name>AVGE</name>
50407              <description>Hardware Average Enable</description>
50408              <bitOffset>2</bitOffset>
50409              <bitWidth>1</bitWidth>
50410              <access>read-write</access>
50411              <enumeratedValues>
50412                <enumeratedValue>
50413                  <name>0</name>
50414                  <description>Hardware average function disabled.</description>
50415                  <value>#0</value>
50416                </enumeratedValue>
50417                <enumeratedValue>
50418                  <name>1</name>
50419                  <description>Hardware average function enabled.</description>
50420                  <value>#1</value>
50421                </enumeratedValue>
50422              </enumeratedValues>
50423            </field>
50424            <field>
50425              <name>ADCO</name>
50426              <description>Continuous Conversion Enable</description>
50427              <bitOffset>3</bitOffset>
50428              <bitWidth>1</bitWidth>
50429              <access>read-write</access>
50430              <enumeratedValues>
50431                <enumeratedValue>
50432                  <name>0</name>
50433                  <description>One conversion or one set of conversions if the hardware average function is enabled, that is, AVGE=1, after initiating a conversion.</description>
50434                  <value>#0</value>
50435                </enumeratedValue>
50436                <enumeratedValue>
50437                  <name>1</name>
50438                  <description>Continuous conversions or sets of conversions if the hardware average function is enabled, that is, AVGE=1, after initiating a conversion.</description>
50439                  <value>#1</value>
50440                </enumeratedValue>
50441              </enumeratedValues>
50442            </field>
50443            <field>
50444              <name>CALF</name>
50445              <description>Calibration Failed Flag</description>
50446              <bitOffset>6</bitOffset>
50447              <bitWidth>1</bitWidth>
50448              <access>read-write</access>
50449              <enumeratedValues>
50450                <enumeratedValue>
50451                  <name>0</name>
50452                  <description>Calibration completed normally.</description>
50453                  <value>#0</value>
50454                </enumeratedValue>
50455                <enumeratedValue>
50456                  <name>1</name>
50457                  <description>Calibration failed. ADC accuracy specifications are not guaranteed.</description>
50458                  <value>#1</value>
50459                </enumeratedValue>
50460              </enumeratedValues>
50461            </field>
50462            <field>
50463              <name>CAL</name>
50464              <description>Calibration</description>
50465              <bitOffset>7</bitOffset>
50466              <bitWidth>1</bitWidth>
50467              <access>read-write</access>
50468            </field>
50469          </fields>
50470        </register>
50471        <register>
50472          <name>OFS</name>
50473          <description>ADC Offset Correction Register</description>
50474          <addressOffset>0x28</addressOffset>
50475          <size>32</size>
50476          <access>read-write</access>
50477          <resetValue>0x4</resetValue>
50478          <resetMask>0xFFFFFFFF</resetMask>
50479          <fields>
50480            <field>
50481              <name>OFS</name>
50482              <description>Offset Error Correction Value</description>
50483              <bitOffset>0</bitOffset>
50484              <bitWidth>16</bitWidth>
50485              <access>read-write</access>
50486            </field>
50487          </fields>
50488        </register>
50489        <register>
50490          <name>PG</name>
50491          <description>ADC Plus-Side Gain Register</description>
50492          <addressOffset>0x2C</addressOffset>
50493          <size>32</size>
50494          <access>read-write</access>
50495          <resetValue>0x8200</resetValue>
50496          <resetMask>0xFFFFFFFF</resetMask>
50497          <fields>
50498            <field>
50499              <name>PG</name>
50500              <description>Plus-Side Gain</description>
50501              <bitOffset>0</bitOffset>
50502              <bitWidth>16</bitWidth>
50503              <access>read-write</access>
50504            </field>
50505          </fields>
50506        </register>
50507        <register>
50508          <name>MG</name>
50509          <description>ADC Minus-Side Gain Register</description>
50510          <addressOffset>0x30</addressOffset>
50511          <size>32</size>
50512          <access>read-write</access>
50513          <resetValue>0x8200</resetValue>
50514          <resetMask>0xFFFFFFFF</resetMask>
50515          <fields>
50516            <field>
50517              <name>MG</name>
50518              <description>Minus-Side Gain</description>
50519              <bitOffset>0</bitOffset>
50520              <bitWidth>16</bitWidth>
50521              <access>read-write</access>
50522            </field>
50523          </fields>
50524        </register>
50525        <register>
50526          <name>CLPD</name>
50527          <description>ADC Plus-Side General Calibration Value Register</description>
50528          <addressOffset>0x34</addressOffset>
50529          <size>32</size>
50530          <access>read-write</access>
50531          <resetValue>0xA</resetValue>
50532          <resetMask>0xFFFFFFFF</resetMask>
50533          <fields>
50534            <field>
50535              <name>CLPD</name>
50536              <description>Calibration Value</description>
50537              <bitOffset>0</bitOffset>
50538              <bitWidth>6</bitWidth>
50539              <access>read-write</access>
50540            </field>
50541          </fields>
50542        </register>
50543        <register>
50544          <name>CLPS</name>
50545          <description>ADC Plus-Side General Calibration Value Register</description>
50546          <addressOffset>0x38</addressOffset>
50547          <size>32</size>
50548          <access>read-write</access>
50549          <resetValue>0x20</resetValue>
50550          <resetMask>0xFFFFFFFF</resetMask>
50551          <fields>
50552            <field>
50553              <name>CLPS</name>
50554              <description>Calibration Value</description>
50555              <bitOffset>0</bitOffset>
50556              <bitWidth>6</bitWidth>
50557              <access>read-write</access>
50558            </field>
50559          </fields>
50560        </register>
50561        <register>
50562          <name>CLP4</name>
50563          <description>ADC Plus-Side General Calibration Value Register</description>
50564          <addressOffset>0x3C</addressOffset>
50565          <size>32</size>
50566          <access>read-write</access>
50567          <resetValue>0x200</resetValue>
50568          <resetMask>0xFFFFFFFF</resetMask>
50569          <fields>
50570            <field>
50571              <name>CLP4</name>
50572              <description>Calibration Value</description>
50573              <bitOffset>0</bitOffset>
50574              <bitWidth>10</bitWidth>
50575              <access>read-write</access>
50576            </field>
50577          </fields>
50578        </register>
50579        <register>
50580          <name>CLP3</name>
50581          <description>ADC Plus-Side General Calibration Value Register</description>
50582          <addressOffset>0x40</addressOffset>
50583          <size>32</size>
50584          <access>read-write</access>
50585          <resetValue>0x100</resetValue>
50586          <resetMask>0xFFFFFFFF</resetMask>
50587          <fields>
50588            <field>
50589              <name>CLP3</name>
50590              <description>Calibration Value</description>
50591              <bitOffset>0</bitOffset>
50592              <bitWidth>9</bitWidth>
50593              <access>read-write</access>
50594            </field>
50595          </fields>
50596        </register>
50597        <register>
50598          <name>CLP2</name>
50599          <description>ADC Plus-Side General Calibration Value Register</description>
50600          <addressOffset>0x44</addressOffset>
50601          <size>32</size>
50602          <access>read-write</access>
50603          <resetValue>0x80</resetValue>
50604          <resetMask>0xFFFFFFFF</resetMask>
50605          <fields>
50606            <field>
50607              <name>CLP2</name>
50608              <description>Calibration Value</description>
50609              <bitOffset>0</bitOffset>
50610              <bitWidth>8</bitWidth>
50611              <access>read-write</access>
50612            </field>
50613          </fields>
50614        </register>
50615        <register>
50616          <name>CLP1</name>
50617          <description>ADC Plus-Side General Calibration Value Register</description>
50618          <addressOffset>0x48</addressOffset>
50619          <size>32</size>
50620          <access>read-write</access>
50621          <resetValue>0x40</resetValue>
50622          <resetMask>0xFFFFFFFF</resetMask>
50623          <fields>
50624            <field>
50625              <name>CLP1</name>
50626              <description>Calibration Value</description>
50627              <bitOffset>0</bitOffset>
50628              <bitWidth>7</bitWidth>
50629              <access>read-write</access>
50630            </field>
50631          </fields>
50632        </register>
50633        <register>
50634          <name>CLP0</name>
50635          <description>ADC Plus-Side General Calibration Value Register</description>
50636          <addressOffset>0x4C</addressOffset>
50637          <size>32</size>
50638          <access>read-write</access>
50639          <resetValue>0x20</resetValue>
50640          <resetMask>0xFFFFFFFF</resetMask>
50641          <fields>
50642            <field>
50643              <name>CLP0</name>
50644              <description>Calibration Value</description>
50645              <bitOffset>0</bitOffset>
50646              <bitWidth>6</bitWidth>
50647              <access>read-write</access>
50648            </field>
50649          </fields>
50650        </register>
50651        <register>
50652          <name>CLMD</name>
50653          <description>ADC Minus-Side General Calibration Value Register</description>
50654          <addressOffset>0x54</addressOffset>
50655          <size>32</size>
50656          <access>read-write</access>
50657          <resetValue>0xA</resetValue>
50658          <resetMask>0xFFFFFFFF</resetMask>
50659          <fields>
50660            <field>
50661              <name>CLMD</name>
50662              <description>Calibration Value</description>
50663              <bitOffset>0</bitOffset>
50664              <bitWidth>6</bitWidth>
50665              <access>read-write</access>
50666            </field>
50667          </fields>
50668        </register>
50669        <register>
50670          <name>CLMS</name>
50671          <description>ADC Minus-Side General Calibration Value Register</description>
50672          <addressOffset>0x58</addressOffset>
50673          <size>32</size>
50674          <access>read-write</access>
50675          <resetValue>0x20</resetValue>
50676          <resetMask>0xFFFFFFFF</resetMask>
50677          <fields>
50678            <field>
50679              <name>CLMS</name>
50680              <description>Calibration Value</description>
50681              <bitOffset>0</bitOffset>
50682              <bitWidth>6</bitWidth>
50683              <access>read-write</access>
50684            </field>
50685          </fields>
50686        </register>
50687        <register>
50688          <name>CLM4</name>
50689          <description>ADC Minus-Side General Calibration Value Register</description>
50690          <addressOffset>0x5C</addressOffset>
50691          <size>32</size>
50692          <access>read-write</access>
50693          <resetValue>0x200</resetValue>
50694          <resetMask>0xFFFFFFFF</resetMask>
50695          <fields>
50696            <field>
50697              <name>CLM4</name>
50698              <description>Calibration Value</description>
50699              <bitOffset>0</bitOffset>
50700              <bitWidth>10</bitWidth>
50701              <access>read-write</access>
50702            </field>
50703          </fields>
50704        </register>
50705        <register>
50706          <name>CLM3</name>
50707          <description>ADC Minus-Side General Calibration Value Register</description>
50708          <addressOffset>0x60</addressOffset>
50709          <size>32</size>
50710          <access>read-write</access>
50711          <resetValue>0x100</resetValue>
50712          <resetMask>0xFFFFFFFF</resetMask>
50713          <fields>
50714            <field>
50715              <name>CLM3</name>
50716              <description>Calibration Value</description>
50717              <bitOffset>0</bitOffset>
50718              <bitWidth>9</bitWidth>
50719              <access>read-write</access>
50720            </field>
50721          </fields>
50722        </register>
50723        <register>
50724          <name>CLM2</name>
50725          <description>ADC Minus-Side General Calibration Value Register</description>
50726          <addressOffset>0x64</addressOffset>
50727          <size>32</size>
50728          <access>read-write</access>
50729          <resetValue>0x80</resetValue>
50730          <resetMask>0xFFFFFFFF</resetMask>
50731          <fields>
50732            <field>
50733              <name>CLM2</name>
50734              <description>Calibration Value</description>
50735              <bitOffset>0</bitOffset>
50736              <bitWidth>8</bitWidth>
50737              <access>read-write</access>
50738            </field>
50739          </fields>
50740        </register>
50741        <register>
50742          <name>CLM1</name>
50743          <description>ADC Minus-Side General Calibration Value Register</description>
50744          <addressOffset>0x68</addressOffset>
50745          <size>32</size>
50746          <access>read-write</access>
50747          <resetValue>0x40</resetValue>
50748          <resetMask>0xFFFFFFFF</resetMask>
50749          <fields>
50750            <field>
50751              <name>CLM1</name>
50752              <description>Calibration Value</description>
50753              <bitOffset>0</bitOffset>
50754              <bitWidth>7</bitWidth>
50755              <access>read-write</access>
50756            </field>
50757          </fields>
50758        </register>
50759        <register>
50760          <name>CLM0</name>
50761          <description>ADC Minus-Side General Calibration Value Register</description>
50762          <addressOffset>0x6C</addressOffset>
50763          <size>32</size>
50764          <access>read-write</access>
50765          <resetValue>0x20</resetValue>
50766          <resetMask>0xFFFFFFFF</resetMask>
50767          <fields>
50768            <field>
50769              <name>CLM0</name>
50770              <description>Calibration Value</description>
50771              <bitOffset>0</bitOffset>
50772              <bitWidth>6</bitWidth>
50773              <access>read-write</access>
50774            </field>
50775          </fields>
50776        </register>
50777      </registers>
50778    </peripheral>
50779    <peripheral>
50780      <name>RTC</name>
50781      <description>Secure Real Time Clock</description>
50782      <prependToName>RTC_</prependToName>
50783      <baseAddress>0x4003D000</baseAddress>
50784      <addressBlock>
50785        <offset>0</offset>
50786        <size>0x808</size>
50787        <usage>registers</usage>
50788      </addressBlock>
50789      <interrupt>
50790        <name>RTC</name>
50791        <value>46</value>
50792      </interrupt>
50793      <interrupt>
50794        <name>RTC_Seconds</name>
50795        <value>47</value>
50796      </interrupt>
50797      <registers>
50798        <register>
50799          <name>TSR</name>
50800          <description>RTC Time Seconds Register</description>
50801          <addressOffset>0</addressOffset>
50802          <size>32</size>
50803          <access>read-write</access>
50804          <resetValue>0</resetValue>
50805          <resetMask>0xFFFFFFFF</resetMask>
50806          <fields>
50807            <field>
50808              <name>TSR</name>
50809              <description>Time Seconds Register</description>
50810              <bitOffset>0</bitOffset>
50811              <bitWidth>32</bitWidth>
50812              <access>read-write</access>
50813            </field>
50814          </fields>
50815        </register>
50816        <register>
50817          <name>TPR</name>
50818          <description>RTC Time Prescaler Register</description>
50819          <addressOffset>0x4</addressOffset>
50820          <size>32</size>
50821          <access>read-write</access>
50822          <resetValue>0</resetValue>
50823          <resetMask>0xFFFFFFFF</resetMask>
50824          <fields>
50825            <field>
50826              <name>TPR</name>
50827              <description>Time Prescaler Register</description>
50828              <bitOffset>0</bitOffset>
50829              <bitWidth>16</bitWidth>
50830              <access>read-write</access>
50831            </field>
50832          </fields>
50833        </register>
50834        <register>
50835          <name>TAR</name>
50836          <description>RTC Time Alarm Register</description>
50837          <addressOffset>0x8</addressOffset>
50838          <size>32</size>
50839          <access>read-write</access>
50840          <resetValue>0</resetValue>
50841          <resetMask>0xFFFFFFFF</resetMask>
50842          <fields>
50843            <field>
50844              <name>TAR</name>
50845              <description>Time Alarm Register</description>
50846              <bitOffset>0</bitOffset>
50847              <bitWidth>32</bitWidth>
50848              <access>read-write</access>
50849            </field>
50850          </fields>
50851        </register>
50852        <register>
50853          <name>TCR</name>
50854          <description>RTC Time Compensation Register</description>
50855          <addressOffset>0xC</addressOffset>
50856          <size>32</size>
50857          <access>read-write</access>
50858          <resetValue>0</resetValue>
50859          <resetMask>0xFFFFFFFF</resetMask>
50860          <fields>
50861            <field>
50862              <name>TCR</name>
50863              <description>Time Compensation Register</description>
50864              <bitOffset>0</bitOffset>
50865              <bitWidth>8</bitWidth>
50866              <access>read-write</access>
50867              <enumeratedValues>
50868                <enumeratedValue>
50869                  <name>10000000</name>
50870                  <description>Time Prescaler Register overflows every 32896 clock cycles.</description>
50871                  <value>#10000000</value>
50872                </enumeratedValue>
50873                <enumeratedValue>
50874                  <name>11111111</name>
50875                  <description>Time Prescaler Register overflows every 32769 clock cycles.</description>
50876                  <value>#11111111</value>
50877                </enumeratedValue>
50878                <enumeratedValue>
50879                  <name>0</name>
50880                  <description>Time Prescaler Register overflows every 32768 clock cycles.</description>
50881                  <value>#0</value>
50882                </enumeratedValue>
50883                <enumeratedValue>
50884                  <name>1</name>
50885                  <description>Time Prescaler Register overflows every 32767 clock cycles.</description>
50886                  <value>#1</value>
50887                </enumeratedValue>
50888                <enumeratedValue>
50889                  <name>1111111</name>
50890                  <description>Time Prescaler Register overflows every 32641 clock cycles.</description>
50891                  <value>#1111111</value>
50892                </enumeratedValue>
50893              </enumeratedValues>
50894            </field>
50895            <field>
50896              <name>CIR</name>
50897              <description>Compensation Interval Register</description>
50898              <bitOffset>8</bitOffset>
50899              <bitWidth>8</bitWidth>
50900              <access>read-write</access>
50901            </field>
50902            <field>
50903              <name>TCV</name>
50904              <description>Time Compensation Value</description>
50905              <bitOffset>16</bitOffset>
50906              <bitWidth>8</bitWidth>
50907              <access>read-only</access>
50908            </field>
50909            <field>
50910              <name>CIC</name>
50911              <description>Compensation Interval Counter</description>
50912              <bitOffset>24</bitOffset>
50913              <bitWidth>8</bitWidth>
50914              <access>read-only</access>
50915            </field>
50916          </fields>
50917        </register>
50918        <register>
50919          <name>CR</name>
50920          <description>RTC Control Register</description>
50921          <addressOffset>0x10</addressOffset>
50922          <size>32</size>
50923          <access>read-write</access>
50924          <resetValue>0</resetValue>
50925          <resetMask>0xFFFFFFFF</resetMask>
50926          <fields>
50927            <field>
50928              <name>SWR</name>
50929              <description>Software Reset</description>
50930              <bitOffset>0</bitOffset>
50931              <bitWidth>1</bitWidth>
50932              <access>read-write</access>
50933              <enumeratedValues>
50934                <enumeratedValue>
50935                  <name>0</name>
50936                  <description>No effect.</description>
50937                  <value>#0</value>
50938                </enumeratedValue>
50939                <enumeratedValue>
50940                  <name>1</name>
50941                  <description>Resets all RTC registers except for the SWR bit and the RTC_WAR and RTC_RAR registers . The SWR bit is cleared by VBAT POR and by software explicitly clearing it.</description>
50942                  <value>#1</value>
50943                </enumeratedValue>
50944              </enumeratedValues>
50945            </field>
50946            <field>
50947              <name>WPE</name>
50948              <description>Wakeup Pin Enable</description>
50949              <bitOffset>1</bitOffset>
50950              <bitWidth>1</bitWidth>
50951              <access>read-write</access>
50952              <enumeratedValues>
50953                <enumeratedValue>
50954                  <name>0</name>
50955                  <description>Wakeup pin is disabled.</description>
50956                  <value>#0</value>
50957                </enumeratedValue>
50958                <enumeratedValue>
50959                  <name>1</name>
50960                  <description>Wakeup pin is enabled and wakeup pin asserts if the RTC interrupt asserts or the wakeup pin is turned on.</description>
50961                  <value>#1</value>
50962                </enumeratedValue>
50963              </enumeratedValues>
50964            </field>
50965            <field>
50966              <name>SUP</name>
50967              <description>Supervisor Access</description>
50968              <bitOffset>2</bitOffset>
50969              <bitWidth>1</bitWidth>
50970              <access>read-write</access>
50971              <enumeratedValues>
50972                <enumeratedValue>
50973                  <name>0</name>
50974                  <description>Non-supervisor mode write accesses are not supported and generate a bus error.</description>
50975                  <value>#0</value>
50976                </enumeratedValue>
50977                <enumeratedValue>
50978                  <name>1</name>
50979                  <description>Non-supervisor mode write accesses are supported.</description>
50980                  <value>#1</value>
50981                </enumeratedValue>
50982              </enumeratedValues>
50983            </field>
50984            <field>
50985              <name>UM</name>
50986              <description>Update Mode</description>
50987              <bitOffset>3</bitOffset>
50988              <bitWidth>1</bitWidth>
50989              <access>read-write</access>
50990              <enumeratedValues>
50991                <enumeratedValue>
50992                  <name>0</name>
50993                  <description>Registers cannot be written when locked.</description>
50994                  <value>#0</value>
50995                </enumeratedValue>
50996                <enumeratedValue>
50997                  <name>1</name>
50998                  <description>Registers can be written when locked under limited conditions.</description>
50999                  <value>#1</value>
51000                </enumeratedValue>
51001              </enumeratedValues>
51002            </field>
51003            <field>
51004              <name>WPS</name>
51005              <description>Wakeup Pin Select</description>
51006              <bitOffset>4</bitOffset>
51007              <bitWidth>1</bitWidth>
51008              <access>read-write</access>
51009              <enumeratedValues>
51010                <enumeratedValue>
51011                  <name>0</name>
51012                  <description>Wakeup pin asserts (active low, open drain) if the RTC interrupt asserts or the wakeup pin is turned on.</description>
51013                  <value>#0</value>
51014                </enumeratedValue>
51015                <enumeratedValue>
51016                  <name>1</name>
51017                  <description>Wakeup pin instead outputs the RTC 32kHz clock, provided the wakeup pin is turned on and the 32kHz clock is output to other peripherals.</description>
51018                  <value>#1</value>
51019                </enumeratedValue>
51020              </enumeratedValues>
51021            </field>
51022            <field>
51023              <name>OSCE</name>
51024              <description>Oscillator Enable</description>
51025              <bitOffset>8</bitOffset>
51026              <bitWidth>1</bitWidth>
51027              <access>read-write</access>
51028              <enumeratedValues>
51029                <enumeratedValue>
51030                  <name>0</name>
51031                  <description>32.768 kHz oscillator is disabled.</description>
51032                  <value>#0</value>
51033                </enumeratedValue>
51034                <enumeratedValue>
51035                  <name>1</name>
51036                  <description>32.768 kHz oscillator is enabled. After setting this bit, wait the oscillator startup time before enabling the time counter to allow the 32.768 kHz clock time to stabilize.</description>
51037                  <value>#1</value>
51038                </enumeratedValue>
51039              </enumeratedValues>
51040            </field>
51041            <field>
51042              <name>CLKO</name>
51043              <description>Clock Output</description>
51044              <bitOffset>9</bitOffset>
51045              <bitWidth>1</bitWidth>
51046              <access>read-write</access>
51047              <enumeratedValues>
51048                <enumeratedValue>
51049                  <name>0</name>
51050                  <description>The 32 kHz clock is output to other peripherals.</description>
51051                  <value>#0</value>
51052                </enumeratedValue>
51053                <enumeratedValue>
51054                  <name>1</name>
51055                  <description>The 32 kHz clock is not output to other peripherals.</description>
51056                  <value>#1</value>
51057                </enumeratedValue>
51058              </enumeratedValues>
51059            </field>
51060            <field>
51061              <name>SC16P</name>
51062              <description>Oscillator 16pF Load Configure</description>
51063              <bitOffset>10</bitOffset>
51064              <bitWidth>1</bitWidth>
51065              <access>read-write</access>
51066              <enumeratedValues>
51067                <enumeratedValue>
51068                  <name>0</name>
51069                  <description>Disable the load.</description>
51070                  <value>#0</value>
51071                </enumeratedValue>
51072                <enumeratedValue>
51073                  <name>1</name>
51074                  <description>Enable the additional load.</description>
51075                  <value>#1</value>
51076                </enumeratedValue>
51077              </enumeratedValues>
51078            </field>
51079            <field>
51080              <name>SC8P</name>
51081              <description>Oscillator 8pF Load Configure</description>
51082              <bitOffset>11</bitOffset>
51083              <bitWidth>1</bitWidth>
51084              <access>read-write</access>
51085              <enumeratedValues>
51086                <enumeratedValue>
51087                  <name>0</name>
51088                  <description>Disable the load.</description>
51089                  <value>#0</value>
51090                </enumeratedValue>
51091                <enumeratedValue>
51092                  <name>1</name>
51093                  <description>Enable the additional load.</description>
51094                  <value>#1</value>
51095                </enumeratedValue>
51096              </enumeratedValues>
51097            </field>
51098            <field>
51099              <name>SC4P</name>
51100              <description>Oscillator 4pF Load Configure</description>
51101              <bitOffset>12</bitOffset>
51102              <bitWidth>1</bitWidth>
51103              <access>read-write</access>
51104              <enumeratedValues>
51105                <enumeratedValue>
51106                  <name>0</name>
51107                  <description>Disable the load.</description>
51108                  <value>#0</value>
51109                </enumeratedValue>
51110                <enumeratedValue>
51111                  <name>1</name>
51112                  <description>Enable the additional load.</description>
51113                  <value>#1</value>
51114                </enumeratedValue>
51115              </enumeratedValues>
51116            </field>
51117            <field>
51118              <name>SC2P</name>
51119              <description>Oscillator 2pF Load Configure</description>
51120              <bitOffset>13</bitOffset>
51121              <bitWidth>1</bitWidth>
51122              <access>read-write</access>
51123              <enumeratedValues>
51124                <enumeratedValue>
51125                  <name>0</name>
51126                  <description>Disable the load.</description>
51127                  <value>#0</value>
51128                </enumeratedValue>
51129                <enumeratedValue>
51130                  <name>1</name>
51131                  <description>Enable the additional load.</description>
51132                  <value>#1</value>
51133                </enumeratedValue>
51134              </enumeratedValues>
51135            </field>
51136          </fields>
51137        </register>
51138        <register>
51139          <name>SR</name>
51140          <description>RTC Status Register</description>
51141          <addressOffset>0x14</addressOffset>
51142          <size>32</size>
51143          <access>read-write</access>
51144          <resetValue>0x1</resetValue>
51145          <resetMask>0xFFFFFFFF</resetMask>
51146          <fields>
51147            <field>
51148              <name>TIF</name>
51149              <description>Time Invalid Flag</description>
51150              <bitOffset>0</bitOffset>
51151              <bitWidth>1</bitWidth>
51152              <access>read-only</access>
51153              <enumeratedValues>
51154                <enumeratedValue>
51155                  <name>0</name>
51156                  <description>Time is valid.</description>
51157                  <value>#0</value>
51158                </enumeratedValue>
51159                <enumeratedValue>
51160                  <name>1</name>
51161                  <description>Time is invalid and time counter is read as zero.</description>
51162                  <value>#1</value>
51163                </enumeratedValue>
51164              </enumeratedValues>
51165            </field>
51166            <field>
51167              <name>TOF</name>
51168              <description>Time Overflow Flag</description>
51169              <bitOffset>1</bitOffset>
51170              <bitWidth>1</bitWidth>
51171              <access>read-only</access>
51172              <enumeratedValues>
51173                <enumeratedValue>
51174                  <name>0</name>
51175                  <description>Time overflow has not occurred.</description>
51176                  <value>#0</value>
51177                </enumeratedValue>
51178                <enumeratedValue>
51179                  <name>1</name>
51180                  <description>Time overflow has occurred and time counter is read as zero.</description>
51181                  <value>#1</value>
51182                </enumeratedValue>
51183              </enumeratedValues>
51184            </field>
51185            <field>
51186              <name>TAF</name>
51187              <description>Time Alarm Flag</description>
51188              <bitOffset>2</bitOffset>
51189              <bitWidth>1</bitWidth>
51190              <access>read-only</access>
51191              <enumeratedValues>
51192                <enumeratedValue>
51193                  <name>0</name>
51194                  <description>Time alarm has not occurred.</description>
51195                  <value>#0</value>
51196                </enumeratedValue>
51197                <enumeratedValue>
51198                  <name>1</name>
51199                  <description>Time alarm has occurred.</description>
51200                  <value>#1</value>
51201                </enumeratedValue>
51202              </enumeratedValues>
51203            </field>
51204            <field>
51205              <name>TCE</name>
51206              <description>Time Counter Enable</description>
51207              <bitOffset>4</bitOffset>
51208              <bitWidth>1</bitWidth>
51209              <access>read-write</access>
51210              <enumeratedValues>
51211                <enumeratedValue>
51212                  <name>0</name>
51213                  <description>Time counter is disabled.</description>
51214                  <value>#0</value>
51215                </enumeratedValue>
51216                <enumeratedValue>
51217                  <name>1</name>
51218                  <description>Time counter is enabled.</description>
51219                  <value>#1</value>
51220                </enumeratedValue>
51221              </enumeratedValues>
51222            </field>
51223          </fields>
51224        </register>
51225        <register>
51226          <name>LR</name>
51227          <description>RTC Lock Register</description>
51228          <addressOffset>0x18</addressOffset>
51229          <size>32</size>
51230          <access>read-write</access>
51231          <resetValue>0xFF</resetValue>
51232          <resetMask>0xFFFFFFFF</resetMask>
51233          <fields>
51234            <field>
51235              <name>TCL</name>
51236              <description>Time Compensation Lock</description>
51237              <bitOffset>3</bitOffset>
51238              <bitWidth>1</bitWidth>
51239              <access>read-write</access>
51240              <enumeratedValues>
51241                <enumeratedValue>
51242                  <name>0</name>
51243                  <description>Time Compensation Register is locked and writes are ignored.</description>
51244                  <value>#0</value>
51245                </enumeratedValue>
51246                <enumeratedValue>
51247                  <name>1</name>
51248                  <description>Time Compensation Register is not locked and writes complete as normal.</description>
51249                  <value>#1</value>
51250                </enumeratedValue>
51251              </enumeratedValues>
51252            </field>
51253            <field>
51254              <name>CRL</name>
51255              <description>Control Register Lock</description>
51256              <bitOffset>4</bitOffset>
51257              <bitWidth>1</bitWidth>
51258              <access>read-write</access>
51259              <enumeratedValues>
51260                <enumeratedValue>
51261                  <name>0</name>
51262                  <description>Control Register is locked and writes are ignored.</description>
51263                  <value>#0</value>
51264                </enumeratedValue>
51265                <enumeratedValue>
51266                  <name>1</name>
51267                  <description>Control Register is not locked and writes complete as normal.</description>
51268                  <value>#1</value>
51269                </enumeratedValue>
51270              </enumeratedValues>
51271            </field>
51272            <field>
51273              <name>SRL</name>
51274              <description>Status Register Lock</description>
51275              <bitOffset>5</bitOffset>
51276              <bitWidth>1</bitWidth>
51277              <access>read-write</access>
51278              <enumeratedValues>
51279                <enumeratedValue>
51280                  <name>0</name>
51281                  <description>Status Register is locked and writes are ignored.</description>
51282                  <value>#0</value>
51283                </enumeratedValue>
51284                <enumeratedValue>
51285                  <name>1</name>
51286                  <description>Status Register is not locked and writes complete as normal.</description>
51287                  <value>#1</value>
51288                </enumeratedValue>
51289              </enumeratedValues>
51290            </field>
51291            <field>
51292              <name>LRL</name>
51293              <description>Lock Register Lock</description>
51294              <bitOffset>6</bitOffset>
51295              <bitWidth>1</bitWidth>
51296              <access>read-write</access>
51297              <enumeratedValues>
51298                <enumeratedValue>
51299                  <name>0</name>
51300                  <description>Lock Register is locked and writes are ignored.</description>
51301                  <value>#0</value>
51302                </enumeratedValue>
51303                <enumeratedValue>
51304                  <name>1</name>
51305                  <description>Lock Register is not locked and writes complete as normal.</description>
51306                  <value>#1</value>
51307                </enumeratedValue>
51308              </enumeratedValues>
51309            </field>
51310          </fields>
51311        </register>
51312        <register>
51313          <name>IER</name>
51314          <description>RTC Interrupt Enable Register</description>
51315          <addressOffset>0x1C</addressOffset>
51316          <size>32</size>
51317          <access>read-write</access>
51318          <resetValue>0x7</resetValue>
51319          <resetMask>0xFFFFFFFF</resetMask>
51320          <fields>
51321            <field>
51322              <name>TIIE</name>
51323              <description>Time Invalid Interrupt Enable</description>
51324              <bitOffset>0</bitOffset>
51325              <bitWidth>1</bitWidth>
51326              <access>read-write</access>
51327              <enumeratedValues>
51328                <enumeratedValue>
51329                  <name>0</name>
51330                  <description>Time invalid flag does not generate an interrupt.</description>
51331                  <value>#0</value>
51332                </enumeratedValue>
51333                <enumeratedValue>
51334                  <name>1</name>
51335                  <description>Time invalid flag does generate an interrupt.</description>
51336                  <value>#1</value>
51337                </enumeratedValue>
51338              </enumeratedValues>
51339            </field>
51340            <field>
51341              <name>TOIE</name>
51342              <description>Time Overflow Interrupt Enable</description>
51343              <bitOffset>1</bitOffset>
51344              <bitWidth>1</bitWidth>
51345              <access>read-write</access>
51346              <enumeratedValues>
51347                <enumeratedValue>
51348                  <name>0</name>
51349                  <description>Time overflow flag does not generate an interrupt.</description>
51350                  <value>#0</value>
51351                </enumeratedValue>
51352                <enumeratedValue>
51353                  <name>1</name>
51354                  <description>Time overflow flag does generate an interrupt.</description>
51355                  <value>#1</value>
51356                </enumeratedValue>
51357              </enumeratedValues>
51358            </field>
51359            <field>
51360              <name>TAIE</name>
51361              <description>Time Alarm Interrupt Enable</description>
51362              <bitOffset>2</bitOffset>
51363              <bitWidth>1</bitWidth>
51364              <access>read-write</access>
51365              <enumeratedValues>
51366                <enumeratedValue>
51367                  <name>0</name>
51368                  <description>Time alarm flag does not generate an interrupt.</description>
51369                  <value>#0</value>
51370                </enumeratedValue>
51371                <enumeratedValue>
51372                  <name>1</name>
51373                  <description>Time alarm flag does generate an interrupt.</description>
51374                  <value>#1</value>
51375                </enumeratedValue>
51376              </enumeratedValues>
51377            </field>
51378            <field>
51379              <name>TSIE</name>
51380              <description>Time Seconds Interrupt Enable</description>
51381              <bitOffset>4</bitOffset>
51382              <bitWidth>1</bitWidth>
51383              <access>read-write</access>
51384              <enumeratedValues>
51385                <enumeratedValue>
51386                  <name>0</name>
51387                  <description>Seconds interrupt is disabled.</description>
51388                  <value>#0</value>
51389                </enumeratedValue>
51390                <enumeratedValue>
51391                  <name>1</name>
51392                  <description>Seconds interrupt is enabled.</description>
51393                  <value>#1</value>
51394                </enumeratedValue>
51395              </enumeratedValues>
51396            </field>
51397            <field>
51398              <name>WPON</name>
51399              <description>Wakeup Pin On</description>
51400              <bitOffset>7</bitOffset>
51401              <bitWidth>1</bitWidth>
51402              <access>read-write</access>
51403              <enumeratedValues>
51404                <enumeratedValue>
51405                  <name>0</name>
51406                  <description>No effect.</description>
51407                  <value>#0</value>
51408                </enumeratedValue>
51409                <enumeratedValue>
51410                  <name>1</name>
51411                  <description>If the wakeup pin is enabled, then the wakeup pin will assert.</description>
51412                  <value>#1</value>
51413                </enumeratedValue>
51414              </enumeratedValues>
51415            </field>
51416          </fields>
51417        </register>
51418        <register>
51419          <name>WAR</name>
51420          <description>RTC Write Access Register</description>
51421          <addressOffset>0x800</addressOffset>
51422          <size>32</size>
51423          <access>read-write</access>
51424          <resetValue>0xFF</resetValue>
51425          <resetMask>0xFFFFFFFF</resetMask>
51426          <fields>
51427            <field>
51428              <name>TSRW</name>
51429              <description>Time Seconds Register Write</description>
51430              <bitOffset>0</bitOffset>
51431              <bitWidth>1</bitWidth>
51432              <access>read-write</access>
51433              <enumeratedValues>
51434                <enumeratedValue>
51435                  <name>0</name>
51436                  <description>Writes to the Time Seconds Register are ignored.</description>
51437                  <value>#0</value>
51438                </enumeratedValue>
51439                <enumeratedValue>
51440                  <name>1</name>
51441                  <description>Writes to the Time Seconds Register complete as normal.</description>
51442                  <value>#1</value>
51443                </enumeratedValue>
51444              </enumeratedValues>
51445            </field>
51446            <field>
51447              <name>TPRW</name>
51448              <description>Time Prescaler Register Write</description>
51449              <bitOffset>1</bitOffset>
51450              <bitWidth>1</bitWidth>
51451              <access>read-write</access>
51452              <enumeratedValues>
51453                <enumeratedValue>
51454                  <name>0</name>
51455                  <description>Writes to the Time Prescaler Register are ignored.</description>
51456                  <value>#0</value>
51457                </enumeratedValue>
51458                <enumeratedValue>
51459                  <name>1</name>
51460                  <description>Writes to the Time Prescaler Register complete as normal.</description>
51461                  <value>#1</value>
51462                </enumeratedValue>
51463              </enumeratedValues>
51464            </field>
51465            <field>
51466              <name>TARW</name>
51467              <description>Time Alarm Register Write</description>
51468              <bitOffset>2</bitOffset>
51469              <bitWidth>1</bitWidth>
51470              <access>read-write</access>
51471              <enumeratedValues>
51472                <enumeratedValue>
51473                  <name>0</name>
51474                  <description>Writes to the Time Alarm Register are ignored.</description>
51475                  <value>#0</value>
51476                </enumeratedValue>
51477                <enumeratedValue>
51478                  <name>1</name>
51479                  <description>Writes to the Time Alarm Register complete as normal.</description>
51480                  <value>#1</value>
51481                </enumeratedValue>
51482              </enumeratedValues>
51483            </field>
51484            <field>
51485              <name>TCRW</name>
51486              <description>Time Compensation Register Write</description>
51487              <bitOffset>3</bitOffset>
51488              <bitWidth>1</bitWidth>
51489              <access>read-write</access>
51490              <enumeratedValues>
51491                <enumeratedValue>
51492                  <name>0</name>
51493                  <description>Writes to the Time Compensation Register are ignored.</description>
51494                  <value>#0</value>
51495                </enumeratedValue>
51496                <enumeratedValue>
51497                  <name>1</name>
51498                  <description>Writes to the Time Compensation Register complete as normal.</description>
51499                  <value>#1</value>
51500                </enumeratedValue>
51501              </enumeratedValues>
51502            </field>
51503            <field>
51504              <name>CRW</name>
51505              <description>Control Register Write</description>
51506              <bitOffset>4</bitOffset>
51507              <bitWidth>1</bitWidth>
51508              <access>read-write</access>
51509              <enumeratedValues>
51510                <enumeratedValue>
51511                  <name>0</name>
51512                  <description>Writes to the Control Register are ignored.</description>
51513                  <value>#0</value>
51514                </enumeratedValue>
51515                <enumeratedValue>
51516                  <name>1</name>
51517                  <description>Writes to the Control Register complete as normal.</description>
51518                  <value>#1</value>
51519                </enumeratedValue>
51520              </enumeratedValues>
51521            </field>
51522            <field>
51523              <name>SRW</name>
51524              <description>Status Register Write</description>
51525              <bitOffset>5</bitOffset>
51526              <bitWidth>1</bitWidth>
51527              <access>read-write</access>
51528              <enumeratedValues>
51529                <enumeratedValue>
51530                  <name>0</name>
51531                  <description>Writes to the Status Register are ignored.</description>
51532                  <value>#0</value>
51533                </enumeratedValue>
51534                <enumeratedValue>
51535                  <name>1</name>
51536                  <description>Writes to the Status Register complete as normal.</description>
51537                  <value>#1</value>
51538                </enumeratedValue>
51539              </enumeratedValues>
51540            </field>
51541            <field>
51542              <name>LRW</name>
51543              <description>Lock Register Write</description>
51544              <bitOffset>6</bitOffset>
51545              <bitWidth>1</bitWidth>
51546              <access>read-write</access>
51547              <enumeratedValues>
51548                <enumeratedValue>
51549                  <name>0</name>
51550                  <description>Writes to the Lock Register are ignored.</description>
51551                  <value>#0</value>
51552                </enumeratedValue>
51553                <enumeratedValue>
51554                  <name>1</name>
51555                  <description>Writes to the Lock Register complete as normal.</description>
51556                  <value>#1</value>
51557                </enumeratedValue>
51558              </enumeratedValues>
51559            </field>
51560            <field>
51561              <name>IERW</name>
51562              <description>Interrupt Enable Register Write</description>
51563              <bitOffset>7</bitOffset>
51564              <bitWidth>1</bitWidth>
51565              <access>read-write</access>
51566              <enumeratedValues>
51567                <enumeratedValue>
51568                  <name>0</name>
51569                  <description>Writes to the Interupt Enable Register are ignored.</description>
51570                  <value>#0</value>
51571                </enumeratedValue>
51572                <enumeratedValue>
51573                  <name>1</name>
51574                  <description>Writes to the Interrupt Enable Register complete as normal.</description>
51575                  <value>#1</value>
51576                </enumeratedValue>
51577              </enumeratedValues>
51578            </field>
51579          </fields>
51580        </register>
51581        <register>
51582          <name>RAR</name>
51583          <description>RTC Read Access Register</description>
51584          <addressOffset>0x804</addressOffset>
51585          <size>32</size>
51586          <access>read-write</access>
51587          <resetValue>0xFF</resetValue>
51588          <resetMask>0xFFFFFFFF</resetMask>
51589          <fields>
51590            <field>
51591              <name>TSRR</name>
51592              <description>Time Seconds Register Read</description>
51593              <bitOffset>0</bitOffset>
51594              <bitWidth>1</bitWidth>
51595              <access>read-write</access>
51596              <enumeratedValues>
51597                <enumeratedValue>
51598                  <name>0</name>
51599                  <description>Reads to the Time Seconds Register are ignored.</description>
51600                  <value>#0</value>
51601                </enumeratedValue>
51602                <enumeratedValue>
51603                  <name>1</name>
51604                  <description>Reads to the Time Seconds Register complete as normal.</description>
51605                  <value>#1</value>
51606                </enumeratedValue>
51607              </enumeratedValues>
51608            </field>
51609            <field>
51610              <name>TPRR</name>
51611              <description>Time Prescaler Register Read</description>
51612              <bitOffset>1</bitOffset>
51613              <bitWidth>1</bitWidth>
51614              <access>read-write</access>
51615              <enumeratedValues>
51616                <enumeratedValue>
51617                  <name>0</name>
51618                  <description>Reads to the Time Pprescaler Register are ignored.</description>
51619                  <value>#0</value>
51620                </enumeratedValue>
51621                <enumeratedValue>
51622                  <name>1</name>
51623                  <description>Reads to the Time Prescaler Register complete as normal.</description>
51624                  <value>#1</value>
51625                </enumeratedValue>
51626              </enumeratedValues>
51627            </field>
51628            <field>
51629              <name>TARR</name>
51630              <description>Time Alarm Register Read</description>
51631              <bitOffset>2</bitOffset>
51632              <bitWidth>1</bitWidth>
51633              <access>read-write</access>
51634              <enumeratedValues>
51635                <enumeratedValue>
51636                  <name>0</name>
51637                  <description>Reads to the Time Alarm Register are ignored.</description>
51638                  <value>#0</value>
51639                </enumeratedValue>
51640                <enumeratedValue>
51641                  <name>1</name>
51642                  <description>Reads to the Time Alarm Register complete as normal.</description>
51643                  <value>#1</value>
51644                </enumeratedValue>
51645              </enumeratedValues>
51646            </field>
51647            <field>
51648              <name>TCRR</name>
51649              <description>Time Compensation Register Read</description>
51650              <bitOffset>3</bitOffset>
51651              <bitWidth>1</bitWidth>
51652              <access>read-write</access>
51653              <enumeratedValues>
51654                <enumeratedValue>
51655                  <name>0</name>
51656                  <description>Reads to the Time Compensation Register are ignored.</description>
51657                  <value>#0</value>
51658                </enumeratedValue>
51659                <enumeratedValue>
51660                  <name>1</name>
51661                  <description>Reads to the Time Compensation Register complete as normal.</description>
51662                  <value>#1</value>
51663                </enumeratedValue>
51664              </enumeratedValues>
51665            </field>
51666            <field>
51667              <name>CRR</name>
51668              <description>Control Register Read</description>
51669              <bitOffset>4</bitOffset>
51670              <bitWidth>1</bitWidth>
51671              <access>read-write</access>
51672              <enumeratedValues>
51673                <enumeratedValue>
51674                  <name>0</name>
51675                  <description>Reads to the Control Register are ignored.</description>
51676                  <value>#0</value>
51677                </enumeratedValue>
51678                <enumeratedValue>
51679                  <name>1</name>
51680                  <description>Reads to the Control Register complete as normal.</description>
51681                  <value>#1</value>
51682                </enumeratedValue>
51683              </enumeratedValues>
51684            </field>
51685            <field>
51686              <name>SRR</name>
51687              <description>Status Register Read</description>
51688              <bitOffset>5</bitOffset>
51689              <bitWidth>1</bitWidth>
51690              <access>read-write</access>
51691              <enumeratedValues>
51692                <enumeratedValue>
51693                  <name>0</name>
51694                  <description>Reads to the Status Register are ignored.</description>
51695                  <value>#0</value>
51696                </enumeratedValue>
51697                <enumeratedValue>
51698                  <name>1</name>
51699                  <description>Reads to the Status Register complete as normal.</description>
51700                  <value>#1</value>
51701                </enumeratedValue>
51702              </enumeratedValues>
51703            </field>
51704            <field>
51705              <name>LRR</name>
51706              <description>Lock Register Read</description>
51707              <bitOffset>6</bitOffset>
51708              <bitWidth>1</bitWidth>
51709              <access>read-write</access>
51710              <enumeratedValues>
51711                <enumeratedValue>
51712                  <name>0</name>
51713                  <description>Reads to the Lock Register are ignored.</description>
51714                  <value>#0</value>
51715                </enumeratedValue>
51716                <enumeratedValue>
51717                  <name>1</name>
51718                  <description>Reads to the Lock Register complete as normal.</description>
51719                  <value>#1</value>
51720                </enumeratedValue>
51721              </enumeratedValues>
51722            </field>
51723            <field>
51724              <name>IERR</name>
51725              <description>Interrupt Enable Register Read</description>
51726              <bitOffset>7</bitOffset>
51727              <bitWidth>1</bitWidth>
51728              <access>read-write</access>
51729              <enumeratedValues>
51730                <enumeratedValue>
51731                  <name>0</name>
51732                  <description>Reads to the Interrupt Enable Register are ignored.</description>
51733                  <value>#0</value>
51734                </enumeratedValue>
51735                <enumeratedValue>
51736                  <name>1</name>
51737                  <description>Reads to the Interrupt Enable Register complete as normal.</description>
51738                  <value>#1</value>
51739                </enumeratedValue>
51740              </enumeratedValues>
51741            </field>
51742          </fields>
51743        </register>
51744      </registers>
51745    </peripheral>
51746    <peripheral>
51747      <name>RFVBAT</name>
51748      <description>VBAT register file</description>
51749      <prependToName>RFVBAT_</prependToName>
51750      <baseAddress>0x4003E000</baseAddress>
51751      <addressBlock>
51752        <offset>0</offset>
51753        <size>0x20</size>
51754        <usage>registers</usage>
51755      </addressBlock>
51756      <registers>
51757        <register>
51758          <dim>8</dim>
51759          <dimIncrement>0x4</dimIncrement>
51760          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
51761          <name>REG%s</name>
51762          <description>VBAT register file register</description>
51763          <addressOffset>0</addressOffset>
51764          <size>32</size>
51765          <access>read-write</access>
51766          <resetValue>0</resetValue>
51767          <resetMask>0xFFFFFFFF</resetMask>
51768          <fields>
51769            <field>
51770              <name>LL</name>
51771              <description>Low lower byte</description>
51772              <bitOffset>0</bitOffset>
51773              <bitWidth>8</bitWidth>
51774              <access>read-write</access>
51775            </field>
51776            <field>
51777              <name>LH</name>
51778              <description>Low higher byte</description>
51779              <bitOffset>8</bitOffset>
51780              <bitWidth>8</bitWidth>
51781              <access>read-write</access>
51782            </field>
51783            <field>
51784              <name>HL</name>
51785              <description>High lower byte</description>
51786              <bitOffset>16</bitOffset>
51787              <bitWidth>8</bitWidth>
51788              <access>read-write</access>
51789            </field>
51790            <field>
51791              <name>HH</name>
51792              <description>High higher byte</description>
51793              <bitOffset>24</bitOffset>
51794              <bitWidth>8</bitWidth>
51795              <access>read-write</access>
51796            </field>
51797          </fields>
51798        </register>
51799      </registers>
51800    </peripheral>
51801    <peripheral>
51802      <name>LPTMR0</name>
51803      <description>Low Power Timer</description>
51804      <groupName>LPTMR</groupName>
51805      <prependToName>LPTMR0_</prependToName>
51806      <baseAddress>0x40040000</baseAddress>
51807      <addressBlock>
51808        <offset>0</offset>
51809        <size>0x10</size>
51810        <usage>registers</usage>
51811      </addressBlock>
51812      <interrupt>
51813        <name>LPTMR0_LPTMR1</name>
51814        <value>58</value>
51815      </interrupt>
51816      <registers>
51817        <register>
51818          <name>CSR</name>
51819          <description>Low Power Timer Control Status Register</description>
51820          <addressOffset>0</addressOffset>
51821          <size>32</size>
51822          <access>read-write</access>
51823          <resetValue>0</resetValue>
51824          <resetMask>0xFFFFFFFF</resetMask>
51825          <fields>
51826            <field>
51827              <name>TEN</name>
51828              <description>Timer Enable</description>
51829              <bitOffset>0</bitOffset>
51830              <bitWidth>1</bitWidth>
51831              <access>read-write</access>
51832              <enumeratedValues>
51833                <enumeratedValue>
51834                  <name>0</name>
51835                  <description>LPTMR is disabled and internal logic is reset.</description>
51836                  <value>#0</value>
51837                </enumeratedValue>
51838                <enumeratedValue>
51839                  <name>1</name>
51840                  <description>LPTMR is enabled.</description>
51841                  <value>#1</value>
51842                </enumeratedValue>
51843              </enumeratedValues>
51844            </field>
51845            <field>
51846              <name>TMS</name>
51847              <description>Timer Mode Select</description>
51848              <bitOffset>1</bitOffset>
51849              <bitWidth>1</bitWidth>
51850              <access>read-write</access>
51851              <enumeratedValues>
51852                <enumeratedValue>
51853                  <name>0</name>
51854                  <description>Time Counter mode.</description>
51855                  <value>#0</value>
51856                </enumeratedValue>
51857                <enumeratedValue>
51858                  <name>1</name>
51859                  <description>Pulse Counter mode.</description>
51860                  <value>#1</value>
51861                </enumeratedValue>
51862              </enumeratedValues>
51863            </field>
51864            <field>
51865              <name>TFC</name>
51866              <description>Timer Free-Running Counter</description>
51867              <bitOffset>2</bitOffset>
51868              <bitWidth>1</bitWidth>
51869              <access>read-write</access>
51870              <enumeratedValues>
51871                <enumeratedValue>
51872                  <name>0</name>
51873                  <description>CNR is reset whenever TCF is set.</description>
51874                  <value>#0</value>
51875                </enumeratedValue>
51876                <enumeratedValue>
51877                  <name>1</name>
51878                  <description>CNR is reset on overflow.</description>
51879                  <value>#1</value>
51880                </enumeratedValue>
51881              </enumeratedValues>
51882            </field>
51883            <field>
51884              <name>TPP</name>
51885              <description>Timer Pin Polarity</description>
51886              <bitOffset>3</bitOffset>
51887              <bitWidth>1</bitWidth>
51888              <access>read-write</access>
51889              <enumeratedValues>
51890                <enumeratedValue>
51891                  <name>0</name>
51892                  <description>Pulse Counter input source is active-high, and the CNR will increment on the rising-edge.</description>
51893                  <value>#0</value>
51894                </enumeratedValue>
51895                <enumeratedValue>
51896                  <name>1</name>
51897                  <description>Pulse Counter input source is active-low, and the CNR will increment on the falling-edge.</description>
51898                  <value>#1</value>
51899                </enumeratedValue>
51900              </enumeratedValues>
51901            </field>
51902            <field>
51903              <name>TPS</name>
51904              <description>Timer Pin Select</description>
51905              <bitOffset>4</bitOffset>
51906              <bitWidth>2</bitWidth>
51907              <access>read-write</access>
51908              <enumeratedValues>
51909                <enumeratedValue>
51910                  <name>00</name>
51911                  <description>Pulse counter input 0 is selected.</description>
51912                  <value>#00</value>
51913                </enumeratedValue>
51914                <enumeratedValue>
51915                  <name>01</name>
51916                  <description>Pulse counter input 1 is selected.</description>
51917                  <value>#01</value>
51918                </enumeratedValue>
51919                <enumeratedValue>
51920                  <name>10</name>
51921                  <description>Pulse counter input 2 is selected.</description>
51922                  <value>#10</value>
51923                </enumeratedValue>
51924                <enumeratedValue>
51925                  <name>11</name>
51926                  <description>Pulse counter input 3 is selected.</description>
51927                  <value>#11</value>
51928                </enumeratedValue>
51929              </enumeratedValues>
51930            </field>
51931            <field>
51932              <name>TIE</name>
51933              <description>Timer Interrupt Enable</description>
51934              <bitOffset>6</bitOffset>
51935              <bitWidth>1</bitWidth>
51936              <access>read-write</access>
51937              <enumeratedValues>
51938                <enumeratedValue>
51939                  <name>0</name>
51940                  <description>Timer interrupt disabled.</description>
51941                  <value>#0</value>
51942                </enumeratedValue>
51943                <enumeratedValue>
51944                  <name>1</name>
51945                  <description>Timer interrupt enabled.</description>
51946                  <value>#1</value>
51947                </enumeratedValue>
51948              </enumeratedValues>
51949            </field>
51950            <field>
51951              <name>TCF</name>
51952              <description>Timer Compare Flag</description>
51953              <bitOffset>7</bitOffset>
51954              <bitWidth>1</bitWidth>
51955              <access>read-write</access>
51956              <enumeratedValues>
51957                <enumeratedValue>
51958                  <name>0</name>
51959                  <description>The value of CNR is not equal to CMR and increments.</description>
51960                  <value>#0</value>
51961                </enumeratedValue>
51962                <enumeratedValue>
51963                  <name>1</name>
51964                  <description>The value of CNR is equal to CMR and increments.</description>
51965                  <value>#1</value>
51966                </enumeratedValue>
51967              </enumeratedValues>
51968            </field>
51969          </fields>
51970        </register>
51971        <register>
51972          <name>PSR</name>
51973          <description>Low Power Timer Prescale Register</description>
51974          <addressOffset>0x4</addressOffset>
51975          <size>32</size>
51976          <access>read-write</access>
51977          <resetValue>0</resetValue>
51978          <resetMask>0xFFFFFFFF</resetMask>
51979          <fields>
51980            <field>
51981              <name>PCS</name>
51982              <description>Prescaler Clock Select</description>
51983              <bitOffset>0</bitOffset>
51984              <bitWidth>2</bitWidth>
51985              <access>read-write</access>
51986              <enumeratedValues>
51987                <enumeratedValue>
51988                  <name>00</name>
51989                  <description>Prescaler/glitch filter clock 0 selected.</description>
51990                  <value>#00</value>
51991                </enumeratedValue>
51992                <enumeratedValue>
51993                  <name>01</name>
51994                  <description>Prescaler/glitch filter clock 1 selected.</description>
51995                  <value>#01</value>
51996                </enumeratedValue>
51997                <enumeratedValue>
51998                  <name>10</name>
51999                  <description>Prescaler/glitch filter clock 2 selected.</description>
52000                  <value>#10</value>
52001                </enumeratedValue>
52002                <enumeratedValue>
52003                  <name>11</name>
52004                  <description>Prescaler/glitch filter clock 3 selected.</description>
52005                  <value>#11</value>
52006                </enumeratedValue>
52007              </enumeratedValues>
52008            </field>
52009            <field>
52010              <name>PBYP</name>
52011              <description>Prescaler Bypass</description>
52012              <bitOffset>2</bitOffset>
52013              <bitWidth>1</bitWidth>
52014              <access>read-write</access>
52015              <enumeratedValues>
52016                <enumeratedValue>
52017                  <name>0</name>
52018                  <description>Prescaler/glitch filter is enabled.</description>
52019                  <value>#0</value>
52020                </enumeratedValue>
52021                <enumeratedValue>
52022                  <name>1</name>
52023                  <description>Prescaler/glitch filter is bypassed.</description>
52024                  <value>#1</value>
52025                </enumeratedValue>
52026              </enumeratedValues>
52027            </field>
52028            <field>
52029              <name>PRESCALE</name>
52030              <description>Prescale Value</description>
52031              <bitOffset>3</bitOffset>
52032              <bitWidth>4</bitWidth>
52033              <access>read-write</access>
52034              <enumeratedValues>
52035                <enumeratedValue>
52036                  <name>0000</name>
52037                  <description>Prescaler divides the prescaler clock by 2; glitch filter does not support this configuration.</description>
52038                  <value>#0000</value>
52039                </enumeratedValue>
52040                <enumeratedValue>
52041                  <name>0001</name>
52042                  <description>Prescaler divides the prescaler clock by 4; glitch filter recognizes change on input pin after 2 rising clock edges.</description>
52043                  <value>#0001</value>
52044                </enumeratedValue>
52045                <enumeratedValue>
52046                  <name>0010</name>
52047                  <description>Prescaler divides the prescaler clock by 8; glitch filter recognizes change on input pin after 4 rising clock edges.</description>
52048                  <value>#0010</value>
52049                </enumeratedValue>
52050                <enumeratedValue>
52051                  <name>0011</name>
52052                  <description>Prescaler divides the prescaler clock by 16; glitch filter recognizes change on input pin after 8 rising clock edges.</description>
52053                  <value>#0011</value>
52054                </enumeratedValue>
52055                <enumeratedValue>
52056                  <name>0100</name>
52057                  <description>Prescaler divides the prescaler clock by 32; glitch filter recognizes change on input pin after 16 rising clock edges.</description>
52058                  <value>#0100</value>
52059                </enumeratedValue>
52060                <enumeratedValue>
52061                  <name>0101</name>
52062                  <description>Prescaler divides the prescaler clock by 64; glitch filter recognizes change on input pin after 32 rising clock edges.</description>
52063                  <value>#0101</value>
52064                </enumeratedValue>
52065                <enumeratedValue>
52066                  <name>0110</name>
52067                  <description>Prescaler divides the prescaler clock by 128; glitch filter recognizes change on input pin after 64 rising clock edges.</description>
52068                  <value>#0110</value>
52069                </enumeratedValue>
52070                <enumeratedValue>
52071                  <name>0111</name>
52072                  <description>Prescaler divides the prescaler clock by 256; glitch filter recognizes change on input pin after 128 rising clock edges.</description>
52073                  <value>#0111</value>
52074                </enumeratedValue>
52075                <enumeratedValue>
52076                  <name>1000</name>
52077                  <description>Prescaler divides the prescaler clock by 512; glitch filter recognizes change on input pin after 256 rising clock edges.</description>
52078                  <value>#1000</value>
52079                </enumeratedValue>
52080                <enumeratedValue>
52081                  <name>1001</name>
52082                  <description>Prescaler divides the prescaler clock by 1024; glitch filter recognizes change on input pin after 512 rising clock edges.</description>
52083                  <value>#1001</value>
52084                </enumeratedValue>
52085                <enumeratedValue>
52086                  <name>1010</name>
52087                  <description>Prescaler divides the prescaler clock by 2048; glitch filter recognizes change on input pin after 1024 rising clock edges.</description>
52088                  <value>#1010</value>
52089                </enumeratedValue>
52090                <enumeratedValue>
52091                  <name>1011</name>
52092                  <description>Prescaler divides the prescaler clock by 4096; glitch filter recognizes change on input pin after 2048 rising clock edges.</description>
52093                  <value>#1011</value>
52094                </enumeratedValue>
52095                <enumeratedValue>
52096                  <name>1100</name>
52097                  <description>Prescaler divides the prescaler clock by 8192; glitch filter recognizes change on input pin after 4096 rising clock edges.</description>
52098                  <value>#1100</value>
52099                </enumeratedValue>
52100                <enumeratedValue>
52101                  <name>1101</name>
52102                  <description>Prescaler divides the prescaler clock by 16,384; glitch filter recognizes change on input pin after 8192 rising clock edges.</description>
52103                  <value>#1101</value>
52104                </enumeratedValue>
52105                <enumeratedValue>
52106                  <name>1110</name>
52107                  <description>Prescaler divides the prescaler clock by 32,768; glitch filter recognizes change on input pin after 16,384 rising clock edges.</description>
52108                  <value>#1110</value>
52109                </enumeratedValue>
52110                <enumeratedValue>
52111                  <name>1111</name>
52112                  <description>Prescaler divides the prescaler clock by 65,536; glitch filter recognizes change on input pin after 32,768 rising clock edges.</description>
52113                  <value>#1111</value>
52114                </enumeratedValue>
52115              </enumeratedValues>
52116            </field>
52117          </fields>
52118        </register>
52119        <register>
52120          <name>CMR</name>
52121          <description>Low Power Timer Compare Register</description>
52122          <addressOffset>0x8</addressOffset>
52123          <size>32</size>
52124          <access>read-write</access>
52125          <resetValue>0</resetValue>
52126          <resetMask>0xFFFFFFFF</resetMask>
52127          <fields>
52128            <field>
52129              <name>COMPARE</name>
52130              <description>Compare Value</description>
52131              <bitOffset>0</bitOffset>
52132              <bitWidth>16</bitWidth>
52133              <access>read-write</access>
52134            </field>
52135          </fields>
52136        </register>
52137        <register>
52138          <name>CNR</name>
52139          <description>Low Power Timer Counter Register</description>
52140          <addressOffset>0xC</addressOffset>
52141          <size>32</size>
52142          <access>read-write</access>
52143          <resetValue>0</resetValue>
52144          <resetMask>0xFFFFFFFF</resetMask>
52145          <fields>
52146            <field>
52147              <name>COUNTER</name>
52148              <description>Counter Value</description>
52149              <bitOffset>0</bitOffset>
52150              <bitWidth>16</bitWidth>
52151              <access>read-write</access>
52152            </field>
52153          </fields>
52154        </register>
52155      </registers>
52156    </peripheral>
52157    <peripheral>
52158      <name>LPTMR1</name>
52159      <description>Low Power Timer</description>
52160      <groupName>LPTMR</groupName>
52161      <prependToName>LPTMR1_</prependToName>
52162      <baseAddress>0x40044000</baseAddress>
52163      <addressBlock>
52164        <offset>0</offset>
52165        <size>0x10</size>
52166        <usage>registers</usage>
52167      </addressBlock>
52168      <interrupt>
52169        <name>LPTMR0_LPTMR1</name>
52170        <value>58</value>
52171      </interrupt>
52172      <registers>
52173        <register>
52174          <name>CSR</name>
52175          <description>Low Power Timer Control Status Register</description>
52176          <addressOffset>0</addressOffset>
52177          <size>32</size>
52178          <access>read-write</access>
52179          <resetValue>0</resetValue>
52180          <resetMask>0xFFFFFFFF</resetMask>
52181          <fields>
52182            <field>
52183              <name>TEN</name>
52184              <description>Timer Enable</description>
52185              <bitOffset>0</bitOffset>
52186              <bitWidth>1</bitWidth>
52187              <access>read-write</access>
52188              <enumeratedValues>
52189                <enumeratedValue>
52190                  <name>0</name>
52191                  <description>LPTMR is disabled and internal logic is reset.</description>
52192                  <value>#0</value>
52193                </enumeratedValue>
52194                <enumeratedValue>
52195                  <name>1</name>
52196                  <description>LPTMR is enabled.</description>
52197                  <value>#1</value>
52198                </enumeratedValue>
52199              </enumeratedValues>
52200            </field>
52201            <field>
52202              <name>TMS</name>
52203              <description>Timer Mode Select</description>
52204              <bitOffset>1</bitOffset>
52205              <bitWidth>1</bitWidth>
52206              <access>read-write</access>
52207              <enumeratedValues>
52208                <enumeratedValue>
52209                  <name>0</name>
52210                  <description>Time Counter mode.</description>
52211                  <value>#0</value>
52212                </enumeratedValue>
52213                <enumeratedValue>
52214                  <name>1</name>
52215                  <description>Pulse Counter mode.</description>
52216                  <value>#1</value>
52217                </enumeratedValue>
52218              </enumeratedValues>
52219            </field>
52220            <field>
52221              <name>TFC</name>
52222              <description>Timer Free-Running Counter</description>
52223              <bitOffset>2</bitOffset>
52224              <bitWidth>1</bitWidth>
52225              <access>read-write</access>
52226              <enumeratedValues>
52227                <enumeratedValue>
52228                  <name>0</name>
52229                  <description>CNR is reset whenever TCF is set.</description>
52230                  <value>#0</value>
52231                </enumeratedValue>
52232                <enumeratedValue>
52233                  <name>1</name>
52234                  <description>CNR is reset on overflow.</description>
52235                  <value>#1</value>
52236                </enumeratedValue>
52237              </enumeratedValues>
52238            </field>
52239            <field>
52240              <name>TPP</name>
52241              <description>Timer Pin Polarity</description>
52242              <bitOffset>3</bitOffset>
52243              <bitWidth>1</bitWidth>
52244              <access>read-write</access>
52245              <enumeratedValues>
52246                <enumeratedValue>
52247                  <name>0</name>
52248                  <description>Pulse Counter input source is active-high, and the CNR will increment on the rising-edge.</description>
52249                  <value>#0</value>
52250                </enumeratedValue>
52251                <enumeratedValue>
52252                  <name>1</name>
52253                  <description>Pulse Counter input source is active-low, and the CNR will increment on the falling-edge.</description>
52254                  <value>#1</value>
52255                </enumeratedValue>
52256              </enumeratedValues>
52257            </field>
52258            <field>
52259              <name>TPS</name>
52260              <description>Timer Pin Select</description>
52261              <bitOffset>4</bitOffset>
52262              <bitWidth>2</bitWidth>
52263              <access>read-write</access>
52264              <enumeratedValues>
52265                <enumeratedValue>
52266                  <name>00</name>
52267                  <description>Pulse counter input 0 is selected.</description>
52268                  <value>#00</value>
52269                </enumeratedValue>
52270                <enumeratedValue>
52271                  <name>01</name>
52272                  <description>Pulse counter input 1 is selected.</description>
52273                  <value>#01</value>
52274                </enumeratedValue>
52275                <enumeratedValue>
52276                  <name>10</name>
52277                  <description>Pulse counter input 2 is selected.</description>
52278                  <value>#10</value>
52279                </enumeratedValue>
52280                <enumeratedValue>
52281                  <name>11</name>
52282                  <description>Pulse counter input 3 is selected.</description>
52283                  <value>#11</value>
52284                </enumeratedValue>
52285              </enumeratedValues>
52286            </field>
52287            <field>
52288              <name>TIE</name>
52289              <description>Timer Interrupt Enable</description>
52290              <bitOffset>6</bitOffset>
52291              <bitWidth>1</bitWidth>
52292              <access>read-write</access>
52293              <enumeratedValues>
52294                <enumeratedValue>
52295                  <name>0</name>
52296                  <description>Timer interrupt disabled.</description>
52297                  <value>#0</value>
52298                </enumeratedValue>
52299                <enumeratedValue>
52300                  <name>1</name>
52301                  <description>Timer interrupt enabled.</description>
52302                  <value>#1</value>
52303                </enumeratedValue>
52304              </enumeratedValues>
52305            </field>
52306            <field>
52307              <name>TCF</name>
52308              <description>Timer Compare Flag</description>
52309              <bitOffset>7</bitOffset>
52310              <bitWidth>1</bitWidth>
52311              <access>read-write</access>
52312              <enumeratedValues>
52313                <enumeratedValue>
52314                  <name>0</name>
52315                  <description>The value of CNR is not equal to CMR and increments.</description>
52316                  <value>#0</value>
52317                </enumeratedValue>
52318                <enumeratedValue>
52319                  <name>1</name>
52320                  <description>The value of CNR is equal to CMR and increments.</description>
52321                  <value>#1</value>
52322                </enumeratedValue>
52323              </enumeratedValues>
52324            </field>
52325          </fields>
52326        </register>
52327        <register>
52328          <name>PSR</name>
52329          <description>Low Power Timer Prescale Register</description>
52330          <addressOffset>0x4</addressOffset>
52331          <size>32</size>
52332          <access>read-write</access>
52333          <resetValue>0</resetValue>
52334          <resetMask>0xFFFFFFFF</resetMask>
52335          <fields>
52336            <field>
52337              <name>PCS</name>
52338              <description>Prescaler Clock Select</description>
52339              <bitOffset>0</bitOffset>
52340              <bitWidth>2</bitWidth>
52341              <access>read-write</access>
52342              <enumeratedValues>
52343                <enumeratedValue>
52344                  <name>00</name>
52345                  <description>Prescaler/glitch filter clock 0 selected.</description>
52346                  <value>#00</value>
52347                </enumeratedValue>
52348                <enumeratedValue>
52349                  <name>01</name>
52350                  <description>Prescaler/glitch filter clock 1 selected.</description>
52351                  <value>#01</value>
52352                </enumeratedValue>
52353                <enumeratedValue>
52354                  <name>10</name>
52355                  <description>Prescaler/glitch filter clock 2 selected.</description>
52356                  <value>#10</value>
52357                </enumeratedValue>
52358                <enumeratedValue>
52359                  <name>11</name>
52360                  <description>Prescaler/glitch filter clock 3 selected.</description>
52361                  <value>#11</value>
52362                </enumeratedValue>
52363              </enumeratedValues>
52364            </field>
52365            <field>
52366              <name>PBYP</name>
52367              <description>Prescaler Bypass</description>
52368              <bitOffset>2</bitOffset>
52369              <bitWidth>1</bitWidth>
52370              <access>read-write</access>
52371              <enumeratedValues>
52372                <enumeratedValue>
52373                  <name>0</name>
52374                  <description>Prescaler/glitch filter is enabled.</description>
52375                  <value>#0</value>
52376                </enumeratedValue>
52377                <enumeratedValue>
52378                  <name>1</name>
52379                  <description>Prescaler/glitch filter is bypassed.</description>
52380                  <value>#1</value>
52381                </enumeratedValue>
52382              </enumeratedValues>
52383            </field>
52384            <field>
52385              <name>PRESCALE</name>
52386              <description>Prescale Value</description>
52387              <bitOffset>3</bitOffset>
52388              <bitWidth>4</bitWidth>
52389              <access>read-write</access>
52390              <enumeratedValues>
52391                <enumeratedValue>
52392                  <name>0000</name>
52393                  <description>Prescaler divides the prescaler clock by 2; glitch filter does not support this configuration.</description>
52394                  <value>#0000</value>
52395                </enumeratedValue>
52396                <enumeratedValue>
52397                  <name>0001</name>
52398                  <description>Prescaler divides the prescaler clock by 4; glitch filter recognizes change on input pin after 2 rising clock edges.</description>
52399                  <value>#0001</value>
52400                </enumeratedValue>
52401                <enumeratedValue>
52402                  <name>0010</name>
52403                  <description>Prescaler divides the prescaler clock by 8; glitch filter recognizes change on input pin after 4 rising clock edges.</description>
52404                  <value>#0010</value>
52405                </enumeratedValue>
52406                <enumeratedValue>
52407                  <name>0011</name>
52408                  <description>Prescaler divides the prescaler clock by 16; glitch filter recognizes change on input pin after 8 rising clock edges.</description>
52409                  <value>#0011</value>
52410                </enumeratedValue>
52411                <enumeratedValue>
52412                  <name>0100</name>
52413                  <description>Prescaler divides the prescaler clock by 32; glitch filter recognizes change on input pin after 16 rising clock edges.</description>
52414                  <value>#0100</value>
52415                </enumeratedValue>
52416                <enumeratedValue>
52417                  <name>0101</name>
52418                  <description>Prescaler divides the prescaler clock by 64; glitch filter recognizes change on input pin after 32 rising clock edges.</description>
52419                  <value>#0101</value>
52420                </enumeratedValue>
52421                <enumeratedValue>
52422                  <name>0110</name>
52423                  <description>Prescaler divides the prescaler clock by 128; glitch filter recognizes change on input pin after 64 rising clock edges.</description>
52424                  <value>#0110</value>
52425                </enumeratedValue>
52426                <enumeratedValue>
52427                  <name>0111</name>
52428                  <description>Prescaler divides the prescaler clock by 256; glitch filter recognizes change on input pin after 128 rising clock edges.</description>
52429                  <value>#0111</value>
52430                </enumeratedValue>
52431                <enumeratedValue>
52432                  <name>1000</name>
52433                  <description>Prescaler divides the prescaler clock by 512; glitch filter recognizes change on input pin after 256 rising clock edges.</description>
52434                  <value>#1000</value>
52435                </enumeratedValue>
52436                <enumeratedValue>
52437                  <name>1001</name>
52438                  <description>Prescaler divides the prescaler clock by 1024; glitch filter recognizes change on input pin after 512 rising clock edges.</description>
52439                  <value>#1001</value>
52440                </enumeratedValue>
52441                <enumeratedValue>
52442                  <name>1010</name>
52443                  <description>Prescaler divides the prescaler clock by 2048; glitch filter recognizes change on input pin after 1024 rising clock edges.</description>
52444                  <value>#1010</value>
52445                </enumeratedValue>
52446                <enumeratedValue>
52447                  <name>1011</name>
52448                  <description>Prescaler divides the prescaler clock by 4096; glitch filter recognizes change on input pin after 2048 rising clock edges.</description>
52449                  <value>#1011</value>
52450                </enumeratedValue>
52451                <enumeratedValue>
52452                  <name>1100</name>
52453                  <description>Prescaler divides the prescaler clock by 8192; glitch filter recognizes change on input pin after 4096 rising clock edges.</description>
52454                  <value>#1100</value>
52455                </enumeratedValue>
52456                <enumeratedValue>
52457                  <name>1101</name>
52458                  <description>Prescaler divides the prescaler clock by 16,384; glitch filter recognizes change on input pin after 8192 rising clock edges.</description>
52459                  <value>#1101</value>
52460                </enumeratedValue>
52461                <enumeratedValue>
52462                  <name>1110</name>
52463                  <description>Prescaler divides the prescaler clock by 32,768; glitch filter recognizes change on input pin after 16,384 rising clock edges.</description>
52464                  <value>#1110</value>
52465                </enumeratedValue>
52466                <enumeratedValue>
52467                  <name>1111</name>
52468                  <description>Prescaler divides the prescaler clock by 65,536; glitch filter recognizes change on input pin after 32,768 rising clock edges.</description>
52469                  <value>#1111</value>
52470                </enumeratedValue>
52471              </enumeratedValues>
52472            </field>
52473          </fields>
52474        </register>
52475        <register>
52476          <name>CMR</name>
52477          <description>Low Power Timer Compare Register</description>
52478          <addressOffset>0x8</addressOffset>
52479          <size>32</size>
52480          <access>read-write</access>
52481          <resetValue>0</resetValue>
52482          <resetMask>0xFFFFFFFF</resetMask>
52483          <fields>
52484            <field>
52485              <name>COMPARE</name>
52486              <description>Compare Value</description>
52487              <bitOffset>0</bitOffset>
52488              <bitWidth>16</bitWidth>
52489              <access>read-write</access>
52490            </field>
52491          </fields>
52492        </register>
52493        <register>
52494          <name>CNR</name>
52495          <description>Low Power Timer Counter Register</description>
52496          <addressOffset>0xC</addressOffset>
52497          <size>32</size>
52498          <access>read-write</access>
52499          <resetValue>0</resetValue>
52500          <resetMask>0xFFFFFFFF</resetMask>
52501          <fields>
52502            <field>
52503              <name>COUNTER</name>
52504              <description>Counter Value</description>
52505              <bitOffset>0</bitOffset>
52506              <bitWidth>16</bitWidth>
52507              <access>read-write</access>
52508            </field>
52509          </fields>
52510        </register>
52511      </registers>
52512    </peripheral>
52513    <peripheral>
52514      <name>RFSYS</name>
52515      <description>System register file</description>
52516      <prependToName>RFSYS_</prependToName>
52517      <baseAddress>0x40041000</baseAddress>
52518      <addressBlock>
52519        <offset>0</offset>
52520        <size>0x20</size>
52521        <usage>registers</usage>
52522      </addressBlock>
52523      <registers>
52524        <register>
52525          <dim>8</dim>
52526          <dimIncrement>0x4</dimIncrement>
52527          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
52528          <name>REG%s</name>
52529          <description>Register file register</description>
52530          <addressOffset>0</addressOffset>
52531          <size>32</size>
52532          <access>read-write</access>
52533          <resetValue>0</resetValue>
52534          <resetMask>0xFFFFFFFF</resetMask>
52535          <fields>
52536            <field>
52537              <name>LL</name>
52538              <description>Low lower byte</description>
52539              <bitOffset>0</bitOffset>
52540              <bitWidth>8</bitWidth>
52541              <access>read-write</access>
52542            </field>
52543            <field>
52544              <name>LH</name>
52545              <description>Low higher byte</description>
52546              <bitOffset>8</bitOffset>
52547              <bitWidth>8</bitWidth>
52548              <access>read-write</access>
52549            </field>
52550            <field>
52551              <name>HL</name>
52552              <description>High lower byte</description>
52553              <bitOffset>16</bitOffset>
52554              <bitWidth>8</bitWidth>
52555              <access>read-write</access>
52556            </field>
52557            <field>
52558              <name>HH</name>
52559              <description>High higher byte</description>
52560              <bitOffset>24</bitOffset>
52561              <bitWidth>8</bitWidth>
52562              <access>read-write</access>
52563            </field>
52564          </fields>
52565        </register>
52566      </registers>
52567    </peripheral>
52568    <peripheral>
52569      <name>TSI0</name>
52570      <description>Touch sense input</description>
52571      <prependToName>TSI0_</prependToName>
52572      <baseAddress>0x40045000</baseAddress>
52573      <addressBlock>
52574        <offset>0</offset>
52575        <size>0xC</size>
52576        <usage>registers</usage>
52577      </addressBlock>
52578      <interrupt>
52579        <name>TSI0</name>
52580        <value>87</value>
52581      </interrupt>
52582      <registers>
52583        <register>
52584          <name>GENCS</name>
52585          <description>TSI General Control and Status Register</description>
52586          <addressOffset>0</addressOffset>
52587          <size>32</size>
52588          <access>read-write</access>
52589          <resetValue>0</resetValue>
52590          <resetMask>0xFFFFFFFF</resetMask>
52591          <fields>
52592            <field>
52593              <name>EOSDMEO</name>
52594              <description>End-of-Scan DMA Transfer Request Enable Only</description>
52595              <bitOffset>0</bitOffset>
52596              <bitWidth>1</bitWidth>
52597              <access>read-write</access>
52598              <enumeratedValues>
52599                <enumeratedValue>
52600                  <name>0</name>
52601                  <description>Do not enable the End-of-Scan DMA transfer request only. Depending on ESOR state, either Out-of-Range or End-of-Scan can trigger a DMA transfer request and interrupt.</description>
52602                  <value>#0</value>
52603                </enumeratedValue>
52604                <enumeratedValue>
52605                  <name>1</name>
52606                  <description>Only the End-of-Scan event can trigger a DMA transfer request. The Out-of-Range event only and always triggers an interrupt if TSIIE is set.</description>
52607                  <value>#1</value>
52608                </enumeratedValue>
52609              </enumeratedValues>
52610            </field>
52611            <field>
52612              <name>CURSW</name>
52613              <description>CURSW</description>
52614              <bitOffset>1</bitOffset>
52615              <bitWidth>1</bitWidth>
52616              <access>read-write</access>
52617              <enumeratedValues>
52618                <enumeratedValue>
52619                  <name>0</name>
52620                  <description>The current source pair are not swapped.</description>
52621                  <value>#0</value>
52622                </enumeratedValue>
52623                <enumeratedValue>
52624                  <name>1</name>
52625                  <description>The current source pair are swapped.</description>
52626                  <value>#1</value>
52627                </enumeratedValue>
52628              </enumeratedValues>
52629            </field>
52630            <field>
52631              <name>EOSF</name>
52632              <description>End of Scan Flag</description>
52633              <bitOffset>2</bitOffset>
52634              <bitWidth>1</bitWidth>
52635              <access>read-write</access>
52636              <enumeratedValues>
52637                <enumeratedValue>
52638                  <name>0</name>
52639                  <description>Scan not complete.</description>
52640                  <value>#0</value>
52641                </enumeratedValue>
52642                <enumeratedValue>
52643                  <name>1</name>
52644                  <description>Scan complete.</description>
52645                  <value>#1</value>
52646                </enumeratedValue>
52647              </enumeratedValues>
52648            </field>
52649            <field>
52650              <name>SCNIP</name>
52651              <description>Scan In Progress Status</description>
52652              <bitOffset>3</bitOffset>
52653              <bitWidth>1</bitWidth>
52654              <access>read-only</access>
52655              <enumeratedValues>
52656                <enumeratedValue>
52657                  <name>0</name>
52658                  <description>No scan in progress.</description>
52659                  <value>#0</value>
52660                </enumeratedValue>
52661                <enumeratedValue>
52662                  <name>1</name>
52663                  <description>Scan in progress.</description>
52664                  <value>#1</value>
52665                </enumeratedValue>
52666              </enumeratedValues>
52667            </field>
52668            <field>
52669              <name>STM</name>
52670              <description>Scan Trigger Mode</description>
52671              <bitOffset>4</bitOffset>
52672              <bitWidth>1</bitWidth>
52673              <access>read-write</access>
52674              <enumeratedValues>
52675                <enumeratedValue>
52676                  <name>0</name>
52677                  <description>Software trigger scan.</description>
52678                  <value>#0</value>
52679                </enumeratedValue>
52680                <enumeratedValue>
52681                  <name>1</name>
52682                  <description>Hardware trigger scan.</description>
52683                  <value>#1</value>
52684                </enumeratedValue>
52685              </enumeratedValues>
52686            </field>
52687            <field>
52688              <name>STPE</name>
52689              <description>TSI STOP Enable</description>
52690              <bitOffset>5</bitOffset>
52691              <bitWidth>1</bitWidth>
52692              <access>read-write</access>
52693              <enumeratedValues>
52694                <enumeratedValue>
52695                  <name>0</name>
52696                  <description>TSI is disabled when MCU goes into low power mode.</description>
52697                  <value>#0</value>
52698                </enumeratedValue>
52699                <enumeratedValue>
52700                  <name>1</name>
52701                  <description>Allows TSI to continue running in all low power modes.</description>
52702                  <value>#1</value>
52703                </enumeratedValue>
52704              </enumeratedValues>
52705            </field>
52706            <field>
52707              <name>TSIIEN</name>
52708              <description>Touch Sensing Input Interrupt Enable</description>
52709              <bitOffset>6</bitOffset>
52710              <bitWidth>1</bitWidth>
52711              <access>read-write</access>
52712              <enumeratedValues>
52713                <enumeratedValue>
52714                  <name>0</name>
52715                  <description>TSI interrupt is disabled.</description>
52716                  <value>#0</value>
52717                </enumeratedValue>
52718                <enumeratedValue>
52719                  <name>1</name>
52720                  <description>TSI interrupt is enabled.</description>
52721                  <value>#1</value>
52722                </enumeratedValue>
52723              </enumeratedValues>
52724            </field>
52725            <field>
52726              <name>TSIEN</name>
52727              <description>Touch Sensing Input Module Enable</description>
52728              <bitOffset>7</bitOffset>
52729              <bitWidth>1</bitWidth>
52730              <access>read-write</access>
52731              <enumeratedValues>
52732                <enumeratedValue>
52733                  <name>0</name>
52734                  <description>TSI module disabled.</description>
52735                  <value>#0</value>
52736                </enumeratedValue>
52737                <enumeratedValue>
52738                  <name>1</name>
52739                  <description>TSI module enabled.</description>
52740                  <value>#1</value>
52741                </enumeratedValue>
52742              </enumeratedValues>
52743            </field>
52744            <field>
52745              <name>NSCN</name>
52746              <description>NSCN</description>
52747              <bitOffset>8</bitOffset>
52748              <bitWidth>5</bitWidth>
52749              <access>read-write</access>
52750              <enumeratedValues>
52751                <enumeratedValue>
52752                  <name>00000</name>
52753                  <description>Once per electrode</description>
52754                  <value>#00000</value>
52755                </enumeratedValue>
52756                <enumeratedValue>
52757                  <name>00001</name>
52758                  <description>Twice per electrode</description>
52759                  <value>#00001</value>
52760                </enumeratedValue>
52761                <enumeratedValue>
52762                  <name>00010</name>
52763                  <description>3 times per electrode</description>
52764                  <value>#00010</value>
52765                </enumeratedValue>
52766                <enumeratedValue>
52767                  <name>00011</name>
52768                  <description>4 times per electrode</description>
52769                  <value>#00011</value>
52770                </enumeratedValue>
52771                <enumeratedValue>
52772                  <name>00100</name>
52773                  <description>5 times per electrode</description>
52774                  <value>#00100</value>
52775                </enumeratedValue>
52776                <enumeratedValue>
52777                  <name>00101</name>
52778                  <description>6 times per electrode</description>
52779                  <value>#00101</value>
52780                </enumeratedValue>
52781                <enumeratedValue>
52782                  <name>00110</name>
52783                  <description>7 times per electrode</description>
52784                  <value>#00110</value>
52785                </enumeratedValue>
52786                <enumeratedValue>
52787                  <name>00111</name>
52788                  <description>8 times per electrode</description>
52789                  <value>#00111</value>
52790                </enumeratedValue>
52791                <enumeratedValue>
52792                  <name>01000</name>
52793                  <description>9 times per electrode</description>
52794                  <value>#01000</value>
52795                </enumeratedValue>
52796                <enumeratedValue>
52797                  <name>01001</name>
52798                  <description>10 times per electrode</description>
52799                  <value>#01001</value>
52800                </enumeratedValue>
52801                <enumeratedValue>
52802                  <name>01010</name>
52803                  <description>11 times per electrode</description>
52804                  <value>#01010</value>
52805                </enumeratedValue>
52806                <enumeratedValue>
52807                  <name>01011</name>
52808                  <description>12 times per electrode</description>
52809                  <value>#01011</value>
52810                </enumeratedValue>
52811                <enumeratedValue>
52812                  <name>01100</name>
52813                  <description>13 times per electrode</description>
52814                  <value>#01100</value>
52815                </enumeratedValue>
52816                <enumeratedValue>
52817                  <name>01101</name>
52818                  <description>14 times per electrode</description>
52819                  <value>#01101</value>
52820                </enumeratedValue>
52821                <enumeratedValue>
52822                  <name>01110</name>
52823                  <description>15 times per electrode</description>
52824                  <value>#01110</value>
52825                </enumeratedValue>
52826                <enumeratedValue>
52827                  <name>01111</name>
52828                  <description>16 times per electrode</description>
52829                  <value>#01111</value>
52830                </enumeratedValue>
52831                <enumeratedValue>
52832                  <name>10000</name>
52833                  <description>17 times per electrode</description>
52834                  <value>#10000</value>
52835                </enumeratedValue>
52836                <enumeratedValue>
52837                  <name>10001</name>
52838                  <description>18 times per electrode</description>
52839                  <value>#10001</value>
52840                </enumeratedValue>
52841                <enumeratedValue>
52842                  <name>10010</name>
52843                  <description>19 times per electrode</description>
52844                  <value>#10010</value>
52845                </enumeratedValue>
52846                <enumeratedValue>
52847                  <name>10011</name>
52848                  <description>20 times per electrode</description>
52849                  <value>#10011</value>
52850                </enumeratedValue>
52851                <enumeratedValue>
52852                  <name>10100</name>
52853                  <description>21 times per electrode</description>
52854                  <value>#10100</value>
52855                </enumeratedValue>
52856                <enumeratedValue>
52857                  <name>10101</name>
52858                  <description>22 times per electrode</description>
52859                  <value>#10101</value>
52860                </enumeratedValue>
52861                <enumeratedValue>
52862                  <name>10110</name>
52863                  <description>23 times per electrode</description>
52864                  <value>#10110</value>
52865                </enumeratedValue>
52866                <enumeratedValue>
52867                  <name>10111</name>
52868                  <description>24 times per electrode</description>
52869                  <value>#10111</value>
52870                </enumeratedValue>
52871                <enumeratedValue>
52872                  <name>11000</name>
52873                  <description>25 times per electrode</description>
52874                  <value>#11000</value>
52875                </enumeratedValue>
52876                <enumeratedValue>
52877                  <name>11001</name>
52878                  <description>26 times per electrode</description>
52879                  <value>#11001</value>
52880                </enumeratedValue>
52881                <enumeratedValue>
52882                  <name>11010</name>
52883                  <description>27 times per electrode</description>
52884                  <value>#11010</value>
52885                </enumeratedValue>
52886                <enumeratedValue>
52887                  <name>11011</name>
52888                  <description>28 times per electrode</description>
52889                  <value>#11011</value>
52890                </enumeratedValue>
52891                <enumeratedValue>
52892                  <name>11100</name>
52893                  <description>29 times per electrode</description>
52894                  <value>#11100</value>
52895                </enumeratedValue>
52896                <enumeratedValue>
52897                  <name>11101</name>
52898                  <description>30 times per electrode</description>
52899                  <value>#11101</value>
52900                </enumeratedValue>
52901                <enumeratedValue>
52902                  <name>11110</name>
52903                  <description>31 times per electrode</description>
52904                  <value>#11110</value>
52905                </enumeratedValue>
52906                <enumeratedValue>
52907                  <name>11111</name>
52908                  <description>32 times per electrode</description>
52909                  <value>#11111</value>
52910                </enumeratedValue>
52911              </enumeratedValues>
52912            </field>
52913            <field>
52914              <name>PS</name>
52915              <description>PS</description>
52916              <bitOffset>13</bitOffset>
52917              <bitWidth>3</bitWidth>
52918              <access>read-write</access>
52919              <enumeratedValues>
52920                <enumeratedValue>
52921                  <name>000</name>
52922                  <description>Electrode Oscillator Frequency divided by 1</description>
52923                  <value>#000</value>
52924                </enumeratedValue>
52925                <enumeratedValue>
52926                  <name>001</name>
52927                  <description>Electrode Oscillator Frequency divided by 2</description>
52928                  <value>#001</value>
52929                </enumeratedValue>
52930                <enumeratedValue>
52931                  <name>010</name>
52932                  <description>Electrode Oscillator Frequency divided by 4</description>
52933                  <value>#010</value>
52934                </enumeratedValue>
52935                <enumeratedValue>
52936                  <name>011</name>
52937                  <description>Electrode Oscillator Frequency divided by 8</description>
52938                  <value>#011</value>
52939                </enumeratedValue>
52940                <enumeratedValue>
52941                  <name>100</name>
52942                  <description>Electrode Oscillator Frequency divided by 16</description>
52943                  <value>#100</value>
52944                </enumeratedValue>
52945                <enumeratedValue>
52946                  <name>101</name>
52947                  <description>Electrode Oscillator Frequency divided by 32</description>
52948                  <value>#101</value>
52949                </enumeratedValue>
52950                <enumeratedValue>
52951                  <name>110</name>
52952                  <description>Electrode Oscillator Frequency divided by 64</description>
52953                  <value>#110</value>
52954                </enumeratedValue>
52955                <enumeratedValue>
52956                  <name>111</name>
52957                  <description>Electrode Oscillator Frequency divided by 128</description>
52958                  <value>#111</value>
52959                </enumeratedValue>
52960              </enumeratedValues>
52961            </field>
52962            <field>
52963              <name>EXTCHRG</name>
52964              <description>EXTCHRG</description>
52965              <bitOffset>16</bitOffset>
52966              <bitWidth>3</bitWidth>
52967              <access>read-write</access>
52968              <enumeratedValues>
52969                <enumeratedValue>
52970                  <name>000</name>
52971                  <description>500 nA.</description>
52972                  <value>#000</value>
52973                </enumeratedValue>
52974                <enumeratedValue>
52975                  <name>001</name>
52976                  <description>1 uA.</description>
52977                  <value>#001</value>
52978                </enumeratedValue>
52979                <enumeratedValue>
52980                  <name>010</name>
52981                  <description>2 uA.</description>
52982                  <value>#010</value>
52983                </enumeratedValue>
52984                <enumeratedValue>
52985                  <name>011</name>
52986                  <description>4 uA.</description>
52987                  <value>#011</value>
52988                </enumeratedValue>
52989                <enumeratedValue>
52990                  <name>100</name>
52991                  <description>8 uA.</description>
52992                  <value>#100</value>
52993                </enumeratedValue>
52994                <enumeratedValue>
52995                  <name>101</name>
52996                  <description>16 uA.</description>
52997                  <value>#101</value>
52998                </enumeratedValue>
52999                <enumeratedValue>
53000                  <name>110</name>
53001                  <description>32 uA.</description>
53002                  <value>#110</value>
53003                </enumeratedValue>
53004                <enumeratedValue>
53005                  <name>111</name>
53006                  <description>64 uA.</description>
53007                  <value>#111</value>
53008                </enumeratedValue>
53009              </enumeratedValues>
53010            </field>
53011            <field>
53012              <name>DVOLT</name>
53013              <description>DVOLT</description>
53014              <bitOffset>19</bitOffset>
53015              <bitWidth>2</bitWidth>
53016              <access>read-write</access>
53017              <enumeratedValues>
53018                <enumeratedValue>
53019                  <name>00</name>
53020                  <description>DV = 1.026 V; VP = 1.328 V; Vm = 0.302 V.</description>
53021                  <value>#00</value>
53022                </enumeratedValue>
53023                <enumeratedValue>
53024                  <name>01</name>
53025                  <description>DV = 0.592 V; VP = 1.111 V; Vm = 0.519 V.</description>
53026                  <value>#01</value>
53027                </enumeratedValue>
53028                <enumeratedValue>
53029                  <name>10</name>
53030                  <description>DV = 0.342 V; VP = 0.986 V; Vm = 0.644 V.</description>
53031                  <value>#10</value>
53032                </enumeratedValue>
53033                <enumeratedValue>
53034                  <name>11</name>
53035                  <description>DV = 0.197 V; VP = 0.914 V; Vm = 0.716 V.</description>
53036                  <value>#11</value>
53037                </enumeratedValue>
53038              </enumeratedValues>
53039            </field>
53040            <field>
53041              <name>REFCHRG</name>
53042              <description>REFCHRG</description>
53043              <bitOffset>21</bitOffset>
53044              <bitWidth>3</bitWidth>
53045              <access>read-write</access>
53046              <enumeratedValues>
53047                <enumeratedValue>
53048                  <name>000</name>
53049                  <description>500 nA.</description>
53050                  <value>#000</value>
53051                </enumeratedValue>
53052                <enumeratedValue>
53053                  <name>001</name>
53054                  <description>1 uA.</description>
53055                  <value>#001</value>
53056                </enumeratedValue>
53057                <enumeratedValue>
53058                  <name>010</name>
53059                  <description>2 uA.</description>
53060                  <value>#010</value>
53061                </enumeratedValue>
53062                <enumeratedValue>
53063                  <name>011</name>
53064                  <description>4 uA.</description>
53065                  <value>#011</value>
53066                </enumeratedValue>
53067                <enumeratedValue>
53068                  <name>100</name>
53069                  <description>8 uA.</description>
53070                  <value>#100</value>
53071                </enumeratedValue>
53072                <enumeratedValue>
53073                  <name>101</name>
53074                  <description>16 uA.</description>
53075                  <value>#101</value>
53076                </enumeratedValue>
53077                <enumeratedValue>
53078                  <name>110</name>
53079                  <description>32 uA.</description>
53080                  <value>#110</value>
53081                </enumeratedValue>
53082                <enumeratedValue>
53083                  <name>111</name>
53084                  <description>64 uA.</description>
53085                  <value>#111</value>
53086                </enumeratedValue>
53087              </enumeratedValues>
53088            </field>
53089            <field>
53090              <name>MODE</name>
53091              <description>TSI analog modes setup and status bits.</description>
53092              <bitOffset>24</bitOffset>
53093              <bitWidth>4</bitWidth>
53094              <access>read-write</access>
53095              <enumeratedValues>
53096                <enumeratedValue>
53097                  <name>0000</name>
53098                  <description>Set TSI in capacitive sensing(non-noise detection) mode.</description>
53099                  <value>#0000</value>
53100                </enumeratedValue>
53101                <enumeratedValue>
53102                  <name>0100</name>
53103                  <description>Set TSI analog to work in single threshold noise detection mode and the frequency limitation circuit is disabled.</description>
53104                  <value>#0100</value>
53105                </enumeratedValue>
53106                <enumeratedValue>
53107                  <name>1000</name>
53108                  <description>Set TSI analog to work in single threshold noise detection mode and the frequency limitation circuit is enabled to work in higher frequencies operations.</description>
53109                  <value>#1000</value>
53110                </enumeratedValue>
53111                <enumeratedValue>
53112                  <name>1100</name>
53113                  <description>Set TSI analog to work in automatic noise detection mode.</description>
53114                  <value>#1100</value>
53115                </enumeratedValue>
53116              </enumeratedValues>
53117            </field>
53118            <field>
53119              <name>ESOR</name>
53120              <description>End-of-scan or Out-of-Range Interrupt Selection</description>
53121              <bitOffset>28</bitOffset>
53122              <bitWidth>1</bitWidth>
53123              <access>read-write</access>
53124              <enumeratedValues>
53125                <enumeratedValue>
53126                  <name>0</name>
53127                  <description>Out-of-range interrupt is allowed.</description>
53128                  <value>#0</value>
53129                </enumeratedValue>
53130                <enumeratedValue>
53131                  <name>1</name>
53132                  <description>End-of-scan interrupt is allowed.</description>
53133                  <value>#1</value>
53134                </enumeratedValue>
53135              </enumeratedValues>
53136            </field>
53137            <field>
53138              <name>OUTRGF</name>
53139              <description>Out of Range Flag.</description>
53140              <bitOffset>31</bitOffset>
53141              <bitWidth>1</bitWidth>
53142              <access>read-write</access>
53143            </field>
53144          </fields>
53145        </register>
53146        <register>
53147          <name>DATA</name>
53148          <description>TSI DATA Register</description>
53149          <addressOffset>0x4</addressOffset>
53150          <size>32</size>
53151          <access>read-write</access>
53152          <resetValue>0</resetValue>
53153          <resetMask>0xFFFFFFFF</resetMask>
53154          <fields>
53155            <field>
53156              <name>TSICNT</name>
53157              <description>TSI Conversion Counter Value</description>
53158              <bitOffset>0</bitOffset>
53159              <bitWidth>16</bitWidth>
53160              <access>read-only</access>
53161            </field>
53162            <field>
53163              <name>SWTS</name>
53164              <description>Software Trigger Start</description>
53165              <bitOffset>22</bitOffset>
53166              <bitWidth>1</bitWidth>
53167              <access>write-only</access>
53168              <enumeratedValues>
53169                <enumeratedValue>
53170                  <name>0</name>
53171                  <description>No effect.</description>
53172                  <value>#0</value>
53173                </enumeratedValue>
53174                <enumeratedValue>
53175                  <name>1</name>
53176                  <description>Start a scan to determine which channel is specified by TSI_DATA[TSICH].</description>
53177                  <value>#1</value>
53178                </enumeratedValue>
53179              </enumeratedValues>
53180            </field>
53181            <field>
53182              <name>DMAEN</name>
53183              <description>DMA Transfer Enabled</description>
53184              <bitOffset>23</bitOffset>
53185              <bitWidth>1</bitWidth>
53186              <access>read-write</access>
53187              <enumeratedValues>
53188                <enumeratedValue>
53189                  <name>0</name>
53190                  <description>Interrupt is selected when the interrupt enable bit is set and the corresponding TSI events assert.</description>
53191                  <value>#0</value>
53192                </enumeratedValue>
53193                <enumeratedValue>
53194                  <name>1</name>
53195                  <description>DMA transfer request is selected when the interrupt enable bit is set and the corresponding TSI events assert.</description>
53196                  <value>#1</value>
53197                </enumeratedValue>
53198              </enumeratedValues>
53199            </field>
53200            <field>
53201              <name>TSICH</name>
53202              <description>TSICH</description>
53203              <bitOffset>28</bitOffset>
53204              <bitWidth>4</bitWidth>
53205              <access>read-write</access>
53206              <enumeratedValues>
53207                <enumeratedValue>
53208                  <name>0000</name>
53209                  <description>Channel 0.</description>
53210                  <value>#0000</value>
53211                </enumeratedValue>
53212                <enumeratedValue>
53213                  <name>0001</name>
53214                  <description>Channel 1.</description>
53215                  <value>#0001</value>
53216                </enumeratedValue>
53217                <enumeratedValue>
53218                  <name>0010</name>
53219                  <description>Channel 2.</description>
53220                  <value>#0010</value>
53221                </enumeratedValue>
53222                <enumeratedValue>
53223                  <name>0011</name>
53224                  <description>Channel 3.</description>
53225                  <value>#0011</value>
53226                </enumeratedValue>
53227                <enumeratedValue>
53228                  <name>0100</name>
53229                  <description>Channel 4.</description>
53230                  <value>#0100</value>
53231                </enumeratedValue>
53232                <enumeratedValue>
53233                  <name>0101</name>
53234                  <description>Channel 5.</description>
53235                  <value>#0101</value>
53236                </enumeratedValue>
53237                <enumeratedValue>
53238                  <name>0110</name>
53239                  <description>Channel 6.</description>
53240                  <value>#0110</value>
53241                </enumeratedValue>
53242                <enumeratedValue>
53243                  <name>0111</name>
53244                  <description>Channel 7.</description>
53245                  <value>#0111</value>
53246                </enumeratedValue>
53247                <enumeratedValue>
53248                  <name>1000</name>
53249                  <description>Channel 8.</description>
53250                  <value>#1000</value>
53251                </enumeratedValue>
53252                <enumeratedValue>
53253                  <name>1001</name>
53254                  <description>Channel 9.</description>
53255                  <value>#1001</value>
53256                </enumeratedValue>
53257                <enumeratedValue>
53258                  <name>1010</name>
53259                  <description>Channel 10.</description>
53260                  <value>#1010</value>
53261                </enumeratedValue>
53262                <enumeratedValue>
53263                  <name>1011</name>
53264                  <description>Channel 11.</description>
53265                  <value>#1011</value>
53266                </enumeratedValue>
53267                <enumeratedValue>
53268                  <name>1100</name>
53269                  <description>Channel 12.</description>
53270                  <value>#1100</value>
53271                </enumeratedValue>
53272                <enumeratedValue>
53273                  <name>1101</name>
53274                  <description>Channel 13.</description>
53275                  <value>#1101</value>
53276                </enumeratedValue>
53277                <enumeratedValue>
53278                  <name>1110</name>
53279                  <description>Channel 14.</description>
53280                  <value>#1110</value>
53281                </enumeratedValue>
53282                <enumeratedValue>
53283                  <name>1111</name>
53284                  <description>Channel 15.</description>
53285                  <value>#1111</value>
53286                </enumeratedValue>
53287              </enumeratedValues>
53288            </field>
53289          </fields>
53290        </register>
53291        <register>
53292          <name>TSHD</name>
53293          <description>TSI Threshold Register</description>
53294          <addressOffset>0x8</addressOffset>
53295          <size>32</size>
53296          <access>read-write</access>
53297          <resetValue>0</resetValue>
53298          <resetMask>0xFFFFFFFF</resetMask>
53299          <fields>
53300            <field>
53301              <name>THRESL</name>
53302              <description>TSI Wakeup Channel Low-threshold</description>
53303              <bitOffset>0</bitOffset>
53304              <bitWidth>16</bitWidth>
53305              <access>read-write</access>
53306            </field>
53307            <field>
53308              <name>THRESH</name>
53309              <description>TSI Wakeup Channel High-threshold</description>
53310              <bitOffset>16</bitOffset>
53311              <bitWidth>16</bitWidth>
53312              <access>read-write</access>
53313            </field>
53314          </fields>
53315        </register>
53316      </registers>
53317    </peripheral>
53318    <peripheral>
53319      <name>SIM</name>
53320      <description>System Integration Module</description>
53321      <prependToName>SIM_</prependToName>
53322      <baseAddress>0x40047000</baseAddress>
53323      <addressBlock>
53324        <offset>0</offset>
53325        <size>0x106C</size>
53326        <usage>registers</usage>
53327      </addressBlock>
53328      <registers>
53329        <register>
53330          <name>SOPT1</name>
53331          <description>System Options Register 1</description>
53332          <addressOffset>0</addressOffset>
53333          <size>32</size>
53334          <access>read-write</access>
53335          <resetValue>0x80000000</resetValue>
53336          <resetMask>0xFFFF0FC0</resetMask>
53337          <fields>
53338            <field>
53339              <name>RAMSIZE</name>
53340              <description>RAM size</description>
53341              <bitOffset>12</bitOffset>
53342              <bitWidth>4</bitWidth>
53343              <access>read-only</access>
53344              <enumeratedValues>
53345                <enumeratedValue>
53346                  <name>0001</name>
53347                  <description>8 KB</description>
53348                  <value>#0001</value>
53349                </enumeratedValue>
53350                <enumeratedValue>
53351                  <name>0011</name>
53352                  <description>16 KB</description>
53353                  <value>#0011</value>
53354                </enumeratedValue>
53355                <enumeratedValue>
53356                  <name>0100</name>
53357                  <description>24 KB</description>
53358                  <value>#0100</value>
53359                </enumeratedValue>
53360                <enumeratedValue>
53361                  <name>0101</name>
53362                  <description>32 KB</description>
53363                  <value>#0101</value>
53364                </enumeratedValue>
53365                <enumeratedValue>
53366                  <name>0110</name>
53367                  <description>48 KB</description>
53368                  <value>#0110</value>
53369                </enumeratedValue>
53370                <enumeratedValue>
53371                  <name>0111</name>
53372                  <description>64 KB</description>
53373                  <value>#0111</value>
53374                </enumeratedValue>
53375                <enumeratedValue>
53376                  <name>1000</name>
53377                  <description>96 KB</description>
53378                  <value>#1000</value>
53379                </enumeratedValue>
53380                <enumeratedValue>
53381                  <name>1001</name>
53382                  <description>128 KB</description>
53383                  <value>#1001</value>
53384                </enumeratedValue>
53385                <enumeratedValue>
53386                  <name>1011</name>
53387                  <description>256 KB</description>
53388                  <value>#1011</value>
53389                </enumeratedValue>
53390              </enumeratedValues>
53391            </field>
53392            <field>
53393              <name>OSC32KSEL</name>
53394              <description>32K oscillator clock select</description>
53395              <bitOffset>18</bitOffset>
53396              <bitWidth>2</bitWidth>
53397              <access>read-write</access>
53398              <enumeratedValues>
53399                <enumeratedValue>
53400                  <name>00</name>
53401                  <description>System oscillator (OSC32KCLK)</description>
53402                  <value>#00</value>
53403                </enumeratedValue>
53404                <enumeratedValue>
53405                  <name>10</name>
53406                  <description>RTC 32.768kHz oscillator</description>
53407                  <value>#10</value>
53408                </enumeratedValue>
53409                <enumeratedValue>
53410                  <name>11</name>
53411                  <description>LPO 1 kHz</description>
53412                  <value>#11</value>
53413                </enumeratedValue>
53414              </enumeratedValues>
53415            </field>
53416            <field>
53417              <name>USBVSTBY</name>
53418              <description>USB voltage regulator in standby mode during VLPR and VLPW modes</description>
53419              <bitOffset>29</bitOffset>
53420              <bitWidth>1</bitWidth>
53421              <access>read-write</access>
53422              <enumeratedValues>
53423                <enumeratedValue>
53424                  <name>0</name>
53425                  <description>USB voltage regulator not in standby during VLPR and VLPW modes.</description>
53426                  <value>#0</value>
53427                </enumeratedValue>
53428                <enumeratedValue>
53429                  <name>1</name>
53430                  <description>USB voltage regulator in standby during VLPR and VLPW modes.</description>
53431                  <value>#1</value>
53432                </enumeratedValue>
53433              </enumeratedValues>
53434            </field>
53435            <field>
53436              <name>USBSSTBY</name>
53437              <description>USB voltage regulator in standby mode during Stop, VLPS, LLS and VLLS modes.</description>
53438              <bitOffset>30</bitOffset>
53439              <bitWidth>1</bitWidth>
53440              <access>read-write</access>
53441              <enumeratedValues>
53442                <enumeratedValue>
53443                  <name>0</name>
53444                  <description>USB voltage regulator not in standby during Stop, VLPS, LLS and VLLS modes.</description>
53445                  <value>#0</value>
53446                </enumeratedValue>
53447                <enumeratedValue>
53448                  <name>1</name>
53449                  <description>USB voltage regulator in standby during Stop, VLPS, LLS and VLLS modes.</description>
53450                  <value>#1</value>
53451                </enumeratedValue>
53452              </enumeratedValues>
53453            </field>
53454            <field>
53455              <name>USBREGEN</name>
53456              <description>USB voltage regulator enable</description>
53457              <bitOffset>31</bitOffset>
53458              <bitWidth>1</bitWidth>
53459              <access>read-write</access>
53460              <enumeratedValues>
53461                <enumeratedValue>
53462                  <name>0</name>
53463                  <description>USB voltage regulator is disabled.</description>
53464                  <value>#0</value>
53465                </enumeratedValue>
53466                <enumeratedValue>
53467                  <name>1</name>
53468                  <description>USB voltage regulator is enabled.</description>
53469                  <value>#1</value>
53470                </enumeratedValue>
53471              </enumeratedValues>
53472            </field>
53473          </fields>
53474        </register>
53475        <register>
53476          <name>SOPT1CFG</name>
53477          <description>SOPT1 Configuration Register</description>
53478          <addressOffset>0x4</addressOffset>
53479          <size>32</size>
53480          <access>read-write</access>
53481          <resetValue>0</resetValue>
53482          <resetMask>0xFFFFFFFF</resetMask>
53483          <fields>
53484            <field>
53485              <name>URWE</name>
53486              <description>USB voltage regulator enable write enable</description>
53487              <bitOffset>24</bitOffset>
53488              <bitWidth>1</bitWidth>
53489              <access>read-write</access>
53490              <enumeratedValues>
53491                <enumeratedValue>
53492                  <name>0</name>
53493                  <description>SOPT1 USBREGEN cannot be written.</description>
53494                  <value>#0</value>
53495                </enumeratedValue>
53496                <enumeratedValue>
53497                  <name>1</name>
53498                  <description>SOPT1 USBREGEN can be written.</description>
53499                  <value>#1</value>
53500                </enumeratedValue>
53501              </enumeratedValues>
53502            </field>
53503            <field>
53504              <name>UVSWE</name>
53505              <description>USB voltage regulator VLP standby write enable</description>
53506              <bitOffset>25</bitOffset>
53507              <bitWidth>1</bitWidth>
53508              <access>read-write</access>
53509              <enumeratedValues>
53510                <enumeratedValue>
53511                  <name>0</name>
53512                  <description>SOPT1 USBVSTBY cannot be written.</description>
53513                  <value>#0</value>
53514                </enumeratedValue>
53515                <enumeratedValue>
53516                  <name>1</name>
53517                  <description>SOPT1 USBVSTBY can be written.</description>
53518                  <value>#1</value>
53519                </enumeratedValue>
53520              </enumeratedValues>
53521            </field>
53522            <field>
53523              <name>USSWE</name>
53524              <description>USB voltage regulator stop standby write enable</description>
53525              <bitOffset>26</bitOffset>
53526              <bitWidth>1</bitWidth>
53527              <access>read-write</access>
53528              <enumeratedValues>
53529                <enumeratedValue>
53530                  <name>0</name>
53531                  <description>SOPT1 USBSSTBY cannot be written.</description>
53532                  <value>#0</value>
53533                </enumeratedValue>
53534                <enumeratedValue>
53535                  <name>1</name>
53536                  <description>SOPT1 USBSSTBY can be written.</description>
53537                  <value>#1</value>
53538                </enumeratedValue>
53539              </enumeratedValues>
53540            </field>
53541          </fields>
53542        </register>
53543        <register>
53544          <name>SOPT2</name>
53545          <description>System Options Register 2</description>
53546          <addressOffset>0x1004</addressOffset>
53547          <size>32</size>
53548          <access>read-write</access>
53549          <resetValue>0x1000</resetValue>
53550          <resetMask>0xFFFFFFFF</resetMask>
53551          <fields>
53552            <field>
53553              <name>RTCCLKOUTSEL</name>
53554              <description>RTC clock out select</description>
53555              <bitOffset>4</bitOffset>
53556              <bitWidth>1</bitWidth>
53557              <access>read-write</access>
53558              <enumeratedValues>
53559                <enumeratedValue>
53560                  <name>0</name>
53561                  <description>RTC 1 Hz clock is output on the RTC_CLKOUT pin.</description>
53562                  <value>#0</value>
53563                </enumeratedValue>
53564                <enumeratedValue>
53565                  <name>1</name>
53566                  <description>RTC 32.768kHz clock is output on the RTC_CLKOUT pin.</description>
53567                  <value>#1</value>
53568                </enumeratedValue>
53569              </enumeratedValues>
53570            </field>
53571            <field>
53572              <name>CLKOUTSEL</name>
53573              <description>CLKOUT select</description>
53574              <bitOffset>5</bitOffset>
53575              <bitWidth>3</bitWidth>
53576              <access>read-write</access>
53577              <enumeratedValues>
53578                <enumeratedValue>
53579                  <name>000</name>
53580                  <description>FlexBus CLKOUT</description>
53581                  <value>#000</value>
53582                </enumeratedValue>
53583                <enumeratedValue>
53584                  <name>010</name>
53585                  <description>Flash clock</description>
53586                  <value>#010</value>
53587                </enumeratedValue>
53588                <enumeratedValue>
53589                  <name>011</name>
53590                  <description>LPO clock (1 kHz)</description>
53591                  <value>#011</value>
53592                </enumeratedValue>
53593                <enumeratedValue>
53594                  <name>100</name>
53595                  <description>MCGIRCLK</description>
53596                  <value>#100</value>
53597                </enumeratedValue>
53598                <enumeratedValue>
53599                  <name>101</name>
53600                  <description>RTC 32.768kHz clock</description>
53601                  <value>#101</value>
53602                </enumeratedValue>
53603                <enumeratedValue>
53604                  <name>110</name>
53605                  <description>OSCERCLK0</description>
53606                  <value>#110</value>
53607                </enumeratedValue>
53608                <enumeratedValue>
53609                  <name>111</name>
53610                  <description>IRC 48 MHz clock</description>
53611                  <value>#111</value>
53612                </enumeratedValue>
53613              </enumeratedValues>
53614            </field>
53615            <field>
53616              <name>FBSL</name>
53617              <description>FlexBus security level</description>
53618              <bitOffset>8</bitOffset>
53619              <bitWidth>2</bitWidth>
53620              <access>read-write</access>
53621              <enumeratedValues>
53622                <enumeratedValue>
53623                  <name>00</name>
53624                  <description>All off-chip accesses (instruction and data) via the FlexBus or SDRAM are disallowed.</description>
53625                  <value>#00</value>
53626                </enumeratedValue>
53627                <enumeratedValue>
53628                  <name>01</name>
53629                  <description>All off-chip accesses (instruction and data) via the FlexBus or SDRAM are disallowed.</description>
53630                  <value>#01</value>
53631                </enumeratedValue>
53632                <enumeratedValue>
53633                  <name>10</name>
53634                  <description>Off-chip instruction accesses are disallowed. Data accesses are allowed.</description>
53635                  <value>#10</value>
53636                </enumeratedValue>
53637                <enumeratedValue>
53638                  <name>11</name>
53639                  <description>Off-chip instruction accesses and data accesses are allowed.</description>
53640                  <value>#11</value>
53641                </enumeratedValue>
53642              </enumeratedValues>
53643            </field>
53644            <field>
53645              <name>TRACECLKSEL</name>
53646              <description>Debug trace clock select</description>
53647              <bitOffset>12</bitOffset>
53648              <bitWidth>1</bitWidth>
53649              <access>read-write</access>
53650              <enumeratedValues>
53651                <enumeratedValue>
53652                  <name>0</name>
53653                  <description>MCGOUTCLK, divided by the TRACECLK fractional divider as configured by SIM_CLKDIV4[TRACEFRAC, TRACEDIV]</description>
53654                  <value>#0</value>
53655                </enumeratedValue>
53656                <enumeratedValue>
53657                  <name>1</name>
53658                  <description>Core/system clock</description>
53659                  <value>#1</value>
53660                </enumeratedValue>
53661              </enumeratedValues>
53662            </field>
53663            <field>
53664              <name>PLLFLLSEL</name>
53665              <description>PLL/FLL clock select</description>
53666              <bitOffset>16</bitOffset>
53667              <bitWidth>2</bitWidth>
53668              <access>read-write</access>
53669              <enumeratedValues>
53670                <enumeratedValue>
53671                  <name>00</name>
53672                  <description>MCGFLLCLK clock</description>
53673                  <value>#00</value>
53674                </enumeratedValue>
53675                <enumeratedValue>
53676                  <name>01</name>
53677                  <description>MCGPLLCLK clock</description>
53678                  <value>#01</value>
53679                </enumeratedValue>
53680                <enumeratedValue>
53681                  <name>11</name>
53682                  <description>IRC48 MHz clock</description>
53683                  <value>#11</value>
53684                </enumeratedValue>
53685              </enumeratedValues>
53686            </field>
53687            <field>
53688              <name>USBSRC</name>
53689              <description>USB clock source select</description>
53690              <bitOffset>18</bitOffset>
53691              <bitWidth>1</bitWidth>
53692              <access>read-write</access>
53693              <enumeratedValues>
53694                <enumeratedValue>
53695                  <name>0</name>
53696                  <description>External bypass clock (USB_CLKIN).</description>
53697                  <value>#0</value>
53698                </enumeratedValue>
53699                <enumeratedValue>
53700                  <name>1</name>
53701                  <description>MCGFLLCLK, or MCGPLLCLK , or IRC48M clock as selected by SOPT2[PLLFLLSEL], and then divided by the USB fractional divider as configured by SIM_CLKDIV2[USBFRAC, USBDIV].</description>
53702                  <value>#1</value>
53703                </enumeratedValue>
53704              </enumeratedValues>
53705            </field>
53706            <field>
53707              <name>FLEXIOSRC</name>
53708              <description>FlexIO Module Clock Source Select</description>
53709              <bitOffset>22</bitOffset>
53710              <bitWidth>2</bitWidth>
53711              <access>read-write</access>
53712              <enumeratedValues>
53713                <enumeratedValue>
53714                  <name>00</name>
53715                  <description>System clock</description>
53716                  <value>#00</value>
53717                </enumeratedValue>
53718                <enumeratedValue>
53719                  <name>01</name>
53720                  <description>MCGFLLCLK , or MCGPLLCLK , or IRC48M clock as selected by SOPT2[PLLFLLSEL], and then divided by the PLLFLLCLK fractional divider as configured by SIM_CLKDIV3[PLLFLLFRAC, PLLFLLDIV].</description>
53721                  <value>#01</value>
53722                </enumeratedValue>
53723                <enumeratedValue>
53724                  <name>10</name>
53725                  <description>OSCERCLK clock</description>
53726                  <value>#10</value>
53727                </enumeratedValue>
53728                <enumeratedValue>
53729                  <name>11</name>
53730                  <description>MCGIRCLK clock</description>
53731                  <value>#11</value>
53732                </enumeratedValue>
53733              </enumeratedValues>
53734            </field>
53735            <field>
53736              <name>TPMSRC</name>
53737              <description>TPM clock source select</description>
53738              <bitOffset>24</bitOffset>
53739              <bitWidth>2</bitWidth>
53740              <access>read-write</access>
53741              <enumeratedValues>
53742                <enumeratedValue>
53743                  <name>00</name>
53744                  <description>Clock disabled</description>
53745                  <value>#00</value>
53746                </enumeratedValue>
53747                <enumeratedValue>
53748                  <name>01</name>
53749                  <description>MCGFLLCLK , or MCGPLLCLK , or IRC48M clock as selected by SOPT2[PLLFLLSEL], and then divided by the PLLFLLCLK fractional divider as configured by SIM_CLKDIV3[PLLFLLFRAC, PLLFLLDIV].</description>
53750                  <value>#01</value>
53751                </enumeratedValue>
53752                <enumeratedValue>
53753                  <name>10</name>
53754                  <description>OSCERCLK clock</description>
53755                  <value>#10</value>
53756                </enumeratedValue>
53757                <enumeratedValue>
53758                  <name>11</name>
53759                  <description>MCGIRCLK clock</description>
53760                  <value>#11</value>
53761                </enumeratedValue>
53762              </enumeratedValues>
53763            </field>
53764            <field>
53765              <name>LPUARTSRC</name>
53766              <description>LPUART clock source select</description>
53767              <bitOffset>26</bitOffset>
53768              <bitWidth>2</bitWidth>
53769              <access>read-write</access>
53770              <enumeratedValues>
53771                <enumeratedValue>
53772                  <name>00</name>
53773                  <description>Clock disabled</description>
53774                  <value>#00</value>
53775                </enumeratedValue>
53776                <enumeratedValue>
53777                  <name>01</name>
53778                  <description>MCGFLLCLK , or MCGPLLCLK , or IRC48M clock as selected by SOPT2[PLLFLLSEL], and then divided by the PLLFLLCLK fractional divider as configured by SIM_CLKDIV3[PLLFLLFRAC, PLLFLLDIV].</description>
53779                  <value>#01</value>
53780                </enumeratedValue>
53781                <enumeratedValue>
53782                  <name>10</name>
53783                  <description>OSCERCLK clock</description>
53784                  <value>#10</value>
53785                </enumeratedValue>
53786                <enumeratedValue>
53787                  <name>11</name>
53788                  <description>MCGIRCLK clock</description>
53789                  <value>#11</value>
53790                </enumeratedValue>
53791              </enumeratedValues>
53792            </field>
53793            <field>
53794              <name>SDHCSRC</name>
53795              <description>SDHC clock source select</description>
53796              <bitOffset>28</bitOffset>
53797              <bitWidth>2</bitWidth>
53798              <access>read-write</access>
53799              <enumeratedValues>
53800                <enumeratedValue>
53801                  <name>00</name>
53802                  <description>Core/system clock.</description>
53803                  <value>#00</value>
53804                </enumeratedValue>
53805                <enumeratedValue>
53806                  <name>01</name>
53807                  <description>MCGFLLCLK, or MCGPLLCLK , or IRC48M clock as selected by SOPT2[PLLFLLSEL].</description>
53808                  <value>#01</value>
53809                </enumeratedValue>
53810                <enumeratedValue>
53811                  <name>10</name>
53812                  <description>OSCERCLK clock</description>
53813                  <value>#10</value>
53814                </enumeratedValue>
53815                <enumeratedValue>
53816                  <name>11</name>
53817                  <description>External bypass clock (SDHC0_CLKIN)</description>
53818                  <value>#11</value>
53819                </enumeratedValue>
53820              </enumeratedValues>
53821            </field>
53822            <field>
53823              <name>EMVSIMSRC</name>
53824              <description>EMVSIM Module Clock Source Select</description>
53825              <bitOffset>30</bitOffset>
53826              <bitWidth>2</bitWidth>
53827              <access>read-write</access>
53828              <enumeratedValues>
53829                <enumeratedValue>
53830                  <name>00</name>
53831                  <description>Clock disabled</description>
53832                  <value>#00</value>
53833                </enumeratedValue>
53834                <enumeratedValue>
53835                  <name>01</name>
53836                  <description>MCGFLLCLK , or MCGPLLCLK , or IRC48M clock as selected by SOPT2[PLLFLLSEL], and then divided by the PLLFLLCLK fractional divider as configured by SIM_CLKDIV3[PLLFLLFRAC, PLLFLLDIV].</description>
53837                  <value>#01</value>
53838                </enumeratedValue>
53839                <enumeratedValue>
53840                  <name>10</name>
53841                  <description>OSCERCLK clock</description>
53842                  <value>#10</value>
53843                </enumeratedValue>
53844                <enumeratedValue>
53845                  <name>11</name>
53846                  <description>MCGIRCLK clock</description>
53847                  <value>#11</value>
53848                </enumeratedValue>
53849              </enumeratedValues>
53850            </field>
53851          </fields>
53852        </register>
53853        <register>
53854          <name>SOPT4</name>
53855          <description>System Options Register 4</description>
53856          <addressOffset>0x100C</addressOffset>
53857          <size>32</size>
53858          <access>read-write</access>
53859          <resetValue>0</resetValue>
53860          <resetMask>0xFFFFFFFF</resetMask>
53861          <fields>
53862            <field>
53863              <name>FTM0FLT0</name>
53864              <description>FTM0 Fault 0 Select</description>
53865              <bitOffset>0</bitOffset>
53866              <bitWidth>1</bitWidth>
53867              <access>read-write</access>
53868              <enumeratedValues>
53869                <enumeratedValue>
53870                  <name>0</name>
53871                  <description>FTM0_FLT0 pin</description>
53872                  <value>#0</value>
53873                </enumeratedValue>
53874                <enumeratedValue>
53875                  <name>1</name>
53876                  <description>CMP0 out</description>
53877                  <value>#1</value>
53878                </enumeratedValue>
53879              </enumeratedValues>
53880            </field>
53881            <field>
53882              <name>FTM0FLT1</name>
53883              <description>FTM0 Fault 1 Select</description>
53884              <bitOffset>1</bitOffset>
53885              <bitWidth>1</bitWidth>
53886              <access>read-write</access>
53887              <enumeratedValues>
53888                <enumeratedValue>
53889                  <name>0</name>
53890                  <description>FTM0_FLT1 pin</description>
53891                  <value>#0</value>
53892                </enumeratedValue>
53893                <enumeratedValue>
53894                  <name>1</name>
53895                  <description>CMP1 out</description>
53896                  <value>#1</value>
53897                </enumeratedValue>
53898              </enumeratedValues>
53899            </field>
53900            <field>
53901              <name>FTM1FLT0</name>
53902              <description>FTM1 Fault 0 Select</description>
53903              <bitOffset>4</bitOffset>
53904              <bitWidth>1</bitWidth>
53905              <access>read-write</access>
53906              <enumeratedValues>
53907                <enumeratedValue>
53908                  <name>0</name>
53909                  <description>FTM1_FLT0 pin</description>
53910                  <value>#0</value>
53911                </enumeratedValue>
53912                <enumeratedValue>
53913                  <name>1</name>
53914                  <description>CMP0 out</description>
53915                  <value>#1</value>
53916                </enumeratedValue>
53917              </enumeratedValues>
53918            </field>
53919            <field>
53920              <name>FTM2FLT0</name>
53921              <description>FTM2 Fault 0 Select</description>
53922              <bitOffset>8</bitOffset>
53923              <bitWidth>1</bitWidth>
53924              <access>read-write</access>
53925              <enumeratedValues>
53926                <enumeratedValue>
53927                  <name>0</name>
53928                  <description>FTM2_FLT0 pin</description>
53929                  <value>#0</value>
53930                </enumeratedValue>
53931                <enumeratedValue>
53932                  <name>1</name>
53933                  <description>CMP0 out</description>
53934                  <value>#1</value>
53935                </enumeratedValue>
53936              </enumeratedValues>
53937            </field>
53938            <field>
53939              <name>FTM3FLT0</name>
53940              <description>FTM3 Fault 0 Select</description>
53941              <bitOffset>12</bitOffset>
53942              <bitWidth>1</bitWidth>
53943              <access>read-write</access>
53944              <enumeratedValues>
53945                <enumeratedValue>
53946                  <name>0</name>
53947                  <description>FTM3_FLT0 pin</description>
53948                  <value>#0</value>
53949                </enumeratedValue>
53950                <enumeratedValue>
53951                  <name>1</name>
53952                  <description>CMP0 out</description>
53953                  <value>#1</value>
53954                </enumeratedValue>
53955              </enumeratedValues>
53956            </field>
53957            <field>
53958              <name>FTM1CH0SRC</name>
53959              <description>FTM1 channel 0 input capture source select</description>
53960              <bitOffset>18</bitOffset>
53961              <bitWidth>2</bitWidth>
53962              <access>read-write</access>
53963              <enumeratedValues>
53964                <enumeratedValue>
53965                  <name>00</name>
53966                  <description>FTM1_CH0 signal</description>
53967                  <value>#00</value>
53968                </enumeratedValue>
53969                <enumeratedValue>
53970                  <name>01</name>
53971                  <description>CMP0 output</description>
53972                  <value>#01</value>
53973                </enumeratedValue>
53974                <enumeratedValue>
53975                  <name>10</name>
53976                  <description>CMP1 output</description>
53977                  <value>#10</value>
53978                </enumeratedValue>
53979                <enumeratedValue>
53980                  <name>11</name>
53981                  <description>USB start of frame pulse</description>
53982                  <value>#11</value>
53983                </enumeratedValue>
53984              </enumeratedValues>
53985            </field>
53986            <field>
53987              <name>FTM2CH0SRC</name>
53988              <description>FTM2 channel 0 input capture source select</description>
53989              <bitOffset>20</bitOffset>
53990              <bitWidth>2</bitWidth>
53991              <access>read-write</access>
53992              <enumeratedValues>
53993                <enumeratedValue>
53994                  <name>00</name>
53995                  <description>FTM2_CH0 signal</description>
53996                  <value>#00</value>
53997                </enumeratedValue>
53998                <enumeratedValue>
53999                  <name>01</name>
54000                  <description>CMP0 output</description>
54001                  <value>#01</value>
54002                </enumeratedValue>
54003                <enumeratedValue>
54004                  <name>10</name>
54005                  <description>CMP1 output</description>
54006                  <value>#10</value>
54007                </enumeratedValue>
54008              </enumeratedValues>
54009            </field>
54010            <field>
54011              <name>FTM2CH1SRC</name>
54012              <description>FTM2 channel 1 input capture source select</description>
54013              <bitOffset>22</bitOffset>
54014              <bitWidth>1</bitWidth>
54015              <access>read-write</access>
54016              <enumeratedValues>
54017                <enumeratedValue>
54018                  <name>0</name>
54019                  <description>FTM2_CH1 signal</description>
54020                  <value>#0</value>
54021                </enumeratedValue>
54022                <enumeratedValue>
54023                  <name>1</name>
54024                  <description>Exclusive OR of FTM2_CH1, FTM2_CH0 and FTM1_CH1.</description>
54025                  <value>#1</value>
54026                </enumeratedValue>
54027              </enumeratedValues>
54028            </field>
54029            <field>
54030              <name>FTM0CLKSEL</name>
54031              <description>FlexTimer 0 External Clock Pin Select</description>
54032              <bitOffset>24</bitOffset>
54033              <bitWidth>1</bitWidth>
54034              <access>read-write</access>
54035              <enumeratedValues>
54036                <enumeratedValue>
54037                  <name>0</name>
54038                  <description>FTM_CLK0 pin</description>
54039                  <value>#0</value>
54040                </enumeratedValue>
54041                <enumeratedValue>
54042                  <name>1</name>
54043                  <description>FTM_CLK1 pin</description>
54044                  <value>#1</value>
54045                </enumeratedValue>
54046              </enumeratedValues>
54047            </field>
54048            <field>
54049              <name>FTM1CLKSEL</name>
54050              <description>FTM1 External Clock Pin Select</description>
54051              <bitOffset>25</bitOffset>
54052              <bitWidth>1</bitWidth>
54053              <access>read-write</access>
54054              <enumeratedValues>
54055                <enumeratedValue>
54056                  <name>0</name>
54057                  <description>FTM_CLK0 pin</description>
54058                  <value>#0</value>
54059                </enumeratedValue>
54060                <enumeratedValue>
54061                  <name>1</name>
54062                  <description>FTM_CLK1 pin</description>
54063                  <value>#1</value>
54064                </enumeratedValue>
54065              </enumeratedValues>
54066            </field>
54067            <field>
54068              <name>FTM2CLKSEL</name>
54069              <description>FlexTimer 2 External Clock Pin Select</description>
54070              <bitOffset>26</bitOffset>
54071              <bitWidth>1</bitWidth>
54072              <access>read-write</access>
54073              <enumeratedValues>
54074                <enumeratedValue>
54075                  <name>0</name>
54076                  <description>FTM2 external clock driven by FTM_CLK0 pin.</description>
54077                  <value>#0</value>
54078                </enumeratedValue>
54079                <enumeratedValue>
54080                  <name>1</name>
54081                  <description>FTM2 external clock driven by FTM_CLK1 pin.</description>
54082                  <value>#1</value>
54083                </enumeratedValue>
54084              </enumeratedValues>
54085            </field>
54086            <field>
54087              <name>FTM3CLKSEL</name>
54088              <description>FlexTimer 3 External Clock Pin Select</description>
54089              <bitOffset>27</bitOffset>
54090              <bitWidth>1</bitWidth>
54091              <access>read-write</access>
54092              <enumeratedValues>
54093                <enumeratedValue>
54094                  <name>0</name>
54095                  <description>FTM3 external clock driven by FTM_CLK0 pin.</description>
54096                  <value>#0</value>
54097                </enumeratedValue>
54098                <enumeratedValue>
54099                  <name>1</name>
54100                  <description>FTM3 external clock driven by FTM_CLK1 pin.</description>
54101                  <value>#1</value>
54102                </enumeratedValue>
54103              </enumeratedValues>
54104            </field>
54105            <field>
54106              <name>FTM0TRG0SRC</name>
54107              <description>FlexTimer 0 Hardware Trigger 0 Source Select</description>
54108              <bitOffset>28</bitOffset>
54109              <bitWidth>1</bitWidth>
54110              <access>read-write</access>
54111              <enumeratedValues>
54112                <enumeratedValue>
54113                  <name>0</name>
54114                  <description>HSCMP0 output drives FTM0 hardware trigger 0</description>
54115                  <value>#0</value>
54116                </enumeratedValue>
54117                <enumeratedValue>
54118                  <name>1</name>
54119                  <description>FTM1 channel match drives FTM0 hardware trigger 0</description>
54120                  <value>#1</value>
54121                </enumeratedValue>
54122              </enumeratedValues>
54123            </field>
54124            <field>
54125              <name>FTM0TRG1SRC</name>
54126              <description>FlexTimer 0 Hardware Trigger 1 Source Select</description>
54127              <bitOffset>29</bitOffset>
54128              <bitWidth>1</bitWidth>
54129              <access>read-write</access>
54130              <enumeratedValues>
54131                <enumeratedValue>
54132                  <name>0</name>
54133                  <description>PDB output trigger 1 drives FTM0 hardware trigger 1</description>
54134                  <value>#0</value>
54135                </enumeratedValue>
54136                <enumeratedValue>
54137                  <name>1</name>
54138                  <description>FTM2 channel match drives FTM0 hardware trigger 1</description>
54139                  <value>#1</value>
54140                </enumeratedValue>
54141              </enumeratedValues>
54142            </field>
54143            <field>
54144              <name>FTM3TRG0SRC</name>
54145              <description>FlexTimer 3 Hardware Trigger 0 Source Select</description>
54146              <bitOffset>30</bitOffset>
54147              <bitWidth>1</bitWidth>
54148              <access>read-write</access>
54149              <enumeratedValues>
54150                <enumeratedValue>
54151                  <name>1</name>
54152                  <description>FTM1 channel match drives FTM3 hardware trigger 0</description>
54153                  <value>#1</value>
54154                </enumeratedValue>
54155              </enumeratedValues>
54156            </field>
54157            <field>
54158              <name>FTM3TRG1SRC</name>
54159              <description>FlexTimer 3 Hardware Trigger 1 Source Select</description>
54160              <bitOffset>31</bitOffset>
54161              <bitWidth>1</bitWidth>
54162              <access>read-write</access>
54163              <enumeratedValues>
54164                <enumeratedValue>
54165                  <name>1</name>
54166                  <description>FTM2 channel match drives FTM3 hardware trigger 1</description>
54167                  <value>#1</value>
54168                </enumeratedValue>
54169              </enumeratedValues>
54170            </field>
54171          </fields>
54172        </register>
54173        <register>
54174          <name>SOPT5</name>
54175          <description>System Options Register 5</description>
54176          <addressOffset>0x1010</addressOffset>
54177          <size>32</size>
54178          <access>read-write</access>
54179          <resetValue>0</resetValue>
54180          <resetMask>0xFFFFFFFF</resetMask>
54181          <fields>
54182            <field>
54183              <name>LPUART0TXSRC</name>
54184              <description>LPUART0 transmit data source select</description>
54185              <bitOffset>16</bitOffset>
54186              <bitWidth>2</bitWidth>
54187              <access>read-write</access>
54188              <enumeratedValues>
54189                <enumeratedValue>
54190                  <name>00</name>
54191                  <description>LPUART0_TX pin</description>
54192                  <value>#00</value>
54193                </enumeratedValue>
54194                <enumeratedValue>
54195                  <name>01</name>
54196                  <description>LPUART0_TX pin modulated with TPM1 channel 0 output</description>
54197                  <value>#01</value>
54198                </enumeratedValue>
54199                <enumeratedValue>
54200                  <name>10</name>
54201                  <description>LPUART0_TX pin modulated with TPM2 channel 0 output</description>
54202                  <value>#10</value>
54203                </enumeratedValue>
54204              </enumeratedValues>
54205            </field>
54206            <field>
54207              <name>LPUART0RXSRC</name>
54208              <description>LPUART0 receive data source select</description>
54209              <bitOffset>18</bitOffset>
54210              <bitWidth>2</bitWidth>
54211              <access>read-write</access>
54212              <enumeratedValues>
54213                <enumeratedValue>
54214                  <name>00</name>
54215                  <description>LPUART0_RX pin</description>
54216                  <value>#00</value>
54217                </enumeratedValue>
54218                <enumeratedValue>
54219                  <name>01</name>
54220                  <description>CMP0 output</description>
54221                  <value>#01</value>
54222                </enumeratedValue>
54223                <enumeratedValue>
54224                  <name>10</name>
54225                  <description>CMP1 output</description>
54226                  <value>#10</value>
54227                </enumeratedValue>
54228              </enumeratedValues>
54229            </field>
54230            <field>
54231              <name>LPUART1TXSRC</name>
54232              <description>LPUART1 transmit data source select</description>
54233              <bitOffset>20</bitOffset>
54234              <bitWidth>2</bitWidth>
54235              <access>read-write</access>
54236              <enumeratedValues>
54237                <enumeratedValue>
54238                  <name>00</name>
54239                  <description>LPUART1_TX pin</description>
54240                  <value>#00</value>
54241                </enumeratedValue>
54242                <enumeratedValue>
54243                  <name>01</name>
54244                  <description>LPUART1_TX pin modulated with TPM1 channel 0 output</description>
54245                  <value>#01</value>
54246                </enumeratedValue>
54247                <enumeratedValue>
54248                  <name>10</name>
54249                  <description>LPUART0_TX pin modulated with TPM2 channel 0 output</description>
54250                  <value>#10</value>
54251                </enumeratedValue>
54252              </enumeratedValues>
54253            </field>
54254            <field>
54255              <name>LPUART1RXSRC</name>
54256              <description>LPUART1 receive data source select</description>
54257              <bitOffset>22</bitOffset>
54258              <bitWidth>2</bitWidth>
54259              <access>read-write</access>
54260              <enumeratedValues>
54261                <enumeratedValue>
54262                  <name>00</name>
54263                  <description>LPUART1_RX pin</description>
54264                  <value>#00</value>
54265                </enumeratedValue>
54266                <enumeratedValue>
54267                  <name>01</name>
54268                  <description>CMP0 output</description>
54269                  <value>#01</value>
54270                </enumeratedValue>
54271                <enumeratedValue>
54272                  <name>10</name>
54273                  <description>CMP1 output</description>
54274                  <value>#10</value>
54275                </enumeratedValue>
54276              </enumeratedValues>
54277            </field>
54278          </fields>
54279        </register>
54280        <register>
54281          <name>SOPT7</name>
54282          <description>System Options Register 7</description>
54283          <addressOffset>0x1018</addressOffset>
54284          <size>32</size>
54285          <access>read-write</access>
54286          <resetValue>0</resetValue>
54287          <resetMask>0xFFFFFFFF</resetMask>
54288          <fields>
54289            <field>
54290              <name>ADC0TRGSEL</name>
54291              <description>ADC0 trigger select</description>
54292              <bitOffset>0</bitOffset>
54293              <bitWidth>4</bitWidth>
54294              <access>read-write</access>
54295              <enumeratedValues>
54296                <enumeratedValue>
54297                  <name>0000</name>
54298                  <description>PDB external trigger pin input (PDB0_EXTRG)</description>
54299                  <value>#0000</value>
54300                </enumeratedValue>
54301                <enumeratedValue>
54302                  <name>0001</name>
54303                  <description>High speed comparator 0 output</description>
54304                  <value>#0001</value>
54305                </enumeratedValue>
54306                <enumeratedValue>
54307                  <name>0010</name>
54308                  <description>High speed comparator 1 output</description>
54309                  <value>#0010</value>
54310                </enumeratedValue>
54311                <enumeratedValue>
54312                  <name>0100</name>
54313                  <description>PIT trigger 0</description>
54314                  <value>#0100</value>
54315                </enumeratedValue>
54316                <enumeratedValue>
54317                  <name>0101</name>
54318                  <description>PIT trigger 1</description>
54319                  <value>#0101</value>
54320                </enumeratedValue>
54321                <enumeratedValue>
54322                  <name>0110</name>
54323                  <description>PIT trigger 2</description>
54324                  <value>#0110</value>
54325                </enumeratedValue>
54326                <enumeratedValue>
54327                  <name>0111</name>
54328                  <description>PIT trigger 3</description>
54329                  <value>#0111</value>
54330                </enumeratedValue>
54331                <enumeratedValue>
54332                  <name>1000</name>
54333                  <description>FTM0 trigger</description>
54334                  <value>#1000</value>
54335                </enumeratedValue>
54336                <enumeratedValue>
54337                  <name>1001</name>
54338                  <description>FTM1 trigger</description>
54339                  <value>#1001</value>
54340                </enumeratedValue>
54341                <enumeratedValue>
54342                  <name>1010</name>
54343                  <description>FTM2 trigger</description>
54344                  <value>#1010</value>
54345                </enumeratedValue>
54346                <enumeratedValue>
54347                  <name>1011</name>
54348                  <description>FTM3 trigger</description>
54349                  <value>#1011</value>
54350                </enumeratedValue>
54351                <enumeratedValue>
54352                  <name>1100</name>
54353                  <description>RTC alarm</description>
54354                  <value>#1100</value>
54355                </enumeratedValue>
54356                <enumeratedValue>
54357                  <name>1101</name>
54358                  <description>RTC seconds</description>
54359                  <value>#1101</value>
54360                </enumeratedValue>
54361                <enumeratedValue>
54362                  <name>1110</name>
54363                  <description>Low-power timer (LPTMR) trigger</description>
54364                  <value>#1110</value>
54365                </enumeratedValue>
54366                <enumeratedValue>
54367                  <name>1111</name>
54368                  <description>TPM1 channel 0 (A pretrigger) and channel 1 (B pretrigger)</description>
54369                  <value>#1111</value>
54370                </enumeratedValue>
54371              </enumeratedValues>
54372            </field>
54373            <field>
54374              <name>ADC0PRETRGSEL</name>
54375              <description>ADC0 pretrigger select</description>
54376              <bitOffset>4</bitOffset>
54377              <bitWidth>1</bitWidth>
54378              <access>read-write</access>
54379              <enumeratedValues>
54380                <enumeratedValue>
54381                  <name>0</name>
54382                  <description>Pre-trigger A</description>
54383                  <value>#0</value>
54384                </enumeratedValue>
54385                <enumeratedValue>
54386                  <name>1</name>
54387                  <description>Pre-trigger B</description>
54388                  <value>#1</value>
54389                </enumeratedValue>
54390              </enumeratedValues>
54391            </field>
54392            <field>
54393              <name>ADC0ALTTRGEN</name>
54394              <description>ADC0 alternate trigger enable</description>
54395              <bitOffset>7</bitOffset>
54396              <bitWidth>1</bitWidth>
54397              <access>read-write</access>
54398              <enumeratedValues>
54399                <enumeratedValue>
54400                  <name>0</name>
54401                  <description>PDB trigger selected for ADC0.</description>
54402                  <value>#0</value>
54403                </enumeratedValue>
54404                <enumeratedValue>
54405                  <name>1</name>
54406                  <description>Alternate trigger selected for ADC0.</description>
54407                  <value>#1</value>
54408                </enumeratedValue>
54409              </enumeratedValues>
54410            </field>
54411          </fields>
54412        </register>
54413        <register>
54414          <name>SOPT8</name>
54415          <description>System Options Register 8</description>
54416          <addressOffset>0x101C</addressOffset>
54417          <size>32</size>
54418          <access>read-write</access>
54419          <resetValue>0</resetValue>
54420          <resetMask>0xFFFFFFFF</resetMask>
54421          <fields>
54422            <field>
54423              <name>FTM0SYNCBIT</name>
54424              <description>FTM0 Hardware Trigger 0 Software Synchronization</description>
54425              <bitOffset>0</bitOffset>
54426              <bitWidth>1</bitWidth>
54427              <access>read-write</access>
54428              <enumeratedValues>
54429                <enumeratedValue>
54430                  <name>0</name>
54431                  <description>No effect</description>
54432                  <value>#0</value>
54433                </enumeratedValue>
54434                <enumeratedValue>
54435                  <name>1</name>
54436                  <description>Write 1 to assert the TRIG0 input to FTM0, software must clear this bit to allow other trigger sources to assert.</description>
54437                  <value>#1</value>
54438                </enumeratedValue>
54439              </enumeratedValues>
54440            </field>
54441            <field>
54442              <name>FTM1SYNCBIT</name>
54443              <description>FTM1 Hardware Trigger 0 Software Synchronization</description>
54444              <bitOffset>1</bitOffset>
54445              <bitWidth>1</bitWidth>
54446              <access>read-write</access>
54447              <enumeratedValues>
54448                <enumeratedValue>
54449                  <name>0</name>
54450                  <description>No effect.</description>
54451                  <value>#0</value>
54452                </enumeratedValue>
54453                <enumeratedValue>
54454                  <name>1</name>
54455                  <description>Write 1 to assert the TRIG0 input to FTM1, software must clear this bit to allow other trigger sources to assert.</description>
54456                  <value>#1</value>
54457                </enumeratedValue>
54458              </enumeratedValues>
54459            </field>
54460            <field>
54461              <name>FTM2SYNCBIT</name>
54462              <description>FTM2 Hardware Trigger 0 Software Synchronization</description>
54463              <bitOffset>2</bitOffset>
54464              <bitWidth>1</bitWidth>
54465              <access>read-write</access>
54466              <enumeratedValues>
54467                <enumeratedValue>
54468                  <name>0</name>
54469                  <description>No effect.</description>
54470                  <value>#0</value>
54471                </enumeratedValue>
54472                <enumeratedValue>
54473                  <name>1</name>
54474                  <description>Write 1 to assert the TRIG0 input to FTM2, software must clear this bit to allow other trigger sources to assert.</description>
54475                  <value>#1</value>
54476                </enumeratedValue>
54477              </enumeratedValues>
54478            </field>
54479            <field>
54480              <name>FTM3SYNCBIT</name>
54481              <description>FTM3 Hardware Trigger 0 Software Synchronization</description>
54482              <bitOffset>3</bitOffset>
54483              <bitWidth>1</bitWidth>
54484              <access>read-write</access>
54485              <enumeratedValues>
54486                <enumeratedValue>
54487                  <name>0</name>
54488                  <description>No effect.</description>
54489                  <value>#0</value>
54490                </enumeratedValue>
54491                <enumeratedValue>
54492                  <name>1</name>
54493                  <description>Write 1 to assert the TRIG0 input to FTM3, software must clear this bit to allow other trigger sources to assert.</description>
54494                  <value>#1</value>
54495                </enumeratedValue>
54496              </enumeratedValues>
54497            </field>
54498            <field>
54499              <name>FTM0OCH0SRC</name>
54500              <description>FTM0 channel 0 output source</description>
54501              <bitOffset>16</bitOffset>
54502              <bitWidth>1</bitWidth>
54503              <access>read-write</access>
54504              <enumeratedValues>
54505                <enumeratedValue>
54506                  <name>0</name>
54507                  <description>FTM0_CH0 pin is output of FTM0 channel 0 output</description>
54508                  <value>#0</value>
54509                </enumeratedValue>
54510                <enumeratedValue>
54511                  <name>1</name>
54512                  <description>FTM0_CH0 pin is output of FTM0 channel 0 output, modulated by FTM1 channel 1 output</description>
54513                  <value>#1</value>
54514                </enumeratedValue>
54515              </enumeratedValues>
54516            </field>
54517            <field>
54518              <name>FTM0OCH1SRC</name>
54519              <description>FTM0 channel 1 output source</description>
54520              <bitOffset>17</bitOffset>
54521              <bitWidth>1</bitWidth>
54522              <access>read-write</access>
54523              <enumeratedValues>
54524                <enumeratedValue>
54525                  <name>0</name>
54526                  <description>FTM0_CH1 pin is output of FTM0 channel 1 output</description>
54527                  <value>#0</value>
54528                </enumeratedValue>
54529                <enumeratedValue>
54530                  <name>1</name>
54531                  <description>FTM0_CH1 pin is output of FTM0 channel 1 output, modulated by FTM1 channel 1 output</description>
54532                  <value>#1</value>
54533                </enumeratedValue>
54534              </enumeratedValues>
54535            </field>
54536            <field>
54537              <name>FTM0OCH2SRC</name>
54538              <description>FTM0 channel 2 output source</description>
54539              <bitOffset>18</bitOffset>
54540              <bitWidth>1</bitWidth>
54541              <access>read-write</access>
54542              <enumeratedValues>
54543                <enumeratedValue>
54544                  <name>0</name>
54545                  <description>FTM0_CH2 pin is output of FTM0 channel 2 output</description>
54546                  <value>#0</value>
54547                </enumeratedValue>
54548                <enumeratedValue>
54549                  <name>1</name>
54550                  <description>FTM0_CH2 pin is output of FTM0 channel 2 output, modulated by FTM1 channel 1 output</description>
54551                  <value>#1</value>
54552                </enumeratedValue>
54553              </enumeratedValues>
54554            </field>
54555            <field>
54556              <name>FTM0OCH3SRC</name>
54557              <description>FTM0 channel 3 output source</description>
54558              <bitOffset>19</bitOffset>
54559              <bitWidth>1</bitWidth>
54560              <access>read-write</access>
54561              <enumeratedValues>
54562                <enumeratedValue>
54563                  <name>0</name>
54564                  <description>FTM0_CH3 pin is output of FTM0 channel 3 output</description>
54565                  <value>#0</value>
54566                </enumeratedValue>
54567                <enumeratedValue>
54568                  <name>1</name>
54569                  <description>FTM0_CH3 pin is output of FTM0 channel 3 output, modulated by FTM1 channel 1 output</description>
54570                  <value>#1</value>
54571                </enumeratedValue>
54572              </enumeratedValues>
54573            </field>
54574            <field>
54575              <name>FTM0OCH4SRC</name>
54576              <description>FTM0 channel 4 output source</description>
54577              <bitOffset>20</bitOffset>
54578              <bitWidth>1</bitWidth>
54579              <access>read-write</access>
54580              <enumeratedValues>
54581                <enumeratedValue>
54582                  <name>0</name>
54583                  <description>FTM0_CH4 pin is output of FTM0 channel 4 output</description>
54584                  <value>#0</value>
54585                </enumeratedValue>
54586                <enumeratedValue>
54587                  <name>1</name>
54588                  <description>FTM0_CH4 pin is output of FTM0 channel 4 output, modulated by FTM1 channel 1 output</description>
54589                  <value>#1</value>
54590                </enumeratedValue>
54591              </enumeratedValues>
54592            </field>
54593            <field>
54594              <name>FTM0OCH5SRC</name>
54595              <description>FTM0 channel 5 output source</description>
54596              <bitOffset>21</bitOffset>
54597              <bitWidth>1</bitWidth>
54598              <access>read-write</access>
54599              <enumeratedValues>
54600                <enumeratedValue>
54601                  <name>0</name>
54602                  <description>FTM0_CH5 pin is output of FTM0 channel 5 output</description>
54603                  <value>#0</value>
54604                </enumeratedValue>
54605                <enumeratedValue>
54606                  <name>1</name>
54607                  <description>FTM0_CH5 pin is output of FTM0 channel 5 output, modulated by FTM1 channel 1 output</description>
54608                  <value>#1</value>
54609                </enumeratedValue>
54610              </enumeratedValues>
54611            </field>
54612            <field>
54613              <name>FTM0OCH6SRC</name>
54614              <description>FTM0 channel 6 output source</description>
54615              <bitOffset>22</bitOffset>
54616              <bitWidth>1</bitWidth>
54617              <access>read-write</access>
54618              <enumeratedValues>
54619                <enumeratedValue>
54620                  <name>0</name>
54621                  <description>FTM0_CH6 pin is output of FTM0 channel 6 output</description>
54622                  <value>#0</value>
54623                </enumeratedValue>
54624                <enumeratedValue>
54625                  <name>1</name>
54626                  <description>FTM0_CH6 pin is output of FTM0 channel 6 output, modulated by FTM1 channel 1 output</description>
54627                  <value>#1</value>
54628                </enumeratedValue>
54629              </enumeratedValues>
54630            </field>
54631            <field>
54632              <name>FTM0OCH7SRC</name>
54633              <description>FTM0 channel 7 output source</description>
54634              <bitOffset>23</bitOffset>
54635              <bitWidth>1</bitWidth>
54636              <access>read-write</access>
54637              <enumeratedValues>
54638                <enumeratedValue>
54639                  <name>0</name>
54640                  <description>FTM0_CH7 pin is output of FTM0 channel 7 output</description>
54641                  <value>#0</value>
54642                </enumeratedValue>
54643                <enumeratedValue>
54644                  <name>1</name>
54645                  <description>FTM0_CH7 pin is output of FTM0 channel 7 output, modulated by FTM1 channel 1 output</description>
54646                  <value>#1</value>
54647                </enumeratedValue>
54648              </enumeratedValues>
54649            </field>
54650            <field>
54651              <name>FTM3OCH0SRC</name>
54652              <description>FTM3 channel 0 output source</description>
54653              <bitOffset>24</bitOffset>
54654              <bitWidth>1</bitWidth>
54655              <access>read-write</access>
54656              <enumeratedValues>
54657                <enumeratedValue>
54658                  <name>0</name>
54659                  <description>FTM3_CH0 pin is output of FTM3 channel 0 output</description>
54660                  <value>#0</value>
54661                </enumeratedValue>
54662                <enumeratedValue>
54663                  <name>1</name>
54664                  <description>FTM3_CH0 pin is output of FTM3 channel 0 output modulated by FTM2 channel 1 output.</description>
54665                  <value>#1</value>
54666                </enumeratedValue>
54667              </enumeratedValues>
54668            </field>
54669            <field>
54670              <name>FTM3OCH1SRC</name>
54671              <description>FTM3 channel 1 output source</description>
54672              <bitOffset>25</bitOffset>
54673              <bitWidth>1</bitWidth>
54674              <access>read-write</access>
54675              <enumeratedValues>
54676                <enumeratedValue>
54677                  <name>0</name>
54678                  <description>FTM3_CH1 pin is output of FTM3 channel 1 output</description>
54679                  <value>#0</value>
54680                </enumeratedValue>
54681                <enumeratedValue>
54682                  <name>1</name>
54683                  <description>FTM3_CH1 pin is output of FTM3 channel 1 output modulated by FTM2 channel 1 output.</description>
54684                  <value>#1</value>
54685                </enumeratedValue>
54686              </enumeratedValues>
54687            </field>
54688            <field>
54689              <name>FTM3OCH2SRC</name>
54690              <description>FTM3 channel 2 output source</description>
54691              <bitOffset>26</bitOffset>
54692              <bitWidth>1</bitWidth>
54693              <access>read-write</access>
54694              <enumeratedValues>
54695                <enumeratedValue>
54696                  <name>0</name>
54697                  <description>FTM3_CH2 pin is output of FTM3 channel 2 output</description>
54698                  <value>#0</value>
54699                </enumeratedValue>
54700                <enumeratedValue>
54701                  <name>1</name>
54702                  <description>FTM3_CH2 pin is output of FTM3 channel 2 output modulated by FTM2 channel 1 output.</description>
54703                  <value>#1</value>
54704                </enumeratedValue>
54705              </enumeratedValues>
54706            </field>
54707            <field>
54708              <name>FTM3OCH3SRC</name>
54709              <description>FTM3 channel 3 output source</description>
54710              <bitOffset>27</bitOffset>
54711              <bitWidth>1</bitWidth>
54712              <access>read-write</access>
54713              <enumeratedValues>
54714                <enumeratedValue>
54715                  <name>0</name>
54716                  <description>FTM3_CH3 pin is output of FTM3 channel 3 output</description>
54717                  <value>#0</value>
54718                </enumeratedValue>
54719                <enumeratedValue>
54720                  <name>1</name>
54721                  <description>FTM3_CH3 pin is output of FTM3 channel 3 output modulated by FTM2 channel 1 output.</description>
54722                  <value>#1</value>
54723                </enumeratedValue>
54724              </enumeratedValues>
54725            </field>
54726            <field>
54727              <name>FTM3OCH4SRC</name>
54728              <description>FTM3 channel 4 output source</description>
54729              <bitOffset>28</bitOffset>
54730              <bitWidth>1</bitWidth>
54731              <access>read-write</access>
54732              <enumeratedValues>
54733                <enumeratedValue>
54734                  <name>0</name>
54735                  <description>FTM3_CH4 pin is output of FTM3 channel 4 output</description>
54736                  <value>#0</value>
54737                </enumeratedValue>
54738                <enumeratedValue>
54739                  <name>1</name>
54740                  <description>FTM3_CH4 pin is output of FTM3 channel 4 output modulated by FTM2 channel 1 output.</description>
54741                  <value>#1</value>
54742                </enumeratedValue>
54743              </enumeratedValues>
54744            </field>
54745            <field>
54746              <name>FTM3OCH5SRC</name>
54747              <description>FTM3 channel 5 output source</description>
54748              <bitOffset>29</bitOffset>
54749              <bitWidth>1</bitWidth>
54750              <access>read-write</access>
54751              <enumeratedValues>
54752                <enumeratedValue>
54753                  <name>0</name>
54754                  <description>FTM3_CH5 pin is output of FTM3 channel 5 output</description>
54755                  <value>#0</value>
54756                </enumeratedValue>
54757                <enumeratedValue>
54758                  <name>1</name>
54759                  <description>FTM3_CH5 pin is output of FTM3 channel 5 output modulated by FTM2 channel 1 output.</description>
54760                  <value>#1</value>
54761                </enumeratedValue>
54762              </enumeratedValues>
54763            </field>
54764            <field>
54765              <name>FTM3OCH6SRC</name>
54766              <description>FTM3 channel 6 output source</description>
54767              <bitOffset>30</bitOffset>
54768              <bitWidth>1</bitWidth>
54769              <access>read-write</access>
54770              <enumeratedValues>
54771                <enumeratedValue>
54772                  <name>0</name>
54773                  <description>FTM3_CH6 pin is output of FTM3 channel 6 output</description>
54774                  <value>#0</value>
54775                </enumeratedValue>
54776                <enumeratedValue>
54777                  <name>1</name>
54778                  <description>FTM3_CH6 pin is output of FTM3 channel 6 output modulated by FTM2 channel 1 output.</description>
54779                  <value>#1</value>
54780                </enumeratedValue>
54781              </enumeratedValues>
54782            </field>
54783            <field>
54784              <name>FTM3OCH7SRC</name>
54785              <description>FTM3 channel 7 output source</description>
54786              <bitOffset>31</bitOffset>
54787              <bitWidth>1</bitWidth>
54788              <access>read-write</access>
54789              <enumeratedValues>
54790                <enumeratedValue>
54791                  <name>0</name>
54792                  <description>FTM3_CH7 pin is output of FTM3 channel 7 output</description>
54793                  <value>#0</value>
54794                </enumeratedValue>
54795                <enumeratedValue>
54796                  <name>1</name>
54797                  <description>FTM3_CH7 pin is output of FTM3 channel 7 output modulated by FTM2 channel 1 output.</description>
54798                  <value>#1</value>
54799                </enumeratedValue>
54800              </enumeratedValues>
54801            </field>
54802          </fields>
54803        </register>
54804        <register>
54805          <name>SOPT9</name>
54806          <description>System Options Register 9</description>
54807          <addressOffset>0x1020</addressOffset>
54808          <size>32</size>
54809          <access>read-write</access>
54810          <resetValue>0</resetValue>
54811          <resetMask>0xFFFFFFFF</resetMask>
54812          <fields>
54813            <field>
54814              <name>TPM1CH0SRC</name>
54815              <description>TPM1 channel 0 input capture source select</description>
54816              <bitOffset>18</bitOffset>
54817              <bitWidth>2</bitWidth>
54818              <access>read-write</access>
54819              <enumeratedValues>
54820                <enumeratedValue>
54821                  <name>00</name>
54822                  <description>TPM1_CH0 signal</description>
54823                  <value>#00</value>
54824                </enumeratedValue>
54825                <enumeratedValue>
54826                  <name>01</name>
54827                  <description>CMP0 output</description>
54828                  <value>#01</value>
54829                </enumeratedValue>
54830                <enumeratedValue>
54831                  <name>10</name>
54832                  <description>CMP1 output</description>
54833                  <value>#10</value>
54834                </enumeratedValue>
54835              </enumeratedValues>
54836            </field>
54837            <field>
54838              <name>TPM2CH0SRC</name>
54839              <description>TPM2 channel 0 input capture source select</description>
54840              <bitOffset>20</bitOffset>
54841              <bitWidth>2</bitWidth>
54842              <access>read-write</access>
54843              <enumeratedValues>
54844                <enumeratedValue>
54845                  <name>00</name>
54846                  <description>TPM2_CH0 signal</description>
54847                  <value>#00</value>
54848                </enumeratedValue>
54849                <enumeratedValue>
54850                  <name>01</name>
54851                  <description>CMP0 output</description>
54852                  <value>#01</value>
54853                </enumeratedValue>
54854                <enumeratedValue>
54855                  <name>10</name>
54856                  <description>CMP1 output</description>
54857                  <value>#10</value>
54858                </enumeratedValue>
54859              </enumeratedValues>
54860            </field>
54861            <field>
54862              <name>TPM1CLKSEL</name>
54863              <description>TPM1 External Clock Pin Select</description>
54864              <bitOffset>25</bitOffset>
54865              <bitWidth>1</bitWidth>
54866              <access>read-write</access>
54867              <enumeratedValues>
54868                <enumeratedValue>
54869                  <name>0</name>
54870                  <description>TPM_CLKIN0 pin</description>
54871                  <value>#0</value>
54872                </enumeratedValue>
54873                <enumeratedValue>
54874                  <name>1</name>
54875                  <description>TPM_CLKIN1 pin</description>
54876                  <value>#1</value>
54877                </enumeratedValue>
54878              </enumeratedValues>
54879            </field>
54880            <field>
54881              <name>TPM2CLKSEL</name>
54882              <description>TPM2 External Clock Pin Select</description>
54883              <bitOffset>26</bitOffset>
54884              <bitWidth>1</bitWidth>
54885              <access>read-write</access>
54886              <enumeratedValues>
54887                <enumeratedValue>
54888                  <name>0</name>
54889                  <description>TPM_CLKIN0 pin</description>
54890                  <value>#0</value>
54891                </enumeratedValue>
54892                <enumeratedValue>
54893                  <name>1</name>
54894                  <description>TPM_CLKIN1 pin</description>
54895                  <value>#1</value>
54896                </enumeratedValue>
54897              </enumeratedValues>
54898            </field>
54899          </fields>
54900        </register>
54901        <register>
54902          <name>SDID</name>
54903          <description>System Device Identification Register</description>
54904          <addressOffset>0x1024</addressOffset>
54905          <size>32</size>
54906          <access>read-only</access>
54907          <resetValue>0xB80</resetValue>
54908          <resetMask>0xF0F80</resetMask>
54909          <fields>
54910            <field>
54911              <name>PINID</name>
54912              <description>Pincount identification</description>
54913              <bitOffset>0</bitOffset>
54914              <bitWidth>4</bitWidth>
54915              <access>read-only</access>
54916              <enumeratedValues>
54917                <enumeratedValue>
54918                  <name>0010</name>
54919                  <description>32-pin</description>
54920                  <value>#0010</value>
54921                </enumeratedValue>
54922                <enumeratedValue>
54923                  <name>0100</name>
54924                  <description>48-pin</description>
54925                  <value>#0100</value>
54926                </enumeratedValue>
54927                <enumeratedValue>
54928                  <name>0101</name>
54929                  <description>64-pin</description>
54930                  <value>#0101</value>
54931                </enumeratedValue>
54932                <enumeratedValue>
54933                  <name>0110</name>
54934                  <description>80-pin</description>
54935                  <value>#0110</value>
54936                </enumeratedValue>
54937                <enumeratedValue>
54938                  <name>0111</name>
54939                  <description>81-pin or 121-pin</description>
54940                  <value>#0111</value>
54941                </enumeratedValue>
54942                <enumeratedValue>
54943                  <name>1000</name>
54944                  <description>100-pin</description>
54945                  <value>#1000</value>
54946                </enumeratedValue>
54947                <enumeratedValue>
54948                  <name>1001</name>
54949                  <description>121-pin</description>
54950                  <value>#1001</value>
54951                </enumeratedValue>
54952                <enumeratedValue>
54953                  <name>1010</name>
54954                  <description>144-pin</description>
54955                  <value>#1010</value>
54956                </enumeratedValue>
54957                <enumeratedValue>
54958                  <name>1011</name>
54959                  <description>Custom pinout (WLCSP)</description>
54960                  <value>#1011</value>
54961                </enumeratedValue>
54962                <enumeratedValue>
54963                  <name>1100</name>
54964                  <description>169-pin</description>
54965                  <value>#1100</value>
54966                </enumeratedValue>
54967                <enumeratedValue>
54968                  <name>1110</name>
54969                  <description>256-pin</description>
54970                  <value>#1110</value>
54971                </enumeratedValue>
54972              </enumeratedValues>
54973            </field>
54974            <field>
54975              <name>FAMID</name>
54976              <description>Kinetis family identification</description>
54977              <bitOffset>4</bitOffset>
54978              <bitWidth>3</bitWidth>
54979              <access>read-only</access>
54980              <enumeratedValues>
54981                <enumeratedValue>
54982                  <name>000</name>
54983                  <description>K1x Family (without tamper)</description>
54984                  <value>#000</value>
54985                </enumeratedValue>
54986                <enumeratedValue>
54987                  <name>001</name>
54988                  <description>K2x Family (without tamper)</description>
54989                  <value>#001</value>
54990                </enumeratedValue>
54991                <enumeratedValue>
54992                  <name>010</name>
54993                  <description>K3x Family or K1x/K6x Family (with tamper)</description>
54994                  <value>#010</value>
54995                </enumeratedValue>
54996                <enumeratedValue>
54997                  <name>011</name>
54998                  <description>K4x Family or K2x Family (with tamper)</description>
54999                  <value>#011</value>
55000                </enumeratedValue>
55001                <enumeratedValue>
55002                  <name>100</name>
55003                  <description>K6x Family (without tamper)</description>
55004                  <value>#100</value>
55005                </enumeratedValue>
55006                <enumeratedValue>
55007                  <name>101</name>
55008                  <description>K7x Family</description>
55009                  <value>#101</value>
55010                </enumeratedValue>
55011              </enumeratedValues>
55012            </field>
55013            <field>
55014              <name>DIEID</name>
55015              <description>Device Die ID</description>
55016              <bitOffset>7</bitOffset>
55017              <bitWidth>5</bitWidth>
55018              <access>read-only</access>
55019            </field>
55020            <field>
55021              <name>REVID</name>
55022              <description>Device revision number</description>
55023              <bitOffset>12</bitOffset>
55024              <bitWidth>4</bitWidth>
55025              <access>read-only</access>
55026            </field>
55027            <field>
55028              <name>SERIESID</name>
55029              <description>Kinetis Series ID</description>
55030              <bitOffset>20</bitOffset>
55031              <bitWidth>4</bitWidth>
55032              <access>read-only</access>
55033              <enumeratedValues>
55034                <enumeratedValue>
55035                  <name>0000</name>
55036                  <description>Kinetis K series</description>
55037                  <value>#0000</value>
55038                </enumeratedValue>
55039                <enumeratedValue>
55040                  <name>0001</name>
55041                  <description>Kinetis L series</description>
55042                  <value>#0001</value>
55043                </enumeratedValue>
55044                <enumeratedValue>
55045                  <name>0101</name>
55046                  <description>Kinetis W series</description>
55047                  <value>#0101</value>
55048                </enumeratedValue>
55049                <enumeratedValue>
55050                  <name>0110</name>
55051                  <description>Kinetis V series</description>
55052                  <value>#0110</value>
55053                </enumeratedValue>
55054              </enumeratedValues>
55055            </field>
55056            <field>
55057              <name>SUBFAMID</name>
55058              <description>Kinetis Sub-Family ID</description>
55059              <bitOffset>24</bitOffset>
55060              <bitWidth>4</bitWidth>
55061              <access>read-only</access>
55062              <enumeratedValues>
55063                <enumeratedValue>
55064                  <name>0000</name>
55065                  <description>Kx0 Subfamily</description>
55066                  <value>#0000</value>
55067                </enumeratedValue>
55068                <enumeratedValue>
55069                  <name>0001</name>
55070                  <description>Kx1 Subfamily (tamper detect)</description>
55071                  <value>#0001</value>
55072                </enumeratedValue>
55073                <enumeratedValue>
55074                  <name>0010</name>
55075                  <description>Kx2 Subfamily</description>
55076                  <value>#0010</value>
55077                </enumeratedValue>
55078                <enumeratedValue>
55079                  <name>0011</name>
55080                  <description>Kx3 Subfamily (tamper detect)</description>
55081                  <value>#0011</value>
55082                </enumeratedValue>
55083                <enumeratedValue>
55084                  <name>0100</name>
55085                  <description>Kx4 Subfamily</description>
55086                  <value>#0100</value>
55087                </enumeratedValue>
55088                <enumeratedValue>
55089                  <name>0101</name>
55090                  <description>Kx5 Subfamily (tamper detect)</description>
55091                  <value>#0101</value>
55092                </enumeratedValue>
55093                <enumeratedValue>
55094                  <name>0110</name>
55095                  <description>Kx6 Subfamily</description>
55096                  <value>#0110</value>
55097                </enumeratedValue>
55098              </enumeratedValues>
55099            </field>
55100            <field>
55101              <name>FAMILYID</name>
55102              <description>Kinetis Family ID</description>
55103              <bitOffset>28</bitOffset>
55104              <bitWidth>4</bitWidth>
55105              <access>read-only</access>
55106              <enumeratedValues>
55107                <enumeratedValue>
55108                  <name>0000</name>
55109                  <description>K0x Family</description>
55110                  <value>#0000</value>
55111                </enumeratedValue>
55112                <enumeratedValue>
55113                  <name>0001</name>
55114                  <description>K1x Family</description>
55115                  <value>#0001</value>
55116                </enumeratedValue>
55117                <enumeratedValue>
55118                  <name>0010</name>
55119                  <description>K2x Family</description>
55120                  <value>#0010</value>
55121                </enumeratedValue>
55122                <enumeratedValue>
55123                  <name>0011</name>
55124                  <description>K3x Family</description>
55125                  <value>#0011</value>
55126                </enumeratedValue>
55127                <enumeratedValue>
55128                  <name>0100</name>
55129                  <description>K4x Family</description>
55130                  <value>#0100</value>
55131                </enumeratedValue>
55132                <enumeratedValue>
55133                  <name>0110</name>
55134                  <description>K6x Family</description>
55135                  <value>#0110</value>
55136                </enumeratedValue>
55137                <enumeratedValue>
55138                  <name>0111</name>
55139                  <description>K7x Family</description>
55140                  <value>#0111</value>
55141                </enumeratedValue>
55142                <enumeratedValue>
55143                  <name>1000</name>
55144                  <description>K8x Family</description>
55145                  <value>#1000</value>
55146                </enumeratedValue>
55147              </enumeratedValues>
55148            </field>
55149          </fields>
55150        </register>
55151        <register>
55152          <name>SCGC1</name>
55153          <description>System Clock Gating Control Register 1</description>
55154          <addressOffset>0x1028</addressOffset>
55155          <size>32</size>
55156          <access>read-write</access>
55157          <resetValue>0</resetValue>
55158          <resetMask>0xFFFFFFFF</resetMask>
55159          <fields>
55160            <field>
55161              <name>I2C2</name>
55162              <description>I2C2 Clock Gate Control</description>
55163              <bitOffset>6</bitOffset>
55164              <bitWidth>1</bitWidth>
55165              <access>read-write</access>
55166              <enumeratedValues>
55167                <enumeratedValue>
55168                  <name>0</name>
55169                  <description>Clock disabled</description>
55170                  <value>#0</value>
55171                </enumeratedValue>
55172                <enumeratedValue>
55173                  <name>1</name>
55174                  <description>Clock enabled</description>
55175                  <value>#1</value>
55176                </enumeratedValue>
55177              </enumeratedValues>
55178            </field>
55179            <field>
55180              <name>I2C3</name>
55181              <description>I2C3 Clock Gate Control</description>
55182              <bitOffset>7</bitOffset>
55183              <bitWidth>1</bitWidth>
55184              <access>read-write</access>
55185              <enumeratedValues>
55186                <enumeratedValue>
55187                  <name>0</name>
55188                  <description>Clock disabled</description>
55189                  <value>#0</value>
55190                </enumeratedValue>
55191                <enumeratedValue>
55192                  <name>1</name>
55193                  <description>Clock enabled</description>
55194                  <value>#1</value>
55195                </enumeratedValue>
55196              </enumeratedValues>
55197            </field>
55198          </fields>
55199        </register>
55200        <register>
55201          <name>SCGC2</name>
55202          <description>System Clock Gating Control Register 2</description>
55203          <addressOffset>0x102C</addressOffset>
55204          <size>32</size>
55205          <access>read-write</access>
55206          <resetValue>0</resetValue>
55207          <resetMask>0xFFFFFFFF</resetMask>
55208          <fields>
55209            <field>
55210              <name>LPUART0</name>
55211              <description>LPUART0 Clock Gate Control</description>
55212              <bitOffset>4</bitOffset>
55213              <bitWidth>1</bitWidth>
55214              <access>read-write</access>
55215              <enumeratedValues>
55216                <enumeratedValue>
55217                  <name>0</name>
55218                  <description>Clock disabled</description>
55219                  <value>#0</value>
55220                </enumeratedValue>
55221                <enumeratedValue>
55222                  <name>1</name>
55223                  <description>Clock enabled</description>
55224                  <value>#1</value>
55225                </enumeratedValue>
55226              </enumeratedValues>
55227            </field>
55228            <field>
55229              <name>LPUART1</name>
55230              <description>LPUART1 Clock Gate Control</description>
55231              <bitOffset>5</bitOffset>
55232              <bitWidth>1</bitWidth>
55233              <access>read-write</access>
55234              <enumeratedValues>
55235                <enumeratedValue>
55236                  <name>0</name>
55237                  <description>Clock disabled</description>
55238                  <value>#0</value>
55239                </enumeratedValue>
55240                <enumeratedValue>
55241                  <name>1</name>
55242                  <description>Clock enabled</description>
55243                  <value>#1</value>
55244                </enumeratedValue>
55245              </enumeratedValues>
55246            </field>
55247            <field>
55248              <name>LPUART2</name>
55249              <description>LPUART2 Clock Gate Control</description>
55250              <bitOffset>6</bitOffset>
55251              <bitWidth>1</bitWidth>
55252              <access>read-write</access>
55253              <enumeratedValues>
55254                <enumeratedValue>
55255                  <name>0</name>
55256                  <description>Clock disabled</description>
55257                  <value>#0</value>
55258                </enumeratedValue>
55259                <enumeratedValue>
55260                  <name>1</name>
55261                  <description>Clock enabled</description>
55262                  <value>#1</value>
55263                </enumeratedValue>
55264              </enumeratedValues>
55265            </field>
55266            <field>
55267              <name>LPUART3</name>
55268              <description>LPUART3 Clock Gate Control</description>
55269              <bitOffset>7</bitOffset>
55270              <bitWidth>1</bitWidth>
55271              <access>read-write</access>
55272              <enumeratedValues>
55273                <enumeratedValue>
55274                  <name>0</name>
55275                  <description>Clock disabled</description>
55276                  <value>#0</value>
55277                </enumeratedValue>
55278                <enumeratedValue>
55279                  <name>1</name>
55280                  <description>Clock enabled</description>
55281                  <value>#1</value>
55282                </enumeratedValue>
55283              </enumeratedValues>
55284            </field>
55285            <field>
55286              <name>TPM1</name>
55287              <description>TPM1 Clock Gate Control</description>
55288              <bitOffset>9</bitOffset>
55289              <bitWidth>1</bitWidth>
55290              <access>read-write</access>
55291              <enumeratedValues>
55292                <enumeratedValue>
55293                  <name>0</name>
55294                  <description>Clock disabled</description>
55295                  <value>#0</value>
55296                </enumeratedValue>
55297                <enumeratedValue>
55298                  <name>1</name>
55299                  <description>Clock enabled</description>
55300                  <value>#1</value>
55301                </enumeratedValue>
55302              </enumeratedValues>
55303            </field>
55304            <field>
55305              <name>TPM2</name>
55306              <description>TPM2 Clock Gate Control</description>
55307              <bitOffset>10</bitOffset>
55308              <bitWidth>1</bitWidth>
55309              <access>read-write</access>
55310              <enumeratedValues>
55311                <enumeratedValue>
55312                  <name>0</name>
55313                  <description>Clock disabled</description>
55314                  <value>#0</value>
55315                </enumeratedValue>
55316                <enumeratedValue>
55317                  <name>1</name>
55318                  <description>Clock enabled</description>
55319                  <value>#1</value>
55320                </enumeratedValue>
55321              </enumeratedValues>
55322            </field>
55323            <field>
55324              <name>DAC0</name>
55325              <description>DAC0 Clock Gate Control</description>
55326              <bitOffset>12</bitOffset>
55327              <bitWidth>1</bitWidth>
55328              <access>read-write</access>
55329              <enumeratedValues>
55330                <enumeratedValue>
55331                  <name>0</name>
55332                  <description>Clock disabled</description>
55333                  <value>#0</value>
55334                </enumeratedValue>
55335                <enumeratedValue>
55336                  <name>1</name>
55337                  <description>Clock enabled</description>
55338                  <value>#1</value>
55339                </enumeratedValue>
55340              </enumeratedValues>
55341            </field>
55342            <field>
55343              <name>LTC</name>
55344              <description>LTC Clock Gate Control</description>
55345              <bitOffset>17</bitOffset>
55346              <bitWidth>1</bitWidth>
55347              <access>read-write</access>
55348              <enumeratedValues>
55349                <enumeratedValue>
55350                  <name>0</name>
55351                  <description>Clock disabled</description>
55352                  <value>#0</value>
55353                </enumeratedValue>
55354                <enumeratedValue>
55355                  <name>1</name>
55356                  <description>Clock enabled</description>
55357                  <value>#1</value>
55358                </enumeratedValue>
55359              </enumeratedValues>
55360            </field>
55361            <field>
55362              <name>EMVSIM0</name>
55363              <description>EMVSIM0 Clock Gate Control</description>
55364              <bitOffset>20</bitOffset>
55365              <bitWidth>1</bitWidth>
55366              <access>read-write</access>
55367              <enumeratedValues>
55368                <enumeratedValue>
55369                  <name>0</name>
55370                  <description>Clock disabled</description>
55371                  <value>#0</value>
55372                </enumeratedValue>
55373                <enumeratedValue>
55374                  <name>1</name>
55375                  <description>Clock enabled</description>
55376                  <value>#1</value>
55377                </enumeratedValue>
55378              </enumeratedValues>
55379            </field>
55380            <field>
55381              <name>EMVSIM1</name>
55382              <description>EMVSIM1 Clock Gate Control</description>
55383              <bitOffset>21</bitOffset>
55384              <bitWidth>1</bitWidth>
55385              <access>read-write</access>
55386              <enumeratedValues>
55387                <enumeratedValue>
55388                  <name>0</name>
55389                  <description>Clock disabled</description>
55390                  <value>#0</value>
55391                </enumeratedValue>
55392                <enumeratedValue>
55393                  <name>1</name>
55394                  <description>Clock enabled</description>
55395                  <value>#1</value>
55396                </enumeratedValue>
55397              </enumeratedValues>
55398            </field>
55399            <field>
55400              <name>LPUART4</name>
55401              <description>LPUART4 Clock Gate Control</description>
55402              <bitOffset>22</bitOffset>
55403              <bitWidth>1</bitWidth>
55404              <access>read-write</access>
55405              <enumeratedValues>
55406                <enumeratedValue>
55407                  <name>0</name>
55408                  <description>Clock disabled</description>
55409                  <value>#0</value>
55410                </enumeratedValue>
55411                <enumeratedValue>
55412                  <name>1</name>
55413                  <description>Clock enabled</description>
55414                  <value>#1</value>
55415                </enumeratedValue>
55416              </enumeratedValues>
55417            </field>
55418            <field>
55419              <name>QSPI</name>
55420              <description>QSPI Clock Gate Control</description>
55421              <bitOffset>26</bitOffset>
55422              <bitWidth>1</bitWidth>
55423              <access>read-write</access>
55424              <enumeratedValues>
55425                <enumeratedValue>
55426                  <name>0</name>
55427                  <description>Clock disabled</description>
55428                  <value>#0</value>
55429                </enumeratedValue>
55430                <enumeratedValue>
55431                  <name>1</name>
55432                  <description>Clock enabled</description>
55433                  <value>#1</value>
55434                </enumeratedValue>
55435              </enumeratedValues>
55436            </field>
55437            <field>
55438              <name>FLEXIO</name>
55439              <description>FlexIO Clock Gate Control</description>
55440              <bitOffset>31</bitOffset>
55441              <bitWidth>1</bitWidth>
55442              <access>read-write</access>
55443              <enumeratedValues>
55444                <enumeratedValue>
55445                  <name>0</name>
55446                  <description>Clock disabled</description>
55447                  <value>#0</value>
55448                </enumeratedValue>
55449                <enumeratedValue>
55450                  <name>1</name>
55451                  <description>Clock enabled</description>
55452                  <value>#1</value>
55453                </enumeratedValue>
55454              </enumeratedValues>
55455            </field>
55456          </fields>
55457        </register>
55458        <register>
55459          <name>SCGC3</name>
55460          <description>System Clock Gating Control Register 3</description>
55461          <addressOffset>0x1030</addressOffset>
55462          <size>32</size>
55463          <access>read-write</access>
55464          <resetValue>0</resetValue>
55465          <resetMask>0xFFFFFFFF</resetMask>
55466          <fields>
55467            <field>
55468              <name>TRNG</name>
55469              <description>TRNG Clock Gate Control</description>
55470              <bitOffset>0</bitOffset>
55471              <bitWidth>1</bitWidth>
55472              <access>read-write</access>
55473              <enumeratedValues>
55474                <enumeratedValue>
55475                  <name>0</name>
55476                  <description>Clock disabled</description>
55477                  <value>#0</value>
55478                </enumeratedValue>
55479                <enumeratedValue>
55480                  <name>1</name>
55481                  <description>Clock enabled</description>
55482                  <value>#1</value>
55483                </enumeratedValue>
55484              </enumeratedValues>
55485            </field>
55486            <field>
55487              <name>SPI2</name>
55488              <description>SPI2 Clock Gate Control</description>
55489              <bitOffset>12</bitOffset>
55490              <bitWidth>1</bitWidth>
55491              <access>read-write</access>
55492              <enumeratedValues>
55493                <enumeratedValue>
55494                  <name>0</name>
55495                  <description>Clock disabled</description>
55496                  <value>#0</value>
55497                </enumeratedValue>
55498                <enumeratedValue>
55499                  <name>1</name>
55500                  <description>Clock enabled</description>
55501                  <value>#1</value>
55502                </enumeratedValue>
55503              </enumeratedValues>
55504            </field>
55505            <field>
55506              <name>SDHC</name>
55507              <description>SDHC Clock Gate Control</description>
55508              <bitOffset>17</bitOffset>
55509              <bitWidth>1</bitWidth>
55510              <access>read-write</access>
55511              <enumeratedValues>
55512                <enumeratedValue>
55513                  <name>0</name>
55514                  <description>Clock disabled</description>
55515                  <value>#0</value>
55516                </enumeratedValue>
55517                <enumeratedValue>
55518                  <name>1</name>
55519                  <description>Clock enabled</description>
55520                  <value>#1</value>
55521                </enumeratedValue>
55522              </enumeratedValues>
55523            </field>
55524            <field>
55525              <name>FTM2</name>
55526              <description>FTM2 Clock Gate Control</description>
55527              <bitOffset>24</bitOffset>
55528              <bitWidth>1</bitWidth>
55529              <access>read-write</access>
55530              <enumeratedValues>
55531                <enumeratedValue>
55532                  <name>0</name>
55533                  <description>Clock disabled</description>
55534                  <value>#0</value>
55535                </enumeratedValue>
55536                <enumeratedValue>
55537                  <name>1</name>
55538                  <description>Clock enabled</description>
55539                  <value>#1</value>
55540                </enumeratedValue>
55541              </enumeratedValues>
55542            </field>
55543            <field>
55544              <name>FTM3</name>
55545              <description>FTM3 Clock Gate Control</description>
55546              <bitOffset>25</bitOffset>
55547              <bitWidth>1</bitWidth>
55548              <access>read-write</access>
55549              <enumeratedValues>
55550                <enumeratedValue>
55551                  <name>0</name>
55552                  <description>Clock disabled</description>
55553                  <value>#0</value>
55554                </enumeratedValue>
55555                <enumeratedValue>
55556                  <name>1</name>
55557                  <description>Clock enabled</description>
55558                  <value>#1</value>
55559                </enumeratedValue>
55560              </enumeratedValues>
55561            </field>
55562          </fields>
55563        </register>
55564        <register>
55565          <name>SCGC4</name>
55566          <description>System Clock Gating Control Register 4</description>
55567          <addressOffset>0x1034</addressOffset>
55568          <size>32</size>
55569          <access>read-write</access>
55570          <resetValue>0xF0100030</resetValue>
55571          <resetMask>0xFFFFFFFF</resetMask>
55572          <fields>
55573            <field>
55574              <name>EWM</name>
55575              <description>EWM Clock Gate Control</description>
55576              <bitOffset>1</bitOffset>
55577              <bitWidth>1</bitWidth>
55578              <access>read-write</access>
55579              <enumeratedValues>
55580                <enumeratedValue>
55581                  <name>0</name>
55582                  <description>Clock disabled</description>
55583                  <value>#0</value>
55584                </enumeratedValue>
55585                <enumeratedValue>
55586                  <name>1</name>
55587                  <description>Clock enabled</description>
55588                  <value>#1</value>
55589                </enumeratedValue>
55590              </enumeratedValues>
55591            </field>
55592            <field>
55593              <name>CMT</name>
55594              <description>CMT Clock Gate Control</description>
55595              <bitOffset>2</bitOffset>
55596              <bitWidth>1</bitWidth>
55597              <access>read-write</access>
55598              <enumeratedValues>
55599                <enumeratedValue>
55600                  <name>0</name>
55601                  <description>Clock disabled</description>
55602                  <value>#0</value>
55603                </enumeratedValue>
55604                <enumeratedValue>
55605                  <name>1</name>
55606                  <description>Clock enabled</description>
55607                  <value>#1</value>
55608                </enumeratedValue>
55609              </enumeratedValues>
55610            </field>
55611            <field>
55612              <name>I2C0</name>
55613              <description>I2C0 Clock Gate Control</description>
55614              <bitOffset>6</bitOffset>
55615              <bitWidth>1</bitWidth>
55616              <access>read-write</access>
55617              <enumeratedValues>
55618                <enumeratedValue>
55619                  <name>0</name>
55620                  <description>Clock disabled</description>
55621                  <value>#0</value>
55622                </enumeratedValue>
55623                <enumeratedValue>
55624                  <name>1</name>
55625                  <description>Clock enabled</description>
55626                  <value>#1</value>
55627                </enumeratedValue>
55628              </enumeratedValues>
55629            </field>
55630            <field>
55631              <name>I2C1</name>
55632              <description>I2C1 Clock Gate Control</description>
55633              <bitOffset>7</bitOffset>
55634              <bitWidth>1</bitWidth>
55635              <access>read-write</access>
55636              <enumeratedValues>
55637                <enumeratedValue>
55638                  <name>0</name>
55639                  <description>Clock disabled</description>
55640                  <value>#0</value>
55641                </enumeratedValue>
55642                <enumeratedValue>
55643                  <name>1</name>
55644                  <description>Clock enabled</description>
55645                  <value>#1</value>
55646                </enumeratedValue>
55647              </enumeratedValues>
55648            </field>
55649            <field>
55650              <name>USBOTG</name>
55651              <description>USB Clock Gate Control</description>
55652              <bitOffset>18</bitOffset>
55653              <bitWidth>1</bitWidth>
55654              <access>read-write</access>
55655              <enumeratedValues>
55656                <enumeratedValue>
55657                  <name>0</name>
55658                  <description>Clock disabled</description>
55659                  <value>#0</value>
55660                </enumeratedValue>
55661                <enumeratedValue>
55662                  <name>1</name>
55663                  <description>Clock enabled</description>
55664                  <value>#1</value>
55665                </enumeratedValue>
55666              </enumeratedValues>
55667            </field>
55668            <field>
55669              <name>CMP</name>
55670              <description>Comparator Clock Gate Control</description>
55671              <bitOffset>19</bitOffset>
55672              <bitWidth>1</bitWidth>
55673              <access>read-write</access>
55674              <enumeratedValues>
55675                <enumeratedValue>
55676                  <name>0</name>
55677                  <description>Clock disabled</description>
55678                  <value>#0</value>
55679                </enumeratedValue>
55680                <enumeratedValue>
55681                  <name>1</name>
55682                  <description>Clock enabled</description>
55683                  <value>#1</value>
55684                </enumeratedValue>
55685              </enumeratedValues>
55686            </field>
55687            <field>
55688              <name>VREF</name>
55689              <description>VREF Clock Gate Control</description>
55690              <bitOffset>20</bitOffset>
55691              <bitWidth>1</bitWidth>
55692              <access>read-write</access>
55693              <enumeratedValues>
55694                <enumeratedValue>
55695                  <name>0</name>
55696                  <description>Clock disabled</description>
55697                  <value>#0</value>
55698                </enumeratedValue>
55699                <enumeratedValue>
55700                  <name>1</name>
55701                  <description>Clock enabled</description>
55702                  <value>#1</value>
55703                </enumeratedValue>
55704              </enumeratedValues>
55705            </field>
55706          </fields>
55707        </register>
55708        <register>
55709          <name>SCGC5</name>
55710          <description>System Clock Gating Control Register 5</description>
55711          <addressOffset>0x1038</addressOffset>
55712          <size>32</size>
55713          <access>read-write</access>
55714          <resetValue>0x40182</resetValue>
55715          <resetMask>0xFFFFFFFF</resetMask>
55716          <fields>
55717            <field>
55718              <name>LPTMR</name>
55719              <description>Low Power Timer Access Control</description>
55720              <bitOffset>0</bitOffset>
55721              <bitWidth>1</bitWidth>
55722              <access>read-write</access>
55723              <enumeratedValues>
55724                <enumeratedValue>
55725                  <name>0</name>
55726                  <description>Access disabled</description>
55727                  <value>#0</value>
55728                </enumeratedValue>
55729                <enumeratedValue>
55730                  <name>1</name>
55731                  <description>Access enabled</description>
55732                  <value>#1</value>
55733                </enumeratedValue>
55734              </enumeratedValues>
55735            </field>
55736            <field>
55737              <name>LPTMR1</name>
55738              <description>LPTMR1 Clock Gate Control</description>
55739              <bitOffset>4</bitOffset>
55740              <bitWidth>1</bitWidth>
55741              <access>read-write</access>
55742              <enumeratedValues>
55743                <enumeratedValue>
55744                  <name>0</name>
55745                  <description>Access disabled</description>
55746                  <value>#0</value>
55747                </enumeratedValue>
55748                <enumeratedValue>
55749                  <name>1</name>
55750                  <description>Access enabled</description>
55751                  <value>#1</value>
55752                </enumeratedValue>
55753              </enumeratedValues>
55754            </field>
55755            <field>
55756              <name>TSI</name>
55757              <description>TSI Clock Gate Control</description>
55758              <bitOffset>5</bitOffset>
55759              <bitWidth>1</bitWidth>
55760              <access>read-write</access>
55761              <enumeratedValues>
55762                <enumeratedValue>
55763                  <name>0</name>
55764                  <description>Clock disabled</description>
55765                  <value>#0</value>
55766                </enumeratedValue>
55767                <enumeratedValue>
55768                  <name>1</name>
55769                  <description>Clock enabled</description>
55770                  <value>#1</value>
55771                </enumeratedValue>
55772              </enumeratedValues>
55773            </field>
55774            <field>
55775              <name>PORTA</name>
55776              <description>Port A Clock Gate Control</description>
55777              <bitOffset>9</bitOffset>
55778              <bitWidth>1</bitWidth>
55779              <access>read-write</access>
55780              <enumeratedValues>
55781                <enumeratedValue>
55782                  <name>0</name>
55783                  <description>Clock disabled</description>
55784                  <value>#0</value>
55785                </enumeratedValue>
55786                <enumeratedValue>
55787                  <name>1</name>
55788                  <description>Clock enabled</description>
55789                  <value>#1</value>
55790                </enumeratedValue>
55791              </enumeratedValues>
55792            </field>
55793            <field>
55794              <name>PORTB</name>
55795              <description>Port B Clock Gate Control</description>
55796              <bitOffset>10</bitOffset>
55797              <bitWidth>1</bitWidth>
55798              <access>read-write</access>
55799              <enumeratedValues>
55800                <enumeratedValue>
55801                  <name>0</name>
55802                  <description>Clock disabled</description>
55803                  <value>#0</value>
55804                </enumeratedValue>
55805                <enumeratedValue>
55806                  <name>1</name>
55807                  <description>Clock enabled</description>
55808                  <value>#1</value>
55809                </enumeratedValue>
55810              </enumeratedValues>
55811            </field>
55812            <field>
55813              <name>PORTC</name>
55814              <description>Port C Clock Gate Control</description>
55815              <bitOffset>11</bitOffset>
55816              <bitWidth>1</bitWidth>
55817              <access>read-write</access>
55818              <enumeratedValues>
55819                <enumeratedValue>
55820                  <name>0</name>
55821                  <description>Clock disabled</description>
55822                  <value>#0</value>
55823                </enumeratedValue>
55824                <enumeratedValue>
55825                  <name>1</name>
55826                  <description>Clock enabled</description>
55827                  <value>#1</value>
55828                </enumeratedValue>
55829              </enumeratedValues>
55830            </field>
55831            <field>
55832              <name>PORTD</name>
55833              <description>Port D Clock Gate Control</description>
55834              <bitOffset>12</bitOffset>
55835              <bitWidth>1</bitWidth>
55836              <access>read-write</access>
55837              <enumeratedValues>
55838                <enumeratedValue>
55839                  <name>0</name>
55840                  <description>Clock disabled</description>
55841                  <value>#0</value>
55842                </enumeratedValue>
55843                <enumeratedValue>
55844                  <name>1</name>
55845                  <description>Clock enabled</description>
55846                  <value>#1</value>
55847                </enumeratedValue>
55848              </enumeratedValues>
55849            </field>
55850            <field>
55851              <name>PORTE</name>
55852              <description>Port E Clock Gate Control</description>
55853              <bitOffset>13</bitOffset>
55854              <bitWidth>1</bitWidth>
55855              <access>read-write</access>
55856              <enumeratedValues>
55857                <enumeratedValue>
55858                  <name>0</name>
55859                  <description>Clock disabled</description>
55860                  <value>#0</value>
55861                </enumeratedValue>
55862                <enumeratedValue>
55863                  <name>1</name>
55864                  <description>Clock enabled</description>
55865                  <value>#1</value>
55866                </enumeratedValue>
55867              </enumeratedValues>
55868            </field>
55869          </fields>
55870        </register>
55871        <register>
55872          <name>SCGC6</name>
55873          <description>System Clock Gating Control Register 6</description>
55874          <addressOffset>0x103C</addressOffset>
55875          <size>32</size>
55876          <access>read-write</access>
55877          <resetValue>0x40000001</resetValue>
55878          <resetMask>0xFFFFFFFF</resetMask>
55879          <fields>
55880            <field>
55881              <name>FTF</name>
55882              <description>Flash Memory Clock Gate Control</description>
55883              <bitOffset>0</bitOffset>
55884              <bitWidth>1</bitWidth>
55885              <access>read-write</access>
55886              <enumeratedValues>
55887                <enumeratedValue>
55888                  <name>0</name>
55889                  <description>Clock disabled</description>
55890                  <value>#0</value>
55891                </enumeratedValue>
55892                <enumeratedValue>
55893                  <name>1</name>
55894                  <description>Clock enabled</description>
55895                  <value>#1</value>
55896                </enumeratedValue>
55897              </enumeratedValues>
55898            </field>
55899            <field>
55900              <name>DMAMUX</name>
55901              <description>DMA Mux Clock Gate Control</description>
55902              <bitOffset>1</bitOffset>
55903              <bitWidth>1</bitWidth>
55904              <access>read-write</access>
55905              <enumeratedValues>
55906                <enumeratedValue>
55907                  <name>0</name>
55908                  <description>Clock disabled</description>
55909                  <value>#0</value>
55910                </enumeratedValue>
55911                <enumeratedValue>
55912                  <name>1</name>
55913                  <description>Clock enabled</description>
55914                  <value>#1</value>
55915                </enumeratedValue>
55916              </enumeratedValues>
55917            </field>
55918            <field>
55919              <name>SPI0</name>
55920              <description>SPI0 Clock Gate Control</description>
55921              <bitOffset>12</bitOffset>
55922              <bitWidth>1</bitWidth>
55923              <access>read-write</access>
55924              <enumeratedValues>
55925                <enumeratedValue>
55926                  <name>0</name>
55927                  <description>Clock disabled</description>
55928                  <value>#0</value>
55929                </enumeratedValue>
55930                <enumeratedValue>
55931                  <name>1</name>
55932                  <description>Clock enabled</description>
55933                  <value>#1</value>
55934                </enumeratedValue>
55935              </enumeratedValues>
55936            </field>
55937            <field>
55938              <name>SPI1</name>
55939              <description>SPI1 Clock Gate Control</description>
55940              <bitOffset>13</bitOffset>
55941              <bitWidth>1</bitWidth>
55942              <access>read-write</access>
55943              <enumeratedValues>
55944                <enumeratedValue>
55945                  <name>0</name>
55946                  <description>Clock disabled</description>
55947                  <value>#0</value>
55948                </enumeratedValue>
55949                <enumeratedValue>
55950                  <name>1</name>
55951                  <description>Clock enabled</description>
55952                  <value>#1</value>
55953                </enumeratedValue>
55954              </enumeratedValues>
55955            </field>
55956            <field>
55957              <name>I2S</name>
55958              <description>I2S Clock Gate Control</description>
55959              <bitOffset>15</bitOffset>
55960              <bitWidth>1</bitWidth>
55961              <access>read-write</access>
55962              <enumeratedValues>
55963                <enumeratedValue>
55964                  <name>0</name>
55965                  <description>Clock disabled</description>
55966                  <value>#0</value>
55967                </enumeratedValue>
55968                <enumeratedValue>
55969                  <name>1</name>
55970                  <description>Clock enabled</description>
55971                  <value>#1</value>
55972                </enumeratedValue>
55973              </enumeratedValues>
55974            </field>
55975            <field>
55976              <name>CRC</name>
55977              <description>CRC Clock Gate Control</description>
55978              <bitOffset>18</bitOffset>
55979              <bitWidth>1</bitWidth>
55980              <access>read-write</access>
55981              <enumeratedValues>
55982                <enumeratedValue>
55983                  <name>0</name>
55984                  <description>Clock disabled</description>
55985                  <value>#0</value>
55986                </enumeratedValue>
55987                <enumeratedValue>
55988                  <name>1</name>
55989                  <description>Clock enabled</description>
55990                  <value>#1</value>
55991                </enumeratedValue>
55992              </enumeratedValues>
55993            </field>
55994            <field>
55995              <name>USBDCD</name>
55996              <description>USB DCD Clock Gate Control</description>
55997              <bitOffset>21</bitOffset>
55998              <bitWidth>1</bitWidth>
55999              <access>read-write</access>
56000              <enumeratedValues>
56001                <enumeratedValue>
56002                  <name>0</name>
56003                  <description>Clock disabled</description>
56004                  <value>#0</value>
56005                </enumeratedValue>
56006                <enumeratedValue>
56007                  <name>1</name>
56008                  <description>Clock enabled</description>
56009                  <value>#1</value>
56010                </enumeratedValue>
56011              </enumeratedValues>
56012            </field>
56013            <field>
56014              <name>PDB</name>
56015              <description>PDB Clock Gate Control</description>
56016              <bitOffset>22</bitOffset>
56017              <bitWidth>1</bitWidth>
56018              <access>read-write</access>
56019              <enumeratedValues>
56020                <enumeratedValue>
56021                  <name>0</name>
56022                  <description>Clock disabled</description>
56023                  <value>#0</value>
56024                </enumeratedValue>
56025                <enumeratedValue>
56026                  <name>1</name>
56027                  <description>Clock enabled</description>
56028                  <value>#1</value>
56029                </enumeratedValue>
56030              </enumeratedValues>
56031            </field>
56032            <field>
56033              <name>PIT</name>
56034              <description>PIT Clock Gate Control</description>
56035              <bitOffset>23</bitOffset>
56036              <bitWidth>1</bitWidth>
56037              <access>read-write</access>
56038              <enumeratedValues>
56039                <enumeratedValue>
56040                  <name>0</name>
56041                  <description>Clock disabled</description>
56042                  <value>#0</value>
56043                </enumeratedValue>
56044                <enumeratedValue>
56045                  <name>1</name>
56046                  <description>Clock enabled</description>
56047                  <value>#1</value>
56048                </enumeratedValue>
56049              </enumeratedValues>
56050            </field>
56051            <field>
56052              <name>FTM0</name>
56053              <description>FTM0 Clock Gate Control</description>
56054              <bitOffset>24</bitOffset>
56055              <bitWidth>1</bitWidth>
56056              <access>read-write</access>
56057              <enumeratedValues>
56058                <enumeratedValue>
56059                  <name>0</name>
56060                  <description>Clock disabled</description>
56061                  <value>#0</value>
56062                </enumeratedValue>
56063                <enumeratedValue>
56064                  <name>1</name>
56065                  <description>Clock enabled</description>
56066                  <value>#1</value>
56067                </enumeratedValue>
56068              </enumeratedValues>
56069            </field>
56070            <field>
56071              <name>FTM1</name>
56072              <description>FTM1 Clock Gate Control</description>
56073              <bitOffset>25</bitOffset>
56074              <bitWidth>1</bitWidth>
56075              <access>read-write</access>
56076              <enumeratedValues>
56077                <enumeratedValue>
56078                  <name>0</name>
56079                  <description>Clock disabled</description>
56080                  <value>#0</value>
56081                </enumeratedValue>
56082                <enumeratedValue>
56083                  <name>1</name>
56084                  <description>Clock enabled</description>
56085                  <value>#1</value>
56086                </enumeratedValue>
56087              </enumeratedValues>
56088            </field>
56089            <field>
56090              <name>FTM2</name>
56091              <description>FTM2 Clock Gate Control</description>
56092              <bitOffset>26</bitOffset>
56093              <bitWidth>1</bitWidth>
56094              <access>read-write</access>
56095              <enumeratedValues>
56096                <enumeratedValue>
56097                  <name>0</name>
56098                  <description>Clock disabled</description>
56099                  <value>#0</value>
56100                </enumeratedValue>
56101                <enumeratedValue>
56102                  <name>1</name>
56103                  <description>Clock enabled</description>
56104                  <value>#1</value>
56105                </enumeratedValue>
56106              </enumeratedValues>
56107            </field>
56108            <field>
56109              <name>ADC0</name>
56110              <description>ADC0 Clock Gate Control</description>
56111              <bitOffset>27</bitOffset>
56112              <bitWidth>1</bitWidth>
56113              <access>read-write</access>
56114              <enumeratedValues>
56115                <enumeratedValue>
56116                  <name>0</name>
56117                  <description>Clock disabled</description>
56118                  <value>#0</value>
56119                </enumeratedValue>
56120                <enumeratedValue>
56121                  <name>1</name>
56122                  <description>Clock enabled</description>
56123                  <value>#1</value>
56124                </enumeratedValue>
56125              </enumeratedValues>
56126            </field>
56127            <field>
56128              <name>RTC</name>
56129              <description>RTC Access Control</description>
56130              <bitOffset>29</bitOffset>
56131              <bitWidth>1</bitWidth>
56132              <access>read-write</access>
56133              <enumeratedValues>
56134                <enumeratedValue>
56135                  <name>0</name>
56136                  <description>Access and interrupts disabled</description>
56137                  <value>#0</value>
56138                </enumeratedValue>
56139                <enumeratedValue>
56140                  <name>1</name>
56141                  <description>Access and interrupts enabled</description>
56142                  <value>#1</value>
56143                </enumeratedValue>
56144              </enumeratedValues>
56145            </field>
56146            <field>
56147              <name>DAC0</name>
56148              <description>DAC0 Clock Gate Control</description>
56149              <bitOffset>31</bitOffset>
56150              <bitWidth>1</bitWidth>
56151              <access>read-write</access>
56152              <enumeratedValues>
56153                <enumeratedValue>
56154                  <name>0</name>
56155                  <description>Clock disabled</description>
56156                  <value>#0</value>
56157                </enumeratedValue>
56158                <enumeratedValue>
56159                  <name>1</name>
56160                  <description>Clock enabled</description>
56161                  <value>#1</value>
56162                </enumeratedValue>
56163              </enumeratedValues>
56164            </field>
56165          </fields>
56166        </register>
56167        <register>
56168          <name>SCGC7</name>
56169          <description>System Clock Gating Control Register 7</description>
56170          <addressOffset>0x1040</addressOffset>
56171          <size>32</size>
56172          <access>read-write</access>
56173          <resetValue>0x6</resetValue>
56174          <resetMask>0xFFFFFFFF</resetMask>
56175          <fields>
56176            <field>
56177              <name>FLEXBUS</name>
56178              <description>FlexBus Clock Gate Control</description>
56179              <bitOffset>0</bitOffset>
56180              <bitWidth>1</bitWidth>
56181              <access>read-write</access>
56182              <enumeratedValues>
56183                <enumeratedValue>
56184                  <name>0</name>
56185                  <description>Clock disabled</description>
56186                  <value>#0</value>
56187                </enumeratedValue>
56188                <enumeratedValue>
56189                  <name>1</name>
56190                  <description>Clock enabled</description>
56191                  <value>#1</value>
56192                </enumeratedValue>
56193              </enumeratedValues>
56194            </field>
56195            <field>
56196              <name>DMA</name>
56197              <description>DMA Clock Gate Control</description>
56198              <bitOffset>1</bitOffset>
56199              <bitWidth>1</bitWidth>
56200              <access>read-write</access>
56201              <enumeratedValues>
56202                <enumeratedValue>
56203                  <name>0</name>
56204                  <description>Clock disabled</description>
56205                  <value>#0</value>
56206                </enumeratedValue>
56207                <enumeratedValue>
56208                  <name>1</name>
56209                  <description>Clock enabled</description>
56210                  <value>#1</value>
56211                </enumeratedValue>
56212              </enumeratedValues>
56213            </field>
56214            <field>
56215              <name>MPU</name>
56216              <description>MPU Clock Gate Control</description>
56217              <bitOffset>2</bitOffset>
56218              <bitWidth>1</bitWidth>
56219              <access>read-write</access>
56220              <enumeratedValues>
56221                <enumeratedValue>
56222                  <name>0</name>
56223                  <description>Clock disabled</description>
56224                  <value>#0</value>
56225                </enumeratedValue>
56226                <enumeratedValue>
56227                  <name>1</name>
56228                  <description>Clock enabled</description>
56229                  <value>#1</value>
56230                </enumeratedValue>
56231              </enumeratedValues>
56232            </field>
56233            <field>
56234              <name>SDRAMC</name>
56235              <description>SDRAMC Clock Gate Control</description>
56236              <bitOffset>3</bitOffset>
56237              <bitWidth>1</bitWidth>
56238              <access>read-write</access>
56239              <enumeratedValues>
56240                <enumeratedValue>
56241                  <name>0</name>
56242                  <description>Clock disabled</description>
56243                  <value>#0</value>
56244                </enumeratedValue>
56245                <enumeratedValue>
56246                  <name>1</name>
56247                  <description>Clock enabled</description>
56248                  <value>#1</value>
56249                </enumeratedValue>
56250              </enumeratedValues>
56251            </field>
56252          </fields>
56253        </register>
56254        <register>
56255          <name>CLKDIV1</name>
56256          <description>System Clock Divider Register 1</description>
56257          <addressOffset>0x1044</addressOffset>
56258          <size>32</size>
56259          <access>read-write</access>
56260          <resetValue>0x110000</resetValue>
56261          <resetMask>0xFFFFFFFF</resetMask>
56262          <fields>
56263            <field>
56264              <name>OUTDIV4</name>
56265              <description>Clock 4 output divider value</description>
56266              <bitOffset>16</bitOffset>
56267              <bitWidth>4</bitWidth>
56268              <access>read-write</access>
56269              <enumeratedValues>
56270                <enumeratedValue>
56271                  <name>0000</name>
56272                  <description>Divide-by-1.</description>
56273                  <value>#0000</value>
56274                </enumeratedValue>
56275                <enumeratedValue>
56276                  <name>0001</name>
56277                  <description>Divide-by-2.</description>
56278                  <value>#0001</value>
56279                </enumeratedValue>
56280                <enumeratedValue>
56281                  <name>0010</name>
56282                  <description>Divide-by-3.</description>
56283                  <value>#0010</value>
56284                </enumeratedValue>
56285                <enumeratedValue>
56286                  <name>0011</name>
56287                  <description>Divide-by-4.</description>
56288                  <value>#0011</value>
56289                </enumeratedValue>
56290                <enumeratedValue>
56291                  <name>0100</name>
56292                  <description>Divide-by-5.</description>
56293                  <value>#0100</value>
56294                </enumeratedValue>
56295                <enumeratedValue>
56296                  <name>0101</name>
56297                  <description>Divide-by-6.</description>
56298                  <value>#0101</value>
56299                </enumeratedValue>
56300                <enumeratedValue>
56301                  <name>0110</name>
56302                  <description>Divide-by-7.</description>
56303                  <value>#0110</value>
56304                </enumeratedValue>
56305                <enumeratedValue>
56306                  <name>0111</name>
56307                  <description>Divide-by-8.</description>
56308                  <value>#0111</value>
56309                </enumeratedValue>
56310                <enumeratedValue>
56311                  <name>1000</name>
56312                  <description>Divide-by-9.</description>
56313                  <value>#1000</value>
56314                </enumeratedValue>
56315                <enumeratedValue>
56316                  <name>1001</name>
56317                  <description>Divide-by-10.</description>
56318                  <value>#1001</value>
56319                </enumeratedValue>
56320                <enumeratedValue>
56321                  <name>1010</name>
56322                  <description>Divide-by-11.</description>
56323                  <value>#1010</value>
56324                </enumeratedValue>
56325                <enumeratedValue>
56326                  <name>1011</name>
56327                  <description>Divide-by-12.</description>
56328                  <value>#1011</value>
56329                </enumeratedValue>
56330                <enumeratedValue>
56331                  <name>1100</name>
56332                  <description>Divide-by-13.</description>
56333                  <value>#1100</value>
56334                </enumeratedValue>
56335                <enumeratedValue>
56336                  <name>1101</name>
56337                  <description>Divide-by-14.</description>
56338                  <value>#1101</value>
56339                </enumeratedValue>
56340                <enumeratedValue>
56341                  <name>1110</name>
56342                  <description>Divide-by-15.</description>
56343                  <value>#1110</value>
56344                </enumeratedValue>
56345                <enumeratedValue>
56346                  <name>1111</name>
56347                  <description>Divide-by-16.</description>
56348                  <value>#1111</value>
56349                </enumeratedValue>
56350              </enumeratedValues>
56351            </field>
56352            <field>
56353              <name>OUTDIV3</name>
56354              <description>Clock 3 output divider value</description>
56355              <bitOffset>20</bitOffset>
56356              <bitWidth>4</bitWidth>
56357              <access>read-write</access>
56358              <enumeratedValues>
56359                <enumeratedValue>
56360                  <name>0000</name>
56361                  <description>Divide-by-1.</description>
56362                  <value>#0000</value>
56363                </enumeratedValue>
56364                <enumeratedValue>
56365                  <name>0001</name>
56366                  <description>Divide-by-2.</description>
56367                  <value>#0001</value>
56368                </enumeratedValue>
56369                <enumeratedValue>
56370                  <name>0010</name>
56371                  <description>Divide-by-3.</description>
56372                  <value>#0010</value>
56373                </enumeratedValue>
56374                <enumeratedValue>
56375                  <name>0011</name>
56376                  <description>Divide-by-4.</description>
56377                  <value>#0011</value>
56378                </enumeratedValue>
56379                <enumeratedValue>
56380                  <name>0100</name>
56381                  <description>Divide-by-5.</description>
56382                  <value>#0100</value>
56383                </enumeratedValue>
56384                <enumeratedValue>
56385                  <name>0101</name>
56386                  <description>Divide-by-6.</description>
56387                  <value>#0101</value>
56388                </enumeratedValue>
56389                <enumeratedValue>
56390                  <name>0110</name>
56391                  <description>Divide-by-7.</description>
56392                  <value>#0110</value>
56393                </enumeratedValue>
56394                <enumeratedValue>
56395                  <name>0111</name>
56396                  <description>Divide-by-8.</description>
56397                  <value>#0111</value>
56398                </enumeratedValue>
56399                <enumeratedValue>
56400                  <name>1000</name>
56401                  <description>Divide-by-9.</description>
56402                  <value>#1000</value>
56403                </enumeratedValue>
56404                <enumeratedValue>
56405                  <name>1001</name>
56406                  <description>Divide-by-10.</description>
56407                  <value>#1001</value>
56408                </enumeratedValue>
56409                <enumeratedValue>
56410                  <name>1010</name>
56411                  <description>Divide-by-11.</description>
56412                  <value>#1010</value>
56413                </enumeratedValue>
56414                <enumeratedValue>
56415                  <name>1011</name>
56416                  <description>Divide-by-12.</description>
56417                  <value>#1011</value>
56418                </enumeratedValue>
56419                <enumeratedValue>
56420                  <name>1100</name>
56421                  <description>Divide-by-13.</description>
56422                  <value>#1100</value>
56423                </enumeratedValue>
56424                <enumeratedValue>
56425                  <name>1101</name>
56426                  <description>Divide-by-14.</description>
56427                  <value>#1101</value>
56428                </enumeratedValue>
56429                <enumeratedValue>
56430                  <name>1110</name>
56431                  <description>Divide-by-15.</description>
56432                  <value>#1110</value>
56433                </enumeratedValue>
56434                <enumeratedValue>
56435                  <name>1111</name>
56436                  <description>Divide-by-16.</description>
56437                  <value>#1111</value>
56438                </enumeratedValue>
56439              </enumeratedValues>
56440            </field>
56441            <field>
56442              <name>OUTDIV2</name>
56443              <description>Clock 2 output divider value</description>
56444              <bitOffset>24</bitOffset>
56445              <bitWidth>4</bitWidth>
56446              <access>read-write</access>
56447              <enumeratedValues>
56448                <enumeratedValue>
56449                  <name>0000</name>
56450                  <description>Divide-by-1.</description>
56451                  <value>#0000</value>
56452                </enumeratedValue>
56453                <enumeratedValue>
56454                  <name>0001</name>
56455                  <description>Divide-by-2.</description>
56456                  <value>#0001</value>
56457                </enumeratedValue>
56458                <enumeratedValue>
56459                  <name>0010</name>
56460                  <description>Divide-by-3.</description>
56461                  <value>#0010</value>
56462                </enumeratedValue>
56463                <enumeratedValue>
56464                  <name>0011</name>
56465                  <description>Divide-by-4.</description>
56466                  <value>#0011</value>
56467                </enumeratedValue>
56468                <enumeratedValue>
56469                  <name>0100</name>
56470                  <description>Divide-by-5.</description>
56471                  <value>#0100</value>
56472                </enumeratedValue>
56473                <enumeratedValue>
56474                  <name>0101</name>
56475                  <description>Divide-by-6.</description>
56476                  <value>#0101</value>
56477                </enumeratedValue>
56478                <enumeratedValue>
56479                  <name>0110</name>
56480                  <description>Divide-by-7.</description>
56481                  <value>#0110</value>
56482                </enumeratedValue>
56483                <enumeratedValue>
56484                  <name>0111</name>
56485                  <description>Divide-by-8.</description>
56486                  <value>#0111</value>
56487                </enumeratedValue>
56488                <enumeratedValue>
56489                  <name>1000</name>
56490                  <description>Divide-by-9.</description>
56491                  <value>#1000</value>
56492                </enumeratedValue>
56493                <enumeratedValue>
56494                  <name>1001</name>
56495                  <description>Divide-by-10.</description>
56496                  <value>#1001</value>
56497                </enumeratedValue>
56498                <enumeratedValue>
56499                  <name>1010</name>
56500                  <description>Divide-by-11.</description>
56501                  <value>#1010</value>
56502                </enumeratedValue>
56503                <enumeratedValue>
56504                  <name>1011</name>
56505                  <description>Divide-by-12.</description>
56506                  <value>#1011</value>
56507                </enumeratedValue>
56508                <enumeratedValue>
56509                  <name>1100</name>
56510                  <description>Divide-by-13.</description>
56511                  <value>#1100</value>
56512                </enumeratedValue>
56513                <enumeratedValue>
56514                  <name>1101</name>
56515                  <description>Divide-by-14.</description>
56516                  <value>#1101</value>
56517                </enumeratedValue>
56518                <enumeratedValue>
56519                  <name>1110</name>
56520                  <description>Divide-by-15.</description>
56521                  <value>#1110</value>
56522                </enumeratedValue>
56523                <enumeratedValue>
56524                  <name>1111</name>
56525                  <description>Divide-by-16.</description>
56526                  <value>#1111</value>
56527                </enumeratedValue>
56528              </enumeratedValues>
56529            </field>
56530            <field>
56531              <name>OUTDIV1</name>
56532              <description>Clock 1 output divider value</description>
56533              <bitOffset>28</bitOffset>
56534              <bitWidth>4</bitWidth>
56535              <access>read-write</access>
56536              <enumeratedValues>
56537                <enumeratedValue>
56538                  <name>0000</name>
56539                  <description>Divide-by-1.</description>
56540                  <value>#0000</value>
56541                </enumeratedValue>
56542                <enumeratedValue>
56543                  <name>0001</name>
56544                  <description>Divide-by-2.</description>
56545                  <value>#0001</value>
56546                </enumeratedValue>
56547                <enumeratedValue>
56548                  <name>0010</name>
56549                  <description>Divide-by-3.</description>
56550                  <value>#0010</value>
56551                </enumeratedValue>
56552                <enumeratedValue>
56553                  <name>0011</name>
56554                  <description>Divide-by-4.</description>
56555                  <value>#0011</value>
56556                </enumeratedValue>
56557                <enumeratedValue>
56558                  <name>0100</name>
56559                  <description>Divide-by-5.</description>
56560                  <value>#0100</value>
56561                </enumeratedValue>
56562                <enumeratedValue>
56563                  <name>0101</name>
56564                  <description>Divide-by-6.</description>
56565                  <value>#0101</value>
56566                </enumeratedValue>
56567                <enumeratedValue>
56568                  <name>0110</name>
56569                  <description>Divide-by-7.</description>
56570                  <value>#0110</value>
56571                </enumeratedValue>
56572                <enumeratedValue>
56573                  <name>0111</name>
56574                  <description>Divide-by-8.</description>
56575                  <value>#0111</value>
56576                </enumeratedValue>
56577                <enumeratedValue>
56578                  <name>1000</name>
56579                  <description>Divide-by-9.</description>
56580                  <value>#1000</value>
56581                </enumeratedValue>
56582                <enumeratedValue>
56583                  <name>1001</name>
56584                  <description>Divide-by-10.</description>
56585                  <value>#1001</value>
56586                </enumeratedValue>
56587                <enumeratedValue>
56588                  <name>1010</name>
56589                  <description>Divide-by-11.</description>
56590                  <value>#1010</value>
56591                </enumeratedValue>
56592                <enumeratedValue>
56593                  <name>1011</name>
56594                  <description>Divide-by-12.</description>
56595                  <value>#1011</value>
56596                </enumeratedValue>
56597                <enumeratedValue>
56598                  <name>1100</name>
56599                  <description>Divide-by-13.</description>
56600                  <value>#1100</value>
56601                </enumeratedValue>
56602                <enumeratedValue>
56603                  <name>1101</name>
56604                  <description>Divide-by-14.</description>
56605                  <value>#1101</value>
56606                </enumeratedValue>
56607                <enumeratedValue>
56608                  <name>1110</name>
56609                  <description>Divide-by-15.</description>
56610                  <value>#1110</value>
56611                </enumeratedValue>
56612                <enumeratedValue>
56613                  <name>1111</name>
56614                  <description>Divide-by-16.</description>
56615                  <value>#1111</value>
56616                </enumeratedValue>
56617              </enumeratedValues>
56618            </field>
56619          </fields>
56620        </register>
56621        <register>
56622          <name>CLKDIV2</name>
56623          <description>System Clock Divider Register 2</description>
56624          <addressOffset>0x1048</addressOffset>
56625          <size>32</size>
56626          <access>read-write</access>
56627          <resetValue>0</resetValue>
56628          <resetMask>0xFFFFFFFF</resetMask>
56629          <fields>
56630            <field>
56631              <name>USBFRAC</name>
56632              <description>USB clock divider fraction</description>
56633              <bitOffset>0</bitOffset>
56634              <bitWidth>1</bitWidth>
56635              <access>read-write</access>
56636            </field>
56637            <field>
56638              <name>USBDIV</name>
56639              <description>USB clock divider divisor</description>
56640              <bitOffset>1</bitOffset>
56641              <bitWidth>3</bitWidth>
56642              <access>read-write</access>
56643            </field>
56644          </fields>
56645        </register>
56646        <register>
56647          <name>FCFG1</name>
56648          <description>Flash Configuration Register 1</description>
56649          <addressOffset>0x104C</addressOffset>
56650          <size>32</size>
56651          <access>read-write</access>
56652          <resetValue>0xF0F0F00</resetValue>
56653          <resetMask>0xFFFFFFFF</resetMask>
56654          <fields>
56655            <field>
56656              <name>FLASHDIS</name>
56657              <description>Flash Disable</description>
56658              <bitOffset>0</bitOffset>
56659              <bitWidth>1</bitWidth>
56660              <access>read-write</access>
56661              <enumeratedValues>
56662                <enumeratedValue>
56663                  <name>0</name>
56664                  <description>Flash is enabled</description>
56665                  <value>#0</value>
56666                </enumeratedValue>
56667                <enumeratedValue>
56668                  <name>1</name>
56669                  <description>Flash is disabled</description>
56670                  <value>#1</value>
56671                </enumeratedValue>
56672              </enumeratedValues>
56673            </field>
56674            <field>
56675              <name>FLASHDOZE</name>
56676              <description>Flash Doze</description>
56677              <bitOffset>1</bitOffset>
56678              <bitWidth>1</bitWidth>
56679              <access>read-write</access>
56680              <enumeratedValues>
56681                <enumeratedValue>
56682                  <name>0</name>
56683                  <description>Flash remains enabled during Wait mode</description>
56684                  <value>#0</value>
56685                </enumeratedValue>
56686                <enumeratedValue>
56687                  <name>1</name>
56688                  <description>Flash is disabled for the duration of Wait mode</description>
56689                  <value>#1</value>
56690                </enumeratedValue>
56691              </enumeratedValues>
56692            </field>
56693            <field>
56694              <name>PFSIZE</name>
56695              <description>Program flash size</description>
56696              <bitOffset>24</bitOffset>
56697              <bitWidth>4</bitWidth>
56698              <access>read-only</access>
56699              <enumeratedValues>
56700                <enumeratedValue>
56701                  <name>0011</name>
56702                  <description>32 KB of program flash memory</description>
56703                  <value>#0011</value>
56704                </enumeratedValue>
56705                <enumeratedValue>
56706                  <name>0101</name>
56707                  <description>64 KB of program flash memory</description>
56708                  <value>#0101</value>
56709                </enumeratedValue>
56710                <enumeratedValue>
56711                  <name>0111</name>
56712                  <description>128 KB of program flash memory</description>
56713                  <value>#0111</value>
56714                </enumeratedValue>
56715                <enumeratedValue>
56716                  <name>1001</name>
56717                  <description>256 KB of program flash memory</description>
56718                  <value>#1001</value>
56719                </enumeratedValue>
56720                <enumeratedValue>
56721                  <name>1011</name>
56722                  <description>512 KB of program flash memory</description>
56723                  <value>#1011</value>
56724                </enumeratedValue>
56725                <enumeratedValue>
56726                  <name>1101</name>
56727                  <description>1024 KB of program flash memory</description>
56728                  <value>#1101</value>
56729                </enumeratedValue>
56730                <enumeratedValue>
56731                  <name>1111</name>
56732                  <description>256 KB of program flash memory</description>
56733                  <value>#1111</value>
56734                </enumeratedValue>
56735              </enumeratedValues>
56736            </field>
56737          </fields>
56738        </register>
56739        <register>
56740          <name>FCFG2</name>
56741          <description>Flash Configuration Register 2</description>
56742          <addressOffset>0x1050</addressOffset>
56743          <size>32</size>
56744          <access>read-only</access>
56745          <resetValue>0x7FFF0000</resetValue>
56746          <resetMask>0xFFFFFFFF</resetMask>
56747          <fields>
56748            <field>
56749              <name>MAXADDR1</name>
56750              <description>Max address block 1</description>
56751              <bitOffset>16</bitOffset>
56752              <bitWidth>7</bitWidth>
56753              <access>read-only</access>
56754            </field>
56755            <field>
56756              <name>MAXADDR0</name>
56757              <description>Max address block 0</description>
56758              <bitOffset>24</bitOffset>
56759              <bitWidth>7</bitWidth>
56760              <access>read-only</access>
56761            </field>
56762          </fields>
56763        </register>
56764        <register>
56765          <name>UIDH</name>
56766          <description>Unique Identification Register High</description>
56767          <addressOffset>0x1054</addressOffset>
56768          <size>32</size>
56769          <access>read-only</access>
56770          <resetValue>0</resetValue>
56771          <resetMask>0xFFFFFFFF</resetMask>
56772          <fields>
56773            <field>
56774              <name>UID</name>
56775              <description>Unique Identification</description>
56776              <bitOffset>0</bitOffset>
56777              <bitWidth>32</bitWidth>
56778              <access>read-only</access>
56779            </field>
56780          </fields>
56781        </register>
56782        <register>
56783          <name>UIDMH</name>
56784          <description>Unique Identification Register Mid-High</description>
56785          <addressOffset>0x1058</addressOffset>
56786          <size>32</size>
56787          <access>read-only</access>
56788          <resetValue>0</resetValue>
56789          <resetMask>0xFFFFFFFF</resetMask>
56790          <fields>
56791            <field>
56792              <name>UID</name>
56793              <description>Unique Identification</description>
56794              <bitOffset>0</bitOffset>
56795              <bitWidth>32</bitWidth>
56796              <access>read-only</access>
56797            </field>
56798          </fields>
56799        </register>
56800        <register>
56801          <name>UIDML</name>
56802          <description>Unique Identification Register Mid Low</description>
56803          <addressOffset>0x105C</addressOffset>
56804          <size>32</size>
56805          <access>read-only</access>
56806          <resetValue>0</resetValue>
56807          <resetMask>0xFFFFFFFF</resetMask>
56808          <fields>
56809            <field>
56810              <name>UID</name>
56811              <description>Unique Identification</description>
56812              <bitOffset>0</bitOffset>
56813              <bitWidth>32</bitWidth>
56814              <access>read-only</access>
56815            </field>
56816          </fields>
56817        </register>
56818        <register>
56819          <name>UIDL</name>
56820          <description>Unique Identification Register Low</description>
56821          <addressOffset>0x1060</addressOffset>
56822          <size>32</size>
56823          <access>read-only</access>
56824          <resetValue>0</resetValue>
56825          <resetMask>0xFFFFFFFF</resetMask>
56826          <fields>
56827            <field>
56828              <name>UID</name>
56829              <description>Unique Identification</description>
56830              <bitOffset>0</bitOffset>
56831              <bitWidth>32</bitWidth>
56832              <access>read-only</access>
56833            </field>
56834          </fields>
56835        </register>
56836        <register>
56837          <name>CLKDIV3</name>
56838          <description>System Clock Divider Register 3</description>
56839          <addressOffset>0x1064</addressOffset>
56840          <size>32</size>
56841          <access>read-write</access>
56842          <resetValue>0</resetValue>
56843          <resetMask>0xFFFFFFFF</resetMask>
56844          <fields>
56845            <field>
56846              <name>PLLFLLFRAC</name>
56847              <description>PLLFLL clock divider fraction</description>
56848              <bitOffset>0</bitOffset>
56849              <bitWidth>1</bitWidth>
56850              <access>read-write</access>
56851            </field>
56852            <field>
56853              <name>PLLFLLDIV</name>
56854              <description>PLLFLL clock divider divisor</description>
56855              <bitOffset>1</bitOffset>
56856              <bitWidth>3</bitWidth>
56857              <access>read-write</access>
56858            </field>
56859          </fields>
56860        </register>
56861        <register>
56862          <name>CLKDIV4</name>
56863          <description>System Clock Divider Register 4</description>
56864          <addressOffset>0x1068</addressOffset>
56865          <size>32</size>
56866          <access>read-write</access>
56867          <resetValue>0</resetValue>
56868          <resetMask>0xFFFFFFFF</resetMask>
56869          <fields>
56870            <field>
56871              <name>TRACEFRAC</name>
56872              <description>Trace clock divider fraction</description>
56873              <bitOffset>0</bitOffset>
56874              <bitWidth>1</bitWidth>
56875              <access>read-write</access>
56876            </field>
56877            <field>
56878              <name>TRACEDIV</name>
56879              <description>Trace clock divider divisor</description>
56880              <bitOffset>1</bitOffset>
56881              <bitWidth>3</bitWidth>
56882              <access>read-write</access>
56883            </field>
56884          </fields>
56885        </register>
56886      </registers>
56887    </peripheral>
56888    <peripheral>
56889      <name>PORTA</name>
56890      <description>Pin Control and Interrupts</description>
56891      <groupName>PORT</groupName>
56892      <prependToName>PORTA_</prependToName>
56893      <baseAddress>0x40049000</baseAddress>
56894      <addressBlock>
56895        <offset>0</offset>
56896        <size>0xA4</size>
56897        <usage>registers</usage>
56898      </addressBlock>
56899      <interrupt>
56900        <name>PORTA</name>
56901        <value>59</value>
56902      </interrupt>
56903      <registers>
56904        <register>
56905          <name>PCR0</name>
56906          <description>Pin Control Register n</description>
56907          <addressOffset>0</addressOffset>
56908          <size>32</size>
56909          <access>read-write</access>
56910          <resetValue>0x702</resetValue>
56911          <resetMask>0xFFFFFFFF</resetMask>
56912          <fields>
56913            <field>
56914              <name>PS</name>
56915              <description>Pull Select</description>
56916              <bitOffset>0</bitOffset>
56917              <bitWidth>1</bitWidth>
56918              <access>read-write</access>
56919              <enumeratedValues>
56920                <enumeratedValue>
56921                  <name>0</name>
56922                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
56923                  <value>#0</value>
56924                </enumeratedValue>
56925                <enumeratedValue>
56926                  <name>1</name>
56927                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
56928                  <value>#1</value>
56929                </enumeratedValue>
56930              </enumeratedValues>
56931            </field>
56932            <field>
56933              <name>PE</name>
56934              <description>Pull Enable</description>
56935              <bitOffset>1</bitOffset>
56936              <bitWidth>1</bitWidth>
56937              <access>read-write</access>
56938              <enumeratedValues>
56939                <enumeratedValue>
56940                  <name>0</name>
56941                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
56942                  <value>#0</value>
56943                </enumeratedValue>
56944                <enumeratedValue>
56945                  <name>1</name>
56946                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
56947                  <value>#1</value>
56948                </enumeratedValue>
56949              </enumeratedValues>
56950            </field>
56951            <field>
56952              <name>SRE</name>
56953              <description>Slew Rate Enable</description>
56954              <bitOffset>2</bitOffset>
56955              <bitWidth>1</bitWidth>
56956              <access>read-write</access>
56957              <enumeratedValues>
56958                <enumeratedValue>
56959                  <name>0</name>
56960                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
56961                  <value>#0</value>
56962                </enumeratedValue>
56963                <enumeratedValue>
56964                  <name>1</name>
56965                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
56966                  <value>#1</value>
56967                </enumeratedValue>
56968              </enumeratedValues>
56969            </field>
56970            <field>
56971              <name>PFE</name>
56972              <description>Passive Filter Enable</description>
56973              <bitOffset>4</bitOffset>
56974              <bitWidth>1</bitWidth>
56975              <access>read-only</access>
56976              <enumeratedValues>
56977                <enumeratedValue>
56978                  <name>0</name>
56979                  <description>Passive input filter is disabled on the corresponding pin.</description>
56980                  <value>#0</value>
56981                </enumeratedValue>
56982                <enumeratedValue>
56983                  <name>1</name>
56984                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
56985                  <value>#1</value>
56986                </enumeratedValue>
56987              </enumeratedValues>
56988            </field>
56989            <field>
56990              <name>ODE</name>
56991              <description>Open Drain Enable</description>
56992              <bitOffset>5</bitOffset>
56993              <bitWidth>1</bitWidth>
56994              <access>read-write</access>
56995              <enumeratedValues>
56996                <enumeratedValue>
56997                  <name>0</name>
56998                  <description>Open drain output is disabled on the corresponding pin.</description>
56999                  <value>#0</value>
57000                </enumeratedValue>
57001                <enumeratedValue>
57002                  <name>1</name>
57003                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
57004                  <value>#1</value>
57005                </enumeratedValue>
57006              </enumeratedValues>
57007            </field>
57008            <field>
57009              <name>DSE</name>
57010              <description>Drive Strength Enable</description>
57011              <bitOffset>6</bitOffset>
57012              <bitWidth>1</bitWidth>
57013              <access>read-only</access>
57014              <enumeratedValues>
57015                <enumeratedValue>
57016                  <name>0</name>
57017                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
57018                  <value>#0</value>
57019                </enumeratedValue>
57020                <enumeratedValue>
57021                  <name>1</name>
57022                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
57023                  <value>#1</value>
57024                </enumeratedValue>
57025              </enumeratedValues>
57026            </field>
57027            <field>
57028              <name>MUX</name>
57029              <description>Pin Mux Control</description>
57030              <bitOffset>8</bitOffset>
57031              <bitWidth>3</bitWidth>
57032              <access>read-write</access>
57033              <enumeratedValues>
57034                <enumeratedValue>
57035                  <name>000</name>
57036                  <description>Pin disabled (Alternative 0) (analog).</description>
57037                  <value>#000</value>
57038                </enumeratedValue>
57039                <enumeratedValue>
57040                  <name>001</name>
57041                  <description>Alternative 1 (GPIO).</description>
57042                  <value>#001</value>
57043                </enumeratedValue>
57044                <enumeratedValue>
57045                  <name>010</name>
57046                  <description>Alternative 2 (chip-specific).</description>
57047                  <value>#010</value>
57048                </enumeratedValue>
57049                <enumeratedValue>
57050                  <name>011</name>
57051                  <description>Alternative 3 (chip-specific).</description>
57052                  <value>#011</value>
57053                </enumeratedValue>
57054                <enumeratedValue>
57055                  <name>100</name>
57056                  <description>Alternative 4 (chip-specific).</description>
57057                  <value>#100</value>
57058                </enumeratedValue>
57059                <enumeratedValue>
57060                  <name>101</name>
57061                  <description>Alternative 5 (chip-specific).</description>
57062                  <value>#101</value>
57063                </enumeratedValue>
57064                <enumeratedValue>
57065                  <name>110</name>
57066                  <description>Alternative 6 (chip-specific).</description>
57067                  <value>#110</value>
57068                </enumeratedValue>
57069                <enumeratedValue>
57070                  <name>111</name>
57071                  <description>Alternative 7 (chip-specific).</description>
57072                  <value>#111</value>
57073                </enumeratedValue>
57074              </enumeratedValues>
57075            </field>
57076            <field>
57077              <name>LK</name>
57078              <description>Lock Register</description>
57079              <bitOffset>15</bitOffset>
57080              <bitWidth>1</bitWidth>
57081              <access>read-write</access>
57082              <enumeratedValues>
57083                <enumeratedValue>
57084                  <name>0</name>
57085                  <description>Pin Control Register fields [15:0] are not locked.</description>
57086                  <value>#0</value>
57087                </enumeratedValue>
57088                <enumeratedValue>
57089                  <name>1</name>
57090                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
57091                  <value>#1</value>
57092                </enumeratedValue>
57093              </enumeratedValues>
57094            </field>
57095            <field>
57096              <name>IRQC</name>
57097              <description>Interrupt Configuration</description>
57098              <bitOffset>16</bitOffset>
57099              <bitWidth>4</bitWidth>
57100              <access>read-write</access>
57101              <enumeratedValues>
57102                <enumeratedValue>
57103                  <name>0000</name>
57104                  <description>Interrupt Status Flag (ISF) is disabled.</description>
57105                  <value>#0000</value>
57106                </enumeratedValue>
57107                <enumeratedValue>
57108                  <name>0001</name>
57109                  <description>ISF flag and DMA request on rising edge.</description>
57110                  <value>#0001</value>
57111                </enumeratedValue>
57112                <enumeratedValue>
57113                  <name>0010</name>
57114                  <description>ISF flag and DMA request on falling edge.</description>
57115                  <value>#0010</value>
57116                </enumeratedValue>
57117                <enumeratedValue>
57118                  <name>0011</name>
57119                  <description>ISF flag and DMA request on either edge.</description>
57120                  <value>#0011</value>
57121                </enumeratedValue>
57122                <enumeratedValue>
57123                  <name>1000</name>
57124                  <description>ISF flag and Interrupt when logic 0.</description>
57125                  <value>#1000</value>
57126                </enumeratedValue>
57127                <enumeratedValue>
57128                  <name>1001</name>
57129                  <description>ISF flag and Interrupt on rising-edge.</description>
57130                  <value>#1001</value>
57131                </enumeratedValue>
57132                <enumeratedValue>
57133                  <name>1010</name>
57134                  <description>ISF flag and Interrupt on falling-edge.</description>
57135                  <value>#1010</value>
57136                </enumeratedValue>
57137                <enumeratedValue>
57138                  <name>1011</name>
57139                  <description>ISF flag and Interrupt on either edge.</description>
57140                  <value>#1011</value>
57141                </enumeratedValue>
57142                <enumeratedValue>
57143                  <name>1100</name>
57144                  <description>ISF flag and Interrupt when logic 1.</description>
57145                  <value>#1100</value>
57146                </enumeratedValue>
57147              </enumeratedValues>
57148            </field>
57149            <field>
57150              <name>ISF</name>
57151              <description>Interrupt Status Flag</description>
57152              <bitOffset>24</bitOffset>
57153              <bitWidth>1</bitWidth>
57154              <access>read-write</access>
57155              <enumeratedValues>
57156                <enumeratedValue>
57157                  <name>0</name>
57158                  <description>Configured interrupt is not detected.</description>
57159                  <value>#0</value>
57160                </enumeratedValue>
57161                <enumeratedValue>
57162                  <name>1</name>
57163                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
57164                  <value>#1</value>
57165                </enumeratedValue>
57166              </enumeratedValues>
57167            </field>
57168          </fields>
57169        </register>
57170        <register>
57171          <name>PCR1</name>
57172          <description>Pin Control Register n</description>
57173          <addressOffset>0x4</addressOffset>
57174          <size>32</size>
57175          <access>read-write</access>
57176          <resetValue>0x703</resetValue>
57177          <resetMask>0xFFFFFFFF</resetMask>
57178          <fields>
57179            <field>
57180              <name>PS</name>
57181              <description>Pull Select</description>
57182              <bitOffset>0</bitOffset>
57183              <bitWidth>1</bitWidth>
57184              <access>read-write</access>
57185              <enumeratedValues>
57186                <enumeratedValue>
57187                  <name>0</name>
57188                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
57189                  <value>#0</value>
57190                </enumeratedValue>
57191                <enumeratedValue>
57192                  <name>1</name>
57193                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
57194                  <value>#1</value>
57195                </enumeratedValue>
57196              </enumeratedValues>
57197            </field>
57198            <field>
57199              <name>PE</name>
57200              <description>Pull Enable</description>
57201              <bitOffset>1</bitOffset>
57202              <bitWidth>1</bitWidth>
57203              <access>read-write</access>
57204              <enumeratedValues>
57205                <enumeratedValue>
57206                  <name>0</name>
57207                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
57208                  <value>#0</value>
57209                </enumeratedValue>
57210                <enumeratedValue>
57211                  <name>1</name>
57212                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
57213                  <value>#1</value>
57214                </enumeratedValue>
57215              </enumeratedValues>
57216            </field>
57217            <field>
57218              <name>SRE</name>
57219              <description>Slew Rate Enable</description>
57220              <bitOffset>2</bitOffset>
57221              <bitWidth>1</bitWidth>
57222              <access>read-write</access>
57223              <enumeratedValues>
57224                <enumeratedValue>
57225                  <name>0</name>
57226                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
57227                  <value>#0</value>
57228                </enumeratedValue>
57229                <enumeratedValue>
57230                  <name>1</name>
57231                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
57232                  <value>#1</value>
57233                </enumeratedValue>
57234              </enumeratedValues>
57235            </field>
57236            <field>
57237              <name>PFE</name>
57238              <description>Passive Filter Enable</description>
57239              <bitOffset>4</bitOffset>
57240              <bitWidth>1</bitWidth>
57241              <access>read-only</access>
57242              <enumeratedValues>
57243                <enumeratedValue>
57244                  <name>0</name>
57245                  <description>Passive input filter is disabled on the corresponding pin.</description>
57246                  <value>#0</value>
57247                </enumeratedValue>
57248                <enumeratedValue>
57249                  <name>1</name>
57250                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
57251                  <value>#1</value>
57252                </enumeratedValue>
57253              </enumeratedValues>
57254            </field>
57255            <field>
57256              <name>ODE</name>
57257              <description>Open Drain Enable</description>
57258              <bitOffset>5</bitOffset>
57259              <bitWidth>1</bitWidth>
57260              <access>read-write</access>
57261              <enumeratedValues>
57262                <enumeratedValue>
57263                  <name>0</name>
57264                  <description>Open drain output is disabled on the corresponding pin.</description>
57265                  <value>#0</value>
57266                </enumeratedValue>
57267                <enumeratedValue>
57268                  <name>1</name>
57269                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
57270                  <value>#1</value>
57271                </enumeratedValue>
57272              </enumeratedValues>
57273            </field>
57274            <field>
57275              <name>DSE</name>
57276              <description>Drive Strength Enable</description>
57277              <bitOffset>6</bitOffset>
57278              <bitWidth>1</bitWidth>
57279              <access>read-only</access>
57280              <enumeratedValues>
57281                <enumeratedValue>
57282                  <name>0</name>
57283                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
57284                  <value>#0</value>
57285                </enumeratedValue>
57286                <enumeratedValue>
57287                  <name>1</name>
57288                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
57289                  <value>#1</value>
57290                </enumeratedValue>
57291              </enumeratedValues>
57292            </field>
57293            <field>
57294              <name>MUX</name>
57295              <description>Pin Mux Control</description>
57296              <bitOffset>8</bitOffset>
57297              <bitWidth>3</bitWidth>
57298              <access>read-write</access>
57299              <enumeratedValues>
57300                <enumeratedValue>
57301                  <name>000</name>
57302                  <description>Pin disabled (Alternative 0) (analog).</description>
57303                  <value>#000</value>
57304                </enumeratedValue>
57305                <enumeratedValue>
57306                  <name>001</name>
57307                  <description>Alternative 1 (GPIO).</description>
57308                  <value>#001</value>
57309                </enumeratedValue>
57310                <enumeratedValue>
57311                  <name>010</name>
57312                  <description>Alternative 2 (chip-specific).</description>
57313                  <value>#010</value>
57314                </enumeratedValue>
57315                <enumeratedValue>
57316                  <name>011</name>
57317                  <description>Alternative 3 (chip-specific).</description>
57318                  <value>#011</value>
57319                </enumeratedValue>
57320                <enumeratedValue>
57321                  <name>100</name>
57322                  <description>Alternative 4 (chip-specific).</description>
57323                  <value>#100</value>
57324                </enumeratedValue>
57325                <enumeratedValue>
57326                  <name>101</name>
57327                  <description>Alternative 5 (chip-specific).</description>
57328                  <value>#101</value>
57329                </enumeratedValue>
57330                <enumeratedValue>
57331                  <name>110</name>
57332                  <description>Alternative 6 (chip-specific).</description>
57333                  <value>#110</value>
57334                </enumeratedValue>
57335                <enumeratedValue>
57336                  <name>111</name>
57337                  <description>Alternative 7 (chip-specific).</description>
57338                  <value>#111</value>
57339                </enumeratedValue>
57340              </enumeratedValues>
57341            </field>
57342            <field>
57343              <name>LK</name>
57344              <description>Lock Register</description>
57345              <bitOffset>15</bitOffset>
57346              <bitWidth>1</bitWidth>
57347              <access>read-write</access>
57348              <enumeratedValues>
57349                <enumeratedValue>
57350                  <name>0</name>
57351                  <description>Pin Control Register fields [15:0] are not locked.</description>
57352                  <value>#0</value>
57353                </enumeratedValue>
57354                <enumeratedValue>
57355                  <name>1</name>
57356                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
57357                  <value>#1</value>
57358                </enumeratedValue>
57359              </enumeratedValues>
57360            </field>
57361            <field>
57362              <name>IRQC</name>
57363              <description>Interrupt Configuration</description>
57364              <bitOffset>16</bitOffset>
57365              <bitWidth>4</bitWidth>
57366              <access>read-write</access>
57367              <enumeratedValues>
57368                <enumeratedValue>
57369                  <name>0000</name>
57370                  <description>Interrupt Status Flag (ISF) is disabled.</description>
57371                  <value>#0000</value>
57372                </enumeratedValue>
57373                <enumeratedValue>
57374                  <name>0001</name>
57375                  <description>ISF flag and DMA request on rising edge.</description>
57376                  <value>#0001</value>
57377                </enumeratedValue>
57378                <enumeratedValue>
57379                  <name>0010</name>
57380                  <description>ISF flag and DMA request on falling edge.</description>
57381                  <value>#0010</value>
57382                </enumeratedValue>
57383                <enumeratedValue>
57384                  <name>0011</name>
57385                  <description>ISF flag and DMA request on either edge.</description>
57386                  <value>#0011</value>
57387                </enumeratedValue>
57388                <enumeratedValue>
57389                  <name>1000</name>
57390                  <description>ISF flag and Interrupt when logic 0.</description>
57391                  <value>#1000</value>
57392                </enumeratedValue>
57393                <enumeratedValue>
57394                  <name>1001</name>
57395                  <description>ISF flag and Interrupt on rising-edge.</description>
57396                  <value>#1001</value>
57397                </enumeratedValue>
57398                <enumeratedValue>
57399                  <name>1010</name>
57400                  <description>ISF flag and Interrupt on falling-edge.</description>
57401                  <value>#1010</value>
57402                </enumeratedValue>
57403                <enumeratedValue>
57404                  <name>1011</name>
57405                  <description>ISF flag and Interrupt on either edge.</description>
57406                  <value>#1011</value>
57407                </enumeratedValue>
57408                <enumeratedValue>
57409                  <name>1100</name>
57410                  <description>ISF flag and Interrupt when logic 1.</description>
57411                  <value>#1100</value>
57412                </enumeratedValue>
57413              </enumeratedValues>
57414            </field>
57415            <field>
57416              <name>ISF</name>
57417              <description>Interrupt Status Flag</description>
57418              <bitOffset>24</bitOffset>
57419              <bitWidth>1</bitWidth>
57420              <access>read-write</access>
57421              <enumeratedValues>
57422                <enumeratedValue>
57423                  <name>0</name>
57424                  <description>Configured interrupt is not detected.</description>
57425                  <value>#0</value>
57426                </enumeratedValue>
57427                <enumeratedValue>
57428                  <name>1</name>
57429                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
57430                  <value>#1</value>
57431                </enumeratedValue>
57432              </enumeratedValues>
57433            </field>
57434          </fields>
57435        </register>
57436        <register>
57437          <name>PCR2</name>
57438          <description>Pin Control Register n</description>
57439          <addressOffset>0x8</addressOffset>
57440          <size>32</size>
57441          <access>read-write</access>
57442          <resetValue>0x703</resetValue>
57443          <resetMask>0xFFFFFFFF</resetMask>
57444          <fields>
57445            <field>
57446              <name>PS</name>
57447              <description>Pull Select</description>
57448              <bitOffset>0</bitOffset>
57449              <bitWidth>1</bitWidth>
57450              <access>read-write</access>
57451              <enumeratedValues>
57452                <enumeratedValue>
57453                  <name>0</name>
57454                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
57455                  <value>#0</value>
57456                </enumeratedValue>
57457                <enumeratedValue>
57458                  <name>1</name>
57459                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
57460                  <value>#1</value>
57461                </enumeratedValue>
57462              </enumeratedValues>
57463            </field>
57464            <field>
57465              <name>PE</name>
57466              <description>Pull Enable</description>
57467              <bitOffset>1</bitOffset>
57468              <bitWidth>1</bitWidth>
57469              <access>read-write</access>
57470              <enumeratedValues>
57471                <enumeratedValue>
57472                  <name>0</name>
57473                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
57474                  <value>#0</value>
57475                </enumeratedValue>
57476                <enumeratedValue>
57477                  <name>1</name>
57478                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
57479                  <value>#1</value>
57480                </enumeratedValue>
57481              </enumeratedValues>
57482            </field>
57483            <field>
57484              <name>SRE</name>
57485              <description>Slew Rate Enable</description>
57486              <bitOffset>2</bitOffset>
57487              <bitWidth>1</bitWidth>
57488              <access>read-write</access>
57489              <enumeratedValues>
57490                <enumeratedValue>
57491                  <name>0</name>
57492                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
57493                  <value>#0</value>
57494                </enumeratedValue>
57495                <enumeratedValue>
57496                  <name>1</name>
57497                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
57498                  <value>#1</value>
57499                </enumeratedValue>
57500              </enumeratedValues>
57501            </field>
57502            <field>
57503              <name>PFE</name>
57504              <description>Passive Filter Enable</description>
57505              <bitOffset>4</bitOffset>
57506              <bitWidth>1</bitWidth>
57507              <access>read-only</access>
57508              <enumeratedValues>
57509                <enumeratedValue>
57510                  <name>0</name>
57511                  <description>Passive input filter is disabled on the corresponding pin.</description>
57512                  <value>#0</value>
57513                </enumeratedValue>
57514                <enumeratedValue>
57515                  <name>1</name>
57516                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
57517                  <value>#1</value>
57518                </enumeratedValue>
57519              </enumeratedValues>
57520            </field>
57521            <field>
57522              <name>ODE</name>
57523              <description>Open Drain Enable</description>
57524              <bitOffset>5</bitOffset>
57525              <bitWidth>1</bitWidth>
57526              <access>read-write</access>
57527              <enumeratedValues>
57528                <enumeratedValue>
57529                  <name>0</name>
57530                  <description>Open drain output is disabled on the corresponding pin.</description>
57531                  <value>#0</value>
57532                </enumeratedValue>
57533                <enumeratedValue>
57534                  <name>1</name>
57535                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
57536                  <value>#1</value>
57537                </enumeratedValue>
57538              </enumeratedValues>
57539            </field>
57540            <field>
57541              <name>DSE</name>
57542              <description>Drive Strength Enable</description>
57543              <bitOffset>6</bitOffset>
57544              <bitWidth>1</bitWidth>
57545              <access>read-only</access>
57546              <enumeratedValues>
57547                <enumeratedValue>
57548                  <name>0</name>
57549                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
57550                  <value>#0</value>
57551                </enumeratedValue>
57552                <enumeratedValue>
57553                  <name>1</name>
57554                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
57555                  <value>#1</value>
57556                </enumeratedValue>
57557              </enumeratedValues>
57558            </field>
57559            <field>
57560              <name>MUX</name>
57561              <description>Pin Mux Control</description>
57562              <bitOffset>8</bitOffset>
57563              <bitWidth>3</bitWidth>
57564              <access>read-write</access>
57565              <enumeratedValues>
57566                <enumeratedValue>
57567                  <name>000</name>
57568                  <description>Pin disabled (Alternative 0) (analog).</description>
57569                  <value>#000</value>
57570                </enumeratedValue>
57571                <enumeratedValue>
57572                  <name>001</name>
57573                  <description>Alternative 1 (GPIO).</description>
57574                  <value>#001</value>
57575                </enumeratedValue>
57576                <enumeratedValue>
57577                  <name>010</name>
57578                  <description>Alternative 2 (chip-specific).</description>
57579                  <value>#010</value>
57580                </enumeratedValue>
57581                <enumeratedValue>
57582                  <name>011</name>
57583                  <description>Alternative 3 (chip-specific).</description>
57584                  <value>#011</value>
57585                </enumeratedValue>
57586                <enumeratedValue>
57587                  <name>100</name>
57588                  <description>Alternative 4 (chip-specific).</description>
57589                  <value>#100</value>
57590                </enumeratedValue>
57591                <enumeratedValue>
57592                  <name>101</name>
57593                  <description>Alternative 5 (chip-specific).</description>
57594                  <value>#101</value>
57595                </enumeratedValue>
57596                <enumeratedValue>
57597                  <name>110</name>
57598                  <description>Alternative 6 (chip-specific).</description>
57599                  <value>#110</value>
57600                </enumeratedValue>
57601                <enumeratedValue>
57602                  <name>111</name>
57603                  <description>Alternative 7 (chip-specific).</description>
57604                  <value>#111</value>
57605                </enumeratedValue>
57606              </enumeratedValues>
57607            </field>
57608            <field>
57609              <name>LK</name>
57610              <description>Lock Register</description>
57611              <bitOffset>15</bitOffset>
57612              <bitWidth>1</bitWidth>
57613              <access>read-write</access>
57614              <enumeratedValues>
57615                <enumeratedValue>
57616                  <name>0</name>
57617                  <description>Pin Control Register fields [15:0] are not locked.</description>
57618                  <value>#0</value>
57619                </enumeratedValue>
57620                <enumeratedValue>
57621                  <name>1</name>
57622                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
57623                  <value>#1</value>
57624                </enumeratedValue>
57625              </enumeratedValues>
57626            </field>
57627            <field>
57628              <name>IRQC</name>
57629              <description>Interrupt Configuration</description>
57630              <bitOffset>16</bitOffset>
57631              <bitWidth>4</bitWidth>
57632              <access>read-write</access>
57633              <enumeratedValues>
57634                <enumeratedValue>
57635                  <name>0000</name>
57636                  <description>Interrupt Status Flag (ISF) is disabled.</description>
57637                  <value>#0000</value>
57638                </enumeratedValue>
57639                <enumeratedValue>
57640                  <name>0001</name>
57641                  <description>ISF flag and DMA request on rising edge.</description>
57642                  <value>#0001</value>
57643                </enumeratedValue>
57644                <enumeratedValue>
57645                  <name>0010</name>
57646                  <description>ISF flag and DMA request on falling edge.</description>
57647                  <value>#0010</value>
57648                </enumeratedValue>
57649                <enumeratedValue>
57650                  <name>0011</name>
57651                  <description>ISF flag and DMA request on either edge.</description>
57652                  <value>#0011</value>
57653                </enumeratedValue>
57654                <enumeratedValue>
57655                  <name>1000</name>
57656                  <description>ISF flag and Interrupt when logic 0.</description>
57657                  <value>#1000</value>
57658                </enumeratedValue>
57659                <enumeratedValue>
57660                  <name>1001</name>
57661                  <description>ISF flag and Interrupt on rising-edge.</description>
57662                  <value>#1001</value>
57663                </enumeratedValue>
57664                <enumeratedValue>
57665                  <name>1010</name>
57666                  <description>ISF flag and Interrupt on falling-edge.</description>
57667                  <value>#1010</value>
57668                </enumeratedValue>
57669                <enumeratedValue>
57670                  <name>1011</name>
57671                  <description>ISF flag and Interrupt on either edge.</description>
57672                  <value>#1011</value>
57673                </enumeratedValue>
57674                <enumeratedValue>
57675                  <name>1100</name>
57676                  <description>ISF flag and Interrupt when logic 1.</description>
57677                  <value>#1100</value>
57678                </enumeratedValue>
57679              </enumeratedValues>
57680            </field>
57681            <field>
57682              <name>ISF</name>
57683              <description>Interrupt Status Flag</description>
57684              <bitOffset>24</bitOffset>
57685              <bitWidth>1</bitWidth>
57686              <access>read-write</access>
57687              <enumeratedValues>
57688                <enumeratedValue>
57689                  <name>0</name>
57690                  <description>Configured interrupt is not detected.</description>
57691                  <value>#0</value>
57692                </enumeratedValue>
57693                <enumeratedValue>
57694                  <name>1</name>
57695                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
57696                  <value>#1</value>
57697                </enumeratedValue>
57698              </enumeratedValues>
57699            </field>
57700          </fields>
57701        </register>
57702        <register>
57703          <name>PCR3</name>
57704          <description>Pin Control Register n</description>
57705          <addressOffset>0xC</addressOffset>
57706          <size>32</size>
57707          <access>read-write</access>
57708          <resetValue>0x703</resetValue>
57709          <resetMask>0xFFFFFFFF</resetMask>
57710          <fields>
57711            <field>
57712              <name>PS</name>
57713              <description>Pull Select</description>
57714              <bitOffset>0</bitOffset>
57715              <bitWidth>1</bitWidth>
57716              <access>read-write</access>
57717              <enumeratedValues>
57718                <enumeratedValue>
57719                  <name>0</name>
57720                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
57721                  <value>#0</value>
57722                </enumeratedValue>
57723                <enumeratedValue>
57724                  <name>1</name>
57725                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
57726                  <value>#1</value>
57727                </enumeratedValue>
57728              </enumeratedValues>
57729            </field>
57730            <field>
57731              <name>PE</name>
57732              <description>Pull Enable</description>
57733              <bitOffset>1</bitOffset>
57734              <bitWidth>1</bitWidth>
57735              <access>read-write</access>
57736              <enumeratedValues>
57737                <enumeratedValue>
57738                  <name>0</name>
57739                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
57740                  <value>#0</value>
57741                </enumeratedValue>
57742                <enumeratedValue>
57743                  <name>1</name>
57744                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
57745                  <value>#1</value>
57746                </enumeratedValue>
57747              </enumeratedValues>
57748            </field>
57749            <field>
57750              <name>SRE</name>
57751              <description>Slew Rate Enable</description>
57752              <bitOffset>2</bitOffset>
57753              <bitWidth>1</bitWidth>
57754              <access>read-write</access>
57755              <enumeratedValues>
57756                <enumeratedValue>
57757                  <name>0</name>
57758                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
57759                  <value>#0</value>
57760                </enumeratedValue>
57761                <enumeratedValue>
57762                  <name>1</name>
57763                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
57764                  <value>#1</value>
57765                </enumeratedValue>
57766              </enumeratedValues>
57767            </field>
57768            <field>
57769              <name>PFE</name>
57770              <description>Passive Filter Enable</description>
57771              <bitOffset>4</bitOffset>
57772              <bitWidth>1</bitWidth>
57773              <access>read-only</access>
57774              <enumeratedValues>
57775                <enumeratedValue>
57776                  <name>0</name>
57777                  <description>Passive input filter is disabled on the corresponding pin.</description>
57778                  <value>#0</value>
57779                </enumeratedValue>
57780                <enumeratedValue>
57781                  <name>1</name>
57782                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
57783                  <value>#1</value>
57784                </enumeratedValue>
57785              </enumeratedValues>
57786            </field>
57787            <field>
57788              <name>ODE</name>
57789              <description>Open Drain Enable</description>
57790              <bitOffset>5</bitOffset>
57791              <bitWidth>1</bitWidth>
57792              <access>read-write</access>
57793              <enumeratedValues>
57794                <enumeratedValue>
57795                  <name>0</name>
57796                  <description>Open drain output is disabled on the corresponding pin.</description>
57797                  <value>#0</value>
57798                </enumeratedValue>
57799                <enumeratedValue>
57800                  <name>1</name>
57801                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
57802                  <value>#1</value>
57803                </enumeratedValue>
57804              </enumeratedValues>
57805            </field>
57806            <field>
57807              <name>DSE</name>
57808              <description>Drive Strength Enable</description>
57809              <bitOffset>6</bitOffset>
57810              <bitWidth>1</bitWidth>
57811              <access>read-only</access>
57812              <enumeratedValues>
57813                <enumeratedValue>
57814                  <name>0</name>
57815                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
57816                  <value>#0</value>
57817                </enumeratedValue>
57818                <enumeratedValue>
57819                  <name>1</name>
57820                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
57821                  <value>#1</value>
57822                </enumeratedValue>
57823              </enumeratedValues>
57824            </field>
57825            <field>
57826              <name>MUX</name>
57827              <description>Pin Mux Control</description>
57828              <bitOffset>8</bitOffset>
57829              <bitWidth>3</bitWidth>
57830              <access>read-write</access>
57831              <enumeratedValues>
57832                <enumeratedValue>
57833                  <name>000</name>
57834                  <description>Pin disabled (Alternative 0) (analog).</description>
57835                  <value>#000</value>
57836                </enumeratedValue>
57837                <enumeratedValue>
57838                  <name>001</name>
57839                  <description>Alternative 1 (GPIO).</description>
57840                  <value>#001</value>
57841                </enumeratedValue>
57842                <enumeratedValue>
57843                  <name>010</name>
57844                  <description>Alternative 2 (chip-specific).</description>
57845                  <value>#010</value>
57846                </enumeratedValue>
57847                <enumeratedValue>
57848                  <name>011</name>
57849                  <description>Alternative 3 (chip-specific).</description>
57850                  <value>#011</value>
57851                </enumeratedValue>
57852                <enumeratedValue>
57853                  <name>100</name>
57854                  <description>Alternative 4 (chip-specific).</description>
57855                  <value>#100</value>
57856                </enumeratedValue>
57857                <enumeratedValue>
57858                  <name>101</name>
57859                  <description>Alternative 5 (chip-specific).</description>
57860                  <value>#101</value>
57861                </enumeratedValue>
57862                <enumeratedValue>
57863                  <name>110</name>
57864                  <description>Alternative 6 (chip-specific).</description>
57865                  <value>#110</value>
57866                </enumeratedValue>
57867                <enumeratedValue>
57868                  <name>111</name>
57869                  <description>Alternative 7 (chip-specific).</description>
57870                  <value>#111</value>
57871                </enumeratedValue>
57872              </enumeratedValues>
57873            </field>
57874            <field>
57875              <name>LK</name>
57876              <description>Lock Register</description>
57877              <bitOffset>15</bitOffset>
57878              <bitWidth>1</bitWidth>
57879              <access>read-write</access>
57880              <enumeratedValues>
57881                <enumeratedValue>
57882                  <name>0</name>
57883                  <description>Pin Control Register fields [15:0] are not locked.</description>
57884                  <value>#0</value>
57885                </enumeratedValue>
57886                <enumeratedValue>
57887                  <name>1</name>
57888                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
57889                  <value>#1</value>
57890                </enumeratedValue>
57891              </enumeratedValues>
57892            </field>
57893            <field>
57894              <name>IRQC</name>
57895              <description>Interrupt Configuration</description>
57896              <bitOffset>16</bitOffset>
57897              <bitWidth>4</bitWidth>
57898              <access>read-write</access>
57899              <enumeratedValues>
57900                <enumeratedValue>
57901                  <name>0000</name>
57902                  <description>Interrupt Status Flag (ISF) is disabled.</description>
57903                  <value>#0000</value>
57904                </enumeratedValue>
57905                <enumeratedValue>
57906                  <name>0001</name>
57907                  <description>ISF flag and DMA request on rising edge.</description>
57908                  <value>#0001</value>
57909                </enumeratedValue>
57910                <enumeratedValue>
57911                  <name>0010</name>
57912                  <description>ISF flag and DMA request on falling edge.</description>
57913                  <value>#0010</value>
57914                </enumeratedValue>
57915                <enumeratedValue>
57916                  <name>0011</name>
57917                  <description>ISF flag and DMA request on either edge.</description>
57918                  <value>#0011</value>
57919                </enumeratedValue>
57920                <enumeratedValue>
57921                  <name>1000</name>
57922                  <description>ISF flag and Interrupt when logic 0.</description>
57923                  <value>#1000</value>
57924                </enumeratedValue>
57925                <enumeratedValue>
57926                  <name>1001</name>
57927                  <description>ISF flag and Interrupt on rising-edge.</description>
57928                  <value>#1001</value>
57929                </enumeratedValue>
57930                <enumeratedValue>
57931                  <name>1010</name>
57932                  <description>ISF flag and Interrupt on falling-edge.</description>
57933                  <value>#1010</value>
57934                </enumeratedValue>
57935                <enumeratedValue>
57936                  <name>1011</name>
57937                  <description>ISF flag and Interrupt on either edge.</description>
57938                  <value>#1011</value>
57939                </enumeratedValue>
57940                <enumeratedValue>
57941                  <name>1100</name>
57942                  <description>ISF flag and Interrupt when logic 1.</description>
57943                  <value>#1100</value>
57944                </enumeratedValue>
57945              </enumeratedValues>
57946            </field>
57947            <field>
57948              <name>ISF</name>
57949              <description>Interrupt Status Flag</description>
57950              <bitOffset>24</bitOffset>
57951              <bitWidth>1</bitWidth>
57952              <access>read-write</access>
57953              <enumeratedValues>
57954                <enumeratedValue>
57955                  <name>0</name>
57956                  <description>Configured interrupt is not detected.</description>
57957                  <value>#0</value>
57958                </enumeratedValue>
57959                <enumeratedValue>
57960                  <name>1</name>
57961                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
57962                  <value>#1</value>
57963                </enumeratedValue>
57964              </enumeratedValues>
57965            </field>
57966          </fields>
57967        </register>
57968        <register>
57969          <name>PCR4</name>
57970          <description>Pin Control Register n</description>
57971          <addressOffset>0x10</addressOffset>
57972          <size>32</size>
57973          <access>read-write</access>
57974          <resetValue>0x703</resetValue>
57975          <resetMask>0xFFFFFFFF</resetMask>
57976          <fields>
57977            <field>
57978              <name>PS</name>
57979              <description>Pull Select</description>
57980              <bitOffset>0</bitOffset>
57981              <bitWidth>1</bitWidth>
57982              <access>read-write</access>
57983              <enumeratedValues>
57984                <enumeratedValue>
57985                  <name>0</name>
57986                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
57987                  <value>#0</value>
57988                </enumeratedValue>
57989                <enumeratedValue>
57990                  <name>1</name>
57991                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
57992                  <value>#1</value>
57993                </enumeratedValue>
57994              </enumeratedValues>
57995            </field>
57996            <field>
57997              <name>PE</name>
57998              <description>Pull Enable</description>
57999              <bitOffset>1</bitOffset>
58000              <bitWidth>1</bitWidth>
58001              <access>read-write</access>
58002              <enumeratedValues>
58003                <enumeratedValue>
58004                  <name>0</name>
58005                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
58006                  <value>#0</value>
58007                </enumeratedValue>
58008                <enumeratedValue>
58009                  <name>1</name>
58010                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
58011                  <value>#1</value>
58012                </enumeratedValue>
58013              </enumeratedValues>
58014            </field>
58015            <field>
58016              <name>SRE</name>
58017              <description>Slew Rate Enable</description>
58018              <bitOffset>2</bitOffset>
58019              <bitWidth>1</bitWidth>
58020              <access>read-write</access>
58021              <enumeratedValues>
58022                <enumeratedValue>
58023                  <name>0</name>
58024                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
58025                  <value>#0</value>
58026                </enumeratedValue>
58027                <enumeratedValue>
58028                  <name>1</name>
58029                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
58030                  <value>#1</value>
58031                </enumeratedValue>
58032              </enumeratedValues>
58033            </field>
58034            <field>
58035              <name>PFE</name>
58036              <description>Passive Filter Enable</description>
58037              <bitOffset>4</bitOffset>
58038              <bitWidth>1</bitWidth>
58039              <access>read-write</access>
58040              <enumeratedValues>
58041                <enumeratedValue>
58042                  <name>0</name>
58043                  <description>Passive input filter is disabled on the corresponding pin.</description>
58044                  <value>#0</value>
58045                </enumeratedValue>
58046                <enumeratedValue>
58047                  <name>1</name>
58048                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
58049                  <value>#1</value>
58050                </enumeratedValue>
58051              </enumeratedValues>
58052            </field>
58053            <field>
58054              <name>ODE</name>
58055              <description>Open Drain Enable</description>
58056              <bitOffset>5</bitOffset>
58057              <bitWidth>1</bitWidth>
58058              <access>read-write</access>
58059              <enumeratedValues>
58060                <enumeratedValue>
58061                  <name>0</name>
58062                  <description>Open drain output is disabled on the corresponding pin.</description>
58063                  <value>#0</value>
58064                </enumeratedValue>
58065                <enumeratedValue>
58066                  <name>1</name>
58067                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
58068                  <value>#1</value>
58069                </enumeratedValue>
58070              </enumeratedValues>
58071            </field>
58072            <field>
58073              <name>DSE</name>
58074              <description>Drive Strength Enable</description>
58075              <bitOffset>6</bitOffset>
58076              <bitWidth>1</bitWidth>
58077              <access>read-only</access>
58078              <enumeratedValues>
58079                <enumeratedValue>
58080                  <name>0</name>
58081                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
58082                  <value>#0</value>
58083                </enumeratedValue>
58084                <enumeratedValue>
58085                  <name>1</name>
58086                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
58087                  <value>#1</value>
58088                </enumeratedValue>
58089              </enumeratedValues>
58090            </field>
58091            <field>
58092              <name>MUX</name>
58093              <description>Pin Mux Control</description>
58094              <bitOffset>8</bitOffset>
58095              <bitWidth>3</bitWidth>
58096              <access>read-write</access>
58097              <enumeratedValues>
58098                <enumeratedValue>
58099                  <name>000</name>
58100                  <description>Pin disabled (Alternative 0) (analog).</description>
58101                  <value>#000</value>
58102                </enumeratedValue>
58103                <enumeratedValue>
58104                  <name>001</name>
58105                  <description>Alternative 1 (GPIO).</description>
58106                  <value>#001</value>
58107                </enumeratedValue>
58108                <enumeratedValue>
58109                  <name>010</name>
58110                  <description>Alternative 2 (chip-specific).</description>
58111                  <value>#010</value>
58112                </enumeratedValue>
58113                <enumeratedValue>
58114                  <name>011</name>
58115                  <description>Alternative 3 (chip-specific).</description>
58116                  <value>#011</value>
58117                </enumeratedValue>
58118                <enumeratedValue>
58119                  <name>100</name>
58120                  <description>Alternative 4 (chip-specific).</description>
58121                  <value>#100</value>
58122                </enumeratedValue>
58123                <enumeratedValue>
58124                  <name>101</name>
58125                  <description>Alternative 5 (chip-specific).</description>
58126                  <value>#101</value>
58127                </enumeratedValue>
58128                <enumeratedValue>
58129                  <name>110</name>
58130                  <description>Alternative 6 (chip-specific).</description>
58131                  <value>#110</value>
58132                </enumeratedValue>
58133                <enumeratedValue>
58134                  <name>111</name>
58135                  <description>Alternative 7 (chip-specific).</description>
58136                  <value>#111</value>
58137                </enumeratedValue>
58138              </enumeratedValues>
58139            </field>
58140            <field>
58141              <name>LK</name>
58142              <description>Lock Register</description>
58143              <bitOffset>15</bitOffset>
58144              <bitWidth>1</bitWidth>
58145              <access>read-write</access>
58146              <enumeratedValues>
58147                <enumeratedValue>
58148                  <name>0</name>
58149                  <description>Pin Control Register fields [15:0] are not locked.</description>
58150                  <value>#0</value>
58151                </enumeratedValue>
58152                <enumeratedValue>
58153                  <name>1</name>
58154                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
58155                  <value>#1</value>
58156                </enumeratedValue>
58157              </enumeratedValues>
58158            </field>
58159            <field>
58160              <name>IRQC</name>
58161              <description>Interrupt Configuration</description>
58162              <bitOffset>16</bitOffset>
58163              <bitWidth>4</bitWidth>
58164              <access>read-write</access>
58165              <enumeratedValues>
58166                <enumeratedValue>
58167                  <name>0000</name>
58168                  <description>Interrupt Status Flag (ISF) is disabled.</description>
58169                  <value>#0000</value>
58170                </enumeratedValue>
58171                <enumeratedValue>
58172                  <name>0001</name>
58173                  <description>ISF flag and DMA request on rising edge.</description>
58174                  <value>#0001</value>
58175                </enumeratedValue>
58176                <enumeratedValue>
58177                  <name>0010</name>
58178                  <description>ISF flag and DMA request on falling edge.</description>
58179                  <value>#0010</value>
58180                </enumeratedValue>
58181                <enumeratedValue>
58182                  <name>0011</name>
58183                  <description>ISF flag and DMA request on either edge.</description>
58184                  <value>#0011</value>
58185                </enumeratedValue>
58186                <enumeratedValue>
58187                  <name>1000</name>
58188                  <description>ISF flag and Interrupt when logic 0.</description>
58189                  <value>#1000</value>
58190                </enumeratedValue>
58191                <enumeratedValue>
58192                  <name>1001</name>
58193                  <description>ISF flag and Interrupt on rising-edge.</description>
58194                  <value>#1001</value>
58195                </enumeratedValue>
58196                <enumeratedValue>
58197                  <name>1010</name>
58198                  <description>ISF flag and Interrupt on falling-edge.</description>
58199                  <value>#1010</value>
58200                </enumeratedValue>
58201                <enumeratedValue>
58202                  <name>1011</name>
58203                  <description>ISF flag and Interrupt on either edge.</description>
58204                  <value>#1011</value>
58205                </enumeratedValue>
58206                <enumeratedValue>
58207                  <name>1100</name>
58208                  <description>ISF flag and Interrupt when logic 1.</description>
58209                  <value>#1100</value>
58210                </enumeratedValue>
58211              </enumeratedValues>
58212            </field>
58213            <field>
58214              <name>ISF</name>
58215              <description>Interrupt Status Flag</description>
58216              <bitOffset>24</bitOffset>
58217              <bitWidth>1</bitWidth>
58218              <access>read-write</access>
58219              <enumeratedValues>
58220                <enumeratedValue>
58221                  <name>0</name>
58222                  <description>Configured interrupt is not detected.</description>
58223                  <value>#0</value>
58224                </enumeratedValue>
58225                <enumeratedValue>
58226                  <name>1</name>
58227                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
58228                  <value>#1</value>
58229                </enumeratedValue>
58230              </enumeratedValues>
58231            </field>
58232          </fields>
58233        </register>
58234        <register>
58235          <name>PCR5</name>
58236          <description>Pin Control Register n</description>
58237          <addressOffset>0x14</addressOffset>
58238          <size>32</size>
58239          <access>read-write</access>
58240          <resetValue>0x1</resetValue>
58241          <resetMask>0xFFFFFFFF</resetMask>
58242          <fields>
58243            <field>
58244              <name>PS</name>
58245              <description>Pull Select</description>
58246              <bitOffset>0</bitOffset>
58247              <bitWidth>1</bitWidth>
58248              <access>read-write</access>
58249              <enumeratedValues>
58250                <enumeratedValue>
58251                  <name>0</name>
58252                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
58253                  <value>#0</value>
58254                </enumeratedValue>
58255                <enumeratedValue>
58256                  <name>1</name>
58257                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
58258                  <value>#1</value>
58259                </enumeratedValue>
58260              </enumeratedValues>
58261            </field>
58262            <field>
58263              <name>PE</name>
58264              <description>Pull Enable</description>
58265              <bitOffset>1</bitOffset>
58266              <bitWidth>1</bitWidth>
58267              <access>read-write</access>
58268              <enumeratedValues>
58269                <enumeratedValue>
58270                  <name>0</name>
58271                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
58272                  <value>#0</value>
58273                </enumeratedValue>
58274                <enumeratedValue>
58275                  <name>1</name>
58276                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
58277                  <value>#1</value>
58278                </enumeratedValue>
58279              </enumeratedValues>
58280            </field>
58281            <field>
58282              <name>SRE</name>
58283              <description>Slew Rate Enable</description>
58284              <bitOffset>2</bitOffset>
58285              <bitWidth>1</bitWidth>
58286              <access>read-write</access>
58287              <enumeratedValues>
58288                <enumeratedValue>
58289                  <name>0</name>
58290                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
58291                  <value>#0</value>
58292                </enumeratedValue>
58293                <enumeratedValue>
58294                  <name>1</name>
58295                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
58296                  <value>#1</value>
58297                </enumeratedValue>
58298              </enumeratedValues>
58299            </field>
58300            <field>
58301              <name>PFE</name>
58302              <description>Passive Filter Enable</description>
58303              <bitOffset>4</bitOffset>
58304              <bitWidth>1</bitWidth>
58305              <access>read-only</access>
58306              <enumeratedValues>
58307                <enumeratedValue>
58308                  <name>0</name>
58309                  <description>Passive input filter is disabled on the corresponding pin.</description>
58310                  <value>#0</value>
58311                </enumeratedValue>
58312                <enumeratedValue>
58313                  <name>1</name>
58314                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
58315                  <value>#1</value>
58316                </enumeratedValue>
58317              </enumeratedValues>
58318            </field>
58319            <field>
58320              <name>ODE</name>
58321              <description>Open Drain Enable</description>
58322              <bitOffset>5</bitOffset>
58323              <bitWidth>1</bitWidth>
58324              <access>read-write</access>
58325              <enumeratedValues>
58326                <enumeratedValue>
58327                  <name>0</name>
58328                  <description>Open drain output is disabled on the corresponding pin.</description>
58329                  <value>#0</value>
58330                </enumeratedValue>
58331                <enumeratedValue>
58332                  <name>1</name>
58333                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
58334                  <value>#1</value>
58335                </enumeratedValue>
58336              </enumeratedValues>
58337            </field>
58338            <field>
58339              <name>DSE</name>
58340              <description>Drive Strength Enable</description>
58341              <bitOffset>6</bitOffset>
58342              <bitWidth>1</bitWidth>
58343              <access>read-only</access>
58344              <enumeratedValues>
58345                <enumeratedValue>
58346                  <name>0</name>
58347                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
58348                  <value>#0</value>
58349                </enumeratedValue>
58350                <enumeratedValue>
58351                  <name>1</name>
58352                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
58353                  <value>#1</value>
58354                </enumeratedValue>
58355              </enumeratedValues>
58356            </field>
58357            <field>
58358              <name>MUX</name>
58359              <description>Pin Mux Control</description>
58360              <bitOffset>8</bitOffset>
58361              <bitWidth>3</bitWidth>
58362              <access>read-write</access>
58363              <enumeratedValues>
58364                <enumeratedValue>
58365                  <name>000</name>
58366                  <description>Pin disabled (Alternative 0) (analog).</description>
58367                  <value>#000</value>
58368                </enumeratedValue>
58369                <enumeratedValue>
58370                  <name>001</name>
58371                  <description>Alternative 1 (GPIO).</description>
58372                  <value>#001</value>
58373                </enumeratedValue>
58374                <enumeratedValue>
58375                  <name>010</name>
58376                  <description>Alternative 2 (chip-specific).</description>
58377                  <value>#010</value>
58378                </enumeratedValue>
58379                <enumeratedValue>
58380                  <name>011</name>
58381                  <description>Alternative 3 (chip-specific).</description>
58382                  <value>#011</value>
58383                </enumeratedValue>
58384                <enumeratedValue>
58385                  <name>100</name>
58386                  <description>Alternative 4 (chip-specific).</description>
58387                  <value>#100</value>
58388                </enumeratedValue>
58389                <enumeratedValue>
58390                  <name>101</name>
58391                  <description>Alternative 5 (chip-specific).</description>
58392                  <value>#101</value>
58393                </enumeratedValue>
58394                <enumeratedValue>
58395                  <name>110</name>
58396                  <description>Alternative 6 (chip-specific).</description>
58397                  <value>#110</value>
58398                </enumeratedValue>
58399                <enumeratedValue>
58400                  <name>111</name>
58401                  <description>Alternative 7 (chip-specific).</description>
58402                  <value>#111</value>
58403                </enumeratedValue>
58404              </enumeratedValues>
58405            </field>
58406            <field>
58407              <name>LK</name>
58408              <description>Lock Register</description>
58409              <bitOffset>15</bitOffset>
58410              <bitWidth>1</bitWidth>
58411              <access>read-write</access>
58412              <enumeratedValues>
58413                <enumeratedValue>
58414                  <name>0</name>
58415                  <description>Pin Control Register fields [15:0] are not locked.</description>
58416                  <value>#0</value>
58417                </enumeratedValue>
58418                <enumeratedValue>
58419                  <name>1</name>
58420                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
58421                  <value>#1</value>
58422                </enumeratedValue>
58423              </enumeratedValues>
58424            </field>
58425            <field>
58426              <name>IRQC</name>
58427              <description>Interrupt Configuration</description>
58428              <bitOffset>16</bitOffset>
58429              <bitWidth>4</bitWidth>
58430              <access>read-write</access>
58431              <enumeratedValues>
58432                <enumeratedValue>
58433                  <name>0000</name>
58434                  <description>Interrupt Status Flag (ISF) is disabled.</description>
58435                  <value>#0000</value>
58436                </enumeratedValue>
58437                <enumeratedValue>
58438                  <name>0001</name>
58439                  <description>ISF flag and DMA request on rising edge.</description>
58440                  <value>#0001</value>
58441                </enumeratedValue>
58442                <enumeratedValue>
58443                  <name>0010</name>
58444                  <description>ISF flag and DMA request on falling edge.</description>
58445                  <value>#0010</value>
58446                </enumeratedValue>
58447                <enumeratedValue>
58448                  <name>0011</name>
58449                  <description>ISF flag and DMA request on either edge.</description>
58450                  <value>#0011</value>
58451                </enumeratedValue>
58452                <enumeratedValue>
58453                  <name>1000</name>
58454                  <description>ISF flag and Interrupt when logic 0.</description>
58455                  <value>#1000</value>
58456                </enumeratedValue>
58457                <enumeratedValue>
58458                  <name>1001</name>
58459                  <description>ISF flag and Interrupt on rising-edge.</description>
58460                  <value>#1001</value>
58461                </enumeratedValue>
58462                <enumeratedValue>
58463                  <name>1010</name>
58464                  <description>ISF flag and Interrupt on falling-edge.</description>
58465                  <value>#1010</value>
58466                </enumeratedValue>
58467                <enumeratedValue>
58468                  <name>1011</name>
58469                  <description>ISF flag and Interrupt on either edge.</description>
58470                  <value>#1011</value>
58471                </enumeratedValue>
58472                <enumeratedValue>
58473                  <name>1100</name>
58474                  <description>ISF flag and Interrupt when logic 1.</description>
58475                  <value>#1100</value>
58476                </enumeratedValue>
58477              </enumeratedValues>
58478            </field>
58479            <field>
58480              <name>ISF</name>
58481              <description>Interrupt Status Flag</description>
58482              <bitOffset>24</bitOffset>
58483              <bitWidth>1</bitWidth>
58484              <access>read-write</access>
58485              <enumeratedValues>
58486                <enumeratedValue>
58487                  <name>0</name>
58488                  <description>Configured interrupt is not detected.</description>
58489                  <value>#0</value>
58490                </enumeratedValue>
58491                <enumeratedValue>
58492                  <name>1</name>
58493                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
58494                  <value>#1</value>
58495                </enumeratedValue>
58496              </enumeratedValues>
58497            </field>
58498          </fields>
58499        </register>
58500        <register>
58501          <name>PCR6</name>
58502          <description>Pin Control Register n</description>
58503          <addressOffset>0x18</addressOffset>
58504          <size>32</size>
58505          <access>read-write</access>
58506          <resetValue>0</resetValue>
58507          <resetMask>0xFFFFFFFF</resetMask>
58508          <fields>
58509            <field>
58510              <name>PS</name>
58511              <description>Pull Select</description>
58512              <bitOffset>0</bitOffset>
58513              <bitWidth>1</bitWidth>
58514              <access>read-only</access>
58515              <enumeratedValues>
58516                <enumeratedValue>
58517                  <name>0</name>
58518                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
58519                  <value>#0</value>
58520                </enumeratedValue>
58521                <enumeratedValue>
58522                  <name>1</name>
58523                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
58524                  <value>#1</value>
58525                </enumeratedValue>
58526              </enumeratedValues>
58527            </field>
58528            <field>
58529              <name>PE</name>
58530              <description>Pull Enable</description>
58531              <bitOffset>1</bitOffset>
58532              <bitWidth>1</bitWidth>
58533              <access>read-only</access>
58534              <enumeratedValues>
58535                <enumeratedValue>
58536                  <name>0</name>
58537                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
58538                  <value>#0</value>
58539                </enumeratedValue>
58540                <enumeratedValue>
58541                  <name>1</name>
58542                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
58543                  <value>#1</value>
58544                </enumeratedValue>
58545              </enumeratedValues>
58546            </field>
58547            <field>
58548              <name>SRE</name>
58549              <description>Slew Rate Enable</description>
58550              <bitOffset>2</bitOffset>
58551              <bitWidth>1</bitWidth>
58552              <access>read-only</access>
58553              <enumeratedValues>
58554                <enumeratedValue>
58555                  <name>0</name>
58556                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
58557                  <value>#0</value>
58558                </enumeratedValue>
58559                <enumeratedValue>
58560                  <name>1</name>
58561                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
58562                  <value>#1</value>
58563                </enumeratedValue>
58564              </enumeratedValues>
58565            </field>
58566            <field>
58567              <name>PFE</name>
58568              <description>Passive Filter Enable</description>
58569              <bitOffset>4</bitOffset>
58570              <bitWidth>1</bitWidth>
58571              <access>read-only</access>
58572              <enumeratedValues>
58573                <enumeratedValue>
58574                  <name>0</name>
58575                  <description>Passive input filter is disabled on the corresponding pin.</description>
58576                  <value>#0</value>
58577                </enumeratedValue>
58578                <enumeratedValue>
58579                  <name>1</name>
58580                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
58581                  <value>#1</value>
58582                </enumeratedValue>
58583              </enumeratedValues>
58584            </field>
58585            <field>
58586              <name>ODE</name>
58587              <description>Open Drain Enable</description>
58588              <bitOffset>5</bitOffset>
58589              <bitWidth>1</bitWidth>
58590              <access>read-only</access>
58591              <enumeratedValues>
58592                <enumeratedValue>
58593                  <name>0</name>
58594                  <description>Open drain output is disabled on the corresponding pin.</description>
58595                  <value>#0</value>
58596                </enumeratedValue>
58597                <enumeratedValue>
58598                  <name>1</name>
58599                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
58600                  <value>#1</value>
58601                </enumeratedValue>
58602              </enumeratedValues>
58603            </field>
58604            <field>
58605              <name>DSE</name>
58606              <description>Drive Strength Enable</description>
58607              <bitOffset>6</bitOffset>
58608              <bitWidth>1</bitWidth>
58609              <access>read-only</access>
58610              <enumeratedValues>
58611                <enumeratedValue>
58612                  <name>0</name>
58613                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
58614                  <value>#0</value>
58615                </enumeratedValue>
58616                <enumeratedValue>
58617                  <name>1</name>
58618                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
58619                  <value>#1</value>
58620                </enumeratedValue>
58621              </enumeratedValues>
58622            </field>
58623            <field>
58624              <name>MUX</name>
58625              <description>Pin Mux Control</description>
58626              <bitOffset>8</bitOffset>
58627              <bitWidth>3</bitWidth>
58628              <access>read-write</access>
58629              <enumeratedValues>
58630                <enumeratedValue>
58631                  <name>000</name>
58632                  <description>Pin disabled (Alternative 0) (analog).</description>
58633                  <value>#000</value>
58634                </enumeratedValue>
58635                <enumeratedValue>
58636                  <name>001</name>
58637                  <description>Alternative 1 (GPIO).</description>
58638                  <value>#001</value>
58639                </enumeratedValue>
58640                <enumeratedValue>
58641                  <name>010</name>
58642                  <description>Alternative 2 (chip-specific).</description>
58643                  <value>#010</value>
58644                </enumeratedValue>
58645                <enumeratedValue>
58646                  <name>011</name>
58647                  <description>Alternative 3 (chip-specific).</description>
58648                  <value>#011</value>
58649                </enumeratedValue>
58650                <enumeratedValue>
58651                  <name>100</name>
58652                  <description>Alternative 4 (chip-specific).</description>
58653                  <value>#100</value>
58654                </enumeratedValue>
58655                <enumeratedValue>
58656                  <name>101</name>
58657                  <description>Alternative 5 (chip-specific).</description>
58658                  <value>#101</value>
58659                </enumeratedValue>
58660                <enumeratedValue>
58661                  <name>110</name>
58662                  <description>Alternative 6 (chip-specific).</description>
58663                  <value>#110</value>
58664                </enumeratedValue>
58665                <enumeratedValue>
58666                  <name>111</name>
58667                  <description>Alternative 7 (chip-specific).</description>
58668                  <value>#111</value>
58669                </enumeratedValue>
58670              </enumeratedValues>
58671            </field>
58672            <field>
58673              <name>LK</name>
58674              <description>Lock Register</description>
58675              <bitOffset>15</bitOffset>
58676              <bitWidth>1</bitWidth>
58677              <access>read-write</access>
58678              <enumeratedValues>
58679                <enumeratedValue>
58680                  <name>0</name>
58681                  <description>Pin Control Register fields [15:0] are not locked.</description>
58682                  <value>#0</value>
58683                </enumeratedValue>
58684                <enumeratedValue>
58685                  <name>1</name>
58686                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
58687                  <value>#1</value>
58688                </enumeratedValue>
58689              </enumeratedValues>
58690            </field>
58691            <field>
58692              <name>IRQC</name>
58693              <description>Interrupt Configuration</description>
58694              <bitOffset>16</bitOffset>
58695              <bitWidth>4</bitWidth>
58696              <access>read-write</access>
58697              <enumeratedValues>
58698                <enumeratedValue>
58699                  <name>0000</name>
58700                  <description>Interrupt Status Flag (ISF) is disabled.</description>
58701                  <value>#0000</value>
58702                </enumeratedValue>
58703                <enumeratedValue>
58704                  <name>0001</name>
58705                  <description>ISF flag and DMA request on rising edge.</description>
58706                  <value>#0001</value>
58707                </enumeratedValue>
58708                <enumeratedValue>
58709                  <name>0010</name>
58710                  <description>ISF flag and DMA request on falling edge.</description>
58711                  <value>#0010</value>
58712                </enumeratedValue>
58713                <enumeratedValue>
58714                  <name>0011</name>
58715                  <description>ISF flag and DMA request on either edge.</description>
58716                  <value>#0011</value>
58717                </enumeratedValue>
58718                <enumeratedValue>
58719                  <name>1000</name>
58720                  <description>ISF flag and Interrupt when logic 0.</description>
58721                  <value>#1000</value>
58722                </enumeratedValue>
58723                <enumeratedValue>
58724                  <name>1001</name>
58725                  <description>ISF flag and Interrupt on rising-edge.</description>
58726                  <value>#1001</value>
58727                </enumeratedValue>
58728                <enumeratedValue>
58729                  <name>1010</name>
58730                  <description>ISF flag and Interrupt on falling-edge.</description>
58731                  <value>#1010</value>
58732                </enumeratedValue>
58733                <enumeratedValue>
58734                  <name>1011</name>
58735                  <description>ISF flag and Interrupt on either edge.</description>
58736                  <value>#1011</value>
58737                </enumeratedValue>
58738                <enumeratedValue>
58739                  <name>1100</name>
58740                  <description>ISF flag and Interrupt when logic 1.</description>
58741                  <value>#1100</value>
58742                </enumeratedValue>
58743              </enumeratedValues>
58744            </field>
58745            <field>
58746              <name>ISF</name>
58747              <description>Interrupt Status Flag</description>
58748              <bitOffset>24</bitOffset>
58749              <bitWidth>1</bitWidth>
58750              <access>read-write</access>
58751              <enumeratedValues>
58752                <enumeratedValue>
58753                  <name>0</name>
58754                  <description>Configured interrupt is not detected.</description>
58755                  <value>#0</value>
58756                </enumeratedValue>
58757                <enumeratedValue>
58758                  <name>1</name>
58759                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
58760                  <value>#1</value>
58761                </enumeratedValue>
58762              </enumeratedValues>
58763            </field>
58764          </fields>
58765        </register>
58766        <register>
58767          <name>PCR7</name>
58768          <description>Pin Control Register n</description>
58769          <addressOffset>0x1C</addressOffset>
58770          <size>32</size>
58771          <access>read-write</access>
58772          <resetValue>0</resetValue>
58773          <resetMask>0xFFFFFFFF</resetMask>
58774          <fields>
58775            <field>
58776              <name>PS</name>
58777              <description>Pull Select</description>
58778              <bitOffset>0</bitOffset>
58779              <bitWidth>1</bitWidth>
58780              <access>read-only</access>
58781              <enumeratedValues>
58782                <enumeratedValue>
58783                  <name>0</name>
58784                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
58785                  <value>#0</value>
58786                </enumeratedValue>
58787                <enumeratedValue>
58788                  <name>1</name>
58789                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
58790                  <value>#1</value>
58791                </enumeratedValue>
58792              </enumeratedValues>
58793            </field>
58794            <field>
58795              <name>PE</name>
58796              <description>Pull Enable</description>
58797              <bitOffset>1</bitOffset>
58798              <bitWidth>1</bitWidth>
58799              <access>read-only</access>
58800              <enumeratedValues>
58801                <enumeratedValue>
58802                  <name>0</name>
58803                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
58804                  <value>#0</value>
58805                </enumeratedValue>
58806                <enumeratedValue>
58807                  <name>1</name>
58808                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
58809                  <value>#1</value>
58810                </enumeratedValue>
58811              </enumeratedValues>
58812            </field>
58813            <field>
58814              <name>SRE</name>
58815              <description>Slew Rate Enable</description>
58816              <bitOffset>2</bitOffset>
58817              <bitWidth>1</bitWidth>
58818              <access>read-only</access>
58819              <enumeratedValues>
58820                <enumeratedValue>
58821                  <name>0</name>
58822                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
58823                  <value>#0</value>
58824                </enumeratedValue>
58825                <enumeratedValue>
58826                  <name>1</name>
58827                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
58828                  <value>#1</value>
58829                </enumeratedValue>
58830              </enumeratedValues>
58831            </field>
58832            <field>
58833              <name>PFE</name>
58834              <description>Passive Filter Enable</description>
58835              <bitOffset>4</bitOffset>
58836              <bitWidth>1</bitWidth>
58837              <access>read-only</access>
58838              <enumeratedValues>
58839                <enumeratedValue>
58840                  <name>0</name>
58841                  <description>Passive input filter is disabled on the corresponding pin.</description>
58842                  <value>#0</value>
58843                </enumeratedValue>
58844                <enumeratedValue>
58845                  <name>1</name>
58846                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
58847                  <value>#1</value>
58848                </enumeratedValue>
58849              </enumeratedValues>
58850            </field>
58851            <field>
58852              <name>ODE</name>
58853              <description>Open Drain Enable</description>
58854              <bitOffset>5</bitOffset>
58855              <bitWidth>1</bitWidth>
58856              <access>read-only</access>
58857              <enumeratedValues>
58858                <enumeratedValue>
58859                  <name>0</name>
58860                  <description>Open drain output is disabled on the corresponding pin.</description>
58861                  <value>#0</value>
58862                </enumeratedValue>
58863                <enumeratedValue>
58864                  <name>1</name>
58865                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
58866                  <value>#1</value>
58867                </enumeratedValue>
58868              </enumeratedValues>
58869            </field>
58870            <field>
58871              <name>DSE</name>
58872              <description>Drive Strength Enable</description>
58873              <bitOffset>6</bitOffset>
58874              <bitWidth>1</bitWidth>
58875              <access>read-only</access>
58876              <enumeratedValues>
58877                <enumeratedValue>
58878                  <name>0</name>
58879                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
58880                  <value>#0</value>
58881                </enumeratedValue>
58882                <enumeratedValue>
58883                  <name>1</name>
58884                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
58885                  <value>#1</value>
58886                </enumeratedValue>
58887              </enumeratedValues>
58888            </field>
58889            <field>
58890              <name>MUX</name>
58891              <description>Pin Mux Control</description>
58892              <bitOffset>8</bitOffset>
58893              <bitWidth>3</bitWidth>
58894              <access>read-write</access>
58895              <enumeratedValues>
58896                <enumeratedValue>
58897                  <name>000</name>
58898                  <description>Pin disabled (Alternative 0) (analog).</description>
58899                  <value>#000</value>
58900                </enumeratedValue>
58901                <enumeratedValue>
58902                  <name>001</name>
58903                  <description>Alternative 1 (GPIO).</description>
58904                  <value>#001</value>
58905                </enumeratedValue>
58906                <enumeratedValue>
58907                  <name>010</name>
58908                  <description>Alternative 2 (chip-specific).</description>
58909                  <value>#010</value>
58910                </enumeratedValue>
58911                <enumeratedValue>
58912                  <name>011</name>
58913                  <description>Alternative 3 (chip-specific).</description>
58914                  <value>#011</value>
58915                </enumeratedValue>
58916                <enumeratedValue>
58917                  <name>100</name>
58918                  <description>Alternative 4 (chip-specific).</description>
58919                  <value>#100</value>
58920                </enumeratedValue>
58921                <enumeratedValue>
58922                  <name>101</name>
58923                  <description>Alternative 5 (chip-specific).</description>
58924                  <value>#101</value>
58925                </enumeratedValue>
58926                <enumeratedValue>
58927                  <name>110</name>
58928                  <description>Alternative 6 (chip-specific).</description>
58929                  <value>#110</value>
58930                </enumeratedValue>
58931                <enumeratedValue>
58932                  <name>111</name>
58933                  <description>Alternative 7 (chip-specific).</description>
58934                  <value>#111</value>
58935                </enumeratedValue>
58936              </enumeratedValues>
58937            </field>
58938            <field>
58939              <name>LK</name>
58940              <description>Lock Register</description>
58941              <bitOffset>15</bitOffset>
58942              <bitWidth>1</bitWidth>
58943              <access>read-write</access>
58944              <enumeratedValues>
58945                <enumeratedValue>
58946                  <name>0</name>
58947                  <description>Pin Control Register fields [15:0] are not locked.</description>
58948                  <value>#0</value>
58949                </enumeratedValue>
58950                <enumeratedValue>
58951                  <name>1</name>
58952                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
58953                  <value>#1</value>
58954                </enumeratedValue>
58955              </enumeratedValues>
58956            </field>
58957            <field>
58958              <name>IRQC</name>
58959              <description>Interrupt Configuration</description>
58960              <bitOffset>16</bitOffset>
58961              <bitWidth>4</bitWidth>
58962              <access>read-write</access>
58963              <enumeratedValues>
58964                <enumeratedValue>
58965                  <name>0000</name>
58966                  <description>Interrupt Status Flag (ISF) is disabled.</description>
58967                  <value>#0000</value>
58968                </enumeratedValue>
58969                <enumeratedValue>
58970                  <name>0001</name>
58971                  <description>ISF flag and DMA request on rising edge.</description>
58972                  <value>#0001</value>
58973                </enumeratedValue>
58974                <enumeratedValue>
58975                  <name>0010</name>
58976                  <description>ISF flag and DMA request on falling edge.</description>
58977                  <value>#0010</value>
58978                </enumeratedValue>
58979                <enumeratedValue>
58980                  <name>0011</name>
58981                  <description>ISF flag and DMA request on either edge.</description>
58982                  <value>#0011</value>
58983                </enumeratedValue>
58984                <enumeratedValue>
58985                  <name>1000</name>
58986                  <description>ISF flag and Interrupt when logic 0.</description>
58987                  <value>#1000</value>
58988                </enumeratedValue>
58989                <enumeratedValue>
58990                  <name>1001</name>
58991                  <description>ISF flag and Interrupt on rising-edge.</description>
58992                  <value>#1001</value>
58993                </enumeratedValue>
58994                <enumeratedValue>
58995                  <name>1010</name>
58996                  <description>ISF flag and Interrupt on falling-edge.</description>
58997                  <value>#1010</value>
58998                </enumeratedValue>
58999                <enumeratedValue>
59000                  <name>1011</name>
59001                  <description>ISF flag and Interrupt on either edge.</description>
59002                  <value>#1011</value>
59003                </enumeratedValue>
59004                <enumeratedValue>
59005                  <name>1100</name>
59006                  <description>ISF flag and Interrupt when logic 1.</description>
59007                  <value>#1100</value>
59008                </enumeratedValue>
59009              </enumeratedValues>
59010            </field>
59011            <field>
59012              <name>ISF</name>
59013              <description>Interrupt Status Flag</description>
59014              <bitOffset>24</bitOffset>
59015              <bitWidth>1</bitWidth>
59016              <access>read-write</access>
59017              <enumeratedValues>
59018                <enumeratedValue>
59019                  <name>0</name>
59020                  <description>Configured interrupt is not detected.</description>
59021                  <value>#0</value>
59022                </enumeratedValue>
59023                <enumeratedValue>
59024                  <name>1</name>
59025                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
59026                  <value>#1</value>
59027                </enumeratedValue>
59028              </enumeratedValues>
59029            </field>
59030          </fields>
59031        </register>
59032        <register>
59033          <name>PCR8</name>
59034          <description>Pin Control Register n</description>
59035          <addressOffset>0x20</addressOffset>
59036          <size>32</size>
59037          <access>read-write</access>
59038          <resetValue>0</resetValue>
59039          <resetMask>0xFFFFFFFF</resetMask>
59040          <fields>
59041            <field>
59042              <name>PS</name>
59043              <description>Pull Select</description>
59044              <bitOffset>0</bitOffset>
59045              <bitWidth>1</bitWidth>
59046              <access>read-only</access>
59047              <enumeratedValues>
59048                <enumeratedValue>
59049                  <name>0</name>
59050                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
59051                  <value>#0</value>
59052                </enumeratedValue>
59053                <enumeratedValue>
59054                  <name>1</name>
59055                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
59056                  <value>#1</value>
59057                </enumeratedValue>
59058              </enumeratedValues>
59059            </field>
59060            <field>
59061              <name>PE</name>
59062              <description>Pull Enable</description>
59063              <bitOffset>1</bitOffset>
59064              <bitWidth>1</bitWidth>
59065              <access>read-only</access>
59066              <enumeratedValues>
59067                <enumeratedValue>
59068                  <name>0</name>
59069                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
59070                  <value>#0</value>
59071                </enumeratedValue>
59072                <enumeratedValue>
59073                  <name>1</name>
59074                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
59075                  <value>#1</value>
59076                </enumeratedValue>
59077              </enumeratedValues>
59078            </field>
59079            <field>
59080              <name>SRE</name>
59081              <description>Slew Rate Enable</description>
59082              <bitOffset>2</bitOffset>
59083              <bitWidth>1</bitWidth>
59084              <access>read-only</access>
59085              <enumeratedValues>
59086                <enumeratedValue>
59087                  <name>0</name>
59088                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
59089                  <value>#0</value>
59090                </enumeratedValue>
59091                <enumeratedValue>
59092                  <name>1</name>
59093                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
59094                  <value>#1</value>
59095                </enumeratedValue>
59096              </enumeratedValues>
59097            </field>
59098            <field>
59099              <name>PFE</name>
59100              <description>Passive Filter Enable</description>
59101              <bitOffset>4</bitOffset>
59102              <bitWidth>1</bitWidth>
59103              <access>read-only</access>
59104              <enumeratedValues>
59105                <enumeratedValue>
59106                  <name>0</name>
59107                  <description>Passive input filter is disabled on the corresponding pin.</description>
59108                  <value>#0</value>
59109                </enumeratedValue>
59110                <enumeratedValue>
59111                  <name>1</name>
59112                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
59113                  <value>#1</value>
59114                </enumeratedValue>
59115              </enumeratedValues>
59116            </field>
59117            <field>
59118              <name>ODE</name>
59119              <description>Open Drain Enable</description>
59120              <bitOffset>5</bitOffset>
59121              <bitWidth>1</bitWidth>
59122              <access>read-only</access>
59123              <enumeratedValues>
59124                <enumeratedValue>
59125                  <name>0</name>
59126                  <description>Open drain output is disabled on the corresponding pin.</description>
59127                  <value>#0</value>
59128                </enumeratedValue>
59129                <enumeratedValue>
59130                  <name>1</name>
59131                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
59132                  <value>#1</value>
59133                </enumeratedValue>
59134              </enumeratedValues>
59135            </field>
59136            <field>
59137              <name>DSE</name>
59138              <description>Drive Strength Enable</description>
59139              <bitOffset>6</bitOffset>
59140              <bitWidth>1</bitWidth>
59141              <access>read-only</access>
59142              <enumeratedValues>
59143                <enumeratedValue>
59144                  <name>0</name>
59145                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
59146                  <value>#0</value>
59147                </enumeratedValue>
59148                <enumeratedValue>
59149                  <name>1</name>
59150                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
59151                  <value>#1</value>
59152                </enumeratedValue>
59153              </enumeratedValues>
59154            </field>
59155            <field>
59156              <name>MUX</name>
59157              <description>Pin Mux Control</description>
59158              <bitOffset>8</bitOffset>
59159              <bitWidth>3</bitWidth>
59160              <access>read-write</access>
59161              <enumeratedValues>
59162                <enumeratedValue>
59163                  <name>000</name>
59164                  <description>Pin disabled (Alternative 0) (analog).</description>
59165                  <value>#000</value>
59166                </enumeratedValue>
59167                <enumeratedValue>
59168                  <name>001</name>
59169                  <description>Alternative 1 (GPIO).</description>
59170                  <value>#001</value>
59171                </enumeratedValue>
59172                <enumeratedValue>
59173                  <name>010</name>
59174                  <description>Alternative 2 (chip-specific).</description>
59175                  <value>#010</value>
59176                </enumeratedValue>
59177                <enumeratedValue>
59178                  <name>011</name>
59179                  <description>Alternative 3 (chip-specific).</description>
59180                  <value>#011</value>
59181                </enumeratedValue>
59182                <enumeratedValue>
59183                  <name>100</name>
59184                  <description>Alternative 4 (chip-specific).</description>
59185                  <value>#100</value>
59186                </enumeratedValue>
59187                <enumeratedValue>
59188                  <name>101</name>
59189                  <description>Alternative 5 (chip-specific).</description>
59190                  <value>#101</value>
59191                </enumeratedValue>
59192                <enumeratedValue>
59193                  <name>110</name>
59194                  <description>Alternative 6 (chip-specific).</description>
59195                  <value>#110</value>
59196                </enumeratedValue>
59197                <enumeratedValue>
59198                  <name>111</name>
59199                  <description>Alternative 7 (chip-specific).</description>
59200                  <value>#111</value>
59201                </enumeratedValue>
59202              </enumeratedValues>
59203            </field>
59204            <field>
59205              <name>LK</name>
59206              <description>Lock Register</description>
59207              <bitOffset>15</bitOffset>
59208              <bitWidth>1</bitWidth>
59209              <access>read-write</access>
59210              <enumeratedValues>
59211                <enumeratedValue>
59212                  <name>0</name>
59213                  <description>Pin Control Register fields [15:0] are not locked.</description>
59214                  <value>#0</value>
59215                </enumeratedValue>
59216                <enumeratedValue>
59217                  <name>1</name>
59218                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
59219                  <value>#1</value>
59220                </enumeratedValue>
59221              </enumeratedValues>
59222            </field>
59223            <field>
59224              <name>IRQC</name>
59225              <description>Interrupt Configuration</description>
59226              <bitOffset>16</bitOffset>
59227              <bitWidth>4</bitWidth>
59228              <access>read-write</access>
59229              <enumeratedValues>
59230                <enumeratedValue>
59231                  <name>0000</name>
59232                  <description>Interrupt Status Flag (ISF) is disabled.</description>
59233                  <value>#0000</value>
59234                </enumeratedValue>
59235                <enumeratedValue>
59236                  <name>0001</name>
59237                  <description>ISF flag and DMA request on rising edge.</description>
59238                  <value>#0001</value>
59239                </enumeratedValue>
59240                <enumeratedValue>
59241                  <name>0010</name>
59242                  <description>ISF flag and DMA request on falling edge.</description>
59243                  <value>#0010</value>
59244                </enumeratedValue>
59245                <enumeratedValue>
59246                  <name>0011</name>
59247                  <description>ISF flag and DMA request on either edge.</description>
59248                  <value>#0011</value>
59249                </enumeratedValue>
59250                <enumeratedValue>
59251                  <name>1000</name>
59252                  <description>ISF flag and Interrupt when logic 0.</description>
59253                  <value>#1000</value>
59254                </enumeratedValue>
59255                <enumeratedValue>
59256                  <name>1001</name>
59257                  <description>ISF flag and Interrupt on rising-edge.</description>
59258                  <value>#1001</value>
59259                </enumeratedValue>
59260                <enumeratedValue>
59261                  <name>1010</name>
59262                  <description>ISF flag and Interrupt on falling-edge.</description>
59263                  <value>#1010</value>
59264                </enumeratedValue>
59265                <enumeratedValue>
59266                  <name>1011</name>
59267                  <description>ISF flag and Interrupt on either edge.</description>
59268                  <value>#1011</value>
59269                </enumeratedValue>
59270                <enumeratedValue>
59271                  <name>1100</name>
59272                  <description>ISF flag and Interrupt when logic 1.</description>
59273                  <value>#1100</value>
59274                </enumeratedValue>
59275              </enumeratedValues>
59276            </field>
59277            <field>
59278              <name>ISF</name>
59279              <description>Interrupt Status Flag</description>
59280              <bitOffset>24</bitOffset>
59281              <bitWidth>1</bitWidth>
59282              <access>read-write</access>
59283              <enumeratedValues>
59284                <enumeratedValue>
59285                  <name>0</name>
59286                  <description>Configured interrupt is not detected.</description>
59287                  <value>#0</value>
59288                </enumeratedValue>
59289                <enumeratedValue>
59290                  <name>1</name>
59291                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
59292                  <value>#1</value>
59293                </enumeratedValue>
59294              </enumeratedValues>
59295            </field>
59296          </fields>
59297        </register>
59298        <register>
59299          <name>PCR9</name>
59300          <description>Pin Control Register n</description>
59301          <addressOffset>0x24</addressOffset>
59302          <size>32</size>
59303          <access>read-write</access>
59304          <resetValue>0</resetValue>
59305          <resetMask>0xFFFFFFFF</resetMask>
59306          <fields>
59307            <field>
59308              <name>PS</name>
59309              <description>Pull Select</description>
59310              <bitOffset>0</bitOffset>
59311              <bitWidth>1</bitWidth>
59312              <access>read-only</access>
59313              <enumeratedValues>
59314                <enumeratedValue>
59315                  <name>0</name>
59316                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
59317                  <value>#0</value>
59318                </enumeratedValue>
59319                <enumeratedValue>
59320                  <name>1</name>
59321                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
59322                  <value>#1</value>
59323                </enumeratedValue>
59324              </enumeratedValues>
59325            </field>
59326            <field>
59327              <name>PE</name>
59328              <description>Pull Enable</description>
59329              <bitOffset>1</bitOffset>
59330              <bitWidth>1</bitWidth>
59331              <access>read-only</access>
59332              <enumeratedValues>
59333                <enumeratedValue>
59334                  <name>0</name>
59335                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
59336                  <value>#0</value>
59337                </enumeratedValue>
59338                <enumeratedValue>
59339                  <name>1</name>
59340                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
59341                  <value>#1</value>
59342                </enumeratedValue>
59343              </enumeratedValues>
59344            </field>
59345            <field>
59346              <name>SRE</name>
59347              <description>Slew Rate Enable</description>
59348              <bitOffset>2</bitOffset>
59349              <bitWidth>1</bitWidth>
59350              <access>read-only</access>
59351              <enumeratedValues>
59352                <enumeratedValue>
59353                  <name>0</name>
59354                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
59355                  <value>#0</value>
59356                </enumeratedValue>
59357                <enumeratedValue>
59358                  <name>1</name>
59359                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
59360                  <value>#1</value>
59361                </enumeratedValue>
59362              </enumeratedValues>
59363            </field>
59364            <field>
59365              <name>PFE</name>
59366              <description>Passive Filter Enable</description>
59367              <bitOffset>4</bitOffset>
59368              <bitWidth>1</bitWidth>
59369              <access>read-only</access>
59370              <enumeratedValues>
59371                <enumeratedValue>
59372                  <name>0</name>
59373                  <description>Passive input filter is disabled on the corresponding pin.</description>
59374                  <value>#0</value>
59375                </enumeratedValue>
59376                <enumeratedValue>
59377                  <name>1</name>
59378                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
59379                  <value>#1</value>
59380                </enumeratedValue>
59381              </enumeratedValues>
59382            </field>
59383            <field>
59384              <name>ODE</name>
59385              <description>Open Drain Enable</description>
59386              <bitOffset>5</bitOffset>
59387              <bitWidth>1</bitWidth>
59388              <access>read-only</access>
59389              <enumeratedValues>
59390                <enumeratedValue>
59391                  <name>0</name>
59392                  <description>Open drain output is disabled on the corresponding pin.</description>
59393                  <value>#0</value>
59394                </enumeratedValue>
59395                <enumeratedValue>
59396                  <name>1</name>
59397                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
59398                  <value>#1</value>
59399                </enumeratedValue>
59400              </enumeratedValues>
59401            </field>
59402            <field>
59403              <name>DSE</name>
59404              <description>Drive Strength Enable</description>
59405              <bitOffset>6</bitOffset>
59406              <bitWidth>1</bitWidth>
59407              <access>read-only</access>
59408              <enumeratedValues>
59409                <enumeratedValue>
59410                  <name>0</name>
59411                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
59412                  <value>#0</value>
59413                </enumeratedValue>
59414                <enumeratedValue>
59415                  <name>1</name>
59416                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
59417                  <value>#1</value>
59418                </enumeratedValue>
59419              </enumeratedValues>
59420            </field>
59421            <field>
59422              <name>MUX</name>
59423              <description>Pin Mux Control</description>
59424              <bitOffset>8</bitOffset>
59425              <bitWidth>3</bitWidth>
59426              <access>read-write</access>
59427              <enumeratedValues>
59428                <enumeratedValue>
59429                  <name>000</name>
59430                  <description>Pin disabled (Alternative 0) (analog).</description>
59431                  <value>#000</value>
59432                </enumeratedValue>
59433                <enumeratedValue>
59434                  <name>001</name>
59435                  <description>Alternative 1 (GPIO).</description>
59436                  <value>#001</value>
59437                </enumeratedValue>
59438                <enumeratedValue>
59439                  <name>010</name>
59440                  <description>Alternative 2 (chip-specific).</description>
59441                  <value>#010</value>
59442                </enumeratedValue>
59443                <enumeratedValue>
59444                  <name>011</name>
59445                  <description>Alternative 3 (chip-specific).</description>
59446                  <value>#011</value>
59447                </enumeratedValue>
59448                <enumeratedValue>
59449                  <name>100</name>
59450                  <description>Alternative 4 (chip-specific).</description>
59451                  <value>#100</value>
59452                </enumeratedValue>
59453                <enumeratedValue>
59454                  <name>101</name>
59455                  <description>Alternative 5 (chip-specific).</description>
59456                  <value>#101</value>
59457                </enumeratedValue>
59458                <enumeratedValue>
59459                  <name>110</name>
59460                  <description>Alternative 6 (chip-specific).</description>
59461                  <value>#110</value>
59462                </enumeratedValue>
59463                <enumeratedValue>
59464                  <name>111</name>
59465                  <description>Alternative 7 (chip-specific).</description>
59466                  <value>#111</value>
59467                </enumeratedValue>
59468              </enumeratedValues>
59469            </field>
59470            <field>
59471              <name>LK</name>
59472              <description>Lock Register</description>
59473              <bitOffset>15</bitOffset>
59474              <bitWidth>1</bitWidth>
59475              <access>read-write</access>
59476              <enumeratedValues>
59477                <enumeratedValue>
59478                  <name>0</name>
59479                  <description>Pin Control Register fields [15:0] are not locked.</description>
59480                  <value>#0</value>
59481                </enumeratedValue>
59482                <enumeratedValue>
59483                  <name>1</name>
59484                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
59485                  <value>#1</value>
59486                </enumeratedValue>
59487              </enumeratedValues>
59488            </field>
59489            <field>
59490              <name>IRQC</name>
59491              <description>Interrupt Configuration</description>
59492              <bitOffset>16</bitOffset>
59493              <bitWidth>4</bitWidth>
59494              <access>read-write</access>
59495              <enumeratedValues>
59496                <enumeratedValue>
59497                  <name>0000</name>
59498                  <description>Interrupt Status Flag (ISF) is disabled.</description>
59499                  <value>#0000</value>
59500                </enumeratedValue>
59501                <enumeratedValue>
59502                  <name>0001</name>
59503                  <description>ISF flag and DMA request on rising edge.</description>
59504                  <value>#0001</value>
59505                </enumeratedValue>
59506                <enumeratedValue>
59507                  <name>0010</name>
59508                  <description>ISF flag and DMA request on falling edge.</description>
59509                  <value>#0010</value>
59510                </enumeratedValue>
59511                <enumeratedValue>
59512                  <name>0011</name>
59513                  <description>ISF flag and DMA request on either edge.</description>
59514                  <value>#0011</value>
59515                </enumeratedValue>
59516                <enumeratedValue>
59517                  <name>1000</name>
59518                  <description>ISF flag and Interrupt when logic 0.</description>
59519                  <value>#1000</value>
59520                </enumeratedValue>
59521                <enumeratedValue>
59522                  <name>1001</name>
59523                  <description>ISF flag and Interrupt on rising-edge.</description>
59524                  <value>#1001</value>
59525                </enumeratedValue>
59526                <enumeratedValue>
59527                  <name>1010</name>
59528                  <description>ISF flag and Interrupt on falling-edge.</description>
59529                  <value>#1010</value>
59530                </enumeratedValue>
59531                <enumeratedValue>
59532                  <name>1011</name>
59533                  <description>ISF flag and Interrupt on either edge.</description>
59534                  <value>#1011</value>
59535                </enumeratedValue>
59536                <enumeratedValue>
59537                  <name>1100</name>
59538                  <description>ISF flag and Interrupt when logic 1.</description>
59539                  <value>#1100</value>
59540                </enumeratedValue>
59541              </enumeratedValues>
59542            </field>
59543            <field>
59544              <name>ISF</name>
59545              <description>Interrupt Status Flag</description>
59546              <bitOffset>24</bitOffset>
59547              <bitWidth>1</bitWidth>
59548              <access>read-write</access>
59549              <enumeratedValues>
59550                <enumeratedValue>
59551                  <name>0</name>
59552                  <description>Configured interrupt is not detected.</description>
59553                  <value>#0</value>
59554                </enumeratedValue>
59555                <enumeratedValue>
59556                  <name>1</name>
59557                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
59558                  <value>#1</value>
59559                </enumeratedValue>
59560              </enumeratedValues>
59561            </field>
59562          </fields>
59563        </register>
59564        <register>
59565          <name>PCR10</name>
59566          <description>Pin Control Register n</description>
59567          <addressOffset>0x28</addressOffset>
59568          <size>32</size>
59569          <access>read-write</access>
59570          <resetValue>0</resetValue>
59571          <resetMask>0xFFFFFFFF</resetMask>
59572          <fields>
59573            <field>
59574              <name>PS</name>
59575              <description>Pull Select</description>
59576              <bitOffset>0</bitOffset>
59577              <bitWidth>1</bitWidth>
59578              <access>read-write</access>
59579              <enumeratedValues>
59580                <enumeratedValue>
59581                  <name>0</name>
59582                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
59583                  <value>#0</value>
59584                </enumeratedValue>
59585                <enumeratedValue>
59586                  <name>1</name>
59587                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
59588                  <value>#1</value>
59589                </enumeratedValue>
59590              </enumeratedValues>
59591            </field>
59592            <field>
59593              <name>PE</name>
59594              <description>Pull Enable</description>
59595              <bitOffset>1</bitOffset>
59596              <bitWidth>1</bitWidth>
59597              <access>read-write</access>
59598              <enumeratedValues>
59599                <enumeratedValue>
59600                  <name>0</name>
59601                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
59602                  <value>#0</value>
59603                </enumeratedValue>
59604                <enumeratedValue>
59605                  <name>1</name>
59606                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
59607                  <value>#1</value>
59608                </enumeratedValue>
59609              </enumeratedValues>
59610            </field>
59611            <field>
59612              <name>SRE</name>
59613              <description>Slew Rate Enable</description>
59614              <bitOffset>2</bitOffset>
59615              <bitWidth>1</bitWidth>
59616              <access>read-write</access>
59617              <enumeratedValues>
59618                <enumeratedValue>
59619                  <name>0</name>
59620                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
59621                  <value>#0</value>
59622                </enumeratedValue>
59623                <enumeratedValue>
59624                  <name>1</name>
59625                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
59626                  <value>#1</value>
59627                </enumeratedValue>
59628              </enumeratedValues>
59629            </field>
59630            <field>
59631              <name>PFE</name>
59632              <description>Passive Filter Enable</description>
59633              <bitOffset>4</bitOffset>
59634              <bitWidth>1</bitWidth>
59635              <access>read-only</access>
59636              <enumeratedValues>
59637                <enumeratedValue>
59638                  <name>0</name>
59639                  <description>Passive input filter is disabled on the corresponding pin.</description>
59640                  <value>#0</value>
59641                </enumeratedValue>
59642                <enumeratedValue>
59643                  <name>1</name>
59644                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
59645                  <value>#1</value>
59646                </enumeratedValue>
59647              </enumeratedValues>
59648            </field>
59649            <field>
59650              <name>ODE</name>
59651              <description>Open Drain Enable</description>
59652              <bitOffset>5</bitOffset>
59653              <bitWidth>1</bitWidth>
59654              <access>read-write</access>
59655              <enumeratedValues>
59656                <enumeratedValue>
59657                  <name>0</name>
59658                  <description>Open drain output is disabled on the corresponding pin.</description>
59659                  <value>#0</value>
59660                </enumeratedValue>
59661                <enumeratedValue>
59662                  <name>1</name>
59663                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
59664                  <value>#1</value>
59665                </enumeratedValue>
59666              </enumeratedValues>
59667            </field>
59668            <field>
59669              <name>DSE</name>
59670              <description>Drive Strength Enable</description>
59671              <bitOffset>6</bitOffset>
59672              <bitWidth>1</bitWidth>
59673              <access>read-only</access>
59674              <enumeratedValues>
59675                <enumeratedValue>
59676                  <name>0</name>
59677                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
59678                  <value>#0</value>
59679                </enumeratedValue>
59680                <enumeratedValue>
59681                  <name>1</name>
59682                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
59683                  <value>#1</value>
59684                </enumeratedValue>
59685              </enumeratedValues>
59686            </field>
59687            <field>
59688              <name>MUX</name>
59689              <description>Pin Mux Control</description>
59690              <bitOffset>8</bitOffset>
59691              <bitWidth>3</bitWidth>
59692              <access>read-write</access>
59693              <enumeratedValues>
59694                <enumeratedValue>
59695                  <name>000</name>
59696                  <description>Pin disabled (Alternative 0) (analog).</description>
59697                  <value>#000</value>
59698                </enumeratedValue>
59699                <enumeratedValue>
59700                  <name>001</name>
59701                  <description>Alternative 1 (GPIO).</description>
59702                  <value>#001</value>
59703                </enumeratedValue>
59704                <enumeratedValue>
59705                  <name>010</name>
59706                  <description>Alternative 2 (chip-specific).</description>
59707                  <value>#010</value>
59708                </enumeratedValue>
59709                <enumeratedValue>
59710                  <name>011</name>
59711                  <description>Alternative 3 (chip-specific).</description>
59712                  <value>#011</value>
59713                </enumeratedValue>
59714                <enumeratedValue>
59715                  <name>100</name>
59716                  <description>Alternative 4 (chip-specific).</description>
59717                  <value>#100</value>
59718                </enumeratedValue>
59719                <enumeratedValue>
59720                  <name>101</name>
59721                  <description>Alternative 5 (chip-specific).</description>
59722                  <value>#101</value>
59723                </enumeratedValue>
59724                <enumeratedValue>
59725                  <name>110</name>
59726                  <description>Alternative 6 (chip-specific).</description>
59727                  <value>#110</value>
59728                </enumeratedValue>
59729                <enumeratedValue>
59730                  <name>111</name>
59731                  <description>Alternative 7 (chip-specific).</description>
59732                  <value>#111</value>
59733                </enumeratedValue>
59734              </enumeratedValues>
59735            </field>
59736            <field>
59737              <name>LK</name>
59738              <description>Lock Register</description>
59739              <bitOffset>15</bitOffset>
59740              <bitWidth>1</bitWidth>
59741              <access>read-write</access>
59742              <enumeratedValues>
59743                <enumeratedValue>
59744                  <name>0</name>
59745                  <description>Pin Control Register fields [15:0] are not locked.</description>
59746                  <value>#0</value>
59747                </enumeratedValue>
59748                <enumeratedValue>
59749                  <name>1</name>
59750                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
59751                  <value>#1</value>
59752                </enumeratedValue>
59753              </enumeratedValues>
59754            </field>
59755            <field>
59756              <name>IRQC</name>
59757              <description>Interrupt Configuration</description>
59758              <bitOffset>16</bitOffset>
59759              <bitWidth>4</bitWidth>
59760              <access>read-write</access>
59761              <enumeratedValues>
59762                <enumeratedValue>
59763                  <name>0000</name>
59764                  <description>Interrupt Status Flag (ISF) is disabled.</description>
59765                  <value>#0000</value>
59766                </enumeratedValue>
59767                <enumeratedValue>
59768                  <name>0001</name>
59769                  <description>ISF flag and DMA request on rising edge.</description>
59770                  <value>#0001</value>
59771                </enumeratedValue>
59772                <enumeratedValue>
59773                  <name>0010</name>
59774                  <description>ISF flag and DMA request on falling edge.</description>
59775                  <value>#0010</value>
59776                </enumeratedValue>
59777                <enumeratedValue>
59778                  <name>0011</name>
59779                  <description>ISF flag and DMA request on either edge.</description>
59780                  <value>#0011</value>
59781                </enumeratedValue>
59782                <enumeratedValue>
59783                  <name>1000</name>
59784                  <description>ISF flag and Interrupt when logic 0.</description>
59785                  <value>#1000</value>
59786                </enumeratedValue>
59787                <enumeratedValue>
59788                  <name>1001</name>
59789                  <description>ISF flag and Interrupt on rising-edge.</description>
59790                  <value>#1001</value>
59791                </enumeratedValue>
59792                <enumeratedValue>
59793                  <name>1010</name>
59794                  <description>ISF flag and Interrupt on falling-edge.</description>
59795                  <value>#1010</value>
59796                </enumeratedValue>
59797                <enumeratedValue>
59798                  <name>1011</name>
59799                  <description>ISF flag and Interrupt on either edge.</description>
59800                  <value>#1011</value>
59801                </enumeratedValue>
59802                <enumeratedValue>
59803                  <name>1100</name>
59804                  <description>ISF flag and Interrupt when logic 1.</description>
59805                  <value>#1100</value>
59806                </enumeratedValue>
59807              </enumeratedValues>
59808            </field>
59809            <field>
59810              <name>ISF</name>
59811              <description>Interrupt Status Flag</description>
59812              <bitOffset>24</bitOffset>
59813              <bitWidth>1</bitWidth>
59814              <access>read-write</access>
59815              <enumeratedValues>
59816                <enumeratedValue>
59817                  <name>0</name>
59818                  <description>Configured interrupt is not detected.</description>
59819                  <value>#0</value>
59820                </enumeratedValue>
59821                <enumeratedValue>
59822                  <name>1</name>
59823                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
59824                  <value>#1</value>
59825                </enumeratedValue>
59826              </enumeratedValues>
59827            </field>
59828          </fields>
59829        </register>
59830        <register>
59831          <name>PCR11</name>
59832          <description>Pin Control Register n</description>
59833          <addressOffset>0x2C</addressOffset>
59834          <size>32</size>
59835          <access>read-write</access>
59836          <resetValue>0</resetValue>
59837          <resetMask>0xFFFFFFFF</resetMask>
59838          <fields>
59839            <field>
59840              <name>PS</name>
59841              <description>Pull Select</description>
59842              <bitOffset>0</bitOffset>
59843              <bitWidth>1</bitWidth>
59844              <access>read-write</access>
59845              <enumeratedValues>
59846                <enumeratedValue>
59847                  <name>0</name>
59848                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
59849                  <value>#0</value>
59850                </enumeratedValue>
59851                <enumeratedValue>
59852                  <name>1</name>
59853                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
59854                  <value>#1</value>
59855                </enumeratedValue>
59856              </enumeratedValues>
59857            </field>
59858            <field>
59859              <name>PE</name>
59860              <description>Pull Enable</description>
59861              <bitOffset>1</bitOffset>
59862              <bitWidth>1</bitWidth>
59863              <access>read-write</access>
59864              <enumeratedValues>
59865                <enumeratedValue>
59866                  <name>0</name>
59867                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
59868                  <value>#0</value>
59869                </enumeratedValue>
59870                <enumeratedValue>
59871                  <name>1</name>
59872                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
59873                  <value>#1</value>
59874                </enumeratedValue>
59875              </enumeratedValues>
59876            </field>
59877            <field>
59878              <name>SRE</name>
59879              <description>Slew Rate Enable</description>
59880              <bitOffset>2</bitOffset>
59881              <bitWidth>1</bitWidth>
59882              <access>read-write</access>
59883              <enumeratedValues>
59884                <enumeratedValue>
59885                  <name>0</name>
59886                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
59887                  <value>#0</value>
59888                </enumeratedValue>
59889                <enumeratedValue>
59890                  <name>1</name>
59891                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
59892                  <value>#1</value>
59893                </enumeratedValue>
59894              </enumeratedValues>
59895            </field>
59896            <field>
59897              <name>PFE</name>
59898              <description>Passive Filter Enable</description>
59899              <bitOffset>4</bitOffset>
59900              <bitWidth>1</bitWidth>
59901              <access>read-only</access>
59902              <enumeratedValues>
59903                <enumeratedValue>
59904                  <name>0</name>
59905                  <description>Passive input filter is disabled on the corresponding pin.</description>
59906                  <value>#0</value>
59907                </enumeratedValue>
59908                <enumeratedValue>
59909                  <name>1</name>
59910                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
59911                  <value>#1</value>
59912                </enumeratedValue>
59913              </enumeratedValues>
59914            </field>
59915            <field>
59916              <name>ODE</name>
59917              <description>Open Drain Enable</description>
59918              <bitOffset>5</bitOffset>
59919              <bitWidth>1</bitWidth>
59920              <access>read-write</access>
59921              <enumeratedValues>
59922                <enumeratedValue>
59923                  <name>0</name>
59924                  <description>Open drain output is disabled on the corresponding pin.</description>
59925                  <value>#0</value>
59926                </enumeratedValue>
59927                <enumeratedValue>
59928                  <name>1</name>
59929                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
59930                  <value>#1</value>
59931                </enumeratedValue>
59932              </enumeratedValues>
59933            </field>
59934            <field>
59935              <name>DSE</name>
59936              <description>Drive Strength Enable</description>
59937              <bitOffset>6</bitOffset>
59938              <bitWidth>1</bitWidth>
59939              <access>read-only</access>
59940              <enumeratedValues>
59941                <enumeratedValue>
59942                  <name>0</name>
59943                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
59944                  <value>#0</value>
59945                </enumeratedValue>
59946                <enumeratedValue>
59947                  <name>1</name>
59948                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
59949                  <value>#1</value>
59950                </enumeratedValue>
59951              </enumeratedValues>
59952            </field>
59953            <field>
59954              <name>MUX</name>
59955              <description>Pin Mux Control</description>
59956              <bitOffset>8</bitOffset>
59957              <bitWidth>3</bitWidth>
59958              <access>read-write</access>
59959              <enumeratedValues>
59960                <enumeratedValue>
59961                  <name>000</name>
59962                  <description>Pin disabled (Alternative 0) (analog).</description>
59963                  <value>#000</value>
59964                </enumeratedValue>
59965                <enumeratedValue>
59966                  <name>001</name>
59967                  <description>Alternative 1 (GPIO).</description>
59968                  <value>#001</value>
59969                </enumeratedValue>
59970                <enumeratedValue>
59971                  <name>010</name>
59972                  <description>Alternative 2 (chip-specific).</description>
59973                  <value>#010</value>
59974                </enumeratedValue>
59975                <enumeratedValue>
59976                  <name>011</name>
59977                  <description>Alternative 3 (chip-specific).</description>
59978                  <value>#011</value>
59979                </enumeratedValue>
59980                <enumeratedValue>
59981                  <name>100</name>
59982                  <description>Alternative 4 (chip-specific).</description>
59983                  <value>#100</value>
59984                </enumeratedValue>
59985                <enumeratedValue>
59986                  <name>101</name>
59987                  <description>Alternative 5 (chip-specific).</description>
59988                  <value>#101</value>
59989                </enumeratedValue>
59990                <enumeratedValue>
59991                  <name>110</name>
59992                  <description>Alternative 6 (chip-specific).</description>
59993                  <value>#110</value>
59994                </enumeratedValue>
59995                <enumeratedValue>
59996                  <name>111</name>
59997                  <description>Alternative 7 (chip-specific).</description>
59998                  <value>#111</value>
59999                </enumeratedValue>
60000              </enumeratedValues>
60001            </field>
60002            <field>
60003              <name>LK</name>
60004              <description>Lock Register</description>
60005              <bitOffset>15</bitOffset>
60006              <bitWidth>1</bitWidth>
60007              <access>read-write</access>
60008              <enumeratedValues>
60009                <enumeratedValue>
60010                  <name>0</name>
60011                  <description>Pin Control Register fields [15:0] are not locked.</description>
60012                  <value>#0</value>
60013                </enumeratedValue>
60014                <enumeratedValue>
60015                  <name>1</name>
60016                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
60017                  <value>#1</value>
60018                </enumeratedValue>
60019              </enumeratedValues>
60020            </field>
60021            <field>
60022              <name>IRQC</name>
60023              <description>Interrupt Configuration</description>
60024              <bitOffset>16</bitOffset>
60025              <bitWidth>4</bitWidth>
60026              <access>read-write</access>
60027              <enumeratedValues>
60028                <enumeratedValue>
60029                  <name>0000</name>
60030                  <description>Interrupt Status Flag (ISF) is disabled.</description>
60031                  <value>#0000</value>
60032                </enumeratedValue>
60033                <enumeratedValue>
60034                  <name>0001</name>
60035                  <description>ISF flag and DMA request on rising edge.</description>
60036                  <value>#0001</value>
60037                </enumeratedValue>
60038                <enumeratedValue>
60039                  <name>0010</name>
60040                  <description>ISF flag and DMA request on falling edge.</description>
60041                  <value>#0010</value>
60042                </enumeratedValue>
60043                <enumeratedValue>
60044                  <name>0011</name>
60045                  <description>ISF flag and DMA request on either edge.</description>
60046                  <value>#0011</value>
60047                </enumeratedValue>
60048                <enumeratedValue>
60049                  <name>1000</name>
60050                  <description>ISF flag and Interrupt when logic 0.</description>
60051                  <value>#1000</value>
60052                </enumeratedValue>
60053                <enumeratedValue>
60054                  <name>1001</name>
60055                  <description>ISF flag and Interrupt on rising-edge.</description>
60056                  <value>#1001</value>
60057                </enumeratedValue>
60058                <enumeratedValue>
60059                  <name>1010</name>
60060                  <description>ISF flag and Interrupt on falling-edge.</description>
60061                  <value>#1010</value>
60062                </enumeratedValue>
60063                <enumeratedValue>
60064                  <name>1011</name>
60065                  <description>ISF flag and Interrupt on either edge.</description>
60066                  <value>#1011</value>
60067                </enumeratedValue>
60068                <enumeratedValue>
60069                  <name>1100</name>
60070                  <description>ISF flag and Interrupt when logic 1.</description>
60071                  <value>#1100</value>
60072                </enumeratedValue>
60073              </enumeratedValues>
60074            </field>
60075            <field>
60076              <name>ISF</name>
60077              <description>Interrupt Status Flag</description>
60078              <bitOffset>24</bitOffset>
60079              <bitWidth>1</bitWidth>
60080              <access>read-write</access>
60081              <enumeratedValues>
60082                <enumeratedValue>
60083                  <name>0</name>
60084                  <description>Configured interrupt is not detected.</description>
60085                  <value>#0</value>
60086                </enumeratedValue>
60087                <enumeratedValue>
60088                  <name>1</name>
60089                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
60090                  <value>#1</value>
60091                </enumeratedValue>
60092              </enumeratedValues>
60093            </field>
60094          </fields>
60095        </register>
60096        <register>
60097          <name>PCR12</name>
60098          <description>Pin Control Register n</description>
60099          <addressOffset>0x30</addressOffset>
60100          <size>32</size>
60101          <access>read-write</access>
60102          <resetValue>0</resetValue>
60103          <resetMask>0xFFFFFFFF</resetMask>
60104          <fields>
60105            <field>
60106              <name>PS</name>
60107              <description>Pull Select</description>
60108              <bitOffset>0</bitOffset>
60109              <bitWidth>1</bitWidth>
60110              <access>read-write</access>
60111              <enumeratedValues>
60112                <enumeratedValue>
60113                  <name>0</name>
60114                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
60115                  <value>#0</value>
60116                </enumeratedValue>
60117                <enumeratedValue>
60118                  <name>1</name>
60119                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
60120                  <value>#1</value>
60121                </enumeratedValue>
60122              </enumeratedValues>
60123            </field>
60124            <field>
60125              <name>PE</name>
60126              <description>Pull Enable</description>
60127              <bitOffset>1</bitOffset>
60128              <bitWidth>1</bitWidth>
60129              <access>read-write</access>
60130              <enumeratedValues>
60131                <enumeratedValue>
60132                  <name>0</name>
60133                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
60134                  <value>#0</value>
60135                </enumeratedValue>
60136                <enumeratedValue>
60137                  <name>1</name>
60138                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
60139                  <value>#1</value>
60140                </enumeratedValue>
60141              </enumeratedValues>
60142            </field>
60143            <field>
60144              <name>SRE</name>
60145              <description>Slew Rate Enable</description>
60146              <bitOffset>2</bitOffset>
60147              <bitWidth>1</bitWidth>
60148              <access>read-write</access>
60149              <enumeratedValues>
60150                <enumeratedValue>
60151                  <name>0</name>
60152                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
60153                  <value>#0</value>
60154                </enumeratedValue>
60155                <enumeratedValue>
60156                  <name>1</name>
60157                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
60158                  <value>#1</value>
60159                </enumeratedValue>
60160              </enumeratedValues>
60161            </field>
60162            <field>
60163              <name>PFE</name>
60164              <description>Passive Filter Enable</description>
60165              <bitOffset>4</bitOffset>
60166              <bitWidth>1</bitWidth>
60167              <access>read-only</access>
60168              <enumeratedValues>
60169                <enumeratedValue>
60170                  <name>0</name>
60171                  <description>Passive input filter is disabled on the corresponding pin.</description>
60172                  <value>#0</value>
60173                </enumeratedValue>
60174                <enumeratedValue>
60175                  <name>1</name>
60176                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
60177                  <value>#1</value>
60178                </enumeratedValue>
60179              </enumeratedValues>
60180            </field>
60181            <field>
60182              <name>ODE</name>
60183              <description>Open Drain Enable</description>
60184              <bitOffset>5</bitOffset>
60185              <bitWidth>1</bitWidth>
60186              <access>read-write</access>
60187              <enumeratedValues>
60188                <enumeratedValue>
60189                  <name>0</name>
60190                  <description>Open drain output is disabled on the corresponding pin.</description>
60191                  <value>#0</value>
60192                </enumeratedValue>
60193                <enumeratedValue>
60194                  <name>1</name>
60195                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
60196                  <value>#1</value>
60197                </enumeratedValue>
60198              </enumeratedValues>
60199            </field>
60200            <field>
60201              <name>DSE</name>
60202              <description>Drive Strength Enable</description>
60203              <bitOffset>6</bitOffset>
60204              <bitWidth>1</bitWidth>
60205              <access>read-only</access>
60206              <enumeratedValues>
60207                <enumeratedValue>
60208                  <name>0</name>
60209                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
60210                  <value>#0</value>
60211                </enumeratedValue>
60212                <enumeratedValue>
60213                  <name>1</name>
60214                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
60215                  <value>#1</value>
60216                </enumeratedValue>
60217              </enumeratedValues>
60218            </field>
60219            <field>
60220              <name>MUX</name>
60221              <description>Pin Mux Control</description>
60222              <bitOffset>8</bitOffset>
60223              <bitWidth>3</bitWidth>
60224              <access>read-write</access>
60225              <enumeratedValues>
60226                <enumeratedValue>
60227                  <name>000</name>
60228                  <description>Pin disabled (Alternative 0) (analog).</description>
60229                  <value>#000</value>
60230                </enumeratedValue>
60231                <enumeratedValue>
60232                  <name>001</name>
60233                  <description>Alternative 1 (GPIO).</description>
60234                  <value>#001</value>
60235                </enumeratedValue>
60236                <enumeratedValue>
60237                  <name>010</name>
60238                  <description>Alternative 2 (chip-specific).</description>
60239                  <value>#010</value>
60240                </enumeratedValue>
60241                <enumeratedValue>
60242                  <name>011</name>
60243                  <description>Alternative 3 (chip-specific).</description>
60244                  <value>#011</value>
60245                </enumeratedValue>
60246                <enumeratedValue>
60247                  <name>100</name>
60248                  <description>Alternative 4 (chip-specific).</description>
60249                  <value>#100</value>
60250                </enumeratedValue>
60251                <enumeratedValue>
60252                  <name>101</name>
60253                  <description>Alternative 5 (chip-specific).</description>
60254                  <value>#101</value>
60255                </enumeratedValue>
60256                <enumeratedValue>
60257                  <name>110</name>
60258                  <description>Alternative 6 (chip-specific).</description>
60259                  <value>#110</value>
60260                </enumeratedValue>
60261                <enumeratedValue>
60262                  <name>111</name>
60263                  <description>Alternative 7 (chip-specific).</description>
60264                  <value>#111</value>
60265                </enumeratedValue>
60266              </enumeratedValues>
60267            </field>
60268            <field>
60269              <name>LK</name>
60270              <description>Lock Register</description>
60271              <bitOffset>15</bitOffset>
60272              <bitWidth>1</bitWidth>
60273              <access>read-write</access>
60274              <enumeratedValues>
60275                <enumeratedValue>
60276                  <name>0</name>
60277                  <description>Pin Control Register fields [15:0] are not locked.</description>
60278                  <value>#0</value>
60279                </enumeratedValue>
60280                <enumeratedValue>
60281                  <name>1</name>
60282                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
60283                  <value>#1</value>
60284                </enumeratedValue>
60285              </enumeratedValues>
60286            </field>
60287            <field>
60288              <name>IRQC</name>
60289              <description>Interrupt Configuration</description>
60290              <bitOffset>16</bitOffset>
60291              <bitWidth>4</bitWidth>
60292              <access>read-write</access>
60293              <enumeratedValues>
60294                <enumeratedValue>
60295                  <name>0000</name>
60296                  <description>Interrupt Status Flag (ISF) is disabled.</description>
60297                  <value>#0000</value>
60298                </enumeratedValue>
60299                <enumeratedValue>
60300                  <name>0001</name>
60301                  <description>ISF flag and DMA request on rising edge.</description>
60302                  <value>#0001</value>
60303                </enumeratedValue>
60304                <enumeratedValue>
60305                  <name>0010</name>
60306                  <description>ISF flag and DMA request on falling edge.</description>
60307                  <value>#0010</value>
60308                </enumeratedValue>
60309                <enumeratedValue>
60310                  <name>0011</name>
60311                  <description>ISF flag and DMA request on either edge.</description>
60312                  <value>#0011</value>
60313                </enumeratedValue>
60314                <enumeratedValue>
60315                  <name>1000</name>
60316                  <description>ISF flag and Interrupt when logic 0.</description>
60317                  <value>#1000</value>
60318                </enumeratedValue>
60319                <enumeratedValue>
60320                  <name>1001</name>
60321                  <description>ISF flag and Interrupt on rising-edge.</description>
60322                  <value>#1001</value>
60323                </enumeratedValue>
60324                <enumeratedValue>
60325                  <name>1010</name>
60326                  <description>ISF flag and Interrupt on falling-edge.</description>
60327                  <value>#1010</value>
60328                </enumeratedValue>
60329                <enumeratedValue>
60330                  <name>1011</name>
60331                  <description>ISF flag and Interrupt on either edge.</description>
60332                  <value>#1011</value>
60333                </enumeratedValue>
60334                <enumeratedValue>
60335                  <name>1100</name>
60336                  <description>ISF flag and Interrupt when logic 1.</description>
60337                  <value>#1100</value>
60338                </enumeratedValue>
60339              </enumeratedValues>
60340            </field>
60341            <field>
60342              <name>ISF</name>
60343              <description>Interrupt Status Flag</description>
60344              <bitOffset>24</bitOffset>
60345              <bitWidth>1</bitWidth>
60346              <access>read-write</access>
60347              <enumeratedValues>
60348                <enumeratedValue>
60349                  <name>0</name>
60350                  <description>Configured interrupt is not detected.</description>
60351                  <value>#0</value>
60352                </enumeratedValue>
60353                <enumeratedValue>
60354                  <name>1</name>
60355                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
60356                  <value>#1</value>
60357                </enumeratedValue>
60358              </enumeratedValues>
60359            </field>
60360          </fields>
60361        </register>
60362        <register>
60363          <name>PCR13</name>
60364          <description>Pin Control Register n</description>
60365          <addressOffset>0x34</addressOffset>
60366          <size>32</size>
60367          <access>read-write</access>
60368          <resetValue>0</resetValue>
60369          <resetMask>0xFFFFFFFF</resetMask>
60370          <fields>
60371            <field>
60372              <name>PS</name>
60373              <description>Pull Select</description>
60374              <bitOffset>0</bitOffset>
60375              <bitWidth>1</bitWidth>
60376              <access>read-write</access>
60377              <enumeratedValues>
60378                <enumeratedValue>
60379                  <name>0</name>
60380                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
60381                  <value>#0</value>
60382                </enumeratedValue>
60383                <enumeratedValue>
60384                  <name>1</name>
60385                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
60386                  <value>#1</value>
60387                </enumeratedValue>
60388              </enumeratedValues>
60389            </field>
60390            <field>
60391              <name>PE</name>
60392              <description>Pull Enable</description>
60393              <bitOffset>1</bitOffset>
60394              <bitWidth>1</bitWidth>
60395              <access>read-write</access>
60396              <enumeratedValues>
60397                <enumeratedValue>
60398                  <name>0</name>
60399                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
60400                  <value>#0</value>
60401                </enumeratedValue>
60402                <enumeratedValue>
60403                  <name>1</name>
60404                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
60405                  <value>#1</value>
60406                </enumeratedValue>
60407              </enumeratedValues>
60408            </field>
60409            <field>
60410              <name>SRE</name>
60411              <description>Slew Rate Enable</description>
60412              <bitOffset>2</bitOffset>
60413              <bitWidth>1</bitWidth>
60414              <access>read-write</access>
60415              <enumeratedValues>
60416                <enumeratedValue>
60417                  <name>0</name>
60418                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
60419                  <value>#0</value>
60420                </enumeratedValue>
60421                <enumeratedValue>
60422                  <name>1</name>
60423                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
60424                  <value>#1</value>
60425                </enumeratedValue>
60426              </enumeratedValues>
60427            </field>
60428            <field>
60429              <name>PFE</name>
60430              <description>Passive Filter Enable</description>
60431              <bitOffset>4</bitOffset>
60432              <bitWidth>1</bitWidth>
60433              <access>read-only</access>
60434              <enumeratedValues>
60435                <enumeratedValue>
60436                  <name>0</name>
60437                  <description>Passive input filter is disabled on the corresponding pin.</description>
60438                  <value>#0</value>
60439                </enumeratedValue>
60440                <enumeratedValue>
60441                  <name>1</name>
60442                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
60443                  <value>#1</value>
60444                </enumeratedValue>
60445              </enumeratedValues>
60446            </field>
60447            <field>
60448              <name>ODE</name>
60449              <description>Open Drain Enable</description>
60450              <bitOffset>5</bitOffset>
60451              <bitWidth>1</bitWidth>
60452              <access>read-write</access>
60453              <enumeratedValues>
60454                <enumeratedValue>
60455                  <name>0</name>
60456                  <description>Open drain output is disabled on the corresponding pin.</description>
60457                  <value>#0</value>
60458                </enumeratedValue>
60459                <enumeratedValue>
60460                  <name>1</name>
60461                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
60462                  <value>#1</value>
60463                </enumeratedValue>
60464              </enumeratedValues>
60465            </field>
60466            <field>
60467              <name>DSE</name>
60468              <description>Drive Strength Enable</description>
60469              <bitOffset>6</bitOffset>
60470              <bitWidth>1</bitWidth>
60471              <access>read-only</access>
60472              <enumeratedValues>
60473                <enumeratedValue>
60474                  <name>0</name>
60475                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
60476                  <value>#0</value>
60477                </enumeratedValue>
60478                <enumeratedValue>
60479                  <name>1</name>
60480                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
60481                  <value>#1</value>
60482                </enumeratedValue>
60483              </enumeratedValues>
60484            </field>
60485            <field>
60486              <name>MUX</name>
60487              <description>Pin Mux Control</description>
60488              <bitOffset>8</bitOffset>
60489              <bitWidth>3</bitWidth>
60490              <access>read-write</access>
60491              <enumeratedValues>
60492                <enumeratedValue>
60493                  <name>000</name>
60494                  <description>Pin disabled (Alternative 0) (analog).</description>
60495                  <value>#000</value>
60496                </enumeratedValue>
60497                <enumeratedValue>
60498                  <name>001</name>
60499                  <description>Alternative 1 (GPIO).</description>
60500                  <value>#001</value>
60501                </enumeratedValue>
60502                <enumeratedValue>
60503                  <name>010</name>
60504                  <description>Alternative 2 (chip-specific).</description>
60505                  <value>#010</value>
60506                </enumeratedValue>
60507                <enumeratedValue>
60508                  <name>011</name>
60509                  <description>Alternative 3 (chip-specific).</description>
60510                  <value>#011</value>
60511                </enumeratedValue>
60512                <enumeratedValue>
60513                  <name>100</name>
60514                  <description>Alternative 4 (chip-specific).</description>
60515                  <value>#100</value>
60516                </enumeratedValue>
60517                <enumeratedValue>
60518                  <name>101</name>
60519                  <description>Alternative 5 (chip-specific).</description>
60520                  <value>#101</value>
60521                </enumeratedValue>
60522                <enumeratedValue>
60523                  <name>110</name>
60524                  <description>Alternative 6 (chip-specific).</description>
60525                  <value>#110</value>
60526                </enumeratedValue>
60527                <enumeratedValue>
60528                  <name>111</name>
60529                  <description>Alternative 7 (chip-specific).</description>
60530                  <value>#111</value>
60531                </enumeratedValue>
60532              </enumeratedValues>
60533            </field>
60534            <field>
60535              <name>LK</name>
60536              <description>Lock Register</description>
60537              <bitOffset>15</bitOffset>
60538              <bitWidth>1</bitWidth>
60539              <access>read-write</access>
60540              <enumeratedValues>
60541                <enumeratedValue>
60542                  <name>0</name>
60543                  <description>Pin Control Register fields [15:0] are not locked.</description>
60544                  <value>#0</value>
60545                </enumeratedValue>
60546                <enumeratedValue>
60547                  <name>1</name>
60548                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
60549                  <value>#1</value>
60550                </enumeratedValue>
60551              </enumeratedValues>
60552            </field>
60553            <field>
60554              <name>IRQC</name>
60555              <description>Interrupt Configuration</description>
60556              <bitOffset>16</bitOffset>
60557              <bitWidth>4</bitWidth>
60558              <access>read-write</access>
60559              <enumeratedValues>
60560                <enumeratedValue>
60561                  <name>0000</name>
60562                  <description>Interrupt Status Flag (ISF) is disabled.</description>
60563                  <value>#0000</value>
60564                </enumeratedValue>
60565                <enumeratedValue>
60566                  <name>0001</name>
60567                  <description>ISF flag and DMA request on rising edge.</description>
60568                  <value>#0001</value>
60569                </enumeratedValue>
60570                <enumeratedValue>
60571                  <name>0010</name>
60572                  <description>ISF flag and DMA request on falling edge.</description>
60573                  <value>#0010</value>
60574                </enumeratedValue>
60575                <enumeratedValue>
60576                  <name>0011</name>
60577                  <description>ISF flag and DMA request on either edge.</description>
60578                  <value>#0011</value>
60579                </enumeratedValue>
60580                <enumeratedValue>
60581                  <name>1000</name>
60582                  <description>ISF flag and Interrupt when logic 0.</description>
60583                  <value>#1000</value>
60584                </enumeratedValue>
60585                <enumeratedValue>
60586                  <name>1001</name>
60587                  <description>ISF flag and Interrupt on rising-edge.</description>
60588                  <value>#1001</value>
60589                </enumeratedValue>
60590                <enumeratedValue>
60591                  <name>1010</name>
60592                  <description>ISF flag and Interrupt on falling-edge.</description>
60593                  <value>#1010</value>
60594                </enumeratedValue>
60595                <enumeratedValue>
60596                  <name>1011</name>
60597                  <description>ISF flag and Interrupt on either edge.</description>
60598                  <value>#1011</value>
60599                </enumeratedValue>
60600                <enumeratedValue>
60601                  <name>1100</name>
60602                  <description>ISF flag and Interrupt when logic 1.</description>
60603                  <value>#1100</value>
60604                </enumeratedValue>
60605              </enumeratedValues>
60606            </field>
60607            <field>
60608              <name>ISF</name>
60609              <description>Interrupt Status Flag</description>
60610              <bitOffset>24</bitOffset>
60611              <bitWidth>1</bitWidth>
60612              <access>read-write</access>
60613              <enumeratedValues>
60614                <enumeratedValue>
60615                  <name>0</name>
60616                  <description>Configured interrupt is not detected.</description>
60617                  <value>#0</value>
60618                </enumeratedValue>
60619                <enumeratedValue>
60620                  <name>1</name>
60621                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
60622                  <value>#1</value>
60623                </enumeratedValue>
60624              </enumeratedValues>
60625            </field>
60626          </fields>
60627        </register>
60628        <register>
60629          <name>PCR14</name>
60630          <description>Pin Control Register n</description>
60631          <addressOffset>0x38</addressOffset>
60632          <size>32</size>
60633          <access>read-write</access>
60634          <resetValue>0</resetValue>
60635          <resetMask>0xFFFFFFFF</resetMask>
60636          <fields>
60637            <field>
60638              <name>PS</name>
60639              <description>Pull Select</description>
60640              <bitOffset>0</bitOffset>
60641              <bitWidth>1</bitWidth>
60642              <access>read-write</access>
60643              <enumeratedValues>
60644                <enumeratedValue>
60645                  <name>0</name>
60646                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
60647                  <value>#0</value>
60648                </enumeratedValue>
60649                <enumeratedValue>
60650                  <name>1</name>
60651                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
60652                  <value>#1</value>
60653                </enumeratedValue>
60654              </enumeratedValues>
60655            </field>
60656            <field>
60657              <name>PE</name>
60658              <description>Pull Enable</description>
60659              <bitOffset>1</bitOffset>
60660              <bitWidth>1</bitWidth>
60661              <access>read-write</access>
60662              <enumeratedValues>
60663                <enumeratedValue>
60664                  <name>0</name>
60665                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
60666                  <value>#0</value>
60667                </enumeratedValue>
60668                <enumeratedValue>
60669                  <name>1</name>
60670                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
60671                  <value>#1</value>
60672                </enumeratedValue>
60673              </enumeratedValues>
60674            </field>
60675            <field>
60676              <name>SRE</name>
60677              <description>Slew Rate Enable</description>
60678              <bitOffset>2</bitOffset>
60679              <bitWidth>1</bitWidth>
60680              <access>read-write</access>
60681              <enumeratedValues>
60682                <enumeratedValue>
60683                  <name>0</name>
60684                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
60685                  <value>#0</value>
60686                </enumeratedValue>
60687                <enumeratedValue>
60688                  <name>1</name>
60689                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
60690                  <value>#1</value>
60691                </enumeratedValue>
60692              </enumeratedValues>
60693            </field>
60694            <field>
60695              <name>PFE</name>
60696              <description>Passive Filter Enable</description>
60697              <bitOffset>4</bitOffset>
60698              <bitWidth>1</bitWidth>
60699              <access>read-only</access>
60700              <enumeratedValues>
60701                <enumeratedValue>
60702                  <name>0</name>
60703                  <description>Passive input filter is disabled on the corresponding pin.</description>
60704                  <value>#0</value>
60705                </enumeratedValue>
60706                <enumeratedValue>
60707                  <name>1</name>
60708                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
60709                  <value>#1</value>
60710                </enumeratedValue>
60711              </enumeratedValues>
60712            </field>
60713            <field>
60714              <name>ODE</name>
60715              <description>Open Drain Enable</description>
60716              <bitOffset>5</bitOffset>
60717              <bitWidth>1</bitWidth>
60718              <access>read-write</access>
60719              <enumeratedValues>
60720                <enumeratedValue>
60721                  <name>0</name>
60722                  <description>Open drain output is disabled on the corresponding pin.</description>
60723                  <value>#0</value>
60724                </enumeratedValue>
60725                <enumeratedValue>
60726                  <name>1</name>
60727                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
60728                  <value>#1</value>
60729                </enumeratedValue>
60730              </enumeratedValues>
60731            </field>
60732            <field>
60733              <name>DSE</name>
60734              <description>Drive Strength Enable</description>
60735              <bitOffset>6</bitOffset>
60736              <bitWidth>1</bitWidth>
60737              <access>read-only</access>
60738              <enumeratedValues>
60739                <enumeratedValue>
60740                  <name>0</name>
60741                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
60742                  <value>#0</value>
60743                </enumeratedValue>
60744                <enumeratedValue>
60745                  <name>1</name>
60746                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
60747                  <value>#1</value>
60748                </enumeratedValue>
60749              </enumeratedValues>
60750            </field>
60751            <field>
60752              <name>MUX</name>
60753              <description>Pin Mux Control</description>
60754              <bitOffset>8</bitOffset>
60755              <bitWidth>3</bitWidth>
60756              <access>read-write</access>
60757              <enumeratedValues>
60758                <enumeratedValue>
60759                  <name>000</name>
60760                  <description>Pin disabled (Alternative 0) (analog).</description>
60761                  <value>#000</value>
60762                </enumeratedValue>
60763                <enumeratedValue>
60764                  <name>001</name>
60765                  <description>Alternative 1 (GPIO).</description>
60766                  <value>#001</value>
60767                </enumeratedValue>
60768                <enumeratedValue>
60769                  <name>010</name>
60770                  <description>Alternative 2 (chip-specific).</description>
60771                  <value>#010</value>
60772                </enumeratedValue>
60773                <enumeratedValue>
60774                  <name>011</name>
60775                  <description>Alternative 3 (chip-specific).</description>
60776                  <value>#011</value>
60777                </enumeratedValue>
60778                <enumeratedValue>
60779                  <name>100</name>
60780                  <description>Alternative 4 (chip-specific).</description>
60781                  <value>#100</value>
60782                </enumeratedValue>
60783                <enumeratedValue>
60784                  <name>101</name>
60785                  <description>Alternative 5 (chip-specific).</description>
60786                  <value>#101</value>
60787                </enumeratedValue>
60788                <enumeratedValue>
60789                  <name>110</name>
60790                  <description>Alternative 6 (chip-specific).</description>
60791                  <value>#110</value>
60792                </enumeratedValue>
60793                <enumeratedValue>
60794                  <name>111</name>
60795                  <description>Alternative 7 (chip-specific).</description>
60796                  <value>#111</value>
60797                </enumeratedValue>
60798              </enumeratedValues>
60799            </field>
60800            <field>
60801              <name>LK</name>
60802              <description>Lock Register</description>
60803              <bitOffset>15</bitOffset>
60804              <bitWidth>1</bitWidth>
60805              <access>read-write</access>
60806              <enumeratedValues>
60807                <enumeratedValue>
60808                  <name>0</name>
60809                  <description>Pin Control Register fields [15:0] are not locked.</description>
60810                  <value>#0</value>
60811                </enumeratedValue>
60812                <enumeratedValue>
60813                  <name>1</name>
60814                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
60815                  <value>#1</value>
60816                </enumeratedValue>
60817              </enumeratedValues>
60818            </field>
60819            <field>
60820              <name>IRQC</name>
60821              <description>Interrupt Configuration</description>
60822              <bitOffset>16</bitOffset>
60823              <bitWidth>4</bitWidth>
60824              <access>read-write</access>
60825              <enumeratedValues>
60826                <enumeratedValue>
60827                  <name>0000</name>
60828                  <description>Interrupt Status Flag (ISF) is disabled.</description>
60829                  <value>#0000</value>
60830                </enumeratedValue>
60831                <enumeratedValue>
60832                  <name>0001</name>
60833                  <description>ISF flag and DMA request on rising edge.</description>
60834                  <value>#0001</value>
60835                </enumeratedValue>
60836                <enumeratedValue>
60837                  <name>0010</name>
60838                  <description>ISF flag and DMA request on falling edge.</description>
60839                  <value>#0010</value>
60840                </enumeratedValue>
60841                <enumeratedValue>
60842                  <name>0011</name>
60843                  <description>ISF flag and DMA request on either edge.</description>
60844                  <value>#0011</value>
60845                </enumeratedValue>
60846                <enumeratedValue>
60847                  <name>1000</name>
60848                  <description>ISF flag and Interrupt when logic 0.</description>
60849                  <value>#1000</value>
60850                </enumeratedValue>
60851                <enumeratedValue>
60852                  <name>1001</name>
60853                  <description>ISF flag and Interrupt on rising-edge.</description>
60854                  <value>#1001</value>
60855                </enumeratedValue>
60856                <enumeratedValue>
60857                  <name>1010</name>
60858                  <description>ISF flag and Interrupt on falling-edge.</description>
60859                  <value>#1010</value>
60860                </enumeratedValue>
60861                <enumeratedValue>
60862                  <name>1011</name>
60863                  <description>ISF flag and Interrupt on either edge.</description>
60864                  <value>#1011</value>
60865                </enumeratedValue>
60866                <enumeratedValue>
60867                  <name>1100</name>
60868                  <description>ISF flag and Interrupt when logic 1.</description>
60869                  <value>#1100</value>
60870                </enumeratedValue>
60871              </enumeratedValues>
60872            </field>
60873            <field>
60874              <name>ISF</name>
60875              <description>Interrupt Status Flag</description>
60876              <bitOffset>24</bitOffset>
60877              <bitWidth>1</bitWidth>
60878              <access>read-write</access>
60879              <enumeratedValues>
60880                <enumeratedValue>
60881                  <name>0</name>
60882                  <description>Configured interrupt is not detected.</description>
60883                  <value>#0</value>
60884                </enumeratedValue>
60885                <enumeratedValue>
60886                  <name>1</name>
60887                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
60888                  <value>#1</value>
60889                </enumeratedValue>
60890              </enumeratedValues>
60891            </field>
60892          </fields>
60893        </register>
60894        <register>
60895          <name>PCR15</name>
60896          <description>Pin Control Register n</description>
60897          <addressOffset>0x3C</addressOffset>
60898          <size>32</size>
60899          <access>read-write</access>
60900          <resetValue>0</resetValue>
60901          <resetMask>0xFFFFFFFF</resetMask>
60902          <fields>
60903            <field>
60904              <name>PS</name>
60905              <description>Pull Select</description>
60906              <bitOffset>0</bitOffset>
60907              <bitWidth>1</bitWidth>
60908              <access>read-write</access>
60909              <enumeratedValues>
60910                <enumeratedValue>
60911                  <name>0</name>
60912                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
60913                  <value>#0</value>
60914                </enumeratedValue>
60915                <enumeratedValue>
60916                  <name>1</name>
60917                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
60918                  <value>#1</value>
60919                </enumeratedValue>
60920              </enumeratedValues>
60921            </field>
60922            <field>
60923              <name>PE</name>
60924              <description>Pull Enable</description>
60925              <bitOffset>1</bitOffset>
60926              <bitWidth>1</bitWidth>
60927              <access>read-write</access>
60928              <enumeratedValues>
60929                <enumeratedValue>
60930                  <name>0</name>
60931                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
60932                  <value>#0</value>
60933                </enumeratedValue>
60934                <enumeratedValue>
60935                  <name>1</name>
60936                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
60937                  <value>#1</value>
60938                </enumeratedValue>
60939              </enumeratedValues>
60940            </field>
60941            <field>
60942              <name>SRE</name>
60943              <description>Slew Rate Enable</description>
60944              <bitOffset>2</bitOffset>
60945              <bitWidth>1</bitWidth>
60946              <access>read-write</access>
60947              <enumeratedValues>
60948                <enumeratedValue>
60949                  <name>0</name>
60950                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
60951                  <value>#0</value>
60952                </enumeratedValue>
60953                <enumeratedValue>
60954                  <name>1</name>
60955                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
60956                  <value>#1</value>
60957                </enumeratedValue>
60958              </enumeratedValues>
60959            </field>
60960            <field>
60961              <name>PFE</name>
60962              <description>Passive Filter Enable</description>
60963              <bitOffset>4</bitOffset>
60964              <bitWidth>1</bitWidth>
60965              <access>read-only</access>
60966              <enumeratedValues>
60967                <enumeratedValue>
60968                  <name>0</name>
60969                  <description>Passive input filter is disabled on the corresponding pin.</description>
60970                  <value>#0</value>
60971                </enumeratedValue>
60972                <enumeratedValue>
60973                  <name>1</name>
60974                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
60975                  <value>#1</value>
60976                </enumeratedValue>
60977              </enumeratedValues>
60978            </field>
60979            <field>
60980              <name>ODE</name>
60981              <description>Open Drain Enable</description>
60982              <bitOffset>5</bitOffset>
60983              <bitWidth>1</bitWidth>
60984              <access>read-write</access>
60985              <enumeratedValues>
60986                <enumeratedValue>
60987                  <name>0</name>
60988                  <description>Open drain output is disabled on the corresponding pin.</description>
60989                  <value>#0</value>
60990                </enumeratedValue>
60991                <enumeratedValue>
60992                  <name>1</name>
60993                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
60994                  <value>#1</value>
60995                </enumeratedValue>
60996              </enumeratedValues>
60997            </field>
60998            <field>
60999              <name>DSE</name>
61000              <description>Drive Strength Enable</description>
61001              <bitOffset>6</bitOffset>
61002              <bitWidth>1</bitWidth>
61003              <access>read-only</access>
61004              <enumeratedValues>
61005                <enumeratedValue>
61006                  <name>0</name>
61007                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
61008                  <value>#0</value>
61009                </enumeratedValue>
61010                <enumeratedValue>
61011                  <name>1</name>
61012                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
61013                  <value>#1</value>
61014                </enumeratedValue>
61015              </enumeratedValues>
61016            </field>
61017            <field>
61018              <name>MUX</name>
61019              <description>Pin Mux Control</description>
61020              <bitOffset>8</bitOffset>
61021              <bitWidth>3</bitWidth>
61022              <access>read-write</access>
61023              <enumeratedValues>
61024                <enumeratedValue>
61025                  <name>000</name>
61026                  <description>Pin disabled (Alternative 0) (analog).</description>
61027                  <value>#000</value>
61028                </enumeratedValue>
61029                <enumeratedValue>
61030                  <name>001</name>
61031                  <description>Alternative 1 (GPIO).</description>
61032                  <value>#001</value>
61033                </enumeratedValue>
61034                <enumeratedValue>
61035                  <name>010</name>
61036                  <description>Alternative 2 (chip-specific).</description>
61037                  <value>#010</value>
61038                </enumeratedValue>
61039                <enumeratedValue>
61040                  <name>011</name>
61041                  <description>Alternative 3 (chip-specific).</description>
61042                  <value>#011</value>
61043                </enumeratedValue>
61044                <enumeratedValue>
61045                  <name>100</name>
61046                  <description>Alternative 4 (chip-specific).</description>
61047                  <value>#100</value>
61048                </enumeratedValue>
61049                <enumeratedValue>
61050                  <name>101</name>
61051                  <description>Alternative 5 (chip-specific).</description>
61052                  <value>#101</value>
61053                </enumeratedValue>
61054                <enumeratedValue>
61055                  <name>110</name>
61056                  <description>Alternative 6 (chip-specific).</description>
61057                  <value>#110</value>
61058                </enumeratedValue>
61059                <enumeratedValue>
61060                  <name>111</name>
61061                  <description>Alternative 7 (chip-specific).</description>
61062                  <value>#111</value>
61063                </enumeratedValue>
61064              </enumeratedValues>
61065            </field>
61066            <field>
61067              <name>LK</name>
61068              <description>Lock Register</description>
61069              <bitOffset>15</bitOffset>
61070              <bitWidth>1</bitWidth>
61071              <access>read-write</access>
61072              <enumeratedValues>
61073                <enumeratedValue>
61074                  <name>0</name>
61075                  <description>Pin Control Register fields [15:0] are not locked.</description>
61076                  <value>#0</value>
61077                </enumeratedValue>
61078                <enumeratedValue>
61079                  <name>1</name>
61080                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
61081                  <value>#1</value>
61082                </enumeratedValue>
61083              </enumeratedValues>
61084            </field>
61085            <field>
61086              <name>IRQC</name>
61087              <description>Interrupt Configuration</description>
61088              <bitOffset>16</bitOffset>
61089              <bitWidth>4</bitWidth>
61090              <access>read-write</access>
61091              <enumeratedValues>
61092                <enumeratedValue>
61093                  <name>0000</name>
61094                  <description>Interrupt Status Flag (ISF) is disabled.</description>
61095                  <value>#0000</value>
61096                </enumeratedValue>
61097                <enumeratedValue>
61098                  <name>0001</name>
61099                  <description>ISF flag and DMA request on rising edge.</description>
61100                  <value>#0001</value>
61101                </enumeratedValue>
61102                <enumeratedValue>
61103                  <name>0010</name>
61104                  <description>ISF flag and DMA request on falling edge.</description>
61105                  <value>#0010</value>
61106                </enumeratedValue>
61107                <enumeratedValue>
61108                  <name>0011</name>
61109                  <description>ISF flag and DMA request on either edge.</description>
61110                  <value>#0011</value>
61111                </enumeratedValue>
61112                <enumeratedValue>
61113                  <name>1000</name>
61114                  <description>ISF flag and Interrupt when logic 0.</description>
61115                  <value>#1000</value>
61116                </enumeratedValue>
61117                <enumeratedValue>
61118                  <name>1001</name>
61119                  <description>ISF flag and Interrupt on rising-edge.</description>
61120                  <value>#1001</value>
61121                </enumeratedValue>
61122                <enumeratedValue>
61123                  <name>1010</name>
61124                  <description>ISF flag and Interrupt on falling-edge.</description>
61125                  <value>#1010</value>
61126                </enumeratedValue>
61127                <enumeratedValue>
61128                  <name>1011</name>
61129                  <description>ISF flag and Interrupt on either edge.</description>
61130                  <value>#1011</value>
61131                </enumeratedValue>
61132                <enumeratedValue>
61133                  <name>1100</name>
61134                  <description>ISF flag and Interrupt when logic 1.</description>
61135                  <value>#1100</value>
61136                </enumeratedValue>
61137              </enumeratedValues>
61138            </field>
61139            <field>
61140              <name>ISF</name>
61141              <description>Interrupt Status Flag</description>
61142              <bitOffset>24</bitOffset>
61143              <bitWidth>1</bitWidth>
61144              <access>read-write</access>
61145              <enumeratedValues>
61146                <enumeratedValue>
61147                  <name>0</name>
61148                  <description>Configured interrupt is not detected.</description>
61149                  <value>#0</value>
61150                </enumeratedValue>
61151                <enumeratedValue>
61152                  <name>1</name>
61153                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
61154                  <value>#1</value>
61155                </enumeratedValue>
61156              </enumeratedValues>
61157            </field>
61158          </fields>
61159        </register>
61160        <register>
61161          <name>PCR16</name>
61162          <description>Pin Control Register n</description>
61163          <addressOffset>0x40</addressOffset>
61164          <size>32</size>
61165          <access>read-write</access>
61166          <resetValue>0</resetValue>
61167          <resetMask>0xFFFFFFFF</resetMask>
61168          <fields>
61169            <field>
61170              <name>PS</name>
61171              <description>Pull Select</description>
61172              <bitOffset>0</bitOffset>
61173              <bitWidth>1</bitWidth>
61174              <access>read-write</access>
61175              <enumeratedValues>
61176                <enumeratedValue>
61177                  <name>0</name>
61178                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
61179                  <value>#0</value>
61180                </enumeratedValue>
61181                <enumeratedValue>
61182                  <name>1</name>
61183                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
61184                  <value>#1</value>
61185                </enumeratedValue>
61186              </enumeratedValues>
61187            </field>
61188            <field>
61189              <name>PE</name>
61190              <description>Pull Enable</description>
61191              <bitOffset>1</bitOffset>
61192              <bitWidth>1</bitWidth>
61193              <access>read-write</access>
61194              <enumeratedValues>
61195                <enumeratedValue>
61196                  <name>0</name>
61197                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
61198                  <value>#0</value>
61199                </enumeratedValue>
61200                <enumeratedValue>
61201                  <name>1</name>
61202                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
61203                  <value>#1</value>
61204                </enumeratedValue>
61205              </enumeratedValues>
61206            </field>
61207            <field>
61208              <name>SRE</name>
61209              <description>Slew Rate Enable</description>
61210              <bitOffset>2</bitOffset>
61211              <bitWidth>1</bitWidth>
61212              <access>read-write</access>
61213              <enumeratedValues>
61214                <enumeratedValue>
61215                  <name>0</name>
61216                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
61217                  <value>#0</value>
61218                </enumeratedValue>
61219                <enumeratedValue>
61220                  <name>1</name>
61221                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
61222                  <value>#1</value>
61223                </enumeratedValue>
61224              </enumeratedValues>
61225            </field>
61226            <field>
61227              <name>PFE</name>
61228              <description>Passive Filter Enable</description>
61229              <bitOffset>4</bitOffset>
61230              <bitWidth>1</bitWidth>
61231              <access>read-only</access>
61232              <enumeratedValues>
61233                <enumeratedValue>
61234                  <name>0</name>
61235                  <description>Passive input filter is disabled on the corresponding pin.</description>
61236                  <value>#0</value>
61237                </enumeratedValue>
61238                <enumeratedValue>
61239                  <name>1</name>
61240                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
61241                  <value>#1</value>
61242                </enumeratedValue>
61243              </enumeratedValues>
61244            </field>
61245            <field>
61246              <name>ODE</name>
61247              <description>Open Drain Enable</description>
61248              <bitOffset>5</bitOffset>
61249              <bitWidth>1</bitWidth>
61250              <access>read-write</access>
61251              <enumeratedValues>
61252                <enumeratedValue>
61253                  <name>0</name>
61254                  <description>Open drain output is disabled on the corresponding pin.</description>
61255                  <value>#0</value>
61256                </enumeratedValue>
61257                <enumeratedValue>
61258                  <name>1</name>
61259                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
61260                  <value>#1</value>
61261                </enumeratedValue>
61262              </enumeratedValues>
61263            </field>
61264            <field>
61265              <name>DSE</name>
61266              <description>Drive Strength Enable</description>
61267              <bitOffset>6</bitOffset>
61268              <bitWidth>1</bitWidth>
61269              <access>read-only</access>
61270              <enumeratedValues>
61271                <enumeratedValue>
61272                  <name>0</name>
61273                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
61274                  <value>#0</value>
61275                </enumeratedValue>
61276                <enumeratedValue>
61277                  <name>1</name>
61278                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
61279                  <value>#1</value>
61280                </enumeratedValue>
61281              </enumeratedValues>
61282            </field>
61283            <field>
61284              <name>MUX</name>
61285              <description>Pin Mux Control</description>
61286              <bitOffset>8</bitOffset>
61287              <bitWidth>3</bitWidth>
61288              <access>read-write</access>
61289              <enumeratedValues>
61290                <enumeratedValue>
61291                  <name>000</name>
61292                  <description>Pin disabled (Alternative 0) (analog).</description>
61293                  <value>#000</value>
61294                </enumeratedValue>
61295                <enumeratedValue>
61296                  <name>001</name>
61297                  <description>Alternative 1 (GPIO).</description>
61298                  <value>#001</value>
61299                </enumeratedValue>
61300                <enumeratedValue>
61301                  <name>010</name>
61302                  <description>Alternative 2 (chip-specific).</description>
61303                  <value>#010</value>
61304                </enumeratedValue>
61305                <enumeratedValue>
61306                  <name>011</name>
61307                  <description>Alternative 3 (chip-specific).</description>
61308                  <value>#011</value>
61309                </enumeratedValue>
61310                <enumeratedValue>
61311                  <name>100</name>
61312                  <description>Alternative 4 (chip-specific).</description>
61313                  <value>#100</value>
61314                </enumeratedValue>
61315                <enumeratedValue>
61316                  <name>101</name>
61317                  <description>Alternative 5 (chip-specific).</description>
61318                  <value>#101</value>
61319                </enumeratedValue>
61320                <enumeratedValue>
61321                  <name>110</name>
61322                  <description>Alternative 6 (chip-specific).</description>
61323                  <value>#110</value>
61324                </enumeratedValue>
61325                <enumeratedValue>
61326                  <name>111</name>
61327                  <description>Alternative 7 (chip-specific).</description>
61328                  <value>#111</value>
61329                </enumeratedValue>
61330              </enumeratedValues>
61331            </field>
61332            <field>
61333              <name>LK</name>
61334              <description>Lock Register</description>
61335              <bitOffset>15</bitOffset>
61336              <bitWidth>1</bitWidth>
61337              <access>read-write</access>
61338              <enumeratedValues>
61339                <enumeratedValue>
61340                  <name>0</name>
61341                  <description>Pin Control Register fields [15:0] are not locked.</description>
61342                  <value>#0</value>
61343                </enumeratedValue>
61344                <enumeratedValue>
61345                  <name>1</name>
61346                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
61347                  <value>#1</value>
61348                </enumeratedValue>
61349              </enumeratedValues>
61350            </field>
61351            <field>
61352              <name>IRQC</name>
61353              <description>Interrupt Configuration</description>
61354              <bitOffset>16</bitOffset>
61355              <bitWidth>4</bitWidth>
61356              <access>read-write</access>
61357              <enumeratedValues>
61358                <enumeratedValue>
61359                  <name>0000</name>
61360                  <description>Interrupt Status Flag (ISF) is disabled.</description>
61361                  <value>#0000</value>
61362                </enumeratedValue>
61363                <enumeratedValue>
61364                  <name>0001</name>
61365                  <description>ISF flag and DMA request on rising edge.</description>
61366                  <value>#0001</value>
61367                </enumeratedValue>
61368                <enumeratedValue>
61369                  <name>0010</name>
61370                  <description>ISF flag and DMA request on falling edge.</description>
61371                  <value>#0010</value>
61372                </enumeratedValue>
61373                <enumeratedValue>
61374                  <name>0011</name>
61375                  <description>ISF flag and DMA request on either edge.</description>
61376                  <value>#0011</value>
61377                </enumeratedValue>
61378                <enumeratedValue>
61379                  <name>1000</name>
61380                  <description>ISF flag and Interrupt when logic 0.</description>
61381                  <value>#1000</value>
61382                </enumeratedValue>
61383                <enumeratedValue>
61384                  <name>1001</name>
61385                  <description>ISF flag and Interrupt on rising-edge.</description>
61386                  <value>#1001</value>
61387                </enumeratedValue>
61388                <enumeratedValue>
61389                  <name>1010</name>
61390                  <description>ISF flag and Interrupt on falling-edge.</description>
61391                  <value>#1010</value>
61392                </enumeratedValue>
61393                <enumeratedValue>
61394                  <name>1011</name>
61395                  <description>ISF flag and Interrupt on either edge.</description>
61396                  <value>#1011</value>
61397                </enumeratedValue>
61398                <enumeratedValue>
61399                  <name>1100</name>
61400                  <description>ISF flag and Interrupt when logic 1.</description>
61401                  <value>#1100</value>
61402                </enumeratedValue>
61403              </enumeratedValues>
61404            </field>
61405            <field>
61406              <name>ISF</name>
61407              <description>Interrupt Status Flag</description>
61408              <bitOffset>24</bitOffset>
61409              <bitWidth>1</bitWidth>
61410              <access>read-write</access>
61411              <enumeratedValues>
61412                <enumeratedValue>
61413                  <name>0</name>
61414                  <description>Configured interrupt is not detected.</description>
61415                  <value>#0</value>
61416                </enumeratedValue>
61417                <enumeratedValue>
61418                  <name>1</name>
61419                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
61420                  <value>#1</value>
61421                </enumeratedValue>
61422              </enumeratedValues>
61423            </field>
61424          </fields>
61425        </register>
61426        <register>
61427          <name>PCR17</name>
61428          <description>Pin Control Register n</description>
61429          <addressOffset>0x44</addressOffset>
61430          <size>32</size>
61431          <access>read-write</access>
61432          <resetValue>0</resetValue>
61433          <resetMask>0xFFFFFFFF</resetMask>
61434          <fields>
61435            <field>
61436              <name>PS</name>
61437              <description>Pull Select</description>
61438              <bitOffset>0</bitOffset>
61439              <bitWidth>1</bitWidth>
61440              <access>read-write</access>
61441              <enumeratedValues>
61442                <enumeratedValue>
61443                  <name>0</name>
61444                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
61445                  <value>#0</value>
61446                </enumeratedValue>
61447                <enumeratedValue>
61448                  <name>1</name>
61449                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
61450                  <value>#1</value>
61451                </enumeratedValue>
61452              </enumeratedValues>
61453            </field>
61454            <field>
61455              <name>PE</name>
61456              <description>Pull Enable</description>
61457              <bitOffset>1</bitOffset>
61458              <bitWidth>1</bitWidth>
61459              <access>read-write</access>
61460              <enumeratedValues>
61461                <enumeratedValue>
61462                  <name>0</name>
61463                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
61464                  <value>#0</value>
61465                </enumeratedValue>
61466                <enumeratedValue>
61467                  <name>1</name>
61468                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
61469                  <value>#1</value>
61470                </enumeratedValue>
61471              </enumeratedValues>
61472            </field>
61473            <field>
61474              <name>SRE</name>
61475              <description>Slew Rate Enable</description>
61476              <bitOffset>2</bitOffset>
61477              <bitWidth>1</bitWidth>
61478              <access>read-write</access>
61479              <enumeratedValues>
61480                <enumeratedValue>
61481                  <name>0</name>
61482                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
61483                  <value>#0</value>
61484                </enumeratedValue>
61485                <enumeratedValue>
61486                  <name>1</name>
61487                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
61488                  <value>#1</value>
61489                </enumeratedValue>
61490              </enumeratedValues>
61491            </field>
61492            <field>
61493              <name>PFE</name>
61494              <description>Passive Filter Enable</description>
61495              <bitOffset>4</bitOffset>
61496              <bitWidth>1</bitWidth>
61497              <access>read-only</access>
61498              <enumeratedValues>
61499                <enumeratedValue>
61500                  <name>0</name>
61501                  <description>Passive input filter is disabled on the corresponding pin.</description>
61502                  <value>#0</value>
61503                </enumeratedValue>
61504                <enumeratedValue>
61505                  <name>1</name>
61506                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
61507                  <value>#1</value>
61508                </enumeratedValue>
61509              </enumeratedValues>
61510            </field>
61511            <field>
61512              <name>ODE</name>
61513              <description>Open Drain Enable</description>
61514              <bitOffset>5</bitOffset>
61515              <bitWidth>1</bitWidth>
61516              <access>read-write</access>
61517              <enumeratedValues>
61518                <enumeratedValue>
61519                  <name>0</name>
61520                  <description>Open drain output is disabled on the corresponding pin.</description>
61521                  <value>#0</value>
61522                </enumeratedValue>
61523                <enumeratedValue>
61524                  <name>1</name>
61525                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
61526                  <value>#1</value>
61527                </enumeratedValue>
61528              </enumeratedValues>
61529            </field>
61530            <field>
61531              <name>DSE</name>
61532              <description>Drive Strength Enable</description>
61533              <bitOffset>6</bitOffset>
61534              <bitWidth>1</bitWidth>
61535              <access>read-only</access>
61536              <enumeratedValues>
61537                <enumeratedValue>
61538                  <name>0</name>
61539                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
61540                  <value>#0</value>
61541                </enumeratedValue>
61542                <enumeratedValue>
61543                  <name>1</name>
61544                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
61545                  <value>#1</value>
61546                </enumeratedValue>
61547              </enumeratedValues>
61548            </field>
61549            <field>
61550              <name>MUX</name>
61551              <description>Pin Mux Control</description>
61552              <bitOffset>8</bitOffset>
61553              <bitWidth>3</bitWidth>
61554              <access>read-write</access>
61555              <enumeratedValues>
61556                <enumeratedValue>
61557                  <name>000</name>
61558                  <description>Pin disabled (Alternative 0) (analog).</description>
61559                  <value>#000</value>
61560                </enumeratedValue>
61561                <enumeratedValue>
61562                  <name>001</name>
61563                  <description>Alternative 1 (GPIO).</description>
61564                  <value>#001</value>
61565                </enumeratedValue>
61566                <enumeratedValue>
61567                  <name>010</name>
61568                  <description>Alternative 2 (chip-specific).</description>
61569                  <value>#010</value>
61570                </enumeratedValue>
61571                <enumeratedValue>
61572                  <name>011</name>
61573                  <description>Alternative 3 (chip-specific).</description>
61574                  <value>#011</value>
61575                </enumeratedValue>
61576                <enumeratedValue>
61577                  <name>100</name>
61578                  <description>Alternative 4 (chip-specific).</description>
61579                  <value>#100</value>
61580                </enumeratedValue>
61581                <enumeratedValue>
61582                  <name>101</name>
61583                  <description>Alternative 5 (chip-specific).</description>
61584                  <value>#101</value>
61585                </enumeratedValue>
61586                <enumeratedValue>
61587                  <name>110</name>
61588                  <description>Alternative 6 (chip-specific).</description>
61589                  <value>#110</value>
61590                </enumeratedValue>
61591                <enumeratedValue>
61592                  <name>111</name>
61593                  <description>Alternative 7 (chip-specific).</description>
61594                  <value>#111</value>
61595                </enumeratedValue>
61596              </enumeratedValues>
61597            </field>
61598            <field>
61599              <name>LK</name>
61600              <description>Lock Register</description>
61601              <bitOffset>15</bitOffset>
61602              <bitWidth>1</bitWidth>
61603              <access>read-write</access>
61604              <enumeratedValues>
61605                <enumeratedValue>
61606                  <name>0</name>
61607                  <description>Pin Control Register fields [15:0] are not locked.</description>
61608                  <value>#0</value>
61609                </enumeratedValue>
61610                <enumeratedValue>
61611                  <name>1</name>
61612                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
61613                  <value>#1</value>
61614                </enumeratedValue>
61615              </enumeratedValues>
61616            </field>
61617            <field>
61618              <name>IRQC</name>
61619              <description>Interrupt Configuration</description>
61620              <bitOffset>16</bitOffset>
61621              <bitWidth>4</bitWidth>
61622              <access>read-write</access>
61623              <enumeratedValues>
61624                <enumeratedValue>
61625                  <name>0000</name>
61626                  <description>Interrupt Status Flag (ISF) is disabled.</description>
61627                  <value>#0000</value>
61628                </enumeratedValue>
61629                <enumeratedValue>
61630                  <name>0001</name>
61631                  <description>ISF flag and DMA request on rising edge.</description>
61632                  <value>#0001</value>
61633                </enumeratedValue>
61634                <enumeratedValue>
61635                  <name>0010</name>
61636                  <description>ISF flag and DMA request on falling edge.</description>
61637                  <value>#0010</value>
61638                </enumeratedValue>
61639                <enumeratedValue>
61640                  <name>0011</name>
61641                  <description>ISF flag and DMA request on either edge.</description>
61642                  <value>#0011</value>
61643                </enumeratedValue>
61644                <enumeratedValue>
61645                  <name>1000</name>
61646                  <description>ISF flag and Interrupt when logic 0.</description>
61647                  <value>#1000</value>
61648                </enumeratedValue>
61649                <enumeratedValue>
61650                  <name>1001</name>
61651                  <description>ISF flag and Interrupt on rising-edge.</description>
61652                  <value>#1001</value>
61653                </enumeratedValue>
61654                <enumeratedValue>
61655                  <name>1010</name>
61656                  <description>ISF flag and Interrupt on falling-edge.</description>
61657                  <value>#1010</value>
61658                </enumeratedValue>
61659                <enumeratedValue>
61660                  <name>1011</name>
61661                  <description>ISF flag and Interrupt on either edge.</description>
61662                  <value>#1011</value>
61663                </enumeratedValue>
61664                <enumeratedValue>
61665                  <name>1100</name>
61666                  <description>ISF flag and Interrupt when logic 1.</description>
61667                  <value>#1100</value>
61668                </enumeratedValue>
61669              </enumeratedValues>
61670            </field>
61671            <field>
61672              <name>ISF</name>
61673              <description>Interrupt Status Flag</description>
61674              <bitOffset>24</bitOffset>
61675              <bitWidth>1</bitWidth>
61676              <access>read-write</access>
61677              <enumeratedValues>
61678                <enumeratedValue>
61679                  <name>0</name>
61680                  <description>Configured interrupt is not detected.</description>
61681                  <value>#0</value>
61682                </enumeratedValue>
61683                <enumeratedValue>
61684                  <name>1</name>
61685                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
61686                  <value>#1</value>
61687                </enumeratedValue>
61688              </enumeratedValues>
61689            </field>
61690          </fields>
61691        </register>
61692        <register>
61693          <name>PCR18</name>
61694          <description>Pin Control Register n</description>
61695          <addressOffset>0x48</addressOffset>
61696          <size>32</size>
61697          <access>read-write</access>
61698          <resetValue>0</resetValue>
61699          <resetMask>0xFFFFFFFF</resetMask>
61700          <fields>
61701            <field>
61702              <name>PS</name>
61703              <description>Pull Select</description>
61704              <bitOffset>0</bitOffset>
61705              <bitWidth>1</bitWidth>
61706              <access>read-write</access>
61707              <enumeratedValues>
61708                <enumeratedValue>
61709                  <name>0</name>
61710                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
61711                  <value>#0</value>
61712                </enumeratedValue>
61713                <enumeratedValue>
61714                  <name>1</name>
61715                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
61716                  <value>#1</value>
61717                </enumeratedValue>
61718              </enumeratedValues>
61719            </field>
61720            <field>
61721              <name>PE</name>
61722              <description>Pull Enable</description>
61723              <bitOffset>1</bitOffset>
61724              <bitWidth>1</bitWidth>
61725              <access>read-write</access>
61726              <enumeratedValues>
61727                <enumeratedValue>
61728                  <name>0</name>
61729                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
61730                  <value>#0</value>
61731                </enumeratedValue>
61732                <enumeratedValue>
61733                  <name>1</name>
61734                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
61735                  <value>#1</value>
61736                </enumeratedValue>
61737              </enumeratedValues>
61738            </field>
61739            <field>
61740              <name>SRE</name>
61741              <description>Slew Rate Enable</description>
61742              <bitOffset>2</bitOffset>
61743              <bitWidth>1</bitWidth>
61744              <access>read-write</access>
61745              <enumeratedValues>
61746                <enumeratedValue>
61747                  <name>0</name>
61748                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
61749                  <value>#0</value>
61750                </enumeratedValue>
61751                <enumeratedValue>
61752                  <name>1</name>
61753                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
61754                  <value>#1</value>
61755                </enumeratedValue>
61756              </enumeratedValues>
61757            </field>
61758            <field>
61759              <name>PFE</name>
61760              <description>Passive Filter Enable</description>
61761              <bitOffset>4</bitOffset>
61762              <bitWidth>1</bitWidth>
61763              <access>read-only</access>
61764              <enumeratedValues>
61765                <enumeratedValue>
61766                  <name>0</name>
61767                  <description>Passive input filter is disabled on the corresponding pin.</description>
61768                  <value>#0</value>
61769                </enumeratedValue>
61770                <enumeratedValue>
61771                  <name>1</name>
61772                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
61773                  <value>#1</value>
61774                </enumeratedValue>
61775              </enumeratedValues>
61776            </field>
61777            <field>
61778              <name>ODE</name>
61779              <description>Open Drain Enable</description>
61780              <bitOffset>5</bitOffset>
61781              <bitWidth>1</bitWidth>
61782              <access>read-write</access>
61783              <enumeratedValues>
61784                <enumeratedValue>
61785                  <name>0</name>
61786                  <description>Open drain output is disabled on the corresponding pin.</description>
61787                  <value>#0</value>
61788                </enumeratedValue>
61789                <enumeratedValue>
61790                  <name>1</name>
61791                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
61792                  <value>#1</value>
61793                </enumeratedValue>
61794              </enumeratedValues>
61795            </field>
61796            <field>
61797              <name>DSE</name>
61798              <description>Drive Strength Enable</description>
61799              <bitOffset>6</bitOffset>
61800              <bitWidth>1</bitWidth>
61801              <access>read-only</access>
61802              <enumeratedValues>
61803                <enumeratedValue>
61804                  <name>0</name>
61805                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
61806                  <value>#0</value>
61807                </enumeratedValue>
61808                <enumeratedValue>
61809                  <name>1</name>
61810                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
61811                  <value>#1</value>
61812                </enumeratedValue>
61813              </enumeratedValues>
61814            </field>
61815            <field>
61816              <name>MUX</name>
61817              <description>Pin Mux Control</description>
61818              <bitOffset>8</bitOffset>
61819              <bitWidth>3</bitWidth>
61820              <access>read-write</access>
61821              <enumeratedValues>
61822                <enumeratedValue>
61823                  <name>000</name>
61824                  <description>Pin disabled (Alternative 0) (analog).</description>
61825                  <value>#000</value>
61826                </enumeratedValue>
61827                <enumeratedValue>
61828                  <name>001</name>
61829                  <description>Alternative 1 (GPIO).</description>
61830                  <value>#001</value>
61831                </enumeratedValue>
61832                <enumeratedValue>
61833                  <name>010</name>
61834                  <description>Alternative 2 (chip-specific).</description>
61835                  <value>#010</value>
61836                </enumeratedValue>
61837                <enumeratedValue>
61838                  <name>011</name>
61839                  <description>Alternative 3 (chip-specific).</description>
61840                  <value>#011</value>
61841                </enumeratedValue>
61842                <enumeratedValue>
61843                  <name>100</name>
61844                  <description>Alternative 4 (chip-specific).</description>
61845                  <value>#100</value>
61846                </enumeratedValue>
61847                <enumeratedValue>
61848                  <name>101</name>
61849                  <description>Alternative 5 (chip-specific).</description>
61850                  <value>#101</value>
61851                </enumeratedValue>
61852                <enumeratedValue>
61853                  <name>110</name>
61854                  <description>Alternative 6 (chip-specific).</description>
61855                  <value>#110</value>
61856                </enumeratedValue>
61857                <enumeratedValue>
61858                  <name>111</name>
61859                  <description>Alternative 7 (chip-specific).</description>
61860                  <value>#111</value>
61861                </enumeratedValue>
61862              </enumeratedValues>
61863            </field>
61864            <field>
61865              <name>LK</name>
61866              <description>Lock Register</description>
61867              <bitOffset>15</bitOffset>
61868              <bitWidth>1</bitWidth>
61869              <access>read-write</access>
61870              <enumeratedValues>
61871                <enumeratedValue>
61872                  <name>0</name>
61873                  <description>Pin Control Register fields [15:0] are not locked.</description>
61874                  <value>#0</value>
61875                </enumeratedValue>
61876                <enumeratedValue>
61877                  <name>1</name>
61878                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
61879                  <value>#1</value>
61880                </enumeratedValue>
61881              </enumeratedValues>
61882            </field>
61883            <field>
61884              <name>IRQC</name>
61885              <description>Interrupt Configuration</description>
61886              <bitOffset>16</bitOffset>
61887              <bitWidth>4</bitWidth>
61888              <access>read-write</access>
61889              <enumeratedValues>
61890                <enumeratedValue>
61891                  <name>0000</name>
61892                  <description>Interrupt Status Flag (ISF) is disabled.</description>
61893                  <value>#0000</value>
61894                </enumeratedValue>
61895                <enumeratedValue>
61896                  <name>0001</name>
61897                  <description>ISF flag and DMA request on rising edge.</description>
61898                  <value>#0001</value>
61899                </enumeratedValue>
61900                <enumeratedValue>
61901                  <name>0010</name>
61902                  <description>ISF flag and DMA request on falling edge.</description>
61903                  <value>#0010</value>
61904                </enumeratedValue>
61905                <enumeratedValue>
61906                  <name>0011</name>
61907                  <description>ISF flag and DMA request on either edge.</description>
61908                  <value>#0011</value>
61909                </enumeratedValue>
61910                <enumeratedValue>
61911                  <name>1000</name>
61912                  <description>ISF flag and Interrupt when logic 0.</description>
61913                  <value>#1000</value>
61914                </enumeratedValue>
61915                <enumeratedValue>
61916                  <name>1001</name>
61917                  <description>ISF flag and Interrupt on rising-edge.</description>
61918                  <value>#1001</value>
61919                </enumeratedValue>
61920                <enumeratedValue>
61921                  <name>1010</name>
61922                  <description>ISF flag and Interrupt on falling-edge.</description>
61923                  <value>#1010</value>
61924                </enumeratedValue>
61925                <enumeratedValue>
61926                  <name>1011</name>
61927                  <description>ISF flag and Interrupt on either edge.</description>
61928                  <value>#1011</value>
61929                </enumeratedValue>
61930                <enumeratedValue>
61931                  <name>1100</name>
61932                  <description>ISF flag and Interrupt when logic 1.</description>
61933                  <value>#1100</value>
61934                </enumeratedValue>
61935              </enumeratedValues>
61936            </field>
61937            <field>
61938              <name>ISF</name>
61939              <description>Interrupt Status Flag</description>
61940              <bitOffset>24</bitOffset>
61941              <bitWidth>1</bitWidth>
61942              <access>read-write</access>
61943              <enumeratedValues>
61944                <enumeratedValue>
61945                  <name>0</name>
61946                  <description>Configured interrupt is not detected.</description>
61947                  <value>#0</value>
61948                </enumeratedValue>
61949                <enumeratedValue>
61950                  <name>1</name>
61951                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
61952                  <value>#1</value>
61953                </enumeratedValue>
61954              </enumeratedValues>
61955            </field>
61956          </fields>
61957        </register>
61958        <register>
61959          <name>PCR19</name>
61960          <description>Pin Control Register n</description>
61961          <addressOffset>0x4C</addressOffset>
61962          <size>32</size>
61963          <access>read-write</access>
61964          <resetValue>0</resetValue>
61965          <resetMask>0xFFFFFFFF</resetMask>
61966          <fields>
61967            <field>
61968              <name>PS</name>
61969              <description>Pull Select</description>
61970              <bitOffset>0</bitOffset>
61971              <bitWidth>1</bitWidth>
61972              <access>read-write</access>
61973              <enumeratedValues>
61974                <enumeratedValue>
61975                  <name>0</name>
61976                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
61977                  <value>#0</value>
61978                </enumeratedValue>
61979                <enumeratedValue>
61980                  <name>1</name>
61981                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
61982                  <value>#1</value>
61983                </enumeratedValue>
61984              </enumeratedValues>
61985            </field>
61986            <field>
61987              <name>PE</name>
61988              <description>Pull Enable</description>
61989              <bitOffset>1</bitOffset>
61990              <bitWidth>1</bitWidth>
61991              <access>read-write</access>
61992              <enumeratedValues>
61993                <enumeratedValue>
61994                  <name>0</name>
61995                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
61996                  <value>#0</value>
61997                </enumeratedValue>
61998                <enumeratedValue>
61999                  <name>1</name>
62000                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
62001                  <value>#1</value>
62002                </enumeratedValue>
62003              </enumeratedValues>
62004            </field>
62005            <field>
62006              <name>SRE</name>
62007              <description>Slew Rate Enable</description>
62008              <bitOffset>2</bitOffset>
62009              <bitWidth>1</bitWidth>
62010              <access>read-write</access>
62011              <enumeratedValues>
62012                <enumeratedValue>
62013                  <name>0</name>
62014                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
62015                  <value>#0</value>
62016                </enumeratedValue>
62017                <enumeratedValue>
62018                  <name>1</name>
62019                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
62020                  <value>#1</value>
62021                </enumeratedValue>
62022              </enumeratedValues>
62023            </field>
62024            <field>
62025              <name>PFE</name>
62026              <description>Passive Filter Enable</description>
62027              <bitOffset>4</bitOffset>
62028              <bitWidth>1</bitWidth>
62029              <access>read-only</access>
62030              <enumeratedValues>
62031                <enumeratedValue>
62032                  <name>0</name>
62033                  <description>Passive input filter is disabled on the corresponding pin.</description>
62034                  <value>#0</value>
62035                </enumeratedValue>
62036                <enumeratedValue>
62037                  <name>1</name>
62038                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
62039                  <value>#1</value>
62040                </enumeratedValue>
62041              </enumeratedValues>
62042            </field>
62043            <field>
62044              <name>ODE</name>
62045              <description>Open Drain Enable</description>
62046              <bitOffset>5</bitOffset>
62047              <bitWidth>1</bitWidth>
62048              <access>read-write</access>
62049              <enumeratedValues>
62050                <enumeratedValue>
62051                  <name>0</name>
62052                  <description>Open drain output is disabled on the corresponding pin.</description>
62053                  <value>#0</value>
62054                </enumeratedValue>
62055                <enumeratedValue>
62056                  <name>1</name>
62057                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
62058                  <value>#1</value>
62059                </enumeratedValue>
62060              </enumeratedValues>
62061            </field>
62062            <field>
62063              <name>DSE</name>
62064              <description>Drive Strength Enable</description>
62065              <bitOffset>6</bitOffset>
62066              <bitWidth>1</bitWidth>
62067              <access>read-only</access>
62068              <enumeratedValues>
62069                <enumeratedValue>
62070                  <name>0</name>
62071                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
62072                  <value>#0</value>
62073                </enumeratedValue>
62074                <enumeratedValue>
62075                  <name>1</name>
62076                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
62077                  <value>#1</value>
62078                </enumeratedValue>
62079              </enumeratedValues>
62080            </field>
62081            <field>
62082              <name>MUX</name>
62083              <description>Pin Mux Control</description>
62084              <bitOffset>8</bitOffset>
62085              <bitWidth>3</bitWidth>
62086              <access>read-write</access>
62087              <enumeratedValues>
62088                <enumeratedValue>
62089                  <name>000</name>
62090                  <description>Pin disabled (Alternative 0) (analog).</description>
62091                  <value>#000</value>
62092                </enumeratedValue>
62093                <enumeratedValue>
62094                  <name>001</name>
62095                  <description>Alternative 1 (GPIO).</description>
62096                  <value>#001</value>
62097                </enumeratedValue>
62098                <enumeratedValue>
62099                  <name>010</name>
62100                  <description>Alternative 2 (chip-specific).</description>
62101                  <value>#010</value>
62102                </enumeratedValue>
62103                <enumeratedValue>
62104                  <name>011</name>
62105                  <description>Alternative 3 (chip-specific).</description>
62106                  <value>#011</value>
62107                </enumeratedValue>
62108                <enumeratedValue>
62109                  <name>100</name>
62110                  <description>Alternative 4 (chip-specific).</description>
62111                  <value>#100</value>
62112                </enumeratedValue>
62113                <enumeratedValue>
62114                  <name>101</name>
62115                  <description>Alternative 5 (chip-specific).</description>
62116                  <value>#101</value>
62117                </enumeratedValue>
62118                <enumeratedValue>
62119                  <name>110</name>
62120                  <description>Alternative 6 (chip-specific).</description>
62121                  <value>#110</value>
62122                </enumeratedValue>
62123                <enumeratedValue>
62124                  <name>111</name>
62125                  <description>Alternative 7 (chip-specific).</description>
62126                  <value>#111</value>
62127                </enumeratedValue>
62128              </enumeratedValues>
62129            </field>
62130            <field>
62131              <name>LK</name>
62132              <description>Lock Register</description>
62133              <bitOffset>15</bitOffset>
62134              <bitWidth>1</bitWidth>
62135              <access>read-write</access>
62136              <enumeratedValues>
62137                <enumeratedValue>
62138                  <name>0</name>
62139                  <description>Pin Control Register fields [15:0] are not locked.</description>
62140                  <value>#0</value>
62141                </enumeratedValue>
62142                <enumeratedValue>
62143                  <name>1</name>
62144                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
62145                  <value>#1</value>
62146                </enumeratedValue>
62147              </enumeratedValues>
62148            </field>
62149            <field>
62150              <name>IRQC</name>
62151              <description>Interrupt Configuration</description>
62152              <bitOffset>16</bitOffset>
62153              <bitWidth>4</bitWidth>
62154              <access>read-write</access>
62155              <enumeratedValues>
62156                <enumeratedValue>
62157                  <name>0000</name>
62158                  <description>Interrupt Status Flag (ISF) is disabled.</description>
62159                  <value>#0000</value>
62160                </enumeratedValue>
62161                <enumeratedValue>
62162                  <name>0001</name>
62163                  <description>ISF flag and DMA request on rising edge.</description>
62164                  <value>#0001</value>
62165                </enumeratedValue>
62166                <enumeratedValue>
62167                  <name>0010</name>
62168                  <description>ISF flag and DMA request on falling edge.</description>
62169                  <value>#0010</value>
62170                </enumeratedValue>
62171                <enumeratedValue>
62172                  <name>0011</name>
62173                  <description>ISF flag and DMA request on either edge.</description>
62174                  <value>#0011</value>
62175                </enumeratedValue>
62176                <enumeratedValue>
62177                  <name>1000</name>
62178                  <description>ISF flag and Interrupt when logic 0.</description>
62179                  <value>#1000</value>
62180                </enumeratedValue>
62181                <enumeratedValue>
62182                  <name>1001</name>
62183                  <description>ISF flag and Interrupt on rising-edge.</description>
62184                  <value>#1001</value>
62185                </enumeratedValue>
62186                <enumeratedValue>
62187                  <name>1010</name>
62188                  <description>ISF flag and Interrupt on falling-edge.</description>
62189                  <value>#1010</value>
62190                </enumeratedValue>
62191                <enumeratedValue>
62192                  <name>1011</name>
62193                  <description>ISF flag and Interrupt on either edge.</description>
62194                  <value>#1011</value>
62195                </enumeratedValue>
62196                <enumeratedValue>
62197                  <name>1100</name>
62198                  <description>ISF flag and Interrupt when logic 1.</description>
62199                  <value>#1100</value>
62200                </enumeratedValue>
62201              </enumeratedValues>
62202            </field>
62203            <field>
62204              <name>ISF</name>
62205              <description>Interrupt Status Flag</description>
62206              <bitOffset>24</bitOffset>
62207              <bitWidth>1</bitWidth>
62208              <access>read-write</access>
62209              <enumeratedValues>
62210                <enumeratedValue>
62211                  <name>0</name>
62212                  <description>Configured interrupt is not detected.</description>
62213                  <value>#0</value>
62214                </enumeratedValue>
62215                <enumeratedValue>
62216                  <name>1</name>
62217                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
62218                  <value>#1</value>
62219                </enumeratedValue>
62220              </enumeratedValues>
62221            </field>
62222          </fields>
62223        </register>
62224        <register>
62225          <name>PCR20</name>
62226          <description>Pin Control Register n</description>
62227          <addressOffset>0x50</addressOffset>
62228          <size>32</size>
62229          <access>read-write</access>
62230          <resetValue>0</resetValue>
62231          <resetMask>0xFFFFFFFF</resetMask>
62232          <fields>
62233            <field>
62234              <name>PS</name>
62235              <description>Pull Select</description>
62236              <bitOffset>0</bitOffset>
62237              <bitWidth>1</bitWidth>
62238              <access>read-write</access>
62239              <enumeratedValues>
62240                <enumeratedValue>
62241                  <name>0</name>
62242                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
62243                  <value>#0</value>
62244                </enumeratedValue>
62245                <enumeratedValue>
62246                  <name>1</name>
62247                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
62248                  <value>#1</value>
62249                </enumeratedValue>
62250              </enumeratedValues>
62251            </field>
62252            <field>
62253              <name>PE</name>
62254              <description>Pull Enable</description>
62255              <bitOffset>1</bitOffset>
62256              <bitWidth>1</bitWidth>
62257              <access>read-write</access>
62258              <enumeratedValues>
62259                <enumeratedValue>
62260                  <name>0</name>
62261                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
62262                  <value>#0</value>
62263                </enumeratedValue>
62264                <enumeratedValue>
62265                  <name>1</name>
62266                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
62267                  <value>#1</value>
62268                </enumeratedValue>
62269              </enumeratedValues>
62270            </field>
62271            <field>
62272              <name>SRE</name>
62273              <description>Slew Rate Enable</description>
62274              <bitOffset>2</bitOffset>
62275              <bitWidth>1</bitWidth>
62276              <access>read-write</access>
62277              <enumeratedValues>
62278                <enumeratedValue>
62279                  <name>0</name>
62280                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
62281                  <value>#0</value>
62282                </enumeratedValue>
62283                <enumeratedValue>
62284                  <name>1</name>
62285                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
62286                  <value>#1</value>
62287                </enumeratedValue>
62288              </enumeratedValues>
62289            </field>
62290            <field>
62291              <name>PFE</name>
62292              <description>Passive Filter Enable</description>
62293              <bitOffset>4</bitOffset>
62294              <bitWidth>1</bitWidth>
62295              <access>read-only</access>
62296              <enumeratedValues>
62297                <enumeratedValue>
62298                  <name>0</name>
62299                  <description>Passive input filter is disabled on the corresponding pin.</description>
62300                  <value>#0</value>
62301                </enumeratedValue>
62302                <enumeratedValue>
62303                  <name>1</name>
62304                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
62305                  <value>#1</value>
62306                </enumeratedValue>
62307              </enumeratedValues>
62308            </field>
62309            <field>
62310              <name>ODE</name>
62311              <description>Open Drain Enable</description>
62312              <bitOffset>5</bitOffset>
62313              <bitWidth>1</bitWidth>
62314              <access>read-write</access>
62315              <enumeratedValues>
62316                <enumeratedValue>
62317                  <name>0</name>
62318                  <description>Open drain output is disabled on the corresponding pin.</description>
62319                  <value>#0</value>
62320                </enumeratedValue>
62321                <enumeratedValue>
62322                  <name>1</name>
62323                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
62324                  <value>#1</value>
62325                </enumeratedValue>
62326              </enumeratedValues>
62327            </field>
62328            <field>
62329              <name>DSE</name>
62330              <description>Drive Strength Enable</description>
62331              <bitOffset>6</bitOffset>
62332              <bitWidth>1</bitWidth>
62333              <access>read-only</access>
62334              <enumeratedValues>
62335                <enumeratedValue>
62336                  <name>0</name>
62337                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
62338                  <value>#0</value>
62339                </enumeratedValue>
62340                <enumeratedValue>
62341                  <name>1</name>
62342                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
62343                  <value>#1</value>
62344                </enumeratedValue>
62345              </enumeratedValues>
62346            </field>
62347            <field>
62348              <name>MUX</name>
62349              <description>Pin Mux Control</description>
62350              <bitOffset>8</bitOffset>
62351              <bitWidth>3</bitWidth>
62352              <access>read-write</access>
62353              <enumeratedValues>
62354                <enumeratedValue>
62355                  <name>000</name>
62356                  <description>Pin disabled (Alternative 0) (analog).</description>
62357                  <value>#000</value>
62358                </enumeratedValue>
62359                <enumeratedValue>
62360                  <name>001</name>
62361                  <description>Alternative 1 (GPIO).</description>
62362                  <value>#001</value>
62363                </enumeratedValue>
62364                <enumeratedValue>
62365                  <name>010</name>
62366                  <description>Alternative 2 (chip-specific).</description>
62367                  <value>#010</value>
62368                </enumeratedValue>
62369                <enumeratedValue>
62370                  <name>011</name>
62371                  <description>Alternative 3 (chip-specific).</description>
62372                  <value>#011</value>
62373                </enumeratedValue>
62374                <enumeratedValue>
62375                  <name>100</name>
62376                  <description>Alternative 4 (chip-specific).</description>
62377                  <value>#100</value>
62378                </enumeratedValue>
62379                <enumeratedValue>
62380                  <name>101</name>
62381                  <description>Alternative 5 (chip-specific).</description>
62382                  <value>#101</value>
62383                </enumeratedValue>
62384                <enumeratedValue>
62385                  <name>110</name>
62386                  <description>Alternative 6 (chip-specific).</description>
62387                  <value>#110</value>
62388                </enumeratedValue>
62389                <enumeratedValue>
62390                  <name>111</name>
62391                  <description>Alternative 7 (chip-specific).</description>
62392                  <value>#111</value>
62393                </enumeratedValue>
62394              </enumeratedValues>
62395            </field>
62396            <field>
62397              <name>LK</name>
62398              <description>Lock Register</description>
62399              <bitOffset>15</bitOffset>
62400              <bitWidth>1</bitWidth>
62401              <access>read-write</access>
62402              <enumeratedValues>
62403                <enumeratedValue>
62404                  <name>0</name>
62405                  <description>Pin Control Register fields [15:0] are not locked.</description>
62406                  <value>#0</value>
62407                </enumeratedValue>
62408                <enumeratedValue>
62409                  <name>1</name>
62410                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
62411                  <value>#1</value>
62412                </enumeratedValue>
62413              </enumeratedValues>
62414            </field>
62415            <field>
62416              <name>IRQC</name>
62417              <description>Interrupt Configuration</description>
62418              <bitOffset>16</bitOffset>
62419              <bitWidth>4</bitWidth>
62420              <access>read-write</access>
62421              <enumeratedValues>
62422                <enumeratedValue>
62423                  <name>0000</name>
62424                  <description>Interrupt Status Flag (ISF) is disabled.</description>
62425                  <value>#0000</value>
62426                </enumeratedValue>
62427                <enumeratedValue>
62428                  <name>0001</name>
62429                  <description>ISF flag and DMA request on rising edge.</description>
62430                  <value>#0001</value>
62431                </enumeratedValue>
62432                <enumeratedValue>
62433                  <name>0010</name>
62434                  <description>ISF flag and DMA request on falling edge.</description>
62435                  <value>#0010</value>
62436                </enumeratedValue>
62437                <enumeratedValue>
62438                  <name>0011</name>
62439                  <description>ISF flag and DMA request on either edge.</description>
62440                  <value>#0011</value>
62441                </enumeratedValue>
62442                <enumeratedValue>
62443                  <name>1000</name>
62444                  <description>ISF flag and Interrupt when logic 0.</description>
62445                  <value>#1000</value>
62446                </enumeratedValue>
62447                <enumeratedValue>
62448                  <name>1001</name>
62449                  <description>ISF flag and Interrupt on rising-edge.</description>
62450                  <value>#1001</value>
62451                </enumeratedValue>
62452                <enumeratedValue>
62453                  <name>1010</name>
62454                  <description>ISF flag and Interrupt on falling-edge.</description>
62455                  <value>#1010</value>
62456                </enumeratedValue>
62457                <enumeratedValue>
62458                  <name>1011</name>
62459                  <description>ISF flag and Interrupt on either edge.</description>
62460                  <value>#1011</value>
62461                </enumeratedValue>
62462                <enumeratedValue>
62463                  <name>1100</name>
62464                  <description>ISF flag and Interrupt when logic 1.</description>
62465                  <value>#1100</value>
62466                </enumeratedValue>
62467              </enumeratedValues>
62468            </field>
62469            <field>
62470              <name>ISF</name>
62471              <description>Interrupt Status Flag</description>
62472              <bitOffset>24</bitOffset>
62473              <bitWidth>1</bitWidth>
62474              <access>read-write</access>
62475              <enumeratedValues>
62476                <enumeratedValue>
62477                  <name>0</name>
62478                  <description>Configured interrupt is not detected.</description>
62479                  <value>#0</value>
62480                </enumeratedValue>
62481                <enumeratedValue>
62482                  <name>1</name>
62483                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
62484                  <value>#1</value>
62485                </enumeratedValue>
62486              </enumeratedValues>
62487            </field>
62488          </fields>
62489        </register>
62490        <register>
62491          <name>PCR21</name>
62492          <description>Pin Control Register n</description>
62493          <addressOffset>0x54</addressOffset>
62494          <size>32</size>
62495          <access>read-write</access>
62496          <resetValue>0</resetValue>
62497          <resetMask>0xFFFFFFFF</resetMask>
62498          <fields>
62499            <field>
62500              <name>PS</name>
62501              <description>Pull Select</description>
62502              <bitOffset>0</bitOffset>
62503              <bitWidth>1</bitWidth>
62504              <access>read-write</access>
62505              <enumeratedValues>
62506                <enumeratedValue>
62507                  <name>0</name>
62508                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
62509                  <value>#0</value>
62510                </enumeratedValue>
62511                <enumeratedValue>
62512                  <name>1</name>
62513                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
62514                  <value>#1</value>
62515                </enumeratedValue>
62516              </enumeratedValues>
62517            </field>
62518            <field>
62519              <name>PE</name>
62520              <description>Pull Enable</description>
62521              <bitOffset>1</bitOffset>
62522              <bitWidth>1</bitWidth>
62523              <access>read-write</access>
62524              <enumeratedValues>
62525                <enumeratedValue>
62526                  <name>0</name>
62527                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
62528                  <value>#0</value>
62529                </enumeratedValue>
62530                <enumeratedValue>
62531                  <name>1</name>
62532                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
62533                  <value>#1</value>
62534                </enumeratedValue>
62535              </enumeratedValues>
62536            </field>
62537            <field>
62538              <name>SRE</name>
62539              <description>Slew Rate Enable</description>
62540              <bitOffset>2</bitOffset>
62541              <bitWidth>1</bitWidth>
62542              <access>read-write</access>
62543              <enumeratedValues>
62544                <enumeratedValue>
62545                  <name>0</name>
62546                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
62547                  <value>#0</value>
62548                </enumeratedValue>
62549                <enumeratedValue>
62550                  <name>1</name>
62551                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
62552                  <value>#1</value>
62553                </enumeratedValue>
62554              </enumeratedValues>
62555            </field>
62556            <field>
62557              <name>PFE</name>
62558              <description>Passive Filter Enable</description>
62559              <bitOffset>4</bitOffset>
62560              <bitWidth>1</bitWidth>
62561              <access>read-only</access>
62562              <enumeratedValues>
62563                <enumeratedValue>
62564                  <name>0</name>
62565                  <description>Passive input filter is disabled on the corresponding pin.</description>
62566                  <value>#0</value>
62567                </enumeratedValue>
62568                <enumeratedValue>
62569                  <name>1</name>
62570                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
62571                  <value>#1</value>
62572                </enumeratedValue>
62573              </enumeratedValues>
62574            </field>
62575            <field>
62576              <name>ODE</name>
62577              <description>Open Drain Enable</description>
62578              <bitOffset>5</bitOffset>
62579              <bitWidth>1</bitWidth>
62580              <access>read-write</access>
62581              <enumeratedValues>
62582                <enumeratedValue>
62583                  <name>0</name>
62584                  <description>Open drain output is disabled on the corresponding pin.</description>
62585                  <value>#0</value>
62586                </enumeratedValue>
62587                <enumeratedValue>
62588                  <name>1</name>
62589                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
62590                  <value>#1</value>
62591                </enumeratedValue>
62592              </enumeratedValues>
62593            </field>
62594            <field>
62595              <name>DSE</name>
62596              <description>Drive Strength Enable</description>
62597              <bitOffset>6</bitOffset>
62598              <bitWidth>1</bitWidth>
62599              <access>read-only</access>
62600              <enumeratedValues>
62601                <enumeratedValue>
62602                  <name>0</name>
62603                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
62604                  <value>#0</value>
62605                </enumeratedValue>
62606                <enumeratedValue>
62607                  <name>1</name>
62608                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
62609                  <value>#1</value>
62610                </enumeratedValue>
62611              </enumeratedValues>
62612            </field>
62613            <field>
62614              <name>MUX</name>
62615              <description>Pin Mux Control</description>
62616              <bitOffset>8</bitOffset>
62617              <bitWidth>3</bitWidth>
62618              <access>read-write</access>
62619              <enumeratedValues>
62620                <enumeratedValue>
62621                  <name>000</name>
62622                  <description>Pin disabled (Alternative 0) (analog).</description>
62623                  <value>#000</value>
62624                </enumeratedValue>
62625                <enumeratedValue>
62626                  <name>001</name>
62627                  <description>Alternative 1 (GPIO).</description>
62628                  <value>#001</value>
62629                </enumeratedValue>
62630                <enumeratedValue>
62631                  <name>010</name>
62632                  <description>Alternative 2 (chip-specific).</description>
62633                  <value>#010</value>
62634                </enumeratedValue>
62635                <enumeratedValue>
62636                  <name>011</name>
62637                  <description>Alternative 3 (chip-specific).</description>
62638                  <value>#011</value>
62639                </enumeratedValue>
62640                <enumeratedValue>
62641                  <name>100</name>
62642                  <description>Alternative 4 (chip-specific).</description>
62643                  <value>#100</value>
62644                </enumeratedValue>
62645                <enumeratedValue>
62646                  <name>101</name>
62647                  <description>Alternative 5 (chip-specific).</description>
62648                  <value>#101</value>
62649                </enumeratedValue>
62650                <enumeratedValue>
62651                  <name>110</name>
62652                  <description>Alternative 6 (chip-specific).</description>
62653                  <value>#110</value>
62654                </enumeratedValue>
62655                <enumeratedValue>
62656                  <name>111</name>
62657                  <description>Alternative 7 (chip-specific).</description>
62658                  <value>#111</value>
62659                </enumeratedValue>
62660              </enumeratedValues>
62661            </field>
62662            <field>
62663              <name>LK</name>
62664              <description>Lock Register</description>
62665              <bitOffset>15</bitOffset>
62666              <bitWidth>1</bitWidth>
62667              <access>read-write</access>
62668              <enumeratedValues>
62669                <enumeratedValue>
62670                  <name>0</name>
62671                  <description>Pin Control Register fields [15:0] are not locked.</description>
62672                  <value>#0</value>
62673                </enumeratedValue>
62674                <enumeratedValue>
62675                  <name>1</name>
62676                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
62677                  <value>#1</value>
62678                </enumeratedValue>
62679              </enumeratedValues>
62680            </field>
62681            <field>
62682              <name>IRQC</name>
62683              <description>Interrupt Configuration</description>
62684              <bitOffset>16</bitOffset>
62685              <bitWidth>4</bitWidth>
62686              <access>read-write</access>
62687              <enumeratedValues>
62688                <enumeratedValue>
62689                  <name>0000</name>
62690                  <description>Interrupt Status Flag (ISF) is disabled.</description>
62691                  <value>#0000</value>
62692                </enumeratedValue>
62693                <enumeratedValue>
62694                  <name>0001</name>
62695                  <description>ISF flag and DMA request on rising edge.</description>
62696                  <value>#0001</value>
62697                </enumeratedValue>
62698                <enumeratedValue>
62699                  <name>0010</name>
62700                  <description>ISF flag and DMA request on falling edge.</description>
62701                  <value>#0010</value>
62702                </enumeratedValue>
62703                <enumeratedValue>
62704                  <name>0011</name>
62705                  <description>ISF flag and DMA request on either edge.</description>
62706                  <value>#0011</value>
62707                </enumeratedValue>
62708                <enumeratedValue>
62709                  <name>1000</name>
62710                  <description>ISF flag and Interrupt when logic 0.</description>
62711                  <value>#1000</value>
62712                </enumeratedValue>
62713                <enumeratedValue>
62714                  <name>1001</name>
62715                  <description>ISF flag and Interrupt on rising-edge.</description>
62716                  <value>#1001</value>
62717                </enumeratedValue>
62718                <enumeratedValue>
62719                  <name>1010</name>
62720                  <description>ISF flag and Interrupt on falling-edge.</description>
62721                  <value>#1010</value>
62722                </enumeratedValue>
62723                <enumeratedValue>
62724                  <name>1011</name>
62725                  <description>ISF flag and Interrupt on either edge.</description>
62726                  <value>#1011</value>
62727                </enumeratedValue>
62728                <enumeratedValue>
62729                  <name>1100</name>
62730                  <description>ISF flag and Interrupt when logic 1.</description>
62731                  <value>#1100</value>
62732                </enumeratedValue>
62733              </enumeratedValues>
62734            </field>
62735            <field>
62736              <name>ISF</name>
62737              <description>Interrupt Status Flag</description>
62738              <bitOffset>24</bitOffset>
62739              <bitWidth>1</bitWidth>
62740              <access>read-write</access>
62741              <enumeratedValues>
62742                <enumeratedValue>
62743                  <name>0</name>
62744                  <description>Configured interrupt is not detected.</description>
62745                  <value>#0</value>
62746                </enumeratedValue>
62747                <enumeratedValue>
62748                  <name>1</name>
62749                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
62750                  <value>#1</value>
62751                </enumeratedValue>
62752              </enumeratedValues>
62753            </field>
62754          </fields>
62755        </register>
62756        <register>
62757          <name>PCR22</name>
62758          <description>Pin Control Register n</description>
62759          <addressOffset>0x58</addressOffset>
62760          <size>32</size>
62761          <access>read-write</access>
62762          <resetValue>0</resetValue>
62763          <resetMask>0xFFFFFFFF</resetMask>
62764          <fields>
62765            <field>
62766              <name>PS</name>
62767              <description>Pull Select</description>
62768              <bitOffset>0</bitOffset>
62769              <bitWidth>1</bitWidth>
62770              <access>read-only</access>
62771              <enumeratedValues>
62772                <enumeratedValue>
62773                  <name>0</name>
62774                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
62775                  <value>#0</value>
62776                </enumeratedValue>
62777                <enumeratedValue>
62778                  <name>1</name>
62779                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
62780                  <value>#1</value>
62781                </enumeratedValue>
62782              </enumeratedValues>
62783            </field>
62784            <field>
62785              <name>PE</name>
62786              <description>Pull Enable</description>
62787              <bitOffset>1</bitOffset>
62788              <bitWidth>1</bitWidth>
62789              <access>read-only</access>
62790              <enumeratedValues>
62791                <enumeratedValue>
62792                  <name>0</name>
62793                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
62794                  <value>#0</value>
62795                </enumeratedValue>
62796                <enumeratedValue>
62797                  <name>1</name>
62798                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
62799                  <value>#1</value>
62800                </enumeratedValue>
62801              </enumeratedValues>
62802            </field>
62803            <field>
62804              <name>SRE</name>
62805              <description>Slew Rate Enable</description>
62806              <bitOffset>2</bitOffset>
62807              <bitWidth>1</bitWidth>
62808              <access>read-only</access>
62809              <enumeratedValues>
62810                <enumeratedValue>
62811                  <name>0</name>
62812                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
62813                  <value>#0</value>
62814                </enumeratedValue>
62815                <enumeratedValue>
62816                  <name>1</name>
62817                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
62818                  <value>#1</value>
62819                </enumeratedValue>
62820              </enumeratedValues>
62821            </field>
62822            <field>
62823              <name>PFE</name>
62824              <description>Passive Filter Enable</description>
62825              <bitOffset>4</bitOffset>
62826              <bitWidth>1</bitWidth>
62827              <access>read-only</access>
62828              <enumeratedValues>
62829                <enumeratedValue>
62830                  <name>0</name>
62831                  <description>Passive input filter is disabled on the corresponding pin.</description>
62832                  <value>#0</value>
62833                </enumeratedValue>
62834                <enumeratedValue>
62835                  <name>1</name>
62836                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
62837                  <value>#1</value>
62838                </enumeratedValue>
62839              </enumeratedValues>
62840            </field>
62841            <field>
62842              <name>ODE</name>
62843              <description>Open Drain Enable</description>
62844              <bitOffset>5</bitOffset>
62845              <bitWidth>1</bitWidth>
62846              <access>read-only</access>
62847              <enumeratedValues>
62848                <enumeratedValue>
62849                  <name>0</name>
62850                  <description>Open drain output is disabled on the corresponding pin.</description>
62851                  <value>#0</value>
62852                </enumeratedValue>
62853                <enumeratedValue>
62854                  <name>1</name>
62855                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
62856                  <value>#1</value>
62857                </enumeratedValue>
62858              </enumeratedValues>
62859            </field>
62860            <field>
62861              <name>DSE</name>
62862              <description>Drive Strength Enable</description>
62863              <bitOffset>6</bitOffset>
62864              <bitWidth>1</bitWidth>
62865              <access>read-only</access>
62866              <enumeratedValues>
62867                <enumeratedValue>
62868                  <name>0</name>
62869                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
62870                  <value>#0</value>
62871                </enumeratedValue>
62872                <enumeratedValue>
62873                  <name>1</name>
62874                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
62875                  <value>#1</value>
62876                </enumeratedValue>
62877              </enumeratedValues>
62878            </field>
62879            <field>
62880              <name>MUX</name>
62881              <description>Pin Mux Control</description>
62882              <bitOffset>8</bitOffset>
62883              <bitWidth>3</bitWidth>
62884              <access>read-write</access>
62885              <enumeratedValues>
62886                <enumeratedValue>
62887                  <name>000</name>
62888                  <description>Pin disabled (Alternative 0) (analog).</description>
62889                  <value>#000</value>
62890                </enumeratedValue>
62891                <enumeratedValue>
62892                  <name>001</name>
62893                  <description>Alternative 1 (GPIO).</description>
62894                  <value>#001</value>
62895                </enumeratedValue>
62896                <enumeratedValue>
62897                  <name>010</name>
62898                  <description>Alternative 2 (chip-specific).</description>
62899                  <value>#010</value>
62900                </enumeratedValue>
62901                <enumeratedValue>
62902                  <name>011</name>
62903                  <description>Alternative 3 (chip-specific).</description>
62904                  <value>#011</value>
62905                </enumeratedValue>
62906                <enumeratedValue>
62907                  <name>100</name>
62908                  <description>Alternative 4 (chip-specific).</description>
62909                  <value>#100</value>
62910                </enumeratedValue>
62911                <enumeratedValue>
62912                  <name>101</name>
62913                  <description>Alternative 5 (chip-specific).</description>
62914                  <value>#101</value>
62915                </enumeratedValue>
62916                <enumeratedValue>
62917                  <name>110</name>
62918                  <description>Alternative 6 (chip-specific).</description>
62919                  <value>#110</value>
62920                </enumeratedValue>
62921                <enumeratedValue>
62922                  <name>111</name>
62923                  <description>Alternative 7 (chip-specific).</description>
62924                  <value>#111</value>
62925                </enumeratedValue>
62926              </enumeratedValues>
62927            </field>
62928            <field>
62929              <name>LK</name>
62930              <description>Lock Register</description>
62931              <bitOffset>15</bitOffset>
62932              <bitWidth>1</bitWidth>
62933              <access>read-write</access>
62934              <enumeratedValues>
62935                <enumeratedValue>
62936                  <name>0</name>
62937                  <description>Pin Control Register fields [15:0] are not locked.</description>
62938                  <value>#0</value>
62939                </enumeratedValue>
62940                <enumeratedValue>
62941                  <name>1</name>
62942                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
62943                  <value>#1</value>
62944                </enumeratedValue>
62945              </enumeratedValues>
62946            </field>
62947            <field>
62948              <name>IRQC</name>
62949              <description>Interrupt Configuration</description>
62950              <bitOffset>16</bitOffset>
62951              <bitWidth>4</bitWidth>
62952              <access>read-write</access>
62953              <enumeratedValues>
62954                <enumeratedValue>
62955                  <name>0000</name>
62956                  <description>Interrupt Status Flag (ISF) is disabled.</description>
62957                  <value>#0000</value>
62958                </enumeratedValue>
62959                <enumeratedValue>
62960                  <name>0001</name>
62961                  <description>ISF flag and DMA request on rising edge.</description>
62962                  <value>#0001</value>
62963                </enumeratedValue>
62964                <enumeratedValue>
62965                  <name>0010</name>
62966                  <description>ISF flag and DMA request on falling edge.</description>
62967                  <value>#0010</value>
62968                </enumeratedValue>
62969                <enumeratedValue>
62970                  <name>0011</name>
62971                  <description>ISF flag and DMA request on either edge.</description>
62972                  <value>#0011</value>
62973                </enumeratedValue>
62974                <enumeratedValue>
62975                  <name>1000</name>
62976                  <description>ISF flag and Interrupt when logic 0.</description>
62977                  <value>#1000</value>
62978                </enumeratedValue>
62979                <enumeratedValue>
62980                  <name>1001</name>
62981                  <description>ISF flag and Interrupt on rising-edge.</description>
62982                  <value>#1001</value>
62983                </enumeratedValue>
62984                <enumeratedValue>
62985                  <name>1010</name>
62986                  <description>ISF flag and Interrupt on falling-edge.</description>
62987                  <value>#1010</value>
62988                </enumeratedValue>
62989                <enumeratedValue>
62990                  <name>1011</name>
62991                  <description>ISF flag and Interrupt on either edge.</description>
62992                  <value>#1011</value>
62993                </enumeratedValue>
62994                <enumeratedValue>
62995                  <name>1100</name>
62996                  <description>ISF flag and Interrupt when logic 1.</description>
62997                  <value>#1100</value>
62998                </enumeratedValue>
62999              </enumeratedValues>
63000            </field>
63001            <field>
63002              <name>ISF</name>
63003              <description>Interrupt Status Flag</description>
63004              <bitOffset>24</bitOffset>
63005              <bitWidth>1</bitWidth>
63006              <access>read-write</access>
63007              <enumeratedValues>
63008                <enumeratedValue>
63009                  <name>0</name>
63010                  <description>Configured interrupt is not detected.</description>
63011                  <value>#0</value>
63012                </enumeratedValue>
63013                <enumeratedValue>
63014                  <name>1</name>
63015                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
63016                  <value>#1</value>
63017                </enumeratedValue>
63018              </enumeratedValues>
63019            </field>
63020          </fields>
63021        </register>
63022        <register>
63023          <name>PCR23</name>
63024          <description>Pin Control Register n</description>
63025          <addressOffset>0x5C</addressOffset>
63026          <size>32</size>
63027          <access>read-write</access>
63028          <resetValue>0</resetValue>
63029          <resetMask>0xFFFFFFFF</resetMask>
63030          <fields>
63031            <field>
63032              <name>PS</name>
63033              <description>Pull Select</description>
63034              <bitOffset>0</bitOffset>
63035              <bitWidth>1</bitWidth>
63036              <access>read-only</access>
63037              <enumeratedValues>
63038                <enumeratedValue>
63039                  <name>0</name>
63040                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
63041                  <value>#0</value>
63042                </enumeratedValue>
63043                <enumeratedValue>
63044                  <name>1</name>
63045                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
63046                  <value>#1</value>
63047                </enumeratedValue>
63048              </enumeratedValues>
63049            </field>
63050            <field>
63051              <name>PE</name>
63052              <description>Pull Enable</description>
63053              <bitOffset>1</bitOffset>
63054              <bitWidth>1</bitWidth>
63055              <access>read-only</access>
63056              <enumeratedValues>
63057                <enumeratedValue>
63058                  <name>0</name>
63059                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
63060                  <value>#0</value>
63061                </enumeratedValue>
63062                <enumeratedValue>
63063                  <name>1</name>
63064                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
63065                  <value>#1</value>
63066                </enumeratedValue>
63067              </enumeratedValues>
63068            </field>
63069            <field>
63070              <name>SRE</name>
63071              <description>Slew Rate Enable</description>
63072              <bitOffset>2</bitOffset>
63073              <bitWidth>1</bitWidth>
63074              <access>read-only</access>
63075              <enumeratedValues>
63076                <enumeratedValue>
63077                  <name>0</name>
63078                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
63079                  <value>#0</value>
63080                </enumeratedValue>
63081                <enumeratedValue>
63082                  <name>1</name>
63083                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
63084                  <value>#1</value>
63085                </enumeratedValue>
63086              </enumeratedValues>
63087            </field>
63088            <field>
63089              <name>PFE</name>
63090              <description>Passive Filter Enable</description>
63091              <bitOffset>4</bitOffset>
63092              <bitWidth>1</bitWidth>
63093              <access>read-only</access>
63094              <enumeratedValues>
63095                <enumeratedValue>
63096                  <name>0</name>
63097                  <description>Passive input filter is disabled on the corresponding pin.</description>
63098                  <value>#0</value>
63099                </enumeratedValue>
63100                <enumeratedValue>
63101                  <name>1</name>
63102                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
63103                  <value>#1</value>
63104                </enumeratedValue>
63105              </enumeratedValues>
63106            </field>
63107            <field>
63108              <name>ODE</name>
63109              <description>Open Drain Enable</description>
63110              <bitOffset>5</bitOffset>
63111              <bitWidth>1</bitWidth>
63112              <access>read-only</access>
63113              <enumeratedValues>
63114                <enumeratedValue>
63115                  <name>0</name>
63116                  <description>Open drain output is disabled on the corresponding pin.</description>
63117                  <value>#0</value>
63118                </enumeratedValue>
63119                <enumeratedValue>
63120                  <name>1</name>
63121                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
63122                  <value>#1</value>
63123                </enumeratedValue>
63124              </enumeratedValues>
63125            </field>
63126            <field>
63127              <name>DSE</name>
63128              <description>Drive Strength Enable</description>
63129              <bitOffset>6</bitOffset>
63130              <bitWidth>1</bitWidth>
63131              <access>read-only</access>
63132              <enumeratedValues>
63133                <enumeratedValue>
63134                  <name>0</name>
63135                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
63136                  <value>#0</value>
63137                </enumeratedValue>
63138                <enumeratedValue>
63139                  <name>1</name>
63140                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
63141                  <value>#1</value>
63142                </enumeratedValue>
63143              </enumeratedValues>
63144            </field>
63145            <field>
63146              <name>MUX</name>
63147              <description>Pin Mux Control</description>
63148              <bitOffset>8</bitOffset>
63149              <bitWidth>3</bitWidth>
63150              <access>read-write</access>
63151              <enumeratedValues>
63152                <enumeratedValue>
63153                  <name>000</name>
63154                  <description>Pin disabled (Alternative 0) (analog).</description>
63155                  <value>#000</value>
63156                </enumeratedValue>
63157                <enumeratedValue>
63158                  <name>001</name>
63159                  <description>Alternative 1 (GPIO).</description>
63160                  <value>#001</value>
63161                </enumeratedValue>
63162                <enumeratedValue>
63163                  <name>010</name>
63164                  <description>Alternative 2 (chip-specific).</description>
63165                  <value>#010</value>
63166                </enumeratedValue>
63167                <enumeratedValue>
63168                  <name>011</name>
63169                  <description>Alternative 3 (chip-specific).</description>
63170                  <value>#011</value>
63171                </enumeratedValue>
63172                <enumeratedValue>
63173                  <name>100</name>
63174                  <description>Alternative 4 (chip-specific).</description>
63175                  <value>#100</value>
63176                </enumeratedValue>
63177                <enumeratedValue>
63178                  <name>101</name>
63179                  <description>Alternative 5 (chip-specific).</description>
63180                  <value>#101</value>
63181                </enumeratedValue>
63182                <enumeratedValue>
63183                  <name>110</name>
63184                  <description>Alternative 6 (chip-specific).</description>
63185                  <value>#110</value>
63186                </enumeratedValue>
63187                <enumeratedValue>
63188                  <name>111</name>
63189                  <description>Alternative 7 (chip-specific).</description>
63190                  <value>#111</value>
63191                </enumeratedValue>
63192              </enumeratedValues>
63193            </field>
63194            <field>
63195              <name>LK</name>
63196              <description>Lock Register</description>
63197              <bitOffset>15</bitOffset>
63198              <bitWidth>1</bitWidth>
63199              <access>read-write</access>
63200              <enumeratedValues>
63201                <enumeratedValue>
63202                  <name>0</name>
63203                  <description>Pin Control Register fields [15:0] are not locked.</description>
63204                  <value>#0</value>
63205                </enumeratedValue>
63206                <enumeratedValue>
63207                  <name>1</name>
63208                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
63209                  <value>#1</value>
63210                </enumeratedValue>
63211              </enumeratedValues>
63212            </field>
63213            <field>
63214              <name>IRQC</name>
63215              <description>Interrupt Configuration</description>
63216              <bitOffset>16</bitOffset>
63217              <bitWidth>4</bitWidth>
63218              <access>read-write</access>
63219              <enumeratedValues>
63220                <enumeratedValue>
63221                  <name>0000</name>
63222                  <description>Interrupt Status Flag (ISF) is disabled.</description>
63223                  <value>#0000</value>
63224                </enumeratedValue>
63225                <enumeratedValue>
63226                  <name>0001</name>
63227                  <description>ISF flag and DMA request on rising edge.</description>
63228                  <value>#0001</value>
63229                </enumeratedValue>
63230                <enumeratedValue>
63231                  <name>0010</name>
63232                  <description>ISF flag and DMA request on falling edge.</description>
63233                  <value>#0010</value>
63234                </enumeratedValue>
63235                <enumeratedValue>
63236                  <name>0011</name>
63237                  <description>ISF flag and DMA request on either edge.</description>
63238                  <value>#0011</value>
63239                </enumeratedValue>
63240                <enumeratedValue>
63241                  <name>1000</name>
63242                  <description>ISF flag and Interrupt when logic 0.</description>
63243                  <value>#1000</value>
63244                </enumeratedValue>
63245                <enumeratedValue>
63246                  <name>1001</name>
63247                  <description>ISF flag and Interrupt on rising-edge.</description>
63248                  <value>#1001</value>
63249                </enumeratedValue>
63250                <enumeratedValue>
63251                  <name>1010</name>
63252                  <description>ISF flag and Interrupt on falling-edge.</description>
63253                  <value>#1010</value>
63254                </enumeratedValue>
63255                <enumeratedValue>
63256                  <name>1011</name>
63257                  <description>ISF flag and Interrupt on either edge.</description>
63258                  <value>#1011</value>
63259                </enumeratedValue>
63260                <enumeratedValue>
63261                  <name>1100</name>
63262                  <description>ISF flag and Interrupt when logic 1.</description>
63263                  <value>#1100</value>
63264                </enumeratedValue>
63265              </enumeratedValues>
63266            </field>
63267            <field>
63268              <name>ISF</name>
63269              <description>Interrupt Status Flag</description>
63270              <bitOffset>24</bitOffset>
63271              <bitWidth>1</bitWidth>
63272              <access>read-write</access>
63273              <enumeratedValues>
63274                <enumeratedValue>
63275                  <name>0</name>
63276                  <description>Configured interrupt is not detected.</description>
63277                  <value>#0</value>
63278                </enumeratedValue>
63279                <enumeratedValue>
63280                  <name>1</name>
63281                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
63282                  <value>#1</value>
63283                </enumeratedValue>
63284              </enumeratedValues>
63285            </field>
63286          </fields>
63287        </register>
63288        <register>
63289          <name>PCR24</name>
63290          <description>Pin Control Register n</description>
63291          <addressOffset>0x60</addressOffset>
63292          <size>32</size>
63293          <access>read-write</access>
63294          <resetValue>0</resetValue>
63295          <resetMask>0xFFFFFFFF</resetMask>
63296          <fields>
63297            <field>
63298              <name>PS</name>
63299              <description>Pull Select</description>
63300              <bitOffset>0</bitOffset>
63301              <bitWidth>1</bitWidth>
63302              <access>read-only</access>
63303              <enumeratedValues>
63304                <enumeratedValue>
63305                  <name>0</name>
63306                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
63307                  <value>#0</value>
63308                </enumeratedValue>
63309                <enumeratedValue>
63310                  <name>1</name>
63311                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
63312                  <value>#1</value>
63313                </enumeratedValue>
63314              </enumeratedValues>
63315            </field>
63316            <field>
63317              <name>PE</name>
63318              <description>Pull Enable</description>
63319              <bitOffset>1</bitOffset>
63320              <bitWidth>1</bitWidth>
63321              <access>read-only</access>
63322              <enumeratedValues>
63323                <enumeratedValue>
63324                  <name>0</name>
63325                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
63326                  <value>#0</value>
63327                </enumeratedValue>
63328                <enumeratedValue>
63329                  <name>1</name>
63330                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
63331                  <value>#1</value>
63332                </enumeratedValue>
63333              </enumeratedValues>
63334            </field>
63335            <field>
63336              <name>SRE</name>
63337              <description>Slew Rate Enable</description>
63338              <bitOffset>2</bitOffset>
63339              <bitWidth>1</bitWidth>
63340              <access>read-only</access>
63341              <enumeratedValues>
63342                <enumeratedValue>
63343                  <name>0</name>
63344                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
63345                  <value>#0</value>
63346                </enumeratedValue>
63347                <enumeratedValue>
63348                  <name>1</name>
63349                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
63350                  <value>#1</value>
63351                </enumeratedValue>
63352              </enumeratedValues>
63353            </field>
63354            <field>
63355              <name>PFE</name>
63356              <description>Passive Filter Enable</description>
63357              <bitOffset>4</bitOffset>
63358              <bitWidth>1</bitWidth>
63359              <access>read-only</access>
63360              <enumeratedValues>
63361                <enumeratedValue>
63362                  <name>0</name>
63363                  <description>Passive input filter is disabled on the corresponding pin.</description>
63364                  <value>#0</value>
63365                </enumeratedValue>
63366                <enumeratedValue>
63367                  <name>1</name>
63368                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
63369                  <value>#1</value>
63370                </enumeratedValue>
63371              </enumeratedValues>
63372            </field>
63373            <field>
63374              <name>ODE</name>
63375              <description>Open Drain Enable</description>
63376              <bitOffset>5</bitOffset>
63377              <bitWidth>1</bitWidth>
63378              <access>read-only</access>
63379              <enumeratedValues>
63380                <enumeratedValue>
63381                  <name>0</name>
63382                  <description>Open drain output is disabled on the corresponding pin.</description>
63383                  <value>#0</value>
63384                </enumeratedValue>
63385                <enumeratedValue>
63386                  <name>1</name>
63387                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
63388                  <value>#1</value>
63389                </enumeratedValue>
63390              </enumeratedValues>
63391            </field>
63392            <field>
63393              <name>DSE</name>
63394              <description>Drive Strength Enable</description>
63395              <bitOffset>6</bitOffset>
63396              <bitWidth>1</bitWidth>
63397              <access>read-only</access>
63398              <enumeratedValues>
63399                <enumeratedValue>
63400                  <name>0</name>
63401                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
63402                  <value>#0</value>
63403                </enumeratedValue>
63404                <enumeratedValue>
63405                  <name>1</name>
63406                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
63407                  <value>#1</value>
63408                </enumeratedValue>
63409              </enumeratedValues>
63410            </field>
63411            <field>
63412              <name>MUX</name>
63413              <description>Pin Mux Control</description>
63414              <bitOffset>8</bitOffset>
63415              <bitWidth>3</bitWidth>
63416              <access>read-write</access>
63417              <enumeratedValues>
63418                <enumeratedValue>
63419                  <name>000</name>
63420                  <description>Pin disabled (Alternative 0) (analog).</description>
63421                  <value>#000</value>
63422                </enumeratedValue>
63423                <enumeratedValue>
63424                  <name>001</name>
63425                  <description>Alternative 1 (GPIO).</description>
63426                  <value>#001</value>
63427                </enumeratedValue>
63428                <enumeratedValue>
63429                  <name>010</name>
63430                  <description>Alternative 2 (chip-specific).</description>
63431                  <value>#010</value>
63432                </enumeratedValue>
63433                <enumeratedValue>
63434                  <name>011</name>
63435                  <description>Alternative 3 (chip-specific).</description>
63436                  <value>#011</value>
63437                </enumeratedValue>
63438                <enumeratedValue>
63439                  <name>100</name>
63440                  <description>Alternative 4 (chip-specific).</description>
63441                  <value>#100</value>
63442                </enumeratedValue>
63443                <enumeratedValue>
63444                  <name>101</name>
63445                  <description>Alternative 5 (chip-specific).</description>
63446                  <value>#101</value>
63447                </enumeratedValue>
63448                <enumeratedValue>
63449                  <name>110</name>
63450                  <description>Alternative 6 (chip-specific).</description>
63451                  <value>#110</value>
63452                </enumeratedValue>
63453                <enumeratedValue>
63454                  <name>111</name>
63455                  <description>Alternative 7 (chip-specific).</description>
63456                  <value>#111</value>
63457                </enumeratedValue>
63458              </enumeratedValues>
63459            </field>
63460            <field>
63461              <name>LK</name>
63462              <description>Lock Register</description>
63463              <bitOffset>15</bitOffset>
63464              <bitWidth>1</bitWidth>
63465              <access>read-write</access>
63466              <enumeratedValues>
63467                <enumeratedValue>
63468                  <name>0</name>
63469                  <description>Pin Control Register fields [15:0] are not locked.</description>
63470                  <value>#0</value>
63471                </enumeratedValue>
63472                <enumeratedValue>
63473                  <name>1</name>
63474                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
63475                  <value>#1</value>
63476                </enumeratedValue>
63477              </enumeratedValues>
63478            </field>
63479            <field>
63480              <name>IRQC</name>
63481              <description>Interrupt Configuration</description>
63482              <bitOffset>16</bitOffset>
63483              <bitWidth>4</bitWidth>
63484              <access>read-write</access>
63485              <enumeratedValues>
63486                <enumeratedValue>
63487                  <name>0000</name>
63488                  <description>Interrupt Status Flag (ISF) is disabled.</description>
63489                  <value>#0000</value>
63490                </enumeratedValue>
63491                <enumeratedValue>
63492                  <name>0001</name>
63493                  <description>ISF flag and DMA request on rising edge.</description>
63494                  <value>#0001</value>
63495                </enumeratedValue>
63496                <enumeratedValue>
63497                  <name>0010</name>
63498                  <description>ISF flag and DMA request on falling edge.</description>
63499                  <value>#0010</value>
63500                </enumeratedValue>
63501                <enumeratedValue>
63502                  <name>0011</name>
63503                  <description>ISF flag and DMA request on either edge.</description>
63504                  <value>#0011</value>
63505                </enumeratedValue>
63506                <enumeratedValue>
63507                  <name>1000</name>
63508                  <description>ISF flag and Interrupt when logic 0.</description>
63509                  <value>#1000</value>
63510                </enumeratedValue>
63511                <enumeratedValue>
63512                  <name>1001</name>
63513                  <description>ISF flag and Interrupt on rising-edge.</description>
63514                  <value>#1001</value>
63515                </enumeratedValue>
63516                <enumeratedValue>
63517                  <name>1010</name>
63518                  <description>ISF flag and Interrupt on falling-edge.</description>
63519                  <value>#1010</value>
63520                </enumeratedValue>
63521                <enumeratedValue>
63522                  <name>1011</name>
63523                  <description>ISF flag and Interrupt on either edge.</description>
63524                  <value>#1011</value>
63525                </enumeratedValue>
63526                <enumeratedValue>
63527                  <name>1100</name>
63528                  <description>ISF flag and Interrupt when logic 1.</description>
63529                  <value>#1100</value>
63530                </enumeratedValue>
63531              </enumeratedValues>
63532            </field>
63533            <field>
63534              <name>ISF</name>
63535              <description>Interrupt Status Flag</description>
63536              <bitOffset>24</bitOffset>
63537              <bitWidth>1</bitWidth>
63538              <access>read-write</access>
63539              <enumeratedValues>
63540                <enumeratedValue>
63541                  <name>0</name>
63542                  <description>Configured interrupt is not detected.</description>
63543                  <value>#0</value>
63544                </enumeratedValue>
63545                <enumeratedValue>
63546                  <name>1</name>
63547                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
63548                  <value>#1</value>
63549                </enumeratedValue>
63550              </enumeratedValues>
63551            </field>
63552          </fields>
63553        </register>
63554        <register>
63555          <name>PCR25</name>
63556          <description>Pin Control Register n</description>
63557          <addressOffset>0x64</addressOffset>
63558          <size>32</size>
63559          <access>read-write</access>
63560          <resetValue>0</resetValue>
63561          <resetMask>0xFFFFFFFF</resetMask>
63562          <fields>
63563            <field>
63564              <name>PS</name>
63565              <description>Pull Select</description>
63566              <bitOffset>0</bitOffset>
63567              <bitWidth>1</bitWidth>
63568              <access>read-only</access>
63569              <enumeratedValues>
63570                <enumeratedValue>
63571                  <name>0</name>
63572                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
63573                  <value>#0</value>
63574                </enumeratedValue>
63575                <enumeratedValue>
63576                  <name>1</name>
63577                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
63578                  <value>#1</value>
63579                </enumeratedValue>
63580              </enumeratedValues>
63581            </field>
63582            <field>
63583              <name>PE</name>
63584              <description>Pull Enable</description>
63585              <bitOffset>1</bitOffset>
63586              <bitWidth>1</bitWidth>
63587              <access>read-only</access>
63588              <enumeratedValues>
63589                <enumeratedValue>
63590                  <name>0</name>
63591                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
63592                  <value>#0</value>
63593                </enumeratedValue>
63594                <enumeratedValue>
63595                  <name>1</name>
63596                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
63597                  <value>#1</value>
63598                </enumeratedValue>
63599              </enumeratedValues>
63600            </field>
63601            <field>
63602              <name>SRE</name>
63603              <description>Slew Rate Enable</description>
63604              <bitOffset>2</bitOffset>
63605              <bitWidth>1</bitWidth>
63606              <access>read-only</access>
63607              <enumeratedValues>
63608                <enumeratedValue>
63609                  <name>0</name>
63610                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
63611                  <value>#0</value>
63612                </enumeratedValue>
63613                <enumeratedValue>
63614                  <name>1</name>
63615                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
63616                  <value>#1</value>
63617                </enumeratedValue>
63618              </enumeratedValues>
63619            </field>
63620            <field>
63621              <name>PFE</name>
63622              <description>Passive Filter Enable</description>
63623              <bitOffset>4</bitOffset>
63624              <bitWidth>1</bitWidth>
63625              <access>read-only</access>
63626              <enumeratedValues>
63627                <enumeratedValue>
63628                  <name>0</name>
63629                  <description>Passive input filter is disabled on the corresponding pin.</description>
63630                  <value>#0</value>
63631                </enumeratedValue>
63632                <enumeratedValue>
63633                  <name>1</name>
63634                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
63635                  <value>#1</value>
63636                </enumeratedValue>
63637              </enumeratedValues>
63638            </field>
63639            <field>
63640              <name>ODE</name>
63641              <description>Open Drain Enable</description>
63642              <bitOffset>5</bitOffset>
63643              <bitWidth>1</bitWidth>
63644              <access>read-only</access>
63645              <enumeratedValues>
63646                <enumeratedValue>
63647                  <name>0</name>
63648                  <description>Open drain output is disabled on the corresponding pin.</description>
63649                  <value>#0</value>
63650                </enumeratedValue>
63651                <enumeratedValue>
63652                  <name>1</name>
63653                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
63654                  <value>#1</value>
63655                </enumeratedValue>
63656              </enumeratedValues>
63657            </field>
63658            <field>
63659              <name>DSE</name>
63660              <description>Drive Strength Enable</description>
63661              <bitOffset>6</bitOffset>
63662              <bitWidth>1</bitWidth>
63663              <access>read-only</access>
63664              <enumeratedValues>
63665                <enumeratedValue>
63666                  <name>0</name>
63667                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
63668                  <value>#0</value>
63669                </enumeratedValue>
63670                <enumeratedValue>
63671                  <name>1</name>
63672                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
63673                  <value>#1</value>
63674                </enumeratedValue>
63675              </enumeratedValues>
63676            </field>
63677            <field>
63678              <name>MUX</name>
63679              <description>Pin Mux Control</description>
63680              <bitOffset>8</bitOffset>
63681              <bitWidth>3</bitWidth>
63682              <access>read-write</access>
63683              <enumeratedValues>
63684                <enumeratedValue>
63685                  <name>000</name>
63686                  <description>Pin disabled (Alternative 0) (analog).</description>
63687                  <value>#000</value>
63688                </enumeratedValue>
63689                <enumeratedValue>
63690                  <name>001</name>
63691                  <description>Alternative 1 (GPIO).</description>
63692                  <value>#001</value>
63693                </enumeratedValue>
63694                <enumeratedValue>
63695                  <name>010</name>
63696                  <description>Alternative 2 (chip-specific).</description>
63697                  <value>#010</value>
63698                </enumeratedValue>
63699                <enumeratedValue>
63700                  <name>011</name>
63701                  <description>Alternative 3 (chip-specific).</description>
63702                  <value>#011</value>
63703                </enumeratedValue>
63704                <enumeratedValue>
63705                  <name>100</name>
63706                  <description>Alternative 4 (chip-specific).</description>
63707                  <value>#100</value>
63708                </enumeratedValue>
63709                <enumeratedValue>
63710                  <name>101</name>
63711                  <description>Alternative 5 (chip-specific).</description>
63712                  <value>#101</value>
63713                </enumeratedValue>
63714                <enumeratedValue>
63715                  <name>110</name>
63716                  <description>Alternative 6 (chip-specific).</description>
63717                  <value>#110</value>
63718                </enumeratedValue>
63719                <enumeratedValue>
63720                  <name>111</name>
63721                  <description>Alternative 7 (chip-specific).</description>
63722                  <value>#111</value>
63723                </enumeratedValue>
63724              </enumeratedValues>
63725            </field>
63726            <field>
63727              <name>LK</name>
63728              <description>Lock Register</description>
63729              <bitOffset>15</bitOffset>
63730              <bitWidth>1</bitWidth>
63731              <access>read-write</access>
63732              <enumeratedValues>
63733                <enumeratedValue>
63734                  <name>0</name>
63735                  <description>Pin Control Register fields [15:0] are not locked.</description>
63736                  <value>#0</value>
63737                </enumeratedValue>
63738                <enumeratedValue>
63739                  <name>1</name>
63740                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
63741                  <value>#1</value>
63742                </enumeratedValue>
63743              </enumeratedValues>
63744            </field>
63745            <field>
63746              <name>IRQC</name>
63747              <description>Interrupt Configuration</description>
63748              <bitOffset>16</bitOffset>
63749              <bitWidth>4</bitWidth>
63750              <access>read-write</access>
63751              <enumeratedValues>
63752                <enumeratedValue>
63753                  <name>0000</name>
63754                  <description>Interrupt Status Flag (ISF) is disabled.</description>
63755                  <value>#0000</value>
63756                </enumeratedValue>
63757                <enumeratedValue>
63758                  <name>0001</name>
63759                  <description>ISF flag and DMA request on rising edge.</description>
63760                  <value>#0001</value>
63761                </enumeratedValue>
63762                <enumeratedValue>
63763                  <name>0010</name>
63764                  <description>ISF flag and DMA request on falling edge.</description>
63765                  <value>#0010</value>
63766                </enumeratedValue>
63767                <enumeratedValue>
63768                  <name>0011</name>
63769                  <description>ISF flag and DMA request on either edge.</description>
63770                  <value>#0011</value>
63771                </enumeratedValue>
63772                <enumeratedValue>
63773                  <name>1000</name>
63774                  <description>ISF flag and Interrupt when logic 0.</description>
63775                  <value>#1000</value>
63776                </enumeratedValue>
63777                <enumeratedValue>
63778                  <name>1001</name>
63779                  <description>ISF flag and Interrupt on rising-edge.</description>
63780                  <value>#1001</value>
63781                </enumeratedValue>
63782                <enumeratedValue>
63783                  <name>1010</name>
63784                  <description>ISF flag and Interrupt on falling-edge.</description>
63785                  <value>#1010</value>
63786                </enumeratedValue>
63787                <enumeratedValue>
63788                  <name>1011</name>
63789                  <description>ISF flag and Interrupt on either edge.</description>
63790                  <value>#1011</value>
63791                </enumeratedValue>
63792                <enumeratedValue>
63793                  <name>1100</name>
63794                  <description>ISF flag and Interrupt when logic 1.</description>
63795                  <value>#1100</value>
63796                </enumeratedValue>
63797              </enumeratedValues>
63798            </field>
63799            <field>
63800              <name>ISF</name>
63801              <description>Interrupt Status Flag</description>
63802              <bitOffset>24</bitOffset>
63803              <bitWidth>1</bitWidth>
63804              <access>read-write</access>
63805              <enumeratedValues>
63806                <enumeratedValue>
63807                  <name>0</name>
63808                  <description>Configured interrupt is not detected.</description>
63809                  <value>#0</value>
63810                </enumeratedValue>
63811                <enumeratedValue>
63812                  <name>1</name>
63813                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
63814                  <value>#1</value>
63815                </enumeratedValue>
63816              </enumeratedValues>
63817            </field>
63818          </fields>
63819        </register>
63820        <register>
63821          <name>PCR26</name>
63822          <description>Pin Control Register n</description>
63823          <addressOffset>0x68</addressOffset>
63824          <size>32</size>
63825          <access>read-write</access>
63826          <resetValue>0</resetValue>
63827          <resetMask>0xFFFFFFFF</resetMask>
63828          <fields>
63829            <field>
63830              <name>PS</name>
63831              <description>Pull Select</description>
63832              <bitOffset>0</bitOffset>
63833              <bitWidth>1</bitWidth>
63834              <access>read-only</access>
63835              <enumeratedValues>
63836                <enumeratedValue>
63837                  <name>0</name>
63838                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
63839                  <value>#0</value>
63840                </enumeratedValue>
63841                <enumeratedValue>
63842                  <name>1</name>
63843                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
63844                  <value>#1</value>
63845                </enumeratedValue>
63846              </enumeratedValues>
63847            </field>
63848            <field>
63849              <name>PE</name>
63850              <description>Pull Enable</description>
63851              <bitOffset>1</bitOffset>
63852              <bitWidth>1</bitWidth>
63853              <access>read-only</access>
63854              <enumeratedValues>
63855                <enumeratedValue>
63856                  <name>0</name>
63857                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
63858                  <value>#0</value>
63859                </enumeratedValue>
63860                <enumeratedValue>
63861                  <name>1</name>
63862                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
63863                  <value>#1</value>
63864                </enumeratedValue>
63865              </enumeratedValues>
63866            </field>
63867            <field>
63868              <name>SRE</name>
63869              <description>Slew Rate Enable</description>
63870              <bitOffset>2</bitOffset>
63871              <bitWidth>1</bitWidth>
63872              <access>read-only</access>
63873              <enumeratedValues>
63874                <enumeratedValue>
63875                  <name>0</name>
63876                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
63877                  <value>#0</value>
63878                </enumeratedValue>
63879                <enumeratedValue>
63880                  <name>1</name>
63881                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
63882                  <value>#1</value>
63883                </enumeratedValue>
63884              </enumeratedValues>
63885            </field>
63886            <field>
63887              <name>PFE</name>
63888              <description>Passive Filter Enable</description>
63889              <bitOffset>4</bitOffset>
63890              <bitWidth>1</bitWidth>
63891              <access>read-only</access>
63892              <enumeratedValues>
63893                <enumeratedValue>
63894                  <name>0</name>
63895                  <description>Passive input filter is disabled on the corresponding pin.</description>
63896                  <value>#0</value>
63897                </enumeratedValue>
63898                <enumeratedValue>
63899                  <name>1</name>
63900                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
63901                  <value>#1</value>
63902                </enumeratedValue>
63903              </enumeratedValues>
63904            </field>
63905            <field>
63906              <name>ODE</name>
63907              <description>Open Drain Enable</description>
63908              <bitOffset>5</bitOffset>
63909              <bitWidth>1</bitWidth>
63910              <access>read-only</access>
63911              <enumeratedValues>
63912                <enumeratedValue>
63913                  <name>0</name>
63914                  <description>Open drain output is disabled on the corresponding pin.</description>
63915                  <value>#0</value>
63916                </enumeratedValue>
63917                <enumeratedValue>
63918                  <name>1</name>
63919                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
63920                  <value>#1</value>
63921                </enumeratedValue>
63922              </enumeratedValues>
63923            </field>
63924            <field>
63925              <name>DSE</name>
63926              <description>Drive Strength Enable</description>
63927              <bitOffset>6</bitOffset>
63928              <bitWidth>1</bitWidth>
63929              <access>read-only</access>
63930              <enumeratedValues>
63931                <enumeratedValue>
63932                  <name>0</name>
63933                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
63934                  <value>#0</value>
63935                </enumeratedValue>
63936                <enumeratedValue>
63937                  <name>1</name>
63938                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
63939                  <value>#1</value>
63940                </enumeratedValue>
63941              </enumeratedValues>
63942            </field>
63943            <field>
63944              <name>MUX</name>
63945              <description>Pin Mux Control</description>
63946              <bitOffset>8</bitOffset>
63947              <bitWidth>3</bitWidth>
63948              <access>read-write</access>
63949              <enumeratedValues>
63950                <enumeratedValue>
63951                  <name>000</name>
63952                  <description>Pin disabled (Alternative 0) (analog).</description>
63953                  <value>#000</value>
63954                </enumeratedValue>
63955                <enumeratedValue>
63956                  <name>001</name>
63957                  <description>Alternative 1 (GPIO).</description>
63958                  <value>#001</value>
63959                </enumeratedValue>
63960                <enumeratedValue>
63961                  <name>010</name>
63962                  <description>Alternative 2 (chip-specific).</description>
63963                  <value>#010</value>
63964                </enumeratedValue>
63965                <enumeratedValue>
63966                  <name>011</name>
63967                  <description>Alternative 3 (chip-specific).</description>
63968                  <value>#011</value>
63969                </enumeratedValue>
63970                <enumeratedValue>
63971                  <name>100</name>
63972                  <description>Alternative 4 (chip-specific).</description>
63973                  <value>#100</value>
63974                </enumeratedValue>
63975                <enumeratedValue>
63976                  <name>101</name>
63977                  <description>Alternative 5 (chip-specific).</description>
63978                  <value>#101</value>
63979                </enumeratedValue>
63980                <enumeratedValue>
63981                  <name>110</name>
63982                  <description>Alternative 6 (chip-specific).</description>
63983                  <value>#110</value>
63984                </enumeratedValue>
63985                <enumeratedValue>
63986                  <name>111</name>
63987                  <description>Alternative 7 (chip-specific).</description>
63988                  <value>#111</value>
63989                </enumeratedValue>
63990              </enumeratedValues>
63991            </field>
63992            <field>
63993              <name>LK</name>
63994              <description>Lock Register</description>
63995              <bitOffset>15</bitOffset>
63996              <bitWidth>1</bitWidth>
63997              <access>read-write</access>
63998              <enumeratedValues>
63999                <enumeratedValue>
64000                  <name>0</name>
64001                  <description>Pin Control Register fields [15:0] are not locked.</description>
64002                  <value>#0</value>
64003                </enumeratedValue>
64004                <enumeratedValue>
64005                  <name>1</name>
64006                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
64007                  <value>#1</value>
64008                </enumeratedValue>
64009              </enumeratedValues>
64010            </field>
64011            <field>
64012              <name>IRQC</name>
64013              <description>Interrupt Configuration</description>
64014              <bitOffset>16</bitOffset>
64015              <bitWidth>4</bitWidth>
64016              <access>read-write</access>
64017              <enumeratedValues>
64018                <enumeratedValue>
64019                  <name>0000</name>
64020                  <description>Interrupt Status Flag (ISF) is disabled.</description>
64021                  <value>#0000</value>
64022                </enumeratedValue>
64023                <enumeratedValue>
64024                  <name>0001</name>
64025                  <description>ISF flag and DMA request on rising edge.</description>
64026                  <value>#0001</value>
64027                </enumeratedValue>
64028                <enumeratedValue>
64029                  <name>0010</name>
64030                  <description>ISF flag and DMA request on falling edge.</description>
64031                  <value>#0010</value>
64032                </enumeratedValue>
64033                <enumeratedValue>
64034                  <name>0011</name>
64035                  <description>ISF flag and DMA request on either edge.</description>
64036                  <value>#0011</value>
64037                </enumeratedValue>
64038                <enumeratedValue>
64039                  <name>1000</name>
64040                  <description>ISF flag and Interrupt when logic 0.</description>
64041                  <value>#1000</value>
64042                </enumeratedValue>
64043                <enumeratedValue>
64044                  <name>1001</name>
64045                  <description>ISF flag and Interrupt on rising-edge.</description>
64046                  <value>#1001</value>
64047                </enumeratedValue>
64048                <enumeratedValue>
64049                  <name>1010</name>
64050                  <description>ISF flag and Interrupt on falling-edge.</description>
64051                  <value>#1010</value>
64052                </enumeratedValue>
64053                <enumeratedValue>
64054                  <name>1011</name>
64055                  <description>ISF flag and Interrupt on either edge.</description>
64056                  <value>#1011</value>
64057                </enumeratedValue>
64058                <enumeratedValue>
64059                  <name>1100</name>
64060                  <description>ISF flag and Interrupt when logic 1.</description>
64061                  <value>#1100</value>
64062                </enumeratedValue>
64063              </enumeratedValues>
64064            </field>
64065            <field>
64066              <name>ISF</name>
64067              <description>Interrupt Status Flag</description>
64068              <bitOffset>24</bitOffset>
64069              <bitWidth>1</bitWidth>
64070              <access>read-write</access>
64071              <enumeratedValues>
64072                <enumeratedValue>
64073                  <name>0</name>
64074                  <description>Configured interrupt is not detected.</description>
64075                  <value>#0</value>
64076                </enumeratedValue>
64077                <enumeratedValue>
64078                  <name>1</name>
64079                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
64080                  <value>#1</value>
64081                </enumeratedValue>
64082              </enumeratedValues>
64083            </field>
64084          </fields>
64085        </register>
64086        <register>
64087          <name>PCR27</name>
64088          <description>Pin Control Register n</description>
64089          <addressOffset>0x6C</addressOffset>
64090          <size>32</size>
64091          <access>read-write</access>
64092          <resetValue>0</resetValue>
64093          <resetMask>0xFFFFFFFF</resetMask>
64094          <fields>
64095            <field>
64096              <name>PS</name>
64097              <description>Pull Select</description>
64098              <bitOffset>0</bitOffset>
64099              <bitWidth>1</bitWidth>
64100              <access>read-only</access>
64101              <enumeratedValues>
64102                <enumeratedValue>
64103                  <name>0</name>
64104                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
64105                  <value>#0</value>
64106                </enumeratedValue>
64107                <enumeratedValue>
64108                  <name>1</name>
64109                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
64110                  <value>#1</value>
64111                </enumeratedValue>
64112              </enumeratedValues>
64113            </field>
64114            <field>
64115              <name>PE</name>
64116              <description>Pull Enable</description>
64117              <bitOffset>1</bitOffset>
64118              <bitWidth>1</bitWidth>
64119              <access>read-only</access>
64120              <enumeratedValues>
64121                <enumeratedValue>
64122                  <name>0</name>
64123                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
64124                  <value>#0</value>
64125                </enumeratedValue>
64126                <enumeratedValue>
64127                  <name>1</name>
64128                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
64129                  <value>#1</value>
64130                </enumeratedValue>
64131              </enumeratedValues>
64132            </field>
64133            <field>
64134              <name>SRE</name>
64135              <description>Slew Rate Enable</description>
64136              <bitOffset>2</bitOffset>
64137              <bitWidth>1</bitWidth>
64138              <access>read-only</access>
64139              <enumeratedValues>
64140                <enumeratedValue>
64141                  <name>0</name>
64142                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
64143                  <value>#0</value>
64144                </enumeratedValue>
64145                <enumeratedValue>
64146                  <name>1</name>
64147                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
64148                  <value>#1</value>
64149                </enumeratedValue>
64150              </enumeratedValues>
64151            </field>
64152            <field>
64153              <name>PFE</name>
64154              <description>Passive Filter Enable</description>
64155              <bitOffset>4</bitOffset>
64156              <bitWidth>1</bitWidth>
64157              <access>read-only</access>
64158              <enumeratedValues>
64159                <enumeratedValue>
64160                  <name>0</name>
64161                  <description>Passive input filter is disabled on the corresponding pin.</description>
64162                  <value>#0</value>
64163                </enumeratedValue>
64164                <enumeratedValue>
64165                  <name>1</name>
64166                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
64167                  <value>#1</value>
64168                </enumeratedValue>
64169              </enumeratedValues>
64170            </field>
64171            <field>
64172              <name>ODE</name>
64173              <description>Open Drain Enable</description>
64174              <bitOffset>5</bitOffset>
64175              <bitWidth>1</bitWidth>
64176              <access>read-only</access>
64177              <enumeratedValues>
64178                <enumeratedValue>
64179                  <name>0</name>
64180                  <description>Open drain output is disabled on the corresponding pin.</description>
64181                  <value>#0</value>
64182                </enumeratedValue>
64183                <enumeratedValue>
64184                  <name>1</name>
64185                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
64186                  <value>#1</value>
64187                </enumeratedValue>
64188              </enumeratedValues>
64189            </field>
64190            <field>
64191              <name>DSE</name>
64192              <description>Drive Strength Enable</description>
64193              <bitOffset>6</bitOffset>
64194              <bitWidth>1</bitWidth>
64195              <access>read-only</access>
64196              <enumeratedValues>
64197                <enumeratedValue>
64198                  <name>0</name>
64199                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
64200                  <value>#0</value>
64201                </enumeratedValue>
64202                <enumeratedValue>
64203                  <name>1</name>
64204                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
64205                  <value>#1</value>
64206                </enumeratedValue>
64207              </enumeratedValues>
64208            </field>
64209            <field>
64210              <name>MUX</name>
64211              <description>Pin Mux Control</description>
64212              <bitOffset>8</bitOffset>
64213              <bitWidth>3</bitWidth>
64214              <access>read-write</access>
64215              <enumeratedValues>
64216                <enumeratedValue>
64217                  <name>000</name>
64218                  <description>Pin disabled (Alternative 0) (analog).</description>
64219                  <value>#000</value>
64220                </enumeratedValue>
64221                <enumeratedValue>
64222                  <name>001</name>
64223                  <description>Alternative 1 (GPIO).</description>
64224                  <value>#001</value>
64225                </enumeratedValue>
64226                <enumeratedValue>
64227                  <name>010</name>
64228                  <description>Alternative 2 (chip-specific).</description>
64229                  <value>#010</value>
64230                </enumeratedValue>
64231                <enumeratedValue>
64232                  <name>011</name>
64233                  <description>Alternative 3 (chip-specific).</description>
64234                  <value>#011</value>
64235                </enumeratedValue>
64236                <enumeratedValue>
64237                  <name>100</name>
64238                  <description>Alternative 4 (chip-specific).</description>
64239                  <value>#100</value>
64240                </enumeratedValue>
64241                <enumeratedValue>
64242                  <name>101</name>
64243                  <description>Alternative 5 (chip-specific).</description>
64244                  <value>#101</value>
64245                </enumeratedValue>
64246                <enumeratedValue>
64247                  <name>110</name>
64248                  <description>Alternative 6 (chip-specific).</description>
64249                  <value>#110</value>
64250                </enumeratedValue>
64251                <enumeratedValue>
64252                  <name>111</name>
64253                  <description>Alternative 7 (chip-specific).</description>
64254                  <value>#111</value>
64255                </enumeratedValue>
64256              </enumeratedValues>
64257            </field>
64258            <field>
64259              <name>LK</name>
64260              <description>Lock Register</description>
64261              <bitOffset>15</bitOffset>
64262              <bitWidth>1</bitWidth>
64263              <access>read-write</access>
64264              <enumeratedValues>
64265                <enumeratedValue>
64266                  <name>0</name>
64267                  <description>Pin Control Register fields [15:0] are not locked.</description>
64268                  <value>#0</value>
64269                </enumeratedValue>
64270                <enumeratedValue>
64271                  <name>1</name>
64272                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
64273                  <value>#1</value>
64274                </enumeratedValue>
64275              </enumeratedValues>
64276            </field>
64277            <field>
64278              <name>IRQC</name>
64279              <description>Interrupt Configuration</description>
64280              <bitOffset>16</bitOffset>
64281              <bitWidth>4</bitWidth>
64282              <access>read-write</access>
64283              <enumeratedValues>
64284                <enumeratedValue>
64285                  <name>0000</name>
64286                  <description>Interrupt Status Flag (ISF) is disabled.</description>
64287                  <value>#0000</value>
64288                </enumeratedValue>
64289                <enumeratedValue>
64290                  <name>0001</name>
64291                  <description>ISF flag and DMA request on rising edge.</description>
64292                  <value>#0001</value>
64293                </enumeratedValue>
64294                <enumeratedValue>
64295                  <name>0010</name>
64296                  <description>ISF flag and DMA request on falling edge.</description>
64297                  <value>#0010</value>
64298                </enumeratedValue>
64299                <enumeratedValue>
64300                  <name>0011</name>
64301                  <description>ISF flag and DMA request on either edge.</description>
64302                  <value>#0011</value>
64303                </enumeratedValue>
64304                <enumeratedValue>
64305                  <name>1000</name>
64306                  <description>ISF flag and Interrupt when logic 0.</description>
64307                  <value>#1000</value>
64308                </enumeratedValue>
64309                <enumeratedValue>
64310                  <name>1001</name>
64311                  <description>ISF flag and Interrupt on rising-edge.</description>
64312                  <value>#1001</value>
64313                </enumeratedValue>
64314                <enumeratedValue>
64315                  <name>1010</name>
64316                  <description>ISF flag and Interrupt on falling-edge.</description>
64317                  <value>#1010</value>
64318                </enumeratedValue>
64319                <enumeratedValue>
64320                  <name>1011</name>
64321                  <description>ISF flag and Interrupt on either edge.</description>
64322                  <value>#1011</value>
64323                </enumeratedValue>
64324                <enumeratedValue>
64325                  <name>1100</name>
64326                  <description>ISF flag and Interrupt when logic 1.</description>
64327                  <value>#1100</value>
64328                </enumeratedValue>
64329              </enumeratedValues>
64330            </field>
64331            <field>
64332              <name>ISF</name>
64333              <description>Interrupt Status Flag</description>
64334              <bitOffset>24</bitOffset>
64335              <bitWidth>1</bitWidth>
64336              <access>read-write</access>
64337              <enumeratedValues>
64338                <enumeratedValue>
64339                  <name>0</name>
64340                  <description>Configured interrupt is not detected.</description>
64341                  <value>#0</value>
64342                </enumeratedValue>
64343                <enumeratedValue>
64344                  <name>1</name>
64345                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
64346                  <value>#1</value>
64347                </enumeratedValue>
64348              </enumeratedValues>
64349            </field>
64350          </fields>
64351        </register>
64352        <register>
64353          <name>PCR28</name>
64354          <description>Pin Control Register n</description>
64355          <addressOffset>0x70</addressOffset>
64356          <size>32</size>
64357          <access>read-write</access>
64358          <resetValue>0</resetValue>
64359          <resetMask>0xFFFFFFFF</resetMask>
64360          <fields>
64361            <field>
64362              <name>PS</name>
64363              <description>Pull Select</description>
64364              <bitOffset>0</bitOffset>
64365              <bitWidth>1</bitWidth>
64366              <access>read-only</access>
64367              <enumeratedValues>
64368                <enumeratedValue>
64369                  <name>0</name>
64370                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
64371                  <value>#0</value>
64372                </enumeratedValue>
64373                <enumeratedValue>
64374                  <name>1</name>
64375                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
64376                  <value>#1</value>
64377                </enumeratedValue>
64378              </enumeratedValues>
64379            </field>
64380            <field>
64381              <name>PE</name>
64382              <description>Pull Enable</description>
64383              <bitOffset>1</bitOffset>
64384              <bitWidth>1</bitWidth>
64385              <access>read-only</access>
64386              <enumeratedValues>
64387                <enumeratedValue>
64388                  <name>0</name>
64389                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
64390                  <value>#0</value>
64391                </enumeratedValue>
64392                <enumeratedValue>
64393                  <name>1</name>
64394                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
64395                  <value>#1</value>
64396                </enumeratedValue>
64397              </enumeratedValues>
64398            </field>
64399            <field>
64400              <name>SRE</name>
64401              <description>Slew Rate Enable</description>
64402              <bitOffset>2</bitOffset>
64403              <bitWidth>1</bitWidth>
64404              <access>read-only</access>
64405              <enumeratedValues>
64406                <enumeratedValue>
64407                  <name>0</name>
64408                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
64409                  <value>#0</value>
64410                </enumeratedValue>
64411                <enumeratedValue>
64412                  <name>1</name>
64413                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
64414                  <value>#1</value>
64415                </enumeratedValue>
64416              </enumeratedValues>
64417            </field>
64418            <field>
64419              <name>PFE</name>
64420              <description>Passive Filter Enable</description>
64421              <bitOffset>4</bitOffset>
64422              <bitWidth>1</bitWidth>
64423              <access>read-only</access>
64424              <enumeratedValues>
64425                <enumeratedValue>
64426                  <name>0</name>
64427                  <description>Passive input filter is disabled on the corresponding pin.</description>
64428                  <value>#0</value>
64429                </enumeratedValue>
64430                <enumeratedValue>
64431                  <name>1</name>
64432                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
64433                  <value>#1</value>
64434                </enumeratedValue>
64435              </enumeratedValues>
64436            </field>
64437            <field>
64438              <name>ODE</name>
64439              <description>Open Drain Enable</description>
64440              <bitOffset>5</bitOffset>
64441              <bitWidth>1</bitWidth>
64442              <access>read-only</access>
64443              <enumeratedValues>
64444                <enumeratedValue>
64445                  <name>0</name>
64446                  <description>Open drain output is disabled on the corresponding pin.</description>
64447                  <value>#0</value>
64448                </enumeratedValue>
64449                <enumeratedValue>
64450                  <name>1</name>
64451                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
64452                  <value>#1</value>
64453                </enumeratedValue>
64454              </enumeratedValues>
64455            </field>
64456            <field>
64457              <name>DSE</name>
64458              <description>Drive Strength Enable</description>
64459              <bitOffset>6</bitOffset>
64460              <bitWidth>1</bitWidth>
64461              <access>read-only</access>
64462              <enumeratedValues>
64463                <enumeratedValue>
64464                  <name>0</name>
64465                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
64466                  <value>#0</value>
64467                </enumeratedValue>
64468                <enumeratedValue>
64469                  <name>1</name>
64470                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
64471                  <value>#1</value>
64472                </enumeratedValue>
64473              </enumeratedValues>
64474            </field>
64475            <field>
64476              <name>MUX</name>
64477              <description>Pin Mux Control</description>
64478              <bitOffset>8</bitOffset>
64479              <bitWidth>3</bitWidth>
64480              <access>read-write</access>
64481              <enumeratedValues>
64482                <enumeratedValue>
64483                  <name>000</name>
64484                  <description>Pin disabled (Alternative 0) (analog).</description>
64485                  <value>#000</value>
64486                </enumeratedValue>
64487                <enumeratedValue>
64488                  <name>001</name>
64489                  <description>Alternative 1 (GPIO).</description>
64490                  <value>#001</value>
64491                </enumeratedValue>
64492                <enumeratedValue>
64493                  <name>010</name>
64494                  <description>Alternative 2 (chip-specific).</description>
64495                  <value>#010</value>
64496                </enumeratedValue>
64497                <enumeratedValue>
64498                  <name>011</name>
64499                  <description>Alternative 3 (chip-specific).</description>
64500                  <value>#011</value>
64501                </enumeratedValue>
64502                <enumeratedValue>
64503                  <name>100</name>
64504                  <description>Alternative 4 (chip-specific).</description>
64505                  <value>#100</value>
64506                </enumeratedValue>
64507                <enumeratedValue>
64508                  <name>101</name>
64509                  <description>Alternative 5 (chip-specific).</description>
64510                  <value>#101</value>
64511                </enumeratedValue>
64512                <enumeratedValue>
64513                  <name>110</name>
64514                  <description>Alternative 6 (chip-specific).</description>
64515                  <value>#110</value>
64516                </enumeratedValue>
64517                <enumeratedValue>
64518                  <name>111</name>
64519                  <description>Alternative 7 (chip-specific).</description>
64520                  <value>#111</value>
64521                </enumeratedValue>
64522              </enumeratedValues>
64523            </field>
64524            <field>
64525              <name>LK</name>
64526              <description>Lock Register</description>
64527              <bitOffset>15</bitOffset>
64528              <bitWidth>1</bitWidth>
64529              <access>read-write</access>
64530              <enumeratedValues>
64531                <enumeratedValue>
64532                  <name>0</name>
64533                  <description>Pin Control Register fields [15:0] are not locked.</description>
64534                  <value>#0</value>
64535                </enumeratedValue>
64536                <enumeratedValue>
64537                  <name>1</name>
64538                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
64539                  <value>#1</value>
64540                </enumeratedValue>
64541              </enumeratedValues>
64542            </field>
64543            <field>
64544              <name>IRQC</name>
64545              <description>Interrupt Configuration</description>
64546              <bitOffset>16</bitOffset>
64547              <bitWidth>4</bitWidth>
64548              <access>read-write</access>
64549              <enumeratedValues>
64550                <enumeratedValue>
64551                  <name>0000</name>
64552                  <description>Interrupt Status Flag (ISF) is disabled.</description>
64553                  <value>#0000</value>
64554                </enumeratedValue>
64555                <enumeratedValue>
64556                  <name>0001</name>
64557                  <description>ISF flag and DMA request on rising edge.</description>
64558                  <value>#0001</value>
64559                </enumeratedValue>
64560                <enumeratedValue>
64561                  <name>0010</name>
64562                  <description>ISF flag and DMA request on falling edge.</description>
64563                  <value>#0010</value>
64564                </enumeratedValue>
64565                <enumeratedValue>
64566                  <name>0011</name>
64567                  <description>ISF flag and DMA request on either edge.</description>
64568                  <value>#0011</value>
64569                </enumeratedValue>
64570                <enumeratedValue>
64571                  <name>1000</name>
64572                  <description>ISF flag and Interrupt when logic 0.</description>
64573                  <value>#1000</value>
64574                </enumeratedValue>
64575                <enumeratedValue>
64576                  <name>1001</name>
64577                  <description>ISF flag and Interrupt on rising-edge.</description>
64578                  <value>#1001</value>
64579                </enumeratedValue>
64580                <enumeratedValue>
64581                  <name>1010</name>
64582                  <description>ISF flag and Interrupt on falling-edge.</description>
64583                  <value>#1010</value>
64584                </enumeratedValue>
64585                <enumeratedValue>
64586                  <name>1011</name>
64587                  <description>ISF flag and Interrupt on either edge.</description>
64588                  <value>#1011</value>
64589                </enumeratedValue>
64590                <enumeratedValue>
64591                  <name>1100</name>
64592                  <description>ISF flag and Interrupt when logic 1.</description>
64593                  <value>#1100</value>
64594                </enumeratedValue>
64595              </enumeratedValues>
64596            </field>
64597            <field>
64598              <name>ISF</name>
64599              <description>Interrupt Status Flag</description>
64600              <bitOffset>24</bitOffset>
64601              <bitWidth>1</bitWidth>
64602              <access>read-write</access>
64603              <enumeratedValues>
64604                <enumeratedValue>
64605                  <name>0</name>
64606                  <description>Configured interrupt is not detected.</description>
64607                  <value>#0</value>
64608                </enumeratedValue>
64609                <enumeratedValue>
64610                  <name>1</name>
64611                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
64612                  <value>#1</value>
64613                </enumeratedValue>
64614              </enumeratedValues>
64615            </field>
64616          </fields>
64617        </register>
64618        <register>
64619          <name>PCR29</name>
64620          <description>Pin Control Register n</description>
64621          <addressOffset>0x74</addressOffset>
64622          <size>32</size>
64623          <access>read-write</access>
64624          <resetValue>0</resetValue>
64625          <resetMask>0xFFFFFFFF</resetMask>
64626          <fields>
64627            <field>
64628              <name>PS</name>
64629              <description>Pull Select</description>
64630              <bitOffset>0</bitOffset>
64631              <bitWidth>1</bitWidth>
64632              <access>read-write</access>
64633              <enumeratedValues>
64634                <enumeratedValue>
64635                  <name>0</name>
64636                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
64637                  <value>#0</value>
64638                </enumeratedValue>
64639                <enumeratedValue>
64640                  <name>1</name>
64641                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
64642                  <value>#1</value>
64643                </enumeratedValue>
64644              </enumeratedValues>
64645            </field>
64646            <field>
64647              <name>PE</name>
64648              <description>Pull Enable</description>
64649              <bitOffset>1</bitOffset>
64650              <bitWidth>1</bitWidth>
64651              <access>read-write</access>
64652              <enumeratedValues>
64653                <enumeratedValue>
64654                  <name>0</name>
64655                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
64656                  <value>#0</value>
64657                </enumeratedValue>
64658                <enumeratedValue>
64659                  <name>1</name>
64660                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
64661                  <value>#1</value>
64662                </enumeratedValue>
64663              </enumeratedValues>
64664            </field>
64665            <field>
64666              <name>SRE</name>
64667              <description>Slew Rate Enable</description>
64668              <bitOffset>2</bitOffset>
64669              <bitWidth>1</bitWidth>
64670              <access>read-write</access>
64671              <enumeratedValues>
64672                <enumeratedValue>
64673                  <name>0</name>
64674                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
64675                  <value>#0</value>
64676                </enumeratedValue>
64677                <enumeratedValue>
64678                  <name>1</name>
64679                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
64680                  <value>#1</value>
64681                </enumeratedValue>
64682              </enumeratedValues>
64683            </field>
64684            <field>
64685              <name>PFE</name>
64686              <description>Passive Filter Enable</description>
64687              <bitOffset>4</bitOffset>
64688              <bitWidth>1</bitWidth>
64689              <access>read-only</access>
64690              <enumeratedValues>
64691                <enumeratedValue>
64692                  <name>0</name>
64693                  <description>Passive input filter is disabled on the corresponding pin.</description>
64694                  <value>#0</value>
64695                </enumeratedValue>
64696                <enumeratedValue>
64697                  <name>1</name>
64698                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
64699                  <value>#1</value>
64700                </enumeratedValue>
64701              </enumeratedValues>
64702            </field>
64703            <field>
64704              <name>ODE</name>
64705              <description>Open Drain Enable</description>
64706              <bitOffset>5</bitOffset>
64707              <bitWidth>1</bitWidth>
64708              <access>read-write</access>
64709              <enumeratedValues>
64710                <enumeratedValue>
64711                  <name>0</name>
64712                  <description>Open drain output is disabled on the corresponding pin.</description>
64713                  <value>#0</value>
64714                </enumeratedValue>
64715                <enumeratedValue>
64716                  <name>1</name>
64717                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
64718                  <value>#1</value>
64719                </enumeratedValue>
64720              </enumeratedValues>
64721            </field>
64722            <field>
64723              <name>DSE</name>
64724              <description>Drive Strength Enable</description>
64725              <bitOffset>6</bitOffset>
64726              <bitWidth>1</bitWidth>
64727              <access>read-only</access>
64728              <enumeratedValues>
64729                <enumeratedValue>
64730                  <name>0</name>
64731                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
64732                  <value>#0</value>
64733                </enumeratedValue>
64734                <enumeratedValue>
64735                  <name>1</name>
64736                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
64737                  <value>#1</value>
64738                </enumeratedValue>
64739              </enumeratedValues>
64740            </field>
64741            <field>
64742              <name>MUX</name>
64743              <description>Pin Mux Control</description>
64744              <bitOffset>8</bitOffset>
64745              <bitWidth>3</bitWidth>
64746              <access>read-write</access>
64747              <enumeratedValues>
64748                <enumeratedValue>
64749                  <name>000</name>
64750                  <description>Pin disabled (Alternative 0) (analog).</description>
64751                  <value>#000</value>
64752                </enumeratedValue>
64753                <enumeratedValue>
64754                  <name>001</name>
64755                  <description>Alternative 1 (GPIO).</description>
64756                  <value>#001</value>
64757                </enumeratedValue>
64758                <enumeratedValue>
64759                  <name>010</name>
64760                  <description>Alternative 2 (chip-specific).</description>
64761                  <value>#010</value>
64762                </enumeratedValue>
64763                <enumeratedValue>
64764                  <name>011</name>
64765                  <description>Alternative 3 (chip-specific).</description>
64766                  <value>#011</value>
64767                </enumeratedValue>
64768                <enumeratedValue>
64769                  <name>100</name>
64770                  <description>Alternative 4 (chip-specific).</description>
64771                  <value>#100</value>
64772                </enumeratedValue>
64773                <enumeratedValue>
64774                  <name>101</name>
64775                  <description>Alternative 5 (chip-specific).</description>
64776                  <value>#101</value>
64777                </enumeratedValue>
64778                <enumeratedValue>
64779                  <name>110</name>
64780                  <description>Alternative 6 (chip-specific).</description>
64781                  <value>#110</value>
64782                </enumeratedValue>
64783                <enumeratedValue>
64784                  <name>111</name>
64785                  <description>Alternative 7 (chip-specific).</description>
64786                  <value>#111</value>
64787                </enumeratedValue>
64788              </enumeratedValues>
64789            </field>
64790            <field>
64791              <name>LK</name>
64792              <description>Lock Register</description>
64793              <bitOffset>15</bitOffset>
64794              <bitWidth>1</bitWidth>
64795              <access>read-write</access>
64796              <enumeratedValues>
64797                <enumeratedValue>
64798                  <name>0</name>
64799                  <description>Pin Control Register fields [15:0] are not locked.</description>
64800                  <value>#0</value>
64801                </enumeratedValue>
64802                <enumeratedValue>
64803                  <name>1</name>
64804                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
64805                  <value>#1</value>
64806                </enumeratedValue>
64807              </enumeratedValues>
64808            </field>
64809            <field>
64810              <name>IRQC</name>
64811              <description>Interrupt Configuration</description>
64812              <bitOffset>16</bitOffset>
64813              <bitWidth>4</bitWidth>
64814              <access>read-write</access>
64815              <enumeratedValues>
64816                <enumeratedValue>
64817                  <name>0000</name>
64818                  <description>Interrupt Status Flag (ISF) is disabled.</description>
64819                  <value>#0000</value>
64820                </enumeratedValue>
64821                <enumeratedValue>
64822                  <name>0001</name>
64823                  <description>ISF flag and DMA request on rising edge.</description>
64824                  <value>#0001</value>
64825                </enumeratedValue>
64826                <enumeratedValue>
64827                  <name>0010</name>
64828                  <description>ISF flag and DMA request on falling edge.</description>
64829                  <value>#0010</value>
64830                </enumeratedValue>
64831                <enumeratedValue>
64832                  <name>0011</name>
64833                  <description>ISF flag and DMA request on either edge.</description>
64834                  <value>#0011</value>
64835                </enumeratedValue>
64836                <enumeratedValue>
64837                  <name>1000</name>
64838                  <description>ISF flag and Interrupt when logic 0.</description>
64839                  <value>#1000</value>
64840                </enumeratedValue>
64841                <enumeratedValue>
64842                  <name>1001</name>
64843                  <description>ISF flag and Interrupt on rising-edge.</description>
64844                  <value>#1001</value>
64845                </enumeratedValue>
64846                <enumeratedValue>
64847                  <name>1010</name>
64848                  <description>ISF flag and Interrupt on falling-edge.</description>
64849                  <value>#1010</value>
64850                </enumeratedValue>
64851                <enumeratedValue>
64852                  <name>1011</name>
64853                  <description>ISF flag and Interrupt on either edge.</description>
64854                  <value>#1011</value>
64855                </enumeratedValue>
64856                <enumeratedValue>
64857                  <name>1100</name>
64858                  <description>ISF flag and Interrupt when logic 1.</description>
64859                  <value>#1100</value>
64860                </enumeratedValue>
64861              </enumeratedValues>
64862            </field>
64863            <field>
64864              <name>ISF</name>
64865              <description>Interrupt Status Flag</description>
64866              <bitOffset>24</bitOffset>
64867              <bitWidth>1</bitWidth>
64868              <access>read-write</access>
64869              <enumeratedValues>
64870                <enumeratedValue>
64871                  <name>0</name>
64872                  <description>Configured interrupt is not detected.</description>
64873                  <value>#0</value>
64874                </enumeratedValue>
64875                <enumeratedValue>
64876                  <name>1</name>
64877                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
64878                  <value>#1</value>
64879                </enumeratedValue>
64880              </enumeratedValues>
64881            </field>
64882          </fields>
64883        </register>
64884        <register>
64885          <name>PCR30</name>
64886          <description>Pin Control Register n</description>
64887          <addressOffset>0x78</addressOffset>
64888          <size>32</size>
64889          <access>read-write</access>
64890          <resetValue>0</resetValue>
64891          <resetMask>0xFFFFFFFF</resetMask>
64892          <fields>
64893            <field>
64894              <name>PS</name>
64895              <description>Pull Select</description>
64896              <bitOffset>0</bitOffset>
64897              <bitWidth>1</bitWidth>
64898              <access>read-only</access>
64899              <enumeratedValues>
64900                <enumeratedValue>
64901                  <name>0</name>
64902                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
64903                  <value>#0</value>
64904                </enumeratedValue>
64905                <enumeratedValue>
64906                  <name>1</name>
64907                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
64908                  <value>#1</value>
64909                </enumeratedValue>
64910              </enumeratedValues>
64911            </field>
64912            <field>
64913              <name>PE</name>
64914              <description>Pull Enable</description>
64915              <bitOffset>1</bitOffset>
64916              <bitWidth>1</bitWidth>
64917              <access>read-only</access>
64918              <enumeratedValues>
64919                <enumeratedValue>
64920                  <name>0</name>
64921                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
64922                  <value>#0</value>
64923                </enumeratedValue>
64924                <enumeratedValue>
64925                  <name>1</name>
64926                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
64927                  <value>#1</value>
64928                </enumeratedValue>
64929              </enumeratedValues>
64930            </field>
64931            <field>
64932              <name>SRE</name>
64933              <description>Slew Rate Enable</description>
64934              <bitOffset>2</bitOffset>
64935              <bitWidth>1</bitWidth>
64936              <access>read-only</access>
64937              <enumeratedValues>
64938                <enumeratedValue>
64939                  <name>0</name>
64940                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
64941                  <value>#0</value>
64942                </enumeratedValue>
64943                <enumeratedValue>
64944                  <name>1</name>
64945                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
64946                  <value>#1</value>
64947                </enumeratedValue>
64948              </enumeratedValues>
64949            </field>
64950            <field>
64951              <name>PFE</name>
64952              <description>Passive Filter Enable</description>
64953              <bitOffset>4</bitOffset>
64954              <bitWidth>1</bitWidth>
64955              <access>read-only</access>
64956              <enumeratedValues>
64957                <enumeratedValue>
64958                  <name>0</name>
64959                  <description>Passive input filter is disabled on the corresponding pin.</description>
64960                  <value>#0</value>
64961                </enumeratedValue>
64962                <enumeratedValue>
64963                  <name>1</name>
64964                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
64965                  <value>#1</value>
64966                </enumeratedValue>
64967              </enumeratedValues>
64968            </field>
64969            <field>
64970              <name>ODE</name>
64971              <description>Open Drain Enable</description>
64972              <bitOffset>5</bitOffset>
64973              <bitWidth>1</bitWidth>
64974              <access>read-only</access>
64975              <enumeratedValues>
64976                <enumeratedValue>
64977                  <name>0</name>
64978                  <description>Open drain output is disabled on the corresponding pin.</description>
64979                  <value>#0</value>
64980                </enumeratedValue>
64981                <enumeratedValue>
64982                  <name>1</name>
64983                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
64984                  <value>#1</value>
64985                </enumeratedValue>
64986              </enumeratedValues>
64987            </field>
64988            <field>
64989              <name>DSE</name>
64990              <description>Drive Strength Enable</description>
64991              <bitOffset>6</bitOffset>
64992              <bitWidth>1</bitWidth>
64993              <access>read-only</access>
64994              <enumeratedValues>
64995                <enumeratedValue>
64996                  <name>0</name>
64997                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
64998                  <value>#0</value>
64999                </enumeratedValue>
65000                <enumeratedValue>
65001                  <name>1</name>
65002                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
65003                  <value>#1</value>
65004                </enumeratedValue>
65005              </enumeratedValues>
65006            </field>
65007            <field>
65008              <name>MUX</name>
65009              <description>Pin Mux Control</description>
65010              <bitOffset>8</bitOffset>
65011              <bitWidth>3</bitWidth>
65012              <access>read-write</access>
65013              <enumeratedValues>
65014                <enumeratedValue>
65015                  <name>000</name>
65016                  <description>Pin disabled (Alternative 0) (analog).</description>
65017                  <value>#000</value>
65018                </enumeratedValue>
65019                <enumeratedValue>
65020                  <name>001</name>
65021                  <description>Alternative 1 (GPIO).</description>
65022                  <value>#001</value>
65023                </enumeratedValue>
65024                <enumeratedValue>
65025                  <name>010</name>
65026                  <description>Alternative 2 (chip-specific).</description>
65027                  <value>#010</value>
65028                </enumeratedValue>
65029                <enumeratedValue>
65030                  <name>011</name>
65031                  <description>Alternative 3 (chip-specific).</description>
65032                  <value>#011</value>
65033                </enumeratedValue>
65034                <enumeratedValue>
65035                  <name>100</name>
65036                  <description>Alternative 4 (chip-specific).</description>
65037                  <value>#100</value>
65038                </enumeratedValue>
65039                <enumeratedValue>
65040                  <name>101</name>
65041                  <description>Alternative 5 (chip-specific).</description>
65042                  <value>#101</value>
65043                </enumeratedValue>
65044                <enumeratedValue>
65045                  <name>110</name>
65046                  <description>Alternative 6 (chip-specific).</description>
65047                  <value>#110</value>
65048                </enumeratedValue>
65049                <enumeratedValue>
65050                  <name>111</name>
65051                  <description>Alternative 7 (chip-specific).</description>
65052                  <value>#111</value>
65053                </enumeratedValue>
65054              </enumeratedValues>
65055            </field>
65056            <field>
65057              <name>LK</name>
65058              <description>Lock Register</description>
65059              <bitOffset>15</bitOffset>
65060              <bitWidth>1</bitWidth>
65061              <access>read-write</access>
65062              <enumeratedValues>
65063                <enumeratedValue>
65064                  <name>0</name>
65065                  <description>Pin Control Register fields [15:0] are not locked.</description>
65066                  <value>#0</value>
65067                </enumeratedValue>
65068                <enumeratedValue>
65069                  <name>1</name>
65070                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
65071                  <value>#1</value>
65072                </enumeratedValue>
65073              </enumeratedValues>
65074            </field>
65075            <field>
65076              <name>IRQC</name>
65077              <description>Interrupt Configuration</description>
65078              <bitOffset>16</bitOffset>
65079              <bitWidth>4</bitWidth>
65080              <access>read-write</access>
65081              <enumeratedValues>
65082                <enumeratedValue>
65083                  <name>0000</name>
65084                  <description>Interrupt Status Flag (ISF) is disabled.</description>
65085                  <value>#0000</value>
65086                </enumeratedValue>
65087                <enumeratedValue>
65088                  <name>0001</name>
65089                  <description>ISF flag and DMA request on rising edge.</description>
65090                  <value>#0001</value>
65091                </enumeratedValue>
65092                <enumeratedValue>
65093                  <name>0010</name>
65094                  <description>ISF flag and DMA request on falling edge.</description>
65095                  <value>#0010</value>
65096                </enumeratedValue>
65097                <enumeratedValue>
65098                  <name>0011</name>
65099                  <description>ISF flag and DMA request on either edge.</description>
65100                  <value>#0011</value>
65101                </enumeratedValue>
65102                <enumeratedValue>
65103                  <name>1000</name>
65104                  <description>ISF flag and Interrupt when logic 0.</description>
65105                  <value>#1000</value>
65106                </enumeratedValue>
65107                <enumeratedValue>
65108                  <name>1001</name>
65109                  <description>ISF flag and Interrupt on rising-edge.</description>
65110                  <value>#1001</value>
65111                </enumeratedValue>
65112                <enumeratedValue>
65113                  <name>1010</name>
65114                  <description>ISF flag and Interrupt on falling-edge.</description>
65115                  <value>#1010</value>
65116                </enumeratedValue>
65117                <enumeratedValue>
65118                  <name>1011</name>
65119                  <description>ISF flag and Interrupt on either edge.</description>
65120                  <value>#1011</value>
65121                </enumeratedValue>
65122                <enumeratedValue>
65123                  <name>1100</name>
65124                  <description>ISF flag and Interrupt when logic 1.</description>
65125                  <value>#1100</value>
65126                </enumeratedValue>
65127              </enumeratedValues>
65128            </field>
65129            <field>
65130              <name>ISF</name>
65131              <description>Interrupt Status Flag</description>
65132              <bitOffset>24</bitOffset>
65133              <bitWidth>1</bitWidth>
65134              <access>read-write</access>
65135              <enumeratedValues>
65136                <enumeratedValue>
65137                  <name>0</name>
65138                  <description>Configured interrupt is not detected.</description>
65139                  <value>#0</value>
65140                </enumeratedValue>
65141                <enumeratedValue>
65142                  <name>1</name>
65143                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
65144                  <value>#1</value>
65145                </enumeratedValue>
65146              </enumeratedValues>
65147            </field>
65148          </fields>
65149        </register>
65150        <register>
65151          <name>PCR31</name>
65152          <description>Pin Control Register n</description>
65153          <addressOffset>0x7C</addressOffset>
65154          <size>32</size>
65155          <access>read-write</access>
65156          <resetValue>0</resetValue>
65157          <resetMask>0xFFFFFFFF</resetMask>
65158          <fields>
65159            <field>
65160              <name>PS</name>
65161              <description>Pull Select</description>
65162              <bitOffset>0</bitOffset>
65163              <bitWidth>1</bitWidth>
65164              <access>read-only</access>
65165              <enumeratedValues>
65166                <enumeratedValue>
65167                  <name>0</name>
65168                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
65169                  <value>#0</value>
65170                </enumeratedValue>
65171                <enumeratedValue>
65172                  <name>1</name>
65173                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
65174                  <value>#1</value>
65175                </enumeratedValue>
65176              </enumeratedValues>
65177            </field>
65178            <field>
65179              <name>PE</name>
65180              <description>Pull Enable</description>
65181              <bitOffset>1</bitOffset>
65182              <bitWidth>1</bitWidth>
65183              <access>read-only</access>
65184              <enumeratedValues>
65185                <enumeratedValue>
65186                  <name>0</name>
65187                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
65188                  <value>#0</value>
65189                </enumeratedValue>
65190                <enumeratedValue>
65191                  <name>1</name>
65192                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
65193                  <value>#1</value>
65194                </enumeratedValue>
65195              </enumeratedValues>
65196            </field>
65197            <field>
65198              <name>SRE</name>
65199              <description>Slew Rate Enable</description>
65200              <bitOffset>2</bitOffset>
65201              <bitWidth>1</bitWidth>
65202              <access>read-only</access>
65203              <enumeratedValues>
65204                <enumeratedValue>
65205                  <name>0</name>
65206                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
65207                  <value>#0</value>
65208                </enumeratedValue>
65209                <enumeratedValue>
65210                  <name>1</name>
65211                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
65212                  <value>#1</value>
65213                </enumeratedValue>
65214              </enumeratedValues>
65215            </field>
65216            <field>
65217              <name>PFE</name>
65218              <description>Passive Filter Enable</description>
65219              <bitOffset>4</bitOffset>
65220              <bitWidth>1</bitWidth>
65221              <access>read-only</access>
65222              <enumeratedValues>
65223                <enumeratedValue>
65224                  <name>0</name>
65225                  <description>Passive input filter is disabled on the corresponding pin.</description>
65226                  <value>#0</value>
65227                </enumeratedValue>
65228                <enumeratedValue>
65229                  <name>1</name>
65230                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
65231                  <value>#1</value>
65232                </enumeratedValue>
65233              </enumeratedValues>
65234            </field>
65235            <field>
65236              <name>ODE</name>
65237              <description>Open Drain Enable</description>
65238              <bitOffset>5</bitOffset>
65239              <bitWidth>1</bitWidth>
65240              <access>read-only</access>
65241              <enumeratedValues>
65242                <enumeratedValue>
65243                  <name>0</name>
65244                  <description>Open drain output is disabled on the corresponding pin.</description>
65245                  <value>#0</value>
65246                </enumeratedValue>
65247                <enumeratedValue>
65248                  <name>1</name>
65249                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
65250                  <value>#1</value>
65251                </enumeratedValue>
65252              </enumeratedValues>
65253            </field>
65254            <field>
65255              <name>DSE</name>
65256              <description>Drive Strength Enable</description>
65257              <bitOffset>6</bitOffset>
65258              <bitWidth>1</bitWidth>
65259              <access>read-only</access>
65260              <enumeratedValues>
65261                <enumeratedValue>
65262                  <name>0</name>
65263                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
65264                  <value>#0</value>
65265                </enumeratedValue>
65266                <enumeratedValue>
65267                  <name>1</name>
65268                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
65269                  <value>#1</value>
65270                </enumeratedValue>
65271              </enumeratedValues>
65272            </field>
65273            <field>
65274              <name>MUX</name>
65275              <description>Pin Mux Control</description>
65276              <bitOffset>8</bitOffset>
65277              <bitWidth>3</bitWidth>
65278              <access>read-write</access>
65279              <enumeratedValues>
65280                <enumeratedValue>
65281                  <name>000</name>
65282                  <description>Pin disabled (Alternative 0) (analog).</description>
65283                  <value>#000</value>
65284                </enumeratedValue>
65285                <enumeratedValue>
65286                  <name>001</name>
65287                  <description>Alternative 1 (GPIO).</description>
65288                  <value>#001</value>
65289                </enumeratedValue>
65290                <enumeratedValue>
65291                  <name>010</name>
65292                  <description>Alternative 2 (chip-specific).</description>
65293                  <value>#010</value>
65294                </enumeratedValue>
65295                <enumeratedValue>
65296                  <name>011</name>
65297                  <description>Alternative 3 (chip-specific).</description>
65298                  <value>#011</value>
65299                </enumeratedValue>
65300                <enumeratedValue>
65301                  <name>100</name>
65302                  <description>Alternative 4 (chip-specific).</description>
65303                  <value>#100</value>
65304                </enumeratedValue>
65305                <enumeratedValue>
65306                  <name>101</name>
65307                  <description>Alternative 5 (chip-specific).</description>
65308                  <value>#101</value>
65309                </enumeratedValue>
65310                <enumeratedValue>
65311                  <name>110</name>
65312                  <description>Alternative 6 (chip-specific).</description>
65313                  <value>#110</value>
65314                </enumeratedValue>
65315                <enumeratedValue>
65316                  <name>111</name>
65317                  <description>Alternative 7 (chip-specific).</description>
65318                  <value>#111</value>
65319                </enumeratedValue>
65320              </enumeratedValues>
65321            </field>
65322            <field>
65323              <name>LK</name>
65324              <description>Lock Register</description>
65325              <bitOffset>15</bitOffset>
65326              <bitWidth>1</bitWidth>
65327              <access>read-write</access>
65328              <enumeratedValues>
65329                <enumeratedValue>
65330                  <name>0</name>
65331                  <description>Pin Control Register fields [15:0] are not locked.</description>
65332                  <value>#0</value>
65333                </enumeratedValue>
65334                <enumeratedValue>
65335                  <name>1</name>
65336                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
65337                  <value>#1</value>
65338                </enumeratedValue>
65339              </enumeratedValues>
65340            </field>
65341            <field>
65342              <name>IRQC</name>
65343              <description>Interrupt Configuration</description>
65344              <bitOffset>16</bitOffset>
65345              <bitWidth>4</bitWidth>
65346              <access>read-write</access>
65347              <enumeratedValues>
65348                <enumeratedValue>
65349                  <name>0000</name>
65350                  <description>Interrupt Status Flag (ISF) is disabled.</description>
65351                  <value>#0000</value>
65352                </enumeratedValue>
65353                <enumeratedValue>
65354                  <name>0001</name>
65355                  <description>ISF flag and DMA request on rising edge.</description>
65356                  <value>#0001</value>
65357                </enumeratedValue>
65358                <enumeratedValue>
65359                  <name>0010</name>
65360                  <description>ISF flag and DMA request on falling edge.</description>
65361                  <value>#0010</value>
65362                </enumeratedValue>
65363                <enumeratedValue>
65364                  <name>0011</name>
65365                  <description>ISF flag and DMA request on either edge.</description>
65366                  <value>#0011</value>
65367                </enumeratedValue>
65368                <enumeratedValue>
65369                  <name>1000</name>
65370                  <description>ISF flag and Interrupt when logic 0.</description>
65371                  <value>#1000</value>
65372                </enumeratedValue>
65373                <enumeratedValue>
65374                  <name>1001</name>
65375                  <description>ISF flag and Interrupt on rising-edge.</description>
65376                  <value>#1001</value>
65377                </enumeratedValue>
65378                <enumeratedValue>
65379                  <name>1010</name>
65380                  <description>ISF flag and Interrupt on falling-edge.</description>
65381                  <value>#1010</value>
65382                </enumeratedValue>
65383                <enumeratedValue>
65384                  <name>1011</name>
65385                  <description>ISF flag and Interrupt on either edge.</description>
65386                  <value>#1011</value>
65387                </enumeratedValue>
65388                <enumeratedValue>
65389                  <name>1100</name>
65390                  <description>ISF flag and Interrupt when logic 1.</description>
65391                  <value>#1100</value>
65392                </enumeratedValue>
65393              </enumeratedValues>
65394            </field>
65395            <field>
65396              <name>ISF</name>
65397              <description>Interrupt Status Flag</description>
65398              <bitOffset>24</bitOffset>
65399              <bitWidth>1</bitWidth>
65400              <access>read-write</access>
65401              <enumeratedValues>
65402                <enumeratedValue>
65403                  <name>0</name>
65404                  <description>Configured interrupt is not detected.</description>
65405                  <value>#0</value>
65406                </enumeratedValue>
65407                <enumeratedValue>
65408                  <name>1</name>
65409                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
65410                  <value>#1</value>
65411                </enumeratedValue>
65412              </enumeratedValues>
65413            </field>
65414          </fields>
65415        </register>
65416        <register>
65417          <name>GPCLR</name>
65418          <description>Global Pin Control Low Register</description>
65419          <addressOffset>0x80</addressOffset>
65420          <size>32</size>
65421          <access>write-only</access>
65422          <resetValue>0</resetValue>
65423          <resetMask>0xFFFFFFFF</resetMask>
65424          <fields>
65425            <field>
65426              <name>GPWD</name>
65427              <description>Global Pin Write Data</description>
65428              <bitOffset>0</bitOffset>
65429              <bitWidth>16</bitWidth>
65430              <access>write-only</access>
65431            </field>
65432            <field>
65433              <name>GPWE0</name>
65434              <description>Global Pin Write Enable</description>
65435              <bitOffset>16</bitOffset>
65436              <bitWidth>1</bitWidth>
65437              <access>write-only</access>
65438              <enumeratedValues>
65439                <enumeratedValue>
65440                  <name>0</name>
65441                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65442                  <value>#0</value>
65443                </enumeratedValue>
65444                <enumeratedValue>
65445                  <name>1</name>
65446                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65447                  <value>#1</value>
65448                </enumeratedValue>
65449              </enumeratedValues>
65450            </field>
65451            <field>
65452              <name>GPWE1</name>
65453              <description>Global Pin Write Enable</description>
65454              <bitOffset>17</bitOffset>
65455              <bitWidth>1</bitWidth>
65456              <access>write-only</access>
65457              <enumeratedValues>
65458                <enumeratedValue>
65459                  <name>0</name>
65460                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65461                  <value>#0</value>
65462                </enumeratedValue>
65463                <enumeratedValue>
65464                  <name>1</name>
65465                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65466                  <value>#1</value>
65467                </enumeratedValue>
65468              </enumeratedValues>
65469            </field>
65470            <field>
65471              <name>GPWE2</name>
65472              <description>Global Pin Write Enable</description>
65473              <bitOffset>18</bitOffset>
65474              <bitWidth>1</bitWidth>
65475              <access>write-only</access>
65476              <enumeratedValues>
65477                <enumeratedValue>
65478                  <name>0</name>
65479                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65480                  <value>#0</value>
65481                </enumeratedValue>
65482                <enumeratedValue>
65483                  <name>1</name>
65484                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65485                  <value>#1</value>
65486                </enumeratedValue>
65487              </enumeratedValues>
65488            </field>
65489            <field>
65490              <name>GPWE3</name>
65491              <description>Global Pin Write Enable</description>
65492              <bitOffset>19</bitOffset>
65493              <bitWidth>1</bitWidth>
65494              <access>write-only</access>
65495              <enumeratedValues>
65496                <enumeratedValue>
65497                  <name>0</name>
65498                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65499                  <value>#0</value>
65500                </enumeratedValue>
65501                <enumeratedValue>
65502                  <name>1</name>
65503                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65504                  <value>#1</value>
65505                </enumeratedValue>
65506              </enumeratedValues>
65507            </field>
65508            <field>
65509              <name>GPWE4</name>
65510              <description>Global Pin Write Enable</description>
65511              <bitOffset>20</bitOffset>
65512              <bitWidth>1</bitWidth>
65513              <access>write-only</access>
65514              <enumeratedValues>
65515                <enumeratedValue>
65516                  <name>0</name>
65517                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65518                  <value>#0</value>
65519                </enumeratedValue>
65520                <enumeratedValue>
65521                  <name>1</name>
65522                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65523                  <value>#1</value>
65524                </enumeratedValue>
65525              </enumeratedValues>
65526            </field>
65527            <field>
65528              <name>GPWE5</name>
65529              <description>Global Pin Write Enable</description>
65530              <bitOffset>21</bitOffset>
65531              <bitWidth>1</bitWidth>
65532              <access>write-only</access>
65533              <enumeratedValues>
65534                <enumeratedValue>
65535                  <name>0</name>
65536                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65537                  <value>#0</value>
65538                </enumeratedValue>
65539                <enumeratedValue>
65540                  <name>1</name>
65541                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65542                  <value>#1</value>
65543                </enumeratedValue>
65544              </enumeratedValues>
65545            </field>
65546            <field>
65547              <name>GPWE6</name>
65548              <description>Global Pin Write Enable</description>
65549              <bitOffset>22</bitOffset>
65550              <bitWidth>1</bitWidth>
65551              <access>write-only</access>
65552              <enumeratedValues>
65553                <enumeratedValue>
65554                  <name>0</name>
65555                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65556                  <value>#0</value>
65557                </enumeratedValue>
65558                <enumeratedValue>
65559                  <name>1</name>
65560                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65561                  <value>#1</value>
65562                </enumeratedValue>
65563              </enumeratedValues>
65564            </field>
65565            <field>
65566              <name>GPWE7</name>
65567              <description>Global Pin Write Enable</description>
65568              <bitOffset>23</bitOffset>
65569              <bitWidth>1</bitWidth>
65570              <access>write-only</access>
65571              <enumeratedValues>
65572                <enumeratedValue>
65573                  <name>0</name>
65574                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65575                  <value>#0</value>
65576                </enumeratedValue>
65577                <enumeratedValue>
65578                  <name>1</name>
65579                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65580                  <value>#1</value>
65581                </enumeratedValue>
65582              </enumeratedValues>
65583            </field>
65584            <field>
65585              <name>GPWE8</name>
65586              <description>Global Pin Write Enable</description>
65587              <bitOffset>24</bitOffset>
65588              <bitWidth>1</bitWidth>
65589              <access>write-only</access>
65590              <enumeratedValues>
65591                <enumeratedValue>
65592                  <name>0</name>
65593                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65594                  <value>#0</value>
65595                </enumeratedValue>
65596                <enumeratedValue>
65597                  <name>1</name>
65598                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65599                  <value>#1</value>
65600                </enumeratedValue>
65601              </enumeratedValues>
65602            </field>
65603            <field>
65604              <name>GPWE9</name>
65605              <description>Global Pin Write Enable</description>
65606              <bitOffset>25</bitOffset>
65607              <bitWidth>1</bitWidth>
65608              <access>write-only</access>
65609              <enumeratedValues>
65610                <enumeratedValue>
65611                  <name>0</name>
65612                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65613                  <value>#0</value>
65614                </enumeratedValue>
65615                <enumeratedValue>
65616                  <name>1</name>
65617                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65618                  <value>#1</value>
65619                </enumeratedValue>
65620              </enumeratedValues>
65621            </field>
65622            <field>
65623              <name>GPWE10</name>
65624              <description>Global Pin Write Enable</description>
65625              <bitOffset>26</bitOffset>
65626              <bitWidth>1</bitWidth>
65627              <access>write-only</access>
65628              <enumeratedValues>
65629                <enumeratedValue>
65630                  <name>0</name>
65631                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65632                  <value>#0</value>
65633                </enumeratedValue>
65634                <enumeratedValue>
65635                  <name>1</name>
65636                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65637                  <value>#1</value>
65638                </enumeratedValue>
65639              </enumeratedValues>
65640            </field>
65641            <field>
65642              <name>GPWE11</name>
65643              <description>Global Pin Write Enable</description>
65644              <bitOffset>27</bitOffset>
65645              <bitWidth>1</bitWidth>
65646              <access>write-only</access>
65647              <enumeratedValues>
65648                <enumeratedValue>
65649                  <name>0</name>
65650                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65651                  <value>#0</value>
65652                </enumeratedValue>
65653                <enumeratedValue>
65654                  <name>1</name>
65655                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65656                  <value>#1</value>
65657                </enumeratedValue>
65658              </enumeratedValues>
65659            </field>
65660            <field>
65661              <name>GPWE12</name>
65662              <description>Global Pin Write Enable</description>
65663              <bitOffset>28</bitOffset>
65664              <bitWidth>1</bitWidth>
65665              <access>write-only</access>
65666              <enumeratedValues>
65667                <enumeratedValue>
65668                  <name>0</name>
65669                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65670                  <value>#0</value>
65671                </enumeratedValue>
65672                <enumeratedValue>
65673                  <name>1</name>
65674                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65675                  <value>#1</value>
65676                </enumeratedValue>
65677              </enumeratedValues>
65678            </field>
65679            <field>
65680              <name>GPWE13</name>
65681              <description>Global Pin Write Enable</description>
65682              <bitOffset>29</bitOffset>
65683              <bitWidth>1</bitWidth>
65684              <access>write-only</access>
65685              <enumeratedValues>
65686                <enumeratedValue>
65687                  <name>0</name>
65688                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65689                  <value>#0</value>
65690                </enumeratedValue>
65691                <enumeratedValue>
65692                  <name>1</name>
65693                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65694                  <value>#1</value>
65695                </enumeratedValue>
65696              </enumeratedValues>
65697            </field>
65698            <field>
65699              <name>GPWE14</name>
65700              <description>Global Pin Write Enable</description>
65701              <bitOffset>30</bitOffset>
65702              <bitWidth>1</bitWidth>
65703              <access>write-only</access>
65704              <enumeratedValues>
65705                <enumeratedValue>
65706                  <name>0</name>
65707                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65708                  <value>#0</value>
65709                </enumeratedValue>
65710                <enumeratedValue>
65711                  <name>1</name>
65712                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65713                  <value>#1</value>
65714                </enumeratedValue>
65715              </enumeratedValues>
65716            </field>
65717            <field>
65718              <name>GPWE15</name>
65719              <description>Global Pin Write Enable</description>
65720              <bitOffset>31</bitOffset>
65721              <bitWidth>1</bitWidth>
65722              <access>write-only</access>
65723              <enumeratedValues>
65724                <enumeratedValue>
65725                  <name>0</name>
65726                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65727                  <value>#0</value>
65728                </enumeratedValue>
65729                <enumeratedValue>
65730                  <name>1</name>
65731                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65732                  <value>#1</value>
65733                </enumeratedValue>
65734              </enumeratedValues>
65735            </field>
65736          </fields>
65737        </register>
65738        <register>
65739          <name>GPCHR</name>
65740          <description>Global Pin Control High Register</description>
65741          <addressOffset>0x84</addressOffset>
65742          <size>32</size>
65743          <access>write-only</access>
65744          <resetValue>0</resetValue>
65745          <resetMask>0xFFFFFFFF</resetMask>
65746          <fields>
65747            <field>
65748              <name>GPWD</name>
65749              <description>Global Pin Write Data</description>
65750              <bitOffset>0</bitOffset>
65751              <bitWidth>16</bitWidth>
65752              <access>write-only</access>
65753            </field>
65754            <field>
65755              <name>GPWE0</name>
65756              <description>Global Pin Write Enable</description>
65757              <bitOffset>16</bitOffset>
65758              <bitWidth>1</bitWidth>
65759              <access>write-only</access>
65760              <enumeratedValues>
65761                <enumeratedValue>
65762                  <name>0</name>
65763                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65764                  <value>#0</value>
65765                </enumeratedValue>
65766                <enumeratedValue>
65767                  <name>1</name>
65768                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65769                  <value>#1</value>
65770                </enumeratedValue>
65771              </enumeratedValues>
65772            </field>
65773            <field>
65774              <name>GPWE1</name>
65775              <description>Global Pin Write Enable</description>
65776              <bitOffset>17</bitOffset>
65777              <bitWidth>1</bitWidth>
65778              <access>write-only</access>
65779              <enumeratedValues>
65780                <enumeratedValue>
65781                  <name>0</name>
65782                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65783                  <value>#0</value>
65784                </enumeratedValue>
65785                <enumeratedValue>
65786                  <name>1</name>
65787                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65788                  <value>#1</value>
65789                </enumeratedValue>
65790              </enumeratedValues>
65791            </field>
65792            <field>
65793              <name>GPWE2</name>
65794              <description>Global Pin Write Enable</description>
65795              <bitOffset>18</bitOffset>
65796              <bitWidth>1</bitWidth>
65797              <access>write-only</access>
65798              <enumeratedValues>
65799                <enumeratedValue>
65800                  <name>0</name>
65801                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65802                  <value>#0</value>
65803                </enumeratedValue>
65804                <enumeratedValue>
65805                  <name>1</name>
65806                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65807                  <value>#1</value>
65808                </enumeratedValue>
65809              </enumeratedValues>
65810            </field>
65811            <field>
65812              <name>GPWE3</name>
65813              <description>Global Pin Write Enable</description>
65814              <bitOffset>19</bitOffset>
65815              <bitWidth>1</bitWidth>
65816              <access>write-only</access>
65817              <enumeratedValues>
65818                <enumeratedValue>
65819                  <name>0</name>
65820                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65821                  <value>#0</value>
65822                </enumeratedValue>
65823                <enumeratedValue>
65824                  <name>1</name>
65825                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65826                  <value>#1</value>
65827                </enumeratedValue>
65828              </enumeratedValues>
65829            </field>
65830            <field>
65831              <name>GPWE4</name>
65832              <description>Global Pin Write Enable</description>
65833              <bitOffset>20</bitOffset>
65834              <bitWidth>1</bitWidth>
65835              <access>write-only</access>
65836              <enumeratedValues>
65837                <enumeratedValue>
65838                  <name>0</name>
65839                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65840                  <value>#0</value>
65841                </enumeratedValue>
65842                <enumeratedValue>
65843                  <name>1</name>
65844                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65845                  <value>#1</value>
65846                </enumeratedValue>
65847              </enumeratedValues>
65848            </field>
65849            <field>
65850              <name>GPWE5</name>
65851              <description>Global Pin Write Enable</description>
65852              <bitOffset>21</bitOffset>
65853              <bitWidth>1</bitWidth>
65854              <access>write-only</access>
65855              <enumeratedValues>
65856                <enumeratedValue>
65857                  <name>0</name>
65858                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65859                  <value>#0</value>
65860                </enumeratedValue>
65861                <enumeratedValue>
65862                  <name>1</name>
65863                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65864                  <value>#1</value>
65865                </enumeratedValue>
65866              </enumeratedValues>
65867            </field>
65868            <field>
65869              <name>GPWE6</name>
65870              <description>Global Pin Write Enable</description>
65871              <bitOffset>22</bitOffset>
65872              <bitWidth>1</bitWidth>
65873              <access>write-only</access>
65874              <enumeratedValues>
65875                <enumeratedValue>
65876                  <name>0</name>
65877                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65878                  <value>#0</value>
65879                </enumeratedValue>
65880                <enumeratedValue>
65881                  <name>1</name>
65882                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65883                  <value>#1</value>
65884                </enumeratedValue>
65885              </enumeratedValues>
65886            </field>
65887            <field>
65888              <name>GPWE7</name>
65889              <description>Global Pin Write Enable</description>
65890              <bitOffset>23</bitOffset>
65891              <bitWidth>1</bitWidth>
65892              <access>write-only</access>
65893              <enumeratedValues>
65894                <enumeratedValue>
65895                  <name>0</name>
65896                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65897                  <value>#0</value>
65898                </enumeratedValue>
65899                <enumeratedValue>
65900                  <name>1</name>
65901                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65902                  <value>#1</value>
65903                </enumeratedValue>
65904              </enumeratedValues>
65905            </field>
65906            <field>
65907              <name>GPWE8</name>
65908              <description>Global Pin Write Enable</description>
65909              <bitOffset>24</bitOffset>
65910              <bitWidth>1</bitWidth>
65911              <access>write-only</access>
65912              <enumeratedValues>
65913                <enumeratedValue>
65914                  <name>0</name>
65915                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65916                  <value>#0</value>
65917                </enumeratedValue>
65918                <enumeratedValue>
65919                  <name>1</name>
65920                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65921                  <value>#1</value>
65922                </enumeratedValue>
65923              </enumeratedValues>
65924            </field>
65925            <field>
65926              <name>GPWE9</name>
65927              <description>Global Pin Write Enable</description>
65928              <bitOffset>25</bitOffset>
65929              <bitWidth>1</bitWidth>
65930              <access>write-only</access>
65931              <enumeratedValues>
65932                <enumeratedValue>
65933                  <name>0</name>
65934                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65935                  <value>#0</value>
65936                </enumeratedValue>
65937                <enumeratedValue>
65938                  <name>1</name>
65939                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65940                  <value>#1</value>
65941                </enumeratedValue>
65942              </enumeratedValues>
65943            </field>
65944            <field>
65945              <name>GPWE10</name>
65946              <description>Global Pin Write Enable</description>
65947              <bitOffset>26</bitOffset>
65948              <bitWidth>1</bitWidth>
65949              <access>write-only</access>
65950              <enumeratedValues>
65951                <enumeratedValue>
65952                  <name>0</name>
65953                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65954                  <value>#0</value>
65955                </enumeratedValue>
65956                <enumeratedValue>
65957                  <name>1</name>
65958                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65959                  <value>#1</value>
65960                </enumeratedValue>
65961              </enumeratedValues>
65962            </field>
65963            <field>
65964              <name>GPWE11</name>
65965              <description>Global Pin Write Enable</description>
65966              <bitOffset>27</bitOffset>
65967              <bitWidth>1</bitWidth>
65968              <access>write-only</access>
65969              <enumeratedValues>
65970                <enumeratedValue>
65971                  <name>0</name>
65972                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65973                  <value>#0</value>
65974                </enumeratedValue>
65975                <enumeratedValue>
65976                  <name>1</name>
65977                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65978                  <value>#1</value>
65979                </enumeratedValue>
65980              </enumeratedValues>
65981            </field>
65982            <field>
65983              <name>GPWE12</name>
65984              <description>Global Pin Write Enable</description>
65985              <bitOffset>28</bitOffset>
65986              <bitWidth>1</bitWidth>
65987              <access>write-only</access>
65988              <enumeratedValues>
65989                <enumeratedValue>
65990                  <name>0</name>
65991                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
65992                  <value>#0</value>
65993                </enumeratedValue>
65994                <enumeratedValue>
65995                  <name>1</name>
65996                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
65997                  <value>#1</value>
65998                </enumeratedValue>
65999              </enumeratedValues>
66000            </field>
66001            <field>
66002              <name>GPWE13</name>
66003              <description>Global Pin Write Enable</description>
66004              <bitOffset>29</bitOffset>
66005              <bitWidth>1</bitWidth>
66006              <access>write-only</access>
66007              <enumeratedValues>
66008                <enumeratedValue>
66009                  <name>0</name>
66010                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
66011                  <value>#0</value>
66012                </enumeratedValue>
66013                <enumeratedValue>
66014                  <name>1</name>
66015                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
66016                  <value>#1</value>
66017                </enumeratedValue>
66018              </enumeratedValues>
66019            </field>
66020            <field>
66021              <name>GPWE14</name>
66022              <description>Global Pin Write Enable</description>
66023              <bitOffset>30</bitOffset>
66024              <bitWidth>1</bitWidth>
66025              <access>write-only</access>
66026              <enumeratedValues>
66027                <enumeratedValue>
66028                  <name>0</name>
66029                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
66030                  <value>#0</value>
66031                </enumeratedValue>
66032                <enumeratedValue>
66033                  <name>1</name>
66034                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
66035                  <value>#1</value>
66036                </enumeratedValue>
66037              </enumeratedValues>
66038            </field>
66039            <field>
66040              <name>GPWE15</name>
66041              <description>Global Pin Write Enable</description>
66042              <bitOffset>31</bitOffset>
66043              <bitWidth>1</bitWidth>
66044              <access>write-only</access>
66045              <enumeratedValues>
66046                <enumeratedValue>
66047                  <name>0</name>
66048                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
66049                  <value>#0</value>
66050                </enumeratedValue>
66051                <enumeratedValue>
66052                  <name>1</name>
66053                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
66054                  <value>#1</value>
66055                </enumeratedValue>
66056              </enumeratedValues>
66057            </field>
66058          </fields>
66059        </register>
66060        <register>
66061          <name>ISFR</name>
66062          <description>Interrupt Status Flag Register</description>
66063          <addressOffset>0xA0</addressOffset>
66064          <size>32</size>
66065          <access>read-write</access>
66066          <resetValue>0</resetValue>
66067          <resetMask>0xFFFFFFFF</resetMask>
66068          <fields>
66069            <field>
66070              <name>ISF0</name>
66071              <description>Interrupt Status Flag</description>
66072              <bitOffset>0</bitOffset>
66073              <bitWidth>1</bitWidth>
66074              <access>read-write</access>
66075              <enumeratedValues>
66076                <enumeratedValue>
66077                  <name>0</name>
66078                  <description>Configured interrupt is not detected.</description>
66079                  <value>#0</value>
66080                </enumeratedValue>
66081                <enumeratedValue>
66082                  <name>1</name>
66083                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66084                  <value>#1</value>
66085                </enumeratedValue>
66086              </enumeratedValues>
66087            </field>
66088            <field>
66089              <name>ISF1</name>
66090              <description>Interrupt Status Flag</description>
66091              <bitOffset>1</bitOffset>
66092              <bitWidth>1</bitWidth>
66093              <access>read-write</access>
66094              <enumeratedValues>
66095                <enumeratedValue>
66096                  <name>0</name>
66097                  <description>Configured interrupt is not detected.</description>
66098                  <value>#0</value>
66099                </enumeratedValue>
66100                <enumeratedValue>
66101                  <name>1</name>
66102                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66103                  <value>#1</value>
66104                </enumeratedValue>
66105              </enumeratedValues>
66106            </field>
66107            <field>
66108              <name>ISF2</name>
66109              <description>Interrupt Status Flag</description>
66110              <bitOffset>2</bitOffset>
66111              <bitWidth>1</bitWidth>
66112              <access>read-write</access>
66113              <enumeratedValues>
66114                <enumeratedValue>
66115                  <name>0</name>
66116                  <description>Configured interrupt is not detected.</description>
66117                  <value>#0</value>
66118                </enumeratedValue>
66119                <enumeratedValue>
66120                  <name>1</name>
66121                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66122                  <value>#1</value>
66123                </enumeratedValue>
66124              </enumeratedValues>
66125            </field>
66126            <field>
66127              <name>ISF3</name>
66128              <description>Interrupt Status Flag</description>
66129              <bitOffset>3</bitOffset>
66130              <bitWidth>1</bitWidth>
66131              <access>read-write</access>
66132              <enumeratedValues>
66133                <enumeratedValue>
66134                  <name>0</name>
66135                  <description>Configured interrupt is not detected.</description>
66136                  <value>#0</value>
66137                </enumeratedValue>
66138                <enumeratedValue>
66139                  <name>1</name>
66140                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66141                  <value>#1</value>
66142                </enumeratedValue>
66143              </enumeratedValues>
66144            </field>
66145            <field>
66146              <name>ISF4</name>
66147              <description>Interrupt Status Flag</description>
66148              <bitOffset>4</bitOffset>
66149              <bitWidth>1</bitWidth>
66150              <access>read-write</access>
66151              <enumeratedValues>
66152                <enumeratedValue>
66153                  <name>0</name>
66154                  <description>Configured interrupt is not detected.</description>
66155                  <value>#0</value>
66156                </enumeratedValue>
66157                <enumeratedValue>
66158                  <name>1</name>
66159                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66160                  <value>#1</value>
66161                </enumeratedValue>
66162              </enumeratedValues>
66163            </field>
66164            <field>
66165              <name>ISF5</name>
66166              <description>Interrupt Status Flag</description>
66167              <bitOffset>5</bitOffset>
66168              <bitWidth>1</bitWidth>
66169              <access>read-write</access>
66170              <enumeratedValues>
66171                <enumeratedValue>
66172                  <name>0</name>
66173                  <description>Configured interrupt is not detected.</description>
66174                  <value>#0</value>
66175                </enumeratedValue>
66176                <enumeratedValue>
66177                  <name>1</name>
66178                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66179                  <value>#1</value>
66180                </enumeratedValue>
66181              </enumeratedValues>
66182            </field>
66183            <field>
66184              <name>ISF6</name>
66185              <description>Interrupt Status Flag</description>
66186              <bitOffset>6</bitOffset>
66187              <bitWidth>1</bitWidth>
66188              <access>read-write</access>
66189              <enumeratedValues>
66190                <enumeratedValue>
66191                  <name>0</name>
66192                  <description>Configured interrupt is not detected.</description>
66193                  <value>#0</value>
66194                </enumeratedValue>
66195                <enumeratedValue>
66196                  <name>1</name>
66197                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66198                  <value>#1</value>
66199                </enumeratedValue>
66200              </enumeratedValues>
66201            </field>
66202            <field>
66203              <name>ISF7</name>
66204              <description>Interrupt Status Flag</description>
66205              <bitOffset>7</bitOffset>
66206              <bitWidth>1</bitWidth>
66207              <access>read-write</access>
66208              <enumeratedValues>
66209                <enumeratedValue>
66210                  <name>0</name>
66211                  <description>Configured interrupt is not detected.</description>
66212                  <value>#0</value>
66213                </enumeratedValue>
66214                <enumeratedValue>
66215                  <name>1</name>
66216                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66217                  <value>#1</value>
66218                </enumeratedValue>
66219              </enumeratedValues>
66220            </field>
66221            <field>
66222              <name>ISF8</name>
66223              <description>Interrupt Status Flag</description>
66224              <bitOffset>8</bitOffset>
66225              <bitWidth>1</bitWidth>
66226              <access>read-write</access>
66227              <enumeratedValues>
66228                <enumeratedValue>
66229                  <name>0</name>
66230                  <description>Configured interrupt is not detected.</description>
66231                  <value>#0</value>
66232                </enumeratedValue>
66233                <enumeratedValue>
66234                  <name>1</name>
66235                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66236                  <value>#1</value>
66237                </enumeratedValue>
66238              </enumeratedValues>
66239            </field>
66240            <field>
66241              <name>ISF9</name>
66242              <description>Interrupt Status Flag</description>
66243              <bitOffset>9</bitOffset>
66244              <bitWidth>1</bitWidth>
66245              <access>read-write</access>
66246              <enumeratedValues>
66247                <enumeratedValue>
66248                  <name>0</name>
66249                  <description>Configured interrupt is not detected.</description>
66250                  <value>#0</value>
66251                </enumeratedValue>
66252                <enumeratedValue>
66253                  <name>1</name>
66254                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66255                  <value>#1</value>
66256                </enumeratedValue>
66257              </enumeratedValues>
66258            </field>
66259            <field>
66260              <name>ISF10</name>
66261              <description>Interrupt Status Flag</description>
66262              <bitOffset>10</bitOffset>
66263              <bitWidth>1</bitWidth>
66264              <access>read-write</access>
66265              <enumeratedValues>
66266                <enumeratedValue>
66267                  <name>0</name>
66268                  <description>Configured interrupt is not detected.</description>
66269                  <value>#0</value>
66270                </enumeratedValue>
66271                <enumeratedValue>
66272                  <name>1</name>
66273                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66274                  <value>#1</value>
66275                </enumeratedValue>
66276              </enumeratedValues>
66277            </field>
66278            <field>
66279              <name>ISF11</name>
66280              <description>Interrupt Status Flag</description>
66281              <bitOffset>11</bitOffset>
66282              <bitWidth>1</bitWidth>
66283              <access>read-write</access>
66284              <enumeratedValues>
66285                <enumeratedValue>
66286                  <name>0</name>
66287                  <description>Configured interrupt is not detected.</description>
66288                  <value>#0</value>
66289                </enumeratedValue>
66290                <enumeratedValue>
66291                  <name>1</name>
66292                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66293                  <value>#1</value>
66294                </enumeratedValue>
66295              </enumeratedValues>
66296            </field>
66297            <field>
66298              <name>ISF12</name>
66299              <description>Interrupt Status Flag</description>
66300              <bitOffset>12</bitOffset>
66301              <bitWidth>1</bitWidth>
66302              <access>read-write</access>
66303              <enumeratedValues>
66304                <enumeratedValue>
66305                  <name>0</name>
66306                  <description>Configured interrupt is not detected.</description>
66307                  <value>#0</value>
66308                </enumeratedValue>
66309                <enumeratedValue>
66310                  <name>1</name>
66311                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66312                  <value>#1</value>
66313                </enumeratedValue>
66314              </enumeratedValues>
66315            </field>
66316            <field>
66317              <name>ISF13</name>
66318              <description>Interrupt Status Flag</description>
66319              <bitOffset>13</bitOffset>
66320              <bitWidth>1</bitWidth>
66321              <access>read-write</access>
66322              <enumeratedValues>
66323                <enumeratedValue>
66324                  <name>0</name>
66325                  <description>Configured interrupt is not detected.</description>
66326                  <value>#0</value>
66327                </enumeratedValue>
66328                <enumeratedValue>
66329                  <name>1</name>
66330                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66331                  <value>#1</value>
66332                </enumeratedValue>
66333              </enumeratedValues>
66334            </field>
66335            <field>
66336              <name>ISF14</name>
66337              <description>Interrupt Status Flag</description>
66338              <bitOffset>14</bitOffset>
66339              <bitWidth>1</bitWidth>
66340              <access>read-write</access>
66341              <enumeratedValues>
66342                <enumeratedValue>
66343                  <name>0</name>
66344                  <description>Configured interrupt is not detected.</description>
66345                  <value>#0</value>
66346                </enumeratedValue>
66347                <enumeratedValue>
66348                  <name>1</name>
66349                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66350                  <value>#1</value>
66351                </enumeratedValue>
66352              </enumeratedValues>
66353            </field>
66354            <field>
66355              <name>ISF15</name>
66356              <description>Interrupt Status Flag</description>
66357              <bitOffset>15</bitOffset>
66358              <bitWidth>1</bitWidth>
66359              <access>read-write</access>
66360              <enumeratedValues>
66361                <enumeratedValue>
66362                  <name>0</name>
66363                  <description>Configured interrupt is not detected.</description>
66364                  <value>#0</value>
66365                </enumeratedValue>
66366                <enumeratedValue>
66367                  <name>1</name>
66368                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66369                  <value>#1</value>
66370                </enumeratedValue>
66371              </enumeratedValues>
66372            </field>
66373            <field>
66374              <name>ISF16</name>
66375              <description>Interrupt Status Flag</description>
66376              <bitOffset>16</bitOffset>
66377              <bitWidth>1</bitWidth>
66378              <access>read-write</access>
66379              <enumeratedValues>
66380                <enumeratedValue>
66381                  <name>0</name>
66382                  <description>Configured interrupt is not detected.</description>
66383                  <value>#0</value>
66384                </enumeratedValue>
66385                <enumeratedValue>
66386                  <name>1</name>
66387                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66388                  <value>#1</value>
66389                </enumeratedValue>
66390              </enumeratedValues>
66391            </field>
66392            <field>
66393              <name>ISF17</name>
66394              <description>Interrupt Status Flag</description>
66395              <bitOffset>17</bitOffset>
66396              <bitWidth>1</bitWidth>
66397              <access>read-write</access>
66398              <enumeratedValues>
66399                <enumeratedValue>
66400                  <name>0</name>
66401                  <description>Configured interrupt is not detected.</description>
66402                  <value>#0</value>
66403                </enumeratedValue>
66404                <enumeratedValue>
66405                  <name>1</name>
66406                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66407                  <value>#1</value>
66408                </enumeratedValue>
66409              </enumeratedValues>
66410            </field>
66411            <field>
66412              <name>ISF18</name>
66413              <description>Interrupt Status Flag</description>
66414              <bitOffset>18</bitOffset>
66415              <bitWidth>1</bitWidth>
66416              <access>read-write</access>
66417              <enumeratedValues>
66418                <enumeratedValue>
66419                  <name>0</name>
66420                  <description>Configured interrupt is not detected.</description>
66421                  <value>#0</value>
66422                </enumeratedValue>
66423                <enumeratedValue>
66424                  <name>1</name>
66425                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66426                  <value>#1</value>
66427                </enumeratedValue>
66428              </enumeratedValues>
66429            </field>
66430            <field>
66431              <name>ISF19</name>
66432              <description>Interrupt Status Flag</description>
66433              <bitOffset>19</bitOffset>
66434              <bitWidth>1</bitWidth>
66435              <access>read-write</access>
66436              <enumeratedValues>
66437                <enumeratedValue>
66438                  <name>0</name>
66439                  <description>Configured interrupt is not detected.</description>
66440                  <value>#0</value>
66441                </enumeratedValue>
66442                <enumeratedValue>
66443                  <name>1</name>
66444                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66445                  <value>#1</value>
66446                </enumeratedValue>
66447              </enumeratedValues>
66448            </field>
66449            <field>
66450              <name>ISF20</name>
66451              <description>Interrupt Status Flag</description>
66452              <bitOffset>20</bitOffset>
66453              <bitWidth>1</bitWidth>
66454              <access>read-write</access>
66455              <enumeratedValues>
66456                <enumeratedValue>
66457                  <name>0</name>
66458                  <description>Configured interrupt is not detected.</description>
66459                  <value>#0</value>
66460                </enumeratedValue>
66461                <enumeratedValue>
66462                  <name>1</name>
66463                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66464                  <value>#1</value>
66465                </enumeratedValue>
66466              </enumeratedValues>
66467            </field>
66468            <field>
66469              <name>ISF21</name>
66470              <description>Interrupt Status Flag</description>
66471              <bitOffset>21</bitOffset>
66472              <bitWidth>1</bitWidth>
66473              <access>read-write</access>
66474              <enumeratedValues>
66475                <enumeratedValue>
66476                  <name>0</name>
66477                  <description>Configured interrupt is not detected.</description>
66478                  <value>#0</value>
66479                </enumeratedValue>
66480                <enumeratedValue>
66481                  <name>1</name>
66482                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66483                  <value>#1</value>
66484                </enumeratedValue>
66485              </enumeratedValues>
66486            </field>
66487            <field>
66488              <name>ISF22</name>
66489              <description>Interrupt Status Flag</description>
66490              <bitOffset>22</bitOffset>
66491              <bitWidth>1</bitWidth>
66492              <access>read-write</access>
66493              <enumeratedValues>
66494                <enumeratedValue>
66495                  <name>0</name>
66496                  <description>Configured interrupt is not detected.</description>
66497                  <value>#0</value>
66498                </enumeratedValue>
66499                <enumeratedValue>
66500                  <name>1</name>
66501                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66502                  <value>#1</value>
66503                </enumeratedValue>
66504              </enumeratedValues>
66505            </field>
66506            <field>
66507              <name>ISF23</name>
66508              <description>Interrupt Status Flag</description>
66509              <bitOffset>23</bitOffset>
66510              <bitWidth>1</bitWidth>
66511              <access>read-write</access>
66512              <enumeratedValues>
66513                <enumeratedValue>
66514                  <name>0</name>
66515                  <description>Configured interrupt is not detected.</description>
66516                  <value>#0</value>
66517                </enumeratedValue>
66518                <enumeratedValue>
66519                  <name>1</name>
66520                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66521                  <value>#1</value>
66522                </enumeratedValue>
66523              </enumeratedValues>
66524            </field>
66525            <field>
66526              <name>ISF24</name>
66527              <description>Interrupt Status Flag</description>
66528              <bitOffset>24</bitOffset>
66529              <bitWidth>1</bitWidth>
66530              <access>read-write</access>
66531              <enumeratedValues>
66532                <enumeratedValue>
66533                  <name>0</name>
66534                  <description>Configured interrupt is not detected.</description>
66535                  <value>#0</value>
66536                </enumeratedValue>
66537                <enumeratedValue>
66538                  <name>1</name>
66539                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66540                  <value>#1</value>
66541                </enumeratedValue>
66542              </enumeratedValues>
66543            </field>
66544            <field>
66545              <name>ISF25</name>
66546              <description>Interrupt Status Flag</description>
66547              <bitOffset>25</bitOffset>
66548              <bitWidth>1</bitWidth>
66549              <access>read-write</access>
66550              <enumeratedValues>
66551                <enumeratedValue>
66552                  <name>0</name>
66553                  <description>Configured interrupt is not detected.</description>
66554                  <value>#0</value>
66555                </enumeratedValue>
66556                <enumeratedValue>
66557                  <name>1</name>
66558                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66559                  <value>#1</value>
66560                </enumeratedValue>
66561              </enumeratedValues>
66562            </field>
66563            <field>
66564              <name>ISF26</name>
66565              <description>Interrupt Status Flag</description>
66566              <bitOffset>26</bitOffset>
66567              <bitWidth>1</bitWidth>
66568              <access>read-write</access>
66569              <enumeratedValues>
66570                <enumeratedValue>
66571                  <name>0</name>
66572                  <description>Configured interrupt is not detected.</description>
66573                  <value>#0</value>
66574                </enumeratedValue>
66575                <enumeratedValue>
66576                  <name>1</name>
66577                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66578                  <value>#1</value>
66579                </enumeratedValue>
66580              </enumeratedValues>
66581            </field>
66582            <field>
66583              <name>ISF27</name>
66584              <description>Interrupt Status Flag</description>
66585              <bitOffset>27</bitOffset>
66586              <bitWidth>1</bitWidth>
66587              <access>read-write</access>
66588              <enumeratedValues>
66589                <enumeratedValue>
66590                  <name>0</name>
66591                  <description>Configured interrupt is not detected.</description>
66592                  <value>#0</value>
66593                </enumeratedValue>
66594                <enumeratedValue>
66595                  <name>1</name>
66596                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66597                  <value>#1</value>
66598                </enumeratedValue>
66599              </enumeratedValues>
66600            </field>
66601            <field>
66602              <name>ISF28</name>
66603              <description>Interrupt Status Flag</description>
66604              <bitOffset>28</bitOffset>
66605              <bitWidth>1</bitWidth>
66606              <access>read-write</access>
66607              <enumeratedValues>
66608                <enumeratedValue>
66609                  <name>0</name>
66610                  <description>Configured interrupt is not detected.</description>
66611                  <value>#0</value>
66612                </enumeratedValue>
66613                <enumeratedValue>
66614                  <name>1</name>
66615                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66616                  <value>#1</value>
66617                </enumeratedValue>
66618              </enumeratedValues>
66619            </field>
66620            <field>
66621              <name>ISF29</name>
66622              <description>Interrupt Status Flag</description>
66623              <bitOffset>29</bitOffset>
66624              <bitWidth>1</bitWidth>
66625              <access>read-write</access>
66626              <enumeratedValues>
66627                <enumeratedValue>
66628                  <name>0</name>
66629                  <description>Configured interrupt is not detected.</description>
66630                  <value>#0</value>
66631                </enumeratedValue>
66632                <enumeratedValue>
66633                  <name>1</name>
66634                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66635                  <value>#1</value>
66636                </enumeratedValue>
66637              </enumeratedValues>
66638            </field>
66639            <field>
66640              <name>ISF30</name>
66641              <description>Interrupt Status Flag</description>
66642              <bitOffset>30</bitOffset>
66643              <bitWidth>1</bitWidth>
66644              <access>read-write</access>
66645              <enumeratedValues>
66646                <enumeratedValue>
66647                  <name>0</name>
66648                  <description>Configured interrupt is not detected.</description>
66649                  <value>#0</value>
66650                </enumeratedValue>
66651                <enumeratedValue>
66652                  <name>1</name>
66653                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66654                  <value>#1</value>
66655                </enumeratedValue>
66656              </enumeratedValues>
66657            </field>
66658            <field>
66659              <name>ISF31</name>
66660              <description>Interrupt Status Flag</description>
66661              <bitOffset>31</bitOffset>
66662              <bitWidth>1</bitWidth>
66663              <access>read-write</access>
66664              <enumeratedValues>
66665                <enumeratedValue>
66666                  <name>0</name>
66667                  <description>Configured interrupt is not detected.</description>
66668                  <value>#0</value>
66669                </enumeratedValue>
66670                <enumeratedValue>
66671                  <name>1</name>
66672                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66673                  <value>#1</value>
66674                </enumeratedValue>
66675              </enumeratedValues>
66676            </field>
66677          </fields>
66678        </register>
66679      </registers>
66680    </peripheral>
66681    <peripheral>
66682      <name>PORTB</name>
66683      <description>Pin Control and Interrupts</description>
66684      <groupName>PORT</groupName>
66685      <prependToName>PORTB_</prependToName>
66686      <baseAddress>0x4004A000</baseAddress>
66687      <addressBlock>
66688        <offset>0</offset>
66689        <size>0xA4</size>
66690        <usage>registers</usage>
66691      </addressBlock>
66692      <interrupt>
66693        <name>PORTB</name>
66694        <value>60</value>
66695      </interrupt>
66696      <registers>
66697        <register>
66698          <name>PCR0</name>
66699          <description>Pin Control Register n</description>
66700          <addressOffset>0</addressOffset>
66701          <size>32</size>
66702          <access>read-write</access>
66703          <resetValue>0</resetValue>
66704          <resetMask>0xFFFFFFFF</resetMask>
66705          <fields>
66706            <field>
66707              <name>PS</name>
66708              <description>Pull Select</description>
66709              <bitOffset>0</bitOffset>
66710              <bitWidth>1</bitWidth>
66711              <access>read-write</access>
66712              <enumeratedValues>
66713                <enumeratedValue>
66714                  <name>0</name>
66715                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
66716                  <value>#0</value>
66717                </enumeratedValue>
66718                <enumeratedValue>
66719                  <name>1</name>
66720                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
66721                  <value>#1</value>
66722                </enumeratedValue>
66723              </enumeratedValues>
66724            </field>
66725            <field>
66726              <name>PE</name>
66727              <description>Pull Enable</description>
66728              <bitOffset>1</bitOffset>
66729              <bitWidth>1</bitWidth>
66730              <access>read-write</access>
66731              <enumeratedValues>
66732                <enumeratedValue>
66733                  <name>0</name>
66734                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
66735                  <value>#0</value>
66736                </enumeratedValue>
66737                <enumeratedValue>
66738                  <name>1</name>
66739                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
66740                  <value>#1</value>
66741                </enumeratedValue>
66742              </enumeratedValues>
66743            </field>
66744            <field>
66745              <name>SRE</name>
66746              <description>Slew Rate Enable</description>
66747              <bitOffset>2</bitOffset>
66748              <bitWidth>1</bitWidth>
66749              <access>read-write</access>
66750              <enumeratedValues>
66751                <enumeratedValue>
66752                  <name>0</name>
66753                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
66754                  <value>#0</value>
66755                </enumeratedValue>
66756                <enumeratedValue>
66757                  <name>1</name>
66758                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
66759                  <value>#1</value>
66760                </enumeratedValue>
66761              </enumeratedValues>
66762            </field>
66763            <field>
66764              <name>PFE</name>
66765              <description>Passive Filter Enable</description>
66766              <bitOffset>4</bitOffset>
66767              <bitWidth>1</bitWidth>
66768              <access>read-only</access>
66769              <enumeratedValues>
66770                <enumeratedValue>
66771                  <name>0</name>
66772                  <description>Passive input filter is disabled on the corresponding pin.</description>
66773                  <value>#0</value>
66774                </enumeratedValue>
66775                <enumeratedValue>
66776                  <name>1</name>
66777                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
66778                  <value>#1</value>
66779                </enumeratedValue>
66780              </enumeratedValues>
66781            </field>
66782            <field>
66783              <name>ODE</name>
66784              <description>Open Drain Enable</description>
66785              <bitOffset>5</bitOffset>
66786              <bitWidth>1</bitWidth>
66787              <access>read-write</access>
66788              <enumeratedValues>
66789                <enumeratedValue>
66790                  <name>0</name>
66791                  <description>Open drain output is disabled on the corresponding pin.</description>
66792                  <value>#0</value>
66793                </enumeratedValue>
66794                <enumeratedValue>
66795                  <name>1</name>
66796                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
66797                  <value>#1</value>
66798                </enumeratedValue>
66799              </enumeratedValues>
66800            </field>
66801            <field>
66802              <name>DSE</name>
66803              <description>Drive Strength Enable</description>
66804              <bitOffset>6</bitOffset>
66805              <bitWidth>1</bitWidth>
66806              <access>read-write</access>
66807              <enumeratedValues>
66808                <enumeratedValue>
66809                  <name>0</name>
66810                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
66811                  <value>#0</value>
66812                </enumeratedValue>
66813                <enumeratedValue>
66814                  <name>1</name>
66815                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
66816                  <value>#1</value>
66817                </enumeratedValue>
66818              </enumeratedValues>
66819            </field>
66820            <field>
66821              <name>MUX</name>
66822              <description>Pin Mux Control</description>
66823              <bitOffset>8</bitOffset>
66824              <bitWidth>3</bitWidth>
66825              <access>read-write</access>
66826              <enumeratedValues>
66827                <enumeratedValue>
66828                  <name>000</name>
66829                  <description>Pin disabled (Alternative 0) (analog).</description>
66830                  <value>#000</value>
66831                </enumeratedValue>
66832                <enumeratedValue>
66833                  <name>001</name>
66834                  <description>Alternative 1 (GPIO).</description>
66835                  <value>#001</value>
66836                </enumeratedValue>
66837                <enumeratedValue>
66838                  <name>010</name>
66839                  <description>Alternative 2 (chip-specific).</description>
66840                  <value>#010</value>
66841                </enumeratedValue>
66842                <enumeratedValue>
66843                  <name>011</name>
66844                  <description>Alternative 3 (chip-specific).</description>
66845                  <value>#011</value>
66846                </enumeratedValue>
66847                <enumeratedValue>
66848                  <name>100</name>
66849                  <description>Alternative 4 (chip-specific).</description>
66850                  <value>#100</value>
66851                </enumeratedValue>
66852                <enumeratedValue>
66853                  <name>101</name>
66854                  <description>Alternative 5 (chip-specific).</description>
66855                  <value>#101</value>
66856                </enumeratedValue>
66857                <enumeratedValue>
66858                  <name>110</name>
66859                  <description>Alternative 6 (chip-specific).</description>
66860                  <value>#110</value>
66861                </enumeratedValue>
66862                <enumeratedValue>
66863                  <name>111</name>
66864                  <description>Alternative 7 (chip-specific).</description>
66865                  <value>#111</value>
66866                </enumeratedValue>
66867              </enumeratedValues>
66868            </field>
66869            <field>
66870              <name>LK</name>
66871              <description>Lock Register</description>
66872              <bitOffset>15</bitOffset>
66873              <bitWidth>1</bitWidth>
66874              <access>read-write</access>
66875              <enumeratedValues>
66876                <enumeratedValue>
66877                  <name>0</name>
66878                  <description>Pin Control Register fields [15:0] are not locked.</description>
66879                  <value>#0</value>
66880                </enumeratedValue>
66881                <enumeratedValue>
66882                  <name>1</name>
66883                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
66884                  <value>#1</value>
66885                </enumeratedValue>
66886              </enumeratedValues>
66887            </field>
66888            <field>
66889              <name>IRQC</name>
66890              <description>Interrupt Configuration</description>
66891              <bitOffset>16</bitOffset>
66892              <bitWidth>4</bitWidth>
66893              <access>read-write</access>
66894              <enumeratedValues>
66895                <enumeratedValue>
66896                  <name>0000</name>
66897                  <description>Interrupt Status Flag (ISF) is disabled.</description>
66898                  <value>#0000</value>
66899                </enumeratedValue>
66900                <enumeratedValue>
66901                  <name>0001</name>
66902                  <description>ISF flag and DMA request on rising edge.</description>
66903                  <value>#0001</value>
66904                </enumeratedValue>
66905                <enumeratedValue>
66906                  <name>0010</name>
66907                  <description>ISF flag and DMA request on falling edge.</description>
66908                  <value>#0010</value>
66909                </enumeratedValue>
66910                <enumeratedValue>
66911                  <name>0011</name>
66912                  <description>ISF flag and DMA request on either edge.</description>
66913                  <value>#0011</value>
66914                </enumeratedValue>
66915                <enumeratedValue>
66916                  <name>1000</name>
66917                  <description>ISF flag and Interrupt when logic 0.</description>
66918                  <value>#1000</value>
66919                </enumeratedValue>
66920                <enumeratedValue>
66921                  <name>1001</name>
66922                  <description>ISF flag and Interrupt on rising-edge.</description>
66923                  <value>#1001</value>
66924                </enumeratedValue>
66925                <enumeratedValue>
66926                  <name>1010</name>
66927                  <description>ISF flag and Interrupt on falling-edge.</description>
66928                  <value>#1010</value>
66929                </enumeratedValue>
66930                <enumeratedValue>
66931                  <name>1011</name>
66932                  <description>ISF flag and Interrupt on either edge.</description>
66933                  <value>#1011</value>
66934                </enumeratedValue>
66935                <enumeratedValue>
66936                  <name>1100</name>
66937                  <description>ISF flag and Interrupt when logic 1.</description>
66938                  <value>#1100</value>
66939                </enumeratedValue>
66940              </enumeratedValues>
66941            </field>
66942            <field>
66943              <name>ISF</name>
66944              <description>Interrupt Status Flag</description>
66945              <bitOffset>24</bitOffset>
66946              <bitWidth>1</bitWidth>
66947              <access>read-write</access>
66948              <enumeratedValues>
66949                <enumeratedValue>
66950                  <name>0</name>
66951                  <description>Configured interrupt is not detected.</description>
66952                  <value>#0</value>
66953                </enumeratedValue>
66954                <enumeratedValue>
66955                  <name>1</name>
66956                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
66957                  <value>#1</value>
66958                </enumeratedValue>
66959              </enumeratedValues>
66960            </field>
66961          </fields>
66962        </register>
66963        <register>
66964          <name>PCR1</name>
66965          <description>Pin Control Register n</description>
66966          <addressOffset>0x4</addressOffset>
66967          <size>32</size>
66968          <access>read-write</access>
66969          <resetValue>0</resetValue>
66970          <resetMask>0xFFFFFFFF</resetMask>
66971          <fields>
66972            <field>
66973              <name>PS</name>
66974              <description>Pull Select</description>
66975              <bitOffset>0</bitOffset>
66976              <bitWidth>1</bitWidth>
66977              <access>read-write</access>
66978              <enumeratedValues>
66979                <enumeratedValue>
66980                  <name>0</name>
66981                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
66982                  <value>#0</value>
66983                </enumeratedValue>
66984                <enumeratedValue>
66985                  <name>1</name>
66986                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
66987                  <value>#1</value>
66988                </enumeratedValue>
66989              </enumeratedValues>
66990            </field>
66991            <field>
66992              <name>PE</name>
66993              <description>Pull Enable</description>
66994              <bitOffset>1</bitOffset>
66995              <bitWidth>1</bitWidth>
66996              <access>read-write</access>
66997              <enumeratedValues>
66998                <enumeratedValue>
66999                  <name>0</name>
67000                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
67001                  <value>#0</value>
67002                </enumeratedValue>
67003                <enumeratedValue>
67004                  <name>1</name>
67005                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
67006                  <value>#1</value>
67007                </enumeratedValue>
67008              </enumeratedValues>
67009            </field>
67010            <field>
67011              <name>SRE</name>
67012              <description>Slew Rate Enable</description>
67013              <bitOffset>2</bitOffset>
67014              <bitWidth>1</bitWidth>
67015              <access>read-write</access>
67016              <enumeratedValues>
67017                <enumeratedValue>
67018                  <name>0</name>
67019                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
67020                  <value>#0</value>
67021                </enumeratedValue>
67022                <enumeratedValue>
67023                  <name>1</name>
67024                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
67025                  <value>#1</value>
67026                </enumeratedValue>
67027              </enumeratedValues>
67028            </field>
67029            <field>
67030              <name>PFE</name>
67031              <description>Passive Filter Enable</description>
67032              <bitOffset>4</bitOffset>
67033              <bitWidth>1</bitWidth>
67034              <access>read-only</access>
67035              <enumeratedValues>
67036                <enumeratedValue>
67037                  <name>0</name>
67038                  <description>Passive input filter is disabled on the corresponding pin.</description>
67039                  <value>#0</value>
67040                </enumeratedValue>
67041                <enumeratedValue>
67042                  <name>1</name>
67043                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
67044                  <value>#1</value>
67045                </enumeratedValue>
67046              </enumeratedValues>
67047            </field>
67048            <field>
67049              <name>ODE</name>
67050              <description>Open Drain Enable</description>
67051              <bitOffset>5</bitOffset>
67052              <bitWidth>1</bitWidth>
67053              <access>read-write</access>
67054              <enumeratedValues>
67055                <enumeratedValue>
67056                  <name>0</name>
67057                  <description>Open drain output is disabled on the corresponding pin.</description>
67058                  <value>#0</value>
67059                </enumeratedValue>
67060                <enumeratedValue>
67061                  <name>1</name>
67062                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
67063                  <value>#1</value>
67064                </enumeratedValue>
67065              </enumeratedValues>
67066            </field>
67067            <field>
67068              <name>DSE</name>
67069              <description>Drive Strength Enable</description>
67070              <bitOffset>6</bitOffset>
67071              <bitWidth>1</bitWidth>
67072              <access>read-write</access>
67073              <enumeratedValues>
67074                <enumeratedValue>
67075                  <name>0</name>
67076                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
67077                  <value>#0</value>
67078                </enumeratedValue>
67079                <enumeratedValue>
67080                  <name>1</name>
67081                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
67082                  <value>#1</value>
67083                </enumeratedValue>
67084              </enumeratedValues>
67085            </field>
67086            <field>
67087              <name>MUX</name>
67088              <description>Pin Mux Control</description>
67089              <bitOffset>8</bitOffset>
67090              <bitWidth>3</bitWidth>
67091              <access>read-write</access>
67092              <enumeratedValues>
67093                <enumeratedValue>
67094                  <name>000</name>
67095                  <description>Pin disabled (Alternative 0) (analog).</description>
67096                  <value>#000</value>
67097                </enumeratedValue>
67098                <enumeratedValue>
67099                  <name>001</name>
67100                  <description>Alternative 1 (GPIO).</description>
67101                  <value>#001</value>
67102                </enumeratedValue>
67103                <enumeratedValue>
67104                  <name>010</name>
67105                  <description>Alternative 2 (chip-specific).</description>
67106                  <value>#010</value>
67107                </enumeratedValue>
67108                <enumeratedValue>
67109                  <name>011</name>
67110                  <description>Alternative 3 (chip-specific).</description>
67111                  <value>#011</value>
67112                </enumeratedValue>
67113                <enumeratedValue>
67114                  <name>100</name>
67115                  <description>Alternative 4 (chip-specific).</description>
67116                  <value>#100</value>
67117                </enumeratedValue>
67118                <enumeratedValue>
67119                  <name>101</name>
67120                  <description>Alternative 5 (chip-specific).</description>
67121                  <value>#101</value>
67122                </enumeratedValue>
67123                <enumeratedValue>
67124                  <name>110</name>
67125                  <description>Alternative 6 (chip-specific).</description>
67126                  <value>#110</value>
67127                </enumeratedValue>
67128                <enumeratedValue>
67129                  <name>111</name>
67130                  <description>Alternative 7 (chip-specific).</description>
67131                  <value>#111</value>
67132                </enumeratedValue>
67133              </enumeratedValues>
67134            </field>
67135            <field>
67136              <name>LK</name>
67137              <description>Lock Register</description>
67138              <bitOffset>15</bitOffset>
67139              <bitWidth>1</bitWidth>
67140              <access>read-write</access>
67141              <enumeratedValues>
67142                <enumeratedValue>
67143                  <name>0</name>
67144                  <description>Pin Control Register fields [15:0] are not locked.</description>
67145                  <value>#0</value>
67146                </enumeratedValue>
67147                <enumeratedValue>
67148                  <name>1</name>
67149                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
67150                  <value>#1</value>
67151                </enumeratedValue>
67152              </enumeratedValues>
67153            </field>
67154            <field>
67155              <name>IRQC</name>
67156              <description>Interrupt Configuration</description>
67157              <bitOffset>16</bitOffset>
67158              <bitWidth>4</bitWidth>
67159              <access>read-write</access>
67160              <enumeratedValues>
67161                <enumeratedValue>
67162                  <name>0000</name>
67163                  <description>Interrupt Status Flag (ISF) is disabled.</description>
67164                  <value>#0000</value>
67165                </enumeratedValue>
67166                <enumeratedValue>
67167                  <name>0001</name>
67168                  <description>ISF flag and DMA request on rising edge.</description>
67169                  <value>#0001</value>
67170                </enumeratedValue>
67171                <enumeratedValue>
67172                  <name>0010</name>
67173                  <description>ISF flag and DMA request on falling edge.</description>
67174                  <value>#0010</value>
67175                </enumeratedValue>
67176                <enumeratedValue>
67177                  <name>0011</name>
67178                  <description>ISF flag and DMA request on either edge.</description>
67179                  <value>#0011</value>
67180                </enumeratedValue>
67181                <enumeratedValue>
67182                  <name>1000</name>
67183                  <description>ISF flag and Interrupt when logic 0.</description>
67184                  <value>#1000</value>
67185                </enumeratedValue>
67186                <enumeratedValue>
67187                  <name>1001</name>
67188                  <description>ISF flag and Interrupt on rising-edge.</description>
67189                  <value>#1001</value>
67190                </enumeratedValue>
67191                <enumeratedValue>
67192                  <name>1010</name>
67193                  <description>ISF flag and Interrupt on falling-edge.</description>
67194                  <value>#1010</value>
67195                </enumeratedValue>
67196                <enumeratedValue>
67197                  <name>1011</name>
67198                  <description>ISF flag and Interrupt on either edge.</description>
67199                  <value>#1011</value>
67200                </enumeratedValue>
67201                <enumeratedValue>
67202                  <name>1100</name>
67203                  <description>ISF flag and Interrupt when logic 1.</description>
67204                  <value>#1100</value>
67205                </enumeratedValue>
67206              </enumeratedValues>
67207            </field>
67208            <field>
67209              <name>ISF</name>
67210              <description>Interrupt Status Flag</description>
67211              <bitOffset>24</bitOffset>
67212              <bitWidth>1</bitWidth>
67213              <access>read-write</access>
67214              <enumeratedValues>
67215                <enumeratedValue>
67216                  <name>0</name>
67217                  <description>Configured interrupt is not detected.</description>
67218                  <value>#0</value>
67219                </enumeratedValue>
67220                <enumeratedValue>
67221                  <name>1</name>
67222                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
67223                  <value>#1</value>
67224                </enumeratedValue>
67225              </enumeratedValues>
67226            </field>
67227          </fields>
67228        </register>
67229        <register>
67230          <name>PCR2</name>
67231          <description>Pin Control Register n</description>
67232          <addressOffset>0x8</addressOffset>
67233          <size>32</size>
67234          <access>read-write</access>
67235          <resetValue>0</resetValue>
67236          <resetMask>0xFFFFFFFF</resetMask>
67237          <fields>
67238            <field>
67239              <name>PS</name>
67240              <description>Pull Select</description>
67241              <bitOffset>0</bitOffset>
67242              <bitWidth>1</bitWidth>
67243              <access>read-write</access>
67244              <enumeratedValues>
67245                <enumeratedValue>
67246                  <name>0</name>
67247                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
67248                  <value>#0</value>
67249                </enumeratedValue>
67250                <enumeratedValue>
67251                  <name>1</name>
67252                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
67253                  <value>#1</value>
67254                </enumeratedValue>
67255              </enumeratedValues>
67256            </field>
67257            <field>
67258              <name>PE</name>
67259              <description>Pull Enable</description>
67260              <bitOffset>1</bitOffset>
67261              <bitWidth>1</bitWidth>
67262              <access>read-write</access>
67263              <enumeratedValues>
67264                <enumeratedValue>
67265                  <name>0</name>
67266                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
67267                  <value>#0</value>
67268                </enumeratedValue>
67269                <enumeratedValue>
67270                  <name>1</name>
67271                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
67272                  <value>#1</value>
67273                </enumeratedValue>
67274              </enumeratedValues>
67275            </field>
67276            <field>
67277              <name>SRE</name>
67278              <description>Slew Rate Enable</description>
67279              <bitOffset>2</bitOffset>
67280              <bitWidth>1</bitWidth>
67281              <access>read-write</access>
67282              <enumeratedValues>
67283                <enumeratedValue>
67284                  <name>0</name>
67285                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
67286                  <value>#0</value>
67287                </enumeratedValue>
67288                <enumeratedValue>
67289                  <name>1</name>
67290                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
67291                  <value>#1</value>
67292                </enumeratedValue>
67293              </enumeratedValues>
67294            </field>
67295            <field>
67296              <name>PFE</name>
67297              <description>Passive Filter Enable</description>
67298              <bitOffset>4</bitOffset>
67299              <bitWidth>1</bitWidth>
67300              <access>read-only</access>
67301              <enumeratedValues>
67302                <enumeratedValue>
67303                  <name>0</name>
67304                  <description>Passive input filter is disabled on the corresponding pin.</description>
67305                  <value>#0</value>
67306                </enumeratedValue>
67307                <enumeratedValue>
67308                  <name>1</name>
67309                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
67310                  <value>#1</value>
67311                </enumeratedValue>
67312              </enumeratedValues>
67313            </field>
67314            <field>
67315              <name>ODE</name>
67316              <description>Open Drain Enable</description>
67317              <bitOffset>5</bitOffset>
67318              <bitWidth>1</bitWidth>
67319              <access>read-write</access>
67320              <enumeratedValues>
67321                <enumeratedValue>
67322                  <name>0</name>
67323                  <description>Open drain output is disabled on the corresponding pin.</description>
67324                  <value>#0</value>
67325                </enumeratedValue>
67326                <enumeratedValue>
67327                  <name>1</name>
67328                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
67329                  <value>#1</value>
67330                </enumeratedValue>
67331              </enumeratedValues>
67332            </field>
67333            <field>
67334              <name>DSE</name>
67335              <description>Drive Strength Enable</description>
67336              <bitOffset>6</bitOffset>
67337              <bitWidth>1</bitWidth>
67338              <access>read-only</access>
67339              <enumeratedValues>
67340                <enumeratedValue>
67341                  <name>0</name>
67342                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
67343                  <value>#0</value>
67344                </enumeratedValue>
67345                <enumeratedValue>
67346                  <name>1</name>
67347                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
67348                  <value>#1</value>
67349                </enumeratedValue>
67350              </enumeratedValues>
67351            </field>
67352            <field>
67353              <name>MUX</name>
67354              <description>Pin Mux Control</description>
67355              <bitOffset>8</bitOffset>
67356              <bitWidth>3</bitWidth>
67357              <access>read-write</access>
67358              <enumeratedValues>
67359                <enumeratedValue>
67360                  <name>000</name>
67361                  <description>Pin disabled (Alternative 0) (analog).</description>
67362                  <value>#000</value>
67363                </enumeratedValue>
67364                <enumeratedValue>
67365                  <name>001</name>
67366                  <description>Alternative 1 (GPIO).</description>
67367                  <value>#001</value>
67368                </enumeratedValue>
67369                <enumeratedValue>
67370                  <name>010</name>
67371                  <description>Alternative 2 (chip-specific).</description>
67372                  <value>#010</value>
67373                </enumeratedValue>
67374                <enumeratedValue>
67375                  <name>011</name>
67376                  <description>Alternative 3 (chip-specific).</description>
67377                  <value>#011</value>
67378                </enumeratedValue>
67379                <enumeratedValue>
67380                  <name>100</name>
67381                  <description>Alternative 4 (chip-specific).</description>
67382                  <value>#100</value>
67383                </enumeratedValue>
67384                <enumeratedValue>
67385                  <name>101</name>
67386                  <description>Alternative 5 (chip-specific).</description>
67387                  <value>#101</value>
67388                </enumeratedValue>
67389                <enumeratedValue>
67390                  <name>110</name>
67391                  <description>Alternative 6 (chip-specific).</description>
67392                  <value>#110</value>
67393                </enumeratedValue>
67394                <enumeratedValue>
67395                  <name>111</name>
67396                  <description>Alternative 7 (chip-specific).</description>
67397                  <value>#111</value>
67398                </enumeratedValue>
67399              </enumeratedValues>
67400            </field>
67401            <field>
67402              <name>LK</name>
67403              <description>Lock Register</description>
67404              <bitOffset>15</bitOffset>
67405              <bitWidth>1</bitWidth>
67406              <access>read-write</access>
67407              <enumeratedValues>
67408                <enumeratedValue>
67409                  <name>0</name>
67410                  <description>Pin Control Register fields [15:0] are not locked.</description>
67411                  <value>#0</value>
67412                </enumeratedValue>
67413                <enumeratedValue>
67414                  <name>1</name>
67415                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
67416                  <value>#1</value>
67417                </enumeratedValue>
67418              </enumeratedValues>
67419            </field>
67420            <field>
67421              <name>IRQC</name>
67422              <description>Interrupt Configuration</description>
67423              <bitOffset>16</bitOffset>
67424              <bitWidth>4</bitWidth>
67425              <access>read-write</access>
67426              <enumeratedValues>
67427                <enumeratedValue>
67428                  <name>0000</name>
67429                  <description>Interrupt Status Flag (ISF) is disabled.</description>
67430                  <value>#0000</value>
67431                </enumeratedValue>
67432                <enumeratedValue>
67433                  <name>0001</name>
67434                  <description>ISF flag and DMA request on rising edge.</description>
67435                  <value>#0001</value>
67436                </enumeratedValue>
67437                <enumeratedValue>
67438                  <name>0010</name>
67439                  <description>ISF flag and DMA request on falling edge.</description>
67440                  <value>#0010</value>
67441                </enumeratedValue>
67442                <enumeratedValue>
67443                  <name>0011</name>
67444                  <description>ISF flag and DMA request on either edge.</description>
67445                  <value>#0011</value>
67446                </enumeratedValue>
67447                <enumeratedValue>
67448                  <name>1000</name>
67449                  <description>ISF flag and Interrupt when logic 0.</description>
67450                  <value>#1000</value>
67451                </enumeratedValue>
67452                <enumeratedValue>
67453                  <name>1001</name>
67454                  <description>ISF flag and Interrupt on rising-edge.</description>
67455                  <value>#1001</value>
67456                </enumeratedValue>
67457                <enumeratedValue>
67458                  <name>1010</name>
67459                  <description>ISF flag and Interrupt on falling-edge.</description>
67460                  <value>#1010</value>
67461                </enumeratedValue>
67462                <enumeratedValue>
67463                  <name>1011</name>
67464                  <description>ISF flag and Interrupt on either edge.</description>
67465                  <value>#1011</value>
67466                </enumeratedValue>
67467                <enumeratedValue>
67468                  <name>1100</name>
67469                  <description>ISF flag and Interrupt when logic 1.</description>
67470                  <value>#1100</value>
67471                </enumeratedValue>
67472              </enumeratedValues>
67473            </field>
67474            <field>
67475              <name>ISF</name>
67476              <description>Interrupt Status Flag</description>
67477              <bitOffset>24</bitOffset>
67478              <bitWidth>1</bitWidth>
67479              <access>read-write</access>
67480              <enumeratedValues>
67481                <enumeratedValue>
67482                  <name>0</name>
67483                  <description>Configured interrupt is not detected.</description>
67484                  <value>#0</value>
67485                </enumeratedValue>
67486                <enumeratedValue>
67487                  <name>1</name>
67488                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
67489                  <value>#1</value>
67490                </enumeratedValue>
67491              </enumeratedValues>
67492            </field>
67493          </fields>
67494        </register>
67495        <register>
67496          <name>PCR3</name>
67497          <description>Pin Control Register n</description>
67498          <addressOffset>0xC</addressOffset>
67499          <size>32</size>
67500          <access>read-write</access>
67501          <resetValue>0</resetValue>
67502          <resetMask>0xFFFFFFFF</resetMask>
67503          <fields>
67504            <field>
67505              <name>PS</name>
67506              <description>Pull Select</description>
67507              <bitOffset>0</bitOffset>
67508              <bitWidth>1</bitWidth>
67509              <access>read-write</access>
67510              <enumeratedValues>
67511                <enumeratedValue>
67512                  <name>0</name>
67513                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
67514                  <value>#0</value>
67515                </enumeratedValue>
67516                <enumeratedValue>
67517                  <name>1</name>
67518                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
67519                  <value>#1</value>
67520                </enumeratedValue>
67521              </enumeratedValues>
67522            </field>
67523            <field>
67524              <name>PE</name>
67525              <description>Pull Enable</description>
67526              <bitOffset>1</bitOffset>
67527              <bitWidth>1</bitWidth>
67528              <access>read-write</access>
67529              <enumeratedValues>
67530                <enumeratedValue>
67531                  <name>0</name>
67532                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
67533                  <value>#0</value>
67534                </enumeratedValue>
67535                <enumeratedValue>
67536                  <name>1</name>
67537                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
67538                  <value>#1</value>
67539                </enumeratedValue>
67540              </enumeratedValues>
67541            </field>
67542            <field>
67543              <name>SRE</name>
67544              <description>Slew Rate Enable</description>
67545              <bitOffset>2</bitOffset>
67546              <bitWidth>1</bitWidth>
67547              <access>read-write</access>
67548              <enumeratedValues>
67549                <enumeratedValue>
67550                  <name>0</name>
67551                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
67552                  <value>#0</value>
67553                </enumeratedValue>
67554                <enumeratedValue>
67555                  <name>1</name>
67556                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
67557                  <value>#1</value>
67558                </enumeratedValue>
67559              </enumeratedValues>
67560            </field>
67561            <field>
67562              <name>PFE</name>
67563              <description>Passive Filter Enable</description>
67564              <bitOffset>4</bitOffset>
67565              <bitWidth>1</bitWidth>
67566              <access>read-only</access>
67567              <enumeratedValues>
67568                <enumeratedValue>
67569                  <name>0</name>
67570                  <description>Passive input filter is disabled on the corresponding pin.</description>
67571                  <value>#0</value>
67572                </enumeratedValue>
67573                <enumeratedValue>
67574                  <name>1</name>
67575                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
67576                  <value>#1</value>
67577                </enumeratedValue>
67578              </enumeratedValues>
67579            </field>
67580            <field>
67581              <name>ODE</name>
67582              <description>Open Drain Enable</description>
67583              <bitOffset>5</bitOffset>
67584              <bitWidth>1</bitWidth>
67585              <access>read-write</access>
67586              <enumeratedValues>
67587                <enumeratedValue>
67588                  <name>0</name>
67589                  <description>Open drain output is disabled on the corresponding pin.</description>
67590                  <value>#0</value>
67591                </enumeratedValue>
67592                <enumeratedValue>
67593                  <name>1</name>
67594                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
67595                  <value>#1</value>
67596                </enumeratedValue>
67597              </enumeratedValues>
67598            </field>
67599            <field>
67600              <name>DSE</name>
67601              <description>Drive Strength Enable</description>
67602              <bitOffset>6</bitOffset>
67603              <bitWidth>1</bitWidth>
67604              <access>read-only</access>
67605              <enumeratedValues>
67606                <enumeratedValue>
67607                  <name>0</name>
67608                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
67609                  <value>#0</value>
67610                </enumeratedValue>
67611                <enumeratedValue>
67612                  <name>1</name>
67613                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
67614                  <value>#1</value>
67615                </enumeratedValue>
67616              </enumeratedValues>
67617            </field>
67618            <field>
67619              <name>MUX</name>
67620              <description>Pin Mux Control</description>
67621              <bitOffset>8</bitOffset>
67622              <bitWidth>3</bitWidth>
67623              <access>read-write</access>
67624              <enumeratedValues>
67625                <enumeratedValue>
67626                  <name>000</name>
67627                  <description>Pin disabled (Alternative 0) (analog).</description>
67628                  <value>#000</value>
67629                </enumeratedValue>
67630                <enumeratedValue>
67631                  <name>001</name>
67632                  <description>Alternative 1 (GPIO).</description>
67633                  <value>#001</value>
67634                </enumeratedValue>
67635                <enumeratedValue>
67636                  <name>010</name>
67637                  <description>Alternative 2 (chip-specific).</description>
67638                  <value>#010</value>
67639                </enumeratedValue>
67640                <enumeratedValue>
67641                  <name>011</name>
67642                  <description>Alternative 3 (chip-specific).</description>
67643                  <value>#011</value>
67644                </enumeratedValue>
67645                <enumeratedValue>
67646                  <name>100</name>
67647                  <description>Alternative 4 (chip-specific).</description>
67648                  <value>#100</value>
67649                </enumeratedValue>
67650                <enumeratedValue>
67651                  <name>101</name>
67652                  <description>Alternative 5 (chip-specific).</description>
67653                  <value>#101</value>
67654                </enumeratedValue>
67655                <enumeratedValue>
67656                  <name>110</name>
67657                  <description>Alternative 6 (chip-specific).</description>
67658                  <value>#110</value>
67659                </enumeratedValue>
67660                <enumeratedValue>
67661                  <name>111</name>
67662                  <description>Alternative 7 (chip-specific).</description>
67663                  <value>#111</value>
67664                </enumeratedValue>
67665              </enumeratedValues>
67666            </field>
67667            <field>
67668              <name>LK</name>
67669              <description>Lock Register</description>
67670              <bitOffset>15</bitOffset>
67671              <bitWidth>1</bitWidth>
67672              <access>read-write</access>
67673              <enumeratedValues>
67674                <enumeratedValue>
67675                  <name>0</name>
67676                  <description>Pin Control Register fields [15:0] are not locked.</description>
67677                  <value>#0</value>
67678                </enumeratedValue>
67679                <enumeratedValue>
67680                  <name>1</name>
67681                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
67682                  <value>#1</value>
67683                </enumeratedValue>
67684              </enumeratedValues>
67685            </field>
67686            <field>
67687              <name>IRQC</name>
67688              <description>Interrupt Configuration</description>
67689              <bitOffset>16</bitOffset>
67690              <bitWidth>4</bitWidth>
67691              <access>read-write</access>
67692              <enumeratedValues>
67693                <enumeratedValue>
67694                  <name>0000</name>
67695                  <description>Interrupt Status Flag (ISF) is disabled.</description>
67696                  <value>#0000</value>
67697                </enumeratedValue>
67698                <enumeratedValue>
67699                  <name>0001</name>
67700                  <description>ISF flag and DMA request on rising edge.</description>
67701                  <value>#0001</value>
67702                </enumeratedValue>
67703                <enumeratedValue>
67704                  <name>0010</name>
67705                  <description>ISF flag and DMA request on falling edge.</description>
67706                  <value>#0010</value>
67707                </enumeratedValue>
67708                <enumeratedValue>
67709                  <name>0011</name>
67710                  <description>ISF flag and DMA request on either edge.</description>
67711                  <value>#0011</value>
67712                </enumeratedValue>
67713                <enumeratedValue>
67714                  <name>1000</name>
67715                  <description>ISF flag and Interrupt when logic 0.</description>
67716                  <value>#1000</value>
67717                </enumeratedValue>
67718                <enumeratedValue>
67719                  <name>1001</name>
67720                  <description>ISF flag and Interrupt on rising-edge.</description>
67721                  <value>#1001</value>
67722                </enumeratedValue>
67723                <enumeratedValue>
67724                  <name>1010</name>
67725                  <description>ISF flag and Interrupt on falling-edge.</description>
67726                  <value>#1010</value>
67727                </enumeratedValue>
67728                <enumeratedValue>
67729                  <name>1011</name>
67730                  <description>ISF flag and Interrupt on either edge.</description>
67731                  <value>#1011</value>
67732                </enumeratedValue>
67733                <enumeratedValue>
67734                  <name>1100</name>
67735                  <description>ISF flag and Interrupt when logic 1.</description>
67736                  <value>#1100</value>
67737                </enumeratedValue>
67738              </enumeratedValues>
67739            </field>
67740            <field>
67741              <name>ISF</name>
67742              <description>Interrupt Status Flag</description>
67743              <bitOffset>24</bitOffset>
67744              <bitWidth>1</bitWidth>
67745              <access>read-write</access>
67746              <enumeratedValues>
67747                <enumeratedValue>
67748                  <name>0</name>
67749                  <description>Configured interrupt is not detected.</description>
67750                  <value>#0</value>
67751                </enumeratedValue>
67752                <enumeratedValue>
67753                  <name>1</name>
67754                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
67755                  <value>#1</value>
67756                </enumeratedValue>
67757              </enumeratedValues>
67758            </field>
67759          </fields>
67760        </register>
67761        <register>
67762          <name>PCR4</name>
67763          <description>Pin Control Register n</description>
67764          <addressOffset>0x10</addressOffset>
67765          <size>32</size>
67766          <access>read-write</access>
67767          <resetValue>0</resetValue>
67768          <resetMask>0xFFFFFFFF</resetMask>
67769          <fields>
67770            <field>
67771              <name>PS</name>
67772              <description>Pull Select</description>
67773              <bitOffset>0</bitOffset>
67774              <bitWidth>1</bitWidth>
67775              <access>read-write</access>
67776              <enumeratedValues>
67777                <enumeratedValue>
67778                  <name>0</name>
67779                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
67780                  <value>#0</value>
67781                </enumeratedValue>
67782                <enumeratedValue>
67783                  <name>1</name>
67784                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
67785                  <value>#1</value>
67786                </enumeratedValue>
67787              </enumeratedValues>
67788            </field>
67789            <field>
67790              <name>PE</name>
67791              <description>Pull Enable</description>
67792              <bitOffset>1</bitOffset>
67793              <bitWidth>1</bitWidth>
67794              <access>read-write</access>
67795              <enumeratedValues>
67796                <enumeratedValue>
67797                  <name>0</name>
67798                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
67799                  <value>#0</value>
67800                </enumeratedValue>
67801                <enumeratedValue>
67802                  <name>1</name>
67803                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
67804                  <value>#1</value>
67805                </enumeratedValue>
67806              </enumeratedValues>
67807            </field>
67808            <field>
67809              <name>SRE</name>
67810              <description>Slew Rate Enable</description>
67811              <bitOffset>2</bitOffset>
67812              <bitWidth>1</bitWidth>
67813              <access>read-write</access>
67814              <enumeratedValues>
67815                <enumeratedValue>
67816                  <name>0</name>
67817                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
67818                  <value>#0</value>
67819                </enumeratedValue>
67820                <enumeratedValue>
67821                  <name>1</name>
67822                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
67823                  <value>#1</value>
67824                </enumeratedValue>
67825              </enumeratedValues>
67826            </field>
67827            <field>
67828              <name>PFE</name>
67829              <description>Passive Filter Enable</description>
67830              <bitOffset>4</bitOffset>
67831              <bitWidth>1</bitWidth>
67832              <access>read-only</access>
67833              <enumeratedValues>
67834                <enumeratedValue>
67835                  <name>0</name>
67836                  <description>Passive input filter is disabled on the corresponding pin.</description>
67837                  <value>#0</value>
67838                </enumeratedValue>
67839                <enumeratedValue>
67840                  <name>1</name>
67841                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
67842                  <value>#1</value>
67843                </enumeratedValue>
67844              </enumeratedValues>
67845            </field>
67846            <field>
67847              <name>ODE</name>
67848              <description>Open Drain Enable</description>
67849              <bitOffset>5</bitOffset>
67850              <bitWidth>1</bitWidth>
67851              <access>read-write</access>
67852              <enumeratedValues>
67853                <enumeratedValue>
67854                  <name>0</name>
67855                  <description>Open drain output is disabled on the corresponding pin.</description>
67856                  <value>#0</value>
67857                </enumeratedValue>
67858                <enumeratedValue>
67859                  <name>1</name>
67860                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
67861                  <value>#1</value>
67862                </enumeratedValue>
67863              </enumeratedValues>
67864            </field>
67865            <field>
67866              <name>DSE</name>
67867              <description>Drive Strength Enable</description>
67868              <bitOffset>6</bitOffset>
67869              <bitWidth>1</bitWidth>
67870              <access>read-only</access>
67871              <enumeratedValues>
67872                <enumeratedValue>
67873                  <name>0</name>
67874                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
67875                  <value>#0</value>
67876                </enumeratedValue>
67877                <enumeratedValue>
67878                  <name>1</name>
67879                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
67880                  <value>#1</value>
67881                </enumeratedValue>
67882              </enumeratedValues>
67883            </field>
67884            <field>
67885              <name>MUX</name>
67886              <description>Pin Mux Control</description>
67887              <bitOffset>8</bitOffset>
67888              <bitWidth>3</bitWidth>
67889              <access>read-write</access>
67890              <enumeratedValues>
67891                <enumeratedValue>
67892                  <name>000</name>
67893                  <description>Pin disabled (Alternative 0) (analog).</description>
67894                  <value>#000</value>
67895                </enumeratedValue>
67896                <enumeratedValue>
67897                  <name>001</name>
67898                  <description>Alternative 1 (GPIO).</description>
67899                  <value>#001</value>
67900                </enumeratedValue>
67901                <enumeratedValue>
67902                  <name>010</name>
67903                  <description>Alternative 2 (chip-specific).</description>
67904                  <value>#010</value>
67905                </enumeratedValue>
67906                <enumeratedValue>
67907                  <name>011</name>
67908                  <description>Alternative 3 (chip-specific).</description>
67909                  <value>#011</value>
67910                </enumeratedValue>
67911                <enumeratedValue>
67912                  <name>100</name>
67913                  <description>Alternative 4 (chip-specific).</description>
67914                  <value>#100</value>
67915                </enumeratedValue>
67916                <enumeratedValue>
67917                  <name>101</name>
67918                  <description>Alternative 5 (chip-specific).</description>
67919                  <value>#101</value>
67920                </enumeratedValue>
67921                <enumeratedValue>
67922                  <name>110</name>
67923                  <description>Alternative 6 (chip-specific).</description>
67924                  <value>#110</value>
67925                </enumeratedValue>
67926                <enumeratedValue>
67927                  <name>111</name>
67928                  <description>Alternative 7 (chip-specific).</description>
67929                  <value>#111</value>
67930                </enumeratedValue>
67931              </enumeratedValues>
67932            </field>
67933            <field>
67934              <name>LK</name>
67935              <description>Lock Register</description>
67936              <bitOffset>15</bitOffset>
67937              <bitWidth>1</bitWidth>
67938              <access>read-write</access>
67939              <enumeratedValues>
67940                <enumeratedValue>
67941                  <name>0</name>
67942                  <description>Pin Control Register fields [15:0] are not locked.</description>
67943                  <value>#0</value>
67944                </enumeratedValue>
67945                <enumeratedValue>
67946                  <name>1</name>
67947                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
67948                  <value>#1</value>
67949                </enumeratedValue>
67950              </enumeratedValues>
67951            </field>
67952            <field>
67953              <name>IRQC</name>
67954              <description>Interrupt Configuration</description>
67955              <bitOffset>16</bitOffset>
67956              <bitWidth>4</bitWidth>
67957              <access>read-write</access>
67958              <enumeratedValues>
67959                <enumeratedValue>
67960                  <name>0000</name>
67961                  <description>Interrupt Status Flag (ISF) is disabled.</description>
67962                  <value>#0000</value>
67963                </enumeratedValue>
67964                <enumeratedValue>
67965                  <name>0001</name>
67966                  <description>ISF flag and DMA request on rising edge.</description>
67967                  <value>#0001</value>
67968                </enumeratedValue>
67969                <enumeratedValue>
67970                  <name>0010</name>
67971                  <description>ISF flag and DMA request on falling edge.</description>
67972                  <value>#0010</value>
67973                </enumeratedValue>
67974                <enumeratedValue>
67975                  <name>0011</name>
67976                  <description>ISF flag and DMA request on either edge.</description>
67977                  <value>#0011</value>
67978                </enumeratedValue>
67979                <enumeratedValue>
67980                  <name>1000</name>
67981                  <description>ISF flag and Interrupt when logic 0.</description>
67982                  <value>#1000</value>
67983                </enumeratedValue>
67984                <enumeratedValue>
67985                  <name>1001</name>
67986                  <description>ISF flag and Interrupt on rising-edge.</description>
67987                  <value>#1001</value>
67988                </enumeratedValue>
67989                <enumeratedValue>
67990                  <name>1010</name>
67991                  <description>ISF flag and Interrupt on falling-edge.</description>
67992                  <value>#1010</value>
67993                </enumeratedValue>
67994                <enumeratedValue>
67995                  <name>1011</name>
67996                  <description>ISF flag and Interrupt on either edge.</description>
67997                  <value>#1011</value>
67998                </enumeratedValue>
67999                <enumeratedValue>
68000                  <name>1100</name>
68001                  <description>ISF flag and Interrupt when logic 1.</description>
68002                  <value>#1100</value>
68003                </enumeratedValue>
68004              </enumeratedValues>
68005            </field>
68006            <field>
68007              <name>ISF</name>
68008              <description>Interrupt Status Flag</description>
68009              <bitOffset>24</bitOffset>
68010              <bitWidth>1</bitWidth>
68011              <access>read-write</access>
68012              <enumeratedValues>
68013                <enumeratedValue>
68014                  <name>0</name>
68015                  <description>Configured interrupt is not detected.</description>
68016                  <value>#0</value>
68017                </enumeratedValue>
68018                <enumeratedValue>
68019                  <name>1</name>
68020                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
68021                  <value>#1</value>
68022                </enumeratedValue>
68023              </enumeratedValues>
68024            </field>
68025          </fields>
68026        </register>
68027        <register>
68028          <name>PCR5</name>
68029          <description>Pin Control Register n</description>
68030          <addressOffset>0x14</addressOffset>
68031          <size>32</size>
68032          <access>read-write</access>
68033          <resetValue>0</resetValue>
68034          <resetMask>0xFFFFFFFF</resetMask>
68035          <fields>
68036            <field>
68037              <name>PS</name>
68038              <description>Pull Select</description>
68039              <bitOffset>0</bitOffset>
68040              <bitWidth>1</bitWidth>
68041              <access>read-write</access>
68042              <enumeratedValues>
68043                <enumeratedValue>
68044                  <name>0</name>
68045                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
68046                  <value>#0</value>
68047                </enumeratedValue>
68048                <enumeratedValue>
68049                  <name>1</name>
68050                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
68051                  <value>#1</value>
68052                </enumeratedValue>
68053              </enumeratedValues>
68054            </field>
68055            <field>
68056              <name>PE</name>
68057              <description>Pull Enable</description>
68058              <bitOffset>1</bitOffset>
68059              <bitWidth>1</bitWidth>
68060              <access>read-write</access>
68061              <enumeratedValues>
68062                <enumeratedValue>
68063                  <name>0</name>
68064                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
68065                  <value>#0</value>
68066                </enumeratedValue>
68067                <enumeratedValue>
68068                  <name>1</name>
68069                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
68070                  <value>#1</value>
68071                </enumeratedValue>
68072              </enumeratedValues>
68073            </field>
68074            <field>
68075              <name>SRE</name>
68076              <description>Slew Rate Enable</description>
68077              <bitOffset>2</bitOffset>
68078              <bitWidth>1</bitWidth>
68079              <access>read-write</access>
68080              <enumeratedValues>
68081                <enumeratedValue>
68082                  <name>0</name>
68083                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
68084                  <value>#0</value>
68085                </enumeratedValue>
68086                <enumeratedValue>
68087                  <name>1</name>
68088                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
68089                  <value>#1</value>
68090                </enumeratedValue>
68091              </enumeratedValues>
68092            </field>
68093            <field>
68094              <name>PFE</name>
68095              <description>Passive Filter Enable</description>
68096              <bitOffset>4</bitOffset>
68097              <bitWidth>1</bitWidth>
68098              <access>read-only</access>
68099              <enumeratedValues>
68100                <enumeratedValue>
68101                  <name>0</name>
68102                  <description>Passive input filter is disabled on the corresponding pin.</description>
68103                  <value>#0</value>
68104                </enumeratedValue>
68105                <enumeratedValue>
68106                  <name>1</name>
68107                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
68108                  <value>#1</value>
68109                </enumeratedValue>
68110              </enumeratedValues>
68111            </field>
68112            <field>
68113              <name>ODE</name>
68114              <description>Open Drain Enable</description>
68115              <bitOffset>5</bitOffset>
68116              <bitWidth>1</bitWidth>
68117              <access>read-write</access>
68118              <enumeratedValues>
68119                <enumeratedValue>
68120                  <name>0</name>
68121                  <description>Open drain output is disabled on the corresponding pin.</description>
68122                  <value>#0</value>
68123                </enumeratedValue>
68124                <enumeratedValue>
68125                  <name>1</name>
68126                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
68127                  <value>#1</value>
68128                </enumeratedValue>
68129              </enumeratedValues>
68130            </field>
68131            <field>
68132              <name>DSE</name>
68133              <description>Drive Strength Enable</description>
68134              <bitOffset>6</bitOffset>
68135              <bitWidth>1</bitWidth>
68136              <access>read-only</access>
68137              <enumeratedValues>
68138                <enumeratedValue>
68139                  <name>0</name>
68140                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
68141                  <value>#0</value>
68142                </enumeratedValue>
68143                <enumeratedValue>
68144                  <name>1</name>
68145                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
68146                  <value>#1</value>
68147                </enumeratedValue>
68148              </enumeratedValues>
68149            </field>
68150            <field>
68151              <name>MUX</name>
68152              <description>Pin Mux Control</description>
68153              <bitOffset>8</bitOffset>
68154              <bitWidth>3</bitWidth>
68155              <access>read-write</access>
68156              <enumeratedValues>
68157                <enumeratedValue>
68158                  <name>000</name>
68159                  <description>Pin disabled (Alternative 0) (analog).</description>
68160                  <value>#000</value>
68161                </enumeratedValue>
68162                <enumeratedValue>
68163                  <name>001</name>
68164                  <description>Alternative 1 (GPIO).</description>
68165                  <value>#001</value>
68166                </enumeratedValue>
68167                <enumeratedValue>
68168                  <name>010</name>
68169                  <description>Alternative 2 (chip-specific).</description>
68170                  <value>#010</value>
68171                </enumeratedValue>
68172                <enumeratedValue>
68173                  <name>011</name>
68174                  <description>Alternative 3 (chip-specific).</description>
68175                  <value>#011</value>
68176                </enumeratedValue>
68177                <enumeratedValue>
68178                  <name>100</name>
68179                  <description>Alternative 4 (chip-specific).</description>
68180                  <value>#100</value>
68181                </enumeratedValue>
68182                <enumeratedValue>
68183                  <name>101</name>
68184                  <description>Alternative 5 (chip-specific).</description>
68185                  <value>#101</value>
68186                </enumeratedValue>
68187                <enumeratedValue>
68188                  <name>110</name>
68189                  <description>Alternative 6 (chip-specific).</description>
68190                  <value>#110</value>
68191                </enumeratedValue>
68192                <enumeratedValue>
68193                  <name>111</name>
68194                  <description>Alternative 7 (chip-specific).</description>
68195                  <value>#111</value>
68196                </enumeratedValue>
68197              </enumeratedValues>
68198            </field>
68199            <field>
68200              <name>LK</name>
68201              <description>Lock Register</description>
68202              <bitOffset>15</bitOffset>
68203              <bitWidth>1</bitWidth>
68204              <access>read-write</access>
68205              <enumeratedValues>
68206                <enumeratedValue>
68207                  <name>0</name>
68208                  <description>Pin Control Register fields [15:0] are not locked.</description>
68209                  <value>#0</value>
68210                </enumeratedValue>
68211                <enumeratedValue>
68212                  <name>1</name>
68213                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
68214                  <value>#1</value>
68215                </enumeratedValue>
68216              </enumeratedValues>
68217            </field>
68218            <field>
68219              <name>IRQC</name>
68220              <description>Interrupt Configuration</description>
68221              <bitOffset>16</bitOffset>
68222              <bitWidth>4</bitWidth>
68223              <access>read-write</access>
68224              <enumeratedValues>
68225                <enumeratedValue>
68226                  <name>0000</name>
68227                  <description>Interrupt Status Flag (ISF) is disabled.</description>
68228                  <value>#0000</value>
68229                </enumeratedValue>
68230                <enumeratedValue>
68231                  <name>0001</name>
68232                  <description>ISF flag and DMA request on rising edge.</description>
68233                  <value>#0001</value>
68234                </enumeratedValue>
68235                <enumeratedValue>
68236                  <name>0010</name>
68237                  <description>ISF flag and DMA request on falling edge.</description>
68238                  <value>#0010</value>
68239                </enumeratedValue>
68240                <enumeratedValue>
68241                  <name>0011</name>
68242                  <description>ISF flag and DMA request on either edge.</description>
68243                  <value>#0011</value>
68244                </enumeratedValue>
68245                <enumeratedValue>
68246                  <name>1000</name>
68247                  <description>ISF flag and Interrupt when logic 0.</description>
68248                  <value>#1000</value>
68249                </enumeratedValue>
68250                <enumeratedValue>
68251                  <name>1001</name>
68252                  <description>ISF flag and Interrupt on rising-edge.</description>
68253                  <value>#1001</value>
68254                </enumeratedValue>
68255                <enumeratedValue>
68256                  <name>1010</name>
68257                  <description>ISF flag and Interrupt on falling-edge.</description>
68258                  <value>#1010</value>
68259                </enumeratedValue>
68260                <enumeratedValue>
68261                  <name>1011</name>
68262                  <description>ISF flag and Interrupt on either edge.</description>
68263                  <value>#1011</value>
68264                </enumeratedValue>
68265                <enumeratedValue>
68266                  <name>1100</name>
68267                  <description>ISF flag and Interrupt when logic 1.</description>
68268                  <value>#1100</value>
68269                </enumeratedValue>
68270              </enumeratedValues>
68271            </field>
68272            <field>
68273              <name>ISF</name>
68274              <description>Interrupt Status Flag</description>
68275              <bitOffset>24</bitOffset>
68276              <bitWidth>1</bitWidth>
68277              <access>read-write</access>
68278              <enumeratedValues>
68279                <enumeratedValue>
68280                  <name>0</name>
68281                  <description>Configured interrupt is not detected.</description>
68282                  <value>#0</value>
68283                </enumeratedValue>
68284                <enumeratedValue>
68285                  <name>1</name>
68286                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
68287                  <value>#1</value>
68288                </enumeratedValue>
68289              </enumeratedValues>
68290            </field>
68291          </fields>
68292        </register>
68293        <register>
68294          <name>PCR6</name>
68295          <description>Pin Control Register n</description>
68296          <addressOffset>0x18</addressOffset>
68297          <size>32</size>
68298          <access>read-write</access>
68299          <resetValue>0</resetValue>
68300          <resetMask>0xFFFFFFFF</resetMask>
68301          <fields>
68302            <field>
68303              <name>PS</name>
68304              <description>Pull Select</description>
68305              <bitOffset>0</bitOffset>
68306              <bitWidth>1</bitWidth>
68307              <access>read-write</access>
68308              <enumeratedValues>
68309                <enumeratedValue>
68310                  <name>0</name>
68311                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
68312                  <value>#0</value>
68313                </enumeratedValue>
68314                <enumeratedValue>
68315                  <name>1</name>
68316                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
68317                  <value>#1</value>
68318                </enumeratedValue>
68319              </enumeratedValues>
68320            </field>
68321            <field>
68322              <name>PE</name>
68323              <description>Pull Enable</description>
68324              <bitOffset>1</bitOffset>
68325              <bitWidth>1</bitWidth>
68326              <access>read-write</access>
68327              <enumeratedValues>
68328                <enumeratedValue>
68329                  <name>0</name>
68330                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
68331                  <value>#0</value>
68332                </enumeratedValue>
68333                <enumeratedValue>
68334                  <name>1</name>
68335                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
68336                  <value>#1</value>
68337                </enumeratedValue>
68338              </enumeratedValues>
68339            </field>
68340            <field>
68341              <name>SRE</name>
68342              <description>Slew Rate Enable</description>
68343              <bitOffset>2</bitOffset>
68344              <bitWidth>1</bitWidth>
68345              <access>read-write</access>
68346              <enumeratedValues>
68347                <enumeratedValue>
68348                  <name>0</name>
68349                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
68350                  <value>#0</value>
68351                </enumeratedValue>
68352                <enumeratedValue>
68353                  <name>1</name>
68354                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
68355                  <value>#1</value>
68356                </enumeratedValue>
68357              </enumeratedValues>
68358            </field>
68359            <field>
68360              <name>PFE</name>
68361              <description>Passive Filter Enable</description>
68362              <bitOffset>4</bitOffset>
68363              <bitWidth>1</bitWidth>
68364              <access>read-only</access>
68365              <enumeratedValues>
68366                <enumeratedValue>
68367                  <name>0</name>
68368                  <description>Passive input filter is disabled on the corresponding pin.</description>
68369                  <value>#0</value>
68370                </enumeratedValue>
68371                <enumeratedValue>
68372                  <name>1</name>
68373                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
68374                  <value>#1</value>
68375                </enumeratedValue>
68376              </enumeratedValues>
68377            </field>
68378            <field>
68379              <name>ODE</name>
68380              <description>Open Drain Enable</description>
68381              <bitOffset>5</bitOffset>
68382              <bitWidth>1</bitWidth>
68383              <access>read-write</access>
68384              <enumeratedValues>
68385                <enumeratedValue>
68386                  <name>0</name>
68387                  <description>Open drain output is disabled on the corresponding pin.</description>
68388                  <value>#0</value>
68389                </enumeratedValue>
68390                <enumeratedValue>
68391                  <name>1</name>
68392                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
68393                  <value>#1</value>
68394                </enumeratedValue>
68395              </enumeratedValues>
68396            </field>
68397            <field>
68398              <name>DSE</name>
68399              <description>Drive Strength Enable</description>
68400              <bitOffset>6</bitOffset>
68401              <bitWidth>1</bitWidth>
68402              <access>read-only</access>
68403              <enumeratedValues>
68404                <enumeratedValue>
68405                  <name>0</name>
68406                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
68407                  <value>#0</value>
68408                </enumeratedValue>
68409                <enumeratedValue>
68410                  <name>1</name>
68411                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
68412                  <value>#1</value>
68413                </enumeratedValue>
68414              </enumeratedValues>
68415            </field>
68416            <field>
68417              <name>MUX</name>
68418              <description>Pin Mux Control</description>
68419              <bitOffset>8</bitOffset>
68420              <bitWidth>3</bitWidth>
68421              <access>read-write</access>
68422              <enumeratedValues>
68423                <enumeratedValue>
68424                  <name>000</name>
68425                  <description>Pin disabled (Alternative 0) (analog).</description>
68426                  <value>#000</value>
68427                </enumeratedValue>
68428                <enumeratedValue>
68429                  <name>001</name>
68430                  <description>Alternative 1 (GPIO).</description>
68431                  <value>#001</value>
68432                </enumeratedValue>
68433                <enumeratedValue>
68434                  <name>010</name>
68435                  <description>Alternative 2 (chip-specific).</description>
68436                  <value>#010</value>
68437                </enumeratedValue>
68438                <enumeratedValue>
68439                  <name>011</name>
68440                  <description>Alternative 3 (chip-specific).</description>
68441                  <value>#011</value>
68442                </enumeratedValue>
68443                <enumeratedValue>
68444                  <name>100</name>
68445                  <description>Alternative 4 (chip-specific).</description>
68446                  <value>#100</value>
68447                </enumeratedValue>
68448                <enumeratedValue>
68449                  <name>101</name>
68450                  <description>Alternative 5 (chip-specific).</description>
68451                  <value>#101</value>
68452                </enumeratedValue>
68453                <enumeratedValue>
68454                  <name>110</name>
68455                  <description>Alternative 6 (chip-specific).</description>
68456                  <value>#110</value>
68457                </enumeratedValue>
68458                <enumeratedValue>
68459                  <name>111</name>
68460                  <description>Alternative 7 (chip-specific).</description>
68461                  <value>#111</value>
68462                </enumeratedValue>
68463              </enumeratedValues>
68464            </field>
68465            <field>
68466              <name>LK</name>
68467              <description>Lock Register</description>
68468              <bitOffset>15</bitOffset>
68469              <bitWidth>1</bitWidth>
68470              <access>read-write</access>
68471              <enumeratedValues>
68472                <enumeratedValue>
68473                  <name>0</name>
68474                  <description>Pin Control Register fields [15:0] are not locked.</description>
68475                  <value>#0</value>
68476                </enumeratedValue>
68477                <enumeratedValue>
68478                  <name>1</name>
68479                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
68480                  <value>#1</value>
68481                </enumeratedValue>
68482              </enumeratedValues>
68483            </field>
68484            <field>
68485              <name>IRQC</name>
68486              <description>Interrupt Configuration</description>
68487              <bitOffset>16</bitOffset>
68488              <bitWidth>4</bitWidth>
68489              <access>read-write</access>
68490              <enumeratedValues>
68491                <enumeratedValue>
68492                  <name>0000</name>
68493                  <description>Interrupt Status Flag (ISF) is disabled.</description>
68494                  <value>#0000</value>
68495                </enumeratedValue>
68496                <enumeratedValue>
68497                  <name>0001</name>
68498                  <description>ISF flag and DMA request on rising edge.</description>
68499                  <value>#0001</value>
68500                </enumeratedValue>
68501                <enumeratedValue>
68502                  <name>0010</name>
68503                  <description>ISF flag and DMA request on falling edge.</description>
68504                  <value>#0010</value>
68505                </enumeratedValue>
68506                <enumeratedValue>
68507                  <name>0011</name>
68508                  <description>ISF flag and DMA request on either edge.</description>
68509                  <value>#0011</value>
68510                </enumeratedValue>
68511                <enumeratedValue>
68512                  <name>1000</name>
68513                  <description>ISF flag and Interrupt when logic 0.</description>
68514                  <value>#1000</value>
68515                </enumeratedValue>
68516                <enumeratedValue>
68517                  <name>1001</name>
68518                  <description>ISF flag and Interrupt on rising-edge.</description>
68519                  <value>#1001</value>
68520                </enumeratedValue>
68521                <enumeratedValue>
68522                  <name>1010</name>
68523                  <description>ISF flag and Interrupt on falling-edge.</description>
68524                  <value>#1010</value>
68525                </enumeratedValue>
68526                <enumeratedValue>
68527                  <name>1011</name>
68528                  <description>ISF flag and Interrupt on either edge.</description>
68529                  <value>#1011</value>
68530                </enumeratedValue>
68531                <enumeratedValue>
68532                  <name>1100</name>
68533                  <description>ISF flag and Interrupt when logic 1.</description>
68534                  <value>#1100</value>
68535                </enumeratedValue>
68536              </enumeratedValues>
68537            </field>
68538            <field>
68539              <name>ISF</name>
68540              <description>Interrupt Status Flag</description>
68541              <bitOffset>24</bitOffset>
68542              <bitWidth>1</bitWidth>
68543              <access>read-write</access>
68544              <enumeratedValues>
68545                <enumeratedValue>
68546                  <name>0</name>
68547                  <description>Configured interrupt is not detected.</description>
68548                  <value>#0</value>
68549                </enumeratedValue>
68550                <enumeratedValue>
68551                  <name>1</name>
68552                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
68553                  <value>#1</value>
68554                </enumeratedValue>
68555              </enumeratedValues>
68556            </field>
68557          </fields>
68558        </register>
68559        <register>
68560          <name>PCR7</name>
68561          <description>Pin Control Register n</description>
68562          <addressOffset>0x1C</addressOffset>
68563          <size>32</size>
68564          <access>read-write</access>
68565          <resetValue>0</resetValue>
68566          <resetMask>0xFFFFFFFF</resetMask>
68567          <fields>
68568            <field>
68569              <name>PS</name>
68570              <description>Pull Select</description>
68571              <bitOffset>0</bitOffset>
68572              <bitWidth>1</bitWidth>
68573              <access>read-write</access>
68574              <enumeratedValues>
68575                <enumeratedValue>
68576                  <name>0</name>
68577                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
68578                  <value>#0</value>
68579                </enumeratedValue>
68580                <enumeratedValue>
68581                  <name>1</name>
68582                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
68583                  <value>#1</value>
68584                </enumeratedValue>
68585              </enumeratedValues>
68586            </field>
68587            <field>
68588              <name>PE</name>
68589              <description>Pull Enable</description>
68590              <bitOffset>1</bitOffset>
68591              <bitWidth>1</bitWidth>
68592              <access>read-write</access>
68593              <enumeratedValues>
68594                <enumeratedValue>
68595                  <name>0</name>
68596                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
68597                  <value>#0</value>
68598                </enumeratedValue>
68599                <enumeratedValue>
68600                  <name>1</name>
68601                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
68602                  <value>#1</value>
68603                </enumeratedValue>
68604              </enumeratedValues>
68605            </field>
68606            <field>
68607              <name>SRE</name>
68608              <description>Slew Rate Enable</description>
68609              <bitOffset>2</bitOffset>
68610              <bitWidth>1</bitWidth>
68611              <access>read-write</access>
68612              <enumeratedValues>
68613                <enumeratedValue>
68614                  <name>0</name>
68615                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
68616                  <value>#0</value>
68617                </enumeratedValue>
68618                <enumeratedValue>
68619                  <name>1</name>
68620                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
68621                  <value>#1</value>
68622                </enumeratedValue>
68623              </enumeratedValues>
68624            </field>
68625            <field>
68626              <name>PFE</name>
68627              <description>Passive Filter Enable</description>
68628              <bitOffset>4</bitOffset>
68629              <bitWidth>1</bitWidth>
68630              <access>read-only</access>
68631              <enumeratedValues>
68632                <enumeratedValue>
68633                  <name>0</name>
68634                  <description>Passive input filter is disabled on the corresponding pin.</description>
68635                  <value>#0</value>
68636                </enumeratedValue>
68637                <enumeratedValue>
68638                  <name>1</name>
68639                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
68640                  <value>#1</value>
68641                </enumeratedValue>
68642              </enumeratedValues>
68643            </field>
68644            <field>
68645              <name>ODE</name>
68646              <description>Open Drain Enable</description>
68647              <bitOffset>5</bitOffset>
68648              <bitWidth>1</bitWidth>
68649              <access>read-write</access>
68650              <enumeratedValues>
68651                <enumeratedValue>
68652                  <name>0</name>
68653                  <description>Open drain output is disabled on the corresponding pin.</description>
68654                  <value>#0</value>
68655                </enumeratedValue>
68656                <enumeratedValue>
68657                  <name>1</name>
68658                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
68659                  <value>#1</value>
68660                </enumeratedValue>
68661              </enumeratedValues>
68662            </field>
68663            <field>
68664              <name>DSE</name>
68665              <description>Drive Strength Enable</description>
68666              <bitOffset>6</bitOffset>
68667              <bitWidth>1</bitWidth>
68668              <access>read-only</access>
68669              <enumeratedValues>
68670                <enumeratedValue>
68671                  <name>0</name>
68672                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
68673                  <value>#0</value>
68674                </enumeratedValue>
68675                <enumeratedValue>
68676                  <name>1</name>
68677                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
68678                  <value>#1</value>
68679                </enumeratedValue>
68680              </enumeratedValues>
68681            </field>
68682            <field>
68683              <name>MUX</name>
68684              <description>Pin Mux Control</description>
68685              <bitOffset>8</bitOffset>
68686              <bitWidth>3</bitWidth>
68687              <access>read-write</access>
68688              <enumeratedValues>
68689                <enumeratedValue>
68690                  <name>000</name>
68691                  <description>Pin disabled (Alternative 0) (analog).</description>
68692                  <value>#000</value>
68693                </enumeratedValue>
68694                <enumeratedValue>
68695                  <name>001</name>
68696                  <description>Alternative 1 (GPIO).</description>
68697                  <value>#001</value>
68698                </enumeratedValue>
68699                <enumeratedValue>
68700                  <name>010</name>
68701                  <description>Alternative 2 (chip-specific).</description>
68702                  <value>#010</value>
68703                </enumeratedValue>
68704                <enumeratedValue>
68705                  <name>011</name>
68706                  <description>Alternative 3 (chip-specific).</description>
68707                  <value>#011</value>
68708                </enumeratedValue>
68709                <enumeratedValue>
68710                  <name>100</name>
68711                  <description>Alternative 4 (chip-specific).</description>
68712                  <value>#100</value>
68713                </enumeratedValue>
68714                <enumeratedValue>
68715                  <name>101</name>
68716                  <description>Alternative 5 (chip-specific).</description>
68717                  <value>#101</value>
68718                </enumeratedValue>
68719                <enumeratedValue>
68720                  <name>110</name>
68721                  <description>Alternative 6 (chip-specific).</description>
68722                  <value>#110</value>
68723                </enumeratedValue>
68724                <enumeratedValue>
68725                  <name>111</name>
68726                  <description>Alternative 7 (chip-specific).</description>
68727                  <value>#111</value>
68728                </enumeratedValue>
68729              </enumeratedValues>
68730            </field>
68731            <field>
68732              <name>LK</name>
68733              <description>Lock Register</description>
68734              <bitOffset>15</bitOffset>
68735              <bitWidth>1</bitWidth>
68736              <access>read-write</access>
68737              <enumeratedValues>
68738                <enumeratedValue>
68739                  <name>0</name>
68740                  <description>Pin Control Register fields [15:0] are not locked.</description>
68741                  <value>#0</value>
68742                </enumeratedValue>
68743                <enumeratedValue>
68744                  <name>1</name>
68745                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
68746                  <value>#1</value>
68747                </enumeratedValue>
68748              </enumeratedValues>
68749            </field>
68750            <field>
68751              <name>IRQC</name>
68752              <description>Interrupt Configuration</description>
68753              <bitOffset>16</bitOffset>
68754              <bitWidth>4</bitWidth>
68755              <access>read-write</access>
68756              <enumeratedValues>
68757                <enumeratedValue>
68758                  <name>0000</name>
68759                  <description>Interrupt Status Flag (ISF) is disabled.</description>
68760                  <value>#0000</value>
68761                </enumeratedValue>
68762                <enumeratedValue>
68763                  <name>0001</name>
68764                  <description>ISF flag and DMA request on rising edge.</description>
68765                  <value>#0001</value>
68766                </enumeratedValue>
68767                <enumeratedValue>
68768                  <name>0010</name>
68769                  <description>ISF flag and DMA request on falling edge.</description>
68770                  <value>#0010</value>
68771                </enumeratedValue>
68772                <enumeratedValue>
68773                  <name>0011</name>
68774                  <description>ISF flag and DMA request on either edge.</description>
68775                  <value>#0011</value>
68776                </enumeratedValue>
68777                <enumeratedValue>
68778                  <name>1000</name>
68779                  <description>ISF flag and Interrupt when logic 0.</description>
68780                  <value>#1000</value>
68781                </enumeratedValue>
68782                <enumeratedValue>
68783                  <name>1001</name>
68784                  <description>ISF flag and Interrupt on rising-edge.</description>
68785                  <value>#1001</value>
68786                </enumeratedValue>
68787                <enumeratedValue>
68788                  <name>1010</name>
68789                  <description>ISF flag and Interrupt on falling-edge.</description>
68790                  <value>#1010</value>
68791                </enumeratedValue>
68792                <enumeratedValue>
68793                  <name>1011</name>
68794                  <description>ISF flag and Interrupt on either edge.</description>
68795                  <value>#1011</value>
68796                </enumeratedValue>
68797                <enumeratedValue>
68798                  <name>1100</name>
68799                  <description>ISF flag and Interrupt when logic 1.</description>
68800                  <value>#1100</value>
68801                </enumeratedValue>
68802              </enumeratedValues>
68803            </field>
68804            <field>
68805              <name>ISF</name>
68806              <description>Interrupt Status Flag</description>
68807              <bitOffset>24</bitOffset>
68808              <bitWidth>1</bitWidth>
68809              <access>read-write</access>
68810              <enumeratedValues>
68811                <enumeratedValue>
68812                  <name>0</name>
68813                  <description>Configured interrupt is not detected.</description>
68814                  <value>#0</value>
68815                </enumeratedValue>
68816                <enumeratedValue>
68817                  <name>1</name>
68818                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
68819                  <value>#1</value>
68820                </enumeratedValue>
68821              </enumeratedValues>
68822            </field>
68823          </fields>
68824        </register>
68825        <register>
68826          <name>PCR8</name>
68827          <description>Pin Control Register n</description>
68828          <addressOffset>0x20</addressOffset>
68829          <size>32</size>
68830          <access>read-write</access>
68831          <resetValue>0</resetValue>
68832          <resetMask>0xFFFFFFFF</resetMask>
68833          <fields>
68834            <field>
68835              <name>PS</name>
68836              <description>Pull Select</description>
68837              <bitOffset>0</bitOffset>
68838              <bitWidth>1</bitWidth>
68839              <access>read-write</access>
68840              <enumeratedValues>
68841                <enumeratedValue>
68842                  <name>0</name>
68843                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
68844                  <value>#0</value>
68845                </enumeratedValue>
68846                <enumeratedValue>
68847                  <name>1</name>
68848                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
68849                  <value>#1</value>
68850                </enumeratedValue>
68851              </enumeratedValues>
68852            </field>
68853            <field>
68854              <name>PE</name>
68855              <description>Pull Enable</description>
68856              <bitOffset>1</bitOffset>
68857              <bitWidth>1</bitWidth>
68858              <access>read-write</access>
68859              <enumeratedValues>
68860                <enumeratedValue>
68861                  <name>0</name>
68862                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
68863                  <value>#0</value>
68864                </enumeratedValue>
68865                <enumeratedValue>
68866                  <name>1</name>
68867                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
68868                  <value>#1</value>
68869                </enumeratedValue>
68870              </enumeratedValues>
68871            </field>
68872            <field>
68873              <name>SRE</name>
68874              <description>Slew Rate Enable</description>
68875              <bitOffset>2</bitOffset>
68876              <bitWidth>1</bitWidth>
68877              <access>read-write</access>
68878              <enumeratedValues>
68879                <enumeratedValue>
68880                  <name>0</name>
68881                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
68882                  <value>#0</value>
68883                </enumeratedValue>
68884                <enumeratedValue>
68885                  <name>1</name>
68886                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
68887                  <value>#1</value>
68888                </enumeratedValue>
68889              </enumeratedValues>
68890            </field>
68891            <field>
68892              <name>PFE</name>
68893              <description>Passive Filter Enable</description>
68894              <bitOffset>4</bitOffset>
68895              <bitWidth>1</bitWidth>
68896              <access>read-only</access>
68897              <enumeratedValues>
68898                <enumeratedValue>
68899                  <name>0</name>
68900                  <description>Passive input filter is disabled on the corresponding pin.</description>
68901                  <value>#0</value>
68902                </enumeratedValue>
68903                <enumeratedValue>
68904                  <name>1</name>
68905                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
68906                  <value>#1</value>
68907                </enumeratedValue>
68908              </enumeratedValues>
68909            </field>
68910            <field>
68911              <name>ODE</name>
68912              <description>Open Drain Enable</description>
68913              <bitOffset>5</bitOffset>
68914              <bitWidth>1</bitWidth>
68915              <access>read-write</access>
68916              <enumeratedValues>
68917                <enumeratedValue>
68918                  <name>0</name>
68919                  <description>Open drain output is disabled on the corresponding pin.</description>
68920                  <value>#0</value>
68921                </enumeratedValue>
68922                <enumeratedValue>
68923                  <name>1</name>
68924                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
68925                  <value>#1</value>
68926                </enumeratedValue>
68927              </enumeratedValues>
68928            </field>
68929            <field>
68930              <name>DSE</name>
68931              <description>Drive Strength Enable</description>
68932              <bitOffset>6</bitOffset>
68933              <bitWidth>1</bitWidth>
68934              <access>read-only</access>
68935              <enumeratedValues>
68936                <enumeratedValue>
68937                  <name>0</name>
68938                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
68939                  <value>#0</value>
68940                </enumeratedValue>
68941                <enumeratedValue>
68942                  <name>1</name>
68943                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
68944                  <value>#1</value>
68945                </enumeratedValue>
68946              </enumeratedValues>
68947            </field>
68948            <field>
68949              <name>MUX</name>
68950              <description>Pin Mux Control</description>
68951              <bitOffset>8</bitOffset>
68952              <bitWidth>3</bitWidth>
68953              <access>read-write</access>
68954              <enumeratedValues>
68955                <enumeratedValue>
68956                  <name>000</name>
68957                  <description>Pin disabled (Alternative 0) (analog).</description>
68958                  <value>#000</value>
68959                </enumeratedValue>
68960                <enumeratedValue>
68961                  <name>001</name>
68962                  <description>Alternative 1 (GPIO).</description>
68963                  <value>#001</value>
68964                </enumeratedValue>
68965                <enumeratedValue>
68966                  <name>010</name>
68967                  <description>Alternative 2 (chip-specific).</description>
68968                  <value>#010</value>
68969                </enumeratedValue>
68970                <enumeratedValue>
68971                  <name>011</name>
68972                  <description>Alternative 3 (chip-specific).</description>
68973                  <value>#011</value>
68974                </enumeratedValue>
68975                <enumeratedValue>
68976                  <name>100</name>
68977                  <description>Alternative 4 (chip-specific).</description>
68978                  <value>#100</value>
68979                </enumeratedValue>
68980                <enumeratedValue>
68981                  <name>101</name>
68982                  <description>Alternative 5 (chip-specific).</description>
68983                  <value>#101</value>
68984                </enumeratedValue>
68985                <enumeratedValue>
68986                  <name>110</name>
68987                  <description>Alternative 6 (chip-specific).</description>
68988                  <value>#110</value>
68989                </enumeratedValue>
68990                <enumeratedValue>
68991                  <name>111</name>
68992                  <description>Alternative 7 (chip-specific).</description>
68993                  <value>#111</value>
68994                </enumeratedValue>
68995              </enumeratedValues>
68996            </field>
68997            <field>
68998              <name>LK</name>
68999              <description>Lock Register</description>
69000              <bitOffset>15</bitOffset>
69001              <bitWidth>1</bitWidth>
69002              <access>read-write</access>
69003              <enumeratedValues>
69004                <enumeratedValue>
69005                  <name>0</name>
69006                  <description>Pin Control Register fields [15:0] are not locked.</description>
69007                  <value>#0</value>
69008                </enumeratedValue>
69009                <enumeratedValue>
69010                  <name>1</name>
69011                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
69012                  <value>#1</value>
69013                </enumeratedValue>
69014              </enumeratedValues>
69015            </field>
69016            <field>
69017              <name>IRQC</name>
69018              <description>Interrupt Configuration</description>
69019              <bitOffset>16</bitOffset>
69020              <bitWidth>4</bitWidth>
69021              <access>read-write</access>
69022              <enumeratedValues>
69023                <enumeratedValue>
69024                  <name>0000</name>
69025                  <description>Interrupt Status Flag (ISF) is disabled.</description>
69026                  <value>#0000</value>
69027                </enumeratedValue>
69028                <enumeratedValue>
69029                  <name>0001</name>
69030                  <description>ISF flag and DMA request on rising edge.</description>
69031                  <value>#0001</value>
69032                </enumeratedValue>
69033                <enumeratedValue>
69034                  <name>0010</name>
69035                  <description>ISF flag and DMA request on falling edge.</description>
69036                  <value>#0010</value>
69037                </enumeratedValue>
69038                <enumeratedValue>
69039                  <name>0011</name>
69040                  <description>ISF flag and DMA request on either edge.</description>
69041                  <value>#0011</value>
69042                </enumeratedValue>
69043                <enumeratedValue>
69044                  <name>1000</name>
69045                  <description>ISF flag and Interrupt when logic 0.</description>
69046                  <value>#1000</value>
69047                </enumeratedValue>
69048                <enumeratedValue>
69049                  <name>1001</name>
69050                  <description>ISF flag and Interrupt on rising-edge.</description>
69051                  <value>#1001</value>
69052                </enumeratedValue>
69053                <enumeratedValue>
69054                  <name>1010</name>
69055                  <description>ISF flag and Interrupt on falling-edge.</description>
69056                  <value>#1010</value>
69057                </enumeratedValue>
69058                <enumeratedValue>
69059                  <name>1011</name>
69060                  <description>ISF flag and Interrupt on either edge.</description>
69061                  <value>#1011</value>
69062                </enumeratedValue>
69063                <enumeratedValue>
69064                  <name>1100</name>
69065                  <description>ISF flag and Interrupt when logic 1.</description>
69066                  <value>#1100</value>
69067                </enumeratedValue>
69068              </enumeratedValues>
69069            </field>
69070            <field>
69071              <name>ISF</name>
69072              <description>Interrupt Status Flag</description>
69073              <bitOffset>24</bitOffset>
69074              <bitWidth>1</bitWidth>
69075              <access>read-write</access>
69076              <enumeratedValues>
69077                <enumeratedValue>
69078                  <name>0</name>
69079                  <description>Configured interrupt is not detected.</description>
69080                  <value>#0</value>
69081                </enumeratedValue>
69082                <enumeratedValue>
69083                  <name>1</name>
69084                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
69085                  <value>#1</value>
69086                </enumeratedValue>
69087              </enumeratedValues>
69088            </field>
69089          </fields>
69090        </register>
69091        <register>
69092          <name>PCR9</name>
69093          <description>Pin Control Register n</description>
69094          <addressOffset>0x24</addressOffset>
69095          <size>32</size>
69096          <access>read-write</access>
69097          <resetValue>0</resetValue>
69098          <resetMask>0xFFFFFFFF</resetMask>
69099          <fields>
69100            <field>
69101              <name>PS</name>
69102              <description>Pull Select</description>
69103              <bitOffset>0</bitOffset>
69104              <bitWidth>1</bitWidth>
69105              <access>read-write</access>
69106              <enumeratedValues>
69107                <enumeratedValue>
69108                  <name>0</name>
69109                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
69110                  <value>#0</value>
69111                </enumeratedValue>
69112                <enumeratedValue>
69113                  <name>1</name>
69114                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
69115                  <value>#1</value>
69116                </enumeratedValue>
69117              </enumeratedValues>
69118            </field>
69119            <field>
69120              <name>PE</name>
69121              <description>Pull Enable</description>
69122              <bitOffset>1</bitOffset>
69123              <bitWidth>1</bitWidth>
69124              <access>read-write</access>
69125              <enumeratedValues>
69126                <enumeratedValue>
69127                  <name>0</name>
69128                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
69129                  <value>#0</value>
69130                </enumeratedValue>
69131                <enumeratedValue>
69132                  <name>1</name>
69133                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
69134                  <value>#1</value>
69135                </enumeratedValue>
69136              </enumeratedValues>
69137            </field>
69138            <field>
69139              <name>SRE</name>
69140              <description>Slew Rate Enable</description>
69141              <bitOffset>2</bitOffset>
69142              <bitWidth>1</bitWidth>
69143              <access>read-write</access>
69144              <enumeratedValues>
69145                <enumeratedValue>
69146                  <name>0</name>
69147                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
69148                  <value>#0</value>
69149                </enumeratedValue>
69150                <enumeratedValue>
69151                  <name>1</name>
69152                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
69153                  <value>#1</value>
69154                </enumeratedValue>
69155              </enumeratedValues>
69156            </field>
69157            <field>
69158              <name>PFE</name>
69159              <description>Passive Filter Enable</description>
69160              <bitOffset>4</bitOffset>
69161              <bitWidth>1</bitWidth>
69162              <access>read-only</access>
69163              <enumeratedValues>
69164                <enumeratedValue>
69165                  <name>0</name>
69166                  <description>Passive input filter is disabled on the corresponding pin.</description>
69167                  <value>#0</value>
69168                </enumeratedValue>
69169                <enumeratedValue>
69170                  <name>1</name>
69171                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
69172                  <value>#1</value>
69173                </enumeratedValue>
69174              </enumeratedValues>
69175            </field>
69176            <field>
69177              <name>ODE</name>
69178              <description>Open Drain Enable</description>
69179              <bitOffset>5</bitOffset>
69180              <bitWidth>1</bitWidth>
69181              <access>read-write</access>
69182              <enumeratedValues>
69183                <enumeratedValue>
69184                  <name>0</name>
69185                  <description>Open drain output is disabled on the corresponding pin.</description>
69186                  <value>#0</value>
69187                </enumeratedValue>
69188                <enumeratedValue>
69189                  <name>1</name>
69190                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
69191                  <value>#1</value>
69192                </enumeratedValue>
69193              </enumeratedValues>
69194            </field>
69195            <field>
69196              <name>DSE</name>
69197              <description>Drive Strength Enable</description>
69198              <bitOffset>6</bitOffset>
69199              <bitWidth>1</bitWidth>
69200              <access>read-only</access>
69201              <enumeratedValues>
69202                <enumeratedValue>
69203                  <name>0</name>
69204                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
69205                  <value>#0</value>
69206                </enumeratedValue>
69207                <enumeratedValue>
69208                  <name>1</name>
69209                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
69210                  <value>#1</value>
69211                </enumeratedValue>
69212              </enumeratedValues>
69213            </field>
69214            <field>
69215              <name>MUX</name>
69216              <description>Pin Mux Control</description>
69217              <bitOffset>8</bitOffset>
69218              <bitWidth>3</bitWidth>
69219              <access>read-write</access>
69220              <enumeratedValues>
69221                <enumeratedValue>
69222                  <name>000</name>
69223                  <description>Pin disabled (Alternative 0) (analog).</description>
69224                  <value>#000</value>
69225                </enumeratedValue>
69226                <enumeratedValue>
69227                  <name>001</name>
69228                  <description>Alternative 1 (GPIO).</description>
69229                  <value>#001</value>
69230                </enumeratedValue>
69231                <enumeratedValue>
69232                  <name>010</name>
69233                  <description>Alternative 2 (chip-specific).</description>
69234                  <value>#010</value>
69235                </enumeratedValue>
69236                <enumeratedValue>
69237                  <name>011</name>
69238                  <description>Alternative 3 (chip-specific).</description>
69239                  <value>#011</value>
69240                </enumeratedValue>
69241                <enumeratedValue>
69242                  <name>100</name>
69243                  <description>Alternative 4 (chip-specific).</description>
69244                  <value>#100</value>
69245                </enumeratedValue>
69246                <enumeratedValue>
69247                  <name>101</name>
69248                  <description>Alternative 5 (chip-specific).</description>
69249                  <value>#101</value>
69250                </enumeratedValue>
69251                <enumeratedValue>
69252                  <name>110</name>
69253                  <description>Alternative 6 (chip-specific).</description>
69254                  <value>#110</value>
69255                </enumeratedValue>
69256                <enumeratedValue>
69257                  <name>111</name>
69258                  <description>Alternative 7 (chip-specific).</description>
69259                  <value>#111</value>
69260                </enumeratedValue>
69261              </enumeratedValues>
69262            </field>
69263            <field>
69264              <name>LK</name>
69265              <description>Lock Register</description>
69266              <bitOffset>15</bitOffset>
69267              <bitWidth>1</bitWidth>
69268              <access>read-write</access>
69269              <enumeratedValues>
69270                <enumeratedValue>
69271                  <name>0</name>
69272                  <description>Pin Control Register fields [15:0] are not locked.</description>
69273                  <value>#0</value>
69274                </enumeratedValue>
69275                <enumeratedValue>
69276                  <name>1</name>
69277                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
69278                  <value>#1</value>
69279                </enumeratedValue>
69280              </enumeratedValues>
69281            </field>
69282            <field>
69283              <name>IRQC</name>
69284              <description>Interrupt Configuration</description>
69285              <bitOffset>16</bitOffset>
69286              <bitWidth>4</bitWidth>
69287              <access>read-write</access>
69288              <enumeratedValues>
69289                <enumeratedValue>
69290                  <name>0000</name>
69291                  <description>Interrupt Status Flag (ISF) is disabled.</description>
69292                  <value>#0000</value>
69293                </enumeratedValue>
69294                <enumeratedValue>
69295                  <name>0001</name>
69296                  <description>ISF flag and DMA request on rising edge.</description>
69297                  <value>#0001</value>
69298                </enumeratedValue>
69299                <enumeratedValue>
69300                  <name>0010</name>
69301                  <description>ISF flag and DMA request on falling edge.</description>
69302                  <value>#0010</value>
69303                </enumeratedValue>
69304                <enumeratedValue>
69305                  <name>0011</name>
69306                  <description>ISF flag and DMA request on either edge.</description>
69307                  <value>#0011</value>
69308                </enumeratedValue>
69309                <enumeratedValue>
69310                  <name>1000</name>
69311                  <description>ISF flag and Interrupt when logic 0.</description>
69312                  <value>#1000</value>
69313                </enumeratedValue>
69314                <enumeratedValue>
69315                  <name>1001</name>
69316                  <description>ISF flag and Interrupt on rising-edge.</description>
69317                  <value>#1001</value>
69318                </enumeratedValue>
69319                <enumeratedValue>
69320                  <name>1010</name>
69321                  <description>ISF flag and Interrupt on falling-edge.</description>
69322                  <value>#1010</value>
69323                </enumeratedValue>
69324                <enumeratedValue>
69325                  <name>1011</name>
69326                  <description>ISF flag and Interrupt on either edge.</description>
69327                  <value>#1011</value>
69328                </enumeratedValue>
69329                <enumeratedValue>
69330                  <name>1100</name>
69331                  <description>ISF flag and Interrupt when logic 1.</description>
69332                  <value>#1100</value>
69333                </enumeratedValue>
69334              </enumeratedValues>
69335            </field>
69336            <field>
69337              <name>ISF</name>
69338              <description>Interrupt Status Flag</description>
69339              <bitOffset>24</bitOffset>
69340              <bitWidth>1</bitWidth>
69341              <access>read-write</access>
69342              <enumeratedValues>
69343                <enumeratedValue>
69344                  <name>0</name>
69345                  <description>Configured interrupt is not detected.</description>
69346                  <value>#0</value>
69347                </enumeratedValue>
69348                <enumeratedValue>
69349                  <name>1</name>
69350                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
69351                  <value>#1</value>
69352                </enumeratedValue>
69353              </enumeratedValues>
69354            </field>
69355          </fields>
69356        </register>
69357        <register>
69358          <name>PCR10</name>
69359          <description>Pin Control Register n</description>
69360          <addressOffset>0x28</addressOffset>
69361          <size>32</size>
69362          <access>read-write</access>
69363          <resetValue>0</resetValue>
69364          <resetMask>0xFFFFFFFF</resetMask>
69365          <fields>
69366            <field>
69367              <name>PS</name>
69368              <description>Pull Select</description>
69369              <bitOffset>0</bitOffset>
69370              <bitWidth>1</bitWidth>
69371              <access>read-write</access>
69372              <enumeratedValues>
69373                <enumeratedValue>
69374                  <name>0</name>
69375                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
69376                  <value>#0</value>
69377                </enumeratedValue>
69378                <enumeratedValue>
69379                  <name>1</name>
69380                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
69381                  <value>#1</value>
69382                </enumeratedValue>
69383              </enumeratedValues>
69384            </field>
69385            <field>
69386              <name>PE</name>
69387              <description>Pull Enable</description>
69388              <bitOffset>1</bitOffset>
69389              <bitWidth>1</bitWidth>
69390              <access>read-write</access>
69391              <enumeratedValues>
69392                <enumeratedValue>
69393                  <name>0</name>
69394                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
69395                  <value>#0</value>
69396                </enumeratedValue>
69397                <enumeratedValue>
69398                  <name>1</name>
69399                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
69400                  <value>#1</value>
69401                </enumeratedValue>
69402              </enumeratedValues>
69403            </field>
69404            <field>
69405              <name>SRE</name>
69406              <description>Slew Rate Enable</description>
69407              <bitOffset>2</bitOffset>
69408              <bitWidth>1</bitWidth>
69409              <access>read-write</access>
69410              <enumeratedValues>
69411                <enumeratedValue>
69412                  <name>0</name>
69413                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
69414                  <value>#0</value>
69415                </enumeratedValue>
69416                <enumeratedValue>
69417                  <name>1</name>
69418                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
69419                  <value>#1</value>
69420                </enumeratedValue>
69421              </enumeratedValues>
69422            </field>
69423            <field>
69424              <name>PFE</name>
69425              <description>Passive Filter Enable</description>
69426              <bitOffset>4</bitOffset>
69427              <bitWidth>1</bitWidth>
69428              <access>read-only</access>
69429              <enumeratedValues>
69430                <enumeratedValue>
69431                  <name>0</name>
69432                  <description>Passive input filter is disabled on the corresponding pin.</description>
69433                  <value>#0</value>
69434                </enumeratedValue>
69435                <enumeratedValue>
69436                  <name>1</name>
69437                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
69438                  <value>#1</value>
69439                </enumeratedValue>
69440              </enumeratedValues>
69441            </field>
69442            <field>
69443              <name>ODE</name>
69444              <description>Open Drain Enable</description>
69445              <bitOffset>5</bitOffset>
69446              <bitWidth>1</bitWidth>
69447              <access>read-write</access>
69448              <enumeratedValues>
69449                <enumeratedValue>
69450                  <name>0</name>
69451                  <description>Open drain output is disabled on the corresponding pin.</description>
69452                  <value>#0</value>
69453                </enumeratedValue>
69454                <enumeratedValue>
69455                  <name>1</name>
69456                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
69457                  <value>#1</value>
69458                </enumeratedValue>
69459              </enumeratedValues>
69460            </field>
69461            <field>
69462              <name>DSE</name>
69463              <description>Drive Strength Enable</description>
69464              <bitOffset>6</bitOffset>
69465              <bitWidth>1</bitWidth>
69466              <access>read-only</access>
69467              <enumeratedValues>
69468                <enumeratedValue>
69469                  <name>0</name>
69470                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
69471                  <value>#0</value>
69472                </enumeratedValue>
69473                <enumeratedValue>
69474                  <name>1</name>
69475                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
69476                  <value>#1</value>
69477                </enumeratedValue>
69478              </enumeratedValues>
69479            </field>
69480            <field>
69481              <name>MUX</name>
69482              <description>Pin Mux Control</description>
69483              <bitOffset>8</bitOffset>
69484              <bitWidth>3</bitWidth>
69485              <access>read-write</access>
69486              <enumeratedValues>
69487                <enumeratedValue>
69488                  <name>000</name>
69489                  <description>Pin disabled (Alternative 0) (analog).</description>
69490                  <value>#000</value>
69491                </enumeratedValue>
69492                <enumeratedValue>
69493                  <name>001</name>
69494                  <description>Alternative 1 (GPIO).</description>
69495                  <value>#001</value>
69496                </enumeratedValue>
69497                <enumeratedValue>
69498                  <name>010</name>
69499                  <description>Alternative 2 (chip-specific).</description>
69500                  <value>#010</value>
69501                </enumeratedValue>
69502                <enumeratedValue>
69503                  <name>011</name>
69504                  <description>Alternative 3 (chip-specific).</description>
69505                  <value>#011</value>
69506                </enumeratedValue>
69507                <enumeratedValue>
69508                  <name>100</name>
69509                  <description>Alternative 4 (chip-specific).</description>
69510                  <value>#100</value>
69511                </enumeratedValue>
69512                <enumeratedValue>
69513                  <name>101</name>
69514                  <description>Alternative 5 (chip-specific).</description>
69515                  <value>#101</value>
69516                </enumeratedValue>
69517                <enumeratedValue>
69518                  <name>110</name>
69519                  <description>Alternative 6 (chip-specific).</description>
69520                  <value>#110</value>
69521                </enumeratedValue>
69522                <enumeratedValue>
69523                  <name>111</name>
69524                  <description>Alternative 7 (chip-specific).</description>
69525                  <value>#111</value>
69526                </enumeratedValue>
69527              </enumeratedValues>
69528            </field>
69529            <field>
69530              <name>LK</name>
69531              <description>Lock Register</description>
69532              <bitOffset>15</bitOffset>
69533              <bitWidth>1</bitWidth>
69534              <access>read-write</access>
69535              <enumeratedValues>
69536                <enumeratedValue>
69537                  <name>0</name>
69538                  <description>Pin Control Register fields [15:0] are not locked.</description>
69539                  <value>#0</value>
69540                </enumeratedValue>
69541                <enumeratedValue>
69542                  <name>1</name>
69543                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
69544                  <value>#1</value>
69545                </enumeratedValue>
69546              </enumeratedValues>
69547            </field>
69548            <field>
69549              <name>IRQC</name>
69550              <description>Interrupt Configuration</description>
69551              <bitOffset>16</bitOffset>
69552              <bitWidth>4</bitWidth>
69553              <access>read-write</access>
69554              <enumeratedValues>
69555                <enumeratedValue>
69556                  <name>0000</name>
69557                  <description>Interrupt Status Flag (ISF) is disabled.</description>
69558                  <value>#0000</value>
69559                </enumeratedValue>
69560                <enumeratedValue>
69561                  <name>0001</name>
69562                  <description>ISF flag and DMA request on rising edge.</description>
69563                  <value>#0001</value>
69564                </enumeratedValue>
69565                <enumeratedValue>
69566                  <name>0010</name>
69567                  <description>ISF flag and DMA request on falling edge.</description>
69568                  <value>#0010</value>
69569                </enumeratedValue>
69570                <enumeratedValue>
69571                  <name>0011</name>
69572                  <description>ISF flag and DMA request on either edge.</description>
69573                  <value>#0011</value>
69574                </enumeratedValue>
69575                <enumeratedValue>
69576                  <name>1000</name>
69577                  <description>ISF flag and Interrupt when logic 0.</description>
69578                  <value>#1000</value>
69579                </enumeratedValue>
69580                <enumeratedValue>
69581                  <name>1001</name>
69582                  <description>ISF flag and Interrupt on rising-edge.</description>
69583                  <value>#1001</value>
69584                </enumeratedValue>
69585                <enumeratedValue>
69586                  <name>1010</name>
69587                  <description>ISF flag and Interrupt on falling-edge.</description>
69588                  <value>#1010</value>
69589                </enumeratedValue>
69590                <enumeratedValue>
69591                  <name>1011</name>
69592                  <description>ISF flag and Interrupt on either edge.</description>
69593                  <value>#1011</value>
69594                </enumeratedValue>
69595                <enumeratedValue>
69596                  <name>1100</name>
69597                  <description>ISF flag and Interrupt when logic 1.</description>
69598                  <value>#1100</value>
69599                </enumeratedValue>
69600              </enumeratedValues>
69601            </field>
69602            <field>
69603              <name>ISF</name>
69604              <description>Interrupt Status Flag</description>
69605              <bitOffset>24</bitOffset>
69606              <bitWidth>1</bitWidth>
69607              <access>read-write</access>
69608              <enumeratedValues>
69609                <enumeratedValue>
69610                  <name>0</name>
69611                  <description>Configured interrupt is not detected.</description>
69612                  <value>#0</value>
69613                </enumeratedValue>
69614                <enumeratedValue>
69615                  <name>1</name>
69616                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
69617                  <value>#1</value>
69618                </enumeratedValue>
69619              </enumeratedValues>
69620            </field>
69621          </fields>
69622        </register>
69623        <register>
69624          <name>PCR11</name>
69625          <description>Pin Control Register n</description>
69626          <addressOffset>0x2C</addressOffset>
69627          <size>32</size>
69628          <access>read-write</access>
69629          <resetValue>0</resetValue>
69630          <resetMask>0xFFFFFFFF</resetMask>
69631          <fields>
69632            <field>
69633              <name>PS</name>
69634              <description>Pull Select</description>
69635              <bitOffset>0</bitOffset>
69636              <bitWidth>1</bitWidth>
69637              <access>read-write</access>
69638              <enumeratedValues>
69639                <enumeratedValue>
69640                  <name>0</name>
69641                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
69642                  <value>#0</value>
69643                </enumeratedValue>
69644                <enumeratedValue>
69645                  <name>1</name>
69646                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
69647                  <value>#1</value>
69648                </enumeratedValue>
69649              </enumeratedValues>
69650            </field>
69651            <field>
69652              <name>PE</name>
69653              <description>Pull Enable</description>
69654              <bitOffset>1</bitOffset>
69655              <bitWidth>1</bitWidth>
69656              <access>read-write</access>
69657              <enumeratedValues>
69658                <enumeratedValue>
69659                  <name>0</name>
69660                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
69661                  <value>#0</value>
69662                </enumeratedValue>
69663                <enumeratedValue>
69664                  <name>1</name>
69665                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
69666                  <value>#1</value>
69667                </enumeratedValue>
69668              </enumeratedValues>
69669            </field>
69670            <field>
69671              <name>SRE</name>
69672              <description>Slew Rate Enable</description>
69673              <bitOffset>2</bitOffset>
69674              <bitWidth>1</bitWidth>
69675              <access>read-write</access>
69676              <enumeratedValues>
69677                <enumeratedValue>
69678                  <name>0</name>
69679                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
69680                  <value>#0</value>
69681                </enumeratedValue>
69682                <enumeratedValue>
69683                  <name>1</name>
69684                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
69685                  <value>#1</value>
69686                </enumeratedValue>
69687              </enumeratedValues>
69688            </field>
69689            <field>
69690              <name>PFE</name>
69691              <description>Passive Filter Enable</description>
69692              <bitOffset>4</bitOffset>
69693              <bitWidth>1</bitWidth>
69694              <access>read-only</access>
69695              <enumeratedValues>
69696                <enumeratedValue>
69697                  <name>0</name>
69698                  <description>Passive input filter is disabled on the corresponding pin.</description>
69699                  <value>#0</value>
69700                </enumeratedValue>
69701                <enumeratedValue>
69702                  <name>1</name>
69703                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
69704                  <value>#1</value>
69705                </enumeratedValue>
69706              </enumeratedValues>
69707            </field>
69708            <field>
69709              <name>ODE</name>
69710              <description>Open Drain Enable</description>
69711              <bitOffset>5</bitOffset>
69712              <bitWidth>1</bitWidth>
69713              <access>read-write</access>
69714              <enumeratedValues>
69715                <enumeratedValue>
69716                  <name>0</name>
69717                  <description>Open drain output is disabled on the corresponding pin.</description>
69718                  <value>#0</value>
69719                </enumeratedValue>
69720                <enumeratedValue>
69721                  <name>1</name>
69722                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
69723                  <value>#1</value>
69724                </enumeratedValue>
69725              </enumeratedValues>
69726            </field>
69727            <field>
69728              <name>DSE</name>
69729              <description>Drive Strength Enable</description>
69730              <bitOffset>6</bitOffset>
69731              <bitWidth>1</bitWidth>
69732              <access>read-only</access>
69733              <enumeratedValues>
69734                <enumeratedValue>
69735                  <name>0</name>
69736                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
69737                  <value>#0</value>
69738                </enumeratedValue>
69739                <enumeratedValue>
69740                  <name>1</name>
69741                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
69742                  <value>#1</value>
69743                </enumeratedValue>
69744              </enumeratedValues>
69745            </field>
69746            <field>
69747              <name>MUX</name>
69748              <description>Pin Mux Control</description>
69749              <bitOffset>8</bitOffset>
69750              <bitWidth>3</bitWidth>
69751              <access>read-write</access>
69752              <enumeratedValues>
69753                <enumeratedValue>
69754                  <name>000</name>
69755                  <description>Pin disabled (Alternative 0) (analog).</description>
69756                  <value>#000</value>
69757                </enumeratedValue>
69758                <enumeratedValue>
69759                  <name>001</name>
69760                  <description>Alternative 1 (GPIO).</description>
69761                  <value>#001</value>
69762                </enumeratedValue>
69763                <enumeratedValue>
69764                  <name>010</name>
69765                  <description>Alternative 2 (chip-specific).</description>
69766                  <value>#010</value>
69767                </enumeratedValue>
69768                <enumeratedValue>
69769                  <name>011</name>
69770                  <description>Alternative 3 (chip-specific).</description>
69771                  <value>#011</value>
69772                </enumeratedValue>
69773                <enumeratedValue>
69774                  <name>100</name>
69775                  <description>Alternative 4 (chip-specific).</description>
69776                  <value>#100</value>
69777                </enumeratedValue>
69778                <enumeratedValue>
69779                  <name>101</name>
69780                  <description>Alternative 5 (chip-specific).</description>
69781                  <value>#101</value>
69782                </enumeratedValue>
69783                <enumeratedValue>
69784                  <name>110</name>
69785                  <description>Alternative 6 (chip-specific).</description>
69786                  <value>#110</value>
69787                </enumeratedValue>
69788                <enumeratedValue>
69789                  <name>111</name>
69790                  <description>Alternative 7 (chip-specific).</description>
69791                  <value>#111</value>
69792                </enumeratedValue>
69793              </enumeratedValues>
69794            </field>
69795            <field>
69796              <name>LK</name>
69797              <description>Lock Register</description>
69798              <bitOffset>15</bitOffset>
69799              <bitWidth>1</bitWidth>
69800              <access>read-write</access>
69801              <enumeratedValues>
69802                <enumeratedValue>
69803                  <name>0</name>
69804                  <description>Pin Control Register fields [15:0] are not locked.</description>
69805                  <value>#0</value>
69806                </enumeratedValue>
69807                <enumeratedValue>
69808                  <name>1</name>
69809                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
69810                  <value>#1</value>
69811                </enumeratedValue>
69812              </enumeratedValues>
69813            </field>
69814            <field>
69815              <name>IRQC</name>
69816              <description>Interrupt Configuration</description>
69817              <bitOffset>16</bitOffset>
69818              <bitWidth>4</bitWidth>
69819              <access>read-write</access>
69820              <enumeratedValues>
69821                <enumeratedValue>
69822                  <name>0000</name>
69823                  <description>Interrupt Status Flag (ISF) is disabled.</description>
69824                  <value>#0000</value>
69825                </enumeratedValue>
69826                <enumeratedValue>
69827                  <name>0001</name>
69828                  <description>ISF flag and DMA request on rising edge.</description>
69829                  <value>#0001</value>
69830                </enumeratedValue>
69831                <enumeratedValue>
69832                  <name>0010</name>
69833                  <description>ISF flag and DMA request on falling edge.</description>
69834                  <value>#0010</value>
69835                </enumeratedValue>
69836                <enumeratedValue>
69837                  <name>0011</name>
69838                  <description>ISF flag and DMA request on either edge.</description>
69839                  <value>#0011</value>
69840                </enumeratedValue>
69841                <enumeratedValue>
69842                  <name>1000</name>
69843                  <description>ISF flag and Interrupt when logic 0.</description>
69844                  <value>#1000</value>
69845                </enumeratedValue>
69846                <enumeratedValue>
69847                  <name>1001</name>
69848                  <description>ISF flag and Interrupt on rising-edge.</description>
69849                  <value>#1001</value>
69850                </enumeratedValue>
69851                <enumeratedValue>
69852                  <name>1010</name>
69853                  <description>ISF flag and Interrupt on falling-edge.</description>
69854                  <value>#1010</value>
69855                </enumeratedValue>
69856                <enumeratedValue>
69857                  <name>1011</name>
69858                  <description>ISF flag and Interrupt on either edge.</description>
69859                  <value>#1011</value>
69860                </enumeratedValue>
69861                <enumeratedValue>
69862                  <name>1100</name>
69863                  <description>ISF flag and Interrupt when logic 1.</description>
69864                  <value>#1100</value>
69865                </enumeratedValue>
69866              </enumeratedValues>
69867            </field>
69868            <field>
69869              <name>ISF</name>
69870              <description>Interrupt Status Flag</description>
69871              <bitOffset>24</bitOffset>
69872              <bitWidth>1</bitWidth>
69873              <access>read-write</access>
69874              <enumeratedValues>
69875                <enumeratedValue>
69876                  <name>0</name>
69877                  <description>Configured interrupt is not detected.</description>
69878                  <value>#0</value>
69879                </enumeratedValue>
69880                <enumeratedValue>
69881                  <name>1</name>
69882                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
69883                  <value>#1</value>
69884                </enumeratedValue>
69885              </enumeratedValues>
69886            </field>
69887          </fields>
69888        </register>
69889        <register>
69890          <name>PCR12</name>
69891          <description>Pin Control Register n</description>
69892          <addressOffset>0x30</addressOffset>
69893          <size>32</size>
69894          <access>read-write</access>
69895          <resetValue>0</resetValue>
69896          <resetMask>0xFFFFFFFF</resetMask>
69897          <fields>
69898            <field>
69899              <name>PS</name>
69900              <description>Pull Select</description>
69901              <bitOffset>0</bitOffset>
69902              <bitWidth>1</bitWidth>
69903              <access>read-only</access>
69904              <enumeratedValues>
69905                <enumeratedValue>
69906                  <name>0</name>
69907                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
69908                  <value>#0</value>
69909                </enumeratedValue>
69910                <enumeratedValue>
69911                  <name>1</name>
69912                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
69913                  <value>#1</value>
69914                </enumeratedValue>
69915              </enumeratedValues>
69916            </field>
69917            <field>
69918              <name>PE</name>
69919              <description>Pull Enable</description>
69920              <bitOffset>1</bitOffset>
69921              <bitWidth>1</bitWidth>
69922              <access>read-only</access>
69923              <enumeratedValues>
69924                <enumeratedValue>
69925                  <name>0</name>
69926                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
69927                  <value>#0</value>
69928                </enumeratedValue>
69929                <enumeratedValue>
69930                  <name>1</name>
69931                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
69932                  <value>#1</value>
69933                </enumeratedValue>
69934              </enumeratedValues>
69935            </field>
69936            <field>
69937              <name>SRE</name>
69938              <description>Slew Rate Enable</description>
69939              <bitOffset>2</bitOffset>
69940              <bitWidth>1</bitWidth>
69941              <access>read-only</access>
69942              <enumeratedValues>
69943                <enumeratedValue>
69944                  <name>0</name>
69945                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
69946                  <value>#0</value>
69947                </enumeratedValue>
69948                <enumeratedValue>
69949                  <name>1</name>
69950                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
69951                  <value>#1</value>
69952                </enumeratedValue>
69953              </enumeratedValues>
69954            </field>
69955            <field>
69956              <name>PFE</name>
69957              <description>Passive Filter Enable</description>
69958              <bitOffset>4</bitOffset>
69959              <bitWidth>1</bitWidth>
69960              <access>read-only</access>
69961              <enumeratedValues>
69962                <enumeratedValue>
69963                  <name>0</name>
69964                  <description>Passive input filter is disabled on the corresponding pin.</description>
69965                  <value>#0</value>
69966                </enumeratedValue>
69967                <enumeratedValue>
69968                  <name>1</name>
69969                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
69970                  <value>#1</value>
69971                </enumeratedValue>
69972              </enumeratedValues>
69973            </field>
69974            <field>
69975              <name>ODE</name>
69976              <description>Open Drain Enable</description>
69977              <bitOffset>5</bitOffset>
69978              <bitWidth>1</bitWidth>
69979              <access>read-only</access>
69980              <enumeratedValues>
69981                <enumeratedValue>
69982                  <name>0</name>
69983                  <description>Open drain output is disabled on the corresponding pin.</description>
69984                  <value>#0</value>
69985                </enumeratedValue>
69986                <enumeratedValue>
69987                  <name>1</name>
69988                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
69989                  <value>#1</value>
69990                </enumeratedValue>
69991              </enumeratedValues>
69992            </field>
69993            <field>
69994              <name>DSE</name>
69995              <description>Drive Strength Enable</description>
69996              <bitOffset>6</bitOffset>
69997              <bitWidth>1</bitWidth>
69998              <access>read-only</access>
69999              <enumeratedValues>
70000                <enumeratedValue>
70001                  <name>0</name>
70002                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
70003                  <value>#0</value>
70004                </enumeratedValue>
70005                <enumeratedValue>
70006                  <name>1</name>
70007                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
70008                  <value>#1</value>
70009                </enumeratedValue>
70010              </enumeratedValues>
70011            </field>
70012            <field>
70013              <name>MUX</name>
70014              <description>Pin Mux Control</description>
70015              <bitOffset>8</bitOffset>
70016              <bitWidth>3</bitWidth>
70017              <access>read-write</access>
70018              <enumeratedValues>
70019                <enumeratedValue>
70020                  <name>000</name>
70021                  <description>Pin disabled (Alternative 0) (analog).</description>
70022                  <value>#000</value>
70023                </enumeratedValue>
70024                <enumeratedValue>
70025                  <name>001</name>
70026                  <description>Alternative 1 (GPIO).</description>
70027                  <value>#001</value>
70028                </enumeratedValue>
70029                <enumeratedValue>
70030                  <name>010</name>
70031                  <description>Alternative 2 (chip-specific).</description>
70032                  <value>#010</value>
70033                </enumeratedValue>
70034                <enumeratedValue>
70035                  <name>011</name>
70036                  <description>Alternative 3 (chip-specific).</description>
70037                  <value>#011</value>
70038                </enumeratedValue>
70039                <enumeratedValue>
70040                  <name>100</name>
70041                  <description>Alternative 4 (chip-specific).</description>
70042                  <value>#100</value>
70043                </enumeratedValue>
70044                <enumeratedValue>
70045                  <name>101</name>
70046                  <description>Alternative 5 (chip-specific).</description>
70047                  <value>#101</value>
70048                </enumeratedValue>
70049                <enumeratedValue>
70050                  <name>110</name>
70051                  <description>Alternative 6 (chip-specific).</description>
70052                  <value>#110</value>
70053                </enumeratedValue>
70054                <enumeratedValue>
70055                  <name>111</name>
70056                  <description>Alternative 7 (chip-specific).</description>
70057                  <value>#111</value>
70058                </enumeratedValue>
70059              </enumeratedValues>
70060            </field>
70061            <field>
70062              <name>LK</name>
70063              <description>Lock Register</description>
70064              <bitOffset>15</bitOffset>
70065              <bitWidth>1</bitWidth>
70066              <access>read-write</access>
70067              <enumeratedValues>
70068                <enumeratedValue>
70069                  <name>0</name>
70070                  <description>Pin Control Register fields [15:0] are not locked.</description>
70071                  <value>#0</value>
70072                </enumeratedValue>
70073                <enumeratedValue>
70074                  <name>1</name>
70075                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
70076                  <value>#1</value>
70077                </enumeratedValue>
70078              </enumeratedValues>
70079            </field>
70080            <field>
70081              <name>IRQC</name>
70082              <description>Interrupt Configuration</description>
70083              <bitOffset>16</bitOffset>
70084              <bitWidth>4</bitWidth>
70085              <access>read-write</access>
70086              <enumeratedValues>
70087                <enumeratedValue>
70088                  <name>0000</name>
70089                  <description>Interrupt Status Flag (ISF) is disabled.</description>
70090                  <value>#0000</value>
70091                </enumeratedValue>
70092                <enumeratedValue>
70093                  <name>0001</name>
70094                  <description>ISF flag and DMA request on rising edge.</description>
70095                  <value>#0001</value>
70096                </enumeratedValue>
70097                <enumeratedValue>
70098                  <name>0010</name>
70099                  <description>ISF flag and DMA request on falling edge.</description>
70100                  <value>#0010</value>
70101                </enumeratedValue>
70102                <enumeratedValue>
70103                  <name>0011</name>
70104                  <description>ISF flag and DMA request on either edge.</description>
70105                  <value>#0011</value>
70106                </enumeratedValue>
70107                <enumeratedValue>
70108                  <name>1000</name>
70109                  <description>ISF flag and Interrupt when logic 0.</description>
70110                  <value>#1000</value>
70111                </enumeratedValue>
70112                <enumeratedValue>
70113                  <name>1001</name>
70114                  <description>ISF flag and Interrupt on rising-edge.</description>
70115                  <value>#1001</value>
70116                </enumeratedValue>
70117                <enumeratedValue>
70118                  <name>1010</name>
70119                  <description>ISF flag and Interrupt on falling-edge.</description>
70120                  <value>#1010</value>
70121                </enumeratedValue>
70122                <enumeratedValue>
70123                  <name>1011</name>
70124                  <description>ISF flag and Interrupt on either edge.</description>
70125                  <value>#1011</value>
70126                </enumeratedValue>
70127                <enumeratedValue>
70128                  <name>1100</name>
70129                  <description>ISF flag and Interrupt when logic 1.</description>
70130                  <value>#1100</value>
70131                </enumeratedValue>
70132              </enumeratedValues>
70133            </field>
70134            <field>
70135              <name>ISF</name>
70136              <description>Interrupt Status Flag</description>
70137              <bitOffset>24</bitOffset>
70138              <bitWidth>1</bitWidth>
70139              <access>read-write</access>
70140              <enumeratedValues>
70141                <enumeratedValue>
70142                  <name>0</name>
70143                  <description>Configured interrupt is not detected.</description>
70144                  <value>#0</value>
70145                </enumeratedValue>
70146                <enumeratedValue>
70147                  <name>1</name>
70148                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
70149                  <value>#1</value>
70150                </enumeratedValue>
70151              </enumeratedValues>
70152            </field>
70153          </fields>
70154        </register>
70155        <register>
70156          <name>PCR13</name>
70157          <description>Pin Control Register n</description>
70158          <addressOffset>0x34</addressOffset>
70159          <size>32</size>
70160          <access>read-write</access>
70161          <resetValue>0</resetValue>
70162          <resetMask>0xFFFFFFFF</resetMask>
70163          <fields>
70164            <field>
70165              <name>PS</name>
70166              <description>Pull Select</description>
70167              <bitOffset>0</bitOffset>
70168              <bitWidth>1</bitWidth>
70169              <access>read-only</access>
70170              <enumeratedValues>
70171                <enumeratedValue>
70172                  <name>0</name>
70173                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
70174                  <value>#0</value>
70175                </enumeratedValue>
70176                <enumeratedValue>
70177                  <name>1</name>
70178                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
70179                  <value>#1</value>
70180                </enumeratedValue>
70181              </enumeratedValues>
70182            </field>
70183            <field>
70184              <name>PE</name>
70185              <description>Pull Enable</description>
70186              <bitOffset>1</bitOffset>
70187              <bitWidth>1</bitWidth>
70188              <access>read-only</access>
70189              <enumeratedValues>
70190                <enumeratedValue>
70191                  <name>0</name>
70192                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
70193                  <value>#0</value>
70194                </enumeratedValue>
70195                <enumeratedValue>
70196                  <name>1</name>
70197                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
70198                  <value>#1</value>
70199                </enumeratedValue>
70200              </enumeratedValues>
70201            </field>
70202            <field>
70203              <name>SRE</name>
70204              <description>Slew Rate Enable</description>
70205              <bitOffset>2</bitOffset>
70206              <bitWidth>1</bitWidth>
70207              <access>read-only</access>
70208              <enumeratedValues>
70209                <enumeratedValue>
70210                  <name>0</name>
70211                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
70212                  <value>#0</value>
70213                </enumeratedValue>
70214                <enumeratedValue>
70215                  <name>1</name>
70216                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
70217                  <value>#1</value>
70218                </enumeratedValue>
70219              </enumeratedValues>
70220            </field>
70221            <field>
70222              <name>PFE</name>
70223              <description>Passive Filter Enable</description>
70224              <bitOffset>4</bitOffset>
70225              <bitWidth>1</bitWidth>
70226              <access>read-only</access>
70227              <enumeratedValues>
70228                <enumeratedValue>
70229                  <name>0</name>
70230                  <description>Passive input filter is disabled on the corresponding pin.</description>
70231                  <value>#0</value>
70232                </enumeratedValue>
70233                <enumeratedValue>
70234                  <name>1</name>
70235                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
70236                  <value>#1</value>
70237                </enumeratedValue>
70238              </enumeratedValues>
70239            </field>
70240            <field>
70241              <name>ODE</name>
70242              <description>Open Drain Enable</description>
70243              <bitOffset>5</bitOffset>
70244              <bitWidth>1</bitWidth>
70245              <access>read-only</access>
70246              <enumeratedValues>
70247                <enumeratedValue>
70248                  <name>0</name>
70249                  <description>Open drain output is disabled on the corresponding pin.</description>
70250                  <value>#0</value>
70251                </enumeratedValue>
70252                <enumeratedValue>
70253                  <name>1</name>
70254                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
70255                  <value>#1</value>
70256                </enumeratedValue>
70257              </enumeratedValues>
70258            </field>
70259            <field>
70260              <name>DSE</name>
70261              <description>Drive Strength Enable</description>
70262              <bitOffset>6</bitOffset>
70263              <bitWidth>1</bitWidth>
70264              <access>read-only</access>
70265              <enumeratedValues>
70266                <enumeratedValue>
70267                  <name>0</name>
70268                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
70269                  <value>#0</value>
70270                </enumeratedValue>
70271                <enumeratedValue>
70272                  <name>1</name>
70273                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
70274                  <value>#1</value>
70275                </enumeratedValue>
70276              </enumeratedValues>
70277            </field>
70278            <field>
70279              <name>MUX</name>
70280              <description>Pin Mux Control</description>
70281              <bitOffset>8</bitOffset>
70282              <bitWidth>3</bitWidth>
70283              <access>read-write</access>
70284              <enumeratedValues>
70285                <enumeratedValue>
70286                  <name>000</name>
70287                  <description>Pin disabled (Alternative 0) (analog).</description>
70288                  <value>#000</value>
70289                </enumeratedValue>
70290                <enumeratedValue>
70291                  <name>001</name>
70292                  <description>Alternative 1 (GPIO).</description>
70293                  <value>#001</value>
70294                </enumeratedValue>
70295                <enumeratedValue>
70296                  <name>010</name>
70297                  <description>Alternative 2 (chip-specific).</description>
70298                  <value>#010</value>
70299                </enumeratedValue>
70300                <enumeratedValue>
70301                  <name>011</name>
70302                  <description>Alternative 3 (chip-specific).</description>
70303                  <value>#011</value>
70304                </enumeratedValue>
70305                <enumeratedValue>
70306                  <name>100</name>
70307                  <description>Alternative 4 (chip-specific).</description>
70308                  <value>#100</value>
70309                </enumeratedValue>
70310                <enumeratedValue>
70311                  <name>101</name>
70312                  <description>Alternative 5 (chip-specific).</description>
70313                  <value>#101</value>
70314                </enumeratedValue>
70315                <enumeratedValue>
70316                  <name>110</name>
70317                  <description>Alternative 6 (chip-specific).</description>
70318                  <value>#110</value>
70319                </enumeratedValue>
70320                <enumeratedValue>
70321                  <name>111</name>
70322                  <description>Alternative 7 (chip-specific).</description>
70323                  <value>#111</value>
70324                </enumeratedValue>
70325              </enumeratedValues>
70326            </field>
70327            <field>
70328              <name>LK</name>
70329              <description>Lock Register</description>
70330              <bitOffset>15</bitOffset>
70331              <bitWidth>1</bitWidth>
70332              <access>read-write</access>
70333              <enumeratedValues>
70334                <enumeratedValue>
70335                  <name>0</name>
70336                  <description>Pin Control Register fields [15:0] are not locked.</description>
70337                  <value>#0</value>
70338                </enumeratedValue>
70339                <enumeratedValue>
70340                  <name>1</name>
70341                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
70342                  <value>#1</value>
70343                </enumeratedValue>
70344              </enumeratedValues>
70345            </field>
70346            <field>
70347              <name>IRQC</name>
70348              <description>Interrupt Configuration</description>
70349              <bitOffset>16</bitOffset>
70350              <bitWidth>4</bitWidth>
70351              <access>read-write</access>
70352              <enumeratedValues>
70353                <enumeratedValue>
70354                  <name>0000</name>
70355                  <description>Interrupt Status Flag (ISF) is disabled.</description>
70356                  <value>#0000</value>
70357                </enumeratedValue>
70358                <enumeratedValue>
70359                  <name>0001</name>
70360                  <description>ISF flag and DMA request on rising edge.</description>
70361                  <value>#0001</value>
70362                </enumeratedValue>
70363                <enumeratedValue>
70364                  <name>0010</name>
70365                  <description>ISF flag and DMA request on falling edge.</description>
70366                  <value>#0010</value>
70367                </enumeratedValue>
70368                <enumeratedValue>
70369                  <name>0011</name>
70370                  <description>ISF flag and DMA request on either edge.</description>
70371                  <value>#0011</value>
70372                </enumeratedValue>
70373                <enumeratedValue>
70374                  <name>1000</name>
70375                  <description>ISF flag and Interrupt when logic 0.</description>
70376                  <value>#1000</value>
70377                </enumeratedValue>
70378                <enumeratedValue>
70379                  <name>1001</name>
70380                  <description>ISF flag and Interrupt on rising-edge.</description>
70381                  <value>#1001</value>
70382                </enumeratedValue>
70383                <enumeratedValue>
70384                  <name>1010</name>
70385                  <description>ISF flag and Interrupt on falling-edge.</description>
70386                  <value>#1010</value>
70387                </enumeratedValue>
70388                <enumeratedValue>
70389                  <name>1011</name>
70390                  <description>ISF flag and Interrupt on either edge.</description>
70391                  <value>#1011</value>
70392                </enumeratedValue>
70393                <enumeratedValue>
70394                  <name>1100</name>
70395                  <description>ISF flag and Interrupt when logic 1.</description>
70396                  <value>#1100</value>
70397                </enumeratedValue>
70398              </enumeratedValues>
70399            </field>
70400            <field>
70401              <name>ISF</name>
70402              <description>Interrupt Status Flag</description>
70403              <bitOffset>24</bitOffset>
70404              <bitWidth>1</bitWidth>
70405              <access>read-write</access>
70406              <enumeratedValues>
70407                <enumeratedValue>
70408                  <name>0</name>
70409                  <description>Configured interrupt is not detected.</description>
70410                  <value>#0</value>
70411                </enumeratedValue>
70412                <enumeratedValue>
70413                  <name>1</name>
70414                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
70415                  <value>#1</value>
70416                </enumeratedValue>
70417              </enumeratedValues>
70418            </field>
70419          </fields>
70420        </register>
70421        <register>
70422          <name>PCR14</name>
70423          <description>Pin Control Register n</description>
70424          <addressOffset>0x38</addressOffset>
70425          <size>32</size>
70426          <access>read-write</access>
70427          <resetValue>0</resetValue>
70428          <resetMask>0xFFFFFFFF</resetMask>
70429          <fields>
70430            <field>
70431              <name>PS</name>
70432              <description>Pull Select</description>
70433              <bitOffset>0</bitOffset>
70434              <bitWidth>1</bitWidth>
70435              <access>read-only</access>
70436              <enumeratedValues>
70437                <enumeratedValue>
70438                  <name>0</name>
70439                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
70440                  <value>#0</value>
70441                </enumeratedValue>
70442                <enumeratedValue>
70443                  <name>1</name>
70444                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
70445                  <value>#1</value>
70446                </enumeratedValue>
70447              </enumeratedValues>
70448            </field>
70449            <field>
70450              <name>PE</name>
70451              <description>Pull Enable</description>
70452              <bitOffset>1</bitOffset>
70453              <bitWidth>1</bitWidth>
70454              <access>read-only</access>
70455              <enumeratedValues>
70456                <enumeratedValue>
70457                  <name>0</name>
70458                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
70459                  <value>#0</value>
70460                </enumeratedValue>
70461                <enumeratedValue>
70462                  <name>1</name>
70463                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
70464                  <value>#1</value>
70465                </enumeratedValue>
70466              </enumeratedValues>
70467            </field>
70468            <field>
70469              <name>SRE</name>
70470              <description>Slew Rate Enable</description>
70471              <bitOffset>2</bitOffset>
70472              <bitWidth>1</bitWidth>
70473              <access>read-only</access>
70474              <enumeratedValues>
70475                <enumeratedValue>
70476                  <name>0</name>
70477                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
70478                  <value>#0</value>
70479                </enumeratedValue>
70480                <enumeratedValue>
70481                  <name>1</name>
70482                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
70483                  <value>#1</value>
70484                </enumeratedValue>
70485              </enumeratedValues>
70486            </field>
70487            <field>
70488              <name>PFE</name>
70489              <description>Passive Filter Enable</description>
70490              <bitOffset>4</bitOffset>
70491              <bitWidth>1</bitWidth>
70492              <access>read-only</access>
70493              <enumeratedValues>
70494                <enumeratedValue>
70495                  <name>0</name>
70496                  <description>Passive input filter is disabled on the corresponding pin.</description>
70497                  <value>#0</value>
70498                </enumeratedValue>
70499                <enumeratedValue>
70500                  <name>1</name>
70501                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
70502                  <value>#1</value>
70503                </enumeratedValue>
70504              </enumeratedValues>
70505            </field>
70506            <field>
70507              <name>ODE</name>
70508              <description>Open Drain Enable</description>
70509              <bitOffset>5</bitOffset>
70510              <bitWidth>1</bitWidth>
70511              <access>read-only</access>
70512              <enumeratedValues>
70513                <enumeratedValue>
70514                  <name>0</name>
70515                  <description>Open drain output is disabled on the corresponding pin.</description>
70516                  <value>#0</value>
70517                </enumeratedValue>
70518                <enumeratedValue>
70519                  <name>1</name>
70520                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
70521                  <value>#1</value>
70522                </enumeratedValue>
70523              </enumeratedValues>
70524            </field>
70525            <field>
70526              <name>DSE</name>
70527              <description>Drive Strength Enable</description>
70528              <bitOffset>6</bitOffset>
70529              <bitWidth>1</bitWidth>
70530              <access>read-only</access>
70531              <enumeratedValues>
70532                <enumeratedValue>
70533                  <name>0</name>
70534                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
70535                  <value>#0</value>
70536                </enumeratedValue>
70537                <enumeratedValue>
70538                  <name>1</name>
70539                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
70540                  <value>#1</value>
70541                </enumeratedValue>
70542              </enumeratedValues>
70543            </field>
70544            <field>
70545              <name>MUX</name>
70546              <description>Pin Mux Control</description>
70547              <bitOffset>8</bitOffset>
70548              <bitWidth>3</bitWidth>
70549              <access>read-write</access>
70550              <enumeratedValues>
70551                <enumeratedValue>
70552                  <name>000</name>
70553                  <description>Pin disabled (Alternative 0) (analog).</description>
70554                  <value>#000</value>
70555                </enumeratedValue>
70556                <enumeratedValue>
70557                  <name>001</name>
70558                  <description>Alternative 1 (GPIO).</description>
70559                  <value>#001</value>
70560                </enumeratedValue>
70561                <enumeratedValue>
70562                  <name>010</name>
70563                  <description>Alternative 2 (chip-specific).</description>
70564                  <value>#010</value>
70565                </enumeratedValue>
70566                <enumeratedValue>
70567                  <name>011</name>
70568                  <description>Alternative 3 (chip-specific).</description>
70569                  <value>#011</value>
70570                </enumeratedValue>
70571                <enumeratedValue>
70572                  <name>100</name>
70573                  <description>Alternative 4 (chip-specific).</description>
70574                  <value>#100</value>
70575                </enumeratedValue>
70576                <enumeratedValue>
70577                  <name>101</name>
70578                  <description>Alternative 5 (chip-specific).</description>
70579                  <value>#101</value>
70580                </enumeratedValue>
70581                <enumeratedValue>
70582                  <name>110</name>
70583                  <description>Alternative 6 (chip-specific).</description>
70584                  <value>#110</value>
70585                </enumeratedValue>
70586                <enumeratedValue>
70587                  <name>111</name>
70588                  <description>Alternative 7 (chip-specific).</description>
70589                  <value>#111</value>
70590                </enumeratedValue>
70591              </enumeratedValues>
70592            </field>
70593            <field>
70594              <name>LK</name>
70595              <description>Lock Register</description>
70596              <bitOffset>15</bitOffset>
70597              <bitWidth>1</bitWidth>
70598              <access>read-write</access>
70599              <enumeratedValues>
70600                <enumeratedValue>
70601                  <name>0</name>
70602                  <description>Pin Control Register fields [15:0] are not locked.</description>
70603                  <value>#0</value>
70604                </enumeratedValue>
70605                <enumeratedValue>
70606                  <name>1</name>
70607                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
70608                  <value>#1</value>
70609                </enumeratedValue>
70610              </enumeratedValues>
70611            </field>
70612            <field>
70613              <name>IRQC</name>
70614              <description>Interrupt Configuration</description>
70615              <bitOffset>16</bitOffset>
70616              <bitWidth>4</bitWidth>
70617              <access>read-write</access>
70618              <enumeratedValues>
70619                <enumeratedValue>
70620                  <name>0000</name>
70621                  <description>Interrupt Status Flag (ISF) is disabled.</description>
70622                  <value>#0000</value>
70623                </enumeratedValue>
70624                <enumeratedValue>
70625                  <name>0001</name>
70626                  <description>ISF flag and DMA request on rising edge.</description>
70627                  <value>#0001</value>
70628                </enumeratedValue>
70629                <enumeratedValue>
70630                  <name>0010</name>
70631                  <description>ISF flag and DMA request on falling edge.</description>
70632                  <value>#0010</value>
70633                </enumeratedValue>
70634                <enumeratedValue>
70635                  <name>0011</name>
70636                  <description>ISF flag and DMA request on either edge.</description>
70637                  <value>#0011</value>
70638                </enumeratedValue>
70639                <enumeratedValue>
70640                  <name>1000</name>
70641                  <description>ISF flag and Interrupt when logic 0.</description>
70642                  <value>#1000</value>
70643                </enumeratedValue>
70644                <enumeratedValue>
70645                  <name>1001</name>
70646                  <description>ISF flag and Interrupt on rising-edge.</description>
70647                  <value>#1001</value>
70648                </enumeratedValue>
70649                <enumeratedValue>
70650                  <name>1010</name>
70651                  <description>ISF flag and Interrupt on falling-edge.</description>
70652                  <value>#1010</value>
70653                </enumeratedValue>
70654                <enumeratedValue>
70655                  <name>1011</name>
70656                  <description>ISF flag and Interrupt on either edge.</description>
70657                  <value>#1011</value>
70658                </enumeratedValue>
70659                <enumeratedValue>
70660                  <name>1100</name>
70661                  <description>ISF flag and Interrupt when logic 1.</description>
70662                  <value>#1100</value>
70663                </enumeratedValue>
70664              </enumeratedValues>
70665            </field>
70666            <field>
70667              <name>ISF</name>
70668              <description>Interrupt Status Flag</description>
70669              <bitOffset>24</bitOffset>
70670              <bitWidth>1</bitWidth>
70671              <access>read-write</access>
70672              <enumeratedValues>
70673                <enumeratedValue>
70674                  <name>0</name>
70675                  <description>Configured interrupt is not detected.</description>
70676                  <value>#0</value>
70677                </enumeratedValue>
70678                <enumeratedValue>
70679                  <name>1</name>
70680                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
70681                  <value>#1</value>
70682                </enumeratedValue>
70683              </enumeratedValues>
70684            </field>
70685          </fields>
70686        </register>
70687        <register>
70688          <name>PCR15</name>
70689          <description>Pin Control Register n</description>
70690          <addressOffset>0x3C</addressOffset>
70691          <size>32</size>
70692          <access>read-write</access>
70693          <resetValue>0</resetValue>
70694          <resetMask>0xFFFFFFFF</resetMask>
70695          <fields>
70696            <field>
70697              <name>PS</name>
70698              <description>Pull Select</description>
70699              <bitOffset>0</bitOffset>
70700              <bitWidth>1</bitWidth>
70701              <access>read-only</access>
70702              <enumeratedValues>
70703                <enumeratedValue>
70704                  <name>0</name>
70705                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
70706                  <value>#0</value>
70707                </enumeratedValue>
70708                <enumeratedValue>
70709                  <name>1</name>
70710                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
70711                  <value>#1</value>
70712                </enumeratedValue>
70713              </enumeratedValues>
70714            </field>
70715            <field>
70716              <name>PE</name>
70717              <description>Pull Enable</description>
70718              <bitOffset>1</bitOffset>
70719              <bitWidth>1</bitWidth>
70720              <access>read-only</access>
70721              <enumeratedValues>
70722                <enumeratedValue>
70723                  <name>0</name>
70724                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
70725                  <value>#0</value>
70726                </enumeratedValue>
70727                <enumeratedValue>
70728                  <name>1</name>
70729                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
70730                  <value>#1</value>
70731                </enumeratedValue>
70732              </enumeratedValues>
70733            </field>
70734            <field>
70735              <name>SRE</name>
70736              <description>Slew Rate Enable</description>
70737              <bitOffset>2</bitOffset>
70738              <bitWidth>1</bitWidth>
70739              <access>read-only</access>
70740              <enumeratedValues>
70741                <enumeratedValue>
70742                  <name>0</name>
70743                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
70744                  <value>#0</value>
70745                </enumeratedValue>
70746                <enumeratedValue>
70747                  <name>1</name>
70748                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
70749                  <value>#1</value>
70750                </enumeratedValue>
70751              </enumeratedValues>
70752            </field>
70753            <field>
70754              <name>PFE</name>
70755              <description>Passive Filter Enable</description>
70756              <bitOffset>4</bitOffset>
70757              <bitWidth>1</bitWidth>
70758              <access>read-only</access>
70759              <enumeratedValues>
70760                <enumeratedValue>
70761                  <name>0</name>
70762                  <description>Passive input filter is disabled on the corresponding pin.</description>
70763                  <value>#0</value>
70764                </enumeratedValue>
70765                <enumeratedValue>
70766                  <name>1</name>
70767                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
70768                  <value>#1</value>
70769                </enumeratedValue>
70770              </enumeratedValues>
70771            </field>
70772            <field>
70773              <name>ODE</name>
70774              <description>Open Drain Enable</description>
70775              <bitOffset>5</bitOffset>
70776              <bitWidth>1</bitWidth>
70777              <access>read-only</access>
70778              <enumeratedValues>
70779                <enumeratedValue>
70780                  <name>0</name>
70781                  <description>Open drain output is disabled on the corresponding pin.</description>
70782                  <value>#0</value>
70783                </enumeratedValue>
70784                <enumeratedValue>
70785                  <name>1</name>
70786                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
70787                  <value>#1</value>
70788                </enumeratedValue>
70789              </enumeratedValues>
70790            </field>
70791            <field>
70792              <name>DSE</name>
70793              <description>Drive Strength Enable</description>
70794              <bitOffset>6</bitOffset>
70795              <bitWidth>1</bitWidth>
70796              <access>read-only</access>
70797              <enumeratedValues>
70798                <enumeratedValue>
70799                  <name>0</name>
70800                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
70801                  <value>#0</value>
70802                </enumeratedValue>
70803                <enumeratedValue>
70804                  <name>1</name>
70805                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
70806                  <value>#1</value>
70807                </enumeratedValue>
70808              </enumeratedValues>
70809            </field>
70810            <field>
70811              <name>MUX</name>
70812              <description>Pin Mux Control</description>
70813              <bitOffset>8</bitOffset>
70814              <bitWidth>3</bitWidth>
70815              <access>read-write</access>
70816              <enumeratedValues>
70817                <enumeratedValue>
70818                  <name>000</name>
70819                  <description>Pin disabled (Alternative 0) (analog).</description>
70820                  <value>#000</value>
70821                </enumeratedValue>
70822                <enumeratedValue>
70823                  <name>001</name>
70824                  <description>Alternative 1 (GPIO).</description>
70825                  <value>#001</value>
70826                </enumeratedValue>
70827                <enumeratedValue>
70828                  <name>010</name>
70829                  <description>Alternative 2 (chip-specific).</description>
70830                  <value>#010</value>
70831                </enumeratedValue>
70832                <enumeratedValue>
70833                  <name>011</name>
70834                  <description>Alternative 3 (chip-specific).</description>
70835                  <value>#011</value>
70836                </enumeratedValue>
70837                <enumeratedValue>
70838                  <name>100</name>
70839                  <description>Alternative 4 (chip-specific).</description>
70840                  <value>#100</value>
70841                </enumeratedValue>
70842                <enumeratedValue>
70843                  <name>101</name>
70844                  <description>Alternative 5 (chip-specific).</description>
70845                  <value>#101</value>
70846                </enumeratedValue>
70847                <enumeratedValue>
70848                  <name>110</name>
70849                  <description>Alternative 6 (chip-specific).</description>
70850                  <value>#110</value>
70851                </enumeratedValue>
70852                <enumeratedValue>
70853                  <name>111</name>
70854                  <description>Alternative 7 (chip-specific).</description>
70855                  <value>#111</value>
70856                </enumeratedValue>
70857              </enumeratedValues>
70858            </field>
70859            <field>
70860              <name>LK</name>
70861              <description>Lock Register</description>
70862              <bitOffset>15</bitOffset>
70863              <bitWidth>1</bitWidth>
70864              <access>read-write</access>
70865              <enumeratedValues>
70866                <enumeratedValue>
70867                  <name>0</name>
70868                  <description>Pin Control Register fields [15:0] are not locked.</description>
70869                  <value>#0</value>
70870                </enumeratedValue>
70871                <enumeratedValue>
70872                  <name>1</name>
70873                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
70874                  <value>#1</value>
70875                </enumeratedValue>
70876              </enumeratedValues>
70877            </field>
70878            <field>
70879              <name>IRQC</name>
70880              <description>Interrupt Configuration</description>
70881              <bitOffset>16</bitOffset>
70882              <bitWidth>4</bitWidth>
70883              <access>read-write</access>
70884              <enumeratedValues>
70885                <enumeratedValue>
70886                  <name>0000</name>
70887                  <description>Interrupt Status Flag (ISF) is disabled.</description>
70888                  <value>#0000</value>
70889                </enumeratedValue>
70890                <enumeratedValue>
70891                  <name>0001</name>
70892                  <description>ISF flag and DMA request on rising edge.</description>
70893                  <value>#0001</value>
70894                </enumeratedValue>
70895                <enumeratedValue>
70896                  <name>0010</name>
70897                  <description>ISF flag and DMA request on falling edge.</description>
70898                  <value>#0010</value>
70899                </enumeratedValue>
70900                <enumeratedValue>
70901                  <name>0011</name>
70902                  <description>ISF flag and DMA request on either edge.</description>
70903                  <value>#0011</value>
70904                </enumeratedValue>
70905                <enumeratedValue>
70906                  <name>1000</name>
70907                  <description>ISF flag and Interrupt when logic 0.</description>
70908                  <value>#1000</value>
70909                </enumeratedValue>
70910                <enumeratedValue>
70911                  <name>1001</name>
70912                  <description>ISF flag and Interrupt on rising-edge.</description>
70913                  <value>#1001</value>
70914                </enumeratedValue>
70915                <enumeratedValue>
70916                  <name>1010</name>
70917                  <description>ISF flag and Interrupt on falling-edge.</description>
70918                  <value>#1010</value>
70919                </enumeratedValue>
70920                <enumeratedValue>
70921                  <name>1011</name>
70922                  <description>ISF flag and Interrupt on either edge.</description>
70923                  <value>#1011</value>
70924                </enumeratedValue>
70925                <enumeratedValue>
70926                  <name>1100</name>
70927                  <description>ISF flag and Interrupt when logic 1.</description>
70928                  <value>#1100</value>
70929                </enumeratedValue>
70930              </enumeratedValues>
70931            </field>
70932            <field>
70933              <name>ISF</name>
70934              <description>Interrupt Status Flag</description>
70935              <bitOffset>24</bitOffset>
70936              <bitWidth>1</bitWidth>
70937              <access>read-write</access>
70938              <enumeratedValues>
70939                <enumeratedValue>
70940                  <name>0</name>
70941                  <description>Configured interrupt is not detected.</description>
70942                  <value>#0</value>
70943                </enumeratedValue>
70944                <enumeratedValue>
70945                  <name>1</name>
70946                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
70947                  <value>#1</value>
70948                </enumeratedValue>
70949              </enumeratedValues>
70950            </field>
70951          </fields>
70952        </register>
70953        <register>
70954          <name>PCR16</name>
70955          <description>Pin Control Register n</description>
70956          <addressOffset>0x40</addressOffset>
70957          <size>32</size>
70958          <access>read-write</access>
70959          <resetValue>0</resetValue>
70960          <resetMask>0xFFFFFFFF</resetMask>
70961          <fields>
70962            <field>
70963              <name>PS</name>
70964              <description>Pull Select</description>
70965              <bitOffset>0</bitOffset>
70966              <bitWidth>1</bitWidth>
70967              <access>read-write</access>
70968              <enumeratedValues>
70969                <enumeratedValue>
70970                  <name>0</name>
70971                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
70972                  <value>#0</value>
70973                </enumeratedValue>
70974                <enumeratedValue>
70975                  <name>1</name>
70976                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
70977                  <value>#1</value>
70978                </enumeratedValue>
70979              </enumeratedValues>
70980            </field>
70981            <field>
70982              <name>PE</name>
70983              <description>Pull Enable</description>
70984              <bitOffset>1</bitOffset>
70985              <bitWidth>1</bitWidth>
70986              <access>read-write</access>
70987              <enumeratedValues>
70988                <enumeratedValue>
70989                  <name>0</name>
70990                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
70991                  <value>#0</value>
70992                </enumeratedValue>
70993                <enumeratedValue>
70994                  <name>1</name>
70995                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
70996                  <value>#1</value>
70997                </enumeratedValue>
70998              </enumeratedValues>
70999            </field>
71000            <field>
71001              <name>SRE</name>
71002              <description>Slew Rate Enable</description>
71003              <bitOffset>2</bitOffset>
71004              <bitWidth>1</bitWidth>
71005              <access>read-write</access>
71006              <enumeratedValues>
71007                <enumeratedValue>
71008                  <name>0</name>
71009                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
71010                  <value>#0</value>
71011                </enumeratedValue>
71012                <enumeratedValue>
71013                  <name>1</name>
71014                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
71015                  <value>#1</value>
71016                </enumeratedValue>
71017              </enumeratedValues>
71018            </field>
71019            <field>
71020              <name>PFE</name>
71021              <description>Passive Filter Enable</description>
71022              <bitOffset>4</bitOffset>
71023              <bitWidth>1</bitWidth>
71024              <access>read-only</access>
71025              <enumeratedValues>
71026                <enumeratedValue>
71027                  <name>0</name>
71028                  <description>Passive input filter is disabled on the corresponding pin.</description>
71029                  <value>#0</value>
71030                </enumeratedValue>
71031                <enumeratedValue>
71032                  <name>1</name>
71033                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
71034                  <value>#1</value>
71035                </enumeratedValue>
71036              </enumeratedValues>
71037            </field>
71038            <field>
71039              <name>ODE</name>
71040              <description>Open Drain Enable</description>
71041              <bitOffset>5</bitOffset>
71042              <bitWidth>1</bitWidth>
71043              <access>read-write</access>
71044              <enumeratedValues>
71045                <enumeratedValue>
71046                  <name>0</name>
71047                  <description>Open drain output is disabled on the corresponding pin.</description>
71048                  <value>#0</value>
71049                </enumeratedValue>
71050                <enumeratedValue>
71051                  <name>1</name>
71052                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
71053                  <value>#1</value>
71054                </enumeratedValue>
71055              </enumeratedValues>
71056            </field>
71057            <field>
71058              <name>DSE</name>
71059              <description>Drive Strength Enable</description>
71060              <bitOffset>6</bitOffset>
71061              <bitWidth>1</bitWidth>
71062              <access>read-only</access>
71063              <enumeratedValues>
71064                <enumeratedValue>
71065                  <name>0</name>
71066                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
71067                  <value>#0</value>
71068                </enumeratedValue>
71069                <enumeratedValue>
71070                  <name>1</name>
71071                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
71072                  <value>#1</value>
71073                </enumeratedValue>
71074              </enumeratedValues>
71075            </field>
71076            <field>
71077              <name>MUX</name>
71078              <description>Pin Mux Control</description>
71079              <bitOffset>8</bitOffset>
71080              <bitWidth>3</bitWidth>
71081              <access>read-write</access>
71082              <enumeratedValues>
71083                <enumeratedValue>
71084                  <name>000</name>
71085                  <description>Pin disabled (Alternative 0) (analog).</description>
71086                  <value>#000</value>
71087                </enumeratedValue>
71088                <enumeratedValue>
71089                  <name>001</name>
71090                  <description>Alternative 1 (GPIO).</description>
71091                  <value>#001</value>
71092                </enumeratedValue>
71093                <enumeratedValue>
71094                  <name>010</name>
71095                  <description>Alternative 2 (chip-specific).</description>
71096                  <value>#010</value>
71097                </enumeratedValue>
71098                <enumeratedValue>
71099                  <name>011</name>
71100                  <description>Alternative 3 (chip-specific).</description>
71101                  <value>#011</value>
71102                </enumeratedValue>
71103                <enumeratedValue>
71104                  <name>100</name>
71105                  <description>Alternative 4 (chip-specific).</description>
71106                  <value>#100</value>
71107                </enumeratedValue>
71108                <enumeratedValue>
71109                  <name>101</name>
71110                  <description>Alternative 5 (chip-specific).</description>
71111                  <value>#101</value>
71112                </enumeratedValue>
71113                <enumeratedValue>
71114                  <name>110</name>
71115                  <description>Alternative 6 (chip-specific).</description>
71116                  <value>#110</value>
71117                </enumeratedValue>
71118                <enumeratedValue>
71119                  <name>111</name>
71120                  <description>Alternative 7 (chip-specific).</description>
71121                  <value>#111</value>
71122                </enumeratedValue>
71123              </enumeratedValues>
71124            </field>
71125            <field>
71126              <name>LK</name>
71127              <description>Lock Register</description>
71128              <bitOffset>15</bitOffset>
71129              <bitWidth>1</bitWidth>
71130              <access>read-write</access>
71131              <enumeratedValues>
71132                <enumeratedValue>
71133                  <name>0</name>
71134                  <description>Pin Control Register fields [15:0] are not locked.</description>
71135                  <value>#0</value>
71136                </enumeratedValue>
71137                <enumeratedValue>
71138                  <name>1</name>
71139                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
71140                  <value>#1</value>
71141                </enumeratedValue>
71142              </enumeratedValues>
71143            </field>
71144            <field>
71145              <name>IRQC</name>
71146              <description>Interrupt Configuration</description>
71147              <bitOffset>16</bitOffset>
71148              <bitWidth>4</bitWidth>
71149              <access>read-write</access>
71150              <enumeratedValues>
71151                <enumeratedValue>
71152                  <name>0000</name>
71153                  <description>Interrupt Status Flag (ISF) is disabled.</description>
71154                  <value>#0000</value>
71155                </enumeratedValue>
71156                <enumeratedValue>
71157                  <name>0001</name>
71158                  <description>ISF flag and DMA request on rising edge.</description>
71159                  <value>#0001</value>
71160                </enumeratedValue>
71161                <enumeratedValue>
71162                  <name>0010</name>
71163                  <description>ISF flag and DMA request on falling edge.</description>
71164                  <value>#0010</value>
71165                </enumeratedValue>
71166                <enumeratedValue>
71167                  <name>0011</name>
71168                  <description>ISF flag and DMA request on either edge.</description>
71169                  <value>#0011</value>
71170                </enumeratedValue>
71171                <enumeratedValue>
71172                  <name>1000</name>
71173                  <description>ISF flag and Interrupt when logic 0.</description>
71174                  <value>#1000</value>
71175                </enumeratedValue>
71176                <enumeratedValue>
71177                  <name>1001</name>
71178                  <description>ISF flag and Interrupt on rising-edge.</description>
71179                  <value>#1001</value>
71180                </enumeratedValue>
71181                <enumeratedValue>
71182                  <name>1010</name>
71183                  <description>ISF flag and Interrupt on falling-edge.</description>
71184                  <value>#1010</value>
71185                </enumeratedValue>
71186                <enumeratedValue>
71187                  <name>1011</name>
71188                  <description>ISF flag and Interrupt on either edge.</description>
71189                  <value>#1011</value>
71190                </enumeratedValue>
71191                <enumeratedValue>
71192                  <name>1100</name>
71193                  <description>ISF flag and Interrupt when logic 1.</description>
71194                  <value>#1100</value>
71195                </enumeratedValue>
71196              </enumeratedValues>
71197            </field>
71198            <field>
71199              <name>ISF</name>
71200              <description>Interrupt Status Flag</description>
71201              <bitOffset>24</bitOffset>
71202              <bitWidth>1</bitWidth>
71203              <access>read-write</access>
71204              <enumeratedValues>
71205                <enumeratedValue>
71206                  <name>0</name>
71207                  <description>Configured interrupt is not detected.</description>
71208                  <value>#0</value>
71209                </enumeratedValue>
71210                <enumeratedValue>
71211                  <name>1</name>
71212                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
71213                  <value>#1</value>
71214                </enumeratedValue>
71215              </enumeratedValues>
71216            </field>
71217          </fields>
71218        </register>
71219        <register>
71220          <name>PCR17</name>
71221          <description>Pin Control Register n</description>
71222          <addressOffset>0x44</addressOffset>
71223          <size>32</size>
71224          <access>read-write</access>
71225          <resetValue>0</resetValue>
71226          <resetMask>0xFFFFFFFF</resetMask>
71227          <fields>
71228            <field>
71229              <name>PS</name>
71230              <description>Pull Select</description>
71231              <bitOffset>0</bitOffset>
71232              <bitWidth>1</bitWidth>
71233              <access>read-write</access>
71234              <enumeratedValues>
71235                <enumeratedValue>
71236                  <name>0</name>
71237                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
71238                  <value>#0</value>
71239                </enumeratedValue>
71240                <enumeratedValue>
71241                  <name>1</name>
71242                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
71243                  <value>#1</value>
71244                </enumeratedValue>
71245              </enumeratedValues>
71246            </field>
71247            <field>
71248              <name>PE</name>
71249              <description>Pull Enable</description>
71250              <bitOffset>1</bitOffset>
71251              <bitWidth>1</bitWidth>
71252              <access>read-write</access>
71253              <enumeratedValues>
71254                <enumeratedValue>
71255                  <name>0</name>
71256                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
71257                  <value>#0</value>
71258                </enumeratedValue>
71259                <enumeratedValue>
71260                  <name>1</name>
71261                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
71262                  <value>#1</value>
71263                </enumeratedValue>
71264              </enumeratedValues>
71265            </field>
71266            <field>
71267              <name>SRE</name>
71268              <description>Slew Rate Enable</description>
71269              <bitOffset>2</bitOffset>
71270              <bitWidth>1</bitWidth>
71271              <access>read-write</access>
71272              <enumeratedValues>
71273                <enumeratedValue>
71274                  <name>0</name>
71275                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
71276                  <value>#0</value>
71277                </enumeratedValue>
71278                <enumeratedValue>
71279                  <name>1</name>
71280                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
71281                  <value>#1</value>
71282                </enumeratedValue>
71283              </enumeratedValues>
71284            </field>
71285            <field>
71286              <name>PFE</name>
71287              <description>Passive Filter Enable</description>
71288              <bitOffset>4</bitOffset>
71289              <bitWidth>1</bitWidth>
71290              <access>read-only</access>
71291              <enumeratedValues>
71292                <enumeratedValue>
71293                  <name>0</name>
71294                  <description>Passive input filter is disabled on the corresponding pin.</description>
71295                  <value>#0</value>
71296                </enumeratedValue>
71297                <enumeratedValue>
71298                  <name>1</name>
71299                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
71300                  <value>#1</value>
71301                </enumeratedValue>
71302              </enumeratedValues>
71303            </field>
71304            <field>
71305              <name>ODE</name>
71306              <description>Open Drain Enable</description>
71307              <bitOffset>5</bitOffset>
71308              <bitWidth>1</bitWidth>
71309              <access>read-write</access>
71310              <enumeratedValues>
71311                <enumeratedValue>
71312                  <name>0</name>
71313                  <description>Open drain output is disabled on the corresponding pin.</description>
71314                  <value>#0</value>
71315                </enumeratedValue>
71316                <enumeratedValue>
71317                  <name>1</name>
71318                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
71319                  <value>#1</value>
71320                </enumeratedValue>
71321              </enumeratedValues>
71322            </field>
71323            <field>
71324              <name>DSE</name>
71325              <description>Drive Strength Enable</description>
71326              <bitOffset>6</bitOffset>
71327              <bitWidth>1</bitWidth>
71328              <access>read-only</access>
71329              <enumeratedValues>
71330                <enumeratedValue>
71331                  <name>0</name>
71332                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
71333                  <value>#0</value>
71334                </enumeratedValue>
71335                <enumeratedValue>
71336                  <name>1</name>
71337                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
71338                  <value>#1</value>
71339                </enumeratedValue>
71340              </enumeratedValues>
71341            </field>
71342            <field>
71343              <name>MUX</name>
71344              <description>Pin Mux Control</description>
71345              <bitOffset>8</bitOffset>
71346              <bitWidth>3</bitWidth>
71347              <access>read-write</access>
71348              <enumeratedValues>
71349                <enumeratedValue>
71350                  <name>000</name>
71351                  <description>Pin disabled (Alternative 0) (analog).</description>
71352                  <value>#000</value>
71353                </enumeratedValue>
71354                <enumeratedValue>
71355                  <name>001</name>
71356                  <description>Alternative 1 (GPIO).</description>
71357                  <value>#001</value>
71358                </enumeratedValue>
71359                <enumeratedValue>
71360                  <name>010</name>
71361                  <description>Alternative 2 (chip-specific).</description>
71362                  <value>#010</value>
71363                </enumeratedValue>
71364                <enumeratedValue>
71365                  <name>011</name>
71366                  <description>Alternative 3 (chip-specific).</description>
71367                  <value>#011</value>
71368                </enumeratedValue>
71369                <enumeratedValue>
71370                  <name>100</name>
71371                  <description>Alternative 4 (chip-specific).</description>
71372                  <value>#100</value>
71373                </enumeratedValue>
71374                <enumeratedValue>
71375                  <name>101</name>
71376                  <description>Alternative 5 (chip-specific).</description>
71377                  <value>#101</value>
71378                </enumeratedValue>
71379                <enumeratedValue>
71380                  <name>110</name>
71381                  <description>Alternative 6 (chip-specific).</description>
71382                  <value>#110</value>
71383                </enumeratedValue>
71384                <enumeratedValue>
71385                  <name>111</name>
71386                  <description>Alternative 7 (chip-specific).</description>
71387                  <value>#111</value>
71388                </enumeratedValue>
71389              </enumeratedValues>
71390            </field>
71391            <field>
71392              <name>LK</name>
71393              <description>Lock Register</description>
71394              <bitOffset>15</bitOffset>
71395              <bitWidth>1</bitWidth>
71396              <access>read-write</access>
71397              <enumeratedValues>
71398                <enumeratedValue>
71399                  <name>0</name>
71400                  <description>Pin Control Register fields [15:0] are not locked.</description>
71401                  <value>#0</value>
71402                </enumeratedValue>
71403                <enumeratedValue>
71404                  <name>1</name>
71405                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
71406                  <value>#1</value>
71407                </enumeratedValue>
71408              </enumeratedValues>
71409            </field>
71410            <field>
71411              <name>IRQC</name>
71412              <description>Interrupt Configuration</description>
71413              <bitOffset>16</bitOffset>
71414              <bitWidth>4</bitWidth>
71415              <access>read-write</access>
71416              <enumeratedValues>
71417                <enumeratedValue>
71418                  <name>0000</name>
71419                  <description>Interrupt Status Flag (ISF) is disabled.</description>
71420                  <value>#0000</value>
71421                </enumeratedValue>
71422                <enumeratedValue>
71423                  <name>0001</name>
71424                  <description>ISF flag and DMA request on rising edge.</description>
71425                  <value>#0001</value>
71426                </enumeratedValue>
71427                <enumeratedValue>
71428                  <name>0010</name>
71429                  <description>ISF flag and DMA request on falling edge.</description>
71430                  <value>#0010</value>
71431                </enumeratedValue>
71432                <enumeratedValue>
71433                  <name>0011</name>
71434                  <description>ISF flag and DMA request on either edge.</description>
71435                  <value>#0011</value>
71436                </enumeratedValue>
71437                <enumeratedValue>
71438                  <name>1000</name>
71439                  <description>ISF flag and Interrupt when logic 0.</description>
71440                  <value>#1000</value>
71441                </enumeratedValue>
71442                <enumeratedValue>
71443                  <name>1001</name>
71444                  <description>ISF flag and Interrupt on rising-edge.</description>
71445                  <value>#1001</value>
71446                </enumeratedValue>
71447                <enumeratedValue>
71448                  <name>1010</name>
71449                  <description>ISF flag and Interrupt on falling-edge.</description>
71450                  <value>#1010</value>
71451                </enumeratedValue>
71452                <enumeratedValue>
71453                  <name>1011</name>
71454                  <description>ISF flag and Interrupt on either edge.</description>
71455                  <value>#1011</value>
71456                </enumeratedValue>
71457                <enumeratedValue>
71458                  <name>1100</name>
71459                  <description>ISF flag and Interrupt when logic 1.</description>
71460                  <value>#1100</value>
71461                </enumeratedValue>
71462              </enumeratedValues>
71463            </field>
71464            <field>
71465              <name>ISF</name>
71466              <description>Interrupt Status Flag</description>
71467              <bitOffset>24</bitOffset>
71468              <bitWidth>1</bitWidth>
71469              <access>read-write</access>
71470              <enumeratedValues>
71471                <enumeratedValue>
71472                  <name>0</name>
71473                  <description>Configured interrupt is not detected.</description>
71474                  <value>#0</value>
71475                </enumeratedValue>
71476                <enumeratedValue>
71477                  <name>1</name>
71478                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
71479                  <value>#1</value>
71480                </enumeratedValue>
71481              </enumeratedValues>
71482            </field>
71483          </fields>
71484        </register>
71485        <register>
71486          <name>PCR18</name>
71487          <description>Pin Control Register n</description>
71488          <addressOffset>0x48</addressOffset>
71489          <size>32</size>
71490          <access>read-write</access>
71491          <resetValue>0</resetValue>
71492          <resetMask>0xFFFFFFFF</resetMask>
71493          <fields>
71494            <field>
71495              <name>PS</name>
71496              <description>Pull Select</description>
71497              <bitOffset>0</bitOffset>
71498              <bitWidth>1</bitWidth>
71499              <access>read-write</access>
71500              <enumeratedValues>
71501                <enumeratedValue>
71502                  <name>0</name>
71503                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
71504                  <value>#0</value>
71505                </enumeratedValue>
71506                <enumeratedValue>
71507                  <name>1</name>
71508                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
71509                  <value>#1</value>
71510                </enumeratedValue>
71511              </enumeratedValues>
71512            </field>
71513            <field>
71514              <name>PE</name>
71515              <description>Pull Enable</description>
71516              <bitOffset>1</bitOffset>
71517              <bitWidth>1</bitWidth>
71518              <access>read-write</access>
71519              <enumeratedValues>
71520                <enumeratedValue>
71521                  <name>0</name>
71522                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
71523                  <value>#0</value>
71524                </enumeratedValue>
71525                <enumeratedValue>
71526                  <name>1</name>
71527                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
71528                  <value>#1</value>
71529                </enumeratedValue>
71530              </enumeratedValues>
71531            </field>
71532            <field>
71533              <name>SRE</name>
71534              <description>Slew Rate Enable</description>
71535              <bitOffset>2</bitOffset>
71536              <bitWidth>1</bitWidth>
71537              <access>read-write</access>
71538              <enumeratedValues>
71539                <enumeratedValue>
71540                  <name>0</name>
71541                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
71542                  <value>#0</value>
71543                </enumeratedValue>
71544                <enumeratedValue>
71545                  <name>1</name>
71546                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
71547                  <value>#1</value>
71548                </enumeratedValue>
71549              </enumeratedValues>
71550            </field>
71551            <field>
71552              <name>PFE</name>
71553              <description>Passive Filter Enable</description>
71554              <bitOffset>4</bitOffset>
71555              <bitWidth>1</bitWidth>
71556              <access>read-only</access>
71557              <enumeratedValues>
71558                <enumeratedValue>
71559                  <name>0</name>
71560                  <description>Passive input filter is disabled on the corresponding pin.</description>
71561                  <value>#0</value>
71562                </enumeratedValue>
71563                <enumeratedValue>
71564                  <name>1</name>
71565                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
71566                  <value>#1</value>
71567                </enumeratedValue>
71568              </enumeratedValues>
71569            </field>
71570            <field>
71571              <name>ODE</name>
71572              <description>Open Drain Enable</description>
71573              <bitOffset>5</bitOffset>
71574              <bitWidth>1</bitWidth>
71575              <access>read-write</access>
71576              <enumeratedValues>
71577                <enumeratedValue>
71578                  <name>0</name>
71579                  <description>Open drain output is disabled on the corresponding pin.</description>
71580                  <value>#0</value>
71581                </enumeratedValue>
71582                <enumeratedValue>
71583                  <name>1</name>
71584                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
71585                  <value>#1</value>
71586                </enumeratedValue>
71587              </enumeratedValues>
71588            </field>
71589            <field>
71590              <name>DSE</name>
71591              <description>Drive Strength Enable</description>
71592              <bitOffset>6</bitOffset>
71593              <bitWidth>1</bitWidth>
71594              <access>read-only</access>
71595              <enumeratedValues>
71596                <enumeratedValue>
71597                  <name>0</name>
71598                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
71599                  <value>#0</value>
71600                </enumeratedValue>
71601                <enumeratedValue>
71602                  <name>1</name>
71603                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
71604                  <value>#1</value>
71605                </enumeratedValue>
71606              </enumeratedValues>
71607            </field>
71608            <field>
71609              <name>MUX</name>
71610              <description>Pin Mux Control</description>
71611              <bitOffset>8</bitOffset>
71612              <bitWidth>3</bitWidth>
71613              <access>read-write</access>
71614              <enumeratedValues>
71615                <enumeratedValue>
71616                  <name>000</name>
71617                  <description>Pin disabled (Alternative 0) (analog).</description>
71618                  <value>#000</value>
71619                </enumeratedValue>
71620                <enumeratedValue>
71621                  <name>001</name>
71622                  <description>Alternative 1 (GPIO).</description>
71623                  <value>#001</value>
71624                </enumeratedValue>
71625                <enumeratedValue>
71626                  <name>010</name>
71627                  <description>Alternative 2 (chip-specific).</description>
71628                  <value>#010</value>
71629                </enumeratedValue>
71630                <enumeratedValue>
71631                  <name>011</name>
71632                  <description>Alternative 3 (chip-specific).</description>
71633                  <value>#011</value>
71634                </enumeratedValue>
71635                <enumeratedValue>
71636                  <name>100</name>
71637                  <description>Alternative 4 (chip-specific).</description>
71638                  <value>#100</value>
71639                </enumeratedValue>
71640                <enumeratedValue>
71641                  <name>101</name>
71642                  <description>Alternative 5 (chip-specific).</description>
71643                  <value>#101</value>
71644                </enumeratedValue>
71645                <enumeratedValue>
71646                  <name>110</name>
71647                  <description>Alternative 6 (chip-specific).</description>
71648                  <value>#110</value>
71649                </enumeratedValue>
71650                <enumeratedValue>
71651                  <name>111</name>
71652                  <description>Alternative 7 (chip-specific).</description>
71653                  <value>#111</value>
71654                </enumeratedValue>
71655              </enumeratedValues>
71656            </field>
71657            <field>
71658              <name>LK</name>
71659              <description>Lock Register</description>
71660              <bitOffset>15</bitOffset>
71661              <bitWidth>1</bitWidth>
71662              <access>read-write</access>
71663              <enumeratedValues>
71664                <enumeratedValue>
71665                  <name>0</name>
71666                  <description>Pin Control Register fields [15:0] are not locked.</description>
71667                  <value>#0</value>
71668                </enumeratedValue>
71669                <enumeratedValue>
71670                  <name>1</name>
71671                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
71672                  <value>#1</value>
71673                </enumeratedValue>
71674              </enumeratedValues>
71675            </field>
71676            <field>
71677              <name>IRQC</name>
71678              <description>Interrupt Configuration</description>
71679              <bitOffset>16</bitOffset>
71680              <bitWidth>4</bitWidth>
71681              <access>read-write</access>
71682              <enumeratedValues>
71683                <enumeratedValue>
71684                  <name>0000</name>
71685                  <description>Interrupt Status Flag (ISF) is disabled.</description>
71686                  <value>#0000</value>
71687                </enumeratedValue>
71688                <enumeratedValue>
71689                  <name>0001</name>
71690                  <description>ISF flag and DMA request on rising edge.</description>
71691                  <value>#0001</value>
71692                </enumeratedValue>
71693                <enumeratedValue>
71694                  <name>0010</name>
71695                  <description>ISF flag and DMA request on falling edge.</description>
71696                  <value>#0010</value>
71697                </enumeratedValue>
71698                <enumeratedValue>
71699                  <name>0011</name>
71700                  <description>ISF flag and DMA request on either edge.</description>
71701                  <value>#0011</value>
71702                </enumeratedValue>
71703                <enumeratedValue>
71704                  <name>1000</name>
71705                  <description>ISF flag and Interrupt when logic 0.</description>
71706                  <value>#1000</value>
71707                </enumeratedValue>
71708                <enumeratedValue>
71709                  <name>1001</name>
71710                  <description>ISF flag and Interrupt on rising-edge.</description>
71711                  <value>#1001</value>
71712                </enumeratedValue>
71713                <enumeratedValue>
71714                  <name>1010</name>
71715                  <description>ISF flag and Interrupt on falling-edge.</description>
71716                  <value>#1010</value>
71717                </enumeratedValue>
71718                <enumeratedValue>
71719                  <name>1011</name>
71720                  <description>ISF flag and Interrupt on either edge.</description>
71721                  <value>#1011</value>
71722                </enumeratedValue>
71723                <enumeratedValue>
71724                  <name>1100</name>
71725                  <description>ISF flag and Interrupt when logic 1.</description>
71726                  <value>#1100</value>
71727                </enumeratedValue>
71728              </enumeratedValues>
71729            </field>
71730            <field>
71731              <name>ISF</name>
71732              <description>Interrupt Status Flag</description>
71733              <bitOffset>24</bitOffset>
71734              <bitWidth>1</bitWidth>
71735              <access>read-write</access>
71736              <enumeratedValues>
71737                <enumeratedValue>
71738                  <name>0</name>
71739                  <description>Configured interrupt is not detected.</description>
71740                  <value>#0</value>
71741                </enumeratedValue>
71742                <enumeratedValue>
71743                  <name>1</name>
71744                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
71745                  <value>#1</value>
71746                </enumeratedValue>
71747              </enumeratedValues>
71748            </field>
71749          </fields>
71750        </register>
71751        <register>
71752          <name>PCR19</name>
71753          <description>Pin Control Register n</description>
71754          <addressOffset>0x4C</addressOffset>
71755          <size>32</size>
71756          <access>read-write</access>
71757          <resetValue>0</resetValue>
71758          <resetMask>0xFFFFFFFF</resetMask>
71759          <fields>
71760            <field>
71761              <name>PS</name>
71762              <description>Pull Select</description>
71763              <bitOffset>0</bitOffset>
71764              <bitWidth>1</bitWidth>
71765              <access>read-write</access>
71766              <enumeratedValues>
71767                <enumeratedValue>
71768                  <name>0</name>
71769                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
71770                  <value>#0</value>
71771                </enumeratedValue>
71772                <enumeratedValue>
71773                  <name>1</name>
71774                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
71775                  <value>#1</value>
71776                </enumeratedValue>
71777              </enumeratedValues>
71778            </field>
71779            <field>
71780              <name>PE</name>
71781              <description>Pull Enable</description>
71782              <bitOffset>1</bitOffset>
71783              <bitWidth>1</bitWidth>
71784              <access>read-write</access>
71785              <enumeratedValues>
71786                <enumeratedValue>
71787                  <name>0</name>
71788                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
71789                  <value>#0</value>
71790                </enumeratedValue>
71791                <enumeratedValue>
71792                  <name>1</name>
71793                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
71794                  <value>#1</value>
71795                </enumeratedValue>
71796              </enumeratedValues>
71797            </field>
71798            <field>
71799              <name>SRE</name>
71800              <description>Slew Rate Enable</description>
71801              <bitOffset>2</bitOffset>
71802              <bitWidth>1</bitWidth>
71803              <access>read-write</access>
71804              <enumeratedValues>
71805                <enumeratedValue>
71806                  <name>0</name>
71807                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
71808                  <value>#0</value>
71809                </enumeratedValue>
71810                <enumeratedValue>
71811                  <name>1</name>
71812                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
71813                  <value>#1</value>
71814                </enumeratedValue>
71815              </enumeratedValues>
71816            </field>
71817            <field>
71818              <name>PFE</name>
71819              <description>Passive Filter Enable</description>
71820              <bitOffset>4</bitOffset>
71821              <bitWidth>1</bitWidth>
71822              <access>read-only</access>
71823              <enumeratedValues>
71824                <enumeratedValue>
71825                  <name>0</name>
71826                  <description>Passive input filter is disabled on the corresponding pin.</description>
71827                  <value>#0</value>
71828                </enumeratedValue>
71829                <enumeratedValue>
71830                  <name>1</name>
71831                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
71832                  <value>#1</value>
71833                </enumeratedValue>
71834              </enumeratedValues>
71835            </field>
71836            <field>
71837              <name>ODE</name>
71838              <description>Open Drain Enable</description>
71839              <bitOffset>5</bitOffset>
71840              <bitWidth>1</bitWidth>
71841              <access>read-write</access>
71842              <enumeratedValues>
71843                <enumeratedValue>
71844                  <name>0</name>
71845                  <description>Open drain output is disabled on the corresponding pin.</description>
71846                  <value>#0</value>
71847                </enumeratedValue>
71848                <enumeratedValue>
71849                  <name>1</name>
71850                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
71851                  <value>#1</value>
71852                </enumeratedValue>
71853              </enumeratedValues>
71854            </field>
71855            <field>
71856              <name>DSE</name>
71857              <description>Drive Strength Enable</description>
71858              <bitOffset>6</bitOffset>
71859              <bitWidth>1</bitWidth>
71860              <access>read-only</access>
71861              <enumeratedValues>
71862                <enumeratedValue>
71863                  <name>0</name>
71864                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
71865                  <value>#0</value>
71866                </enumeratedValue>
71867                <enumeratedValue>
71868                  <name>1</name>
71869                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
71870                  <value>#1</value>
71871                </enumeratedValue>
71872              </enumeratedValues>
71873            </field>
71874            <field>
71875              <name>MUX</name>
71876              <description>Pin Mux Control</description>
71877              <bitOffset>8</bitOffset>
71878              <bitWidth>3</bitWidth>
71879              <access>read-write</access>
71880              <enumeratedValues>
71881                <enumeratedValue>
71882                  <name>000</name>
71883                  <description>Pin disabled (Alternative 0) (analog).</description>
71884                  <value>#000</value>
71885                </enumeratedValue>
71886                <enumeratedValue>
71887                  <name>001</name>
71888                  <description>Alternative 1 (GPIO).</description>
71889                  <value>#001</value>
71890                </enumeratedValue>
71891                <enumeratedValue>
71892                  <name>010</name>
71893                  <description>Alternative 2 (chip-specific).</description>
71894                  <value>#010</value>
71895                </enumeratedValue>
71896                <enumeratedValue>
71897                  <name>011</name>
71898                  <description>Alternative 3 (chip-specific).</description>
71899                  <value>#011</value>
71900                </enumeratedValue>
71901                <enumeratedValue>
71902                  <name>100</name>
71903                  <description>Alternative 4 (chip-specific).</description>
71904                  <value>#100</value>
71905                </enumeratedValue>
71906                <enumeratedValue>
71907                  <name>101</name>
71908                  <description>Alternative 5 (chip-specific).</description>
71909                  <value>#101</value>
71910                </enumeratedValue>
71911                <enumeratedValue>
71912                  <name>110</name>
71913                  <description>Alternative 6 (chip-specific).</description>
71914                  <value>#110</value>
71915                </enumeratedValue>
71916                <enumeratedValue>
71917                  <name>111</name>
71918                  <description>Alternative 7 (chip-specific).</description>
71919                  <value>#111</value>
71920                </enumeratedValue>
71921              </enumeratedValues>
71922            </field>
71923            <field>
71924              <name>LK</name>
71925              <description>Lock Register</description>
71926              <bitOffset>15</bitOffset>
71927              <bitWidth>1</bitWidth>
71928              <access>read-write</access>
71929              <enumeratedValues>
71930                <enumeratedValue>
71931                  <name>0</name>
71932                  <description>Pin Control Register fields [15:0] are not locked.</description>
71933                  <value>#0</value>
71934                </enumeratedValue>
71935                <enumeratedValue>
71936                  <name>1</name>
71937                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
71938                  <value>#1</value>
71939                </enumeratedValue>
71940              </enumeratedValues>
71941            </field>
71942            <field>
71943              <name>IRQC</name>
71944              <description>Interrupt Configuration</description>
71945              <bitOffset>16</bitOffset>
71946              <bitWidth>4</bitWidth>
71947              <access>read-write</access>
71948              <enumeratedValues>
71949                <enumeratedValue>
71950                  <name>0000</name>
71951                  <description>Interrupt Status Flag (ISF) is disabled.</description>
71952                  <value>#0000</value>
71953                </enumeratedValue>
71954                <enumeratedValue>
71955                  <name>0001</name>
71956                  <description>ISF flag and DMA request on rising edge.</description>
71957                  <value>#0001</value>
71958                </enumeratedValue>
71959                <enumeratedValue>
71960                  <name>0010</name>
71961                  <description>ISF flag and DMA request on falling edge.</description>
71962                  <value>#0010</value>
71963                </enumeratedValue>
71964                <enumeratedValue>
71965                  <name>0011</name>
71966                  <description>ISF flag and DMA request on either edge.</description>
71967                  <value>#0011</value>
71968                </enumeratedValue>
71969                <enumeratedValue>
71970                  <name>1000</name>
71971                  <description>ISF flag and Interrupt when logic 0.</description>
71972                  <value>#1000</value>
71973                </enumeratedValue>
71974                <enumeratedValue>
71975                  <name>1001</name>
71976                  <description>ISF flag and Interrupt on rising-edge.</description>
71977                  <value>#1001</value>
71978                </enumeratedValue>
71979                <enumeratedValue>
71980                  <name>1010</name>
71981                  <description>ISF flag and Interrupt on falling-edge.</description>
71982                  <value>#1010</value>
71983                </enumeratedValue>
71984                <enumeratedValue>
71985                  <name>1011</name>
71986                  <description>ISF flag and Interrupt on either edge.</description>
71987                  <value>#1011</value>
71988                </enumeratedValue>
71989                <enumeratedValue>
71990                  <name>1100</name>
71991                  <description>ISF flag and Interrupt when logic 1.</description>
71992                  <value>#1100</value>
71993                </enumeratedValue>
71994              </enumeratedValues>
71995            </field>
71996            <field>
71997              <name>ISF</name>
71998              <description>Interrupt Status Flag</description>
71999              <bitOffset>24</bitOffset>
72000              <bitWidth>1</bitWidth>
72001              <access>read-write</access>
72002              <enumeratedValues>
72003                <enumeratedValue>
72004                  <name>0</name>
72005                  <description>Configured interrupt is not detected.</description>
72006                  <value>#0</value>
72007                </enumeratedValue>
72008                <enumeratedValue>
72009                  <name>1</name>
72010                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
72011                  <value>#1</value>
72012                </enumeratedValue>
72013              </enumeratedValues>
72014            </field>
72015          </fields>
72016        </register>
72017        <register>
72018          <name>PCR20</name>
72019          <description>Pin Control Register n</description>
72020          <addressOffset>0x50</addressOffset>
72021          <size>32</size>
72022          <access>read-write</access>
72023          <resetValue>0</resetValue>
72024          <resetMask>0xFFFFFFFF</resetMask>
72025          <fields>
72026            <field>
72027              <name>PS</name>
72028              <description>Pull Select</description>
72029              <bitOffset>0</bitOffset>
72030              <bitWidth>1</bitWidth>
72031              <access>read-write</access>
72032              <enumeratedValues>
72033                <enumeratedValue>
72034                  <name>0</name>
72035                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
72036                  <value>#0</value>
72037                </enumeratedValue>
72038                <enumeratedValue>
72039                  <name>1</name>
72040                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
72041                  <value>#1</value>
72042                </enumeratedValue>
72043              </enumeratedValues>
72044            </field>
72045            <field>
72046              <name>PE</name>
72047              <description>Pull Enable</description>
72048              <bitOffset>1</bitOffset>
72049              <bitWidth>1</bitWidth>
72050              <access>read-write</access>
72051              <enumeratedValues>
72052                <enumeratedValue>
72053                  <name>0</name>
72054                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
72055                  <value>#0</value>
72056                </enumeratedValue>
72057                <enumeratedValue>
72058                  <name>1</name>
72059                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
72060                  <value>#1</value>
72061                </enumeratedValue>
72062              </enumeratedValues>
72063            </field>
72064            <field>
72065              <name>SRE</name>
72066              <description>Slew Rate Enable</description>
72067              <bitOffset>2</bitOffset>
72068              <bitWidth>1</bitWidth>
72069              <access>read-write</access>
72070              <enumeratedValues>
72071                <enumeratedValue>
72072                  <name>0</name>
72073                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
72074                  <value>#0</value>
72075                </enumeratedValue>
72076                <enumeratedValue>
72077                  <name>1</name>
72078                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
72079                  <value>#1</value>
72080                </enumeratedValue>
72081              </enumeratedValues>
72082            </field>
72083            <field>
72084              <name>PFE</name>
72085              <description>Passive Filter Enable</description>
72086              <bitOffset>4</bitOffset>
72087              <bitWidth>1</bitWidth>
72088              <access>read-only</access>
72089              <enumeratedValues>
72090                <enumeratedValue>
72091                  <name>0</name>
72092                  <description>Passive input filter is disabled on the corresponding pin.</description>
72093                  <value>#0</value>
72094                </enumeratedValue>
72095                <enumeratedValue>
72096                  <name>1</name>
72097                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
72098                  <value>#1</value>
72099                </enumeratedValue>
72100              </enumeratedValues>
72101            </field>
72102            <field>
72103              <name>ODE</name>
72104              <description>Open Drain Enable</description>
72105              <bitOffset>5</bitOffset>
72106              <bitWidth>1</bitWidth>
72107              <access>read-write</access>
72108              <enumeratedValues>
72109                <enumeratedValue>
72110                  <name>0</name>
72111                  <description>Open drain output is disabled on the corresponding pin.</description>
72112                  <value>#0</value>
72113                </enumeratedValue>
72114                <enumeratedValue>
72115                  <name>1</name>
72116                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
72117                  <value>#1</value>
72118                </enumeratedValue>
72119              </enumeratedValues>
72120            </field>
72121            <field>
72122              <name>DSE</name>
72123              <description>Drive Strength Enable</description>
72124              <bitOffset>6</bitOffset>
72125              <bitWidth>1</bitWidth>
72126              <access>read-only</access>
72127              <enumeratedValues>
72128                <enumeratedValue>
72129                  <name>0</name>
72130                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
72131                  <value>#0</value>
72132                </enumeratedValue>
72133                <enumeratedValue>
72134                  <name>1</name>
72135                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
72136                  <value>#1</value>
72137                </enumeratedValue>
72138              </enumeratedValues>
72139            </field>
72140            <field>
72141              <name>MUX</name>
72142              <description>Pin Mux Control</description>
72143              <bitOffset>8</bitOffset>
72144              <bitWidth>3</bitWidth>
72145              <access>read-write</access>
72146              <enumeratedValues>
72147                <enumeratedValue>
72148                  <name>000</name>
72149                  <description>Pin disabled (Alternative 0) (analog).</description>
72150                  <value>#000</value>
72151                </enumeratedValue>
72152                <enumeratedValue>
72153                  <name>001</name>
72154                  <description>Alternative 1 (GPIO).</description>
72155                  <value>#001</value>
72156                </enumeratedValue>
72157                <enumeratedValue>
72158                  <name>010</name>
72159                  <description>Alternative 2 (chip-specific).</description>
72160                  <value>#010</value>
72161                </enumeratedValue>
72162                <enumeratedValue>
72163                  <name>011</name>
72164                  <description>Alternative 3 (chip-specific).</description>
72165                  <value>#011</value>
72166                </enumeratedValue>
72167                <enumeratedValue>
72168                  <name>100</name>
72169                  <description>Alternative 4 (chip-specific).</description>
72170                  <value>#100</value>
72171                </enumeratedValue>
72172                <enumeratedValue>
72173                  <name>101</name>
72174                  <description>Alternative 5 (chip-specific).</description>
72175                  <value>#101</value>
72176                </enumeratedValue>
72177                <enumeratedValue>
72178                  <name>110</name>
72179                  <description>Alternative 6 (chip-specific).</description>
72180                  <value>#110</value>
72181                </enumeratedValue>
72182                <enumeratedValue>
72183                  <name>111</name>
72184                  <description>Alternative 7 (chip-specific).</description>
72185                  <value>#111</value>
72186                </enumeratedValue>
72187              </enumeratedValues>
72188            </field>
72189            <field>
72190              <name>LK</name>
72191              <description>Lock Register</description>
72192              <bitOffset>15</bitOffset>
72193              <bitWidth>1</bitWidth>
72194              <access>read-write</access>
72195              <enumeratedValues>
72196                <enumeratedValue>
72197                  <name>0</name>
72198                  <description>Pin Control Register fields [15:0] are not locked.</description>
72199                  <value>#0</value>
72200                </enumeratedValue>
72201                <enumeratedValue>
72202                  <name>1</name>
72203                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
72204                  <value>#1</value>
72205                </enumeratedValue>
72206              </enumeratedValues>
72207            </field>
72208            <field>
72209              <name>IRQC</name>
72210              <description>Interrupt Configuration</description>
72211              <bitOffset>16</bitOffset>
72212              <bitWidth>4</bitWidth>
72213              <access>read-write</access>
72214              <enumeratedValues>
72215                <enumeratedValue>
72216                  <name>0000</name>
72217                  <description>Interrupt Status Flag (ISF) is disabled.</description>
72218                  <value>#0000</value>
72219                </enumeratedValue>
72220                <enumeratedValue>
72221                  <name>0001</name>
72222                  <description>ISF flag and DMA request on rising edge.</description>
72223                  <value>#0001</value>
72224                </enumeratedValue>
72225                <enumeratedValue>
72226                  <name>0010</name>
72227                  <description>ISF flag and DMA request on falling edge.</description>
72228                  <value>#0010</value>
72229                </enumeratedValue>
72230                <enumeratedValue>
72231                  <name>0011</name>
72232                  <description>ISF flag and DMA request on either edge.</description>
72233                  <value>#0011</value>
72234                </enumeratedValue>
72235                <enumeratedValue>
72236                  <name>1000</name>
72237                  <description>ISF flag and Interrupt when logic 0.</description>
72238                  <value>#1000</value>
72239                </enumeratedValue>
72240                <enumeratedValue>
72241                  <name>1001</name>
72242                  <description>ISF flag and Interrupt on rising-edge.</description>
72243                  <value>#1001</value>
72244                </enumeratedValue>
72245                <enumeratedValue>
72246                  <name>1010</name>
72247                  <description>ISF flag and Interrupt on falling-edge.</description>
72248                  <value>#1010</value>
72249                </enumeratedValue>
72250                <enumeratedValue>
72251                  <name>1011</name>
72252                  <description>ISF flag and Interrupt on either edge.</description>
72253                  <value>#1011</value>
72254                </enumeratedValue>
72255                <enumeratedValue>
72256                  <name>1100</name>
72257                  <description>ISF flag and Interrupt when logic 1.</description>
72258                  <value>#1100</value>
72259                </enumeratedValue>
72260              </enumeratedValues>
72261            </field>
72262            <field>
72263              <name>ISF</name>
72264              <description>Interrupt Status Flag</description>
72265              <bitOffset>24</bitOffset>
72266              <bitWidth>1</bitWidth>
72267              <access>read-write</access>
72268              <enumeratedValues>
72269                <enumeratedValue>
72270                  <name>0</name>
72271                  <description>Configured interrupt is not detected.</description>
72272                  <value>#0</value>
72273                </enumeratedValue>
72274                <enumeratedValue>
72275                  <name>1</name>
72276                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
72277                  <value>#1</value>
72278                </enumeratedValue>
72279              </enumeratedValues>
72280            </field>
72281          </fields>
72282        </register>
72283        <register>
72284          <name>PCR21</name>
72285          <description>Pin Control Register n</description>
72286          <addressOffset>0x54</addressOffset>
72287          <size>32</size>
72288          <access>read-write</access>
72289          <resetValue>0</resetValue>
72290          <resetMask>0xFFFFFFFF</resetMask>
72291          <fields>
72292            <field>
72293              <name>PS</name>
72294              <description>Pull Select</description>
72295              <bitOffset>0</bitOffset>
72296              <bitWidth>1</bitWidth>
72297              <access>read-write</access>
72298              <enumeratedValues>
72299                <enumeratedValue>
72300                  <name>0</name>
72301                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
72302                  <value>#0</value>
72303                </enumeratedValue>
72304                <enumeratedValue>
72305                  <name>1</name>
72306                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
72307                  <value>#1</value>
72308                </enumeratedValue>
72309              </enumeratedValues>
72310            </field>
72311            <field>
72312              <name>PE</name>
72313              <description>Pull Enable</description>
72314              <bitOffset>1</bitOffset>
72315              <bitWidth>1</bitWidth>
72316              <access>read-write</access>
72317              <enumeratedValues>
72318                <enumeratedValue>
72319                  <name>0</name>
72320                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
72321                  <value>#0</value>
72322                </enumeratedValue>
72323                <enumeratedValue>
72324                  <name>1</name>
72325                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
72326                  <value>#1</value>
72327                </enumeratedValue>
72328              </enumeratedValues>
72329            </field>
72330            <field>
72331              <name>SRE</name>
72332              <description>Slew Rate Enable</description>
72333              <bitOffset>2</bitOffset>
72334              <bitWidth>1</bitWidth>
72335              <access>read-write</access>
72336              <enumeratedValues>
72337                <enumeratedValue>
72338                  <name>0</name>
72339                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
72340                  <value>#0</value>
72341                </enumeratedValue>
72342                <enumeratedValue>
72343                  <name>1</name>
72344                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
72345                  <value>#1</value>
72346                </enumeratedValue>
72347              </enumeratedValues>
72348            </field>
72349            <field>
72350              <name>PFE</name>
72351              <description>Passive Filter Enable</description>
72352              <bitOffset>4</bitOffset>
72353              <bitWidth>1</bitWidth>
72354              <access>read-only</access>
72355              <enumeratedValues>
72356                <enumeratedValue>
72357                  <name>0</name>
72358                  <description>Passive input filter is disabled on the corresponding pin.</description>
72359                  <value>#0</value>
72360                </enumeratedValue>
72361                <enumeratedValue>
72362                  <name>1</name>
72363                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
72364                  <value>#1</value>
72365                </enumeratedValue>
72366              </enumeratedValues>
72367            </field>
72368            <field>
72369              <name>ODE</name>
72370              <description>Open Drain Enable</description>
72371              <bitOffset>5</bitOffset>
72372              <bitWidth>1</bitWidth>
72373              <access>read-write</access>
72374              <enumeratedValues>
72375                <enumeratedValue>
72376                  <name>0</name>
72377                  <description>Open drain output is disabled on the corresponding pin.</description>
72378                  <value>#0</value>
72379                </enumeratedValue>
72380                <enumeratedValue>
72381                  <name>1</name>
72382                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
72383                  <value>#1</value>
72384                </enumeratedValue>
72385              </enumeratedValues>
72386            </field>
72387            <field>
72388              <name>DSE</name>
72389              <description>Drive Strength Enable</description>
72390              <bitOffset>6</bitOffset>
72391              <bitWidth>1</bitWidth>
72392              <access>read-only</access>
72393              <enumeratedValues>
72394                <enumeratedValue>
72395                  <name>0</name>
72396                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
72397                  <value>#0</value>
72398                </enumeratedValue>
72399                <enumeratedValue>
72400                  <name>1</name>
72401                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
72402                  <value>#1</value>
72403                </enumeratedValue>
72404              </enumeratedValues>
72405            </field>
72406            <field>
72407              <name>MUX</name>
72408              <description>Pin Mux Control</description>
72409              <bitOffset>8</bitOffset>
72410              <bitWidth>3</bitWidth>
72411              <access>read-write</access>
72412              <enumeratedValues>
72413                <enumeratedValue>
72414                  <name>000</name>
72415                  <description>Pin disabled (Alternative 0) (analog).</description>
72416                  <value>#000</value>
72417                </enumeratedValue>
72418                <enumeratedValue>
72419                  <name>001</name>
72420                  <description>Alternative 1 (GPIO).</description>
72421                  <value>#001</value>
72422                </enumeratedValue>
72423                <enumeratedValue>
72424                  <name>010</name>
72425                  <description>Alternative 2 (chip-specific).</description>
72426                  <value>#010</value>
72427                </enumeratedValue>
72428                <enumeratedValue>
72429                  <name>011</name>
72430                  <description>Alternative 3 (chip-specific).</description>
72431                  <value>#011</value>
72432                </enumeratedValue>
72433                <enumeratedValue>
72434                  <name>100</name>
72435                  <description>Alternative 4 (chip-specific).</description>
72436                  <value>#100</value>
72437                </enumeratedValue>
72438                <enumeratedValue>
72439                  <name>101</name>
72440                  <description>Alternative 5 (chip-specific).</description>
72441                  <value>#101</value>
72442                </enumeratedValue>
72443                <enumeratedValue>
72444                  <name>110</name>
72445                  <description>Alternative 6 (chip-specific).</description>
72446                  <value>#110</value>
72447                </enumeratedValue>
72448                <enumeratedValue>
72449                  <name>111</name>
72450                  <description>Alternative 7 (chip-specific).</description>
72451                  <value>#111</value>
72452                </enumeratedValue>
72453              </enumeratedValues>
72454            </field>
72455            <field>
72456              <name>LK</name>
72457              <description>Lock Register</description>
72458              <bitOffset>15</bitOffset>
72459              <bitWidth>1</bitWidth>
72460              <access>read-write</access>
72461              <enumeratedValues>
72462                <enumeratedValue>
72463                  <name>0</name>
72464                  <description>Pin Control Register fields [15:0] are not locked.</description>
72465                  <value>#0</value>
72466                </enumeratedValue>
72467                <enumeratedValue>
72468                  <name>1</name>
72469                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
72470                  <value>#1</value>
72471                </enumeratedValue>
72472              </enumeratedValues>
72473            </field>
72474            <field>
72475              <name>IRQC</name>
72476              <description>Interrupt Configuration</description>
72477              <bitOffset>16</bitOffset>
72478              <bitWidth>4</bitWidth>
72479              <access>read-write</access>
72480              <enumeratedValues>
72481                <enumeratedValue>
72482                  <name>0000</name>
72483                  <description>Interrupt Status Flag (ISF) is disabled.</description>
72484                  <value>#0000</value>
72485                </enumeratedValue>
72486                <enumeratedValue>
72487                  <name>0001</name>
72488                  <description>ISF flag and DMA request on rising edge.</description>
72489                  <value>#0001</value>
72490                </enumeratedValue>
72491                <enumeratedValue>
72492                  <name>0010</name>
72493                  <description>ISF flag and DMA request on falling edge.</description>
72494                  <value>#0010</value>
72495                </enumeratedValue>
72496                <enumeratedValue>
72497                  <name>0011</name>
72498                  <description>ISF flag and DMA request on either edge.</description>
72499                  <value>#0011</value>
72500                </enumeratedValue>
72501                <enumeratedValue>
72502                  <name>1000</name>
72503                  <description>ISF flag and Interrupt when logic 0.</description>
72504                  <value>#1000</value>
72505                </enumeratedValue>
72506                <enumeratedValue>
72507                  <name>1001</name>
72508                  <description>ISF flag and Interrupt on rising-edge.</description>
72509                  <value>#1001</value>
72510                </enumeratedValue>
72511                <enumeratedValue>
72512                  <name>1010</name>
72513                  <description>ISF flag and Interrupt on falling-edge.</description>
72514                  <value>#1010</value>
72515                </enumeratedValue>
72516                <enumeratedValue>
72517                  <name>1011</name>
72518                  <description>ISF flag and Interrupt on either edge.</description>
72519                  <value>#1011</value>
72520                </enumeratedValue>
72521                <enumeratedValue>
72522                  <name>1100</name>
72523                  <description>ISF flag and Interrupt when logic 1.</description>
72524                  <value>#1100</value>
72525                </enumeratedValue>
72526              </enumeratedValues>
72527            </field>
72528            <field>
72529              <name>ISF</name>
72530              <description>Interrupt Status Flag</description>
72531              <bitOffset>24</bitOffset>
72532              <bitWidth>1</bitWidth>
72533              <access>read-write</access>
72534              <enumeratedValues>
72535                <enumeratedValue>
72536                  <name>0</name>
72537                  <description>Configured interrupt is not detected.</description>
72538                  <value>#0</value>
72539                </enumeratedValue>
72540                <enumeratedValue>
72541                  <name>1</name>
72542                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
72543                  <value>#1</value>
72544                </enumeratedValue>
72545              </enumeratedValues>
72546            </field>
72547          </fields>
72548        </register>
72549        <register>
72550          <name>PCR22</name>
72551          <description>Pin Control Register n</description>
72552          <addressOffset>0x58</addressOffset>
72553          <size>32</size>
72554          <access>read-write</access>
72555          <resetValue>0</resetValue>
72556          <resetMask>0xFFFFFFFF</resetMask>
72557          <fields>
72558            <field>
72559              <name>PS</name>
72560              <description>Pull Select</description>
72561              <bitOffset>0</bitOffset>
72562              <bitWidth>1</bitWidth>
72563              <access>read-write</access>
72564              <enumeratedValues>
72565                <enumeratedValue>
72566                  <name>0</name>
72567                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
72568                  <value>#0</value>
72569                </enumeratedValue>
72570                <enumeratedValue>
72571                  <name>1</name>
72572                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
72573                  <value>#1</value>
72574                </enumeratedValue>
72575              </enumeratedValues>
72576            </field>
72577            <field>
72578              <name>PE</name>
72579              <description>Pull Enable</description>
72580              <bitOffset>1</bitOffset>
72581              <bitWidth>1</bitWidth>
72582              <access>read-write</access>
72583              <enumeratedValues>
72584                <enumeratedValue>
72585                  <name>0</name>
72586                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
72587                  <value>#0</value>
72588                </enumeratedValue>
72589                <enumeratedValue>
72590                  <name>1</name>
72591                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
72592                  <value>#1</value>
72593                </enumeratedValue>
72594              </enumeratedValues>
72595            </field>
72596            <field>
72597              <name>SRE</name>
72598              <description>Slew Rate Enable</description>
72599              <bitOffset>2</bitOffset>
72600              <bitWidth>1</bitWidth>
72601              <access>read-write</access>
72602              <enumeratedValues>
72603                <enumeratedValue>
72604                  <name>0</name>
72605                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
72606                  <value>#0</value>
72607                </enumeratedValue>
72608                <enumeratedValue>
72609                  <name>1</name>
72610                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
72611                  <value>#1</value>
72612                </enumeratedValue>
72613              </enumeratedValues>
72614            </field>
72615            <field>
72616              <name>PFE</name>
72617              <description>Passive Filter Enable</description>
72618              <bitOffset>4</bitOffset>
72619              <bitWidth>1</bitWidth>
72620              <access>read-only</access>
72621              <enumeratedValues>
72622                <enumeratedValue>
72623                  <name>0</name>
72624                  <description>Passive input filter is disabled on the corresponding pin.</description>
72625                  <value>#0</value>
72626                </enumeratedValue>
72627                <enumeratedValue>
72628                  <name>1</name>
72629                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
72630                  <value>#1</value>
72631                </enumeratedValue>
72632              </enumeratedValues>
72633            </field>
72634            <field>
72635              <name>ODE</name>
72636              <description>Open Drain Enable</description>
72637              <bitOffset>5</bitOffset>
72638              <bitWidth>1</bitWidth>
72639              <access>read-write</access>
72640              <enumeratedValues>
72641                <enumeratedValue>
72642                  <name>0</name>
72643                  <description>Open drain output is disabled on the corresponding pin.</description>
72644                  <value>#0</value>
72645                </enumeratedValue>
72646                <enumeratedValue>
72647                  <name>1</name>
72648                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
72649                  <value>#1</value>
72650                </enumeratedValue>
72651              </enumeratedValues>
72652            </field>
72653            <field>
72654              <name>DSE</name>
72655              <description>Drive Strength Enable</description>
72656              <bitOffset>6</bitOffset>
72657              <bitWidth>1</bitWidth>
72658              <access>read-only</access>
72659              <enumeratedValues>
72660                <enumeratedValue>
72661                  <name>0</name>
72662                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
72663                  <value>#0</value>
72664                </enumeratedValue>
72665                <enumeratedValue>
72666                  <name>1</name>
72667                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
72668                  <value>#1</value>
72669                </enumeratedValue>
72670              </enumeratedValues>
72671            </field>
72672            <field>
72673              <name>MUX</name>
72674              <description>Pin Mux Control</description>
72675              <bitOffset>8</bitOffset>
72676              <bitWidth>3</bitWidth>
72677              <access>read-write</access>
72678              <enumeratedValues>
72679                <enumeratedValue>
72680                  <name>000</name>
72681                  <description>Pin disabled (Alternative 0) (analog).</description>
72682                  <value>#000</value>
72683                </enumeratedValue>
72684                <enumeratedValue>
72685                  <name>001</name>
72686                  <description>Alternative 1 (GPIO).</description>
72687                  <value>#001</value>
72688                </enumeratedValue>
72689                <enumeratedValue>
72690                  <name>010</name>
72691                  <description>Alternative 2 (chip-specific).</description>
72692                  <value>#010</value>
72693                </enumeratedValue>
72694                <enumeratedValue>
72695                  <name>011</name>
72696                  <description>Alternative 3 (chip-specific).</description>
72697                  <value>#011</value>
72698                </enumeratedValue>
72699                <enumeratedValue>
72700                  <name>100</name>
72701                  <description>Alternative 4 (chip-specific).</description>
72702                  <value>#100</value>
72703                </enumeratedValue>
72704                <enumeratedValue>
72705                  <name>101</name>
72706                  <description>Alternative 5 (chip-specific).</description>
72707                  <value>#101</value>
72708                </enumeratedValue>
72709                <enumeratedValue>
72710                  <name>110</name>
72711                  <description>Alternative 6 (chip-specific).</description>
72712                  <value>#110</value>
72713                </enumeratedValue>
72714                <enumeratedValue>
72715                  <name>111</name>
72716                  <description>Alternative 7 (chip-specific).</description>
72717                  <value>#111</value>
72718                </enumeratedValue>
72719              </enumeratedValues>
72720            </field>
72721            <field>
72722              <name>LK</name>
72723              <description>Lock Register</description>
72724              <bitOffset>15</bitOffset>
72725              <bitWidth>1</bitWidth>
72726              <access>read-write</access>
72727              <enumeratedValues>
72728                <enumeratedValue>
72729                  <name>0</name>
72730                  <description>Pin Control Register fields [15:0] are not locked.</description>
72731                  <value>#0</value>
72732                </enumeratedValue>
72733                <enumeratedValue>
72734                  <name>1</name>
72735                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
72736                  <value>#1</value>
72737                </enumeratedValue>
72738              </enumeratedValues>
72739            </field>
72740            <field>
72741              <name>IRQC</name>
72742              <description>Interrupt Configuration</description>
72743              <bitOffset>16</bitOffset>
72744              <bitWidth>4</bitWidth>
72745              <access>read-write</access>
72746              <enumeratedValues>
72747                <enumeratedValue>
72748                  <name>0000</name>
72749                  <description>Interrupt Status Flag (ISF) is disabled.</description>
72750                  <value>#0000</value>
72751                </enumeratedValue>
72752                <enumeratedValue>
72753                  <name>0001</name>
72754                  <description>ISF flag and DMA request on rising edge.</description>
72755                  <value>#0001</value>
72756                </enumeratedValue>
72757                <enumeratedValue>
72758                  <name>0010</name>
72759                  <description>ISF flag and DMA request on falling edge.</description>
72760                  <value>#0010</value>
72761                </enumeratedValue>
72762                <enumeratedValue>
72763                  <name>0011</name>
72764                  <description>ISF flag and DMA request on either edge.</description>
72765                  <value>#0011</value>
72766                </enumeratedValue>
72767                <enumeratedValue>
72768                  <name>1000</name>
72769                  <description>ISF flag and Interrupt when logic 0.</description>
72770                  <value>#1000</value>
72771                </enumeratedValue>
72772                <enumeratedValue>
72773                  <name>1001</name>
72774                  <description>ISF flag and Interrupt on rising-edge.</description>
72775                  <value>#1001</value>
72776                </enumeratedValue>
72777                <enumeratedValue>
72778                  <name>1010</name>
72779                  <description>ISF flag and Interrupt on falling-edge.</description>
72780                  <value>#1010</value>
72781                </enumeratedValue>
72782                <enumeratedValue>
72783                  <name>1011</name>
72784                  <description>ISF flag and Interrupt on either edge.</description>
72785                  <value>#1011</value>
72786                </enumeratedValue>
72787                <enumeratedValue>
72788                  <name>1100</name>
72789                  <description>ISF flag and Interrupt when logic 1.</description>
72790                  <value>#1100</value>
72791                </enumeratedValue>
72792              </enumeratedValues>
72793            </field>
72794            <field>
72795              <name>ISF</name>
72796              <description>Interrupt Status Flag</description>
72797              <bitOffset>24</bitOffset>
72798              <bitWidth>1</bitWidth>
72799              <access>read-write</access>
72800              <enumeratedValues>
72801                <enumeratedValue>
72802                  <name>0</name>
72803                  <description>Configured interrupt is not detected.</description>
72804                  <value>#0</value>
72805                </enumeratedValue>
72806                <enumeratedValue>
72807                  <name>1</name>
72808                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
72809                  <value>#1</value>
72810                </enumeratedValue>
72811              </enumeratedValues>
72812            </field>
72813          </fields>
72814        </register>
72815        <register>
72816          <name>PCR23</name>
72817          <description>Pin Control Register n</description>
72818          <addressOffset>0x5C</addressOffset>
72819          <size>32</size>
72820          <access>read-write</access>
72821          <resetValue>0</resetValue>
72822          <resetMask>0xFFFFFFFF</resetMask>
72823          <fields>
72824            <field>
72825              <name>PS</name>
72826              <description>Pull Select</description>
72827              <bitOffset>0</bitOffset>
72828              <bitWidth>1</bitWidth>
72829              <access>read-write</access>
72830              <enumeratedValues>
72831                <enumeratedValue>
72832                  <name>0</name>
72833                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
72834                  <value>#0</value>
72835                </enumeratedValue>
72836                <enumeratedValue>
72837                  <name>1</name>
72838                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
72839                  <value>#1</value>
72840                </enumeratedValue>
72841              </enumeratedValues>
72842            </field>
72843            <field>
72844              <name>PE</name>
72845              <description>Pull Enable</description>
72846              <bitOffset>1</bitOffset>
72847              <bitWidth>1</bitWidth>
72848              <access>read-write</access>
72849              <enumeratedValues>
72850                <enumeratedValue>
72851                  <name>0</name>
72852                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
72853                  <value>#0</value>
72854                </enumeratedValue>
72855                <enumeratedValue>
72856                  <name>1</name>
72857                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
72858                  <value>#1</value>
72859                </enumeratedValue>
72860              </enumeratedValues>
72861            </field>
72862            <field>
72863              <name>SRE</name>
72864              <description>Slew Rate Enable</description>
72865              <bitOffset>2</bitOffset>
72866              <bitWidth>1</bitWidth>
72867              <access>read-write</access>
72868              <enumeratedValues>
72869                <enumeratedValue>
72870                  <name>0</name>
72871                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
72872                  <value>#0</value>
72873                </enumeratedValue>
72874                <enumeratedValue>
72875                  <name>1</name>
72876                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
72877                  <value>#1</value>
72878                </enumeratedValue>
72879              </enumeratedValues>
72880            </field>
72881            <field>
72882              <name>PFE</name>
72883              <description>Passive Filter Enable</description>
72884              <bitOffset>4</bitOffset>
72885              <bitWidth>1</bitWidth>
72886              <access>read-only</access>
72887              <enumeratedValues>
72888                <enumeratedValue>
72889                  <name>0</name>
72890                  <description>Passive input filter is disabled on the corresponding pin.</description>
72891                  <value>#0</value>
72892                </enumeratedValue>
72893                <enumeratedValue>
72894                  <name>1</name>
72895                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
72896                  <value>#1</value>
72897                </enumeratedValue>
72898              </enumeratedValues>
72899            </field>
72900            <field>
72901              <name>ODE</name>
72902              <description>Open Drain Enable</description>
72903              <bitOffset>5</bitOffset>
72904              <bitWidth>1</bitWidth>
72905              <access>read-write</access>
72906              <enumeratedValues>
72907                <enumeratedValue>
72908                  <name>0</name>
72909                  <description>Open drain output is disabled on the corresponding pin.</description>
72910                  <value>#0</value>
72911                </enumeratedValue>
72912                <enumeratedValue>
72913                  <name>1</name>
72914                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
72915                  <value>#1</value>
72916                </enumeratedValue>
72917              </enumeratedValues>
72918            </field>
72919            <field>
72920              <name>DSE</name>
72921              <description>Drive Strength Enable</description>
72922              <bitOffset>6</bitOffset>
72923              <bitWidth>1</bitWidth>
72924              <access>read-only</access>
72925              <enumeratedValues>
72926                <enumeratedValue>
72927                  <name>0</name>
72928                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
72929                  <value>#0</value>
72930                </enumeratedValue>
72931                <enumeratedValue>
72932                  <name>1</name>
72933                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
72934                  <value>#1</value>
72935                </enumeratedValue>
72936              </enumeratedValues>
72937            </field>
72938            <field>
72939              <name>MUX</name>
72940              <description>Pin Mux Control</description>
72941              <bitOffset>8</bitOffset>
72942              <bitWidth>3</bitWidth>
72943              <access>read-write</access>
72944              <enumeratedValues>
72945                <enumeratedValue>
72946                  <name>000</name>
72947                  <description>Pin disabled (Alternative 0) (analog).</description>
72948                  <value>#000</value>
72949                </enumeratedValue>
72950                <enumeratedValue>
72951                  <name>001</name>
72952                  <description>Alternative 1 (GPIO).</description>
72953                  <value>#001</value>
72954                </enumeratedValue>
72955                <enumeratedValue>
72956                  <name>010</name>
72957                  <description>Alternative 2 (chip-specific).</description>
72958                  <value>#010</value>
72959                </enumeratedValue>
72960                <enumeratedValue>
72961                  <name>011</name>
72962                  <description>Alternative 3 (chip-specific).</description>
72963                  <value>#011</value>
72964                </enumeratedValue>
72965                <enumeratedValue>
72966                  <name>100</name>
72967                  <description>Alternative 4 (chip-specific).</description>
72968                  <value>#100</value>
72969                </enumeratedValue>
72970                <enumeratedValue>
72971                  <name>101</name>
72972                  <description>Alternative 5 (chip-specific).</description>
72973                  <value>#101</value>
72974                </enumeratedValue>
72975                <enumeratedValue>
72976                  <name>110</name>
72977                  <description>Alternative 6 (chip-specific).</description>
72978                  <value>#110</value>
72979                </enumeratedValue>
72980                <enumeratedValue>
72981                  <name>111</name>
72982                  <description>Alternative 7 (chip-specific).</description>
72983                  <value>#111</value>
72984                </enumeratedValue>
72985              </enumeratedValues>
72986            </field>
72987            <field>
72988              <name>LK</name>
72989              <description>Lock Register</description>
72990              <bitOffset>15</bitOffset>
72991              <bitWidth>1</bitWidth>
72992              <access>read-write</access>
72993              <enumeratedValues>
72994                <enumeratedValue>
72995                  <name>0</name>
72996                  <description>Pin Control Register fields [15:0] are not locked.</description>
72997                  <value>#0</value>
72998                </enumeratedValue>
72999                <enumeratedValue>
73000                  <name>1</name>
73001                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
73002                  <value>#1</value>
73003                </enumeratedValue>
73004              </enumeratedValues>
73005            </field>
73006            <field>
73007              <name>IRQC</name>
73008              <description>Interrupt Configuration</description>
73009              <bitOffset>16</bitOffset>
73010              <bitWidth>4</bitWidth>
73011              <access>read-write</access>
73012              <enumeratedValues>
73013                <enumeratedValue>
73014                  <name>0000</name>
73015                  <description>Interrupt Status Flag (ISF) is disabled.</description>
73016                  <value>#0000</value>
73017                </enumeratedValue>
73018                <enumeratedValue>
73019                  <name>0001</name>
73020                  <description>ISF flag and DMA request on rising edge.</description>
73021                  <value>#0001</value>
73022                </enumeratedValue>
73023                <enumeratedValue>
73024                  <name>0010</name>
73025                  <description>ISF flag and DMA request on falling edge.</description>
73026                  <value>#0010</value>
73027                </enumeratedValue>
73028                <enumeratedValue>
73029                  <name>0011</name>
73030                  <description>ISF flag and DMA request on either edge.</description>
73031                  <value>#0011</value>
73032                </enumeratedValue>
73033                <enumeratedValue>
73034                  <name>1000</name>
73035                  <description>ISF flag and Interrupt when logic 0.</description>
73036                  <value>#1000</value>
73037                </enumeratedValue>
73038                <enumeratedValue>
73039                  <name>1001</name>
73040                  <description>ISF flag and Interrupt on rising-edge.</description>
73041                  <value>#1001</value>
73042                </enumeratedValue>
73043                <enumeratedValue>
73044                  <name>1010</name>
73045                  <description>ISF flag and Interrupt on falling-edge.</description>
73046                  <value>#1010</value>
73047                </enumeratedValue>
73048                <enumeratedValue>
73049                  <name>1011</name>
73050                  <description>ISF flag and Interrupt on either edge.</description>
73051                  <value>#1011</value>
73052                </enumeratedValue>
73053                <enumeratedValue>
73054                  <name>1100</name>
73055                  <description>ISF flag and Interrupt when logic 1.</description>
73056                  <value>#1100</value>
73057                </enumeratedValue>
73058              </enumeratedValues>
73059            </field>
73060            <field>
73061              <name>ISF</name>
73062              <description>Interrupt Status Flag</description>
73063              <bitOffset>24</bitOffset>
73064              <bitWidth>1</bitWidth>
73065              <access>read-write</access>
73066              <enumeratedValues>
73067                <enumeratedValue>
73068                  <name>0</name>
73069                  <description>Configured interrupt is not detected.</description>
73070                  <value>#0</value>
73071                </enumeratedValue>
73072                <enumeratedValue>
73073                  <name>1</name>
73074                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
73075                  <value>#1</value>
73076                </enumeratedValue>
73077              </enumeratedValues>
73078            </field>
73079          </fields>
73080        </register>
73081        <register>
73082          <name>PCR24</name>
73083          <description>Pin Control Register n</description>
73084          <addressOffset>0x60</addressOffset>
73085          <size>32</size>
73086          <access>read-write</access>
73087          <resetValue>0</resetValue>
73088          <resetMask>0xFFFFFFFF</resetMask>
73089          <fields>
73090            <field>
73091              <name>PS</name>
73092              <description>Pull Select</description>
73093              <bitOffset>0</bitOffset>
73094              <bitWidth>1</bitWidth>
73095              <access>read-only</access>
73096              <enumeratedValues>
73097                <enumeratedValue>
73098                  <name>0</name>
73099                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
73100                  <value>#0</value>
73101                </enumeratedValue>
73102                <enumeratedValue>
73103                  <name>1</name>
73104                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
73105                  <value>#1</value>
73106                </enumeratedValue>
73107              </enumeratedValues>
73108            </field>
73109            <field>
73110              <name>PE</name>
73111              <description>Pull Enable</description>
73112              <bitOffset>1</bitOffset>
73113              <bitWidth>1</bitWidth>
73114              <access>read-only</access>
73115              <enumeratedValues>
73116                <enumeratedValue>
73117                  <name>0</name>
73118                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
73119                  <value>#0</value>
73120                </enumeratedValue>
73121                <enumeratedValue>
73122                  <name>1</name>
73123                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
73124                  <value>#1</value>
73125                </enumeratedValue>
73126              </enumeratedValues>
73127            </field>
73128            <field>
73129              <name>SRE</name>
73130              <description>Slew Rate Enable</description>
73131              <bitOffset>2</bitOffset>
73132              <bitWidth>1</bitWidth>
73133              <access>read-only</access>
73134              <enumeratedValues>
73135                <enumeratedValue>
73136                  <name>0</name>
73137                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
73138                  <value>#0</value>
73139                </enumeratedValue>
73140                <enumeratedValue>
73141                  <name>1</name>
73142                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
73143                  <value>#1</value>
73144                </enumeratedValue>
73145              </enumeratedValues>
73146            </field>
73147            <field>
73148              <name>PFE</name>
73149              <description>Passive Filter Enable</description>
73150              <bitOffset>4</bitOffset>
73151              <bitWidth>1</bitWidth>
73152              <access>read-only</access>
73153              <enumeratedValues>
73154                <enumeratedValue>
73155                  <name>0</name>
73156                  <description>Passive input filter is disabled on the corresponding pin.</description>
73157                  <value>#0</value>
73158                </enumeratedValue>
73159                <enumeratedValue>
73160                  <name>1</name>
73161                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
73162                  <value>#1</value>
73163                </enumeratedValue>
73164              </enumeratedValues>
73165            </field>
73166            <field>
73167              <name>ODE</name>
73168              <description>Open Drain Enable</description>
73169              <bitOffset>5</bitOffset>
73170              <bitWidth>1</bitWidth>
73171              <access>read-only</access>
73172              <enumeratedValues>
73173                <enumeratedValue>
73174                  <name>0</name>
73175                  <description>Open drain output is disabled on the corresponding pin.</description>
73176                  <value>#0</value>
73177                </enumeratedValue>
73178                <enumeratedValue>
73179                  <name>1</name>
73180                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
73181                  <value>#1</value>
73182                </enumeratedValue>
73183              </enumeratedValues>
73184            </field>
73185            <field>
73186              <name>DSE</name>
73187              <description>Drive Strength Enable</description>
73188              <bitOffset>6</bitOffset>
73189              <bitWidth>1</bitWidth>
73190              <access>read-only</access>
73191              <enumeratedValues>
73192                <enumeratedValue>
73193                  <name>0</name>
73194                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
73195                  <value>#0</value>
73196                </enumeratedValue>
73197                <enumeratedValue>
73198                  <name>1</name>
73199                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
73200                  <value>#1</value>
73201                </enumeratedValue>
73202              </enumeratedValues>
73203            </field>
73204            <field>
73205              <name>MUX</name>
73206              <description>Pin Mux Control</description>
73207              <bitOffset>8</bitOffset>
73208              <bitWidth>3</bitWidth>
73209              <access>read-write</access>
73210              <enumeratedValues>
73211                <enumeratedValue>
73212                  <name>000</name>
73213                  <description>Pin disabled (Alternative 0) (analog).</description>
73214                  <value>#000</value>
73215                </enumeratedValue>
73216                <enumeratedValue>
73217                  <name>001</name>
73218                  <description>Alternative 1 (GPIO).</description>
73219                  <value>#001</value>
73220                </enumeratedValue>
73221                <enumeratedValue>
73222                  <name>010</name>
73223                  <description>Alternative 2 (chip-specific).</description>
73224                  <value>#010</value>
73225                </enumeratedValue>
73226                <enumeratedValue>
73227                  <name>011</name>
73228                  <description>Alternative 3 (chip-specific).</description>
73229                  <value>#011</value>
73230                </enumeratedValue>
73231                <enumeratedValue>
73232                  <name>100</name>
73233                  <description>Alternative 4 (chip-specific).</description>
73234                  <value>#100</value>
73235                </enumeratedValue>
73236                <enumeratedValue>
73237                  <name>101</name>
73238                  <description>Alternative 5 (chip-specific).</description>
73239                  <value>#101</value>
73240                </enumeratedValue>
73241                <enumeratedValue>
73242                  <name>110</name>
73243                  <description>Alternative 6 (chip-specific).</description>
73244                  <value>#110</value>
73245                </enumeratedValue>
73246                <enumeratedValue>
73247                  <name>111</name>
73248                  <description>Alternative 7 (chip-specific).</description>
73249                  <value>#111</value>
73250                </enumeratedValue>
73251              </enumeratedValues>
73252            </field>
73253            <field>
73254              <name>LK</name>
73255              <description>Lock Register</description>
73256              <bitOffset>15</bitOffset>
73257              <bitWidth>1</bitWidth>
73258              <access>read-write</access>
73259              <enumeratedValues>
73260                <enumeratedValue>
73261                  <name>0</name>
73262                  <description>Pin Control Register fields [15:0] are not locked.</description>
73263                  <value>#0</value>
73264                </enumeratedValue>
73265                <enumeratedValue>
73266                  <name>1</name>
73267                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
73268                  <value>#1</value>
73269                </enumeratedValue>
73270              </enumeratedValues>
73271            </field>
73272            <field>
73273              <name>IRQC</name>
73274              <description>Interrupt Configuration</description>
73275              <bitOffset>16</bitOffset>
73276              <bitWidth>4</bitWidth>
73277              <access>read-write</access>
73278              <enumeratedValues>
73279                <enumeratedValue>
73280                  <name>0000</name>
73281                  <description>Interrupt Status Flag (ISF) is disabled.</description>
73282                  <value>#0000</value>
73283                </enumeratedValue>
73284                <enumeratedValue>
73285                  <name>0001</name>
73286                  <description>ISF flag and DMA request on rising edge.</description>
73287                  <value>#0001</value>
73288                </enumeratedValue>
73289                <enumeratedValue>
73290                  <name>0010</name>
73291                  <description>ISF flag and DMA request on falling edge.</description>
73292                  <value>#0010</value>
73293                </enumeratedValue>
73294                <enumeratedValue>
73295                  <name>0011</name>
73296                  <description>ISF flag and DMA request on either edge.</description>
73297                  <value>#0011</value>
73298                </enumeratedValue>
73299                <enumeratedValue>
73300                  <name>1000</name>
73301                  <description>ISF flag and Interrupt when logic 0.</description>
73302                  <value>#1000</value>
73303                </enumeratedValue>
73304                <enumeratedValue>
73305                  <name>1001</name>
73306                  <description>ISF flag and Interrupt on rising-edge.</description>
73307                  <value>#1001</value>
73308                </enumeratedValue>
73309                <enumeratedValue>
73310                  <name>1010</name>
73311                  <description>ISF flag and Interrupt on falling-edge.</description>
73312                  <value>#1010</value>
73313                </enumeratedValue>
73314                <enumeratedValue>
73315                  <name>1011</name>
73316                  <description>ISF flag and Interrupt on either edge.</description>
73317                  <value>#1011</value>
73318                </enumeratedValue>
73319                <enumeratedValue>
73320                  <name>1100</name>
73321                  <description>ISF flag and Interrupt when logic 1.</description>
73322                  <value>#1100</value>
73323                </enumeratedValue>
73324              </enumeratedValues>
73325            </field>
73326            <field>
73327              <name>ISF</name>
73328              <description>Interrupt Status Flag</description>
73329              <bitOffset>24</bitOffset>
73330              <bitWidth>1</bitWidth>
73331              <access>read-write</access>
73332              <enumeratedValues>
73333                <enumeratedValue>
73334                  <name>0</name>
73335                  <description>Configured interrupt is not detected.</description>
73336                  <value>#0</value>
73337                </enumeratedValue>
73338                <enumeratedValue>
73339                  <name>1</name>
73340                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
73341                  <value>#1</value>
73342                </enumeratedValue>
73343              </enumeratedValues>
73344            </field>
73345          </fields>
73346        </register>
73347        <register>
73348          <name>PCR25</name>
73349          <description>Pin Control Register n</description>
73350          <addressOffset>0x64</addressOffset>
73351          <size>32</size>
73352          <access>read-write</access>
73353          <resetValue>0</resetValue>
73354          <resetMask>0xFFFFFFFF</resetMask>
73355          <fields>
73356            <field>
73357              <name>PS</name>
73358              <description>Pull Select</description>
73359              <bitOffset>0</bitOffset>
73360              <bitWidth>1</bitWidth>
73361              <access>read-only</access>
73362              <enumeratedValues>
73363                <enumeratedValue>
73364                  <name>0</name>
73365                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
73366                  <value>#0</value>
73367                </enumeratedValue>
73368                <enumeratedValue>
73369                  <name>1</name>
73370                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
73371                  <value>#1</value>
73372                </enumeratedValue>
73373              </enumeratedValues>
73374            </field>
73375            <field>
73376              <name>PE</name>
73377              <description>Pull Enable</description>
73378              <bitOffset>1</bitOffset>
73379              <bitWidth>1</bitWidth>
73380              <access>read-only</access>
73381              <enumeratedValues>
73382                <enumeratedValue>
73383                  <name>0</name>
73384                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
73385                  <value>#0</value>
73386                </enumeratedValue>
73387                <enumeratedValue>
73388                  <name>1</name>
73389                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
73390                  <value>#1</value>
73391                </enumeratedValue>
73392              </enumeratedValues>
73393            </field>
73394            <field>
73395              <name>SRE</name>
73396              <description>Slew Rate Enable</description>
73397              <bitOffset>2</bitOffset>
73398              <bitWidth>1</bitWidth>
73399              <access>read-only</access>
73400              <enumeratedValues>
73401                <enumeratedValue>
73402                  <name>0</name>
73403                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
73404                  <value>#0</value>
73405                </enumeratedValue>
73406                <enumeratedValue>
73407                  <name>1</name>
73408                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
73409                  <value>#1</value>
73410                </enumeratedValue>
73411              </enumeratedValues>
73412            </field>
73413            <field>
73414              <name>PFE</name>
73415              <description>Passive Filter Enable</description>
73416              <bitOffset>4</bitOffset>
73417              <bitWidth>1</bitWidth>
73418              <access>read-only</access>
73419              <enumeratedValues>
73420                <enumeratedValue>
73421                  <name>0</name>
73422                  <description>Passive input filter is disabled on the corresponding pin.</description>
73423                  <value>#0</value>
73424                </enumeratedValue>
73425                <enumeratedValue>
73426                  <name>1</name>
73427                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
73428                  <value>#1</value>
73429                </enumeratedValue>
73430              </enumeratedValues>
73431            </field>
73432            <field>
73433              <name>ODE</name>
73434              <description>Open Drain Enable</description>
73435              <bitOffset>5</bitOffset>
73436              <bitWidth>1</bitWidth>
73437              <access>read-only</access>
73438              <enumeratedValues>
73439                <enumeratedValue>
73440                  <name>0</name>
73441                  <description>Open drain output is disabled on the corresponding pin.</description>
73442                  <value>#0</value>
73443                </enumeratedValue>
73444                <enumeratedValue>
73445                  <name>1</name>
73446                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
73447                  <value>#1</value>
73448                </enumeratedValue>
73449              </enumeratedValues>
73450            </field>
73451            <field>
73452              <name>DSE</name>
73453              <description>Drive Strength Enable</description>
73454              <bitOffset>6</bitOffset>
73455              <bitWidth>1</bitWidth>
73456              <access>read-only</access>
73457              <enumeratedValues>
73458                <enumeratedValue>
73459                  <name>0</name>
73460                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
73461                  <value>#0</value>
73462                </enumeratedValue>
73463                <enumeratedValue>
73464                  <name>1</name>
73465                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
73466                  <value>#1</value>
73467                </enumeratedValue>
73468              </enumeratedValues>
73469            </field>
73470            <field>
73471              <name>MUX</name>
73472              <description>Pin Mux Control</description>
73473              <bitOffset>8</bitOffset>
73474              <bitWidth>3</bitWidth>
73475              <access>read-write</access>
73476              <enumeratedValues>
73477                <enumeratedValue>
73478                  <name>000</name>
73479                  <description>Pin disabled (Alternative 0) (analog).</description>
73480                  <value>#000</value>
73481                </enumeratedValue>
73482                <enumeratedValue>
73483                  <name>001</name>
73484                  <description>Alternative 1 (GPIO).</description>
73485                  <value>#001</value>
73486                </enumeratedValue>
73487                <enumeratedValue>
73488                  <name>010</name>
73489                  <description>Alternative 2 (chip-specific).</description>
73490                  <value>#010</value>
73491                </enumeratedValue>
73492                <enumeratedValue>
73493                  <name>011</name>
73494                  <description>Alternative 3 (chip-specific).</description>
73495                  <value>#011</value>
73496                </enumeratedValue>
73497                <enumeratedValue>
73498                  <name>100</name>
73499                  <description>Alternative 4 (chip-specific).</description>
73500                  <value>#100</value>
73501                </enumeratedValue>
73502                <enumeratedValue>
73503                  <name>101</name>
73504                  <description>Alternative 5 (chip-specific).</description>
73505                  <value>#101</value>
73506                </enumeratedValue>
73507                <enumeratedValue>
73508                  <name>110</name>
73509                  <description>Alternative 6 (chip-specific).</description>
73510                  <value>#110</value>
73511                </enumeratedValue>
73512                <enumeratedValue>
73513                  <name>111</name>
73514                  <description>Alternative 7 (chip-specific).</description>
73515                  <value>#111</value>
73516                </enumeratedValue>
73517              </enumeratedValues>
73518            </field>
73519            <field>
73520              <name>LK</name>
73521              <description>Lock Register</description>
73522              <bitOffset>15</bitOffset>
73523              <bitWidth>1</bitWidth>
73524              <access>read-write</access>
73525              <enumeratedValues>
73526                <enumeratedValue>
73527                  <name>0</name>
73528                  <description>Pin Control Register fields [15:0] are not locked.</description>
73529                  <value>#0</value>
73530                </enumeratedValue>
73531                <enumeratedValue>
73532                  <name>1</name>
73533                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
73534                  <value>#1</value>
73535                </enumeratedValue>
73536              </enumeratedValues>
73537            </field>
73538            <field>
73539              <name>IRQC</name>
73540              <description>Interrupt Configuration</description>
73541              <bitOffset>16</bitOffset>
73542              <bitWidth>4</bitWidth>
73543              <access>read-write</access>
73544              <enumeratedValues>
73545                <enumeratedValue>
73546                  <name>0000</name>
73547                  <description>Interrupt Status Flag (ISF) is disabled.</description>
73548                  <value>#0000</value>
73549                </enumeratedValue>
73550                <enumeratedValue>
73551                  <name>0001</name>
73552                  <description>ISF flag and DMA request on rising edge.</description>
73553                  <value>#0001</value>
73554                </enumeratedValue>
73555                <enumeratedValue>
73556                  <name>0010</name>
73557                  <description>ISF flag and DMA request on falling edge.</description>
73558                  <value>#0010</value>
73559                </enumeratedValue>
73560                <enumeratedValue>
73561                  <name>0011</name>
73562                  <description>ISF flag and DMA request on either edge.</description>
73563                  <value>#0011</value>
73564                </enumeratedValue>
73565                <enumeratedValue>
73566                  <name>1000</name>
73567                  <description>ISF flag and Interrupt when logic 0.</description>
73568                  <value>#1000</value>
73569                </enumeratedValue>
73570                <enumeratedValue>
73571                  <name>1001</name>
73572                  <description>ISF flag and Interrupt on rising-edge.</description>
73573                  <value>#1001</value>
73574                </enumeratedValue>
73575                <enumeratedValue>
73576                  <name>1010</name>
73577                  <description>ISF flag and Interrupt on falling-edge.</description>
73578                  <value>#1010</value>
73579                </enumeratedValue>
73580                <enumeratedValue>
73581                  <name>1011</name>
73582                  <description>ISF flag and Interrupt on either edge.</description>
73583                  <value>#1011</value>
73584                </enumeratedValue>
73585                <enumeratedValue>
73586                  <name>1100</name>
73587                  <description>ISF flag and Interrupt when logic 1.</description>
73588                  <value>#1100</value>
73589                </enumeratedValue>
73590              </enumeratedValues>
73591            </field>
73592            <field>
73593              <name>ISF</name>
73594              <description>Interrupt Status Flag</description>
73595              <bitOffset>24</bitOffset>
73596              <bitWidth>1</bitWidth>
73597              <access>read-write</access>
73598              <enumeratedValues>
73599                <enumeratedValue>
73600                  <name>0</name>
73601                  <description>Configured interrupt is not detected.</description>
73602                  <value>#0</value>
73603                </enumeratedValue>
73604                <enumeratedValue>
73605                  <name>1</name>
73606                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
73607                  <value>#1</value>
73608                </enumeratedValue>
73609              </enumeratedValues>
73610            </field>
73611          </fields>
73612        </register>
73613        <register>
73614          <name>PCR26</name>
73615          <description>Pin Control Register n</description>
73616          <addressOffset>0x68</addressOffset>
73617          <size>32</size>
73618          <access>read-write</access>
73619          <resetValue>0</resetValue>
73620          <resetMask>0xFFFFFFFF</resetMask>
73621          <fields>
73622            <field>
73623              <name>PS</name>
73624              <description>Pull Select</description>
73625              <bitOffset>0</bitOffset>
73626              <bitWidth>1</bitWidth>
73627              <access>read-only</access>
73628              <enumeratedValues>
73629                <enumeratedValue>
73630                  <name>0</name>
73631                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
73632                  <value>#0</value>
73633                </enumeratedValue>
73634                <enumeratedValue>
73635                  <name>1</name>
73636                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
73637                  <value>#1</value>
73638                </enumeratedValue>
73639              </enumeratedValues>
73640            </field>
73641            <field>
73642              <name>PE</name>
73643              <description>Pull Enable</description>
73644              <bitOffset>1</bitOffset>
73645              <bitWidth>1</bitWidth>
73646              <access>read-only</access>
73647              <enumeratedValues>
73648                <enumeratedValue>
73649                  <name>0</name>
73650                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
73651                  <value>#0</value>
73652                </enumeratedValue>
73653                <enumeratedValue>
73654                  <name>1</name>
73655                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
73656                  <value>#1</value>
73657                </enumeratedValue>
73658              </enumeratedValues>
73659            </field>
73660            <field>
73661              <name>SRE</name>
73662              <description>Slew Rate Enable</description>
73663              <bitOffset>2</bitOffset>
73664              <bitWidth>1</bitWidth>
73665              <access>read-only</access>
73666              <enumeratedValues>
73667                <enumeratedValue>
73668                  <name>0</name>
73669                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
73670                  <value>#0</value>
73671                </enumeratedValue>
73672                <enumeratedValue>
73673                  <name>1</name>
73674                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
73675                  <value>#1</value>
73676                </enumeratedValue>
73677              </enumeratedValues>
73678            </field>
73679            <field>
73680              <name>PFE</name>
73681              <description>Passive Filter Enable</description>
73682              <bitOffset>4</bitOffset>
73683              <bitWidth>1</bitWidth>
73684              <access>read-only</access>
73685              <enumeratedValues>
73686                <enumeratedValue>
73687                  <name>0</name>
73688                  <description>Passive input filter is disabled on the corresponding pin.</description>
73689                  <value>#0</value>
73690                </enumeratedValue>
73691                <enumeratedValue>
73692                  <name>1</name>
73693                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
73694                  <value>#1</value>
73695                </enumeratedValue>
73696              </enumeratedValues>
73697            </field>
73698            <field>
73699              <name>ODE</name>
73700              <description>Open Drain Enable</description>
73701              <bitOffset>5</bitOffset>
73702              <bitWidth>1</bitWidth>
73703              <access>read-only</access>
73704              <enumeratedValues>
73705                <enumeratedValue>
73706                  <name>0</name>
73707                  <description>Open drain output is disabled on the corresponding pin.</description>
73708                  <value>#0</value>
73709                </enumeratedValue>
73710                <enumeratedValue>
73711                  <name>1</name>
73712                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
73713                  <value>#1</value>
73714                </enumeratedValue>
73715              </enumeratedValues>
73716            </field>
73717            <field>
73718              <name>DSE</name>
73719              <description>Drive Strength Enable</description>
73720              <bitOffset>6</bitOffset>
73721              <bitWidth>1</bitWidth>
73722              <access>read-only</access>
73723              <enumeratedValues>
73724                <enumeratedValue>
73725                  <name>0</name>
73726                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
73727                  <value>#0</value>
73728                </enumeratedValue>
73729                <enumeratedValue>
73730                  <name>1</name>
73731                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
73732                  <value>#1</value>
73733                </enumeratedValue>
73734              </enumeratedValues>
73735            </field>
73736            <field>
73737              <name>MUX</name>
73738              <description>Pin Mux Control</description>
73739              <bitOffset>8</bitOffset>
73740              <bitWidth>3</bitWidth>
73741              <access>read-write</access>
73742              <enumeratedValues>
73743                <enumeratedValue>
73744                  <name>000</name>
73745                  <description>Pin disabled (Alternative 0) (analog).</description>
73746                  <value>#000</value>
73747                </enumeratedValue>
73748                <enumeratedValue>
73749                  <name>001</name>
73750                  <description>Alternative 1 (GPIO).</description>
73751                  <value>#001</value>
73752                </enumeratedValue>
73753                <enumeratedValue>
73754                  <name>010</name>
73755                  <description>Alternative 2 (chip-specific).</description>
73756                  <value>#010</value>
73757                </enumeratedValue>
73758                <enumeratedValue>
73759                  <name>011</name>
73760                  <description>Alternative 3 (chip-specific).</description>
73761                  <value>#011</value>
73762                </enumeratedValue>
73763                <enumeratedValue>
73764                  <name>100</name>
73765                  <description>Alternative 4 (chip-specific).</description>
73766                  <value>#100</value>
73767                </enumeratedValue>
73768                <enumeratedValue>
73769                  <name>101</name>
73770                  <description>Alternative 5 (chip-specific).</description>
73771                  <value>#101</value>
73772                </enumeratedValue>
73773                <enumeratedValue>
73774                  <name>110</name>
73775                  <description>Alternative 6 (chip-specific).</description>
73776                  <value>#110</value>
73777                </enumeratedValue>
73778                <enumeratedValue>
73779                  <name>111</name>
73780                  <description>Alternative 7 (chip-specific).</description>
73781                  <value>#111</value>
73782                </enumeratedValue>
73783              </enumeratedValues>
73784            </field>
73785            <field>
73786              <name>LK</name>
73787              <description>Lock Register</description>
73788              <bitOffset>15</bitOffset>
73789              <bitWidth>1</bitWidth>
73790              <access>read-write</access>
73791              <enumeratedValues>
73792                <enumeratedValue>
73793                  <name>0</name>
73794                  <description>Pin Control Register fields [15:0] are not locked.</description>
73795                  <value>#0</value>
73796                </enumeratedValue>
73797                <enumeratedValue>
73798                  <name>1</name>
73799                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
73800                  <value>#1</value>
73801                </enumeratedValue>
73802              </enumeratedValues>
73803            </field>
73804            <field>
73805              <name>IRQC</name>
73806              <description>Interrupt Configuration</description>
73807              <bitOffset>16</bitOffset>
73808              <bitWidth>4</bitWidth>
73809              <access>read-write</access>
73810              <enumeratedValues>
73811                <enumeratedValue>
73812                  <name>0000</name>
73813                  <description>Interrupt Status Flag (ISF) is disabled.</description>
73814                  <value>#0000</value>
73815                </enumeratedValue>
73816                <enumeratedValue>
73817                  <name>0001</name>
73818                  <description>ISF flag and DMA request on rising edge.</description>
73819                  <value>#0001</value>
73820                </enumeratedValue>
73821                <enumeratedValue>
73822                  <name>0010</name>
73823                  <description>ISF flag and DMA request on falling edge.</description>
73824                  <value>#0010</value>
73825                </enumeratedValue>
73826                <enumeratedValue>
73827                  <name>0011</name>
73828                  <description>ISF flag and DMA request on either edge.</description>
73829                  <value>#0011</value>
73830                </enumeratedValue>
73831                <enumeratedValue>
73832                  <name>1000</name>
73833                  <description>ISF flag and Interrupt when logic 0.</description>
73834                  <value>#1000</value>
73835                </enumeratedValue>
73836                <enumeratedValue>
73837                  <name>1001</name>
73838                  <description>ISF flag and Interrupt on rising-edge.</description>
73839                  <value>#1001</value>
73840                </enumeratedValue>
73841                <enumeratedValue>
73842                  <name>1010</name>
73843                  <description>ISF flag and Interrupt on falling-edge.</description>
73844                  <value>#1010</value>
73845                </enumeratedValue>
73846                <enumeratedValue>
73847                  <name>1011</name>
73848                  <description>ISF flag and Interrupt on either edge.</description>
73849                  <value>#1011</value>
73850                </enumeratedValue>
73851                <enumeratedValue>
73852                  <name>1100</name>
73853                  <description>ISF flag and Interrupt when logic 1.</description>
73854                  <value>#1100</value>
73855                </enumeratedValue>
73856              </enumeratedValues>
73857            </field>
73858            <field>
73859              <name>ISF</name>
73860              <description>Interrupt Status Flag</description>
73861              <bitOffset>24</bitOffset>
73862              <bitWidth>1</bitWidth>
73863              <access>read-write</access>
73864              <enumeratedValues>
73865                <enumeratedValue>
73866                  <name>0</name>
73867                  <description>Configured interrupt is not detected.</description>
73868                  <value>#0</value>
73869                </enumeratedValue>
73870                <enumeratedValue>
73871                  <name>1</name>
73872                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
73873                  <value>#1</value>
73874                </enumeratedValue>
73875              </enumeratedValues>
73876            </field>
73877          </fields>
73878        </register>
73879        <register>
73880          <name>PCR27</name>
73881          <description>Pin Control Register n</description>
73882          <addressOffset>0x6C</addressOffset>
73883          <size>32</size>
73884          <access>read-write</access>
73885          <resetValue>0</resetValue>
73886          <resetMask>0xFFFFFFFF</resetMask>
73887          <fields>
73888            <field>
73889              <name>PS</name>
73890              <description>Pull Select</description>
73891              <bitOffset>0</bitOffset>
73892              <bitWidth>1</bitWidth>
73893              <access>read-only</access>
73894              <enumeratedValues>
73895                <enumeratedValue>
73896                  <name>0</name>
73897                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
73898                  <value>#0</value>
73899                </enumeratedValue>
73900                <enumeratedValue>
73901                  <name>1</name>
73902                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
73903                  <value>#1</value>
73904                </enumeratedValue>
73905              </enumeratedValues>
73906            </field>
73907            <field>
73908              <name>PE</name>
73909              <description>Pull Enable</description>
73910              <bitOffset>1</bitOffset>
73911              <bitWidth>1</bitWidth>
73912              <access>read-only</access>
73913              <enumeratedValues>
73914                <enumeratedValue>
73915                  <name>0</name>
73916                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
73917                  <value>#0</value>
73918                </enumeratedValue>
73919                <enumeratedValue>
73920                  <name>1</name>
73921                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
73922                  <value>#1</value>
73923                </enumeratedValue>
73924              </enumeratedValues>
73925            </field>
73926            <field>
73927              <name>SRE</name>
73928              <description>Slew Rate Enable</description>
73929              <bitOffset>2</bitOffset>
73930              <bitWidth>1</bitWidth>
73931              <access>read-only</access>
73932              <enumeratedValues>
73933                <enumeratedValue>
73934                  <name>0</name>
73935                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
73936                  <value>#0</value>
73937                </enumeratedValue>
73938                <enumeratedValue>
73939                  <name>1</name>
73940                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
73941                  <value>#1</value>
73942                </enumeratedValue>
73943              </enumeratedValues>
73944            </field>
73945            <field>
73946              <name>PFE</name>
73947              <description>Passive Filter Enable</description>
73948              <bitOffset>4</bitOffset>
73949              <bitWidth>1</bitWidth>
73950              <access>read-only</access>
73951              <enumeratedValues>
73952                <enumeratedValue>
73953                  <name>0</name>
73954                  <description>Passive input filter is disabled on the corresponding pin.</description>
73955                  <value>#0</value>
73956                </enumeratedValue>
73957                <enumeratedValue>
73958                  <name>1</name>
73959                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
73960                  <value>#1</value>
73961                </enumeratedValue>
73962              </enumeratedValues>
73963            </field>
73964            <field>
73965              <name>ODE</name>
73966              <description>Open Drain Enable</description>
73967              <bitOffset>5</bitOffset>
73968              <bitWidth>1</bitWidth>
73969              <access>read-only</access>
73970              <enumeratedValues>
73971                <enumeratedValue>
73972                  <name>0</name>
73973                  <description>Open drain output is disabled on the corresponding pin.</description>
73974                  <value>#0</value>
73975                </enumeratedValue>
73976                <enumeratedValue>
73977                  <name>1</name>
73978                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
73979                  <value>#1</value>
73980                </enumeratedValue>
73981              </enumeratedValues>
73982            </field>
73983            <field>
73984              <name>DSE</name>
73985              <description>Drive Strength Enable</description>
73986              <bitOffset>6</bitOffset>
73987              <bitWidth>1</bitWidth>
73988              <access>read-only</access>
73989              <enumeratedValues>
73990                <enumeratedValue>
73991                  <name>0</name>
73992                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
73993                  <value>#0</value>
73994                </enumeratedValue>
73995                <enumeratedValue>
73996                  <name>1</name>
73997                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
73998                  <value>#1</value>
73999                </enumeratedValue>
74000              </enumeratedValues>
74001            </field>
74002            <field>
74003              <name>MUX</name>
74004              <description>Pin Mux Control</description>
74005              <bitOffset>8</bitOffset>
74006              <bitWidth>3</bitWidth>
74007              <access>read-write</access>
74008              <enumeratedValues>
74009                <enumeratedValue>
74010                  <name>000</name>
74011                  <description>Pin disabled (Alternative 0) (analog).</description>
74012                  <value>#000</value>
74013                </enumeratedValue>
74014                <enumeratedValue>
74015                  <name>001</name>
74016                  <description>Alternative 1 (GPIO).</description>
74017                  <value>#001</value>
74018                </enumeratedValue>
74019                <enumeratedValue>
74020                  <name>010</name>
74021                  <description>Alternative 2 (chip-specific).</description>
74022                  <value>#010</value>
74023                </enumeratedValue>
74024                <enumeratedValue>
74025                  <name>011</name>
74026                  <description>Alternative 3 (chip-specific).</description>
74027                  <value>#011</value>
74028                </enumeratedValue>
74029                <enumeratedValue>
74030                  <name>100</name>
74031                  <description>Alternative 4 (chip-specific).</description>
74032                  <value>#100</value>
74033                </enumeratedValue>
74034                <enumeratedValue>
74035                  <name>101</name>
74036                  <description>Alternative 5 (chip-specific).</description>
74037                  <value>#101</value>
74038                </enumeratedValue>
74039                <enumeratedValue>
74040                  <name>110</name>
74041                  <description>Alternative 6 (chip-specific).</description>
74042                  <value>#110</value>
74043                </enumeratedValue>
74044                <enumeratedValue>
74045                  <name>111</name>
74046                  <description>Alternative 7 (chip-specific).</description>
74047                  <value>#111</value>
74048                </enumeratedValue>
74049              </enumeratedValues>
74050            </field>
74051            <field>
74052              <name>LK</name>
74053              <description>Lock Register</description>
74054              <bitOffset>15</bitOffset>
74055              <bitWidth>1</bitWidth>
74056              <access>read-write</access>
74057              <enumeratedValues>
74058                <enumeratedValue>
74059                  <name>0</name>
74060                  <description>Pin Control Register fields [15:0] are not locked.</description>
74061                  <value>#0</value>
74062                </enumeratedValue>
74063                <enumeratedValue>
74064                  <name>1</name>
74065                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
74066                  <value>#1</value>
74067                </enumeratedValue>
74068              </enumeratedValues>
74069            </field>
74070            <field>
74071              <name>IRQC</name>
74072              <description>Interrupt Configuration</description>
74073              <bitOffset>16</bitOffset>
74074              <bitWidth>4</bitWidth>
74075              <access>read-write</access>
74076              <enumeratedValues>
74077                <enumeratedValue>
74078                  <name>0000</name>
74079                  <description>Interrupt Status Flag (ISF) is disabled.</description>
74080                  <value>#0000</value>
74081                </enumeratedValue>
74082                <enumeratedValue>
74083                  <name>0001</name>
74084                  <description>ISF flag and DMA request on rising edge.</description>
74085                  <value>#0001</value>
74086                </enumeratedValue>
74087                <enumeratedValue>
74088                  <name>0010</name>
74089                  <description>ISF flag and DMA request on falling edge.</description>
74090                  <value>#0010</value>
74091                </enumeratedValue>
74092                <enumeratedValue>
74093                  <name>0011</name>
74094                  <description>ISF flag and DMA request on either edge.</description>
74095                  <value>#0011</value>
74096                </enumeratedValue>
74097                <enumeratedValue>
74098                  <name>1000</name>
74099                  <description>ISF flag and Interrupt when logic 0.</description>
74100                  <value>#1000</value>
74101                </enumeratedValue>
74102                <enumeratedValue>
74103                  <name>1001</name>
74104                  <description>ISF flag and Interrupt on rising-edge.</description>
74105                  <value>#1001</value>
74106                </enumeratedValue>
74107                <enumeratedValue>
74108                  <name>1010</name>
74109                  <description>ISF flag and Interrupt on falling-edge.</description>
74110                  <value>#1010</value>
74111                </enumeratedValue>
74112                <enumeratedValue>
74113                  <name>1011</name>
74114                  <description>ISF flag and Interrupt on either edge.</description>
74115                  <value>#1011</value>
74116                </enumeratedValue>
74117                <enumeratedValue>
74118                  <name>1100</name>
74119                  <description>ISF flag and Interrupt when logic 1.</description>
74120                  <value>#1100</value>
74121                </enumeratedValue>
74122              </enumeratedValues>
74123            </field>
74124            <field>
74125              <name>ISF</name>
74126              <description>Interrupt Status Flag</description>
74127              <bitOffset>24</bitOffset>
74128              <bitWidth>1</bitWidth>
74129              <access>read-write</access>
74130              <enumeratedValues>
74131                <enumeratedValue>
74132                  <name>0</name>
74133                  <description>Configured interrupt is not detected.</description>
74134                  <value>#0</value>
74135                </enumeratedValue>
74136                <enumeratedValue>
74137                  <name>1</name>
74138                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
74139                  <value>#1</value>
74140                </enumeratedValue>
74141              </enumeratedValues>
74142            </field>
74143          </fields>
74144        </register>
74145        <register>
74146          <name>PCR28</name>
74147          <description>Pin Control Register n</description>
74148          <addressOffset>0x70</addressOffset>
74149          <size>32</size>
74150          <access>read-write</access>
74151          <resetValue>0</resetValue>
74152          <resetMask>0xFFFFFFFF</resetMask>
74153          <fields>
74154            <field>
74155              <name>PS</name>
74156              <description>Pull Select</description>
74157              <bitOffset>0</bitOffset>
74158              <bitWidth>1</bitWidth>
74159              <access>read-only</access>
74160              <enumeratedValues>
74161                <enumeratedValue>
74162                  <name>0</name>
74163                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
74164                  <value>#0</value>
74165                </enumeratedValue>
74166                <enumeratedValue>
74167                  <name>1</name>
74168                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
74169                  <value>#1</value>
74170                </enumeratedValue>
74171              </enumeratedValues>
74172            </field>
74173            <field>
74174              <name>PE</name>
74175              <description>Pull Enable</description>
74176              <bitOffset>1</bitOffset>
74177              <bitWidth>1</bitWidth>
74178              <access>read-only</access>
74179              <enumeratedValues>
74180                <enumeratedValue>
74181                  <name>0</name>
74182                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
74183                  <value>#0</value>
74184                </enumeratedValue>
74185                <enumeratedValue>
74186                  <name>1</name>
74187                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
74188                  <value>#1</value>
74189                </enumeratedValue>
74190              </enumeratedValues>
74191            </field>
74192            <field>
74193              <name>SRE</name>
74194              <description>Slew Rate Enable</description>
74195              <bitOffset>2</bitOffset>
74196              <bitWidth>1</bitWidth>
74197              <access>read-only</access>
74198              <enumeratedValues>
74199                <enumeratedValue>
74200                  <name>0</name>
74201                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
74202                  <value>#0</value>
74203                </enumeratedValue>
74204                <enumeratedValue>
74205                  <name>1</name>
74206                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
74207                  <value>#1</value>
74208                </enumeratedValue>
74209              </enumeratedValues>
74210            </field>
74211            <field>
74212              <name>PFE</name>
74213              <description>Passive Filter Enable</description>
74214              <bitOffset>4</bitOffset>
74215              <bitWidth>1</bitWidth>
74216              <access>read-only</access>
74217              <enumeratedValues>
74218                <enumeratedValue>
74219                  <name>0</name>
74220                  <description>Passive input filter is disabled on the corresponding pin.</description>
74221                  <value>#0</value>
74222                </enumeratedValue>
74223                <enumeratedValue>
74224                  <name>1</name>
74225                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
74226                  <value>#1</value>
74227                </enumeratedValue>
74228              </enumeratedValues>
74229            </field>
74230            <field>
74231              <name>ODE</name>
74232              <description>Open Drain Enable</description>
74233              <bitOffset>5</bitOffset>
74234              <bitWidth>1</bitWidth>
74235              <access>read-only</access>
74236              <enumeratedValues>
74237                <enumeratedValue>
74238                  <name>0</name>
74239                  <description>Open drain output is disabled on the corresponding pin.</description>
74240                  <value>#0</value>
74241                </enumeratedValue>
74242                <enumeratedValue>
74243                  <name>1</name>
74244                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
74245                  <value>#1</value>
74246                </enumeratedValue>
74247              </enumeratedValues>
74248            </field>
74249            <field>
74250              <name>DSE</name>
74251              <description>Drive Strength Enable</description>
74252              <bitOffset>6</bitOffset>
74253              <bitWidth>1</bitWidth>
74254              <access>read-only</access>
74255              <enumeratedValues>
74256                <enumeratedValue>
74257                  <name>0</name>
74258                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
74259                  <value>#0</value>
74260                </enumeratedValue>
74261                <enumeratedValue>
74262                  <name>1</name>
74263                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
74264                  <value>#1</value>
74265                </enumeratedValue>
74266              </enumeratedValues>
74267            </field>
74268            <field>
74269              <name>MUX</name>
74270              <description>Pin Mux Control</description>
74271              <bitOffset>8</bitOffset>
74272              <bitWidth>3</bitWidth>
74273              <access>read-write</access>
74274              <enumeratedValues>
74275                <enumeratedValue>
74276                  <name>000</name>
74277                  <description>Pin disabled (Alternative 0) (analog).</description>
74278                  <value>#000</value>
74279                </enumeratedValue>
74280                <enumeratedValue>
74281                  <name>001</name>
74282                  <description>Alternative 1 (GPIO).</description>
74283                  <value>#001</value>
74284                </enumeratedValue>
74285                <enumeratedValue>
74286                  <name>010</name>
74287                  <description>Alternative 2 (chip-specific).</description>
74288                  <value>#010</value>
74289                </enumeratedValue>
74290                <enumeratedValue>
74291                  <name>011</name>
74292                  <description>Alternative 3 (chip-specific).</description>
74293                  <value>#011</value>
74294                </enumeratedValue>
74295                <enumeratedValue>
74296                  <name>100</name>
74297                  <description>Alternative 4 (chip-specific).</description>
74298                  <value>#100</value>
74299                </enumeratedValue>
74300                <enumeratedValue>
74301                  <name>101</name>
74302                  <description>Alternative 5 (chip-specific).</description>
74303                  <value>#101</value>
74304                </enumeratedValue>
74305                <enumeratedValue>
74306                  <name>110</name>
74307                  <description>Alternative 6 (chip-specific).</description>
74308                  <value>#110</value>
74309                </enumeratedValue>
74310                <enumeratedValue>
74311                  <name>111</name>
74312                  <description>Alternative 7 (chip-specific).</description>
74313                  <value>#111</value>
74314                </enumeratedValue>
74315              </enumeratedValues>
74316            </field>
74317            <field>
74318              <name>LK</name>
74319              <description>Lock Register</description>
74320              <bitOffset>15</bitOffset>
74321              <bitWidth>1</bitWidth>
74322              <access>read-write</access>
74323              <enumeratedValues>
74324                <enumeratedValue>
74325                  <name>0</name>
74326                  <description>Pin Control Register fields [15:0] are not locked.</description>
74327                  <value>#0</value>
74328                </enumeratedValue>
74329                <enumeratedValue>
74330                  <name>1</name>
74331                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
74332                  <value>#1</value>
74333                </enumeratedValue>
74334              </enumeratedValues>
74335            </field>
74336            <field>
74337              <name>IRQC</name>
74338              <description>Interrupt Configuration</description>
74339              <bitOffset>16</bitOffset>
74340              <bitWidth>4</bitWidth>
74341              <access>read-write</access>
74342              <enumeratedValues>
74343                <enumeratedValue>
74344                  <name>0000</name>
74345                  <description>Interrupt Status Flag (ISF) is disabled.</description>
74346                  <value>#0000</value>
74347                </enumeratedValue>
74348                <enumeratedValue>
74349                  <name>0001</name>
74350                  <description>ISF flag and DMA request on rising edge.</description>
74351                  <value>#0001</value>
74352                </enumeratedValue>
74353                <enumeratedValue>
74354                  <name>0010</name>
74355                  <description>ISF flag and DMA request on falling edge.</description>
74356                  <value>#0010</value>
74357                </enumeratedValue>
74358                <enumeratedValue>
74359                  <name>0011</name>
74360                  <description>ISF flag and DMA request on either edge.</description>
74361                  <value>#0011</value>
74362                </enumeratedValue>
74363                <enumeratedValue>
74364                  <name>1000</name>
74365                  <description>ISF flag and Interrupt when logic 0.</description>
74366                  <value>#1000</value>
74367                </enumeratedValue>
74368                <enumeratedValue>
74369                  <name>1001</name>
74370                  <description>ISF flag and Interrupt on rising-edge.</description>
74371                  <value>#1001</value>
74372                </enumeratedValue>
74373                <enumeratedValue>
74374                  <name>1010</name>
74375                  <description>ISF flag and Interrupt on falling-edge.</description>
74376                  <value>#1010</value>
74377                </enumeratedValue>
74378                <enumeratedValue>
74379                  <name>1011</name>
74380                  <description>ISF flag and Interrupt on either edge.</description>
74381                  <value>#1011</value>
74382                </enumeratedValue>
74383                <enumeratedValue>
74384                  <name>1100</name>
74385                  <description>ISF flag and Interrupt when logic 1.</description>
74386                  <value>#1100</value>
74387                </enumeratedValue>
74388              </enumeratedValues>
74389            </field>
74390            <field>
74391              <name>ISF</name>
74392              <description>Interrupt Status Flag</description>
74393              <bitOffset>24</bitOffset>
74394              <bitWidth>1</bitWidth>
74395              <access>read-write</access>
74396              <enumeratedValues>
74397                <enumeratedValue>
74398                  <name>0</name>
74399                  <description>Configured interrupt is not detected.</description>
74400                  <value>#0</value>
74401                </enumeratedValue>
74402                <enumeratedValue>
74403                  <name>1</name>
74404                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
74405                  <value>#1</value>
74406                </enumeratedValue>
74407              </enumeratedValues>
74408            </field>
74409          </fields>
74410        </register>
74411        <register>
74412          <name>PCR29</name>
74413          <description>Pin Control Register n</description>
74414          <addressOffset>0x74</addressOffset>
74415          <size>32</size>
74416          <access>read-write</access>
74417          <resetValue>0</resetValue>
74418          <resetMask>0xFFFFFFFF</resetMask>
74419          <fields>
74420            <field>
74421              <name>PS</name>
74422              <description>Pull Select</description>
74423              <bitOffset>0</bitOffset>
74424              <bitWidth>1</bitWidth>
74425              <access>read-only</access>
74426              <enumeratedValues>
74427                <enumeratedValue>
74428                  <name>0</name>
74429                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
74430                  <value>#0</value>
74431                </enumeratedValue>
74432                <enumeratedValue>
74433                  <name>1</name>
74434                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
74435                  <value>#1</value>
74436                </enumeratedValue>
74437              </enumeratedValues>
74438            </field>
74439            <field>
74440              <name>PE</name>
74441              <description>Pull Enable</description>
74442              <bitOffset>1</bitOffset>
74443              <bitWidth>1</bitWidth>
74444              <access>read-only</access>
74445              <enumeratedValues>
74446                <enumeratedValue>
74447                  <name>0</name>
74448                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
74449                  <value>#0</value>
74450                </enumeratedValue>
74451                <enumeratedValue>
74452                  <name>1</name>
74453                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
74454                  <value>#1</value>
74455                </enumeratedValue>
74456              </enumeratedValues>
74457            </field>
74458            <field>
74459              <name>SRE</name>
74460              <description>Slew Rate Enable</description>
74461              <bitOffset>2</bitOffset>
74462              <bitWidth>1</bitWidth>
74463              <access>read-only</access>
74464              <enumeratedValues>
74465                <enumeratedValue>
74466                  <name>0</name>
74467                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
74468                  <value>#0</value>
74469                </enumeratedValue>
74470                <enumeratedValue>
74471                  <name>1</name>
74472                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
74473                  <value>#1</value>
74474                </enumeratedValue>
74475              </enumeratedValues>
74476            </field>
74477            <field>
74478              <name>PFE</name>
74479              <description>Passive Filter Enable</description>
74480              <bitOffset>4</bitOffset>
74481              <bitWidth>1</bitWidth>
74482              <access>read-only</access>
74483              <enumeratedValues>
74484                <enumeratedValue>
74485                  <name>0</name>
74486                  <description>Passive input filter is disabled on the corresponding pin.</description>
74487                  <value>#0</value>
74488                </enumeratedValue>
74489                <enumeratedValue>
74490                  <name>1</name>
74491                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
74492                  <value>#1</value>
74493                </enumeratedValue>
74494              </enumeratedValues>
74495            </field>
74496            <field>
74497              <name>ODE</name>
74498              <description>Open Drain Enable</description>
74499              <bitOffset>5</bitOffset>
74500              <bitWidth>1</bitWidth>
74501              <access>read-only</access>
74502              <enumeratedValues>
74503                <enumeratedValue>
74504                  <name>0</name>
74505                  <description>Open drain output is disabled on the corresponding pin.</description>
74506                  <value>#0</value>
74507                </enumeratedValue>
74508                <enumeratedValue>
74509                  <name>1</name>
74510                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
74511                  <value>#1</value>
74512                </enumeratedValue>
74513              </enumeratedValues>
74514            </field>
74515            <field>
74516              <name>DSE</name>
74517              <description>Drive Strength Enable</description>
74518              <bitOffset>6</bitOffset>
74519              <bitWidth>1</bitWidth>
74520              <access>read-only</access>
74521              <enumeratedValues>
74522                <enumeratedValue>
74523                  <name>0</name>
74524                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
74525                  <value>#0</value>
74526                </enumeratedValue>
74527                <enumeratedValue>
74528                  <name>1</name>
74529                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
74530                  <value>#1</value>
74531                </enumeratedValue>
74532              </enumeratedValues>
74533            </field>
74534            <field>
74535              <name>MUX</name>
74536              <description>Pin Mux Control</description>
74537              <bitOffset>8</bitOffset>
74538              <bitWidth>3</bitWidth>
74539              <access>read-write</access>
74540              <enumeratedValues>
74541                <enumeratedValue>
74542                  <name>000</name>
74543                  <description>Pin disabled (Alternative 0) (analog).</description>
74544                  <value>#000</value>
74545                </enumeratedValue>
74546                <enumeratedValue>
74547                  <name>001</name>
74548                  <description>Alternative 1 (GPIO).</description>
74549                  <value>#001</value>
74550                </enumeratedValue>
74551                <enumeratedValue>
74552                  <name>010</name>
74553                  <description>Alternative 2 (chip-specific).</description>
74554                  <value>#010</value>
74555                </enumeratedValue>
74556                <enumeratedValue>
74557                  <name>011</name>
74558                  <description>Alternative 3 (chip-specific).</description>
74559                  <value>#011</value>
74560                </enumeratedValue>
74561                <enumeratedValue>
74562                  <name>100</name>
74563                  <description>Alternative 4 (chip-specific).</description>
74564                  <value>#100</value>
74565                </enumeratedValue>
74566                <enumeratedValue>
74567                  <name>101</name>
74568                  <description>Alternative 5 (chip-specific).</description>
74569                  <value>#101</value>
74570                </enumeratedValue>
74571                <enumeratedValue>
74572                  <name>110</name>
74573                  <description>Alternative 6 (chip-specific).</description>
74574                  <value>#110</value>
74575                </enumeratedValue>
74576                <enumeratedValue>
74577                  <name>111</name>
74578                  <description>Alternative 7 (chip-specific).</description>
74579                  <value>#111</value>
74580                </enumeratedValue>
74581              </enumeratedValues>
74582            </field>
74583            <field>
74584              <name>LK</name>
74585              <description>Lock Register</description>
74586              <bitOffset>15</bitOffset>
74587              <bitWidth>1</bitWidth>
74588              <access>read-write</access>
74589              <enumeratedValues>
74590                <enumeratedValue>
74591                  <name>0</name>
74592                  <description>Pin Control Register fields [15:0] are not locked.</description>
74593                  <value>#0</value>
74594                </enumeratedValue>
74595                <enumeratedValue>
74596                  <name>1</name>
74597                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
74598                  <value>#1</value>
74599                </enumeratedValue>
74600              </enumeratedValues>
74601            </field>
74602            <field>
74603              <name>IRQC</name>
74604              <description>Interrupt Configuration</description>
74605              <bitOffset>16</bitOffset>
74606              <bitWidth>4</bitWidth>
74607              <access>read-write</access>
74608              <enumeratedValues>
74609                <enumeratedValue>
74610                  <name>0000</name>
74611                  <description>Interrupt Status Flag (ISF) is disabled.</description>
74612                  <value>#0000</value>
74613                </enumeratedValue>
74614                <enumeratedValue>
74615                  <name>0001</name>
74616                  <description>ISF flag and DMA request on rising edge.</description>
74617                  <value>#0001</value>
74618                </enumeratedValue>
74619                <enumeratedValue>
74620                  <name>0010</name>
74621                  <description>ISF flag and DMA request on falling edge.</description>
74622                  <value>#0010</value>
74623                </enumeratedValue>
74624                <enumeratedValue>
74625                  <name>0011</name>
74626                  <description>ISF flag and DMA request on either edge.</description>
74627                  <value>#0011</value>
74628                </enumeratedValue>
74629                <enumeratedValue>
74630                  <name>1000</name>
74631                  <description>ISF flag and Interrupt when logic 0.</description>
74632                  <value>#1000</value>
74633                </enumeratedValue>
74634                <enumeratedValue>
74635                  <name>1001</name>
74636                  <description>ISF flag and Interrupt on rising-edge.</description>
74637                  <value>#1001</value>
74638                </enumeratedValue>
74639                <enumeratedValue>
74640                  <name>1010</name>
74641                  <description>ISF flag and Interrupt on falling-edge.</description>
74642                  <value>#1010</value>
74643                </enumeratedValue>
74644                <enumeratedValue>
74645                  <name>1011</name>
74646                  <description>ISF flag and Interrupt on either edge.</description>
74647                  <value>#1011</value>
74648                </enumeratedValue>
74649                <enumeratedValue>
74650                  <name>1100</name>
74651                  <description>ISF flag and Interrupt when logic 1.</description>
74652                  <value>#1100</value>
74653                </enumeratedValue>
74654              </enumeratedValues>
74655            </field>
74656            <field>
74657              <name>ISF</name>
74658              <description>Interrupt Status Flag</description>
74659              <bitOffset>24</bitOffset>
74660              <bitWidth>1</bitWidth>
74661              <access>read-write</access>
74662              <enumeratedValues>
74663                <enumeratedValue>
74664                  <name>0</name>
74665                  <description>Configured interrupt is not detected.</description>
74666                  <value>#0</value>
74667                </enumeratedValue>
74668                <enumeratedValue>
74669                  <name>1</name>
74670                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
74671                  <value>#1</value>
74672                </enumeratedValue>
74673              </enumeratedValues>
74674            </field>
74675          </fields>
74676        </register>
74677        <register>
74678          <name>PCR30</name>
74679          <description>Pin Control Register n</description>
74680          <addressOffset>0x78</addressOffset>
74681          <size>32</size>
74682          <access>read-write</access>
74683          <resetValue>0</resetValue>
74684          <resetMask>0xFFFFFFFF</resetMask>
74685          <fields>
74686            <field>
74687              <name>PS</name>
74688              <description>Pull Select</description>
74689              <bitOffset>0</bitOffset>
74690              <bitWidth>1</bitWidth>
74691              <access>read-only</access>
74692              <enumeratedValues>
74693                <enumeratedValue>
74694                  <name>0</name>
74695                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
74696                  <value>#0</value>
74697                </enumeratedValue>
74698                <enumeratedValue>
74699                  <name>1</name>
74700                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
74701                  <value>#1</value>
74702                </enumeratedValue>
74703              </enumeratedValues>
74704            </field>
74705            <field>
74706              <name>PE</name>
74707              <description>Pull Enable</description>
74708              <bitOffset>1</bitOffset>
74709              <bitWidth>1</bitWidth>
74710              <access>read-only</access>
74711              <enumeratedValues>
74712                <enumeratedValue>
74713                  <name>0</name>
74714                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
74715                  <value>#0</value>
74716                </enumeratedValue>
74717                <enumeratedValue>
74718                  <name>1</name>
74719                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
74720                  <value>#1</value>
74721                </enumeratedValue>
74722              </enumeratedValues>
74723            </field>
74724            <field>
74725              <name>SRE</name>
74726              <description>Slew Rate Enable</description>
74727              <bitOffset>2</bitOffset>
74728              <bitWidth>1</bitWidth>
74729              <access>read-only</access>
74730              <enumeratedValues>
74731                <enumeratedValue>
74732                  <name>0</name>
74733                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
74734                  <value>#0</value>
74735                </enumeratedValue>
74736                <enumeratedValue>
74737                  <name>1</name>
74738                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
74739                  <value>#1</value>
74740                </enumeratedValue>
74741              </enumeratedValues>
74742            </field>
74743            <field>
74744              <name>PFE</name>
74745              <description>Passive Filter Enable</description>
74746              <bitOffset>4</bitOffset>
74747              <bitWidth>1</bitWidth>
74748              <access>read-only</access>
74749              <enumeratedValues>
74750                <enumeratedValue>
74751                  <name>0</name>
74752                  <description>Passive input filter is disabled on the corresponding pin.</description>
74753                  <value>#0</value>
74754                </enumeratedValue>
74755                <enumeratedValue>
74756                  <name>1</name>
74757                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
74758                  <value>#1</value>
74759                </enumeratedValue>
74760              </enumeratedValues>
74761            </field>
74762            <field>
74763              <name>ODE</name>
74764              <description>Open Drain Enable</description>
74765              <bitOffset>5</bitOffset>
74766              <bitWidth>1</bitWidth>
74767              <access>read-only</access>
74768              <enumeratedValues>
74769                <enumeratedValue>
74770                  <name>0</name>
74771                  <description>Open drain output is disabled on the corresponding pin.</description>
74772                  <value>#0</value>
74773                </enumeratedValue>
74774                <enumeratedValue>
74775                  <name>1</name>
74776                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
74777                  <value>#1</value>
74778                </enumeratedValue>
74779              </enumeratedValues>
74780            </field>
74781            <field>
74782              <name>DSE</name>
74783              <description>Drive Strength Enable</description>
74784              <bitOffset>6</bitOffset>
74785              <bitWidth>1</bitWidth>
74786              <access>read-only</access>
74787              <enumeratedValues>
74788                <enumeratedValue>
74789                  <name>0</name>
74790                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
74791                  <value>#0</value>
74792                </enumeratedValue>
74793                <enumeratedValue>
74794                  <name>1</name>
74795                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
74796                  <value>#1</value>
74797                </enumeratedValue>
74798              </enumeratedValues>
74799            </field>
74800            <field>
74801              <name>MUX</name>
74802              <description>Pin Mux Control</description>
74803              <bitOffset>8</bitOffset>
74804              <bitWidth>3</bitWidth>
74805              <access>read-write</access>
74806              <enumeratedValues>
74807                <enumeratedValue>
74808                  <name>000</name>
74809                  <description>Pin disabled (Alternative 0) (analog).</description>
74810                  <value>#000</value>
74811                </enumeratedValue>
74812                <enumeratedValue>
74813                  <name>001</name>
74814                  <description>Alternative 1 (GPIO).</description>
74815                  <value>#001</value>
74816                </enumeratedValue>
74817                <enumeratedValue>
74818                  <name>010</name>
74819                  <description>Alternative 2 (chip-specific).</description>
74820                  <value>#010</value>
74821                </enumeratedValue>
74822                <enumeratedValue>
74823                  <name>011</name>
74824                  <description>Alternative 3 (chip-specific).</description>
74825                  <value>#011</value>
74826                </enumeratedValue>
74827                <enumeratedValue>
74828                  <name>100</name>
74829                  <description>Alternative 4 (chip-specific).</description>
74830                  <value>#100</value>
74831                </enumeratedValue>
74832                <enumeratedValue>
74833                  <name>101</name>
74834                  <description>Alternative 5 (chip-specific).</description>
74835                  <value>#101</value>
74836                </enumeratedValue>
74837                <enumeratedValue>
74838                  <name>110</name>
74839                  <description>Alternative 6 (chip-specific).</description>
74840                  <value>#110</value>
74841                </enumeratedValue>
74842                <enumeratedValue>
74843                  <name>111</name>
74844                  <description>Alternative 7 (chip-specific).</description>
74845                  <value>#111</value>
74846                </enumeratedValue>
74847              </enumeratedValues>
74848            </field>
74849            <field>
74850              <name>LK</name>
74851              <description>Lock Register</description>
74852              <bitOffset>15</bitOffset>
74853              <bitWidth>1</bitWidth>
74854              <access>read-write</access>
74855              <enumeratedValues>
74856                <enumeratedValue>
74857                  <name>0</name>
74858                  <description>Pin Control Register fields [15:0] are not locked.</description>
74859                  <value>#0</value>
74860                </enumeratedValue>
74861                <enumeratedValue>
74862                  <name>1</name>
74863                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
74864                  <value>#1</value>
74865                </enumeratedValue>
74866              </enumeratedValues>
74867            </field>
74868            <field>
74869              <name>IRQC</name>
74870              <description>Interrupt Configuration</description>
74871              <bitOffset>16</bitOffset>
74872              <bitWidth>4</bitWidth>
74873              <access>read-write</access>
74874              <enumeratedValues>
74875                <enumeratedValue>
74876                  <name>0000</name>
74877                  <description>Interrupt Status Flag (ISF) is disabled.</description>
74878                  <value>#0000</value>
74879                </enumeratedValue>
74880                <enumeratedValue>
74881                  <name>0001</name>
74882                  <description>ISF flag and DMA request on rising edge.</description>
74883                  <value>#0001</value>
74884                </enumeratedValue>
74885                <enumeratedValue>
74886                  <name>0010</name>
74887                  <description>ISF flag and DMA request on falling edge.</description>
74888                  <value>#0010</value>
74889                </enumeratedValue>
74890                <enumeratedValue>
74891                  <name>0011</name>
74892                  <description>ISF flag and DMA request on either edge.</description>
74893                  <value>#0011</value>
74894                </enumeratedValue>
74895                <enumeratedValue>
74896                  <name>1000</name>
74897                  <description>ISF flag and Interrupt when logic 0.</description>
74898                  <value>#1000</value>
74899                </enumeratedValue>
74900                <enumeratedValue>
74901                  <name>1001</name>
74902                  <description>ISF flag and Interrupt on rising-edge.</description>
74903                  <value>#1001</value>
74904                </enumeratedValue>
74905                <enumeratedValue>
74906                  <name>1010</name>
74907                  <description>ISF flag and Interrupt on falling-edge.</description>
74908                  <value>#1010</value>
74909                </enumeratedValue>
74910                <enumeratedValue>
74911                  <name>1011</name>
74912                  <description>ISF flag and Interrupt on either edge.</description>
74913                  <value>#1011</value>
74914                </enumeratedValue>
74915                <enumeratedValue>
74916                  <name>1100</name>
74917                  <description>ISF flag and Interrupt when logic 1.</description>
74918                  <value>#1100</value>
74919                </enumeratedValue>
74920              </enumeratedValues>
74921            </field>
74922            <field>
74923              <name>ISF</name>
74924              <description>Interrupt Status Flag</description>
74925              <bitOffset>24</bitOffset>
74926              <bitWidth>1</bitWidth>
74927              <access>read-write</access>
74928              <enumeratedValues>
74929                <enumeratedValue>
74930                  <name>0</name>
74931                  <description>Configured interrupt is not detected.</description>
74932                  <value>#0</value>
74933                </enumeratedValue>
74934                <enumeratedValue>
74935                  <name>1</name>
74936                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
74937                  <value>#1</value>
74938                </enumeratedValue>
74939              </enumeratedValues>
74940            </field>
74941          </fields>
74942        </register>
74943        <register>
74944          <name>PCR31</name>
74945          <description>Pin Control Register n</description>
74946          <addressOffset>0x7C</addressOffset>
74947          <size>32</size>
74948          <access>read-write</access>
74949          <resetValue>0</resetValue>
74950          <resetMask>0xFFFFFFFF</resetMask>
74951          <fields>
74952            <field>
74953              <name>PS</name>
74954              <description>Pull Select</description>
74955              <bitOffset>0</bitOffset>
74956              <bitWidth>1</bitWidth>
74957              <access>read-only</access>
74958              <enumeratedValues>
74959                <enumeratedValue>
74960                  <name>0</name>
74961                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
74962                  <value>#0</value>
74963                </enumeratedValue>
74964                <enumeratedValue>
74965                  <name>1</name>
74966                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
74967                  <value>#1</value>
74968                </enumeratedValue>
74969              </enumeratedValues>
74970            </field>
74971            <field>
74972              <name>PE</name>
74973              <description>Pull Enable</description>
74974              <bitOffset>1</bitOffset>
74975              <bitWidth>1</bitWidth>
74976              <access>read-only</access>
74977              <enumeratedValues>
74978                <enumeratedValue>
74979                  <name>0</name>
74980                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
74981                  <value>#0</value>
74982                </enumeratedValue>
74983                <enumeratedValue>
74984                  <name>1</name>
74985                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
74986                  <value>#1</value>
74987                </enumeratedValue>
74988              </enumeratedValues>
74989            </field>
74990            <field>
74991              <name>SRE</name>
74992              <description>Slew Rate Enable</description>
74993              <bitOffset>2</bitOffset>
74994              <bitWidth>1</bitWidth>
74995              <access>read-only</access>
74996              <enumeratedValues>
74997                <enumeratedValue>
74998                  <name>0</name>
74999                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
75000                  <value>#0</value>
75001                </enumeratedValue>
75002                <enumeratedValue>
75003                  <name>1</name>
75004                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
75005                  <value>#1</value>
75006                </enumeratedValue>
75007              </enumeratedValues>
75008            </field>
75009            <field>
75010              <name>PFE</name>
75011              <description>Passive Filter Enable</description>
75012              <bitOffset>4</bitOffset>
75013              <bitWidth>1</bitWidth>
75014              <access>read-only</access>
75015              <enumeratedValues>
75016                <enumeratedValue>
75017                  <name>0</name>
75018                  <description>Passive input filter is disabled on the corresponding pin.</description>
75019                  <value>#0</value>
75020                </enumeratedValue>
75021                <enumeratedValue>
75022                  <name>1</name>
75023                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
75024                  <value>#1</value>
75025                </enumeratedValue>
75026              </enumeratedValues>
75027            </field>
75028            <field>
75029              <name>ODE</name>
75030              <description>Open Drain Enable</description>
75031              <bitOffset>5</bitOffset>
75032              <bitWidth>1</bitWidth>
75033              <access>read-only</access>
75034              <enumeratedValues>
75035                <enumeratedValue>
75036                  <name>0</name>
75037                  <description>Open drain output is disabled on the corresponding pin.</description>
75038                  <value>#0</value>
75039                </enumeratedValue>
75040                <enumeratedValue>
75041                  <name>1</name>
75042                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
75043                  <value>#1</value>
75044                </enumeratedValue>
75045              </enumeratedValues>
75046            </field>
75047            <field>
75048              <name>DSE</name>
75049              <description>Drive Strength Enable</description>
75050              <bitOffset>6</bitOffset>
75051              <bitWidth>1</bitWidth>
75052              <access>read-only</access>
75053              <enumeratedValues>
75054                <enumeratedValue>
75055                  <name>0</name>
75056                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
75057                  <value>#0</value>
75058                </enumeratedValue>
75059                <enumeratedValue>
75060                  <name>1</name>
75061                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
75062                  <value>#1</value>
75063                </enumeratedValue>
75064              </enumeratedValues>
75065            </field>
75066            <field>
75067              <name>MUX</name>
75068              <description>Pin Mux Control</description>
75069              <bitOffset>8</bitOffset>
75070              <bitWidth>3</bitWidth>
75071              <access>read-write</access>
75072              <enumeratedValues>
75073                <enumeratedValue>
75074                  <name>000</name>
75075                  <description>Pin disabled (Alternative 0) (analog).</description>
75076                  <value>#000</value>
75077                </enumeratedValue>
75078                <enumeratedValue>
75079                  <name>001</name>
75080                  <description>Alternative 1 (GPIO).</description>
75081                  <value>#001</value>
75082                </enumeratedValue>
75083                <enumeratedValue>
75084                  <name>010</name>
75085                  <description>Alternative 2 (chip-specific).</description>
75086                  <value>#010</value>
75087                </enumeratedValue>
75088                <enumeratedValue>
75089                  <name>011</name>
75090                  <description>Alternative 3 (chip-specific).</description>
75091                  <value>#011</value>
75092                </enumeratedValue>
75093                <enumeratedValue>
75094                  <name>100</name>
75095                  <description>Alternative 4 (chip-specific).</description>
75096                  <value>#100</value>
75097                </enumeratedValue>
75098                <enumeratedValue>
75099                  <name>101</name>
75100                  <description>Alternative 5 (chip-specific).</description>
75101                  <value>#101</value>
75102                </enumeratedValue>
75103                <enumeratedValue>
75104                  <name>110</name>
75105                  <description>Alternative 6 (chip-specific).</description>
75106                  <value>#110</value>
75107                </enumeratedValue>
75108                <enumeratedValue>
75109                  <name>111</name>
75110                  <description>Alternative 7 (chip-specific).</description>
75111                  <value>#111</value>
75112                </enumeratedValue>
75113              </enumeratedValues>
75114            </field>
75115            <field>
75116              <name>LK</name>
75117              <description>Lock Register</description>
75118              <bitOffset>15</bitOffset>
75119              <bitWidth>1</bitWidth>
75120              <access>read-write</access>
75121              <enumeratedValues>
75122                <enumeratedValue>
75123                  <name>0</name>
75124                  <description>Pin Control Register fields [15:0] are not locked.</description>
75125                  <value>#0</value>
75126                </enumeratedValue>
75127                <enumeratedValue>
75128                  <name>1</name>
75129                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
75130                  <value>#1</value>
75131                </enumeratedValue>
75132              </enumeratedValues>
75133            </field>
75134            <field>
75135              <name>IRQC</name>
75136              <description>Interrupt Configuration</description>
75137              <bitOffset>16</bitOffset>
75138              <bitWidth>4</bitWidth>
75139              <access>read-write</access>
75140              <enumeratedValues>
75141                <enumeratedValue>
75142                  <name>0000</name>
75143                  <description>Interrupt Status Flag (ISF) is disabled.</description>
75144                  <value>#0000</value>
75145                </enumeratedValue>
75146                <enumeratedValue>
75147                  <name>0001</name>
75148                  <description>ISF flag and DMA request on rising edge.</description>
75149                  <value>#0001</value>
75150                </enumeratedValue>
75151                <enumeratedValue>
75152                  <name>0010</name>
75153                  <description>ISF flag and DMA request on falling edge.</description>
75154                  <value>#0010</value>
75155                </enumeratedValue>
75156                <enumeratedValue>
75157                  <name>0011</name>
75158                  <description>ISF flag and DMA request on either edge.</description>
75159                  <value>#0011</value>
75160                </enumeratedValue>
75161                <enumeratedValue>
75162                  <name>1000</name>
75163                  <description>ISF flag and Interrupt when logic 0.</description>
75164                  <value>#1000</value>
75165                </enumeratedValue>
75166                <enumeratedValue>
75167                  <name>1001</name>
75168                  <description>ISF flag and Interrupt on rising-edge.</description>
75169                  <value>#1001</value>
75170                </enumeratedValue>
75171                <enumeratedValue>
75172                  <name>1010</name>
75173                  <description>ISF flag and Interrupt on falling-edge.</description>
75174                  <value>#1010</value>
75175                </enumeratedValue>
75176                <enumeratedValue>
75177                  <name>1011</name>
75178                  <description>ISF flag and Interrupt on either edge.</description>
75179                  <value>#1011</value>
75180                </enumeratedValue>
75181                <enumeratedValue>
75182                  <name>1100</name>
75183                  <description>ISF flag and Interrupt when logic 1.</description>
75184                  <value>#1100</value>
75185                </enumeratedValue>
75186              </enumeratedValues>
75187            </field>
75188            <field>
75189              <name>ISF</name>
75190              <description>Interrupt Status Flag</description>
75191              <bitOffset>24</bitOffset>
75192              <bitWidth>1</bitWidth>
75193              <access>read-write</access>
75194              <enumeratedValues>
75195                <enumeratedValue>
75196                  <name>0</name>
75197                  <description>Configured interrupt is not detected.</description>
75198                  <value>#0</value>
75199                </enumeratedValue>
75200                <enumeratedValue>
75201                  <name>1</name>
75202                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
75203                  <value>#1</value>
75204                </enumeratedValue>
75205              </enumeratedValues>
75206            </field>
75207          </fields>
75208        </register>
75209        <register>
75210          <name>GPCLR</name>
75211          <description>Global Pin Control Low Register</description>
75212          <addressOffset>0x80</addressOffset>
75213          <size>32</size>
75214          <access>write-only</access>
75215          <resetValue>0</resetValue>
75216          <resetMask>0xFFFFFFFF</resetMask>
75217          <fields>
75218            <field>
75219              <name>GPWD</name>
75220              <description>Global Pin Write Data</description>
75221              <bitOffset>0</bitOffset>
75222              <bitWidth>16</bitWidth>
75223              <access>write-only</access>
75224            </field>
75225            <field>
75226              <name>GPWE0</name>
75227              <description>Global Pin Write Enable</description>
75228              <bitOffset>16</bitOffset>
75229              <bitWidth>1</bitWidth>
75230              <access>write-only</access>
75231              <enumeratedValues>
75232                <enumeratedValue>
75233                  <name>0</name>
75234                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75235                  <value>#0</value>
75236                </enumeratedValue>
75237                <enumeratedValue>
75238                  <name>1</name>
75239                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75240                  <value>#1</value>
75241                </enumeratedValue>
75242              </enumeratedValues>
75243            </field>
75244            <field>
75245              <name>GPWE1</name>
75246              <description>Global Pin Write Enable</description>
75247              <bitOffset>17</bitOffset>
75248              <bitWidth>1</bitWidth>
75249              <access>write-only</access>
75250              <enumeratedValues>
75251                <enumeratedValue>
75252                  <name>0</name>
75253                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75254                  <value>#0</value>
75255                </enumeratedValue>
75256                <enumeratedValue>
75257                  <name>1</name>
75258                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75259                  <value>#1</value>
75260                </enumeratedValue>
75261              </enumeratedValues>
75262            </field>
75263            <field>
75264              <name>GPWE2</name>
75265              <description>Global Pin Write Enable</description>
75266              <bitOffset>18</bitOffset>
75267              <bitWidth>1</bitWidth>
75268              <access>write-only</access>
75269              <enumeratedValues>
75270                <enumeratedValue>
75271                  <name>0</name>
75272                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75273                  <value>#0</value>
75274                </enumeratedValue>
75275                <enumeratedValue>
75276                  <name>1</name>
75277                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75278                  <value>#1</value>
75279                </enumeratedValue>
75280              </enumeratedValues>
75281            </field>
75282            <field>
75283              <name>GPWE3</name>
75284              <description>Global Pin Write Enable</description>
75285              <bitOffset>19</bitOffset>
75286              <bitWidth>1</bitWidth>
75287              <access>write-only</access>
75288              <enumeratedValues>
75289                <enumeratedValue>
75290                  <name>0</name>
75291                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75292                  <value>#0</value>
75293                </enumeratedValue>
75294                <enumeratedValue>
75295                  <name>1</name>
75296                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75297                  <value>#1</value>
75298                </enumeratedValue>
75299              </enumeratedValues>
75300            </field>
75301            <field>
75302              <name>GPWE4</name>
75303              <description>Global Pin Write Enable</description>
75304              <bitOffset>20</bitOffset>
75305              <bitWidth>1</bitWidth>
75306              <access>write-only</access>
75307              <enumeratedValues>
75308                <enumeratedValue>
75309                  <name>0</name>
75310                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75311                  <value>#0</value>
75312                </enumeratedValue>
75313                <enumeratedValue>
75314                  <name>1</name>
75315                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75316                  <value>#1</value>
75317                </enumeratedValue>
75318              </enumeratedValues>
75319            </field>
75320            <field>
75321              <name>GPWE5</name>
75322              <description>Global Pin Write Enable</description>
75323              <bitOffset>21</bitOffset>
75324              <bitWidth>1</bitWidth>
75325              <access>write-only</access>
75326              <enumeratedValues>
75327                <enumeratedValue>
75328                  <name>0</name>
75329                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75330                  <value>#0</value>
75331                </enumeratedValue>
75332                <enumeratedValue>
75333                  <name>1</name>
75334                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75335                  <value>#1</value>
75336                </enumeratedValue>
75337              </enumeratedValues>
75338            </field>
75339            <field>
75340              <name>GPWE6</name>
75341              <description>Global Pin Write Enable</description>
75342              <bitOffset>22</bitOffset>
75343              <bitWidth>1</bitWidth>
75344              <access>write-only</access>
75345              <enumeratedValues>
75346                <enumeratedValue>
75347                  <name>0</name>
75348                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75349                  <value>#0</value>
75350                </enumeratedValue>
75351                <enumeratedValue>
75352                  <name>1</name>
75353                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75354                  <value>#1</value>
75355                </enumeratedValue>
75356              </enumeratedValues>
75357            </field>
75358            <field>
75359              <name>GPWE7</name>
75360              <description>Global Pin Write Enable</description>
75361              <bitOffset>23</bitOffset>
75362              <bitWidth>1</bitWidth>
75363              <access>write-only</access>
75364              <enumeratedValues>
75365                <enumeratedValue>
75366                  <name>0</name>
75367                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75368                  <value>#0</value>
75369                </enumeratedValue>
75370                <enumeratedValue>
75371                  <name>1</name>
75372                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75373                  <value>#1</value>
75374                </enumeratedValue>
75375              </enumeratedValues>
75376            </field>
75377            <field>
75378              <name>GPWE8</name>
75379              <description>Global Pin Write Enable</description>
75380              <bitOffset>24</bitOffset>
75381              <bitWidth>1</bitWidth>
75382              <access>write-only</access>
75383              <enumeratedValues>
75384                <enumeratedValue>
75385                  <name>0</name>
75386                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75387                  <value>#0</value>
75388                </enumeratedValue>
75389                <enumeratedValue>
75390                  <name>1</name>
75391                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75392                  <value>#1</value>
75393                </enumeratedValue>
75394              </enumeratedValues>
75395            </field>
75396            <field>
75397              <name>GPWE9</name>
75398              <description>Global Pin Write Enable</description>
75399              <bitOffset>25</bitOffset>
75400              <bitWidth>1</bitWidth>
75401              <access>write-only</access>
75402              <enumeratedValues>
75403                <enumeratedValue>
75404                  <name>0</name>
75405                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75406                  <value>#0</value>
75407                </enumeratedValue>
75408                <enumeratedValue>
75409                  <name>1</name>
75410                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75411                  <value>#1</value>
75412                </enumeratedValue>
75413              </enumeratedValues>
75414            </field>
75415            <field>
75416              <name>GPWE10</name>
75417              <description>Global Pin Write Enable</description>
75418              <bitOffset>26</bitOffset>
75419              <bitWidth>1</bitWidth>
75420              <access>write-only</access>
75421              <enumeratedValues>
75422                <enumeratedValue>
75423                  <name>0</name>
75424                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75425                  <value>#0</value>
75426                </enumeratedValue>
75427                <enumeratedValue>
75428                  <name>1</name>
75429                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75430                  <value>#1</value>
75431                </enumeratedValue>
75432              </enumeratedValues>
75433            </field>
75434            <field>
75435              <name>GPWE11</name>
75436              <description>Global Pin Write Enable</description>
75437              <bitOffset>27</bitOffset>
75438              <bitWidth>1</bitWidth>
75439              <access>write-only</access>
75440              <enumeratedValues>
75441                <enumeratedValue>
75442                  <name>0</name>
75443                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75444                  <value>#0</value>
75445                </enumeratedValue>
75446                <enumeratedValue>
75447                  <name>1</name>
75448                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75449                  <value>#1</value>
75450                </enumeratedValue>
75451              </enumeratedValues>
75452            </field>
75453            <field>
75454              <name>GPWE12</name>
75455              <description>Global Pin Write Enable</description>
75456              <bitOffset>28</bitOffset>
75457              <bitWidth>1</bitWidth>
75458              <access>write-only</access>
75459              <enumeratedValues>
75460                <enumeratedValue>
75461                  <name>0</name>
75462                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75463                  <value>#0</value>
75464                </enumeratedValue>
75465                <enumeratedValue>
75466                  <name>1</name>
75467                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75468                  <value>#1</value>
75469                </enumeratedValue>
75470              </enumeratedValues>
75471            </field>
75472            <field>
75473              <name>GPWE13</name>
75474              <description>Global Pin Write Enable</description>
75475              <bitOffset>29</bitOffset>
75476              <bitWidth>1</bitWidth>
75477              <access>write-only</access>
75478              <enumeratedValues>
75479                <enumeratedValue>
75480                  <name>0</name>
75481                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75482                  <value>#0</value>
75483                </enumeratedValue>
75484                <enumeratedValue>
75485                  <name>1</name>
75486                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75487                  <value>#1</value>
75488                </enumeratedValue>
75489              </enumeratedValues>
75490            </field>
75491            <field>
75492              <name>GPWE14</name>
75493              <description>Global Pin Write Enable</description>
75494              <bitOffset>30</bitOffset>
75495              <bitWidth>1</bitWidth>
75496              <access>write-only</access>
75497              <enumeratedValues>
75498                <enumeratedValue>
75499                  <name>0</name>
75500                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75501                  <value>#0</value>
75502                </enumeratedValue>
75503                <enumeratedValue>
75504                  <name>1</name>
75505                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75506                  <value>#1</value>
75507                </enumeratedValue>
75508              </enumeratedValues>
75509            </field>
75510            <field>
75511              <name>GPWE15</name>
75512              <description>Global Pin Write Enable</description>
75513              <bitOffset>31</bitOffset>
75514              <bitWidth>1</bitWidth>
75515              <access>write-only</access>
75516              <enumeratedValues>
75517                <enumeratedValue>
75518                  <name>0</name>
75519                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75520                  <value>#0</value>
75521                </enumeratedValue>
75522                <enumeratedValue>
75523                  <name>1</name>
75524                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75525                  <value>#1</value>
75526                </enumeratedValue>
75527              </enumeratedValues>
75528            </field>
75529          </fields>
75530        </register>
75531        <register>
75532          <name>GPCHR</name>
75533          <description>Global Pin Control High Register</description>
75534          <addressOffset>0x84</addressOffset>
75535          <size>32</size>
75536          <access>write-only</access>
75537          <resetValue>0</resetValue>
75538          <resetMask>0xFFFFFFFF</resetMask>
75539          <fields>
75540            <field>
75541              <name>GPWD</name>
75542              <description>Global Pin Write Data</description>
75543              <bitOffset>0</bitOffset>
75544              <bitWidth>16</bitWidth>
75545              <access>write-only</access>
75546            </field>
75547            <field>
75548              <name>GPWE0</name>
75549              <description>Global Pin Write Enable</description>
75550              <bitOffset>16</bitOffset>
75551              <bitWidth>1</bitWidth>
75552              <access>write-only</access>
75553              <enumeratedValues>
75554                <enumeratedValue>
75555                  <name>0</name>
75556                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75557                  <value>#0</value>
75558                </enumeratedValue>
75559                <enumeratedValue>
75560                  <name>1</name>
75561                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75562                  <value>#1</value>
75563                </enumeratedValue>
75564              </enumeratedValues>
75565            </field>
75566            <field>
75567              <name>GPWE1</name>
75568              <description>Global Pin Write Enable</description>
75569              <bitOffset>17</bitOffset>
75570              <bitWidth>1</bitWidth>
75571              <access>write-only</access>
75572              <enumeratedValues>
75573                <enumeratedValue>
75574                  <name>0</name>
75575                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75576                  <value>#0</value>
75577                </enumeratedValue>
75578                <enumeratedValue>
75579                  <name>1</name>
75580                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75581                  <value>#1</value>
75582                </enumeratedValue>
75583              </enumeratedValues>
75584            </field>
75585            <field>
75586              <name>GPWE2</name>
75587              <description>Global Pin Write Enable</description>
75588              <bitOffset>18</bitOffset>
75589              <bitWidth>1</bitWidth>
75590              <access>write-only</access>
75591              <enumeratedValues>
75592                <enumeratedValue>
75593                  <name>0</name>
75594                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75595                  <value>#0</value>
75596                </enumeratedValue>
75597                <enumeratedValue>
75598                  <name>1</name>
75599                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75600                  <value>#1</value>
75601                </enumeratedValue>
75602              </enumeratedValues>
75603            </field>
75604            <field>
75605              <name>GPWE3</name>
75606              <description>Global Pin Write Enable</description>
75607              <bitOffset>19</bitOffset>
75608              <bitWidth>1</bitWidth>
75609              <access>write-only</access>
75610              <enumeratedValues>
75611                <enumeratedValue>
75612                  <name>0</name>
75613                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75614                  <value>#0</value>
75615                </enumeratedValue>
75616                <enumeratedValue>
75617                  <name>1</name>
75618                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75619                  <value>#1</value>
75620                </enumeratedValue>
75621              </enumeratedValues>
75622            </field>
75623            <field>
75624              <name>GPWE4</name>
75625              <description>Global Pin Write Enable</description>
75626              <bitOffset>20</bitOffset>
75627              <bitWidth>1</bitWidth>
75628              <access>write-only</access>
75629              <enumeratedValues>
75630                <enumeratedValue>
75631                  <name>0</name>
75632                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75633                  <value>#0</value>
75634                </enumeratedValue>
75635                <enumeratedValue>
75636                  <name>1</name>
75637                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75638                  <value>#1</value>
75639                </enumeratedValue>
75640              </enumeratedValues>
75641            </field>
75642            <field>
75643              <name>GPWE5</name>
75644              <description>Global Pin Write Enable</description>
75645              <bitOffset>21</bitOffset>
75646              <bitWidth>1</bitWidth>
75647              <access>write-only</access>
75648              <enumeratedValues>
75649                <enumeratedValue>
75650                  <name>0</name>
75651                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75652                  <value>#0</value>
75653                </enumeratedValue>
75654                <enumeratedValue>
75655                  <name>1</name>
75656                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75657                  <value>#1</value>
75658                </enumeratedValue>
75659              </enumeratedValues>
75660            </field>
75661            <field>
75662              <name>GPWE6</name>
75663              <description>Global Pin Write Enable</description>
75664              <bitOffset>22</bitOffset>
75665              <bitWidth>1</bitWidth>
75666              <access>write-only</access>
75667              <enumeratedValues>
75668                <enumeratedValue>
75669                  <name>0</name>
75670                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75671                  <value>#0</value>
75672                </enumeratedValue>
75673                <enumeratedValue>
75674                  <name>1</name>
75675                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75676                  <value>#1</value>
75677                </enumeratedValue>
75678              </enumeratedValues>
75679            </field>
75680            <field>
75681              <name>GPWE7</name>
75682              <description>Global Pin Write Enable</description>
75683              <bitOffset>23</bitOffset>
75684              <bitWidth>1</bitWidth>
75685              <access>write-only</access>
75686              <enumeratedValues>
75687                <enumeratedValue>
75688                  <name>0</name>
75689                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75690                  <value>#0</value>
75691                </enumeratedValue>
75692                <enumeratedValue>
75693                  <name>1</name>
75694                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75695                  <value>#1</value>
75696                </enumeratedValue>
75697              </enumeratedValues>
75698            </field>
75699            <field>
75700              <name>GPWE8</name>
75701              <description>Global Pin Write Enable</description>
75702              <bitOffset>24</bitOffset>
75703              <bitWidth>1</bitWidth>
75704              <access>write-only</access>
75705              <enumeratedValues>
75706                <enumeratedValue>
75707                  <name>0</name>
75708                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75709                  <value>#0</value>
75710                </enumeratedValue>
75711                <enumeratedValue>
75712                  <name>1</name>
75713                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75714                  <value>#1</value>
75715                </enumeratedValue>
75716              </enumeratedValues>
75717            </field>
75718            <field>
75719              <name>GPWE9</name>
75720              <description>Global Pin Write Enable</description>
75721              <bitOffset>25</bitOffset>
75722              <bitWidth>1</bitWidth>
75723              <access>write-only</access>
75724              <enumeratedValues>
75725                <enumeratedValue>
75726                  <name>0</name>
75727                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75728                  <value>#0</value>
75729                </enumeratedValue>
75730                <enumeratedValue>
75731                  <name>1</name>
75732                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75733                  <value>#1</value>
75734                </enumeratedValue>
75735              </enumeratedValues>
75736            </field>
75737            <field>
75738              <name>GPWE10</name>
75739              <description>Global Pin Write Enable</description>
75740              <bitOffset>26</bitOffset>
75741              <bitWidth>1</bitWidth>
75742              <access>write-only</access>
75743              <enumeratedValues>
75744                <enumeratedValue>
75745                  <name>0</name>
75746                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75747                  <value>#0</value>
75748                </enumeratedValue>
75749                <enumeratedValue>
75750                  <name>1</name>
75751                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75752                  <value>#1</value>
75753                </enumeratedValue>
75754              </enumeratedValues>
75755            </field>
75756            <field>
75757              <name>GPWE11</name>
75758              <description>Global Pin Write Enable</description>
75759              <bitOffset>27</bitOffset>
75760              <bitWidth>1</bitWidth>
75761              <access>write-only</access>
75762              <enumeratedValues>
75763                <enumeratedValue>
75764                  <name>0</name>
75765                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75766                  <value>#0</value>
75767                </enumeratedValue>
75768                <enumeratedValue>
75769                  <name>1</name>
75770                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75771                  <value>#1</value>
75772                </enumeratedValue>
75773              </enumeratedValues>
75774            </field>
75775            <field>
75776              <name>GPWE12</name>
75777              <description>Global Pin Write Enable</description>
75778              <bitOffset>28</bitOffset>
75779              <bitWidth>1</bitWidth>
75780              <access>write-only</access>
75781              <enumeratedValues>
75782                <enumeratedValue>
75783                  <name>0</name>
75784                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75785                  <value>#0</value>
75786                </enumeratedValue>
75787                <enumeratedValue>
75788                  <name>1</name>
75789                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75790                  <value>#1</value>
75791                </enumeratedValue>
75792              </enumeratedValues>
75793            </field>
75794            <field>
75795              <name>GPWE13</name>
75796              <description>Global Pin Write Enable</description>
75797              <bitOffset>29</bitOffset>
75798              <bitWidth>1</bitWidth>
75799              <access>write-only</access>
75800              <enumeratedValues>
75801                <enumeratedValue>
75802                  <name>0</name>
75803                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75804                  <value>#0</value>
75805                </enumeratedValue>
75806                <enumeratedValue>
75807                  <name>1</name>
75808                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75809                  <value>#1</value>
75810                </enumeratedValue>
75811              </enumeratedValues>
75812            </field>
75813            <field>
75814              <name>GPWE14</name>
75815              <description>Global Pin Write Enable</description>
75816              <bitOffset>30</bitOffset>
75817              <bitWidth>1</bitWidth>
75818              <access>write-only</access>
75819              <enumeratedValues>
75820                <enumeratedValue>
75821                  <name>0</name>
75822                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75823                  <value>#0</value>
75824                </enumeratedValue>
75825                <enumeratedValue>
75826                  <name>1</name>
75827                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75828                  <value>#1</value>
75829                </enumeratedValue>
75830              </enumeratedValues>
75831            </field>
75832            <field>
75833              <name>GPWE15</name>
75834              <description>Global Pin Write Enable</description>
75835              <bitOffset>31</bitOffset>
75836              <bitWidth>1</bitWidth>
75837              <access>write-only</access>
75838              <enumeratedValues>
75839                <enumeratedValue>
75840                  <name>0</name>
75841                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
75842                  <value>#0</value>
75843                </enumeratedValue>
75844                <enumeratedValue>
75845                  <name>1</name>
75846                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
75847                  <value>#1</value>
75848                </enumeratedValue>
75849              </enumeratedValues>
75850            </field>
75851          </fields>
75852        </register>
75853        <register>
75854          <name>ISFR</name>
75855          <description>Interrupt Status Flag Register</description>
75856          <addressOffset>0xA0</addressOffset>
75857          <size>32</size>
75858          <access>read-write</access>
75859          <resetValue>0</resetValue>
75860          <resetMask>0xFFFFFFFF</resetMask>
75861          <fields>
75862            <field>
75863              <name>ISF0</name>
75864              <description>Interrupt Status Flag</description>
75865              <bitOffset>0</bitOffset>
75866              <bitWidth>1</bitWidth>
75867              <access>read-write</access>
75868              <enumeratedValues>
75869                <enumeratedValue>
75870                  <name>0</name>
75871                  <description>Configured interrupt is not detected.</description>
75872                  <value>#0</value>
75873                </enumeratedValue>
75874                <enumeratedValue>
75875                  <name>1</name>
75876                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
75877                  <value>#1</value>
75878                </enumeratedValue>
75879              </enumeratedValues>
75880            </field>
75881            <field>
75882              <name>ISF1</name>
75883              <description>Interrupt Status Flag</description>
75884              <bitOffset>1</bitOffset>
75885              <bitWidth>1</bitWidth>
75886              <access>read-write</access>
75887              <enumeratedValues>
75888                <enumeratedValue>
75889                  <name>0</name>
75890                  <description>Configured interrupt is not detected.</description>
75891                  <value>#0</value>
75892                </enumeratedValue>
75893                <enumeratedValue>
75894                  <name>1</name>
75895                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
75896                  <value>#1</value>
75897                </enumeratedValue>
75898              </enumeratedValues>
75899            </field>
75900            <field>
75901              <name>ISF2</name>
75902              <description>Interrupt Status Flag</description>
75903              <bitOffset>2</bitOffset>
75904              <bitWidth>1</bitWidth>
75905              <access>read-write</access>
75906              <enumeratedValues>
75907                <enumeratedValue>
75908                  <name>0</name>
75909                  <description>Configured interrupt is not detected.</description>
75910                  <value>#0</value>
75911                </enumeratedValue>
75912                <enumeratedValue>
75913                  <name>1</name>
75914                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
75915                  <value>#1</value>
75916                </enumeratedValue>
75917              </enumeratedValues>
75918            </field>
75919            <field>
75920              <name>ISF3</name>
75921              <description>Interrupt Status Flag</description>
75922              <bitOffset>3</bitOffset>
75923              <bitWidth>1</bitWidth>
75924              <access>read-write</access>
75925              <enumeratedValues>
75926                <enumeratedValue>
75927                  <name>0</name>
75928                  <description>Configured interrupt is not detected.</description>
75929                  <value>#0</value>
75930                </enumeratedValue>
75931                <enumeratedValue>
75932                  <name>1</name>
75933                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
75934                  <value>#1</value>
75935                </enumeratedValue>
75936              </enumeratedValues>
75937            </field>
75938            <field>
75939              <name>ISF4</name>
75940              <description>Interrupt Status Flag</description>
75941              <bitOffset>4</bitOffset>
75942              <bitWidth>1</bitWidth>
75943              <access>read-write</access>
75944              <enumeratedValues>
75945                <enumeratedValue>
75946                  <name>0</name>
75947                  <description>Configured interrupt is not detected.</description>
75948                  <value>#0</value>
75949                </enumeratedValue>
75950                <enumeratedValue>
75951                  <name>1</name>
75952                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
75953                  <value>#1</value>
75954                </enumeratedValue>
75955              </enumeratedValues>
75956            </field>
75957            <field>
75958              <name>ISF5</name>
75959              <description>Interrupt Status Flag</description>
75960              <bitOffset>5</bitOffset>
75961              <bitWidth>1</bitWidth>
75962              <access>read-write</access>
75963              <enumeratedValues>
75964                <enumeratedValue>
75965                  <name>0</name>
75966                  <description>Configured interrupt is not detected.</description>
75967                  <value>#0</value>
75968                </enumeratedValue>
75969                <enumeratedValue>
75970                  <name>1</name>
75971                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
75972                  <value>#1</value>
75973                </enumeratedValue>
75974              </enumeratedValues>
75975            </field>
75976            <field>
75977              <name>ISF6</name>
75978              <description>Interrupt Status Flag</description>
75979              <bitOffset>6</bitOffset>
75980              <bitWidth>1</bitWidth>
75981              <access>read-write</access>
75982              <enumeratedValues>
75983                <enumeratedValue>
75984                  <name>0</name>
75985                  <description>Configured interrupt is not detected.</description>
75986                  <value>#0</value>
75987                </enumeratedValue>
75988                <enumeratedValue>
75989                  <name>1</name>
75990                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
75991                  <value>#1</value>
75992                </enumeratedValue>
75993              </enumeratedValues>
75994            </field>
75995            <field>
75996              <name>ISF7</name>
75997              <description>Interrupt Status Flag</description>
75998              <bitOffset>7</bitOffset>
75999              <bitWidth>1</bitWidth>
76000              <access>read-write</access>
76001              <enumeratedValues>
76002                <enumeratedValue>
76003                  <name>0</name>
76004                  <description>Configured interrupt is not detected.</description>
76005                  <value>#0</value>
76006                </enumeratedValue>
76007                <enumeratedValue>
76008                  <name>1</name>
76009                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76010                  <value>#1</value>
76011                </enumeratedValue>
76012              </enumeratedValues>
76013            </field>
76014            <field>
76015              <name>ISF8</name>
76016              <description>Interrupt Status Flag</description>
76017              <bitOffset>8</bitOffset>
76018              <bitWidth>1</bitWidth>
76019              <access>read-write</access>
76020              <enumeratedValues>
76021                <enumeratedValue>
76022                  <name>0</name>
76023                  <description>Configured interrupt is not detected.</description>
76024                  <value>#0</value>
76025                </enumeratedValue>
76026                <enumeratedValue>
76027                  <name>1</name>
76028                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76029                  <value>#1</value>
76030                </enumeratedValue>
76031              </enumeratedValues>
76032            </field>
76033            <field>
76034              <name>ISF9</name>
76035              <description>Interrupt Status Flag</description>
76036              <bitOffset>9</bitOffset>
76037              <bitWidth>1</bitWidth>
76038              <access>read-write</access>
76039              <enumeratedValues>
76040                <enumeratedValue>
76041                  <name>0</name>
76042                  <description>Configured interrupt is not detected.</description>
76043                  <value>#0</value>
76044                </enumeratedValue>
76045                <enumeratedValue>
76046                  <name>1</name>
76047                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76048                  <value>#1</value>
76049                </enumeratedValue>
76050              </enumeratedValues>
76051            </field>
76052            <field>
76053              <name>ISF10</name>
76054              <description>Interrupt Status Flag</description>
76055              <bitOffset>10</bitOffset>
76056              <bitWidth>1</bitWidth>
76057              <access>read-write</access>
76058              <enumeratedValues>
76059                <enumeratedValue>
76060                  <name>0</name>
76061                  <description>Configured interrupt is not detected.</description>
76062                  <value>#0</value>
76063                </enumeratedValue>
76064                <enumeratedValue>
76065                  <name>1</name>
76066                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76067                  <value>#1</value>
76068                </enumeratedValue>
76069              </enumeratedValues>
76070            </field>
76071            <field>
76072              <name>ISF11</name>
76073              <description>Interrupt Status Flag</description>
76074              <bitOffset>11</bitOffset>
76075              <bitWidth>1</bitWidth>
76076              <access>read-write</access>
76077              <enumeratedValues>
76078                <enumeratedValue>
76079                  <name>0</name>
76080                  <description>Configured interrupt is not detected.</description>
76081                  <value>#0</value>
76082                </enumeratedValue>
76083                <enumeratedValue>
76084                  <name>1</name>
76085                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76086                  <value>#1</value>
76087                </enumeratedValue>
76088              </enumeratedValues>
76089            </field>
76090            <field>
76091              <name>ISF12</name>
76092              <description>Interrupt Status Flag</description>
76093              <bitOffset>12</bitOffset>
76094              <bitWidth>1</bitWidth>
76095              <access>read-write</access>
76096              <enumeratedValues>
76097                <enumeratedValue>
76098                  <name>0</name>
76099                  <description>Configured interrupt is not detected.</description>
76100                  <value>#0</value>
76101                </enumeratedValue>
76102                <enumeratedValue>
76103                  <name>1</name>
76104                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76105                  <value>#1</value>
76106                </enumeratedValue>
76107              </enumeratedValues>
76108            </field>
76109            <field>
76110              <name>ISF13</name>
76111              <description>Interrupt Status Flag</description>
76112              <bitOffset>13</bitOffset>
76113              <bitWidth>1</bitWidth>
76114              <access>read-write</access>
76115              <enumeratedValues>
76116                <enumeratedValue>
76117                  <name>0</name>
76118                  <description>Configured interrupt is not detected.</description>
76119                  <value>#0</value>
76120                </enumeratedValue>
76121                <enumeratedValue>
76122                  <name>1</name>
76123                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76124                  <value>#1</value>
76125                </enumeratedValue>
76126              </enumeratedValues>
76127            </field>
76128            <field>
76129              <name>ISF14</name>
76130              <description>Interrupt Status Flag</description>
76131              <bitOffset>14</bitOffset>
76132              <bitWidth>1</bitWidth>
76133              <access>read-write</access>
76134              <enumeratedValues>
76135                <enumeratedValue>
76136                  <name>0</name>
76137                  <description>Configured interrupt is not detected.</description>
76138                  <value>#0</value>
76139                </enumeratedValue>
76140                <enumeratedValue>
76141                  <name>1</name>
76142                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76143                  <value>#1</value>
76144                </enumeratedValue>
76145              </enumeratedValues>
76146            </field>
76147            <field>
76148              <name>ISF15</name>
76149              <description>Interrupt Status Flag</description>
76150              <bitOffset>15</bitOffset>
76151              <bitWidth>1</bitWidth>
76152              <access>read-write</access>
76153              <enumeratedValues>
76154                <enumeratedValue>
76155                  <name>0</name>
76156                  <description>Configured interrupt is not detected.</description>
76157                  <value>#0</value>
76158                </enumeratedValue>
76159                <enumeratedValue>
76160                  <name>1</name>
76161                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76162                  <value>#1</value>
76163                </enumeratedValue>
76164              </enumeratedValues>
76165            </field>
76166            <field>
76167              <name>ISF16</name>
76168              <description>Interrupt Status Flag</description>
76169              <bitOffset>16</bitOffset>
76170              <bitWidth>1</bitWidth>
76171              <access>read-write</access>
76172              <enumeratedValues>
76173                <enumeratedValue>
76174                  <name>0</name>
76175                  <description>Configured interrupt is not detected.</description>
76176                  <value>#0</value>
76177                </enumeratedValue>
76178                <enumeratedValue>
76179                  <name>1</name>
76180                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76181                  <value>#1</value>
76182                </enumeratedValue>
76183              </enumeratedValues>
76184            </field>
76185            <field>
76186              <name>ISF17</name>
76187              <description>Interrupt Status Flag</description>
76188              <bitOffset>17</bitOffset>
76189              <bitWidth>1</bitWidth>
76190              <access>read-write</access>
76191              <enumeratedValues>
76192                <enumeratedValue>
76193                  <name>0</name>
76194                  <description>Configured interrupt is not detected.</description>
76195                  <value>#0</value>
76196                </enumeratedValue>
76197                <enumeratedValue>
76198                  <name>1</name>
76199                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76200                  <value>#1</value>
76201                </enumeratedValue>
76202              </enumeratedValues>
76203            </field>
76204            <field>
76205              <name>ISF18</name>
76206              <description>Interrupt Status Flag</description>
76207              <bitOffset>18</bitOffset>
76208              <bitWidth>1</bitWidth>
76209              <access>read-write</access>
76210              <enumeratedValues>
76211                <enumeratedValue>
76212                  <name>0</name>
76213                  <description>Configured interrupt is not detected.</description>
76214                  <value>#0</value>
76215                </enumeratedValue>
76216                <enumeratedValue>
76217                  <name>1</name>
76218                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76219                  <value>#1</value>
76220                </enumeratedValue>
76221              </enumeratedValues>
76222            </field>
76223            <field>
76224              <name>ISF19</name>
76225              <description>Interrupt Status Flag</description>
76226              <bitOffset>19</bitOffset>
76227              <bitWidth>1</bitWidth>
76228              <access>read-write</access>
76229              <enumeratedValues>
76230                <enumeratedValue>
76231                  <name>0</name>
76232                  <description>Configured interrupt is not detected.</description>
76233                  <value>#0</value>
76234                </enumeratedValue>
76235                <enumeratedValue>
76236                  <name>1</name>
76237                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76238                  <value>#1</value>
76239                </enumeratedValue>
76240              </enumeratedValues>
76241            </field>
76242            <field>
76243              <name>ISF20</name>
76244              <description>Interrupt Status Flag</description>
76245              <bitOffset>20</bitOffset>
76246              <bitWidth>1</bitWidth>
76247              <access>read-write</access>
76248              <enumeratedValues>
76249                <enumeratedValue>
76250                  <name>0</name>
76251                  <description>Configured interrupt is not detected.</description>
76252                  <value>#0</value>
76253                </enumeratedValue>
76254                <enumeratedValue>
76255                  <name>1</name>
76256                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76257                  <value>#1</value>
76258                </enumeratedValue>
76259              </enumeratedValues>
76260            </field>
76261            <field>
76262              <name>ISF21</name>
76263              <description>Interrupt Status Flag</description>
76264              <bitOffset>21</bitOffset>
76265              <bitWidth>1</bitWidth>
76266              <access>read-write</access>
76267              <enumeratedValues>
76268                <enumeratedValue>
76269                  <name>0</name>
76270                  <description>Configured interrupt is not detected.</description>
76271                  <value>#0</value>
76272                </enumeratedValue>
76273                <enumeratedValue>
76274                  <name>1</name>
76275                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76276                  <value>#1</value>
76277                </enumeratedValue>
76278              </enumeratedValues>
76279            </field>
76280            <field>
76281              <name>ISF22</name>
76282              <description>Interrupt Status Flag</description>
76283              <bitOffset>22</bitOffset>
76284              <bitWidth>1</bitWidth>
76285              <access>read-write</access>
76286              <enumeratedValues>
76287                <enumeratedValue>
76288                  <name>0</name>
76289                  <description>Configured interrupt is not detected.</description>
76290                  <value>#0</value>
76291                </enumeratedValue>
76292                <enumeratedValue>
76293                  <name>1</name>
76294                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76295                  <value>#1</value>
76296                </enumeratedValue>
76297              </enumeratedValues>
76298            </field>
76299            <field>
76300              <name>ISF23</name>
76301              <description>Interrupt Status Flag</description>
76302              <bitOffset>23</bitOffset>
76303              <bitWidth>1</bitWidth>
76304              <access>read-write</access>
76305              <enumeratedValues>
76306                <enumeratedValue>
76307                  <name>0</name>
76308                  <description>Configured interrupt is not detected.</description>
76309                  <value>#0</value>
76310                </enumeratedValue>
76311                <enumeratedValue>
76312                  <name>1</name>
76313                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76314                  <value>#1</value>
76315                </enumeratedValue>
76316              </enumeratedValues>
76317            </field>
76318            <field>
76319              <name>ISF24</name>
76320              <description>Interrupt Status Flag</description>
76321              <bitOffset>24</bitOffset>
76322              <bitWidth>1</bitWidth>
76323              <access>read-write</access>
76324              <enumeratedValues>
76325                <enumeratedValue>
76326                  <name>0</name>
76327                  <description>Configured interrupt is not detected.</description>
76328                  <value>#0</value>
76329                </enumeratedValue>
76330                <enumeratedValue>
76331                  <name>1</name>
76332                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76333                  <value>#1</value>
76334                </enumeratedValue>
76335              </enumeratedValues>
76336            </field>
76337            <field>
76338              <name>ISF25</name>
76339              <description>Interrupt Status Flag</description>
76340              <bitOffset>25</bitOffset>
76341              <bitWidth>1</bitWidth>
76342              <access>read-write</access>
76343              <enumeratedValues>
76344                <enumeratedValue>
76345                  <name>0</name>
76346                  <description>Configured interrupt is not detected.</description>
76347                  <value>#0</value>
76348                </enumeratedValue>
76349                <enumeratedValue>
76350                  <name>1</name>
76351                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76352                  <value>#1</value>
76353                </enumeratedValue>
76354              </enumeratedValues>
76355            </field>
76356            <field>
76357              <name>ISF26</name>
76358              <description>Interrupt Status Flag</description>
76359              <bitOffset>26</bitOffset>
76360              <bitWidth>1</bitWidth>
76361              <access>read-write</access>
76362              <enumeratedValues>
76363                <enumeratedValue>
76364                  <name>0</name>
76365                  <description>Configured interrupt is not detected.</description>
76366                  <value>#0</value>
76367                </enumeratedValue>
76368                <enumeratedValue>
76369                  <name>1</name>
76370                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76371                  <value>#1</value>
76372                </enumeratedValue>
76373              </enumeratedValues>
76374            </field>
76375            <field>
76376              <name>ISF27</name>
76377              <description>Interrupt Status Flag</description>
76378              <bitOffset>27</bitOffset>
76379              <bitWidth>1</bitWidth>
76380              <access>read-write</access>
76381              <enumeratedValues>
76382                <enumeratedValue>
76383                  <name>0</name>
76384                  <description>Configured interrupt is not detected.</description>
76385                  <value>#0</value>
76386                </enumeratedValue>
76387                <enumeratedValue>
76388                  <name>1</name>
76389                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76390                  <value>#1</value>
76391                </enumeratedValue>
76392              </enumeratedValues>
76393            </field>
76394            <field>
76395              <name>ISF28</name>
76396              <description>Interrupt Status Flag</description>
76397              <bitOffset>28</bitOffset>
76398              <bitWidth>1</bitWidth>
76399              <access>read-write</access>
76400              <enumeratedValues>
76401                <enumeratedValue>
76402                  <name>0</name>
76403                  <description>Configured interrupt is not detected.</description>
76404                  <value>#0</value>
76405                </enumeratedValue>
76406                <enumeratedValue>
76407                  <name>1</name>
76408                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76409                  <value>#1</value>
76410                </enumeratedValue>
76411              </enumeratedValues>
76412            </field>
76413            <field>
76414              <name>ISF29</name>
76415              <description>Interrupt Status Flag</description>
76416              <bitOffset>29</bitOffset>
76417              <bitWidth>1</bitWidth>
76418              <access>read-write</access>
76419              <enumeratedValues>
76420                <enumeratedValue>
76421                  <name>0</name>
76422                  <description>Configured interrupt is not detected.</description>
76423                  <value>#0</value>
76424                </enumeratedValue>
76425                <enumeratedValue>
76426                  <name>1</name>
76427                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76428                  <value>#1</value>
76429                </enumeratedValue>
76430              </enumeratedValues>
76431            </field>
76432            <field>
76433              <name>ISF30</name>
76434              <description>Interrupt Status Flag</description>
76435              <bitOffset>30</bitOffset>
76436              <bitWidth>1</bitWidth>
76437              <access>read-write</access>
76438              <enumeratedValues>
76439                <enumeratedValue>
76440                  <name>0</name>
76441                  <description>Configured interrupt is not detected.</description>
76442                  <value>#0</value>
76443                </enumeratedValue>
76444                <enumeratedValue>
76445                  <name>1</name>
76446                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76447                  <value>#1</value>
76448                </enumeratedValue>
76449              </enumeratedValues>
76450            </field>
76451            <field>
76452              <name>ISF31</name>
76453              <description>Interrupt Status Flag</description>
76454              <bitOffset>31</bitOffset>
76455              <bitWidth>1</bitWidth>
76456              <access>read-write</access>
76457              <enumeratedValues>
76458                <enumeratedValue>
76459                  <name>0</name>
76460                  <description>Configured interrupt is not detected.</description>
76461                  <value>#0</value>
76462                </enumeratedValue>
76463                <enumeratedValue>
76464                  <name>1</name>
76465                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76466                  <value>#1</value>
76467                </enumeratedValue>
76468              </enumeratedValues>
76469            </field>
76470          </fields>
76471        </register>
76472      </registers>
76473    </peripheral>
76474    <peripheral>
76475      <name>PORTC</name>
76476      <description>Pin Control and Interrupts</description>
76477      <groupName>PORT</groupName>
76478      <prependToName>PORTC_</prependToName>
76479      <baseAddress>0x4004B000</baseAddress>
76480      <addressBlock>
76481        <offset>0</offset>
76482        <size>0xA4</size>
76483        <usage>registers</usage>
76484      </addressBlock>
76485      <interrupt>
76486        <name>PORTC</name>
76487        <value>61</value>
76488      </interrupt>
76489      <registers>
76490        <register>
76491          <name>PCR0</name>
76492          <description>Pin Control Register n</description>
76493          <addressOffset>0</addressOffset>
76494          <size>32</size>
76495          <access>read-write</access>
76496          <resetValue>0</resetValue>
76497          <resetMask>0xFFFFFFFF</resetMask>
76498          <fields>
76499            <field>
76500              <name>PS</name>
76501              <description>Pull Select</description>
76502              <bitOffset>0</bitOffset>
76503              <bitWidth>1</bitWidth>
76504              <access>read-write</access>
76505              <enumeratedValues>
76506                <enumeratedValue>
76507                  <name>0</name>
76508                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
76509                  <value>#0</value>
76510                </enumeratedValue>
76511                <enumeratedValue>
76512                  <name>1</name>
76513                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
76514                  <value>#1</value>
76515                </enumeratedValue>
76516              </enumeratedValues>
76517            </field>
76518            <field>
76519              <name>PE</name>
76520              <description>Pull Enable</description>
76521              <bitOffset>1</bitOffset>
76522              <bitWidth>1</bitWidth>
76523              <access>read-write</access>
76524              <enumeratedValues>
76525                <enumeratedValue>
76526                  <name>0</name>
76527                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
76528                  <value>#0</value>
76529                </enumeratedValue>
76530                <enumeratedValue>
76531                  <name>1</name>
76532                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
76533                  <value>#1</value>
76534                </enumeratedValue>
76535              </enumeratedValues>
76536            </field>
76537            <field>
76538              <name>SRE</name>
76539              <description>Slew Rate Enable</description>
76540              <bitOffset>2</bitOffset>
76541              <bitWidth>1</bitWidth>
76542              <access>read-write</access>
76543              <enumeratedValues>
76544                <enumeratedValue>
76545                  <name>0</name>
76546                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
76547                  <value>#0</value>
76548                </enumeratedValue>
76549                <enumeratedValue>
76550                  <name>1</name>
76551                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
76552                  <value>#1</value>
76553                </enumeratedValue>
76554              </enumeratedValues>
76555            </field>
76556            <field>
76557              <name>PFE</name>
76558              <description>Passive Filter Enable</description>
76559              <bitOffset>4</bitOffset>
76560              <bitWidth>1</bitWidth>
76561              <access>read-only</access>
76562              <enumeratedValues>
76563                <enumeratedValue>
76564                  <name>0</name>
76565                  <description>Passive input filter is disabled on the corresponding pin.</description>
76566                  <value>#0</value>
76567                </enumeratedValue>
76568                <enumeratedValue>
76569                  <name>1</name>
76570                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
76571                  <value>#1</value>
76572                </enumeratedValue>
76573              </enumeratedValues>
76574            </field>
76575            <field>
76576              <name>ODE</name>
76577              <description>Open Drain Enable</description>
76578              <bitOffset>5</bitOffset>
76579              <bitWidth>1</bitWidth>
76580              <access>read-write</access>
76581              <enumeratedValues>
76582                <enumeratedValue>
76583                  <name>0</name>
76584                  <description>Open drain output is disabled on the corresponding pin.</description>
76585                  <value>#0</value>
76586                </enumeratedValue>
76587                <enumeratedValue>
76588                  <name>1</name>
76589                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
76590                  <value>#1</value>
76591                </enumeratedValue>
76592              </enumeratedValues>
76593            </field>
76594            <field>
76595              <name>DSE</name>
76596              <description>Drive Strength Enable</description>
76597              <bitOffset>6</bitOffset>
76598              <bitWidth>1</bitWidth>
76599              <access>read-only</access>
76600              <enumeratedValues>
76601                <enumeratedValue>
76602                  <name>0</name>
76603                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
76604                  <value>#0</value>
76605                </enumeratedValue>
76606                <enumeratedValue>
76607                  <name>1</name>
76608                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
76609                  <value>#1</value>
76610                </enumeratedValue>
76611              </enumeratedValues>
76612            </field>
76613            <field>
76614              <name>MUX</name>
76615              <description>Pin Mux Control</description>
76616              <bitOffset>8</bitOffset>
76617              <bitWidth>3</bitWidth>
76618              <access>read-write</access>
76619              <enumeratedValues>
76620                <enumeratedValue>
76621                  <name>000</name>
76622                  <description>Pin disabled (Alternative 0) (analog).</description>
76623                  <value>#000</value>
76624                </enumeratedValue>
76625                <enumeratedValue>
76626                  <name>001</name>
76627                  <description>Alternative 1 (GPIO).</description>
76628                  <value>#001</value>
76629                </enumeratedValue>
76630                <enumeratedValue>
76631                  <name>010</name>
76632                  <description>Alternative 2 (chip-specific).</description>
76633                  <value>#010</value>
76634                </enumeratedValue>
76635                <enumeratedValue>
76636                  <name>011</name>
76637                  <description>Alternative 3 (chip-specific).</description>
76638                  <value>#011</value>
76639                </enumeratedValue>
76640                <enumeratedValue>
76641                  <name>100</name>
76642                  <description>Alternative 4 (chip-specific).</description>
76643                  <value>#100</value>
76644                </enumeratedValue>
76645                <enumeratedValue>
76646                  <name>101</name>
76647                  <description>Alternative 5 (chip-specific).</description>
76648                  <value>#101</value>
76649                </enumeratedValue>
76650                <enumeratedValue>
76651                  <name>110</name>
76652                  <description>Alternative 6 (chip-specific).</description>
76653                  <value>#110</value>
76654                </enumeratedValue>
76655                <enumeratedValue>
76656                  <name>111</name>
76657                  <description>Alternative 7 (chip-specific).</description>
76658                  <value>#111</value>
76659                </enumeratedValue>
76660              </enumeratedValues>
76661            </field>
76662            <field>
76663              <name>LK</name>
76664              <description>Lock Register</description>
76665              <bitOffset>15</bitOffset>
76666              <bitWidth>1</bitWidth>
76667              <access>read-write</access>
76668              <enumeratedValues>
76669                <enumeratedValue>
76670                  <name>0</name>
76671                  <description>Pin Control Register fields [15:0] are not locked.</description>
76672                  <value>#0</value>
76673                </enumeratedValue>
76674                <enumeratedValue>
76675                  <name>1</name>
76676                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
76677                  <value>#1</value>
76678                </enumeratedValue>
76679              </enumeratedValues>
76680            </field>
76681            <field>
76682              <name>IRQC</name>
76683              <description>Interrupt Configuration</description>
76684              <bitOffset>16</bitOffset>
76685              <bitWidth>4</bitWidth>
76686              <access>read-write</access>
76687              <enumeratedValues>
76688                <enumeratedValue>
76689                  <name>0000</name>
76690                  <description>Interrupt Status Flag (ISF) is disabled.</description>
76691                  <value>#0000</value>
76692                </enumeratedValue>
76693                <enumeratedValue>
76694                  <name>0001</name>
76695                  <description>ISF flag and DMA request on rising edge.</description>
76696                  <value>#0001</value>
76697                </enumeratedValue>
76698                <enumeratedValue>
76699                  <name>0010</name>
76700                  <description>ISF flag and DMA request on falling edge.</description>
76701                  <value>#0010</value>
76702                </enumeratedValue>
76703                <enumeratedValue>
76704                  <name>0011</name>
76705                  <description>ISF flag and DMA request on either edge.</description>
76706                  <value>#0011</value>
76707                </enumeratedValue>
76708                <enumeratedValue>
76709                  <name>1000</name>
76710                  <description>ISF flag and Interrupt when logic 0.</description>
76711                  <value>#1000</value>
76712                </enumeratedValue>
76713                <enumeratedValue>
76714                  <name>1001</name>
76715                  <description>ISF flag and Interrupt on rising-edge.</description>
76716                  <value>#1001</value>
76717                </enumeratedValue>
76718                <enumeratedValue>
76719                  <name>1010</name>
76720                  <description>ISF flag and Interrupt on falling-edge.</description>
76721                  <value>#1010</value>
76722                </enumeratedValue>
76723                <enumeratedValue>
76724                  <name>1011</name>
76725                  <description>ISF flag and Interrupt on either edge.</description>
76726                  <value>#1011</value>
76727                </enumeratedValue>
76728                <enumeratedValue>
76729                  <name>1100</name>
76730                  <description>ISF flag and Interrupt when logic 1.</description>
76731                  <value>#1100</value>
76732                </enumeratedValue>
76733              </enumeratedValues>
76734            </field>
76735            <field>
76736              <name>ISF</name>
76737              <description>Interrupt Status Flag</description>
76738              <bitOffset>24</bitOffset>
76739              <bitWidth>1</bitWidth>
76740              <access>read-write</access>
76741              <enumeratedValues>
76742                <enumeratedValue>
76743                  <name>0</name>
76744                  <description>Configured interrupt is not detected.</description>
76745                  <value>#0</value>
76746                </enumeratedValue>
76747                <enumeratedValue>
76748                  <name>1</name>
76749                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
76750                  <value>#1</value>
76751                </enumeratedValue>
76752              </enumeratedValues>
76753            </field>
76754          </fields>
76755        </register>
76756        <register>
76757          <name>PCR1</name>
76758          <description>Pin Control Register n</description>
76759          <addressOffset>0x4</addressOffset>
76760          <size>32</size>
76761          <access>read-write</access>
76762          <resetValue>0</resetValue>
76763          <resetMask>0xFFFFFFFF</resetMask>
76764          <fields>
76765            <field>
76766              <name>PS</name>
76767              <description>Pull Select</description>
76768              <bitOffset>0</bitOffset>
76769              <bitWidth>1</bitWidth>
76770              <access>read-write</access>
76771              <enumeratedValues>
76772                <enumeratedValue>
76773                  <name>0</name>
76774                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
76775                  <value>#0</value>
76776                </enumeratedValue>
76777                <enumeratedValue>
76778                  <name>1</name>
76779                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
76780                  <value>#1</value>
76781                </enumeratedValue>
76782              </enumeratedValues>
76783            </field>
76784            <field>
76785              <name>PE</name>
76786              <description>Pull Enable</description>
76787              <bitOffset>1</bitOffset>
76788              <bitWidth>1</bitWidth>
76789              <access>read-write</access>
76790              <enumeratedValues>
76791                <enumeratedValue>
76792                  <name>0</name>
76793                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
76794                  <value>#0</value>
76795                </enumeratedValue>
76796                <enumeratedValue>
76797                  <name>1</name>
76798                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
76799                  <value>#1</value>
76800                </enumeratedValue>
76801              </enumeratedValues>
76802            </field>
76803            <field>
76804              <name>SRE</name>
76805              <description>Slew Rate Enable</description>
76806              <bitOffset>2</bitOffset>
76807              <bitWidth>1</bitWidth>
76808              <access>read-write</access>
76809              <enumeratedValues>
76810                <enumeratedValue>
76811                  <name>0</name>
76812                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
76813                  <value>#0</value>
76814                </enumeratedValue>
76815                <enumeratedValue>
76816                  <name>1</name>
76817                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
76818                  <value>#1</value>
76819                </enumeratedValue>
76820              </enumeratedValues>
76821            </field>
76822            <field>
76823              <name>PFE</name>
76824              <description>Passive Filter Enable</description>
76825              <bitOffset>4</bitOffset>
76826              <bitWidth>1</bitWidth>
76827              <access>read-only</access>
76828              <enumeratedValues>
76829                <enumeratedValue>
76830                  <name>0</name>
76831                  <description>Passive input filter is disabled on the corresponding pin.</description>
76832                  <value>#0</value>
76833                </enumeratedValue>
76834                <enumeratedValue>
76835                  <name>1</name>
76836                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
76837                  <value>#1</value>
76838                </enumeratedValue>
76839              </enumeratedValues>
76840            </field>
76841            <field>
76842              <name>ODE</name>
76843              <description>Open Drain Enable</description>
76844              <bitOffset>5</bitOffset>
76845              <bitWidth>1</bitWidth>
76846              <access>read-write</access>
76847              <enumeratedValues>
76848                <enumeratedValue>
76849                  <name>0</name>
76850                  <description>Open drain output is disabled on the corresponding pin.</description>
76851                  <value>#0</value>
76852                </enumeratedValue>
76853                <enumeratedValue>
76854                  <name>1</name>
76855                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
76856                  <value>#1</value>
76857                </enumeratedValue>
76858              </enumeratedValues>
76859            </field>
76860            <field>
76861              <name>DSE</name>
76862              <description>Drive Strength Enable</description>
76863              <bitOffset>6</bitOffset>
76864              <bitWidth>1</bitWidth>
76865              <access>read-only</access>
76866              <enumeratedValues>
76867                <enumeratedValue>
76868                  <name>0</name>
76869                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
76870                  <value>#0</value>
76871                </enumeratedValue>
76872                <enumeratedValue>
76873                  <name>1</name>
76874                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
76875                  <value>#1</value>
76876                </enumeratedValue>
76877              </enumeratedValues>
76878            </field>
76879            <field>
76880              <name>MUX</name>
76881              <description>Pin Mux Control</description>
76882              <bitOffset>8</bitOffset>
76883              <bitWidth>3</bitWidth>
76884              <access>read-write</access>
76885              <enumeratedValues>
76886                <enumeratedValue>
76887                  <name>000</name>
76888                  <description>Pin disabled (Alternative 0) (analog).</description>
76889                  <value>#000</value>
76890                </enumeratedValue>
76891                <enumeratedValue>
76892                  <name>001</name>
76893                  <description>Alternative 1 (GPIO).</description>
76894                  <value>#001</value>
76895                </enumeratedValue>
76896                <enumeratedValue>
76897                  <name>010</name>
76898                  <description>Alternative 2 (chip-specific).</description>
76899                  <value>#010</value>
76900                </enumeratedValue>
76901                <enumeratedValue>
76902                  <name>011</name>
76903                  <description>Alternative 3 (chip-specific).</description>
76904                  <value>#011</value>
76905                </enumeratedValue>
76906                <enumeratedValue>
76907                  <name>100</name>
76908                  <description>Alternative 4 (chip-specific).</description>
76909                  <value>#100</value>
76910                </enumeratedValue>
76911                <enumeratedValue>
76912                  <name>101</name>
76913                  <description>Alternative 5 (chip-specific).</description>
76914                  <value>#101</value>
76915                </enumeratedValue>
76916                <enumeratedValue>
76917                  <name>110</name>
76918                  <description>Alternative 6 (chip-specific).</description>
76919                  <value>#110</value>
76920                </enumeratedValue>
76921                <enumeratedValue>
76922                  <name>111</name>
76923                  <description>Alternative 7 (chip-specific).</description>
76924                  <value>#111</value>
76925                </enumeratedValue>
76926              </enumeratedValues>
76927            </field>
76928            <field>
76929              <name>LK</name>
76930              <description>Lock Register</description>
76931              <bitOffset>15</bitOffset>
76932              <bitWidth>1</bitWidth>
76933              <access>read-write</access>
76934              <enumeratedValues>
76935                <enumeratedValue>
76936                  <name>0</name>
76937                  <description>Pin Control Register fields [15:0] are not locked.</description>
76938                  <value>#0</value>
76939                </enumeratedValue>
76940                <enumeratedValue>
76941                  <name>1</name>
76942                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
76943                  <value>#1</value>
76944                </enumeratedValue>
76945              </enumeratedValues>
76946            </field>
76947            <field>
76948              <name>IRQC</name>
76949              <description>Interrupt Configuration</description>
76950              <bitOffset>16</bitOffset>
76951              <bitWidth>4</bitWidth>
76952              <access>read-write</access>
76953              <enumeratedValues>
76954                <enumeratedValue>
76955                  <name>0000</name>
76956                  <description>Interrupt Status Flag (ISF) is disabled.</description>
76957                  <value>#0000</value>
76958                </enumeratedValue>
76959                <enumeratedValue>
76960                  <name>0001</name>
76961                  <description>ISF flag and DMA request on rising edge.</description>
76962                  <value>#0001</value>
76963                </enumeratedValue>
76964                <enumeratedValue>
76965                  <name>0010</name>
76966                  <description>ISF flag and DMA request on falling edge.</description>
76967                  <value>#0010</value>
76968                </enumeratedValue>
76969                <enumeratedValue>
76970                  <name>0011</name>
76971                  <description>ISF flag and DMA request on either edge.</description>
76972                  <value>#0011</value>
76973                </enumeratedValue>
76974                <enumeratedValue>
76975                  <name>1000</name>
76976                  <description>ISF flag and Interrupt when logic 0.</description>
76977                  <value>#1000</value>
76978                </enumeratedValue>
76979                <enumeratedValue>
76980                  <name>1001</name>
76981                  <description>ISF flag and Interrupt on rising-edge.</description>
76982                  <value>#1001</value>
76983                </enumeratedValue>
76984                <enumeratedValue>
76985                  <name>1010</name>
76986                  <description>ISF flag and Interrupt on falling-edge.</description>
76987                  <value>#1010</value>
76988                </enumeratedValue>
76989                <enumeratedValue>
76990                  <name>1011</name>
76991                  <description>ISF flag and Interrupt on either edge.</description>
76992                  <value>#1011</value>
76993                </enumeratedValue>
76994                <enumeratedValue>
76995                  <name>1100</name>
76996                  <description>ISF flag and Interrupt when logic 1.</description>
76997                  <value>#1100</value>
76998                </enumeratedValue>
76999              </enumeratedValues>
77000            </field>
77001            <field>
77002              <name>ISF</name>
77003              <description>Interrupt Status Flag</description>
77004              <bitOffset>24</bitOffset>
77005              <bitWidth>1</bitWidth>
77006              <access>read-write</access>
77007              <enumeratedValues>
77008                <enumeratedValue>
77009                  <name>0</name>
77010                  <description>Configured interrupt is not detected.</description>
77011                  <value>#0</value>
77012                </enumeratedValue>
77013                <enumeratedValue>
77014                  <name>1</name>
77015                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
77016                  <value>#1</value>
77017                </enumeratedValue>
77018              </enumeratedValues>
77019            </field>
77020          </fields>
77021        </register>
77022        <register>
77023          <name>PCR2</name>
77024          <description>Pin Control Register n</description>
77025          <addressOffset>0x8</addressOffset>
77026          <size>32</size>
77027          <access>read-write</access>
77028          <resetValue>0</resetValue>
77029          <resetMask>0xFFFFFFFF</resetMask>
77030          <fields>
77031            <field>
77032              <name>PS</name>
77033              <description>Pull Select</description>
77034              <bitOffset>0</bitOffset>
77035              <bitWidth>1</bitWidth>
77036              <access>read-write</access>
77037              <enumeratedValues>
77038                <enumeratedValue>
77039                  <name>0</name>
77040                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
77041                  <value>#0</value>
77042                </enumeratedValue>
77043                <enumeratedValue>
77044                  <name>1</name>
77045                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
77046                  <value>#1</value>
77047                </enumeratedValue>
77048              </enumeratedValues>
77049            </field>
77050            <field>
77051              <name>PE</name>
77052              <description>Pull Enable</description>
77053              <bitOffset>1</bitOffset>
77054              <bitWidth>1</bitWidth>
77055              <access>read-write</access>
77056              <enumeratedValues>
77057                <enumeratedValue>
77058                  <name>0</name>
77059                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
77060                  <value>#0</value>
77061                </enumeratedValue>
77062                <enumeratedValue>
77063                  <name>1</name>
77064                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
77065                  <value>#1</value>
77066                </enumeratedValue>
77067              </enumeratedValues>
77068            </field>
77069            <field>
77070              <name>SRE</name>
77071              <description>Slew Rate Enable</description>
77072              <bitOffset>2</bitOffset>
77073              <bitWidth>1</bitWidth>
77074              <access>read-write</access>
77075              <enumeratedValues>
77076                <enumeratedValue>
77077                  <name>0</name>
77078                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
77079                  <value>#0</value>
77080                </enumeratedValue>
77081                <enumeratedValue>
77082                  <name>1</name>
77083                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
77084                  <value>#1</value>
77085                </enumeratedValue>
77086              </enumeratedValues>
77087            </field>
77088            <field>
77089              <name>PFE</name>
77090              <description>Passive Filter Enable</description>
77091              <bitOffset>4</bitOffset>
77092              <bitWidth>1</bitWidth>
77093              <access>read-only</access>
77094              <enumeratedValues>
77095                <enumeratedValue>
77096                  <name>0</name>
77097                  <description>Passive input filter is disabled on the corresponding pin.</description>
77098                  <value>#0</value>
77099                </enumeratedValue>
77100                <enumeratedValue>
77101                  <name>1</name>
77102                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
77103                  <value>#1</value>
77104                </enumeratedValue>
77105              </enumeratedValues>
77106            </field>
77107            <field>
77108              <name>ODE</name>
77109              <description>Open Drain Enable</description>
77110              <bitOffset>5</bitOffset>
77111              <bitWidth>1</bitWidth>
77112              <access>read-write</access>
77113              <enumeratedValues>
77114                <enumeratedValue>
77115                  <name>0</name>
77116                  <description>Open drain output is disabled on the corresponding pin.</description>
77117                  <value>#0</value>
77118                </enumeratedValue>
77119                <enumeratedValue>
77120                  <name>1</name>
77121                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
77122                  <value>#1</value>
77123                </enumeratedValue>
77124              </enumeratedValues>
77125            </field>
77126            <field>
77127              <name>DSE</name>
77128              <description>Drive Strength Enable</description>
77129              <bitOffset>6</bitOffset>
77130              <bitWidth>1</bitWidth>
77131              <access>read-only</access>
77132              <enumeratedValues>
77133                <enumeratedValue>
77134                  <name>0</name>
77135                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
77136                  <value>#0</value>
77137                </enumeratedValue>
77138                <enumeratedValue>
77139                  <name>1</name>
77140                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
77141                  <value>#1</value>
77142                </enumeratedValue>
77143              </enumeratedValues>
77144            </field>
77145            <field>
77146              <name>MUX</name>
77147              <description>Pin Mux Control</description>
77148              <bitOffset>8</bitOffset>
77149              <bitWidth>3</bitWidth>
77150              <access>read-write</access>
77151              <enumeratedValues>
77152                <enumeratedValue>
77153                  <name>000</name>
77154                  <description>Pin disabled (Alternative 0) (analog).</description>
77155                  <value>#000</value>
77156                </enumeratedValue>
77157                <enumeratedValue>
77158                  <name>001</name>
77159                  <description>Alternative 1 (GPIO).</description>
77160                  <value>#001</value>
77161                </enumeratedValue>
77162                <enumeratedValue>
77163                  <name>010</name>
77164                  <description>Alternative 2 (chip-specific).</description>
77165                  <value>#010</value>
77166                </enumeratedValue>
77167                <enumeratedValue>
77168                  <name>011</name>
77169                  <description>Alternative 3 (chip-specific).</description>
77170                  <value>#011</value>
77171                </enumeratedValue>
77172                <enumeratedValue>
77173                  <name>100</name>
77174                  <description>Alternative 4 (chip-specific).</description>
77175                  <value>#100</value>
77176                </enumeratedValue>
77177                <enumeratedValue>
77178                  <name>101</name>
77179                  <description>Alternative 5 (chip-specific).</description>
77180                  <value>#101</value>
77181                </enumeratedValue>
77182                <enumeratedValue>
77183                  <name>110</name>
77184                  <description>Alternative 6 (chip-specific).</description>
77185                  <value>#110</value>
77186                </enumeratedValue>
77187                <enumeratedValue>
77188                  <name>111</name>
77189                  <description>Alternative 7 (chip-specific).</description>
77190                  <value>#111</value>
77191                </enumeratedValue>
77192              </enumeratedValues>
77193            </field>
77194            <field>
77195              <name>LK</name>
77196              <description>Lock Register</description>
77197              <bitOffset>15</bitOffset>
77198              <bitWidth>1</bitWidth>
77199              <access>read-write</access>
77200              <enumeratedValues>
77201                <enumeratedValue>
77202                  <name>0</name>
77203                  <description>Pin Control Register fields [15:0] are not locked.</description>
77204                  <value>#0</value>
77205                </enumeratedValue>
77206                <enumeratedValue>
77207                  <name>1</name>
77208                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
77209                  <value>#1</value>
77210                </enumeratedValue>
77211              </enumeratedValues>
77212            </field>
77213            <field>
77214              <name>IRQC</name>
77215              <description>Interrupt Configuration</description>
77216              <bitOffset>16</bitOffset>
77217              <bitWidth>4</bitWidth>
77218              <access>read-write</access>
77219              <enumeratedValues>
77220                <enumeratedValue>
77221                  <name>0000</name>
77222                  <description>Interrupt Status Flag (ISF) is disabled.</description>
77223                  <value>#0000</value>
77224                </enumeratedValue>
77225                <enumeratedValue>
77226                  <name>0001</name>
77227                  <description>ISF flag and DMA request on rising edge.</description>
77228                  <value>#0001</value>
77229                </enumeratedValue>
77230                <enumeratedValue>
77231                  <name>0010</name>
77232                  <description>ISF flag and DMA request on falling edge.</description>
77233                  <value>#0010</value>
77234                </enumeratedValue>
77235                <enumeratedValue>
77236                  <name>0011</name>
77237                  <description>ISF flag and DMA request on either edge.</description>
77238                  <value>#0011</value>
77239                </enumeratedValue>
77240                <enumeratedValue>
77241                  <name>1000</name>
77242                  <description>ISF flag and Interrupt when logic 0.</description>
77243                  <value>#1000</value>
77244                </enumeratedValue>
77245                <enumeratedValue>
77246                  <name>1001</name>
77247                  <description>ISF flag and Interrupt on rising-edge.</description>
77248                  <value>#1001</value>
77249                </enumeratedValue>
77250                <enumeratedValue>
77251                  <name>1010</name>
77252                  <description>ISF flag and Interrupt on falling-edge.</description>
77253                  <value>#1010</value>
77254                </enumeratedValue>
77255                <enumeratedValue>
77256                  <name>1011</name>
77257                  <description>ISF flag and Interrupt on either edge.</description>
77258                  <value>#1011</value>
77259                </enumeratedValue>
77260                <enumeratedValue>
77261                  <name>1100</name>
77262                  <description>ISF flag and Interrupt when logic 1.</description>
77263                  <value>#1100</value>
77264                </enumeratedValue>
77265              </enumeratedValues>
77266            </field>
77267            <field>
77268              <name>ISF</name>
77269              <description>Interrupt Status Flag</description>
77270              <bitOffset>24</bitOffset>
77271              <bitWidth>1</bitWidth>
77272              <access>read-write</access>
77273              <enumeratedValues>
77274                <enumeratedValue>
77275                  <name>0</name>
77276                  <description>Configured interrupt is not detected.</description>
77277                  <value>#0</value>
77278                </enumeratedValue>
77279                <enumeratedValue>
77280                  <name>1</name>
77281                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
77282                  <value>#1</value>
77283                </enumeratedValue>
77284              </enumeratedValues>
77285            </field>
77286          </fields>
77287        </register>
77288        <register>
77289          <name>PCR3</name>
77290          <description>Pin Control Register n</description>
77291          <addressOffset>0xC</addressOffset>
77292          <size>32</size>
77293          <access>read-write</access>
77294          <resetValue>0</resetValue>
77295          <resetMask>0xFFFFFFFF</resetMask>
77296          <fields>
77297            <field>
77298              <name>PS</name>
77299              <description>Pull Select</description>
77300              <bitOffset>0</bitOffset>
77301              <bitWidth>1</bitWidth>
77302              <access>read-write</access>
77303              <enumeratedValues>
77304                <enumeratedValue>
77305                  <name>0</name>
77306                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
77307                  <value>#0</value>
77308                </enumeratedValue>
77309                <enumeratedValue>
77310                  <name>1</name>
77311                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
77312                  <value>#1</value>
77313                </enumeratedValue>
77314              </enumeratedValues>
77315            </field>
77316            <field>
77317              <name>PE</name>
77318              <description>Pull Enable</description>
77319              <bitOffset>1</bitOffset>
77320              <bitWidth>1</bitWidth>
77321              <access>read-write</access>
77322              <enumeratedValues>
77323                <enumeratedValue>
77324                  <name>0</name>
77325                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
77326                  <value>#0</value>
77327                </enumeratedValue>
77328                <enumeratedValue>
77329                  <name>1</name>
77330                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
77331                  <value>#1</value>
77332                </enumeratedValue>
77333              </enumeratedValues>
77334            </field>
77335            <field>
77336              <name>SRE</name>
77337              <description>Slew Rate Enable</description>
77338              <bitOffset>2</bitOffset>
77339              <bitWidth>1</bitWidth>
77340              <access>read-write</access>
77341              <enumeratedValues>
77342                <enumeratedValue>
77343                  <name>0</name>
77344                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
77345                  <value>#0</value>
77346                </enumeratedValue>
77347                <enumeratedValue>
77348                  <name>1</name>
77349                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
77350                  <value>#1</value>
77351                </enumeratedValue>
77352              </enumeratedValues>
77353            </field>
77354            <field>
77355              <name>PFE</name>
77356              <description>Passive Filter Enable</description>
77357              <bitOffset>4</bitOffset>
77358              <bitWidth>1</bitWidth>
77359              <access>read-only</access>
77360              <enumeratedValues>
77361                <enumeratedValue>
77362                  <name>0</name>
77363                  <description>Passive input filter is disabled on the corresponding pin.</description>
77364                  <value>#0</value>
77365                </enumeratedValue>
77366                <enumeratedValue>
77367                  <name>1</name>
77368                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
77369                  <value>#1</value>
77370                </enumeratedValue>
77371              </enumeratedValues>
77372            </field>
77373            <field>
77374              <name>ODE</name>
77375              <description>Open Drain Enable</description>
77376              <bitOffset>5</bitOffset>
77377              <bitWidth>1</bitWidth>
77378              <access>read-write</access>
77379              <enumeratedValues>
77380                <enumeratedValue>
77381                  <name>0</name>
77382                  <description>Open drain output is disabled on the corresponding pin.</description>
77383                  <value>#0</value>
77384                </enumeratedValue>
77385                <enumeratedValue>
77386                  <name>1</name>
77387                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
77388                  <value>#1</value>
77389                </enumeratedValue>
77390              </enumeratedValues>
77391            </field>
77392            <field>
77393              <name>DSE</name>
77394              <description>Drive Strength Enable</description>
77395              <bitOffset>6</bitOffset>
77396              <bitWidth>1</bitWidth>
77397              <access>read-write</access>
77398              <enumeratedValues>
77399                <enumeratedValue>
77400                  <name>0</name>
77401                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
77402                  <value>#0</value>
77403                </enumeratedValue>
77404                <enumeratedValue>
77405                  <name>1</name>
77406                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
77407                  <value>#1</value>
77408                </enumeratedValue>
77409              </enumeratedValues>
77410            </field>
77411            <field>
77412              <name>MUX</name>
77413              <description>Pin Mux Control</description>
77414              <bitOffset>8</bitOffset>
77415              <bitWidth>3</bitWidth>
77416              <access>read-write</access>
77417              <enumeratedValues>
77418                <enumeratedValue>
77419                  <name>000</name>
77420                  <description>Pin disabled (Alternative 0) (analog).</description>
77421                  <value>#000</value>
77422                </enumeratedValue>
77423                <enumeratedValue>
77424                  <name>001</name>
77425                  <description>Alternative 1 (GPIO).</description>
77426                  <value>#001</value>
77427                </enumeratedValue>
77428                <enumeratedValue>
77429                  <name>010</name>
77430                  <description>Alternative 2 (chip-specific).</description>
77431                  <value>#010</value>
77432                </enumeratedValue>
77433                <enumeratedValue>
77434                  <name>011</name>
77435                  <description>Alternative 3 (chip-specific).</description>
77436                  <value>#011</value>
77437                </enumeratedValue>
77438                <enumeratedValue>
77439                  <name>100</name>
77440                  <description>Alternative 4 (chip-specific).</description>
77441                  <value>#100</value>
77442                </enumeratedValue>
77443                <enumeratedValue>
77444                  <name>101</name>
77445                  <description>Alternative 5 (chip-specific).</description>
77446                  <value>#101</value>
77447                </enumeratedValue>
77448                <enumeratedValue>
77449                  <name>110</name>
77450                  <description>Alternative 6 (chip-specific).</description>
77451                  <value>#110</value>
77452                </enumeratedValue>
77453                <enumeratedValue>
77454                  <name>111</name>
77455                  <description>Alternative 7 (chip-specific).</description>
77456                  <value>#111</value>
77457                </enumeratedValue>
77458              </enumeratedValues>
77459            </field>
77460            <field>
77461              <name>LK</name>
77462              <description>Lock Register</description>
77463              <bitOffset>15</bitOffset>
77464              <bitWidth>1</bitWidth>
77465              <access>read-write</access>
77466              <enumeratedValues>
77467                <enumeratedValue>
77468                  <name>0</name>
77469                  <description>Pin Control Register fields [15:0] are not locked.</description>
77470                  <value>#0</value>
77471                </enumeratedValue>
77472                <enumeratedValue>
77473                  <name>1</name>
77474                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
77475                  <value>#1</value>
77476                </enumeratedValue>
77477              </enumeratedValues>
77478            </field>
77479            <field>
77480              <name>IRQC</name>
77481              <description>Interrupt Configuration</description>
77482              <bitOffset>16</bitOffset>
77483              <bitWidth>4</bitWidth>
77484              <access>read-write</access>
77485              <enumeratedValues>
77486                <enumeratedValue>
77487                  <name>0000</name>
77488                  <description>Interrupt Status Flag (ISF) is disabled.</description>
77489                  <value>#0000</value>
77490                </enumeratedValue>
77491                <enumeratedValue>
77492                  <name>0001</name>
77493                  <description>ISF flag and DMA request on rising edge.</description>
77494                  <value>#0001</value>
77495                </enumeratedValue>
77496                <enumeratedValue>
77497                  <name>0010</name>
77498                  <description>ISF flag and DMA request on falling edge.</description>
77499                  <value>#0010</value>
77500                </enumeratedValue>
77501                <enumeratedValue>
77502                  <name>0011</name>
77503                  <description>ISF flag and DMA request on either edge.</description>
77504                  <value>#0011</value>
77505                </enumeratedValue>
77506                <enumeratedValue>
77507                  <name>1000</name>
77508                  <description>ISF flag and Interrupt when logic 0.</description>
77509                  <value>#1000</value>
77510                </enumeratedValue>
77511                <enumeratedValue>
77512                  <name>1001</name>
77513                  <description>ISF flag and Interrupt on rising-edge.</description>
77514                  <value>#1001</value>
77515                </enumeratedValue>
77516                <enumeratedValue>
77517                  <name>1010</name>
77518                  <description>ISF flag and Interrupt on falling-edge.</description>
77519                  <value>#1010</value>
77520                </enumeratedValue>
77521                <enumeratedValue>
77522                  <name>1011</name>
77523                  <description>ISF flag and Interrupt on either edge.</description>
77524                  <value>#1011</value>
77525                </enumeratedValue>
77526                <enumeratedValue>
77527                  <name>1100</name>
77528                  <description>ISF flag and Interrupt when logic 1.</description>
77529                  <value>#1100</value>
77530                </enumeratedValue>
77531              </enumeratedValues>
77532            </field>
77533            <field>
77534              <name>ISF</name>
77535              <description>Interrupt Status Flag</description>
77536              <bitOffset>24</bitOffset>
77537              <bitWidth>1</bitWidth>
77538              <access>read-write</access>
77539              <enumeratedValues>
77540                <enumeratedValue>
77541                  <name>0</name>
77542                  <description>Configured interrupt is not detected.</description>
77543                  <value>#0</value>
77544                </enumeratedValue>
77545                <enumeratedValue>
77546                  <name>1</name>
77547                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
77548                  <value>#1</value>
77549                </enumeratedValue>
77550              </enumeratedValues>
77551            </field>
77552          </fields>
77553        </register>
77554        <register>
77555          <name>PCR4</name>
77556          <description>Pin Control Register n</description>
77557          <addressOffset>0x10</addressOffset>
77558          <size>32</size>
77559          <access>read-write</access>
77560          <resetValue>0</resetValue>
77561          <resetMask>0xFFFFFFFF</resetMask>
77562          <fields>
77563            <field>
77564              <name>PS</name>
77565              <description>Pull Select</description>
77566              <bitOffset>0</bitOffset>
77567              <bitWidth>1</bitWidth>
77568              <access>read-write</access>
77569              <enumeratedValues>
77570                <enumeratedValue>
77571                  <name>0</name>
77572                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
77573                  <value>#0</value>
77574                </enumeratedValue>
77575                <enumeratedValue>
77576                  <name>1</name>
77577                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
77578                  <value>#1</value>
77579                </enumeratedValue>
77580              </enumeratedValues>
77581            </field>
77582            <field>
77583              <name>PE</name>
77584              <description>Pull Enable</description>
77585              <bitOffset>1</bitOffset>
77586              <bitWidth>1</bitWidth>
77587              <access>read-write</access>
77588              <enumeratedValues>
77589                <enumeratedValue>
77590                  <name>0</name>
77591                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
77592                  <value>#0</value>
77593                </enumeratedValue>
77594                <enumeratedValue>
77595                  <name>1</name>
77596                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
77597                  <value>#1</value>
77598                </enumeratedValue>
77599              </enumeratedValues>
77600            </field>
77601            <field>
77602              <name>SRE</name>
77603              <description>Slew Rate Enable</description>
77604              <bitOffset>2</bitOffset>
77605              <bitWidth>1</bitWidth>
77606              <access>read-write</access>
77607              <enumeratedValues>
77608                <enumeratedValue>
77609                  <name>0</name>
77610                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
77611                  <value>#0</value>
77612                </enumeratedValue>
77613                <enumeratedValue>
77614                  <name>1</name>
77615                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
77616                  <value>#1</value>
77617                </enumeratedValue>
77618              </enumeratedValues>
77619            </field>
77620            <field>
77621              <name>PFE</name>
77622              <description>Passive Filter Enable</description>
77623              <bitOffset>4</bitOffset>
77624              <bitWidth>1</bitWidth>
77625              <access>read-only</access>
77626              <enumeratedValues>
77627                <enumeratedValue>
77628                  <name>0</name>
77629                  <description>Passive input filter is disabled on the corresponding pin.</description>
77630                  <value>#0</value>
77631                </enumeratedValue>
77632                <enumeratedValue>
77633                  <name>1</name>
77634                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
77635                  <value>#1</value>
77636                </enumeratedValue>
77637              </enumeratedValues>
77638            </field>
77639            <field>
77640              <name>ODE</name>
77641              <description>Open Drain Enable</description>
77642              <bitOffset>5</bitOffset>
77643              <bitWidth>1</bitWidth>
77644              <access>read-write</access>
77645              <enumeratedValues>
77646                <enumeratedValue>
77647                  <name>0</name>
77648                  <description>Open drain output is disabled on the corresponding pin.</description>
77649                  <value>#0</value>
77650                </enumeratedValue>
77651                <enumeratedValue>
77652                  <name>1</name>
77653                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
77654                  <value>#1</value>
77655                </enumeratedValue>
77656              </enumeratedValues>
77657            </field>
77658            <field>
77659              <name>DSE</name>
77660              <description>Drive Strength Enable</description>
77661              <bitOffset>6</bitOffset>
77662              <bitWidth>1</bitWidth>
77663              <access>read-write</access>
77664              <enumeratedValues>
77665                <enumeratedValue>
77666                  <name>0</name>
77667                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
77668                  <value>#0</value>
77669                </enumeratedValue>
77670                <enumeratedValue>
77671                  <name>1</name>
77672                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
77673                  <value>#1</value>
77674                </enumeratedValue>
77675              </enumeratedValues>
77676            </field>
77677            <field>
77678              <name>MUX</name>
77679              <description>Pin Mux Control</description>
77680              <bitOffset>8</bitOffset>
77681              <bitWidth>3</bitWidth>
77682              <access>read-write</access>
77683              <enumeratedValues>
77684                <enumeratedValue>
77685                  <name>000</name>
77686                  <description>Pin disabled (Alternative 0) (analog).</description>
77687                  <value>#000</value>
77688                </enumeratedValue>
77689                <enumeratedValue>
77690                  <name>001</name>
77691                  <description>Alternative 1 (GPIO).</description>
77692                  <value>#001</value>
77693                </enumeratedValue>
77694                <enumeratedValue>
77695                  <name>010</name>
77696                  <description>Alternative 2 (chip-specific).</description>
77697                  <value>#010</value>
77698                </enumeratedValue>
77699                <enumeratedValue>
77700                  <name>011</name>
77701                  <description>Alternative 3 (chip-specific).</description>
77702                  <value>#011</value>
77703                </enumeratedValue>
77704                <enumeratedValue>
77705                  <name>100</name>
77706                  <description>Alternative 4 (chip-specific).</description>
77707                  <value>#100</value>
77708                </enumeratedValue>
77709                <enumeratedValue>
77710                  <name>101</name>
77711                  <description>Alternative 5 (chip-specific).</description>
77712                  <value>#101</value>
77713                </enumeratedValue>
77714                <enumeratedValue>
77715                  <name>110</name>
77716                  <description>Alternative 6 (chip-specific).</description>
77717                  <value>#110</value>
77718                </enumeratedValue>
77719                <enumeratedValue>
77720                  <name>111</name>
77721                  <description>Alternative 7 (chip-specific).</description>
77722                  <value>#111</value>
77723                </enumeratedValue>
77724              </enumeratedValues>
77725            </field>
77726            <field>
77727              <name>LK</name>
77728              <description>Lock Register</description>
77729              <bitOffset>15</bitOffset>
77730              <bitWidth>1</bitWidth>
77731              <access>read-write</access>
77732              <enumeratedValues>
77733                <enumeratedValue>
77734                  <name>0</name>
77735                  <description>Pin Control Register fields [15:0] are not locked.</description>
77736                  <value>#0</value>
77737                </enumeratedValue>
77738                <enumeratedValue>
77739                  <name>1</name>
77740                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
77741                  <value>#1</value>
77742                </enumeratedValue>
77743              </enumeratedValues>
77744            </field>
77745            <field>
77746              <name>IRQC</name>
77747              <description>Interrupt Configuration</description>
77748              <bitOffset>16</bitOffset>
77749              <bitWidth>4</bitWidth>
77750              <access>read-write</access>
77751              <enumeratedValues>
77752                <enumeratedValue>
77753                  <name>0000</name>
77754                  <description>Interrupt Status Flag (ISF) is disabled.</description>
77755                  <value>#0000</value>
77756                </enumeratedValue>
77757                <enumeratedValue>
77758                  <name>0001</name>
77759                  <description>ISF flag and DMA request on rising edge.</description>
77760                  <value>#0001</value>
77761                </enumeratedValue>
77762                <enumeratedValue>
77763                  <name>0010</name>
77764                  <description>ISF flag and DMA request on falling edge.</description>
77765                  <value>#0010</value>
77766                </enumeratedValue>
77767                <enumeratedValue>
77768                  <name>0011</name>
77769                  <description>ISF flag and DMA request on either edge.</description>
77770                  <value>#0011</value>
77771                </enumeratedValue>
77772                <enumeratedValue>
77773                  <name>1000</name>
77774                  <description>ISF flag and Interrupt when logic 0.</description>
77775                  <value>#1000</value>
77776                </enumeratedValue>
77777                <enumeratedValue>
77778                  <name>1001</name>
77779                  <description>ISF flag and Interrupt on rising-edge.</description>
77780                  <value>#1001</value>
77781                </enumeratedValue>
77782                <enumeratedValue>
77783                  <name>1010</name>
77784                  <description>ISF flag and Interrupt on falling-edge.</description>
77785                  <value>#1010</value>
77786                </enumeratedValue>
77787                <enumeratedValue>
77788                  <name>1011</name>
77789                  <description>ISF flag and Interrupt on either edge.</description>
77790                  <value>#1011</value>
77791                </enumeratedValue>
77792                <enumeratedValue>
77793                  <name>1100</name>
77794                  <description>ISF flag and Interrupt when logic 1.</description>
77795                  <value>#1100</value>
77796                </enumeratedValue>
77797              </enumeratedValues>
77798            </field>
77799            <field>
77800              <name>ISF</name>
77801              <description>Interrupt Status Flag</description>
77802              <bitOffset>24</bitOffset>
77803              <bitWidth>1</bitWidth>
77804              <access>read-write</access>
77805              <enumeratedValues>
77806                <enumeratedValue>
77807                  <name>0</name>
77808                  <description>Configured interrupt is not detected.</description>
77809                  <value>#0</value>
77810                </enumeratedValue>
77811                <enumeratedValue>
77812                  <name>1</name>
77813                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
77814                  <value>#1</value>
77815                </enumeratedValue>
77816              </enumeratedValues>
77817            </field>
77818          </fields>
77819        </register>
77820        <register>
77821          <name>PCR5</name>
77822          <description>Pin Control Register n</description>
77823          <addressOffset>0x14</addressOffset>
77824          <size>32</size>
77825          <access>read-write</access>
77826          <resetValue>0</resetValue>
77827          <resetMask>0xFFFFFFFF</resetMask>
77828          <fields>
77829            <field>
77830              <name>PS</name>
77831              <description>Pull Select</description>
77832              <bitOffset>0</bitOffset>
77833              <bitWidth>1</bitWidth>
77834              <access>read-write</access>
77835              <enumeratedValues>
77836                <enumeratedValue>
77837                  <name>0</name>
77838                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
77839                  <value>#0</value>
77840                </enumeratedValue>
77841                <enumeratedValue>
77842                  <name>1</name>
77843                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
77844                  <value>#1</value>
77845                </enumeratedValue>
77846              </enumeratedValues>
77847            </field>
77848            <field>
77849              <name>PE</name>
77850              <description>Pull Enable</description>
77851              <bitOffset>1</bitOffset>
77852              <bitWidth>1</bitWidth>
77853              <access>read-write</access>
77854              <enumeratedValues>
77855                <enumeratedValue>
77856                  <name>0</name>
77857                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
77858                  <value>#0</value>
77859                </enumeratedValue>
77860                <enumeratedValue>
77861                  <name>1</name>
77862                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
77863                  <value>#1</value>
77864                </enumeratedValue>
77865              </enumeratedValues>
77866            </field>
77867            <field>
77868              <name>SRE</name>
77869              <description>Slew Rate Enable</description>
77870              <bitOffset>2</bitOffset>
77871              <bitWidth>1</bitWidth>
77872              <access>read-write</access>
77873              <enumeratedValues>
77874                <enumeratedValue>
77875                  <name>0</name>
77876                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
77877                  <value>#0</value>
77878                </enumeratedValue>
77879                <enumeratedValue>
77880                  <name>1</name>
77881                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
77882                  <value>#1</value>
77883                </enumeratedValue>
77884              </enumeratedValues>
77885            </field>
77886            <field>
77887              <name>PFE</name>
77888              <description>Passive Filter Enable</description>
77889              <bitOffset>4</bitOffset>
77890              <bitWidth>1</bitWidth>
77891              <access>read-only</access>
77892              <enumeratedValues>
77893                <enumeratedValue>
77894                  <name>0</name>
77895                  <description>Passive input filter is disabled on the corresponding pin.</description>
77896                  <value>#0</value>
77897                </enumeratedValue>
77898                <enumeratedValue>
77899                  <name>1</name>
77900                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
77901                  <value>#1</value>
77902                </enumeratedValue>
77903              </enumeratedValues>
77904            </field>
77905            <field>
77906              <name>ODE</name>
77907              <description>Open Drain Enable</description>
77908              <bitOffset>5</bitOffset>
77909              <bitWidth>1</bitWidth>
77910              <access>read-write</access>
77911              <enumeratedValues>
77912                <enumeratedValue>
77913                  <name>0</name>
77914                  <description>Open drain output is disabled on the corresponding pin.</description>
77915                  <value>#0</value>
77916                </enumeratedValue>
77917                <enumeratedValue>
77918                  <name>1</name>
77919                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
77920                  <value>#1</value>
77921                </enumeratedValue>
77922              </enumeratedValues>
77923            </field>
77924            <field>
77925              <name>DSE</name>
77926              <description>Drive Strength Enable</description>
77927              <bitOffset>6</bitOffset>
77928              <bitWidth>1</bitWidth>
77929              <access>read-only</access>
77930              <enumeratedValues>
77931                <enumeratedValue>
77932                  <name>0</name>
77933                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
77934                  <value>#0</value>
77935                </enumeratedValue>
77936                <enumeratedValue>
77937                  <name>1</name>
77938                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
77939                  <value>#1</value>
77940                </enumeratedValue>
77941              </enumeratedValues>
77942            </field>
77943            <field>
77944              <name>MUX</name>
77945              <description>Pin Mux Control</description>
77946              <bitOffset>8</bitOffset>
77947              <bitWidth>3</bitWidth>
77948              <access>read-write</access>
77949              <enumeratedValues>
77950                <enumeratedValue>
77951                  <name>000</name>
77952                  <description>Pin disabled (Alternative 0) (analog).</description>
77953                  <value>#000</value>
77954                </enumeratedValue>
77955                <enumeratedValue>
77956                  <name>001</name>
77957                  <description>Alternative 1 (GPIO).</description>
77958                  <value>#001</value>
77959                </enumeratedValue>
77960                <enumeratedValue>
77961                  <name>010</name>
77962                  <description>Alternative 2 (chip-specific).</description>
77963                  <value>#010</value>
77964                </enumeratedValue>
77965                <enumeratedValue>
77966                  <name>011</name>
77967                  <description>Alternative 3 (chip-specific).</description>
77968                  <value>#011</value>
77969                </enumeratedValue>
77970                <enumeratedValue>
77971                  <name>100</name>
77972                  <description>Alternative 4 (chip-specific).</description>
77973                  <value>#100</value>
77974                </enumeratedValue>
77975                <enumeratedValue>
77976                  <name>101</name>
77977                  <description>Alternative 5 (chip-specific).</description>
77978                  <value>#101</value>
77979                </enumeratedValue>
77980                <enumeratedValue>
77981                  <name>110</name>
77982                  <description>Alternative 6 (chip-specific).</description>
77983                  <value>#110</value>
77984                </enumeratedValue>
77985                <enumeratedValue>
77986                  <name>111</name>
77987                  <description>Alternative 7 (chip-specific).</description>
77988                  <value>#111</value>
77989                </enumeratedValue>
77990              </enumeratedValues>
77991            </field>
77992            <field>
77993              <name>LK</name>
77994              <description>Lock Register</description>
77995              <bitOffset>15</bitOffset>
77996              <bitWidth>1</bitWidth>
77997              <access>read-write</access>
77998              <enumeratedValues>
77999                <enumeratedValue>
78000                  <name>0</name>
78001                  <description>Pin Control Register fields [15:0] are not locked.</description>
78002                  <value>#0</value>
78003                </enumeratedValue>
78004                <enumeratedValue>
78005                  <name>1</name>
78006                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
78007                  <value>#1</value>
78008                </enumeratedValue>
78009              </enumeratedValues>
78010            </field>
78011            <field>
78012              <name>IRQC</name>
78013              <description>Interrupt Configuration</description>
78014              <bitOffset>16</bitOffset>
78015              <bitWidth>4</bitWidth>
78016              <access>read-write</access>
78017              <enumeratedValues>
78018                <enumeratedValue>
78019                  <name>0000</name>
78020                  <description>Interrupt Status Flag (ISF) is disabled.</description>
78021                  <value>#0000</value>
78022                </enumeratedValue>
78023                <enumeratedValue>
78024                  <name>0001</name>
78025                  <description>ISF flag and DMA request on rising edge.</description>
78026                  <value>#0001</value>
78027                </enumeratedValue>
78028                <enumeratedValue>
78029                  <name>0010</name>
78030                  <description>ISF flag and DMA request on falling edge.</description>
78031                  <value>#0010</value>
78032                </enumeratedValue>
78033                <enumeratedValue>
78034                  <name>0011</name>
78035                  <description>ISF flag and DMA request on either edge.</description>
78036                  <value>#0011</value>
78037                </enumeratedValue>
78038                <enumeratedValue>
78039                  <name>1000</name>
78040                  <description>ISF flag and Interrupt when logic 0.</description>
78041                  <value>#1000</value>
78042                </enumeratedValue>
78043                <enumeratedValue>
78044                  <name>1001</name>
78045                  <description>ISF flag and Interrupt on rising-edge.</description>
78046                  <value>#1001</value>
78047                </enumeratedValue>
78048                <enumeratedValue>
78049                  <name>1010</name>
78050                  <description>ISF flag and Interrupt on falling-edge.</description>
78051                  <value>#1010</value>
78052                </enumeratedValue>
78053                <enumeratedValue>
78054                  <name>1011</name>
78055                  <description>ISF flag and Interrupt on either edge.</description>
78056                  <value>#1011</value>
78057                </enumeratedValue>
78058                <enumeratedValue>
78059                  <name>1100</name>
78060                  <description>ISF flag and Interrupt when logic 1.</description>
78061                  <value>#1100</value>
78062                </enumeratedValue>
78063              </enumeratedValues>
78064            </field>
78065            <field>
78066              <name>ISF</name>
78067              <description>Interrupt Status Flag</description>
78068              <bitOffset>24</bitOffset>
78069              <bitWidth>1</bitWidth>
78070              <access>read-write</access>
78071              <enumeratedValues>
78072                <enumeratedValue>
78073                  <name>0</name>
78074                  <description>Configured interrupt is not detected.</description>
78075                  <value>#0</value>
78076                </enumeratedValue>
78077                <enumeratedValue>
78078                  <name>1</name>
78079                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
78080                  <value>#1</value>
78081                </enumeratedValue>
78082              </enumeratedValues>
78083            </field>
78084          </fields>
78085        </register>
78086        <register>
78087          <name>PCR6</name>
78088          <description>Pin Control Register n</description>
78089          <addressOffset>0x18</addressOffset>
78090          <size>32</size>
78091          <access>read-write</access>
78092          <resetValue>0</resetValue>
78093          <resetMask>0xFFFFFFFF</resetMask>
78094          <fields>
78095            <field>
78096              <name>PS</name>
78097              <description>Pull Select</description>
78098              <bitOffset>0</bitOffset>
78099              <bitWidth>1</bitWidth>
78100              <access>read-write</access>
78101              <enumeratedValues>
78102                <enumeratedValue>
78103                  <name>0</name>
78104                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
78105                  <value>#0</value>
78106                </enumeratedValue>
78107                <enumeratedValue>
78108                  <name>1</name>
78109                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
78110                  <value>#1</value>
78111                </enumeratedValue>
78112              </enumeratedValues>
78113            </field>
78114            <field>
78115              <name>PE</name>
78116              <description>Pull Enable</description>
78117              <bitOffset>1</bitOffset>
78118              <bitWidth>1</bitWidth>
78119              <access>read-write</access>
78120              <enumeratedValues>
78121                <enumeratedValue>
78122                  <name>0</name>
78123                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
78124                  <value>#0</value>
78125                </enumeratedValue>
78126                <enumeratedValue>
78127                  <name>1</name>
78128                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
78129                  <value>#1</value>
78130                </enumeratedValue>
78131              </enumeratedValues>
78132            </field>
78133            <field>
78134              <name>SRE</name>
78135              <description>Slew Rate Enable</description>
78136              <bitOffset>2</bitOffset>
78137              <bitWidth>1</bitWidth>
78138              <access>read-write</access>
78139              <enumeratedValues>
78140                <enumeratedValue>
78141                  <name>0</name>
78142                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
78143                  <value>#0</value>
78144                </enumeratedValue>
78145                <enumeratedValue>
78146                  <name>1</name>
78147                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
78148                  <value>#1</value>
78149                </enumeratedValue>
78150              </enumeratedValues>
78151            </field>
78152            <field>
78153              <name>PFE</name>
78154              <description>Passive Filter Enable</description>
78155              <bitOffset>4</bitOffset>
78156              <bitWidth>1</bitWidth>
78157              <access>read-only</access>
78158              <enumeratedValues>
78159                <enumeratedValue>
78160                  <name>0</name>
78161                  <description>Passive input filter is disabled on the corresponding pin.</description>
78162                  <value>#0</value>
78163                </enumeratedValue>
78164                <enumeratedValue>
78165                  <name>1</name>
78166                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
78167                  <value>#1</value>
78168                </enumeratedValue>
78169              </enumeratedValues>
78170            </field>
78171            <field>
78172              <name>ODE</name>
78173              <description>Open Drain Enable</description>
78174              <bitOffset>5</bitOffset>
78175              <bitWidth>1</bitWidth>
78176              <access>read-write</access>
78177              <enumeratedValues>
78178                <enumeratedValue>
78179                  <name>0</name>
78180                  <description>Open drain output is disabled on the corresponding pin.</description>
78181                  <value>#0</value>
78182                </enumeratedValue>
78183                <enumeratedValue>
78184                  <name>1</name>
78185                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
78186                  <value>#1</value>
78187                </enumeratedValue>
78188              </enumeratedValues>
78189            </field>
78190            <field>
78191              <name>DSE</name>
78192              <description>Drive Strength Enable</description>
78193              <bitOffset>6</bitOffset>
78194              <bitWidth>1</bitWidth>
78195              <access>read-only</access>
78196              <enumeratedValues>
78197                <enumeratedValue>
78198                  <name>0</name>
78199                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
78200                  <value>#0</value>
78201                </enumeratedValue>
78202                <enumeratedValue>
78203                  <name>1</name>
78204                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
78205                  <value>#1</value>
78206                </enumeratedValue>
78207              </enumeratedValues>
78208            </field>
78209            <field>
78210              <name>MUX</name>
78211              <description>Pin Mux Control</description>
78212              <bitOffset>8</bitOffset>
78213              <bitWidth>3</bitWidth>
78214              <access>read-write</access>
78215              <enumeratedValues>
78216                <enumeratedValue>
78217                  <name>000</name>
78218                  <description>Pin disabled (Alternative 0) (analog).</description>
78219                  <value>#000</value>
78220                </enumeratedValue>
78221                <enumeratedValue>
78222                  <name>001</name>
78223                  <description>Alternative 1 (GPIO).</description>
78224                  <value>#001</value>
78225                </enumeratedValue>
78226                <enumeratedValue>
78227                  <name>010</name>
78228                  <description>Alternative 2 (chip-specific).</description>
78229                  <value>#010</value>
78230                </enumeratedValue>
78231                <enumeratedValue>
78232                  <name>011</name>
78233                  <description>Alternative 3 (chip-specific).</description>
78234                  <value>#011</value>
78235                </enumeratedValue>
78236                <enumeratedValue>
78237                  <name>100</name>
78238                  <description>Alternative 4 (chip-specific).</description>
78239                  <value>#100</value>
78240                </enumeratedValue>
78241                <enumeratedValue>
78242                  <name>101</name>
78243                  <description>Alternative 5 (chip-specific).</description>
78244                  <value>#101</value>
78245                </enumeratedValue>
78246                <enumeratedValue>
78247                  <name>110</name>
78248                  <description>Alternative 6 (chip-specific).</description>
78249                  <value>#110</value>
78250                </enumeratedValue>
78251                <enumeratedValue>
78252                  <name>111</name>
78253                  <description>Alternative 7 (chip-specific).</description>
78254                  <value>#111</value>
78255                </enumeratedValue>
78256              </enumeratedValues>
78257            </field>
78258            <field>
78259              <name>LK</name>
78260              <description>Lock Register</description>
78261              <bitOffset>15</bitOffset>
78262              <bitWidth>1</bitWidth>
78263              <access>read-write</access>
78264              <enumeratedValues>
78265                <enumeratedValue>
78266                  <name>0</name>
78267                  <description>Pin Control Register fields [15:0] are not locked.</description>
78268                  <value>#0</value>
78269                </enumeratedValue>
78270                <enumeratedValue>
78271                  <name>1</name>
78272                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
78273                  <value>#1</value>
78274                </enumeratedValue>
78275              </enumeratedValues>
78276            </field>
78277            <field>
78278              <name>IRQC</name>
78279              <description>Interrupt Configuration</description>
78280              <bitOffset>16</bitOffset>
78281              <bitWidth>4</bitWidth>
78282              <access>read-write</access>
78283              <enumeratedValues>
78284                <enumeratedValue>
78285                  <name>0000</name>
78286                  <description>Interrupt Status Flag (ISF) is disabled.</description>
78287                  <value>#0000</value>
78288                </enumeratedValue>
78289                <enumeratedValue>
78290                  <name>0001</name>
78291                  <description>ISF flag and DMA request on rising edge.</description>
78292                  <value>#0001</value>
78293                </enumeratedValue>
78294                <enumeratedValue>
78295                  <name>0010</name>
78296                  <description>ISF flag and DMA request on falling edge.</description>
78297                  <value>#0010</value>
78298                </enumeratedValue>
78299                <enumeratedValue>
78300                  <name>0011</name>
78301                  <description>ISF flag and DMA request on either edge.</description>
78302                  <value>#0011</value>
78303                </enumeratedValue>
78304                <enumeratedValue>
78305                  <name>1000</name>
78306                  <description>ISF flag and Interrupt when logic 0.</description>
78307                  <value>#1000</value>
78308                </enumeratedValue>
78309                <enumeratedValue>
78310                  <name>1001</name>
78311                  <description>ISF flag and Interrupt on rising-edge.</description>
78312                  <value>#1001</value>
78313                </enumeratedValue>
78314                <enumeratedValue>
78315                  <name>1010</name>
78316                  <description>ISF flag and Interrupt on falling-edge.</description>
78317                  <value>#1010</value>
78318                </enumeratedValue>
78319                <enumeratedValue>
78320                  <name>1011</name>
78321                  <description>ISF flag and Interrupt on either edge.</description>
78322                  <value>#1011</value>
78323                </enumeratedValue>
78324                <enumeratedValue>
78325                  <name>1100</name>
78326                  <description>ISF flag and Interrupt when logic 1.</description>
78327                  <value>#1100</value>
78328                </enumeratedValue>
78329              </enumeratedValues>
78330            </field>
78331            <field>
78332              <name>ISF</name>
78333              <description>Interrupt Status Flag</description>
78334              <bitOffset>24</bitOffset>
78335              <bitWidth>1</bitWidth>
78336              <access>read-write</access>
78337              <enumeratedValues>
78338                <enumeratedValue>
78339                  <name>0</name>
78340                  <description>Configured interrupt is not detected.</description>
78341                  <value>#0</value>
78342                </enumeratedValue>
78343                <enumeratedValue>
78344                  <name>1</name>
78345                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
78346                  <value>#1</value>
78347                </enumeratedValue>
78348              </enumeratedValues>
78349            </field>
78350          </fields>
78351        </register>
78352        <register>
78353          <name>PCR7</name>
78354          <description>Pin Control Register n</description>
78355          <addressOffset>0x1C</addressOffset>
78356          <size>32</size>
78357          <access>read-write</access>
78358          <resetValue>0</resetValue>
78359          <resetMask>0xFFFFFFFF</resetMask>
78360          <fields>
78361            <field>
78362              <name>PS</name>
78363              <description>Pull Select</description>
78364              <bitOffset>0</bitOffset>
78365              <bitWidth>1</bitWidth>
78366              <access>read-write</access>
78367              <enumeratedValues>
78368                <enumeratedValue>
78369                  <name>0</name>
78370                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
78371                  <value>#0</value>
78372                </enumeratedValue>
78373                <enumeratedValue>
78374                  <name>1</name>
78375                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
78376                  <value>#1</value>
78377                </enumeratedValue>
78378              </enumeratedValues>
78379            </field>
78380            <field>
78381              <name>PE</name>
78382              <description>Pull Enable</description>
78383              <bitOffset>1</bitOffset>
78384              <bitWidth>1</bitWidth>
78385              <access>read-write</access>
78386              <enumeratedValues>
78387                <enumeratedValue>
78388                  <name>0</name>
78389                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
78390                  <value>#0</value>
78391                </enumeratedValue>
78392                <enumeratedValue>
78393                  <name>1</name>
78394                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
78395                  <value>#1</value>
78396                </enumeratedValue>
78397              </enumeratedValues>
78398            </field>
78399            <field>
78400              <name>SRE</name>
78401              <description>Slew Rate Enable</description>
78402              <bitOffset>2</bitOffset>
78403              <bitWidth>1</bitWidth>
78404              <access>read-write</access>
78405              <enumeratedValues>
78406                <enumeratedValue>
78407                  <name>0</name>
78408                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
78409                  <value>#0</value>
78410                </enumeratedValue>
78411                <enumeratedValue>
78412                  <name>1</name>
78413                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
78414                  <value>#1</value>
78415                </enumeratedValue>
78416              </enumeratedValues>
78417            </field>
78418            <field>
78419              <name>PFE</name>
78420              <description>Passive Filter Enable</description>
78421              <bitOffset>4</bitOffset>
78422              <bitWidth>1</bitWidth>
78423              <access>read-only</access>
78424              <enumeratedValues>
78425                <enumeratedValue>
78426                  <name>0</name>
78427                  <description>Passive input filter is disabled on the corresponding pin.</description>
78428                  <value>#0</value>
78429                </enumeratedValue>
78430                <enumeratedValue>
78431                  <name>1</name>
78432                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
78433                  <value>#1</value>
78434                </enumeratedValue>
78435              </enumeratedValues>
78436            </field>
78437            <field>
78438              <name>ODE</name>
78439              <description>Open Drain Enable</description>
78440              <bitOffset>5</bitOffset>
78441              <bitWidth>1</bitWidth>
78442              <access>read-write</access>
78443              <enumeratedValues>
78444                <enumeratedValue>
78445                  <name>0</name>
78446                  <description>Open drain output is disabled on the corresponding pin.</description>
78447                  <value>#0</value>
78448                </enumeratedValue>
78449                <enumeratedValue>
78450                  <name>1</name>
78451                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
78452                  <value>#1</value>
78453                </enumeratedValue>
78454              </enumeratedValues>
78455            </field>
78456            <field>
78457              <name>DSE</name>
78458              <description>Drive Strength Enable</description>
78459              <bitOffset>6</bitOffset>
78460              <bitWidth>1</bitWidth>
78461              <access>read-only</access>
78462              <enumeratedValues>
78463                <enumeratedValue>
78464                  <name>0</name>
78465                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
78466                  <value>#0</value>
78467                </enumeratedValue>
78468                <enumeratedValue>
78469                  <name>1</name>
78470                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
78471                  <value>#1</value>
78472                </enumeratedValue>
78473              </enumeratedValues>
78474            </field>
78475            <field>
78476              <name>MUX</name>
78477              <description>Pin Mux Control</description>
78478              <bitOffset>8</bitOffset>
78479              <bitWidth>3</bitWidth>
78480              <access>read-write</access>
78481              <enumeratedValues>
78482                <enumeratedValue>
78483                  <name>000</name>
78484                  <description>Pin disabled (Alternative 0) (analog).</description>
78485                  <value>#000</value>
78486                </enumeratedValue>
78487                <enumeratedValue>
78488                  <name>001</name>
78489                  <description>Alternative 1 (GPIO).</description>
78490                  <value>#001</value>
78491                </enumeratedValue>
78492                <enumeratedValue>
78493                  <name>010</name>
78494                  <description>Alternative 2 (chip-specific).</description>
78495                  <value>#010</value>
78496                </enumeratedValue>
78497                <enumeratedValue>
78498                  <name>011</name>
78499                  <description>Alternative 3 (chip-specific).</description>
78500                  <value>#011</value>
78501                </enumeratedValue>
78502                <enumeratedValue>
78503                  <name>100</name>
78504                  <description>Alternative 4 (chip-specific).</description>
78505                  <value>#100</value>
78506                </enumeratedValue>
78507                <enumeratedValue>
78508                  <name>101</name>
78509                  <description>Alternative 5 (chip-specific).</description>
78510                  <value>#101</value>
78511                </enumeratedValue>
78512                <enumeratedValue>
78513                  <name>110</name>
78514                  <description>Alternative 6 (chip-specific).</description>
78515                  <value>#110</value>
78516                </enumeratedValue>
78517                <enumeratedValue>
78518                  <name>111</name>
78519                  <description>Alternative 7 (chip-specific).</description>
78520                  <value>#111</value>
78521                </enumeratedValue>
78522              </enumeratedValues>
78523            </field>
78524            <field>
78525              <name>LK</name>
78526              <description>Lock Register</description>
78527              <bitOffset>15</bitOffset>
78528              <bitWidth>1</bitWidth>
78529              <access>read-write</access>
78530              <enumeratedValues>
78531                <enumeratedValue>
78532                  <name>0</name>
78533                  <description>Pin Control Register fields [15:0] are not locked.</description>
78534                  <value>#0</value>
78535                </enumeratedValue>
78536                <enumeratedValue>
78537                  <name>1</name>
78538                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
78539                  <value>#1</value>
78540                </enumeratedValue>
78541              </enumeratedValues>
78542            </field>
78543            <field>
78544              <name>IRQC</name>
78545              <description>Interrupt Configuration</description>
78546              <bitOffset>16</bitOffset>
78547              <bitWidth>4</bitWidth>
78548              <access>read-write</access>
78549              <enumeratedValues>
78550                <enumeratedValue>
78551                  <name>0000</name>
78552                  <description>Interrupt Status Flag (ISF) is disabled.</description>
78553                  <value>#0000</value>
78554                </enumeratedValue>
78555                <enumeratedValue>
78556                  <name>0001</name>
78557                  <description>ISF flag and DMA request on rising edge.</description>
78558                  <value>#0001</value>
78559                </enumeratedValue>
78560                <enumeratedValue>
78561                  <name>0010</name>
78562                  <description>ISF flag and DMA request on falling edge.</description>
78563                  <value>#0010</value>
78564                </enumeratedValue>
78565                <enumeratedValue>
78566                  <name>0011</name>
78567                  <description>ISF flag and DMA request on either edge.</description>
78568                  <value>#0011</value>
78569                </enumeratedValue>
78570                <enumeratedValue>
78571                  <name>1000</name>
78572                  <description>ISF flag and Interrupt when logic 0.</description>
78573                  <value>#1000</value>
78574                </enumeratedValue>
78575                <enumeratedValue>
78576                  <name>1001</name>
78577                  <description>ISF flag and Interrupt on rising-edge.</description>
78578                  <value>#1001</value>
78579                </enumeratedValue>
78580                <enumeratedValue>
78581                  <name>1010</name>
78582                  <description>ISF flag and Interrupt on falling-edge.</description>
78583                  <value>#1010</value>
78584                </enumeratedValue>
78585                <enumeratedValue>
78586                  <name>1011</name>
78587                  <description>ISF flag and Interrupt on either edge.</description>
78588                  <value>#1011</value>
78589                </enumeratedValue>
78590                <enumeratedValue>
78591                  <name>1100</name>
78592                  <description>ISF flag and Interrupt when logic 1.</description>
78593                  <value>#1100</value>
78594                </enumeratedValue>
78595              </enumeratedValues>
78596            </field>
78597            <field>
78598              <name>ISF</name>
78599              <description>Interrupt Status Flag</description>
78600              <bitOffset>24</bitOffset>
78601              <bitWidth>1</bitWidth>
78602              <access>read-write</access>
78603              <enumeratedValues>
78604                <enumeratedValue>
78605                  <name>0</name>
78606                  <description>Configured interrupt is not detected.</description>
78607                  <value>#0</value>
78608                </enumeratedValue>
78609                <enumeratedValue>
78610                  <name>1</name>
78611                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
78612                  <value>#1</value>
78613                </enumeratedValue>
78614              </enumeratedValues>
78615            </field>
78616          </fields>
78617        </register>
78618        <register>
78619          <name>PCR8</name>
78620          <description>Pin Control Register n</description>
78621          <addressOffset>0x20</addressOffset>
78622          <size>32</size>
78623          <access>read-write</access>
78624          <resetValue>0</resetValue>
78625          <resetMask>0xFFFFFFFF</resetMask>
78626          <fields>
78627            <field>
78628              <name>PS</name>
78629              <description>Pull Select</description>
78630              <bitOffset>0</bitOffset>
78631              <bitWidth>1</bitWidth>
78632              <access>read-write</access>
78633              <enumeratedValues>
78634                <enumeratedValue>
78635                  <name>0</name>
78636                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
78637                  <value>#0</value>
78638                </enumeratedValue>
78639                <enumeratedValue>
78640                  <name>1</name>
78641                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
78642                  <value>#1</value>
78643                </enumeratedValue>
78644              </enumeratedValues>
78645            </field>
78646            <field>
78647              <name>PE</name>
78648              <description>Pull Enable</description>
78649              <bitOffset>1</bitOffset>
78650              <bitWidth>1</bitWidth>
78651              <access>read-write</access>
78652              <enumeratedValues>
78653                <enumeratedValue>
78654                  <name>0</name>
78655                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
78656                  <value>#0</value>
78657                </enumeratedValue>
78658                <enumeratedValue>
78659                  <name>1</name>
78660                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
78661                  <value>#1</value>
78662                </enumeratedValue>
78663              </enumeratedValues>
78664            </field>
78665            <field>
78666              <name>SRE</name>
78667              <description>Slew Rate Enable</description>
78668              <bitOffset>2</bitOffset>
78669              <bitWidth>1</bitWidth>
78670              <access>read-write</access>
78671              <enumeratedValues>
78672                <enumeratedValue>
78673                  <name>0</name>
78674                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
78675                  <value>#0</value>
78676                </enumeratedValue>
78677                <enumeratedValue>
78678                  <name>1</name>
78679                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
78680                  <value>#1</value>
78681                </enumeratedValue>
78682              </enumeratedValues>
78683            </field>
78684            <field>
78685              <name>PFE</name>
78686              <description>Passive Filter Enable</description>
78687              <bitOffset>4</bitOffset>
78688              <bitWidth>1</bitWidth>
78689              <access>read-only</access>
78690              <enumeratedValues>
78691                <enumeratedValue>
78692                  <name>0</name>
78693                  <description>Passive input filter is disabled on the corresponding pin.</description>
78694                  <value>#0</value>
78695                </enumeratedValue>
78696                <enumeratedValue>
78697                  <name>1</name>
78698                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
78699                  <value>#1</value>
78700                </enumeratedValue>
78701              </enumeratedValues>
78702            </field>
78703            <field>
78704              <name>ODE</name>
78705              <description>Open Drain Enable</description>
78706              <bitOffset>5</bitOffset>
78707              <bitWidth>1</bitWidth>
78708              <access>read-write</access>
78709              <enumeratedValues>
78710                <enumeratedValue>
78711                  <name>0</name>
78712                  <description>Open drain output is disabled on the corresponding pin.</description>
78713                  <value>#0</value>
78714                </enumeratedValue>
78715                <enumeratedValue>
78716                  <name>1</name>
78717                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
78718                  <value>#1</value>
78719                </enumeratedValue>
78720              </enumeratedValues>
78721            </field>
78722            <field>
78723              <name>DSE</name>
78724              <description>Drive Strength Enable</description>
78725              <bitOffset>6</bitOffset>
78726              <bitWidth>1</bitWidth>
78727              <access>read-only</access>
78728              <enumeratedValues>
78729                <enumeratedValue>
78730                  <name>0</name>
78731                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
78732                  <value>#0</value>
78733                </enumeratedValue>
78734                <enumeratedValue>
78735                  <name>1</name>
78736                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
78737                  <value>#1</value>
78738                </enumeratedValue>
78739              </enumeratedValues>
78740            </field>
78741            <field>
78742              <name>MUX</name>
78743              <description>Pin Mux Control</description>
78744              <bitOffset>8</bitOffset>
78745              <bitWidth>3</bitWidth>
78746              <access>read-write</access>
78747              <enumeratedValues>
78748                <enumeratedValue>
78749                  <name>000</name>
78750                  <description>Pin disabled (Alternative 0) (analog).</description>
78751                  <value>#000</value>
78752                </enumeratedValue>
78753                <enumeratedValue>
78754                  <name>001</name>
78755                  <description>Alternative 1 (GPIO).</description>
78756                  <value>#001</value>
78757                </enumeratedValue>
78758                <enumeratedValue>
78759                  <name>010</name>
78760                  <description>Alternative 2 (chip-specific).</description>
78761                  <value>#010</value>
78762                </enumeratedValue>
78763                <enumeratedValue>
78764                  <name>011</name>
78765                  <description>Alternative 3 (chip-specific).</description>
78766                  <value>#011</value>
78767                </enumeratedValue>
78768                <enumeratedValue>
78769                  <name>100</name>
78770                  <description>Alternative 4 (chip-specific).</description>
78771                  <value>#100</value>
78772                </enumeratedValue>
78773                <enumeratedValue>
78774                  <name>101</name>
78775                  <description>Alternative 5 (chip-specific).</description>
78776                  <value>#101</value>
78777                </enumeratedValue>
78778                <enumeratedValue>
78779                  <name>110</name>
78780                  <description>Alternative 6 (chip-specific).</description>
78781                  <value>#110</value>
78782                </enumeratedValue>
78783                <enumeratedValue>
78784                  <name>111</name>
78785                  <description>Alternative 7 (chip-specific).</description>
78786                  <value>#111</value>
78787                </enumeratedValue>
78788              </enumeratedValues>
78789            </field>
78790            <field>
78791              <name>LK</name>
78792              <description>Lock Register</description>
78793              <bitOffset>15</bitOffset>
78794              <bitWidth>1</bitWidth>
78795              <access>read-write</access>
78796              <enumeratedValues>
78797                <enumeratedValue>
78798                  <name>0</name>
78799                  <description>Pin Control Register fields [15:0] are not locked.</description>
78800                  <value>#0</value>
78801                </enumeratedValue>
78802                <enumeratedValue>
78803                  <name>1</name>
78804                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
78805                  <value>#1</value>
78806                </enumeratedValue>
78807              </enumeratedValues>
78808            </field>
78809            <field>
78810              <name>IRQC</name>
78811              <description>Interrupt Configuration</description>
78812              <bitOffset>16</bitOffset>
78813              <bitWidth>4</bitWidth>
78814              <access>read-write</access>
78815              <enumeratedValues>
78816                <enumeratedValue>
78817                  <name>0000</name>
78818                  <description>Interrupt Status Flag (ISF) is disabled.</description>
78819                  <value>#0000</value>
78820                </enumeratedValue>
78821                <enumeratedValue>
78822                  <name>0001</name>
78823                  <description>ISF flag and DMA request on rising edge.</description>
78824                  <value>#0001</value>
78825                </enumeratedValue>
78826                <enumeratedValue>
78827                  <name>0010</name>
78828                  <description>ISF flag and DMA request on falling edge.</description>
78829                  <value>#0010</value>
78830                </enumeratedValue>
78831                <enumeratedValue>
78832                  <name>0011</name>
78833                  <description>ISF flag and DMA request on either edge.</description>
78834                  <value>#0011</value>
78835                </enumeratedValue>
78836                <enumeratedValue>
78837                  <name>1000</name>
78838                  <description>ISF flag and Interrupt when logic 0.</description>
78839                  <value>#1000</value>
78840                </enumeratedValue>
78841                <enumeratedValue>
78842                  <name>1001</name>
78843                  <description>ISF flag and Interrupt on rising-edge.</description>
78844                  <value>#1001</value>
78845                </enumeratedValue>
78846                <enumeratedValue>
78847                  <name>1010</name>
78848                  <description>ISF flag and Interrupt on falling-edge.</description>
78849                  <value>#1010</value>
78850                </enumeratedValue>
78851                <enumeratedValue>
78852                  <name>1011</name>
78853                  <description>ISF flag and Interrupt on either edge.</description>
78854                  <value>#1011</value>
78855                </enumeratedValue>
78856                <enumeratedValue>
78857                  <name>1100</name>
78858                  <description>ISF flag and Interrupt when logic 1.</description>
78859                  <value>#1100</value>
78860                </enumeratedValue>
78861              </enumeratedValues>
78862            </field>
78863            <field>
78864              <name>ISF</name>
78865              <description>Interrupt Status Flag</description>
78866              <bitOffset>24</bitOffset>
78867              <bitWidth>1</bitWidth>
78868              <access>read-write</access>
78869              <enumeratedValues>
78870                <enumeratedValue>
78871                  <name>0</name>
78872                  <description>Configured interrupt is not detected.</description>
78873                  <value>#0</value>
78874                </enumeratedValue>
78875                <enumeratedValue>
78876                  <name>1</name>
78877                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
78878                  <value>#1</value>
78879                </enumeratedValue>
78880              </enumeratedValues>
78881            </field>
78882          </fields>
78883        </register>
78884        <register>
78885          <name>PCR9</name>
78886          <description>Pin Control Register n</description>
78887          <addressOffset>0x24</addressOffset>
78888          <size>32</size>
78889          <access>read-write</access>
78890          <resetValue>0</resetValue>
78891          <resetMask>0xFFFFFFFF</resetMask>
78892          <fields>
78893            <field>
78894              <name>PS</name>
78895              <description>Pull Select</description>
78896              <bitOffset>0</bitOffset>
78897              <bitWidth>1</bitWidth>
78898              <access>read-write</access>
78899              <enumeratedValues>
78900                <enumeratedValue>
78901                  <name>0</name>
78902                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
78903                  <value>#0</value>
78904                </enumeratedValue>
78905                <enumeratedValue>
78906                  <name>1</name>
78907                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
78908                  <value>#1</value>
78909                </enumeratedValue>
78910              </enumeratedValues>
78911            </field>
78912            <field>
78913              <name>PE</name>
78914              <description>Pull Enable</description>
78915              <bitOffset>1</bitOffset>
78916              <bitWidth>1</bitWidth>
78917              <access>read-write</access>
78918              <enumeratedValues>
78919                <enumeratedValue>
78920                  <name>0</name>
78921                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
78922                  <value>#0</value>
78923                </enumeratedValue>
78924                <enumeratedValue>
78925                  <name>1</name>
78926                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
78927                  <value>#1</value>
78928                </enumeratedValue>
78929              </enumeratedValues>
78930            </field>
78931            <field>
78932              <name>SRE</name>
78933              <description>Slew Rate Enable</description>
78934              <bitOffset>2</bitOffset>
78935              <bitWidth>1</bitWidth>
78936              <access>read-write</access>
78937              <enumeratedValues>
78938                <enumeratedValue>
78939                  <name>0</name>
78940                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
78941                  <value>#0</value>
78942                </enumeratedValue>
78943                <enumeratedValue>
78944                  <name>1</name>
78945                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
78946                  <value>#1</value>
78947                </enumeratedValue>
78948              </enumeratedValues>
78949            </field>
78950            <field>
78951              <name>PFE</name>
78952              <description>Passive Filter Enable</description>
78953              <bitOffset>4</bitOffset>
78954              <bitWidth>1</bitWidth>
78955              <access>read-only</access>
78956              <enumeratedValues>
78957                <enumeratedValue>
78958                  <name>0</name>
78959                  <description>Passive input filter is disabled on the corresponding pin.</description>
78960                  <value>#0</value>
78961                </enumeratedValue>
78962                <enumeratedValue>
78963                  <name>1</name>
78964                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
78965                  <value>#1</value>
78966                </enumeratedValue>
78967              </enumeratedValues>
78968            </field>
78969            <field>
78970              <name>ODE</name>
78971              <description>Open Drain Enable</description>
78972              <bitOffset>5</bitOffset>
78973              <bitWidth>1</bitWidth>
78974              <access>read-write</access>
78975              <enumeratedValues>
78976                <enumeratedValue>
78977                  <name>0</name>
78978                  <description>Open drain output is disabled on the corresponding pin.</description>
78979                  <value>#0</value>
78980                </enumeratedValue>
78981                <enumeratedValue>
78982                  <name>1</name>
78983                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
78984                  <value>#1</value>
78985                </enumeratedValue>
78986              </enumeratedValues>
78987            </field>
78988            <field>
78989              <name>DSE</name>
78990              <description>Drive Strength Enable</description>
78991              <bitOffset>6</bitOffset>
78992              <bitWidth>1</bitWidth>
78993              <access>read-only</access>
78994              <enumeratedValues>
78995                <enumeratedValue>
78996                  <name>0</name>
78997                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
78998                  <value>#0</value>
78999                </enumeratedValue>
79000                <enumeratedValue>
79001                  <name>1</name>
79002                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
79003                  <value>#1</value>
79004                </enumeratedValue>
79005              </enumeratedValues>
79006            </field>
79007            <field>
79008              <name>MUX</name>
79009              <description>Pin Mux Control</description>
79010              <bitOffset>8</bitOffset>
79011              <bitWidth>3</bitWidth>
79012              <access>read-write</access>
79013              <enumeratedValues>
79014                <enumeratedValue>
79015                  <name>000</name>
79016                  <description>Pin disabled (Alternative 0) (analog).</description>
79017                  <value>#000</value>
79018                </enumeratedValue>
79019                <enumeratedValue>
79020                  <name>001</name>
79021                  <description>Alternative 1 (GPIO).</description>
79022                  <value>#001</value>
79023                </enumeratedValue>
79024                <enumeratedValue>
79025                  <name>010</name>
79026                  <description>Alternative 2 (chip-specific).</description>
79027                  <value>#010</value>
79028                </enumeratedValue>
79029                <enumeratedValue>
79030                  <name>011</name>
79031                  <description>Alternative 3 (chip-specific).</description>
79032                  <value>#011</value>
79033                </enumeratedValue>
79034                <enumeratedValue>
79035                  <name>100</name>
79036                  <description>Alternative 4 (chip-specific).</description>
79037                  <value>#100</value>
79038                </enumeratedValue>
79039                <enumeratedValue>
79040                  <name>101</name>
79041                  <description>Alternative 5 (chip-specific).</description>
79042                  <value>#101</value>
79043                </enumeratedValue>
79044                <enumeratedValue>
79045                  <name>110</name>
79046                  <description>Alternative 6 (chip-specific).</description>
79047                  <value>#110</value>
79048                </enumeratedValue>
79049                <enumeratedValue>
79050                  <name>111</name>
79051                  <description>Alternative 7 (chip-specific).</description>
79052                  <value>#111</value>
79053                </enumeratedValue>
79054              </enumeratedValues>
79055            </field>
79056            <field>
79057              <name>LK</name>
79058              <description>Lock Register</description>
79059              <bitOffset>15</bitOffset>
79060              <bitWidth>1</bitWidth>
79061              <access>read-write</access>
79062              <enumeratedValues>
79063                <enumeratedValue>
79064                  <name>0</name>
79065                  <description>Pin Control Register fields [15:0] are not locked.</description>
79066                  <value>#0</value>
79067                </enumeratedValue>
79068                <enumeratedValue>
79069                  <name>1</name>
79070                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
79071                  <value>#1</value>
79072                </enumeratedValue>
79073              </enumeratedValues>
79074            </field>
79075            <field>
79076              <name>IRQC</name>
79077              <description>Interrupt Configuration</description>
79078              <bitOffset>16</bitOffset>
79079              <bitWidth>4</bitWidth>
79080              <access>read-write</access>
79081              <enumeratedValues>
79082                <enumeratedValue>
79083                  <name>0000</name>
79084                  <description>Interrupt Status Flag (ISF) is disabled.</description>
79085                  <value>#0000</value>
79086                </enumeratedValue>
79087                <enumeratedValue>
79088                  <name>0001</name>
79089                  <description>ISF flag and DMA request on rising edge.</description>
79090                  <value>#0001</value>
79091                </enumeratedValue>
79092                <enumeratedValue>
79093                  <name>0010</name>
79094                  <description>ISF flag and DMA request on falling edge.</description>
79095                  <value>#0010</value>
79096                </enumeratedValue>
79097                <enumeratedValue>
79098                  <name>0011</name>
79099                  <description>ISF flag and DMA request on either edge.</description>
79100                  <value>#0011</value>
79101                </enumeratedValue>
79102                <enumeratedValue>
79103                  <name>1000</name>
79104                  <description>ISF flag and Interrupt when logic 0.</description>
79105                  <value>#1000</value>
79106                </enumeratedValue>
79107                <enumeratedValue>
79108                  <name>1001</name>
79109                  <description>ISF flag and Interrupt on rising-edge.</description>
79110                  <value>#1001</value>
79111                </enumeratedValue>
79112                <enumeratedValue>
79113                  <name>1010</name>
79114                  <description>ISF flag and Interrupt on falling-edge.</description>
79115                  <value>#1010</value>
79116                </enumeratedValue>
79117                <enumeratedValue>
79118                  <name>1011</name>
79119                  <description>ISF flag and Interrupt on either edge.</description>
79120                  <value>#1011</value>
79121                </enumeratedValue>
79122                <enumeratedValue>
79123                  <name>1100</name>
79124                  <description>ISF flag and Interrupt when logic 1.</description>
79125                  <value>#1100</value>
79126                </enumeratedValue>
79127              </enumeratedValues>
79128            </field>
79129            <field>
79130              <name>ISF</name>
79131              <description>Interrupt Status Flag</description>
79132              <bitOffset>24</bitOffset>
79133              <bitWidth>1</bitWidth>
79134              <access>read-write</access>
79135              <enumeratedValues>
79136                <enumeratedValue>
79137                  <name>0</name>
79138                  <description>Configured interrupt is not detected.</description>
79139                  <value>#0</value>
79140                </enumeratedValue>
79141                <enumeratedValue>
79142                  <name>1</name>
79143                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
79144                  <value>#1</value>
79145                </enumeratedValue>
79146              </enumeratedValues>
79147            </field>
79148          </fields>
79149        </register>
79150        <register>
79151          <name>PCR10</name>
79152          <description>Pin Control Register n</description>
79153          <addressOffset>0x28</addressOffset>
79154          <size>32</size>
79155          <access>read-write</access>
79156          <resetValue>0</resetValue>
79157          <resetMask>0xFFFFFFFF</resetMask>
79158          <fields>
79159            <field>
79160              <name>PS</name>
79161              <description>Pull Select</description>
79162              <bitOffset>0</bitOffset>
79163              <bitWidth>1</bitWidth>
79164              <access>read-write</access>
79165              <enumeratedValues>
79166                <enumeratedValue>
79167                  <name>0</name>
79168                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
79169                  <value>#0</value>
79170                </enumeratedValue>
79171                <enumeratedValue>
79172                  <name>1</name>
79173                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
79174                  <value>#1</value>
79175                </enumeratedValue>
79176              </enumeratedValues>
79177            </field>
79178            <field>
79179              <name>PE</name>
79180              <description>Pull Enable</description>
79181              <bitOffset>1</bitOffset>
79182              <bitWidth>1</bitWidth>
79183              <access>read-write</access>
79184              <enumeratedValues>
79185                <enumeratedValue>
79186                  <name>0</name>
79187                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
79188                  <value>#0</value>
79189                </enumeratedValue>
79190                <enumeratedValue>
79191                  <name>1</name>
79192                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
79193                  <value>#1</value>
79194                </enumeratedValue>
79195              </enumeratedValues>
79196            </field>
79197            <field>
79198              <name>SRE</name>
79199              <description>Slew Rate Enable</description>
79200              <bitOffset>2</bitOffset>
79201              <bitWidth>1</bitWidth>
79202              <access>read-write</access>
79203              <enumeratedValues>
79204                <enumeratedValue>
79205                  <name>0</name>
79206                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
79207                  <value>#0</value>
79208                </enumeratedValue>
79209                <enumeratedValue>
79210                  <name>1</name>
79211                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
79212                  <value>#1</value>
79213                </enumeratedValue>
79214              </enumeratedValues>
79215            </field>
79216            <field>
79217              <name>PFE</name>
79218              <description>Passive Filter Enable</description>
79219              <bitOffset>4</bitOffset>
79220              <bitWidth>1</bitWidth>
79221              <access>read-only</access>
79222              <enumeratedValues>
79223                <enumeratedValue>
79224                  <name>0</name>
79225                  <description>Passive input filter is disabled on the corresponding pin.</description>
79226                  <value>#0</value>
79227                </enumeratedValue>
79228                <enumeratedValue>
79229                  <name>1</name>
79230                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
79231                  <value>#1</value>
79232                </enumeratedValue>
79233              </enumeratedValues>
79234            </field>
79235            <field>
79236              <name>ODE</name>
79237              <description>Open Drain Enable</description>
79238              <bitOffset>5</bitOffset>
79239              <bitWidth>1</bitWidth>
79240              <access>read-write</access>
79241              <enumeratedValues>
79242                <enumeratedValue>
79243                  <name>0</name>
79244                  <description>Open drain output is disabled on the corresponding pin.</description>
79245                  <value>#0</value>
79246                </enumeratedValue>
79247                <enumeratedValue>
79248                  <name>1</name>
79249                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
79250                  <value>#1</value>
79251                </enumeratedValue>
79252              </enumeratedValues>
79253            </field>
79254            <field>
79255              <name>DSE</name>
79256              <description>Drive Strength Enable</description>
79257              <bitOffset>6</bitOffset>
79258              <bitWidth>1</bitWidth>
79259              <access>read-only</access>
79260              <enumeratedValues>
79261                <enumeratedValue>
79262                  <name>0</name>
79263                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
79264                  <value>#0</value>
79265                </enumeratedValue>
79266                <enumeratedValue>
79267                  <name>1</name>
79268                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
79269                  <value>#1</value>
79270                </enumeratedValue>
79271              </enumeratedValues>
79272            </field>
79273            <field>
79274              <name>MUX</name>
79275              <description>Pin Mux Control</description>
79276              <bitOffset>8</bitOffset>
79277              <bitWidth>3</bitWidth>
79278              <access>read-write</access>
79279              <enumeratedValues>
79280                <enumeratedValue>
79281                  <name>000</name>
79282                  <description>Pin disabled (Alternative 0) (analog).</description>
79283                  <value>#000</value>
79284                </enumeratedValue>
79285                <enumeratedValue>
79286                  <name>001</name>
79287                  <description>Alternative 1 (GPIO).</description>
79288                  <value>#001</value>
79289                </enumeratedValue>
79290                <enumeratedValue>
79291                  <name>010</name>
79292                  <description>Alternative 2 (chip-specific).</description>
79293                  <value>#010</value>
79294                </enumeratedValue>
79295                <enumeratedValue>
79296                  <name>011</name>
79297                  <description>Alternative 3 (chip-specific).</description>
79298                  <value>#011</value>
79299                </enumeratedValue>
79300                <enumeratedValue>
79301                  <name>100</name>
79302                  <description>Alternative 4 (chip-specific).</description>
79303                  <value>#100</value>
79304                </enumeratedValue>
79305                <enumeratedValue>
79306                  <name>101</name>
79307                  <description>Alternative 5 (chip-specific).</description>
79308                  <value>#101</value>
79309                </enumeratedValue>
79310                <enumeratedValue>
79311                  <name>110</name>
79312                  <description>Alternative 6 (chip-specific).</description>
79313                  <value>#110</value>
79314                </enumeratedValue>
79315                <enumeratedValue>
79316                  <name>111</name>
79317                  <description>Alternative 7 (chip-specific).</description>
79318                  <value>#111</value>
79319                </enumeratedValue>
79320              </enumeratedValues>
79321            </field>
79322            <field>
79323              <name>LK</name>
79324              <description>Lock Register</description>
79325              <bitOffset>15</bitOffset>
79326              <bitWidth>1</bitWidth>
79327              <access>read-write</access>
79328              <enumeratedValues>
79329                <enumeratedValue>
79330                  <name>0</name>
79331                  <description>Pin Control Register fields [15:0] are not locked.</description>
79332                  <value>#0</value>
79333                </enumeratedValue>
79334                <enumeratedValue>
79335                  <name>1</name>
79336                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
79337                  <value>#1</value>
79338                </enumeratedValue>
79339              </enumeratedValues>
79340            </field>
79341            <field>
79342              <name>IRQC</name>
79343              <description>Interrupt Configuration</description>
79344              <bitOffset>16</bitOffset>
79345              <bitWidth>4</bitWidth>
79346              <access>read-write</access>
79347              <enumeratedValues>
79348                <enumeratedValue>
79349                  <name>0000</name>
79350                  <description>Interrupt Status Flag (ISF) is disabled.</description>
79351                  <value>#0000</value>
79352                </enumeratedValue>
79353                <enumeratedValue>
79354                  <name>0001</name>
79355                  <description>ISF flag and DMA request on rising edge.</description>
79356                  <value>#0001</value>
79357                </enumeratedValue>
79358                <enumeratedValue>
79359                  <name>0010</name>
79360                  <description>ISF flag and DMA request on falling edge.</description>
79361                  <value>#0010</value>
79362                </enumeratedValue>
79363                <enumeratedValue>
79364                  <name>0011</name>
79365                  <description>ISF flag and DMA request on either edge.</description>
79366                  <value>#0011</value>
79367                </enumeratedValue>
79368                <enumeratedValue>
79369                  <name>1000</name>
79370                  <description>ISF flag and Interrupt when logic 0.</description>
79371                  <value>#1000</value>
79372                </enumeratedValue>
79373                <enumeratedValue>
79374                  <name>1001</name>
79375                  <description>ISF flag and Interrupt on rising-edge.</description>
79376                  <value>#1001</value>
79377                </enumeratedValue>
79378                <enumeratedValue>
79379                  <name>1010</name>
79380                  <description>ISF flag and Interrupt on falling-edge.</description>
79381                  <value>#1010</value>
79382                </enumeratedValue>
79383                <enumeratedValue>
79384                  <name>1011</name>
79385                  <description>ISF flag and Interrupt on either edge.</description>
79386                  <value>#1011</value>
79387                </enumeratedValue>
79388                <enumeratedValue>
79389                  <name>1100</name>
79390                  <description>ISF flag and Interrupt when logic 1.</description>
79391                  <value>#1100</value>
79392                </enumeratedValue>
79393              </enumeratedValues>
79394            </field>
79395            <field>
79396              <name>ISF</name>
79397              <description>Interrupt Status Flag</description>
79398              <bitOffset>24</bitOffset>
79399              <bitWidth>1</bitWidth>
79400              <access>read-write</access>
79401              <enumeratedValues>
79402                <enumeratedValue>
79403                  <name>0</name>
79404                  <description>Configured interrupt is not detected.</description>
79405                  <value>#0</value>
79406                </enumeratedValue>
79407                <enumeratedValue>
79408                  <name>1</name>
79409                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
79410                  <value>#1</value>
79411                </enumeratedValue>
79412              </enumeratedValues>
79413            </field>
79414          </fields>
79415        </register>
79416        <register>
79417          <name>PCR11</name>
79418          <description>Pin Control Register n</description>
79419          <addressOffset>0x2C</addressOffset>
79420          <size>32</size>
79421          <access>read-write</access>
79422          <resetValue>0</resetValue>
79423          <resetMask>0xFFFFFFFF</resetMask>
79424          <fields>
79425            <field>
79426              <name>PS</name>
79427              <description>Pull Select</description>
79428              <bitOffset>0</bitOffset>
79429              <bitWidth>1</bitWidth>
79430              <access>read-write</access>
79431              <enumeratedValues>
79432                <enumeratedValue>
79433                  <name>0</name>
79434                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
79435                  <value>#0</value>
79436                </enumeratedValue>
79437                <enumeratedValue>
79438                  <name>1</name>
79439                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
79440                  <value>#1</value>
79441                </enumeratedValue>
79442              </enumeratedValues>
79443            </field>
79444            <field>
79445              <name>PE</name>
79446              <description>Pull Enable</description>
79447              <bitOffset>1</bitOffset>
79448              <bitWidth>1</bitWidth>
79449              <access>read-write</access>
79450              <enumeratedValues>
79451                <enumeratedValue>
79452                  <name>0</name>
79453                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
79454                  <value>#0</value>
79455                </enumeratedValue>
79456                <enumeratedValue>
79457                  <name>1</name>
79458                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
79459                  <value>#1</value>
79460                </enumeratedValue>
79461              </enumeratedValues>
79462            </field>
79463            <field>
79464              <name>SRE</name>
79465              <description>Slew Rate Enable</description>
79466              <bitOffset>2</bitOffset>
79467              <bitWidth>1</bitWidth>
79468              <access>read-write</access>
79469              <enumeratedValues>
79470                <enumeratedValue>
79471                  <name>0</name>
79472                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
79473                  <value>#0</value>
79474                </enumeratedValue>
79475                <enumeratedValue>
79476                  <name>1</name>
79477                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
79478                  <value>#1</value>
79479                </enumeratedValue>
79480              </enumeratedValues>
79481            </field>
79482            <field>
79483              <name>PFE</name>
79484              <description>Passive Filter Enable</description>
79485              <bitOffset>4</bitOffset>
79486              <bitWidth>1</bitWidth>
79487              <access>read-only</access>
79488              <enumeratedValues>
79489                <enumeratedValue>
79490                  <name>0</name>
79491                  <description>Passive input filter is disabled on the corresponding pin.</description>
79492                  <value>#0</value>
79493                </enumeratedValue>
79494                <enumeratedValue>
79495                  <name>1</name>
79496                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
79497                  <value>#1</value>
79498                </enumeratedValue>
79499              </enumeratedValues>
79500            </field>
79501            <field>
79502              <name>ODE</name>
79503              <description>Open Drain Enable</description>
79504              <bitOffset>5</bitOffset>
79505              <bitWidth>1</bitWidth>
79506              <access>read-write</access>
79507              <enumeratedValues>
79508                <enumeratedValue>
79509                  <name>0</name>
79510                  <description>Open drain output is disabled on the corresponding pin.</description>
79511                  <value>#0</value>
79512                </enumeratedValue>
79513                <enumeratedValue>
79514                  <name>1</name>
79515                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
79516                  <value>#1</value>
79517                </enumeratedValue>
79518              </enumeratedValues>
79519            </field>
79520            <field>
79521              <name>DSE</name>
79522              <description>Drive Strength Enable</description>
79523              <bitOffset>6</bitOffset>
79524              <bitWidth>1</bitWidth>
79525              <access>read-only</access>
79526              <enumeratedValues>
79527                <enumeratedValue>
79528                  <name>0</name>
79529                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
79530                  <value>#0</value>
79531                </enumeratedValue>
79532                <enumeratedValue>
79533                  <name>1</name>
79534                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
79535                  <value>#1</value>
79536                </enumeratedValue>
79537              </enumeratedValues>
79538            </field>
79539            <field>
79540              <name>MUX</name>
79541              <description>Pin Mux Control</description>
79542              <bitOffset>8</bitOffset>
79543              <bitWidth>3</bitWidth>
79544              <access>read-write</access>
79545              <enumeratedValues>
79546                <enumeratedValue>
79547                  <name>000</name>
79548                  <description>Pin disabled (Alternative 0) (analog).</description>
79549                  <value>#000</value>
79550                </enumeratedValue>
79551                <enumeratedValue>
79552                  <name>001</name>
79553                  <description>Alternative 1 (GPIO).</description>
79554                  <value>#001</value>
79555                </enumeratedValue>
79556                <enumeratedValue>
79557                  <name>010</name>
79558                  <description>Alternative 2 (chip-specific).</description>
79559                  <value>#010</value>
79560                </enumeratedValue>
79561                <enumeratedValue>
79562                  <name>011</name>
79563                  <description>Alternative 3 (chip-specific).</description>
79564                  <value>#011</value>
79565                </enumeratedValue>
79566                <enumeratedValue>
79567                  <name>100</name>
79568                  <description>Alternative 4 (chip-specific).</description>
79569                  <value>#100</value>
79570                </enumeratedValue>
79571                <enumeratedValue>
79572                  <name>101</name>
79573                  <description>Alternative 5 (chip-specific).</description>
79574                  <value>#101</value>
79575                </enumeratedValue>
79576                <enumeratedValue>
79577                  <name>110</name>
79578                  <description>Alternative 6 (chip-specific).</description>
79579                  <value>#110</value>
79580                </enumeratedValue>
79581                <enumeratedValue>
79582                  <name>111</name>
79583                  <description>Alternative 7 (chip-specific).</description>
79584                  <value>#111</value>
79585                </enumeratedValue>
79586              </enumeratedValues>
79587            </field>
79588            <field>
79589              <name>LK</name>
79590              <description>Lock Register</description>
79591              <bitOffset>15</bitOffset>
79592              <bitWidth>1</bitWidth>
79593              <access>read-write</access>
79594              <enumeratedValues>
79595                <enumeratedValue>
79596                  <name>0</name>
79597                  <description>Pin Control Register fields [15:0] are not locked.</description>
79598                  <value>#0</value>
79599                </enumeratedValue>
79600                <enumeratedValue>
79601                  <name>1</name>
79602                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
79603                  <value>#1</value>
79604                </enumeratedValue>
79605              </enumeratedValues>
79606            </field>
79607            <field>
79608              <name>IRQC</name>
79609              <description>Interrupt Configuration</description>
79610              <bitOffset>16</bitOffset>
79611              <bitWidth>4</bitWidth>
79612              <access>read-write</access>
79613              <enumeratedValues>
79614                <enumeratedValue>
79615                  <name>0000</name>
79616                  <description>Interrupt Status Flag (ISF) is disabled.</description>
79617                  <value>#0000</value>
79618                </enumeratedValue>
79619                <enumeratedValue>
79620                  <name>0001</name>
79621                  <description>ISF flag and DMA request on rising edge.</description>
79622                  <value>#0001</value>
79623                </enumeratedValue>
79624                <enumeratedValue>
79625                  <name>0010</name>
79626                  <description>ISF flag and DMA request on falling edge.</description>
79627                  <value>#0010</value>
79628                </enumeratedValue>
79629                <enumeratedValue>
79630                  <name>0011</name>
79631                  <description>ISF flag and DMA request on either edge.</description>
79632                  <value>#0011</value>
79633                </enumeratedValue>
79634                <enumeratedValue>
79635                  <name>1000</name>
79636                  <description>ISF flag and Interrupt when logic 0.</description>
79637                  <value>#1000</value>
79638                </enumeratedValue>
79639                <enumeratedValue>
79640                  <name>1001</name>
79641                  <description>ISF flag and Interrupt on rising-edge.</description>
79642                  <value>#1001</value>
79643                </enumeratedValue>
79644                <enumeratedValue>
79645                  <name>1010</name>
79646                  <description>ISF flag and Interrupt on falling-edge.</description>
79647                  <value>#1010</value>
79648                </enumeratedValue>
79649                <enumeratedValue>
79650                  <name>1011</name>
79651                  <description>ISF flag and Interrupt on either edge.</description>
79652                  <value>#1011</value>
79653                </enumeratedValue>
79654                <enumeratedValue>
79655                  <name>1100</name>
79656                  <description>ISF flag and Interrupt when logic 1.</description>
79657                  <value>#1100</value>
79658                </enumeratedValue>
79659              </enumeratedValues>
79660            </field>
79661            <field>
79662              <name>ISF</name>
79663              <description>Interrupt Status Flag</description>
79664              <bitOffset>24</bitOffset>
79665              <bitWidth>1</bitWidth>
79666              <access>read-write</access>
79667              <enumeratedValues>
79668                <enumeratedValue>
79669                  <name>0</name>
79670                  <description>Configured interrupt is not detected.</description>
79671                  <value>#0</value>
79672                </enumeratedValue>
79673                <enumeratedValue>
79674                  <name>1</name>
79675                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
79676                  <value>#1</value>
79677                </enumeratedValue>
79678              </enumeratedValues>
79679            </field>
79680          </fields>
79681        </register>
79682        <register>
79683          <name>PCR12</name>
79684          <description>Pin Control Register n</description>
79685          <addressOffset>0x30</addressOffset>
79686          <size>32</size>
79687          <access>read-write</access>
79688          <resetValue>0</resetValue>
79689          <resetMask>0xFFFFFFFF</resetMask>
79690          <fields>
79691            <field>
79692              <name>PS</name>
79693              <description>Pull Select</description>
79694              <bitOffset>0</bitOffset>
79695              <bitWidth>1</bitWidth>
79696              <access>read-write</access>
79697              <enumeratedValues>
79698                <enumeratedValue>
79699                  <name>0</name>
79700                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
79701                  <value>#0</value>
79702                </enumeratedValue>
79703                <enumeratedValue>
79704                  <name>1</name>
79705                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
79706                  <value>#1</value>
79707                </enumeratedValue>
79708              </enumeratedValues>
79709            </field>
79710            <field>
79711              <name>PE</name>
79712              <description>Pull Enable</description>
79713              <bitOffset>1</bitOffset>
79714              <bitWidth>1</bitWidth>
79715              <access>read-write</access>
79716              <enumeratedValues>
79717                <enumeratedValue>
79718                  <name>0</name>
79719                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
79720                  <value>#0</value>
79721                </enumeratedValue>
79722                <enumeratedValue>
79723                  <name>1</name>
79724                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
79725                  <value>#1</value>
79726                </enumeratedValue>
79727              </enumeratedValues>
79728            </field>
79729            <field>
79730              <name>SRE</name>
79731              <description>Slew Rate Enable</description>
79732              <bitOffset>2</bitOffset>
79733              <bitWidth>1</bitWidth>
79734              <access>read-write</access>
79735              <enumeratedValues>
79736                <enumeratedValue>
79737                  <name>0</name>
79738                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
79739                  <value>#0</value>
79740                </enumeratedValue>
79741                <enumeratedValue>
79742                  <name>1</name>
79743                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
79744                  <value>#1</value>
79745                </enumeratedValue>
79746              </enumeratedValues>
79747            </field>
79748            <field>
79749              <name>PFE</name>
79750              <description>Passive Filter Enable</description>
79751              <bitOffset>4</bitOffset>
79752              <bitWidth>1</bitWidth>
79753              <access>read-only</access>
79754              <enumeratedValues>
79755                <enumeratedValue>
79756                  <name>0</name>
79757                  <description>Passive input filter is disabled on the corresponding pin.</description>
79758                  <value>#0</value>
79759                </enumeratedValue>
79760                <enumeratedValue>
79761                  <name>1</name>
79762                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
79763                  <value>#1</value>
79764                </enumeratedValue>
79765              </enumeratedValues>
79766            </field>
79767            <field>
79768              <name>ODE</name>
79769              <description>Open Drain Enable</description>
79770              <bitOffset>5</bitOffset>
79771              <bitWidth>1</bitWidth>
79772              <access>read-write</access>
79773              <enumeratedValues>
79774                <enumeratedValue>
79775                  <name>0</name>
79776                  <description>Open drain output is disabled on the corresponding pin.</description>
79777                  <value>#0</value>
79778                </enumeratedValue>
79779                <enumeratedValue>
79780                  <name>1</name>
79781                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
79782                  <value>#1</value>
79783                </enumeratedValue>
79784              </enumeratedValues>
79785            </field>
79786            <field>
79787              <name>DSE</name>
79788              <description>Drive Strength Enable</description>
79789              <bitOffset>6</bitOffset>
79790              <bitWidth>1</bitWidth>
79791              <access>read-only</access>
79792              <enumeratedValues>
79793                <enumeratedValue>
79794                  <name>0</name>
79795                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
79796                  <value>#0</value>
79797                </enumeratedValue>
79798                <enumeratedValue>
79799                  <name>1</name>
79800                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
79801                  <value>#1</value>
79802                </enumeratedValue>
79803              </enumeratedValues>
79804            </field>
79805            <field>
79806              <name>MUX</name>
79807              <description>Pin Mux Control</description>
79808              <bitOffset>8</bitOffset>
79809              <bitWidth>3</bitWidth>
79810              <access>read-write</access>
79811              <enumeratedValues>
79812                <enumeratedValue>
79813                  <name>000</name>
79814                  <description>Pin disabled (Alternative 0) (analog).</description>
79815                  <value>#000</value>
79816                </enumeratedValue>
79817                <enumeratedValue>
79818                  <name>001</name>
79819                  <description>Alternative 1 (GPIO).</description>
79820                  <value>#001</value>
79821                </enumeratedValue>
79822                <enumeratedValue>
79823                  <name>010</name>
79824                  <description>Alternative 2 (chip-specific).</description>
79825                  <value>#010</value>
79826                </enumeratedValue>
79827                <enumeratedValue>
79828                  <name>011</name>
79829                  <description>Alternative 3 (chip-specific).</description>
79830                  <value>#011</value>
79831                </enumeratedValue>
79832                <enumeratedValue>
79833                  <name>100</name>
79834                  <description>Alternative 4 (chip-specific).</description>
79835                  <value>#100</value>
79836                </enumeratedValue>
79837                <enumeratedValue>
79838                  <name>101</name>
79839                  <description>Alternative 5 (chip-specific).</description>
79840                  <value>#101</value>
79841                </enumeratedValue>
79842                <enumeratedValue>
79843                  <name>110</name>
79844                  <description>Alternative 6 (chip-specific).</description>
79845                  <value>#110</value>
79846                </enumeratedValue>
79847                <enumeratedValue>
79848                  <name>111</name>
79849                  <description>Alternative 7 (chip-specific).</description>
79850                  <value>#111</value>
79851                </enumeratedValue>
79852              </enumeratedValues>
79853            </field>
79854            <field>
79855              <name>LK</name>
79856              <description>Lock Register</description>
79857              <bitOffset>15</bitOffset>
79858              <bitWidth>1</bitWidth>
79859              <access>read-write</access>
79860              <enumeratedValues>
79861                <enumeratedValue>
79862                  <name>0</name>
79863                  <description>Pin Control Register fields [15:0] are not locked.</description>
79864                  <value>#0</value>
79865                </enumeratedValue>
79866                <enumeratedValue>
79867                  <name>1</name>
79868                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
79869                  <value>#1</value>
79870                </enumeratedValue>
79871              </enumeratedValues>
79872            </field>
79873            <field>
79874              <name>IRQC</name>
79875              <description>Interrupt Configuration</description>
79876              <bitOffset>16</bitOffset>
79877              <bitWidth>4</bitWidth>
79878              <access>read-write</access>
79879              <enumeratedValues>
79880                <enumeratedValue>
79881                  <name>0000</name>
79882                  <description>Interrupt Status Flag (ISF) is disabled.</description>
79883                  <value>#0000</value>
79884                </enumeratedValue>
79885                <enumeratedValue>
79886                  <name>0001</name>
79887                  <description>ISF flag and DMA request on rising edge.</description>
79888                  <value>#0001</value>
79889                </enumeratedValue>
79890                <enumeratedValue>
79891                  <name>0010</name>
79892                  <description>ISF flag and DMA request on falling edge.</description>
79893                  <value>#0010</value>
79894                </enumeratedValue>
79895                <enumeratedValue>
79896                  <name>0011</name>
79897                  <description>ISF flag and DMA request on either edge.</description>
79898                  <value>#0011</value>
79899                </enumeratedValue>
79900                <enumeratedValue>
79901                  <name>1000</name>
79902                  <description>ISF flag and Interrupt when logic 0.</description>
79903                  <value>#1000</value>
79904                </enumeratedValue>
79905                <enumeratedValue>
79906                  <name>1001</name>
79907                  <description>ISF flag and Interrupt on rising-edge.</description>
79908                  <value>#1001</value>
79909                </enumeratedValue>
79910                <enumeratedValue>
79911                  <name>1010</name>
79912                  <description>ISF flag and Interrupt on falling-edge.</description>
79913                  <value>#1010</value>
79914                </enumeratedValue>
79915                <enumeratedValue>
79916                  <name>1011</name>
79917                  <description>ISF flag and Interrupt on either edge.</description>
79918                  <value>#1011</value>
79919                </enumeratedValue>
79920                <enumeratedValue>
79921                  <name>1100</name>
79922                  <description>ISF flag and Interrupt when logic 1.</description>
79923                  <value>#1100</value>
79924                </enumeratedValue>
79925              </enumeratedValues>
79926            </field>
79927            <field>
79928              <name>ISF</name>
79929              <description>Interrupt Status Flag</description>
79930              <bitOffset>24</bitOffset>
79931              <bitWidth>1</bitWidth>
79932              <access>read-write</access>
79933              <enumeratedValues>
79934                <enumeratedValue>
79935                  <name>0</name>
79936                  <description>Configured interrupt is not detected.</description>
79937                  <value>#0</value>
79938                </enumeratedValue>
79939                <enumeratedValue>
79940                  <name>1</name>
79941                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
79942                  <value>#1</value>
79943                </enumeratedValue>
79944              </enumeratedValues>
79945            </field>
79946          </fields>
79947        </register>
79948        <register>
79949          <name>PCR13</name>
79950          <description>Pin Control Register n</description>
79951          <addressOffset>0x34</addressOffset>
79952          <size>32</size>
79953          <access>read-write</access>
79954          <resetValue>0</resetValue>
79955          <resetMask>0xFFFFFFFF</resetMask>
79956          <fields>
79957            <field>
79958              <name>PS</name>
79959              <description>Pull Select</description>
79960              <bitOffset>0</bitOffset>
79961              <bitWidth>1</bitWidth>
79962              <access>read-write</access>
79963              <enumeratedValues>
79964                <enumeratedValue>
79965                  <name>0</name>
79966                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
79967                  <value>#0</value>
79968                </enumeratedValue>
79969                <enumeratedValue>
79970                  <name>1</name>
79971                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
79972                  <value>#1</value>
79973                </enumeratedValue>
79974              </enumeratedValues>
79975            </field>
79976            <field>
79977              <name>PE</name>
79978              <description>Pull Enable</description>
79979              <bitOffset>1</bitOffset>
79980              <bitWidth>1</bitWidth>
79981              <access>read-write</access>
79982              <enumeratedValues>
79983                <enumeratedValue>
79984                  <name>0</name>
79985                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
79986                  <value>#0</value>
79987                </enumeratedValue>
79988                <enumeratedValue>
79989                  <name>1</name>
79990                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
79991                  <value>#1</value>
79992                </enumeratedValue>
79993              </enumeratedValues>
79994            </field>
79995            <field>
79996              <name>SRE</name>
79997              <description>Slew Rate Enable</description>
79998              <bitOffset>2</bitOffset>
79999              <bitWidth>1</bitWidth>
80000              <access>read-write</access>
80001              <enumeratedValues>
80002                <enumeratedValue>
80003                  <name>0</name>
80004                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
80005                  <value>#0</value>
80006                </enumeratedValue>
80007                <enumeratedValue>
80008                  <name>1</name>
80009                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
80010                  <value>#1</value>
80011                </enumeratedValue>
80012              </enumeratedValues>
80013            </field>
80014            <field>
80015              <name>PFE</name>
80016              <description>Passive Filter Enable</description>
80017              <bitOffset>4</bitOffset>
80018              <bitWidth>1</bitWidth>
80019              <access>read-only</access>
80020              <enumeratedValues>
80021                <enumeratedValue>
80022                  <name>0</name>
80023                  <description>Passive input filter is disabled on the corresponding pin.</description>
80024                  <value>#0</value>
80025                </enumeratedValue>
80026                <enumeratedValue>
80027                  <name>1</name>
80028                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
80029                  <value>#1</value>
80030                </enumeratedValue>
80031              </enumeratedValues>
80032            </field>
80033            <field>
80034              <name>ODE</name>
80035              <description>Open Drain Enable</description>
80036              <bitOffset>5</bitOffset>
80037              <bitWidth>1</bitWidth>
80038              <access>read-write</access>
80039              <enumeratedValues>
80040                <enumeratedValue>
80041                  <name>0</name>
80042                  <description>Open drain output is disabled on the corresponding pin.</description>
80043                  <value>#0</value>
80044                </enumeratedValue>
80045                <enumeratedValue>
80046                  <name>1</name>
80047                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
80048                  <value>#1</value>
80049                </enumeratedValue>
80050              </enumeratedValues>
80051            </field>
80052            <field>
80053              <name>DSE</name>
80054              <description>Drive Strength Enable</description>
80055              <bitOffset>6</bitOffset>
80056              <bitWidth>1</bitWidth>
80057              <access>read-only</access>
80058              <enumeratedValues>
80059                <enumeratedValue>
80060                  <name>0</name>
80061                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
80062                  <value>#0</value>
80063                </enumeratedValue>
80064                <enumeratedValue>
80065                  <name>1</name>
80066                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
80067                  <value>#1</value>
80068                </enumeratedValue>
80069              </enumeratedValues>
80070            </field>
80071            <field>
80072              <name>MUX</name>
80073              <description>Pin Mux Control</description>
80074              <bitOffset>8</bitOffset>
80075              <bitWidth>3</bitWidth>
80076              <access>read-write</access>
80077              <enumeratedValues>
80078                <enumeratedValue>
80079                  <name>000</name>
80080                  <description>Pin disabled (Alternative 0) (analog).</description>
80081                  <value>#000</value>
80082                </enumeratedValue>
80083                <enumeratedValue>
80084                  <name>001</name>
80085                  <description>Alternative 1 (GPIO).</description>
80086                  <value>#001</value>
80087                </enumeratedValue>
80088                <enumeratedValue>
80089                  <name>010</name>
80090                  <description>Alternative 2 (chip-specific).</description>
80091                  <value>#010</value>
80092                </enumeratedValue>
80093                <enumeratedValue>
80094                  <name>011</name>
80095                  <description>Alternative 3 (chip-specific).</description>
80096                  <value>#011</value>
80097                </enumeratedValue>
80098                <enumeratedValue>
80099                  <name>100</name>
80100                  <description>Alternative 4 (chip-specific).</description>
80101                  <value>#100</value>
80102                </enumeratedValue>
80103                <enumeratedValue>
80104                  <name>101</name>
80105                  <description>Alternative 5 (chip-specific).</description>
80106                  <value>#101</value>
80107                </enumeratedValue>
80108                <enumeratedValue>
80109                  <name>110</name>
80110                  <description>Alternative 6 (chip-specific).</description>
80111                  <value>#110</value>
80112                </enumeratedValue>
80113                <enumeratedValue>
80114                  <name>111</name>
80115                  <description>Alternative 7 (chip-specific).</description>
80116                  <value>#111</value>
80117                </enumeratedValue>
80118              </enumeratedValues>
80119            </field>
80120            <field>
80121              <name>LK</name>
80122              <description>Lock Register</description>
80123              <bitOffset>15</bitOffset>
80124              <bitWidth>1</bitWidth>
80125              <access>read-write</access>
80126              <enumeratedValues>
80127                <enumeratedValue>
80128                  <name>0</name>
80129                  <description>Pin Control Register fields [15:0] are not locked.</description>
80130                  <value>#0</value>
80131                </enumeratedValue>
80132                <enumeratedValue>
80133                  <name>1</name>
80134                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
80135                  <value>#1</value>
80136                </enumeratedValue>
80137              </enumeratedValues>
80138            </field>
80139            <field>
80140              <name>IRQC</name>
80141              <description>Interrupt Configuration</description>
80142              <bitOffset>16</bitOffset>
80143              <bitWidth>4</bitWidth>
80144              <access>read-write</access>
80145              <enumeratedValues>
80146                <enumeratedValue>
80147                  <name>0000</name>
80148                  <description>Interrupt Status Flag (ISF) is disabled.</description>
80149                  <value>#0000</value>
80150                </enumeratedValue>
80151                <enumeratedValue>
80152                  <name>0001</name>
80153                  <description>ISF flag and DMA request on rising edge.</description>
80154                  <value>#0001</value>
80155                </enumeratedValue>
80156                <enumeratedValue>
80157                  <name>0010</name>
80158                  <description>ISF flag and DMA request on falling edge.</description>
80159                  <value>#0010</value>
80160                </enumeratedValue>
80161                <enumeratedValue>
80162                  <name>0011</name>
80163                  <description>ISF flag and DMA request on either edge.</description>
80164                  <value>#0011</value>
80165                </enumeratedValue>
80166                <enumeratedValue>
80167                  <name>1000</name>
80168                  <description>ISF flag and Interrupt when logic 0.</description>
80169                  <value>#1000</value>
80170                </enumeratedValue>
80171                <enumeratedValue>
80172                  <name>1001</name>
80173                  <description>ISF flag and Interrupt on rising-edge.</description>
80174                  <value>#1001</value>
80175                </enumeratedValue>
80176                <enumeratedValue>
80177                  <name>1010</name>
80178                  <description>ISF flag and Interrupt on falling-edge.</description>
80179                  <value>#1010</value>
80180                </enumeratedValue>
80181                <enumeratedValue>
80182                  <name>1011</name>
80183                  <description>ISF flag and Interrupt on either edge.</description>
80184                  <value>#1011</value>
80185                </enumeratedValue>
80186                <enumeratedValue>
80187                  <name>1100</name>
80188                  <description>ISF flag and Interrupt when logic 1.</description>
80189                  <value>#1100</value>
80190                </enumeratedValue>
80191              </enumeratedValues>
80192            </field>
80193            <field>
80194              <name>ISF</name>
80195              <description>Interrupt Status Flag</description>
80196              <bitOffset>24</bitOffset>
80197              <bitWidth>1</bitWidth>
80198              <access>read-write</access>
80199              <enumeratedValues>
80200                <enumeratedValue>
80201                  <name>0</name>
80202                  <description>Configured interrupt is not detected.</description>
80203                  <value>#0</value>
80204                </enumeratedValue>
80205                <enumeratedValue>
80206                  <name>1</name>
80207                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
80208                  <value>#1</value>
80209                </enumeratedValue>
80210              </enumeratedValues>
80211            </field>
80212          </fields>
80213        </register>
80214        <register>
80215          <name>PCR14</name>
80216          <description>Pin Control Register n</description>
80217          <addressOffset>0x38</addressOffset>
80218          <size>32</size>
80219          <access>read-write</access>
80220          <resetValue>0</resetValue>
80221          <resetMask>0xFFFFFFFF</resetMask>
80222          <fields>
80223            <field>
80224              <name>PS</name>
80225              <description>Pull Select</description>
80226              <bitOffset>0</bitOffset>
80227              <bitWidth>1</bitWidth>
80228              <access>read-write</access>
80229              <enumeratedValues>
80230                <enumeratedValue>
80231                  <name>0</name>
80232                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
80233                  <value>#0</value>
80234                </enumeratedValue>
80235                <enumeratedValue>
80236                  <name>1</name>
80237                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
80238                  <value>#1</value>
80239                </enumeratedValue>
80240              </enumeratedValues>
80241            </field>
80242            <field>
80243              <name>PE</name>
80244              <description>Pull Enable</description>
80245              <bitOffset>1</bitOffset>
80246              <bitWidth>1</bitWidth>
80247              <access>read-write</access>
80248              <enumeratedValues>
80249                <enumeratedValue>
80250                  <name>0</name>
80251                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
80252                  <value>#0</value>
80253                </enumeratedValue>
80254                <enumeratedValue>
80255                  <name>1</name>
80256                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
80257                  <value>#1</value>
80258                </enumeratedValue>
80259              </enumeratedValues>
80260            </field>
80261            <field>
80262              <name>SRE</name>
80263              <description>Slew Rate Enable</description>
80264              <bitOffset>2</bitOffset>
80265              <bitWidth>1</bitWidth>
80266              <access>read-write</access>
80267              <enumeratedValues>
80268                <enumeratedValue>
80269                  <name>0</name>
80270                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
80271                  <value>#0</value>
80272                </enumeratedValue>
80273                <enumeratedValue>
80274                  <name>1</name>
80275                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
80276                  <value>#1</value>
80277                </enumeratedValue>
80278              </enumeratedValues>
80279            </field>
80280            <field>
80281              <name>PFE</name>
80282              <description>Passive Filter Enable</description>
80283              <bitOffset>4</bitOffset>
80284              <bitWidth>1</bitWidth>
80285              <access>read-only</access>
80286              <enumeratedValues>
80287                <enumeratedValue>
80288                  <name>0</name>
80289                  <description>Passive input filter is disabled on the corresponding pin.</description>
80290                  <value>#0</value>
80291                </enumeratedValue>
80292                <enumeratedValue>
80293                  <name>1</name>
80294                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
80295                  <value>#1</value>
80296                </enumeratedValue>
80297              </enumeratedValues>
80298            </field>
80299            <field>
80300              <name>ODE</name>
80301              <description>Open Drain Enable</description>
80302              <bitOffset>5</bitOffset>
80303              <bitWidth>1</bitWidth>
80304              <access>read-write</access>
80305              <enumeratedValues>
80306                <enumeratedValue>
80307                  <name>0</name>
80308                  <description>Open drain output is disabled on the corresponding pin.</description>
80309                  <value>#0</value>
80310                </enumeratedValue>
80311                <enumeratedValue>
80312                  <name>1</name>
80313                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
80314                  <value>#1</value>
80315                </enumeratedValue>
80316              </enumeratedValues>
80317            </field>
80318            <field>
80319              <name>DSE</name>
80320              <description>Drive Strength Enable</description>
80321              <bitOffset>6</bitOffset>
80322              <bitWidth>1</bitWidth>
80323              <access>read-only</access>
80324              <enumeratedValues>
80325                <enumeratedValue>
80326                  <name>0</name>
80327                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
80328                  <value>#0</value>
80329                </enumeratedValue>
80330                <enumeratedValue>
80331                  <name>1</name>
80332                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
80333                  <value>#1</value>
80334                </enumeratedValue>
80335              </enumeratedValues>
80336            </field>
80337            <field>
80338              <name>MUX</name>
80339              <description>Pin Mux Control</description>
80340              <bitOffset>8</bitOffset>
80341              <bitWidth>3</bitWidth>
80342              <access>read-write</access>
80343              <enumeratedValues>
80344                <enumeratedValue>
80345                  <name>000</name>
80346                  <description>Pin disabled (Alternative 0) (analog).</description>
80347                  <value>#000</value>
80348                </enumeratedValue>
80349                <enumeratedValue>
80350                  <name>001</name>
80351                  <description>Alternative 1 (GPIO).</description>
80352                  <value>#001</value>
80353                </enumeratedValue>
80354                <enumeratedValue>
80355                  <name>010</name>
80356                  <description>Alternative 2 (chip-specific).</description>
80357                  <value>#010</value>
80358                </enumeratedValue>
80359                <enumeratedValue>
80360                  <name>011</name>
80361                  <description>Alternative 3 (chip-specific).</description>
80362                  <value>#011</value>
80363                </enumeratedValue>
80364                <enumeratedValue>
80365                  <name>100</name>
80366                  <description>Alternative 4 (chip-specific).</description>
80367                  <value>#100</value>
80368                </enumeratedValue>
80369                <enumeratedValue>
80370                  <name>101</name>
80371                  <description>Alternative 5 (chip-specific).</description>
80372                  <value>#101</value>
80373                </enumeratedValue>
80374                <enumeratedValue>
80375                  <name>110</name>
80376                  <description>Alternative 6 (chip-specific).</description>
80377                  <value>#110</value>
80378                </enumeratedValue>
80379                <enumeratedValue>
80380                  <name>111</name>
80381                  <description>Alternative 7 (chip-specific).</description>
80382                  <value>#111</value>
80383                </enumeratedValue>
80384              </enumeratedValues>
80385            </field>
80386            <field>
80387              <name>LK</name>
80388              <description>Lock Register</description>
80389              <bitOffset>15</bitOffset>
80390              <bitWidth>1</bitWidth>
80391              <access>read-write</access>
80392              <enumeratedValues>
80393                <enumeratedValue>
80394                  <name>0</name>
80395                  <description>Pin Control Register fields [15:0] are not locked.</description>
80396                  <value>#0</value>
80397                </enumeratedValue>
80398                <enumeratedValue>
80399                  <name>1</name>
80400                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
80401                  <value>#1</value>
80402                </enumeratedValue>
80403              </enumeratedValues>
80404            </field>
80405            <field>
80406              <name>IRQC</name>
80407              <description>Interrupt Configuration</description>
80408              <bitOffset>16</bitOffset>
80409              <bitWidth>4</bitWidth>
80410              <access>read-write</access>
80411              <enumeratedValues>
80412                <enumeratedValue>
80413                  <name>0000</name>
80414                  <description>Interrupt Status Flag (ISF) is disabled.</description>
80415                  <value>#0000</value>
80416                </enumeratedValue>
80417                <enumeratedValue>
80418                  <name>0001</name>
80419                  <description>ISF flag and DMA request on rising edge.</description>
80420                  <value>#0001</value>
80421                </enumeratedValue>
80422                <enumeratedValue>
80423                  <name>0010</name>
80424                  <description>ISF flag and DMA request on falling edge.</description>
80425                  <value>#0010</value>
80426                </enumeratedValue>
80427                <enumeratedValue>
80428                  <name>0011</name>
80429                  <description>ISF flag and DMA request on either edge.</description>
80430                  <value>#0011</value>
80431                </enumeratedValue>
80432                <enumeratedValue>
80433                  <name>1000</name>
80434                  <description>ISF flag and Interrupt when logic 0.</description>
80435                  <value>#1000</value>
80436                </enumeratedValue>
80437                <enumeratedValue>
80438                  <name>1001</name>
80439                  <description>ISF flag and Interrupt on rising-edge.</description>
80440                  <value>#1001</value>
80441                </enumeratedValue>
80442                <enumeratedValue>
80443                  <name>1010</name>
80444                  <description>ISF flag and Interrupt on falling-edge.</description>
80445                  <value>#1010</value>
80446                </enumeratedValue>
80447                <enumeratedValue>
80448                  <name>1011</name>
80449                  <description>ISF flag and Interrupt on either edge.</description>
80450                  <value>#1011</value>
80451                </enumeratedValue>
80452                <enumeratedValue>
80453                  <name>1100</name>
80454                  <description>ISF flag and Interrupt when logic 1.</description>
80455                  <value>#1100</value>
80456                </enumeratedValue>
80457              </enumeratedValues>
80458            </field>
80459            <field>
80460              <name>ISF</name>
80461              <description>Interrupt Status Flag</description>
80462              <bitOffset>24</bitOffset>
80463              <bitWidth>1</bitWidth>
80464              <access>read-write</access>
80465              <enumeratedValues>
80466                <enumeratedValue>
80467                  <name>0</name>
80468                  <description>Configured interrupt is not detected.</description>
80469                  <value>#0</value>
80470                </enumeratedValue>
80471                <enumeratedValue>
80472                  <name>1</name>
80473                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
80474                  <value>#1</value>
80475                </enumeratedValue>
80476              </enumeratedValues>
80477            </field>
80478          </fields>
80479        </register>
80480        <register>
80481          <name>PCR15</name>
80482          <description>Pin Control Register n</description>
80483          <addressOffset>0x3C</addressOffset>
80484          <size>32</size>
80485          <access>read-write</access>
80486          <resetValue>0</resetValue>
80487          <resetMask>0xFFFFFFFF</resetMask>
80488          <fields>
80489            <field>
80490              <name>PS</name>
80491              <description>Pull Select</description>
80492              <bitOffset>0</bitOffset>
80493              <bitWidth>1</bitWidth>
80494              <access>read-write</access>
80495              <enumeratedValues>
80496                <enumeratedValue>
80497                  <name>0</name>
80498                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
80499                  <value>#0</value>
80500                </enumeratedValue>
80501                <enumeratedValue>
80502                  <name>1</name>
80503                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
80504                  <value>#1</value>
80505                </enumeratedValue>
80506              </enumeratedValues>
80507            </field>
80508            <field>
80509              <name>PE</name>
80510              <description>Pull Enable</description>
80511              <bitOffset>1</bitOffset>
80512              <bitWidth>1</bitWidth>
80513              <access>read-write</access>
80514              <enumeratedValues>
80515                <enumeratedValue>
80516                  <name>0</name>
80517                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
80518                  <value>#0</value>
80519                </enumeratedValue>
80520                <enumeratedValue>
80521                  <name>1</name>
80522                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
80523                  <value>#1</value>
80524                </enumeratedValue>
80525              </enumeratedValues>
80526            </field>
80527            <field>
80528              <name>SRE</name>
80529              <description>Slew Rate Enable</description>
80530              <bitOffset>2</bitOffset>
80531              <bitWidth>1</bitWidth>
80532              <access>read-write</access>
80533              <enumeratedValues>
80534                <enumeratedValue>
80535                  <name>0</name>
80536                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
80537                  <value>#0</value>
80538                </enumeratedValue>
80539                <enumeratedValue>
80540                  <name>1</name>
80541                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
80542                  <value>#1</value>
80543                </enumeratedValue>
80544              </enumeratedValues>
80545            </field>
80546            <field>
80547              <name>PFE</name>
80548              <description>Passive Filter Enable</description>
80549              <bitOffset>4</bitOffset>
80550              <bitWidth>1</bitWidth>
80551              <access>read-only</access>
80552              <enumeratedValues>
80553                <enumeratedValue>
80554                  <name>0</name>
80555                  <description>Passive input filter is disabled on the corresponding pin.</description>
80556                  <value>#0</value>
80557                </enumeratedValue>
80558                <enumeratedValue>
80559                  <name>1</name>
80560                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
80561                  <value>#1</value>
80562                </enumeratedValue>
80563              </enumeratedValues>
80564            </field>
80565            <field>
80566              <name>ODE</name>
80567              <description>Open Drain Enable</description>
80568              <bitOffset>5</bitOffset>
80569              <bitWidth>1</bitWidth>
80570              <access>read-write</access>
80571              <enumeratedValues>
80572                <enumeratedValue>
80573                  <name>0</name>
80574                  <description>Open drain output is disabled on the corresponding pin.</description>
80575                  <value>#0</value>
80576                </enumeratedValue>
80577                <enumeratedValue>
80578                  <name>1</name>
80579                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
80580                  <value>#1</value>
80581                </enumeratedValue>
80582              </enumeratedValues>
80583            </field>
80584            <field>
80585              <name>DSE</name>
80586              <description>Drive Strength Enable</description>
80587              <bitOffset>6</bitOffset>
80588              <bitWidth>1</bitWidth>
80589              <access>read-only</access>
80590              <enumeratedValues>
80591                <enumeratedValue>
80592                  <name>0</name>
80593                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
80594                  <value>#0</value>
80595                </enumeratedValue>
80596                <enumeratedValue>
80597                  <name>1</name>
80598                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
80599                  <value>#1</value>
80600                </enumeratedValue>
80601              </enumeratedValues>
80602            </field>
80603            <field>
80604              <name>MUX</name>
80605              <description>Pin Mux Control</description>
80606              <bitOffset>8</bitOffset>
80607              <bitWidth>3</bitWidth>
80608              <access>read-write</access>
80609              <enumeratedValues>
80610                <enumeratedValue>
80611                  <name>000</name>
80612                  <description>Pin disabled (Alternative 0) (analog).</description>
80613                  <value>#000</value>
80614                </enumeratedValue>
80615                <enumeratedValue>
80616                  <name>001</name>
80617                  <description>Alternative 1 (GPIO).</description>
80618                  <value>#001</value>
80619                </enumeratedValue>
80620                <enumeratedValue>
80621                  <name>010</name>
80622                  <description>Alternative 2 (chip-specific).</description>
80623                  <value>#010</value>
80624                </enumeratedValue>
80625                <enumeratedValue>
80626                  <name>011</name>
80627                  <description>Alternative 3 (chip-specific).</description>
80628                  <value>#011</value>
80629                </enumeratedValue>
80630                <enumeratedValue>
80631                  <name>100</name>
80632                  <description>Alternative 4 (chip-specific).</description>
80633                  <value>#100</value>
80634                </enumeratedValue>
80635                <enumeratedValue>
80636                  <name>101</name>
80637                  <description>Alternative 5 (chip-specific).</description>
80638                  <value>#101</value>
80639                </enumeratedValue>
80640                <enumeratedValue>
80641                  <name>110</name>
80642                  <description>Alternative 6 (chip-specific).</description>
80643                  <value>#110</value>
80644                </enumeratedValue>
80645                <enumeratedValue>
80646                  <name>111</name>
80647                  <description>Alternative 7 (chip-specific).</description>
80648                  <value>#111</value>
80649                </enumeratedValue>
80650              </enumeratedValues>
80651            </field>
80652            <field>
80653              <name>LK</name>
80654              <description>Lock Register</description>
80655              <bitOffset>15</bitOffset>
80656              <bitWidth>1</bitWidth>
80657              <access>read-write</access>
80658              <enumeratedValues>
80659                <enumeratedValue>
80660                  <name>0</name>
80661                  <description>Pin Control Register fields [15:0] are not locked.</description>
80662                  <value>#0</value>
80663                </enumeratedValue>
80664                <enumeratedValue>
80665                  <name>1</name>
80666                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
80667                  <value>#1</value>
80668                </enumeratedValue>
80669              </enumeratedValues>
80670            </field>
80671            <field>
80672              <name>IRQC</name>
80673              <description>Interrupt Configuration</description>
80674              <bitOffset>16</bitOffset>
80675              <bitWidth>4</bitWidth>
80676              <access>read-write</access>
80677              <enumeratedValues>
80678                <enumeratedValue>
80679                  <name>0000</name>
80680                  <description>Interrupt Status Flag (ISF) is disabled.</description>
80681                  <value>#0000</value>
80682                </enumeratedValue>
80683                <enumeratedValue>
80684                  <name>0001</name>
80685                  <description>ISF flag and DMA request on rising edge.</description>
80686                  <value>#0001</value>
80687                </enumeratedValue>
80688                <enumeratedValue>
80689                  <name>0010</name>
80690                  <description>ISF flag and DMA request on falling edge.</description>
80691                  <value>#0010</value>
80692                </enumeratedValue>
80693                <enumeratedValue>
80694                  <name>0011</name>
80695                  <description>ISF flag and DMA request on either edge.</description>
80696                  <value>#0011</value>
80697                </enumeratedValue>
80698                <enumeratedValue>
80699                  <name>1000</name>
80700                  <description>ISF flag and Interrupt when logic 0.</description>
80701                  <value>#1000</value>
80702                </enumeratedValue>
80703                <enumeratedValue>
80704                  <name>1001</name>
80705                  <description>ISF flag and Interrupt on rising-edge.</description>
80706                  <value>#1001</value>
80707                </enumeratedValue>
80708                <enumeratedValue>
80709                  <name>1010</name>
80710                  <description>ISF flag and Interrupt on falling-edge.</description>
80711                  <value>#1010</value>
80712                </enumeratedValue>
80713                <enumeratedValue>
80714                  <name>1011</name>
80715                  <description>ISF flag and Interrupt on either edge.</description>
80716                  <value>#1011</value>
80717                </enumeratedValue>
80718                <enumeratedValue>
80719                  <name>1100</name>
80720                  <description>ISF flag and Interrupt when logic 1.</description>
80721                  <value>#1100</value>
80722                </enumeratedValue>
80723              </enumeratedValues>
80724            </field>
80725            <field>
80726              <name>ISF</name>
80727              <description>Interrupt Status Flag</description>
80728              <bitOffset>24</bitOffset>
80729              <bitWidth>1</bitWidth>
80730              <access>read-write</access>
80731              <enumeratedValues>
80732                <enumeratedValue>
80733                  <name>0</name>
80734                  <description>Configured interrupt is not detected.</description>
80735                  <value>#0</value>
80736                </enumeratedValue>
80737                <enumeratedValue>
80738                  <name>1</name>
80739                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
80740                  <value>#1</value>
80741                </enumeratedValue>
80742              </enumeratedValues>
80743            </field>
80744          </fields>
80745        </register>
80746        <register>
80747          <name>PCR16</name>
80748          <description>Pin Control Register n</description>
80749          <addressOffset>0x40</addressOffset>
80750          <size>32</size>
80751          <access>read-write</access>
80752          <resetValue>0</resetValue>
80753          <resetMask>0xFFFFFFFF</resetMask>
80754          <fields>
80755            <field>
80756              <name>PS</name>
80757              <description>Pull Select</description>
80758              <bitOffset>0</bitOffset>
80759              <bitWidth>1</bitWidth>
80760              <access>read-write</access>
80761              <enumeratedValues>
80762                <enumeratedValue>
80763                  <name>0</name>
80764                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
80765                  <value>#0</value>
80766                </enumeratedValue>
80767                <enumeratedValue>
80768                  <name>1</name>
80769                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
80770                  <value>#1</value>
80771                </enumeratedValue>
80772              </enumeratedValues>
80773            </field>
80774            <field>
80775              <name>PE</name>
80776              <description>Pull Enable</description>
80777              <bitOffset>1</bitOffset>
80778              <bitWidth>1</bitWidth>
80779              <access>read-write</access>
80780              <enumeratedValues>
80781                <enumeratedValue>
80782                  <name>0</name>
80783                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
80784                  <value>#0</value>
80785                </enumeratedValue>
80786                <enumeratedValue>
80787                  <name>1</name>
80788                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
80789                  <value>#1</value>
80790                </enumeratedValue>
80791              </enumeratedValues>
80792            </field>
80793            <field>
80794              <name>SRE</name>
80795              <description>Slew Rate Enable</description>
80796              <bitOffset>2</bitOffset>
80797              <bitWidth>1</bitWidth>
80798              <access>read-write</access>
80799              <enumeratedValues>
80800                <enumeratedValue>
80801                  <name>0</name>
80802                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
80803                  <value>#0</value>
80804                </enumeratedValue>
80805                <enumeratedValue>
80806                  <name>1</name>
80807                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
80808                  <value>#1</value>
80809                </enumeratedValue>
80810              </enumeratedValues>
80811            </field>
80812            <field>
80813              <name>PFE</name>
80814              <description>Passive Filter Enable</description>
80815              <bitOffset>4</bitOffset>
80816              <bitWidth>1</bitWidth>
80817              <access>read-only</access>
80818              <enumeratedValues>
80819                <enumeratedValue>
80820                  <name>0</name>
80821                  <description>Passive input filter is disabled on the corresponding pin.</description>
80822                  <value>#0</value>
80823                </enumeratedValue>
80824                <enumeratedValue>
80825                  <name>1</name>
80826                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
80827                  <value>#1</value>
80828                </enumeratedValue>
80829              </enumeratedValues>
80830            </field>
80831            <field>
80832              <name>ODE</name>
80833              <description>Open Drain Enable</description>
80834              <bitOffset>5</bitOffset>
80835              <bitWidth>1</bitWidth>
80836              <access>read-write</access>
80837              <enumeratedValues>
80838                <enumeratedValue>
80839                  <name>0</name>
80840                  <description>Open drain output is disabled on the corresponding pin.</description>
80841                  <value>#0</value>
80842                </enumeratedValue>
80843                <enumeratedValue>
80844                  <name>1</name>
80845                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
80846                  <value>#1</value>
80847                </enumeratedValue>
80848              </enumeratedValues>
80849            </field>
80850            <field>
80851              <name>DSE</name>
80852              <description>Drive Strength Enable</description>
80853              <bitOffset>6</bitOffset>
80854              <bitWidth>1</bitWidth>
80855              <access>read-only</access>
80856              <enumeratedValues>
80857                <enumeratedValue>
80858                  <name>0</name>
80859                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
80860                  <value>#0</value>
80861                </enumeratedValue>
80862                <enumeratedValue>
80863                  <name>1</name>
80864                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
80865                  <value>#1</value>
80866                </enumeratedValue>
80867              </enumeratedValues>
80868            </field>
80869            <field>
80870              <name>MUX</name>
80871              <description>Pin Mux Control</description>
80872              <bitOffset>8</bitOffset>
80873              <bitWidth>3</bitWidth>
80874              <access>read-write</access>
80875              <enumeratedValues>
80876                <enumeratedValue>
80877                  <name>000</name>
80878                  <description>Pin disabled (Alternative 0) (analog).</description>
80879                  <value>#000</value>
80880                </enumeratedValue>
80881                <enumeratedValue>
80882                  <name>001</name>
80883                  <description>Alternative 1 (GPIO).</description>
80884                  <value>#001</value>
80885                </enumeratedValue>
80886                <enumeratedValue>
80887                  <name>010</name>
80888                  <description>Alternative 2 (chip-specific).</description>
80889                  <value>#010</value>
80890                </enumeratedValue>
80891                <enumeratedValue>
80892                  <name>011</name>
80893                  <description>Alternative 3 (chip-specific).</description>
80894                  <value>#011</value>
80895                </enumeratedValue>
80896                <enumeratedValue>
80897                  <name>100</name>
80898                  <description>Alternative 4 (chip-specific).</description>
80899                  <value>#100</value>
80900                </enumeratedValue>
80901                <enumeratedValue>
80902                  <name>101</name>
80903                  <description>Alternative 5 (chip-specific).</description>
80904                  <value>#101</value>
80905                </enumeratedValue>
80906                <enumeratedValue>
80907                  <name>110</name>
80908                  <description>Alternative 6 (chip-specific).</description>
80909                  <value>#110</value>
80910                </enumeratedValue>
80911                <enumeratedValue>
80912                  <name>111</name>
80913                  <description>Alternative 7 (chip-specific).</description>
80914                  <value>#111</value>
80915                </enumeratedValue>
80916              </enumeratedValues>
80917            </field>
80918            <field>
80919              <name>LK</name>
80920              <description>Lock Register</description>
80921              <bitOffset>15</bitOffset>
80922              <bitWidth>1</bitWidth>
80923              <access>read-write</access>
80924              <enumeratedValues>
80925                <enumeratedValue>
80926                  <name>0</name>
80927                  <description>Pin Control Register fields [15:0] are not locked.</description>
80928                  <value>#0</value>
80929                </enumeratedValue>
80930                <enumeratedValue>
80931                  <name>1</name>
80932                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
80933                  <value>#1</value>
80934                </enumeratedValue>
80935              </enumeratedValues>
80936            </field>
80937            <field>
80938              <name>IRQC</name>
80939              <description>Interrupt Configuration</description>
80940              <bitOffset>16</bitOffset>
80941              <bitWidth>4</bitWidth>
80942              <access>read-write</access>
80943              <enumeratedValues>
80944                <enumeratedValue>
80945                  <name>0000</name>
80946                  <description>Interrupt Status Flag (ISF) is disabled.</description>
80947                  <value>#0000</value>
80948                </enumeratedValue>
80949                <enumeratedValue>
80950                  <name>0001</name>
80951                  <description>ISF flag and DMA request on rising edge.</description>
80952                  <value>#0001</value>
80953                </enumeratedValue>
80954                <enumeratedValue>
80955                  <name>0010</name>
80956                  <description>ISF flag and DMA request on falling edge.</description>
80957                  <value>#0010</value>
80958                </enumeratedValue>
80959                <enumeratedValue>
80960                  <name>0011</name>
80961                  <description>ISF flag and DMA request on either edge.</description>
80962                  <value>#0011</value>
80963                </enumeratedValue>
80964                <enumeratedValue>
80965                  <name>1000</name>
80966                  <description>ISF flag and Interrupt when logic 0.</description>
80967                  <value>#1000</value>
80968                </enumeratedValue>
80969                <enumeratedValue>
80970                  <name>1001</name>
80971                  <description>ISF flag and Interrupt on rising-edge.</description>
80972                  <value>#1001</value>
80973                </enumeratedValue>
80974                <enumeratedValue>
80975                  <name>1010</name>
80976                  <description>ISF flag and Interrupt on falling-edge.</description>
80977                  <value>#1010</value>
80978                </enumeratedValue>
80979                <enumeratedValue>
80980                  <name>1011</name>
80981                  <description>ISF flag and Interrupt on either edge.</description>
80982                  <value>#1011</value>
80983                </enumeratedValue>
80984                <enumeratedValue>
80985                  <name>1100</name>
80986                  <description>ISF flag and Interrupt when logic 1.</description>
80987                  <value>#1100</value>
80988                </enumeratedValue>
80989              </enumeratedValues>
80990            </field>
80991            <field>
80992              <name>ISF</name>
80993              <description>Interrupt Status Flag</description>
80994              <bitOffset>24</bitOffset>
80995              <bitWidth>1</bitWidth>
80996              <access>read-write</access>
80997              <enumeratedValues>
80998                <enumeratedValue>
80999                  <name>0</name>
81000                  <description>Configured interrupt is not detected.</description>
81001                  <value>#0</value>
81002                </enumeratedValue>
81003                <enumeratedValue>
81004                  <name>1</name>
81005                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
81006                  <value>#1</value>
81007                </enumeratedValue>
81008              </enumeratedValues>
81009            </field>
81010          </fields>
81011        </register>
81012        <register>
81013          <name>PCR17</name>
81014          <description>Pin Control Register n</description>
81015          <addressOffset>0x44</addressOffset>
81016          <size>32</size>
81017          <access>read-write</access>
81018          <resetValue>0</resetValue>
81019          <resetMask>0xFFFFFFFF</resetMask>
81020          <fields>
81021            <field>
81022              <name>PS</name>
81023              <description>Pull Select</description>
81024              <bitOffset>0</bitOffset>
81025              <bitWidth>1</bitWidth>
81026              <access>read-write</access>
81027              <enumeratedValues>
81028                <enumeratedValue>
81029                  <name>0</name>
81030                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
81031                  <value>#0</value>
81032                </enumeratedValue>
81033                <enumeratedValue>
81034                  <name>1</name>
81035                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
81036                  <value>#1</value>
81037                </enumeratedValue>
81038              </enumeratedValues>
81039            </field>
81040            <field>
81041              <name>PE</name>
81042              <description>Pull Enable</description>
81043              <bitOffset>1</bitOffset>
81044              <bitWidth>1</bitWidth>
81045              <access>read-write</access>
81046              <enumeratedValues>
81047                <enumeratedValue>
81048                  <name>0</name>
81049                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
81050                  <value>#0</value>
81051                </enumeratedValue>
81052                <enumeratedValue>
81053                  <name>1</name>
81054                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
81055                  <value>#1</value>
81056                </enumeratedValue>
81057              </enumeratedValues>
81058            </field>
81059            <field>
81060              <name>SRE</name>
81061              <description>Slew Rate Enable</description>
81062              <bitOffset>2</bitOffset>
81063              <bitWidth>1</bitWidth>
81064              <access>read-write</access>
81065              <enumeratedValues>
81066                <enumeratedValue>
81067                  <name>0</name>
81068                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
81069                  <value>#0</value>
81070                </enumeratedValue>
81071                <enumeratedValue>
81072                  <name>1</name>
81073                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
81074                  <value>#1</value>
81075                </enumeratedValue>
81076              </enumeratedValues>
81077            </field>
81078            <field>
81079              <name>PFE</name>
81080              <description>Passive Filter Enable</description>
81081              <bitOffset>4</bitOffset>
81082              <bitWidth>1</bitWidth>
81083              <access>read-only</access>
81084              <enumeratedValues>
81085                <enumeratedValue>
81086                  <name>0</name>
81087                  <description>Passive input filter is disabled on the corresponding pin.</description>
81088                  <value>#0</value>
81089                </enumeratedValue>
81090                <enumeratedValue>
81091                  <name>1</name>
81092                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
81093                  <value>#1</value>
81094                </enumeratedValue>
81095              </enumeratedValues>
81096            </field>
81097            <field>
81098              <name>ODE</name>
81099              <description>Open Drain Enable</description>
81100              <bitOffset>5</bitOffset>
81101              <bitWidth>1</bitWidth>
81102              <access>read-write</access>
81103              <enumeratedValues>
81104                <enumeratedValue>
81105                  <name>0</name>
81106                  <description>Open drain output is disabled on the corresponding pin.</description>
81107                  <value>#0</value>
81108                </enumeratedValue>
81109                <enumeratedValue>
81110                  <name>1</name>
81111                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
81112                  <value>#1</value>
81113                </enumeratedValue>
81114              </enumeratedValues>
81115            </field>
81116            <field>
81117              <name>DSE</name>
81118              <description>Drive Strength Enable</description>
81119              <bitOffset>6</bitOffset>
81120              <bitWidth>1</bitWidth>
81121              <access>read-only</access>
81122              <enumeratedValues>
81123                <enumeratedValue>
81124                  <name>0</name>
81125                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
81126                  <value>#0</value>
81127                </enumeratedValue>
81128                <enumeratedValue>
81129                  <name>1</name>
81130                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
81131                  <value>#1</value>
81132                </enumeratedValue>
81133              </enumeratedValues>
81134            </field>
81135            <field>
81136              <name>MUX</name>
81137              <description>Pin Mux Control</description>
81138              <bitOffset>8</bitOffset>
81139              <bitWidth>3</bitWidth>
81140              <access>read-write</access>
81141              <enumeratedValues>
81142                <enumeratedValue>
81143                  <name>000</name>
81144                  <description>Pin disabled (Alternative 0) (analog).</description>
81145                  <value>#000</value>
81146                </enumeratedValue>
81147                <enumeratedValue>
81148                  <name>001</name>
81149                  <description>Alternative 1 (GPIO).</description>
81150                  <value>#001</value>
81151                </enumeratedValue>
81152                <enumeratedValue>
81153                  <name>010</name>
81154                  <description>Alternative 2 (chip-specific).</description>
81155                  <value>#010</value>
81156                </enumeratedValue>
81157                <enumeratedValue>
81158                  <name>011</name>
81159                  <description>Alternative 3 (chip-specific).</description>
81160                  <value>#011</value>
81161                </enumeratedValue>
81162                <enumeratedValue>
81163                  <name>100</name>
81164                  <description>Alternative 4 (chip-specific).</description>
81165                  <value>#100</value>
81166                </enumeratedValue>
81167                <enumeratedValue>
81168                  <name>101</name>
81169                  <description>Alternative 5 (chip-specific).</description>
81170                  <value>#101</value>
81171                </enumeratedValue>
81172                <enumeratedValue>
81173                  <name>110</name>
81174                  <description>Alternative 6 (chip-specific).</description>
81175                  <value>#110</value>
81176                </enumeratedValue>
81177                <enumeratedValue>
81178                  <name>111</name>
81179                  <description>Alternative 7 (chip-specific).</description>
81180                  <value>#111</value>
81181                </enumeratedValue>
81182              </enumeratedValues>
81183            </field>
81184            <field>
81185              <name>LK</name>
81186              <description>Lock Register</description>
81187              <bitOffset>15</bitOffset>
81188              <bitWidth>1</bitWidth>
81189              <access>read-write</access>
81190              <enumeratedValues>
81191                <enumeratedValue>
81192                  <name>0</name>
81193                  <description>Pin Control Register fields [15:0] are not locked.</description>
81194                  <value>#0</value>
81195                </enumeratedValue>
81196                <enumeratedValue>
81197                  <name>1</name>
81198                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
81199                  <value>#1</value>
81200                </enumeratedValue>
81201              </enumeratedValues>
81202            </field>
81203            <field>
81204              <name>IRQC</name>
81205              <description>Interrupt Configuration</description>
81206              <bitOffset>16</bitOffset>
81207              <bitWidth>4</bitWidth>
81208              <access>read-write</access>
81209              <enumeratedValues>
81210                <enumeratedValue>
81211                  <name>0000</name>
81212                  <description>Interrupt Status Flag (ISF) is disabled.</description>
81213                  <value>#0000</value>
81214                </enumeratedValue>
81215                <enumeratedValue>
81216                  <name>0001</name>
81217                  <description>ISF flag and DMA request on rising edge.</description>
81218                  <value>#0001</value>
81219                </enumeratedValue>
81220                <enumeratedValue>
81221                  <name>0010</name>
81222                  <description>ISF flag and DMA request on falling edge.</description>
81223                  <value>#0010</value>
81224                </enumeratedValue>
81225                <enumeratedValue>
81226                  <name>0011</name>
81227                  <description>ISF flag and DMA request on either edge.</description>
81228                  <value>#0011</value>
81229                </enumeratedValue>
81230                <enumeratedValue>
81231                  <name>1000</name>
81232                  <description>ISF flag and Interrupt when logic 0.</description>
81233                  <value>#1000</value>
81234                </enumeratedValue>
81235                <enumeratedValue>
81236                  <name>1001</name>
81237                  <description>ISF flag and Interrupt on rising-edge.</description>
81238                  <value>#1001</value>
81239                </enumeratedValue>
81240                <enumeratedValue>
81241                  <name>1010</name>
81242                  <description>ISF flag and Interrupt on falling-edge.</description>
81243                  <value>#1010</value>
81244                </enumeratedValue>
81245                <enumeratedValue>
81246                  <name>1011</name>
81247                  <description>ISF flag and Interrupt on either edge.</description>
81248                  <value>#1011</value>
81249                </enumeratedValue>
81250                <enumeratedValue>
81251                  <name>1100</name>
81252                  <description>ISF flag and Interrupt when logic 1.</description>
81253                  <value>#1100</value>
81254                </enumeratedValue>
81255              </enumeratedValues>
81256            </field>
81257            <field>
81258              <name>ISF</name>
81259              <description>Interrupt Status Flag</description>
81260              <bitOffset>24</bitOffset>
81261              <bitWidth>1</bitWidth>
81262              <access>read-write</access>
81263              <enumeratedValues>
81264                <enumeratedValue>
81265                  <name>0</name>
81266                  <description>Configured interrupt is not detected.</description>
81267                  <value>#0</value>
81268                </enumeratedValue>
81269                <enumeratedValue>
81270                  <name>1</name>
81271                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
81272                  <value>#1</value>
81273                </enumeratedValue>
81274              </enumeratedValues>
81275            </field>
81276          </fields>
81277        </register>
81278        <register>
81279          <name>PCR18</name>
81280          <description>Pin Control Register n</description>
81281          <addressOffset>0x48</addressOffset>
81282          <size>32</size>
81283          <access>read-write</access>
81284          <resetValue>0</resetValue>
81285          <resetMask>0xFFFFFFFF</resetMask>
81286          <fields>
81287            <field>
81288              <name>PS</name>
81289              <description>Pull Select</description>
81290              <bitOffset>0</bitOffset>
81291              <bitWidth>1</bitWidth>
81292              <access>read-write</access>
81293              <enumeratedValues>
81294                <enumeratedValue>
81295                  <name>0</name>
81296                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
81297                  <value>#0</value>
81298                </enumeratedValue>
81299                <enumeratedValue>
81300                  <name>1</name>
81301                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
81302                  <value>#1</value>
81303                </enumeratedValue>
81304              </enumeratedValues>
81305            </field>
81306            <field>
81307              <name>PE</name>
81308              <description>Pull Enable</description>
81309              <bitOffset>1</bitOffset>
81310              <bitWidth>1</bitWidth>
81311              <access>read-write</access>
81312              <enumeratedValues>
81313                <enumeratedValue>
81314                  <name>0</name>
81315                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
81316                  <value>#0</value>
81317                </enumeratedValue>
81318                <enumeratedValue>
81319                  <name>1</name>
81320                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
81321                  <value>#1</value>
81322                </enumeratedValue>
81323              </enumeratedValues>
81324            </field>
81325            <field>
81326              <name>SRE</name>
81327              <description>Slew Rate Enable</description>
81328              <bitOffset>2</bitOffset>
81329              <bitWidth>1</bitWidth>
81330              <access>read-write</access>
81331              <enumeratedValues>
81332                <enumeratedValue>
81333                  <name>0</name>
81334                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
81335                  <value>#0</value>
81336                </enumeratedValue>
81337                <enumeratedValue>
81338                  <name>1</name>
81339                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
81340                  <value>#1</value>
81341                </enumeratedValue>
81342              </enumeratedValues>
81343            </field>
81344            <field>
81345              <name>PFE</name>
81346              <description>Passive Filter Enable</description>
81347              <bitOffset>4</bitOffset>
81348              <bitWidth>1</bitWidth>
81349              <access>read-only</access>
81350              <enumeratedValues>
81351                <enumeratedValue>
81352                  <name>0</name>
81353                  <description>Passive input filter is disabled on the corresponding pin.</description>
81354                  <value>#0</value>
81355                </enumeratedValue>
81356                <enumeratedValue>
81357                  <name>1</name>
81358                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
81359                  <value>#1</value>
81360                </enumeratedValue>
81361              </enumeratedValues>
81362            </field>
81363            <field>
81364              <name>ODE</name>
81365              <description>Open Drain Enable</description>
81366              <bitOffset>5</bitOffset>
81367              <bitWidth>1</bitWidth>
81368              <access>read-write</access>
81369              <enumeratedValues>
81370                <enumeratedValue>
81371                  <name>0</name>
81372                  <description>Open drain output is disabled on the corresponding pin.</description>
81373                  <value>#0</value>
81374                </enumeratedValue>
81375                <enumeratedValue>
81376                  <name>1</name>
81377                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
81378                  <value>#1</value>
81379                </enumeratedValue>
81380              </enumeratedValues>
81381            </field>
81382            <field>
81383              <name>DSE</name>
81384              <description>Drive Strength Enable</description>
81385              <bitOffset>6</bitOffset>
81386              <bitWidth>1</bitWidth>
81387              <access>read-only</access>
81388              <enumeratedValues>
81389                <enumeratedValue>
81390                  <name>0</name>
81391                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
81392                  <value>#0</value>
81393                </enumeratedValue>
81394                <enumeratedValue>
81395                  <name>1</name>
81396                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
81397                  <value>#1</value>
81398                </enumeratedValue>
81399              </enumeratedValues>
81400            </field>
81401            <field>
81402              <name>MUX</name>
81403              <description>Pin Mux Control</description>
81404              <bitOffset>8</bitOffset>
81405              <bitWidth>3</bitWidth>
81406              <access>read-write</access>
81407              <enumeratedValues>
81408                <enumeratedValue>
81409                  <name>000</name>
81410                  <description>Pin disabled (Alternative 0) (analog).</description>
81411                  <value>#000</value>
81412                </enumeratedValue>
81413                <enumeratedValue>
81414                  <name>001</name>
81415                  <description>Alternative 1 (GPIO).</description>
81416                  <value>#001</value>
81417                </enumeratedValue>
81418                <enumeratedValue>
81419                  <name>010</name>
81420                  <description>Alternative 2 (chip-specific).</description>
81421                  <value>#010</value>
81422                </enumeratedValue>
81423                <enumeratedValue>
81424                  <name>011</name>
81425                  <description>Alternative 3 (chip-specific).</description>
81426                  <value>#011</value>
81427                </enumeratedValue>
81428                <enumeratedValue>
81429                  <name>100</name>
81430                  <description>Alternative 4 (chip-specific).</description>
81431                  <value>#100</value>
81432                </enumeratedValue>
81433                <enumeratedValue>
81434                  <name>101</name>
81435                  <description>Alternative 5 (chip-specific).</description>
81436                  <value>#101</value>
81437                </enumeratedValue>
81438                <enumeratedValue>
81439                  <name>110</name>
81440                  <description>Alternative 6 (chip-specific).</description>
81441                  <value>#110</value>
81442                </enumeratedValue>
81443                <enumeratedValue>
81444                  <name>111</name>
81445                  <description>Alternative 7 (chip-specific).</description>
81446                  <value>#111</value>
81447                </enumeratedValue>
81448              </enumeratedValues>
81449            </field>
81450            <field>
81451              <name>LK</name>
81452              <description>Lock Register</description>
81453              <bitOffset>15</bitOffset>
81454              <bitWidth>1</bitWidth>
81455              <access>read-write</access>
81456              <enumeratedValues>
81457                <enumeratedValue>
81458                  <name>0</name>
81459                  <description>Pin Control Register fields [15:0] are not locked.</description>
81460                  <value>#0</value>
81461                </enumeratedValue>
81462                <enumeratedValue>
81463                  <name>1</name>
81464                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
81465                  <value>#1</value>
81466                </enumeratedValue>
81467              </enumeratedValues>
81468            </field>
81469            <field>
81470              <name>IRQC</name>
81471              <description>Interrupt Configuration</description>
81472              <bitOffset>16</bitOffset>
81473              <bitWidth>4</bitWidth>
81474              <access>read-write</access>
81475              <enumeratedValues>
81476                <enumeratedValue>
81477                  <name>0000</name>
81478                  <description>Interrupt Status Flag (ISF) is disabled.</description>
81479                  <value>#0000</value>
81480                </enumeratedValue>
81481                <enumeratedValue>
81482                  <name>0001</name>
81483                  <description>ISF flag and DMA request on rising edge.</description>
81484                  <value>#0001</value>
81485                </enumeratedValue>
81486                <enumeratedValue>
81487                  <name>0010</name>
81488                  <description>ISF flag and DMA request on falling edge.</description>
81489                  <value>#0010</value>
81490                </enumeratedValue>
81491                <enumeratedValue>
81492                  <name>0011</name>
81493                  <description>ISF flag and DMA request on either edge.</description>
81494                  <value>#0011</value>
81495                </enumeratedValue>
81496                <enumeratedValue>
81497                  <name>1000</name>
81498                  <description>ISF flag and Interrupt when logic 0.</description>
81499                  <value>#1000</value>
81500                </enumeratedValue>
81501                <enumeratedValue>
81502                  <name>1001</name>
81503                  <description>ISF flag and Interrupt on rising-edge.</description>
81504                  <value>#1001</value>
81505                </enumeratedValue>
81506                <enumeratedValue>
81507                  <name>1010</name>
81508                  <description>ISF flag and Interrupt on falling-edge.</description>
81509                  <value>#1010</value>
81510                </enumeratedValue>
81511                <enumeratedValue>
81512                  <name>1011</name>
81513                  <description>ISF flag and Interrupt on either edge.</description>
81514                  <value>#1011</value>
81515                </enumeratedValue>
81516                <enumeratedValue>
81517                  <name>1100</name>
81518                  <description>ISF flag and Interrupt when logic 1.</description>
81519                  <value>#1100</value>
81520                </enumeratedValue>
81521              </enumeratedValues>
81522            </field>
81523            <field>
81524              <name>ISF</name>
81525              <description>Interrupt Status Flag</description>
81526              <bitOffset>24</bitOffset>
81527              <bitWidth>1</bitWidth>
81528              <access>read-write</access>
81529              <enumeratedValues>
81530                <enumeratedValue>
81531                  <name>0</name>
81532                  <description>Configured interrupt is not detected.</description>
81533                  <value>#0</value>
81534                </enumeratedValue>
81535                <enumeratedValue>
81536                  <name>1</name>
81537                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
81538                  <value>#1</value>
81539                </enumeratedValue>
81540              </enumeratedValues>
81541            </field>
81542          </fields>
81543        </register>
81544        <register>
81545          <name>PCR19</name>
81546          <description>Pin Control Register n</description>
81547          <addressOffset>0x4C</addressOffset>
81548          <size>32</size>
81549          <access>read-write</access>
81550          <resetValue>0</resetValue>
81551          <resetMask>0xFFFFFFFF</resetMask>
81552          <fields>
81553            <field>
81554              <name>PS</name>
81555              <description>Pull Select</description>
81556              <bitOffset>0</bitOffset>
81557              <bitWidth>1</bitWidth>
81558              <access>read-write</access>
81559              <enumeratedValues>
81560                <enumeratedValue>
81561                  <name>0</name>
81562                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
81563                  <value>#0</value>
81564                </enumeratedValue>
81565                <enumeratedValue>
81566                  <name>1</name>
81567                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
81568                  <value>#1</value>
81569                </enumeratedValue>
81570              </enumeratedValues>
81571            </field>
81572            <field>
81573              <name>PE</name>
81574              <description>Pull Enable</description>
81575              <bitOffset>1</bitOffset>
81576              <bitWidth>1</bitWidth>
81577              <access>read-write</access>
81578              <enumeratedValues>
81579                <enumeratedValue>
81580                  <name>0</name>
81581                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
81582                  <value>#0</value>
81583                </enumeratedValue>
81584                <enumeratedValue>
81585                  <name>1</name>
81586                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
81587                  <value>#1</value>
81588                </enumeratedValue>
81589              </enumeratedValues>
81590            </field>
81591            <field>
81592              <name>SRE</name>
81593              <description>Slew Rate Enable</description>
81594              <bitOffset>2</bitOffset>
81595              <bitWidth>1</bitWidth>
81596              <access>read-write</access>
81597              <enumeratedValues>
81598                <enumeratedValue>
81599                  <name>0</name>
81600                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
81601                  <value>#0</value>
81602                </enumeratedValue>
81603                <enumeratedValue>
81604                  <name>1</name>
81605                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
81606                  <value>#1</value>
81607                </enumeratedValue>
81608              </enumeratedValues>
81609            </field>
81610            <field>
81611              <name>PFE</name>
81612              <description>Passive Filter Enable</description>
81613              <bitOffset>4</bitOffset>
81614              <bitWidth>1</bitWidth>
81615              <access>read-only</access>
81616              <enumeratedValues>
81617                <enumeratedValue>
81618                  <name>0</name>
81619                  <description>Passive input filter is disabled on the corresponding pin.</description>
81620                  <value>#0</value>
81621                </enumeratedValue>
81622                <enumeratedValue>
81623                  <name>1</name>
81624                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
81625                  <value>#1</value>
81626                </enumeratedValue>
81627              </enumeratedValues>
81628            </field>
81629            <field>
81630              <name>ODE</name>
81631              <description>Open Drain Enable</description>
81632              <bitOffset>5</bitOffset>
81633              <bitWidth>1</bitWidth>
81634              <access>read-write</access>
81635              <enumeratedValues>
81636                <enumeratedValue>
81637                  <name>0</name>
81638                  <description>Open drain output is disabled on the corresponding pin.</description>
81639                  <value>#0</value>
81640                </enumeratedValue>
81641                <enumeratedValue>
81642                  <name>1</name>
81643                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
81644                  <value>#1</value>
81645                </enumeratedValue>
81646              </enumeratedValues>
81647            </field>
81648            <field>
81649              <name>DSE</name>
81650              <description>Drive Strength Enable</description>
81651              <bitOffset>6</bitOffset>
81652              <bitWidth>1</bitWidth>
81653              <access>read-only</access>
81654              <enumeratedValues>
81655                <enumeratedValue>
81656                  <name>0</name>
81657                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
81658                  <value>#0</value>
81659                </enumeratedValue>
81660                <enumeratedValue>
81661                  <name>1</name>
81662                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
81663                  <value>#1</value>
81664                </enumeratedValue>
81665              </enumeratedValues>
81666            </field>
81667            <field>
81668              <name>MUX</name>
81669              <description>Pin Mux Control</description>
81670              <bitOffset>8</bitOffset>
81671              <bitWidth>3</bitWidth>
81672              <access>read-write</access>
81673              <enumeratedValues>
81674                <enumeratedValue>
81675                  <name>000</name>
81676                  <description>Pin disabled (Alternative 0) (analog).</description>
81677                  <value>#000</value>
81678                </enumeratedValue>
81679                <enumeratedValue>
81680                  <name>001</name>
81681                  <description>Alternative 1 (GPIO).</description>
81682                  <value>#001</value>
81683                </enumeratedValue>
81684                <enumeratedValue>
81685                  <name>010</name>
81686                  <description>Alternative 2 (chip-specific).</description>
81687                  <value>#010</value>
81688                </enumeratedValue>
81689                <enumeratedValue>
81690                  <name>011</name>
81691                  <description>Alternative 3 (chip-specific).</description>
81692                  <value>#011</value>
81693                </enumeratedValue>
81694                <enumeratedValue>
81695                  <name>100</name>
81696                  <description>Alternative 4 (chip-specific).</description>
81697                  <value>#100</value>
81698                </enumeratedValue>
81699                <enumeratedValue>
81700                  <name>101</name>
81701                  <description>Alternative 5 (chip-specific).</description>
81702                  <value>#101</value>
81703                </enumeratedValue>
81704                <enumeratedValue>
81705                  <name>110</name>
81706                  <description>Alternative 6 (chip-specific).</description>
81707                  <value>#110</value>
81708                </enumeratedValue>
81709                <enumeratedValue>
81710                  <name>111</name>
81711                  <description>Alternative 7 (chip-specific).</description>
81712                  <value>#111</value>
81713                </enumeratedValue>
81714              </enumeratedValues>
81715            </field>
81716            <field>
81717              <name>LK</name>
81718              <description>Lock Register</description>
81719              <bitOffset>15</bitOffset>
81720              <bitWidth>1</bitWidth>
81721              <access>read-write</access>
81722              <enumeratedValues>
81723                <enumeratedValue>
81724                  <name>0</name>
81725                  <description>Pin Control Register fields [15:0] are not locked.</description>
81726                  <value>#0</value>
81727                </enumeratedValue>
81728                <enumeratedValue>
81729                  <name>1</name>
81730                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
81731                  <value>#1</value>
81732                </enumeratedValue>
81733              </enumeratedValues>
81734            </field>
81735            <field>
81736              <name>IRQC</name>
81737              <description>Interrupt Configuration</description>
81738              <bitOffset>16</bitOffset>
81739              <bitWidth>4</bitWidth>
81740              <access>read-write</access>
81741              <enumeratedValues>
81742                <enumeratedValue>
81743                  <name>0000</name>
81744                  <description>Interrupt Status Flag (ISF) is disabled.</description>
81745                  <value>#0000</value>
81746                </enumeratedValue>
81747                <enumeratedValue>
81748                  <name>0001</name>
81749                  <description>ISF flag and DMA request on rising edge.</description>
81750                  <value>#0001</value>
81751                </enumeratedValue>
81752                <enumeratedValue>
81753                  <name>0010</name>
81754                  <description>ISF flag and DMA request on falling edge.</description>
81755                  <value>#0010</value>
81756                </enumeratedValue>
81757                <enumeratedValue>
81758                  <name>0011</name>
81759                  <description>ISF flag and DMA request on either edge.</description>
81760                  <value>#0011</value>
81761                </enumeratedValue>
81762                <enumeratedValue>
81763                  <name>1000</name>
81764                  <description>ISF flag and Interrupt when logic 0.</description>
81765                  <value>#1000</value>
81766                </enumeratedValue>
81767                <enumeratedValue>
81768                  <name>1001</name>
81769                  <description>ISF flag and Interrupt on rising-edge.</description>
81770                  <value>#1001</value>
81771                </enumeratedValue>
81772                <enumeratedValue>
81773                  <name>1010</name>
81774                  <description>ISF flag and Interrupt on falling-edge.</description>
81775                  <value>#1010</value>
81776                </enumeratedValue>
81777                <enumeratedValue>
81778                  <name>1011</name>
81779                  <description>ISF flag and Interrupt on either edge.</description>
81780                  <value>#1011</value>
81781                </enumeratedValue>
81782                <enumeratedValue>
81783                  <name>1100</name>
81784                  <description>ISF flag and Interrupt when logic 1.</description>
81785                  <value>#1100</value>
81786                </enumeratedValue>
81787              </enumeratedValues>
81788            </field>
81789            <field>
81790              <name>ISF</name>
81791              <description>Interrupt Status Flag</description>
81792              <bitOffset>24</bitOffset>
81793              <bitWidth>1</bitWidth>
81794              <access>read-write</access>
81795              <enumeratedValues>
81796                <enumeratedValue>
81797                  <name>0</name>
81798                  <description>Configured interrupt is not detected.</description>
81799                  <value>#0</value>
81800                </enumeratedValue>
81801                <enumeratedValue>
81802                  <name>1</name>
81803                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
81804                  <value>#1</value>
81805                </enumeratedValue>
81806              </enumeratedValues>
81807            </field>
81808          </fields>
81809        </register>
81810        <register>
81811          <name>PCR20</name>
81812          <description>Pin Control Register n</description>
81813          <addressOffset>0x50</addressOffset>
81814          <size>32</size>
81815          <access>read-write</access>
81816          <resetValue>0</resetValue>
81817          <resetMask>0xFFFFFFFF</resetMask>
81818          <fields>
81819            <field>
81820              <name>PS</name>
81821              <description>Pull Select</description>
81822              <bitOffset>0</bitOffset>
81823              <bitWidth>1</bitWidth>
81824              <access>read-only</access>
81825              <enumeratedValues>
81826                <enumeratedValue>
81827                  <name>0</name>
81828                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
81829                  <value>#0</value>
81830                </enumeratedValue>
81831                <enumeratedValue>
81832                  <name>1</name>
81833                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
81834                  <value>#1</value>
81835                </enumeratedValue>
81836              </enumeratedValues>
81837            </field>
81838            <field>
81839              <name>PE</name>
81840              <description>Pull Enable</description>
81841              <bitOffset>1</bitOffset>
81842              <bitWidth>1</bitWidth>
81843              <access>read-only</access>
81844              <enumeratedValues>
81845                <enumeratedValue>
81846                  <name>0</name>
81847                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
81848                  <value>#0</value>
81849                </enumeratedValue>
81850                <enumeratedValue>
81851                  <name>1</name>
81852                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
81853                  <value>#1</value>
81854                </enumeratedValue>
81855              </enumeratedValues>
81856            </field>
81857            <field>
81858              <name>SRE</name>
81859              <description>Slew Rate Enable</description>
81860              <bitOffset>2</bitOffset>
81861              <bitWidth>1</bitWidth>
81862              <access>read-only</access>
81863              <enumeratedValues>
81864                <enumeratedValue>
81865                  <name>0</name>
81866                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
81867                  <value>#0</value>
81868                </enumeratedValue>
81869                <enumeratedValue>
81870                  <name>1</name>
81871                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
81872                  <value>#1</value>
81873                </enumeratedValue>
81874              </enumeratedValues>
81875            </field>
81876            <field>
81877              <name>PFE</name>
81878              <description>Passive Filter Enable</description>
81879              <bitOffset>4</bitOffset>
81880              <bitWidth>1</bitWidth>
81881              <access>read-only</access>
81882              <enumeratedValues>
81883                <enumeratedValue>
81884                  <name>0</name>
81885                  <description>Passive input filter is disabled on the corresponding pin.</description>
81886                  <value>#0</value>
81887                </enumeratedValue>
81888                <enumeratedValue>
81889                  <name>1</name>
81890                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
81891                  <value>#1</value>
81892                </enumeratedValue>
81893              </enumeratedValues>
81894            </field>
81895            <field>
81896              <name>ODE</name>
81897              <description>Open Drain Enable</description>
81898              <bitOffset>5</bitOffset>
81899              <bitWidth>1</bitWidth>
81900              <access>read-only</access>
81901              <enumeratedValues>
81902                <enumeratedValue>
81903                  <name>0</name>
81904                  <description>Open drain output is disabled on the corresponding pin.</description>
81905                  <value>#0</value>
81906                </enumeratedValue>
81907                <enumeratedValue>
81908                  <name>1</name>
81909                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
81910                  <value>#1</value>
81911                </enumeratedValue>
81912              </enumeratedValues>
81913            </field>
81914            <field>
81915              <name>DSE</name>
81916              <description>Drive Strength Enable</description>
81917              <bitOffset>6</bitOffset>
81918              <bitWidth>1</bitWidth>
81919              <access>read-only</access>
81920              <enumeratedValues>
81921                <enumeratedValue>
81922                  <name>0</name>
81923                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
81924                  <value>#0</value>
81925                </enumeratedValue>
81926                <enumeratedValue>
81927                  <name>1</name>
81928                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
81929                  <value>#1</value>
81930                </enumeratedValue>
81931              </enumeratedValues>
81932            </field>
81933            <field>
81934              <name>MUX</name>
81935              <description>Pin Mux Control</description>
81936              <bitOffset>8</bitOffset>
81937              <bitWidth>3</bitWidth>
81938              <access>read-write</access>
81939              <enumeratedValues>
81940                <enumeratedValue>
81941                  <name>000</name>
81942                  <description>Pin disabled (Alternative 0) (analog).</description>
81943                  <value>#000</value>
81944                </enumeratedValue>
81945                <enumeratedValue>
81946                  <name>001</name>
81947                  <description>Alternative 1 (GPIO).</description>
81948                  <value>#001</value>
81949                </enumeratedValue>
81950                <enumeratedValue>
81951                  <name>010</name>
81952                  <description>Alternative 2 (chip-specific).</description>
81953                  <value>#010</value>
81954                </enumeratedValue>
81955                <enumeratedValue>
81956                  <name>011</name>
81957                  <description>Alternative 3 (chip-specific).</description>
81958                  <value>#011</value>
81959                </enumeratedValue>
81960                <enumeratedValue>
81961                  <name>100</name>
81962                  <description>Alternative 4 (chip-specific).</description>
81963                  <value>#100</value>
81964                </enumeratedValue>
81965                <enumeratedValue>
81966                  <name>101</name>
81967                  <description>Alternative 5 (chip-specific).</description>
81968                  <value>#101</value>
81969                </enumeratedValue>
81970                <enumeratedValue>
81971                  <name>110</name>
81972                  <description>Alternative 6 (chip-specific).</description>
81973                  <value>#110</value>
81974                </enumeratedValue>
81975                <enumeratedValue>
81976                  <name>111</name>
81977                  <description>Alternative 7 (chip-specific).</description>
81978                  <value>#111</value>
81979                </enumeratedValue>
81980              </enumeratedValues>
81981            </field>
81982            <field>
81983              <name>LK</name>
81984              <description>Lock Register</description>
81985              <bitOffset>15</bitOffset>
81986              <bitWidth>1</bitWidth>
81987              <access>read-write</access>
81988              <enumeratedValues>
81989                <enumeratedValue>
81990                  <name>0</name>
81991                  <description>Pin Control Register fields [15:0] are not locked.</description>
81992                  <value>#0</value>
81993                </enumeratedValue>
81994                <enumeratedValue>
81995                  <name>1</name>
81996                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
81997                  <value>#1</value>
81998                </enumeratedValue>
81999              </enumeratedValues>
82000            </field>
82001            <field>
82002              <name>IRQC</name>
82003              <description>Interrupt Configuration</description>
82004              <bitOffset>16</bitOffset>
82005              <bitWidth>4</bitWidth>
82006              <access>read-write</access>
82007              <enumeratedValues>
82008                <enumeratedValue>
82009                  <name>0000</name>
82010                  <description>Interrupt Status Flag (ISF) is disabled.</description>
82011                  <value>#0000</value>
82012                </enumeratedValue>
82013                <enumeratedValue>
82014                  <name>0001</name>
82015                  <description>ISF flag and DMA request on rising edge.</description>
82016                  <value>#0001</value>
82017                </enumeratedValue>
82018                <enumeratedValue>
82019                  <name>0010</name>
82020                  <description>ISF flag and DMA request on falling edge.</description>
82021                  <value>#0010</value>
82022                </enumeratedValue>
82023                <enumeratedValue>
82024                  <name>0011</name>
82025                  <description>ISF flag and DMA request on either edge.</description>
82026                  <value>#0011</value>
82027                </enumeratedValue>
82028                <enumeratedValue>
82029                  <name>1000</name>
82030                  <description>ISF flag and Interrupt when logic 0.</description>
82031                  <value>#1000</value>
82032                </enumeratedValue>
82033                <enumeratedValue>
82034                  <name>1001</name>
82035                  <description>ISF flag and Interrupt on rising-edge.</description>
82036                  <value>#1001</value>
82037                </enumeratedValue>
82038                <enumeratedValue>
82039                  <name>1010</name>
82040                  <description>ISF flag and Interrupt on falling-edge.</description>
82041                  <value>#1010</value>
82042                </enumeratedValue>
82043                <enumeratedValue>
82044                  <name>1011</name>
82045                  <description>ISF flag and Interrupt on either edge.</description>
82046                  <value>#1011</value>
82047                </enumeratedValue>
82048                <enumeratedValue>
82049                  <name>1100</name>
82050                  <description>ISF flag and Interrupt when logic 1.</description>
82051                  <value>#1100</value>
82052                </enumeratedValue>
82053              </enumeratedValues>
82054            </field>
82055            <field>
82056              <name>ISF</name>
82057              <description>Interrupt Status Flag</description>
82058              <bitOffset>24</bitOffset>
82059              <bitWidth>1</bitWidth>
82060              <access>read-write</access>
82061              <enumeratedValues>
82062                <enumeratedValue>
82063                  <name>0</name>
82064                  <description>Configured interrupt is not detected.</description>
82065                  <value>#0</value>
82066                </enumeratedValue>
82067                <enumeratedValue>
82068                  <name>1</name>
82069                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
82070                  <value>#1</value>
82071                </enumeratedValue>
82072              </enumeratedValues>
82073            </field>
82074          </fields>
82075        </register>
82076        <register>
82077          <name>PCR21</name>
82078          <description>Pin Control Register n</description>
82079          <addressOffset>0x54</addressOffset>
82080          <size>32</size>
82081          <access>read-write</access>
82082          <resetValue>0</resetValue>
82083          <resetMask>0xFFFFFFFF</resetMask>
82084          <fields>
82085            <field>
82086              <name>PS</name>
82087              <description>Pull Select</description>
82088              <bitOffset>0</bitOffset>
82089              <bitWidth>1</bitWidth>
82090              <access>read-only</access>
82091              <enumeratedValues>
82092                <enumeratedValue>
82093                  <name>0</name>
82094                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
82095                  <value>#0</value>
82096                </enumeratedValue>
82097                <enumeratedValue>
82098                  <name>1</name>
82099                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
82100                  <value>#1</value>
82101                </enumeratedValue>
82102              </enumeratedValues>
82103            </field>
82104            <field>
82105              <name>PE</name>
82106              <description>Pull Enable</description>
82107              <bitOffset>1</bitOffset>
82108              <bitWidth>1</bitWidth>
82109              <access>read-only</access>
82110              <enumeratedValues>
82111                <enumeratedValue>
82112                  <name>0</name>
82113                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
82114                  <value>#0</value>
82115                </enumeratedValue>
82116                <enumeratedValue>
82117                  <name>1</name>
82118                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
82119                  <value>#1</value>
82120                </enumeratedValue>
82121              </enumeratedValues>
82122            </field>
82123            <field>
82124              <name>SRE</name>
82125              <description>Slew Rate Enable</description>
82126              <bitOffset>2</bitOffset>
82127              <bitWidth>1</bitWidth>
82128              <access>read-only</access>
82129              <enumeratedValues>
82130                <enumeratedValue>
82131                  <name>0</name>
82132                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
82133                  <value>#0</value>
82134                </enumeratedValue>
82135                <enumeratedValue>
82136                  <name>1</name>
82137                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
82138                  <value>#1</value>
82139                </enumeratedValue>
82140              </enumeratedValues>
82141            </field>
82142            <field>
82143              <name>PFE</name>
82144              <description>Passive Filter Enable</description>
82145              <bitOffset>4</bitOffset>
82146              <bitWidth>1</bitWidth>
82147              <access>read-only</access>
82148              <enumeratedValues>
82149                <enumeratedValue>
82150                  <name>0</name>
82151                  <description>Passive input filter is disabled on the corresponding pin.</description>
82152                  <value>#0</value>
82153                </enumeratedValue>
82154                <enumeratedValue>
82155                  <name>1</name>
82156                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
82157                  <value>#1</value>
82158                </enumeratedValue>
82159              </enumeratedValues>
82160            </field>
82161            <field>
82162              <name>ODE</name>
82163              <description>Open Drain Enable</description>
82164              <bitOffset>5</bitOffset>
82165              <bitWidth>1</bitWidth>
82166              <access>read-only</access>
82167              <enumeratedValues>
82168                <enumeratedValue>
82169                  <name>0</name>
82170                  <description>Open drain output is disabled on the corresponding pin.</description>
82171                  <value>#0</value>
82172                </enumeratedValue>
82173                <enumeratedValue>
82174                  <name>1</name>
82175                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
82176                  <value>#1</value>
82177                </enumeratedValue>
82178              </enumeratedValues>
82179            </field>
82180            <field>
82181              <name>DSE</name>
82182              <description>Drive Strength Enable</description>
82183              <bitOffset>6</bitOffset>
82184              <bitWidth>1</bitWidth>
82185              <access>read-only</access>
82186              <enumeratedValues>
82187                <enumeratedValue>
82188                  <name>0</name>
82189                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
82190                  <value>#0</value>
82191                </enumeratedValue>
82192                <enumeratedValue>
82193                  <name>1</name>
82194                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
82195                  <value>#1</value>
82196                </enumeratedValue>
82197              </enumeratedValues>
82198            </field>
82199            <field>
82200              <name>MUX</name>
82201              <description>Pin Mux Control</description>
82202              <bitOffset>8</bitOffset>
82203              <bitWidth>3</bitWidth>
82204              <access>read-write</access>
82205              <enumeratedValues>
82206                <enumeratedValue>
82207                  <name>000</name>
82208                  <description>Pin disabled (Alternative 0) (analog).</description>
82209                  <value>#000</value>
82210                </enumeratedValue>
82211                <enumeratedValue>
82212                  <name>001</name>
82213                  <description>Alternative 1 (GPIO).</description>
82214                  <value>#001</value>
82215                </enumeratedValue>
82216                <enumeratedValue>
82217                  <name>010</name>
82218                  <description>Alternative 2 (chip-specific).</description>
82219                  <value>#010</value>
82220                </enumeratedValue>
82221                <enumeratedValue>
82222                  <name>011</name>
82223                  <description>Alternative 3 (chip-specific).</description>
82224                  <value>#011</value>
82225                </enumeratedValue>
82226                <enumeratedValue>
82227                  <name>100</name>
82228                  <description>Alternative 4 (chip-specific).</description>
82229                  <value>#100</value>
82230                </enumeratedValue>
82231                <enumeratedValue>
82232                  <name>101</name>
82233                  <description>Alternative 5 (chip-specific).</description>
82234                  <value>#101</value>
82235                </enumeratedValue>
82236                <enumeratedValue>
82237                  <name>110</name>
82238                  <description>Alternative 6 (chip-specific).</description>
82239                  <value>#110</value>
82240                </enumeratedValue>
82241                <enumeratedValue>
82242                  <name>111</name>
82243                  <description>Alternative 7 (chip-specific).</description>
82244                  <value>#111</value>
82245                </enumeratedValue>
82246              </enumeratedValues>
82247            </field>
82248            <field>
82249              <name>LK</name>
82250              <description>Lock Register</description>
82251              <bitOffset>15</bitOffset>
82252              <bitWidth>1</bitWidth>
82253              <access>read-write</access>
82254              <enumeratedValues>
82255                <enumeratedValue>
82256                  <name>0</name>
82257                  <description>Pin Control Register fields [15:0] are not locked.</description>
82258                  <value>#0</value>
82259                </enumeratedValue>
82260                <enumeratedValue>
82261                  <name>1</name>
82262                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
82263                  <value>#1</value>
82264                </enumeratedValue>
82265              </enumeratedValues>
82266            </field>
82267            <field>
82268              <name>IRQC</name>
82269              <description>Interrupt Configuration</description>
82270              <bitOffset>16</bitOffset>
82271              <bitWidth>4</bitWidth>
82272              <access>read-write</access>
82273              <enumeratedValues>
82274                <enumeratedValue>
82275                  <name>0000</name>
82276                  <description>Interrupt Status Flag (ISF) is disabled.</description>
82277                  <value>#0000</value>
82278                </enumeratedValue>
82279                <enumeratedValue>
82280                  <name>0001</name>
82281                  <description>ISF flag and DMA request on rising edge.</description>
82282                  <value>#0001</value>
82283                </enumeratedValue>
82284                <enumeratedValue>
82285                  <name>0010</name>
82286                  <description>ISF flag and DMA request on falling edge.</description>
82287                  <value>#0010</value>
82288                </enumeratedValue>
82289                <enumeratedValue>
82290                  <name>0011</name>
82291                  <description>ISF flag and DMA request on either edge.</description>
82292                  <value>#0011</value>
82293                </enumeratedValue>
82294                <enumeratedValue>
82295                  <name>1000</name>
82296                  <description>ISF flag and Interrupt when logic 0.</description>
82297                  <value>#1000</value>
82298                </enumeratedValue>
82299                <enumeratedValue>
82300                  <name>1001</name>
82301                  <description>ISF flag and Interrupt on rising-edge.</description>
82302                  <value>#1001</value>
82303                </enumeratedValue>
82304                <enumeratedValue>
82305                  <name>1010</name>
82306                  <description>ISF flag and Interrupt on falling-edge.</description>
82307                  <value>#1010</value>
82308                </enumeratedValue>
82309                <enumeratedValue>
82310                  <name>1011</name>
82311                  <description>ISF flag and Interrupt on either edge.</description>
82312                  <value>#1011</value>
82313                </enumeratedValue>
82314                <enumeratedValue>
82315                  <name>1100</name>
82316                  <description>ISF flag and Interrupt when logic 1.</description>
82317                  <value>#1100</value>
82318                </enumeratedValue>
82319              </enumeratedValues>
82320            </field>
82321            <field>
82322              <name>ISF</name>
82323              <description>Interrupt Status Flag</description>
82324              <bitOffset>24</bitOffset>
82325              <bitWidth>1</bitWidth>
82326              <access>read-write</access>
82327              <enumeratedValues>
82328                <enumeratedValue>
82329                  <name>0</name>
82330                  <description>Configured interrupt is not detected.</description>
82331                  <value>#0</value>
82332                </enumeratedValue>
82333                <enumeratedValue>
82334                  <name>1</name>
82335                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
82336                  <value>#1</value>
82337                </enumeratedValue>
82338              </enumeratedValues>
82339            </field>
82340          </fields>
82341        </register>
82342        <register>
82343          <name>PCR22</name>
82344          <description>Pin Control Register n</description>
82345          <addressOffset>0x58</addressOffset>
82346          <size>32</size>
82347          <access>read-write</access>
82348          <resetValue>0</resetValue>
82349          <resetMask>0xFFFFFFFF</resetMask>
82350          <fields>
82351            <field>
82352              <name>PS</name>
82353              <description>Pull Select</description>
82354              <bitOffset>0</bitOffset>
82355              <bitWidth>1</bitWidth>
82356              <access>read-only</access>
82357              <enumeratedValues>
82358                <enumeratedValue>
82359                  <name>0</name>
82360                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
82361                  <value>#0</value>
82362                </enumeratedValue>
82363                <enumeratedValue>
82364                  <name>1</name>
82365                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
82366                  <value>#1</value>
82367                </enumeratedValue>
82368              </enumeratedValues>
82369            </field>
82370            <field>
82371              <name>PE</name>
82372              <description>Pull Enable</description>
82373              <bitOffset>1</bitOffset>
82374              <bitWidth>1</bitWidth>
82375              <access>read-only</access>
82376              <enumeratedValues>
82377                <enumeratedValue>
82378                  <name>0</name>
82379                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
82380                  <value>#0</value>
82381                </enumeratedValue>
82382                <enumeratedValue>
82383                  <name>1</name>
82384                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
82385                  <value>#1</value>
82386                </enumeratedValue>
82387              </enumeratedValues>
82388            </field>
82389            <field>
82390              <name>SRE</name>
82391              <description>Slew Rate Enable</description>
82392              <bitOffset>2</bitOffset>
82393              <bitWidth>1</bitWidth>
82394              <access>read-only</access>
82395              <enumeratedValues>
82396                <enumeratedValue>
82397                  <name>0</name>
82398                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
82399                  <value>#0</value>
82400                </enumeratedValue>
82401                <enumeratedValue>
82402                  <name>1</name>
82403                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
82404                  <value>#1</value>
82405                </enumeratedValue>
82406              </enumeratedValues>
82407            </field>
82408            <field>
82409              <name>PFE</name>
82410              <description>Passive Filter Enable</description>
82411              <bitOffset>4</bitOffset>
82412              <bitWidth>1</bitWidth>
82413              <access>read-only</access>
82414              <enumeratedValues>
82415                <enumeratedValue>
82416                  <name>0</name>
82417                  <description>Passive input filter is disabled on the corresponding pin.</description>
82418                  <value>#0</value>
82419                </enumeratedValue>
82420                <enumeratedValue>
82421                  <name>1</name>
82422                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
82423                  <value>#1</value>
82424                </enumeratedValue>
82425              </enumeratedValues>
82426            </field>
82427            <field>
82428              <name>ODE</name>
82429              <description>Open Drain Enable</description>
82430              <bitOffset>5</bitOffset>
82431              <bitWidth>1</bitWidth>
82432              <access>read-only</access>
82433              <enumeratedValues>
82434                <enumeratedValue>
82435                  <name>0</name>
82436                  <description>Open drain output is disabled on the corresponding pin.</description>
82437                  <value>#0</value>
82438                </enumeratedValue>
82439                <enumeratedValue>
82440                  <name>1</name>
82441                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
82442                  <value>#1</value>
82443                </enumeratedValue>
82444              </enumeratedValues>
82445            </field>
82446            <field>
82447              <name>DSE</name>
82448              <description>Drive Strength Enable</description>
82449              <bitOffset>6</bitOffset>
82450              <bitWidth>1</bitWidth>
82451              <access>read-only</access>
82452              <enumeratedValues>
82453                <enumeratedValue>
82454                  <name>0</name>
82455                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
82456                  <value>#0</value>
82457                </enumeratedValue>
82458                <enumeratedValue>
82459                  <name>1</name>
82460                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
82461                  <value>#1</value>
82462                </enumeratedValue>
82463              </enumeratedValues>
82464            </field>
82465            <field>
82466              <name>MUX</name>
82467              <description>Pin Mux Control</description>
82468              <bitOffset>8</bitOffset>
82469              <bitWidth>3</bitWidth>
82470              <access>read-write</access>
82471              <enumeratedValues>
82472                <enumeratedValue>
82473                  <name>000</name>
82474                  <description>Pin disabled (Alternative 0) (analog).</description>
82475                  <value>#000</value>
82476                </enumeratedValue>
82477                <enumeratedValue>
82478                  <name>001</name>
82479                  <description>Alternative 1 (GPIO).</description>
82480                  <value>#001</value>
82481                </enumeratedValue>
82482                <enumeratedValue>
82483                  <name>010</name>
82484                  <description>Alternative 2 (chip-specific).</description>
82485                  <value>#010</value>
82486                </enumeratedValue>
82487                <enumeratedValue>
82488                  <name>011</name>
82489                  <description>Alternative 3 (chip-specific).</description>
82490                  <value>#011</value>
82491                </enumeratedValue>
82492                <enumeratedValue>
82493                  <name>100</name>
82494                  <description>Alternative 4 (chip-specific).</description>
82495                  <value>#100</value>
82496                </enumeratedValue>
82497                <enumeratedValue>
82498                  <name>101</name>
82499                  <description>Alternative 5 (chip-specific).</description>
82500                  <value>#101</value>
82501                </enumeratedValue>
82502                <enumeratedValue>
82503                  <name>110</name>
82504                  <description>Alternative 6 (chip-specific).</description>
82505                  <value>#110</value>
82506                </enumeratedValue>
82507                <enumeratedValue>
82508                  <name>111</name>
82509                  <description>Alternative 7 (chip-specific).</description>
82510                  <value>#111</value>
82511                </enumeratedValue>
82512              </enumeratedValues>
82513            </field>
82514            <field>
82515              <name>LK</name>
82516              <description>Lock Register</description>
82517              <bitOffset>15</bitOffset>
82518              <bitWidth>1</bitWidth>
82519              <access>read-write</access>
82520              <enumeratedValues>
82521                <enumeratedValue>
82522                  <name>0</name>
82523                  <description>Pin Control Register fields [15:0] are not locked.</description>
82524                  <value>#0</value>
82525                </enumeratedValue>
82526                <enumeratedValue>
82527                  <name>1</name>
82528                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
82529                  <value>#1</value>
82530                </enumeratedValue>
82531              </enumeratedValues>
82532            </field>
82533            <field>
82534              <name>IRQC</name>
82535              <description>Interrupt Configuration</description>
82536              <bitOffset>16</bitOffset>
82537              <bitWidth>4</bitWidth>
82538              <access>read-write</access>
82539              <enumeratedValues>
82540                <enumeratedValue>
82541                  <name>0000</name>
82542                  <description>Interrupt Status Flag (ISF) is disabled.</description>
82543                  <value>#0000</value>
82544                </enumeratedValue>
82545                <enumeratedValue>
82546                  <name>0001</name>
82547                  <description>ISF flag and DMA request on rising edge.</description>
82548                  <value>#0001</value>
82549                </enumeratedValue>
82550                <enumeratedValue>
82551                  <name>0010</name>
82552                  <description>ISF flag and DMA request on falling edge.</description>
82553                  <value>#0010</value>
82554                </enumeratedValue>
82555                <enumeratedValue>
82556                  <name>0011</name>
82557                  <description>ISF flag and DMA request on either edge.</description>
82558                  <value>#0011</value>
82559                </enumeratedValue>
82560                <enumeratedValue>
82561                  <name>1000</name>
82562                  <description>ISF flag and Interrupt when logic 0.</description>
82563                  <value>#1000</value>
82564                </enumeratedValue>
82565                <enumeratedValue>
82566                  <name>1001</name>
82567                  <description>ISF flag and Interrupt on rising-edge.</description>
82568                  <value>#1001</value>
82569                </enumeratedValue>
82570                <enumeratedValue>
82571                  <name>1010</name>
82572                  <description>ISF flag and Interrupt on falling-edge.</description>
82573                  <value>#1010</value>
82574                </enumeratedValue>
82575                <enumeratedValue>
82576                  <name>1011</name>
82577                  <description>ISF flag and Interrupt on either edge.</description>
82578                  <value>#1011</value>
82579                </enumeratedValue>
82580                <enumeratedValue>
82581                  <name>1100</name>
82582                  <description>ISF flag and Interrupt when logic 1.</description>
82583                  <value>#1100</value>
82584                </enumeratedValue>
82585              </enumeratedValues>
82586            </field>
82587            <field>
82588              <name>ISF</name>
82589              <description>Interrupt Status Flag</description>
82590              <bitOffset>24</bitOffset>
82591              <bitWidth>1</bitWidth>
82592              <access>read-write</access>
82593              <enumeratedValues>
82594                <enumeratedValue>
82595                  <name>0</name>
82596                  <description>Configured interrupt is not detected.</description>
82597                  <value>#0</value>
82598                </enumeratedValue>
82599                <enumeratedValue>
82600                  <name>1</name>
82601                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
82602                  <value>#1</value>
82603                </enumeratedValue>
82604              </enumeratedValues>
82605            </field>
82606          </fields>
82607        </register>
82608        <register>
82609          <name>PCR23</name>
82610          <description>Pin Control Register n</description>
82611          <addressOffset>0x5C</addressOffset>
82612          <size>32</size>
82613          <access>read-write</access>
82614          <resetValue>0</resetValue>
82615          <resetMask>0xFFFFFFFF</resetMask>
82616          <fields>
82617            <field>
82618              <name>PS</name>
82619              <description>Pull Select</description>
82620              <bitOffset>0</bitOffset>
82621              <bitWidth>1</bitWidth>
82622              <access>read-only</access>
82623              <enumeratedValues>
82624                <enumeratedValue>
82625                  <name>0</name>
82626                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
82627                  <value>#0</value>
82628                </enumeratedValue>
82629                <enumeratedValue>
82630                  <name>1</name>
82631                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
82632                  <value>#1</value>
82633                </enumeratedValue>
82634              </enumeratedValues>
82635            </field>
82636            <field>
82637              <name>PE</name>
82638              <description>Pull Enable</description>
82639              <bitOffset>1</bitOffset>
82640              <bitWidth>1</bitWidth>
82641              <access>read-only</access>
82642              <enumeratedValues>
82643                <enumeratedValue>
82644                  <name>0</name>
82645                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
82646                  <value>#0</value>
82647                </enumeratedValue>
82648                <enumeratedValue>
82649                  <name>1</name>
82650                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
82651                  <value>#1</value>
82652                </enumeratedValue>
82653              </enumeratedValues>
82654            </field>
82655            <field>
82656              <name>SRE</name>
82657              <description>Slew Rate Enable</description>
82658              <bitOffset>2</bitOffset>
82659              <bitWidth>1</bitWidth>
82660              <access>read-only</access>
82661              <enumeratedValues>
82662                <enumeratedValue>
82663                  <name>0</name>
82664                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
82665                  <value>#0</value>
82666                </enumeratedValue>
82667                <enumeratedValue>
82668                  <name>1</name>
82669                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
82670                  <value>#1</value>
82671                </enumeratedValue>
82672              </enumeratedValues>
82673            </field>
82674            <field>
82675              <name>PFE</name>
82676              <description>Passive Filter Enable</description>
82677              <bitOffset>4</bitOffset>
82678              <bitWidth>1</bitWidth>
82679              <access>read-only</access>
82680              <enumeratedValues>
82681                <enumeratedValue>
82682                  <name>0</name>
82683                  <description>Passive input filter is disabled on the corresponding pin.</description>
82684                  <value>#0</value>
82685                </enumeratedValue>
82686                <enumeratedValue>
82687                  <name>1</name>
82688                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
82689                  <value>#1</value>
82690                </enumeratedValue>
82691              </enumeratedValues>
82692            </field>
82693            <field>
82694              <name>ODE</name>
82695              <description>Open Drain Enable</description>
82696              <bitOffset>5</bitOffset>
82697              <bitWidth>1</bitWidth>
82698              <access>read-only</access>
82699              <enumeratedValues>
82700                <enumeratedValue>
82701                  <name>0</name>
82702                  <description>Open drain output is disabled on the corresponding pin.</description>
82703                  <value>#0</value>
82704                </enumeratedValue>
82705                <enumeratedValue>
82706                  <name>1</name>
82707                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
82708                  <value>#1</value>
82709                </enumeratedValue>
82710              </enumeratedValues>
82711            </field>
82712            <field>
82713              <name>DSE</name>
82714              <description>Drive Strength Enable</description>
82715              <bitOffset>6</bitOffset>
82716              <bitWidth>1</bitWidth>
82717              <access>read-only</access>
82718              <enumeratedValues>
82719                <enumeratedValue>
82720                  <name>0</name>
82721                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
82722                  <value>#0</value>
82723                </enumeratedValue>
82724                <enumeratedValue>
82725                  <name>1</name>
82726                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
82727                  <value>#1</value>
82728                </enumeratedValue>
82729              </enumeratedValues>
82730            </field>
82731            <field>
82732              <name>MUX</name>
82733              <description>Pin Mux Control</description>
82734              <bitOffset>8</bitOffset>
82735              <bitWidth>3</bitWidth>
82736              <access>read-write</access>
82737              <enumeratedValues>
82738                <enumeratedValue>
82739                  <name>000</name>
82740                  <description>Pin disabled (Alternative 0) (analog).</description>
82741                  <value>#000</value>
82742                </enumeratedValue>
82743                <enumeratedValue>
82744                  <name>001</name>
82745                  <description>Alternative 1 (GPIO).</description>
82746                  <value>#001</value>
82747                </enumeratedValue>
82748                <enumeratedValue>
82749                  <name>010</name>
82750                  <description>Alternative 2 (chip-specific).</description>
82751                  <value>#010</value>
82752                </enumeratedValue>
82753                <enumeratedValue>
82754                  <name>011</name>
82755                  <description>Alternative 3 (chip-specific).</description>
82756                  <value>#011</value>
82757                </enumeratedValue>
82758                <enumeratedValue>
82759                  <name>100</name>
82760                  <description>Alternative 4 (chip-specific).</description>
82761                  <value>#100</value>
82762                </enumeratedValue>
82763                <enumeratedValue>
82764                  <name>101</name>
82765                  <description>Alternative 5 (chip-specific).</description>
82766                  <value>#101</value>
82767                </enumeratedValue>
82768                <enumeratedValue>
82769                  <name>110</name>
82770                  <description>Alternative 6 (chip-specific).</description>
82771                  <value>#110</value>
82772                </enumeratedValue>
82773                <enumeratedValue>
82774                  <name>111</name>
82775                  <description>Alternative 7 (chip-specific).</description>
82776                  <value>#111</value>
82777                </enumeratedValue>
82778              </enumeratedValues>
82779            </field>
82780            <field>
82781              <name>LK</name>
82782              <description>Lock Register</description>
82783              <bitOffset>15</bitOffset>
82784              <bitWidth>1</bitWidth>
82785              <access>read-write</access>
82786              <enumeratedValues>
82787                <enumeratedValue>
82788                  <name>0</name>
82789                  <description>Pin Control Register fields [15:0] are not locked.</description>
82790                  <value>#0</value>
82791                </enumeratedValue>
82792                <enumeratedValue>
82793                  <name>1</name>
82794                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
82795                  <value>#1</value>
82796                </enumeratedValue>
82797              </enumeratedValues>
82798            </field>
82799            <field>
82800              <name>IRQC</name>
82801              <description>Interrupt Configuration</description>
82802              <bitOffset>16</bitOffset>
82803              <bitWidth>4</bitWidth>
82804              <access>read-write</access>
82805              <enumeratedValues>
82806                <enumeratedValue>
82807                  <name>0000</name>
82808                  <description>Interrupt Status Flag (ISF) is disabled.</description>
82809                  <value>#0000</value>
82810                </enumeratedValue>
82811                <enumeratedValue>
82812                  <name>0001</name>
82813                  <description>ISF flag and DMA request on rising edge.</description>
82814                  <value>#0001</value>
82815                </enumeratedValue>
82816                <enumeratedValue>
82817                  <name>0010</name>
82818                  <description>ISF flag and DMA request on falling edge.</description>
82819                  <value>#0010</value>
82820                </enumeratedValue>
82821                <enumeratedValue>
82822                  <name>0011</name>
82823                  <description>ISF flag and DMA request on either edge.</description>
82824                  <value>#0011</value>
82825                </enumeratedValue>
82826                <enumeratedValue>
82827                  <name>1000</name>
82828                  <description>ISF flag and Interrupt when logic 0.</description>
82829                  <value>#1000</value>
82830                </enumeratedValue>
82831                <enumeratedValue>
82832                  <name>1001</name>
82833                  <description>ISF flag and Interrupt on rising-edge.</description>
82834                  <value>#1001</value>
82835                </enumeratedValue>
82836                <enumeratedValue>
82837                  <name>1010</name>
82838                  <description>ISF flag and Interrupt on falling-edge.</description>
82839                  <value>#1010</value>
82840                </enumeratedValue>
82841                <enumeratedValue>
82842                  <name>1011</name>
82843                  <description>ISF flag and Interrupt on either edge.</description>
82844                  <value>#1011</value>
82845                </enumeratedValue>
82846                <enumeratedValue>
82847                  <name>1100</name>
82848                  <description>ISF flag and Interrupt when logic 1.</description>
82849                  <value>#1100</value>
82850                </enumeratedValue>
82851              </enumeratedValues>
82852            </field>
82853            <field>
82854              <name>ISF</name>
82855              <description>Interrupt Status Flag</description>
82856              <bitOffset>24</bitOffset>
82857              <bitWidth>1</bitWidth>
82858              <access>read-write</access>
82859              <enumeratedValues>
82860                <enumeratedValue>
82861                  <name>0</name>
82862                  <description>Configured interrupt is not detected.</description>
82863                  <value>#0</value>
82864                </enumeratedValue>
82865                <enumeratedValue>
82866                  <name>1</name>
82867                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
82868                  <value>#1</value>
82869                </enumeratedValue>
82870              </enumeratedValues>
82871            </field>
82872          </fields>
82873        </register>
82874        <register>
82875          <name>PCR24</name>
82876          <description>Pin Control Register n</description>
82877          <addressOffset>0x60</addressOffset>
82878          <size>32</size>
82879          <access>read-write</access>
82880          <resetValue>0</resetValue>
82881          <resetMask>0xFFFFFFFF</resetMask>
82882          <fields>
82883            <field>
82884              <name>PS</name>
82885              <description>Pull Select</description>
82886              <bitOffset>0</bitOffset>
82887              <bitWidth>1</bitWidth>
82888              <access>read-only</access>
82889              <enumeratedValues>
82890                <enumeratedValue>
82891                  <name>0</name>
82892                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
82893                  <value>#0</value>
82894                </enumeratedValue>
82895                <enumeratedValue>
82896                  <name>1</name>
82897                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
82898                  <value>#1</value>
82899                </enumeratedValue>
82900              </enumeratedValues>
82901            </field>
82902            <field>
82903              <name>PE</name>
82904              <description>Pull Enable</description>
82905              <bitOffset>1</bitOffset>
82906              <bitWidth>1</bitWidth>
82907              <access>read-only</access>
82908              <enumeratedValues>
82909                <enumeratedValue>
82910                  <name>0</name>
82911                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
82912                  <value>#0</value>
82913                </enumeratedValue>
82914                <enumeratedValue>
82915                  <name>1</name>
82916                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
82917                  <value>#1</value>
82918                </enumeratedValue>
82919              </enumeratedValues>
82920            </field>
82921            <field>
82922              <name>SRE</name>
82923              <description>Slew Rate Enable</description>
82924              <bitOffset>2</bitOffset>
82925              <bitWidth>1</bitWidth>
82926              <access>read-only</access>
82927              <enumeratedValues>
82928                <enumeratedValue>
82929                  <name>0</name>
82930                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
82931                  <value>#0</value>
82932                </enumeratedValue>
82933                <enumeratedValue>
82934                  <name>1</name>
82935                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
82936                  <value>#1</value>
82937                </enumeratedValue>
82938              </enumeratedValues>
82939            </field>
82940            <field>
82941              <name>PFE</name>
82942              <description>Passive Filter Enable</description>
82943              <bitOffset>4</bitOffset>
82944              <bitWidth>1</bitWidth>
82945              <access>read-only</access>
82946              <enumeratedValues>
82947                <enumeratedValue>
82948                  <name>0</name>
82949                  <description>Passive input filter is disabled on the corresponding pin.</description>
82950                  <value>#0</value>
82951                </enumeratedValue>
82952                <enumeratedValue>
82953                  <name>1</name>
82954                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
82955                  <value>#1</value>
82956                </enumeratedValue>
82957              </enumeratedValues>
82958            </field>
82959            <field>
82960              <name>ODE</name>
82961              <description>Open Drain Enable</description>
82962              <bitOffset>5</bitOffset>
82963              <bitWidth>1</bitWidth>
82964              <access>read-only</access>
82965              <enumeratedValues>
82966                <enumeratedValue>
82967                  <name>0</name>
82968                  <description>Open drain output is disabled on the corresponding pin.</description>
82969                  <value>#0</value>
82970                </enumeratedValue>
82971                <enumeratedValue>
82972                  <name>1</name>
82973                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
82974                  <value>#1</value>
82975                </enumeratedValue>
82976              </enumeratedValues>
82977            </field>
82978            <field>
82979              <name>DSE</name>
82980              <description>Drive Strength Enable</description>
82981              <bitOffset>6</bitOffset>
82982              <bitWidth>1</bitWidth>
82983              <access>read-only</access>
82984              <enumeratedValues>
82985                <enumeratedValue>
82986                  <name>0</name>
82987                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
82988                  <value>#0</value>
82989                </enumeratedValue>
82990                <enumeratedValue>
82991                  <name>1</name>
82992                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
82993                  <value>#1</value>
82994                </enumeratedValue>
82995              </enumeratedValues>
82996            </field>
82997            <field>
82998              <name>MUX</name>
82999              <description>Pin Mux Control</description>
83000              <bitOffset>8</bitOffset>
83001              <bitWidth>3</bitWidth>
83002              <access>read-write</access>
83003              <enumeratedValues>
83004                <enumeratedValue>
83005                  <name>000</name>
83006                  <description>Pin disabled (Alternative 0) (analog).</description>
83007                  <value>#000</value>
83008                </enumeratedValue>
83009                <enumeratedValue>
83010                  <name>001</name>
83011                  <description>Alternative 1 (GPIO).</description>
83012                  <value>#001</value>
83013                </enumeratedValue>
83014                <enumeratedValue>
83015                  <name>010</name>
83016                  <description>Alternative 2 (chip-specific).</description>
83017                  <value>#010</value>
83018                </enumeratedValue>
83019                <enumeratedValue>
83020                  <name>011</name>
83021                  <description>Alternative 3 (chip-specific).</description>
83022                  <value>#011</value>
83023                </enumeratedValue>
83024                <enumeratedValue>
83025                  <name>100</name>
83026                  <description>Alternative 4 (chip-specific).</description>
83027                  <value>#100</value>
83028                </enumeratedValue>
83029                <enumeratedValue>
83030                  <name>101</name>
83031                  <description>Alternative 5 (chip-specific).</description>
83032                  <value>#101</value>
83033                </enumeratedValue>
83034                <enumeratedValue>
83035                  <name>110</name>
83036                  <description>Alternative 6 (chip-specific).</description>
83037                  <value>#110</value>
83038                </enumeratedValue>
83039                <enumeratedValue>
83040                  <name>111</name>
83041                  <description>Alternative 7 (chip-specific).</description>
83042                  <value>#111</value>
83043                </enumeratedValue>
83044              </enumeratedValues>
83045            </field>
83046            <field>
83047              <name>LK</name>
83048              <description>Lock Register</description>
83049              <bitOffset>15</bitOffset>
83050              <bitWidth>1</bitWidth>
83051              <access>read-write</access>
83052              <enumeratedValues>
83053                <enumeratedValue>
83054                  <name>0</name>
83055                  <description>Pin Control Register fields [15:0] are not locked.</description>
83056                  <value>#0</value>
83057                </enumeratedValue>
83058                <enumeratedValue>
83059                  <name>1</name>
83060                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
83061                  <value>#1</value>
83062                </enumeratedValue>
83063              </enumeratedValues>
83064            </field>
83065            <field>
83066              <name>IRQC</name>
83067              <description>Interrupt Configuration</description>
83068              <bitOffset>16</bitOffset>
83069              <bitWidth>4</bitWidth>
83070              <access>read-write</access>
83071              <enumeratedValues>
83072                <enumeratedValue>
83073                  <name>0000</name>
83074                  <description>Interrupt Status Flag (ISF) is disabled.</description>
83075                  <value>#0000</value>
83076                </enumeratedValue>
83077                <enumeratedValue>
83078                  <name>0001</name>
83079                  <description>ISF flag and DMA request on rising edge.</description>
83080                  <value>#0001</value>
83081                </enumeratedValue>
83082                <enumeratedValue>
83083                  <name>0010</name>
83084                  <description>ISF flag and DMA request on falling edge.</description>
83085                  <value>#0010</value>
83086                </enumeratedValue>
83087                <enumeratedValue>
83088                  <name>0011</name>
83089                  <description>ISF flag and DMA request on either edge.</description>
83090                  <value>#0011</value>
83091                </enumeratedValue>
83092                <enumeratedValue>
83093                  <name>1000</name>
83094                  <description>ISF flag and Interrupt when logic 0.</description>
83095                  <value>#1000</value>
83096                </enumeratedValue>
83097                <enumeratedValue>
83098                  <name>1001</name>
83099                  <description>ISF flag and Interrupt on rising-edge.</description>
83100                  <value>#1001</value>
83101                </enumeratedValue>
83102                <enumeratedValue>
83103                  <name>1010</name>
83104                  <description>ISF flag and Interrupt on falling-edge.</description>
83105                  <value>#1010</value>
83106                </enumeratedValue>
83107                <enumeratedValue>
83108                  <name>1011</name>
83109                  <description>ISF flag and Interrupt on either edge.</description>
83110                  <value>#1011</value>
83111                </enumeratedValue>
83112                <enumeratedValue>
83113                  <name>1100</name>
83114                  <description>ISF flag and Interrupt when logic 1.</description>
83115                  <value>#1100</value>
83116                </enumeratedValue>
83117              </enumeratedValues>
83118            </field>
83119            <field>
83120              <name>ISF</name>
83121              <description>Interrupt Status Flag</description>
83122              <bitOffset>24</bitOffset>
83123              <bitWidth>1</bitWidth>
83124              <access>read-write</access>
83125              <enumeratedValues>
83126                <enumeratedValue>
83127                  <name>0</name>
83128                  <description>Configured interrupt is not detected.</description>
83129                  <value>#0</value>
83130                </enumeratedValue>
83131                <enumeratedValue>
83132                  <name>1</name>
83133                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
83134                  <value>#1</value>
83135                </enumeratedValue>
83136              </enumeratedValues>
83137            </field>
83138          </fields>
83139        </register>
83140        <register>
83141          <name>PCR25</name>
83142          <description>Pin Control Register n</description>
83143          <addressOffset>0x64</addressOffset>
83144          <size>32</size>
83145          <access>read-write</access>
83146          <resetValue>0</resetValue>
83147          <resetMask>0xFFFFFFFF</resetMask>
83148          <fields>
83149            <field>
83150              <name>PS</name>
83151              <description>Pull Select</description>
83152              <bitOffset>0</bitOffset>
83153              <bitWidth>1</bitWidth>
83154              <access>read-only</access>
83155              <enumeratedValues>
83156                <enumeratedValue>
83157                  <name>0</name>
83158                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
83159                  <value>#0</value>
83160                </enumeratedValue>
83161                <enumeratedValue>
83162                  <name>1</name>
83163                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
83164                  <value>#1</value>
83165                </enumeratedValue>
83166              </enumeratedValues>
83167            </field>
83168            <field>
83169              <name>PE</name>
83170              <description>Pull Enable</description>
83171              <bitOffset>1</bitOffset>
83172              <bitWidth>1</bitWidth>
83173              <access>read-only</access>
83174              <enumeratedValues>
83175                <enumeratedValue>
83176                  <name>0</name>
83177                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
83178                  <value>#0</value>
83179                </enumeratedValue>
83180                <enumeratedValue>
83181                  <name>1</name>
83182                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
83183                  <value>#1</value>
83184                </enumeratedValue>
83185              </enumeratedValues>
83186            </field>
83187            <field>
83188              <name>SRE</name>
83189              <description>Slew Rate Enable</description>
83190              <bitOffset>2</bitOffset>
83191              <bitWidth>1</bitWidth>
83192              <access>read-only</access>
83193              <enumeratedValues>
83194                <enumeratedValue>
83195                  <name>0</name>
83196                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
83197                  <value>#0</value>
83198                </enumeratedValue>
83199                <enumeratedValue>
83200                  <name>1</name>
83201                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
83202                  <value>#1</value>
83203                </enumeratedValue>
83204              </enumeratedValues>
83205            </field>
83206            <field>
83207              <name>PFE</name>
83208              <description>Passive Filter Enable</description>
83209              <bitOffset>4</bitOffset>
83210              <bitWidth>1</bitWidth>
83211              <access>read-only</access>
83212              <enumeratedValues>
83213                <enumeratedValue>
83214                  <name>0</name>
83215                  <description>Passive input filter is disabled on the corresponding pin.</description>
83216                  <value>#0</value>
83217                </enumeratedValue>
83218                <enumeratedValue>
83219                  <name>1</name>
83220                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
83221                  <value>#1</value>
83222                </enumeratedValue>
83223              </enumeratedValues>
83224            </field>
83225            <field>
83226              <name>ODE</name>
83227              <description>Open Drain Enable</description>
83228              <bitOffset>5</bitOffset>
83229              <bitWidth>1</bitWidth>
83230              <access>read-only</access>
83231              <enumeratedValues>
83232                <enumeratedValue>
83233                  <name>0</name>
83234                  <description>Open drain output is disabled on the corresponding pin.</description>
83235                  <value>#0</value>
83236                </enumeratedValue>
83237                <enumeratedValue>
83238                  <name>1</name>
83239                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
83240                  <value>#1</value>
83241                </enumeratedValue>
83242              </enumeratedValues>
83243            </field>
83244            <field>
83245              <name>DSE</name>
83246              <description>Drive Strength Enable</description>
83247              <bitOffset>6</bitOffset>
83248              <bitWidth>1</bitWidth>
83249              <access>read-only</access>
83250              <enumeratedValues>
83251                <enumeratedValue>
83252                  <name>0</name>
83253                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
83254                  <value>#0</value>
83255                </enumeratedValue>
83256                <enumeratedValue>
83257                  <name>1</name>
83258                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
83259                  <value>#1</value>
83260                </enumeratedValue>
83261              </enumeratedValues>
83262            </field>
83263            <field>
83264              <name>MUX</name>
83265              <description>Pin Mux Control</description>
83266              <bitOffset>8</bitOffset>
83267              <bitWidth>3</bitWidth>
83268              <access>read-write</access>
83269              <enumeratedValues>
83270                <enumeratedValue>
83271                  <name>000</name>
83272                  <description>Pin disabled (Alternative 0) (analog).</description>
83273                  <value>#000</value>
83274                </enumeratedValue>
83275                <enumeratedValue>
83276                  <name>001</name>
83277                  <description>Alternative 1 (GPIO).</description>
83278                  <value>#001</value>
83279                </enumeratedValue>
83280                <enumeratedValue>
83281                  <name>010</name>
83282                  <description>Alternative 2 (chip-specific).</description>
83283                  <value>#010</value>
83284                </enumeratedValue>
83285                <enumeratedValue>
83286                  <name>011</name>
83287                  <description>Alternative 3 (chip-specific).</description>
83288                  <value>#011</value>
83289                </enumeratedValue>
83290                <enumeratedValue>
83291                  <name>100</name>
83292                  <description>Alternative 4 (chip-specific).</description>
83293                  <value>#100</value>
83294                </enumeratedValue>
83295                <enumeratedValue>
83296                  <name>101</name>
83297                  <description>Alternative 5 (chip-specific).</description>
83298                  <value>#101</value>
83299                </enumeratedValue>
83300                <enumeratedValue>
83301                  <name>110</name>
83302                  <description>Alternative 6 (chip-specific).</description>
83303                  <value>#110</value>
83304                </enumeratedValue>
83305                <enumeratedValue>
83306                  <name>111</name>
83307                  <description>Alternative 7 (chip-specific).</description>
83308                  <value>#111</value>
83309                </enumeratedValue>
83310              </enumeratedValues>
83311            </field>
83312            <field>
83313              <name>LK</name>
83314              <description>Lock Register</description>
83315              <bitOffset>15</bitOffset>
83316              <bitWidth>1</bitWidth>
83317              <access>read-write</access>
83318              <enumeratedValues>
83319                <enumeratedValue>
83320                  <name>0</name>
83321                  <description>Pin Control Register fields [15:0] are not locked.</description>
83322                  <value>#0</value>
83323                </enumeratedValue>
83324                <enumeratedValue>
83325                  <name>1</name>
83326                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
83327                  <value>#1</value>
83328                </enumeratedValue>
83329              </enumeratedValues>
83330            </field>
83331            <field>
83332              <name>IRQC</name>
83333              <description>Interrupt Configuration</description>
83334              <bitOffset>16</bitOffset>
83335              <bitWidth>4</bitWidth>
83336              <access>read-write</access>
83337              <enumeratedValues>
83338                <enumeratedValue>
83339                  <name>0000</name>
83340                  <description>Interrupt Status Flag (ISF) is disabled.</description>
83341                  <value>#0000</value>
83342                </enumeratedValue>
83343                <enumeratedValue>
83344                  <name>0001</name>
83345                  <description>ISF flag and DMA request on rising edge.</description>
83346                  <value>#0001</value>
83347                </enumeratedValue>
83348                <enumeratedValue>
83349                  <name>0010</name>
83350                  <description>ISF flag and DMA request on falling edge.</description>
83351                  <value>#0010</value>
83352                </enumeratedValue>
83353                <enumeratedValue>
83354                  <name>0011</name>
83355                  <description>ISF flag and DMA request on either edge.</description>
83356                  <value>#0011</value>
83357                </enumeratedValue>
83358                <enumeratedValue>
83359                  <name>1000</name>
83360                  <description>ISF flag and Interrupt when logic 0.</description>
83361                  <value>#1000</value>
83362                </enumeratedValue>
83363                <enumeratedValue>
83364                  <name>1001</name>
83365                  <description>ISF flag and Interrupt on rising-edge.</description>
83366                  <value>#1001</value>
83367                </enumeratedValue>
83368                <enumeratedValue>
83369                  <name>1010</name>
83370                  <description>ISF flag and Interrupt on falling-edge.</description>
83371                  <value>#1010</value>
83372                </enumeratedValue>
83373                <enumeratedValue>
83374                  <name>1011</name>
83375                  <description>ISF flag and Interrupt on either edge.</description>
83376                  <value>#1011</value>
83377                </enumeratedValue>
83378                <enumeratedValue>
83379                  <name>1100</name>
83380                  <description>ISF flag and Interrupt when logic 1.</description>
83381                  <value>#1100</value>
83382                </enumeratedValue>
83383              </enumeratedValues>
83384            </field>
83385            <field>
83386              <name>ISF</name>
83387              <description>Interrupt Status Flag</description>
83388              <bitOffset>24</bitOffset>
83389              <bitWidth>1</bitWidth>
83390              <access>read-write</access>
83391              <enumeratedValues>
83392                <enumeratedValue>
83393                  <name>0</name>
83394                  <description>Configured interrupt is not detected.</description>
83395                  <value>#0</value>
83396                </enumeratedValue>
83397                <enumeratedValue>
83398                  <name>1</name>
83399                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
83400                  <value>#1</value>
83401                </enumeratedValue>
83402              </enumeratedValues>
83403            </field>
83404          </fields>
83405        </register>
83406        <register>
83407          <name>PCR26</name>
83408          <description>Pin Control Register n</description>
83409          <addressOffset>0x68</addressOffset>
83410          <size>32</size>
83411          <access>read-write</access>
83412          <resetValue>0</resetValue>
83413          <resetMask>0xFFFFFFFF</resetMask>
83414          <fields>
83415            <field>
83416              <name>PS</name>
83417              <description>Pull Select</description>
83418              <bitOffset>0</bitOffset>
83419              <bitWidth>1</bitWidth>
83420              <access>read-only</access>
83421              <enumeratedValues>
83422                <enumeratedValue>
83423                  <name>0</name>
83424                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
83425                  <value>#0</value>
83426                </enumeratedValue>
83427                <enumeratedValue>
83428                  <name>1</name>
83429                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
83430                  <value>#1</value>
83431                </enumeratedValue>
83432              </enumeratedValues>
83433            </field>
83434            <field>
83435              <name>PE</name>
83436              <description>Pull Enable</description>
83437              <bitOffset>1</bitOffset>
83438              <bitWidth>1</bitWidth>
83439              <access>read-only</access>
83440              <enumeratedValues>
83441                <enumeratedValue>
83442                  <name>0</name>
83443                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
83444                  <value>#0</value>
83445                </enumeratedValue>
83446                <enumeratedValue>
83447                  <name>1</name>
83448                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
83449                  <value>#1</value>
83450                </enumeratedValue>
83451              </enumeratedValues>
83452            </field>
83453            <field>
83454              <name>SRE</name>
83455              <description>Slew Rate Enable</description>
83456              <bitOffset>2</bitOffset>
83457              <bitWidth>1</bitWidth>
83458              <access>read-only</access>
83459              <enumeratedValues>
83460                <enumeratedValue>
83461                  <name>0</name>
83462                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
83463                  <value>#0</value>
83464                </enumeratedValue>
83465                <enumeratedValue>
83466                  <name>1</name>
83467                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
83468                  <value>#1</value>
83469                </enumeratedValue>
83470              </enumeratedValues>
83471            </field>
83472            <field>
83473              <name>PFE</name>
83474              <description>Passive Filter Enable</description>
83475              <bitOffset>4</bitOffset>
83476              <bitWidth>1</bitWidth>
83477              <access>read-only</access>
83478              <enumeratedValues>
83479                <enumeratedValue>
83480                  <name>0</name>
83481                  <description>Passive input filter is disabled on the corresponding pin.</description>
83482                  <value>#0</value>
83483                </enumeratedValue>
83484                <enumeratedValue>
83485                  <name>1</name>
83486                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
83487                  <value>#1</value>
83488                </enumeratedValue>
83489              </enumeratedValues>
83490            </field>
83491            <field>
83492              <name>ODE</name>
83493              <description>Open Drain Enable</description>
83494              <bitOffset>5</bitOffset>
83495              <bitWidth>1</bitWidth>
83496              <access>read-only</access>
83497              <enumeratedValues>
83498                <enumeratedValue>
83499                  <name>0</name>
83500                  <description>Open drain output is disabled on the corresponding pin.</description>
83501                  <value>#0</value>
83502                </enumeratedValue>
83503                <enumeratedValue>
83504                  <name>1</name>
83505                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
83506                  <value>#1</value>
83507                </enumeratedValue>
83508              </enumeratedValues>
83509            </field>
83510            <field>
83511              <name>DSE</name>
83512              <description>Drive Strength Enable</description>
83513              <bitOffset>6</bitOffset>
83514              <bitWidth>1</bitWidth>
83515              <access>read-only</access>
83516              <enumeratedValues>
83517                <enumeratedValue>
83518                  <name>0</name>
83519                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
83520                  <value>#0</value>
83521                </enumeratedValue>
83522                <enumeratedValue>
83523                  <name>1</name>
83524                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
83525                  <value>#1</value>
83526                </enumeratedValue>
83527              </enumeratedValues>
83528            </field>
83529            <field>
83530              <name>MUX</name>
83531              <description>Pin Mux Control</description>
83532              <bitOffset>8</bitOffset>
83533              <bitWidth>3</bitWidth>
83534              <access>read-write</access>
83535              <enumeratedValues>
83536                <enumeratedValue>
83537                  <name>000</name>
83538                  <description>Pin disabled (Alternative 0) (analog).</description>
83539                  <value>#000</value>
83540                </enumeratedValue>
83541                <enumeratedValue>
83542                  <name>001</name>
83543                  <description>Alternative 1 (GPIO).</description>
83544                  <value>#001</value>
83545                </enumeratedValue>
83546                <enumeratedValue>
83547                  <name>010</name>
83548                  <description>Alternative 2 (chip-specific).</description>
83549                  <value>#010</value>
83550                </enumeratedValue>
83551                <enumeratedValue>
83552                  <name>011</name>
83553                  <description>Alternative 3 (chip-specific).</description>
83554                  <value>#011</value>
83555                </enumeratedValue>
83556                <enumeratedValue>
83557                  <name>100</name>
83558                  <description>Alternative 4 (chip-specific).</description>
83559                  <value>#100</value>
83560                </enumeratedValue>
83561                <enumeratedValue>
83562                  <name>101</name>
83563                  <description>Alternative 5 (chip-specific).</description>
83564                  <value>#101</value>
83565                </enumeratedValue>
83566                <enumeratedValue>
83567                  <name>110</name>
83568                  <description>Alternative 6 (chip-specific).</description>
83569                  <value>#110</value>
83570                </enumeratedValue>
83571                <enumeratedValue>
83572                  <name>111</name>
83573                  <description>Alternative 7 (chip-specific).</description>
83574                  <value>#111</value>
83575                </enumeratedValue>
83576              </enumeratedValues>
83577            </field>
83578            <field>
83579              <name>LK</name>
83580              <description>Lock Register</description>
83581              <bitOffset>15</bitOffset>
83582              <bitWidth>1</bitWidth>
83583              <access>read-write</access>
83584              <enumeratedValues>
83585                <enumeratedValue>
83586                  <name>0</name>
83587                  <description>Pin Control Register fields [15:0] are not locked.</description>
83588                  <value>#0</value>
83589                </enumeratedValue>
83590                <enumeratedValue>
83591                  <name>1</name>
83592                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
83593                  <value>#1</value>
83594                </enumeratedValue>
83595              </enumeratedValues>
83596            </field>
83597            <field>
83598              <name>IRQC</name>
83599              <description>Interrupt Configuration</description>
83600              <bitOffset>16</bitOffset>
83601              <bitWidth>4</bitWidth>
83602              <access>read-write</access>
83603              <enumeratedValues>
83604                <enumeratedValue>
83605                  <name>0000</name>
83606                  <description>Interrupt Status Flag (ISF) is disabled.</description>
83607                  <value>#0000</value>
83608                </enumeratedValue>
83609                <enumeratedValue>
83610                  <name>0001</name>
83611                  <description>ISF flag and DMA request on rising edge.</description>
83612                  <value>#0001</value>
83613                </enumeratedValue>
83614                <enumeratedValue>
83615                  <name>0010</name>
83616                  <description>ISF flag and DMA request on falling edge.</description>
83617                  <value>#0010</value>
83618                </enumeratedValue>
83619                <enumeratedValue>
83620                  <name>0011</name>
83621                  <description>ISF flag and DMA request on either edge.</description>
83622                  <value>#0011</value>
83623                </enumeratedValue>
83624                <enumeratedValue>
83625                  <name>1000</name>
83626                  <description>ISF flag and Interrupt when logic 0.</description>
83627                  <value>#1000</value>
83628                </enumeratedValue>
83629                <enumeratedValue>
83630                  <name>1001</name>
83631                  <description>ISF flag and Interrupt on rising-edge.</description>
83632                  <value>#1001</value>
83633                </enumeratedValue>
83634                <enumeratedValue>
83635                  <name>1010</name>
83636                  <description>ISF flag and Interrupt on falling-edge.</description>
83637                  <value>#1010</value>
83638                </enumeratedValue>
83639                <enumeratedValue>
83640                  <name>1011</name>
83641                  <description>ISF flag and Interrupt on either edge.</description>
83642                  <value>#1011</value>
83643                </enumeratedValue>
83644                <enumeratedValue>
83645                  <name>1100</name>
83646                  <description>ISF flag and Interrupt when logic 1.</description>
83647                  <value>#1100</value>
83648                </enumeratedValue>
83649              </enumeratedValues>
83650            </field>
83651            <field>
83652              <name>ISF</name>
83653              <description>Interrupt Status Flag</description>
83654              <bitOffset>24</bitOffset>
83655              <bitWidth>1</bitWidth>
83656              <access>read-write</access>
83657              <enumeratedValues>
83658                <enumeratedValue>
83659                  <name>0</name>
83660                  <description>Configured interrupt is not detected.</description>
83661                  <value>#0</value>
83662                </enumeratedValue>
83663                <enumeratedValue>
83664                  <name>1</name>
83665                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
83666                  <value>#1</value>
83667                </enumeratedValue>
83668              </enumeratedValues>
83669            </field>
83670          </fields>
83671        </register>
83672        <register>
83673          <name>PCR27</name>
83674          <description>Pin Control Register n</description>
83675          <addressOffset>0x6C</addressOffset>
83676          <size>32</size>
83677          <access>read-write</access>
83678          <resetValue>0</resetValue>
83679          <resetMask>0xFFFFFFFF</resetMask>
83680          <fields>
83681            <field>
83682              <name>PS</name>
83683              <description>Pull Select</description>
83684              <bitOffset>0</bitOffset>
83685              <bitWidth>1</bitWidth>
83686              <access>read-only</access>
83687              <enumeratedValues>
83688                <enumeratedValue>
83689                  <name>0</name>
83690                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
83691                  <value>#0</value>
83692                </enumeratedValue>
83693                <enumeratedValue>
83694                  <name>1</name>
83695                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
83696                  <value>#1</value>
83697                </enumeratedValue>
83698              </enumeratedValues>
83699            </field>
83700            <field>
83701              <name>PE</name>
83702              <description>Pull Enable</description>
83703              <bitOffset>1</bitOffset>
83704              <bitWidth>1</bitWidth>
83705              <access>read-only</access>
83706              <enumeratedValues>
83707                <enumeratedValue>
83708                  <name>0</name>
83709                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
83710                  <value>#0</value>
83711                </enumeratedValue>
83712                <enumeratedValue>
83713                  <name>1</name>
83714                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
83715                  <value>#1</value>
83716                </enumeratedValue>
83717              </enumeratedValues>
83718            </field>
83719            <field>
83720              <name>SRE</name>
83721              <description>Slew Rate Enable</description>
83722              <bitOffset>2</bitOffset>
83723              <bitWidth>1</bitWidth>
83724              <access>read-only</access>
83725              <enumeratedValues>
83726                <enumeratedValue>
83727                  <name>0</name>
83728                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
83729                  <value>#0</value>
83730                </enumeratedValue>
83731                <enumeratedValue>
83732                  <name>1</name>
83733                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
83734                  <value>#1</value>
83735                </enumeratedValue>
83736              </enumeratedValues>
83737            </field>
83738            <field>
83739              <name>PFE</name>
83740              <description>Passive Filter Enable</description>
83741              <bitOffset>4</bitOffset>
83742              <bitWidth>1</bitWidth>
83743              <access>read-only</access>
83744              <enumeratedValues>
83745                <enumeratedValue>
83746                  <name>0</name>
83747                  <description>Passive input filter is disabled on the corresponding pin.</description>
83748                  <value>#0</value>
83749                </enumeratedValue>
83750                <enumeratedValue>
83751                  <name>1</name>
83752                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
83753                  <value>#1</value>
83754                </enumeratedValue>
83755              </enumeratedValues>
83756            </field>
83757            <field>
83758              <name>ODE</name>
83759              <description>Open Drain Enable</description>
83760              <bitOffset>5</bitOffset>
83761              <bitWidth>1</bitWidth>
83762              <access>read-only</access>
83763              <enumeratedValues>
83764                <enumeratedValue>
83765                  <name>0</name>
83766                  <description>Open drain output is disabled on the corresponding pin.</description>
83767                  <value>#0</value>
83768                </enumeratedValue>
83769                <enumeratedValue>
83770                  <name>1</name>
83771                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
83772                  <value>#1</value>
83773                </enumeratedValue>
83774              </enumeratedValues>
83775            </field>
83776            <field>
83777              <name>DSE</name>
83778              <description>Drive Strength Enable</description>
83779              <bitOffset>6</bitOffset>
83780              <bitWidth>1</bitWidth>
83781              <access>read-only</access>
83782              <enumeratedValues>
83783                <enumeratedValue>
83784                  <name>0</name>
83785                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
83786                  <value>#0</value>
83787                </enumeratedValue>
83788                <enumeratedValue>
83789                  <name>1</name>
83790                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
83791                  <value>#1</value>
83792                </enumeratedValue>
83793              </enumeratedValues>
83794            </field>
83795            <field>
83796              <name>MUX</name>
83797              <description>Pin Mux Control</description>
83798              <bitOffset>8</bitOffset>
83799              <bitWidth>3</bitWidth>
83800              <access>read-write</access>
83801              <enumeratedValues>
83802                <enumeratedValue>
83803                  <name>000</name>
83804                  <description>Pin disabled (Alternative 0) (analog).</description>
83805                  <value>#000</value>
83806                </enumeratedValue>
83807                <enumeratedValue>
83808                  <name>001</name>
83809                  <description>Alternative 1 (GPIO).</description>
83810                  <value>#001</value>
83811                </enumeratedValue>
83812                <enumeratedValue>
83813                  <name>010</name>
83814                  <description>Alternative 2 (chip-specific).</description>
83815                  <value>#010</value>
83816                </enumeratedValue>
83817                <enumeratedValue>
83818                  <name>011</name>
83819                  <description>Alternative 3 (chip-specific).</description>
83820                  <value>#011</value>
83821                </enumeratedValue>
83822                <enumeratedValue>
83823                  <name>100</name>
83824                  <description>Alternative 4 (chip-specific).</description>
83825                  <value>#100</value>
83826                </enumeratedValue>
83827                <enumeratedValue>
83828                  <name>101</name>
83829                  <description>Alternative 5 (chip-specific).</description>
83830                  <value>#101</value>
83831                </enumeratedValue>
83832                <enumeratedValue>
83833                  <name>110</name>
83834                  <description>Alternative 6 (chip-specific).</description>
83835                  <value>#110</value>
83836                </enumeratedValue>
83837                <enumeratedValue>
83838                  <name>111</name>
83839                  <description>Alternative 7 (chip-specific).</description>
83840                  <value>#111</value>
83841                </enumeratedValue>
83842              </enumeratedValues>
83843            </field>
83844            <field>
83845              <name>LK</name>
83846              <description>Lock Register</description>
83847              <bitOffset>15</bitOffset>
83848              <bitWidth>1</bitWidth>
83849              <access>read-write</access>
83850              <enumeratedValues>
83851                <enumeratedValue>
83852                  <name>0</name>
83853                  <description>Pin Control Register fields [15:0] are not locked.</description>
83854                  <value>#0</value>
83855                </enumeratedValue>
83856                <enumeratedValue>
83857                  <name>1</name>
83858                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
83859                  <value>#1</value>
83860                </enumeratedValue>
83861              </enumeratedValues>
83862            </field>
83863            <field>
83864              <name>IRQC</name>
83865              <description>Interrupt Configuration</description>
83866              <bitOffset>16</bitOffset>
83867              <bitWidth>4</bitWidth>
83868              <access>read-write</access>
83869              <enumeratedValues>
83870                <enumeratedValue>
83871                  <name>0000</name>
83872                  <description>Interrupt Status Flag (ISF) is disabled.</description>
83873                  <value>#0000</value>
83874                </enumeratedValue>
83875                <enumeratedValue>
83876                  <name>0001</name>
83877                  <description>ISF flag and DMA request on rising edge.</description>
83878                  <value>#0001</value>
83879                </enumeratedValue>
83880                <enumeratedValue>
83881                  <name>0010</name>
83882                  <description>ISF flag and DMA request on falling edge.</description>
83883                  <value>#0010</value>
83884                </enumeratedValue>
83885                <enumeratedValue>
83886                  <name>0011</name>
83887                  <description>ISF flag and DMA request on either edge.</description>
83888                  <value>#0011</value>
83889                </enumeratedValue>
83890                <enumeratedValue>
83891                  <name>1000</name>
83892                  <description>ISF flag and Interrupt when logic 0.</description>
83893                  <value>#1000</value>
83894                </enumeratedValue>
83895                <enumeratedValue>
83896                  <name>1001</name>
83897                  <description>ISF flag and Interrupt on rising-edge.</description>
83898                  <value>#1001</value>
83899                </enumeratedValue>
83900                <enumeratedValue>
83901                  <name>1010</name>
83902                  <description>ISF flag and Interrupt on falling-edge.</description>
83903                  <value>#1010</value>
83904                </enumeratedValue>
83905                <enumeratedValue>
83906                  <name>1011</name>
83907                  <description>ISF flag and Interrupt on either edge.</description>
83908                  <value>#1011</value>
83909                </enumeratedValue>
83910                <enumeratedValue>
83911                  <name>1100</name>
83912                  <description>ISF flag and Interrupt when logic 1.</description>
83913                  <value>#1100</value>
83914                </enumeratedValue>
83915              </enumeratedValues>
83916            </field>
83917            <field>
83918              <name>ISF</name>
83919              <description>Interrupt Status Flag</description>
83920              <bitOffset>24</bitOffset>
83921              <bitWidth>1</bitWidth>
83922              <access>read-write</access>
83923              <enumeratedValues>
83924                <enumeratedValue>
83925                  <name>0</name>
83926                  <description>Configured interrupt is not detected.</description>
83927                  <value>#0</value>
83928                </enumeratedValue>
83929                <enumeratedValue>
83930                  <name>1</name>
83931                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
83932                  <value>#1</value>
83933                </enumeratedValue>
83934              </enumeratedValues>
83935            </field>
83936          </fields>
83937        </register>
83938        <register>
83939          <name>PCR28</name>
83940          <description>Pin Control Register n</description>
83941          <addressOffset>0x70</addressOffset>
83942          <size>32</size>
83943          <access>read-write</access>
83944          <resetValue>0</resetValue>
83945          <resetMask>0xFFFFFFFF</resetMask>
83946          <fields>
83947            <field>
83948              <name>PS</name>
83949              <description>Pull Select</description>
83950              <bitOffset>0</bitOffset>
83951              <bitWidth>1</bitWidth>
83952              <access>read-only</access>
83953              <enumeratedValues>
83954                <enumeratedValue>
83955                  <name>0</name>
83956                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
83957                  <value>#0</value>
83958                </enumeratedValue>
83959                <enumeratedValue>
83960                  <name>1</name>
83961                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
83962                  <value>#1</value>
83963                </enumeratedValue>
83964              </enumeratedValues>
83965            </field>
83966            <field>
83967              <name>PE</name>
83968              <description>Pull Enable</description>
83969              <bitOffset>1</bitOffset>
83970              <bitWidth>1</bitWidth>
83971              <access>read-only</access>
83972              <enumeratedValues>
83973                <enumeratedValue>
83974                  <name>0</name>
83975                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
83976                  <value>#0</value>
83977                </enumeratedValue>
83978                <enumeratedValue>
83979                  <name>1</name>
83980                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
83981                  <value>#1</value>
83982                </enumeratedValue>
83983              </enumeratedValues>
83984            </field>
83985            <field>
83986              <name>SRE</name>
83987              <description>Slew Rate Enable</description>
83988              <bitOffset>2</bitOffset>
83989              <bitWidth>1</bitWidth>
83990              <access>read-only</access>
83991              <enumeratedValues>
83992                <enumeratedValue>
83993                  <name>0</name>
83994                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
83995                  <value>#0</value>
83996                </enumeratedValue>
83997                <enumeratedValue>
83998                  <name>1</name>
83999                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
84000                  <value>#1</value>
84001                </enumeratedValue>
84002              </enumeratedValues>
84003            </field>
84004            <field>
84005              <name>PFE</name>
84006              <description>Passive Filter Enable</description>
84007              <bitOffset>4</bitOffset>
84008              <bitWidth>1</bitWidth>
84009              <access>read-only</access>
84010              <enumeratedValues>
84011                <enumeratedValue>
84012                  <name>0</name>
84013                  <description>Passive input filter is disabled on the corresponding pin.</description>
84014                  <value>#0</value>
84015                </enumeratedValue>
84016                <enumeratedValue>
84017                  <name>1</name>
84018                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
84019                  <value>#1</value>
84020                </enumeratedValue>
84021              </enumeratedValues>
84022            </field>
84023            <field>
84024              <name>ODE</name>
84025              <description>Open Drain Enable</description>
84026              <bitOffset>5</bitOffset>
84027              <bitWidth>1</bitWidth>
84028              <access>read-only</access>
84029              <enumeratedValues>
84030                <enumeratedValue>
84031                  <name>0</name>
84032                  <description>Open drain output is disabled on the corresponding pin.</description>
84033                  <value>#0</value>
84034                </enumeratedValue>
84035                <enumeratedValue>
84036                  <name>1</name>
84037                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
84038                  <value>#1</value>
84039                </enumeratedValue>
84040              </enumeratedValues>
84041            </field>
84042            <field>
84043              <name>DSE</name>
84044              <description>Drive Strength Enable</description>
84045              <bitOffset>6</bitOffset>
84046              <bitWidth>1</bitWidth>
84047              <access>read-only</access>
84048              <enumeratedValues>
84049                <enumeratedValue>
84050                  <name>0</name>
84051                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
84052                  <value>#0</value>
84053                </enumeratedValue>
84054                <enumeratedValue>
84055                  <name>1</name>
84056                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
84057                  <value>#1</value>
84058                </enumeratedValue>
84059              </enumeratedValues>
84060            </field>
84061            <field>
84062              <name>MUX</name>
84063              <description>Pin Mux Control</description>
84064              <bitOffset>8</bitOffset>
84065              <bitWidth>3</bitWidth>
84066              <access>read-write</access>
84067              <enumeratedValues>
84068                <enumeratedValue>
84069                  <name>000</name>
84070                  <description>Pin disabled (Alternative 0) (analog).</description>
84071                  <value>#000</value>
84072                </enumeratedValue>
84073                <enumeratedValue>
84074                  <name>001</name>
84075                  <description>Alternative 1 (GPIO).</description>
84076                  <value>#001</value>
84077                </enumeratedValue>
84078                <enumeratedValue>
84079                  <name>010</name>
84080                  <description>Alternative 2 (chip-specific).</description>
84081                  <value>#010</value>
84082                </enumeratedValue>
84083                <enumeratedValue>
84084                  <name>011</name>
84085                  <description>Alternative 3 (chip-specific).</description>
84086                  <value>#011</value>
84087                </enumeratedValue>
84088                <enumeratedValue>
84089                  <name>100</name>
84090                  <description>Alternative 4 (chip-specific).</description>
84091                  <value>#100</value>
84092                </enumeratedValue>
84093                <enumeratedValue>
84094                  <name>101</name>
84095                  <description>Alternative 5 (chip-specific).</description>
84096                  <value>#101</value>
84097                </enumeratedValue>
84098                <enumeratedValue>
84099                  <name>110</name>
84100                  <description>Alternative 6 (chip-specific).</description>
84101                  <value>#110</value>
84102                </enumeratedValue>
84103                <enumeratedValue>
84104                  <name>111</name>
84105                  <description>Alternative 7 (chip-specific).</description>
84106                  <value>#111</value>
84107                </enumeratedValue>
84108              </enumeratedValues>
84109            </field>
84110            <field>
84111              <name>LK</name>
84112              <description>Lock Register</description>
84113              <bitOffset>15</bitOffset>
84114              <bitWidth>1</bitWidth>
84115              <access>read-write</access>
84116              <enumeratedValues>
84117                <enumeratedValue>
84118                  <name>0</name>
84119                  <description>Pin Control Register fields [15:0] are not locked.</description>
84120                  <value>#0</value>
84121                </enumeratedValue>
84122                <enumeratedValue>
84123                  <name>1</name>
84124                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
84125                  <value>#1</value>
84126                </enumeratedValue>
84127              </enumeratedValues>
84128            </field>
84129            <field>
84130              <name>IRQC</name>
84131              <description>Interrupt Configuration</description>
84132              <bitOffset>16</bitOffset>
84133              <bitWidth>4</bitWidth>
84134              <access>read-write</access>
84135              <enumeratedValues>
84136                <enumeratedValue>
84137                  <name>0000</name>
84138                  <description>Interrupt Status Flag (ISF) is disabled.</description>
84139                  <value>#0000</value>
84140                </enumeratedValue>
84141                <enumeratedValue>
84142                  <name>0001</name>
84143                  <description>ISF flag and DMA request on rising edge.</description>
84144                  <value>#0001</value>
84145                </enumeratedValue>
84146                <enumeratedValue>
84147                  <name>0010</name>
84148                  <description>ISF flag and DMA request on falling edge.</description>
84149                  <value>#0010</value>
84150                </enumeratedValue>
84151                <enumeratedValue>
84152                  <name>0011</name>
84153                  <description>ISF flag and DMA request on either edge.</description>
84154                  <value>#0011</value>
84155                </enumeratedValue>
84156                <enumeratedValue>
84157                  <name>1000</name>
84158                  <description>ISF flag and Interrupt when logic 0.</description>
84159                  <value>#1000</value>
84160                </enumeratedValue>
84161                <enumeratedValue>
84162                  <name>1001</name>
84163                  <description>ISF flag and Interrupt on rising-edge.</description>
84164                  <value>#1001</value>
84165                </enumeratedValue>
84166                <enumeratedValue>
84167                  <name>1010</name>
84168                  <description>ISF flag and Interrupt on falling-edge.</description>
84169                  <value>#1010</value>
84170                </enumeratedValue>
84171                <enumeratedValue>
84172                  <name>1011</name>
84173                  <description>ISF flag and Interrupt on either edge.</description>
84174                  <value>#1011</value>
84175                </enumeratedValue>
84176                <enumeratedValue>
84177                  <name>1100</name>
84178                  <description>ISF flag and Interrupt when logic 1.</description>
84179                  <value>#1100</value>
84180                </enumeratedValue>
84181              </enumeratedValues>
84182            </field>
84183            <field>
84184              <name>ISF</name>
84185              <description>Interrupt Status Flag</description>
84186              <bitOffset>24</bitOffset>
84187              <bitWidth>1</bitWidth>
84188              <access>read-write</access>
84189              <enumeratedValues>
84190                <enumeratedValue>
84191                  <name>0</name>
84192                  <description>Configured interrupt is not detected.</description>
84193                  <value>#0</value>
84194                </enumeratedValue>
84195                <enumeratedValue>
84196                  <name>1</name>
84197                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
84198                  <value>#1</value>
84199                </enumeratedValue>
84200              </enumeratedValues>
84201            </field>
84202          </fields>
84203        </register>
84204        <register>
84205          <name>PCR29</name>
84206          <description>Pin Control Register n</description>
84207          <addressOffset>0x74</addressOffset>
84208          <size>32</size>
84209          <access>read-write</access>
84210          <resetValue>0</resetValue>
84211          <resetMask>0xFFFFFFFF</resetMask>
84212          <fields>
84213            <field>
84214              <name>PS</name>
84215              <description>Pull Select</description>
84216              <bitOffset>0</bitOffset>
84217              <bitWidth>1</bitWidth>
84218              <access>read-only</access>
84219              <enumeratedValues>
84220                <enumeratedValue>
84221                  <name>0</name>
84222                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
84223                  <value>#0</value>
84224                </enumeratedValue>
84225                <enumeratedValue>
84226                  <name>1</name>
84227                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
84228                  <value>#1</value>
84229                </enumeratedValue>
84230              </enumeratedValues>
84231            </field>
84232            <field>
84233              <name>PE</name>
84234              <description>Pull Enable</description>
84235              <bitOffset>1</bitOffset>
84236              <bitWidth>1</bitWidth>
84237              <access>read-only</access>
84238              <enumeratedValues>
84239                <enumeratedValue>
84240                  <name>0</name>
84241                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
84242                  <value>#0</value>
84243                </enumeratedValue>
84244                <enumeratedValue>
84245                  <name>1</name>
84246                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
84247                  <value>#1</value>
84248                </enumeratedValue>
84249              </enumeratedValues>
84250            </field>
84251            <field>
84252              <name>SRE</name>
84253              <description>Slew Rate Enable</description>
84254              <bitOffset>2</bitOffset>
84255              <bitWidth>1</bitWidth>
84256              <access>read-only</access>
84257              <enumeratedValues>
84258                <enumeratedValue>
84259                  <name>0</name>
84260                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
84261                  <value>#0</value>
84262                </enumeratedValue>
84263                <enumeratedValue>
84264                  <name>1</name>
84265                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
84266                  <value>#1</value>
84267                </enumeratedValue>
84268              </enumeratedValues>
84269            </field>
84270            <field>
84271              <name>PFE</name>
84272              <description>Passive Filter Enable</description>
84273              <bitOffset>4</bitOffset>
84274              <bitWidth>1</bitWidth>
84275              <access>read-only</access>
84276              <enumeratedValues>
84277                <enumeratedValue>
84278                  <name>0</name>
84279                  <description>Passive input filter is disabled on the corresponding pin.</description>
84280                  <value>#0</value>
84281                </enumeratedValue>
84282                <enumeratedValue>
84283                  <name>1</name>
84284                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
84285                  <value>#1</value>
84286                </enumeratedValue>
84287              </enumeratedValues>
84288            </field>
84289            <field>
84290              <name>ODE</name>
84291              <description>Open Drain Enable</description>
84292              <bitOffset>5</bitOffset>
84293              <bitWidth>1</bitWidth>
84294              <access>read-only</access>
84295              <enumeratedValues>
84296                <enumeratedValue>
84297                  <name>0</name>
84298                  <description>Open drain output is disabled on the corresponding pin.</description>
84299                  <value>#0</value>
84300                </enumeratedValue>
84301                <enumeratedValue>
84302                  <name>1</name>
84303                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
84304                  <value>#1</value>
84305                </enumeratedValue>
84306              </enumeratedValues>
84307            </field>
84308            <field>
84309              <name>DSE</name>
84310              <description>Drive Strength Enable</description>
84311              <bitOffset>6</bitOffset>
84312              <bitWidth>1</bitWidth>
84313              <access>read-only</access>
84314              <enumeratedValues>
84315                <enumeratedValue>
84316                  <name>0</name>
84317                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
84318                  <value>#0</value>
84319                </enumeratedValue>
84320                <enumeratedValue>
84321                  <name>1</name>
84322                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
84323                  <value>#1</value>
84324                </enumeratedValue>
84325              </enumeratedValues>
84326            </field>
84327            <field>
84328              <name>MUX</name>
84329              <description>Pin Mux Control</description>
84330              <bitOffset>8</bitOffset>
84331              <bitWidth>3</bitWidth>
84332              <access>read-write</access>
84333              <enumeratedValues>
84334                <enumeratedValue>
84335                  <name>000</name>
84336                  <description>Pin disabled (Alternative 0) (analog).</description>
84337                  <value>#000</value>
84338                </enumeratedValue>
84339                <enumeratedValue>
84340                  <name>001</name>
84341                  <description>Alternative 1 (GPIO).</description>
84342                  <value>#001</value>
84343                </enumeratedValue>
84344                <enumeratedValue>
84345                  <name>010</name>
84346                  <description>Alternative 2 (chip-specific).</description>
84347                  <value>#010</value>
84348                </enumeratedValue>
84349                <enumeratedValue>
84350                  <name>011</name>
84351                  <description>Alternative 3 (chip-specific).</description>
84352                  <value>#011</value>
84353                </enumeratedValue>
84354                <enumeratedValue>
84355                  <name>100</name>
84356                  <description>Alternative 4 (chip-specific).</description>
84357                  <value>#100</value>
84358                </enumeratedValue>
84359                <enumeratedValue>
84360                  <name>101</name>
84361                  <description>Alternative 5 (chip-specific).</description>
84362                  <value>#101</value>
84363                </enumeratedValue>
84364                <enumeratedValue>
84365                  <name>110</name>
84366                  <description>Alternative 6 (chip-specific).</description>
84367                  <value>#110</value>
84368                </enumeratedValue>
84369                <enumeratedValue>
84370                  <name>111</name>
84371                  <description>Alternative 7 (chip-specific).</description>
84372                  <value>#111</value>
84373                </enumeratedValue>
84374              </enumeratedValues>
84375            </field>
84376            <field>
84377              <name>LK</name>
84378              <description>Lock Register</description>
84379              <bitOffset>15</bitOffset>
84380              <bitWidth>1</bitWidth>
84381              <access>read-write</access>
84382              <enumeratedValues>
84383                <enumeratedValue>
84384                  <name>0</name>
84385                  <description>Pin Control Register fields [15:0] are not locked.</description>
84386                  <value>#0</value>
84387                </enumeratedValue>
84388                <enumeratedValue>
84389                  <name>1</name>
84390                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
84391                  <value>#1</value>
84392                </enumeratedValue>
84393              </enumeratedValues>
84394            </field>
84395            <field>
84396              <name>IRQC</name>
84397              <description>Interrupt Configuration</description>
84398              <bitOffset>16</bitOffset>
84399              <bitWidth>4</bitWidth>
84400              <access>read-write</access>
84401              <enumeratedValues>
84402                <enumeratedValue>
84403                  <name>0000</name>
84404                  <description>Interrupt Status Flag (ISF) is disabled.</description>
84405                  <value>#0000</value>
84406                </enumeratedValue>
84407                <enumeratedValue>
84408                  <name>0001</name>
84409                  <description>ISF flag and DMA request on rising edge.</description>
84410                  <value>#0001</value>
84411                </enumeratedValue>
84412                <enumeratedValue>
84413                  <name>0010</name>
84414                  <description>ISF flag and DMA request on falling edge.</description>
84415                  <value>#0010</value>
84416                </enumeratedValue>
84417                <enumeratedValue>
84418                  <name>0011</name>
84419                  <description>ISF flag and DMA request on either edge.</description>
84420                  <value>#0011</value>
84421                </enumeratedValue>
84422                <enumeratedValue>
84423                  <name>1000</name>
84424                  <description>ISF flag and Interrupt when logic 0.</description>
84425                  <value>#1000</value>
84426                </enumeratedValue>
84427                <enumeratedValue>
84428                  <name>1001</name>
84429                  <description>ISF flag and Interrupt on rising-edge.</description>
84430                  <value>#1001</value>
84431                </enumeratedValue>
84432                <enumeratedValue>
84433                  <name>1010</name>
84434                  <description>ISF flag and Interrupt on falling-edge.</description>
84435                  <value>#1010</value>
84436                </enumeratedValue>
84437                <enumeratedValue>
84438                  <name>1011</name>
84439                  <description>ISF flag and Interrupt on either edge.</description>
84440                  <value>#1011</value>
84441                </enumeratedValue>
84442                <enumeratedValue>
84443                  <name>1100</name>
84444                  <description>ISF flag and Interrupt when logic 1.</description>
84445                  <value>#1100</value>
84446                </enumeratedValue>
84447              </enumeratedValues>
84448            </field>
84449            <field>
84450              <name>ISF</name>
84451              <description>Interrupt Status Flag</description>
84452              <bitOffset>24</bitOffset>
84453              <bitWidth>1</bitWidth>
84454              <access>read-write</access>
84455              <enumeratedValues>
84456                <enumeratedValue>
84457                  <name>0</name>
84458                  <description>Configured interrupt is not detected.</description>
84459                  <value>#0</value>
84460                </enumeratedValue>
84461                <enumeratedValue>
84462                  <name>1</name>
84463                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
84464                  <value>#1</value>
84465                </enumeratedValue>
84466              </enumeratedValues>
84467            </field>
84468          </fields>
84469        </register>
84470        <register>
84471          <name>PCR30</name>
84472          <description>Pin Control Register n</description>
84473          <addressOffset>0x78</addressOffset>
84474          <size>32</size>
84475          <access>read-write</access>
84476          <resetValue>0</resetValue>
84477          <resetMask>0xFFFFFFFF</resetMask>
84478          <fields>
84479            <field>
84480              <name>PS</name>
84481              <description>Pull Select</description>
84482              <bitOffset>0</bitOffset>
84483              <bitWidth>1</bitWidth>
84484              <access>read-only</access>
84485              <enumeratedValues>
84486                <enumeratedValue>
84487                  <name>0</name>
84488                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
84489                  <value>#0</value>
84490                </enumeratedValue>
84491                <enumeratedValue>
84492                  <name>1</name>
84493                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
84494                  <value>#1</value>
84495                </enumeratedValue>
84496              </enumeratedValues>
84497            </field>
84498            <field>
84499              <name>PE</name>
84500              <description>Pull Enable</description>
84501              <bitOffset>1</bitOffset>
84502              <bitWidth>1</bitWidth>
84503              <access>read-only</access>
84504              <enumeratedValues>
84505                <enumeratedValue>
84506                  <name>0</name>
84507                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
84508                  <value>#0</value>
84509                </enumeratedValue>
84510                <enumeratedValue>
84511                  <name>1</name>
84512                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
84513                  <value>#1</value>
84514                </enumeratedValue>
84515              </enumeratedValues>
84516            </field>
84517            <field>
84518              <name>SRE</name>
84519              <description>Slew Rate Enable</description>
84520              <bitOffset>2</bitOffset>
84521              <bitWidth>1</bitWidth>
84522              <access>read-only</access>
84523              <enumeratedValues>
84524                <enumeratedValue>
84525                  <name>0</name>
84526                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
84527                  <value>#0</value>
84528                </enumeratedValue>
84529                <enumeratedValue>
84530                  <name>1</name>
84531                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
84532                  <value>#1</value>
84533                </enumeratedValue>
84534              </enumeratedValues>
84535            </field>
84536            <field>
84537              <name>PFE</name>
84538              <description>Passive Filter Enable</description>
84539              <bitOffset>4</bitOffset>
84540              <bitWidth>1</bitWidth>
84541              <access>read-only</access>
84542              <enumeratedValues>
84543                <enumeratedValue>
84544                  <name>0</name>
84545                  <description>Passive input filter is disabled on the corresponding pin.</description>
84546                  <value>#0</value>
84547                </enumeratedValue>
84548                <enumeratedValue>
84549                  <name>1</name>
84550                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
84551                  <value>#1</value>
84552                </enumeratedValue>
84553              </enumeratedValues>
84554            </field>
84555            <field>
84556              <name>ODE</name>
84557              <description>Open Drain Enable</description>
84558              <bitOffset>5</bitOffset>
84559              <bitWidth>1</bitWidth>
84560              <access>read-only</access>
84561              <enumeratedValues>
84562                <enumeratedValue>
84563                  <name>0</name>
84564                  <description>Open drain output is disabled on the corresponding pin.</description>
84565                  <value>#0</value>
84566                </enumeratedValue>
84567                <enumeratedValue>
84568                  <name>1</name>
84569                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
84570                  <value>#1</value>
84571                </enumeratedValue>
84572              </enumeratedValues>
84573            </field>
84574            <field>
84575              <name>DSE</name>
84576              <description>Drive Strength Enable</description>
84577              <bitOffset>6</bitOffset>
84578              <bitWidth>1</bitWidth>
84579              <access>read-only</access>
84580              <enumeratedValues>
84581                <enumeratedValue>
84582                  <name>0</name>
84583                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
84584                  <value>#0</value>
84585                </enumeratedValue>
84586                <enumeratedValue>
84587                  <name>1</name>
84588                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
84589                  <value>#1</value>
84590                </enumeratedValue>
84591              </enumeratedValues>
84592            </field>
84593            <field>
84594              <name>MUX</name>
84595              <description>Pin Mux Control</description>
84596              <bitOffset>8</bitOffset>
84597              <bitWidth>3</bitWidth>
84598              <access>read-write</access>
84599              <enumeratedValues>
84600                <enumeratedValue>
84601                  <name>000</name>
84602                  <description>Pin disabled (Alternative 0) (analog).</description>
84603                  <value>#000</value>
84604                </enumeratedValue>
84605                <enumeratedValue>
84606                  <name>001</name>
84607                  <description>Alternative 1 (GPIO).</description>
84608                  <value>#001</value>
84609                </enumeratedValue>
84610                <enumeratedValue>
84611                  <name>010</name>
84612                  <description>Alternative 2 (chip-specific).</description>
84613                  <value>#010</value>
84614                </enumeratedValue>
84615                <enumeratedValue>
84616                  <name>011</name>
84617                  <description>Alternative 3 (chip-specific).</description>
84618                  <value>#011</value>
84619                </enumeratedValue>
84620                <enumeratedValue>
84621                  <name>100</name>
84622                  <description>Alternative 4 (chip-specific).</description>
84623                  <value>#100</value>
84624                </enumeratedValue>
84625                <enumeratedValue>
84626                  <name>101</name>
84627                  <description>Alternative 5 (chip-specific).</description>
84628                  <value>#101</value>
84629                </enumeratedValue>
84630                <enumeratedValue>
84631                  <name>110</name>
84632                  <description>Alternative 6 (chip-specific).</description>
84633                  <value>#110</value>
84634                </enumeratedValue>
84635                <enumeratedValue>
84636                  <name>111</name>
84637                  <description>Alternative 7 (chip-specific).</description>
84638                  <value>#111</value>
84639                </enumeratedValue>
84640              </enumeratedValues>
84641            </field>
84642            <field>
84643              <name>LK</name>
84644              <description>Lock Register</description>
84645              <bitOffset>15</bitOffset>
84646              <bitWidth>1</bitWidth>
84647              <access>read-write</access>
84648              <enumeratedValues>
84649                <enumeratedValue>
84650                  <name>0</name>
84651                  <description>Pin Control Register fields [15:0] are not locked.</description>
84652                  <value>#0</value>
84653                </enumeratedValue>
84654                <enumeratedValue>
84655                  <name>1</name>
84656                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
84657                  <value>#1</value>
84658                </enumeratedValue>
84659              </enumeratedValues>
84660            </field>
84661            <field>
84662              <name>IRQC</name>
84663              <description>Interrupt Configuration</description>
84664              <bitOffset>16</bitOffset>
84665              <bitWidth>4</bitWidth>
84666              <access>read-write</access>
84667              <enumeratedValues>
84668                <enumeratedValue>
84669                  <name>0000</name>
84670                  <description>Interrupt Status Flag (ISF) is disabled.</description>
84671                  <value>#0000</value>
84672                </enumeratedValue>
84673                <enumeratedValue>
84674                  <name>0001</name>
84675                  <description>ISF flag and DMA request on rising edge.</description>
84676                  <value>#0001</value>
84677                </enumeratedValue>
84678                <enumeratedValue>
84679                  <name>0010</name>
84680                  <description>ISF flag and DMA request on falling edge.</description>
84681                  <value>#0010</value>
84682                </enumeratedValue>
84683                <enumeratedValue>
84684                  <name>0011</name>
84685                  <description>ISF flag and DMA request on either edge.</description>
84686                  <value>#0011</value>
84687                </enumeratedValue>
84688                <enumeratedValue>
84689                  <name>1000</name>
84690                  <description>ISF flag and Interrupt when logic 0.</description>
84691                  <value>#1000</value>
84692                </enumeratedValue>
84693                <enumeratedValue>
84694                  <name>1001</name>
84695                  <description>ISF flag and Interrupt on rising-edge.</description>
84696                  <value>#1001</value>
84697                </enumeratedValue>
84698                <enumeratedValue>
84699                  <name>1010</name>
84700                  <description>ISF flag and Interrupt on falling-edge.</description>
84701                  <value>#1010</value>
84702                </enumeratedValue>
84703                <enumeratedValue>
84704                  <name>1011</name>
84705                  <description>ISF flag and Interrupt on either edge.</description>
84706                  <value>#1011</value>
84707                </enumeratedValue>
84708                <enumeratedValue>
84709                  <name>1100</name>
84710                  <description>ISF flag and Interrupt when logic 1.</description>
84711                  <value>#1100</value>
84712                </enumeratedValue>
84713              </enumeratedValues>
84714            </field>
84715            <field>
84716              <name>ISF</name>
84717              <description>Interrupt Status Flag</description>
84718              <bitOffset>24</bitOffset>
84719              <bitWidth>1</bitWidth>
84720              <access>read-write</access>
84721              <enumeratedValues>
84722                <enumeratedValue>
84723                  <name>0</name>
84724                  <description>Configured interrupt is not detected.</description>
84725                  <value>#0</value>
84726                </enumeratedValue>
84727                <enumeratedValue>
84728                  <name>1</name>
84729                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
84730                  <value>#1</value>
84731                </enumeratedValue>
84732              </enumeratedValues>
84733            </field>
84734          </fields>
84735        </register>
84736        <register>
84737          <name>PCR31</name>
84738          <description>Pin Control Register n</description>
84739          <addressOffset>0x7C</addressOffset>
84740          <size>32</size>
84741          <access>read-write</access>
84742          <resetValue>0</resetValue>
84743          <resetMask>0xFFFFFFFF</resetMask>
84744          <fields>
84745            <field>
84746              <name>PS</name>
84747              <description>Pull Select</description>
84748              <bitOffset>0</bitOffset>
84749              <bitWidth>1</bitWidth>
84750              <access>read-only</access>
84751              <enumeratedValues>
84752                <enumeratedValue>
84753                  <name>0</name>
84754                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
84755                  <value>#0</value>
84756                </enumeratedValue>
84757                <enumeratedValue>
84758                  <name>1</name>
84759                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
84760                  <value>#1</value>
84761                </enumeratedValue>
84762              </enumeratedValues>
84763            </field>
84764            <field>
84765              <name>PE</name>
84766              <description>Pull Enable</description>
84767              <bitOffset>1</bitOffset>
84768              <bitWidth>1</bitWidth>
84769              <access>read-only</access>
84770              <enumeratedValues>
84771                <enumeratedValue>
84772                  <name>0</name>
84773                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
84774                  <value>#0</value>
84775                </enumeratedValue>
84776                <enumeratedValue>
84777                  <name>1</name>
84778                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
84779                  <value>#1</value>
84780                </enumeratedValue>
84781              </enumeratedValues>
84782            </field>
84783            <field>
84784              <name>SRE</name>
84785              <description>Slew Rate Enable</description>
84786              <bitOffset>2</bitOffset>
84787              <bitWidth>1</bitWidth>
84788              <access>read-only</access>
84789              <enumeratedValues>
84790                <enumeratedValue>
84791                  <name>0</name>
84792                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
84793                  <value>#0</value>
84794                </enumeratedValue>
84795                <enumeratedValue>
84796                  <name>1</name>
84797                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
84798                  <value>#1</value>
84799                </enumeratedValue>
84800              </enumeratedValues>
84801            </field>
84802            <field>
84803              <name>PFE</name>
84804              <description>Passive Filter Enable</description>
84805              <bitOffset>4</bitOffset>
84806              <bitWidth>1</bitWidth>
84807              <access>read-only</access>
84808              <enumeratedValues>
84809                <enumeratedValue>
84810                  <name>0</name>
84811                  <description>Passive input filter is disabled on the corresponding pin.</description>
84812                  <value>#0</value>
84813                </enumeratedValue>
84814                <enumeratedValue>
84815                  <name>1</name>
84816                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
84817                  <value>#1</value>
84818                </enumeratedValue>
84819              </enumeratedValues>
84820            </field>
84821            <field>
84822              <name>ODE</name>
84823              <description>Open Drain Enable</description>
84824              <bitOffset>5</bitOffset>
84825              <bitWidth>1</bitWidth>
84826              <access>read-only</access>
84827              <enumeratedValues>
84828                <enumeratedValue>
84829                  <name>0</name>
84830                  <description>Open drain output is disabled on the corresponding pin.</description>
84831                  <value>#0</value>
84832                </enumeratedValue>
84833                <enumeratedValue>
84834                  <name>1</name>
84835                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
84836                  <value>#1</value>
84837                </enumeratedValue>
84838              </enumeratedValues>
84839            </field>
84840            <field>
84841              <name>DSE</name>
84842              <description>Drive Strength Enable</description>
84843              <bitOffset>6</bitOffset>
84844              <bitWidth>1</bitWidth>
84845              <access>read-only</access>
84846              <enumeratedValues>
84847                <enumeratedValue>
84848                  <name>0</name>
84849                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
84850                  <value>#0</value>
84851                </enumeratedValue>
84852                <enumeratedValue>
84853                  <name>1</name>
84854                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
84855                  <value>#1</value>
84856                </enumeratedValue>
84857              </enumeratedValues>
84858            </field>
84859            <field>
84860              <name>MUX</name>
84861              <description>Pin Mux Control</description>
84862              <bitOffset>8</bitOffset>
84863              <bitWidth>3</bitWidth>
84864              <access>read-write</access>
84865              <enumeratedValues>
84866                <enumeratedValue>
84867                  <name>000</name>
84868                  <description>Pin disabled (Alternative 0) (analog).</description>
84869                  <value>#000</value>
84870                </enumeratedValue>
84871                <enumeratedValue>
84872                  <name>001</name>
84873                  <description>Alternative 1 (GPIO).</description>
84874                  <value>#001</value>
84875                </enumeratedValue>
84876                <enumeratedValue>
84877                  <name>010</name>
84878                  <description>Alternative 2 (chip-specific).</description>
84879                  <value>#010</value>
84880                </enumeratedValue>
84881                <enumeratedValue>
84882                  <name>011</name>
84883                  <description>Alternative 3 (chip-specific).</description>
84884                  <value>#011</value>
84885                </enumeratedValue>
84886                <enumeratedValue>
84887                  <name>100</name>
84888                  <description>Alternative 4 (chip-specific).</description>
84889                  <value>#100</value>
84890                </enumeratedValue>
84891                <enumeratedValue>
84892                  <name>101</name>
84893                  <description>Alternative 5 (chip-specific).</description>
84894                  <value>#101</value>
84895                </enumeratedValue>
84896                <enumeratedValue>
84897                  <name>110</name>
84898                  <description>Alternative 6 (chip-specific).</description>
84899                  <value>#110</value>
84900                </enumeratedValue>
84901                <enumeratedValue>
84902                  <name>111</name>
84903                  <description>Alternative 7 (chip-specific).</description>
84904                  <value>#111</value>
84905                </enumeratedValue>
84906              </enumeratedValues>
84907            </field>
84908            <field>
84909              <name>LK</name>
84910              <description>Lock Register</description>
84911              <bitOffset>15</bitOffset>
84912              <bitWidth>1</bitWidth>
84913              <access>read-write</access>
84914              <enumeratedValues>
84915                <enumeratedValue>
84916                  <name>0</name>
84917                  <description>Pin Control Register fields [15:0] are not locked.</description>
84918                  <value>#0</value>
84919                </enumeratedValue>
84920                <enumeratedValue>
84921                  <name>1</name>
84922                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
84923                  <value>#1</value>
84924                </enumeratedValue>
84925              </enumeratedValues>
84926            </field>
84927            <field>
84928              <name>IRQC</name>
84929              <description>Interrupt Configuration</description>
84930              <bitOffset>16</bitOffset>
84931              <bitWidth>4</bitWidth>
84932              <access>read-write</access>
84933              <enumeratedValues>
84934                <enumeratedValue>
84935                  <name>0000</name>
84936                  <description>Interrupt Status Flag (ISF) is disabled.</description>
84937                  <value>#0000</value>
84938                </enumeratedValue>
84939                <enumeratedValue>
84940                  <name>0001</name>
84941                  <description>ISF flag and DMA request on rising edge.</description>
84942                  <value>#0001</value>
84943                </enumeratedValue>
84944                <enumeratedValue>
84945                  <name>0010</name>
84946                  <description>ISF flag and DMA request on falling edge.</description>
84947                  <value>#0010</value>
84948                </enumeratedValue>
84949                <enumeratedValue>
84950                  <name>0011</name>
84951                  <description>ISF flag and DMA request on either edge.</description>
84952                  <value>#0011</value>
84953                </enumeratedValue>
84954                <enumeratedValue>
84955                  <name>1000</name>
84956                  <description>ISF flag and Interrupt when logic 0.</description>
84957                  <value>#1000</value>
84958                </enumeratedValue>
84959                <enumeratedValue>
84960                  <name>1001</name>
84961                  <description>ISF flag and Interrupt on rising-edge.</description>
84962                  <value>#1001</value>
84963                </enumeratedValue>
84964                <enumeratedValue>
84965                  <name>1010</name>
84966                  <description>ISF flag and Interrupt on falling-edge.</description>
84967                  <value>#1010</value>
84968                </enumeratedValue>
84969                <enumeratedValue>
84970                  <name>1011</name>
84971                  <description>ISF flag and Interrupt on either edge.</description>
84972                  <value>#1011</value>
84973                </enumeratedValue>
84974                <enumeratedValue>
84975                  <name>1100</name>
84976                  <description>ISF flag and Interrupt when logic 1.</description>
84977                  <value>#1100</value>
84978                </enumeratedValue>
84979              </enumeratedValues>
84980            </field>
84981            <field>
84982              <name>ISF</name>
84983              <description>Interrupt Status Flag</description>
84984              <bitOffset>24</bitOffset>
84985              <bitWidth>1</bitWidth>
84986              <access>read-write</access>
84987              <enumeratedValues>
84988                <enumeratedValue>
84989                  <name>0</name>
84990                  <description>Configured interrupt is not detected.</description>
84991                  <value>#0</value>
84992                </enumeratedValue>
84993                <enumeratedValue>
84994                  <name>1</name>
84995                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
84996                  <value>#1</value>
84997                </enumeratedValue>
84998              </enumeratedValues>
84999            </field>
85000          </fields>
85001        </register>
85002        <register>
85003          <name>GPCLR</name>
85004          <description>Global Pin Control Low Register</description>
85005          <addressOffset>0x80</addressOffset>
85006          <size>32</size>
85007          <access>write-only</access>
85008          <resetValue>0</resetValue>
85009          <resetMask>0xFFFFFFFF</resetMask>
85010          <fields>
85011            <field>
85012              <name>GPWD</name>
85013              <description>Global Pin Write Data</description>
85014              <bitOffset>0</bitOffset>
85015              <bitWidth>16</bitWidth>
85016              <access>write-only</access>
85017            </field>
85018            <field>
85019              <name>GPWE0</name>
85020              <description>Global Pin Write Enable</description>
85021              <bitOffset>16</bitOffset>
85022              <bitWidth>1</bitWidth>
85023              <access>write-only</access>
85024              <enumeratedValues>
85025                <enumeratedValue>
85026                  <name>0</name>
85027                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85028                  <value>#0</value>
85029                </enumeratedValue>
85030                <enumeratedValue>
85031                  <name>1</name>
85032                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85033                  <value>#1</value>
85034                </enumeratedValue>
85035              </enumeratedValues>
85036            </field>
85037            <field>
85038              <name>GPWE1</name>
85039              <description>Global Pin Write Enable</description>
85040              <bitOffset>17</bitOffset>
85041              <bitWidth>1</bitWidth>
85042              <access>write-only</access>
85043              <enumeratedValues>
85044                <enumeratedValue>
85045                  <name>0</name>
85046                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85047                  <value>#0</value>
85048                </enumeratedValue>
85049                <enumeratedValue>
85050                  <name>1</name>
85051                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85052                  <value>#1</value>
85053                </enumeratedValue>
85054              </enumeratedValues>
85055            </field>
85056            <field>
85057              <name>GPWE2</name>
85058              <description>Global Pin Write Enable</description>
85059              <bitOffset>18</bitOffset>
85060              <bitWidth>1</bitWidth>
85061              <access>write-only</access>
85062              <enumeratedValues>
85063                <enumeratedValue>
85064                  <name>0</name>
85065                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85066                  <value>#0</value>
85067                </enumeratedValue>
85068                <enumeratedValue>
85069                  <name>1</name>
85070                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85071                  <value>#1</value>
85072                </enumeratedValue>
85073              </enumeratedValues>
85074            </field>
85075            <field>
85076              <name>GPWE3</name>
85077              <description>Global Pin Write Enable</description>
85078              <bitOffset>19</bitOffset>
85079              <bitWidth>1</bitWidth>
85080              <access>write-only</access>
85081              <enumeratedValues>
85082                <enumeratedValue>
85083                  <name>0</name>
85084                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85085                  <value>#0</value>
85086                </enumeratedValue>
85087                <enumeratedValue>
85088                  <name>1</name>
85089                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85090                  <value>#1</value>
85091                </enumeratedValue>
85092              </enumeratedValues>
85093            </field>
85094            <field>
85095              <name>GPWE4</name>
85096              <description>Global Pin Write Enable</description>
85097              <bitOffset>20</bitOffset>
85098              <bitWidth>1</bitWidth>
85099              <access>write-only</access>
85100              <enumeratedValues>
85101                <enumeratedValue>
85102                  <name>0</name>
85103                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85104                  <value>#0</value>
85105                </enumeratedValue>
85106                <enumeratedValue>
85107                  <name>1</name>
85108                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85109                  <value>#1</value>
85110                </enumeratedValue>
85111              </enumeratedValues>
85112            </field>
85113            <field>
85114              <name>GPWE5</name>
85115              <description>Global Pin Write Enable</description>
85116              <bitOffset>21</bitOffset>
85117              <bitWidth>1</bitWidth>
85118              <access>write-only</access>
85119              <enumeratedValues>
85120                <enumeratedValue>
85121                  <name>0</name>
85122                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85123                  <value>#0</value>
85124                </enumeratedValue>
85125                <enumeratedValue>
85126                  <name>1</name>
85127                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85128                  <value>#1</value>
85129                </enumeratedValue>
85130              </enumeratedValues>
85131            </field>
85132            <field>
85133              <name>GPWE6</name>
85134              <description>Global Pin Write Enable</description>
85135              <bitOffset>22</bitOffset>
85136              <bitWidth>1</bitWidth>
85137              <access>write-only</access>
85138              <enumeratedValues>
85139                <enumeratedValue>
85140                  <name>0</name>
85141                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85142                  <value>#0</value>
85143                </enumeratedValue>
85144                <enumeratedValue>
85145                  <name>1</name>
85146                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85147                  <value>#1</value>
85148                </enumeratedValue>
85149              </enumeratedValues>
85150            </field>
85151            <field>
85152              <name>GPWE7</name>
85153              <description>Global Pin Write Enable</description>
85154              <bitOffset>23</bitOffset>
85155              <bitWidth>1</bitWidth>
85156              <access>write-only</access>
85157              <enumeratedValues>
85158                <enumeratedValue>
85159                  <name>0</name>
85160                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85161                  <value>#0</value>
85162                </enumeratedValue>
85163                <enumeratedValue>
85164                  <name>1</name>
85165                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85166                  <value>#1</value>
85167                </enumeratedValue>
85168              </enumeratedValues>
85169            </field>
85170            <field>
85171              <name>GPWE8</name>
85172              <description>Global Pin Write Enable</description>
85173              <bitOffset>24</bitOffset>
85174              <bitWidth>1</bitWidth>
85175              <access>write-only</access>
85176              <enumeratedValues>
85177                <enumeratedValue>
85178                  <name>0</name>
85179                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85180                  <value>#0</value>
85181                </enumeratedValue>
85182                <enumeratedValue>
85183                  <name>1</name>
85184                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85185                  <value>#1</value>
85186                </enumeratedValue>
85187              </enumeratedValues>
85188            </field>
85189            <field>
85190              <name>GPWE9</name>
85191              <description>Global Pin Write Enable</description>
85192              <bitOffset>25</bitOffset>
85193              <bitWidth>1</bitWidth>
85194              <access>write-only</access>
85195              <enumeratedValues>
85196                <enumeratedValue>
85197                  <name>0</name>
85198                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85199                  <value>#0</value>
85200                </enumeratedValue>
85201                <enumeratedValue>
85202                  <name>1</name>
85203                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85204                  <value>#1</value>
85205                </enumeratedValue>
85206              </enumeratedValues>
85207            </field>
85208            <field>
85209              <name>GPWE10</name>
85210              <description>Global Pin Write Enable</description>
85211              <bitOffset>26</bitOffset>
85212              <bitWidth>1</bitWidth>
85213              <access>write-only</access>
85214              <enumeratedValues>
85215                <enumeratedValue>
85216                  <name>0</name>
85217                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85218                  <value>#0</value>
85219                </enumeratedValue>
85220                <enumeratedValue>
85221                  <name>1</name>
85222                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85223                  <value>#1</value>
85224                </enumeratedValue>
85225              </enumeratedValues>
85226            </field>
85227            <field>
85228              <name>GPWE11</name>
85229              <description>Global Pin Write Enable</description>
85230              <bitOffset>27</bitOffset>
85231              <bitWidth>1</bitWidth>
85232              <access>write-only</access>
85233              <enumeratedValues>
85234                <enumeratedValue>
85235                  <name>0</name>
85236                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85237                  <value>#0</value>
85238                </enumeratedValue>
85239                <enumeratedValue>
85240                  <name>1</name>
85241                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85242                  <value>#1</value>
85243                </enumeratedValue>
85244              </enumeratedValues>
85245            </field>
85246            <field>
85247              <name>GPWE12</name>
85248              <description>Global Pin Write Enable</description>
85249              <bitOffset>28</bitOffset>
85250              <bitWidth>1</bitWidth>
85251              <access>write-only</access>
85252              <enumeratedValues>
85253                <enumeratedValue>
85254                  <name>0</name>
85255                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85256                  <value>#0</value>
85257                </enumeratedValue>
85258                <enumeratedValue>
85259                  <name>1</name>
85260                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85261                  <value>#1</value>
85262                </enumeratedValue>
85263              </enumeratedValues>
85264            </field>
85265            <field>
85266              <name>GPWE13</name>
85267              <description>Global Pin Write Enable</description>
85268              <bitOffset>29</bitOffset>
85269              <bitWidth>1</bitWidth>
85270              <access>write-only</access>
85271              <enumeratedValues>
85272                <enumeratedValue>
85273                  <name>0</name>
85274                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85275                  <value>#0</value>
85276                </enumeratedValue>
85277                <enumeratedValue>
85278                  <name>1</name>
85279                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85280                  <value>#1</value>
85281                </enumeratedValue>
85282              </enumeratedValues>
85283            </field>
85284            <field>
85285              <name>GPWE14</name>
85286              <description>Global Pin Write Enable</description>
85287              <bitOffset>30</bitOffset>
85288              <bitWidth>1</bitWidth>
85289              <access>write-only</access>
85290              <enumeratedValues>
85291                <enumeratedValue>
85292                  <name>0</name>
85293                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85294                  <value>#0</value>
85295                </enumeratedValue>
85296                <enumeratedValue>
85297                  <name>1</name>
85298                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85299                  <value>#1</value>
85300                </enumeratedValue>
85301              </enumeratedValues>
85302            </field>
85303            <field>
85304              <name>GPWE15</name>
85305              <description>Global Pin Write Enable</description>
85306              <bitOffset>31</bitOffset>
85307              <bitWidth>1</bitWidth>
85308              <access>write-only</access>
85309              <enumeratedValues>
85310                <enumeratedValue>
85311                  <name>0</name>
85312                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85313                  <value>#0</value>
85314                </enumeratedValue>
85315                <enumeratedValue>
85316                  <name>1</name>
85317                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85318                  <value>#1</value>
85319                </enumeratedValue>
85320              </enumeratedValues>
85321            </field>
85322          </fields>
85323        </register>
85324        <register>
85325          <name>GPCHR</name>
85326          <description>Global Pin Control High Register</description>
85327          <addressOffset>0x84</addressOffset>
85328          <size>32</size>
85329          <access>write-only</access>
85330          <resetValue>0</resetValue>
85331          <resetMask>0xFFFFFFFF</resetMask>
85332          <fields>
85333            <field>
85334              <name>GPWD</name>
85335              <description>Global Pin Write Data</description>
85336              <bitOffset>0</bitOffset>
85337              <bitWidth>16</bitWidth>
85338              <access>write-only</access>
85339            </field>
85340            <field>
85341              <name>GPWE0</name>
85342              <description>Global Pin Write Enable</description>
85343              <bitOffset>16</bitOffset>
85344              <bitWidth>1</bitWidth>
85345              <access>write-only</access>
85346              <enumeratedValues>
85347                <enumeratedValue>
85348                  <name>0</name>
85349                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85350                  <value>#0</value>
85351                </enumeratedValue>
85352                <enumeratedValue>
85353                  <name>1</name>
85354                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85355                  <value>#1</value>
85356                </enumeratedValue>
85357              </enumeratedValues>
85358            </field>
85359            <field>
85360              <name>GPWE1</name>
85361              <description>Global Pin Write Enable</description>
85362              <bitOffset>17</bitOffset>
85363              <bitWidth>1</bitWidth>
85364              <access>write-only</access>
85365              <enumeratedValues>
85366                <enumeratedValue>
85367                  <name>0</name>
85368                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85369                  <value>#0</value>
85370                </enumeratedValue>
85371                <enumeratedValue>
85372                  <name>1</name>
85373                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85374                  <value>#1</value>
85375                </enumeratedValue>
85376              </enumeratedValues>
85377            </field>
85378            <field>
85379              <name>GPWE2</name>
85380              <description>Global Pin Write Enable</description>
85381              <bitOffset>18</bitOffset>
85382              <bitWidth>1</bitWidth>
85383              <access>write-only</access>
85384              <enumeratedValues>
85385                <enumeratedValue>
85386                  <name>0</name>
85387                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85388                  <value>#0</value>
85389                </enumeratedValue>
85390                <enumeratedValue>
85391                  <name>1</name>
85392                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85393                  <value>#1</value>
85394                </enumeratedValue>
85395              </enumeratedValues>
85396            </field>
85397            <field>
85398              <name>GPWE3</name>
85399              <description>Global Pin Write Enable</description>
85400              <bitOffset>19</bitOffset>
85401              <bitWidth>1</bitWidth>
85402              <access>write-only</access>
85403              <enumeratedValues>
85404                <enumeratedValue>
85405                  <name>0</name>
85406                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85407                  <value>#0</value>
85408                </enumeratedValue>
85409                <enumeratedValue>
85410                  <name>1</name>
85411                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85412                  <value>#1</value>
85413                </enumeratedValue>
85414              </enumeratedValues>
85415            </field>
85416            <field>
85417              <name>GPWE4</name>
85418              <description>Global Pin Write Enable</description>
85419              <bitOffset>20</bitOffset>
85420              <bitWidth>1</bitWidth>
85421              <access>write-only</access>
85422              <enumeratedValues>
85423                <enumeratedValue>
85424                  <name>0</name>
85425                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85426                  <value>#0</value>
85427                </enumeratedValue>
85428                <enumeratedValue>
85429                  <name>1</name>
85430                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85431                  <value>#1</value>
85432                </enumeratedValue>
85433              </enumeratedValues>
85434            </field>
85435            <field>
85436              <name>GPWE5</name>
85437              <description>Global Pin Write Enable</description>
85438              <bitOffset>21</bitOffset>
85439              <bitWidth>1</bitWidth>
85440              <access>write-only</access>
85441              <enumeratedValues>
85442                <enumeratedValue>
85443                  <name>0</name>
85444                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85445                  <value>#0</value>
85446                </enumeratedValue>
85447                <enumeratedValue>
85448                  <name>1</name>
85449                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85450                  <value>#1</value>
85451                </enumeratedValue>
85452              </enumeratedValues>
85453            </field>
85454            <field>
85455              <name>GPWE6</name>
85456              <description>Global Pin Write Enable</description>
85457              <bitOffset>22</bitOffset>
85458              <bitWidth>1</bitWidth>
85459              <access>write-only</access>
85460              <enumeratedValues>
85461                <enumeratedValue>
85462                  <name>0</name>
85463                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85464                  <value>#0</value>
85465                </enumeratedValue>
85466                <enumeratedValue>
85467                  <name>1</name>
85468                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85469                  <value>#1</value>
85470                </enumeratedValue>
85471              </enumeratedValues>
85472            </field>
85473            <field>
85474              <name>GPWE7</name>
85475              <description>Global Pin Write Enable</description>
85476              <bitOffset>23</bitOffset>
85477              <bitWidth>1</bitWidth>
85478              <access>write-only</access>
85479              <enumeratedValues>
85480                <enumeratedValue>
85481                  <name>0</name>
85482                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85483                  <value>#0</value>
85484                </enumeratedValue>
85485                <enumeratedValue>
85486                  <name>1</name>
85487                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85488                  <value>#1</value>
85489                </enumeratedValue>
85490              </enumeratedValues>
85491            </field>
85492            <field>
85493              <name>GPWE8</name>
85494              <description>Global Pin Write Enable</description>
85495              <bitOffset>24</bitOffset>
85496              <bitWidth>1</bitWidth>
85497              <access>write-only</access>
85498              <enumeratedValues>
85499                <enumeratedValue>
85500                  <name>0</name>
85501                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85502                  <value>#0</value>
85503                </enumeratedValue>
85504                <enumeratedValue>
85505                  <name>1</name>
85506                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85507                  <value>#1</value>
85508                </enumeratedValue>
85509              </enumeratedValues>
85510            </field>
85511            <field>
85512              <name>GPWE9</name>
85513              <description>Global Pin Write Enable</description>
85514              <bitOffset>25</bitOffset>
85515              <bitWidth>1</bitWidth>
85516              <access>write-only</access>
85517              <enumeratedValues>
85518                <enumeratedValue>
85519                  <name>0</name>
85520                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85521                  <value>#0</value>
85522                </enumeratedValue>
85523                <enumeratedValue>
85524                  <name>1</name>
85525                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85526                  <value>#1</value>
85527                </enumeratedValue>
85528              </enumeratedValues>
85529            </field>
85530            <field>
85531              <name>GPWE10</name>
85532              <description>Global Pin Write Enable</description>
85533              <bitOffset>26</bitOffset>
85534              <bitWidth>1</bitWidth>
85535              <access>write-only</access>
85536              <enumeratedValues>
85537                <enumeratedValue>
85538                  <name>0</name>
85539                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85540                  <value>#0</value>
85541                </enumeratedValue>
85542                <enumeratedValue>
85543                  <name>1</name>
85544                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85545                  <value>#1</value>
85546                </enumeratedValue>
85547              </enumeratedValues>
85548            </field>
85549            <field>
85550              <name>GPWE11</name>
85551              <description>Global Pin Write Enable</description>
85552              <bitOffset>27</bitOffset>
85553              <bitWidth>1</bitWidth>
85554              <access>write-only</access>
85555              <enumeratedValues>
85556                <enumeratedValue>
85557                  <name>0</name>
85558                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85559                  <value>#0</value>
85560                </enumeratedValue>
85561                <enumeratedValue>
85562                  <name>1</name>
85563                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85564                  <value>#1</value>
85565                </enumeratedValue>
85566              </enumeratedValues>
85567            </field>
85568            <field>
85569              <name>GPWE12</name>
85570              <description>Global Pin Write Enable</description>
85571              <bitOffset>28</bitOffset>
85572              <bitWidth>1</bitWidth>
85573              <access>write-only</access>
85574              <enumeratedValues>
85575                <enumeratedValue>
85576                  <name>0</name>
85577                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85578                  <value>#0</value>
85579                </enumeratedValue>
85580                <enumeratedValue>
85581                  <name>1</name>
85582                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85583                  <value>#1</value>
85584                </enumeratedValue>
85585              </enumeratedValues>
85586            </field>
85587            <field>
85588              <name>GPWE13</name>
85589              <description>Global Pin Write Enable</description>
85590              <bitOffset>29</bitOffset>
85591              <bitWidth>1</bitWidth>
85592              <access>write-only</access>
85593              <enumeratedValues>
85594                <enumeratedValue>
85595                  <name>0</name>
85596                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85597                  <value>#0</value>
85598                </enumeratedValue>
85599                <enumeratedValue>
85600                  <name>1</name>
85601                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85602                  <value>#1</value>
85603                </enumeratedValue>
85604              </enumeratedValues>
85605            </field>
85606            <field>
85607              <name>GPWE14</name>
85608              <description>Global Pin Write Enable</description>
85609              <bitOffset>30</bitOffset>
85610              <bitWidth>1</bitWidth>
85611              <access>write-only</access>
85612              <enumeratedValues>
85613                <enumeratedValue>
85614                  <name>0</name>
85615                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85616                  <value>#0</value>
85617                </enumeratedValue>
85618                <enumeratedValue>
85619                  <name>1</name>
85620                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85621                  <value>#1</value>
85622                </enumeratedValue>
85623              </enumeratedValues>
85624            </field>
85625            <field>
85626              <name>GPWE15</name>
85627              <description>Global Pin Write Enable</description>
85628              <bitOffset>31</bitOffset>
85629              <bitWidth>1</bitWidth>
85630              <access>write-only</access>
85631              <enumeratedValues>
85632                <enumeratedValue>
85633                  <name>0</name>
85634                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
85635                  <value>#0</value>
85636                </enumeratedValue>
85637                <enumeratedValue>
85638                  <name>1</name>
85639                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
85640                  <value>#1</value>
85641                </enumeratedValue>
85642              </enumeratedValues>
85643            </field>
85644          </fields>
85645        </register>
85646        <register>
85647          <name>ISFR</name>
85648          <description>Interrupt Status Flag Register</description>
85649          <addressOffset>0xA0</addressOffset>
85650          <size>32</size>
85651          <access>read-write</access>
85652          <resetValue>0</resetValue>
85653          <resetMask>0xFFFFFFFF</resetMask>
85654          <fields>
85655            <field>
85656              <name>ISF0</name>
85657              <description>Interrupt Status Flag</description>
85658              <bitOffset>0</bitOffset>
85659              <bitWidth>1</bitWidth>
85660              <access>read-write</access>
85661              <enumeratedValues>
85662                <enumeratedValue>
85663                  <name>0</name>
85664                  <description>Configured interrupt is not detected.</description>
85665                  <value>#0</value>
85666                </enumeratedValue>
85667                <enumeratedValue>
85668                  <name>1</name>
85669                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85670                  <value>#1</value>
85671                </enumeratedValue>
85672              </enumeratedValues>
85673            </field>
85674            <field>
85675              <name>ISF1</name>
85676              <description>Interrupt Status Flag</description>
85677              <bitOffset>1</bitOffset>
85678              <bitWidth>1</bitWidth>
85679              <access>read-write</access>
85680              <enumeratedValues>
85681                <enumeratedValue>
85682                  <name>0</name>
85683                  <description>Configured interrupt is not detected.</description>
85684                  <value>#0</value>
85685                </enumeratedValue>
85686                <enumeratedValue>
85687                  <name>1</name>
85688                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85689                  <value>#1</value>
85690                </enumeratedValue>
85691              </enumeratedValues>
85692            </field>
85693            <field>
85694              <name>ISF2</name>
85695              <description>Interrupt Status Flag</description>
85696              <bitOffset>2</bitOffset>
85697              <bitWidth>1</bitWidth>
85698              <access>read-write</access>
85699              <enumeratedValues>
85700                <enumeratedValue>
85701                  <name>0</name>
85702                  <description>Configured interrupt is not detected.</description>
85703                  <value>#0</value>
85704                </enumeratedValue>
85705                <enumeratedValue>
85706                  <name>1</name>
85707                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85708                  <value>#1</value>
85709                </enumeratedValue>
85710              </enumeratedValues>
85711            </field>
85712            <field>
85713              <name>ISF3</name>
85714              <description>Interrupt Status Flag</description>
85715              <bitOffset>3</bitOffset>
85716              <bitWidth>1</bitWidth>
85717              <access>read-write</access>
85718              <enumeratedValues>
85719                <enumeratedValue>
85720                  <name>0</name>
85721                  <description>Configured interrupt is not detected.</description>
85722                  <value>#0</value>
85723                </enumeratedValue>
85724                <enumeratedValue>
85725                  <name>1</name>
85726                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85727                  <value>#1</value>
85728                </enumeratedValue>
85729              </enumeratedValues>
85730            </field>
85731            <field>
85732              <name>ISF4</name>
85733              <description>Interrupt Status Flag</description>
85734              <bitOffset>4</bitOffset>
85735              <bitWidth>1</bitWidth>
85736              <access>read-write</access>
85737              <enumeratedValues>
85738                <enumeratedValue>
85739                  <name>0</name>
85740                  <description>Configured interrupt is not detected.</description>
85741                  <value>#0</value>
85742                </enumeratedValue>
85743                <enumeratedValue>
85744                  <name>1</name>
85745                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85746                  <value>#1</value>
85747                </enumeratedValue>
85748              </enumeratedValues>
85749            </field>
85750            <field>
85751              <name>ISF5</name>
85752              <description>Interrupt Status Flag</description>
85753              <bitOffset>5</bitOffset>
85754              <bitWidth>1</bitWidth>
85755              <access>read-write</access>
85756              <enumeratedValues>
85757                <enumeratedValue>
85758                  <name>0</name>
85759                  <description>Configured interrupt is not detected.</description>
85760                  <value>#0</value>
85761                </enumeratedValue>
85762                <enumeratedValue>
85763                  <name>1</name>
85764                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85765                  <value>#1</value>
85766                </enumeratedValue>
85767              </enumeratedValues>
85768            </field>
85769            <field>
85770              <name>ISF6</name>
85771              <description>Interrupt Status Flag</description>
85772              <bitOffset>6</bitOffset>
85773              <bitWidth>1</bitWidth>
85774              <access>read-write</access>
85775              <enumeratedValues>
85776                <enumeratedValue>
85777                  <name>0</name>
85778                  <description>Configured interrupt is not detected.</description>
85779                  <value>#0</value>
85780                </enumeratedValue>
85781                <enumeratedValue>
85782                  <name>1</name>
85783                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85784                  <value>#1</value>
85785                </enumeratedValue>
85786              </enumeratedValues>
85787            </field>
85788            <field>
85789              <name>ISF7</name>
85790              <description>Interrupt Status Flag</description>
85791              <bitOffset>7</bitOffset>
85792              <bitWidth>1</bitWidth>
85793              <access>read-write</access>
85794              <enumeratedValues>
85795                <enumeratedValue>
85796                  <name>0</name>
85797                  <description>Configured interrupt is not detected.</description>
85798                  <value>#0</value>
85799                </enumeratedValue>
85800                <enumeratedValue>
85801                  <name>1</name>
85802                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85803                  <value>#1</value>
85804                </enumeratedValue>
85805              </enumeratedValues>
85806            </field>
85807            <field>
85808              <name>ISF8</name>
85809              <description>Interrupt Status Flag</description>
85810              <bitOffset>8</bitOffset>
85811              <bitWidth>1</bitWidth>
85812              <access>read-write</access>
85813              <enumeratedValues>
85814                <enumeratedValue>
85815                  <name>0</name>
85816                  <description>Configured interrupt is not detected.</description>
85817                  <value>#0</value>
85818                </enumeratedValue>
85819                <enumeratedValue>
85820                  <name>1</name>
85821                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85822                  <value>#1</value>
85823                </enumeratedValue>
85824              </enumeratedValues>
85825            </field>
85826            <field>
85827              <name>ISF9</name>
85828              <description>Interrupt Status Flag</description>
85829              <bitOffset>9</bitOffset>
85830              <bitWidth>1</bitWidth>
85831              <access>read-write</access>
85832              <enumeratedValues>
85833                <enumeratedValue>
85834                  <name>0</name>
85835                  <description>Configured interrupt is not detected.</description>
85836                  <value>#0</value>
85837                </enumeratedValue>
85838                <enumeratedValue>
85839                  <name>1</name>
85840                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85841                  <value>#1</value>
85842                </enumeratedValue>
85843              </enumeratedValues>
85844            </field>
85845            <field>
85846              <name>ISF10</name>
85847              <description>Interrupt Status Flag</description>
85848              <bitOffset>10</bitOffset>
85849              <bitWidth>1</bitWidth>
85850              <access>read-write</access>
85851              <enumeratedValues>
85852                <enumeratedValue>
85853                  <name>0</name>
85854                  <description>Configured interrupt is not detected.</description>
85855                  <value>#0</value>
85856                </enumeratedValue>
85857                <enumeratedValue>
85858                  <name>1</name>
85859                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85860                  <value>#1</value>
85861                </enumeratedValue>
85862              </enumeratedValues>
85863            </field>
85864            <field>
85865              <name>ISF11</name>
85866              <description>Interrupt Status Flag</description>
85867              <bitOffset>11</bitOffset>
85868              <bitWidth>1</bitWidth>
85869              <access>read-write</access>
85870              <enumeratedValues>
85871                <enumeratedValue>
85872                  <name>0</name>
85873                  <description>Configured interrupt is not detected.</description>
85874                  <value>#0</value>
85875                </enumeratedValue>
85876                <enumeratedValue>
85877                  <name>1</name>
85878                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85879                  <value>#1</value>
85880                </enumeratedValue>
85881              </enumeratedValues>
85882            </field>
85883            <field>
85884              <name>ISF12</name>
85885              <description>Interrupt Status Flag</description>
85886              <bitOffset>12</bitOffset>
85887              <bitWidth>1</bitWidth>
85888              <access>read-write</access>
85889              <enumeratedValues>
85890                <enumeratedValue>
85891                  <name>0</name>
85892                  <description>Configured interrupt is not detected.</description>
85893                  <value>#0</value>
85894                </enumeratedValue>
85895                <enumeratedValue>
85896                  <name>1</name>
85897                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85898                  <value>#1</value>
85899                </enumeratedValue>
85900              </enumeratedValues>
85901            </field>
85902            <field>
85903              <name>ISF13</name>
85904              <description>Interrupt Status Flag</description>
85905              <bitOffset>13</bitOffset>
85906              <bitWidth>1</bitWidth>
85907              <access>read-write</access>
85908              <enumeratedValues>
85909                <enumeratedValue>
85910                  <name>0</name>
85911                  <description>Configured interrupt is not detected.</description>
85912                  <value>#0</value>
85913                </enumeratedValue>
85914                <enumeratedValue>
85915                  <name>1</name>
85916                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85917                  <value>#1</value>
85918                </enumeratedValue>
85919              </enumeratedValues>
85920            </field>
85921            <field>
85922              <name>ISF14</name>
85923              <description>Interrupt Status Flag</description>
85924              <bitOffset>14</bitOffset>
85925              <bitWidth>1</bitWidth>
85926              <access>read-write</access>
85927              <enumeratedValues>
85928                <enumeratedValue>
85929                  <name>0</name>
85930                  <description>Configured interrupt is not detected.</description>
85931                  <value>#0</value>
85932                </enumeratedValue>
85933                <enumeratedValue>
85934                  <name>1</name>
85935                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85936                  <value>#1</value>
85937                </enumeratedValue>
85938              </enumeratedValues>
85939            </field>
85940            <field>
85941              <name>ISF15</name>
85942              <description>Interrupt Status Flag</description>
85943              <bitOffset>15</bitOffset>
85944              <bitWidth>1</bitWidth>
85945              <access>read-write</access>
85946              <enumeratedValues>
85947                <enumeratedValue>
85948                  <name>0</name>
85949                  <description>Configured interrupt is not detected.</description>
85950                  <value>#0</value>
85951                </enumeratedValue>
85952                <enumeratedValue>
85953                  <name>1</name>
85954                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85955                  <value>#1</value>
85956                </enumeratedValue>
85957              </enumeratedValues>
85958            </field>
85959            <field>
85960              <name>ISF16</name>
85961              <description>Interrupt Status Flag</description>
85962              <bitOffset>16</bitOffset>
85963              <bitWidth>1</bitWidth>
85964              <access>read-write</access>
85965              <enumeratedValues>
85966                <enumeratedValue>
85967                  <name>0</name>
85968                  <description>Configured interrupt is not detected.</description>
85969                  <value>#0</value>
85970                </enumeratedValue>
85971                <enumeratedValue>
85972                  <name>1</name>
85973                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85974                  <value>#1</value>
85975                </enumeratedValue>
85976              </enumeratedValues>
85977            </field>
85978            <field>
85979              <name>ISF17</name>
85980              <description>Interrupt Status Flag</description>
85981              <bitOffset>17</bitOffset>
85982              <bitWidth>1</bitWidth>
85983              <access>read-write</access>
85984              <enumeratedValues>
85985                <enumeratedValue>
85986                  <name>0</name>
85987                  <description>Configured interrupt is not detected.</description>
85988                  <value>#0</value>
85989                </enumeratedValue>
85990                <enumeratedValue>
85991                  <name>1</name>
85992                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
85993                  <value>#1</value>
85994                </enumeratedValue>
85995              </enumeratedValues>
85996            </field>
85997            <field>
85998              <name>ISF18</name>
85999              <description>Interrupt Status Flag</description>
86000              <bitOffset>18</bitOffset>
86001              <bitWidth>1</bitWidth>
86002              <access>read-write</access>
86003              <enumeratedValues>
86004                <enumeratedValue>
86005                  <name>0</name>
86006                  <description>Configured interrupt is not detected.</description>
86007                  <value>#0</value>
86008                </enumeratedValue>
86009                <enumeratedValue>
86010                  <name>1</name>
86011                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86012                  <value>#1</value>
86013                </enumeratedValue>
86014              </enumeratedValues>
86015            </field>
86016            <field>
86017              <name>ISF19</name>
86018              <description>Interrupt Status Flag</description>
86019              <bitOffset>19</bitOffset>
86020              <bitWidth>1</bitWidth>
86021              <access>read-write</access>
86022              <enumeratedValues>
86023                <enumeratedValue>
86024                  <name>0</name>
86025                  <description>Configured interrupt is not detected.</description>
86026                  <value>#0</value>
86027                </enumeratedValue>
86028                <enumeratedValue>
86029                  <name>1</name>
86030                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86031                  <value>#1</value>
86032                </enumeratedValue>
86033              </enumeratedValues>
86034            </field>
86035            <field>
86036              <name>ISF20</name>
86037              <description>Interrupt Status Flag</description>
86038              <bitOffset>20</bitOffset>
86039              <bitWidth>1</bitWidth>
86040              <access>read-write</access>
86041              <enumeratedValues>
86042                <enumeratedValue>
86043                  <name>0</name>
86044                  <description>Configured interrupt is not detected.</description>
86045                  <value>#0</value>
86046                </enumeratedValue>
86047                <enumeratedValue>
86048                  <name>1</name>
86049                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86050                  <value>#1</value>
86051                </enumeratedValue>
86052              </enumeratedValues>
86053            </field>
86054            <field>
86055              <name>ISF21</name>
86056              <description>Interrupt Status Flag</description>
86057              <bitOffset>21</bitOffset>
86058              <bitWidth>1</bitWidth>
86059              <access>read-write</access>
86060              <enumeratedValues>
86061                <enumeratedValue>
86062                  <name>0</name>
86063                  <description>Configured interrupt is not detected.</description>
86064                  <value>#0</value>
86065                </enumeratedValue>
86066                <enumeratedValue>
86067                  <name>1</name>
86068                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86069                  <value>#1</value>
86070                </enumeratedValue>
86071              </enumeratedValues>
86072            </field>
86073            <field>
86074              <name>ISF22</name>
86075              <description>Interrupt Status Flag</description>
86076              <bitOffset>22</bitOffset>
86077              <bitWidth>1</bitWidth>
86078              <access>read-write</access>
86079              <enumeratedValues>
86080                <enumeratedValue>
86081                  <name>0</name>
86082                  <description>Configured interrupt is not detected.</description>
86083                  <value>#0</value>
86084                </enumeratedValue>
86085                <enumeratedValue>
86086                  <name>1</name>
86087                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86088                  <value>#1</value>
86089                </enumeratedValue>
86090              </enumeratedValues>
86091            </field>
86092            <field>
86093              <name>ISF23</name>
86094              <description>Interrupt Status Flag</description>
86095              <bitOffset>23</bitOffset>
86096              <bitWidth>1</bitWidth>
86097              <access>read-write</access>
86098              <enumeratedValues>
86099                <enumeratedValue>
86100                  <name>0</name>
86101                  <description>Configured interrupt is not detected.</description>
86102                  <value>#0</value>
86103                </enumeratedValue>
86104                <enumeratedValue>
86105                  <name>1</name>
86106                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86107                  <value>#1</value>
86108                </enumeratedValue>
86109              </enumeratedValues>
86110            </field>
86111            <field>
86112              <name>ISF24</name>
86113              <description>Interrupt Status Flag</description>
86114              <bitOffset>24</bitOffset>
86115              <bitWidth>1</bitWidth>
86116              <access>read-write</access>
86117              <enumeratedValues>
86118                <enumeratedValue>
86119                  <name>0</name>
86120                  <description>Configured interrupt is not detected.</description>
86121                  <value>#0</value>
86122                </enumeratedValue>
86123                <enumeratedValue>
86124                  <name>1</name>
86125                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86126                  <value>#1</value>
86127                </enumeratedValue>
86128              </enumeratedValues>
86129            </field>
86130            <field>
86131              <name>ISF25</name>
86132              <description>Interrupt Status Flag</description>
86133              <bitOffset>25</bitOffset>
86134              <bitWidth>1</bitWidth>
86135              <access>read-write</access>
86136              <enumeratedValues>
86137                <enumeratedValue>
86138                  <name>0</name>
86139                  <description>Configured interrupt is not detected.</description>
86140                  <value>#0</value>
86141                </enumeratedValue>
86142                <enumeratedValue>
86143                  <name>1</name>
86144                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86145                  <value>#1</value>
86146                </enumeratedValue>
86147              </enumeratedValues>
86148            </field>
86149            <field>
86150              <name>ISF26</name>
86151              <description>Interrupt Status Flag</description>
86152              <bitOffset>26</bitOffset>
86153              <bitWidth>1</bitWidth>
86154              <access>read-write</access>
86155              <enumeratedValues>
86156                <enumeratedValue>
86157                  <name>0</name>
86158                  <description>Configured interrupt is not detected.</description>
86159                  <value>#0</value>
86160                </enumeratedValue>
86161                <enumeratedValue>
86162                  <name>1</name>
86163                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86164                  <value>#1</value>
86165                </enumeratedValue>
86166              </enumeratedValues>
86167            </field>
86168            <field>
86169              <name>ISF27</name>
86170              <description>Interrupt Status Flag</description>
86171              <bitOffset>27</bitOffset>
86172              <bitWidth>1</bitWidth>
86173              <access>read-write</access>
86174              <enumeratedValues>
86175                <enumeratedValue>
86176                  <name>0</name>
86177                  <description>Configured interrupt is not detected.</description>
86178                  <value>#0</value>
86179                </enumeratedValue>
86180                <enumeratedValue>
86181                  <name>1</name>
86182                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86183                  <value>#1</value>
86184                </enumeratedValue>
86185              </enumeratedValues>
86186            </field>
86187            <field>
86188              <name>ISF28</name>
86189              <description>Interrupt Status Flag</description>
86190              <bitOffset>28</bitOffset>
86191              <bitWidth>1</bitWidth>
86192              <access>read-write</access>
86193              <enumeratedValues>
86194                <enumeratedValue>
86195                  <name>0</name>
86196                  <description>Configured interrupt is not detected.</description>
86197                  <value>#0</value>
86198                </enumeratedValue>
86199                <enumeratedValue>
86200                  <name>1</name>
86201                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86202                  <value>#1</value>
86203                </enumeratedValue>
86204              </enumeratedValues>
86205            </field>
86206            <field>
86207              <name>ISF29</name>
86208              <description>Interrupt Status Flag</description>
86209              <bitOffset>29</bitOffset>
86210              <bitWidth>1</bitWidth>
86211              <access>read-write</access>
86212              <enumeratedValues>
86213                <enumeratedValue>
86214                  <name>0</name>
86215                  <description>Configured interrupt is not detected.</description>
86216                  <value>#0</value>
86217                </enumeratedValue>
86218                <enumeratedValue>
86219                  <name>1</name>
86220                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86221                  <value>#1</value>
86222                </enumeratedValue>
86223              </enumeratedValues>
86224            </field>
86225            <field>
86226              <name>ISF30</name>
86227              <description>Interrupt Status Flag</description>
86228              <bitOffset>30</bitOffset>
86229              <bitWidth>1</bitWidth>
86230              <access>read-write</access>
86231              <enumeratedValues>
86232                <enumeratedValue>
86233                  <name>0</name>
86234                  <description>Configured interrupt is not detected.</description>
86235                  <value>#0</value>
86236                </enumeratedValue>
86237                <enumeratedValue>
86238                  <name>1</name>
86239                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86240                  <value>#1</value>
86241                </enumeratedValue>
86242              </enumeratedValues>
86243            </field>
86244            <field>
86245              <name>ISF31</name>
86246              <description>Interrupt Status Flag</description>
86247              <bitOffset>31</bitOffset>
86248              <bitWidth>1</bitWidth>
86249              <access>read-write</access>
86250              <enumeratedValues>
86251                <enumeratedValue>
86252                  <name>0</name>
86253                  <description>Configured interrupt is not detected.</description>
86254                  <value>#0</value>
86255                </enumeratedValue>
86256                <enumeratedValue>
86257                  <name>1</name>
86258                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86259                  <value>#1</value>
86260                </enumeratedValue>
86261              </enumeratedValues>
86262            </field>
86263          </fields>
86264        </register>
86265      </registers>
86266    </peripheral>
86267    <peripheral>
86268      <name>PORTD</name>
86269      <description>Pin Control and Interrupts</description>
86270      <groupName>PORT</groupName>
86271      <prependToName>PORTD_</prependToName>
86272      <baseAddress>0x4004C000</baseAddress>
86273      <addressBlock>
86274        <offset>0</offset>
86275        <size>0xCC</size>
86276        <usage>registers</usage>
86277      </addressBlock>
86278      <interrupt>
86279        <name>PORTD</name>
86280        <value>62</value>
86281      </interrupt>
86282      <registers>
86283        <register>
86284          <name>PCR0</name>
86285          <description>Pin Control Register n</description>
86286          <addressOffset>0</addressOffset>
86287          <size>32</size>
86288          <access>read-write</access>
86289          <resetValue>0</resetValue>
86290          <resetMask>0xFFFFFFFF</resetMask>
86291          <fields>
86292            <field>
86293              <name>PS</name>
86294              <description>Pull Select</description>
86295              <bitOffset>0</bitOffset>
86296              <bitWidth>1</bitWidth>
86297              <access>read-write</access>
86298              <enumeratedValues>
86299                <enumeratedValue>
86300                  <name>0</name>
86301                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
86302                  <value>#0</value>
86303                </enumeratedValue>
86304                <enumeratedValue>
86305                  <name>1</name>
86306                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
86307                  <value>#1</value>
86308                </enumeratedValue>
86309              </enumeratedValues>
86310            </field>
86311            <field>
86312              <name>PE</name>
86313              <description>Pull Enable</description>
86314              <bitOffset>1</bitOffset>
86315              <bitWidth>1</bitWidth>
86316              <access>read-write</access>
86317              <enumeratedValues>
86318                <enumeratedValue>
86319                  <name>0</name>
86320                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
86321                  <value>#0</value>
86322                </enumeratedValue>
86323                <enumeratedValue>
86324                  <name>1</name>
86325                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
86326                  <value>#1</value>
86327                </enumeratedValue>
86328              </enumeratedValues>
86329            </field>
86330            <field>
86331              <name>SRE</name>
86332              <description>Slew Rate Enable</description>
86333              <bitOffset>2</bitOffset>
86334              <bitWidth>1</bitWidth>
86335              <access>read-write</access>
86336              <enumeratedValues>
86337                <enumeratedValue>
86338                  <name>0</name>
86339                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
86340                  <value>#0</value>
86341                </enumeratedValue>
86342                <enumeratedValue>
86343                  <name>1</name>
86344                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
86345                  <value>#1</value>
86346                </enumeratedValue>
86347              </enumeratedValues>
86348            </field>
86349            <field>
86350              <name>PFE</name>
86351              <description>Passive Filter Enable</description>
86352              <bitOffset>4</bitOffset>
86353              <bitWidth>1</bitWidth>
86354              <access>read-only</access>
86355              <enumeratedValues>
86356                <enumeratedValue>
86357                  <name>0</name>
86358                  <description>Passive input filter is disabled on the corresponding pin.</description>
86359                  <value>#0</value>
86360                </enumeratedValue>
86361                <enumeratedValue>
86362                  <name>1</name>
86363                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
86364                  <value>#1</value>
86365                </enumeratedValue>
86366              </enumeratedValues>
86367            </field>
86368            <field>
86369              <name>ODE</name>
86370              <description>Open Drain Enable</description>
86371              <bitOffset>5</bitOffset>
86372              <bitWidth>1</bitWidth>
86373              <access>read-write</access>
86374              <enumeratedValues>
86375                <enumeratedValue>
86376                  <name>0</name>
86377                  <description>Open drain output is disabled on the corresponding pin.</description>
86378                  <value>#0</value>
86379                </enumeratedValue>
86380                <enumeratedValue>
86381                  <name>1</name>
86382                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
86383                  <value>#1</value>
86384                </enumeratedValue>
86385              </enumeratedValues>
86386            </field>
86387            <field>
86388              <name>DSE</name>
86389              <description>Drive Strength Enable</description>
86390              <bitOffset>6</bitOffset>
86391              <bitWidth>1</bitWidth>
86392              <access>read-only</access>
86393              <enumeratedValues>
86394                <enumeratedValue>
86395                  <name>0</name>
86396                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
86397                  <value>#0</value>
86398                </enumeratedValue>
86399                <enumeratedValue>
86400                  <name>1</name>
86401                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
86402                  <value>#1</value>
86403                </enumeratedValue>
86404              </enumeratedValues>
86405            </field>
86406            <field>
86407              <name>MUX</name>
86408              <description>Pin Mux Control</description>
86409              <bitOffset>8</bitOffset>
86410              <bitWidth>3</bitWidth>
86411              <access>read-write</access>
86412              <enumeratedValues>
86413                <enumeratedValue>
86414                  <name>000</name>
86415                  <description>Pin disabled (Alternative 0) (analog).</description>
86416                  <value>#000</value>
86417                </enumeratedValue>
86418                <enumeratedValue>
86419                  <name>001</name>
86420                  <description>Alternative 1 (GPIO).</description>
86421                  <value>#001</value>
86422                </enumeratedValue>
86423                <enumeratedValue>
86424                  <name>010</name>
86425                  <description>Alternative 2 (chip-specific).</description>
86426                  <value>#010</value>
86427                </enumeratedValue>
86428                <enumeratedValue>
86429                  <name>011</name>
86430                  <description>Alternative 3 (chip-specific).</description>
86431                  <value>#011</value>
86432                </enumeratedValue>
86433                <enumeratedValue>
86434                  <name>100</name>
86435                  <description>Alternative 4 (chip-specific).</description>
86436                  <value>#100</value>
86437                </enumeratedValue>
86438                <enumeratedValue>
86439                  <name>101</name>
86440                  <description>Alternative 5 (chip-specific).</description>
86441                  <value>#101</value>
86442                </enumeratedValue>
86443                <enumeratedValue>
86444                  <name>110</name>
86445                  <description>Alternative 6 (chip-specific).</description>
86446                  <value>#110</value>
86447                </enumeratedValue>
86448                <enumeratedValue>
86449                  <name>111</name>
86450                  <description>Alternative 7 (chip-specific).</description>
86451                  <value>#111</value>
86452                </enumeratedValue>
86453              </enumeratedValues>
86454            </field>
86455            <field>
86456              <name>LK</name>
86457              <description>Lock Register</description>
86458              <bitOffset>15</bitOffset>
86459              <bitWidth>1</bitWidth>
86460              <access>read-write</access>
86461              <enumeratedValues>
86462                <enumeratedValue>
86463                  <name>0</name>
86464                  <description>Pin Control Register fields [15:0] are not locked.</description>
86465                  <value>#0</value>
86466                </enumeratedValue>
86467                <enumeratedValue>
86468                  <name>1</name>
86469                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
86470                  <value>#1</value>
86471                </enumeratedValue>
86472              </enumeratedValues>
86473            </field>
86474            <field>
86475              <name>IRQC</name>
86476              <description>Interrupt Configuration</description>
86477              <bitOffset>16</bitOffset>
86478              <bitWidth>4</bitWidth>
86479              <access>read-write</access>
86480              <enumeratedValues>
86481                <enumeratedValue>
86482                  <name>0000</name>
86483                  <description>Interrupt Status Flag (ISF) is disabled.</description>
86484                  <value>#0000</value>
86485                </enumeratedValue>
86486                <enumeratedValue>
86487                  <name>0001</name>
86488                  <description>ISF flag and DMA request on rising edge.</description>
86489                  <value>#0001</value>
86490                </enumeratedValue>
86491                <enumeratedValue>
86492                  <name>0010</name>
86493                  <description>ISF flag and DMA request on falling edge.</description>
86494                  <value>#0010</value>
86495                </enumeratedValue>
86496                <enumeratedValue>
86497                  <name>0011</name>
86498                  <description>ISF flag and DMA request on either edge.</description>
86499                  <value>#0011</value>
86500                </enumeratedValue>
86501                <enumeratedValue>
86502                  <name>1000</name>
86503                  <description>ISF flag and Interrupt when logic 0.</description>
86504                  <value>#1000</value>
86505                </enumeratedValue>
86506                <enumeratedValue>
86507                  <name>1001</name>
86508                  <description>ISF flag and Interrupt on rising-edge.</description>
86509                  <value>#1001</value>
86510                </enumeratedValue>
86511                <enumeratedValue>
86512                  <name>1010</name>
86513                  <description>ISF flag and Interrupt on falling-edge.</description>
86514                  <value>#1010</value>
86515                </enumeratedValue>
86516                <enumeratedValue>
86517                  <name>1011</name>
86518                  <description>ISF flag and Interrupt on either edge.</description>
86519                  <value>#1011</value>
86520                </enumeratedValue>
86521                <enumeratedValue>
86522                  <name>1100</name>
86523                  <description>ISF flag and Interrupt when logic 1.</description>
86524                  <value>#1100</value>
86525                </enumeratedValue>
86526              </enumeratedValues>
86527            </field>
86528            <field>
86529              <name>ISF</name>
86530              <description>Interrupt Status Flag</description>
86531              <bitOffset>24</bitOffset>
86532              <bitWidth>1</bitWidth>
86533              <access>read-write</access>
86534              <enumeratedValues>
86535                <enumeratedValue>
86536                  <name>0</name>
86537                  <description>Configured interrupt is not detected.</description>
86538                  <value>#0</value>
86539                </enumeratedValue>
86540                <enumeratedValue>
86541                  <name>1</name>
86542                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86543                  <value>#1</value>
86544                </enumeratedValue>
86545              </enumeratedValues>
86546            </field>
86547          </fields>
86548        </register>
86549        <register>
86550          <name>PCR1</name>
86551          <description>Pin Control Register n</description>
86552          <addressOffset>0x4</addressOffset>
86553          <size>32</size>
86554          <access>read-write</access>
86555          <resetValue>0</resetValue>
86556          <resetMask>0xFFFFFFFF</resetMask>
86557          <fields>
86558            <field>
86559              <name>PS</name>
86560              <description>Pull Select</description>
86561              <bitOffset>0</bitOffset>
86562              <bitWidth>1</bitWidth>
86563              <access>read-write</access>
86564              <enumeratedValues>
86565                <enumeratedValue>
86566                  <name>0</name>
86567                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
86568                  <value>#0</value>
86569                </enumeratedValue>
86570                <enumeratedValue>
86571                  <name>1</name>
86572                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
86573                  <value>#1</value>
86574                </enumeratedValue>
86575              </enumeratedValues>
86576            </field>
86577            <field>
86578              <name>PE</name>
86579              <description>Pull Enable</description>
86580              <bitOffset>1</bitOffset>
86581              <bitWidth>1</bitWidth>
86582              <access>read-write</access>
86583              <enumeratedValues>
86584                <enumeratedValue>
86585                  <name>0</name>
86586                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
86587                  <value>#0</value>
86588                </enumeratedValue>
86589                <enumeratedValue>
86590                  <name>1</name>
86591                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
86592                  <value>#1</value>
86593                </enumeratedValue>
86594              </enumeratedValues>
86595            </field>
86596            <field>
86597              <name>SRE</name>
86598              <description>Slew Rate Enable</description>
86599              <bitOffset>2</bitOffset>
86600              <bitWidth>1</bitWidth>
86601              <access>read-write</access>
86602              <enumeratedValues>
86603                <enumeratedValue>
86604                  <name>0</name>
86605                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
86606                  <value>#0</value>
86607                </enumeratedValue>
86608                <enumeratedValue>
86609                  <name>1</name>
86610                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
86611                  <value>#1</value>
86612                </enumeratedValue>
86613              </enumeratedValues>
86614            </field>
86615            <field>
86616              <name>PFE</name>
86617              <description>Passive Filter Enable</description>
86618              <bitOffset>4</bitOffset>
86619              <bitWidth>1</bitWidth>
86620              <access>read-only</access>
86621              <enumeratedValues>
86622                <enumeratedValue>
86623                  <name>0</name>
86624                  <description>Passive input filter is disabled on the corresponding pin.</description>
86625                  <value>#0</value>
86626                </enumeratedValue>
86627                <enumeratedValue>
86628                  <name>1</name>
86629                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
86630                  <value>#1</value>
86631                </enumeratedValue>
86632              </enumeratedValues>
86633            </field>
86634            <field>
86635              <name>ODE</name>
86636              <description>Open Drain Enable</description>
86637              <bitOffset>5</bitOffset>
86638              <bitWidth>1</bitWidth>
86639              <access>read-write</access>
86640              <enumeratedValues>
86641                <enumeratedValue>
86642                  <name>0</name>
86643                  <description>Open drain output is disabled on the corresponding pin.</description>
86644                  <value>#0</value>
86645                </enumeratedValue>
86646                <enumeratedValue>
86647                  <name>1</name>
86648                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
86649                  <value>#1</value>
86650                </enumeratedValue>
86651              </enumeratedValues>
86652            </field>
86653            <field>
86654              <name>DSE</name>
86655              <description>Drive Strength Enable</description>
86656              <bitOffset>6</bitOffset>
86657              <bitWidth>1</bitWidth>
86658              <access>read-only</access>
86659              <enumeratedValues>
86660                <enumeratedValue>
86661                  <name>0</name>
86662                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
86663                  <value>#0</value>
86664                </enumeratedValue>
86665                <enumeratedValue>
86666                  <name>1</name>
86667                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
86668                  <value>#1</value>
86669                </enumeratedValue>
86670              </enumeratedValues>
86671            </field>
86672            <field>
86673              <name>MUX</name>
86674              <description>Pin Mux Control</description>
86675              <bitOffset>8</bitOffset>
86676              <bitWidth>3</bitWidth>
86677              <access>read-write</access>
86678              <enumeratedValues>
86679                <enumeratedValue>
86680                  <name>000</name>
86681                  <description>Pin disabled (Alternative 0) (analog).</description>
86682                  <value>#000</value>
86683                </enumeratedValue>
86684                <enumeratedValue>
86685                  <name>001</name>
86686                  <description>Alternative 1 (GPIO).</description>
86687                  <value>#001</value>
86688                </enumeratedValue>
86689                <enumeratedValue>
86690                  <name>010</name>
86691                  <description>Alternative 2 (chip-specific).</description>
86692                  <value>#010</value>
86693                </enumeratedValue>
86694                <enumeratedValue>
86695                  <name>011</name>
86696                  <description>Alternative 3 (chip-specific).</description>
86697                  <value>#011</value>
86698                </enumeratedValue>
86699                <enumeratedValue>
86700                  <name>100</name>
86701                  <description>Alternative 4 (chip-specific).</description>
86702                  <value>#100</value>
86703                </enumeratedValue>
86704                <enumeratedValue>
86705                  <name>101</name>
86706                  <description>Alternative 5 (chip-specific).</description>
86707                  <value>#101</value>
86708                </enumeratedValue>
86709                <enumeratedValue>
86710                  <name>110</name>
86711                  <description>Alternative 6 (chip-specific).</description>
86712                  <value>#110</value>
86713                </enumeratedValue>
86714                <enumeratedValue>
86715                  <name>111</name>
86716                  <description>Alternative 7 (chip-specific).</description>
86717                  <value>#111</value>
86718                </enumeratedValue>
86719              </enumeratedValues>
86720            </field>
86721            <field>
86722              <name>LK</name>
86723              <description>Lock Register</description>
86724              <bitOffset>15</bitOffset>
86725              <bitWidth>1</bitWidth>
86726              <access>read-write</access>
86727              <enumeratedValues>
86728                <enumeratedValue>
86729                  <name>0</name>
86730                  <description>Pin Control Register fields [15:0] are not locked.</description>
86731                  <value>#0</value>
86732                </enumeratedValue>
86733                <enumeratedValue>
86734                  <name>1</name>
86735                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
86736                  <value>#1</value>
86737                </enumeratedValue>
86738              </enumeratedValues>
86739            </field>
86740            <field>
86741              <name>IRQC</name>
86742              <description>Interrupt Configuration</description>
86743              <bitOffset>16</bitOffset>
86744              <bitWidth>4</bitWidth>
86745              <access>read-write</access>
86746              <enumeratedValues>
86747                <enumeratedValue>
86748                  <name>0000</name>
86749                  <description>Interrupt Status Flag (ISF) is disabled.</description>
86750                  <value>#0000</value>
86751                </enumeratedValue>
86752                <enumeratedValue>
86753                  <name>0001</name>
86754                  <description>ISF flag and DMA request on rising edge.</description>
86755                  <value>#0001</value>
86756                </enumeratedValue>
86757                <enumeratedValue>
86758                  <name>0010</name>
86759                  <description>ISF flag and DMA request on falling edge.</description>
86760                  <value>#0010</value>
86761                </enumeratedValue>
86762                <enumeratedValue>
86763                  <name>0011</name>
86764                  <description>ISF flag and DMA request on either edge.</description>
86765                  <value>#0011</value>
86766                </enumeratedValue>
86767                <enumeratedValue>
86768                  <name>1000</name>
86769                  <description>ISF flag and Interrupt when logic 0.</description>
86770                  <value>#1000</value>
86771                </enumeratedValue>
86772                <enumeratedValue>
86773                  <name>1001</name>
86774                  <description>ISF flag and Interrupt on rising-edge.</description>
86775                  <value>#1001</value>
86776                </enumeratedValue>
86777                <enumeratedValue>
86778                  <name>1010</name>
86779                  <description>ISF flag and Interrupt on falling-edge.</description>
86780                  <value>#1010</value>
86781                </enumeratedValue>
86782                <enumeratedValue>
86783                  <name>1011</name>
86784                  <description>ISF flag and Interrupt on either edge.</description>
86785                  <value>#1011</value>
86786                </enumeratedValue>
86787                <enumeratedValue>
86788                  <name>1100</name>
86789                  <description>ISF flag and Interrupt when logic 1.</description>
86790                  <value>#1100</value>
86791                </enumeratedValue>
86792              </enumeratedValues>
86793            </field>
86794            <field>
86795              <name>ISF</name>
86796              <description>Interrupt Status Flag</description>
86797              <bitOffset>24</bitOffset>
86798              <bitWidth>1</bitWidth>
86799              <access>read-write</access>
86800              <enumeratedValues>
86801                <enumeratedValue>
86802                  <name>0</name>
86803                  <description>Configured interrupt is not detected.</description>
86804                  <value>#0</value>
86805                </enumeratedValue>
86806                <enumeratedValue>
86807                  <name>1</name>
86808                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
86809                  <value>#1</value>
86810                </enumeratedValue>
86811              </enumeratedValues>
86812            </field>
86813          </fields>
86814        </register>
86815        <register>
86816          <name>PCR2</name>
86817          <description>Pin Control Register n</description>
86818          <addressOffset>0x8</addressOffset>
86819          <size>32</size>
86820          <access>read-write</access>
86821          <resetValue>0</resetValue>
86822          <resetMask>0xFFFFFFFF</resetMask>
86823          <fields>
86824            <field>
86825              <name>PS</name>
86826              <description>Pull Select</description>
86827              <bitOffset>0</bitOffset>
86828              <bitWidth>1</bitWidth>
86829              <access>read-write</access>
86830              <enumeratedValues>
86831                <enumeratedValue>
86832                  <name>0</name>
86833                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
86834                  <value>#0</value>
86835                </enumeratedValue>
86836                <enumeratedValue>
86837                  <name>1</name>
86838                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
86839                  <value>#1</value>
86840                </enumeratedValue>
86841              </enumeratedValues>
86842            </field>
86843            <field>
86844              <name>PE</name>
86845              <description>Pull Enable</description>
86846              <bitOffset>1</bitOffset>
86847              <bitWidth>1</bitWidth>
86848              <access>read-write</access>
86849              <enumeratedValues>
86850                <enumeratedValue>
86851                  <name>0</name>
86852                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
86853                  <value>#0</value>
86854                </enumeratedValue>
86855                <enumeratedValue>
86856                  <name>1</name>
86857                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
86858                  <value>#1</value>
86859                </enumeratedValue>
86860              </enumeratedValues>
86861            </field>
86862            <field>
86863              <name>SRE</name>
86864              <description>Slew Rate Enable</description>
86865              <bitOffset>2</bitOffset>
86866              <bitWidth>1</bitWidth>
86867              <access>read-write</access>
86868              <enumeratedValues>
86869                <enumeratedValue>
86870                  <name>0</name>
86871                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
86872                  <value>#0</value>
86873                </enumeratedValue>
86874                <enumeratedValue>
86875                  <name>1</name>
86876                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
86877                  <value>#1</value>
86878                </enumeratedValue>
86879              </enumeratedValues>
86880            </field>
86881            <field>
86882              <name>PFE</name>
86883              <description>Passive Filter Enable</description>
86884              <bitOffset>4</bitOffset>
86885              <bitWidth>1</bitWidth>
86886              <access>read-only</access>
86887              <enumeratedValues>
86888                <enumeratedValue>
86889                  <name>0</name>
86890                  <description>Passive input filter is disabled on the corresponding pin.</description>
86891                  <value>#0</value>
86892                </enumeratedValue>
86893                <enumeratedValue>
86894                  <name>1</name>
86895                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
86896                  <value>#1</value>
86897                </enumeratedValue>
86898              </enumeratedValues>
86899            </field>
86900            <field>
86901              <name>ODE</name>
86902              <description>Open Drain Enable</description>
86903              <bitOffset>5</bitOffset>
86904              <bitWidth>1</bitWidth>
86905              <access>read-write</access>
86906              <enumeratedValues>
86907                <enumeratedValue>
86908                  <name>0</name>
86909                  <description>Open drain output is disabled on the corresponding pin.</description>
86910                  <value>#0</value>
86911                </enumeratedValue>
86912                <enumeratedValue>
86913                  <name>1</name>
86914                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
86915                  <value>#1</value>
86916                </enumeratedValue>
86917              </enumeratedValues>
86918            </field>
86919            <field>
86920              <name>DSE</name>
86921              <description>Drive Strength Enable</description>
86922              <bitOffset>6</bitOffset>
86923              <bitWidth>1</bitWidth>
86924              <access>read-only</access>
86925              <enumeratedValues>
86926                <enumeratedValue>
86927                  <name>0</name>
86928                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
86929                  <value>#0</value>
86930                </enumeratedValue>
86931                <enumeratedValue>
86932                  <name>1</name>
86933                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
86934                  <value>#1</value>
86935                </enumeratedValue>
86936              </enumeratedValues>
86937            </field>
86938            <field>
86939              <name>MUX</name>
86940              <description>Pin Mux Control</description>
86941              <bitOffset>8</bitOffset>
86942              <bitWidth>3</bitWidth>
86943              <access>read-write</access>
86944              <enumeratedValues>
86945                <enumeratedValue>
86946                  <name>000</name>
86947                  <description>Pin disabled (Alternative 0) (analog).</description>
86948                  <value>#000</value>
86949                </enumeratedValue>
86950                <enumeratedValue>
86951                  <name>001</name>
86952                  <description>Alternative 1 (GPIO).</description>
86953                  <value>#001</value>
86954                </enumeratedValue>
86955                <enumeratedValue>
86956                  <name>010</name>
86957                  <description>Alternative 2 (chip-specific).</description>
86958                  <value>#010</value>
86959                </enumeratedValue>
86960                <enumeratedValue>
86961                  <name>011</name>
86962                  <description>Alternative 3 (chip-specific).</description>
86963                  <value>#011</value>
86964                </enumeratedValue>
86965                <enumeratedValue>
86966                  <name>100</name>
86967                  <description>Alternative 4 (chip-specific).</description>
86968                  <value>#100</value>
86969                </enumeratedValue>
86970                <enumeratedValue>
86971                  <name>101</name>
86972                  <description>Alternative 5 (chip-specific).</description>
86973                  <value>#101</value>
86974                </enumeratedValue>
86975                <enumeratedValue>
86976                  <name>110</name>
86977                  <description>Alternative 6 (chip-specific).</description>
86978                  <value>#110</value>
86979                </enumeratedValue>
86980                <enumeratedValue>
86981                  <name>111</name>
86982                  <description>Alternative 7 (chip-specific).</description>
86983                  <value>#111</value>
86984                </enumeratedValue>
86985              </enumeratedValues>
86986            </field>
86987            <field>
86988              <name>LK</name>
86989              <description>Lock Register</description>
86990              <bitOffset>15</bitOffset>
86991              <bitWidth>1</bitWidth>
86992              <access>read-write</access>
86993              <enumeratedValues>
86994                <enumeratedValue>
86995                  <name>0</name>
86996                  <description>Pin Control Register fields [15:0] are not locked.</description>
86997                  <value>#0</value>
86998                </enumeratedValue>
86999                <enumeratedValue>
87000                  <name>1</name>
87001                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
87002                  <value>#1</value>
87003                </enumeratedValue>
87004              </enumeratedValues>
87005            </field>
87006            <field>
87007              <name>IRQC</name>
87008              <description>Interrupt Configuration</description>
87009              <bitOffset>16</bitOffset>
87010              <bitWidth>4</bitWidth>
87011              <access>read-write</access>
87012              <enumeratedValues>
87013                <enumeratedValue>
87014                  <name>0000</name>
87015                  <description>Interrupt Status Flag (ISF) is disabled.</description>
87016                  <value>#0000</value>
87017                </enumeratedValue>
87018                <enumeratedValue>
87019                  <name>0001</name>
87020                  <description>ISF flag and DMA request on rising edge.</description>
87021                  <value>#0001</value>
87022                </enumeratedValue>
87023                <enumeratedValue>
87024                  <name>0010</name>
87025                  <description>ISF flag and DMA request on falling edge.</description>
87026                  <value>#0010</value>
87027                </enumeratedValue>
87028                <enumeratedValue>
87029                  <name>0011</name>
87030                  <description>ISF flag and DMA request on either edge.</description>
87031                  <value>#0011</value>
87032                </enumeratedValue>
87033                <enumeratedValue>
87034                  <name>1000</name>
87035                  <description>ISF flag and Interrupt when logic 0.</description>
87036                  <value>#1000</value>
87037                </enumeratedValue>
87038                <enumeratedValue>
87039                  <name>1001</name>
87040                  <description>ISF flag and Interrupt on rising-edge.</description>
87041                  <value>#1001</value>
87042                </enumeratedValue>
87043                <enumeratedValue>
87044                  <name>1010</name>
87045                  <description>ISF flag and Interrupt on falling-edge.</description>
87046                  <value>#1010</value>
87047                </enumeratedValue>
87048                <enumeratedValue>
87049                  <name>1011</name>
87050                  <description>ISF flag and Interrupt on either edge.</description>
87051                  <value>#1011</value>
87052                </enumeratedValue>
87053                <enumeratedValue>
87054                  <name>1100</name>
87055                  <description>ISF flag and Interrupt when logic 1.</description>
87056                  <value>#1100</value>
87057                </enumeratedValue>
87058              </enumeratedValues>
87059            </field>
87060            <field>
87061              <name>ISF</name>
87062              <description>Interrupt Status Flag</description>
87063              <bitOffset>24</bitOffset>
87064              <bitWidth>1</bitWidth>
87065              <access>read-write</access>
87066              <enumeratedValues>
87067                <enumeratedValue>
87068                  <name>0</name>
87069                  <description>Configured interrupt is not detected.</description>
87070                  <value>#0</value>
87071                </enumeratedValue>
87072                <enumeratedValue>
87073                  <name>1</name>
87074                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
87075                  <value>#1</value>
87076                </enumeratedValue>
87077              </enumeratedValues>
87078            </field>
87079          </fields>
87080        </register>
87081        <register>
87082          <name>PCR3</name>
87083          <description>Pin Control Register n</description>
87084          <addressOffset>0xC</addressOffset>
87085          <size>32</size>
87086          <access>read-write</access>
87087          <resetValue>0</resetValue>
87088          <resetMask>0xFFFFFFFF</resetMask>
87089          <fields>
87090            <field>
87091              <name>PS</name>
87092              <description>Pull Select</description>
87093              <bitOffset>0</bitOffset>
87094              <bitWidth>1</bitWidth>
87095              <access>read-write</access>
87096              <enumeratedValues>
87097                <enumeratedValue>
87098                  <name>0</name>
87099                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
87100                  <value>#0</value>
87101                </enumeratedValue>
87102                <enumeratedValue>
87103                  <name>1</name>
87104                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
87105                  <value>#1</value>
87106                </enumeratedValue>
87107              </enumeratedValues>
87108            </field>
87109            <field>
87110              <name>PE</name>
87111              <description>Pull Enable</description>
87112              <bitOffset>1</bitOffset>
87113              <bitWidth>1</bitWidth>
87114              <access>read-write</access>
87115              <enumeratedValues>
87116                <enumeratedValue>
87117                  <name>0</name>
87118                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
87119                  <value>#0</value>
87120                </enumeratedValue>
87121                <enumeratedValue>
87122                  <name>1</name>
87123                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
87124                  <value>#1</value>
87125                </enumeratedValue>
87126              </enumeratedValues>
87127            </field>
87128            <field>
87129              <name>SRE</name>
87130              <description>Slew Rate Enable</description>
87131              <bitOffset>2</bitOffset>
87132              <bitWidth>1</bitWidth>
87133              <access>read-write</access>
87134              <enumeratedValues>
87135                <enumeratedValue>
87136                  <name>0</name>
87137                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
87138                  <value>#0</value>
87139                </enumeratedValue>
87140                <enumeratedValue>
87141                  <name>1</name>
87142                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
87143                  <value>#1</value>
87144                </enumeratedValue>
87145              </enumeratedValues>
87146            </field>
87147            <field>
87148              <name>PFE</name>
87149              <description>Passive Filter Enable</description>
87150              <bitOffset>4</bitOffset>
87151              <bitWidth>1</bitWidth>
87152              <access>read-only</access>
87153              <enumeratedValues>
87154                <enumeratedValue>
87155                  <name>0</name>
87156                  <description>Passive input filter is disabled on the corresponding pin.</description>
87157                  <value>#0</value>
87158                </enumeratedValue>
87159                <enumeratedValue>
87160                  <name>1</name>
87161                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
87162                  <value>#1</value>
87163                </enumeratedValue>
87164              </enumeratedValues>
87165            </field>
87166            <field>
87167              <name>ODE</name>
87168              <description>Open Drain Enable</description>
87169              <bitOffset>5</bitOffset>
87170              <bitWidth>1</bitWidth>
87171              <access>read-write</access>
87172              <enumeratedValues>
87173                <enumeratedValue>
87174                  <name>0</name>
87175                  <description>Open drain output is disabled on the corresponding pin.</description>
87176                  <value>#0</value>
87177                </enumeratedValue>
87178                <enumeratedValue>
87179                  <name>1</name>
87180                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
87181                  <value>#1</value>
87182                </enumeratedValue>
87183              </enumeratedValues>
87184            </field>
87185            <field>
87186              <name>DSE</name>
87187              <description>Drive Strength Enable</description>
87188              <bitOffset>6</bitOffset>
87189              <bitWidth>1</bitWidth>
87190              <access>read-only</access>
87191              <enumeratedValues>
87192                <enumeratedValue>
87193                  <name>0</name>
87194                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
87195                  <value>#0</value>
87196                </enumeratedValue>
87197                <enumeratedValue>
87198                  <name>1</name>
87199                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
87200                  <value>#1</value>
87201                </enumeratedValue>
87202              </enumeratedValues>
87203            </field>
87204            <field>
87205              <name>MUX</name>
87206              <description>Pin Mux Control</description>
87207              <bitOffset>8</bitOffset>
87208              <bitWidth>3</bitWidth>
87209              <access>read-write</access>
87210              <enumeratedValues>
87211                <enumeratedValue>
87212                  <name>000</name>
87213                  <description>Pin disabled (Alternative 0) (analog).</description>
87214                  <value>#000</value>
87215                </enumeratedValue>
87216                <enumeratedValue>
87217                  <name>001</name>
87218                  <description>Alternative 1 (GPIO).</description>
87219                  <value>#001</value>
87220                </enumeratedValue>
87221                <enumeratedValue>
87222                  <name>010</name>
87223                  <description>Alternative 2 (chip-specific).</description>
87224                  <value>#010</value>
87225                </enumeratedValue>
87226                <enumeratedValue>
87227                  <name>011</name>
87228                  <description>Alternative 3 (chip-specific).</description>
87229                  <value>#011</value>
87230                </enumeratedValue>
87231                <enumeratedValue>
87232                  <name>100</name>
87233                  <description>Alternative 4 (chip-specific).</description>
87234                  <value>#100</value>
87235                </enumeratedValue>
87236                <enumeratedValue>
87237                  <name>101</name>
87238                  <description>Alternative 5 (chip-specific).</description>
87239                  <value>#101</value>
87240                </enumeratedValue>
87241                <enumeratedValue>
87242                  <name>110</name>
87243                  <description>Alternative 6 (chip-specific).</description>
87244                  <value>#110</value>
87245                </enumeratedValue>
87246                <enumeratedValue>
87247                  <name>111</name>
87248                  <description>Alternative 7 (chip-specific).</description>
87249                  <value>#111</value>
87250                </enumeratedValue>
87251              </enumeratedValues>
87252            </field>
87253            <field>
87254              <name>LK</name>
87255              <description>Lock Register</description>
87256              <bitOffset>15</bitOffset>
87257              <bitWidth>1</bitWidth>
87258              <access>read-write</access>
87259              <enumeratedValues>
87260                <enumeratedValue>
87261                  <name>0</name>
87262                  <description>Pin Control Register fields [15:0] are not locked.</description>
87263                  <value>#0</value>
87264                </enumeratedValue>
87265                <enumeratedValue>
87266                  <name>1</name>
87267                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
87268                  <value>#1</value>
87269                </enumeratedValue>
87270              </enumeratedValues>
87271            </field>
87272            <field>
87273              <name>IRQC</name>
87274              <description>Interrupt Configuration</description>
87275              <bitOffset>16</bitOffset>
87276              <bitWidth>4</bitWidth>
87277              <access>read-write</access>
87278              <enumeratedValues>
87279                <enumeratedValue>
87280                  <name>0000</name>
87281                  <description>Interrupt Status Flag (ISF) is disabled.</description>
87282                  <value>#0000</value>
87283                </enumeratedValue>
87284                <enumeratedValue>
87285                  <name>0001</name>
87286                  <description>ISF flag and DMA request on rising edge.</description>
87287                  <value>#0001</value>
87288                </enumeratedValue>
87289                <enumeratedValue>
87290                  <name>0010</name>
87291                  <description>ISF flag and DMA request on falling edge.</description>
87292                  <value>#0010</value>
87293                </enumeratedValue>
87294                <enumeratedValue>
87295                  <name>0011</name>
87296                  <description>ISF flag and DMA request on either edge.</description>
87297                  <value>#0011</value>
87298                </enumeratedValue>
87299                <enumeratedValue>
87300                  <name>1000</name>
87301                  <description>ISF flag and Interrupt when logic 0.</description>
87302                  <value>#1000</value>
87303                </enumeratedValue>
87304                <enumeratedValue>
87305                  <name>1001</name>
87306                  <description>ISF flag and Interrupt on rising-edge.</description>
87307                  <value>#1001</value>
87308                </enumeratedValue>
87309                <enumeratedValue>
87310                  <name>1010</name>
87311                  <description>ISF flag and Interrupt on falling-edge.</description>
87312                  <value>#1010</value>
87313                </enumeratedValue>
87314                <enumeratedValue>
87315                  <name>1011</name>
87316                  <description>ISF flag and Interrupt on either edge.</description>
87317                  <value>#1011</value>
87318                </enumeratedValue>
87319                <enumeratedValue>
87320                  <name>1100</name>
87321                  <description>ISF flag and Interrupt when logic 1.</description>
87322                  <value>#1100</value>
87323                </enumeratedValue>
87324              </enumeratedValues>
87325            </field>
87326            <field>
87327              <name>ISF</name>
87328              <description>Interrupt Status Flag</description>
87329              <bitOffset>24</bitOffset>
87330              <bitWidth>1</bitWidth>
87331              <access>read-write</access>
87332              <enumeratedValues>
87333                <enumeratedValue>
87334                  <name>0</name>
87335                  <description>Configured interrupt is not detected.</description>
87336                  <value>#0</value>
87337                </enumeratedValue>
87338                <enumeratedValue>
87339                  <name>1</name>
87340                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
87341                  <value>#1</value>
87342                </enumeratedValue>
87343              </enumeratedValues>
87344            </field>
87345          </fields>
87346        </register>
87347        <register>
87348          <name>PCR4</name>
87349          <description>Pin Control Register n</description>
87350          <addressOffset>0x10</addressOffset>
87351          <size>32</size>
87352          <access>read-write</access>
87353          <resetValue>0</resetValue>
87354          <resetMask>0xFFFFFFFF</resetMask>
87355          <fields>
87356            <field>
87357              <name>PS</name>
87358              <description>Pull Select</description>
87359              <bitOffset>0</bitOffset>
87360              <bitWidth>1</bitWidth>
87361              <access>read-write</access>
87362              <enumeratedValues>
87363                <enumeratedValue>
87364                  <name>0</name>
87365                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
87366                  <value>#0</value>
87367                </enumeratedValue>
87368                <enumeratedValue>
87369                  <name>1</name>
87370                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
87371                  <value>#1</value>
87372                </enumeratedValue>
87373              </enumeratedValues>
87374            </field>
87375            <field>
87376              <name>PE</name>
87377              <description>Pull Enable</description>
87378              <bitOffset>1</bitOffset>
87379              <bitWidth>1</bitWidth>
87380              <access>read-write</access>
87381              <enumeratedValues>
87382                <enumeratedValue>
87383                  <name>0</name>
87384                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
87385                  <value>#0</value>
87386                </enumeratedValue>
87387                <enumeratedValue>
87388                  <name>1</name>
87389                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
87390                  <value>#1</value>
87391                </enumeratedValue>
87392              </enumeratedValues>
87393            </field>
87394            <field>
87395              <name>SRE</name>
87396              <description>Slew Rate Enable</description>
87397              <bitOffset>2</bitOffset>
87398              <bitWidth>1</bitWidth>
87399              <access>read-write</access>
87400              <enumeratedValues>
87401                <enumeratedValue>
87402                  <name>0</name>
87403                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
87404                  <value>#0</value>
87405                </enumeratedValue>
87406                <enumeratedValue>
87407                  <name>1</name>
87408                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
87409                  <value>#1</value>
87410                </enumeratedValue>
87411              </enumeratedValues>
87412            </field>
87413            <field>
87414              <name>PFE</name>
87415              <description>Passive Filter Enable</description>
87416              <bitOffset>4</bitOffset>
87417              <bitWidth>1</bitWidth>
87418              <access>read-only</access>
87419              <enumeratedValues>
87420                <enumeratedValue>
87421                  <name>0</name>
87422                  <description>Passive input filter is disabled on the corresponding pin.</description>
87423                  <value>#0</value>
87424                </enumeratedValue>
87425                <enumeratedValue>
87426                  <name>1</name>
87427                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
87428                  <value>#1</value>
87429                </enumeratedValue>
87430              </enumeratedValues>
87431            </field>
87432            <field>
87433              <name>ODE</name>
87434              <description>Open Drain Enable</description>
87435              <bitOffset>5</bitOffset>
87436              <bitWidth>1</bitWidth>
87437              <access>read-write</access>
87438              <enumeratedValues>
87439                <enumeratedValue>
87440                  <name>0</name>
87441                  <description>Open drain output is disabled on the corresponding pin.</description>
87442                  <value>#0</value>
87443                </enumeratedValue>
87444                <enumeratedValue>
87445                  <name>1</name>
87446                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
87447                  <value>#1</value>
87448                </enumeratedValue>
87449              </enumeratedValues>
87450            </field>
87451            <field>
87452              <name>DSE</name>
87453              <description>Drive Strength Enable</description>
87454              <bitOffset>6</bitOffset>
87455              <bitWidth>1</bitWidth>
87456              <access>read-write</access>
87457              <enumeratedValues>
87458                <enumeratedValue>
87459                  <name>0</name>
87460                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
87461                  <value>#0</value>
87462                </enumeratedValue>
87463                <enumeratedValue>
87464                  <name>1</name>
87465                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
87466                  <value>#1</value>
87467                </enumeratedValue>
87468              </enumeratedValues>
87469            </field>
87470            <field>
87471              <name>MUX</name>
87472              <description>Pin Mux Control</description>
87473              <bitOffset>8</bitOffset>
87474              <bitWidth>3</bitWidth>
87475              <access>read-write</access>
87476              <enumeratedValues>
87477                <enumeratedValue>
87478                  <name>000</name>
87479                  <description>Pin disabled (Alternative 0) (analog).</description>
87480                  <value>#000</value>
87481                </enumeratedValue>
87482                <enumeratedValue>
87483                  <name>001</name>
87484                  <description>Alternative 1 (GPIO).</description>
87485                  <value>#001</value>
87486                </enumeratedValue>
87487                <enumeratedValue>
87488                  <name>010</name>
87489                  <description>Alternative 2 (chip-specific).</description>
87490                  <value>#010</value>
87491                </enumeratedValue>
87492                <enumeratedValue>
87493                  <name>011</name>
87494                  <description>Alternative 3 (chip-specific).</description>
87495                  <value>#011</value>
87496                </enumeratedValue>
87497                <enumeratedValue>
87498                  <name>100</name>
87499                  <description>Alternative 4 (chip-specific).</description>
87500                  <value>#100</value>
87501                </enumeratedValue>
87502                <enumeratedValue>
87503                  <name>101</name>
87504                  <description>Alternative 5 (chip-specific).</description>
87505                  <value>#101</value>
87506                </enumeratedValue>
87507                <enumeratedValue>
87508                  <name>110</name>
87509                  <description>Alternative 6 (chip-specific).</description>
87510                  <value>#110</value>
87511                </enumeratedValue>
87512                <enumeratedValue>
87513                  <name>111</name>
87514                  <description>Alternative 7 (chip-specific).</description>
87515                  <value>#111</value>
87516                </enumeratedValue>
87517              </enumeratedValues>
87518            </field>
87519            <field>
87520              <name>LK</name>
87521              <description>Lock Register</description>
87522              <bitOffset>15</bitOffset>
87523              <bitWidth>1</bitWidth>
87524              <access>read-write</access>
87525              <enumeratedValues>
87526                <enumeratedValue>
87527                  <name>0</name>
87528                  <description>Pin Control Register fields [15:0] are not locked.</description>
87529                  <value>#0</value>
87530                </enumeratedValue>
87531                <enumeratedValue>
87532                  <name>1</name>
87533                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
87534                  <value>#1</value>
87535                </enumeratedValue>
87536              </enumeratedValues>
87537            </field>
87538            <field>
87539              <name>IRQC</name>
87540              <description>Interrupt Configuration</description>
87541              <bitOffset>16</bitOffset>
87542              <bitWidth>4</bitWidth>
87543              <access>read-write</access>
87544              <enumeratedValues>
87545                <enumeratedValue>
87546                  <name>0000</name>
87547                  <description>Interrupt Status Flag (ISF) is disabled.</description>
87548                  <value>#0000</value>
87549                </enumeratedValue>
87550                <enumeratedValue>
87551                  <name>0001</name>
87552                  <description>ISF flag and DMA request on rising edge.</description>
87553                  <value>#0001</value>
87554                </enumeratedValue>
87555                <enumeratedValue>
87556                  <name>0010</name>
87557                  <description>ISF flag and DMA request on falling edge.</description>
87558                  <value>#0010</value>
87559                </enumeratedValue>
87560                <enumeratedValue>
87561                  <name>0011</name>
87562                  <description>ISF flag and DMA request on either edge.</description>
87563                  <value>#0011</value>
87564                </enumeratedValue>
87565                <enumeratedValue>
87566                  <name>1000</name>
87567                  <description>ISF flag and Interrupt when logic 0.</description>
87568                  <value>#1000</value>
87569                </enumeratedValue>
87570                <enumeratedValue>
87571                  <name>1001</name>
87572                  <description>ISF flag and Interrupt on rising-edge.</description>
87573                  <value>#1001</value>
87574                </enumeratedValue>
87575                <enumeratedValue>
87576                  <name>1010</name>
87577                  <description>ISF flag and Interrupt on falling-edge.</description>
87578                  <value>#1010</value>
87579                </enumeratedValue>
87580                <enumeratedValue>
87581                  <name>1011</name>
87582                  <description>ISF flag and Interrupt on either edge.</description>
87583                  <value>#1011</value>
87584                </enumeratedValue>
87585                <enumeratedValue>
87586                  <name>1100</name>
87587                  <description>ISF flag and Interrupt when logic 1.</description>
87588                  <value>#1100</value>
87589                </enumeratedValue>
87590              </enumeratedValues>
87591            </field>
87592            <field>
87593              <name>ISF</name>
87594              <description>Interrupt Status Flag</description>
87595              <bitOffset>24</bitOffset>
87596              <bitWidth>1</bitWidth>
87597              <access>read-write</access>
87598              <enumeratedValues>
87599                <enumeratedValue>
87600                  <name>0</name>
87601                  <description>Configured interrupt is not detected.</description>
87602                  <value>#0</value>
87603                </enumeratedValue>
87604                <enumeratedValue>
87605                  <name>1</name>
87606                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
87607                  <value>#1</value>
87608                </enumeratedValue>
87609              </enumeratedValues>
87610            </field>
87611          </fields>
87612        </register>
87613        <register>
87614          <name>PCR5</name>
87615          <description>Pin Control Register n</description>
87616          <addressOffset>0x14</addressOffset>
87617          <size>32</size>
87618          <access>read-write</access>
87619          <resetValue>0</resetValue>
87620          <resetMask>0xFFFFFFFF</resetMask>
87621          <fields>
87622            <field>
87623              <name>PS</name>
87624              <description>Pull Select</description>
87625              <bitOffset>0</bitOffset>
87626              <bitWidth>1</bitWidth>
87627              <access>read-write</access>
87628              <enumeratedValues>
87629                <enumeratedValue>
87630                  <name>0</name>
87631                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
87632                  <value>#0</value>
87633                </enumeratedValue>
87634                <enumeratedValue>
87635                  <name>1</name>
87636                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
87637                  <value>#1</value>
87638                </enumeratedValue>
87639              </enumeratedValues>
87640            </field>
87641            <field>
87642              <name>PE</name>
87643              <description>Pull Enable</description>
87644              <bitOffset>1</bitOffset>
87645              <bitWidth>1</bitWidth>
87646              <access>read-write</access>
87647              <enumeratedValues>
87648                <enumeratedValue>
87649                  <name>0</name>
87650                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
87651                  <value>#0</value>
87652                </enumeratedValue>
87653                <enumeratedValue>
87654                  <name>1</name>
87655                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
87656                  <value>#1</value>
87657                </enumeratedValue>
87658              </enumeratedValues>
87659            </field>
87660            <field>
87661              <name>SRE</name>
87662              <description>Slew Rate Enable</description>
87663              <bitOffset>2</bitOffset>
87664              <bitWidth>1</bitWidth>
87665              <access>read-write</access>
87666              <enumeratedValues>
87667                <enumeratedValue>
87668                  <name>0</name>
87669                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
87670                  <value>#0</value>
87671                </enumeratedValue>
87672                <enumeratedValue>
87673                  <name>1</name>
87674                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
87675                  <value>#1</value>
87676                </enumeratedValue>
87677              </enumeratedValues>
87678            </field>
87679            <field>
87680              <name>PFE</name>
87681              <description>Passive Filter Enable</description>
87682              <bitOffset>4</bitOffset>
87683              <bitWidth>1</bitWidth>
87684              <access>read-only</access>
87685              <enumeratedValues>
87686                <enumeratedValue>
87687                  <name>0</name>
87688                  <description>Passive input filter is disabled on the corresponding pin.</description>
87689                  <value>#0</value>
87690                </enumeratedValue>
87691                <enumeratedValue>
87692                  <name>1</name>
87693                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
87694                  <value>#1</value>
87695                </enumeratedValue>
87696              </enumeratedValues>
87697            </field>
87698            <field>
87699              <name>ODE</name>
87700              <description>Open Drain Enable</description>
87701              <bitOffset>5</bitOffset>
87702              <bitWidth>1</bitWidth>
87703              <access>read-write</access>
87704              <enumeratedValues>
87705                <enumeratedValue>
87706                  <name>0</name>
87707                  <description>Open drain output is disabled on the corresponding pin.</description>
87708                  <value>#0</value>
87709                </enumeratedValue>
87710                <enumeratedValue>
87711                  <name>1</name>
87712                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
87713                  <value>#1</value>
87714                </enumeratedValue>
87715              </enumeratedValues>
87716            </field>
87717            <field>
87718              <name>DSE</name>
87719              <description>Drive Strength Enable</description>
87720              <bitOffset>6</bitOffset>
87721              <bitWidth>1</bitWidth>
87722              <access>read-write</access>
87723              <enumeratedValues>
87724                <enumeratedValue>
87725                  <name>0</name>
87726                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
87727                  <value>#0</value>
87728                </enumeratedValue>
87729                <enumeratedValue>
87730                  <name>1</name>
87731                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
87732                  <value>#1</value>
87733                </enumeratedValue>
87734              </enumeratedValues>
87735            </field>
87736            <field>
87737              <name>MUX</name>
87738              <description>Pin Mux Control</description>
87739              <bitOffset>8</bitOffset>
87740              <bitWidth>3</bitWidth>
87741              <access>read-write</access>
87742              <enumeratedValues>
87743                <enumeratedValue>
87744                  <name>000</name>
87745                  <description>Pin disabled (Alternative 0) (analog).</description>
87746                  <value>#000</value>
87747                </enumeratedValue>
87748                <enumeratedValue>
87749                  <name>001</name>
87750                  <description>Alternative 1 (GPIO).</description>
87751                  <value>#001</value>
87752                </enumeratedValue>
87753                <enumeratedValue>
87754                  <name>010</name>
87755                  <description>Alternative 2 (chip-specific).</description>
87756                  <value>#010</value>
87757                </enumeratedValue>
87758                <enumeratedValue>
87759                  <name>011</name>
87760                  <description>Alternative 3 (chip-specific).</description>
87761                  <value>#011</value>
87762                </enumeratedValue>
87763                <enumeratedValue>
87764                  <name>100</name>
87765                  <description>Alternative 4 (chip-specific).</description>
87766                  <value>#100</value>
87767                </enumeratedValue>
87768                <enumeratedValue>
87769                  <name>101</name>
87770                  <description>Alternative 5 (chip-specific).</description>
87771                  <value>#101</value>
87772                </enumeratedValue>
87773                <enumeratedValue>
87774                  <name>110</name>
87775                  <description>Alternative 6 (chip-specific).</description>
87776                  <value>#110</value>
87777                </enumeratedValue>
87778                <enumeratedValue>
87779                  <name>111</name>
87780                  <description>Alternative 7 (chip-specific).</description>
87781                  <value>#111</value>
87782                </enumeratedValue>
87783              </enumeratedValues>
87784            </field>
87785            <field>
87786              <name>LK</name>
87787              <description>Lock Register</description>
87788              <bitOffset>15</bitOffset>
87789              <bitWidth>1</bitWidth>
87790              <access>read-write</access>
87791              <enumeratedValues>
87792                <enumeratedValue>
87793                  <name>0</name>
87794                  <description>Pin Control Register fields [15:0] are not locked.</description>
87795                  <value>#0</value>
87796                </enumeratedValue>
87797                <enumeratedValue>
87798                  <name>1</name>
87799                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
87800                  <value>#1</value>
87801                </enumeratedValue>
87802              </enumeratedValues>
87803            </field>
87804            <field>
87805              <name>IRQC</name>
87806              <description>Interrupt Configuration</description>
87807              <bitOffset>16</bitOffset>
87808              <bitWidth>4</bitWidth>
87809              <access>read-write</access>
87810              <enumeratedValues>
87811                <enumeratedValue>
87812                  <name>0000</name>
87813                  <description>Interrupt Status Flag (ISF) is disabled.</description>
87814                  <value>#0000</value>
87815                </enumeratedValue>
87816                <enumeratedValue>
87817                  <name>0001</name>
87818                  <description>ISF flag and DMA request on rising edge.</description>
87819                  <value>#0001</value>
87820                </enumeratedValue>
87821                <enumeratedValue>
87822                  <name>0010</name>
87823                  <description>ISF flag and DMA request on falling edge.</description>
87824                  <value>#0010</value>
87825                </enumeratedValue>
87826                <enumeratedValue>
87827                  <name>0011</name>
87828                  <description>ISF flag and DMA request on either edge.</description>
87829                  <value>#0011</value>
87830                </enumeratedValue>
87831                <enumeratedValue>
87832                  <name>1000</name>
87833                  <description>ISF flag and Interrupt when logic 0.</description>
87834                  <value>#1000</value>
87835                </enumeratedValue>
87836                <enumeratedValue>
87837                  <name>1001</name>
87838                  <description>ISF flag and Interrupt on rising-edge.</description>
87839                  <value>#1001</value>
87840                </enumeratedValue>
87841                <enumeratedValue>
87842                  <name>1010</name>
87843                  <description>ISF flag and Interrupt on falling-edge.</description>
87844                  <value>#1010</value>
87845                </enumeratedValue>
87846                <enumeratedValue>
87847                  <name>1011</name>
87848                  <description>ISF flag and Interrupt on either edge.</description>
87849                  <value>#1011</value>
87850                </enumeratedValue>
87851                <enumeratedValue>
87852                  <name>1100</name>
87853                  <description>ISF flag and Interrupt when logic 1.</description>
87854                  <value>#1100</value>
87855                </enumeratedValue>
87856              </enumeratedValues>
87857            </field>
87858            <field>
87859              <name>ISF</name>
87860              <description>Interrupt Status Flag</description>
87861              <bitOffset>24</bitOffset>
87862              <bitWidth>1</bitWidth>
87863              <access>read-write</access>
87864              <enumeratedValues>
87865                <enumeratedValue>
87866                  <name>0</name>
87867                  <description>Configured interrupt is not detected.</description>
87868                  <value>#0</value>
87869                </enumeratedValue>
87870                <enumeratedValue>
87871                  <name>1</name>
87872                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
87873                  <value>#1</value>
87874                </enumeratedValue>
87875              </enumeratedValues>
87876            </field>
87877          </fields>
87878        </register>
87879        <register>
87880          <name>PCR6</name>
87881          <description>Pin Control Register n</description>
87882          <addressOffset>0x18</addressOffset>
87883          <size>32</size>
87884          <access>read-write</access>
87885          <resetValue>0</resetValue>
87886          <resetMask>0xFFFFFFFF</resetMask>
87887          <fields>
87888            <field>
87889              <name>PS</name>
87890              <description>Pull Select</description>
87891              <bitOffset>0</bitOffset>
87892              <bitWidth>1</bitWidth>
87893              <access>read-write</access>
87894              <enumeratedValues>
87895                <enumeratedValue>
87896                  <name>0</name>
87897                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
87898                  <value>#0</value>
87899                </enumeratedValue>
87900                <enumeratedValue>
87901                  <name>1</name>
87902                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
87903                  <value>#1</value>
87904                </enumeratedValue>
87905              </enumeratedValues>
87906            </field>
87907            <field>
87908              <name>PE</name>
87909              <description>Pull Enable</description>
87910              <bitOffset>1</bitOffset>
87911              <bitWidth>1</bitWidth>
87912              <access>read-write</access>
87913              <enumeratedValues>
87914                <enumeratedValue>
87915                  <name>0</name>
87916                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
87917                  <value>#0</value>
87918                </enumeratedValue>
87919                <enumeratedValue>
87920                  <name>1</name>
87921                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
87922                  <value>#1</value>
87923                </enumeratedValue>
87924              </enumeratedValues>
87925            </field>
87926            <field>
87927              <name>SRE</name>
87928              <description>Slew Rate Enable</description>
87929              <bitOffset>2</bitOffset>
87930              <bitWidth>1</bitWidth>
87931              <access>read-write</access>
87932              <enumeratedValues>
87933                <enumeratedValue>
87934                  <name>0</name>
87935                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
87936                  <value>#0</value>
87937                </enumeratedValue>
87938                <enumeratedValue>
87939                  <name>1</name>
87940                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
87941                  <value>#1</value>
87942                </enumeratedValue>
87943              </enumeratedValues>
87944            </field>
87945            <field>
87946              <name>PFE</name>
87947              <description>Passive Filter Enable</description>
87948              <bitOffset>4</bitOffset>
87949              <bitWidth>1</bitWidth>
87950              <access>read-only</access>
87951              <enumeratedValues>
87952                <enumeratedValue>
87953                  <name>0</name>
87954                  <description>Passive input filter is disabled on the corresponding pin.</description>
87955                  <value>#0</value>
87956                </enumeratedValue>
87957                <enumeratedValue>
87958                  <name>1</name>
87959                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
87960                  <value>#1</value>
87961                </enumeratedValue>
87962              </enumeratedValues>
87963            </field>
87964            <field>
87965              <name>ODE</name>
87966              <description>Open Drain Enable</description>
87967              <bitOffset>5</bitOffset>
87968              <bitWidth>1</bitWidth>
87969              <access>read-write</access>
87970              <enumeratedValues>
87971                <enumeratedValue>
87972                  <name>0</name>
87973                  <description>Open drain output is disabled on the corresponding pin.</description>
87974                  <value>#0</value>
87975                </enumeratedValue>
87976                <enumeratedValue>
87977                  <name>1</name>
87978                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
87979                  <value>#1</value>
87980                </enumeratedValue>
87981              </enumeratedValues>
87982            </field>
87983            <field>
87984              <name>DSE</name>
87985              <description>Drive Strength Enable</description>
87986              <bitOffset>6</bitOffset>
87987              <bitWidth>1</bitWidth>
87988              <access>read-write</access>
87989              <enumeratedValues>
87990                <enumeratedValue>
87991                  <name>0</name>
87992                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
87993                  <value>#0</value>
87994                </enumeratedValue>
87995                <enumeratedValue>
87996                  <name>1</name>
87997                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
87998                  <value>#1</value>
87999                </enumeratedValue>
88000              </enumeratedValues>
88001            </field>
88002            <field>
88003              <name>MUX</name>
88004              <description>Pin Mux Control</description>
88005              <bitOffset>8</bitOffset>
88006              <bitWidth>3</bitWidth>
88007              <access>read-write</access>
88008              <enumeratedValues>
88009                <enumeratedValue>
88010                  <name>000</name>
88011                  <description>Pin disabled (Alternative 0) (analog).</description>
88012                  <value>#000</value>
88013                </enumeratedValue>
88014                <enumeratedValue>
88015                  <name>001</name>
88016                  <description>Alternative 1 (GPIO).</description>
88017                  <value>#001</value>
88018                </enumeratedValue>
88019                <enumeratedValue>
88020                  <name>010</name>
88021                  <description>Alternative 2 (chip-specific).</description>
88022                  <value>#010</value>
88023                </enumeratedValue>
88024                <enumeratedValue>
88025                  <name>011</name>
88026                  <description>Alternative 3 (chip-specific).</description>
88027                  <value>#011</value>
88028                </enumeratedValue>
88029                <enumeratedValue>
88030                  <name>100</name>
88031                  <description>Alternative 4 (chip-specific).</description>
88032                  <value>#100</value>
88033                </enumeratedValue>
88034                <enumeratedValue>
88035                  <name>101</name>
88036                  <description>Alternative 5 (chip-specific).</description>
88037                  <value>#101</value>
88038                </enumeratedValue>
88039                <enumeratedValue>
88040                  <name>110</name>
88041                  <description>Alternative 6 (chip-specific).</description>
88042                  <value>#110</value>
88043                </enumeratedValue>
88044                <enumeratedValue>
88045                  <name>111</name>
88046                  <description>Alternative 7 (chip-specific).</description>
88047                  <value>#111</value>
88048                </enumeratedValue>
88049              </enumeratedValues>
88050            </field>
88051            <field>
88052              <name>LK</name>
88053              <description>Lock Register</description>
88054              <bitOffset>15</bitOffset>
88055              <bitWidth>1</bitWidth>
88056              <access>read-write</access>
88057              <enumeratedValues>
88058                <enumeratedValue>
88059                  <name>0</name>
88060                  <description>Pin Control Register fields [15:0] are not locked.</description>
88061                  <value>#0</value>
88062                </enumeratedValue>
88063                <enumeratedValue>
88064                  <name>1</name>
88065                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
88066                  <value>#1</value>
88067                </enumeratedValue>
88068              </enumeratedValues>
88069            </field>
88070            <field>
88071              <name>IRQC</name>
88072              <description>Interrupt Configuration</description>
88073              <bitOffset>16</bitOffset>
88074              <bitWidth>4</bitWidth>
88075              <access>read-write</access>
88076              <enumeratedValues>
88077                <enumeratedValue>
88078                  <name>0000</name>
88079                  <description>Interrupt Status Flag (ISF) is disabled.</description>
88080                  <value>#0000</value>
88081                </enumeratedValue>
88082                <enumeratedValue>
88083                  <name>0001</name>
88084                  <description>ISF flag and DMA request on rising edge.</description>
88085                  <value>#0001</value>
88086                </enumeratedValue>
88087                <enumeratedValue>
88088                  <name>0010</name>
88089                  <description>ISF flag and DMA request on falling edge.</description>
88090                  <value>#0010</value>
88091                </enumeratedValue>
88092                <enumeratedValue>
88093                  <name>0011</name>
88094                  <description>ISF flag and DMA request on either edge.</description>
88095                  <value>#0011</value>
88096                </enumeratedValue>
88097                <enumeratedValue>
88098                  <name>1000</name>
88099                  <description>ISF flag and Interrupt when logic 0.</description>
88100                  <value>#1000</value>
88101                </enumeratedValue>
88102                <enumeratedValue>
88103                  <name>1001</name>
88104                  <description>ISF flag and Interrupt on rising-edge.</description>
88105                  <value>#1001</value>
88106                </enumeratedValue>
88107                <enumeratedValue>
88108                  <name>1010</name>
88109                  <description>ISF flag and Interrupt on falling-edge.</description>
88110                  <value>#1010</value>
88111                </enumeratedValue>
88112                <enumeratedValue>
88113                  <name>1011</name>
88114                  <description>ISF flag and Interrupt on either edge.</description>
88115                  <value>#1011</value>
88116                </enumeratedValue>
88117                <enumeratedValue>
88118                  <name>1100</name>
88119                  <description>ISF flag and Interrupt when logic 1.</description>
88120                  <value>#1100</value>
88121                </enumeratedValue>
88122              </enumeratedValues>
88123            </field>
88124            <field>
88125              <name>ISF</name>
88126              <description>Interrupt Status Flag</description>
88127              <bitOffset>24</bitOffset>
88128              <bitWidth>1</bitWidth>
88129              <access>read-write</access>
88130              <enumeratedValues>
88131                <enumeratedValue>
88132                  <name>0</name>
88133                  <description>Configured interrupt is not detected.</description>
88134                  <value>#0</value>
88135                </enumeratedValue>
88136                <enumeratedValue>
88137                  <name>1</name>
88138                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
88139                  <value>#1</value>
88140                </enumeratedValue>
88141              </enumeratedValues>
88142            </field>
88143          </fields>
88144        </register>
88145        <register>
88146          <name>PCR7</name>
88147          <description>Pin Control Register n</description>
88148          <addressOffset>0x1C</addressOffset>
88149          <size>32</size>
88150          <access>read-write</access>
88151          <resetValue>0</resetValue>
88152          <resetMask>0xFFFFFFFF</resetMask>
88153          <fields>
88154            <field>
88155              <name>PS</name>
88156              <description>Pull Select</description>
88157              <bitOffset>0</bitOffset>
88158              <bitWidth>1</bitWidth>
88159              <access>read-write</access>
88160              <enumeratedValues>
88161                <enumeratedValue>
88162                  <name>0</name>
88163                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
88164                  <value>#0</value>
88165                </enumeratedValue>
88166                <enumeratedValue>
88167                  <name>1</name>
88168                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
88169                  <value>#1</value>
88170                </enumeratedValue>
88171              </enumeratedValues>
88172            </field>
88173            <field>
88174              <name>PE</name>
88175              <description>Pull Enable</description>
88176              <bitOffset>1</bitOffset>
88177              <bitWidth>1</bitWidth>
88178              <access>read-write</access>
88179              <enumeratedValues>
88180                <enumeratedValue>
88181                  <name>0</name>
88182                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
88183                  <value>#0</value>
88184                </enumeratedValue>
88185                <enumeratedValue>
88186                  <name>1</name>
88187                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
88188                  <value>#1</value>
88189                </enumeratedValue>
88190              </enumeratedValues>
88191            </field>
88192            <field>
88193              <name>SRE</name>
88194              <description>Slew Rate Enable</description>
88195              <bitOffset>2</bitOffset>
88196              <bitWidth>1</bitWidth>
88197              <access>read-write</access>
88198              <enumeratedValues>
88199                <enumeratedValue>
88200                  <name>0</name>
88201                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
88202                  <value>#0</value>
88203                </enumeratedValue>
88204                <enumeratedValue>
88205                  <name>1</name>
88206                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
88207                  <value>#1</value>
88208                </enumeratedValue>
88209              </enumeratedValues>
88210            </field>
88211            <field>
88212              <name>PFE</name>
88213              <description>Passive Filter Enable</description>
88214              <bitOffset>4</bitOffset>
88215              <bitWidth>1</bitWidth>
88216              <access>read-only</access>
88217              <enumeratedValues>
88218                <enumeratedValue>
88219                  <name>0</name>
88220                  <description>Passive input filter is disabled on the corresponding pin.</description>
88221                  <value>#0</value>
88222                </enumeratedValue>
88223                <enumeratedValue>
88224                  <name>1</name>
88225                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
88226                  <value>#1</value>
88227                </enumeratedValue>
88228              </enumeratedValues>
88229            </field>
88230            <field>
88231              <name>ODE</name>
88232              <description>Open Drain Enable</description>
88233              <bitOffset>5</bitOffset>
88234              <bitWidth>1</bitWidth>
88235              <access>read-write</access>
88236              <enumeratedValues>
88237                <enumeratedValue>
88238                  <name>0</name>
88239                  <description>Open drain output is disabled on the corresponding pin.</description>
88240                  <value>#0</value>
88241                </enumeratedValue>
88242                <enumeratedValue>
88243                  <name>1</name>
88244                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
88245                  <value>#1</value>
88246                </enumeratedValue>
88247              </enumeratedValues>
88248            </field>
88249            <field>
88250              <name>DSE</name>
88251              <description>Drive Strength Enable</description>
88252              <bitOffset>6</bitOffset>
88253              <bitWidth>1</bitWidth>
88254              <access>read-write</access>
88255              <enumeratedValues>
88256                <enumeratedValue>
88257                  <name>0</name>
88258                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
88259                  <value>#0</value>
88260                </enumeratedValue>
88261                <enumeratedValue>
88262                  <name>1</name>
88263                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
88264                  <value>#1</value>
88265                </enumeratedValue>
88266              </enumeratedValues>
88267            </field>
88268            <field>
88269              <name>MUX</name>
88270              <description>Pin Mux Control</description>
88271              <bitOffset>8</bitOffset>
88272              <bitWidth>3</bitWidth>
88273              <access>read-write</access>
88274              <enumeratedValues>
88275                <enumeratedValue>
88276                  <name>000</name>
88277                  <description>Pin disabled (Alternative 0) (analog).</description>
88278                  <value>#000</value>
88279                </enumeratedValue>
88280                <enumeratedValue>
88281                  <name>001</name>
88282                  <description>Alternative 1 (GPIO).</description>
88283                  <value>#001</value>
88284                </enumeratedValue>
88285                <enumeratedValue>
88286                  <name>010</name>
88287                  <description>Alternative 2 (chip-specific).</description>
88288                  <value>#010</value>
88289                </enumeratedValue>
88290                <enumeratedValue>
88291                  <name>011</name>
88292                  <description>Alternative 3 (chip-specific).</description>
88293                  <value>#011</value>
88294                </enumeratedValue>
88295                <enumeratedValue>
88296                  <name>100</name>
88297                  <description>Alternative 4 (chip-specific).</description>
88298                  <value>#100</value>
88299                </enumeratedValue>
88300                <enumeratedValue>
88301                  <name>101</name>
88302                  <description>Alternative 5 (chip-specific).</description>
88303                  <value>#101</value>
88304                </enumeratedValue>
88305                <enumeratedValue>
88306                  <name>110</name>
88307                  <description>Alternative 6 (chip-specific).</description>
88308                  <value>#110</value>
88309                </enumeratedValue>
88310                <enumeratedValue>
88311                  <name>111</name>
88312                  <description>Alternative 7 (chip-specific).</description>
88313                  <value>#111</value>
88314                </enumeratedValue>
88315              </enumeratedValues>
88316            </field>
88317            <field>
88318              <name>LK</name>
88319              <description>Lock Register</description>
88320              <bitOffset>15</bitOffset>
88321              <bitWidth>1</bitWidth>
88322              <access>read-write</access>
88323              <enumeratedValues>
88324                <enumeratedValue>
88325                  <name>0</name>
88326                  <description>Pin Control Register fields [15:0] are not locked.</description>
88327                  <value>#0</value>
88328                </enumeratedValue>
88329                <enumeratedValue>
88330                  <name>1</name>
88331                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
88332                  <value>#1</value>
88333                </enumeratedValue>
88334              </enumeratedValues>
88335            </field>
88336            <field>
88337              <name>IRQC</name>
88338              <description>Interrupt Configuration</description>
88339              <bitOffset>16</bitOffset>
88340              <bitWidth>4</bitWidth>
88341              <access>read-write</access>
88342              <enumeratedValues>
88343                <enumeratedValue>
88344                  <name>0000</name>
88345                  <description>Interrupt Status Flag (ISF) is disabled.</description>
88346                  <value>#0000</value>
88347                </enumeratedValue>
88348                <enumeratedValue>
88349                  <name>0001</name>
88350                  <description>ISF flag and DMA request on rising edge.</description>
88351                  <value>#0001</value>
88352                </enumeratedValue>
88353                <enumeratedValue>
88354                  <name>0010</name>
88355                  <description>ISF flag and DMA request on falling edge.</description>
88356                  <value>#0010</value>
88357                </enumeratedValue>
88358                <enumeratedValue>
88359                  <name>0011</name>
88360                  <description>ISF flag and DMA request on either edge.</description>
88361                  <value>#0011</value>
88362                </enumeratedValue>
88363                <enumeratedValue>
88364                  <name>1000</name>
88365                  <description>ISF flag and Interrupt when logic 0.</description>
88366                  <value>#1000</value>
88367                </enumeratedValue>
88368                <enumeratedValue>
88369                  <name>1001</name>
88370                  <description>ISF flag and Interrupt on rising-edge.</description>
88371                  <value>#1001</value>
88372                </enumeratedValue>
88373                <enumeratedValue>
88374                  <name>1010</name>
88375                  <description>ISF flag and Interrupt on falling-edge.</description>
88376                  <value>#1010</value>
88377                </enumeratedValue>
88378                <enumeratedValue>
88379                  <name>1011</name>
88380                  <description>ISF flag and Interrupt on either edge.</description>
88381                  <value>#1011</value>
88382                </enumeratedValue>
88383                <enumeratedValue>
88384                  <name>1100</name>
88385                  <description>ISF flag and Interrupt when logic 1.</description>
88386                  <value>#1100</value>
88387                </enumeratedValue>
88388              </enumeratedValues>
88389            </field>
88390            <field>
88391              <name>ISF</name>
88392              <description>Interrupt Status Flag</description>
88393              <bitOffset>24</bitOffset>
88394              <bitWidth>1</bitWidth>
88395              <access>read-write</access>
88396              <enumeratedValues>
88397                <enumeratedValue>
88398                  <name>0</name>
88399                  <description>Configured interrupt is not detected.</description>
88400                  <value>#0</value>
88401                </enumeratedValue>
88402                <enumeratedValue>
88403                  <name>1</name>
88404                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
88405                  <value>#1</value>
88406                </enumeratedValue>
88407              </enumeratedValues>
88408            </field>
88409          </fields>
88410        </register>
88411        <register>
88412          <name>PCR8</name>
88413          <description>Pin Control Register n</description>
88414          <addressOffset>0x20</addressOffset>
88415          <size>32</size>
88416          <access>read-write</access>
88417          <resetValue>0</resetValue>
88418          <resetMask>0xFFFFFFFF</resetMask>
88419          <fields>
88420            <field>
88421              <name>PS</name>
88422              <description>Pull Select</description>
88423              <bitOffset>0</bitOffset>
88424              <bitWidth>1</bitWidth>
88425              <access>read-write</access>
88426              <enumeratedValues>
88427                <enumeratedValue>
88428                  <name>0</name>
88429                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
88430                  <value>#0</value>
88431                </enumeratedValue>
88432                <enumeratedValue>
88433                  <name>1</name>
88434                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
88435                  <value>#1</value>
88436                </enumeratedValue>
88437              </enumeratedValues>
88438            </field>
88439            <field>
88440              <name>PE</name>
88441              <description>Pull Enable</description>
88442              <bitOffset>1</bitOffset>
88443              <bitWidth>1</bitWidth>
88444              <access>read-write</access>
88445              <enumeratedValues>
88446                <enumeratedValue>
88447                  <name>0</name>
88448                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
88449                  <value>#0</value>
88450                </enumeratedValue>
88451                <enumeratedValue>
88452                  <name>1</name>
88453                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
88454                  <value>#1</value>
88455                </enumeratedValue>
88456              </enumeratedValues>
88457            </field>
88458            <field>
88459              <name>SRE</name>
88460              <description>Slew Rate Enable</description>
88461              <bitOffset>2</bitOffset>
88462              <bitWidth>1</bitWidth>
88463              <access>read-write</access>
88464              <enumeratedValues>
88465                <enumeratedValue>
88466                  <name>0</name>
88467                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
88468                  <value>#0</value>
88469                </enumeratedValue>
88470                <enumeratedValue>
88471                  <name>1</name>
88472                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
88473                  <value>#1</value>
88474                </enumeratedValue>
88475              </enumeratedValues>
88476            </field>
88477            <field>
88478              <name>PFE</name>
88479              <description>Passive Filter Enable</description>
88480              <bitOffset>4</bitOffset>
88481              <bitWidth>1</bitWidth>
88482              <access>read-only</access>
88483              <enumeratedValues>
88484                <enumeratedValue>
88485                  <name>0</name>
88486                  <description>Passive input filter is disabled on the corresponding pin.</description>
88487                  <value>#0</value>
88488                </enumeratedValue>
88489                <enumeratedValue>
88490                  <name>1</name>
88491                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
88492                  <value>#1</value>
88493                </enumeratedValue>
88494              </enumeratedValues>
88495            </field>
88496            <field>
88497              <name>ODE</name>
88498              <description>Open Drain Enable</description>
88499              <bitOffset>5</bitOffset>
88500              <bitWidth>1</bitWidth>
88501              <access>read-write</access>
88502              <enumeratedValues>
88503                <enumeratedValue>
88504                  <name>0</name>
88505                  <description>Open drain output is disabled on the corresponding pin.</description>
88506                  <value>#0</value>
88507                </enumeratedValue>
88508                <enumeratedValue>
88509                  <name>1</name>
88510                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
88511                  <value>#1</value>
88512                </enumeratedValue>
88513              </enumeratedValues>
88514            </field>
88515            <field>
88516              <name>DSE</name>
88517              <description>Drive Strength Enable</description>
88518              <bitOffset>6</bitOffset>
88519              <bitWidth>1</bitWidth>
88520              <access>read-only</access>
88521              <enumeratedValues>
88522                <enumeratedValue>
88523                  <name>0</name>
88524                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
88525                  <value>#0</value>
88526                </enumeratedValue>
88527                <enumeratedValue>
88528                  <name>1</name>
88529                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
88530                  <value>#1</value>
88531                </enumeratedValue>
88532              </enumeratedValues>
88533            </field>
88534            <field>
88535              <name>MUX</name>
88536              <description>Pin Mux Control</description>
88537              <bitOffset>8</bitOffset>
88538              <bitWidth>3</bitWidth>
88539              <access>read-write</access>
88540              <enumeratedValues>
88541                <enumeratedValue>
88542                  <name>000</name>
88543                  <description>Pin disabled (Alternative 0) (analog).</description>
88544                  <value>#000</value>
88545                </enumeratedValue>
88546                <enumeratedValue>
88547                  <name>001</name>
88548                  <description>Alternative 1 (GPIO).</description>
88549                  <value>#001</value>
88550                </enumeratedValue>
88551                <enumeratedValue>
88552                  <name>010</name>
88553                  <description>Alternative 2 (chip-specific).</description>
88554                  <value>#010</value>
88555                </enumeratedValue>
88556                <enumeratedValue>
88557                  <name>011</name>
88558                  <description>Alternative 3 (chip-specific).</description>
88559                  <value>#011</value>
88560                </enumeratedValue>
88561                <enumeratedValue>
88562                  <name>100</name>
88563                  <description>Alternative 4 (chip-specific).</description>
88564                  <value>#100</value>
88565                </enumeratedValue>
88566                <enumeratedValue>
88567                  <name>101</name>
88568                  <description>Alternative 5 (chip-specific).</description>
88569                  <value>#101</value>
88570                </enumeratedValue>
88571                <enumeratedValue>
88572                  <name>110</name>
88573                  <description>Alternative 6 (chip-specific).</description>
88574                  <value>#110</value>
88575                </enumeratedValue>
88576                <enumeratedValue>
88577                  <name>111</name>
88578                  <description>Alternative 7 (chip-specific).</description>
88579                  <value>#111</value>
88580                </enumeratedValue>
88581              </enumeratedValues>
88582            </field>
88583            <field>
88584              <name>LK</name>
88585              <description>Lock Register</description>
88586              <bitOffset>15</bitOffset>
88587              <bitWidth>1</bitWidth>
88588              <access>read-write</access>
88589              <enumeratedValues>
88590                <enumeratedValue>
88591                  <name>0</name>
88592                  <description>Pin Control Register fields [15:0] are not locked.</description>
88593                  <value>#0</value>
88594                </enumeratedValue>
88595                <enumeratedValue>
88596                  <name>1</name>
88597                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
88598                  <value>#1</value>
88599                </enumeratedValue>
88600              </enumeratedValues>
88601            </field>
88602            <field>
88603              <name>IRQC</name>
88604              <description>Interrupt Configuration</description>
88605              <bitOffset>16</bitOffset>
88606              <bitWidth>4</bitWidth>
88607              <access>read-write</access>
88608              <enumeratedValues>
88609                <enumeratedValue>
88610                  <name>0000</name>
88611                  <description>Interrupt Status Flag (ISF) is disabled.</description>
88612                  <value>#0000</value>
88613                </enumeratedValue>
88614                <enumeratedValue>
88615                  <name>0001</name>
88616                  <description>ISF flag and DMA request on rising edge.</description>
88617                  <value>#0001</value>
88618                </enumeratedValue>
88619                <enumeratedValue>
88620                  <name>0010</name>
88621                  <description>ISF flag and DMA request on falling edge.</description>
88622                  <value>#0010</value>
88623                </enumeratedValue>
88624                <enumeratedValue>
88625                  <name>0011</name>
88626                  <description>ISF flag and DMA request on either edge.</description>
88627                  <value>#0011</value>
88628                </enumeratedValue>
88629                <enumeratedValue>
88630                  <name>1000</name>
88631                  <description>ISF flag and Interrupt when logic 0.</description>
88632                  <value>#1000</value>
88633                </enumeratedValue>
88634                <enumeratedValue>
88635                  <name>1001</name>
88636                  <description>ISF flag and Interrupt on rising-edge.</description>
88637                  <value>#1001</value>
88638                </enumeratedValue>
88639                <enumeratedValue>
88640                  <name>1010</name>
88641                  <description>ISF flag and Interrupt on falling-edge.</description>
88642                  <value>#1010</value>
88643                </enumeratedValue>
88644                <enumeratedValue>
88645                  <name>1011</name>
88646                  <description>ISF flag and Interrupt on either edge.</description>
88647                  <value>#1011</value>
88648                </enumeratedValue>
88649                <enumeratedValue>
88650                  <name>1100</name>
88651                  <description>ISF flag and Interrupt when logic 1.</description>
88652                  <value>#1100</value>
88653                </enumeratedValue>
88654              </enumeratedValues>
88655            </field>
88656            <field>
88657              <name>ISF</name>
88658              <description>Interrupt Status Flag</description>
88659              <bitOffset>24</bitOffset>
88660              <bitWidth>1</bitWidth>
88661              <access>read-write</access>
88662              <enumeratedValues>
88663                <enumeratedValue>
88664                  <name>0</name>
88665                  <description>Configured interrupt is not detected.</description>
88666                  <value>#0</value>
88667                </enumeratedValue>
88668                <enumeratedValue>
88669                  <name>1</name>
88670                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
88671                  <value>#1</value>
88672                </enumeratedValue>
88673              </enumeratedValues>
88674            </field>
88675          </fields>
88676        </register>
88677        <register>
88678          <name>PCR9</name>
88679          <description>Pin Control Register n</description>
88680          <addressOffset>0x24</addressOffset>
88681          <size>32</size>
88682          <access>read-write</access>
88683          <resetValue>0</resetValue>
88684          <resetMask>0xFFFFFFFF</resetMask>
88685          <fields>
88686            <field>
88687              <name>PS</name>
88688              <description>Pull Select</description>
88689              <bitOffset>0</bitOffset>
88690              <bitWidth>1</bitWidth>
88691              <access>read-write</access>
88692              <enumeratedValues>
88693                <enumeratedValue>
88694                  <name>0</name>
88695                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
88696                  <value>#0</value>
88697                </enumeratedValue>
88698                <enumeratedValue>
88699                  <name>1</name>
88700                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
88701                  <value>#1</value>
88702                </enumeratedValue>
88703              </enumeratedValues>
88704            </field>
88705            <field>
88706              <name>PE</name>
88707              <description>Pull Enable</description>
88708              <bitOffset>1</bitOffset>
88709              <bitWidth>1</bitWidth>
88710              <access>read-write</access>
88711              <enumeratedValues>
88712                <enumeratedValue>
88713                  <name>0</name>
88714                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
88715                  <value>#0</value>
88716                </enumeratedValue>
88717                <enumeratedValue>
88718                  <name>1</name>
88719                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
88720                  <value>#1</value>
88721                </enumeratedValue>
88722              </enumeratedValues>
88723            </field>
88724            <field>
88725              <name>SRE</name>
88726              <description>Slew Rate Enable</description>
88727              <bitOffset>2</bitOffset>
88728              <bitWidth>1</bitWidth>
88729              <access>read-write</access>
88730              <enumeratedValues>
88731                <enumeratedValue>
88732                  <name>0</name>
88733                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
88734                  <value>#0</value>
88735                </enumeratedValue>
88736                <enumeratedValue>
88737                  <name>1</name>
88738                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
88739                  <value>#1</value>
88740                </enumeratedValue>
88741              </enumeratedValues>
88742            </field>
88743            <field>
88744              <name>PFE</name>
88745              <description>Passive Filter Enable</description>
88746              <bitOffset>4</bitOffset>
88747              <bitWidth>1</bitWidth>
88748              <access>read-only</access>
88749              <enumeratedValues>
88750                <enumeratedValue>
88751                  <name>0</name>
88752                  <description>Passive input filter is disabled on the corresponding pin.</description>
88753                  <value>#0</value>
88754                </enumeratedValue>
88755                <enumeratedValue>
88756                  <name>1</name>
88757                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
88758                  <value>#1</value>
88759                </enumeratedValue>
88760              </enumeratedValues>
88761            </field>
88762            <field>
88763              <name>ODE</name>
88764              <description>Open Drain Enable</description>
88765              <bitOffset>5</bitOffset>
88766              <bitWidth>1</bitWidth>
88767              <access>read-write</access>
88768              <enumeratedValues>
88769                <enumeratedValue>
88770                  <name>0</name>
88771                  <description>Open drain output is disabled on the corresponding pin.</description>
88772                  <value>#0</value>
88773                </enumeratedValue>
88774                <enumeratedValue>
88775                  <name>1</name>
88776                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
88777                  <value>#1</value>
88778                </enumeratedValue>
88779              </enumeratedValues>
88780            </field>
88781            <field>
88782              <name>DSE</name>
88783              <description>Drive Strength Enable</description>
88784              <bitOffset>6</bitOffset>
88785              <bitWidth>1</bitWidth>
88786              <access>read-only</access>
88787              <enumeratedValues>
88788                <enumeratedValue>
88789                  <name>0</name>
88790                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
88791                  <value>#0</value>
88792                </enumeratedValue>
88793                <enumeratedValue>
88794                  <name>1</name>
88795                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
88796                  <value>#1</value>
88797                </enumeratedValue>
88798              </enumeratedValues>
88799            </field>
88800            <field>
88801              <name>MUX</name>
88802              <description>Pin Mux Control</description>
88803              <bitOffset>8</bitOffset>
88804              <bitWidth>3</bitWidth>
88805              <access>read-write</access>
88806              <enumeratedValues>
88807                <enumeratedValue>
88808                  <name>000</name>
88809                  <description>Pin disabled (Alternative 0) (analog).</description>
88810                  <value>#000</value>
88811                </enumeratedValue>
88812                <enumeratedValue>
88813                  <name>001</name>
88814                  <description>Alternative 1 (GPIO).</description>
88815                  <value>#001</value>
88816                </enumeratedValue>
88817                <enumeratedValue>
88818                  <name>010</name>
88819                  <description>Alternative 2 (chip-specific).</description>
88820                  <value>#010</value>
88821                </enumeratedValue>
88822                <enumeratedValue>
88823                  <name>011</name>
88824                  <description>Alternative 3 (chip-specific).</description>
88825                  <value>#011</value>
88826                </enumeratedValue>
88827                <enumeratedValue>
88828                  <name>100</name>
88829                  <description>Alternative 4 (chip-specific).</description>
88830                  <value>#100</value>
88831                </enumeratedValue>
88832                <enumeratedValue>
88833                  <name>101</name>
88834                  <description>Alternative 5 (chip-specific).</description>
88835                  <value>#101</value>
88836                </enumeratedValue>
88837                <enumeratedValue>
88838                  <name>110</name>
88839                  <description>Alternative 6 (chip-specific).</description>
88840                  <value>#110</value>
88841                </enumeratedValue>
88842                <enumeratedValue>
88843                  <name>111</name>
88844                  <description>Alternative 7 (chip-specific).</description>
88845                  <value>#111</value>
88846                </enumeratedValue>
88847              </enumeratedValues>
88848            </field>
88849            <field>
88850              <name>LK</name>
88851              <description>Lock Register</description>
88852              <bitOffset>15</bitOffset>
88853              <bitWidth>1</bitWidth>
88854              <access>read-write</access>
88855              <enumeratedValues>
88856                <enumeratedValue>
88857                  <name>0</name>
88858                  <description>Pin Control Register fields [15:0] are not locked.</description>
88859                  <value>#0</value>
88860                </enumeratedValue>
88861                <enumeratedValue>
88862                  <name>1</name>
88863                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
88864                  <value>#1</value>
88865                </enumeratedValue>
88866              </enumeratedValues>
88867            </field>
88868            <field>
88869              <name>IRQC</name>
88870              <description>Interrupt Configuration</description>
88871              <bitOffset>16</bitOffset>
88872              <bitWidth>4</bitWidth>
88873              <access>read-write</access>
88874              <enumeratedValues>
88875                <enumeratedValue>
88876                  <name>0000</name>
88877                  <description>Interrupt Status Flag (ISF) is disabled.</description>
88878                  <value>#0000</value>
88879                </enumeratedValue>
88880                <enumeratedValue>
88881                  <name>0001</name>
88882                  <description>ISF flag and DMA request on rising edge.</description>
88883                  <value>#0001</value>
88884                </enumeratedValue>
88885                <enumeratedValue>
88886                  <name>0010</name>
88887                  <description>ISF flag and DMA request on falling edge.</description>
88888                  <value>#0010</value>
88889                </enumeratedValue>
88890                <enumeratedValue>
88891                  <name>0011</name>
88892                  <description>ISF flag and DMA request on either edge.</description>
88893                  <value>#0011</value>
88894                </enumeratedValue>
88895                <enumeratedValue>
88896                  <name>1000</name>
88897                  <description>ISF flag and Interrupt when logic 0.</description>
88898                  <value>#1000</value>
88899                </enumeratedValue>
88900                <enumeratedValue>
88901                  <name>1001</name>
88902                  <description>ISF flag and Interrupt on rising-edge.</description>
88903                  <value>#1001</value>
88904                </enumeratedValue>
88905                <enumeratedValue>
88906                  <name>1010</name>
88907                  <description>ISF flag and Interrupt on falling-edge.</description>
88908                  <value>#1010</value>
88909                </enumeratedValue>
88910                <enumeratedValue>
88911                  <name>1011</name>
88912                  <description>ISF flag and Interrupt on either edge.</description>
88913                  <value>#1011</value>
88914                </enumeratedValue>
88915                <enumeratedValue>
88916                  <name>1100</name>
88917                  <description>ISF flag and Interrupt when logic 1.</description>
88918                  <value>#1100</value>
88919                </enumeratedValue>
88920              </enumeratedValues>
88921            </field>
88922            <field>
88923              <name>ISF</name>
88924              <description>Interrupt Status Flag</description>
88925              <bitOffset>24</bitOffset>
88926              <bitWidth>1</bitWidth>
88927              <access>read-write</access>
88928              <enumeratedValues>
88929                <enumeratedValue>
88930                  <name>0</name>
88931                  <description>Configured interrupt is not detected.</description>
88932                  <value>#0</value>
88933                </enumeratedValue>
88934                <enumeratedValue>
88935                  <name>1</name>
88936                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
88937                  <value>#1</value>
88938                </enumeratedValue>
88939              </enumeratedValues>
88940            </field>
88941          </fields>
88942        </register>
88943        <register>
88944          <name>PCR10</name>
88945          <description>Pin Control Register n</description>
88946          <addressOffset>0x28</addressOffset>
88947          <size>32</size>
88948          <access>read-write</access>
88949          <resetValue>0</resetValue>
88950          <resetMask>0xFFFFFFFF</resetMask>
88951          <fields>
88952            <field>
88953              <name>PS</name>
88954              <description>Pull Select</description>
88955              <bitOffset>0</bitOffset>
88956              <bitWidth>1</bitWidth>
88957              <access>read-write</access>
88958              <enumeratedValues>
88959                <enumeratedValue>
88960                  <name>0</name>
88961                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
88962                  <value>#0</value>
88963                </enumeratedValue>
88964                <enumeratedValue>
88965                  <name>1</name>
88966                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
88967                  <value>#1</value>
88968                </enumeratedValue>
88969              </enumeratedValues>
88970            </field>
88971            <field>
88972              <name>PE</name>
88973              <description>Pull Enable</description>
88974              <bitOffset>1</bitOffset>
88975              <bitWidth>1</bitWidth>
88976              <access>read-write</access>
88977              <enumeratedValues>
88978                <enumeratedValue>
88979                  <name>0</name>
88980                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
88981                  <value>#0</value>
88982                </enumeratedValue>
88983                <enumeratedValue>
88984                  <name>1</name>
88985                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
88986                  <value>#1</value>
88987                </enumeratedValue>
88988              </enumeratedValues>
88989            </field>
88990            <field>
88991              <name>SRE</name>
88992              <description>Slew Rate Enable</description>
88993              <bitOffset>2</bitOffset>
88994              <bitWidth>1</bitWidth>
88995              <access>read-write</access>
88996              <enumeratedValues>
88997                <enumeratedValue>
88998                  <name>0</name>
88999                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
89000                  <value>#0</value>
89001                </enumeratedValue>
89002                <enumeratedValue>
89003                  <name>1</name>
89004                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
89005                  <value>#1</value>
89006                </enumeratedValue>
89007              </enumeratedValues>
89008            </field>
89009            <field>
89010              <name>PFE</name>
89011              <description>Passive Filter Enable</description>
89012              <bitOffset>4</bitOffset>
89013              <bitWidth>1</bitWidth>
89014              <access>read-only</access>
89015              <enumeratedValues>
89016                <enumeratedValue>
89017                  <name>0</name>
89018                  <description>Passive input filter is disabled on the corresponding pin.</description>
89019                  <value>#0</value>
89020                </enumeratedValue>
89021                <enumeratedValue>
89022                  <name>1</name>
89023                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
89024                  <value>#1</value>
89025                </enumeratedValue>
89026              </enumeratedValues>
89027            </field>
89028            <field>
89029              <name>ODE</name>
89030              <description>Open Drain Enable</description>
89031              <bitOffset>5</bitOffset>
89032              <bitWidth>1</bitWidth>
89033              <access>read-write</access>
89034              <enumeratedValues>
89035                <enumeratedValue>
89036                  <name>0</name>
89037                  <description>Open drain output is disabled on the corresponding pin.</description>
89038                  <value>#0</value>
89039                </enumeratedValue>
89040                <enumeratedValue>
89041                  <name>1</name>
89042                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
89043                  <value>#1</value>
89044                </enumeratedValue>
89045              </enumeratedValues>
89046            </field>
89047            <field>
89048              <name>DSE</name>
89049              <description>Drive Strength Enable</description>
89050              <bitOffset>6</bitOffset>
89051              <bitWidth>1</bitWidth>
89052              <access>read-only</access>
89053              <enumeratedValues>
89054                <enumeratedValue>
89055                  <name>0</name>
89056                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
89057                  <value>#0</value>
89058                </enumeratedValue>
89059                <enumeratedValue>
89060                  <name>1</name>
89061                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
89062                  <value>#1</value>
89063                </enumeratedValue>
89064              </enumeratedValues>
89065            </field>
89066            <field>
89067              <name>MUX</name>
89068              <description>Pin Mux Control</description>
89069              <bitOffset>8</bitOffset>
89070              <bitWidth>3</bitWidth>
89071              <access>read-write</access>
89072              <enumeratedValues>
89073                <enumeratedValue>
89074                  <name>000</name>
89075                  <description>Pin disabled (Alternative 0) (analog).</description>
89076                  <value>#000</value>
89077                </enumeratedValue>
89078                <enumeratedValue>
89079                  <name>001</name>
89080                  <description>Alternative 1 (GPIO).</description>
89081                  <value>#001</value>
89082                </enumeratedValue>
89083                <enumeratedValue>
89084                  <name>010</name>
89085                  <description>Alternative 2 (chip-specific).</description>
89086                  <value>#010</value>
89087                </enumeratedValue>
89088                <enumeratedValue>
89089                  <name>011</name>
89090                  <description>Alternative 3 (chip-specific).</description>
89091                  <value>#011</value>
89092                </enumeratedValue>
89093                <enumeratedValue>
89094                  <name>100</name>
89095                  <description>Alternative 4 (chip-specific).</description>
89096                  <value>#100</value>
89097                </enumeratedValue>
89098                <enumeratedValue>
89099                  <name>101</name>
89100                  <description>Alternative 5 (chip-specific).</description>
89101                  <value>#101</value>
89102                </enumeratedValue>
89103                <enumeratedValue>
89104                  <name>110</name>
89105                  <description>Alternative 6 (chip-specific).</description>
89106                  <value>#110</value>
89107                </enumeratedValue>
89108                <enumeratedValue>
89109                  <name>111</name>
89110                  <description>Alternative 7 (chip-specific).</description>
89111                  <value>#111</value>
89112                </enumeratedValue>
89113              </enumeratedValues>
89114            </field>
89115            <field>
89116              <name>LK</name>
89117              <description>Lock Register</description>
89118              <bitOffset>15</bitOffset>
89119              <bitWidth>1</bitWidth>
89120              <access>read-write</access>
89121              <enumeratedValues>
89122                <enumeratedValue>
89123                  <name>0</name>
89124                  <description>Pin Control Register fields [15:0] are not locked.</description>
89125                  <value>#0</value>
89126                </enumeratedValue>
89127                <enumeratedValue>
89128                  <name>1</name>
89129                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
89130                  <value>#1</value>
89131                </enumeratedValue>
89132              </enumeratedValues>
89133            </field>
89134            <field>
89135              <name>IRQC</name>
89136              <description>Interrupt Configuration</description>
89137              <bitOffset>16</bitOffset>
89138              <bitWidth>4</bitWidth>
89139              <access>read-write</access>
89140              <enumeratedValues>
89141                <enumeratedValue>
89142                  <name>0000</name>
89143                  <description>Interrupt Status Flag (ISF) is disabled.</description>
89144                  <value>#0000</value>
89145                </enumeratedValue>
89146                <enumeratedValue>
89147                  <name>0001</name>
89148                  <description>ISF flag and DMA request on rising edge.</description>
89149                  <value>#0001</value>
89150                </enumeratedValue>
89151                <enumeratedValue>
89152                  <name>0010</name>
89153                  <description>ISF flag and DMA request on falling edge.</description>
89154                  <value>#0010</value>
89155                </enumeratedValue>
89156                <enumeratedValue>
89157                  <name>0011</name>
89158                  <description>ISF flag and DMA request on either edge.</description>
89159                  <value>#0011</value>
89160                </enumeratedValue>
89161                <enumeratedValue>
89162                  <name>1000</name>
89163                  <description>ISF flag and Interrupt when logic 0.</description>
89164                  <value>#1000</value>
89165                </enumeratedValue>
89166                <enumeratedValue>
89167                  <name>1001</name>
89168                  <description>ISF flag and Interrupt on rising-edge.</description>
89169                  <value>#1001</value>
89170                </enumeratedValue>
89171                <enumeratedValue>
89172                  <name>1010</name>
89173                  <description>ISF flag and Interrupt on falling-edge.</description>
89174                  <value>#1010</value>
89175                </enumeratedValue>
89176                <enumeratedValue>
89177                  <name>1011</name>
89178                  <description>ISF flag and Interrupt on either edge.</description>
89179                  <value>#1011</value>
89180                </enumeratedValue>
89181                <enumeratedValue>
89182                  <name>1100</name>
89183                  <description>ISF flag and Interrupt when logic 1.</description>
89184                  <value>#1100</value>
89185                </enumeratedValue>
89186              </enumeratedValues>
89187            </field>
89188            <field>
89189              <name>ISF</name>
89190              <description>Interrupt Status Flag</description>
89191              <bitOffset>24</bitOffset>
89192              <bitWidth>1</bitWidth>
89193              <access>read-write</access>
89194              <enumeratedValues>
89195                <enumeratedValue>
89196                  <name>0</name>
89197                  <description>Configured interrupt is not detected.</description>
89198                  <value>#0</value>
89199                </enumeratedValue>
89200                <enumeratedValue>
89201                  <name>1</name>
89202                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
89203                  <value>#1</value>
89204                </enumeratedValue>
89205              </enumeratedValues>
89206            </field>
89207          </fields>
89208        </register>
89209        <register>
89210          <name>PCR11</name>
89211          <description>Pin Control Register n</description>
89212          <addressOffset>0x2C</addressOffset>
89213          <size>32</size>
89214          <access>read-write</access>
89215          <resetValue>0</resetValue>
89216          <resetMask>0xFFFFFFFF</resetMask>
89217          <fields>
89218            <field>
89219              <name>PS</name>
89220              <description>Pull Select</description>
89221              <bitOffset>0</bitOffset>
89222              <bitWidth>1</bitWidth>
89223              <access>read-write</access>
89224              <enumeratedValues>
89225                <enumeratedValue>
89226                  <name>0</name>
89227                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
89228                  <value>#0</value>
89229                </enumeratedValue>
89230                <enumeratedValue>
89231                  <name>1</name>
89232                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
89233                  <value>#1</value>
89234                </enumeratedValue>
89235              </enumeratedValues>
89236            </field>
89237            <field>
89238              <name>PE</name>
89239              <description>Pull Enable</description>
89240              <bitOffset>1</bitOffset>
89241              <bitWidth>1</bitWidth>
89242              <access>read-write</access>
89243              <enumeratedValues>
89244                <enumeratedValue>
89245                  <name>0</name>
89246                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
89247                  <value>#0</value>
89248                </enumeratedValue>
89249                <enumeratedValue>
89250                  <name>1</name>
89251                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
89252                  <value>#1</value>
89253                </enumeratedValue>
89254              </enumeratedValues>
89255            </field>
89256            <field>
89257              <name>SRE</name>
89258              <description>Slew Rate Enable</description>
89259              <bitOffset>2</bitOffset>
89260              <bitWidth>1</bitWidth>
89261              <access>read-write</access>
89262              <enumeratedValues>
89263                <enumeratedValue>
89264                  <name>0</name>
89265                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
89266                  <value>#0</value>
89267                </enumeratedValue>
89268                <enumeratedValue>
89269                  <name>1</name>
89270                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
89271                  <value>#1</value>
89272                </enumeratedValue>
89273              </enumeratedValues>
89274            </field>
89275            <field>
89276              <name>PFE</name>
89277              <description>Passive Filter Enable</description>
89278              <bitOffset>4</bitOffset>
89279              <bitWidth>1</bitWidth>
89280              <access>read-only</access>
89281              <enumeratedValues>
89282                <enumeratedValue>
89283                  <name>0</name>
89284                  <description>Passive input filter is disabled on the corresponding pin.</description>
89285                  <value>#0</value>
89286                </enumeratedValue>
89287                <enumeratedValue>
89288                  <name>1</name>
89289                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
89290                  <value>#1</value>
89291                </enumeratedValue>
89292              </enumeratedValues>
89293            </field>
89294            <field>
89295              <name>ODE</name>
89296              <description>Open Drain Enable</description>
89297              <bitOffset>5</bitOffset>
89298              <bitWidth>1</bitWidth>
89299              <access>read-write</access>
89300              <enumeratedValues>
89301                <enumeratedValue>
89302                  <name>0</name>
89303                  <description>Open drain output is disabled on the corresponding pin.</description>
89304                  <value>#0</value>
89305                </enumeratedValue>
89306                <enumeratedValue>
89307                  <name>1</name>
89308                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
89309                  <value>#1</value>
89310                </enumeratedValue>
89311              </enumeratedValues>
89312            </field>
89313            <field>
89314              <name>DSE</name>
89315              <description>Drive Strength Enable</description>
89316              <bitOffset>6</bitOffset>
89317              <bitWidth>1</bitWidth>
89318              <access>read-only</access>
89319              <enumeratedValues>
89320                <enumeratedValue>
89321                  <name>0</name>
89322                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
89323                  <value>#0</value>
89324                </enumeratedValue>
89325                <enumeratedValue>
89326                  <name>1</name>
89327                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
89328                  <value>#1</value>
89329                </enumeratedValue>
89330              </enumeratedValues>
89331            </field>
89332            <field>
89333              <name>MUX</name>
89334              <description>Pin Mux Control</description>
89335              <bitOffset>8</bitOffset>
89336              <bitWidth>3</bitWidth>
89337              <access>read-write</access>
89338              <enumeratedValues>
89339                <enumeratedValue>
89340                  <name>000</name>
89341                  <description>Pin disabled (Alternative 0) (analog).</description>
89342                  <value>#000</value>
89343                </enumeratedValue>
89344                <enumeratedValue>
89345                  <name>001</name>
89346                  <description>Alternative 1 (GPIO).</description>
89347                  <value>#001</value>
89348                </enumeratedValue>
89349                <enumeratedValue>
89350                  <name>010</name>
89351                  <description>Alternative 2 (chip-specific).</description>
89352                  <value>#010</value>
89353                </enumeratedValue>
89354                <enumeratedValue>
89355                  <name>011</name>
89356                  <description>Alternative 3 (chip-specific).</description>
89357                  <value>#011</value>
89358                </enumeratedValue>
89359                <enumeratedValue>
89360                  <name>100</name>
89361                  <description>Alternative 4 (chip-specific).</description>
89362                  <value>#100</value>
89363                </enumeratedValue>
89364                <enumeratedValue>
89365                  <name>101</name>
89366                  <description>Alternative 5 (chip-specific).</description>
89367                  <value>#101</value>
89368                </enumeratedValue>
89369                <enumeratedValue>
89370                  <name>110</name>
89371                  <description>Alternative 6 (chip-specific).</description>
89372                  <value>#110</value>
89373                </enumeratedValue>
89374                <enumeratedValue>
89375                  <name>111</name>
89376                  <description>Alternative 7 (chip-specific).</description>
89377                  <value>#111</value>
89378                </enumeratedValue>
89379              </enumeratedValues>
89380            </field>
89381            <field>
89382              <name>LK</name>
89383              <description>Lock Register</description>
89384              <bitOffset>15</bitOffset>
89385              <bitWidth>1</bitWidth>
89386              <access>read-write</access>
89387              <enumeratedValues>
89388                <enumeratedValue>
89389                  <name>0</name>
89390                  <description>Pin Control Register fields [15:0] are not locked.</description>
89391                  <value>#0</value>
89392                </enumeratedValue>
89393                <enumeratedValue>
89394                  <name>1</name>
89395                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
89396                  <value>#1</value>
89397                </enumeratedValue>
89398              </enumeratedValues>
89399            </field>
89400            <field>
89401              <name>IRQC</name>
89402              <description>Interrupt Configuration</description>
89403              <bitOffset>16</bitOffset>
89404              <bitWidth>4</bitWidth>
89405              <access>read-write</access>
89406              <enumeratedValues>
89407                <enumeratedValue>
89408                  <name>0000</name>
89409                  <description>Interrupt Status Flag (ISF) is disabled.</description>
89410                  <value>#0000</value>
89411                </enumeratedValue>
89412                <enumeratedValue>
89413                  <name>0001</name>
89414                  <description>ISF flag and DMA request on rising edge.</description>
89415                  <value>#0001</value>
89416                </enumeratedValue>
89417                <enumeratedValue>
89418                  <name>0010</name>
89419                  <description>ISF flag and DMA request on falling edge.</description>
89420                  <value>#0010</value>
89421                </enumeratedValue>
89422                <enumeratedValue>
89423                  <name>0011</name>
89424                  <description>ISF flag and DMA request on either edge.</description>
89425                  <value>#0011</value>
89426                </enumeratedValue>
89427                <enumeratedValue>
89428                  <name>1000</name>
89429                  <description>ISF flag and Interrupt when logic 0.</description>
89430                  <value>#1000</value>
89431                </enumeratedValue>
89432                <enumeratedValue>
89433                  <name>1001</name>
89434                  <description>ISF flag and Interrupt on rising-edge.</description>
89435                  <value>#1001</value>
89436                </enumeratedValue>
89437                <enumeratedValue>
89438                  <name>1010</name>
89439                  <description>ISF flag and Interrupt on falling-edge.</description>
89440                  <value>#1010</value>
89441                </enumeratedValue>
89442                <enumeratedValue>
89443                  <name>1011</name>
89444                  <description>ISF flag and Interrupt on either edge.</description>
89445                  <value>#1011</value>
89446                </enumeratedValue>
89447                <enumeratedValue>
89448                  <name>1100</name>
89449                  <description>ISF flag and Interrupt when logic 1.</description>
89450                  <value>#1100</value>
89451                </enumeratedValue>
89452              </enumeratedValues>
89453            </field>
89454            <field>
89455              <name>ISF</name>
89456              <description>Interrupt Status Flag</description>
89457              <bitOffset>24</bitOffset>
89458              <bitWidth>1</bitWidth>
89459              <access>read-write</access>
89460              <enumeratedValues>
89461                <enumeratedValue>
89462                  <name>0</name>
89463                  <description>Configured interrupt is not detected.</description>
89464                  <value>#0</value>
89465                </enumeratedValue>
89466                <enumeratedValue>
89467                  <name>1</name>
89468                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
89469                  <value>#1</value>
89470                </enumeratedValue>
89471              </enumeratedValues>
89472            </field>
89473          </fields>
89474        </register>
89475        <register>
89476          <name>PCR12</name>
89477          <description>Pin Control Register n</description>
89478          <addressOffset>0x30</addressOffset>
89479          <size>32</size>
89480          <access>read-write</access>
89481          <resetValue>0</resetValue>
89482          <resetMask>0xFFFFFFFF</resetMask>
89483          <fields>
89484            <field>
89485              <name>PS</name>
89486              <description>Pull Select</description>
89487              <bitOffset>0</bitOffset>
89488              <bitWidth>1</bitWidth>
89489              <access>read-write</access>
89490              <enumeratedValues>
89491                <enumeratedValue>
89492                  <name>0</name>
89493                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
89494                  <value>#0</value>
89495                </enumeratedValue>
89496                <enumeratedValue>
89497                  <name>1</name>
89498                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
89499                  <value>#1</value>
89500                </enumeratedValue>
89501              </enumeratedValues>
89502            </field>
89503            <field>
89504              <name>PE</name>
89505              <description>Pull Enable</description>
89506              <bitOffset>1</bitOffset>
89507              <bitWidth>1</bitWidth>
89508              <access>read-write</access>
89509              <enumeratedValues>
89510                <enumeratedValue>
89511                  <name>0</name>
89512                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
89513                  <value>#0</value>
89514                </enumeratedValue>
89515                <enumeratedValue>
89516                  <name>1</name>
89517                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
89518                  <value>#1</value>
89519                </enumeratedValue>
89520              </enumeratedValues>
89521            </field>
89522            <field>
89523              <name>SRE</name>
89524              <description>Slew Rate Enable</description>
89525              <bitOffset>2</bitOffset>
89526              <bitWidth>1</bitWidth>
89527              <access>read-write</access>
89528              <enumeratedValues>
89529                <enumeratedValue>
89530                  <name>0</name>
89531                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
89532                  <value>#0</value>
89533                </enumeratedValue>
89534                <enumeratedValue>
89535                  <name>1</name>
89536                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
89537                  <value>#1</value>
89538                </enumeratedValue>
89539              </enumeratedValues>
89540            </field>
89541            <field>
89542              <name>PFE</name>
89543              <description>Passive Filter Enable</description>
89544              <bitOffset>4</bitOffset>
89545              <bitWidth>1</bitWidth>
89546              <access>read-only</access>
89547              <enumeratedValues>
89548                <enumeratedValue>
89549                  <name>0</name>
89550                  <description>Passive input filter is disabled on the corresponding pin.</description>
89551                  <value>#0</value>
89552                </enumeratedValue>
89553                <enumeratedValue>
89554                  <name>1</name>
89555                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
89556                  <value>#1</value>
89557                </enumeratedValue>
89558              </enumeratedValues>
89559            </field>
89560            <field>
89561              <name>ODE</name>
89562              <description>Open Drain Enable</description>
89563              <bitOffset>5</bitOffset>
89564              <bitWidth>1</bitWidth>
89565              <access>read-write</access>
89566              <enumeratedValues>
89567                <enumeratedValue>
89568                  <name>0</name>
89569                  <description>Open drain output is disabled on the corresponding pin.</description>
89570                  <value>#0</value>
89571                </enumeratedValue>
89572                <enumeratedValue>
89573                  <name>1</name>
89574                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
89575                  <value>#1</value>
89576                </enumeratedValue>
89577              </enumeratedValues>
89578            </field>
89579            <field>
89580              <name>DSE</name>
89581              <description>Drive Strength Enable</description>
89582              <bitOffset>6</bitOffset>
89583              <bitWidth>1</bitWidth>
89584              <access>read-only</access>
89585              <enumeratedValues>
89586                <enumeratedValue>
89587                  <name>0</name>
89588                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
89589                  <value>#0</value>
89590                </enumeratedValue>
89591                <enumeratedValue>
89592                  <name>1</name>
89593                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
89594                  <value>#1</value>
89595                </enumeratedValue>
89596              </enumeratedValues>
89597            </field>
89598            <field>
89599              <name>MUX</name>
89600              <description>Pin Mux Control</description>
89601              <bitOffset>8</bitOffset>
89602              <bitWidth>3</bitWidth>
89603              <access>read-write</access>
89604              <enumeratedValues>
89605                <enumeratedValue>
89606                  <name>000</name>
89607                  <description>Pin disabled (Alternative 0) (analog).</description>
89608                  <value>#000</value>
89609                </enumeratedValue>
89610                <enumeratedValue>
89611                  <name>001</name>
89612                  <description>Alternative 1 (GPIO).</description>
89613                  <value>#001</value>
89614                </enumeratedValue>
89615                <enumeratedValue>
89616                  <name>010</name>
89617                  <description>Alternative 2 (chip-specific).</description>
89618                  <value>#010</value>
89619                </enumeratedValue>
89620                <enumeratedValue>
89621                  <name>011</name>
89622                  <description>Alternative 3 (chip-specific).</description>
89623                  <value>#011</value>
89624                </enumeratedValue>
89625                <enumeratedValue>
89626                  <name>100</name>
89627                  <description>Alternative 4 (chip-specific).</description>
89628                  <value>#100</value>
89629                </enumeratedValue>
89630                <enumeratedValue>
89631                  <name>101</name>
89632                  <description>Alternative 5 (chip-specific).</description>
89633                  <value>#101</value>
89634                </enumeratedValue>
89635                <enumeratedValue>
89636                  <name>110</name>
89637                  <description>Alternative 6 (chip-specific).</description>
89638                  <value>#110</value>
89639                </enumeratedValue>
89640                <enumeratedValue>
89641                  <name>111</name>
89642                  <description>Alternative 7 (chip-specific).</description>
89643                  <value>#111</value>
89644                </enumeratedValue>
89645              </enumeratedValues>
89646            </field>
89647            <field>
89648              <name>LK</name>
89649              <description>Lock Register</description>
89650              <bitOffset>15</bitOffset>
89651              <bitWidth>1</bitWidth>
89652              <access>read-write</access>
89653              <enumeratedValues>
89654                <enumeratedValue>
89655                  <name>0</name>
89656                  <description>Pin Control Register fields [15:0] are not locked.</description>
89657                  <value>#0</value>
89658                </enumeratedValue>
89659                <enumeratedValue>
89660                  <name>1</name>
89661                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
89662                  <value>#1</value>
89663                </enumeratedValue>
89664              </enumeratedValues>
89665            </field>
89666            <field>
89667              <name>IRQC</name>
89668              <description>Interrupt Configuration</description>
89669              <bitOffset>16</bitOffset>
89670              <bitWidth>4</bitWidth>
89671              <access>read-write</access>
89672              <enumeratedValues>
89673                <enumeratedValue>
89674                  <name>0000</name>
89675                  <description>Interrupt Status Flag (ISF) is disabled.</description>
89676                  <value>#0000</value>
89677                </enumeratedValue>
89678                <enumeratedValue>
89679                  <name>0001</name>
89680                  <description>ISF flag and DMA request on rising edge.</description>
89681                  <value>#0001</value>
89682                </enumeratedValue>
89683                <enumeratedValue>
89684                  <name>0010</name>
89685                  <description>ISF flag and DMA request on falling edge.</description>
89686                  <value>#0010</value>
89687                </enumeratedValue>
89688                <enumeratedValue>
89689                  <name>0011</name>
89690                  <description>ISF flag and DMA request on either edge.</description>
89691                  <value>#0011</value>
89692                </enumeratedValue>
89693                <enumeratedValue>
89694                  <name>1000</name>
89695                  <description>ISF flag and Interrupt when logic 0.</description>
89696                  <value>#1000</value>
89697                </enumeratedValue>
89698                <enumeratedValue>
89699                  <name>1001</name>
89700                  <description>ISF flag and Interrupt on rising-edge.</description>
89701                  <value>#1001</value>
89702                </enumeratedValue>
89703                <enumeratedValue>
89704                  <name>1010</name>
89705                  <description>ISF flag and Interrupt on falling-edge.</description>
89706                  <value>#1010</value>
89707                </enumeratedValue>
89708                <enumeratedValue>
89709                  <name>1011</name>
89710                  <description>ISF flag and Interrupt on either edge.</description>
89711                  <value>#1011</value>
89712                </enumeratedValue>
89713                <enumeratedValue>
89714                  <name>1100</name>
89715                  <description>ISF flag and Interrupt when logic 1.</description>
89716                  <value>#1100</value>
89717                </enumeratedValue>
89718              </enumeratedValues>
89719            </field>
89720            <field>
89721              <name>ISF</name>
89722              <description>Interrupt Status Flag</description>
89723              <bitOffset>24</bitOffset>
89724              <bitWidth>1</bitWidth>
89725              <access>read-write</access>
89726              <enumeratedValues>
89727                <enumeratedValue>
89728                  <name>0</name>
89729                  <description>Configured interrupt is not detected.</description>
89730                  <value>#0</value>
89731                </enumeratedValue>
89732                <enumeratedValue>
89733                  <name>1</name>
89734                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
89735                  <value>#1</value>
89736                </enumeratedValue>
89737              </enumeratedValues>
89738            </field>
89739          </fields>
89740        </register>
89741        <register>
89742          <name>PCR13</name>
89743          <description>Pin Control Register n</description>
89744          <addressOffset>0x34</addressOffset>
89745          <size>32</size>
89746          <access>read-write</access>
89747          <resetValue>0</resetValue>
89748          <resetMask>0xFFFFFFFF</resetMask>
89749          <fields>
89750            <field>
89751              <name>PS</name>
89752              <description>Pull Select</description>
89753              <bitOffset>0</bitOffset>
89754              <bitWidth>1</bitWidth>
89755              <access>read-write</access>
89756              <enumeratedValues>
89757                <enumeratedValue>
89758                  <name>0</name>
89759                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
89760                  <value>#0</value>
89761                </enumeratedValue>
89762                <enumeratedValue>
89763                  <name>1</name>
89764                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
89765                  <value>#1</value>
89766                </enumeratedValue>
89767              </enumeratedValues>
89768            </field>
89769            <field>
89770              <name>PE</name>
89771              <description>Pull Enable</description>
89772              <bitOffset>1</bitOffset>
89773              <bitWidth>1</bitWidth>
89774              <access>read-write</access>
89775              <enumeratedValues>
89776                <enumeratedValue>
89777                  <name>0</name>
89778                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
89779                  <value>#0</value>
89780                </enumeratedValue>
89781                <enumeratedValue>
89782                  <name>1</name>
89783                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
89784                  <value>#1</value>
89785                </enumeratedValue>
89786              </enumeratedValues>
89787            </field>
89788            <field>
89789              <name>SRE</name>
89790              <description>Slew Rate Enable</description>
89791              <bitOffset>2</bitOffset>
89792              <bitWidth>1</bitWidth>
89793              <access>read-write</access>
89794              <enumeratedValues>
89795                <enumeratedValue>
89796                  <name>0</name>
89797                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
89798                  <value>#0</value>
89799                </enumeratedValue>
89800                <enumeratedValue>
89801                  <name>1</name>
89802                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
89803                  <value>#1</value>
89804                </enumeratedValue>
89805              </enumeratedValues>
89806            </field>
89807            <field>
89808              <name>PFE</name>
89809              <description>Passive Filter Enable</description>
89810              <bitOffset>4</bitOffset>
89811              <bitWidth>1</bitWidth>
89812              <access>read-only</access>
89813              <enumeratedValues>
89814                <enumeratedValue>
89815                  <name>0</name>
89816                  <description>Passive input filter is disabled on the corresponding pin.</description>
89817                  <value>#0</value>
89818                </enumeratedValue>
89819                <enumeratedValue>
89820                  <name>1</name>
89821                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
89822                  <value>#1</value>
89823                </enumeratedValue>
89824              </enumeratedValues>
89825            </field>
89826            <field>
89827              <name>ODE</name>
89828              <description>Open Drain Enable</description>
89829              <bitOffset>5</bitOffset>
89830              <bitWidth>1</bitWidth>
89831              <access>read-write</access>
89832              <enumeratedValues>
89833                <enumeratedValue>
89834                  <name>0</name>
89835                  <description>Open drain output is disabled on the corresponding pin.</description>
89836                  <value>#0</value>
89837                </enumeratedValue>
89838                <enumeratedValue>
89839                  <name>1</name>
89840                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
89841                  <value>#1</value>
89842                </enumeratedValue>
89843              </enumeratedValues>
89844            </field>
89845            <field>
89846              <name>DSE</name>
89847              <description>Drive Strength Enable</description>
89848              <bitOffset>6</bitOffset>
89849              <bitWidth>1</bitWidth>
89850              <access>read-only</access>
89851              <enumeratedValues>
89852                <enumeratedValue>
89853                  <name>0</name>
89854                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
89855                  <value>#0</value>
89856                </enumeratedValue>
89857                <enumeratedValue>
89858                  <name>1</name>
89859                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
89860                  <value>#1</value>
89861                </enumeratedValue>
89862              </enumeratedValues>
89863            </field>
89864            <field>
89865              <name>MUX</name>
89866              <description>Pin Mux Control</description>
89867              <bitOffset>8</bitOffset>
89868              <bitWidth>3</bitWidth>
89869              <access>read-write</access>
89870              <enumeratedValues>
89871                <enumeratedValue>
89872                  <name>000</name>
89873                  <description>Pin disabled (Alternative 0) (analog).</description>
89874                  <value>#000</value>
89875                </enumeratedValue>
89876                <enumeratedValue>
89877                  <name>001</name>
89878                  <description>Alternative 1 (GPIO).</description>
89879                  <value>#001</value>
89880                </enumeratedValue>
89881                <enumeratedValue>
89882                  <name>010</name>
89883                  <description>Alternative 2 (chip-specific).</description>
89884                  <value>#010</value>
89885                </enumeratedValue>
89886                <enumeratedValue>
89887                  <name>011</name>
89888                  <description>Alternative 3 (chip-specific).</description>
89889                  <value>#011</value>
89890                </enumeratedValue>
89891                <enumeratedValue>
89892                  <name>100</name>
89893                  <description>Alternative 4 (chip-specific).</description>
89894                  <value>#100</value>
89895                </enumeratedValue>
89896                <enumeratedValue>
89897                  <name>101</name>
89898                  <description>Alternative 5 (chip-specific).</description>
89899                  <value>#101</value>
89900                </enumeratedValue>
89901                <enumeratedValue>
89902                  <name>110</name>
89903                  <description>Alternative 6 (chip-specific).</description>
89904                  <value>#110</value>
89905                </enumeratedValue>
89906                <enumeratedValue>
89907                  <name>111</name>
89908                  <description>Alternative 7 (chip-specific).</description>
89909                  <value>#111</value>
89910                </enumeratedValue>
89911              </enumeratedValues>
89912            </field>
89913            <field>
89914              <name>LK</name>
89915              <description>Lock Register</description>
89916              <bitOffset>15</bitOffset>
89917              <bitWidth>1</bitWidth>
89918              <access>read-write</access>
89919              <enumeratedValues>
89920                <enumeratedValue>
89921                  <name>0</name>
89922                  <description>Pin Control Register fields [15:0] are not locked.</description>
89923                  <value>#0</value>
89924                </enumeratedValue>
89925                <enumeratedValue>
89926                  <name>1</name>
89927                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
89928                  <value>#1</value>
89929                </enumeratedValue>
89930              </enumeratedValues>
89931            </field>
89932            <field>
89933              <name>IRQC</name>
89934              <description>Interrupt Configuration</description>
89935              <bitOffset>16</bitOffset>
89936              <bitWidth>4</bitWidth>
89937              <access>read-write</access>
89938              <enumeratedValues>
89939                <enumeratedValue>
89940                  <name>0000</name>
89941                  <description>Interrupt Status Flag (ISF) is disabled.</description>
89942                  <value>#0000</value>
89943                </enumeratedValue>
89944                <enumeratedValue>
89945                  <name>0001</name>
89946                  <description>ISF flag and DMA request on rising edge.</description>
89947                  <value>#0001</value>
89948                </enumeratedValue>
89949                <enumeratedValue>
89950                  <name>0010</name>
89951                  <description>ISF flag and DMA request on falling edge.</description>
89952                  <value>#0010</value>
89953                </enumeratedValue>
89954                <enumeratedValue>
89955                  <name>0011</name>
89956                  <description>ISF flag and DMA request on either edge.</description>
89957                  <value>#0011</value>
89958                </enumeratedValue>
89959                <enumeratedValue>
89960                  <name>1000</name>
89961                  <description>ISF flag and Interrupt when logic 0.</description>
89962                  <value>#1000</value>
89963                </enumeratedValue>
89964                <enumeratedValue>
89965                  <name>1001</name>
89966                  <description>ISF flag and Interrupt on rising-edge.</description>
89967                  <value>#1001</value>
89968                </enumeratedValue>
89969                <enumeratedValue>
89970                  <name>1010</name>
89971                  <description>ISF flag and Interrupt on falling-edge.</description>
89972                  <value>#1010</value>
89973                </enumeratedValue>
89974                <enumeratedValue>
89975                  <name>1011</name>
89976                  <description>ISF flag and Interrupt on either edge.</description>
89977                  <value>#1011</value>
89978                </enumeratedValue>
89979                <enumeratedValue>
89980                  <name>1100</name>
89981                  <description>ISF flag and Interrupt when logic 1.</description>
89982                  <value>#1100</value>
89983                </enumeratedValue>
89984              </enumeratedValues>
89985            </field>
89986            <field>
89987              <name>ISF</name>
89988              <description>Interrupt Status Flag</description>
89989              <bitOffset>24</bitOffset>
89990              <bitWidth>1</bitWidth>
89991              <access>read-write</access>
89992              <enumeratedValues>
89993                <enumeratedValue>
89994                  <name>0</name>
89995                  <description>Configured interrupt is not detected.</description>
89996                  <value>#0</value>
89997                </enumeratedValue>
89998                <enumeratedValue>
89999                  <name>1</name>
90000                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
90001                  <value>#1</value>
90002                </enumeratedValue>
90003              </enumeratedValues>
90004            </field>
90005          </fields>
90006        </register>
90007        <register>
90008          <name>PCR14</name>
90009          <description>Pin Control Register n</description>
90010          <addressOffset>0x38</addressOffset>
90011          <size>32</size>
90012          <access>read-write</access>
90013          <resetValue>0</resetValue>
90014          <resetMask>0xFFFFFFFF</resetMask>
90015          <fields>
90016            <field>
90017              <name>PS</name>
90018              <description>Pull Select</description>
90019              <bitOffset>0</bitOffset>
90020              <bitWidth>1</bitWidth>
90021              <access>read-write</access>
90022              <enumeratedValues>
90023                <enumeratedValue>
90024                  <name>0</name>
90025                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
90026                  <value>#0</value>
90027                </enumeratedValue>
90028                <enumeratedValue>
90029                  <name>1</name>
90030                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
90031                  <value>#1</value>
90032                </enumeratedValue>
90033              </enumeratedValues>
90034            </field>
90035            <field>
90036              <name>PE</name>
90037              <description>Pull Enable</description>
90038              <bitOffset>1</bitOffset>
90039              <bitWidth>1</bitWidth>
90040              <access>read-write</access>
90041              <enumeratedValues>
90042                <enumeratedValue>
90043                  <name>0</name>
90044                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
90045                  <value>#0</value>
90046                </enumeratedValue>
90047                <enumeratedValue>
90048                  <name>1</name>
90049                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
90050                  <value>#1</value>
90051                </enumeratedValue>
90052              </enumeratedValues>
90053            </field>
90054            <field>
90055              <name>SRE</name>
90056              <description>Slew Rate Enable</description>
90057              <bitOffset>2</bitOffset>
90058              <bitWidth>1</bitWidth>
90059              <access>read-write</access>
90060              <enumeratedValues>
90061                <enumeratedValue>
90062                  <name>0</name>
90063                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
90064                  <value>#0</value>
90065                </enumeratedValue>
90066                <enumeratedValue>
90067                  <name>1</name>
90068                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
90069                  <value>#1</value>
90070                </enumeratedValue>
90071              </enumeratedValues>
90072            </field>
90073            <field>
90074              <name>PFE</name>
90075              <description>Passive Filter Enable</description>
90076              <bitOffset>4</bitOffset>
90077              <bitWidth>1</bitWidth>
90078              <access>read-only</access>
90079              <enumeratedValues>
90080                <enumeratedValue>
90081                  <name>0</name>
90082                  <description>Passive input filter is disabled on the corresponding pin.</description>
90083                  <value>#0</value>
90084                </enumeratedValue>
90085                <enumeratedValue>
90086                  <name>1</name>
90087                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
90088                  <value>#1</value>
90089                </enumeratedValue>
90090              </enumeratedValues>
90091            </field>
90092            <field>
90093              <name>ODE</name>
90094              <description>Open Drain Enable</description>
90095              <bitOffset>5</bitOffset>
90096              <bitWidth>1</bitWidth>
90097              <access>read-write</access>
90098              <enumeratedValues>
90099                <enumeratedValue>
90100                  <name>0</name>
90101                  <description>Open drain output is disabled on the corresponding pin.</description>
90102                  <value>#0</value>
90103                </enumeratedValue>
90104                <enumeratedValue>
90105                  <name>1</name>
90106                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
90107                  <value>#1</value>
90108                </enumeratedValue>
90109              </enumeratedValues>
90110            </field>
90111            <field>
90112              <name>DSE</name>
90113              <description>Drive Strength Enable</description>
90114              <bitOffset>6</bitOffset>
90115              <bitWidth>1</bitWidth>
90116              <access>read-only</access>
90117              <enumeratedValues>
90118                <enumeratedValue>
90119                  <name>0</name>
90120                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
90121                  <value>#0</value>
90122                </enumeratedValue>
90123                <enumeratedValue>
90124                  <name>1</name>
90125                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
90126                  <value>#1</value>
90127                </enumeratedValue>
90128              </enumeratedValues>
90129            </field>
90130            <field>
90131              <name>MUX</name>
90132              <description>Pin Mux Control</description>
90133              <bitOffset>8</bitOffset>
90134              <bitWidth>3</bitWidth>
90135              <access>read-write</access>
90136              <enumeratedValues>
90137                <enumeratedValue>
90138                  <name>000</name>
90139                  <description>Pin disabled (Alternative 0) (analog).</description>
90140                  <value>#000</value>
90141                </enumeratedValue>
90142                <enumeratedValue>
90143                  <name>001</name>
90144                  <description>Alternative 1 (GPIO).</description>
90145                  <value>#001</value>
90146                </enumeratedValue>
90147                <enumeratedValue>
90148                  <name>010</name>
90149                  <description>Alternative 2 (chip-specific).</description>
90150                  <value>#010</value>
90151                </enumeratedValue>
90152                <enumeratedValue>
90153                  <name>011</name>
90154                  <description>Alternative 3 (chip-specific).</description>
90155                  <value>#011</value>
90156                </enumeratedValue>
90157                <enumeratedValue>
90158                  <name>100</name>
90159                  <description>Alternative 4 (chip-specific).</description>
90160                  <value>#100</value>
90161                </enumeratedValue>
90162                <enumeratedValue>
90163                  <name>101</name>
90164                  <description>Alternative 5 (chip-specific).</description>
90165                  <value>#101</value>
90166                </enumeratedValue>
90167                <enumeratedValue>
90168                  <name>110</name>
90169                  <description>Alternative 6 (chip-specific).</description>
90170                  <value>#110</value>
90171                </enumeratedValue>
90172                <enumeratedValue>
90173                  <name>111</name>
90174                  <description>Alternative 7 (chip-specific).</description>
90175                  <value>#111</value>
90176                </enumeratedValue>
90177              </enumeratedValues>
90178            </field>
90179            <field>
90180              <name>LK</name>
90181              <description>Lock Register</description>
90182              <bitOffset>15</bitOffset>
90183              <bitWidth>1</bitWidth>
90184              <access>read-write</access>
90185              <enumeratedValues>
90186                <enumeratedValue>
90187                  <name>0</name>
90188                  <description>Pin Control Register fields [15:0] are not locked.</description>
90189                  <value>#0</value>
90190                </enumeratedValue>
90191                <enumeratedValue>
90192                  <name>1</name>
90193                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
90194                  <value>#1</value>
90195                </enumeratedValue>
90196              </enumeratedValues>
90197            </field>
90198            <field>
90199              <name>IRQC</name>
90200              <description>Interrupt Configuration</description>
90201              <bitOffset>16</bitOffset>
90202              <bitWidth>4</bitWidth>
90203              <access>read-write</access>
90204              <enumeratedValues>
90205                <enumeratedValue>
90206                  <name>0000</name>
90207                  <description>Interrupt Status Flag (ISF) is disabled.</description>
90208                  <value>#0000</value>
90209                </enumeratedValue>
90210                <enumeratedValue>
90211                  <name>0001</name>
90212                  <description>ISF flag and DMA request on rising edge.</description>
90213                  <value>#0001</value>
90214                </enumeratedValue>
90215                <enumeratedValue>
90216                  <name>0010</name>
90217                  <description>ISF flag and DMA request on falling edge.</description>
90218                  <value>#0010</value>
90219                </enumeratedValue>
90220                <enumeratedValue>
90221                  <name>0011</name>
90222                  <description>ISF flag and DMA request on either edge.</description>
90223                  <value>#0011</value>
90224                </enumeratedValue>
90225                <enumeratedValue>
90226                  <name>1000</name>
90227                  <description>ISF flag and Interrupt when logic 0.</description>
90228                  <value>#1000</value>
90229                </enumeratedValue>
90230                <enumeratedValue>
90231                  <name>1001</name>
90232                  <description>ISF flag and Interrupt on rising-edge.</description>
90233                  <value>#1001</value>
90234                </enumeratedValue>
90235                <enumeratedValue>
90236                  <name>1010</name>
90237                  <description>ISF flag and Interrupt on falling-edge.</description>
90238                  <value>#1010</value>
90239                </enumeratedValue>
90240                <enumeratedValue>
90241                  <name>1011</name>
90242                  <description>ISF flag and Interrupt on either edge.</description>
90243                  <value>#1011</value>
90244                </enumeratedValue>
90245                <enumeratedValue>
90246                  <name>1100</name>
90247                  <description>ISF flag and Interrupt when logic 1.</description>
90248                  <value>#1100</value>
90249                </enumeratedValue>
90250              </enumeratedValues>
90251            </field>
90252            <field>
90253              <name>ISF</name>
90254              <description>Interrupt Status Flag</description>
90255              <bitOffset>24</bitOffset>
90256              <bitWidth>1</bitWidth>
90257              <access>read-write</access>
90258              <enumeratedValues>
90259                <enumeratedValue>
90260                  <name>0</name>
90261                  <description>Configured interrupt is not detected.</description>
90262                  <value>#0</value>
90263                </enumeratedValue>
90264                <enumeratedValue>
90265                  <name>1</name>
90266                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
90267                  <value>#1</value>
90268                </enumeratedValue>
90269              </enumeratedValues>
90270            </field>
90271          </fields>
90272        </register>
90273        <register>
90274          <name>PCR15</name>
90275          <description>Pin Control Register n</description>
90276          <addressOffset>0x3C</addressOffset>
90277          <size>32</size>
90278          <access>read-write</access>
90279          <resetValue>0</resetValue>
90280          <resetMask>0xFFFFFFFF</resetMask>
90281          <fields>
90282            <field>
90283              <name>PS</name>
90284              <description>Pull Select</description>
90285              <bitOffset>0</bitOffset>
90286              <bitWidth>1</bitWidth>
90287              <access>read-write</access>
90288              <enumeratedValues>
90289                <enumeratedValue>
90290                  <name>0</name>
90291                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
90292                  <value>#0</value>
90293                </enumeratedValue>
90294                <enumeratedValue>
90295                  <name>1</name>
90296                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
90297                  <value>#1</value>
90298                </enumeratedValue>
90299              </enumeratedValues>
90300            </field>
90301            <field>
90302              <name>PE</name>
90303              <description>Pull Enable</description>
90304              <bitOffset>1</bitOffset>
90305              <bitWidth>1</bitWidth>
90306              <access>read-write</access>
90307              <enumeratedValues>
90308                <enumeratedValue>
90309                  <name>0</name>
90310                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
90311                  <value>#0</value>
90312                </enumeratedValue>
90313                <enumeratedValue>
90314                  <name>1</name>
90315                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
90316                  <value>#1</value>
90317                </enumeratedValue>
90318              </enumeratedValues>
90319            </field>
90320            <field>
90321              <name>SRE</name>
90322              <description>Slew Rate Enable</description>
90323              <bitOffset>2</bitOffset>
90324              <bitWidth>1</bitWidth>
90325              <access>read-write</access>
90326              <enumeratedValues>
90327                <enumeratedValue>
90328                  <name>0</name>
90329                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
90330                  <value>#0</value>
90331                </enumeratedValue>
90332                <enumeratedValue>
90333                  <name>1</name>
90334                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
90335                  <value>#1</value>
90336                </enumeratedValue>
90337              </enumeratedValues>
90338            </field>
90339            <field>
90340              <name>PFE</name>
90341              <description>Passive Filter Enable</description>
90342              <bitOffset>4</bitOffset>
90343              <bitWidth>1</bitWidth>
90344              <access>read-only</access>
90345              <enumeratedValues>
90346                <enumeratedValue>
90347                  <name>0</name>
90348                  <description>Passive input filter is disabled on the corresponding pin.</description>
90349                  <value>#0</value>
90350                </enumeratedValue>
90351                <enumeratedValue>
90352                  <name>1</name>
90353                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
90354                  <value>#1</value>
90355                </enumeratedValue>
90356              </enumeratedValues>
90357            </field>
90358            <field>
90359              <name>ODE</name>
90360              <description>Open Drain Enable</description>
90361              <bitOffset>5</bitOffset>
90362              <bitWidth>1</bitWidth>
90363              <access>read-write</access>
90364              <enumeratedValues>
90365                <enumeratedValue>
90366                  <name>0</name>
90367                  <description>Open drain output is disabled on the corresponding pin.</description>
90368                  <value>#0</value>
90369                </enumeratedValue>
90370                <enumeratedValue>
90371                  <name>1</name>
90372                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
90373                  <value>#1</value>
90374                </enumeratedValue>
90375              </enumeratedValues>
90376            </field>
90377            <field>
90378              <name>DSE</name>
90379              <description>Drive Strength Enable</description>
90380              <bitOffset>6</bitOffset>
90381              <bitWidth>1</bitWidth>
90382              <access>read-only</access>
90383              <enumeratedValues>
90384                <enumeratedValue>
90385                  <name>0</name>
90386                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
90387                  <value>#0</value>
90388                </enumeratedValue>
90389                <enumeratedValue>
90390                  <name>1</name>
90391                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
90392                  <value>#1</value>
90393                </enumeratedValue>
90394              </enumeratedValues>
90395            </field>
90396            <field>
90397              <name>MUX</name>
90398              <description>Pin Mux Control</description>
90399              <bitOffset>8</bitOffset>
90400              <bitWidth>3</bitWidth>
90401              <access>read-write</access>
90402              <enumeratedValues>
90403                <enumeratedValue>
90404                  <name>000</name>
90405                  <description>Pin disabled (Alternative 0) (analog).</description>
90406                  <value>#000</value>
90407                </enumeratedValue>
90408                <enumeratedValue>
90409                  <name>001</name>
90410                  <description>Alternative 1 (GPIO).</description>
90411                  <value>#001</value>
90412                </enumeratedValue>
90413                <enumeratedValue>
90414                  <name>010</name>
90415                  <description>Alternative 2 (chip-specific).</description>
90416                  <value>#010</value>
90417                </enumeratedValue>
90418                <enumeratedValue>
90419                  <name>011</name>
90420                  <description>Alternative 3 (chip-specific).</description>
90421                  <value>#011</value>
90422                </enumeratedValue>
90423                <enumeratedValue>
90424                  <name>100</name>
90425                  <description>Alternative 4 (chip-specific).</description>
90426                  <value>#100</value>
90427                </enumeratedValue>
90428                <enumeratedValue>
90429                  <name>101</name>
90430                  <description>Alternative 5 (chip-specific).</description>
90431                  <value>#101</value>
90432                </enumeratedValue>
90433                <enumeratedValue>
90434                  <name>110</name>
90435                  <description>Alternative 6 (chip-specific).</description>
90436                  <value>#110</value>
90437                </enumeratedValue>
90438                <enumeratedValue>
90439                  <name>111</name>
90440                  <description>Alternative 7 (chip-specific).</description>
90441                  <value>#111</value>
90442                </enumeratedValue>
90443              </enumeratedValues>
90444            </field>
90445            <field>
90446              <name>LK</name>
90447              <description>Lock Register</description>
90448              <bitOffset>15</bitOffset>
90449              <bitWidth>1</bitWidth>
90450              <access>read-write</access>
90451              <enumeratedValues>
90452                <enumeratedValue>
90453                  <name>0</name>
90454                  <description>Pin Control Register fields [15:0] are not locked.</description>
90455                  <value>#0</value>
90456                </enumeratedValue>
90457                <enumeratedValue>
90458                  <name>1</name>
90459                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
90460                  <value>#1</value>
90461                </enumeratedValue>
90462              </enumeratedValues>
90463            </field>
90464            <field>
90465              <name>IRQC</name>
90466              <description>Interrupt Configuration</description>
90467              <bitOffset>16</bitOffset>
90468              <bitWidth>4</bitWidth>
90469              <access>read-write</access>
90470              <enumeratedValues>
90471                <enumeratedValue>
90472                  <name>0000</name>
90473                  <description>Interrupt Status Flag (ISF) is disabled.</description>
90474                  <value>#0000</value>
90475                </enumeratedValue>
90476                <enumeratedValue>
90477                  <name>0001</name>
90478                  <description>ISF flag and DMA request on rising edge.</description>
90479                  <value>#0001</value>
90480                </enumeratedValue>
90481                <enumeratedValue>
90482                  <name>0010</name>
90483                  <description>ISF flag and DMA request on falling edge.</description>
90484                  <value>#0010</value>
90485                </enumeratedValue>
90486                <enumeratedValue>
90487                  <name>0011</name>
90488                  <description>ISF flag and DMA request on either edge.</description>
90489                  <value>#0011</value>
90490                </enumeratedValue>
90491                <enumeratedValue>
90492                  <name>1000</name>
90493                  <description>ISF flag and Interrupt when logic 0.</description>
90494                  <value>#1000</value>
90495                </enumeratedValue>
90496                <enumeratedValue>
90497                  <name>1001</name>
90498                  <description>ISF flag and Interrupt on rising-edge.</description>
90499                  <value>#1001</value>
90500                </enumeratedValue>
90501                <enumeratedValue>
90502                  <name>1010</name>
90503                  <description>ISF flag and Interrupt on falling-edge.</description>
90504                  <value>#1010</value>
90505                </enumeratedValue>
90506                <enumeratedValue>
90507                  <name>1011</name>
90508                  <description>ISF flag and Interrupt on either edge.</description>
90509                  <value>#1011</value>
90510                </enumeratedValue>
90511                <enumeratedValue>
90512                  <name>1100</name>
90513                  <description>ISF flag and Interrupt when logic 1.</description>
90514                  <value>#1100</value>
90515                </enumeratedValue>
90516              </enumeratedValues>
90517            </field>
90518            <field>
90519              <name>ISF</name>
90520              <description>Interrupt Status Flag</description>
90521              <bitOffset>24</bitOffset>
90522              <bitWidth>1</bitWidth>
90523              <access>read-write</access>
90524              <enumeratedValues>
90525                <enumeratedValue>
90526                  <name>0</name>
90527                  <description>Configured interrupt is not detected.</description>
90528                  <value>#0</value>
90529                </enumeratedValue>
90530                <enumeratedValue>
90531                  <name>1</name>
90532                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
90533                  <value>#1</value>
90534                </enumeratedValue>
90535              </enumeratedValues>
90536            </field>
90537          </fields>
90538        </register>
90539        <register>
90540          <name>PCR16</name>
90541          <description>Pin Control Register n</description>
90542          <addressOffset>0x40</addressOffset>
90543          <size>32</size>
90544          <access>read-write</access>
90545          <resetValue>0</resetValue>
90546          <resetMask>0xFFFFFFFF</resetMask>
90547          <fields>
90548            <field>
90549              <name>PS</name>
90550              <description>Pull Select</description>
90551              <bitOffset>0</bitOffset>
90552              <bitWidth>1</bitWidth>
90553              <access>read-only</access>
90554              <enumeratedValues>
90555                <enumeratedValue>
90556                  <name>0</name>
90557                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
90558                  <value>#0</value>
90559                </enumeratedValue>
90560                <enumeratedValue>
90561                  <name>1</name>
90562                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
90563                  <value>#1</value>
90564                </enumeratedValue>
90565              </enumeratedValues>
90566            </field>
90567            <field>
90568              <name>PE</name>
90569              <description>Pull Enable</description>
90570              <bitOffset>1</bitOffset>
90571              <bitWidth>1</bitWidth>
90572              <access>read-only</access>
90573              <enumeratedValues>
90574                <enumeratedValue>
90575                  <name>0</name>
90576                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
90577                  <value>#0</value>
90578                </enumeratedValue>
90579                <enumeratedValue>
90580                  <name>1</name>
90581                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
90582                  <value>#1</value>
90583                </enumeratedValue>
90584              </enumeratedValues>
90585            </field>
90586            <field>
90587              <name>SRE</name>
90588              <description>Slew Rate Enable</description>
90589              <bitOffset>2</bitOffset>
90590              <bitWidth>1</bitWidth>
90591              <access>read-only</access>
90592              <enumeratedValues>
90593                <enumeratedValue>
90594                  <name>0</name>
90595                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
90596                  <value>#0</value>
90597                </enumeratedValue>
90598                <enumeratedValue>
90599                  <name>1</name>
90600                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
90601                  <value>#1</value>
90602                </enumeratedValue>
90603              </enumeratedValues>
90604            </field>
90605            <field>
90606              <name>PFE</name>
90607              <description>Passive Filter Enable</description>
90608              <bitOffset>4</bitOffset>
90609              <bitWidth>1</bitWidth>
90610              <access>read-only</access>
90611              <enumeratedValues>
90612                <enumeratedValue>
90613                  <name>0</name>
90614                  <description>Passive input filter is disabled on the corresponding pin.</description>
90615                  <value>#0</value>
90616                </enumeratedValue>
90617                <enumeratedValue>
90618                  <name>1</name>
90619                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
90620                  <value>#1</value>
90621                </enumeratedValue>
90622              </enumeratedValues>
90623            </field>
90624            <field>
90625              <name>ODE</name>
90626              <description>Open Drain Enable</description>
90627              <bitOffset>5</bitOffset>
90628              <bitWidth>1</bitWidth>
90629              <access>read-only</access>
90630              <enumeratedValues>
90631                <enumeratedValue>
90632                  <name>0</name>
90633                  <description>Open drain output is disabled on the corresponding pin.</description>
90634                  <value>#0</value>
90635                </enumeratedValue>
90636                <enumeratedValue>
90637                  <name>1</name>
90638                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
90639                  <value>#1</value>
90640                </enumeratedValue>
90641              </enumeratedValues>
90642            </field>
90643            <field>
90644              <name>DSE</name>
90645              <description>Drive Strength Enable</description>
90646              <bitOffset>6</bitOffset>
90647              <bitWidth>1</bitWidth>
90648              <access>read-only</access>
90649              <enumeratedValues>
90650                <enumeratedValue>
90651                  <name>0</name>
90652                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
90653                  <value>#0</value>
90654                </enumeratedValue>
90655                <enumeratedValue>
90656                  <name>1</name>
90657                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
90658                  <value>#1</value>
90659                </enumeratedValue>
90660              </enumeratedValues>
90661            </field>
90662            <field>
90663              <name>MUX</name>
90664              <description>Pin Mux Control</description>
90665              <bitOffset>8</bitOffset>
90666              <bitWidth>3</bitWidth>
90667              <access>read-write</access>
90668              <enumeratedValues>
90669                <enumeratedValue>
90670                  <name>000</name>
90671                  <description>Pin disabled (Alternative 0) (analog).</description>
90672                  <value>#000</value>
90673                </enumeratedValue>
90674                <enumeratedValue>
90675                  <name>001</name>
90676                  <description>Alternative 1 (GPIO).</description>
90677                  <value>#001</value>
90678                </enumeratedValue>
90679                <enumeratedValue>
90680                  <name>010</name>
90681                  <description>Alternative 2 (chip-specific).</description>
90682                  <value>#010</value>
90683                </enumeratedValue>
90684                <enumeratedValue>
90685                  <name>011</name>
90686                  <description>Alternative 3 (chip-specific).</description>
90687                  <value>#011</value>
90688                </enumeratedValue>
90689                <enumeratedValue>
90690                  <name>100</name>
90691                  <description>Alternative 4 (chip-specific).</description>
90692                  <value>#100</value>
90693                </enumeratedValue>
90694                <enumeratedValue>
90695                  <name>101</name>
90696                  <description>Alternative 5 (chip-specific).</description>
90697                  <value>#101</value>
90698                </enumeratedValue>
90699                <enumeratedValue>
90700                  <name>110</name>
90701                  <description>Alternative 6 (chip-specific).</description>
90702                  <value>#110</value>
90703                </enumeratedValue>
90704                <enumeratedValue>
90705                  <name>111</name>
90706                  <description>Alternative 7 (chip-specific).</description>
90707                  <value>#111</value>
90708                </enumeratedValue>
90709              </enumeratedValues>
90710            </field>
90711            <field>
90712              <name>LK</name>
90713              <description>Lock Register</description>
90714              <bitOffset>15</bitOffset>
90715              <bitWidth>1</bitWidth>
90716              <access>read-write</access>
90717              <enumeratedValues>
90718                <enumeratedValue>
90719                  <name>0</name>
90720                  <description>Pin Control Register fields [15:0] are not locked.</description>
90721                  <value>#0</value>
90722                </enumeratedValue>
90723                <enumeratedValue>
90724                  <name>1</name>
90725                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
90726                  <value>#1</value>
90727                </enumeratedValue>
90728              </enumeratedValues>
90729            </field>
90730            <field>
90731              <name>IRQC</name>
90732              <description>Interrupt Configuration</description>
90733              <bitOffset>16</bitOffset>
90734              <bitWidth>4</bitWidth>
90735              <access>read-write</access>
90736              <enumeratedValues>
90737                <enumeratedValue>
90738                  <name>0000</name>
90739                  <description>Interrupt Status Flag (ISF) is disabled.</description>
90740                  <value>#0000</value>
90741                </enumeratedValue>
90742                <enumeratedValue>
90743                  <name>0001</name>
90744                  <description>ISF flag and DMA request on rising edge.</description>
90745                  <value>#0001</value>
90746                </enumeratedValue>
90747                <enumeratedValue>
90748                  <name>0010</name>
90749                  <description>ISF flag and DMA request on falling edge.</description>
90750                  <value>#0010</value>
90751                </enumeratedValue>
90752                <enumeratedValue>
90753                  <name>0011</name>
90754                  <description>ISF flag and DMA request on either edge.</description>
90755                  <value>#0011</value>
90756                </enumeratedValue>
90757                <enumeratedValue>
90758                  <name>1000</name>
90759                  <description>ISF flag and Interrupt when logic 0.</description>
90760                  <value>#1000</value>
90761                </enumeratedValue>
90762                <enumeratedValue>
90763                  <name>1001</name>
90764                  <description>ISF flag and Interrupt on rising-edge.</description>
90765                  <value>#1001</value>
90766                </enumeratedValue>
90767                <enumeratedValue>
90768                  <name>1010</name>
90769                  <description>ISF flag and Interrupt on falling-edge.</description>
90770                  <value>#1010</value>
90771                </enumeratedValue>
90772                <enumeratedValue>
90773                  <name>1011</name>
90774                  <description>ISF flag and Interrupt on either edge.</description>
90775                  <value>#1011</value>
90776                </enumeratedValue>
90777                <enumeratedValue>
90778                  <name>1100</name>
90779                  <description>ISF flag and Interrupt when logic 1.</description>
90780                  <value>#1100</value>
90781                </enumeratedValue>
90782              </enumeratedValues>
90783            </field>
90784            <field>
90785              <name>ISF</name>
90786              <description>Interrupt Status Flag</description>
90787              <bitOffset>24</bitOffset>
90788              <bitWidth>1</bitWidth>
90789              <access>read-write</access>
90790              <enumeratedValues>
90791                <enumeratedValue>
90792                  <name>0</name>
90793                  <description>Configured interrupt is not detected.</description>
90794                  <value>#0</value>
90795                </enumeratedValue>
90796                <enumeratedValue>
90797                  <name>1</name>
90798                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
90799                  <value>#1</value>
90800                </enumeratedValue>
90801              </enumeratedValues>
90802            </field>
90803          </fields>
90804        </register>
90805        <register>
90806          <name>PCR17</name>
90807          <description>Pin Control Register n</description>
90808          <addressOffset>0x44</addressOffset>
90809          <size>32</size>
90810          <access>read-write</access>
90811          <resetValue>0</resetValue>
90812          <resetMask>0xFFFFFFFF</resetMask>
90813          <fields>
90814            <field>
90815              <name>PS</name>
90816              <description>Pull Select</description>
90817              <bitOffset>0</bitOffset>
90818              <bitWidth>1</bitWidth>
90819              <access>read-only</access>
90820              <enumeratedValues>
90821                <enumeratedValue>
90822                  <name>0</name>
90823                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
90824                  <value>#0</value>
90825                </enumeratedValue>
90826                <enumeratedValue>
90827                  <name>1</name>
90828                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
90829                  <value>#1</value>
90830                </enumeratedValue>
90831              </enumeratedValues>
90832            </field>
90833            <field>
90834              <name>PE</name>
90835              <description>Pull Enable</description>
90836              <bitOffset>1</bitOffset>
90837              <bitWidth>1</bitWidth>
90838              <access>read-only</access>
90839              <enumeratedValues>
90840                <enumeratedValue>
90841                  <name>0</name>
90842                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
90843                  <value>#0</value>
90844                </enumeratedValue>
90845                <enumeratedValue>
90846                  <name>1</name>
90847                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
90848                  <value>#1</value>
90849                </enumeratedValue>
90850              </enumeratedValues>
90851            </field>
90852            <field>
90853              <name>SRE</name>
90854              <description>Slew Rate Enable</description>
90855              <bitOffset>2</bitOffset>
90856              <bitWidth>1</bitWidth>
90857              <access>read-only</access>
90858              <enumeratedValues>
90859                <enumeratedValue>
90860                  <name>0</name>
90861                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
90862                  <value>#0</value>
90863                </enumeratedValue>
90864                <enumeratedValue>
90865                  <name>1</name>
90866                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
90867                  <value>#1</value>
90868                </enumeratedValue>
90869              </enumeratedValues>
90870            </field>
90871            <field>
90872              <name>PFE</name>
90873              <description>Passive Filter Enable</description>
90874              <bitOffset>4</bitOffset>
90875              <bitWidth>1</bitWidth>
90876              <access>read-only</access>
90877              <enumeratedValues>
90878                <enumeratedValue>
90879                  <name>0</name>
90880                  <description>Passive input filter is disabled on the corresponding pin.</description>
90881                  <value>#0</value>
90882                </enumeratedValue>
90883                <enumeratedValue>
90884                  <name>1</name>
90885                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
90886                  <value>#1</value>
90887                </enumeratedValue>
90888              </enumeratedValues>
90889            </field>
90890            <field>
90891              <name>ODE</name>
90892              <description>Open Drain Enable</description>
90893              <bitOffset>5</bitOffset>
90894              <bitWidth>1</bitWidth>
90895              <access>read-only</access>
90896              <enumeratedValues>
90897                <enumeratedValue>
90898                  <name>0</name>
90899                  <description>Open drain output is disabled on the corresponding pin.</description>
90900                  <value>#0</value>
90901                </enumeratedValue>
90902                <enumeratedValue>
90903                  <name>1</name>
90904                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
90905                  <value>#1</value>
90906                </enumeratedValue>
90907              </enumeratedValues>
90908            </field>
90909            <field>
90910              <name>DSE</name>
90911              <description>Drive Strength Enable</description>
90912              <bitOffset>6</bitOffset>
90913              <bitWidth>1</bitWidth>
90914              <access>read-only</access>
90915              <enumeratedValues>
90916                <enumeratedValue>
90917                  <name>0</name>
90918                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
90919                  <value>#0</value>
90920                </enumeratedValue>
90921                <enumeratedValue>
90922                  <name>1</name>
90923                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
90924                  <value>#1</value>
90925                </enumeratedValue>
90926              </enumeratedValues>
90927            </field>
90928            <field>
90929              <name>MUX</name>
90930              <description>Pin Mux Control</description>
90931              <bitOffset>8</bitOffset>
90932              <bitWidth>3</bitWidth>
90933              <access>read-write</access>
90934              <enumeratedValues>
90935                <enumeratedValue>
90936                  <name>000</name>
90937                  <description>Pin disabled (Alternative 0) (analog).</description>
90938                  <value>#000</value>
90939                </enumeratedValue>
90940                <enumeratedValue>
90941                  <name>001</name>
90942                  <description>Alternative 1 (GPIO).</description>
90943                  <value>#001</value>
90944                </enumeratedValue>
90945                <enumeratedValue>
90946                  <name>010</name>
90947                  <description>Alternative 2 (chip-specific).</description>
90948                  <value>#010</value>
90949                </enumeratedValue>
90950                <enumeratedValue>
90951                  <name>011</name>
90952                  <description>Alternative 3 (chip-specific).</description>
90953                  <value>#011</value>
90954                </enumeratedValue>
90955                <enumeratedValue>
90956                  <name>100</name>
90957                  <description>Alternative 4 (chip-specific).</description>
90958                  <value>#100</value>
90959                </enumeratedValue>
90960                <enumeratedValue>
90961                  <name>101</name>
90962                  <description>Alternative 5 (chip-specific).</description>
90963                  <value>#101</value>
90964                </enumeratedValue>
90965                <enumeratedValue>
90966                  <name>110</name>
90967                  <description>Alternative 6 (chip-specific).</description>
90968                  <value>#110</value>
90969                </enumeratedValue>
90970                <enumeratedValue>
90971                  <name>111</name>
90972                  <description>Alternative 7 (chip-specific).</description>
90973                  <value>#111</value>
90974                </enumeratedValue>
90975              </enumeratedValues>
90976            </field>
90977            <field>
90978              <name>LK</name>
90979              <description>Lock Register</description>
90980              <bitOffset>15</bitOffset>
90981              <bitWidth>1</bitWidth>
90982              <access>read-write</access>
90983              <enumeratedValues>
90984                <enumeratedValue>
90985                  <name>0</name>
90986                  <description>Pin Control Register fields [15:0] are not locked.</description>
90987                  <value>#0</value>
90988                </enumeratedValue>
90989                <enumeratedValue>
90990                  <name>1</name>
90991                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
90992                  <value>#1</value>
90993                </enumeratedValue>
90994              </enumeratedValues>
90995            </field>
90996            <field>
90997              <name>IRQC</name>
90998              <description>Interrupt Configuration</description>
90999              <bitOffset>16</bitOffset>
91000              <bitWidth>4</bitWidth>
91001              <access>read-write</access>
91002              <enumeratedValues>
91003                <enumeratedValue>
91004                  <name>0000</name>
91005                  <description>Interrupt Status Flag (ISF) is disabled.</description>
91006                  <value>#0000</value>
91007                </enumeratedValue>
91008                <enumeratedValue>
91009                  <name>0001</name>
91010                  <description>ISF flag and DMA request on rising edge.</description>
91011                  <value>#0001</value>
91012                </enumeratedValue>
91013                <enumeratedValue>
91014                  <name>0010</name>
91015                  <description>ISF flag and DMA request on falling edge.</description>
91016                  <value>#0010</value>
91017                </enumeratedValue>
91018                <enumeratedValue>
91019                  <name>0011</name>
91020                  <description>ISF flag and DMA request on either edge.</description>
91021                  <value>#0011</value>
91022                </enumeratedValue>
91023                <enumeratedValue>
91024                  <name>1000</name>
91025                  <description>ISF flag and Interrupt when logic 0.</description>
91026                  <value>#1000</value>
91027                </enumeratedValue>
91028                <enumeratedValue>
91029                  <name>1001</name>
91030                  <description>ISF flag and Interrupt on rising-edge.</description>
91031                  <value>#1001</value>
91032                </enumeratedValue>
91033                <enumeratedValue>
91034                  <name>1010</name>
91035                  <description>ISF flag and Interrupt on falling-edge.</description>
91036                  <value>#1010</value>
91037                </enumeratedValue>
91038                <enumeratedValue>
91039                  <name>1011</name>
91040                  <description>ISF flag and Interrupt on either edge.</description>
91041                  <value>#1011</value>
91042                </enumeratedValue>
91043                <enumeratedValue>
91044                  <name>1100</name>
91045                  <description>ISF flag and Interrupt when logic 1.</description>
91046                  <value>#1100</value>
91047                </enumeratedValue>
91048              </enumeratedValues>
91049            </field>
91050            <field>
91051              <name>ISF</name>
91052              <description>Interrupt Status Flag</description>
91053              <bitOffset>24</bitOffset>
91054              <bitWidth>1</bitWidth>
91055              <access>read-write</access>
91056              <enumeratedValues>
91057                <enumeratedValue>
91058                  <name>0</name>
91059                  <description>Configured interrupt is not detected.</description>
91060                  <value>#0</value>
91061                </enumeratedValue>
91062                <enumeratedValue>
91063                  <name>1</name>
91064                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
91065                  <value>#1</value>
91066                </enumeratedValue>
91067              </enumeratedValues>
91068            </field>
91069          </fields>
91070        </register>
91071        <register>
91072          <name>PCR18</name>
91073          <description>Pin Control Register n</description>
91074          <addressOffset>0x48</addressOffset>
91075          <size>32</size>
91076          <access>read-write</access>
91077          <resetValue>0</resetValue>
91078          <resetMask>0xFFFFFFFF</resetMask>
91079          <fields>
91080            <field>
91081              <name>PS</name>
91082              <description>Pull Select</description>
91083              <bitOffset>0</bitOffset>
91084              <bitWidth>1</bitWidth>
91085              <access>read-only</access>
91086              <enumeratedValues>
91087                <enumeratedValue>
91088                  <name>0</name>
91089                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
91090                  <value>#0</value>
91091                </enumeratedValue>
91092                <enumeratedValue>
91093                  <name>1</name>
91094                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
91095                  <value>#1</value>
91096                </enumeratedValue>
91097              </enumeratedValues>
91098            </field>
91099            <field>
91100              <name>PE</name>
91101              <description>Pull Enable</description>
91102              <bitOffset>1</bitOffset>
91103              <bitWidth>1</bitWidth>
91104              <access>read-only</access>
91105              <enumeratedValues>
91106                <enumeratedValue>
91107                  <name>0</name>
91108                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
91109                  <value>#0</value>
91110                </enumeratedValue>
91111                <enumeratedValue>
91112                  <name>1</name>
91113                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
91114                  <value>#1</value>
91115                </enumeratedValue>
91116              </enumeratedValues>
91117            </field>
91118            <field>
91119              <name>SRE</name>
91120              <description>Slew Rate Enable</description>
91121              <bitOffset>2</bitOffset>
91122              <bitWidth>1</bitWidth>
91123              <access>read-only</access>
91124              <enumeratedValues>
91125                <enumeratedValue>
91126                  <name>0</name>
91127                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
91128                  <value>#0</value>
91129                </enumeratedValue>
91130                <enumeratedValue>
91131                  <name>1</name>
91132                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
91133                  <value>#1</value>
91134                </enumeratedValue>
91135              </enumeratedValues>
91136            </field>
91137            <field>
91138              <name>PFE</name>
91139              <description>Passive Filter Enable</description>
91140              <bitOffset>4</bitOffset>
91141              <bitWidth>1</bitWidth>
91142              <access>read-only</access>
91143              <enumeratedValues>
91144                <enumeratedValue>
91145                  <name>0</name>
91146                  <description>Passive input filter is disabled on the corresponding pin.</description>
91147                  <value>#0</value>
91148                </enumeratedValue>
91149                <enumeratedValue>
91150                  <name>1</name>
91151                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
91152                  <value>#1</value>
91153                </enumeratedValue>
91154              </enumeratedValues>
91155            </field>
91156            <field>
91157              <name>ODE</name>
91158              <description>Open Drain Enable</description>
91159              <bitOffset>5</bitOffset>
91160              <bitWidth>1</bitWidth>
91161              <access>read-only</access>
91162              <enumeratedValues>
91163                <enumeratedValue>
91164                  <name>0</name>
91165                  <description>Open drain output is disabled on the corresponding pin.</description>
91166                  <value>#0</value>
91167                </enumeratedValue>
91168                <enumeratedValue>
91169                  <name>1</name>
91170                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
91171                  <value>#1</value>
91172                </enumeratedValue>
91173              </enumeratedValues>
91174            </field>
91175            <field>
91176              <name>DSE</name>
91177              <description>Drive Strength Enable</description>
91178              <bitOffset>6</bitOffset>
91179              <bitWidth>1</bitWidth>
91180              <access>read-only</access>
91181              <enumeratedValues>
91182                <enumeratedValue>
91183                  <name>0</name>
91184                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
91185                  <value>#0</value>
91186                </enumeratedValue>
91187                <enumeratedValue>
91188                  <name>1</name>
91189                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
91190                  <value>#1</value>
91191                </enumeratedValue>
91192              </enumeratedValues>
91193            </field>
91194            <field>
91195              <name>MUX</name>
91196              <description>Pin Mux Control</description>
91197              <bitOffset>8</bitOffset>
91198              <bitWidth>3</bitWidth>
91199              <access>read-write</access>
91200              <enumeratedValues>
91201                <enumeratedValue>
91202                  <name>000</name>
91203                  <description>Pin disabled (Alternative 0) (analog).</description>
91204                  <value>#000</value>
91205                </enumeratedValue>
91206                <enumeratedValue>
91207                  <name>001</name>
91208                  <description>Alternative 1 (GPIO).</description>
91209                  <value>#001</value>
91210                </enumeratedValue>
91211                <enumeratedValue>
91212                  <name>010</name>
91213                  <description>Alternative 2 (chip-specific).</description>
91214                  <value>#010</value>
91215                </enumeratedValue>
91216                <enumeratedValue>
91217                  <name>011</name>
91218                  <description>Alternative 3 (chip-specific).</description>
91219                  <value>#011</value>
91220                </enumeratedValue>
91221                <enumeratedValue>
91222                  <name>100</name>
91223                  <description>Alternative 4 (chip-specific).</description>
91224                  <value>#100</value>
91225                </enumeratedValue>
91226                <enumeratedValue>
91227                  <name>101</name>
91228                  <description>Alternative 5 (chip-specific).</description>
91229                  <value>#101</value>
91230                </enumeratedValue>
91231                <enumeratedValue>
91232                  <name>110</name>
91233                  <description>Alternative 6 (chip-specific).</description>
91234                  <value>#110</value>
91235                </enumeratedValue>
91236                <enumeratedValue>
91237                  <name>111</name>
91238                  <description>Alternative 7 (chip-specific).</description>
91239                  <value>#111</value>
91240                </enumeratedValue>
91241              </enumeratedValues>
91242            </field>
91243            <field>
91244              <name>LK</name>
91245              <description>Lock Register</description>
91246              <bitOffset>15</bitOffset>
91247              <bitWidth>1</bitWidth>
91248              <access>read-write</access>
91249              <enumeratedValues>
91250                <enumeratedValue>
91251                  <name>0</name>
91252                  <description>Pin Control Register fields [15:0] are not locked.</description>
91253                  <value>#0</value>
91254                </enumeratedValue>
91255                <enumeratedValue>
91256                  <name>1</name>
91257                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
91258                  <value>#1</value>
91259                </enumeratedValue>
91260              </enumeratedValues>
91261            </field>
91262            <field>
91263              <name>IRQC</name>
91264              <description>Interrupt Configuration</description>
91265              <bitOffset>16</bitOffset>
91266              <bitWidth>4</bitWidth>
91267              <access>read-write</access>
91268              <enumeratedValues>
91269                <enumeratedValue>
91270                  <name>0000</name>
91271                  <description>Interrupt Status Flag (ISF) is disabled.</description>
91272                  <value>#0000</value>
91273                </enumeratedValue>
91274                <enumeratedValue>
91275                  <name>0001</name>
91276                  <description>ISF flag and DMA request on rising edge.</description>
91277                  <value>#0001</value>
91278                </enumeratedValue>
91279                <enumeratedValue>
91280                  <name>0010</name>
91281                  <description>ISF flag and DMA request on falling edge.</description>
91282                  <value>#0010</value>
91283                </enumeratedValue>
91284                <enumeratedValue>
91285                  <name>0011</name>
91286                  <description>ISF flag and DMA request on either edge.</description>
91287                  <value>#0011</value>
91288                </enumeratedValue>
91289                <enumeratedValue>
91290                  <name>1000</name>
91291                  <description>ISF flag and Interrupt when logic 0.</description>
91292                  <value>#1000</value>
91293                </enumeratedValue>
91294                <enumeratedValue>
91295                  <name>1001</name>
91296                  <description>ISF flag and Interrupt on rising-edge.</description>
91297                  <value>#1001</value>
91298                </enumeratedValue>
91299                <enumeratedValue>
91300                  <name>1010</name>
91301                  <description>ISF flag and Interrupt on falling-edge.</description>
91302                  <value>#1010</value>
91303                </enumeratedValue>
91304                <enumeratedValue>
91305                  <name>1011</name>
91306                  <description>ISF flag and Interrupt on either edge.</description>
91307                  <value>#1011</value>
91308                </enumeratedValue>
91309                <enumeratedValue>
91310                  <name>1100</name>
91311                  <description>ISF flag and Interrupt when logic 1.</description>
91312                  <value>#1100</value>
91313                </enumeratedValue>
91314              </enumeratedValues>
91315            </field>
91316            <field>
91317              <name>ISF</name>
91318              <description>Interrupt Status Flag</description>
91319              <bitOffset>24</bitOffset>
91320              <bitWidth>1</bitWidth>
91321              <access>read-write</access>
91322              <enumeratedValues>
91323                <enumeratedValue>
91324                  <name>0</name>
91325                  <description>Configured interrupt is not detected.</description>
91326                  <value>#0</value>
91327                </enumeratedValue>
91328                <enumeratedValue>
91329                  <name>1</name>
91330                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
91331                  <value>#1</value>
91332                </enumeratedValue>
91333              </enumeratedValues>
91334            </field>
91335          </fields>
91336        </register>
91337        <register>
91338          <name>PCR19</name>
91339          <description>Pin Control Register n</description>
91340          <addressOffset>0x4C</addressOffset>
91341          <size>32</size>
91342          <access>read-write</access>
91343          <resetValue>0</resetValue>
91344          <resetMask>0xFFFFFFFF</resetMask>
91345          <fields>
91346            <field>
91347              <name>PS</name>
91348              <description>Pull Select</description>
91349              <bitOffset>0</bitOffset>
91350              <bitWidth>1</bitWidth>
91351              <access>read-only</access>
91352              <enumeratedValues>
91353                <enumeratedValue>
91354                  <name>0</name>
91355                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
91356                  <value>#0</value>
91357                </enumeratedValue>
91358                <enumeratedValue>
91359                  <name>1</name>
91360                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
91361                  <value>#1</value>
91362                </enumeratedValue>
91363              </enumeratedValues>
91364            </field>
91365            <field>
91366              <name>PE</name>
91367              <description>Pull Enable</description>
91368              <bitOffset>1</bitOffset>
91369              <bitWidth>1</bitWidth>
91370              <access>read-only</access>
91371              <enumeratedValues>
91372                <enumeratedValue>
91373                  <name>0</name>
91374                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
91375                  <value>#0</value>
91376                </enumeratedValue>
91377                <enumeratedValue>
91378                  <name>1</name>
91379                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
91380                  <value>#1</value>
91381                </enumeratedValue>
91382              </enumeratedValues>
91383            </field>
91384            <field>
91385              <name>SRE</name>
91386              <description>Slew Rate Enable</description>
91387              <bitOffset>2</bitOffset>
91388              <bitWidth>1</bitWidth>
91389              <access>read-only</access>
91390              <enumeratedValues>
91391                <enumeratedValue>
91392                  <name>0</name>
91393                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
91394                  <value>#0</value>
91395                </enumeratedValue>
91396                <enumeratedValue>
91397                  <name>1</name>
91398                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
91399                  <value>#1</value>
91400                </enumeratedValue>
91401              </enumeratedValues>
91402            </field>
91403            <field>
91404              <name>PFE</name>
91405              <description>Passive Filter Enable</description>
91406              <bitOffset>4</bitOffset>
91407              <bitWidth>1</bitWidth>
91408              <access>read-only</access>
91409              <enumeratedValues>
91410                <enumeratedValue>
91411                  <name>0</name>
91412                  <description>Passive input filter is disabled on the corresponding pin.</description>
91413                  <value>#0</value>
91414                </enumeratedValue>
91415                <enumeratedValue>
91416                  <name>1</name>
91417                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
91418                  <value>#1</value>
91419                </enumeratedValue>
91420              </enumeratedValues>
91421            </field>
91422            <field>
91423              <name>ODE</name>
91424              <description>Open Drain Enable</description>
91425              <bitOffset>5</bitOffset>
91426              <bitWidth>1</bitWidth>
91427              <access>read-only</access>
91428              <enumeratedValues>
91429                <enumeratedValue>
91430                  <name>0</name>
91431                  <description>Open drain output is disabled on the corresponding pin.</description>
91432                  <value>#0</value>
91433                </enumeratedValue>
91434                <enumeratedValue>
91435                  <name>1</name>
91436                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
91437                  <value>#1</value>
91438                </enumeratedValue>
91439              </enumeratedValues>
91440            </field>
91441            <field>
91442              <name>DSE</name>
91443              <description>Drive Strength Enable</description>
91444              <bitOffset>6</bitOffset>
91445              <bitWidth>1</bitWidth>
91446              <access>read-only</access>
91447              <enumeratedValues>
91448                <enumeratedValue>
91449                  <name>0</name>
91450                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
91451                  <value>#0</value>
91452                </enumeratedValue>
91453                <enumeratedValue>
91454                  <name>1</name>
91455                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
91456                  <value>#1</value>
91457                </enumeratedValue>
91458              </enumeratedValues>
91459            </field>
91460            <field>
91461              <name>MUX</name>
91462              <description>Pin Mux Control</description>
91463              <bitOffset>8</bitOffset>
91464              <bitWidth>3</bitWidth>
91465              <access>read-write</access>
91466              <enumeratedValues>
91467                <enumeratedValue>
91468                  <name>000</name>
91469                  <description>Pin disabled (Alternative 0) (analog).</description>
91470                  <value>#000</value>
91471                </enumeratedValue>
91472                <enumeratedValue>
91473                  <name>001</name>
91474                  <description>Alternative 1 (GPIO).</description>
91475                  <value>#001</value>
91476                </enumeratedValue>
91477                <enumeratedValue>
91478                  <name>010</name>
91479                  <description>Alternative 2 (chip-specific).</description>
91480                  <value>#010</value>
91481                </enumeratedValue>
91482                <enumeratedValue>
91483                  <name>011</name>
91484                  <description>Alternative 3 (chip-specific).</description>
91485                  <value>#011</value>
91486                </enumeratedValue>
91487                <enumeratedValue>
91488                  <name>100</name>
91489                  <description>Alternative 4 (chip-specific).</description>
91490                  <value>#100</value>
91491                </enumeratedValue>
91492                <enumeratedValue>
91493                  <name>101</name>
91494                  <description>Alternative 5 (chip-specific).</description>
91495                  <value>#101</value>
91496                </enumeratedValue>
91497                <enumeratedValue>
91498                  <name>110</name>
91499                  <description>Alternative 6 (chip-specific).</description>
91500                  <value>#110</value>
91501                </enumeratedValue>
91502                <enumeratedValue>
91503                  <name>111</name>
91504                  <description>Alternative 7 (chip-specific).</description>
91505                  <value>#111</value>
91506                </enumeratedValue>
91507              </enumeratedValues>
91508            </field>
91509            <field>
91510              <name>LK</name>
91511              <description>Lock Register</description>
91512              <bitOffset>15</bitOffset>
91513              <bitWidth>1</bitWidth>
91514              <access>read-write</access>
91515              <enumeratedValues>
91516                <enumeratedValue>
91517                  <name>0</name>
91518                  <description>Pin Control Register fields [15:0] are not locked.</description>
91519                  <value>#0</value>
91520                </enumeratedValue>
91521                <enumeratedValue>
91522                  <name>1</name>
91523                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
91524                  <value>#1</value>
91525                </enumeratedValue>
91526              </enumeratedValues>
91527            </field>
91528            <field>
91529              <name>IRQC</name>
91530              <description>Interrupt Configuration</description>
91531              <bitOffset>16</bitOffset>
91532              <bitWidth>4</bitWidth>
91533              <access>read-write</access>
91534              <enumeratedValues>
91535                <enumeratedValue>
91536                  <name>0000</name>
91537                  <description>Interrupt Status Flag (ISF) is disabled.</description>
91538                  <value>#0000</value>
91539                </enumeratedValue>
91540                <enumeratedValue>
91541                  <name>0001</name>
91542                  <description>ISF flag and DMA request on rising edge.</description>
91543                  <value>#0001</value>
91544                </enumeratedValue>
91545                <enumeratedValue>
91546                  <name>0010</name>
91547                  <description>ISF flag and DMA request on falling edge.</description>
91548                  <value>#0010</value>
91549                </enumeratedValue>
91550                <enumeratedValue>
91551                  <name>0011</name>
91552                  <description>ISF flag and DMA request on either edge.</description>
91553                  <value>#0011</value>
91554                </enumeratedValue>
91555                <enumeratedValue>
91556                  <name>1000</name>
91557                  <description>ISF flag and Interrupt when logic 0.</description>
91558                  <value>#1000</value>
91559                </enumeratedValue>
91560                <enumeratedValue>
91561                  <name>1001</name>
91562                  <description>ISF flag and Interrupt on rising-edge.</description>
91563                  <value>#1001</value>
91564                </enumeratedValue>
91565                <enumeratedValue>
91566                  <name>1010</name>
91567                  <description>ISF flag and Interrupt on falling-edge.</description>
91568                  <value>#1010</value>
91569                </enumeratedValue>
91570                <enumeratedValue>
91571                  <name>1011</name>
91572                  <description>ISF flag and Interrupt on either edge.</description>
91573                  <value>#1011</value>
91574                </enumeratedValue>
91575                <enumeratedValue>
91576                  <name>1100</name>
91577                  <description>ISF flag and Interrupt when logic 1.</description>
91578                  <value>#1100</value>
91579                </enumeratedValue>
91580              </enumeratedValues>
91581            </field>
91582            <field>
91583              <name>ISF</name>
91584              <description>Interrupt Status Flag</description>
91585              <bitOffset>24</bitOffset>
91586              <bitWidth>1</bitWidth>
91587              <access>read-write</access>
91588              <enumeratedValues>
91589                <enumeratedValue>
91590                  <name>0</name>
91591                  <description>Configured interrupt is not detected.</description>
91592                  <value>#0</value>
91593                </enumeratedValue>
91594                <enumeratedValue>
91595                  <name>1</name>
91596                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
91597                  <value>#1</value>
91598                </enumeratedValue>
91599              </enumeratedValues>
91600            </field>
91601          </fields>
91602        </register>
91603        <register>
91604          <name>PCR20</name>
91605          <description>Pin Control Register n</description>
91606          <addressOffset>0x50</addressOffset>
91607          <size>32</size>
91608          <access>read-write</access>
91609          <resetValue>0</resetValue>
91610          <resetMask>0xFFFFFFFF</resetMask>
91611          <fields>
91612            <field>
91613              <name>PS</name>
91614              <description>Pull Select</description>
91615              <bitOffset>0</bitOffset>
91616              <bitWidth>1</bitWidth>
91617              <access>read-only</access>
91618              <enumeratedValues>
91619                <enumeratedValue>
91620                  <name>0</name>
91621                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
91622                  <value>#0</value>
91623                </enumeratedValue>
91624                <enumeratedValue>
91625                  <name>1</name>
91626                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
91627                  <value>#1</value>
91628                </enumeratedValue>
91629              </enumeratedValues>
91630            </field>
91631            <field>
91632              <name>PE</name>
91633              <description>Pull Enable</description>
91634              <bitOffset>1</bitOffset>
91635              <bitWidth>1</bitWidth>
91636              <access>read-only</access>
91637              <enumeratedValues>
91638                <enumeratedValue>
91639                  <name>0</name>
91640                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
91641                  <value>#0</value>
91642                </enumeratedValue>
91643                <enumeratedValue>
91644                  <name>1</name>
91645                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
91646                  <value>#1</value>
91647                </enumeratedValue>
91648              </enumeratedValues>
91649            </field>
91650            <field>
91651              <name>SRE</name>
91652              <description>Slew Rate Enable</description>
91653              <bitOffset>2</bitOffset>
91654              <bitWidth>1</bitWidth>
91655              <access>read-only</access>
91656              <enumeratedValues>
91657                <enumeratedValue>
91658                  <name>0</name>
91659                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
91660                  <value>#0</value>
91661                </enumeratedValue>
91662                <enumeratedValue>
91663                  <name>1</name>
91664                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
91665                  <value>#1</value>
91666                </enumeratedValue>
91667              </enumeratedValues>
91668            </field>
91669            <field>
91670              <name>PFE</name>
91671              <description>Passive Filter Enable</description>
91672              <bitOffset>4</bitOffset>
91673              <bitWidth>1</bitWidth>
91674              <access>read-only</access>
91675              <enumeratedValues>
91676                <enumeratedValue>
91677                  <name>0</name>
91678                  <description>Passive input filter is disabled on the corresponding pin.</description>
91679                  <value>#0</value>
91680                </enumeratedValue>
91681                <enumeratedValue>
91682                  <name>1</name>
91683                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
91684                  <value>#1</value>
91685                </enumeratedValue>
91686              </enumeratedValues>
91687            </field>
91688            <field>
91689              <name>ODE</name>
91690              <description>Open Drain Enable</description>
91691              <bitOffset>5</bitOffset>
91692              <bitWidth>1</bitWidth>
91693              <access>read-only</access>
91694              <enumeratedValues>
91695                <enumeratedValue>
91696                  <name>0</name>
91697                  <description>Open drain output is disabled on the corresponding pin.</description>
91698                  <value>#0</value>
91699                </enumeratedValue>
91700                <enumeratedValue>
91701                  <name>1</name>
91702                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
91703                  <value>#1</value>
91704                </enumeratedValue>
91705              </enumeratedValues>
91706            </field>
91707            <field>
91708              <name>DSE</name>
91709              <description>Drive Strength Enable</description>
91710              <bitOffset>6</bitOffset>
91711              <bitWidth>1</bitWidth>
91712              <access>read-only</access>
91713              <enumeratedValues>
91714                <enumeratedValue>
91715                  <name>0</name>
91716                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
91717                  <value>#0</value>
91718                </enumeratedValue>
91719                <enumeratedValue>
91720                  <name>1</name>
91721                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
91722                  <value>#1</value>
91723                </enumeratedValue>
91724              </enumeratedValues>
91725            </field>
91726            <field>
91727              <name>MUX</name>
91728              <description>Pin Mux Control</description>
91729              <bitOffset>8</bitOffset>
91730              <bitWidth>3</bitWidth>
91731              <access>read-write</access>
91732              <enumeratedValues>
91733                <enumeratedValue>
91734                  <name>000</name>
91735                  <description>Pin disabled (Alternative 0) (analog).</description>
91736                  <value>#000</value>
91737                </enumeratedValue>
91738                <enumeratedValue>
91739                  <name>001</name>
91740                  <description>Alternative 1 (GPIO).</description>
91741                  <value>#001</value>
91742                </enumeratedValue>
91743                <enumeratedValue>
91744                  <name>010</name>
91745                  <description>Alternative 2 (chip-specific).</description>
91746                  <value>#010</value>
91747                </enumeratedValue>
91748                <enumeratedValue>
91749                  <name>011</name>
91750                  <description>Alternative 3 (chip-specific).</description>
91751                  <value>#011</value>
91752                </enumeratedValue>
91753                <enumeratedValue>
91754                  <name>100</name>
91755                  <description>Alternative 4 (chip-specific).</description>
91756                  <value>#100</value>
91757                </enumeratedValue>
91758                <enumeratedValue>
91759                  <name>101</name>
91760                  <description>Alternative 5 (chip-specific).</description>
91761                  <value>#101</value>
91762                </enumeratedValue>
91763                <enumeratedValue>
91764                  <name>110</name>
91765                  <description>Alternative 6 (chip-specific).</description>
91766                  <value>#110</value>
91767                </enumeratedValue>
91768                <enumeratedValue>
91769                  <name>111</name>
91770                  <description>Alternative 7 (chip-specific).</description>
91771                  <value>#111</value>
91772                </enumeratedValue>
91773              </enumeratedValues>
91774            </field>
91775            <field>
91776              <name>LK</name>
91777              <description>Lock Register</description>
91778              <bitOffset>15</bitOffset>
91779              <bitWidth>1</bitWidth>
91780              <access>read-write</access>
91781              <enumeratedValues>
91782                <enumeratedValue>
91783                  <name>0</name>
91784                  <description>Pin Control Register fields [15:0] are not locked.</description>
91785                  <value>#0</value>
91786                </enumeratedValue>
91787                <enumeratedValue>
91788                  <name>1</name>
91789                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
91790                  <value>#1</value>
91791                </enumeratedValue>
91792              </enumeratedValues>
91793            </field>
91794            <field>
91795              <name>IRQC</name>
91796              <description>Interrupt Configuration</description>
91797              <bitOffset>16</bitOffset>
91798              <bitWidth>4</bitWidth>
91799              <access>read-write</access>
91800              <enumeratedValues>
91801                <enumeratedValue>
91802                  <name>0000</name>
91803                  <description>Interrupt Status Flag (ISF) is disabled.</description>
91804                  <value>#0000</value>
91805                </enumeratedValue>
91806                <enumeratedValue>
91807                  <name>0001</name>
91808                  <description>ISF flag and DMA request on rising edge.</description>
91809                  <value>#0001</value>
91810                </enumeratedValue>
91811                <enumeratedValue>
91812                  <name>0010</name>
91813                  <description>ISF flag and DMA request on falling edge.</description>
91814                  <value>#0010</value>
91815                </enumeratedValue>
91816                <enumeratedValue>
91817                  <name>0011</name>
91818                  <description>ISF flag and DMA request on either edge.</description>
91819                  <value>#0011</value>
91820                </enumeratedValue>
91821                <enumeratedValue>
91822                  <name>1000</name>
91823                  <description>ISF flag and Interrupt when logic 0.</description>
91824                  <value>#1000</value>
91825                </enumeratedValue>
91826                <enumeratedValue>
91827                  <name>1001</name>
91828                  <description>ISF flag and Interrupt on rising-edge.</description>
91829                  <value>#1001</value>
91830                </enumeratedValue>
91831                <enumeratedValue>
91832                  <name>1010</name>
91833                  <description>ISF flag and Interrupt on falling-edge.</description>
91834                  <value>#1010</value>
91835                </enumeratedValue>
91836                <enumeratedValue>
91837                  <name>1011</name>
91838                  <description>ISF flag and Interrupt on either edge.</description>
91839                  <value>#1011</value>
91840                </enumeratedValue>
91841                <enumeratedValue>
91842                  <name>1100</name>
91843                  <description>ISF flag and Interrupt when logic 1.</description>
91844                  <value>#1100</value>
91845                </enumeratedValue>
91846              </enumeratedValues>
91847            </field>
91848            <field>
91849              <name>ISF</name>
91850              <description>Interrupt Status Flag</description>
91851              <bitOffset>24</bitOffset>
91852              <bitWidth>1</bitWidth>
91853              <access>read-write</access>
91854              <enumeratedValues>
91855                <enumeratedValue>
91856                  <name>0</name>
91857                  <description>Configured interrupt is not detected.</description>
91858                  <value>#0</value>
91859                </enumeratedValue>
91860                <enumeratedValue>
91861                  <name>1</name>
91862                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
91863                  <value>#1</value>
91864                </enumeratedValue>
91865              </enumeratedValues>
91866            </field>
91867          </fields>
91868        </register>
91869        <register>
91870          <name>PCR21</name>
91871          <description>Pin Control Register n</description>
91872          <addressOffset>0x54</addressOffset>
91873          <size>32</size>
91874          <access>read-write</access>
91875          <resetValue>0</resetValue>
91876          <resetMask>0xFFFFFFFF</resetMask>
91877          <fields>
91878            <field>
91879              <name>PS</name>
91880              <description>Pull Select</description>
91881              <bitOffset>0</bitOffset>
91882              <bitWidth>1</bitWidth>
91883              <access>read-only</access>
91884              <enumeratedValues>
91885                <enumeratedValue>
91886                  <name>0</name>
91887                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
91888                  <value>#0</value>
91889                </enumeratedValue>
91890                <enumeratedValue>
91891                  <name>1</name>
91892                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
91893                  <value>#1</value>
91894                </enumeratedValue>
91895              </enumeratedValues>
91896            </field>
91897            <field>
91898              <name>PE</name>
91899              <description>Pull Enable</description>
91900              <bitOffset>1</bitOffset>
91901              <bitWidth>1</bitWidth>
91902              <access>read-only</access>
91903              <enumeratedValues>
91904                <enumeratedValue>
91905                  <name>0</name>
91906                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
91907                  <value>#0</value>
91908                </enumeratedValue>
91909                <enumeratedValue>
91910                  <name>1</name>
91911                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
91912                  <value>#1</value>
91913                </enumeratedValue>
91914              </enumeratedValues>
91915            </field>
91916            <field>
91917              <name>SRE</name>
91918              <description>Slew Rate Enable</description>
91919              <bitOffset>2</bitOffset>
91920              <bitWidth>1</bitWidth>
91921              <access>read-only</access>
91922              <enumeratedValues>
91923                <enumeratedValue>
91924                  <name>0</name>
91925                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
91926                  <value>#0</value>
91927                </enumeratedValue>
91928                <enumeratedValue>
91929                  <name>1</name>
91930                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
91931                  <value>#1</value>
91932                </enumeratedValue>
91933              </enumeratedValues>
91934            </field>
91935            <field>
91936              <name>PFE</name>
91937              <description>Passive Filter Enable</description>
91938              <bitOffset>4</bitOffset>
91939              <bitWidth>1</bitWidth>
91940              <access>read-only</access>
91941              <enumeratedValues>
91942                <enumeratedValue>
91943                  <name>0</name>
91944                  <description>Passive input filter is disabled on the corresponding pin.</description>
91945                  <value>#0</value>
91946                </enumeratedValue>
91947                <enumeratedValue>
91948                  <name>1</name>
91949                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
91950                  <value>#1</value>
91951                </enumeratedValue>
91952              </enumeratedValues>
91953            </field>
91954            <field>
91955              <name>ODE</name>
91956              <description>Open Drain Enable</description>
91957              <bitOffset>5</bitOffset>
91958              <bitWidth>1</bitWidth>
91959              <access>read-only</access>
91960              <enumeratedValues>
91961                <enumeratedValue>
91962                  <name>0</name>
91963                  <description>Open drain output is disabled on the corresponding pin.</description>
91964                  <value>#0</value>
91965                </enumeratedValue>
91966                <enumeratedValue>
91967                  <name>1</name>
91968                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
91969                  <value>#1</value>
91970                </enumeratedValue>
91971              </enumeratedValues>
91972            </field>
91973            <field>
91974              <name>DSE</name>
91975              <description>Drive Strength Enable</description>
91976              <bitOffset>6</bitOffset>
91977              <bitWidth>1</bitWidth>
91978              <access>read-only</access>
91979              <enumeratedValues>
91980                <enumeratedValue>
91981                  <name>0</name>
91982                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
91983                  <value>#0</value>
91984                </enumeratedValue>
91985                <enumeratedValue>
91986                  <name>1</name>
91987                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
91988                  <value>#1</value>
91989                </enumeratedValue>
91990              </enumeratedValues>
91991            </field>
91992            <field>
91993              <name>MUX</name>
91994              <description>Pin Mux Control</description>
91995              <bitOffset>8</bitOffset>
91996              <bitWidth>3</bitWidth>
91997              <access>read-write</access>
91998              <enumeratedValues>
91999                <enumeratedValue>
92000                  <name>000</name>
92001                  <description>Pin disabled (Alternative 0) (analog).</description>
92002                  <value>#000</value>
92003                </enumeratedValue>
92004                <enumeratedValue>
92005                  <name>001</name>
92006                  <description>Alternative 1 (GPIO).</description>
92007                  <value>#001</value>
92008                </enumeratedValue>
92009                <enumeratedValue>
92010                  <name>010</name>
92011                  <description>Alternative 2 (chip-specific).</description>
92012                  <value>#010</value>
92013                </enumeratedValue>
92014                <enumeratedValue>
92015                  <name>011</name>
92016                  <description>Alternative 3 (chip-specific).</description>
92017                  <value>#011</value>
92018                </enumeratedValue>
92019                <enumeratedValue>
92020                  <name>100</name>
92021                  <description>Alternative 4 (chip-specific).</description>
92022                  <value>#100</value>
92023                </enumeratedValue>
92024                <enumeratedValue>
92025                  <name>101</name>
92026                  <description>Alternative 5 (chip-specific).</description>
92027                  <value>#101</value>
92028                </enumeratedValue>
92029                <enumeratedValue>
92030                  <name>110</name>
92031                  <description>Alternative 6 (chip-specific).</description>
92032                  <value>#110</value>
92033                </enumeratedValue>
92034                <enumeratedValue>
92035                  <name>111</name>
92036                  <description>Alternative 7 (chip-specific).</description>
92037                  <value>#111</value>
92038                </enumeratedValue>
92039              </enumeratedValues>
92040            </field>
92041            <field>
92042              <name>LK</name>
92043              <description>Lock Register</description>
92044              <bitOffset>15</bitOffset>
92045              <bitWidth>1</bitWidth>
92046              <access>read-write</access>
92047              <enumeratedValues>
92048                <enumeratedValue>
92049                  <name>0</name>
92050                  <description>Pin Control Register fields [15:0] are not locked.</description>
92051                  <value>#0</value>
92052                </enumeratedValue>
92053                <enumeratedValue>
92054                  <name>1</name>
92055                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
92056                  <value>#1</value>
92057                </enumeratedValue>
92058              </enumeratedValues>
92059            </field>
92060            <field>
92061              <name>IRQC</name>
92062              <description>Interrupt Configuration</description>
92063              <bitOffset>16</bitOffset>
92064              <bitWidth>4</bitWidth>
92065              <access>read-write</access>
92066              <enumeratedValues>
92067                <enumeratedValue>
92068                  <name>0000</name>
92069                  <description>Interrupt Status Flag (ISF) is disabled.</description>
92070                  <value>#0000</value>
92071                </enumeratedValue>
92072                <enumeratedValue>
92073                  <name>0001</name>
92074                  <description>ISF flag and DMA request on rising edge.</description>
92075                  <value>#0001</value>
92076                </enumeratedValue>
92077                <enumeratedValue>
92078                  <name>0010</name>
92079                  <description>ISF flag and DMA request on falling edge.</description>
92080                  <value>#0010</value>
92081                </enumeratedValue>
92082                <enumeratedValue>
92083                  <name>0011</name>
92084                  <description>ISF flag and DMA request on either edge.</description>
92085                  <value>#0011</value>
92086                </enumeratedValue>
92087                <enumeratedValue>
92088                  <name>1000</name>
92089                  <description>ISF flag and Interrupt when logic 0.</description>
92090                  <value>#1000</value>
92091                </enumeratedValue>
92092                <enumeratedValue>
92093                  <name>1001</name>
92094                  <description>ISF flag and Interrupt on rising-edge.</description>
92095                  <value>#1001</value>
92096                </enumeratedValue>
92097                <enumeratedValue>
92098                  <name>1010</name>
92099                  <description>ISF flag and Interrupt on falling-edge.</description>
92100                  <value>#1010</value>
92101                </enumeratedValue>
92102                <enumeratedValue>
92103                  <name>1011</name>
92104                  <description>ISF flag and Interrupt on either edge.</description>
92105                  <value>#1011</value>
92106                </enumeratedValue>
92107                <enumeratedValue>
92108                  <name>1100</name>
92109                  <description>ISF flag and Interrupt when logic 1.</description>
92110                  <value>#1100</value>
92111                </enumeratedValue>
92112              </enumeratedValues>
92113            </field>
92114            <field>
92115              <name>ISF</name>
92116              <description>Interrupt Status Flag</description>
92117              <bitOffset>24</bitOffset>
92118              <bitWidth>1</bitWidth>
92119              <access>read-write</access>
92120              <enumeratedValues>
92121                <enumeratedValue>
92122                  <name>0</name>
92123                  <description>Configured interrupt is not detected.</description>
92124                  <value>#0</value>
92125                </enumeratedValue>
92126                <enumeratedValue>
92127                  <name>1</name>
92128                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
92129                  <value>#1</value>
92130                </enumeratedValue>
92131              </enumeratedValues>
92132            </field>
92133          </fields>
92134        </register>
92135        <register>
92136          <name>PCR22</name>
92137          <description>Pin Control Register n</description>
92138          <addressOffset>0x58</addressOffset>
92139          <size>32</size>
92140          <access>read-write</access>
92141          <resetValue>0</resetValue>
92142          <resetMask>0xFFFFFFFF</resetMask>
92143          <fields>
92144            <field>
92145              <name>PS</name>
92146              <description>Pull Select</description>
92147              <bitOffset>0</bitOffset>
92148              <bitWidth>1</bitWidth>
92149              <access>read-only</access>
92150              <enumeratedValues>
92151                <enumeratedValue>
92152                  <name>0</name>
92153                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
92154                  <value>#0</value>
92155                </enumeratedValue>
92156                <enumeratedValue>
92157                  <name>1</name>
92158                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
92159                  <value>#1</value>
92160                </enumeratedValue>
92161              </enumeratedValues>
92162            </field>
92163            <field>
92164              <name>PE</name>
92165              <description>Pull Enable</description>
92166              <bitOffset>1</bitOffset>
92167              <bitWidth>1</bitWidth>
92168              <access>read-only</access>
92169              <enumeratedValues>
92170                <enumeratedValue>
92171                  <name>0</name>
92172                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
92173                  <value>#0</value>
92174                </enumeratedValue>
92175                <enumeratedValue>
92176                  <name>1</name>
92177                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
92178                  <value>#1</value>
92179                </enumeratedValue>
92180              </enumeratedValues>
92181            </field>
92182            <field>
92183              <name>SRE</name>
92184              <description>Slew Rate Enable</description>
92185              <bitOffset>2</bitOffset>
92186              <bitWidth>1</bitWidth>
92187              <access>read-only</access>
92188              <enumeratedValues>
92189                <enumeratedValue>
92190                  <name>0</name>
92191                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
92192                  <value>#0</value>
92193                </enumeratedValue>
92194                <enumeratedValue>
92195                  <name>1</name>
92196                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
92197                  <value>#1</value>
92198                </enumeratedValue>
92199              </enumeratedValues>
92200            </field>
92201            <field>
92202              <name>PFE</name>
92203              <description>Passive Filter Enable</description>
92204              <bitOffset>4</bitOffset>
92205              <bitWidth>1</bitWidth>
92206              <access>read-only</access>
92207              <enumeratedValues>
92208                <enumeratedValue>
92209                  <name>0</name>
92210                  <description>Passive input filter is disabled on the corresponding pin.</description>
92211                  <value>#0</value>
92212                </enumeratedValue>
92213                <enumeratedValue>
92214                  <name>1</name>
92215                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
92216                  <value>#1</value>
92217                </enumeratedValue>
92218              </enumeratedValues>
92219            </field>
92220            <field>
92221              <name>ODE</name>
92222              <description>Open Drain Enable</description>
92223              <bitOffset>5</bitOffset>
92224              <bitWidth>1</bitWidth>
92225              <access>read-only</access>
92226              <enumeratedValues>
92227                <enumeratedValue>
92228                  <name>0</name>
92229                  <description>Open drain output is disabled on the corresponding pin.</description>
92230                  <value>#0</value>
92231                </enumeratedValue>
92232                <enumeratedValue>
92233                  <name>1</name>
92234                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
92235                  <value>#1</value>
92236                </enumeratedValue>
92237              </enumeratedValues>
92238            </field>
92239            <field>
92240              <name>DSE</name>
92241              <description>Drive Strength Enable</description>
92242              <bitOffset>6</bitOffset>
92243              <bitWidth>1</bitWidth>
92244              <access>read-only</access>
92245              <enumeratedValues>
92246                <enumeratedValue>
92247                  <name>0</name>
92248                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
92249                  <value>#0</value>
92250                </enumeratedValue>
92251                <enumeratedValue>
92252                  <name>1</name>
92253                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
92254                  <value>#1</value>
92255                </enumeratedValue>
92256              </enumeratedValues>
92257            </field>
92258            <field>
92259              <name>MUX</name>
92260              <description>Pin Mux Control</description>
92261              <bitOffset>8</bitOffset>
92262              <bitWidth>3</bitWidth>
92263              <access>read-write</access>
92264              <enumeratedValues>
92265                <enumeratedValue>
92266                  <name>000</name>
92267                  <description>Pin disabled (Alternative 0) (analog).</description>
92268                  <value>#000</value>
92269                </enumeratedValue>
92270                <enumeratedValue>
92271                  <name>001</name>
92272                  <description>Alternative 1 (GPIO).</description>
92273                  <value>#001</value>
92274                </enumeratedValue>
92275                <enumeratedValue>
92276                  <name>010</name>
92277                  <description>Alternative 2 (chip-specific).</description>
92278                  <value>#010</value>
92279                </enumeratedValue>
92280                <enumeratedValue>
92281                  <name>011</name>
92282                  <description>Alternative 3 (chip-specific).</description>
92283                  <value>#011</value>
92284                </enumeratedValue>
92285                <enumeratedValue>
92286                  <name>100</name>
92287                  <description>Alternative 4 (chip-specific).</description>
92288                  <value>#100</value>
92289                </enumeratedValue>
92290                <enumeratedValue>
92291                  <name>101</name>
92292                  <description>Alternative 5 (chip-specific).</description>
92293                  <value>#101</value>
92294                </enumeratedValue>
92295                <enumeratedValue>
92296                  <name>110</name>
92297                  <description>Alternative 6 (chip-specific).</description>
92298                  <value>#110</value>
92299                </enumeratedValue>
92300                <enumeratedValue>
92301                  <name>111</name>
92302                  <description>Alternative 7 (chip-specific).</description>
92303                  <value>#111</value>
92304                </enumeratedValue>
92305              </enumeratedValues>
92306            </field>
92307            <field>
92308              <name>LK</name>
92309              <description>Lock Register</description>
92310              <bitOffset>15</bitOffset>
92311              <bitWidth>1</bitWidth>
92312              <access>read-write</access>
92313              <enumeratedValues>
92314                <enumeratedValue>
92315                  <name>0</name>
92316                  <description>Pin Control Register fields [15:0] are not locked.</description>
92317                  <value>#0</value>
92318                </enumeratedValue>
92319                <enumeratedValue>
92320                  <name>1</name>
92321                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
92322                  <value>#1</value>
92323                </enumeratedValue>
92324              </enumeratedValues>
92325            </field>
92326            <field>
92327              <name>IRQC</name>
92328              <description>Interrupt Configuration</description>
92329              <bitOffset>16</bitOffset>
92330              <bitWidth>4</bitWidth>
92331              <access>read-write</access>
92332              <enumeratedValues>
92333                <enumeratedValue>
92334                  <name>0000</name>
92335                  <description>Interrupt Status Flag (ISF) is disabled.</description>
92336                  <value>#0000</value>
92337                </enumeratedValue>
92338                <enumeratedValue>
92339                  <name>0001</name>
92340                  <description>ISF flag and DMA request on rising edge.</description>
92341                  <value>#0001</value>
92342                </enumeratedValue>
92343                <enumeratedValue>
92344                  <name>0010</name>
92345                  <description>ISF flag and DMA request on falling edge.</description>
92346                  <value>#0010</value>
92347                </enumeratedValue>
92348                <enumeratedValue>
92349                  <name>0011</name>
92350                  <description>ISF flag and DMA request on either edge.</description>
92351                  <value>#0011</value>
92352                </enumeratedValue>
92353                <enumeratedValue>
92354                  <name>1000</name>
92355                  <description>ISF flag and Interrupt when logic 0.</description>
92356                  <value>#1000</value>
92357                </enumeratedValue>
92358                <enumeratedValue>
92359                  <name>1001</name>
92360                  <description>ISF flag and Interrupt on rising-edge.</description>
92361                  <value>#1001</value>
92362                </enumeratedValue>
92363                <enumeratedValue>
92364                  <name>1010</name>
92365                  <description>ISF flag and Interrupt on falling-edge.</description>
92366                  <value>#1010</value>
92367                </enumeratedValue>
92368                <enumeratedValue>
92369                  <name>1011</name>
92370                  <description>ISF flag and Interrupt on either edge.</description>
92371                  <value>#1011</value>
92372                </enumeratedValue>
92373                <enumeratedValue>
92374                  <name>1100</name>
92375                  <description>ISF flag and Interrupt when logic 1.</description>
92376                  <value>#1100</value>
92377                </enumeratedValue>
92378              </enumeratedValues>
92379            </field>
92380            <field>
92381              <name>ISF</name>
92382              <description>Interrupt Status Flag</description>
92383              <bitOffset>24</bitOffset>
92384              <bitWidth>1</bitWidth>
92385              <access>read-write</access>
92386              <enumeratedValues>
92387                <enumeratedValue>
92388                  <name>0</name>
92389                  <description>Configured interrupt is not detected.</description>
92390                  <value>#0</value>
92391                </enumeratedValue>
92392                <enumeratedValue>
92393                  <name>1</name>
92394                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
92395                  <value>#1</value>
92396                </enumeratedValue>
92397              </enumeratedValues>
92398            </field>
92399          </fields>
92400        </register>
92401        <register>
92402          <name>PCR23</name>
92403          <description>Pin Control Register n</description>
92404          <addressOffset>0x5C</addressOffset>
92405          <size>32</size>
92406          <access>read-write</access>
92407          <resetValue>0</resetValue>
92408          <resetMask>0xFFFFFFFF</resetMask>
92409          <fields>
92410            <field>
92411              <name>PS</name>
92412              <description>Pull Select</description>
92413              <bitOffset>0</bitOffset>
92414              <bitWidth>1</bitWidth>
92415              <access>read-only</access>
92416              <enumeratedValues>
92417                <enumeratedValue>
92418                  <name>0</name>
92419                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
92420                  <value>#0</value>
92421                </enumeratedValue>
92422                <enumeratedValue>
92423                  <name>1</name>
92424                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
92425                  <value>#1</value>
92426                </enumeratedValue>
92427              </enumeratedValues>
92428            </field>
92429            <field>
92430              <name>PE</name>
92431              <description>Pull Enable</description>
92432              <bitOffset>1</bitOffset>
92433              <bitWidth>1</bitWidth>
92434              <access>read-only</access>
92435              <enumeratedValues>
92436                <enumeratedValue>
92437                  <name>0</name>
92438                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
92439                  <value>#0</value>
92440                </enumeratedValue>
92441                <enumeratedValue>
92442                  <name>1</name>
92443                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
92444                  <value>#1</value>
92445                </enumeratedValue>
92446              </enumeratedValues>
92447            </field>
92448            <field>
92449              <name>SRE</name>
92450              <description>Slew Rate Enable</description>
92451              <bitOffset>2</bitOffset>
92452              <bitWidth>1</bitWidth>
92453              <access>read-only</access>
92454              <enumeratedValues>
92455                <enumeratedValue>
92456                  <name>0</name>
92457                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
92458                  <value>#0</value>
92459                </enumeratedValue>
92460                <enumeratedValue>
92461                  <name>1</name>
92462                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
92463                  <value>#1</value>
92464                </enumeratedValue>
92465              </enumeratedValues>
92466            </field>
92467            <field>
92468              <name>PFE</name>
92469              <description>Passive Filter Enable</description>
92470              <bitOffset>4</bitOffset>
92471              <bitWidth>1</bitWidth>
92472              <access>read-only</access>
92473              <enumeratedValues>
92474                <enumeratedValue>
92475                  <name>0</name>
92476                  <description>Passive input filter is disabled on the corresponding pin.</description>
92477                  <value>#0</value>
92478                </enumeratedValue>
92479                <enumeratedValue>
92480                  <name>1</name>
92481                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
92482                  <value>#1</value>
92483                </enumeratedValue>
92484              </enumeratedValues>
92485            </field>
92486            <field>
92487              <name>ODE</name>
92488              <description>Open Drain Enable</description>
92489              <bitOffset>5</bitOffset>
92490              <bitWidth>1</bitWidth>
92491              <access>read-only</access>
92492              <enumeratedValues>
92493                <enumeratedValue>
92494                  <name>0</name>
92495                  <description>Open drain output is disabled on the corresponding pin.</description>
92496                  <value>#0</value>
92497                </enumeratedValue>
92498                <enumeratedValue>
92499                  <name>1</name>
92500                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
92501                  <value>#1</value>
92502                </enumeratedValue>
92503              </enumeratedValues>
92504            </field>
92505            <field>
92506              <name>DSE</name>
92507              <description>Drive Strength Enable</description>
92508              <bitOffset>6</bitOffset>
92509              <bitWidth>1</bitWidth>
92510              <access>read-only</access>
92511              <enumeratedValues>
92512                <enumeratedValue>
92513                  <name>0</name>
92514                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
92515                  <value>#0</value>
92516                </enumeratedValue>
92517                <enumeratedValue>
92518                  <name>1</name>
92519                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
92520                  <value>#1</value>
92521                </enumeratedValue>
92522              </enumeratedValues>
92523            </field>
92524            <field>
92525              <name>MUX</name>
92526              <description>Pin Mux Control</description>
92527              <bitOffset>8</bitOffset>
92528              <bitWidth>3</bitWidth>
92529              <access>read-write</access>
92530              <enumeratedValues>
92531                <enumeratedValue>
92532                  <name>000</name>
92533                  <description>Pin disabled (Alternative 0) (analog).</description>
92534                  <value>#000</value>
92535                </enumeratedValue>
92536                <enumeratedValue>
92537                  <name>001</name>
92538                  <description>Alternative 1 (GPIO).</description>
92539                  <value>#001</value>
92540                </enumeratedValue>
92541                <enumeratedValue>
92542                  <name>010</name>
92543                  <description>Alternative 2 (chip-specific).</description>
92544                  <value>#010</value>
92545                </enumeratedValue>
92546                <enumeratedValue>
92547                  <name>011</name>
92548                  <description>Alternative 3 (chip-specific).</description>
92549                  <value>#011</value>
92550                </enumeratedValue>
92551                <enumeratedValue>
92552                  <name>100</name>
92553                  <description>Alternative 4 (chip-specific).</description>
92554                  <value>#100</value>
92555                </enumeratedValue>
92556                <enumeratedValue>
92557                  <name>101</name>
92558                  <description>Alternative 5 (chip-specific).</description>
92559                  <value>#101</value>
92560                </enumeratedValue>
92561                <enumeratedValue>
92562                  <name>110</name>
92563                  <description>Alternative 6 (chip-specific).</description>
92564                  <value>#110</value>
92565                </enumeratedValue>
92566                <enumeratedValue>
92567                  <name>111</name>
92568                  <description>Alternative 7 (chip-specific).</description>
92569                  <value>#111</value>
92570                </enumeratedValue>
92571              </enumeratedValues>
92572            </field>
92573            <field>
92574              <name>LK</name>
92575              <description>Lock Register</description>
92576              <bitOffset>15</bitOffset>
92577              <bitWidth>1</bitWidth>
92578              <access>read-write</access>
92579              <enumeratedValues>
92580                <enumeratedValue>
92581                  <name>0</name>
92582                  <description>Pin Control Register fields [15:0] are not locked.</description>
92583                  <value>#0</value>
92584                </enumeratedValue>
92585                <enumeratedValue>
92586                  <name>1</name>
92587                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
92588                  <value>#1</value>
92589                </enumeratedValue>
92590              </enumeratedValues>
92591            </field>
92592            <field>
92593              <name>IRQC</name>
92594              <description>Interrupt Configuration</description>
92595              <bitOffset>16</bitOffset>
92596              <bitWidth>4</bitWidth>
92597              <access>read-write</access>
92598              <enumeratedValues>
92599                <enumeratedValue>
92600                  <name>0000</name>
92601                  <description>Interrupt Status Flag (ISF) is disabled.</description>
92602                  <value>#0000</value>
92603                </enumeratedValue>
92604                <enumeratedValue>
92605                  <name>0001</name>
92606                  <description>ISF flag and DMA request on rising edge.</description>
92607                  <value>#0001</value>
92608                </enumeratedValue>
92609                <enumeratedValue>
92610                  <name>0010</name>
92611                  <description>ISF flag and DMA request on falling edge.</description>
92612                  <value>#0010</value>
92613                </enumeratedValue>
92614                <enumeratedValue>
92615                  <name>0011</name>
92616                  <description>ISF flag and DMA request on either edge.</description>
92617                  <value>#0011</value>
92618                </enumeratedValue>
92619                <enumeratedValue>
92620                  <name>1000</name>
92621                  <description>ISF flag and Interrupt when logic 0.</description>
92622                  <value>#1000</value>
92623                </enumeratedValue>
92624                <enumeratedValue>
92625                  <name>1001</name>
92626                  <description>ISF flag and Interrupt on rising-edge.</description>
92627                  <value>#1001</value>
92628                </enumeratedValue>
92629                <enumeratedValue>
92630                  <name>1010</name>
92631                  <description>ISF flag and Interrupt on falling-edge.</description>
92632                  <value>#1010</value>
92633                </enumeratedValue>
92634                <enumeratedValue>
92635                  <name>1011</name>
92636                  <description>ISF flag and Interrupt on either edge.</description>
92637                  <value>#1011</value>
92638                </enumeratedValue>
92639                <enumeratedValue>
92640                  <name>1100</name>
92641                  <description>ISF flag and Interrupt when logic 1.</description>
92642                  <value>#1100</value>
92643                </enumeratedValue>
92644              </enumeratedValues>
92645            </field>
92646            <field>
92647              <name>ISF</name>
92648              <description>Interrupt Status Flag</description>
92649              <bitOffset>24</bitOffset>
92650              <bitWidth>1</bitWidth>
92651              <access>read-write</access>
92652              <enumeratedValues>
92653                <enumeratedValue>
92654                  <name>0</name>
92655                  <description>Configured interrupt is not detected.</description>
92656                  <value>#0</value>
92657                </enumeratedValue>
92658                <enumeratedValue>
92659                  <name>1</name>
92660                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
92661                  <value>#1</value>
92662                </enumeratedValue>
92663              </enumeratedValues>
92664            </field>
92665          </fields>
92666        </register>
92667        <register>
92668          <name>PCR24</name>
92669          <description>Pin Control Register n</description>
92670          <addressOffset>0x60</addressOffset>
92671          <size>32</size>
92672          <access>read-write</access>
92673          <resetValue>0</resetValue>
92674          <resetMask>0xFFFFFFFF</resetMask>
92675          <fields>
92676            <field>
92677              <name>PS</name>
92678              <description>Pull Select</description>
92679              <bitOffset>0</bitOffset>
92680              <bitWidth>1</bitWidth>
92681              <access>read-only</access>
92682              <enumeratedValues>
92683                <enumeratedValue>
92684                  <name>0</name>
92685                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
92686                  <value>#0</value>
92687                </enumeratedValue>
92688                <enumeratedValue>
92689                  <name>1</name>
92690                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
92691                  <value>#1</value>
92692                </enumeratedValue>
92693              </enumeratedValues>
92694            </field>
92695            <field>
92696              <name>PE</name>
92697              <description>Pull Enable</description>
92698              <bitOffset>1</bitOffset>
92699              <bitWidth>1</bitWidth>
92700              <access>read-only</access>
92701              <enumeratedValues>
92702                <enumeratedValue>
92703                  <name>0</name>
92704                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
92705                  <value>#0</value>
92706                </enumeratedValue>
92707                <enumeratedValue>
92708                  <name>1</name>
92709                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
92710                  <value>#1</value>
92711                </enumeratedValue>
92712              </enumeratedValues>
92713            </field>
92714            <field>
92715              <name>SRE</name>
92716              <description>Slew Rate Enable</description>
92717              <bitOffset>2</bitOffset>
92718              <bitWidth>1</bitWidth>
92719              <access>read-only</access>
92720              <enumeratedValues>
92721                <enumeratedValue>
92722                  <name>0</name>
92723                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
92724                  <value>#0</value>
92725                </enumeratedValue>
92726                <enumeratedValue>
92727                  <name>1</name>
92728                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
92729                  <value>#1</value>
92730                </enumeratedValue>
92731              </enumeratedValues>
92732            </field>
92733            <field>
92734              <name>PFE</name>
92735              <description>Passive Filter Enable</description>
92736              <bitOffset>4</bitOffset>
92737              <bitWidth>1</bitWidth>
92738              <access>read-only</access>
92739              <enumeratedValues>
92740                <enumeratedValue>
92741                  <name>0</name>
92742                  <description>Passive input filter is disabled on the corresponding pin.</description>
92743                  <value>#0</value>
92744                </enumeratedValue>
92745                <enumeratedValue>
92746                  <name>1</name>
92747                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
92748                  <value>#1</value>
92749                </enumeratedValue>
92750              </enumeratedValues>
92751            </field>
92752            <field>
92753              <name>ODE</name>
92754              <description>Open Drain Enable</description>
92755              <bitOffset>5</bitOffset>
92756              <bitWidth>1</bitWidth>
92757              <access>read-only</access>
92758              <enumeratedValues>
92759                <enumeratedValue>
92760                  <name>0</name>
92761                  <description>Open drain output is disabled on the corresponding pin.</description>
92762                  <value>#0</value>
92763                </enumeratedValue>
92764                <enumeratedValue>
92765                  <name>1</name>
92766                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
92767                  <value>#1</value>
92768                </enumeratedValue>
92769              </enumeratedValues>
92770            </field>
92771            <field>
92772              <name>DSE</name>
92773              <description>Drive Strength Enable</description>
92774              <bitOffset>6</bitOffset>
92775              <bitWidth>1</bitWidth>
92776              <access>read-only</access>
92777              <enumeratedValues>
92778                <enumeratedValue>
92779                  <name>0</name>
92780                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
92781                  <value>#0</value>
92782                </enumeratedValue>
92783                <enumeratedValue>
92784                  <name>1</name>
92785                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
92786                  <value>#1</value>
92787                </enumeratedValue>
92788              </enumeratedValues>
92789            </field>
92790            <field>
92791              <name>MUX</name>
92792              <description>Pin Mux Control</description>
92793              <bitOffset>8</bitOffset>
92794              <bitWidth>3</bitWidth>
92795              <access>read-write</access>
92796              <enumeratedValues>
92797                <enumeratedValue>
92798                  <name>000</name>
92799                  <description>Pin disabled (Alternative 0) (analog).</description>
92800                  <value>#000</value>
92801                </enumeratedValue>
92802                <enumeratedValue>
92803                  <name>001</name>
92804                  <description>Alternative 1 (GPIO).</description>
92805                  <value>#001</value>
92806                </enumeratedValue>
92807                <enumeratedValue>
92808                  <name>010</name>
92809                  <description>Alternative 2 (chip-specific).</description>
92810                  <value>#010</value>
92811                </enumeratedValue>
92812                <enumeratedValue>
92813                  <name>011</name>
92814                  <description>Alternative 3 (chip-specific).</description>
92815                  <value>#011</value>
92816                </enumeratedValue>
92817                <enumeratedValue>
92818                  <name>100</name>
92819                  <description>Alternative 4 (chip-specific).</description>
92820                  <value>#100</value>
92821                </enumeratedValue>
92822                <enumeratedValue>
92823                  <name>101</name>
92824                  <description>Alternative 5 (chip-specific).</description>
92825                  <value>#101</value>
92826                </enumeratedValue>
92827                <enumeratedValue>
92828                  <name>110</name>
92829                  <description>Alternative 6 (chip-specific).</description>
92830                  <value>#110</value>
92831                </enumeratedValue>
92832                <enumeratedValue>
92833                  <name>111</name>
92834                  <description>Alternative 7 (chip-specific).</description>
92835                  <value>#111</value>
92836                </enumeratedValue>
92837              </enumeratedValues>
92838            </field>
92839            <field>
92840              <name>LK</name>
92841              <description>Lock Register</description>
92842              <bitOffset>15</bitOffset>
92843              <bitWidth>1</bitWidth>
92844              <access>read-write</access>
92845              <enumeratedValues>
92846                <enumeratedValue>
92847                  <name>0</name>
92848                  <description>Pin Control Register fields [15:0] are not locked.</description>
92849                  <value>#0</value>
92850                </enumeratedValue>
92851                <enumeratedValue>
92852                  <name>1</name>
92853                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
92854                  <value>#1</value>
92855                </enumeratedValue>
92856              </enumeratedValues>
92857            </field>
92858            <field>
92859              <name>IRQC</name>
92860              <description>Interrupt Configuration</description>
92861              <bitOffset>16</bitOffset>
92862              <bitWidth>4</bitWidth>
92863              <access>read-write</access>
92864              <enumeratedValues>
92865                <enumeratedValue>
92866                  <name>0000</name>
92867                  <description>Interrupt Status Flag (ISF) is disabled.</description>
92868                  <value>#0000</value>
92869                </enumeratedValue>
92870                <enumeratedValue>
92871                  <name>0001</name>
92872                  <description>ISF flag and DMA request on rising edge.</description>
92873                  <value>#0001</value>
92874                </enumeratedValue>
92875                <enumeratedValue>
92876                  <name>0010</name>
92877                  <description>ISF flag and DMA request on falling edge.</description>
92878                  <value>#0010</value>
92879                </enumeratedValue>
92880                <enumeratedValue>
92881                  <name>0011</name>
92882                  <description>ISF flag and DMA request on either edge.</description>
92883                  <value>#0011</value>
92884                </enumeratedValue>
92885                <enumeratedValue>
92886                  <name>1000</name>
92887                  <description>ISF flag and Interrupt when logic 0.</description>
92888                  <value>#1000</value>
92889                </enumeratedValue>
92890                <enumeratedValue>
92891                  <name>1001</name>
92892                  <description>ISF flag and Interrupt on rising-edge.</description>
92893                  <value>#1001</value>
92894                </enumeratedValue>
92895                <enumeratedValue>
92896                  <name>1010</name>
92897                  <description>ISF flag and Interrupt on falling-edge.</description>
92898                  <value>#1010</value>
92899                </enumeratedValue>
92900                <enumeratedValue>
92901                  <name>1011</name>
92902                  <description>ISF flag and Interrupt on either edge.</description>
92903                  <value>#1011</value>
92904                </enumeratedValue>
92905                <enumeratedValue>
92906                  <name>1100</name>
92907                  <description>ISF flag and Interrupt when logic 1.</description>
92908                  <value>#1100</value>
92909                </enumeratedValue>
92910              </enumeratedValues>
92911            </field>
92912            <field>
92913              <name>ISF</name>
92914              <description>Interrupt Status Flag</description>
92915              <bitOffset>24</bitOffset>
92916              <bitWidth>1</bitWidth>
92917              <access>read-write</access>
92918              <enumeratedValues>
92919                <enumeratedValue>
92920                  <name>0</name>
92921                  <description>Configured interrupt is not detected.</description>
92922                  <value>#0</value>
92923                </enumeratedValue>
92924                <enumeratedValue>
92925                  <name>1</name>
92926                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
92927                  <value>#1</value>
92928                </enumeratedValue>
92929              </enumeratedValues>
92930            </field>
92931          </fields>
92932        </register>
92933        <register>
92934          <name>PCR25</name>
92935          <description>Pin Control Register n</description>
92936          <addressOffset>0x64</addressOffset>
92937          <size>32</size>
92938          <access>read-write</access>
92939          <resetValue>0</resetValue>
92940          <resetMask>0xFFFFFFFF</resetMask>
92941          <fields>
92942            <field>
92943              <name>PS</name>
92944              <description>Pull Select</description>
92945              <bitOffset>0</bitOffset>
92946              <bitWidth>1</bitWidth>
92947              <access>read-only</access>
92948              <enumeratedValues>
92949                <enumeratedValue>
92950                  <name>0</name>
92951                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
92952                  <value>#0</value>
92953                </enumeratedValue>
92954                <enumeratedValue>
92955                  <name>1</name>
92956                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
92957                  <value>#1</value>
92958                </enumeratedValue>
92959              </enumeratedValues>
92960            </field>
92961            <field>
92962              <name>PE</name>
92963              <description>Pull Enable</description>
92964              <bitOffset>1</bitOffset>
92965              <bitWidth>1</bitWidth>
92966              <access>read-only</access>
92967              <enumeratedValues>
92968                <enumeratedValue>
92969                  <name>0</name>
92970                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
92971                  <value>#0</value>
92972                </enumeratedValue>
92973                <enumeratedValue>
92974                  <name>1</name>
92975                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
92976                  <value>#1</value>
92977                </enumeratedValue>
92978              </enumeratedValues>
92979            </field>
92980            <field>
92981              <name>SRE</name>
92982              <description>Slew Rate Enable</description>
92983              <bitOffset>2</bitOffset>
92984              <bitWidth>1</bitWidth>
92985              <access>read-only</access>
92986              <enumeratedValues>
92987                <enumeratedValue>
92988                  <name>0</name>
92989                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
92990                  <value>#0</value>
92991                </enumeratedValue>
92992                <enumeratedValue>
92993                  <name>1</name>
92994                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
92995                  <value>#1</value>
92996                </enumeratedValue>
92997              </enumeratedValues>
92998            </field>
92999            <field>
93000              <name>PFE</name>
93001              <description>Passive Filter Enable</description>
93002              <bitOffset>4</bitOffset>
93003              <bitWidth>1</bitWidth>
93004              <access>read-only</access>
93005              <enumeratedValues>
93006                <enumeratedValue>
93007                  <name>0</name>
93008                  <description>Passive input filter is disabled on the corresponding pin.</description>
93009                  <value>#0</value>
93010                </enumeratedValue>
93011                <enumeratedValue>
93012                  <name>1</name>
93013                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
93014                  <value>#1</value>
93015                </enumeratedValue>
93016              </enumeratedValues>
93017            </field>
93018            <field>
93019              <name>ODE</name>
93020              <description>Open Drain Enable</description>
93021              <bitOffset>5</bitOffset>
93022              <bitWidth>1</bitWidth>
93023              <access>read-only</access>
93024              <enumeratedValues>
93025                <enumeratedValue>
93026                  <name>0</name>
93027                  <description>Open drain output is disabled on the corresponding pin.</description>
93028                  <value>#0</value>
93029                </enumeratedValue>
93030                <enumeratedValue>
93031                  <name>1</name>
93032                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
93033                  <value>#1</value>
93034                </enumeratedValue>
93035              </enumeratedValues>
93036            </field>
93037            <field>
93038              <name>DSE</name>
93039              <description>Drive Strength Enable</description>
93040              <bitOffset>6</bitOffset>
93041              <bitWidth>1</bitWidth>
93042              <access>read-only</access>
93043              <enumeratedValues>
93044                <enumeratedValue>
93045                  <name>0</name>
93046                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
93047                  <value>#0</value>
93048                </enumeratedValue>
93049                <enumeratedValue>
93050                  <name>1</name>
93051                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
93052                  <value>#1</value>
93053                </enumeratedValue>
93054              </enumeratedValues>
93055            </field>
93056            <field>
93057              <name>MUX</name>
93058              <description>Pin Mux Control</description>
93059              <bitOffset>8</bitOffset>
93060              <bitWidth>3</bitWidth>
93061              <access>read-write</access>
93062              <enumeratedValues>
93063                <enumeratedValue>
93064                  <name>000</name>
93065                  <description>Pin disabled (Alternative 0) (analog).</description>
93066                  <value>#000</value>
93067                </enumeratedValue>
93068                <enumeratedValue>
93069                  <name>001</name>
93070                  <description>Alternative 1 (GPIO).</description>
93071                  <value>#001</value>
93072                </enumeratedValue>
93073                <enumeratedValue>
93074                  <name>010</name>
93075                  <description>Alternative 2 (chip-specific).</description>
93076                  <value>#010</value>
93077                </enumeratedValue>
93078                <enumeratedValue>
93079                  <name>011</name>
93080                  <description>Alternative 3 (chip-specific).</description>
93081                  <value>#011</value>
93082                </enumeratedValue>
93083                <enumeratedValue>
93084                  <name>100</name>
93085                  <description>Alternative 4 (chip-specific).</description>
93086                  <value>#100</value>
93087                </enumeratedValue>
93088                <enumeratedValue>
93089                  <name>101</name>
93090                  <description>Alternative 5 (chip-specific).</description>
93091                  <value>#101</value>
93092                </enumeratedValue>
93093                <enumeratedValue>
93094                  <name>110</name>
93095                  <description>Alternative 6 (chip-specific).</description>
93096                  <value>#110</value>
93097                </enumeratedValue>
93098                <enumeratedValue>
93099                  <name>111</name>
93100                  <description>Alternative 7 (chip-specific).</description>
93101                  <value>#111</value>
93102                </enumeratedValue>
93103              </enumeratedValues>
93104            </field>
93105            <field>
93106              <name>LK</name>
93107              <description>Lock Register</description>
93108              <bitOffset>15</bitOffset>
93109              <bitWidth>1</bitWidth>
93110              <access>read-write</access>
93111              <enumeratedValues>
93112                <enumeratedValue>
93113                  <name>0</name>
93114                  <description>Pin Control Register fields [15:0] are not locked.</description>
93115                  <value>#0</value>
93116                </enumeratedValue>
93117                <enumeratedValue>
93118                  <name>1</name>
93119                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
93120                  <value>#1</value>
93121                </enumeratedValue>
93122              </enumeratedValues>
93123            </field>
93124            <field>
93125              <name>IRQC</name>
93126              <description>Interrupt Configuration</description>
93127              <bitOffset>16</bitOffset>
93128              <bitWidth>4</bitWidth>
93129              <access>read-write</access>
93130              <enumeratedValues>
93131                <enumeratedValue>
93132                  <name>0000</name>
93133                  <description>Interrupt Status Flag (ISF) is disabled.</description>
93134                  <value>#0000</value>
93135                </enumeratedValue>
93136                <enumeratedValue>
93137                  <name>0001</name>
93138                  <description>ISF flag and DMA request on rising edge.</description>
93139                  <value>#0001</value>
93140                </enumeratedValue>
93141                <enumeratedValue>
93142                  <name>0010</name>
93143                  <description>ISF flag and DMA request on falling edge.</description>
93144                  <value>#0010</value>
93145                </enumeratedValue>
93146                <enumeratedValue>
93147                  <name>0011</name>
93148                  <description>ISF flag and DMA request on either edge.</description>
93149                  <value>#0011</value>
93150                </enumeratedValue>
93151                <enumeratedValue>
93152                  <name>1000</name>
93153                  <description>ISF flag and Interrupt when logic 0.</description>
93154                  <value>#1000</value>
93155                </enumeratedValue>
93156                <enumeratedValue>
93157                  <name>1001</name>
93158                  <description>ISF flag and Interrupt on rising-edge.</description>
93159                  <value>#1001</value>
93160                </enumeratedValue>
93161                <enumeratedValue>
93162                  <name>1010</name>
93163                  <description>ISF flag and Interrupt on falling-edge.</description>
93164                  <value>#1010</value>
93165                </enumeratedValue>
93166                <enumeratedValue>
93167                  <name>1011</name>
93168                  <description>ISF flag and Interrupt on either edge.</description>
93169                  <value>#1011</value>
93170                </enumeratedValue>
93171                <enumeratedValue>
93172                  <name>1100</name>
93173                  <description>ISF flag and Interrupt when logic 1.</description>
93174                  <value>#1100</value>
93175                </enumeratedValue>
93176              </enumeratedValues>
93177            </field>
93178            <field>
93179              <name>ISF</name>
93180              <description>Interrupt Status Flag</description>
93181              <bitOffset>24</bitOffset>
93182              <bitWidth>1</bitWidth>
93183              <access>read-write</access>
93184              <enumeratedValues>
93185                <enumeratedValue>
93186                  <name>0</name>
93187                  <description>Configured interrupt is not detected.</description>
93188                  <value>#0</value>
93189                </enumeratedValue>
93190                <enumeratedValue>
93191                  <name>1</name>
93192                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
93193                  <value>#1</value>
93194                </enumeratedValue>
93195              </enumeratedValues>
93196            </field>
93197          </fields>
93198        </register>
93199        <register>
93200          <name>PCR26</name>
93201          <description>Pin Control Register n</description>
93202          <addressOffset>0x68</addressOffset>
93203          <size>32</size>
93204          <access>read-write</access>
93205          <resetValue>0</resetValue>
93206          <resetMask>0xFFFFFFFF</resetMask>
93207          <fields>
93208            <field>
93209              <name>PS</name>
93210              <description>Pull Select</description>
93211              <bitOffset>0</bitOffset>
93212              <bitWidth>1</bitWidth>
93213              <access>read-only</access>
93214              <enumeratedValues>
93215                <enumeratedValue>
93216                  <name>0</name>
93217                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
93218                  <value>#0</value>
93219                </enumeratedValue>
93220                <enumeratedValue>
93221                  <name>1</name>
93222                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
93223                  <value>#1</value>
93224                </enumeratedValue>
93225              </enumeratedValues>
93226            </field>
93227            <field>
93228              <name>PE</name>
93229              <description>Pull Enable</description>
93230              <bitOffset>1</bitOffset>
93231              <bitWidth>1</bitWidth>
93232              <access>read-only</access>
93233              <enumeratedValues>
93234                <enumeratedValue>
93235                  <name>0</name>
93236                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
93237                  <value>#0</value>
93238                </enumeratedValue>
93239                <enumeratedValue>
93240                  <name>1</name>
93241                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
93242                  <value>#1</value>
93243                </enumeratedValue>
93244              </enumeratedValues>
93245            </field>
93246            <field>
93247              <name>SRE</name>
93248              <description>Slew Rate Enable</description>
93249              <bitOffset>2</bitOffset>
93250              <bitWidth>1</bitWidth>
93251              <access>read-only</access>
93252              <enumeratedValues>
93253                <enumeratedValue>
93254                  <name>0</name>
93255                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
93256                  <value>#0</value>
93257                </enumeratedValue>
93258                <enumeratedValue>
93259                  <name>1</name>
93260                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
93261                  <value>#1</value>
93262                </enumeratedValue>
93263              </enumeratedValues>
93264            </field>
93265            <field>
93266              <name>PFE</name>
93267              <description>Passive Filter Enable</description>
93268              <bitOffset>4</bitOffset>
93269              <bitWidth>1</bitWidth>
93270              <access>read-only</access>
93271              <enumeratedValues>
93272                <enumeratedValue>
93273                  <name>0</name>
93274                  <description>Passive input filter is disabled on the corresponding pin.</description>
93275                  <value>#0</value>
93276                </enumeratedValue>
93277                <enumeratedValue>
93278                  <name>1</name>
93279                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
93280                  <value>#1</value>
93281                </enumeratedValue>
93282              </enumeratedValues>
93283            </field>
93284            <field>
93285              <name>ODE</name>
93286              <description>Open Drain Enable</description>
93287              <bitOffset>5</bitOffset>
93288              <bitWidth>1</bitWidth>
93289              <access>read-only</access>
93290              <enumeratedValues>
93291                <enumeratedValue>
93292                  <name>0</name>
93293                  <description>Open drain output is disabled on the corresponding pin.</description>
93294                  <value>#0</value>
93295                </enumeratedValue>
93296                <enumeratedValue>
93297                  <name>1</name>
93298                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
93299                  <value>#1</value>
93300                </enumeratedValue>
93301              </enumeratedValues>
93302            </field>
93303            <field>
93304              <name>DSE</name>
93305              <description>Drive Strength Enable</description>
93306              <bitOffset>6</bitOffset>
93307              <bitWidth>1</bitWidth>
93308              <access>read-only</access>
93309              <enumeratedValues>
93310                <enumeratedValue>
93311                  <name>0</name>
93312                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
93313                  <value>#0</value>
93314                </enumeratedValue>
93315                <enumeratedValue>
93316                  <name>1</name>
93317                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
93318                  <value>#1</value>
93319                </enumeratedValue>
93320              </enumeratedValues>
93321            </field>
93322            <field>
93323              <name>MUX</name>
93324              <description>Pin Mux Control</description>
93325              <bitOffset>8</bitOffset>
93326              <bitWidth>3</bitWidth>
93327              <access>read-write</access>
93328              <enumeratedValues>
93329                <enumeratedValue>
93330                  <name>000</name>
93331                  <description>Pin disabled (Alternative 0) (analog).</description>
93332                  <value>#000</value>
93333                </enumeratedValue>
93334                <enumeratedValue>
93335                  <name>001</name>
93336                  <description>Alternative 1 (GPIO).</description>
93337                  <value>#001</value>
93338                </enumeratedValue>
93339                <enumeratedValue>
93340                  <name>010</name>
93341                  <description>Alternative 2 (chip-specific).</description>
93342                  <value>#010</value>
93343                </enumeratedValue>
93344                <enumeratedValue>
93345                  <name>011</name>
93346                  <description>Alternative 3 (chip-specific).</description>
93347                  <value>#011</value>
93348                </enumeratedValue>
93349                <enumeratedValue>
93350                  <name>100</name>
93351                  <description>Alternative 4 (chip-specific).</description>
93352                  <value>#100</value>
93353                </enumeratedValue>
93354                <enumeratedValue>
93355                  <name>101</name>
93356                  <description>Alternative 5 (chip-specific).</description>
93357                  <value>#101</value>
93358                </enumeratedValue>
93359                <enumeratedValue>
93360                  <name>110</name>
93361                  <description>Alternative 6 (chip-specific).</description>
93362                  <value>#110</value>
93363                </enumeratedValue>
93364                <enumeratedValue>
93365                  <name>111</name>
93366                  <description>Alternative 7 (chip-specific).</description>
93367                  <value>#111</value>
93368                </enumeratedValue>
93369              </enumeratedValues>
93370            </field>
93371            <field>
93372              <name>LK</name>
93373              <description>Lock Register</description>
93374              <bitOffset>15</bitOffset>
93375              <bitWidth>1</bitWidth>
93376              <access>read-write</access>
93377              <enumeratedValues>
93378                <enumeratedValue>
93379                  <name>0</name>
93380                  <description>Pin Control Register fields [15:0] are not locked.</description>
93381                  <value>#0</value>
93382                </enumeratedValue>
93383                <enumeratedValue>
93384                  <name>1</name>
93385                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
93386                  <value>#1</value>
93387                </enumeratedValue>
93388              </enumeratedValues>
93389            </field>
93390            <field>
93391              <name>IRQC</name>
93392              <description>Interrupt Configuration</description>
93393              <bitOffset>16</bitOffset>
93394              <bitWidth>4</bitWidth>
93395              <access>read-write</access>
93396              <enumeratedValues>
93397                <enumeratedValue>
93398                  <name>0000</name>
93399                  <description>Interrupt Status Flag (ISF) is disabled.</description>
93400                  <value>#0000</value>
93401                </enumeratedValue>
93402                <enumeratedValue>
93403                  <name>0001</name>
93404                  <description>ISF flag and DMA request on rising edge.</description>
93405                  <value>#0001</value>
93406                </enumeratedValue>
93407                <enumeratedValue>
93408                  <name>0010</name>
93409                  <description>ISF flag and DMA request on falling edge.</description>
93410                  <value>#0010</value>
93411                </enumeratedValue>
93412                <enumeratedValue>
93413                  <name>0011</name>
93414                  <description>ISF flag and DMA request on either edge.</description>
93415                  <value>#0011</value>
93416                </enumeratedValue>
93417                <enumeratedValue>
93418                  <name>1000</name>
93419                  <description>ISF flag and Interrupt when logic 0.</description>
93420                  <value>#1000</value>
93421                </enumeratedValue>
93422                <enumeratedValue>
93423                  <name>1001</name>
93424                  <description>ISF flag and Interrupt on rising-edge.</description>
93425                  <value>#1001</value>
93426                </enumeratedValue>
93427                <enumeratedValue>
93428                  <name>1010</name>
93429                  <description>ISF flag and Interrupt on falling-edge.</description>
93430                  <value>#1010</value>
93431                </enumeratedValue>
93432                <enumeratedValue>
93433                  <name>1011</name>
93434                  <description>ISF flag and Interrupt on either edge.</description>
93435                  <value>#1011</value>
93436                </enumeratedValue>
93437                <enumeratedValue>
93438                  <name>1100</name>
93439                  <description>ISF flag and Interrupt when logic 1.</description>
93440                  <value>#1100</value>
93441                </enumeratedValue>
93442              </enumeratedValues>
93443            </field>
93444            <field>
93445              <name>ISF</name>
93446              <description>Interrupt Status Flag</description>
93447              <bitOffset>24</bitOffset>
93448              <bitWidth>1</bitWidth>
93449              <access>read-write</access>
93450              <enumeratedValues>
93451                <enumeratedValue>
93452                  <name>0</name>
93453                  <description>Configured interrupt is not detected.</description>
93454                  <value>#0</value>
93455                </enumeratedValue>
93456                <enumeratedValue>
93457                  <name>1</name>
93458                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
93459                  <value>#1</value>
93460                </enumeratedValue>
93461              </enumeratedValues>
93462            </field>
93463          </fields>
93464        </register>
93465        <register>
93466          <name>PCR27</name>
93467          <description>Pin Control Register n</description>
93468          <addressOffset>0x6C</addressOffset>
93469          <size>32</size>
93470          <access>read-write</access>
93471          <resetValue>0</resetValue>
93472          <resetMask>0xFFFFFFFF</resetMask>
93473          <fields>
93474            <field>
93475              <name>PS</name>
93476              <description>Pull Select</description>
93477              <bitOffset>0</bitOffset>
93478              <bitWidth>1</bitWidth>
93479              <access>read-only</access>
93480              <enumeratedValues>
93481                <enumeratedValue>
93482                  <name>0</name>
93483                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
93484                  <value>#0</value>
93485                </enumeratedValue>
93486                <enumeratedValue>
93487                  <name>1</name>
93488                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
93489                  <value>#1</value>
93490                </enumeratedValue>
93491              </enumeratedValues>
93492            </field>
93493            <field>
93494              <name>PE</name>
93495              <description>Pull Enable</description>
93496              <bitOffset>1</bitOffset>
93497              <bitWidth>1</bitWidth>
93498              <access>read-only</access>
93499              <enumeratedValues>
93500                <enumeratedValue>
93501                  <name>0</name>
93502                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
93503                  <value>#0</value>
93504                </enumeratedValue>
93505                <enumeratedValue>
93506                  <name>1</name>
93507                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
93508                  <value>#1</value>
93509                </enumeratedValue>
93510              </enumeratedValues>
93511            </field>
93512            <field>
93513              <name>SRE</name>
93514              <description>Slew Rate Enable</description>
93515              <bitOffset>2</bitOffset>
93516              <bitWidth>1</bitWidth>
93517              <access>read-only</access>
93518              <enumeratedValues>
93519                <enumeratedValue>
93520                  <name>0</name>
93521                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
93522                  <value>#0</value>
93523                </enumeratedValue>
93524                <enumeratedValue>
93525                  <name>1</name>
93526                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
93527                  <value>#1</value>
93528                </enumeratedValue>
93529              </enumeratedValues>
93530            </field>
93531            <field>
93532              <name>PFE</name>
93533              <description>Passive Filter Enable</description>
93534              <bitOffset>4</bitOffset>
93535              <bitWidth>1</bitWidth>
93536              <access>read-only</access>
93537              <enumeratedValues>
93538                <enumeratedValue>
93539                  <name>0</name>
93540                  <description>Passive input filter is disabled on the corresponding pin.</description>
93541                  <value>#0</value>
93542                </enumeratedValue>
93543                <enumeratedValue>
93544                  <name>1</name>
93545                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
93546                  <value>#1</value>
93547                </enumeratedValue>
93548              </enumeratedValues>
93549            </field>
93550            <field>
93551              <name>ODE</name>
93552              <description>Open Drain Enable</description>
93553              <bitOffset>5</bitOffset>
93554              <bitWidth>1</bitWidth>
93555              <access>read-only</access>
93556              <enumeratedValues>
93557                <enumeratedValue>
93558                  <name>0</name>
93559                  <description>Open drain output is disabled on the corresponding pin.</description>
93560                  <value>#0</value>
93561                </enumeratedValue>
93562                <enumeratedValue>
93563                  <name>1</name>
93564                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
93565                  <value>#1</value>
93566                </enumeratedValue>
93567              </enumeratedValues>
93568            </field>
93569            <field>
93570              <name>DSE</name>
93571              <description>Drive Strength Enable</description>
93572              <bitOffset>6</bitOffset>
93573              <bitWidth>1</bitWidth>
93574              <access>read-only</access>
93575              <enumeratedValues>
93576                <enumeratedValue>
93577                  <name>0</name>
93578                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
93579                  <value>#0</value>
93580                </enumeratedValue>
93581                <enumeratedValue>
93582                  <name>1</name>
93583                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
93584                  <value>#1</value>
93585                </enumeratedValue>
93586              </enumeratedValues>
93587            </field>
93588            <field>
93589              <name>MUX</name>
93590              <description>Pin Mux Control</description>
93591              <bitOffset>8</bitOffset>
93592              <bitWidth>3</bitWidth>
93593              <access>read-write</access>
93594              <enumeratedValues>
93595                <enumeratedValue>
93596                  <name>000</name>
93597                  <description>Pin disabled (Alternative 0) (analog).</description>
93598                  <value>#000</value>
93599                </enumeratedValue>
93600                <enumeratedValue>
93601                  <name>001</name>
93602                  <description>Alternative 1 (GPIO).</description>
93603                  <value>#001</value>
93604                </enumeratedValue>
93605                <enumeratedValue>
93606                  <name>010</name>
93607                  <description>Alternative 2 (chip-specific).</description>
93608                  <value>#010</value>
93609                </enumeratedValue>
93610                <enumeratedValue>
93611                  <name>011</name>
93612                  <description>Alternative 3 (chip-specific).</description>
93613                  <value>#011</value>
93614                </enumeratedValue>
93615                <enumeratedValue>
93616                  <name>100</name>
93617                  <description>Alternative 4 (chip-specific).</description>
93618                  <value>#100</value>
93619                </enumeratedValue>
93620                <enumeratedValue>
93621                  <name>101</name>
93622                  <description>Alternative 5 (chip-specific).</description>
93623                  <value>#101</value>
93624                </enumeratedValue>
93625                <enumeratedValue>
93626                  <name>110</name>
93627                  <description>Alternative 6 (chip-specific).</description>
93628                  <value>#110</value>
93629                </enumeratedValue>
93630                <enumeratedValue>
93631                  <name>111</name>
93632                  <description>Alternative 7 (chip-specific).</description>
93633                  <value>#111</value>
93634                </enumeratedValue>
93635              </enumeratedValues>
93636            </field>
93637            <field>
93638              <name>LK</name>
93639              <description>Lock Register</description>
93640              <bitOffset>15</bitOffset>
93641              <bitWidth>1</bitWidth>
93642              <access>read-write</access>
93643              <enumeratedValues>
93644                <enumeratedValue>
93645                  <name>0</name>
93646                  <description>Pin Control Register fields [15:0] are not locked.</description>
93647                  <value>#0</value>
93648                </enumeratedValue>
93649                <enumeratedValue>
93650                  <name>1</name>
93651                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
93652                  <value>#1</value>
93653                </enumeratedValue>
93654              </enumeratedValues>
93655            </field>
93656            <field>
93657              <name>IRQC</name>
93658              <description>Interrupt Configuration</description>
93659              <bitOffset>16</bitOffset>
93660              <bitWidth>4</bitWidth>
93661              <access>read-write</access>
93662              <enumeratedValues>
93663                <enumeratedValue>
93664                  <name>0000</name>
93665                  <description>Interrupt Status Flag (ISF) is disabled.</description>
93666                  <value>#0000</value>
93667                </enumeratedValue>
93668                <enumeratedValue>
93669                  <name>0001</name>
93670                  <description>ISF flag and DMA request on rising edge.</description>
93671                  <value>#0001</value>
93672                </enumeratedValue>
93673                <enumeratedValue>
93674                  <name>0010</name>
93675                  <description>ISF flag and DMA request on falling edge.</description>
93676                  <value>#0010</value>
93677                </enumeratedValue>
93678                <enumeratedValue>
93679                  <name>0011</name>
93680                  <description>ISF flag and DMA request on either edge.</description>
93681                  <value>#0011</value>
93682                </enumeratedValue>
93683                <enumeratedValue>
93684                  <name>1000</name>
93685                  <description>ISF flag and Interrupt when logic 0.</description>
93686                  <value>#1000</value>
93687                </enumeratedValue>
93688                <enumeratedValue>
93689                  <name>1001</name>
93690                  <description>ISF flag and Interrupt on rising-edge.</description>
93691                  <value>#1001</value>
93692                </enumeratedValue>
93693                <enumeratedValue>
93694                  <name>1010</name>
93695                  <description>ISF flag and Interrupt on falling-edge.</description>
93696                  <value>#1010</value>
93697                </enumeratedValue>
93698                <enumeratedValue>
93699                  <name>1011</name>
93700                  <description>ISF flag and Interrupt on either edge.</description>
93701                  <value>#1011</value>
93702                </enumeratedValue>
93703                <enumeratedValue>
93704                  <name>1100</name>
93705                  <description>ISF flag and Interrupt when logic 1.</description>
93706                  <value>#1100</value>
93707                </enumeratedValue>
93708              </enumeratedValues>
93709            </field>
93710            <field>
93711              <name>ISF</name>
93712              <description>Interrupt Status Flag</description>
93713              <bitOffset>24</bitOffset>
93714              <bitWidth>1</bitWidth>
93715              <access>read-write</access>
93716              <enumeratedValues>
93717                <enumeratedValue>
93718                  <name>0</name>
93719                  <description>Configured interrupt is not detected.</description>
93720                  <value>#0</value>
93721                </enumeratedValue>
93722                <enumeratedValue>
93723                  <name>1</name>
93724                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
93725                  <value>#1</value>
93726                </enumeratedValue>
93727              </enumeratedValues>
93728            </field>
93729          </fields>
93730        </register>
93731        <register>
93732          <name>PCR28</name>
93733          <description>Pin Control Register n</description>
93734          <addressOffset>0x70</addressOffset>
93735          <size>32</size>
93736          <access>read-write</access>
93737          <resetValue>0</resetValue>
93738          <resetMask>0xFFFFFFFF</resetMask>
93739          <fields>
93740            <field>
93741              <name>PS</name>
93742              <description>Pull Select</description>
93743              <bitOffset>0</bitOffset>
93744              <bitWidth>1</bitWidth>
93745              <access>read-only</access>
93746              <enumeratedValues>
93747                <enumeratedValue>
93748                  <name>0</name>
93749                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
93750                  <value>#0</value>
93751                </enumeratedValue>
93752                <enumeratedValue>
93753                  <name>1</name>
93754                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
93755                  <value>#1</value>
93756                </enumeratedValue>
93757              </enumeratedValues>
93758            </field>
93759            <field>
93760              <name>PE</name>
93761              <description>Pull Enable</description>
93762              <bitOffset>1</bitOffset>
93763              <bitWidth>1</bitWidth>
93764              <access>read-only</access>
93765              <enumeratedValues>
93766                <enumeratedValue>
93767                  <name>0</name>
93768                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
93769                  <value>#0</value>
93770                </enumeratedValue>
93771                <enumeratedValue>
93772                  <name>1</name>
93773                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
93774                  <value>#1</value>
93775                </enumeratedValue>
93776              </enumeratedValues>
93777            </field>
93778            <field>
93779              <name>SRE</name>
93780              <description>Slew Rate Enable</description>
93781              <bitOffset>2</bitOffset>
93782              <bitWidth>1</bitWidth>
93783              <access>read-only</access>
93784              <enumeratedValues>
93785                <enumeratedValue>
93786                  <name>0</name>
93787                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
93788                  <value>#0</value>
93789                </enumeratedValue>
93790                <enumeratedValue>
93791                  <name>1</name>
93792                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
93793                  <value>#1</value>
93794                </enumeratedValue>
93795              </enumeratedValues>
93796            </field>
93797            <field>
93798              <name>PFE</name>
93799              <description>Passive Filter Enable</description>
93800              <bitOffset>4</bitOffset>
93801              <bitWidth>1</bitWidth>
93802              <access>read-only</access>
93803              <enumeratedValues>
93804                <enumeratedValue>
93805                  <name>0</name>
93806                  <description>Passive input filter is disabled on the corresponding pin.</description>
93807                  <value>#0</value>
93808                </enumeratedValue>
93809                <enumeratedValue>
93810                  <name>1</name>
93811                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
93812                  <value>#1</value>
93813                </enumeratedValue>
93814              </enumeratedValues>
93815            </field>
93816            <field>
93817              <name>ODE</name>
93818              <description>Open Drain Enable</description>
93819              <bitOffset>5</bitOffset>
93820              <bitWidth>1</bitWidth>
93821              <access>read-only</access>
93822              <enumeratedValues>
93823                <enumeratedValue>
93824                  <name>0</name>
93825                  <description>Open drain output is disabled on the corresponding pin.</description>
93826                  <value>#0</value>
93827                </enumeratedValue>
93828                <enumeratedValue>
93829                  <name>1</name>
93830                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
93831                  <value>#1</value>
93832                </enumeratedValue>
93833              </enumeratedValues>
93834            </field>
93835            <field>
93836              <name>DSE</name>
93837              <description>Drive Strength Enable</description>
93838              <bitOffset>6</bitOffset>
93839              <bitWidth>1</bitWidth>
93840              <access>read-only</access>
93841              <enumeratedValues>
93842                <enumeratedValue>
93843                  <name>0</name>
93844                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
93845                  <value>#0</value>
93846                </enumeratedValue>
93847                <enumeratedValue>
93848                  <name>1</name>
93849                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
93850                  <value>#1</value>
93851                </enumeratedValue>
93852              </enumeratedValues>
93853            </field>
93854            <field>
93855              <name>MUX</name>
93856              <description>Pin Mux Control</description>
93857              <bitOffset>8</bitOffset>
93858              <bitWidth>3</bitWidth>
93859              <access>read-write</access>
93860              <enumeratedValues>
93861                <enumeratedValue>
93862                  <name>000</name>
93863                  <description>Pin disabled (Alternative 0) (analog).</description>
93864                  <value>#000</value>
93865                </enumeratedValue>
93866                <enumeratedValue>
93867                  <name>001</name>
93868                  <description>Alternative 1 (GPIO).</description>
93869                  <value>#001</value>
93870                </enumeratedValue>
93871                <enumeratedValue>
93872                  <name>010</name>
93873                  <description>Alternative 2 (chip-specific).</description>
93874                  <value>#010</value>
93875                </enumeratedValue>
93876                <enumeratedValue>
93877                  <name>011</name>
93878                  <description>Alternative 3 (chip-specific).</description>
93879                  <value>#011</value>
93880                </enumeratedValue>
93881                <enumeratedValue>
93882                  <name>100</name>
93883                  <description>Alternative 4 (chip-specific).</description>
93884                  <value>#100</value>
93885                </enumeratedValue>
93886                <enumeratedValue>
93887                  <name>101</name>
93888                  <description>Alternative 5 (chip-specific).</description>
93889                  <value>#101</value>
93890                </enumeratedValue>
93891                <enumeratedValue>
93892                  <name>110</name>
93893                  <description>Alternative 6 (chip-specific).</description>
93894                  <value>#110</value>
93895                </enumeratedValue>
93896                <enumeratedValue>
93897                  <name>111</name>
93898                  <description>Alternative 7 (chip-specific).</description>
93899                  <value>#111</value>
93900                </enumeratedValue>
93901              </enumeratedValues>
93902            </field>
93903            <field>
93904              <name>LK</name>
93905              <description>Lock Register</description>
93906              <bitOffset>15</bitOffset>
93907              <bitWidth>1</bitWidth>
93908              <access>read-write</access>
93909              <enumeratedValues>
93910                <enumeratedValue>
93911                  <name>0</name>
93912                  <description>Pin Control Register fields [15:0] are not locked.</description>
93913                  <value>#0</value>
93914                </enumeratedValue>
93915                <enumeratedValue>
93916                  <name>1</name>
93917                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
93918                  <value>#1</value>
93919                </enumeratedValue>
93920              </enumeratedValues>
93921            </field>
93922            <field>
93923              <name>IRQC</name>
93924              <description>Interrupt Configuration</description>
93925              <bitOffset>16</bitOffset>
93926              <bitWidth>4</bitWidth>
93927              <access>read-write</access>
93928              <enumeratedValues>
93929                <enumeratedValue>
93930                  <name>0000</name>
93931                  <description>Interrupt Status Flag (ISF) is disabled.</description>
93932                  <value>#0000</value>
93933                </enumeratedValue>
93934                <enumeratedValue>
93935                  <name>0001</name>
93936                  <description>ISF flag and DMA request on rising edge.</description>
93937                  <value>#0001</value>
93938                </enumeratedValue>
93939                <enumeratedValue>
93940                  <name>0010</name>
93941                  <description>ISF flag and DMA request on falling edge.</description>
93942                  <value>#0010</value>
93943                </enumeratedValue>
93944                <enumeratedValue>
93945                  <name>0011</name>
93946                  <description>ISF flag and DMA request on either edge.</description>
93947                  <value>#0011</value>
93948                </enumeratedValue>
93949                <enumeratedValue>
93950                  <name>1000</name>
93951                  <description>ISF flag and Interrupt when logic 0.</description>
93952                  <value>#1000</value>
93953                </enumeratedValue>
93954                <enumeratedValue>
93955                  <name>1001</name>
93956                  <description>ISF flag and Interrupt on rising-edge.</description>
93957                  <value>#1001</value>
93958                </enumeratedValue>
93959                <enumeratedValue>
93960                  <name>1010</name>
93961                  <description>ISF flag and Interrupt on falling-edge.</description>
93962                  <value>#1010</value>
93963                </enumeratedValue>
93964                <enumeratedValue>
93965                  <name>1011</name>
93966                  <description>ISF flag and Interrupt on either edge.</description>
93967                  <value>#1011</value>
93968                </enumeratedValue>
93969                <enumeratedValue>
93970                  <name>1100</name>
93971                  <description>ISF flag and Interrupt when logic 1.</description>
93972                  <value>#1100</value>
93973                </enumeratedValue>
93974              </enumeratedValues>
93975            </field>
93976            <field>
93977              <name>ISF</name>
93978              <description>Interrupt Status Flag</description>
93979              <bitOffset>24</bitOffset>
93980              <bitWidth>1</bitWidth>
93981              <access>read-write</access>
93982              <enumeratedValues>
93983                <enumeratedValue>
93984                  <name>0</name>
93985                  <description>Configured interrupt is not detected.</description>
93986                  <value>#0</value>
93987                </enumeratedValue>
93988                <enumeratedValue>
93989                  <name>1</name>
93990                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
93991                  <value>#1</value>
93992                </enumeratedValue>
93993              </enumeratedValues>
93994            </field>
93995          </fields>
93996        </register>
93997        <register>
93998          <name>PCR29</name>
93999          <description>Pin Control Register n</description>
94000          <addressOffset>0x74</addressOffset>
94001          <size>32</size>
94002          <access>read-write</access>
94003          <resetValue>0</resetValue>
94004          <resetMask>0xFFFFFFFF</resetMask>
94005          <fields>
94006            <field>
94007              <name>PS</name>
94008              <description>Pull Select</description>
94009              <bitOffset>0</bitOffset>
94010              <bitWidth>1</bitWidth>
94011              <access>read-only</access>
94012              <enumeratedValues>
94013                <enumeratedValue>
94014                  <name>0</name>
94015                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
94016                  <value>#0</value>
94017                </enumeratedValue>
94018                <enumeratedValue>
94019                  <name>1</name>
94020                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
94021                  <value>#1</value>
94022                </enumeratedValue>
94023              </enumeratedValues>
94024            </field>
94025            <field>
94026              <name>PE</name>
94027              <description>Pull Enable</description>
94028              <bitOffset>1</bitOffset>
94029              <bitWidth>1</bitWidth>
94030              <access>read-only</access>
94031              <enumeratedValues>
94032                <enumeratedValue>
94033                  <name>0</name>
94034                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
94035                  <value>#0</value>
94036                </enumeratedValue>
94037                <enumeratedValue>
94038                  <name>1</name>
94039                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
94040                  <value>#1</value>
94041                </enumeratedValue>
94042              </enumeratedValues>
94043            </field>
94044            <field>
94045              <name>SRE</name>
94046              <description>Slew Rate Enable</description>
94047              <bitOffset>2</bitOffset>
94048              <bitWidth>1</bitWidth>
94049              <access>read-only</access>
94050              <enumeratedValues>
94051                <enumeratedValue>
94052                  <name>0</name>
94053                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
94054                  <value>#0</value>
94055                </enumeratedValue>
94056                <enumeratedValue>
94057                  <name>1</name>
94058                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
94059                  <value>#1</value>
94060                </enumeratedValue>
94061              </enumeratedValues>
94062            </field>
94063            <field>
94064              <name>PFE</name>
94065              <description>Passive Filter Enable</description>
94066              <bitOffset>4</bitOffset>
94067              <bitWidth>1</bitWidth>
94068              <access>read-only</access>
94069              <enumeratedValues>
94070                <enumeratedValue>
94071                  <name>0</name>
94072                  <description>Passive input filter is disabled on the corresponding pin.</description>
94073                  <value>#0</value>
94074                </enumeratedValue>
94075                <enumeratedValue>
94076                  <name>1</name>
94077                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
94078                  <value>#1</value>
94079                </enumeratedValue>
94080              </enumeratedValues>
94081            </field>
94082            <field>
94083              <name>ODE</name>
94084              <description>Open Drain Enable</description>
94085              <bitOffset>5</bitOffset>
94086              <bitWidth>1</bitWidth>
94087              <access>read-only</access>
94088              <enumeratedValues>
94089                <enumeratedValue>
94090                  <name>0</name>
94091                  <description>Open drain output is disabled on the corresponding pin.</description>
94092                  <value>#0</value>
94093                </enumeratedValue>
94094                <enumeratedValue>
94095                  <name>1</name>
94096                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
94097                  <value>#1</value>
94098                </enumeratedValue>
94099              </enumeratedValues>
94100            </field>
94101            <field>
94102              <name>DSE</name>
94103              <description>Drive Strength Enable</description>
94104              <bitOffset>6</bitOffset>
94105              <bitWidth>1</bitWidth>
94106              <access>read-only</access>
94107              <enumeratedValues>
94108                <enumeratedValue>
94109                  <name>0</name>
94110                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
94111                  <value>#0</value>
94112                </enumeratedValue>
94113                <enumeratedValue>
94114                  <name>1</name>
94115                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
94116                  <value>#1</value>
94117                </enumeratedValue>
94118              </enumeratedValues>
94119            </field>
94120            <field>
94121              <name>MUX</name>
94122              <description>Pin Mux Control</description>
94123              <bitOffset>8</bitOffset>
94124              <bitWidth>3</bitWidth>
94125              <access>read-write</access>
94126              <enumeratedValues>
94127                <enumeratedValue>
94128                  <name>000</name>
94129                  <description>Pin disabled (Alternative 0) (analog).</description>
94130                  <value>#000</value>
94131                </enumeratedValue>
94132                <enumeratedValue>
94133                  <name>001</name>
94134                  <description>Alternative 1 (GPIO).</description>
94135                  <value>#001</value>
94136                </enumeratedValue>
94137                <enumeratedValue>
94138                  <name>010</name>
94139                  <description>Alternative 2 (chip-specific).</description>
94140                  <value>#010</value>
94141                </enumeratedValue>
94142                <enumeratedValue>
94143                  <name>011</name>
94144                  <description>Alternative 3 (chip-specific).</description>
94145                  <value>#011</value>
94146                </enumeratedValue>
94147                <enumeratedValue>
94148                  <name>100</name>
94149                  <description>Alternative 4 (chip-specific).</description>
94150                  <value>#100</value>
94151                </enumeratedValue>
94152                <enumeratedValue>
94153                  <name>101</name>
94154                  <description>Alternative 5 (chip-specific).</description>
94155                  <value>#101</value>
94156                </enumeratedValue>
94157                <enumeratedValue>
94158                  <name>110</name>
94159                  <description>Alternative 6 (chip-specific).</description>
94160                  <value>#110</value>
94161                </enumeratedValue>
94162                <enumeratedValue>
94163                  <name>111</name>
94164                  <description>Alternative 7 (chip-specific).</description>
94165                  <value>#111</value>
94166                </enumeratedValue>
94167              </enumeratedValues>
94168            </field>
94169            <field>
94170              <name>LK</name>
94171              <description>Lock Register</description>
94172              <bitOffset>15</bitOffset>
94173              <bitWidth>1</bitWidth>
94174              <access>read-write</access>
94175              <enumeratedValues>
94176                <enumeratedValue>
94177                  <name>0</name>
94178                  <description>Pin Control Register fields [15:0] are not locked.</description>
94179                  <value>#0</value>
94180                </enumeratedValue>
94181                <enumeratedValue>
94182                  <name>1</name>
94183                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
94184                  <value>#1</value>
94185                </enumeratedValue>
94186              </enumeratedValues>
94187            </field>
94188            <field>
94189              <name>IRQC</name>
94190              <description>Interrupt Configuration</description>
94191              <bitOffset>16</bitOffset>
94192              <bitWidth>4</bitWidth>
94193              <access>read-write</access>
94194              <enumeratedValues>
94195                <enumeratedValue>
94196                  <name>0000</name>
94197                  <description>Interrupt Status Flag (ISF) is disabled.</description>
94198                  <value>#0000</value>
94199                </enumeratedValue>
94200                <enumeratedValue>
94201                  <name>0001</name>
94202                  <description>ISF flag and DMA request on rising edge.</description>
94203                  <value>#0001</value>
94204                </enumeratedValue>
94205                <enumeratedValue>
94206                  <name>0010</name>
94207                  <description>ISF flag and DMA request on falling edge.</description>
94208                  <value>#0010</value>
94209                </enumeratedValue>
94210                <enumeratedValue>
94211                  <name>0011</name>
94212                  <description>ISF flag and DMA request on either edge.</description>
94213                  <value>#0011</value>
94214                </enumeratedValue>
94215                <enumeratedValue>
94216                  <name>1000</name>
94217                  <description>ISF flag and Interrupt when logic 0.</description>
94218                  <value>#1000</value>
94219                </enumeratedValue>
94220                <enumeratedValue>
94221                  <name>1001</name>
94222                  <description>ISF flag and Interrupt on rising-edge.</description>
94223                  <value>#1001</value>
94224                </enumeratedValue>
94225                <enumeratedValue>
94226                  <name>1010</name>
94227                  <description>ISF flag and Interrupt on falling-edge.</description>
94228                  <value>#1010</value>
94229                </enumeratedValue>
94230                <enumeratedValue>
94231                  <name>1011</name>
94232                  <description>ISF flag and Interrupt on either edge.</description>
94233                  <value>#1011</value>
94234                </enumeratedValue>
94235                <enumeratedValue>
94236                  <name>1100</name>
94237                  <description>ISF flag and Interrupt when logic 1.</description>
94238                  <value>#1100</value>
94239                </enumeratedValue>
94240              </enumeratedValues>
94241            </field>
94242            <field>
94243              <name>ISF</name>
94244              <description>Interrupt Status Flag</description>
94245              <bitOffset>24</bitOffset>
94246              <bitWidth>1</bitWidth>
94247              <access>read-write</access>
94248              <enumeratedValues>
94249                <enumeratedValue>
94250                  <name>0</name>
94251                  <description>Configured interrupt is not detected.</description>
94252                  <value>#0</value>
94253                </enumeratedValue>
94254                <enumeratedValue>
94255                  <name>1</name>
94256                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
94257                  <value>#1</value>
94258                </enumeratedValue>
94259              </enumeratedValues>
94260            </field>
94261          </fields>
94262        </register>
94263        <register>
94264          <name>PCR30</name>
94265          <description>Pin Control Register n</description>
94266          <addressOffset>0x78</addressOffset>
94267          <size>32</size>
94268          <access>read-write</access>
94269          <resetValue>0</resetValue>
94270          <resetMask>0xFFFFFFFF</resetMask>
94271          <fields>
94272            <field>
94273              <name>PS</name>
94274              <description>Pull Select</description>
94275              <bitOffset>0</bitOffset>
94276              <bitWidth>1</bitWidth>
94277              <access>read-only</access>
94278              <enumeratedValues>
94279                <enumeratedValue>
94280                  <name>0</name>
94281                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
94282                  <value>#0</value>
94283                </enumeratedValue>
94284                <enumeratedValue>
94285                  <name>1</name>
94286                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
94287                  <value>#1</value>
94288                </enumeratedValue>
94289              </enumeratedValues>
94290            </field>
94291            <field>
94292              <name>PE</name>
94293              <description>Pull Enable</description>
94294              <bitOffset>1</bitOffset>
94295              <bitWidth>1</bitWidth>
94296              <access>read-only</access>
94297              <enumeratedValues>
94298                <enumeratedValue>
94299                  <name>0</name>
94300                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
94301                  <value>#0</value>
94302                </enumeratedValue>
94303                <enumeratedValue>
94304                  <name>1</name>
94305                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
94306                  <value>#1</value>
94307                </enumeratedValue>
94308              </enumeratedValues>
94309            </field>
94310            <field>
94311              <name>SRE</name>
94312              <description>Slew Rate Enable</description>
94313              <bitOffset>2</bitOffset>
94314              <bitWidth>1</bitWidth>
94315              <access>read-only</access>
94316              <enumeratedValues>
94317                <enumeratedValue>
94318                  <name>0</name>
94319                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
94320                  <value>#0</value>
94321                </enumeratedValue>
94322                <enumeratedValue>
94323                  <name>1</name>
94324                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
94325                  <value>#1</value>
94326                </enumeratedValue>
94327              </enumeratedValues>
94328            </field>
94329            <field>
94330              <name>PFE</name>
94331              <description>Passive Filter Enable</description>
94332              <bitOffset>4</bitOffset>
94333              <bitWidth>1</bitWidth>
94334              <access>read-only</access>
94335              <enumeratedValues>
94336                <enumeratedValue>
94337                  <name>0</name>
94338                  <description>Passive input filter is disabled on the corresponding pin.</description>
94339                  <value>#0</value>
94340                </enumeratedValue>
94341                <enumeratedValue>
94342                  <name>1</name>
94343                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
94344                  <value>#1</value>
94345                </enumeratedValue>
94346              </enumeratedValues>
94347            </field>
94348            <field>
94349              <name>ODE</name>
94350              <description>Open Drain Enable</description>
94351              <bitOffset>5</bitOffset>
94352              <bitWidth>1</bitWidth>
94353              <access>read-only</access>
94354              <enumeratedValues>
94355                <enumeratedValue>
94356                  <name>0</name>
94357                  <description>Open drain output is disabled on the corresponding pin.</description>
94358                  <value>#0</value>
94359                </enumeratedValue>
94360                <enumeratedValue>
94361                  <name>1</name>
94362                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
94363                  <value>#1</value>
94364                </enumeratedValue>
94365              </enumeratedValues>
94366            </field>
94367            <field>
94368              <name>DSE</name>
94369              <description>Drive Strength Enable</description>
94370              <bitOffset>6</bitOffset>
94371              <bitWidth>1</bitWidth>
94372              <access>read-only</access>
94373              <enumeratedValues>
94374                <enumeratedValue>
94375                  <name>0</name>
94376                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
94377                  <value>#0</value>
94378                </enumeratedValue>
94379                <enumeratedValue>
94380                  <name>1</name>
94381                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
94382                  <value>#1</value>
94383                </enumeratedValue>
94384              </enumeratedValues>
94385            </field>
94386            <field>
94387              <name>MUX</name>
94388              <description>Pin Mux Control</description>
94389              <bitOffset>8</bitOffset>
94390              <bitWidth>3</bitWidth>
94391              <access>read-write</access>
94392              <enumeratedValues>
94393                <enumeratedValue>
94394                  <name>000</name>
94395                  <description>Pin disabled (Alternative 0) (analog).</description>
94396                  <value>#000</value>
94397                </enumeratedValue>
94398                <enumeratedValue>
94399                  <name>001</name>
94400                  <description>Alternative 1 (GPIO).</description>
94401                  <value>#001</value>
94402                </enumeratedValue>
94403                <enumeratedValue>
94404                  <name>010</name>
94405                  <description>Alternative 2 (chip-specific).</description>
94406                  <value>#010</value>
94407                </enumeratedValue>
94408                <enumeratedValue>
94409                  <name>011</name>
94410                  <description>Alternative 3 (chip-specific).</description>
94411                  <value>#011</value>
94412                </enumeratedValue>
94413                <enumeratedValue>
94414                  <name>100</name>
94415                  <description>Alternative 4 (chip-specific).</description>
94416                  <value>#100</value>
94417                </enumeratedValue>
94418                <enumeratedValue>
94419                  <name>101</name>
94420                  <description>Alternative 5 (chip-specific).</description>
94421                  <value>#101</value>
94422                </enumeratedValue>
94423                <enumeratedValue>
94424                  <name>110</name>
94425                  <description>Alternative 6 (chip-specific).</description>
94426                  <value>#110</value>
94427                </enumeratedValue>
94428                <enumeratedValue>
94429                  <name>111</name>
94430                  <description>Alternative 7 (chip-specific).</description>
94431                  <value>#111</value>
94432                </enumeratedValue>
94433              </enumeratedValues>
94434            </field>
94435            <field>
94436              <name>LK</name>
94437              <description>Lock Register</description>
94438              <bitOffset>15</bitOffset>
94439              <bitWidth>1</bitWidth>
94440              <access>read-write</access>
94441              <enumeratedValues>
94442                <enumeratedValue>
94443                  <name>0</name>
94444                  <description>Pin Control Register fields [15:0] are not locked.</description>
94445                  <value>#0</value>
94446                </enumeratedValue>
94447                <enumeratedValue>
94448                  <name>1</name>
94449                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
94450                  <value>#1</value>
94451                </enumeratedValue>
94452              </enumeratedValues>
94453            </field>
94454            <field>
94455              <name>IRQC</name>
94456              <description>Interrupt Configuration</description>
94457              <bitOffset>16</bitOffset>
94458              <bitWidth>4</bitWidth>
94459              <access>read-write</access>
94460              <enumeratedValues>
94461                <enumeratedValue>
94462                  <name>0000</name>
94463                  <description>Interrupt Status Flag (ISF) is disabled.</description>
94464                  <value>#0000</value>
94465                </enumeratedValue>
94466                <enumeratedValue>
94467                  <name>0001</name>
94468                  <description>ISF flag and DMA request on rising edge.</description>
94469                  <value>#0001</value>
94470                </enumeratedValue>
94471                <enumeratedValue>
94472                  <name>0010</name>
94473                  <description>ISF flag and DMA request on falling edge.</description>
94474                  <value>#0010</value>
94475                </enumeratedValue>
94476                <enumeratedValue>
94477                  <name>0011</name>
94478                  <description>ISF flag and DMA request on either edge.</description>
94479                  <value>#0011</value>
94480                </enumeratedValue>
94481                <enumeratedValue>
94482                  <name>1000</name>
94483                  <description>ISF flag and Interrupt when logic 0.</description>
94484                  <value>#1000</value>
94485                </enumeratedValue>
94486                <enumeratedValue>
94487                  <name>1001</name>
94488                  <description>ISF flag and Interrupt on rising-edge.</description>
94489                  <value>#1001</value>
94490                </enumeratedValue>
94491                <enumeratedValue>
94492                  <name>1010</name>
94493                  <description>ISF flag and Interrupt on falling-edge.</description>
94494                  <value>#1010</value>
94495                </enumeratedValue>
94496                <enumeratedValue>
94497                  <name>1011</name>
94498                  <description>ISF flag and Interrupt on either edge.</description>
94499                  <value>#1011</value>
94500                </enumeratedValue>
94501                <enumeratedValue>
94502                  <name>1100</name>
94503                  <description>ISF flag and Interrupt when logic 1.</description>
94504                  <value>#1100</value>
94505                </enumeratedValue>
94506              </enumeratedValues>
94507            </field>
94508            <field>
94509              <name>ISF</name>
94510              <description>Interrupt Status Flag</description>
94511              <bitOffset>24</bitOffset>
94512              <bitWidth>1</bitWidth>
94513              <access>read-write</access>
94514              <enumeratedValues>
94515                <enumeratedValue>
94516                  <name>0</name>
94517                  <description>Configured interrupt is not detected.</description>
94518                  <value>#0</value>
94519                </enumeratedValue>
94520                <enumeratedValue>
94521                  <name>1</name>
94522                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
94523                  <value>#1</value>
94524                </enumeratedValue>
94525              </enumeratedValues>
94526            </field>
94527          </fields>
94528        </register>
94529        <register>
94530          <name>PCR31</name>
94531          <description>Pin Control Register n</description>
94532          <addressOffset>0x7C</addressOffset>
94533          <size>32</size>
94534          <access>read-write</access>
94535          <resetValue>0</resetValue>
94536          <resetMask>0xFFFFFFFF</resetMask>
94537          <fields>
94538            <field>
94539              <name>PS</name>
94540              <description>Pull Select</description>
94541              <bitOffset>0</bitOffset>
94542              <bitWidth>1</bitWidth>
94543              <access>read-only</access>
94544              <enumeratedValues>
94545                <enumeratedValue>
94546                  <name>0</name>
94547                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
94548                  <value>#0</value>
94549                </enumeratedValue>
94550                <enumeratedValue>
94551                  <name>1</name>
94552                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
94553                  <value>#1</value>
94554                </enumeratedValue>
94555              </enumeratedValues>
94556            </field>
94557            <field>
94558              <name>PE</name>
94559              <description>Pull Enable</description>
94560              <bitOffset>1</bitOffset>
94561              <bitWidth>1</bitWidth>
94562              <access>read-only</access>
94563              <enumeratedValues>
94564                <enumeratedValue>
94565                  <name>0</name>
94566                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
94567                  <value>#0</value>
94568                </enumeratedValue>
94569                <enumeratedValue>
94570                  <name>1</name>
94571                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
94572                  <value>#1</value>
94573                </enumeratedValue>
94574              </enumeratedValues>
94575            </field>
94576            <field>
94577              <name>SRE</name>
94578              <description>Slew Rate Enable</description>
94579              <bitOffset>2</bitOffset>
94580              <bitWidth>1</bitWidth>
94581              <access>read-only</access>
94582              <enumeratedValues>
94583                <enumeratedValue>
94584                  <name>0</name>
94585                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
94586                  <value>#0</value>
94587                </enumeratedValue>
94588                <enumeratedValue>
94589                  <name>1</name>
94590                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
94591                  <value>#1</value>
94592                </enumeratedValue>
94593              </enumeratedValues>
94594            </field>
94595            <field>
94596              <name>PFE</name>
94597              <description>Passive Filter Enable</description>
94598              <bitOffset>4</bitOffset>
94599              <bitWidth>1</bitWidth>
94600              <access>read-only</access>
94601              <enumeratedValues>
94602                <enumeratedValue>
94603                  <name>0</name>
94604                  <description>Passive input filter is disabled on the corresponding pin.</description>
94605                  <value>#0</value>
94606                </enumeratedValue>
94607                <enumeratedValue>
94608                  <name>1</name>
94609                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
94610                  <value>#1</value>
94611                </enumeratedValue>
94612              </enumeratedValues>
94613            </field>
94614            <field>
94615              <name>ODE</name>
94616              <description>Open Drain Enable</description>
94617              <bitOffset>5</bitOffset>
94618              <bitWidth>1</bitWidth>
94619              <access>read-only</access>
94620              <enumeratedValues>
94621                <enumeratedValue>
94622                  <name>0</name>
94623                  <description>Open drain output is disabled on the corresponding pin.</description>
94624                  <value>#0</value>
94625                </enumeratedValue>
94626                <enumeratedValue>
94627                  <name>1</name>
94628                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
94629                  <value>#1</value>
94630                </enumeratedValue>
94631              </enumeratedValues>
94632            </field>
94633            <field>
94634              <name>DSE</name>
94635              <description>Drive Strength Enable</description>
94636              <bitOffset>6</bitOffset>
94637              <bitWidth>1</bitWidth>
94638              <access>read-only</access>
94639              <enumeratedValues>
94640                <enumeratedValue>
94641                  <name>0</name>
94642                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
94643                  <value>#0</value>
94644                </enumeratedValue>
94645                <enumeratedValue>
94646                  <name>1</name>
94647                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
94648                  <value>#1</value>
94649                </enumeratedValue>
94650              </enumeratedValues>
94651            </field>
94652            <field>
94653              <name>MUX</name>
94654              <description>Pin Mux Control</description>
94655              <bitOffset>8</bitOffset>
94656              <bitWidth>3</bitWidth>
94657              <access>read-write</access>
94658              <enumeratedValues>
94659                <enumeratedValue>
94660                  <name>000</name>
94661                  <description>Pin disabled (Alternative 0) (analog).</description>
94662                  <value>#000</value>
94663                </enumeratedValue>
94664                <enumeratedValue>
94665                  <name>001</name>
94666                  <description>Alternative 1 (GPIO).</description>
94667                  <value>#001</value>
94668                </enumeratedValue>
94669                <enumeratedValue>
94670                  <name>010</name>
94671                  <description>Alternative 2 (chip-specific).</description>
94672                  <value>#010</value>
94673                </enumeratedValue>
94674                <enumeratedValue>
94675                  <name>011</name>
94676                  <description>Alternative 3 (chip-specific).</description>
94677                  <value>#011</value>
94678                </enumeratedValue>
94679                <enumeratedValue>
94680                  <name>100</name>
94681                  <description>Alternative 4 (chip-specific).</description>
94682                  <value>#100</value>
94683                </enumeratedValue>
94684                <enumeratedValue>
94685                  <name>101</name>
94686                  <description>Alternative 5 (chip-specific).</description>
94687                  <value>#101</value>
94688                </enumeratedValue>
94689                <enumeratedValue>
94690                  <name>110</name>
94691                  <description>Alternative 6 (chip-specific).</description>
94692                  <value>#110</value>
94693                </enumeratedValue>
94694                <enumeratedValue>
94695                  <name>111</name>
94696                  <description>Alternative 7 (chip-specific).</description>
94697                  <value>#111</value>
94698                </enumeratedValue>
94699              </enumeratedValues>
94700            </field>
94701            <field>
94702              <name>LK</name>
94703              <description>Lock Register</description>
94704              <bitOffset>15</bitOffset>
94705              <bitWidth>1</bitWidth>
94706              <access>read-write</access>
94707              <enumeratedValues>
94708                <enumeratedValue>
94709                  <name>0</name>
94710                  <description>Pin Control Register fields [15:0] are not locked.</description>
94711                  <value>#0</value>
94712                </enumeratedValue>
94713                <enumeratedValue>
94714                  <name>1</name>
94715                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
94716                  <value>#1</value>
94717                </enumeratedValue>
94718              </enumeratedValues>
94719            </field>
94720            <field>
94721              <name>IRQC</name>
94722              <description>Interrupt Configuration</description>
94723              <bitOffset>16</bitOffset>
94724              <bitWidth>4</bitWidth>
94725              <access>read-write</access>
94726              <enumeratedValues>
94727                <enumeratedValue>
94728                  <name>0000</name>
94729                  <description>Interrupt Status Flag (ISF) is disabled.</description>
94730                  <value>#0000</value>
94731                </enumeratedValue>
94732                <enumeratedValue>
94733                  <name>0001</name>
94734                  <description>ISF flag and DMA request on rising edge.</description>
94735                  <value>#0001</value>
94736                </enumeratedValue>
94737                <enumeratedValue>
94738                  <name>0010</name>
94739                  <description>ISF flag and DMA request on falling edge.</description>
94740                  <value>#0010</value>
94741                </enumeratedValue>
94742                <enumeratedValue>
94743                  <name>0011</name>
94744                  <description>ISF flag and DMA request on either edge.</description>
94745                  <value>#0011</value>
94746                </enumeratedValue>
94747                <enumeratedValue>
94748                  <name>1000</name>
94749                  <description>ISF flag and Interrupt when logic 0.</description>
94750                  <value>#1000</value>
94751                </enumeratedValue>
94752                <enumeratedValue>
94753                  <name>1001</name>
94754                  <description>ISF flag and Interrupt on rising-edge.</description>
94755                  <value>#1001</value>
94756                </enumeratedValue>
94757                <enumeratedValue>
94758                  <name>1010</name>
94759                  <description>ISF flag and Interrupt on falling-edge.</description>
94760                  <value>#1010</value>
94761                </enumeratedValue>
94762                <enumeratedValue>
94763                  <name>1011</name>
94764                  <description>ISF flag and Interrupt on either edge.</description>
94765                  <value>#1011</value>
94766                </enumeratedValue>
94767                <enumeratedValue>
94768                  <name>1100</name>
94769                  <description>ISF flag and Interrupt when logic 1.</description>
94770                  <value>#1100</value>
94771                </enumeratedValue>
94772              </enumeratedValues>
94773            </field>
94774            <field>
94775              <name>ISF</name>
94776              <description>Interrupt Status Flag</description>
94777              <bitOffset>24</bitOffset>
94778              <bitWidth>1</bitWidth>
94779              <access>read-write</access>
94780              <enumeratedValues>
94781                <enumeratedValue>
94782                  <name>0</name>
94783                  <description>Configured interrupt is not detected.</description>
94784                  <value>#0</value>
94785                </enumeratedValue>
94786                <enumeratedValue>
94787                  <name>1</name>
94788                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
94789                  <value>#1</value>
94790                </enumeratedValue>
94791              </enumeratedValues>
94792            </field>
94793          </fields>
94794        </register>
94795        <register>
94796          <name>GPCLR</name>
94797          <description>Global Pin Control Low Register</description>
94798          <addressOffset>0x80</addressOffset>
94799          <size>32</size>
94800          <access>write-only</access>
94801          <resetValue>0</resetValue>
94802          <resetMask>0xFFFFFFFF</resetMask>
94803          <fields>
94804            <field>
94805              <name>GPWD</name>
94806              <description>Global Pin Write Data</description>
94807              <bitOffset>0</bitOffset>
94808              <bitWidth>16</bitWidth>
94809              <access>write-only</access>
94810            </field>
94811            <field>
94812              <name>GPWE0</name>
94813              <description>Global Pin Write Enable</description>
94814              <bitOffset>16</bitOffset>
94815              <bitWidth>1</bitWidth>
94816              <access>write-only</access>
94817              <enumeratedValues>
94818                <enumeratedValue>
94819                  <name>0</name>
94820                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
94821                  <value>#0</value>
94822                </enumeratedValue>
94823                <enumeratedValue>
94824                  <name>1</name>
94825                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
94826                  <value>#1</value>
94827                </enumeratedValue>
94828              </enumeratedValues>
94829            </field>
94830            <field>
94831              <name>GPWE1</name>
94832              <description>Global Pin Write Enable</description>
94833              <bitOffset>17</bitOffset>
94834              <bitWidth>1</bitWidth>
94835              <access>write-only</access>
94836              <enumeratedValues>
94837                <enumeratedValue>
94838                  <name>0</name>
94839                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
94840                  <value>#0</value>
94841                </enumeratedValue>
94842                <enumeratedValue>
94843                  <name>1</name>
94844                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
94845                  <value>#1</value>
94846                </enumeratedValue>
94847              </enumeratedValues>
94848            </field>
94849            <field>
94850              <name>GPWE2</name>
94851              <description>Global Pin Write Enable</description>
94852              <bitOffset>18</bitOffset>
94853              <bitWidth>1</bitWidth>
94854              <access>write-only</access>
94855              <enumeratedValues>
94856                <enumeratedValue>
94857                  <name>0</name>
94858                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
94859                  <value>#0</value>
94860                </enumeratedValue>
94861                <enumeratedValue>
94862                  <name>1</name>
94863                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
94864                  <value>#1</value>
94865                </enumeratedValue>
94866              </enumeratedValues>
94867            </field>
94868            <field>
94869              <name>GPWE3</name>
94870              <description>Global Pin Write Enable</description>
94871              <bitOffset>19</bitOffset>
94872              <bitWidth>1</bitWidth>
94873              <access>write-only</access>
94874              <enumeratedValues>
94875                <enumeratedValue>
94876                  <name>0</name>
94877                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
94878                  <value>#0</value>
94879                </enumeratedValue>
94880                <enumeratedValue>
94881                  <name>1</name>
94882                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
94883                  <value>#1</value>
94884                </enumeratedValue>
94885              </enumeratedValues>
94886            </field>
94887            <field>
94888              <name>GPWE4</name>
94889              <description>Global Pin Write Enable</description>
94890              <bitOffset>20</bitOffset>
94891              <bitWidth>1</bitWidth>
94892              <access>write-only</access>
94893              <enumeratedValues>
94894                <enumeratedValue>
94895                  <name>0</name>
94896                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
94897                  <value>#0</value>
94898                </enumeratedValue>
94899                <enumeratedValue>
94900                  <name>1</name>
94901                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
94902                  <value>#1</value>
94903                </enumeratedValue>
94904              </enumeratedValues>
94905            </field>
94906            <field>
94907              <name>GPWE5</name>
94908              <description>Global Pin Write Enable</description>
94909              <bitOffset>21</bitOffset>
94910              <bitWidth>1</bitWidth>
94911              <access>write-only</access>
94912              <enumeratedValues>
94913                <enumeratedValue>
94914                  <name>0</name>
94915                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
94916                  <value>#0</value>
94917                </enumeratedValue>
94918                <enumeratedValue>
94919                  <name>1</name>
94920                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
94921                  <value>#1</value>
94922                </enumeratedValue>
94923              </enumeratedValues>
94924            </field>
94925            <field>
94926              <name>GPWE6</name>
94927              <description>Global Pin Write Enable</description>
94928              <bitOffset>22</bitOffset>
94929              <bitWidth>1</bitWidth>
94930              <access>write-only</access>
94931              <enumeratedValues>
94932                <enumeratedValue>
94933                  <name>0</name>
94934                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
94935                  <value>#0</value>
94936                </enumeratedValue>
94937                <enumeratedValue>
94938                  <name>1</name>
94939                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
94940                  <value>#1</value>
94941                </enumeratedValue>
94942              </enumeratedValues>
94943            </field>
94944            <field>
94945              <name>GPWE7</name>
94946              <description>Global Pin Write Enable</description>
94947              <bitOffset>23</bitOffset>
94948              <bitWidth>1</bitWidth>
94949              <access>write-only</access>
94950              <enumeratedValues>
94951                <enumeratedValue>
94952                  <name>0</name>
94953                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
94954                  <value>#0</value>
94955                </enumeratedValue>
94956                <enumeratedValue>
94957                  <name>1</name>
94958                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
94959                  <value>#1</value>
94960                </enumeratedValue>
94961              </enumeratedValues>
94962            </field>
94963            <field>
94964              <name>GPWE8</name>
94965              <description>Global Pin Write Enable</description>
94966              <bitOffset>24</bitOffset>
94967              <bitWidth>1</bitWidth>
94968              <access>write-only</access>
94969              <enumeratedValues>
94970                <enumeratedValue>
94971                  <name>0</name>
94972                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
94973                  <value>#0</value>
94974                </enumeratedValue>
94975                <enumeratedValue>
94976                  <name>1</name>
94977                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
94978                  <value>#1</value>
94979                </enumeratedValue>
94980              </enumeratedValues>
94981            </field>
94982            <field>
94983              <name>GPWE9</name>
94984              <description>Global Pin Write Enable</description>
94985              <bitOffset>25</bitOffset>
94986              <bitWidth>1</bitWidth>
94987              <access>write-only</access>
94988              <enumeratedValues>
94989                <enumeratedValue>
94990                  <name>0</name>
94991                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
94992                  <value>#0</value>
94993                </enumeratedValue>
94994                <enumeratedValue>
94995                  <name>1</name>
94996                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
94997                  <value>#1</value>
94998                </enumeratedValue>
94999              </enumeratedValues>
95000            </field>
95001            <field>
95002              <name>GPWE10</name>
95003              <description>Global Pin Write Enable</description>
95004              <bitOffset>26</bitOffset>
95005              <bitWidth>1</bitWidth>
95006              <access>write-only</access>
95007              <enumeratedValues>
95008                <enumeratedValue>
95009                  <name>0</name>
95010                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95011                  <value>#0</value>
95012                </enumeratedValue>
95013                <enumeratedValue>
95014                  <name>1</name>
95015                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95016                  <value>#1</value>
95017                </enumeratedValue>
95018              </enumeratedValues>
95019            </field>
95020            <field>
95021              <name>GPWE11</name>
95022              <description>Global Pin Write Enable</description>
95023              <bitOffset>27</bitOffset>
95024              <bitWidth>1</bitWidth>
95025              <access>write-only</access>
95026              <enumeratedValues>
95027                <enumeratedValue>
95028                  <name>0</name>
95029                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95030                  <value>#0</value>
95031                </enumeratedValue>
95032                <enumeratedValue>
95033                  <name>1</name>
95034                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95035                  <value>#1</value>
95036                </enumeratedValue>
95037              </enumeratedValues>
95038            </field>
95039            <field>
95040              <name>GPWE12</name>
95041              <description>Global Pin Write Enable</description>
95042              <bitOffset>28</bitOffset>
95043              <bitWidth>1</bitWidth>
95044              <access>write-only</access>
95045              <enumeratedValues>
95046                <enumeratedValue>
95047                  <name>0</name>
95048                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95049                  <value>#0</value>
95050                </enumeratedValue>
95051                <enumeratedValue>
95052                  <name>1</name>
95053                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95054                  <value>#1</value>
95055                </enumeratedValue>
95056              </enumeratedValues>
95057            </field>
95058            <field>
95059              <name>GPWE13</name>
95060              <description>Global Pin Write Enable</description>
95061              <bitOffset>29</bitOffset>
95062              <bitWidth>1</bitWidth>
95063              <access>write-only</access>
95064              <enumeratedValues>
95065                <enumeratedValue>
95066                  <name>0</name>
95067                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95068                  <value>#0</value>
95069                </enumeratedValue>
95070                <enumeratedValue>
95071                  <name>1</name>
95072                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95073                  <value>#1</value>
95074                </enumeratedValue>
95075              </enumeratedValues>
95076            </field>
95077            <field>
95078              <name>GPWE14</name>
95079              <description>Global Pin Write Enable</description>
95080              <bitOffset>30</bitOffset>
95081              <bitWidth>1</bitWidth>
95082              <access>write-only</access>
95083              <enumeratedValues>
95084                <enumeratedValue>
95085                  <name>0</name>
95086                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95087                  <value>#0</value>
95088                </enumeratedValue>
95089                <enumeratedValue>
95090                  <name>1</name>
95091                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95092                  <value>#1</value>
95093                </enumeratedValue>
95094              </enumeratedValues>
95095            </field>
95096            <field>
95097              <name>GPWE15</name>
95098              <description>Global Pin Write Enable</description>
95099              <bitOffset>31</bitOffset>
95100              <bitWidth>1</bitWidth>
95101              <access>write-only</access>
95102              <enumeratedValues>
95103                <enumeratedValue>
95104                  <name>0</name>
95105                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95106                  <value>#0</value>
95107                </enumeratedValue>
95108                <enumeratedValue>
95109                  <name>1</name>
95110                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95111                  <value>#1</value>
95112                </enumeratedValue>
95113              </enumeratedValues>
95114            </field>
95115          </fields>
95116        </register>
95117        <register>
95118          <name>GPCHR</name>
95119          <description>Global Pin Control High Register</description>
95120          <addressOffset>0x84</addressOffset>
95121          <size>32</size>
95122          <access>write-only</access>
95123          <resetValue>0</resetValue>
95124          <resetMask>0xFFFFFFFF</resetMask>
95125          <fields>
95126            <field>
95127              <name>GPWD</name>
95128              <description>Global Pin Write Data</description>
95129              <bitOffset>0</bitOffset>
95130              <bitWidth>16</bitWidth>
95131              <access>write-only</access>
95132            </field>
95133            <field>
95134              <name>GPWE0</name>
95135              <description>Global Pin Write Enable</description>
95136              <bitOffset>16</bitOffset>
95137              <bitWidth>1</bitWidth>
95138              <access>write-only</access>
95139              <enumeratedValues>
95140                <enumeratedValue>
95141                  <name>0</name>
95142                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95143                  <value>#0</value>
95144                </enumeratedValue>
95145                <enumeratedValue>
95146                  <name>1</name>
95147                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95148                  <value>#1</value>
95149                </enumeratedValue>
95150              </enumeratedValues>
95151            </field>
95152            <field>
95153              <name>GPWE1</name>
95154              <description>Global Pin Write Enable</description>
95155              <bitOffset>17</bitOffset>
95156              <bitWidth>1</bitWidth>
95157              <access>write-only</access>
95158              <enumeratedValues>
95159                <enumeratedValue>
95160                  <name>0</name>
95161                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95162                  <value>#0</value>
95163                </enumeratedValue>
95164                <enumeratedValue>
95165                  <name>1</name>
95166                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95167                  <value>#1</value>
95168                </enumeratedValue>
95169              </enumeratedValues>
95170            </field>
95171            <field>
95172              <name>GPWE2</name>
95173              <description>Global Pin Write Enable</description>
95174              <bitOffset>18</bitOffset>
95175              <bitWidth>1</bitWidth>
95176              <access>write-only</access>
95177              <enumeratedValues>
95178                <enumeratedValue>
95179                  <name>0</name>
95180                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95181                  <value>#0</value>
95182                </enumeratedValue>
95183                <enumeratedValue>
95184                  <name>1</name>
95185                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95186                  <value>#1</value>
95187                </enumeratedValue>
95188              </enumeratedValues>
95189            </field>
95190            <field>
95191              <name>GPWE3</name>
95192              <description>Global Pin Write Enable</description>
95193              <bitOffset>19</bitOffset>
95194              <bitWidth>1</bitWidth>
95195              <access>write-only</access>
95196              <enumeratedValues>
95197                <enumeratedValue>
95198                  <name>0</name>
95199                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95200                  <value>#0</value>
95201                </enumeratedValue>
95202                <enumeratedValue>
95203                  <name>1</name>
95204                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95205                  <value>#1</value>
95206                </enumeratedValue>
95207              </enumeratedValues>
95208            </field>
95209            <field>
95210              <name>GPWE4</name>
95211              <description>Global Pin Write Enable</description>
95212              <bitOffset>20</bitOffset>
95213              <bitWidth>1</bitWidth>
95214              <access>write-only</access>
95215              <enumeratedValues>
95216                <enumeratedValue>
95217                  <name>0</name>
95218                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95219                  <value>#0</value>
95220                </enumeratedValue>
95221                <enumeratedValue>
95222                  <name>1</name>
95223                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95224                  <value>#1</value>
95225                </enumeratedValue>
95226              </enumeratedValues>
95227            </field>
95228            <field>
95229              <name>GPWE5</name>
95230              <description>Global Pin Write Enable</description>
95231              <bitOffset>21</bitOffset>
95232              <bitWidth>1</bitWidth>
95233              <access>write-only</access>
95234              <enumeratedValues>
95235                <enumeratedValue>
95236                  <name>0</name>
95237                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95238                  <value>#0</value>
95239                </enumeratedValue>
95240                <enumeratedValue>
95241                  <name>1</name>
95242                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95243                  <value>#1</value>
95244                </enumeratedValue>
95245              </enumeratedValues>
95246            </field>
95247            <field>
95248              <name>GPWE6</name>
95249              <description>Global Pin Write Enable</description>
95250              <bitOffset>22</bitOffset>
95251              <bitWidth>1</bitWidth>
95252              <access>write-only</access>
95253              <enumeratedValues>
95254                <enumeratedValue>
95255                  <name>0</name>
95256                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95257                  <value>#0</value>
95258                </enumeratedValue>
95259                <enumeratedValue>
95260                  <name>1</name>
95261                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95262                  <value>#1</value>
95263                </enumeratedValue>
95264              </enumeratedValues>
95265            </field>
95266            <field>
95267              <name>GPWE7</name>
95268              <description>Global Pin Write Enable</description>
95269              <bitOffset>23</bitOffset>
95270              <bitWidth>1</bitWidth>
95271              <access>write-only</access>
95272              <enumeratedValues>
95273                <enumeratedValue>
95274                  <name>0</name>
95275                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95276                  <value>#0</value>
95277                </enumeratedValue>
95278                <enumeratedValue>
95279                  <name>1</name>
95280                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95281                  <value>#1</value>
95282                </enumeratedValue>
95283              </enumeratedValues>
95284            </field>
95285            <field>
95286              <name>GPWE8</name>
95287              <description>Global Pin Write Enable</description>
95288              <bitOffset>24</bitOffset>
95289              <bitWidth>1</bitWidth>
95290              <access>write-only</access>
95291              <enumeratedValues>
95292                <enumeratedValue>
95293                  <name>0</name>
95294                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95295                  <value>#0</value>
95296                </enumeratedValue>
95297                <enumeratedValue>
95298                  <name>1</name>
95299                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95300                  <value>#1</value>
95301                </enumeratedValue>
95302              </enumeratedValues>
95303            </field>
95304            <field>
95305              <name>GPWE9</name>
95306              <description>Global Pin Write Enable</description>
95307              <bitOffset>25</bitOffset>
95308              <bitWidth>1</bitWidth>
95309              <access>write-only</access>
95310              <enumeratedValues>
95311                <enumeratedValue>
95312                  <name>0</name>
95313                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95314                  <value>#0</value>
95315                </enumeratedValue>
95316                <enumeratedValue>
95317                  <name>1</name>
95318                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95319                  <value>#1</value>
95320                </enumeratedValue>
95321              </enumeratedValues>
95322            </field>
95323            <field>
95324              <name>GPWE10</name>
95325              <description>Global Pin Write Enable</description>
95326              <bitOffset>26</bitOffset>
95327              <bitWidth>1</bitWidth>
95328              <access>write-only</access>
95329              <enumeratedValues>
95330                <enumeratedValue>
95331                  <name>0</name>
95332                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95333                  <value>#0</value>
95334                </enumeratedValue>
95335                <enumeratedValue>
95336                  <name>1</name>
95337                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95338                  <value>#1</value>
95339                </enumeratedValue>
95340              </enumeratedValues>
95341            </field>
95342            <field>
95343              <name>GPWE11</name>
95344              <description>Global Pin Write Enable</description>
95345              <bitOffset>27</bitOffset>
95346              <bitWidth>1</bitWidth>
95347              <access>write-only</access>
95348              <enumeratedValues>
95349                <enumeratedValue>
95350                  <name>0</name>
95351                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95352                  <value>#0</value>
95353                </enumeratedValue>
95354                <enumeratedValue>
95355                  <name>1</name>
95356                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95357                  <value>#1</value>
95358                </enumeratedValue>
95359              </enumeratedValues>
95360            </field>
95361            <field>
95362              <name>GPWE12</name>
95363              <description>Global Pin Write Enable</description>
95364              <bitOffset>28</bitOffset>
95365              <bitWidth>1</bitWidth>
95366              <access>write-only</access>
95367              <enumeratedValues>
95368                <enumeratedValue>
95369                  <name>0</name>
95370                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95371                  <value>#0</value>
95372                </enumeratedValue>
95373                <enumeratedValue>
95374                  <name>1</name>
95375                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95376                  <value>#1</value>
95377                </enumeratedValue>
95378              </enumeratedValues>
95379            </field>
95380            <field>
95381              <name>GPWE13</name>
95382              <description>Global Pin Write Enable</description>
95383              <bitOffset>29</bitOffset>
95384              <bitWidth>1</bitWidth>
95385              <access>write-only</access>
95386              <enumeratedValues>
95387                <enumeratedValue>
95388                  <name>0</name>
95389                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95390                  <value>#0</value>
95391                </enumeratedValue>
95392                <enumeratedValue>
95393                  <name>1</name>
95394                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95395                  <value>#1</value>
95396                </enumeratedValue>
95397              </enumeratedValues>
95398            </field>
95399            <field>
95400              <name>GPWE14</name>
95401              <description>Global Pin Write Enable</description>
95402              <bitOffset>30</bitOffset>
95403              <bitWidth>1</bitWidth>
95404              <access>write-only</access>
95405              <enumeratedValues>
95406                <enumeratedValue>
95407                  <name>0</name>
95408                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95409                  <value>#0</value>
95410                </enumeratedValue>
95411                <enumeratedValue>
95412                  <name>1</name>
95413                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95414                  <value>#1</value>
95415                </enumeratedValue>
95416              </enumeratedValues>
95417            </field>
95418            <field>
95419              <name>GPWE15</name>
95420              <description>Global Pin Write Enable</description>
95421              <bitOffset>31</bitOffset>
95422              <bitWidth>1</bitWidth>
95423              <access>write-only</access>
95424              <enumeratedValues>
95425                <enumeratedValue>
95426                  <name>0</name>
95427                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
95428                  <value>#0</value>
95429                </enumeratedValue>
95430                <enumeratedValue>
95431                  <name>1</name>
95432                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
95433                  <value>#1</value>
95434                </enumeratedValue>
95435              </enumeratedValues>
95436            </field>
95437          </fields>
95438        </register>
95439        <register>
95440          <name>ISFR</name>
95441          <description>Interrupt Status Flag Register</description>
95442          <addressOffset>0xA0</addressOffset>
95443          <size>32</size>
95444          <access>read-write</access>
95445          <resetValue>0</resetValue>
95446          <resetMask>0xFFFFFFFF</resetMask>
95447          <fields>
95448            <field>
95449              <name>ISF0</name>
95450              <description>Interrupt Status Flag</description>
95451              <bitOffset>0</bitOffset>
95452              <bitWidth>1</bitWidth>
95453              <access>read-write</access>
95454              <enumeratedValues>
95455                <enumeratedValue>
95456                  <name>0</name>
95457                  <description>Configured interrupt is not detected.</description>
95458                  <value>#0</value>
95459                </enumeratedValue>
95460                <enumeratedValue>
95461                  <name>1</name>
95462                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95463                  <value>#1</value>
95464                </enumeratedValue>
95465              </enumeratedValues>
95466            </field>
95467            <field>
95468              <name>ISF1</name>
95469              <description>Interrupt Status Flag</description>
95470              <bitOffset>1</bitOffset>
95471              <bitWidth>1</bitWidth>
95472              <access>read-write</access>
95473              <enumeratedValues>
95474                <enumeratedValue>
95475                  <name>0</name>
95476                  <description>Configured interrupt is not detected.</description>
95477                  <value>#0</value>
95478                </enumeratedValue>
95479                <enumeratedValue>
95480                  <name>1</name>
95481                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95482                  <value>#1</value>
95483                </enumeratedValue>
95484              </enumeratedValues>
95485            </field>
95486            <field>
95487              <name>ISF2</name>
95488              <description>Interrupt Status Flag</description>
95489              <bitOffset>2</bitOffset>
95490              <bitWidth>1</bitWidth>
95491              <access>read-write</access>
95492              <enumeratedValues>
95493                <enumeratedValue>
95494                  <name>0</name>
95495                  <description>Configured interrupt is not detected.</description>
95496                  <value>#0</value>
95497                </enumeratedValue>
95498                <enumeratedValue>
95499                  <name>1</name>
95500                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95501                  <value>#1</value>
95502                </enumeratedValue>
95503              </enumeratedValues>
95504            </field>
95505            <field>
95506              <name>ISF3</name>
95507              <description>Interrupt Status Flag</description>
95508              <bitOffset>3</bitOffset>
95509              <bitWidth>1</bitWidth>
95510              <access>read-write</access>
95511              <enumeratedValues>
95512                <enumeratedValue>
95513                  <name>0</name>
95514                  <description>Configured interrupt is not detected.</description>
95515                  <value>#0</value>
95516                </enumeratedValue>
95517                <enumeratedValue>
95518                  <name>1</name>
95519                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95520                  <value>#1</value>
95521                </enumeratedValue>
95522              </enumeratedValues>
95523            </field>
95524            <field>
95525              <name>ISF4</name>
95526              <description>Interrupt Status Flag</description>
95527              <bitOffset>4</bitOffset>
95528              <bitWidth>1</bitWidth>
95529              <access>read-write</access>
95530              <enumeratedValues>
95531                <enumeratedValue>
95532                  <name>0</name>
95533                  <description>Configured interrupt is not detected.</description>
95534                  <value>#0</value>
95535                </enumeratedValue>
95536                <enumeratedValue>
95537                  <name>1</name>
95538                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95539                  <value>#1</value>
95540                </enumeratedValue>
95541              </enumeratedValues>
95542            </field>
95543            <field>
95544              <name>ISF5</name>
95545              <description>Interrupt Status Flag</description>
95546              <bitOffset>5</bitOffset>
95547              <bitWidth>1</bitWidth>
95548              <access>read-write</access>
95549              <enumeratedValues>
95550                <enumeratedValue>
95551                  <name>0</name>
95552                  <description>Configured interrupt is not detected.</description>
95553                  <value>#0</value>
95554                </enumeratedValue>
95555                <enumeratedValue>
95556                  <name>1</name>
95557                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95558                  <value>#1</value>
95559                </enumeratedValue>
95560              </enumeratedValues>
95561            </field>
95562            <field>
95563              <name>ISF6</name>
95564              <description>Interrupt Status Flag</description>
95565              <bitOffset>6</bitOffset>
95566              <bitWidth>1</bitWidth>
95567              <access>read-write</access>
95568              <enumeratedValues>
95569                <enumeratedValue>
95570                  <name>0</name>
95571                  <description>Configured interrupt is not detected.</description>
95572                  <value>#0</value>
95573                </enumeratedValue>
95574                <enumeratedValue>
95575                  <name>1</name>
95576                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95577                  <value>#1</value>
95578                </enumeratedValue>
95579              </enumeratedValues>
95580            </field>
95581            <field>
95582              <name>ISF7</name>
95583              <description>Interrupt Status Flag</description>
95584              <bitOffset>7</bitOffset>
95585              <bitWidth>1</bitWidth>
95586              <access>read-write</access>
95587              <enumeratedValues>
95588                <enumeratedValue>
95589                  <name>0</name>
95590                  <description>Configured interrupt is not detected.</description>
95591                  <value>#0</value>
95592                </enumeratedValue>
95593                <enumeratedValue>
95594                  <name>1</name>
95595                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95596                  <value>#1</value>
95597                </enumeratedValue>
95598              </enumeratedValues>
95599            </field>
95600            <field>
95601              <name>ISF8</name>
95602              <description>Interrupt Status Flag</description>
95603              <bitOffset>8</bitOffset>
95604              <bitWidth>1</bitWidth>
95605              <access>read-write</access>
95606              <enumeratedValues>
95607                <enumeratedValue>
95608                  <name>0</name>
95609                  <description>Configured interrupt is not detected.</description>
95610                  <value>#0</value>
95611                </enumeratedValue>
95612                <enumeratedValue>
95613                  <name>1</name>
95614                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95615                  <value>#1</value>
95616                </enumeratedValue>
95617              </enumeratedValues>
95618            </field>
95619            <field>
95620              <name>ISF9</name>
95621              <description>Interrupt Status Flag</description>
95622              <bitOffset>9</bitOffset>
95623              <bitWidth>1</bitWidth>
95624              <access>read-write</access>
95625              <enumeratedValues>
95626                <enumeratedValue>
95627                  <name>0</name>
95628                  <description>Configured interrupt is not detected.</description>
95629                  <value>#0</value>
95630                </enumeratedValue>
95631                <enumeratedValue>
95632                  <name>1</name>
95633                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95634                  <value>#1</value>
95635                </enumeratedValue>
95636              </enumeratedValues>
95637            </field>
95638            <field>
95639              <name>ISF10</name>
95640              <description>Interrupt Status Flag</description>
95641              <bitOffset>10</bitOffset>
95642              <bitWidth>1</bitWidth>
95643              <access>read-write</access>
95644              <enumeratedValues>
95645                <enumeratedValue>
95646                  <name>0</name>
95647                  <description>Configured interrupt is not detected.</description>
95648                  <value>#0</value>
95649                </enumeratedValue>
95650                <enumeratedValue>
95651                  <name>1</name>
95652                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95653                  <value>#1</value>
95654                </enumeratedValue>
95655              </enumeratedValues>
95656            </field>
95657            <field>
95658              <name>ISF11</name>
95659              <description>Interrupt Status Flag</description>
95660              <bitOffset>11</bitOffset>
95661              <bitWidth>1</bitWidth>
95662              <access>read-write</access>
95663              <enumeratedValues>
95664                <enumeratedValue>
95665                  <name>0</name>
95666                  <description>Configured interrupt is not detected.</description>
95667                  <value>#0</value>
95668                </enumeratedValue>
95669                <enumeratedValue>
95670                  <name>1</name>
95671                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95672                  <value>#1</value>
95673                </enumeratedValue>
95674              </enumeratedValues>
95675            </field>
95676            <field>
95677              <name>ISF12</name>
95678              <description>Interrupt Status Flag</description>
95679              <bitOffset>12</bitOffset>
95680              <bitWidth>1</bitWidth>
95681              <access>read-write</access>
95682              <enumeratedValues>
95683                <enumeratedValue>
95684                  <name>0</name>
95685                  <description>Configured interrupt is not detected.</description>
95686                  <value>#0</value>
95687                </enumeratedValue>
95688                <enumeratedValue>
95689                  <name>1</name>
95690                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95691                  <value>#1</value>
95692                </enumeratedValue>
95693              </enumeratedValues>
95694            </field>
95695            <field>
95696              <name>ISF13</name>
95697              <description>Interrupt Status Flag</description>
95698              <bitOffset>13</bitOffset>
95699              <bitWidth>1</bitWidth>
95700              <access>read-write</access>
95701              <enumeratedValues>
95702                <enumeratedValue>
95703                  <name>0</name>
95704                  <description>Configured interrupt is not detected.</description>
95705                  <value>#0</value>
95706                </enumeratedValue>
95707                <enumeratedValue>
95708                  <name>1</name>
95709                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95710                  <value>#1</value>
95711                </enumeratedValue>
95712              </enumeratedValues>
95713            </field>
95714            <field>
95715              <name>ISF14</name>
95716              <description>Interrupt Status Flag</description>
95717              <bitOffset>14</bitOffset>
95718              <bitWidth>1</bitWidth>
95719              <access>read-write</access>
95720              <enumeratedValues>
95721                <enumeratedValue>
95722                  <name>0</name>
95723                  <description>Configured interrupt is not detected.</description>
95724                  <value>#0</value>
95725                </enumeratedValue>
95726                <enumeratedValue>
95727                  <name>1</name>
95728                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95729                  <value>#1</value>
95730                </enumeratedValue>
95731              </enumeratedValues>
95732            </field>
95733            <field>
95734              <name>ISF15</name>
95735              <description>Interrupt Status Flag</description>
95736              <bitOffset>15</bitOffset>
95737              <bitWidth>1</bitWidth>
95738              <access>read-write</access>
95739              <enumeratedValues>
95740                <enumeratedValue>
95741                  <name>0</name>
95742                  <description>Configured interrupt is not detected.</description>
95743                  <value>#0</value>
95744                </enumeratedValue>
95745                <enumeratedValue>
95746                  <name>1</name>
95747                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95748                  <value>#1</value>
95749                </enumeratedValue>
95750              </enumeratedValues>
95751            </field>
95752            <field>
95753              <name>ISF16</name>
95754              <description>Interrupt Status Flag</description>
95755              <bitOffset>16</bitOffset>
95756              <bitWidth>1</bitWidth>
95757              <access>read-write</access>
95758              <enumeratedValues>
95759                <enumeratedValue>
95760                  <name>0</name>
95761                  <description>Configured interrupt is not detected.</description>
95762                  <value>#0</value>
95763                </enumeratedValue>
95764                <enumeratedValue>
95765                  <name>1</name>
95766                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95767                  <value>#1</value>
95768                </enumeratedValue>
95769              </enumeratedValues>
95770            </field>
95771            <field>
95772              <name>ISF17</name>
95773              <description>Interrupt Status Flag</description>
95774              <bitOffset>17</bitOffset>
95775              <bitWidth>1</bitWidth>
95776              <access>read-write</access>
95777              <enumeratedValues>
95778                <enumeratedValue>
95779                  <name>0</name>
95780                  <description>Configured interrupt is not detected.</description>
95781                  <value>#0</value>
95782                </enumeratedValue>
95783                <enumeratedValue>
95784                  <name>1</name>
95785                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95786                  <value>#1</value>
95787                </enumeratedValue>
95788              </enumeratedValues>
95789            </field>
95790            <field>
95791              <name>ISF18</name>
95792              <description>Interrupt Status Flag</description>
95793              <bitOffset>18</bitOffset>
95794              <bitWidth>1</bitWidth>
95795              <access>read-write</access>
95796              <enumeratedValues>
95797                <enumeratedValue>
95798                  <name>0</name>
95799                  <description>Configured interrupt is not detected.</description>
95800                  <value>#0</value>
95801                </enumeratedValue>
95802                <enumeratedValue>
95803                  <name>1</name>
95804                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95805                  <value>#1</value>
95806                </enumeratedValue>
95807              </enumeratedValues>
95808            </field>
95809            <field>
95810              <name>ISF19</name>
95811              <description>Interrupt Status Flag</description>
95812              <bitOffset>19</bitOffset>
95813              <bitWidth>1</bitWidth>
95814              <access>read-write</access>
95815              <enumeratedValues>
95816                <enumeratedValue>
95817                  <name>0</name>
95818                  <description>Configured interrupt is not detected.</description>
95819                  <value>#0</value>
95820                </enumeratedValue>
95821                <enumeratedValue>
95822                  <name>1</name>
95823                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95824                  <value>#1</value>
95825                </enumeratedValue>
95826              </enumeratedValues>
95827            </field>
95828            <field>
95829              <name>ISF20</name>
95830              <description>Interrupt Status Flag</description>
95831              <bitOffset>20</bitOffset>
95832              <bitWidth>1</bitWidth>
95833              <access>read-write</access>
95834              <enumeratedValues>
95835                <enumeratedValue>
95836                  <name>0</name>
95837                  <description>Configured interrupt is not detected.</description>
95838                  <value>#0</value>
95839                </enumeratedValue>
95840                <enumeratedValue>
95841                  <name>1</name>
95842                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95843                  <value>#1</value>
95844                </enumeratedValue>
95845              </enumeratedValues>
95846            </field>
95847            <field>
95848              <name>ISF21</name>
95849              <description>Interrupt Status Flag</description>
95850              <bitOffset>21</bitOffset>
95851              <bitWidth>1</bitWidth>
95852              <access>read-write</access>
95853              <enumeratedValues>
95854                <enumeratedValue>
95855                  <name>0</name>
95856                  <description>Configured interrupt is not detected.</description>
95857                  <value>#0</value>
95858                </enumeratedValue>
95859                <enumeratedValue>
95860                  <name>1</name>
95861                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95862                  <value>#1</value>
95863                </enumeratedValue>
95864              </enumeratedValues>
95865            </field>
95866            <field>
95867              <name>ISF22</name>
95868              <description>Interrupt Status Flag</description>
95869              <bitOffset>22</bitOffset>
95870              <bitWidth>1</bitWidth>
95871              <access>read-write</access>
95872              <enumeratedValues>
95873                <enumeratedValue>
95874                  <name>0</name>
95875                  <description>Configured interrupt is not detected.</description>
95876                  <value>#0</value>
95877                </enumeratedValue>
95878                <enumeratedValue>
95879                  <name>1</name>
95880                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95881                  <value>#1</value>
95882                </enumeratedValue>
95883              </enumeratedValues>
95884            </field>
95885            <field>
95886              <name>ISF23</name>
95887              <description>Interrupt Status Flag</description>
95888              <bitOffset>23</bitOffset>
95889              <bitWidth>1</bitWidth>
95890              <access>read-write</access>
95891              <enumeratedValues>
95892                <enumeratedValue>
95893                  <name>0</name>
95894                  <description>Configured interrupt is not detected.</description>
95895                  <value>#0</value>
95896                </enumeratedValue>
95897                <enumeratedValue>
95898                  <name>1</name>
95899                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95900                  <value>#1</value>
95901                </enumeratedValue>
95902              </enumeratedValues>
95903            </field>
95904            <field>
95905              <name>ISF24</name>
95906              <description>Interrupt Status Flag</description>
95907              <bitOffset>24</bitOffset>
95908              <bitWidth>1</bitWidth>
95909              <access>read-write</access>
95910              <enumeratedValues>
95911                <enumeratedValue>
95912                  <name>0</name>
95913                  <description>Configured interrupt is not detected.</description>
95914                  <value>#0</value>
95915                </enumeratedValue>
95916                <enumeratedValue>
95917                  <name>1</name>
95918                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95919                  <value>#1</value>
95920                </enumeratedValue>
95921              </enumeratedValues>
95922            </field>
95923            <field>
95924              <name>ISF25</name>
95925              <description>Interrupt Status Flag</description>
95926              <bitOffset>25</bitOffset>
95927              <bitWidth>1</bitWidth>
95928              <access>read-write</access>
95929              <enumeratedValues>
95930                <enumeratedValue>
95931                  <name>0</name>
95932                  <description>Configured interrupt is not detected.</description>
95933                  <value>#0</value>
95934                </enumeratedValue>
95935                <enumeratedValue>
95936                  <name>1</name>
95937                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95938                  <value>#1</value>
95939                </enumeratedValue>
95940              </enumeratedValues>
95941            </field>
95942            <field>
95943              <name>ISF26</name>
95944              <description>Interrupt Status Flag</description>
95945              <bitOffset>26</bitOffset>
95946              <bitWidth>1</bitWidth>
95947              <access>read-write</access>
95948              <enumeratedValues>
95949                <enumeratedValue>
95950                  <name>0</name>
95951                  <description>Configured interrupt is not detected.</description>
95952                  <value>#0</value>
95953                </enumeratedValue>
95954                <enumeratedValue>
95955                  <name>1</name>
95956                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95957                  <value>#1</value>
95958                </enumeratedValue>
95959              </enumeratedValues>
95960            </field>
95961            <field>
95962              <name>ISF27</name>
95963              <description>Interrupt Status Flag</description>
95964              <bitOffset>27</bitOffset>
95965              <bitWidth>1</bitWidth>
95966              <access>read-write</access>
95967              <enumeratedValues>
95968                <enumeratedValue>
95969                  <name>0</name>
95970                  <description>Configured interrupt is not detected.</description>
95971                  <value>#0</value>
95972                </enumeratedValue>
95973                <enumeratedValue>
95974                  <name>1</name>
95975                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95976                  <value>#1</value>
95977                </enumeratedValue>
95978              </enumeratedValues>
95979            </field>
95980            <field>
95981              <name>ISF28</name>
95982              <description>Interrupt Status Flag</description>
95983              <bitOffset>28</bitOffset>
95984              <bitWidth>1</bitWidth>
95985              <access>read-write</access>
95986              <enumeratedValues>
95987                <enumeratedValue>
95988                  <name>0</name>
95989                  <description>Configured interrupt is not detected.</description>
95990                  <value>#0</value>
95991                </enumeratedValue>
95992                <enumeratedValue>
95993                  <name>1</name>
95994                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
95995                  <value>#1</value>
95996                </enumeratedValue>
95997              </enumeratedValues>
95998            </field>
95999            <field>
96000              <name>ISF29</name>
96001              <description>Interrupt Status Flag</description>
96002              <bitOffset>29</bitOffset>
96003              <bitWidth>1</bitWidth>
96004              <access>read-write</access>
96005              <enumeratedValues>
96006                <enumeratedValue>
96007                  <name>0</name>
96008                  <description>Configured interrupt is not detected.</description>
96009                  <value>#0</value>
96010                </enumeratedValue>
96011                <enumeratedValue>
96012                  <name>1</name>
96013                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
96014                  <value>#1</value>
96015                </enumeratedValue>
96016              </enumeratedValues>
96017            </field>
96018            <field>
96019              <name>ISF30</name>
96020              <description>Interrupt Status Flag</description>
96021              <bitOffset>30</bitOffset>
96022              <bitWidth>1</bitWidth>
96023              <access>read-write</access>
96024              <enumeratedValues>
96025                <enumeratedValue>
96026                  <name>0</name>
96027                  <description>Configured interrupt is not detected.</description>
96028                  <value>#0</value>
96029                </enumeratedValue>
96030                <enumeratedValue>
96031                  <name>1</name>
96032                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
96033                  <value>#1</value>
96034                </enumeratedValue>
96035              </enumeratedValues>
96036            </field>
96037            <field>
96038              <name>ISF31</name>
96039              <description>Interrupt Status Flag</description>
96040              <bitOffset>31</bitOffset>
96041              <bitWidth>1</bitWidth>
96042              <access>read-write</access>
96043              <enumeratedValues>
96044                <enumeratedValue>
96045                  <name>0</name>
96046                  <description>Configured interrupt is not detected.</description>
96047                  <value>#0</value>
96048                </enumeratedValue>
96049                <enumeratedValue>
96050                  <name>1</name>
96051                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
96052                  <value>#1</value>
96053                </enumeratedValue>
96054              </enumeratedValues>
96055            </field>
96056          </fields>
96057        </register>
96058        <register>
96059          <name>DFER</name>
96060          <description>Digital Filter Enable Register</description>
96061          <addressOffset>0xC0</addressOffset>
96062          <size>32</size>
96063          <access>read-write</access>
96064          <resetValue>0</resetValue>
96065          <resetMask>0xFFFFFFFF</resetMask>
96066          <fields>
96067            <field>
96068              <name>DFE0</name>
96069              <description>Digital Filter Enable</description>
96070              <bitOffset>0</bitOffset>
96071              <bitWidth>1</bitWidth>
96072              <access>read-write</access>
96073              <enumeratedValues>
96074                <enumeratedValue>
96075                  <name>0</name>
96076                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96077                  <value>#0</value>
96078                </enumeratedValue>
96079                <enumeratedValue>
96080                  <name>1</name>
96081                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96082                  <value>#1</value>
96083                </enumeratedValue>
96084              </enumeratedValues>
96085            </field>
96086            <field>
96087              <name>DFE1</name>
96088              <description>Digital Filter Enable</description>
96089              <bitOffset>1</bitOffset>
96090              <bitWidth>1</bitWidth>
96091              <access>read-write</access>
96092              <enumeratedValues>
96093                <enumeratedValue>
96094                  <name>0</name>
96095                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96096                  <value>#0</value>
96097                </enumeratedValue>
96098                <enumeratedValue>
96099                  <name>1</name>
96100                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96101                  <value>#1</value>
96102                </enumeratedValue>
96103              </enumeratedValues>
96104            </field>
96105            <field>
96106              <name>DFE2</name>
96107              <description>Digital Filter Enable</description>
96108              <bitOffset>2</bitOffset>
96109              <bitWidth>1</bitWidth>
96110              <access>read-write</access>
96111              <enumeratedValues>
96112                <enumeratedValue>
96113                  <name>0</name>
96114                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96115                  <value>#0</value>
96116                </enumeratedValue>
96117                <enumeratedValue>
96118                  <name>1</name>
96119                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96120                  <value>#1</value>
96121                </enumeratedValue>
96122              </enumeratedValues>
96123            </field>
96124            <field>
96125              <name>DFE3</name>
96126              <description>Digital Filter Enable</description>
96127              <bitOffset>3</bitOffset>
96128              <bitWidth>1</bitWidth>
96129              <access>read-write</access>
96130              <enumeratedValues>
96131                <enumeratedValue>
96132                  <name>0</name>
96133                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96134                  <value>#0</value>
96135                </enumeratedValue>
96136                <enumeratedValue>
96137                  <name>1</name>
96138                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96139                  <value>#1</value>
96140                </enumeratedValue>
96141              </enumeratedValues>
96142            </field>
96143            <field>
96144              <name>DFE4</name>
96145              <description>Digital Filter Enable</description>
96146              <bitOffset>4</bitOffset>
96147              <bitWidth>1</bitWidth>
96148              <access>read-write</access>
96149              <enumeratedValues>
96150                <enumeratedValue>
96151                  <name>0</name>
96152                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96153                  <value>#0</value>
96154                </enumeratedValue>
96155                <enumeratedValue>
96156                  <name>1</name>
96157                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96158                  <value>#1</value>
96159                </enumeratedValue>
96160              </enumeratedValues>
96161            </field>
96162            <field>
96163              <name>DFE5</name>
96164              <description>Digital Filter Enable</description>
96165              <bitOffset>5</bitOffset>
96166              <bitWidth>1</bitWidth>
96167              <access>read-write</access>
96168              <enumeratedValues>
96169                <enumeratedValue>
96170                  <name>0</name>
96171                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96172                  <value>#0</value>
96173                </enumeratedValue>
96174                <enumeratedValue>
96175                  <name>1</name>
96176                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96177                  <value>#1</value>
96178                </enumeratedValue>
96179              </enumeratedValues>
96180            </field>
96181            <field>
96182              <name>DFE6</name>
96183              <description>Digital Filter Enable</description>
96184              <bitOffset>6</bitOffset>
96185              <bitWidth>1</bitWidth>
96186              <access>read-write</access>
96187              <enumeratedValues>
96188                <enumeratedValue>
96189                  <name>0</name>
96190                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96191                  <value>#0</value>
96192                </enumeratedValue>
96193                <enumeratedValue>
96194                  <name>1</name>
96195                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96196                  <value>#1</value>
96197                </enumeratedValue>
96198              </enumeratedValues>
96199            </field>
96200            <field>
96201              <name>DFE7</name>
96202              <description>Digital Filter Enable</description>
96203              <bitOffset>7</bitOffset>
96204              <bitWidth>1</bitWidth>
96205              <access>read-write</access>
96206              <enumeratedValues>
96207                <enumeratedValue>
96208                  <name>0</name>
96209                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96210                  <value>#0</value>
96211                </enumeratedValue>
96212                <enumeratedValue>
96213                  <name>1</name>
96214                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96215                  <value>#1</value>
96216                </enumeratedValue>
96217              </enumeratedValues>
96218            </field>
96219            <field>
96220              <name>DFE8</name>
96221              <description>Digital Filter Enable</description>
96222              <bitOffset>8</bitOffset>
96223              <bitWidth>1</bitWidth>
96224              <access>read-write</access>
96225              <enumeratedValues>
96226                <enumeratedValue>
96227                  <name>0</name>
96228                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96229                  <value>#0</value>
96230                </enumeratedValue>
96231                <enumeratedValue>
96232                  <name>1</name>
96233                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96234                  <value>#1</value>
96235                </enumeratedValue>
96236              </enumeratedValues>
96237            </field>
96238            <field>
96239              <name>DFE9</name>
96240              <description>Digital Filter Enable</description>
96241              <bitOffset>9</bitOffset>
96242              <bitWidth>1</bitWidth>
96243              <access>read-write</access>
96244              <enumeratedValues>
96245                <enumeratedValue>
96246                  <name>0</name>
96247                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96248                  <value>#0</value>
96249                </enumeratedValue>
96250                <enumeratedValue>
96251                  <name>1</name>
96252                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96253                  <value>#1</value>
96254                </enumeratedValue>
96255              </enumeratedValues>
96256            </field>
96257            <field>
96258              <name>DFE10</name>
96259              <description>Digital Filter Enable</description>
96260              <bitOffset>10</bitOffset>
96261              <bitWidth>1</bitWidth>
96262              <access>read-write</access>
96263              <enumeratedValues>
96264                <enumeratedValue>
96265                  <name>0</name>
96266                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96267                  <value>#0</value>
96268                </enumeratedValue>
96269                <enumeratedValue>
96270                  <name>1</name>
96271                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96272                  <value>#1</value>
96273                </enumeratedValue>
96274              </enumeratedValues>
96275            </field>
96276            <field>
96277              <name>DFE11</name>
96278              <description>Digital Filter Enable</description>
96279              <bitOffset>11</bitOffset>
96280              <bitWidth>1</bitWidth>
96281              <access>read-write</access>
96282              <enumeratedValues>
96283                <enumeratedValue>
96284                  <name>0</name>
96285                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96286                  <value>#0</value>
96287                </enumeratedValue>
96288                <enumeratedValue>
96289                  <name>1</name>
96290                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96291                  <value>#1</value>
96292                </enumeratedValue>
96293              </enumeratedValues>
96294            </field>
96295            <field>
96296              <name>DFE12</name>
96297              <description>Digital Filter Enable</description>
96298              <bitOffset>12</bitOffset>
96299              <bitWidth>1</bitWidth>
96300              <access>read-write</access>
96301              <enumeratedValues>
96302                <enumeratedValue>
96303                  <name>0</name>
96304                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96305                  <value>#0</value>
96306                </enumeratedValue>
96307                <enumeratedValue>
96308                  <name>1</name>
96309                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96310                  <value>#1</value>
96311                </enumeratedValue>
96312              </enumeratedValues>
96313            </field>
96314            <field>
96315              <name>DFE13</name>
96316              <description>Digital Filter Enable</description>
96317              <bitOffset>13</bitOffset>
96318              <bitWidth>1</bitWidth>
96319              <access>read-write</access>
96320              <enumeratedValues>
96321                <enumeratedValue>
96322                  <name>0</name>
96323                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96324                  <value>#0</value>
96325                </enumeratedValue>
96326                <enumeratedValue>
96327                  <name>1</name>
96328                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96329                  <value>#1</value>
96330                </enumeratedValue>
96331              </enumeratedValues>
96332            </field>
96333            <field>
96334              <name>DFE14</name>
96335              <description>Digital Filter Enable</description>
96336              <bitOffset>14</bitOffset>
96337              <bitWidth>1</bitWidth>
96338              <access>read-write</access>
96339              <enumeratedValues>
96340                <enumeratedValue>
96341                  <name>0</name>
96342                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96343                  <value>#0</value>
96344                </enumeratedValue>
96345                <enumeratedValue>
96346                  <name>1</name>
96347                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96348                  <value>#1</value>
96349                </enumeratedValue>
96350              </enumeratedValues>
96351            </field>
96352            <field>
96353              <name>DFE15</name>
96354              <description>Digital Filter Enable</description>
96355              <bitOffset>15</bitOffset>
96356              <bitWidth>1</bitWidth>
96357              <access>read-write</access>
96358              <enumeratedValues>
96359                <enumeratedValue>
96360                  <name>0</name>
96361                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96362                  <value>#0</value>
96363                </enumeratedValue>
96364                <enumeratedValue>
96365                  <name>1</name>
96366                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96367                  <value>#1</value>
96368                </enumeratedValue>
96369              </enumeratedValues>
96370            </field>
96371            <field>
96372              <name>DFE16</name>
96373              <description>Digital Filter Enable</description>
96374              <bitOffset>16</bitOffset>
96375              <bitWidth>1</bitWidth>
96376              <access>read-write</access>
96377              <enumeratedValues>
96378                <enumeratedValue>
96379                  <name>0</name>
96380                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96381                  <value>#0</value>
96382                </enumeratedValue>
96383                <enumeratedValue>
96384                  <name>1</name>
96385                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96386                  <value>#1</value>
96387                </enumeratedValue>
96388              </enumeratedValues>
96389            </field>
96390            <field>
96391              <name>DFE17</name>
96392              <description>Digital Filter Enable</description>
96393              <bitOffset>17</bitOffset>
96394              <bitWidth>1</bitWidth>
96395              <access>read-write</access>
96396              <enumeratedValues>
96397                <enumeratedValue>
96398                  <name>0</name>
96399                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96400                  <value>#0</value>
96401                </enumeratedValue>
96402                <enumeratedValue>
96403                  <name>1</name>
96404                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96405                  <value>#1</value>
96406                </enumeratedValue>
96407              </enumeratedValues>
96408            </field>
96409            <field>
96410              <name>DFE18</name>
96411              <description>Digital Filter Enable</description>
96412              <bitOffset>18</bitOffset>
96413              <bitWidth>1</bitWidth>
96414              <access>read-write</access>
96415              <enumeratedValues>
96416                <enumeratedValue>
96417                  <name>0</name>
96418                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96419                  <value>#0</value>
96420                </enumeratedValue>
96421                <enumeratedValue>
96422                  <name>1</name>
96423                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96424                  <value>#1</value>
96425                </enumeratedValue>
96426              </enumeratedValues>
96427            </field>
96428            <field>
96429              <name>DFE19</name>
96430              <description>Digital Filter Enable</description>
96431              <bitOffset>19</bitOffset>
96432              <bitWidth>1</bitWidth>
96433              <access>read-write</access>
96434              <enumeratedValues>
96435                <enumeratedValue>
96436                  <name>0</name>
96437                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96438                  <value>#0</value>
96439                </enumeratedValue>
96440                <enumeratedValue>
96441                  <name>1</name>
96442                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96443                  <value>#1</value>
96444                </enumeratedValue>
96445              </enumeratedValues>
96446            </field>
96447            <field>
96448              <name>DFE20</name>
96449              <description>Digital Filter Enable</description>
96450              <bitOffset>20</bitOffset>
96451              <bitWidth>1</bitWidth>
96452              <access>read-write</access>
96453              <enumeratedValues>
96454                <enumeratedValue>
96455                  <name>0</name>
96456                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96457                  <value>#0</value>
96458                </enumeratedValue>
96459                <enumeratedValue>
96460                  <name>1</name>
96461                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96462                  <value>#1</value>
96463                </enumeratedValue>
96464              </enumeratedValues>
96465            </field>
96466            <field>
96467              <name>DFE21</name>
96468              <description>Digital Filter Enable</description>
96469              <bitOffset>21</bitOffset>
96470              <bitWidth>1</bitWidth>
96471              <access>read-write</access>
96472              <enumeratedValues>
96473                <enumeratedValue>
96474                  <name>0</name>
96475                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96476                  <value>#0</value>
96477                </enumeratedValue>
96478                <enumeratedValue>
96479                  <name>1</name>
96480                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96481                  <value>#1</value>
96482                </enumeratedValue>
96483              </enumeratedValues>
96484            </field>
96485            <field>
96486              <name>DFE22</name>
96487              <description>Digital Filter Enable</description>
96488              <bitOffset>22</bitOffset>
96489              <bitWidth>1</bitWidth>
96490              <access>read-write</access>
96491              <enumeratedValues>
96492                <enumeratedValue>
96493                  <name>0</name>
96494                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96495                  <value>#0</value>
96496                </enumeratedValue>
96497                <enumeratedValue>
96498                  <name>1</name>
96499                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96500                  <value>#1</value>
96501                </enumeratedValue>
96502              </enumeratedValues>
96503            </field>
96504            <field>
96505              <name>DFE23</name>
96506              <description>Digital Filter Enable</description>
96507              <bitOffset>23</bitOffset>
96508              <bitWidth>1</bitWidth>
96509              <access>read-write</access>
96510              <enumeratedValues>
96511                <enumeratedValue>
96512                  <name>0</name>
96513                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96514                  <value>#0</value>
96515                </enumeratedValue>
96516                <enumeratedValue>
96517                  <name>1</name>
96518                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96519                  <value>#1</value>
96520                </enumeratedValue>
96521              </enumeratedValues>
96522            </field>
96523            <field>
96524              <name>DFE24</name>
96525              <description>Digital Filter Enable</description>
96526              <bitOffset>24</bitOffset>
96527              <bitWidth>1</bitWidth>
96528              <access>read-write</access>
96529              <enumeratedValues>
96530                <enumeratedValue>
96531                  <name>0</name>
96532                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96533                  <value>#0</value>
96534                </enumeratedValue>
96535                <enumeratedValue>
96536                  <name>1</name>
96537                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96538                  <value>#1</value>
96539                </enumeratedValue>
96540              </enumeratedValues>
96541            </field>
96542            <field>
96543              <name>DFE25</name>
96544              <description>Digital Filter Enable</description>
96545              <bitOffset>25</bitOffset>
96546              <bitWidth>1</bitWidth>
96547              <access>read-write</access>
96548              <enumeratedValues>
96549                <enumeratedValue>
96550                  <name>0</name>
96551                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96552                  <value>#0</value>
96553                </enumeratedValue>
96554                <enumeratedValue>
96555                  <name>1</name>
96556                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96557                  <value>#1</value>
96558                </enumeratedValue>
96559              </enumeratedValues>
96560            </field>
96561            <field>
96562              <name>DFE26</name>
96563              <description>Digital Filter Enable</description>
96564              <bitOffset>26</bitOffset>
96565              <bitWidth>1</bitWidth>
96566              <access>read-write</access>
96567              <enumeratedValues>
96568                <enumeratedValue>
96569                  <name>0</name>
96570                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96571                  <value>#0</value>
96572                </enumeratedValue>
96573                <enumeratedValue>
96574                  <name>1</name>
96575                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96576                  <value>#1</value>
96577                </enumeratedValue>
96578              </enumeratedValues>
96579            </field>
96580            <field>
96581              <name>DFE27</name>
96582              <description>Digital Filter Enable</description>
96583              <bitOffset>27</bitOffset>
96584              <bitWidth>1</bitWidth>
96585              <access>read-write</access>
96586              <enumeratedValues>
96587                <enumeratedValue>
96588                  <name>0</name>
96589                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96590                  <value>#0</value>
96591                </enumeratedValue>
96592                <enumeratedValue>
96593                  <name>1</name>
96594                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96595                  <value>#1</value>
96596                </enumeratedValue>
96597              </enumeratedValues>
96598            </field>
96599            <field>
96600              <name>DFE28</name>
96601              <description>Digital Filter Enable</description>
96602              <bitOffset>28</bitOffset>
96603              <bitWidth>1</bitWidth>
96604              <access>read-write</access>
96605              <enumeratedValues>
96606                <enumeratedValue>
96607                  <name>0</name>
96608                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96609                  <value>#0</value>
96610                </enumeratedValue>
96611                <enumeratedValue>
96612                  <name>1</name>
96613                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96614                  <value>#1</value>
96615                </enumeratedValue>
96616              </enumeratedValues>
96617            </field>
96618            <field>
96619              <name>DFE29</name>
96620              <description>Digital Filter Enable</description>
96621              <bitOffset>29</bitOffset>
96622              <bitWidth>1</bitWidth>
96623              <access>read-write</access>
96624              <enumeratedValues>
96625                <enumeratedValue>
96626                  <name>0</name>
96627                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96628                  <value>#0</value>
96629                </enumeratedValue>
96630                <enumeratedValue>
96631                  <name>1</name>
96632                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96633                  <value>#1</value>
96634                </enumeratedValue>
96635              </enumeratedValues>
96636            </field>
96637            <field>
96638              <name>DFE30</name>
96639              <description>Digital Filter Enable</description>
96640              <bitOffset>30</bitOffset>
96641              <bitWidth>1</bitWidth>
96642              <access>read-write</access>
96643              <enumeratedValues>
96644                <enumeratedValue>
96645                  <name>0</name>
96646                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96647                  <value>#0</value>
96648                </enumeratedValue>
96649                <enumeratedValue>
96650                  <name>1</name>
96651                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96652                  <value>#1</value>
96653                </enumeratedValue>
96654              </enumeratedValues>
96655            </field>
96656            <field>
96657              <name>DFE31</name>
96658              <description>Digital Filter Enable</description>
96659              <bitOffset>31</bitOffset>
96660              <bitWidth>1</bitWidth>
96661              <access>read-write</access>
96662              <enumeratedValues>
96663                <enumeratedValue>
96664                  <name>0</name>
96665                  <description>Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero.</description>
96666                  <value>#0</value>
96667                </enumeratedValue>
96668                <enumeratedValue>
96669                  <name>1</name>
96670                  <description>Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96671                  <value>#1</value>
96672                </enumeratedValue>
96673              </enumeratedValues>
96674            </field>
96675          </fields>
96676        </register>
96677        <register>
96678          <name>DFCR</name>
96679          <description>Digital Filter Clock Register</description>
96680          <addressOffset>0xC4</addressOffset>
96681          <size>32</size>
96682          <access>read-write</access>
96683          <resetValue>0</resetValue>
96684          <resetMask>0xFFFFFFFF</resetMask>
96685          <fields>
96686            <field>
96687              <name>CS</name>
96688              <description>Clock Source</description>
96689              <bitOffset>0</bitOffset>
96690              <bitWidth>1</bitWidth>
96691              <access>read-write</access>
96692              <enumeratedValues>
96693                <enumeratedValue>
96694                  <name>0</name>
96695                  <description>Digital filters are clocked by the bus clock.</description>
96696                  <value>#0</value>
96697                </enumeratedValue>
96698                <enumeratedValue>
96699                  <name>1</name>
96700                  <description>Digital filters are clocked by the LPO clock.</description>
96701                  <value>#1</value>
96702                </enumeratedValue>
96703              </enumeratedValues>
96704            </field>
96705          </fields>
96706        </register>
96707        <register>
96708          <name>DFWR</name>
96709          <description>Digital Filter Width Register</description>
96710          <addressOffset>0xC8</addressOffset>
96711          <size>32</size>
96712          <access>read-write</access>
96713          <resetValue>0</resetValue>
96714          <resetMask>0xFFFFFFFF</resetMask>
96715          <fields>
96716            <field>
96717              <name>FILT</name>
96718              <description>Filter Length</description>
96719              <bitOffset>0</bitOffset>
96720              <bitWidth>5</bitWidth>
96721              <access>read-write</access>
96722            </field>
96723          </fields>
96724        </register>
96725      </registers>
96726    </peripheral>
96727    <peripheral>
96728      <name>PORTE</name>
96729      <description>Pin Control and Interrupts</description>
96730      <groupName>PORT</groupName>
96731      <prependToName>PORTE_</prependToName>
96732      <baseAddress>0x4004D000</baseAddress>
96733      <addressBlock>
96734        <offset>0</offset>
96735        <size>0xA4</size>
96736        <usage>registers</usage>
96737      </addressBlock>
96738      <interrupt>
96739        <name>PORTE</name>
96740        <value>63</value>
96741      </interrupt>
96742      <registers>
96743        <register>
96744          <name>PCR0</name>
96745          <description>Pin Control Register n</description>
96746          <addressOffset>0</addressOffset>
96747          <size>32</size>
96748          <access>read-write</access>
96749          <resetValue>0</resetValue>
96750          <resetMask>0xFFFFFFFF</resetMask>
96751          <fields>
96752            <field>
96753              <name>PS</name>
96754              <description>Pull Select</description>
96755              <bitOffset>0</bitOffset>
96756              <bitWidth>1</bitWidth>
96757              <access>read-write</access>
96758              <enumeratedValues>
96759                <enumeratedValue>
96760                  <name>0</name>
96761                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
96762                  <value>#0</value>
96763                </enumeratedValue>
96764                <enumeratedValue>
96765                  <name>1</name>
96766                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
96767                  <value>#1</value>
96768                </enumeratedValue>
96769              </enumeratedValues>
96770            </field>
96771            <field>
96772              <name>PE</name>
96773              <description>Pull Enable</description>
96774              <bitOffset>1</bitOffset>
96775              <bitWidth>1</bitWidth>
96776              <access>read-write</access>
96777              <enumeratedValues>
96778                <enumeratedValue>
96779                  <name>0</name>
96780                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
96781                  <value>#0</value>
96782                </enumeratedValue>
96783                <enumeratedValue>
96784                  <name>1</name>
96785                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
96786                  <value>#1</value>
96787                </enumeratedValue>
96788              </enumeratedValues>
96789            </field>
96790            <field>
96791              <name>SRE</name>
96792              <description>Slew Rate Enable</description>
96793              <bitOffset>2</bitOffset>
96794              <bitWidth>1</bitWidth>
96795              <access>read-write</access>
96796              <enumeratedValues>
96797                <enumeratedValue>
96798                  <name>0</name>
96799                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
96800                  <value>#0</value>
96801                </enumeratedValue>
96802                <enumeratedValue>
96803                  <name>1</name>
96804                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
96805                  <value>#1</value>
96806                </enumeratedValue>
96807              </enumeratedValues>
96808            </field>
96809            <field>
96810              <name>PFE</name>
96811              <description>Passive Filter Enable</description>
96812              <bitOffset>4</bitOffset>
96813              <bitWidth>1</bitWidth>
96814              <access>read-only</access>
96815              <enumeratedValues>
96816                <enumeratedValue>
96817                  <name>0</name>
96818                  <description>Passive input filter is disabled on the corresponding pin.</description>
96819                  <value>#0</value>
96820                </enumeratedValue>
96821                <enumeratedValue>
96822                  <name>1</name>
96823                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
96824                  <value>#1</value>
96825                </enumeratedValue>
96826              </enumeratedValues>
96827            </field>
96828            <field>
96829              <name>ODE</name>
96830              <description>Open Drain Enable</description>
96831              <bitOffset>5</bitOffset>
96832              <bitWidth>1</bitWidth>
96833              <access>read-write</access>
96834              <enumeratedValues>
96835                <enumeratedValue>
96836                  <name>0</name>
96837                  <description>Open drain output is disabled on the corresponding pin.</description>
96838                  <value>#0</value>
96839                </enumeratedValue>
96840                <enumeratedValue>
96841                  <name>1</name>
96842                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
96843                  <value>#1</value>
96844                </enumeratedValue>
96845              </enumeratedValues>
96846            </field>
96847            <field>
96848              <name>DSE</name>
96849              <description>Drive Strength Enable</description>
96850              <bitOffset>6</bitOffset>
96851              <bitWidth>1</bitWidth>
96852              <access>read-write</access>
96853              <enumeratedValues>
96854                <enumeratedValue>
96855                  <name>0</name>
96856                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
96857                  <value>#0</value>
96858                </enumeratedValue>
96859                <enumeratedValue>
96860                  <name>1</name>
96861                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
96862                  <value>#1</value>
96863                </enumeratedValue>
96864              </enumeratedValues>
96865            </field>
96866            <field>
96867              <name>MUX</name>
96868              <description>Pin Mux Control</description>
96869              <bitOffset>8</bitOffset>
96870              <bitWidth>3</bitWidth>
96871              <access>read-write</access>
96872              <enumeratedValues>
96873                <enumeratedValue>
96874                  <name>000</name>
96875                  <description>Pin disabled (Alternative 0) (analog).</description>
96876                  <value>#000</value>
96877                </enumeratedValue>
96878                <enumeratedValue>
96879                  <name>001</name>
96880                  <description>Alternative 1 (GPIO).</description>
96881                  <value>#001</value>
96882                </enumeratedValue>
96883                <enumeratedValue>
96884                  <name>010</name>
96885                  <description>Alternative 2 (chip-specific).</description>
96886                  <value>#010</value>
96887                </enumeratedValue>
96888                <enumeratedValue>
96889                  <name>011</name>
96890                  <description>Alternative 3 (chip-specific).</description>
96891                  <value>#011</value>
96892                </enumeratedValue>
96893                <enumeratedValue>
96894                  <name>100</name>
96895                  <description>Alternative 4 (chip-specific).</description>
96896                  <value>#100</value>
96897                </enumeratedValue>
96898                <enumeratedValue>
96899                  <name>101</name>
96900                  <description>Alternative 5 (chip-specific).</description>
96901                  <value>#101</value>
96902                </enumeratedValue>
96903                <enumeratedValue>
96904                  <name>110</name>
96905                  <description>Alternative 6 (chip-specific).</description>
96906                  <value>#110</value>
96907                </enumeratedValue>
96908                <enumeratedValue>
96909                  <name>111</name>
96910                  <description>Alternative 7 (chip-specific).</description>
96911                  <value>#111</value>
96912                </enumeratedValue>
96913              </enumeratedValues>
96914            </field>
96915            <field>
96916              <name>LK</name>
96917              <description>Lock Register</description>
96918              <bitOffset>15</bitOffset>
96919              <bitWidth>1</bitWidth>
96920              <access>read-write</access>
96921              <enumeratedValues>
96922                <enumeratedValue>
96923                  <name>0</name>
96924                  <description>Pin Control Register fields [15:0] are not locked.</description>
96925                  <value>#0</value>
96926                </enumeratedValue>
96927                <enumeratedValue>
96928                  <name>1</name>
96929                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
96930                  <value>#1</value>
96931                </enumeratedValue>
96932              </enumeratedValues>
96933            </field>
96934            <field>
96935              <name>IRQC</name>
96936              <description>Interrupt Configuration</description>
96937              <bitOffset>16</bitOffset>
96938              <bitWidth>4</bitWidth>
96939              <access>read-write</access>
96940              <enumeratedValues>
96941                <enumeratedValue>
96942                  <name>0000</name>
96943                  <description>Interrupt Status Flag (ISF) is disabled.</description>
96944                  <value>#0000</value>
96945                </enumeratedValue>
96946                <enumeratedValue>
96947                  <name>0001</name>
96948                  <description>ISF flag and DMA request on rising edge.</description>
96949                  <value>#0001</value>
96950                </enumeratedValue>
96951                <enumeratedValue>
96952                  <name>0010</name>
96953                  <description>ISF flag and DMA request on falling edge.</description>
96954                  <value>#0010</value>
96955                </enumeratedValue>
96956                <enumeratedValue>
96957                  <name>0011</name>
96958                  <description>ISF flag and DMA request on either edge.</description>
96959                  <value>#0011</value>
96960                </enumeratedValue>
96961                <enumeratedValue>
96962                  <name>1000</name>
96963                  <description>ISF flag and Interrupt when logic 0.</description>
96964                  <value>#1000</value>
96965                </enumeratedValue>
96966                <enumeratedValue>
96967                  <name>1001</name>
96968                  <description>ISF flag and Interrupt on rising-edge.</description>
96969                  <value>#1001</value>
96970                </enumeratedValue>
96971                <enumeratedValue>
96972                  <name>1010</name>
96973                  <description>ISF flag and Interrupt on falling-edge.</description>
96974                  <value>#1010</value>
96975                </enumeratedValue>
96976                <enumeratedValue>
96977                  <name>1011</name>
96978                  <description>ISF flag and Interrupt on either edge.</description>
96979                  <value>#1011</value>
96980                </enumeratedValue>
96981                <enumeratedValue>
96982                  <name>1100</name>
96983                  <description>ISF flag and Interrupt when logic 1.</description>
96984                  <value>#1100</value>
96985                </enumeratedValue>
96986              </enumeratedValues>
96987            </field>
96988            <field>
96989              <name>ISF</name>
96990              <description>Interrupt Status Flag</description>
96991              <bitOffset>24</bitOffset>
96992              <bitWidth>1</bitWidth>
96993              <access>read-write</access>
96994              <enumeratedValues>
96995                <enumeratedValue>
96996                  <name>0</name>
96997                  <description>Configured interrupt is not detected.</description>
96998                  <value>#0</value>
96999                </enumeratedValue>
97000                <enumeratedValue>
97001                  <name>1</name>
97002                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
97003                  <value>#1</value>
97004                </enumeratedValue>
97005              </enumeratedValues>
97006            </field>
97007          </fields>
97008        </register>
97009        <register>
97010          <name>PCR1</name>
97011          <description>Pin Control Register n</description>
97012          <addressOffset>0x4</addressOffset>
97013          <size>32</size>
97014          <access>read-write</access>
97015          <resetValue>0</resetValue>
97016          <resetMask>0xFFFFFFFF</resetMask>
97017          <fields>
97018            <field>
97019              <name>PS</name>
97020              <description>Pull Select</description>
97021              <bitOffset>0</bitOffset>
97022              <bitWidth>1</bitWidth>
97023              <access>read-write</access>
97024              <enumeratedValues>
97025                <enumeratedValue>
97026                  <name>0</name>
97027                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
97028                  <value>#0</value>
97029                </enumeratedValue>
97030                <enumeratedValue>
97031                  <name>1</name>
97032                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
97033                  <value>#1</value>
97034                </enumeratedValue>
97035              </enumeratedValues>
97036            </field>
97037            <field>
97038              <name>PE</name>
97039              <description>Pull Enable</description>
97040              <bitOffset>1</bitOffset>
97041              <bitWidth>1</bitWidth>
97042              <access>read-write</access>
97043              <enumeratedValues>
97044                <enumeratedValue>
97045                  <name>0</name>
97046                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
97047                  <value>#0</value>
97048                </enumeratedValue>
97049                <enumeratedValue>
97050                  <name>1</name>
97051                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
97052                  <value>#1</value>
97053                </enumeratedValue>
97054              </enumeratedValues>
97055            </field>
97056            <field>
97057              <name>SRE</name>
97058              <description>Slew Rate Enable</description>
97059              <bitOffset>2</bitOffset>
97060              <bitWidth>1</bitWidth>
97061              <access>read-write</access>
97062              <enumeratedValues>
97063                <enumeratedValue>
97064                  <name>0</name>
97065                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
97066                  <value>#0</value>
97067                </enumeratedValue>
97068                <enumeratedValue>
97069                  <name>1</name>
97070                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
97071                  <value>#1</value>
97072                </enumeratedValue>
97073              </enumeratedValues>
97074            </field>
97075            <field>
97076              <name>PFE</name>
97077              <description>Passive Filter Enable</description>
97078              <bitOffset>4</bitOffset>
97079              <bitWidth>1</bitWidth>
97080              <access>read-only</access>
97081              <enumeratedValues>
97082                <enumeratedValue>
97083                  <name>0</name>
97084                  <description>Passive input filter is disabled on the corresponding pin.</description>
97085                  <value>#0</value>
97086                </enumeratedValue>
97087                <enumeratedValue>
97088                  <name>1</name>
97089                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
97090                  <value>#1</value>
97091                </enumeratedValue>
97092              </enumeratedValues>
97093            </field>
97094            <field>
97095              <name>ODE</name>
97096              <description>Open Drain Enable</description>
97097              <bitOffset>5</bitOffset>
97098              <bitWidth>1</bitWidth>
97099              <access>read-write</access>
97100              <enumeratedValues>
97101                <enumeratedValue>
97102                  <name>0</name>
97103                  <description>Open drain output is disabled on the corresponding pin.</description>
97104                  <value>#0</value>
97105                </enumeratedValue>
97106                <enumeratedValue>
97107                  <name>1</name>
97108                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
97109                  <value>#1</value>
97110                </enumeratedValue>
97111              </enumeratedValues>
97112            </field>
97113            <field>
97114              <name>DSE</name>
97115              <description>Drive Strength Enable</description>
97116              <bitOffset>6</bitOffset>
97117              <bitWidth>1</bitWidth>
97118              <access>read-write</access>
97119              <enumeratedValues>
97120                <enumeratedValue>
97121                  <name>0</name>
97122                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
97123                  <value>#0</value>
97124                </enumeratedValue>
97125                <enumeratedValue>
97126                  <name>1</name>
97127                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
97128                  <value>#1</value>
97129                </enumeratedValue>
97130              </enumeratedValues>
97131            </field>
97132            <field>
97133              <name>MUX</name>
97134              <description>Pin Mux Control</description>
97135              <bitOffset>8</bitOffset>
97136              <bitWidth>3</bitWidth>
97137              <access>read-write</access>
97138              <enumeratedValues>
97139                <enumeratedValue>
97140                  <name>000</name>
97141                  <description>Pin disabled (Alternative 0) (analog).</description>
97142                  <value>#000</value>
97143                </enumeratedValue>
97144                <enumeratedValue>
97145                  <name>001</name>
97146                  <description>Alternative 1 (GPIO).</description>
97147                  <value>#001</value>
97148                </enumeratedValue>
97149                <enumeratedValue>
97150                  <name>010</name>
97151                  <description>Alternative 2 (chip-specific).</description>
97152                  <value>#010</value>
97153                </enumeratedValue>
97154                <enumeratedValue>
97155                  <name>011</name>
97156                  <description>Alternative 3 (chip-specific).</description>
97157                  <value>#011</value>
97158                </enumeratedValue>
97159                <enumeratedValue>
97160                  <name>100</name>
97161                  <description>Alternative 4 (chip-specific).</description>
97162                  <value>#100</value>
97163                </enumeratedValue>
97164                <enumeratedValue>
97165                  <name>101</name>
97166                  <description>Alternative 5 (chip-specific).</description>
97167                  <value>#101</value>
97168                </enumeratedValue>
97169                <enumeratedValue>
97170                  <name>110</name>
97171                  <description>Alternative 6 (chip-specific).</description>
97172                  <value>#110</value>
97173                </enumeratedValue>
97174                <enumeratedValue>
97175                  <name>111</name>
97176                  <description>Alternative 7 (chip-specific).</description>
97177                  <value>#111</value>
97178                </enumeratedValue>
97179              </enumeratedValues>
97180            </field>
97181            <field>
97182              <name>LK</name>
97183              <description>Lock Register</description>
97184              <bitOffset>15</bitOffset>
97185              <bitWidth>1</bitWidth>
97186              <access>read-write</access>
97187              <enumeratedValues>
97188                <enumeratedValue>
97189                  <name>0</name>
97190                  <description>Pin Control Register fields [15:0] are not locked.</description>
97191                  <value>#0</value>
97192                </enumeratedValue>
97193                <enumeratedValue>
97194                  <name>1</name>
97195                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
97196                  <value>#1</value>
97197                </enumeratedValue>
97198              </enumeratedValues>
97199            </field>
97200            <field>
97201              <name>IRQC</name>
97202              <description>Interrupt Configuration</description>
97203              <bitOffset>16</bitOffset>
97204              <bitWidth>4</bitWidth>
97205              <access>read-write</access>
97206              <enumeratedValues>
97207                <enumeratedValue>
97208                  <name>0000</name>
97209                  <description>Interrupt Status Flag (ISF) is disabled.</description>
97210                  <value>#0000</value>
97211                </enumeratedValue>
97212                <enumeratedValue>
97213                  <name>0001</name>
97214                  <description>ISF flag and DMA request on rising edge.</description>
97215                  <value>#0001</value>
97216                </enumeratedValue>
97217                <enumeratedValue>
97218                  <name>0010</name>
97219                  <description>ISF flag and DMA request on falling edge.</description>
97220                  <value>#0010</value>
97221                </enumeratedValue>
97222                <enumeratedValue>
97223                  <name>0011</name>
97224                  <description>ISF flag and DMA request on either edge.</description>
97225                  <value>#0011</value>
97226                </enumeratedValue>
97227                <enumeratedValue>
97228                  <name>1000</name>
97229                  <description>ISF flag and Interrupt when logic 0.</description>
97230                  <value>#1000</value>
97231                </enumeratedValue>
97232                <enumeratedValue>
97233                  <name>1001</name>
97234                  <description>ISF flag and Interrupt on rising-edge.</description>
97235                  <value>#1001</value>
97236                </enumeratedValue>
97237                <enumeratedValue>
97238                  <name>1010</name>
97239                  <description>ISF flag and Interrupt on falling-edge.</description>
97240                  <value>#1010</value>
97241                </enumeratedValue>
97242                <enumeratedValue>
97243                  <name>1011</name>
97244                  <description>ISF flag and Interrupt on either edge.</description>
97245                  <value>#1011</value>
97246                </enumeratedValue>
97247                <enumeratedValue>
97248                  <name>1100</name>
97249                  <description>ISF flag and Interrupt when logic 1.</description>
97250                  <value>#1100</value>
97251                </enumeratedValue>
97252              </enumeratedValues>
97253            </field>
97254            <field>
97255              <name>ISF</name>
97256              <description>Interrupt Status Flag</description>
97257              <bitOffset>24</bitOffset>
97258              <bitWidth>1</bitWidth>
97259              <access>read-write</access>
97260              <enumeratedValues>
97261                <enumeratedValue>
97262                  <name>0</name>
97263                  <description>Configured interrupt is not detected.</description>
97264                  <value>#0</value>
97265                </enumeratedValue>
97266                <enumeratedValue>
97267                  <name>1</name>
97268                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
97269                  <value>#1</value>
97270                </enumeratedValue>
97271              </enumeratedValues>
97272            </field>
97273          </fields>
97274        </register>
97275        <register>
97276          <name>PCR2</name>
97277          <description>Pin Control Register n</description>
97278          <addressOffset>0x8</addressOffset>
97279          <size>32</size>
97280          <access>read-write</access>
97281          <resetValue>0</resetValue>
97282          <resetMask>0xFFFFFFFF</resetMask>
97283          <fields>
97284            <field>
97285              <name>PS</name>
97286              <description>Pull Select</description>
97287              <bitOffset>0</bitOffset>
97288              <bitWidth>1</bitWidth>
97289              <access>read-write</access>
97290              <enumeratedValues>
97291                <enumeratedValue>
97292                  <name>0</name>
97293                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
97294                  <value>#0</value>
97295                </enumeratedValue>
97296                <enumeratedValue>
97297                  <name>1</name>
97298                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
97299                  <value>#1</value>
97300                </enumeratedValue>
97301              </enumeratedValues>
97302            </field>
97303            <field>
97304              <name>PE</name>
97305              <description>Pull Enable</description>
97306              <bitOffset>1</bitOffset>
97307              <bitWidth>1</bitWidth>
97308              <access>read-write</access>
97309              <enumeratedValues>
97310                <enumeratedValue>
97311                  <name>0</name>
97312                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
97313                  <value>#0</value>
97314                </enumeratedValue>
97315                <enumeratedValue>
97316                  <name>1</name>
97317                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
97318                  <value>#1</value>
97319                </enumeratedValue>
97320              </enumeratedValues>
97321            </field>
97322            <field>
97323              <name>SRE</name>
97324              <description>Slew Rate Enable</description>
97325              <bitOffset>2</bitOffset>
97326              <bitWidth>1</bitWidth>
97327              <access>read-write</access>
97328              <enumeratedValues>
97329                <enumeratedValue>
97330                  <name>0</name>
97331                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
97332                  <value>#0</value>
97333                </enumeratedValue>
97334                <enumeratedValue>
97335                  <name>1</name>
97336                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
97337                  <value>#1</value>
97338                </enumeratedValue>
97339              </enumeratedValues>
97340            </field>
97341            <field>
97342              <name>PFE</name>
97343              <description>Passive Filter Enable</description>
97344              <bitOffset>4</bitOffset>
97345              <bitWidth>1</bitWidth>
97346              <access>read-only</access>
97347              <enumeratedValues>
97348                <enumeratedValue>
97349                  <name>0</name>
97350                  <description>Passive input filter is disabled on the corresponding pin.</description>
97351                  <value>#0</value>
97352                </enumeratedValue>
97353                <enumeratedValue>
97354                  <name>1</name>
97355                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
97356                  <value>#1</value>
97357                </enumeratedValue>
97358              </enumeratedValues>
97359            </field>
97360            <field>
97361              <name>ODE</name>
97362              <description>Open Drain Enable</description>
97363              <bitOffset>5</bitOffset>
97364              <bitWidth>1</bitWidth>
97365              <access>read-write</access>
97366              <enumeratedValues>
97367                <enumeratedValue>
97368                  <name>0</name>
97369                  <description>Open drain output is disabled on the corresponding pin.</description>
97370                  <value>#0</value>
97371                </enumeratedValue>
97372                <enumeratedValue>
97373                  <name>1</name>
97374                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
97375                  <value>#1</value>
97376                </enumeratedValue>
97377              </enumeratedValues>
97378            </field>
97379            <field>
97380              <name>DSE</name>
97381              <description>Drive Strength Enable</description>
97382              <bitOffset>6</bitOffset>
97383              <bitWidth>1</bitWidth>
97384              <access>read-write</access>
97385              <enumeratedValues>
97386                <enumeratedValue>
97387                  <name>0</name>
97388                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
97389                  <value>#0</value>
97390                </enumeratedValue>
97391                <enumeratedValue>
97392                  <name>1</name>
97393                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
97394                  <value>#1</value>
97395                </enumeratedValue>
97396              </enumeratedValues>
97397            </field>
97398            <field>
97399              <name>MUX</name>
97400              <description>Pin Mux Control</description>
97401              <bitOffset>8</bitOffset>
97402              <bitWidth>3</bitWidth>
97403              <access>read-write</access>
97404              <enumeratedValues>
97405                <enumeratedValue>
97406                  <name>000</name>
97407                  <description>Pin disabled (Alternative 0) (analog).</description>
97408                  <value>#000</value>
97409                </enumeratedValue>
97410                <enumeratedValue>
97411                  <name>001</name>
97412                  <description>Alternative 1 (GPIO).</description>
97413                  <value>#001</value>
97414                </enumeratedValue>
97415                <enumeratedValue>
97416                  <name>010</name>
97417                  <description>Alternative 2 (chip-specific).</description>
97418                  <value>#010</value>
97419                </enumeratedValue>
97420                <enumeratedValue>
97421                  <name>011</name>
97422                  <description>Alternative 3 (chip-specific).</description>
97423                  <value>#011</value>
97424                </enumeratedValue>
97425                <enumeratedValue>
97426                  <name>100</name>
97427                  <description>Alternative 4 (chip-specific).</description>
97428                  <value>#100</value>
97429                </enumeratedValue>
97430                <enumeratedValue>
97431                  <name>101</name>
97432                  <description>Alternative 5 (chip-specific).</description>
97433                  <value>#101</value>
97434                </enumeratedValue>
97435                <enumeratedValue>
97436                  <name>110</name>
97437                  <description>Alternative 6 (chip-specific).</description>
97438                  <value>#110</value>
97439                </enumeratedValue>
97440                <enumeratedValue>
97441                  <name>111</name>
97442                  <description>Alternative 7 (chip-specific).</description>
97443                  <value>#111</value>
97444                </enumeratedValue>
97445              </enumeratedValues>
97446            </field>
97447            <field>
97448              <name>LK</name>
97449              <description>Lock Register</description>
97450              <bitOffset>15</bitOffset>
97451              <bitWidth>1</bitWidth>
97452              <access>read-write</access>
97453              <enumeratedValues>
97454                <enumeratedValue>
97455                  <name>0</name>
97456                  <description>Pin Control Register fields [15:0] are not locked.</description>
97457                  <value>#0</value>
97458                </enumeratedValue>
97459                <enumeratedValue>
97460                  <name>1</name>
97461                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
97462                  <value>#1</value>
97463                </enumeratedValue>
97464              </enumeratedValues>
97465            </field>
97466            <field>
97467              <name>IRQC</name>
97468              <description>Interrupt Configuration</description>
97469              <bitOffset>16</bitOffset>
97470              <bitWidth>4</bitWidth>
97471              <access>read-write</access>
97472              <enumeratedValues>
97473                <enumeratedValue>
97474                  <name>0000</name>
97475                  <description>Interrupt Status Flag (ISF) is disabled.</description>
97476                  <value>#0000</value>
97477                </enumeratedValue>
97478                <enumeratedValue>
97479                  <name>0001</name>
97480                  <description>ISF flag and DMA request on rising edge.</description>
97481                  <value>#0001</value>
97482                </enumeratedValue>
97483                <enumeratedValue>
97484                  <name>0010</name>
97485                  <description>ISF flag and DMA request on falling edge.</description>
97486                  <value>#0010</value>
97487                </enumeratedValue>
97488                <enumeratedValue>
97489                  <name>0011</name>
97490                  <description>ISF flag and DMA request on either edge.</description>
97491                  <value>#0011</value>
97492                </enumeratedValue>
97493                <enumeratedValue>
97494                  <name>1000</name>
97495                  <description>ISF flag and Interrupt when logic 0.</description>
97496                  <value>#1000</value>
97497                </enumeratedValue>
97498                <enumeratedValue>
97499                  <name>1001</name>
97500                  <description>ISF flag and Interrupt on rising-edge.</description>
97501                  <value>#1001</value>
97502                </enumeratedValue>
97503                <enumeratedValue>
97504                  <name>1010</name>
97505                  <description>ISF flag and Interrupt on falling-edge.</description>
97506                  <value>#1010</value>
97507                </enumeratedValue>
97508                <enumeratedValue>
97509                  <name>1011</name>
97510                  <description>ISF flag and Interrupt on either edge.</description>
97511                  <value>#1011</value>
97512                </enumeratedValue>
97513                <enumeratedValue>
97514                  <name>1100</name>
97515                  <description>ISF flag and Interrupt when logic 1.</description>
97516                  <value>#1100</value>
97517                </enumeratedValue>
97518              </enumeratedValues>
97519            </field>
97520            <field>
97521              <name>ISF</name>
97522              <description>Interrupt Status Flag</description>
97523              <bitOffset>24</bitOffset>
97524              <bitWidth>1</bitWidth>
97525              <access>read-write</access>
97526              <enumeratedValues>
97527                <enumeratedValue>
97528                  <name>0</name>
97529                  <description>Configured interrupt is not detected.</description>
97530                  <value>#0</value>
97531                </enumeratedValue>
97532                <enumeratedValue>
97533                  <name>1</name>
97534                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
97535                  <value>#1</value>
97536                </enumeratedValue>
97537              </enumeratedValues>
97538            </field>
97539          </fields>
97540        </register>
97541        <register>
97542          <name>PCR3</name>
97543          <description>Pin Control Register n</description>
97544          <addressOffset>0xC</addressOffset>
97545          <size>32</size>
97546          <access>read-write</access>
97547          <resetValue>0</resetValue>
97548          <resetMask>0xFFFFFFFF</resetMask>
97549          <fields>
97550            <field>
97551              <name>PS</name>
97552              <description>Pull Select</description>
97553              <bitOffset>0</bitOffset>
97554              <bitWidth>1</bitWidth>
97555              <access>read-write</access>
97556              <enumeratedValues>
97557                <enumeratedValue>
97558                  <name>0</name>
97559                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
97560                  <value>#0</value>
97561                </enumeratedValue>
97562                <enumeratedValue>
97563                  <name>1</name>
97564                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
97565                  <value>#1</value>
97566                </enumeratedValue>
97567              </enumeratedValues>
97568            </field>
97569            <field>
97570              <name>PE</name>
97571              <description>Pull Enable</description>
97572              <bitOffset>1</bitOffset>
97573              <bitWidth>1</bitWidth>
97574              <access>read-write</access>
97575              <enumeratedValues>
97576                <enumeratedValue>
97577                  <name>0</name>
97578                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
97579                  <value>#0</value>
97580                </enumeratedValue>
97581                <enumeratedValue>
97582                  <name>1</name>
97583                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
97584                  <value>#1</value>
97585                </enumeratedValue>
97586              </enumeratedValues>
97587            </field>
97588            <field>
97589              <name>SRE</name>
97590              <description>Slew Rate Enable</description>
97591              <bitOffset>2</bitOffset>
97592              <bitWidth>1</bitWidth>
97593              <access>read-write</access>
97594              <enumeratedValues>
97595                <enumeratedValue>
97596                  <name>0</name>
97597                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
97598                  <value>#0</value>
97599                </enumeratedValue>
97600                <enumeratedValue>
97601                  <name>1</name>
97602                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
97603                  <value>#1</value>
97604                </enumeratedValue>
97605              </enumeratedValues>
97606            </field>
97607            <field>
97608              <name>PFE</name>
97609              <description>Passive Filter Enable</description>
97610              <bitOffset>4</bitOffset>
97611              <bitWidth>1</bitWidth>
97612              <access>read-only</access>
97613              <enumeratedValues>
97614                <enumeratedValue>
97615                  <name>0</name>
97616                  <description>Passive input filter is disabled on the corresponding pin.</description>
97617                  <value>#0</value>
97618                </enumeratedValue>
97619                <enumeratedValue>
97620                  <name>1</name>
97621                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
97622                  <value>#1</value>
97623                </enumeratedValue>
97624              </enumeratedValues>
97625            </field>
97626            <field>
97627              <name>ODE</name>
97628              <description>Open Drain Enable</description>
97629              <bitOffset>5</bitOffset>
97630              <bitWidth>1</bitWidth>
97631              <access>read-write</access>
97632              <enumeratedValues>
97633                <enumeratedValue>
97634                  <name>0</name>
97635                  <description>Open drain output is disabled on the corresponding pin.</description>
97636                  <value>#0</value>
97637                </enumeratedValue>
97638                <enumeratedValue>
97639                  <name>1</name>
97640                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
97641                  <value>#1</value>
97642                </enumeratedValue>
97643              </enumeratedValues>
97644            </field>
97645            <field>
97646              <name>DSE</name>
97647              <description>Drive Strength Enable</description>
97648              <bitOffset>6</bitOffset>
97649              <bitWidth>1</bitWidth>
97650              <access>read-write</access>
97651              <enumeratedValues>
97652                <enumeratedValue>
97653                  <name>0</name>
97654                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
97655                  <value>#0</value>
97656                </enumeratedValue>
97657                <enumeratedValue>
97658                  <name>1</name>
97659                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
97660                  <value>#1</value>
97661                </enumeratedValue>
97662              </enumeratedValues>
97663            </field>
97664            <field>
97665              <name>MUX</name>
97666              <description>Pin Mux Control</description>
97667              <bitOffset>8</bitOffset>
97668              <bitWidth>3</bitWidth>
97669              <access>read-write</access>
97670              <enumeratedValues>
97671                <enumeratedValue>
97672                  <name>000</name>
97673                  <description>Pin disabled (Alternative 0) (analog).</description>
97674                  <value>#000</value>
97675                </enumeratedValue>
97676                <enumeratedValue>
97677                  <name>001</name>
97678                  <description>Alternative 1 (GPIO).</description>
97679                  <value>#001</value>
97680                </enumeratedValue>
97681                <enumeratedValue>
97682                  <name>010</name>
97683                  <description>Alternative 2 (chip-specific).</description>
97684                  <value>#010</value>
97685                </enumeratedValue>
97686                <enumeratedValue>
97687                  <name>011</name>
97688                  <description>Alternative 3 (chip-specific).</description>
97689                  <value>#011</value>
97690                </enumeratedValue>
97691                <enumeratedValue>
97692                  <name>100</name>
97693                  <description>Alternative 4 (chip-specific).</description>
97694                  <value>#100</value>
97695                </enumeratedValue>
97696                <enumeratedValue>
97697                  <name>101</name>
97698                  <description>Alternative 5 (chip-specific).</description>
97699                  <value>#101</value>
97700                </enumeratedValue>
97701                <enumeratedValue>
97702                  <name>110</name>
97703                  <description>Alternative 6 (chip-specific).</description>
97704                  <value>#110</value>
97705                </enumeratedValue>
97706                <enumeratedValue>
97707                  <name>111</name>
97708                  <description>Alternative 7 (chip-specific).</description>
97709                  <value>#111</value>
97710                </enumeratedValue>
97711              </enumeratedValues>
97712            </field>
97713            <field>
97714              <name>LK</name>
97715              <description>Lock Register</description>
97716              <bitOffset>15</bitOffset>
97717              <bitWidth>1</bitWidth>
97718              <access>read-write</access>
97719              <enumeratedValues>
97720                <enumeratedValue>
97721                  <name>0</name>
97722                  <description>Pin Control Register fields [15:0] are not locked.</description>
97723                  <value>#0</value>
97724                </enumeratedValue>
97725                <enumeratedValue>
97726                  <name>1</name>
97727                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
97728                  <value>#1</value>
97729                </enumeratedValue>
97730              </enumeratedValues>
97731            </field>
97732            <field>
97733              <name>IRQC</name>
97734              <description>Interrupt Configuration</description>
97735              <bitOffset>16</bitOffset>
97736              <bitWidth>4</bitWidth>
97737              <access>read-write</access>
97738              <enumeratedValues>
97739                <enumeratedValue>
97740                  <name>0000</name>
97741                  <description>Interrupt Status Flag (ISF) is disabled.</description>
97742                  <value>#0000</value>
97743                </enumeratedValue>
97744                <enumeratedValue>
97745                  <name>0001</name>
97746                  <description>ISF flag and DMA request on rising edge.</description>
97747                  <value>#0001</value>
97748                </enumeratedValue>
97749                <enumeratedValue>
97750                  <name>0010</name>
97751                  <description>ISF flag and DMA request on falling edge.</description>
97752                  <value>#0010</value>
97753                </enumeratedValue>
97754                <enumeratedValue>
97755                  <name>0011</name>
97756                  <description>ISF flag and DMA request on either edge.</description>
97757                  <value>#0011</value>
97758                </enumeratedValue>
97759                <enumeratedValue>
97760                  <name>1000</name>
97761                  <description>ISF flag and Interrupt when logic 0.</description>
97762                  <value>#1000</value>
97763                </enumeratedValue>
97764                <enumeratedValue>
97765                  <name>1001</name>
97766                  <description>ISF flag and Interrupt on rising-edge.</description>
97767                  <value>#1001</value>
97768                </enumeratedValue>
97769                <enumeratedValue>
97770                  <name>1010</name>
97771                  <description>ISF flag and Interrupt on falling-edge.</description>
97772                  <value>#1010</value>
97773                </enumeratedValue>
97774                <enumeratedValue>
97775                  <name>1011</name>
97776                  <description>ISF flag and Interrupt on either edge.</description>
97777                  <value>#1011</value>
97778                </enumeratedValue>
97779                <enumeratedValue>
97780                  <name>1100</name>
97781                  <description>ISF flag and Interrupt when logic 1.</description>
97782                  <value>#1100</value>
97783                </enumeratedValue>
97784              </enumeratedValues>
97785            </field>
97786            <field>
97787              <name>ISF</name>
97788              <description>Interrupt Status Flag</description>
97789              <bitOffset>24</bitOffset>
97790              <bitWidth>1</bitWidth>
97791              <access>read-write</access>
97792              <enumeratedValues>
97793                <enumeratedValue>
97794                  <name>0</name>
97795                  <description>Configured interrupt is not detected.</description>
97796                  <value>#0</value>
97797                </enumeratedValue>
97798                <enumeratedValue>
97799                  <name>1</name>
97800                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
97801                  <value>#1</value>
97802                </enumeratedValue>
97803              </enumeratedValues>
97804            </field>
97805          </fields>
97806        </register>
97807        <register>
97808          <name>PCR4</name>
97809          <description>Pin Control Register n</description>
97810          <addressOffset>0x10</addressOffset>
97811          <size>32</size>
97812          <access>read-write</access>
97813          <resetValue>0</resetValue>
97814          <resetMask>0xFFFFFFFF</resetMask>
97815          <fields>
97816            <field>
97817              <name>PS</name>
97818              <description>Pull Select</description>
97819              <bitOffset>0</bitOffset>
97820              <bitWidth>1</bitWidth>
97821              <access>read-write</access>
97822              <enumeratedValues>
97823                <enumeratedValue>
97824                  <name>0</name>
97825                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
97826                  <value>#0</value>
97827                </enumeratedValue>
97828                <enumeratedValue>
97829                  <name>1</name>
97830                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
97831                  <value>#1</value>
97832                </enumeratedValue>
97833              </enumeratedValues>
97834            </field>
97835            <field>
97836              <name>PE</name>
97837              <description>Pull Enable</description>
97838              <bitOffset>1</bitOffset>
97839              <bitWidth>1</bitWidth>
97840              <access>read-write</access>
97841              <enumeratedValues>
97842                <enumeratedValue>
97843                  <name>0</name>
97844                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
97845                  <value>#0</value>
97846                </enumeratedValue>
97847                <enumeratedValue>
97848                  <name>1</name>
97849                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
97850                  <value>#1</value>
97851                </enumeratedValue>
97852              </enumeratedValues>
97853            </field>
97854            <field>
97855              <name>SRE</name>
97856              <description>Slew Rate Enable</description>
97857              <bitOffset>2</bitOffset>
97858              <bitWidth>1</bitWidth>
97859              <access>read-write</access>
97860              <enumeratedValues>
97861                <enumeratedValue>
97862                  <name>0</name>
97863                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
97864                  <value>#0</value>
97865                </enumeratedValue>
97866                <enumeratedValue>
97867                  <name>1</name>
97868                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
97869                  <value>#1</value>
97870                </enumeratedValue>
97871              </enumeratedValues>
97872            </field>
97873            <field>
97874              <name>PFE</name>
97875              <description>Passive Filter Enable</description>
97876              <bitOffset>4</bitOffset>
97877              <bitWidth>1</bitWidth>
97878              <access>read-only</access>
97879              <enumeratedValues>
97880                <enumeratedValue>
97881                  <name>0</name>
97882                  <description>Passive input filter is disabled on the corresponding pin.</description>
97883                  <value>#0</value>
97884                </enumeratedValue>
97885                <enumeratedValue>
97886                  <name>1</name>
97887                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
97888                  <value>#1</value>
97889                </enumeratedValue>
97890              </enumeratedValues>
97891            </field>
97892            <field>
97893              <name>ODE</name>
97894              <description>Open Drain Enable</description>
97895              <bitOffset>5</bitOffset>
97896              <bitWidth>1</bitWidth>
97897              <access>read-write</access>
97898              <enumeratedValues>
97899                <enumeratedValue>
97900                  <name>0</name>
97901                  <description>Open drain output is disabled on the corresponding pin.</description>
97902                  <value>#0</value>
97903                </enumeratedValue>
97904                <enumeratedValue>
97905                  <name>1</name>
97906                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
97907                  <value>#1</value>
97908                </enumeratedValue>
97909              </enumeratedValues>
97910            </field>
97911            <field>
97912              <name>DSE</name>
97913              <description>Drive Strength Enable</description>
97914              <bitOffset>6</bitOffset>
97915              <bitWidth>1</bitWidth>
97916              <access>read-write</access>
97917              <enumeratedValues>
97918                <enumeratedValue>
97919                  <name>0</name>
97920                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
97921                  <value>#0</value>
97922                </enumeratedValue>
97923                <enumeratedValue>
97924                  <name>1</name>
97925                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
97926                  <value>#1</value>
97927                </enumeratedValue>
97928              </enumeratedValues>
97929            </field>
97930            <field>
97931              <name>MUX</name>
97932              <description>Pin Mux Control</description>
97933              <bitOffset>8</bitOffset>
97934              <bitWidth>3</bitWidth>
97935              <access>read-write</access>
97936              <enumeratedValues>
97937                <enumeratedValue>
97938                  <name>000</name>
97939                  <description>Pin disabled (Alternative 0) (analog).</description>
97940                  <value>#000</value>
97941                </enumeratedValue>
97942                <enumeratedValue>
97943                  <name>001</name>
97944                  <description>Alternative 1 (GPIO).</description>
97945                  <value>#001</value>
97946                </enumeratedValue>
97947                <enumeratedValue>
97948                  <name>010</name>
97949                  <description>Alternative 2 (chip-specific).</description>
97950                  <value>#010</value>
97951                </enumeratedValue>
97952                <enumeratedValue>
97953                  <name>011</name>
97954                  <description>Alternative 3 (chip-specific).</description>
97955                  <value>#011</value>
97956                </enumeratedValue>
97957                <enumeratedValue>
97958                  <name>100</name>
97959                  <description>Alternative 4 (chip-specific).</description>
97960                  <value>#100</value>
97961                </enumeratedValue>
97962                <enumeratedValue>
97963                  <name>101</name>
97964                  <description>Alternative 5 (chip-specific).</description>
97965                  <value>#101</value>
97966                </enumeratedValue>
97967                <enumeratedValue>
97968                  <name>110</name>
97969                  <description>Alternative 6 (chip-specific).</description>
97970                  <value>#110</value>
97971                </enumeratedValue>
97972                <enumeratedValue>
97973                  <name>111</name>
97974                  <description>Alternative 7 (chip-specific).</description>
97975                  <value>#111</value>
97976                </enumeratedValue>
97977              </enumeratedValues>
97978            </field>
97979            <field>
97980              <name>LK</name>
97981              <description>Lock Register</description>
97982              <bitOffset>15</bitOffset>
97983              <bitWidth>1</bitWidth>
97984              <access>read-write</access>
97985              <enumeratedValues>
97986                <enumeratedValue>
97987                  <name>0</name>
97988                  <description>Pin Control Register fields [15:0] are not locked.</description>
97989                  <value>#0</value>
97990                </enumeratedValue>
97991                <enumeratedValue>
97992                  <name>1</name>
97993                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
97994                  <value>#1</value>
97995                </enumeratedValue>
97996              </enumeratedValues>
97997            </field>
97998            <field>
97999              <name>IRQC</name>
98000              <description>Interrupt Configuration</description>
98001              <bitOffset>16</bitOffset>
98002              <bitWidth>4</bitWidth>
98003              <access>read-write</access>
98004              <enumeratedValues>
98005                <enumeratedValue>
98006                  <name>0000</name>
98007                  <description>Interrupt Status Flag (ISF) is disabled.</description>
98008                  <value>#0000</value>
98009                </enumeratedValue>
98010                <enumeratedValue>
98011                  <name>0001</name>
98012                  <description>ISF flag and DMA request on rising edge.</description>
98013                  <value>#0001</value>
98014                </enumeratedValue>
98015                <enumeratedValue>
98016                  <name>0010</name>
98017                  <description>ISF flag and DMA request on falling edge.</description>
98018                  <value>#0010</value>
98019                </enumeratedValue>
98020                <enumeratedValue>
98021                  <name>0011</name>
98022                  <description>ISF flag and DMA request on either edge.</description>
98023                  <value>#0011</value>
98024                </enumeratedValue>
98025                <enumeratedValue>
98026                  <name>1000</name>
98027                  <description>ISF flag and Interrupt when logic 0.</description>
98028                  <value>#1000</value>
98029                </enumeratedValue>
98030                <enumeratedValue>
98031                  <name>1001</name>
98032                  <description>ISF flag and Interrupt on rising-edge.</description>
98033                  <value>#1001</value>
98034                </enumeratedValue>
98035                <enumeratedValue>
98036                  <name>1010</name>
98037                  <description>ISF flag and Interrupt on falling-edge.</description>
98038                  <value>#1010</value>
98039                </enumeratedValue>
98040                <enumeratedValue>
98041                  <name>1011</name>
98042                  <description>ISF flag and Interrupt on either edge.</description>
98043                  <value>#1011</value>
98044                </enumeratedValue>
98045                <enumeratedValue>
98046                  <name>1100</name>
98047                  <description>ISF flag and Interrupt when logic 1.</description>
98048                  <value>#1100</value>
98049                </enumeratedValue>
98050              </enumeratedValues>
98051            </field>
98052            <field>
98053              <name>ISF</name>
98054              <description>Interrupt Status Flag</description>
98055              <bitOffset>24</bitOffset>
98056              <bitWidth>1</bitWidth>
98057              <access>read-write</access>
98058              <enumeratedValues>
98059                <enumeratedValue>
98060                  <name>0</name>
98061                  <description>Configured interrupt is not detected.</description>
98062                  <value>#0</value>
98063                </enumeratedValue>
98064                <enumeratedValue>
98065                  <name>1</name>
98066                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
98067                  <value>#1</value>
98068                </enumeratedValue>
98069              </enumeratedValues>
98070            </field>
98071          </fields>
98072        </register>
98073        <register>
98074          <name>PCR5</name>
98075          <description>Pin Control Register n</description>
98076          <addressOffset>0x14</addressOffset>
98077          <size>32</size>
98078          <access>read-write</access>
98079          <resetValue>0</resetValue>
98080          <resetMask>0xFFFFFFFF</resetMask>
98081          <fields>
98082            <field>
98083              <name>PS</name>
98084              <description>Pull Select</description>
98085              <bitOffset>0</bitOffset>
98086              <bitWidth>1</bitWidth>
98087              <access>read-write</access>
98088              <enumeratedValues>
98089                <enumeratedValue>
98090                  <name>0</name>
98091                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
98092                  <value>#0</value>
98093                </enumeratedValue>
98094                <enumeratedValue>
98095                  <name>1</name>
98096                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
98097                  <value>#1</value>
98098                </enumeratedValue>
98099              </enumeratedValues>
98100            </field>
98101            <field>
98102              <name>PE</name>
98103              <description>Pull Enable</description>
98104              <bitOffset>1</bitOffset>
98105              <bitWidth>1</bitWidth>
98106              <access>read-write</access>
98107              <enumeratedValues>
98108                <enumeratedValue>
98109                  <name>0</name>
98110                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
98111                  <value>#0</value>
98112                </enumeratedValue>
98113                <enumeratedValue>
98114                  <name>1</name>
98115                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
98116                  <value>#1</value>
98117                </enumeratedValue>
98118              </enumeratedValues>
98119            </field>
98120            <field>
98121              <name>SRE</name>
98122              <description>Slew Rate Enable</description>
98123              <bitOffset>2</bitOffset>
98124              <bitWidth>1</bitWidth>
98125              <access>read-write</access>
98126              <enumeratedValues>
98127                <enumeratedValue>
98128                  <name>0</name>
98129                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
98130                  <value>#0</value>
98131                </enumeratedValue>
98132                <enumeratedValue>
98133                  <name>1</name>
98134                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
98135                  <value>#1</value>
98136                </enumeratedValue>
98137              </enumeratedValues>
98138            </field>
98139            <field>
98140              <name>PFE</name>
98141              <description>Passive Filter Enable</description>
98142              <bitOffset>4</bitOffset>
98143              <bitWidth>1</bitWidth>
98144              <access>read-only</access>
98145              <enumeratedValues>
98146                <enumeratedValue>
98147                  <name>0</name>
98148                  <description>Passive input filter is disabled on the corresponding pin.</description>
98149                  <value>#0</value>
98150                </enumeratedValue>
98151                <enumeratedValue>
98152                  <name>1</name>
98153                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
98154                  <value>#1</value>
98155                </enumeratedValue>
98156              </enumeratedValues>
98157            </field>
98158            <field>
98159              <name>ODE</name>
98160              <description>Open Drain Enable</description>
98161              <bitOffset>5</bitOffset>
98162              <bitWidth>1</bitWidth>
98163              <access>read-write</access>
98164              <enumeratedValues>
98165                <enumeratedValue>
98166                  <name>0</name>
98167                  <description>Open drain output is disabled on the corresponding pin.</description>
98168                  <value>#0</value>
98169                </enumeratedValue>
98170                <enumeratedValue>
98171                  <name>1</name>
98172                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
98173                  <value>#1</value>
98174                </enumeratedValue>
98175              </enumeratedValues>
98176            </field>
98177            <field>
98178              <name>DSE</name>
98179              <description>Drive Strength Enable</description>
98180              <bitOffset>6</bitOffset>
98181              <bitWidth>1</bitWidth>
98182              <access>read-write</access>
98183              <enumeratedValues>
98184                <enumeratedValue>
98185                  <name>0</name>
98186                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
98187                  <value>#0</value>
98188                </enumeratedValue>
98189                <enumeratedValue>
98190                  <name>1</name>
98191                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
98192                  <value>#1</value>
98193                </enumeratedValue>
98194              </enumeratedValues>
98195            </field>
98196            <field>
98197              <name>MUX</name>
98198              <description>Pin Mux Control</description>
98199              <bitOffset>8</bitOffset>
98200              <bitWidth>3</bitWidth>
98201              <access>read-write</access>
98202              <enumeratedValues>
98203                <enumeratedValue>
98204                  <name>000</name>
98205                  <description>Pin disabled (Alternative 0) (analog).</description>
98206                  <value>#000</value>
98207                </enumeratedValue>
98208                <enumeratedValue>
98209                  <name>001</name>
98210                  <description>Alternative 1 (GPIO).</description>
98211                  <value>#001</value>
98212                </enumeratedValue>
98213                <enumeratedValue>
98214                  <name>010</name>
98215                  <description>Alternative 2 (chip-specific).</description>
98216                  <value>#010</value>
98217                </enumeratedValue>
98218                <enumeratedValue>
98219                  <name>011</name>
98220                  <description>Alternative 3 (chip-specific).</description>
98221                  <value>#011</value>
98222                </enumeratedValue>
98223                <enumeratedValue>
98224                  <name>100</name>
98225                  <description>Alternative 4 (chip-specific).</description>
98226                  <value>#100</value>
98227                </enumeratedValue>
98228                <enumeratedValue>
98229                  <name>101</name>
98230                  <description>Alternative 5 (chip-specific).</description>
98231                  <value>#101</value>
98232                </enumeratedValue>
98233                <enumeratedValue>
98234                  <name>110</name>
98235                  <description>Alternative 6 (chip-specific).</description>
98236                  <value>#110</value>
98237                </enumeratedValue>
98238                <enumeratedValue>
98239                  <name>111</name>
98240                  <description>Alternative 7 (chip-specific).</description>
98241                  <value>#111</value>
98242                </enumeratedValue>
98243              </enumeratedValues>
98244            </field>
98245            <field>
98246              <name>LK</name>
98247              <description>Lock Register</description>
98248              <bitOffset>15</bitOffset>
98249              <bitWidth>1</bitWidth>
98250              <access>read-write</access>
98251              <enumeratedValues>
98252                <enumeratedValue>
98253                  <name>0</name>
98254                  <description>Pin Control Register fields [15:0] are not locked.</description>
98255                  <value>#0</value>
98256                </enumeratedValue>
98257                <enumeratedValue>
98258                  <name>1</name>
98259                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
98260                  <value>#1</value>
98261                </enumeratedValue>
98262              </enumeratedValues>
98263            </field>
98264            <field>
98265              <name>IRQC</name>
98266              <description>Interrupt Configuration</description>
98267              <bitOffset>16</bitOffset>
98268              <bitWidth>4</bitWidth>
98269              <access>read-write</access>
98270              <enumeratedValues>
98271                <enumeratedValue>
98272                  <name>0000</name>
98273                  <description>Interrupt Status Flag (ISF) is disabled.</description>
98274                  <value>#0000</value>
98275                </enumeratedValue>
98276                <enumeratedValue>
98277                  <name>0001</name>
98278                  <description>ISF flag and DMA request on rising edge.</description>
98279                  <value>#0001</value>
98280                </enumeratedValue>
98281                <enumeratedValue>
98282                  <name>0010</name>
98283                  <description>ISF flag and DMA request on falling edge.</description>
98284                  <value>#0010</value>
98285                </enumeratedValue>
98286                <enumeratedValue>
98287                  <name>0011</name>
98288                  <description>ISF flag and DMA request on either edge.</description>
98289                  <value>#0011</value>
98290                </enumeratedValue>
98291                <enumeratedValue>
98292                  <name>1000</name>
98293                  <description>ISF flag and Interrupt when logic 0.</description>
98294                  <value>#1000</value>
98295                </enumeratedValue>
98296                <enumeratedValue>
98297                  <name>1001</name>
98298                  <description>ISF flag and Interrupt on rising-edge.</description>
98299                  <value>#1001</value>
98300                </enumeratedValue>
98301                <enumeratedValue>
98302                  <name>1010</name>
98303                  <description>ISF flag and Interrupt on falling-edge.</description>
98304                  <value>#1010</value>
98305                </enumeratedValue>
98306                <enumeratedValue>
98307                  <name>1011</name>
98308                  <description>ISF flag and Interrupt on either edge.</description>
98309                  <value>#1011</value>
98310                </enumeratedValue>
98311                <enumeratedValue>
98312                  <name>1100</name>
98313                  <description>ISF flag and Interrupt when logic 1.</description>
98314                  <value>#1100</value>
98315                </enumeratedValue>
98316              </enumeratedValues>
98317            </field>
98318            <field>
98319              <name>ISF</name>
98320              <description>Interrupt Status Flag</description>
98321              <bitOffset>24</bitOffset>
98322              <bitWidth>1</bitWidth>
98323              <access>read-write</access>
98324              <enumeratedValues>
98325                <enumeratedValue>
98326                  <name>0</name>
98327                  <description>Configured interrupt is not detected.</description>
98328                  <value>#0</value>
98329                </enumeratedValue>
98330                <enumeratedValue>
98331                  <name>1</name>
98332                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
98333                  <value>#1</value>
98334                </enumeratedValue>
98335              </enumeratedValues>
98336            </field>
98337          </fields>
98338        </register>
98339        <register>
98340          <name>PCR6</name>
98341          <description>Pin Control Register n</description>
98342          <addressOffset>0x18</addressOffset>
98343          <size>32</size>
98344          <access>read-write</access>
98345          <resetValue>0</resetValue>
98346          <resetMask>0xFFFFFFFF</resetMask>
98347          <fields>
98348            <field>
98349              <name>PS</name>
98350              <description>Pull Select</description>
98351              <bitOffset>0</bitOffset>
98352              <bitWidth>1</bitWidth>
98353              <access>read-write</access>
98354              <enumeratedValues>
98355                <enumeratedValue>
98356                  <name>0</name>
98357                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
98358                  <value>#0</value>
98359                </enumeratedValue>
98360                <enumeratedValue>
98361                  <name>1</name>
98362                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
98363                  <value>#1</value>
98364                </enumeratedValue>
98365              </enumeratedValues>
98366            </field>
98367            <field>
98368              <name>PE</name>
98369              <description>Pull Enable</description>
98370              <bitOffset>1</bitOffset>
98371              <bitWidth>1</bitWidth>
98372              <access>read-write</access>
98373              <enumeratedValues>
98374                <enumeratedValue>
98375                  <name>0</name>
98376                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
98377                  <value>#0</value>
98378                </enumeratedValue>
98379                <enumeratedValue>
98380                  <name>1</name>
98381                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
98382                  <value>#1</value>
98383                </enumeratedValue>
98384              </enumeratedValues>
98385            </field>
98386            <field>
98387              <name>SRE</name>
98388              <description>Slew Rate Enable</description>
98389              <bitOffset>2</bitOffset>
98390              <bitWidth>1</bitWidth>
98391              <access>read-write</access>
98392              <enumeratedValues>
98393                <enumeratedValue>
98394                  <name>0</name>
98395                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
98396                  <value>#0</value>
98397                </enumeratedValue>
98398                <enumeratedValue>
98399                  <name>1</name>
98400                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
98401                  <value>#1</value>
98402                </enumeratedValue>
98403              </enumeratedValues>
98404            </field>
98405            <field>
98406              <name>PFE</name>
98407              <description>Passive Filter Enable</description>
98408              <bitOffset>4</bitOffset>
98409              <bitWidth>1</bitWidth>
98410              <access>read-only</access>
98411              <enumeratedValues>
98412                <enumeratedValue>
98413                  <name>0</name>
98414                  <description>Passive input filter is disabled on the corresponding pin.</description>
98415                  <value>#0</value>
98416                </enumeratedValue>
98417                <enumeratedValue>
98418                  <name>1</name>
98419                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
98420                  <value>#1</value>
98421                </enumeratedValue>
98422              </enumeratedValues>
98423            </field>
98424            <field>
98425              <name>ODE</name>
98426              <description>Open Drain Enable</description>
98427              <bitOffset>5</bitOffset>
98428              <bitWidth>1</bitWidth>
98429              <access>read-write</access>
98430              <enumeratedValues>
98431                <enumeratedValue>
98432                  <name>0</name>
98433                  <description>Open drain output is disabled on the corresponding pin.</description>
98434                  <value>#0</value>
98435                </enumeratedValue>
98436                <enumeratedValue>
98437                  <name>1</name>
98438                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
98439                  <value>#1</value>
98440                </enumeratedValue>
98441              </enumeratedValues>
98442            </field>
98443            <field>
98444              <name>DSE</name>
98445              <description>Drive Strength Enable</description>
98446              <bitOffset>6</bitOffset>
98447              <bitWidth>1</bitWidth>
98448              <access>read-write</access>
98449              <enumeratedValues>
98450                <enumeratedValue>
98451                  <name>0</name>
98452                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
98453                  <value>#0</value>
98454                </enumeratedValue>
98455                <enumeratedValue>
98456                  <name>1</name>
98457                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
98458                  <value>#1</value>
98459                </enumeratedValue>
98460              </enumeratedValues>
98461            </field>
98462            <field>
98463              <name>MUX</name>
98464              <description>Pin Mux Control</description>
98465              <bitOffset>8</bitOffset>
98466              <bitWidth>3</bitWidth>
98467              <access>read-write</access>
98468              <enumeratedValues>
98469                <enumeratedValue>
98470                  <name>000</name>
98471                  <description>Pin disabled (Alternative 0) (analog).</description>
98472                  <value>#000</value>
98473                </enumeratedValue>
98474                <enumeratedValue>
98475                  <name>001</name>
98476                  <description>Alternative 1 (GPIO).</description>
98477                  <value>#001</value>
98478                </enumeratedValue>
98479                <enumeratedValue>
98480                  <name>010</name>
98481                  <description>Alternative 2 (chip-specific).</description>
98482                  <value>#010</value>
98483                </enumeratedValue>
98484                <enumeratedValue>
98485                  <name>011</name>
98486                  <description>Alternative 3 (chip-specific).</description>
98487                  <value>#011</value>
98488                </enumeratedValue>
98489                <enumeratedValue>
98490                  <name>100</name>
98491                  <description>Alternative 4 (chip-specific).</description>
98492                  <value>#100</value>
98493                </enumeratedValue>
98494                <enumeratedValue>
98495                  <name>101</name>
98496                  <description>Alternative 5 (chip-specific).</description>
98497                  <value>#101</value>
98498                </enumeratedValue>
98499                <enumeratedValue>
98500                  <name>110</name>
98501                  <description>Alternative 6 (chip-specific).</description>
98502                  <value>#110</value>
98503                </enumeratedValue>
98504                <enumeratedValue>
98505                  <name>111</name>
98506                  <description>Alternative 7 (chip-specific).</description>
98507                  <value>#111</value>
98508                </enumeratedValue>
98509              </enumeratedValues>
98510            </field>
98511            <field>
98512              <name>LK</name>
98513              <description>Lock Register</description>
98514              <bitOffset>15</bitOffset>
98515              <bitWidth>1</bitWidth>
98516              <access>read-write</access>
98517              <enumeratedValues>
98518                <enumeratedValue>
98519                  <name>0</name>
98520                  <description>Pin Control Register fields [15:0] are not locked.</description>
98521                  <value>#0</value>
98522                </enumeratedValue>
98523                <enumeratedValue>
98524                  <name>1</name>
98525                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
98526                  <value>#1</value>
98527                </enumeratedValue>
98528              </enumeratedValues>
98529            </field>
98530            <field>
98531              <name>IRQC</name>
98532              <description>Interrupt Configuration</description>
98533              <bitOffset>16</bitOffset>
98534              <bitWidth>4</bitWidth>
98535              <access>read-write</access>
98536              <enumeratedValues>
98537                <enumeratedValue>
98538                  <name>0000</name>
98539                  <description>Interrupt Status Flag (ISF) is disabled.</description>
98540                  <value>#0000</value>
98541                </enumeratedValue>
98542                <enumeratedValue>
98543                  <name>0001</name>
98544                  <description>ISF flag and DMA request on rising edge.</description>
98545                  <value>#0001</value>
98546                </enumeratedValue>
98547                <enumeratedValue>
98548                  <name>0010</name>
98549                  <description>ISF flag and DMA request on falling edge.</description>
98550                  <value>#0010</value>
98551                </enumeratedValue>
98552                <enumeratedValue>
98553                  <name>0011</name>
98554                  <description>ISF flag and DMA request on either edge.</description>
98555                  <value>#0011</value>
98556                </enumeratedValue>
98557                <enumeratedValue>
98558                  <name>1000</name>
98559                  <description>ISF flag and Interrupt when logic 0.</description>
98560                  <value>#1000</value>
98561                </enumeratedValue>
98562                <enumeratedValue>
98563                  <name>1001</name>
98564                  <description>ISF flag and Interrupt on rising-edge.</description>
98565                  <value>#1001</value>
98566                </enumeratedValue>
98567                <enumeratedValue>
98568                  <name>1010</name>
98569                  <description>ISF flag and Interrupt on falling-edge.</description>
98570                  <value>#1010</value>
98571                </enumeratedValue>
98572                <enumeratedValue>
98573                  <name>1011</name>
98574                  <description>ISF flag and Interrupt on either edge.</description>
98575                  <value>#1011</value>
98576                </enumeratedValue>
98577                <enumeratedValue>
98578                  <name>1100</name>
98579                  <description>ISF flag and Interrupt when logic 1.</description>
98580                  <value>#1100</value>
98581                </enumeratedValue>
98582              </enumeratedValues>
98583            </field>
98584            <field>
98585              <name>ISF</name>
98586              <description>Interrupt Status Flag</description>
98587              <bitOffset>24</bitOffset>
98588              <bitWidth>1</bitWidth>
98589              <access>read-write</access>
98590              <enumeratedValues>
98591                <enumeratedValue>
98592                  <name>0</name>
98593                  <description>Configured interrupt is not detected.</description>
98594                  <value>#0</value>
98595                </enumeratedValue>
98596                <enumeratedValue>
98597                  <name>1</name>
98598                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
98599                  <value>#1</value>
98600                </enumeratedValue>
98601              </enumeratedValues>
98602            </field>
98603          </fields>
98604        </register>
98605        <register>
98606          <name>PCR7</name>
98607          <description>Pin Control Register n</description>
98608          <addressOffset>0x1C</addressOffset>
98609          <size>32</size>
98610          <access>read-write</access>
98611          <resetValue>0</resetValue>
98612          <resetMask>0xFFFFFFFF</resetMask>
98613          <fields>
98614            <field>
98615              <name>PS</name>
98616              <description>Pull Select</description>
98617              <bitOffset>0</bitOffset>
98618              <bitWidth>1</bitWidth>
98619              <access>read-write</access>
98620              <enumeratedValues>
98621                <enumeratedValue>
98622                  <name>0</name>
98623                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
98624                  <value>#0</value>
98625                </enumeratedValue>
98626                <enumeratedValue>
98627                  <name>1</name>
98628                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
98629                  <value>#1</value>
98630                </enumeratedValue>
98631              </enumeratedValues>
98632            </field>
98633            <field>
98634              <name>PE</name>
98635              <description>Pull Enable</description>
98636              <bitOffset>1</bitOffset>
98637              <bitWidth>1</bitWidth>
98638              <access>read-write</access>
98639              <enumeratedValues>
98640                <enumeratedValue>
98641                  <name>0</name>
98642                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
98643                  <value>#0</value>
98644                </enumeratedValue>
98645                <enumeratedValue>
98646                  <name>1</name>
98647                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
98648                  <value>#1</value>
98649                </enumeratedValue>
98650              </enumeratedValues>
98651            </field>
98652            <field>
98653              <name>SRE</name>
98654              <description>Slew Rate Enable</description>
98655              <bitOffset>2</bitOffset>
98656              <bitWidth>1</bitWidth>
98657              <access>read-write</access>
98658              <enumeratedValues>
98659                <enumeratedValue>
98660                  <name>0</name>
98661                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
98662                  <value>#0</value>
98663                </enumeratedValue>
98664                <enumeratedValue>
98665                  <name>1</name>
98666                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
98667                  <value>#1</value>
98668                </enumeratedValue>
98669              </enumeratedValues>
98670            </field>
98671            <field>
98672              <name>PFE</name>
98673              <description>Passive Filter Enable</description>
98674              <bitOffset>4</bitOffset>
98675              <bitWidth>1</bitWidth>
98676              <access>read-only</access>
98677              <enumeratedValues>
98678                <enumeratedValue>
98679                  <name>0</name>
98680                  <description>Passive input filter is disabled on the corresponding pin.</description>
98681                  <value>#0</value>
98682                </enumeratedValue>
98683                <enumeratedValue>
98684                  <name>1</name>
98685                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
98686                  <value>#1</value>
98687                </enumeratedValue>
98688              </enumeratedValues>
98689            </field>
98690            <field>
98691              <name>ODE</name>
98692              <description>Open Drain Enable</description>
98693              <bitOffset>5</bitOffset>
98694              <bitWidth>1</bitWidth>
98695              <access>read-write</access>
98696              <enumeratedValues>
98697                <enumeratedValue>
98698                  <name>0</name>
98699                  <description>Open drain output is disabled on the corresponding pin.</description>
98700                  <value>#0</value>
98701                </enumeratedValue>
98702                <enumeratedValue>
98703                  <name>1</name>
98704                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
98705                  <value>#1</value>
98706                </enumeratedValue>
98707              </enumeratedValues>
98708            </field>
98709            <field>
98710              <name>DSE</name>
98711              <description>Drive Strength Enable</description>
98712              <bitOffset>6</bitOffset>
98713              <bitWidth>1</bitWidth>
98714              <access>read-write</access>
98715              <enumeratedValues>
98716                <enumeratedValue>
98717                  <name>0</name>
98718                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
98719                  <value>#0</value>
98720                </enumeratedValue>
98721                <enumeratedValue>
98722                  <name>1</name>
98723                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
98724                  <value>#1</value>
98725                </enumeratedValue>
98726              </enumeratedValues>
98727            </field>
98728            <field>
98729              <name>MUX</name>
98730              <description>Pin Mux Control</description>
98731              <bitOffset>8</bitOffset>
98732              <bitWidth>3</bitWidth>
98733              <access>read-write</access>
98734              <enumeratedValues>
98735                <enumeratedValue>
98736                  <name>000</name>
98737                  <description>Pin disabled (Alternative 0) (analog).</description>
98738                  <value>#000</value>
98739                </enumeratedValue>
98740                <enumeratedValue>
98741                  <name>001</name>
98742                  <description>Alternative 1 (GPIO).</description>
98743                  <value>#001</value>
98744                </enumeratedValue>
98745                <enumeratedValue>
98746                  <name>010</name>
98747                  <description>Alternative 2 (chip-specific).</description>
98748                  <value>#010</value>
98749                </enumeratedValue>
98750                <enumeratedValue>
98751                  <name>011</name>
98752                  <description>Alternative 3 (chip-specific).</description>
98753                  <value>#011</value>
98754                </enumeratedValue>
98755                <enumeratedValue>
98756                  <name>100</name>
98757                  <description>Alternative 4 (chip-specific).</description>
98758                  <value>#100</value>
98759                </enumeratedValue>
98760                <enumeratedValue>
98761                  <name>101</name>
98762                  <description>Alternative 5 (chip-specific).</description>
98763                  <value>#101</value>
98764                </enumeratedValue>
98765                <enumeratedValue>
98766                  <name>110</name>
98767                  <description>Alternative 6 (chip-specific).</description>
98768                  <value>#110</value>
98769                </enumeratedValue>
98770                <enumeratedValue>
98771                  <name>111</name>
98772                  <description>Alternative 7 (chip-specific).</description>
98773                  <value>#111</value>
98774                </enumeratedValue>
98775              </enumeratedValues>
98776            </field>
98777            <field>
98778              <name>LK</name>
98779              <description>Lock Register</description>
98780              <bitOffset>15</bitOffset>
98781              <bitWidth>1</bitWidth>
98782              <access>read-write</access>
98783              <enumeratedValues>
98784                <enumeratedValue>
98785                  <name>0</name>
98786                  <description>Pin Control Register fields [15:0] are not locked.</description>
98787                  <value>#0</value>
98788                </enumeratedValue>
98789                <enumeratedValue>
98790                  <name>1</name>
98791                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
98792                  <value>#1</value>
98793                </enumeratedValue>
98794              </enumeratedValues>
98795            </field>
98796            <field>
98797              <name>IRQC</name>
98798              <description>Interrupt Configuration</description>
98799              <bitOffset>16</bitOffset>
98800              <bitWidth>4</bitWidth>
98801              <access>read-write</access>
98802              <enumeratedValues>
98803                <enumeratedValue>
98804                  <name>0000</name>
98805                  <description>Interrupt Status Flag (ISF) is disabled.</description>
98806                  <value>#0000</value>
98807                </enumeratedValue>
98808                <enumeratedValue>
98809                  <name>0001</name>
98810                  <description>ISF flag and DMA request on rising edge.</description>
98811                  <value>#0001</value>
98812                </enumeratedValue>
98813                <enumeratedValue>
98814                  <name>0010</name>
98815                  <description>ISF flag and DMA request on falling edge.</description>
98816                  <value>#0010</value>
98817                </enumeratedValue>
98818                <enumeratedValue>
98819                  <name>0011</name>
98820                  <description>ISF flag and DMA request on either edge.</description>
98821                  <value>#0011</value>
98822                </enumeratedValue>
98823                <enumeratedValue>
98824                  <name>1000</name>
98825                  <description>ISF flag and Interrupt when logic 0.</description>
98826                  <value>#1000</value>
98827                </enumeratedValue>
98828                <enumeratedValue>
98829                  <name>1001</name>
98830                  <description>ISF flag and Interrupt on rising-edge.</description>
98831                  <value>#1001</value>
98832                </enumeratedValue>
98833                <enumeratedValue>
98834                  <name>1010</name>
98835                  <description>ISF flag and Interrupt on falling-edge.</description>
98836                  <value>#1010</value>
98837                </enumeratedValue>
98838                <enumeratedValue>
98839                  <name>1011</name>
98840                  <description>ISF flag and Interrupt on either edge.</description>
98841                  <value>#1011</value>
98842                </enumeratedValue>
98843                <enumeratedValue>
98844                  <name>1100</name>
98845                  <description>ISF flag and Interrupt when logic 1.</description>
98846                  <value>#1100</value>
98847                </enumeratedValue>
98848              </enumeratedValues>
98849            </field>
98850            <field>
98851              <name>ISF</name>
98852              <description>Interrupt Status Flag</description>
98853              <bitOffset>24</bitOffset>
98854              <bitWidth>1</bitWidth>
98855              <access>read-write</access>
98856              <enumeratedValues>
98857                <enumeratedValue>
98858                  <name>0</name>
98859                  <description>Configured interrupt is not detected.</description>
98860                  <value>#0</value>
98861                </enumeratedValue>
98862                <enumeratedValue>
98863                  <name>1</name>
98864                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
98865                  <value>#1</value>
98866                </enumeratedValue>
98867              </enumeratedValues>
98868            </field>
98869          </fields>
98870        </register>
98871        <register>
98872          <name>PCR8</name>
98873          <description>Pin Control Register n</description>
98874          <addressOffset>0x20</addressOffset>
98875          <size>32</size>
98876          <access>read-write</access>
98877          <resetValue>0</resetValue>
98878          <resetMask>0xFFFFFFFF</resetMask>
98879          <fields>
98880            <field>
98881              <name>PS</name>
98882              <description>Pull Select</description>
98883              <bitOffset>0</bitOffset>
98884              <bitWidth>1</bitWidth>
98885              <access>read-write</access>
98886              <enumeratedValues>
98887                <enumeratedValue>
98888                  <name>0</name>
98889                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
98890                  <value>#0</value>
98891                </enumeratedValue>
98892                <enumeratedValue>
98893                  <name>1</name>
98894                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
98895                  <value>#1</value>
98896                </enumeratedValue>
98897              </enumeratedValues>
98898            </field>
98899            <field>
98900              <name>PE</name>
98901              <description>Pull Enable</description>
98902              <bitOffset>1</bitOffset>
98903              <bitWidth>1</bitWidth>
98904              <access>read-write</access>
98905              <enumeratedValues>
98906                <enumeratedValue>
98907                  <name>0</name>
98908                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
98909                  <value>#0</value>
98910                </enumeratedValue>
98911                <enumeratedValue>
98912                  <name>1</name>
98913                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
98914                  <value>#1</value>
98915                </enumeratedValue>
98916              </enumeratedValues>
98917            </field>
98918            <field>
98919              <name>SRE</name>
98920              <description>Slew Rate Enable</description>
98921              <bitOffset>2</bitOffset>
98922              <bitWidth>1</bitWidth>
98923              <access>read-write</access>
98924              <enumeratedValues>
98925                <enumeratedValue>
98926                  <name>0</name>
98927                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
98928                  <value>#0</value>
98929                </enumeratedValue>
98930                <enumeratedValue>
98931                  <name>1</name>
98932                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
98933                  <value>#1</value>
98934                </enumeratedValue>
98935              </enumeratedValues>
98936            </field>
98937            <field>
98938              <name>PFE</name>
98939              <description>Passive Filter Enable</description>
98940              <bitOffset>4</bitOffset>
98941              <bitWidth>1</bitWidth>
98942              <access>read-only</access>
98943              <enumeratedValues>
98944                <enumeratedValue>
98945                  <name>0</name>
98946                  <description>Passive input filter is disabled on the corresponding pin.</description>
98947                  <value>#0</value>
98948                </enumeratedValue>
98949                <enumeratedValue>
98950                  <name>1</name>
98951                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
98952                  <value>#1</value>
98953                </enumeratedValue>
98954              </enumeratedValues>
98955            </field>
98956            <field>
98957              <name>ODE</name>
98958              <description>Open Drain Enable</description>
98959              <bitOffset>5</bitOffset>
98960              <bitWidth>1</bitWidth>
98961              <access>read-write</access>
98962              <enumeratedValues>
98963                <enumeratedValue>
98964                  <name>0</name>
98965                  <description>Open drain output is disabled on the corresponding pin.</description>
98966                  <value>#0</value>
98967                </enumeratedValue>
98968                <enumeratedValue>
98969                  <name>1</name>
98970                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
98971                  <value>#1</value>
98972                </enumeratedValue>
98973              </enumeratedValues>
98974            </field>
98975            <field>
98976              <name>DSE</name>
98977              <description>Drive Strength Enable</description>
98978              <bitOffset>6</bitOffset>
98979              <bitWidth>1</bitWidth>
98980              <access>read-write</access>
98981              <enumeratedValues>
98982                <enumeratedValue>
98983                  <name>0</name>
98984                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
98985                  <value>#0</value>
98986                </enumeratedValue>
98987                <enumeratedValue>
98988                  <name>1</name>
98989                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
98990                  <value>#1</value>
98991                </enumeratedValue>
98992              </enumeratedValues>
98993            </field>
98994            <field>
98995              <name>MUX</name>
98996              <description>Pin Mux Control</description>
98997              <bitOffset>8</bitOffset>
98998              <bitWidth>3</bitWidth>
98999              <access>read-write</access>
99000              <enumeratedValues>
99001                <enumeratedValue>
99002                  <name>000</name>
99003                  <description>Pin disabled (Alternative 0) (analog).</description>
99004                  <value>#000</value>
99005                </enumeratedValue>
99006                <enumeratedValue>
99007                  <name>001</name>
99008                  <description>Alternative 1 (GPIO).</description>
99009                  <value>#001</value>
99010                </enumeratedValue>
99011                <enumeratedValue>
99012                  <name>010</name>
99013                  <description>Alternative 2 (chip-specific).</description>
99014                  <value>#010</value>
99015                </enumeratedValue>
99016                <enumeratedValue>
99017                  <name>011</name>
99018                  <description>Alternative 3 (chip-specific).</description>
99019                  <value>#011</value>
99020                </enumeratedValue>
99021                <enumeratedValue>
99022                  <name>100</name>
99023                  <description>Alternative 4 (chip-specific).</description>
99024                  <value>#100</value>
99025                </enumeratedValue>
99026                <enumeratedValue>
99027                  <name>101</name>
99028                  <description>Alternative 5 (chip-specific).</description>
99029                  <value>#101</value>
99030                </enumeratedValue>
99031                <enumeratedValue>
99032                  <name>110</name>
99033                  <description>Alternative 6 (chip-specific).</description>
99034                  <value>#110</value>
99035                </enumeratedValue>
99036                <enumeratedValue>
99037                  <name>111</name>
99038                  <description>Alternative 7 (chip-specific).</description>
99039                  <value>#111</value>
99040                </enumeratedValue>
99041              </enumeratedValues>
99042            </field>
99043            <field>
99044              <name>LK</name>
99045              <description>Lock Register</description>
99046              <bitOffset>15</bitOffset>
99047              <bitWidth>1</bitWidth>
99048              <access>read-write</access>
99049              <enumeratedValues>
99050                <enumeratedValue>
99051                  <name>0</name>
99052                  <description>Pin Control Register fields [15:0] are not locked.</description>
99053                  <value>#0</value>
99054                </enumeratedValue>
99055                <enumeratedValue>
99056                  <name>1</name>
99057                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
99058                  <value>#1</value>
99059                </enumeratedValue>
99060              </enumeratedValues>
99061            </field>
99062            <field>
99063              <name>IRQC</name>
99064              <description>Interrupt Configuration</description>
99065              <bitOffset>16</bitOffset>
99066              <bitWidth>4</bitWidth>
99067              <access>read-write</access>
99068              <enumeratedValues>
99069                <enumeratedValue>
99070                  <name>0000</name>
99071                  <description>Interrupt Status Flag (ISF) is disabled.</description>
99072                  <value>#0000</value>
99073                </enumeratedValue>
99074                <enumeratedValue>
99075                  <name>0001</name>
99076                  <description>ISF flag and DMA request on rising edge.</description>
99077                  <value>#0001</value>
99078                </enumeratedValue>
99079                <enumeratedValue>
99080                  <name>0010</name>
99081                  <description>ISF flag and DMA request on falling edge.</description>
99082                  <value>#0010</value>
99083                </enumeratedValue>
99084                <enumeratedValue>
99085                  <name>0011</name>
99086                  <description>ISF flag and DMA request on either edge.</description>
99087                  <value>#0011</value>
99088                </enumeratedValue>
99089                <enumeratedValue>
99090                  <name>1000</name>
99091                  <description>ISF flag and Interrupt when logic 0.</description>
99092                  <value>#1000</value>
99093                </enumeratedValue>
99094                <enumeratedValue>
99095                  <name>1001</name>
99096                  <description>ISF flag and Interrupt on rising-edge.</description>
99097                  <value>#1001</value>
99098                </enumeratedValue>
99099                <enumeratedValue>
99100                  <name>1010</name>
99101                  <description>ISF flag and Interrupt on falling-edge.</description>
99102                  <value>#1010</value>
99103                </enumeratedValue>
99104                <enumeratedValue>
99105                  <name>1011</name>
99106                  <description>ISF flag and Interrupt on either edge.</description>
99107                  <value>#1011</value>
99108                </enumeratedValue>
99109                <enumeratedValue>
99110                  <name>1100</name>
99111                  <description>ISF flag and Interrupt when logic 1.</description>
99112                  <value>#1100</value>
99113                </enumeratedValue>
99114              </enumeratedValues>
99115            </field>
99116            <field>
99117              <name>ISF</name>
99118              <description>Interrupt Status Flag</description>
99119              <bitOffset>24</bitOffset>
99120              <bitWidth>1</bitWidth>
99121              <access>read-write</access>
99122              <enumeratedValues>
99123                <enumeratedValue>
99124                  <name>0</name>
99125                  <description>Configured interrupt is not detected.</description>
99126                  <value>#0</value>
99127                </enumeratedValue>
99128                <enumeratedValue>
99129                  <name>1</name>
99130                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
99131                  <value>#1</value>
99132                </enumeratedValue>
99133              </enumeratedValues>
99134            </field>
99135          </fields>
99136        </register>
99137        <register>
99138          <name>PCR9</name>
99139          <description>Pin Control Register n</description>
99140          <addressOffset>0x24</addressOffset>
99141          <size>32</size>
99142          <access>read-write</access>
99143          <resetValue>0</resetValue>
99144          <resetMask>0xFFFFFFFF</resetMask>
99145          <fields>
99146            <field>
99147              <name>PS</name>
99148              <description>Pull Select</description>
99149              <bitOffset>0</bitOffset>
99150              <bitWidth>1</bitWidth>
99151              <access>read-write</access>
99152              <enumeratedValues>
99153                <enumeratedValue>
99154                  <name>0</name>
99155                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
99156                  <value>#0</value>
99157                </enumeratedValue>
99158                <enumeratedValue>
99159                  <name>1</name>
99160                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
99161                  <value>#1</value>
99162                </enumeratedValue>
99163              </enumeratedValues>
99164            </field>
99165            <field>
99166              <name>PE</name>
99167              <description>Pull Enable</description>
99168              <bitOffset>1</bitOffset>
99169              <bitWidth>1</bitWidth>
99170              <access>read-write</access>
99171              <enumeratedValues>
99172                <enumeratedValue>
99173                  <name>0</name>
99174                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
99175                  <value>#0</value>
99176                </enumeratedValue>
99177                <enumeratedValue>
99178                  <name>1</name>
99179                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
99180                  <value>#1</value>
99181                </enumeratedValue>
99182              </enumeratedValues>
99183            </field>
99184            <field>
99185              <name>SRE</name>
99186              <description>Slew Rate Enable</description>
99187              <bitOffset>2</bitOffset>
99188              <bitWidth>1</bitWidth>
99189              <access>read-write</access>
99190              <enumeratedValues>
99191                <enumeratedValue>
99192                  <name>0</name>
99193                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
99194                  <value>#0</value>
99195                </enumeratedValue>
99196                <enumeratedValue>
99197                  <name>1</name>
99198                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
99199                  <value>#1</value>
99200                </enumeratedValue>
99201              </enumeratedValues>
99202            </field>
99203            <field>
99204              <name>PFE</name>
99205              <description>Passive Filter Enable</description>
99206              <bitOffset>4</bitOffset>
99207              <bitWidth>1</bitWidth>
99208              <access>read-only</access>
99209              <enumeratedValues>
99210                <enumeratedValue>
99211                  <name>0</name>
99212                  <description>Passive input filter is disabled on the corresponding pin.</description>
99213                  <value>#0</value>
99214                </enumeratedValue>
99215                <enumeratedValue>
99216                  <name>1</name>
99217                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
99218                  <value>#1</value>
99219                </enumeratedValue>
99220              </enumeratedValues>
99221            </field>
99222            <field>
99223              <name>ODE</name>
99224              <description>Open Drain Enable</description>
99225              <bitOffset>5</bitOffset>
99226              <bitWidth>1</bitWidth>
99227              <access>read-write</access>
99228              <enumeratedValues>
99229                <enumeratedValue>
99230                  <name>0</name>
99231                  <description>Open drain output is disabled on the corresponding pin.</description>
99232                  <value>#0</value>
99233                </enumeratedValue>
99234                <enumeratedValue>
99235                  <name>1</name>
99236                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
99237                  <value>#1</value>
99238                </enumeratedValue>
99239              </enumeratedValues>
99240            </field>
99241            <field>
99242              <name>DSE</name>
99243              <description>Drive Strength Enable</description>
99244              <bitOffset>6</bitOffset>
99245              <bitWidth>1</bitWidth>
99246              <access>read-write</access>
99247              <enumeratedValues>
99248                <enumeratedValue>
99249                  <name>0</name>
99250                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
99251                  <value>#0</value>
99252                </enumeratedValue>
99253                <enumeratedValue>
99254                  <name>1</name>
99255                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
99256                  <value>#1</value>
99257                </enumeratedValue>
99258              </enumeratedValues>
99259            </field>
99260            <field>
99261              <name>MUX</name>
99262              <description>Pin Mux Control</description>
99263              <bitOffset>8</bitOffset>
99264              <bitWidth>3</bitWidth>
99265              <access>read-write</access>
99266              <enumeratedValues>
99267                <enumeratedValue>
99268                  <name>000</name>
99269                  <description>Pin disabled (Alternative 0) (analog).</description>
99270                  <value>#000</value>
99271                </enumeratedValue>
99272                <enumeratedValue>
99273                  <name>001</name>
99274                  <description>Alternative 1 (GPIO).</description>
99275                  <value>#001</value>
99276                </enumeratedValue>
99277                <enumeratedValue>
99278                  <name>010</name>
99279                  <description>Alternative 2 (chip-specific).</description>
99280                  <value>#010</value>
99281                </enumeratedValue>
99282                <enumeratedValue>
99283                  <name>011</name>
99284                  <description>Alternative 3 (chip-specific).</description>
99285                  <value>#011</value>
99286                </enumeratedValue>
99287                <enumeratedValue>
99288                  <name>100</name>
99289                  <description>Alternative 4 (chip-specific).</description>
99290                  <value>#100</value>
99291                </enumeratedValue>
99292                <enumeratedValue>
99293                  <name>101</name>
99294                  <description>Alternative 5 (chip-specific).</description>
99295                  <value>#101</value>
99296                </enumeratedValue>
99297                <enumeratedValue>
99298                  <name>110</name>
99299                  <description>Alternative 6 (chip-specific).</description>
99300                  <value>#110</value>
99301                </enumeratedValue>
99302                <enumeratedValue>
99303                  <name>111</name>
99304                  <description>Alternative 7 (chip-specific).</description>
99305                  <value>#111</value>
99306                </enumeratedValue>
99307              </enumeratedValues>
99308            </field>
99309            <field>
99310              <name>LK</name>
99311              <description>Lock Register</description>
99312              <bitOffset>15</bitOffset>
99313              <bitWidth>1</bitWidth>
99314              <access>read-write</access>
99315              <enumeratedValues>
99316                <enumeratedValue>
99317                  <name>0</name>
99318                  <description>Pin Control Register fields [15:0] are not locked.</description>
99319                  <value>#0</value>
99320                </enumeratedValue>
99321                <enumeratedValue>
99322                  <name>1</name>
99323                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
99324                  <value>#1</value>
99325                </enumeratedValue>
99326              </enumeratedValues>
99327            </field>
99328            <field>
99329              <name>IRQC</name>
99330              <description>Interrupt Configuration</description>
99331              <bitOffset>16</bitOffset>
99332              <bitWidth>4</bitWidth>
99333              <access>read-write</access>
99334              <enumeratedValues>
99335                <enumeratedValue>
99336                  <name>0000</name>
99337                  <description>Interrupt Status Flag (ISF) is disabled.</description>
99338                  <value>#0000</value>
99339                </enumeratedValue>
99340                <enumeratedValue>
99341                  <name>0001</name>
99342                  <description>ISF flag and DMA request on rising edge.</description>
99343                  <value>#0001</value>
99344                </enumeratedValue>
99345                <enumeratedValue>
99346                  <name>0010</name>
99347                  <description>ISF flag and DMA request on falling edge.</description>
99348                  <value>#0010</value>
99349                </enumeratedValue>
99350                <enumeratedValue>
99351                  <name>0011</name>
99352                  <description>ISF flag and DMA request on either edge.</description>
99353                  <value>#0011</value>
99354                </enumeratedValue>
99355                <enumeratedValue>
99356                  <name>1000</name>
99357                  <description>ISF flag and Interrupt when logic 0.</description>
99358                  <value>#1000</value>
99359                </enumeratedValue>
99360                <enumeratedValue>
99361                  <name>1001</name>
99362                  <description>ISF flag and Interrupt on rising-edge.</description>
99363                  <value>#1001</value>
99364                </enumeratedValue>
99365                <enumeratedValue>
99366                  <name>1010</name>
99367                  <description>ISF flag and Interrupt on falling-edge.</description>
99368                  <value>#1010</value>
99369                </enumeratedValue>
99370                <enumeratedValue>
99371                  <name>1011</name>
99372                  <description>ISF flag and Interrupt on either edge.</description>
99373                  <value>#1011</value>
99374                </enumeratedValue>
99375                <enumeratedValue>
99376                  <name>1100</name>
99377                  <description>ISF flag and Interrupt when logic 1.</description>
99378                  <value>#1100</value>
99379                </enumeratedValue>
99380              </enumeratedValues>
99381            </field>
99382            <field>
99383              <name>ISF</name>
99384              <description>Interrupt Status Flag</description>
99385              <bitOffset>24</bitOffset>
99386              <bitWidth>1</bitWidth>
99387              <access>read-write</access>
99388              <enumeratedValues>
99389                <enumeratedValue>
99390                  <name>0</name>
99391                  <description>Configured interrupt is not detected.</description>
99392                  <value>#0</value>
99393                </enumeratedValue>
99394                <enumeratedValue>
99395                  <name>1</name>
99396                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
99397                  <value>#1</value>
99398                </enumeratedValue>
99399              </enumeratedValues>
99400            </field>
99401          </fields>
99402        </register>
99403        <register>
99404          <name>PCR10</name>
99405          <description>Pin Control Register n</description>
99406          <addressOffset>0x28</addressOffset>
99407          <size>32</size>
99408          <access>read-write</access>
99409          <resetValue>0</resetValue>
99410          <resetMask>0xFFFFFFFF</resetMask>
99411          <fields>
99412            <field>
99413              <name>PS</name>
99414              <description>Pull Select</description>
99415              <bitOffset>0</bitOffset>
99416              <bitWidth>1</bitWidth>
99417              <access>read-write</access>
99418              <enumeratedValues>
99419                <enumeratedValue>
99420                  <name>0</name>
99421                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
99422                  <value>#0</value>
99423                </enumeratedValue>
99424                <enumeratedValue>
99425                  <name>1</name>
99426                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
99427                  <value>#1</value>
99428                </enumeratedValue>
99429              </enumeratedValues>
99430            </field>
99431            <field>
99432              <name>PE</name>
99433              <description>Pull Enable</description>
99434              <bitOffset>1</bitOffset>
99435              <bitWidth>1</bitWidth>
99436              <access>read-write</access>
99437              <enumeratedValues>
99438                <enumeratedValue>
99439                  <name>0</name>
99440                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
99441                  <value>#0</value>
99442                </enumeratedValue>
99443                <enumeratedValue>
99444                  <name>1</name>
99445                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
99446                  <value>#1</value>
99447                </enumeratedValue>
99448              </enumeratedValues>
99449            </field>
99450            <field>
99451              <name>SRE</name>
99452              <description>Slew Rate Enable</description>
99453              <bitOffset>2</bitOffset>
99454              <bitWidth>1</bitWidth>
99455              <access>read-write</access>
99456              <enumeratedValues>
99457                <enumeratedValue>
99458                  <name>0</name>
99459                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
99460                  <value>#0</value>
99461                </enumeratedValue>
99462                <enumeratedValue>
99463                  <name>1</name>
99464                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
99465                  <value>#1</value>
99466                </enumeratedValue>
99467              </enumeratedValues>
99468            </field>
99469            <field>
99470              <name>PFE</name>
99471              <description>Passive Filter Enable</description>
99472              <bitOffset>4</bitOffset>
99473              <bitWidth>1</bitWidth>
99474              <access>read-only</access>
99475              <enumeratedValues>
99476                <enumeratedValue>
99477                  <name>0</name>
99478                  <description>Passive input filter is disabled on the corresponding pin.</description>
99479                  <value>#0</value>
99480                </enumeratedValue>
99481                <enumeratedValue>
99482                  <name>1</name>
99483                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
99484                  <value>#1</value>
99485                </enumeratedValue>
99486              </enumeratedValues>
99487            </field>
99488            <field>
99489              <name>ODE</name>
99490              <description>Open Drain Enable</description>
99491              <bitOffset>5</bitOffset>
99492              <bitWidth>1</bitWidth>
99493              <access>read-write</access>
99494              <enumeratedValues>
99495                <enumeratedValue>
99496                  <name>0</name>
99497                  <description>Open drain output is disabled on the corresponding pin.</description>
99498                  <value>#0</value>
99499                </enumeratedValue>
99500                <enumeratedValue>
99501                  <name>1</name>
99502                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
99503                  <value>#1</value>
99504                </enumeratedValue>
99505              </enumeratedValues>
99506            </field>
99507            <field>
99508              <name>DSE</name>
99509              <description>Drive Strength Enable</description>
99510              <bitOffset>6</bitOffset>
99511              <bitWidth>1</bitWidth>
99512              <access>read-write</access>
99513              <enumeratedValues>
99514                <enumeratedValue>
99515                  <name>0</name>
99516                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
99517                  <value>#0</value>
99518                </enumeratedValue>
99519                <enumeratedValue>
99520                  <name>1</name>
99521                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
99522                  <value>#1</value>
99523                </enumeratedValue>
99524              </enumeratedValues>
99525            </field>
99526            <field>
99527              <name>MUX</name>
99528              <description>Pin Mux Control</description>
99529              <bitOffset>8</bitOffset>
99530              <bitWidth>3</bitWidth>
99531              <access>read-write</access>
99532              <enumeratedValues>
99533                <enumeratedValue>
99534                  <name>000</name>
99535                  <description>Pin disabled (Alternative 0) (analog).</description>
99536                  <value>#000</value>
99537                </enumeratedValue>
99538                <enumeratedValue>
99539                  <name>001</name>
99540                  <description>Alternative 1 (GPIO).</description>
99541                  <value>#001</value>
99542                </enumeratedValue>
99543                <enumeratedValue>
99544                  <name>010</name>
99545                  <description>Alternative 2 (chip-specific).</description>
99546                  <value>#010</value>
99547                </enumeratedValue>
99548                <enumeratedValue>
99549                  <name>011</name>
99550                  <description>Alternative 3 (chip-specific).</description>
99551                  <value>#011</value>
99552                </enumeratedValue>
99553                <enumeratedValue>
99554                  <name>100</name>
99555                  <description>Alternative 4 (chip-specific).</description>
99556                  <value>#100</value>
99557                </enumeratedValue>
99558                <enumeratedValue>
99559                  <name>101</name>
99560                  <description>Alternative 5 (chip-specific).</description>
99561                  <value>#101</value>
99562                </enumeratedValue>
99563                <enumeratedValue>
99564                  <name>110</name>
99565                  <description>Alternative 6 (chip-specific).</description>
99566                  <value>#110</value>
99567                </enumeratedValue>
99568                <enumeratedValue>
99569                  <name>111</name>
99570                  <description>Alternative 7 (chip-specific).</description>
99571                  <value>#111</value>
99572                </enumeratedValue>
99573              </enumeratedValues>
99574            </field>
99575            <field>
99576              <name>LK</name>
99577              <description>Lock Register</description>
99578              <bitOffset>15</bitOffset>
99579              <bitWidth>1</bitWidth>
99580              <access>read-write</access>
99581              <enumeratedValues>
99582                <enumeratedValue>
99583                  <name>0</name>
99584                  <description>Pin Control Register fields [15:0] are not locked.</description>
99585                  <value>#0</value>
99586                </enumeratedValue>
99587                <enumeratedValue>
99588                  <name>1</name>
99589                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
99590                  <value>#1</value>
99591                </enumeratedValue>
99592              </enumeratedValues>
99593            </field>
99594            <field>
99595              <name>IRQC</name>
99596              <description>Interrupt Configuration</description>
99597              <bitOffset>16</bitOffset>
99598              <bitWidth>4</bitWidth>
99599              <access>read-write</access>
99600              <enumeratedValues>
99601                <enumeratedValue>
99602                  <name>0000</name>
99603                  <description>Interrupt Status Flag (ISF) is disabled.</description>
99604                  <value>#0000</value>
99605                </enumeratedValue>
99606                <enumeratedValue>
99607                  <name>0001</name>
99608                  <description>ISF flag and DMA request on rising edge.</description>
99609                  <value>#0001</value>
99610                </enumeratedValue>
99611                <enumeratedValue>
99612                  <name>0010</name>
99613                  <description>ISF flag and DMA request on falling edge.</description>
99614                  <value>#0010</value>
99615                </enumeratedValue>
99616                <enumeratedValue>
99617                  <name>0011</name>
99618                  <description>ISF flag and DMA request on either edge.</description>
99619                  <value>#0011</value>
99620                </enumeratedValue>
99621                <enumeratedValue>
99622                  <name>1000</name>
99623                  <description>ISF flag and Interrupt when logic 0.</description>
99624                  <value>#1000</value>
99625                </enumeratedValue>
99626                <enumeratedValue>
99627                  <name>1001</name>
99628                  <description>ISF flag and Interrupt on rising-edge.</description>
99629                  <value>#1001</value>
99630                </enumeratedValue>
99631                <enumeratedValue>
99632                  <name>1010</name>
99633                  <description>ISF flag and Interrupt on falling-edge.</description>
99634                  <value>#1010</value>
99635                </enumeratedValue>
99636                <enumeratedValue>
99637                  <name>1011</name>
99638                  <description>ISF flag and Interrupt on either edge.</description>
99639                  <value>#1011</value>
99640                </enumeratedValue>
99641                <enumeratedValue>
99642                  <name>1100</name>
99643                  <description>ISF flag and Interrupt when logic 1.</description>
99644                  <value>#1100</value>
99645                </enumeratedValue>
99646              </enumeratedValues>
99647            </field>
99648            <field>
99649              <name>ISF</name>
99650              <description>Interrupt Status Flag</description>
99651              <bitOffset>24</bitOffset>
99652              <bitWidth>1</bitWidth>
99653              <access>read-write</access>
99654              <enumeratedValues>
99655                <enumeratedValue>
99656                  <name>0</name>
99657                  <description>Configured interrupt is not detected.</description>
99658                  <value>#0</value>
99659                </enumeratedValue>
99660                <enumeratedValue>
99661                  <name>1</name>
99662                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
99663                  <value>#1</value>
99664                </enumeratedValue>
99665              </enumeratedValues>
99666            </field>
99667          </fields>
99668        </register>
99669        <register>
99670          <name>PCR11</name>
99671          <description>Pin Control Register n</description>
99672          <addressOffset>0x2C</addressOffset>
99673          <size>32</size>
99674          <access>read-write</access>
99675          <resetValue>0</resetValue>
99676          <resetMask>0xFFFFFFFF</resetMask>
99677          <fields>
99678            <field>
99679              <name>PS</name>
99680              <description>Pull Select</description>
99681              <bitOffset>0</bitOffset>
99682              <bitWidth>1</bitWidth>
99683              <access>read-write</access>
99684              <enumeratedValues>
99685                <enumeratedValue>
99686                  <name>0</name>
99687                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
99688                  <value>#0</value>
99689                </enumeratedValue>
99690                <enumeratedValue>
99691                  <name>1</name>
99692                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
99693                  <value>#1</value>
99694                </enumeratedValue>
99695              </enumeratedValues>
99696            </field>
99697            <field>
99698              <name>PE</name>
99699              <description>Pull Enable</description>
99700              <bitOffset>1</bitOffset>
99701              <bitWidth>1</bitWidth>
99702              <access>read-write</access>
99703              <enumeratedValues>
99704                <enumeratedValue>
99705                  <name>0</name>
99706                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
99707                  <value>#0</value>
99708                </enumeratedValue>
99709                <enumeratedValue>
99710                  <name>1</name>
99711                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
99712                  <value>#1</value>
99713                </enumeratedValue>
99714              </enumeratedValues>
99715            </field>
99716            <field>
99717              <name>SRE</name>
99718              <description>Slew Rate Enable</description>
99719              <bitOffset>2</bitOffset>
99720              <bitWidth>1</bitWidth>
99721              <access>read-write</access>
99722              <enumeratedValues>
99723                <enumeratedValue>
99724                  <name>0</name>
99725                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
99726                  <value>#0</value>
99727                </enumeratedValue>
99728                <enumeratedValue>
99729                  <name>1</name>
99730                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
99731                  <value>#1</value>
99732                </enumeratedValue>
99733              </enumeratedValues>
99734            </field>
99735            <field>
99736              <name>PFE</name>
99737              <description>Passive Filter Enable</description>
99738              <bitOffset>4</bitOffset>
99739              <bitWidth>1</bitWidth>
99740              <access>read-only</access>
99741              <enumeratedValues>
99742                <enumeratedValue>
99743                  <name>0</name>
99744                  <description>Passive input filter is disabled on the corresponding pin.</description>
99745                  <value>#0</value>
99746                </enumeratedValue>
99747                <enumeratedValue>
99748                  <name>1</name>
99749                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
99750                  <value>#1</value>
99751                </enumeratedValue>
99752              </enumeratedValues>
99753            </field>
99754            <field>
99755              <name>ODE</name>
99756              <description>Open Drain Enable</description>
99757              <bitOffset>5</bitOffset>
99758              <bitWidth>1</bitWidth>
99759              <access>read-write</access>
99760              <enumeratedValues>
99761                <enumeratedValue>
99762                  <name>0</name>
99763                  <description>Open drain output is disabled on the corresponding pin.</description>
99764                  <value>#0</value>
99765                </enumeratedValue>
99766                <enumeratedValue>
99767                  <name>1</name>
99768                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
99769                  <value>#1</value>
99770                </enumeratedValue>
99771              </enumeratedValues>
99772            </field>
99773            <field>
99774              <name>DSE</name>
99775              <description>Drive Strength Enable</description>
99776              <bitOffset>6</bitOffset>
99777              <bitWidth>1</bitWidth>
99778              <access>read-write</access>
99779              <enumeratedValues>
99780                <enumeratedValue>
99781                  <name>0</name>
99782                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
99783                  <value>#0</value>
99784                </enumeratedValue>
99785                <enumeratedValue>
99786                  <name>1</name>
99787                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
99788                  <value>#1</value>
99789                </enumeratedValue>
99790              </enumeratedValues>
99791            </field>
99792            <field>
99793              <name>MUX</name>
99794              <description>Pin Mux Control</description>
99795              <bitOffset>8</bitOffset>
99796              <bitWidth>3</bitWidth>
99797              <access>read-write</access>
99798              <enumeratedValues>
99799                <enumeratedValue>
99800                  <name>000</name>
99801                  <description>Pin disabled (Alternative 0) (analog).</description>
99802                  <value>#000</value>
99803                </enumeratedValue>
99804                <enumeratedValue>
99805                  <name>001</name>
99806                  <description>Alternative 1 (GPIO).</description>
99807                  <value>#001</value>
99808                </enumeratedValue>
99809                <enumeratedValue>
99810                  <name>010</name>
99811                  <description>Alternative 2 (chip-specific).</description>
99812                  <value>#010</value>
99813                </enumeratedValue>
99814                <enumeratedValue>
99815                  <name>011</name>
99816                  <description>Alternative 3 (chip-specific).</description>
99817                  <value>#011</value>
99818                </enumeratedValue>
99819                <enumeratedValue>
99820                  <name>100</name>
99821                  <description>Alternative 4 (chip-specific).</description>
99822                  <value>#100</value>
99823                </enumeratedValue>
99824                <enumeratedValue>
99825                  <name>101</name>
99826                  <description>Alternative 5 (chip-specific).</description>
99827                  <value>#101</value>
99828                </enumeratedValue>
99829                <enumeratedValue>
99830                  <name>110</name>
99831                  <description>Alternative 6 (chip-specific).</description>
99832                  <value>#110</value>
99833                </enumeratedValue>
99834                <enumeratedValue>
99835                  <name>111</name>
99836                  <description>Alternative 7 (chip-specific).</description>
99837                  <value>#111</value>
99838                </enumeratedValue>
99839              </enumeratedValues>
99840            </field>
99841            <field>
99842              <name>LK</name>
99843              <description>Lock Register</description>
99844              <bitOffset>15</bitOffset>
99845              <bitWidth>1</bitWidth>
99846              <access>read-write</access>
99847              <enumeratedValues>
99848                <enumeratedValue>
99849                  <name>0</name>
99850                  <description>Pin Control Register fields [15:0] are not locked.</description>
99851                  <value>#0</value>
99852                </enumeratedValue>
99853                <enumeratedValue>
99854                  <name>1</name>
99855                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
99856                  <value>#1</value>
99857                </enumeratedValue>
99858              </enumeratedValues>
99859            </field>
99860            <field>
99861              <name>IRQC</name>
99862              <description>Interrupt Configuration</description>
99863              <bitOffset>16</bitOffset>
99864              <bitWidth>4</bitWidth>
99865              <access>read-write</access>
99866              <enumeratedValues>
99867                <enumeratedValue>
99868                  <name>0000</name>
99869                  <description>Interrupt Status Flag (ISF) is disabled.</description>
99870                  <value>#0000</value>
99871                </enumeratedValue>
99872                <enumeratedValue>
99873                  <name>0001</name>
99874                  <description>ISF flag and DMA request on rising edge.</description>
99875                  <value>#0001</value>
99876                </enumeratedValue>
99877                <enumeratedValue>
99878                  <name>0010</name>
99879                  <description>ISF flag and DMA request on falling edge.</description>
99880                  <value>#0010</value>
99881                </enumeratedValue>
99882                <enumeratedValue>
99883                  <name>0011</name>
99884                  <description>ISF flag and DMA request on either edge.</description>
99885                  <value>#0011</value>
99886                </enumeratedValue>
99887                <enumeratedValue>
99888                  <name>1000</name>
99889                  <description>ISF flag and Interrupt when logic 0.</description>
99890                  <value>#1000</value>
99891                </enumeratedValue>
99892                <enumeratedValue>
99893                  <name>1001</name>
99894                  <description>ISF flag and Interrupt on rising-edge.</description>
99895                  <value>#1001</value>
99896                </enumeratedValue>
99897                <enumeratedValue>
99898                  <name>1010</name>
99899                  <description>ISF flag and Interrupt on falling-edge.</description>
99900                  <value>#1010</value>
99901                </enumeratedValue>
99902                <enumeratedValue>
99903                  <name>1011</name>
99904                  <description>ISF flag and Interrupt on either edge.</description>
99905                  <value>#1011</value>
99906                </enumeratedValue>
99907                <enumeratedValue>
99908                  <name>1100</name>
99909                  <description>ISF flag and Interrupt when logic 1.</description>
99910                  <value>#1100</value>
99911                </enumeratedValue>
99912              </enumeratedValues>
99913            </field>
99914            <field>
99915              <name>ISF</name>
99916              <description>Interrupt Status Flag</description>
99917              <bitOffset>24</bitOffset>
99918              <bitWidth>1</bitWidth>
99919              <access>read-write</access>
99920              <enumeratedValues>
99921                <enumeratedValue>
99922                  <name>0</name>
99923                  <description>Configured interrupt is not detected.</description>
99924                  <value>#0</value>
99925                </enumeratedValue>
99926                <enumeratedValue>
99927                  <name>1</name>
99928                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
99929                  <value>#1</value>
99930                </enumeratedValue>
99931              </enumeratedValues>
99932            </field>
99933          </fields>
99934        </register>
99935        <register>
99936          <name>PCR12</name>
99937          <description>Pin Control Register n</description>
99938          <addressOffset>0x30</addressOffset>
99939          <size>32</size>
99940          <access>read-write</access>
99941          <resetValue>0</resetValue>
99942          <resetMask>0xFFFFFFFF</resetMask>
99943          <fields>
99944            <field>
99945              <name>PS</name>
99946              <description>Pull Select</description>
99947              <bitOffset>0</bitOffset>
99948              <bitWidth>1</bitWidth>
99949              <access>read-only</access>
99950              <enumeratedValues>
99951                <enumeratedValue>
99952                  <name>0</name>
99953                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
99954                  <value>#0</value>
99955                </enumeratedValue>
99956                <enumeratedValue>
99957                  <name>1</name>
99958                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
99959                  <value>#1</value>
99960                </enumeratedValue>
99961              </enumeratedValues>
99962            </field>
99963            <field>
99964              <name>PE</name>
99965              <description>Pull Enable</description>
99966              <bitOffset>1</bitOffset>
99967              <bitWidth>1</bitWidth>
99968              <access>read-only</access>
99969              <enumeratedValues>
99970                <enumeratedValue>
99971                  <name>0</name>
99972                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
99973                  <value>#0</value>
99974                </enumeratedValue>
99975                <enumeratedValue>
99976                  <name>1</name>
99977                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
99978                  <value>#1</value>
99979                </enumeratedValue>
99980              </enumeratedValues>
99981            </field>
99982            <field>
99983              <name>SRE</name>
99984              <description>Slew Rate Enable</description>
99985              <bitOffset>2</bitOffset>
99986              <bitWidth>1</bitWidth>
99987              <access>read-only</access>
99988              <enumeratedValues>
99989                <enumeratedValue>
99990                  <name>0</name>
99991                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
99992                  <value>#0</value>
99993                </enumeratedValue>
99994                <enumeratedValue>
99995                  <name>1</name>
99996                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
99997                  <value>#1</value>
99998                </enumeratedValue>
99999              </enumeratedValues>
100000            </field>
100001            <field>
100002              <name>PFE</name>
100003              <description>Passive Filter Enable</description>
100004              <bitOffset>4</bitOffset>
100005              <bitWidth>1</bitWidth>
100006              <access>read-only</access>
100007              <enumeratedValues>
100008                <enumeratedValue>
100009                  <name>0</name>
100010                  <description>Passive input filter is disabled on the corresponding pin.</description>
100011                  <value>#0</value>
100012                </enumeratedValue>
100013                <enumeratedValue>
100014                  <name>1</name>
100015                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
100016                  <value>#1</value>
100017                </enumeratedValue>
100018              </enumeratedValues>
100019            </field>
100020            <field>
100021              <name>ODE</name>
100022              <description>Open Drain Enable</description>
100023              <bitOffset>5</bitOffset>
100024              <bitWidth>1</bitWidth>
100025              <access>read-only</access>
100026              <enumeratedValues>
100027                <enumeratedValue>
100028                  <name>0</name>
100029                  <description>Open drain output is disabled on the corresponding pin.</description>
100030                  <value>#0</value>
100031                </enumeratedValue>
100032                <enumeratedValue>
100033                  <name>1</name>
100034                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
100035                  <value>#1</value>
100036                </enumeratedValue>
100037              </enumeratedValues>
100038            </field>
100039            <field>
100040              <name>DSE</name>
100041              <description>Drive Strength Enable</description>
100042              <bitOffset>6</bitOffset>
100043              <bitWidth>1</bitWidth>
100044              <access>read-only</access>
100045              <enumeratedValues>
100046                <enumeratedValue>
100047                  <name>0</name>
100048                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
100049                  <value>#0</value>
100050                </enumeratedValue>
100051                <enumeratedValue>
100052                  <name>1</name>
100053                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
100054                  <value>#1</value>
100055                </enumeratedValue>
100056              </enumeratedValues>
100057            </field>
100058            <field>
100059              <name>MUX</name>
100060              <description>Pin Mux Control</description>
100061              <bitOffset>8</bitOffset>
100062              <bitWidth>3</bitWidth>
100063              <access>read-write</access>
100064              <enumeratedValues>
100065                <enumeratedValue>
100066                  <name>000</name>
100067                  <description>Pin disabled (Alternative 0) (analog).</description>
100068                  <value>#000</value>
100069                </enumeratedValue>
100070                <enumeratedValue>
100071                  <name>001</name>
100072                  <description>Alternative 1 (GPIO).</description>
100073                  <value>#001</value>
100074                </enumeratedValue>
100075                <enumeratedValue>
100076                  <name>010</name>
100077                  <description>Alternative 2 (chip-specific).</description>
100078                  <value>#010</value>
100079                </enumeratedValue>
100080                <enumeratedValue>
100081                  <name>011</name>
100082                  <description>Alternative 3 (chip-specific).</description>
100083                  <value>#011</value>
100084                </enumeratedValue>
100085                <enumeratedValue>
100086                  <name>100</name>
100087                  <description>Alternative 4 (chip-specific).</description>
100088                  <value>#100</value>
100089                </enumeratedValue>
100090                <enumeratedValue>
100091                  <name>101</name>
100092                  <description>Alternative 5 (chip-specific).</description>
100093                  <value>#101</value>
100094                </enumeratedValue>
100095                <enumeratedValue>
100096                  <name>110</name>
100097                  <description>Alternative 6 (chip-specific).</description>
100098                  <value>#110</value>
100099                </enumeratedValue>
100100                <enumeratedValue>
100101                  <name>111</name>
100102                  <description>Alternative 7 (chip-specific).</description>
100103                  <value>#111</value>
100104                </enumeratedValue>
100105              </enumeratedValues>
100106            </field>
100107            <field>
100108              <name>LK</name>
100109              <description>Lock Register</description>
100110              <bitOffset>15</bitOffset>
100111              <bitWidth>1</bitWidth>
100112              <access>read-write</access>
100113              <enumeratedValues>
100114                <enumeratedValue>
100115                  <name>0</name>
100116                  <description>Pin Control Register fields [15:0] are not locked.</description>
100117                  <value>#0</value>
100118                </enumeratedValue>
100119                <enumeratedValue>
100120                  <name>1</name>
100121                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
100122                  <value>#1</value>
100123                </enumeratedValue>
100124              </enumeratedValues>
100125            </field>
100126            <field>
100127              <name>IRQC</name>
100128              <description>Interrupt Configuration</description>
100129              <bitOffset>16</bitOffset>
100130              <bitWidth>4</bitWidth>
100131              <access>read-write</access>
100132              <enumeratedValues>
100133                <enumeratedValue>
100134                  <name>0000</name>
100135                  <description>Interrupt Status Flag (ISF) is disabled.</description>
100136                  <value>#0000</value>
100137                </enumeratedValue>
100138                <enumeratedValue>
100139                  <name>0001</name>
100140                  <description>ISF flag and DMA request on rising edge.</description>
100141                  <value>#0001</value>
100142                </enumeratedValue>
100143                <enumeratedValue>
100144                  <name>0010</name>
100145                  <description>ISF flag and DMA request on falling edge.</description>
100146                  <value>#0010</value>
100147                </enumeratedValue>
100148                <enumeratedValue>
100149                  <name>0011</name>
100150                  <description>ISF flag and DMA request on either edge.</description>
100151                  <value>#0011</value>
100152                </enumeratedValue>
100153                <enumeratedValue>
100154                  <name>1000</name>
100155                  <description>ISF flag and Interrupt when logic 0.</description>
100156                  <value>#1000</value>
100157                </enumeratedValue>
100158                <enumeratedValue>
100159                  <name>1001</name>
100160                  <description>ISF flag and Interrupt on rising-edge.</description>
100161                  <value>#1001</value>
100162                </enumeratedValue>
100163                <enumeratedValue>
100164                  <name>1010</name>
100165                  <description>ISF flag and Interrupt on falling-edge.</description>
100166                  <value>#1010</value>
100167                </enumeratedValue>
100168                <enumeratedValue>
100169                  <name>1011</name>
100170                  <description>ISF flag and Interrupt on either edge.</description>
100171                  <value>#1011</value>
100172                </enumeratedValue>
100173                <enumeratedValue>
100174                  <name>1100</name>
100175                  <description>ISF flag and Interrupt when logic 1.</description>
100176                  <value>#1100</value>
100177                </enumeratedValue>
100178              </enumeratedValues>
100179            </field>
100180            <field>
100181              <name>ISF</name>
100182              <description>Interrupt Status Flag</description>
100183              <bitOffset>24</bitOffset>
100184              <bitWidth>1</bitWidth>
100185              <access>read-write</access>
100186              <enumeratedValues>
100187                <enumeratedValue>
100188                  <name>0</name>
100189                  <description>Configured interrupt is not detected.</description>
100190                  <value>#0</value>
100191                </enumeratedValue>
100192                <enumeratedValue>
100193                  <name>1</name>
100194                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
100195                  <value>#1</value>
100196                </enumeratedValue>
100197              </enumeratedValues>
100198            </field>
100199          </fields>
100200        </register>
100201        <register>
100202          <name>PCR13</name>
100203          <description>Pin Control Register n</description>
100204          <addressOffset>0x34</addressOffset>
100205          <size>32</size>
100206          <access>read-write</access>
100207          <resetValue>0</resetValue>
100208          <resetMask>0xFFFFFFFF</resetMask>
100209          <fields>
100210            <field>
100211              <name>PS</name>
100212              <description>Pull Select</description>
100213              <bitOffset>0</bitOffset>
100214              <bitWidth>1</bitWidth>
100215              <access>read-only</access>
100216              <enumeratedValues>
100217                <enumeratedValue>
100218                  <name>0</name>
100219                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
100220                  <value>#0</value>
100221                </enumeratedValue>
100222                <enumeratedValue>
100223                  <name>1</name>
100224                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
100225                  <value>#1</value>
100226                </enumeratedValue>
100227              </enumeratedValues>
100228            </field>
100229            <field>
100230              <name>PE</name>
100231              <description>Pull Enable</description>
100232              <bitOffset>1</bitOffset>
100233              <bitWidth>1</bitWidth>
100234              <access>read-only</access>
100235              <enumeratedValues>
100236                <enumeratedValue>
100237                  <name>0</name>
100238                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
100239                  <value>#0</value>
100240                </enumeratedValue>
100241                <enumeratedValue>
100242                  <name>1</name>
100243                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
100244                  <value>#1</value>
100245                </enumeratedValue>
100246              </enumeratedValues>
100247            </field>
100248            <field>
100249              <name>SRE</name>
100250              <description>Slew Rate Enable</description>
100251              <bitOffset>2</bitOffset>
100252              <bitWidth>1</bitWidth>
100253              <access>read-only</access>
100254              <enumeratedValues>
100255                <enumeratedValue>
100256                  <name>0</name>
100257                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
100258                  <value>#0</value>
100259                </enumeratedValue>
100260                <enumeratedValue>
100261                  <name>1</name>
100262                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
100263                  <value>#1</value>
100264                </enumeratedValue>
100265              </enumeratedValues>
100266            </field>
100267            <field>
100268              <name>PFE</name>
100269              <description>Passive Filter Enable</description>
100270              <bitOffset>4</bitOffset>
100271              <bitWidth>1</bitWidth>
100272              <access>read-only</access>
100273              <enumeratedValues>
100274                <enumeratedValue>
100275                  <name>0</name>
100276                  <description>Passive input filter is disabled on the corresponding pin.</description>
100277                  <value>#0</value>
100278                </enumeratedValue>
100279                <enumeratedValue>
100280                  <name>1</name>
100281                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
100282                  <value>#1</value>
100283                </enumeratedValue>
100284              </enumeratedValues>
100285            </field>
100286            <field>
100287              <name>ODE</name>
100288              <description>Open Drain Enable</description>
100289              <bitOffset>5</bitOffset>
100290              <bitWidth>1</bitWidth>
100291              <access>read-only</access>
100292              <enumeratedValues>
100293                <enumeratedValue>
100294                  <name>0</name>
100295                  <description>Open drain output is disabled on the corresponding pin.</description>
100296                  <value>#0</value>
100297                </enumeratedValue>
100298                <enumeratedValue>
100299                  <name>1</name>
100300                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
100301                  <value>#1</value>
100302                </enumeratedValue>
100303              </enumeratedValues>
100304            </field>
100305            <field>
100306              <name>DSE</name>
100307              <description>Drive Strength Enable</description>
100308              <bitOffset>6</bitOffset>
100309              <bitWidth>1</bitWidth>
100310              <access>read-only</access>
100311              <enumeratedValues>
100312                <enumeratedValue>
100313                  <name>0</name>
100314                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
100315                  <value>#0</value>
100316                </enumeratedValue>
100317                <enumeratedValue>
100318                  <name>1</name>
100319                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
100320                  <value>#1</value>
100321                </enumeratedValue>
100322              </enumeratedValues>
100323            </field>
100324            <field>
100325              <name>MUX</name>
100326              <description>Pin Mux Control</description>
100327              <bitOffset>8</bitOffset>
100328              <bitWidth>3</bitWidth>
100329              <access>read-write</access>
100330              <enumeratedValues>
100331                <enumeratedValue>
100332                  <name>000</name>
100333                  <description>Pin disabled (Alternative 0) (analog).</description>
100334                  <value>#000</value>
100335                </enumeratedValue>
100336                <enumeratedValue>
100337                  <name>001</name>
100338                  <description>Alternative 1 (GPIO).</description>
100339                  <value>#001</value>
100340                </enumeratedValue>
100341                <enumeratedValue>
100342                  <name>010</name>
100343                  <description>Alternative 2 (chip-specific).</description>
100344                  <value>#010</value>
100345                </enumeratedValue>
100346                <enumeratedValue>
100347                  <name>011</name>
100348                  <description>Alternative 3 (chip-specific).</description>
100349                  <value>#011</value>
100350                </enumeratedValue>
100351                <enumeratedValue>
100352                  <name>100</name>
100353                  <description>Alternative 4 (chip-specific).</description>
100354                  <value>#100</value>
100355                </enumeratedValue>
100356                <enumeratedValue>
100357                  <name>101</name>
100358                  <description>Alternative 5 (chip-specific).</description>
100359                  <value>#101</value>
100360                </enumeratedValue>
100361                <enumeratedValue>
100362                  <name>110</name>
100363                  <description>Alternative 6 (chip-specific).</description>
100364                  <value>#110</value>
100365                </enumeratedValue>
100366                <enumeratedValue>
100367                  <name>111</name>
100368                  <description>Alternative 7 (chip-specific).</description>
100369                  <value>#111</value>
100370                </enumeratedValue>
100371              </enumeratedValues>
100372            </field>
100373            <field>
100374              <name>LK</name>
100375              <description>Lock Register</description>
100376              <bitOffset>15</bitOffset>
100377              <bitWidth>1</bitWidth>
100378              <access>read-write</access>
100379              <enumeratedValues>
100380                <enumeratedValue>
100381                  <name>0</name>
100382                  <description>Pin Control Register fields [15:0] are not locked.</description>
100383                  <value>#0</value>
100384                </enumeratedValue>
100385                <enumeratedValue>
100386                  <name>1</name>
100387                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
100388                  <value>#1</value>
100389                </enumeratedValue>
100390              </enumeratedValues>
100391            </field>
100392            <field>
100393              <name>IRQC</name>
100394              <description>Interrupt Configuration</description>
100395              <bitOffset>16</bitOffset>
100396              <bitWidth>4</bitWidth>
100397              <access>read-write</access>
100398              <enumeratedValues>
100399                <enumeratedValue>
100400                  <name>0000</name>
100401                  <description>Interrupt Status Flag (ISF) is disabled.</description>
100402                  <value>#0000</value>
100403                </enumeratedValue>
100404                <enumeratedValue>
100405                  <name>0001</name>
100406                  <description>ISF flag and DMA request on rising edge.</description>
100407                  <value>#0001</value>
100408                </enumeratedValue>
100409                <enumeratedValue>
100410                  <name>0010</name>
100411                  <description>ISF flag and DMA request on falling edge.</description>
100412                  <value>#0010</value>
100413                </enumeratedValue>
100414                <enumeratedValue>
100415                  <name>0011</name>
100416                  <description>ISF flag and DMA request on either edge.</description>
100417                  <value>#0011</value>
100418                </enumeratedValue>
100419                <enumeratedValue>
100420                  <name>1000</name>
100421                  <description>ISF flag and Interrupt when logic 0.</description>
100422                  <value>#1000</value>
100423                </enumeratedValue>
100424                <enumeratedValue>
100425                  <name>1001</name>
100426                  <description>ISF flag and Interrupt on rising-edge.</description>
100427                  <value>#1001</value>
100428                </enumeratedValue>
100429                <enumeratedValue>
100430                  <name>1010</name>
100431                  <description>ISF flag and Interrupt on falling-edge.</description>
100432                  <value>#1010</value>
100433                </enumeratedValue>
100434                <enumeratedValue>
100435                  <name>1011</name>
100436                  <description>ISF flag and Interrupt on either edge.</description>
100437                  <value>#1011</value>
100438                </enumeratedValue>
100439                <enumeratedValue>
100440                  <name>1100</name>
100441                  <description>ISF flag and Interrupt when logic 1.</description>
100442                  <value>#1100</value>
100443                </enumeratedValue>
100444              </enumeratedValues>
100445            </field>
100446            <field>
100447              <name>ISF</name>
100448              <description>Interrupt Status Flag</description>
100449              <bitOffset>24</bitOffset>
100450              <bitWidth>1</bitWidth>
100451              <access>read-write</access>
100452              <enumeratedValues>
100453                <enumeratedValue>
100454                  <name>0</name>
100455                  <description>Configured interrupt is not detected.</description>
100456                  <value>#0</value>
100457                </enumeratedValue>
100458                <enumeratedValue>
100459                  <name>1</name>
100460                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
100461                  <value>#1</value>
100462                </enumeratedValue>
100463              </enumeratedValues>
100464            </field>
100465          </fields>
100466        </register>
100467        <register>
100468          <name>PCR14</name>
100469          <description>Pin Control Register n</description>
100470          <addressOffset>0x38</addressOffset>
100471          <size>32</size>
100472          <access>read-write</access>
100473          <resetValue>0</resetValue>
100474          <resetMask>0xFFFFFFFF</resetMask>
100475          <fields>
100476            <field>
100477              <name>PS</name>
100478              <description>Pull Select</description>
100479              <bitOffset>0</bitOffset>
100480              <bitWidth>1</bitWidth>
100481              <access>read-only</access>
100482              <enumeratedValues>
100483                <enumeratedValue>
100484                  <name>0</name>
100485                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
100486                  <value>#0</value>
100487                </enumeratedValue>
100488                <enumeratedValue>
100489                  <name>1</name>
100490                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
100491                  <value>#1</value>
100492                </enumeratedValue>
100493              </enumeratedValues>
100494            </field>
100495            <field>
100496              <name>PE</name>
100497              <description>Pull Enable</description>
100498              <bitOffset>1</bitOffset>
100499              <bitWidth>1</bitWidth>
100500              <access>read-only</access>
100501              <enumeratedValues>
100502                <enumeratedValue>
100503                  <name>0</name>
100504                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
100505                  <value>#0</value>
100506                </enumeratedValue>
100507                <enumeratedValue>
100508                  <name>1</name>
100509                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
100510                  <value>#1</value>
100511                </enumeratedValue>
100512              </enumeratedValues>
100513            </field>
100514            <field>
100515              <name>SRE</name>
100516              <description>Slew Rate Enable</description>
100517              <bitOffset>2</bitOffset>
100518              <bitWidth>1</bitWidth>
100519              <access>read-only</access>
100520              <enumeratedValues>
100521                <enumeratedValue>
100522                  <name>0</name>
100523                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
100524                  <value>#0</value>
100525                </enumeratedValue>
100526                <enumeratedValue>
100527                  <name>1</name>
100528                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
100529                  <value>#1</value>
100530                </enumeratedValue>
100531              </enumeratedValues>
100532            </field>
100533            <field>
100534              <name>PFE</name>
100535              <description>Passive Filter Enable</description>
100536              <bitOffset>4</bitOffset>
100537              <bitWidth>1</bitWidth>
100538              <access>read-only</access>
100539              <enumeratedValues>
100540                <enumeratedValue>
100541                  <name>0</name>
100542                  <description>Passive input filter is disabled on the corresponding pin.</description>
100543                  <value>#0</value>
100544                </enumeratedValue>
100545                <enumeratedValue>
100546                  <name>1</name>
100547                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
100548                  <value>#1</value>
100549                </enumeratedValue>
100550              </enumeratedValues>
100551            </field>
100552            <field>
100553              <name>ODE</name>
100554              <description>Open Drain Enable</description>
100555              <bitOffset>5</bitOffset>
100556              <bitWidth>1</bitWidth>
100557              <access>read-only</access>
100558              <enumeratedValues>
100559                <enumeratedValue>
100560                  <name>0</name>
100561                  <description>Open drain output is disabled on the corresponding pin.</description>
100562                  <value>#0</value>
100563                </enumeratedValue>
100564                <enumeratedValue>
100565                  <name>1</name>
100566                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
100567                  <value>#1</value>
100568                </enumeratedValue>
100569              </enumeratedValues>
100570            </field>
100571            <field>
100572              <name>DSE</name>
100573              <description>Drive Strength Enable</description>
100574              <bitOffset>6</bitOffset>
100575              <bitWidth>1</bitWidth>
100576              <access>read-only</access>
100577              <enumeratedValues>
100578                <enumeratedValue>
100579                  <name>0</name>
100580                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
100581                  <value>#0</value>
100582                </enumeratedValue>
100583                <enumeratedValue>
100584                  <name>1</name>
100585                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
100586                  <value>#1</value>
100587                </enumeratedValue>
100588              </enumeratedValues>
100589            </field>
100590            <field>
100591              <name>MUX</name>
100592              <description>Pin Mux Control</description>
100593              <bitOffset>8</bitOffset>
100594              <bitWidth>3</bitWidth>
100595              <access>read-write</access>
100596              <enumeratedValues>
100597                <enumeratedValue>
100598                  <name>000</name>
100599                  <description>Pin disabled (Alternative 0) (analog).</description>
100600                  <value>#000</value>
100601                </enumeratedValue>
100602                <enumeratedValue>
100603                  <name>001</name>
100604                  <description>Alternative 1 (GPIO).</description>
100605                  <value>#001</value>
100606                </enumeratedValue>
100607                <enumeratedValue>
100608                  <name>010</name>
100609                  <description>Alternative 2 (chip-specific).</description>
100610                  <value>#010</value>
100611                </enumeratedValue>
100612                <enumeratedValue>
100613                  <name>011</name>
100614                  <description>Alternative 3 (chip-specific).</description>
100615                  <value>#011</value>
100616                </enumeratedValue>
100617                <enumeratedValue>
100618                  <name>100</name>
100619                  <description>Alternative 4 (chip-specific).</description>
100620                  <value>#100</value>
100621                </enumeratedValue>
100622                <enumeratedValue>
100623                  <name>101</name>
100624                  <description>Alternative 5 (chip-specific).</description>
100625                  <value>#101</value>
100626                </enumeratedValue>
100627                <enumeratedValue>
100628                  <name>110</name>
100629                  <description>Alternative 6 (chip-specific).</description>
100630                  <value>#110</value>
100631                </enumeratedValue>
100632                <enumeratedValue>
100633                  <name>111</name>
100634                  <description>Alternative 7 (chip-specific).</description>
100635                  <value>#111</value>
100636                </enumeratedValue>
100637              </enumeratedValues>
100638            </field>
100639            <field>
100640              <name>LK</name>
100641              <description>Lock Register</description>
100642              <bitOffset>15</bitOffset>
100643              <bitWidth>1</bitWidth>
100644              <access>read-write</access>
100645              <enumeratedValues>
100646                <enumeratedValue>
100647                  <name>0</name>
100648                  <description>Pin Control Register fields [15:0] are not locked.</description>
100649                  <value>#0</value>
100650                </enumeratedValue>
100651                <enumeratedValue>
100652                  <name>1</name>
100653                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
100654                  <value>#1</value>
100655                </enumeratedValue>
100656              </enumeratedValues>
100657            </field>
100658            <field>
100659              <name>IRQC</name>
100660              <description>Interrupt Configuration</description>
100661              <bitOffset>16</bitOffset>
100662              <bitWidth>4</bitWidth>
100663              <access>read-write</access>
100664              <enumeratedValues>
100665                <enumeratedValue>
100666                  <name>0000</name>
100667                  <description>Interrupt Status Flag (ISF) is disabled.</description>
100668                  <value>#0000</value>
100669                </enumeratedValue>
100670                <enumeratedValue>
100671                  <name>0001</name>
100672                  <description>ISF flag and DMA request on rising edge.</description>
100673                  <value>#0001</value>
100674                </enumeratedValue>
100675                <enumeratedValue>
100676                  <name>0010</name>
100677                  <description>ISF flag and DMA request on falling edge.</description>
100678                  <value>#0010</value>
100679                </enumeratedValue>
100680                <enumeratedValue>
100681                  <name>0011</name>
100682                  <description>ISF flag and DMA request on either edge.</description>
100683                  <value>#0011</value>
100684                </enumeratedValue>
100685                <enumeratedValue>
100686                  <name>1000</name>
100687                  <description>ISF flag and Interrupt when logic 0.</description>
100688                  <value>#1000</value>
100689                </enumeratedValue>
100690                <enumeratedValue>
100691                  <name>1001</name>
100692                  <description>ISF flag and Interrupt on rising-edge.</description>
100693                  <value>#1001</value>
100694                </enumeratedValue>
100695                <enumeratedValue>
100696                  <name>1010</name>
100697                  <description>ISF flag and Interrupt on falling-edge.</description>
100698                  <value>#1010</value>
100699                </enumeratedValue>
100700                <enumeratedValue>
100701                  <name>1011</name>
100702                  <description>ISF flag and Interrupt on either edge.</description>
100703                  <value>#1011</value>
100704                </enumeratedValue>
100705                <enumeratedValue>
100706                  <name>1100</name>
100707                  <description>ISF flag and Interrupt when logic 1.</description>
100708                  <value>#1100</value>
100709                </enumeratedValue>
100710              </enumeratedValues>
100711            </field>
100712            <field>
100713              <name>ISF</name>
100714              <description>Interrupt Status Flag</description>
100715              <bitOffset>24</bitOffset>
100716              <bitWidth>1</bitWidth>
100717              <access>read-write</access>
100718              <enumeratedValues>
100719                <enumeratedValue>
100720                  <name>0</name>
100721                  <description>Configured interrupt is not detected.</description>
100722                  <value>#0</value>
100723                </enumeratedValue>
100724                <enumeratedValue>
100725                  <name>1</name>
100726                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
100727                  <value>#1</value>
100728                </enumeratedValue>
100729              </enumeratedValues>
100730            </field>
100731          </fields>
100732        </register>
100733        <register>
100734          <name>PCR15</name>
100735          <description>Pin Control Register n</description>
100736          <addressOffset>0x3C</addressOffset>
100737          <size>32</size>
100738          <access>read-write</access>
100739          <resetValue>0</resetValue>
100740          <resetMask>0xFFFFFFFF</resetMask>
100741          <fields>
100742            <field>
100743              <name>PS</name>
100744              <description>Pull Select</description>
100745              <bitOffset>0</bitOffset>
100746              <bitWidth>1</bitWidth>
100747              <access>read-only</access>
100748              <enumeratedValues>
100749                <enumeratedValue>
100750                  <name>0</name>
100751                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
100752                  <value>#0</value>
100753                </enumeratedValue>
100754                <enumeratedValue>
100755                  <name>1</name>
100756                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
100757                  <value>#1</value>
100758                </enumeratedValue>
100759              </enumeratedValues>
100760            </field>
100761            <field>
100762              <name>PE</name>
100763              <description>Pull Enable</description>
100764              <bitOffset>1</bitOffset>
100765              <bitWidth>1</bitWidth>
100766              <access>read-only</access>
100767              <enumeratedValues>
100768                <enumeratedValue>
100769                  <name>0</name>
100770                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
100771                  <value>#0</value>
100772                </enumeratedValue>
100773                <enumeratedValue>
100774                  <name>1</name>
100775                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
100776                  <value>#1</value>
100777                </enumeratedValue>
100778              </enumeratedValues>
100779            </field>
100780            <field>
100781              <name>SRE</name>
100782              <description>Slew Rate Enable</description>
100783              <bitOffset>2</bitOffset>
100784              <bitWidth>1</bitWidth>
100785              <access>read-only</access>
100786              <enumeratedValues>
100787                <enumeratedValue>
100788                  <name>0</name>
100789                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
100790                  <value>#0</value>
100791                </enumeratedValue>
100792                <enumeratedValue>
100793                  <name>1</name>
100794                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
100795                  <value>#1</value>
100796                </enumeratedValue>
100797              </enumeratedValues>
100798            </field>
100799            <field>
100800              <name>PFE</name>
100801              <description>Passive Filter Enable</description>
100802              <bitOffset>4</bitOffset>
100803              <bitWidth>1</bitWidth>
100804              <access>read-only</access>
100805              <enumeratedValues>
100806                <enumeratedValue>
100807                  <name>0</name>
100808                  <description>Passive input filter is disabled on the corresponding pin.</description>
100809                  <value>#0</value>
100810                </enumeratedValue>
100811                <enumeratedValue>
100812                  <name>1</name>
100813                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
100814                  <value>#1</value>
100815                </enumeratedValue>
100816              </enumeratedValues>
100817            </field>
100818            <field>
100819              <name>ODE</name>
100820              <description>Open Drain Enable</description>
100821              <bitOffset>5</bitOffset>
100822              <bitWidth>1</bitWidth>
100823              <access>read-only</access>
100824              <enumeratedValues>
100825                <enumeratedValue>
100826                  <name>0</name>
100827                  <description>Open drain output is disabled on the corresponding pin.</description>
100828                  <value>#0</value>
100829                </enumeratedValue>
100830                <enumeratedValue>
100831                  <name>1</name>
100832                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
100833                  <value>#1</value>
100834                </enumeratedValue>
100835              </enumeratedValues>
100836            </field>
100837            <field>
100838              <name>DSE</name>
100839              <description>Drive Strength Enable</description>
100840              <bitOffset>6</bitOffset>
100841              <bitWidth>1</bitWidth>
100842              <access>read-only</access>
100843              <enumeratedValues>
100844                <enumeratedValue>
100845                  <name>0</name>
100846                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
100847                  <value>#0</value>
100848                </enumeratedValue>
100849                <enumeratedValue>
100850                  <name>1</name>
100851                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
100852                  <value>#1</value>
100853                </enumeratedValue>
100854              </enumeratedValues>
100855            </field>
100856            <field>
100857              <name>MUX</name>
100858              <description>Pin Mux Control</description>
100859              <bitOffset>8</bitOffset>
100860              <bitWidth>3</bitWidth>
100861              <access>read-write</access>
100862              <enumeratedValues>
100863                <enumeratedValue>
100864                  <name>000</name>
100865                  <description>Pin disabled (Alternative 0) (analog).</description>
100866                  <value>#000</value>
100867                </enumeratedValue>
100868                <enumeratedValue>
100869                  <name>001</name>
100870                  <description>Alternative 1 (GPIO).</description>
100871                  <value>#001</value>
100872                </enumeratedValue>
100873                <enumeratedValue>
100874                  <name>010</name>
100875                  <description>Alternative 2 (chip-specific).</description>
100876                  <value>#010</value>
100877                </enumeratedValue>
100878                <enumeratedValue>
100879                  <name>011</name>
100880                  <description>Alternative 3 (chip-specific).</description>
100881                  <value>#011</value>
100882                </enumeratedValue>
100883                <enumeratedValue>
100884                  <name>100</name>
100885                  <description>Alternative 4 (chip-specific).</description>
100886                  <value>#100</value>
100887                </enumeratedValue>
100888                <enumeratedValue>
100889                  <name>101</name>
100890                  <description>Alternative 5 (chip-specific).</description>
100891                  <value>#101</value>
100892                </enumeratedValue>
100893                <enumeratedValue>
100894                  <name>110</name>
100895                  <description>Alternative 6 (chip-specific).</description>
100896                  <value>#110</value>
100897                </enumeratedValue>
100898                <enumeratedValue>
100899                  <name>111</name>
100900                  <description>Alternative 7 (chip-specific).</description>
100901                  <value>#111</value>
100902                </enumeratedValue>
100903              </enumeratedValues>
100904            </field>
100905            <field>
100906              <name>LK</name>
100907              <description>Lock Register</description>
100908              <bitOffset>15</bitOffset>
100909              <bitWidth>1</bitWidth>
100910              <access>read-write</access>
100911              <enumeratedValues>
100912                <enumeratedValue>
100913                  <name>0</name>
100914                  <description>Pin Control Register fields [15:0] are not locked.</description>
100915                  <value>#0</value>
100916                </enumeratedValue>
100917                <enumeratedValue>
100918                  <name>1</name>
100919                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
100920                  <value>#1</value>
100921                </enumeratedValue>
100922              </enumeratedValues>
100923            </field>
100924            <field>
100925              <name>IRQC</name>
100926              <description>Interrupt Configuration</description>
100927              <bitOffset>16</bitOffset>
100928              <bitWidth>4</bitWidth>
100929              <access>read-write</access>
100930              <enumeratedValues>
100931                <enumeratedValue>
100932                  <name>0000</name>
100933                  <description>Interrupt Status Flag (ISF) is disabled.</description>
100934                  <value>#0000</value>
100935                </enumeratedValue>
100936                <enumeratedValue>
100937                  <name>0001</name>
100938                  <description>ISF flag and DMA request on rising edge.</description>
100939                  <value>#0001</value>
100940                </enumeratedValue>
100941                <enumeratedValue>
100942                  <name>0010</name>
100943                  <description>ISF flag and DMA request on falling edge.</description>
100944                  <value>#0010</value>
100945                </enumeratedValue>
100946                <enumeratedValue>
100947                  <name>0011</name>
100948                  <description>ISF flag and DMA request on either edge.</description>
100949                  <value>#0011</value>
100950                </enumeratedValue>
100951                <enumeratedValue>
100952                  <name>1000</name>
100953                  <description>ISF flag and Interrupt when logic 0.</description>
100954                  <value>#1000</value>
100955                </enumeratedValue>
100956                <enumeratedValue>
100957                  <name>1001</name>
100958                  <description>ISF flag and Interrupt on rising-edge.</description>
100959                  <value>#1001</value>
100960                </enumeratedValue>
100961                <enumeratedValue>
100962                  <name>1010</name>
100963                  <description>ISF flag and Interrupt on falling-edge.</description>
100964                  <value>#1010</value>
100965                </enumeratedValue>
100966                <enumeratedValue>
100967                  <name>1011</name>
100968                  <description>ISF flag and Interrupt on either edge.</description>
100969                  <value>#1011</value>
100970                </enumeratedValue>
100971                <enumeratedValue>
100972                  <name>1100</name>
100973                  <description>ISF flag and Interrupt when logic 1.</description>
100974                  <value>#1100</value>
100975                </enumeratedValue>
100976              </enumeratedValues>
100977            </field>
100978            <field>
100979              <name>ISF</name>
100980              <description>Interrupt Status Flag</description>
100981              <bitOffset>24</bitOffset>
100982              <bitWidth>1</bitWidth>
100983              <access>read-write</access>
100984              <enumeratedValues>
100985                <enumeratedValue>
100986                  <name>0</name>
100987                  <description>Configured interrupt is not detected.</description>
100988                  <value>#0</value>
100989                </enumeratedValue>
100990                <enumeratedValue>
100991                  <name>1</name>
100992                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
100993                  <value>#1</value>
100994                </enumeratedValue>
100995              </enumeratedValues>
100996            </field>
100997          </fields>
100998        </register>
100999        <register>
101000          <name>PCR16</name>
101001          <description>Pin Control Register n</description>
101002          <addressOffset>0x40</addressOffset>
101003          <size>32</size>
101004          <access>read-write</access>
101005          <resetValue>0</resetValue>
101006          <resetMask>0xFFFFFFFF</resetMask>
101007          <fields>
101008            <field>
101009              <name>PS</name>
101010              <description>Pull Select</description>
101011              <bitOffset>0</bitOffset>
101012              <bitWidth>1</bitWidth>
101013              <access>read-only</access>
101014              <enumeratedValues>
101015                <enumeratedValue>
101016                  <name>0</name>
101017                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
101018                  <value>#0</value>
101019                </enumeratedValue>
101020                <enumeratedValue>
101021                  <name>1</name>
101022                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
101023                  <value>#1</value>
101024                </enumeratedValue>
101025              </enumeratedValues>
101026            </field>
101027            <field>
101028              <name>PE</name>
101029              <description>Pull Enable</description>
101030              <bitOffset>1</bitOffset>
101031              <bitWidth>1</bitWidth>
101032              <access>read-only</access>
101033              <enumeratedValues>
101034                <enumeratedValue>
101035                  <name>0</name>
101036                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
101037                  <value>#0</value>
101038                </enumeratedValue>
101039                <enumeratedValue>
101040                  <name>1</name>
101041                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
101042                  <value>#1</value>
101043                </enumeratedValue>
101044              </enumeratedValues>
101045            </field>
101046            <field>
101047              <name>SRE</name>
101048              <description>Slew Rate Enable</description>
101049              <bitOffset>2</bitOffset>
101050              <bitWidth>1</bitWidth>
101051              <access>read-only</access>
101052              <enumeratedValues>
101053                <enumeratedValue>
101054                  <name>0</name>
101055                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
101056                  <value>#0</value>
101057                </enumeratedValue>
101058                <enumeratedValue>
101059                  <name>1</name>
101060                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
101061                  <value>#1</value>
101062                </enumeratedValue>
101063              </enumeratedValues>
101064            </field>
101065            <field>
101066              <name>PFE</name>
101067              <description>Passive Filter Enable</description>
101068              <bitOffset>4</bitOffset>
101069              <bitWidth>1</bitWidth>
101070              <access>read-only</access>
101071              <enumeratedValues>
101072                <enumeratedValue>
101073                  <name>0</name>
101074                  <description>Passive input filter is disabled on the corresponding pin.</description>
101075                  <value>#0</value>
101076                </enumeratedValue>
101077                <enumeratedValue>
101078                  <name>1</name>
101079                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
101080                  <value>#1</value>
101081                </enumeratedValue>
101082              </enumeratedValues>
101083            </field>
101084            <field>
101085              <name>ODE</name>
101086              <description>Open Drain Enable</description>
101087              <bitOffset>5</bitOffset>
101088              <bitWidth>1</bitWidth>
101089              <access>read-only</access>
101090              <enumeratedValues>
101091                <enumeratedValue>
101092                  <name>0</name>
101093                  <description>Open drain output is disabled on the corresponding pin.</description>
101094                  <value>#0</value>
101095                </enumeratedValue>
101096                <enumeratedValue>
101097                  <name>1</name>
101098                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
101099                  <value>#1</value>
101100                </enumeratedValue>
101101              </enumeratedValues>
101102            </field>
101103            <field>
101104              <name>DSE</name>
101105              <description>Drive Strength Enable</description>
101106              <bitOffset>6</bitOffset>
101107              <bitWidth>1</bitWidth>
101108              <access>read-only</access>
101109              <enumeratedValues>
101110                <enumeratedValue>
101111                  <name>0</name>
101112                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
101113                  <value>#0</value>
101114                </enumeratedValue>
101115                <enumeratedValue>
101116                  <name>1</name>
101117                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
101118                  <value>#1</value>
101119                </enumeratedValue>
101120              </enumeratedValues>
101121            </field>
101122            <field>
101123              <name>MUX</name>
101124              <description>Pin Mux Control</description>
101125              <bitOffset>8</bitOffset>
101126              <bitWidth>3</bitWidth>
101127              <access>read-write</access>
101128              <enumeratedValues>
101129                <enumeratedValue>
101130                  <name>000</name>
101131                  <description>Pin disabled (Alternative 0) (analog).</description>
101132                  <value>#000</value>
101133                </enumeratedValue>
101134                <enumeratedValue>
101135                  <name>001</name>
101136                  <description>Alternative 1 (GPIO).</description>
101137                  <value>#001</value>
101138                </enumeratedValue>
101139                <enumeratedValue>
101140                  <name>010</name>
101141                  <description>Alternative 2 (chip-specific).</description>
101142                  <value>#010</value>
101143                </enumeratedValue>
101144                <enumeratedValue>
101145                  <name>011</name>
101146                  <description>Alternative 3 (chip-specific).</description>
101147                  <value>#011</value>
101148                </enumeratedValue>
101149                <enumeratedValue>
101150                  <name>100</name>
101151                  <description>Alternative 4 (chip-specific).</description>
101152                  <value>#100</value>
101153                </enumeratedValue>
101154                <enumeratedValue>
101155                  <name>101</name>
101156                  <description>Alternative 5 (chip-specific).</description>
101157                  <value>#101</value>
101158                </enumeratedValue>
101159                <enumeratedValue>
101160                  <name>110</name>
101161                  <description>Alternative 6 (chip-specific).</description>
101162                  <value>#110</value>
101163                </enumeratedValue>
101164                <enumeratedValue>
101165                  <name>111</name>
101166                  <description>Alternative 7 (chip-specific).</description>
101167                  <value>#111</value>
101168                </enumeratedValue>
101169              </enumeratedValues>
101170            </field>
101171            <field>
101172              <name>LK</name>
101173              <description>Lock Register</description>
101174              <bitOffset>15</bitOffset>
101175              <bitWidth>1</bitWidth>
101176              <access>read-write</access>
101177              <enumeratedValues>
101178                <enumeratedValue>
101179                  <name>0</name>
101180                  <description>Pin Control Register fields [15:0] are not locked.</description>
101181                  <value>#0</value>
101182                </enumeratedValue>
101183                <enumeratedValue>
101184                  <name>1</name>
101185                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
101186                  <value>#1</value>
101187                </enumeratedValue>
101188              </enumeratedValues>
101189            </field>
101190            <field>
101191              <name>IRQC</name>
101192              <description>Interrupt Configuration</description>
101193              <bitOffset>16</bitOffset>
101194              <bitWidth>4</bitWidth>
101195              <access>read-write</access>
101196              <enumeratedValues>
101197                <enumeratedValue>
101198                  <name>0000</name>
101199                  <description>Interrupt Status Flag (ISF) is disabled.</description>
101200                  <value>#0000</value>
101201                </enumeratedValue>
101202                <enumeratedValue>
101203                  <name>0001</name>
101204                  <description>ISF flag and DMA request on rising edge.</description>
101205                  <value>#0001</value>
101206                </enumeratedValue>
101207                <enumeratedValue>
101208                  <name>0010</name>
101209                  <description>ISF flag and DMA request on falling edge.</description>
101210                  <value>#0010</value>
101211                </enumeratedValue>
101212                <enumeratedValue>
101213                  <name>0011</name>
101214                  <description>ISF flag and DMA request on either edge.</description>
101215                  <value>#0011</value>
101216                </enumeratedValue>
101217                <enumeratedValue>
101218                  <name>1000</name>
101219                  <description>ISF flag and Interrupt when logic 0.</description>
101220                  <value>#1000</value>
101221                </enumeratedValue>
101222                <enumeratedValue>
101223                  <name>1001</name>
101224                  <description>ISF flag and Interrupt on rising-edge.</description>
101225                  <value>#1001</value>
101226                </enumeratedValue>
101227                <enumeratedValue>
101228                  <name>1010</name>
101229                  <description>ISF flag and Interrupt on falling-edge.</description>
101230                  <value>#1010</value>
101231                </enumeratedValue>
101232                <enumeratedValue>
101233                  <name>1011</name>
101234                  <description>ISF flag and Interrupt on either edge.</description>
101235                  <value>#1011</value>
101236                </enumeratedValue>
101237                <enumeratedValue>
101238                  <name>1100</name>
101239                  <description>ISF flag and Interrupt when logic 1.</description>
101240                  <value>#1100</value>
101241                </enumeratedValue>
101242              </enumeratedValues>
101243            </field>
101244            <field>
101245              <name>ISF</name>
101246              <description>Interrupt Status Flag</description>
101247              <bitOffset>24</bitOffset>
101248              <bitWidth>1</bitWidth>
101249              <access>read-write</access>
101250              <enumeratedValues>
101251                <enumeratedValue>
101252                  <name>0</name>
101253                  <description>Configured interrupt is not detected.</description>
101254                  <value>#0</value>
101255                </enumeratedValue>
101256                <enumeratedValue>
101257                  <name>1</name>
101258                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
101259                  <value>#1</value>
101260                </enumeratedValue>
101261              </enumeratedValues>
101262            </field>
101263          </fields>
101264        </register>
101265        <register>
101266          <name>PCR17</name>
101267          <description>Pin Control Register n</description>
101268          <addressOffset>0x44</addressOffset>
101269          <size>32</size>
101270          <access>read-write</access>
101271          <resetValue>0</resetValue>
101272          <resetMask>0xFFFFFFFF</resetMask>
101273          <fields>
101274            <field>
101275              <name>PS</name>
101276              <description>Pull Select</description>
101277              <bitOffset>0</bitOffset>
101278              <bitWidth>1</bitWidth>
101279              <access>read-only</access>
101280              <enumeratedValues>
101281                <enumeratedValue>
101282                  <name>0</name>
101283                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
101284                  <value>#0</value>
101285                </enumeratedValue>
101286                <enumeratedValue>
101287                  <name>1</name>
101288                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
101289                  <value>#1</value>
101290                </enumeratedValue>
101291              </enumeratedValues>
101292            </field>
101293            <field>
101294              <name>PE</name>
101295              <description>Pull Enable</description>
101296              <bitOffset>1</bitOffset>
101297              <bitWidth>1</bitWidth>
101298              <access>read-only</access>
101299              <enumeratedValues>
101300                <enumeratedValue>
101301                  <name>0</name>
101302                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
101303                  <value>#0</value>
101304                </enumeratedValue>
101305                <enumeratedValue>
101306                  <name>1</name>
101307                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
101308                  <value>#1</value>
101309                </enumeratedValue>
101310              </enumeratedValues>
101311            </field>
101312            <field>
101313              <name>SRE</name>
101314              <description>Slew Rate Enable</description>
101315              <bitOffset>2</bitOffset>
101316              <bitWidth>1</bitWidth>
101317              <access>read-only</access>
101318              <enumeratedValues>
101319                <enumeratedValue>
101320                  <name>0</name>
101321                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
101322                  <value>#0</value>
101323                </enumeratedValue>
101324                <enumeratedValue>
101325                  <name>1</name>
101326                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
101327                  <value>#1</value>
101328                </enumeratedValue>
101329              </enumeratedValues>
101330            </field>
101331            <field>
101332              <name>PFE</name>
101333              <description>Passive Filter Enable</description>
101334              <bitOffset>4</bitOffset>
101335              <bitWidth>1</bitWidth>
101336              <access>read-only</access>
101337              <enumeratedValues>
101338                <enumeratedValue>
101339                  <name>0</name>
101340                  <description>Passive input filter is disabled on the corresponding pin.</description>
101341                  <value>#0</value>
101342                </enumeratedValue>
101343                <enumeratedValue>
101344                  <name>1</name>
101345                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
101346                  <value>#1</value>
101347                </enumeratedValue>
101348              </enumeratedValues>
101349            </field>
101350            <field>
101351              <name>ODE</name>
101352              <description>Open Drain Enable</description>
101353              <bitOffset>5</bitOffset>
101354              <bitWidth>1</bitWidth>
101355              <access>read-only</access>
101356              <enumeratedValues>
101357                <enumeratedValue>
101358                  <name>0</name>
101359                  <description>Open drain output is disabled on the corresponding pin.</description>
101360                  <value>#0</value>
101361                </enumeratedValue>
101362                <enumeratedValue>
101363                  <name>1</name>
101364                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
101365                  <value>#1</value>
101366                </enumeratedValue>
101367              </enumeratedValues>
101368            </field>
101369            <field>
101370              <name>DSE</name>
101371              <description>Drive Strength Enable</description>
101372              <bitOffset>6</bitOffset>
101373              <bitWidth>1</bitWidth>
101374              <access>read-only</access>
101375              <enumeratedValues>
101376                <enumeratedValue>
101377                  <name>0</name>
101378                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
101379                  <value>#0</value>
101380                </enumeratedValue>
101381                <enumeratedValue>
101382                  <name>1</name>
101383                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
101384                  <value>#1</value>
101385                </enumeratedValue>
101386              </enumeratedValues>
101387            </field>
101388            <field>
101389              <name>MUX</name>
101390              <description>Pin Mux Control</description>
101391              <bitOffset>8</bitOffset>
101392              <bitWidth>3</bitWidth>
101393              <access>read-write</access>
101394              <enumeratedValues>
101395                <enumeratedValue>
101396                  <name>000</name>
101397                  <description>Pin disabled (Alternative 0) (analog).</description>
101398                  <value>#000</value>
101399                </enumeratedValue>
101400                <enumeratedValue>
101401                  <name>001</name>
101402                  <description>Alternative 1 (GPIO).</description>
101403                  <value>#001</value>
101404                </enumeratedValue>
101405                <enumeratedValue>
101406                  <name>010</name>
101407                  <description>Alternative 2 (chip-specific).</description>
101408                  <value>#010</value>
101409                </enumeratedValue>
101410                <enumeratedValue>
101411                  <name>011</name>
101412                  <description>Alternative 3 (chip-specific).</description>
101413                  <value>#011</value>
101414                </enumeratedValue>
101415                <enumeratedValue>
101416                  <name>100</name>
101417                  <description>Alternative 4 (chip-specific).</description>
101418                  <value>#100</value>
101419                </enumeratedValue>
101420                <enumeratedValue>
101421                  <name>101</name>
101422                  <description>Alternative 5 (chip-specific).</description>
101423                  <value>#101</value>
101424                </enumeratedValue>
101425                <enumeratedValue>
101426                  <name>110</name>
101427                  <description>Alternative 6 (chip-specific).</description>
101428                  <value>#110</value>
101429                </enumeratedValue>
101430                <enumeratedValue>
101431                  <name>111</name>
101432                  <description>Alternative 7 (chip-specific).</description>
101433                  <value>#111</value>
101434                </enumeratedValue>
101435              </enumeratedValues>
101436            </field>
101437            <field>
101438              <name>LK</name>
101439              <description>Lock Register</description>
101440              <bitOffset>15</bitOffset>
101441              <bitWidth>1</bitWidth>
101442              <access>read-write</access>
101443              <enumeratedValues>
101444                <enumeratedValue>
101445                  <name>0</name>
101446                  <description>Pin Control Register fields [15:0] are not locked.</description>
101447                  <value>#0</value>
101448                </enumeratedValue>
101449                <enumeratedValue>
101450                  <name>1</name>
101451                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
101452                  <value>#1</value>
101453                </enumeratedValue>
101454              </enumeratedValues>
101455            </field>
101456            <field>
101457              <name>IRQC</name>
101458              <description>Interrupt Configuration</description>
101459              <bitOffset>16</bitOffset>
101460              <bitWidth>4</bitWidth>
101461              <access>read-write</access>
101462              <enumeratedValues>
101463                <enumeratedValue>
101464                  <name>0000</name>
101465                  <description>Interrupt Status Flag (ISF) is disabled.</description>
101466                  <value>#0000</value>
101467                </enumeratedValue>
101468                <enumeratedValue>
101469                  <name>0001</name>
101470                  <description>ISF flag and DMA request on rising edge.</description>
101471                  <value>#0001</value>
101472                </enumeratedValue>
101473                <enumeratedValue>
101474                  <name>0010</name>
101475                  <description>ISF flag and DMA request on falling edge.</description>
101476                  <value>#0010</value>
101477                </enumeratedValue>
101478                <enumeratedValue>
101479                  <name>0011</name>
101480                  <description>ISF flag and DMA request on either edge.</description>
101481                  <value>#0011</value>
101482                </enumeratedValue>
101483                <enumeratedValue>
101484                  <name>1000</name>
101485                  <description>ISF flag and Interrupt when logic 0.</description>
101486                  <value>#1000</value>
101487                </enumeratedValue>
101488                <enumeratedValue>
101489                  <name>1001</name>
101490                  <description>ISF flag and Interrupt on rising-edge.</description>
101491                  <value>#1001</value>
101492                </enumeratedValue>
101493                <enumeratedValue>
101494                  <name>1010</name>
101495                  <description>ISF flag and Interrupt on falling-edge.</description>
101496                  <value>#1010</value>
101497                </enumeratedValue>
101498                <enumeratedValue>
101499                  <name>1011</name>
101500                  <description>ISF flag and Interrupt on either edge.</description>
101501                  <value>#1011</value>
101502                </enumeratedValue>
101503                <enumeratedValue>
101504                  <name>1100</name>
101505                  <description>ISF flag and Interrupt when logic 1.</description>
101506                  <value>#1100</value>
101507                </enumeratedValue>
101508              </enumeratedValues>
101509            </field>
101510            <field>
101511              <name>ISF</name>
101512              <description>Interrupt Status Flag</description>
101513              <bitOffset>24</bitOffset>
101514              <bitWidth>1</bitWidth>
101515              <access>read-write</access>
101516              <enumeratedValues>
101517                <enumeratedValue>
101518                  <name>0</name>
101519                  <description>Configured interrupt is not detected.</description>
101520                  <value>#0</value>
101521                </enumeratedValue>
101522                <enumeratedValue>
101523                  <name>1</name>
101524                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
101525                  <value>#1</value>
101526                </enumeratedValue>
101527              </enumeratedValues>
101528            </field>
101529          </fields>
101530        </register>
101531        <register>
101532          <name>PCR18</name>
101533          <description>Pin Control Register n</description>
101534          <addressOffset>0x48</addressOffset>
101535          <size>32</size>
101536          <access>read-write</access>
101537          <resetValue>0</resetValue>
101538          <resetMask>0xFFFFFFFF</resetMask>
101539          <fields>
101540            <field>
101541              <name>PS</name>
101542              <description>Pull Select</description>
101543              <bitOffset>0</bitOffset>
101544              <bitWidth>1</bitWidth>
101545              <access>read-only</access>
101546              <enumeratedValues>
101547                <enumeratedValue>
101548                  <name>0</name>
101549                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
101550                  <value>#0</value>
101551                </enumeratedValue>
101552                <enumeratedValue>
101553                  <name>1</name>
101554                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
101555                  <value>#1</value>
101556                </enumeratedValue>
101557              </enumeratedValues>
101558            </field>
101559            <field>
101560              <name>PE</name>
101561              <description>Pull Enable</description>
101562              <bitOffset>1</bitOffset>
101563              <bitWidth>1</bitWidth>
101564              <access>read-only</access>
101565              <enumeratedValues>
101566                <enumeratedValue>
101567                  <name>0</name>
101568                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
101569                  <value>#0</value>
101570                </enumeratedValue>
101571                <enumeratedValue>
101572                  <name>1</name>
101573                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
101574                  <value>#1</value>
101575                </enumeratedValue>
101576              </enumeratedValues>
101577            </field>
101578            <field>
101579              <name>SRE</name>
101580              <description>Slew Rate Enable</description>
101581              <bitOffset>2</bitOffset>
101582              <bitWidth>1</bitWidth>
101583              <access>read-only</access>
101584              <enumeratedValues>
101585                <enumeratedValue>
101586                  <name>0</name>
101587                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
101588                  <value>#0</value>
101589                </enumeratedValue>
101590                <enumeratedValue>
101591                  <name>1</name>
101592                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
101593                  <value>#1</value>
101594                </enumeratedValue>
101595              </enumeratedValues>
101596            </field>
101597            <field>
101598              <name>PFE</name>
101599              <description>Passive Filter Enable</description>
101600              <bitOffset>4</bitOffset>
101601              <bitWidth>1</bitWidth>
101602              <access>read-only</access>
101603              <enumeratedValues>
101604                <enumeratedValue>
101605                  <name>0</name>
101606                  <description>Passive input filter is disabled on the corresponding pin.</description>
101607                  <value>#0</value>
101608                </enumeratedValue>
101609                <enumeratedValue>
101610                  <name>1</name>
101611                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
101612                  <value>#1</value>
101613                </enumeratedValue>
101614              </enumeratedValues>
101615            </field>
101616            <field>
101617              <name>ODE</name>
101618              <description>Open Drain Enable</description>
101619              <bitOffset>5</bitOffset>
101620              <bitWidth>1</bitWidth>
101621              <access>read-only</access>
101622              <enumeratedValues>
101623                <enumeratedValue>
101624                  <name>0</name>
101625                  <description>Open drain output is disabled on the corresponding pin.</description>
101626                  <value>#0</value>
101627                </enumeratedValue>
101628                <enumeratedValue>
101629                  <name>1</name>
101630                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
101631                  <value>#1</value>
101632                </enumeratedValue>
101633              </enumeratedValues>
101634            </field>
101635            <field>
101636              <name>DSE</name>
101637              <description>Drive Strength Enable</description>
101638              <bitOffset>6</bitOffset>
101639              <bitWidth>1</bitWidth>
101640              <access>read-only</access>
101641              <enumeratedValues>
101642                <enumeratedValue>
101643                  <name>0</name>
101644                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
101645                  <value>#0</value>
101646                </enumeratedValue>
101647                <enumeratedValue>
101648                  <name>1</name>
101649                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
101650                  <value>#1</value>
101651                </enumeratedValue>
101652              </enumeratedValues>
101653            </field>
101654            <field>
101655              <name>MUX</name>
101656              <description>Pin Mux Control</description>
101657              <bitOffset>8</bitOffset>
101658              <bitWidth>3</bitWidth>
101659              <access>read-write</access>
101660              <enumeratedValues>
101661                <enumeratedValue>
101662                  <name>000</name>
101663                  <description>Pin disabled (Alternative 0) (analog).</description>
101664                  <value>#000</value>
101665                </enumeratedValue>
101666                <enumeratedValue>
101667                  <name>001</name>
101668                  <description>Alternative 1 (GPIO).</description>
101669                  <value>#001</value>
101670                </enumeratedValue>
101671                <enumeratedValue>
101672                  <name>010</name>
101673                  <description>Alternative 2 (chip-specific).</description>
101674                  <value>#010</value>
101675                </enumeratedValue>
101676                <enumeratedValue>
101677                  <name>011</name>
101678                  <description>Alternative 3 (chip-specific).</description>
101679                  <value>#011</value>
101680                </enumeratedValue>
101681                <enumeratedValue>
101682                  <name>100</name>
101683                  <description>Alternative 4 (chip-specific).</description>
101684                  <value>#100</value>
101685                </enumeratedValue>
101686                <enumeratedValue>
101687                  <name>101</name>
101688                  <description>Alternative 5 (chip-specific).</description>
101689                  <value>#101</value>
101690                </enumeratedValue>
101691                <enumeratedValue>
101692                  <name>110</name>
101693                  <description>Alternative 6 (chip-specific).</description>
101694                  <value>#110</value>
101695                </enumeratedValue>
101696                <enumeratedValue>
101697                  <name>111</name>
101698                  <description>Alternative 7 (chip-specific).</description>
101699                  <value>#111</value>
101700                </enumeratedValue>
101701              </enumeratedValues>
101702            </field>
101703            <field>
101704              <name>LK</name>
101705              <description>Lock Register</description>
101706              <bitOffset>15</bitOffset>
101707              <bitWidth>1</bitWidth>
101708              <access>read-write</access>
101709              <enumeratedValues>
101710                <enumeratedValue>
101711                  <name>0</name>
101712                  <description>Pin Control Register fields [15:0] are not locked.</description>
101713                  <value>#0</value>
101714                </enumeratedValue>
101715                <enumeratedValue>
101716                  <name>1</name>
101717                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
101718                  <value>#1</value>
101719                </enumeratedValue>
101720              </enumeratedValues>
101721            </field>
101722            <field>
101723              <name>IRQC</name>
101724              <description>Interrupt Configuration</description>
101725              <bitOffset>16</bitOffset>
101726              <bitWidth>4</bitWidth>
101727              <access>read-write</access>
101728              <enumeratedValues>
101729                <enumeratedValue>
101730                  <name>0000</name>
101731                  <description>Interrupt Status Flag (ISF) is disabled.</description>
101732                  <value>#0000</value>
101733                </enumeratedValue>
101734                <enumeratedValue>
101735                  <name>0001</name>
101736                  <description>ISF flag and DMA request on rising edge.</description>
101737                  <value>#0001</value>
101738                </enumeratedValue>
101739                <enumeratedValue>
101740                  <name>0010</name>
101741                  <description>ISF flag and DMA request on falling edge.</description>
101742                  <value>#0010</value>
101743                </enumeratedValue>
101744                <enumeratedValue>
101745                  <name>0011</name>
101746                  <description>ISF flag and DMA request on either edge.</description>
101747                  <value>#0011</value>
101748                </enumeratedValue>
101749                <enumeratedValue>
101750                  <name>1000</name>
101751                  <description>ISF flag and Interrupt when logic 0.</description>
101752                  <value>#1000</value>
101753                </enumeratedValue>
101754                <enumeratedValue>
101755                  <name>1001</name>
101756                  <description>ISF flag and Interrupt on rising-edge.</description>
101757                  <value>#1001</value>
101758                </enumeratedValue>
101759                <enumeratedValue>
101760                  <name>1010</name>
101761                  <description>ISF flag and Interrupt on falling-edge.</description>
101762                  <value>#1010</value>
101763                </enumeratedValue>
101764                <enumeratedValue>
101765                  <name>1011</name>
101766                  <description>ISF flag and Interrupt on either edge.</description>
101767                  <value>#1011</value>
101768                </enumeratedValue>
101769                <enumeratedValue>
101770                  <name>1100</name>
101771                  <description>ISF flag and Interrupt when logic 1.</description>
101772                  <value>#1100</value>
101773                </enumeratedValue>
101774              </enumeratedValues>
101775            </field>
101776            <field>
101777              <name>ISF</name>
101778              <description>Interrupt Status Flag</description>
101779              <bitOffset>24</bitOffset>
101780              <bitWidth>1</bitWidth>
101781              <access>read-write</access>
101782              <enumeratedValues>
101783                <enumeratedValue>
101784                  <name>0</name>
101785                  <description>Configured interrupt is not detected.</description>
101786                  <value>#0</value>
101787                </enumeratedValue>
101788                <enumeratedValue>
101789                  <name>1</name>
101790                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
101791                  <value>#1</value>
101792                </enumeratedValue>
101793              </enumeratedValues>
101794            </field>
101795          </fields>
101796        </register>
101797        <register>
101798          <name>PCR19</name>
101799          <description>Pin Control Register n</description>
101800          <addressOffset>0x4C</addressOffset>
101801          <size>32</size>
101802          <access>read-write</access>
101803          <resetValue>0</resetValue>
101804          <resetMask>0xFFFFFFFF</resetMask>
101805          <fields>
101806            <field>
101807              <name>PS</name>
101808              <description>Pull Select</description>
101809              <bitOffset>0</bitOffset>
101810              <bitWidth>1</bitWidth>
101811              <access>read-only</access>
101812              <enumeratedValues>
101813                <enumeratedValue>
101814                  <name>0</name>
101815                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
101816                  <value>#0</value>
101817                </enumeratedValue>
101818                <enumeratedValue>
101819                  <name>1</name>
101820                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
101821                  <value>#1</value>
101822                </enumeratedValue>
101823              </enumeratedValues>
101824            </field>
101825            <field>
101826              <name>PE</name>
101827              <description>Pull Enable</description>
101828              <bitOffset>1</bitOffset>
101829              <bitWidth>1</bitWidth>
101830              <access>read-only</access>
101831              <enumeratedValues>
101832                <enumeratedValue>
101833                  <name>0</name>
101834                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
101835                  <value>#0</value>
101836                </enumeratedValue>
101837                <enumeratedValue>
101838                  <name>1</name>
101839                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
101840                  <value>#1</value>
101841                </enumeratedValue>
101842              </enumeratedValues>
101843            </field>
101844            <field>
101845              <name>SRE</name>
101846              <description>Slew Rate Enable</description>
101847              <bitOffset>2</bitOffset>
101848              <bitWidth>1</bitWidth>
101849              <access>read-only</access>
101850              <enumeratedValues>
101851                <enumeratedValue>
101852                  <name>0</name>
101853                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
101854                  <value>#0</value>
101855                </enumeratedValue>
101856                <enumeratedValue>
101857                  <name>1</name>
101858                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
101859                  <value>#1</value>
101860                </enumeratedValue>
101861              </enumeratedValues>
101862            </field>
101863            <field>
101864              <name>PFE</name>
101865              <description>Passive Filter Enable</description>
101866              <bitOffset>4</bitOffset>
101867              <bitWidth>1</bitWidth>
101868              <access>read-only</access>
101869              <enumeratedValues>
101870                <enumeratedValue>
101871                  <name>0</name>
101872                  <description>Passive input filter is disabled on the corresponding pin.</description>
101873                  <value>#0</value>
101874                </enumeratedValue>
101875                <enumeratedValue>
101876                  <name>1</name>
101877                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
101878                  <value>#1</value>
101879                </enumeratedValue>
101880              </enumeratedValues>
101881            </field>
101882            <field>
101883              <name>ODE</name>
101884              <description>Open Drain Enable</description>
101885              <bitOffset>5</bitOffset>
101886              <bitWidth>1</bitWidth>
101887              <access>read-only</access>
101888              <enumeratedValues>
101889                <enumeratedValue>
101890                  <name>0</name>
101891                  <description>Open drain output is disabled on the corresponding pin.</description>
101892                  <value>#0</value>
101893                </enumeratedValue>
101894                <enumeratedValue>
101895                  <name>1</name>
101896                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
101897                  <value>#1</value>
101898                </enumeratedValue>
101899              </enumeratedValues>
101900            </field>
101901            <field>
101902              <name>DSE</name>
101903              <description>Drive Strength Enable</description>
101904              <bitOffset>6</bitOffset>
101905              <bitWidth>1</bitWidth>
101906              <access>read-only</access>
101907              <enumeratedValues>
101908                <enumeratedValue>
101909                  <name>0</name>
101910                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
101911                  <value>#0</value>
101912                </enumeratedValue>
101913                <enumeratedValue>
101914                  <name>1</name>
101915                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
101916                  <value>#1</value>
101917                </enumeratedValue>
101918              </enumeratedValues>
101919            </field>
101920            <field>
101921              <name>MUX</name>
101922              <description>Pin Mux Control</description>
101923              <bitOffset>8</bitOffset>
101924              <bitWidth>3</bitWidth>
101925              <access>read-write</access>
101926              <enumeratedValues>
101927                <enumeratedValue>
101928                  <name>000</name>
101929                  <description>Pin disabled (Alternative 0) (analog).</description>
101930                  <value>#000</value>
101931                </enumeratedValue>
101932                <enumeratedValue>
101933                  <name>001</name>
101934                  <description>Alternative 1 (GPIO).</description>
101935                  <value>#001</value>
101936                </enumeratedValue>
101937                <enumeratedValue>
101938                  <name>010</name>
101939                  <description>Alternative 2 (chip-specific).</description>
101940                  <value>#010</value>
101941                </enumeratedValue>
101942                <enumeratedValue>
101943                  <name>011</name>
101944                  <description>Alternative 3 (chip-specific).</description>
101945                  <value>#011</value>
101946                </enumeratedValue>
101947                <enumeratedValue>
101948                  <name>100</name>
101949                  <description>Alternative 4 (chip-specific).</description>
101950                  <value>#100</value>
101951                </enumeratedValue>
101952                <enumeratedValue>
101953                  <name>101</name>
101954                  <description>Alternative 5 (chip-specific).</description>
101955                  <value>#101</value>
101956                </enumeratedValue>
101957                <enumeratedValue>
101958                  <name>110</name>
101959                  <description>Alternative 6 (chip-specific).</description>
101960                  <value>#110</value>
101961                </enumeratedValue>
101962                <enumeratedValue>
101963                  <name>111</name>
101964                  <description>Alternative 7 (chip-specific).</description>
101965                  <value>#111</value>
101966                </enumeratedValue>
101967              </enumeratedValues>
101968            </field>
101969            <field>
101970              <name>LK</name>
101971              <description>Lock Register</description>
101972              <bitOffset>15</bitOffset>
101973              <bitWidth>1</bitWidth>
101974              <access>read-write</access>
101975              <enumeratedValues>
101976                <enumeratedValue>
101977                  <name>0</name>
101978                  <description>Pin Control Register fields [15:0] are not locked.</description>
101979                  <value>#0</value>
101980                </enumeratedValue>
101981                <enumeratedValue>
101982                  <name>1</name>
101983                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
101984                  <value>#1</value>
101985                </enumeratedValue>
101986              </enumeratedValues>
101987            </field>
101988            <field>
101989              <name>IRQC</name>
101990              <description>Interrupt Configuration</description>
101991              <bitOffset>16</bitOffset>
101992              <bitWidth>4</bitWidth>
101993              <access>read-write</access>
101994              <enumeratedValues>
101995                <enumeratedValue>
101996                  <name>0000</name>
101997                  <description>Interrupt Status Flag (ISF) is disabled.</description>
101998                  <value>#0000</value>
101999                </enumeratedValue>
102000                <enumeratedValue>
102001                  <name>0001</name>
102002                  <description>ISF flag and DMA request on rising edge.</description>
102003                  <value>#0001</value>
102004                </enumeratedValue>
102005                <enumeratedValue>
102006                  <name>0010</name>
102007                  <description>ISF flag and DMA request on falling edge.</description>
102008                  <value>#0010</value>
102009                </enumeratedValue>
102010                <enumeratedValue>
102011                  <name>0011</name>
102012                  <description>ISF flag and DMA request on either edge.</description>
102013                  <value>#0011</value>
102014                </enumeratedValue>
102015                <enumeratedValue>
102016                  <name>1000</name>
102017                  <description>ISF flag and Interrupt when logic 0.</description>
102018                  <value>#1000</value>
102019                </enumeratedValue>
102020                <enumeratedValue>
102021                  <name>1001</name>
102022                  <description>ISF flag and Interrupt on rising-edge.</description>
102023                  <value>#1001</value>
102024                </enumeratedValue>
102025                <enumeratedValue>
102026                  <name>1010</name>
102027                  <description>ISF flag and Interrupt on falling-edge.</description>
102028                  <value>#1010</value>
102029                </enumeratedValue>
102030                <enumeratedValue>
102031                  <name>1011</name>
102032                  <description>ISF flag and Interrupt on either edge.</description>
102033                  <value>#1011</value>
102034                </enumeratedValue>
102035                <enumeratedValue>
102036                  <name>1100</name>
102037                  <description>ISF flag and Interrupt when logic 1.</description>
102038                  <value>#1100</value>
102039                </enumeratedValue>
102040              </enumeratedValues>
102041            </field>
102042            <field>
102043              <name>ISF</name>
102044              <description>Interrupt Status Flag</description>
102045              <bitOffset>24</bitOffset>
102046              <bitWidth>1</bitWidth>
102047              <access>read-write</access>
102048              <enumeratedValues>
102049                <enumeratedValue>
102050                  <name>0</name>
102051                  <description>Configured interrupt is not detected.</description>
102052                  <value>#0</value>
102053                </enumeratedValue>
102054                <enumeratedValue>
102055                  <name>1</name>
102056                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
102057                  <value>#1</value>
102058                </enumeratedValue>
102059              </enumeratedValues>
102060            </field>
102061          </fields>
102062        </register>
102063        <register>
102064          <name>PCR20</name>
102065          <description>Pin Control Register n</description>
102066          <addressOffset>0x50</addressOffset>
102067          <size>32</size>
102068          <access>read-write</access>
102069          <resetValue>0</resetValue>
102070          <resetMask>0xFFFFFFFF</resetMask>
102071          <fields>
102072            <field>
102073              <name>PS</name>
102074              <description>Pull Select</description>
102075              <bitOffset>0</bitOffset>
102076              <bitWidth>1</bitWidth>
102077              <access>read-only</access>
102078              <enumeratedValues>
102079                <enumeratedValue>
102080                  <name>0</name>
102081                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
102082                  <value>#0</value>
102083                </enumeratedValue>
102084                <enumeratedValue>
102085                  <name>1</name>
102086                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
102087                  <value>#1</value>
102088                </enumeratedValue>
102089              </enumeratedValues>
102090            </field>
102091            <field>
102092              <name>PE</name>
102093              <description>Pull Enable</description>
102094              <bitOffset>1</bitOffset>
102095              <bitWidth>1</bitWidth>
102096              <access>read-only</access>
102097              <enumeratedValues>
102098                <enumeratedValue>
102099                  <name>0</name>
102100                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
102101                  <value>#0</value>
102102                </enumeratedValue>
102103                <enumeratedValue>
102104                  <name>1</name>
102105                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
102106                  <value>#1</value>
102107                </enumeratedValue>
102108              </enumeratedValues>
102109            </field>
102110            <field>
102111              <name>SRE</name>
102112              <description>Slew Rate Enable</description>
102113              <bitOffset>2</bitOffset>
102114              <bitWidth>1</bitWidth>
102115              <access>read-only</access>
102116              <enumeratedValues>
102117                <enumeratedValue>
102118                  <name>0</name>
102119                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
102120                  <value>#0</value>
102121                </enumeratedValue>
102122                <enumeratedValue>
102123                  <name>1</name>
102124                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
102125                  <value>#1</value>
102126                </enumeratedValue>
102127              </enumeratedValues>
102128            </field>
102129            <field>
102130              <name>PFE</name>
102131              <description>Passive Filter Enable</description>
102132              <bitOffset>4</bitOffset>
102133              <bitWidth>1</bitWidth>
102134              <access>read-only</access>
102135              <enumeratedValues>
102136                <enumeratedValue>
102137                  <name>0</name>
102138                  <description>Passive input filter is disabled on the corresponding pin.</description>
102139                  <value>#0</value>
102140                </enumeratedValue>
102141                <enumeratedValue>
102142                  <name>1</name>
102143                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
102144                  <value>#1</value>
102145                </enumeratedValue>
102146              </enumeratedValues>
102147            </field>
102148            <field>
102149              <name>ODE</name>
102150              <description>Open Drain Enable</description>
102151              <bitOffset>5</bitOffset>
102152              <bitWidth>1</bitWidth>
102153              <access>read-only</access>
102154              <enumeratedValues>
102155                <enumeratedValue>
102156                  <name>0</name>
102157                  <description>Open drain output is disabled on the corresponding pin.</description>
102158                  <value>#0</value>
102159                </enumeratedValue>
102160                <enumeratedValue>
102161                  <name>1</name>
102162                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
102163                  <value>#1</value>
102164                </enumeratedValue>
102165              </enumeratedValues>
102166            </field>
102167            <field>
102168              <name>DSE</name>
102169              <description>Drive Strength Enable</description>
102170              <bitOffset>6</bitOffset>
102171              <bitWidth>1</bitWidth>
102172              <access>read-only</access>
102173              <enumeratedValues>
102174                <enumeratedValue>
102175                  <name>0</name>
102176                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
102177                  <value>#0</value>
102178                </enumeratedValue>
102179                <enumeratedValue>
102180                  <name>1</name>
102181                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
102182                  <value>#1</value>
102183                </enumeratedValue>
102184              </enumeratedValues>
102185            </field>
102186            <field>
102187              <name>MUX</name>
102188              <description>Pin Mux Control</description>
102189              <bitOffset>8</bitOffset>
102190              <bitWidth>3</bitWidth>
102191              <access>read-write</access>
102192              <enumeratedValues>
102193                <enumeratedValue>
102194                  <name>000</name>
102195                  <description>Pin disabled (Alternative 0) (analog).</description>
102196                  <value>#000</value>
102197                </enumeratedValue>
102198                <enumeratedValue>
102199                  <name>001</name>
102200                  <description>Alternative 1 (GPIO).</description>
102201                  <value>#001</value>
102202                </enumeratedValue>
102203                <enumeratedValue>
102204                  <name>010</name>
102205                  <description>Alternative 2 (chip-specific).</description>
102206                  <value>#010</value>
102207                </enumeratedValue>
102208                <enumeratedValue>
102209                  <name>011</name>
102210                  <description>Alternative 3 (chip-specific).</description>
102211                  <value>#011</value>
102212                </enumeratedValue>
102213                <enumeratedValue>
102214                  <name>100</name>
102215                  <description>Alternative 4 (chip-specific).</description>
102216                  <value>#100</value>
102217                </enumeratedValue>
102218                <enumeratedValue>
102219                  <name>101</name>
102220                  <description>Alternative 5 (chip-specific).</description>
102221                  <value>#101</value>
102222                </enumeratedValue>
102223                <enumeratedValue>
102224                  <name>110</name>
102225                  <description>Alternative 6 (chip-specific).</description>
102226                  <value>#110</value>
102227                </enumeratedValue>
102228                <enumeratedValue>
102229                  <name>111</name>
102230                  <description>Alternative 7 (chip-specific).</description>
102231                  <value>#111</value>
102232                </enumeratedValue>
102233              </enumeratedValues>
102234            </field>
102235            <field>
102236              <name>LK</name>
102237              <description>Lock Register</description>
102238              <bitOffset>15</bitOffset>
102239              <bitWidth>1</bitWidth>
102240              <access>read-write</access>
102241              <enumeratedValues>
102242                <enumeratedValue>
102243                  <name>0</name>
102244                  <description>Pin Control Register fields [15:0] are not locked.</description>
102245                  <value>#0</value>
102246                </enumeratedValue>
102247                <enumeratedValue>
102248                  <name>1</name>
102249                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
102250                  <value>#1</value>
102251                </enumeratedValue>
102252              </enumeratedValues>
102253            </field>
102254            <field>
102255              <name>IRQC</name>
102256              <description>Interrupt Configuration</description>
102257              <bitOffset>16</bitOffset>
102258              <bitWidth>4</bitWidth>
102259              <access>read-write</access>
102260              <enumeratedValues>
102261                <enumeratedValue>
102262                  <name>0000</name>
102263                  <description>Interrupt Status Flag (ISF) is disabled.</description>
102264                  <value>#0000</value>
102265                </enumeratedValue>
102266                <enumeratedValue>
102267                  <name>0001</name>
102268                  <description>ISF flag and DMA request on rising edge.</description>
102269                  <value>#0001</value>
102270                </enumeratedValue>
102271                <enumeratedValue>
102272                  <name>0010</name>
102273                  <description>ISF flag and DMA request on falling edge.</description>
102274                  <value>#0010</value>
102275                </enumeratedValue>
102276                <enumeratedValue>
102277                  <name>0011</name>
102278                  <description>ISF flag and DMA request on either edge.</description>
102279                  <value>#0011</value>
102280                </enumeratedValue>
102281                <enumeratedValue>
102282                  <name>1000</name>
102283                  <description>ISF flag and Interrupt when logic 0.</description>
102284                  <value>#1000</value>
102285                </enumeratedValue>
102286                <enumeratedValue>
102287                  <name>1001</name>
102288                  <description>ISF flag and Interrupt on rising-edge.</description>
102289                  <value>#1001</value>
102290                </enumeratedValue>
102291                <enumeratedValue>
102292                  <name>1010</name>
102293                  <description>ISF flag and Interrupt on falling-edge.</description>
102294                  <value>#1010</value>
102295                </enumeratedValue>
102296                <enumeratedValue>
102297                  <name>1011</name>
102298                  <description>ISF flag and Interrupt on either edge.</description>
102299                  <value>#1011</value>
102300                </enumeratedValue>
102301                <enumeratedValue>
102302                  <name>1100</name>
102303                  <description>ISF flag and Interrupt when logic 1.</description>
102304                  <value>#1100</value>
102305                </enumeratedValue>
102306              </enumeratedValues>
102307            </field>
102308            <field>
102309              <name>ISF</name>
102310              <description>Interrupt Status Flag</description>
102311              <bitOffset>24</bitOffset>
102312              <bitWidth>1</bitWidth>
102313              <access>read-write</access>
102314              <enumeratedValues>
102315                <enumeratedValue>
102316                  <name>0</name>
102317                  <description>Configured interrupt is not detected.</description>
102318                  <value>#0</value>
102319                </enumeratedValue>
102320                <enumeratedValue>
102321                  <name>1</name>
102322                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
102323                  <value>#1</value>
102324                </enumeratedValue>
102325              </enumeratedValues>
102326            </field>
102327          </fields>
102328        </register>
102329        <register>
102330          <name>PCR21</name>
102331          <description>Pin Control Register n</description>
102332          <addressOffset>0x54</addressOffset>
102333          <size>32</size>
102334          <access>read-write</access>
102335          <resetValue>0</resetValue>
102336          <resetMask>0xFFFFFFFF</resetMask>
102337          <fields>
102338            <field>
102339              <name>PS</name>
102340              <description>Pull Select</description>
102341              <bitOffset>0</bitOffset>
102342              <bitWidth>1</bitWidth>
102343              <access>read-only</access>
102344              <enumeratedValues>
102345                <enumeratedValue>
102346                  <name>0</name>
102347                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
102348                  <value>#0</value>
102349                </enumeratedValue>
102350                <enumeratedValue>
102351                  <name>1</name>
102352                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
102353                  <value>#1</value>
102354                </enumeratedValue>
102355              </enumeratedValues>
102356            </field>
102357            <field>
102358              <name>PE</name>
102359              <description>Pull Enable</description>
102360              <bitOffset>1</bitOffset>
102361              <bitWidth>1</bitWidth>
102362              <access>read-only</access>
102363              <enumeratedValues>
102364                <enumeratedValue>
102365                  <name>0</name>
102366                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
102367                  <value>#0</value>
102368                </enumeratedValue>
102369                <enumeratedValue>
102370                  <name>1</name>
102371                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
102372                  <value>#1</value>
102373                </enumeratedValue>
102374              </enumeratedValues>
102375            </field>
102376            <field>
102377              <name>SRE</name>
102378              <description>Slew Rate Enable</description>
102379              <bitOffset>2</bitOffset>
102380              <bitWidth>1</bitWidth>
102381              <access>read-only</access>
102382              <enumeratedValues>
102383                <enumeratedValue>
102384                  <name>0</name>
102385                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
102386                  <value>#0</value>
102387                </enumeratedValue>
102388                <enumeratedValue>
102389                  <name>1</name>
102390                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
102391                  <value>#1</value>
102392                </enumeratedValue>
102393              </enumeratedValues>
102394            </field>
102395            <field>
102396              <name>PFE</name>
102397              <description>Passive Filter Enable</description>
102398              <bitOffset>4</bitOffset>
102399              <bitWidth>1</bitWidth>
102400              <access>read-only</access>
102401              <enumeratedValues>
102402                <enumeratedValue>
102403                  <name>0</name>
102404                  <description>Passive input filter is disabled on the corresponding pin.</description>
102405                  <value>#0</value>
102406                </enumeratedValue>
102407                <enumeratedValue>
102408                  <name>1</name>
102409                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
102410                  <value>#1</value>
102411                </enumeratedValue>
102412              </enumeratedValues>
102413            </field>
102414            <field>
102415              <name>ODE</name>
102416              <description>Open Drain Enable</description>
102417              <bitOffset>5</bitOffset>
102418              <bitWidth>1</bitWidth>
102419              <access>read-only</access>
102420              <enumeratedValues>
102421                <enumeratedValue>
102422                  <name>0</name>
102423                  <description>Open drain output is disabled on the corresponding pin.</description>
102424                  <value>#0</value>
102425                </enumeratedValue>
102426                <enumeratedValue>
102427                  <name>1</name>
102428                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
102429                  <value>#1</value>
102430                </enumeratedValue>
102431              </enumeratedValues>
102432            </field>
102433            <field>
102434              <name>DSE</name>
102435              <description>Drive Strength Enable</description>
102436              <bitOffset>6</bitOffset>
102437              <bitWidth>1</bitWidth>
102438              <access>read-only</access>
102439              <enumeratedValues>
102440                <enumeratedValue>
102441                  <name>0</name>
102442                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
102443                  <value>#0</value>
102444                </enumeratedValue>
102445                <enumeratedValue>
102446                  <name>1</name>
102447                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
102448                  <value>#1</value>
102449                </enumeratedValue>
102450              </enumeratedValues>
102451            </field>
102452            <field>
102453              <name>MUX</name>
102454              <description>Pin Mux Control</description>
102455              <bitOffset>8</bitOffset>
102456              <bitWidth>3</bitWidth>
102457              <access>read-write</access>
102458              <enumeratedValues>
102459                <enumeratedValue>
102460                  <name>000</name>
102461                  <description>Pin disabled (Alternative 0) (analog).</description>
102462                  <value>#000</value>
102463                </enumeratedValue>
102464                <enumeratedValue>
102465                  <name>001</name>
102466                  <description>Alternative 1 (GPIO).</description>
102467                  <value>#001</value>
102468                </enumeratedValue>
102469                <enumeratedValue>
102470                  <name>010</name>
102471                  <description>Alternative 2 (chip-specific).</description>
102472                  <value>#010</value>
102473                </enumeratedValue>
102474                <enumeratedValue>
102475                  <name>011</name>
102476                  <description>Alternative 3 (chip-specific).</description>
102477                  <value>#011</value>
102478                </enumeratedValue>
102479                <enumeratedValue>
102480                  <name>100</name>
102481                  <description>Alternative 4 (chip-specific).</description>
102482                  <value>#100</value>
102483                </enumeratedValue>
102484                <enumeratedValue>
102485                  <name>101</name>
102486                  <description>Alternative 5 (chip-specific).</description>
102487                  <value>#101</value>
102488                </enumeratedValue>
102489                <enumeratedValue>
102490                  <name>110</name>
102491                  <description>Alternative 6 (chip-specific).</description>
102492                  <value>#110</value>
102493                </enumeratedValue>
102494                <enumeratedValue>
102495                  <name>111</name>
102496                  <description>Alternative 7 (chip-specific).</description>
102497                  <value>#111</value>
102498                </enumeratedValue>
102499              </enumeratedValues>
102500            </field>
102501            <field>
102502              <name>LK</name>
102503              <description>Lock Register</description>
102504              <bitOffset>15</bitOffset>
102505              <bitWidth>1</bitWidth>
102506              <access>read-write</access>
102507              <enumeratedValues>
102508                <enumeratedValue>
102509                  <name>0</name>
102510                  <description>Pin Control Register fields [15:0] are not locked.</description>
102511                  <value>#0</value>
102512                </enumeratedValue>
102513                <enumeratedValue>
102514                  <name>1</name>
102515                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
102516                  <value>#1</value>
102517                </enumeratedValue>
102518              </enumeratedValues>
102519            </field>
102520            <field>
102521              <name>IRQC</name>
102522              <description>Interrupt Configuration</description>
102523              <bitOffset>16</bitOffset>
102524              <bitWidth>4</bitWidth>
102525              <access>read-write</access>
102526              <enumeratedValues>
102527                <enumeratedValue>
102528                  <name>0000</name>
102529                  <description>Interrupt Status Flag (ISF) is disabled.</description>
102530                  <value>#0000</value>
102531                </enumeratedValue>
102532                <enumeratedValue>
102533                  <name>0001</name>
102534                  <description>ISF flag and DMA request on rising edge.</description>
102535                  <value>#0001</value>
102536                </enumeratedValue>
102537                <enumeratedValue>
102538                  <name>0010</name>
102539                  <description>ISF flag and DMA request on falling edge.</description>
102540                  <value>#0010</value>
102541                </enumeratedValue>
102542                <enumeratedValue>
102543                  <name>0011</name>
102544                  <description>ISF flag and DMA request on either edge.</description>
102545                  <value>#0011</value>
102546                </enumeratedValue>
102547                <enumeratedValue>
102548                  <name>1000</name>
102549                  <description>ISF flag and Interrupt when logic 0.</description>
102550                  <value>#1000</value>
102551                </enumeratedValue>
102552                <enumeratedValue>
102553                  <name>1001</name>
102554                  <description>ISF flag and Interrupt on rising-edge.</description>
102555                  <value>#1001</value>
102556                </enumeratedValue>
102557                <enumeratedValue>
102558                  <name>1010</name>
102559                  <description>ISF flag and Interrupt on falling-edge.</description>
102560                  <value>#1010</value>
102561                </enumeratedValue>
102562                <enumeratedValue>
102563                  <name>1011</name>
102564                  <description>ISF flag and Interrupt on either edge.</description>
102565                  <value>#1011</value>
102566                </enumeratedValue>
102567                <enumeratedValue>
102568                  <name>1100</name>
102569                  <description>ISF flag and Interrupt when logic 1.</description>
102570                  <value>#1100</value>
102571                </enumeratedValue>
102572              </enumeratedValues>
102573            </field>
102574            <field>
102575              <name>ISF</name>
102576              <description>Interrupt Status Flag</description>
102577              <bitOffset>24</bitOffset>
102578              <bitWidth>1</bitWidth>
102579              <access>read-write</access>
102580              <enumeratedValues>
102581                <enumeratedValue>
102582                  <name>0</name>
102583                  <description>Configured interrupt is not detected.</description>
102584                  <value>#0</value>
102585                </enumeratedValue>
102586                <enumeratedValue>
102587                  <name>1</name>
102588                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
102589                  <value>#1</value>
102590                </enumeratedValue>
102591              </enumeratedValues>
102592            </field>
102593          </fields>
102594        </register>
102595        <register>
102596          <name>PCR22</name>
102597          <description>Pin Control Register n</description>
102598          <addressOffset>0x58</addressOffset>
102599          <size>32</size>
102600          <access>read-write</access>
102601          <resetValue>0</resetValue>
102602          <resetMask>0xFFFFFFFF</resetMask>
102603          <fields>
102604            <field>
102605              <name>PS</name>
102606              <description>Pull Select</description>
102607              <bitOffset>0</bitOffset>
102608              <bitWidth>1</bitWidth>
102609              <access>read-only</access>
102610              <enumeratedValues>
102611                <enumeratedValue>
102612                  <name>0</name>
102613                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
102614                  <value>#0</value>
102615                </enumeratedValue>
102616                <enumeratedValue>
102617                  <name>1</name>
102618                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
102619                  <value>#1</value>
102620                </enumeratedValue>
102621              </enumeratedValues>
102622            </field>
102623            <field>
102624              <name>PE</name>
102625              <description>Pull Enable</description>
102626              <bitOffset>1</bitOffset>
102627              <bitWidth>1</bitWidth>
102628              <access>read-only</access>
102629              <enumeratedValues>
102630                <enumeratedValue>
102631                  <name>0</name>
102632                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
102633                  <value>#0</value>
102634                </enumeratedValue>
102635                <enumeratedValue>
102636                  <name>1</name>
102637                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
102638                  <value>#1</value>
102639                </enumeratedValue>
102640              </enumeratedValues>
102641            </field>
102642            <field>
102643              <name>SRE</name>
102644              <description>Slew Rate Enable</description>
102645              <bitOffset>2</bitOffset>
102646              <bitWidth>1</bitWidth>
102647              <access>read-only</access>
102648              <enumeratedValues>
102649                <enumeratedValue>
102650                  <name>0</name>
102651                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
102652                  <value>#0</value>
102653                </enumeratedValue>
102654                <enumeratedValue>
102655                  <name>1</name>
102656                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
102657                  <value>#1</value>
102658                </enumeratedValue>
102659              </enumeratedValues>
102660            </field>
102661            <field>
102662              <name>PFE</name>
102663              <description>Passive Filter Enable</description>
102664              <bitOffset>4</bitOffset>
102665              <bitWidth>1</bitWidth>
102666              <access>read-only</access>
102667              <enumeratedValues>
102668                <enumeratedValue>
102669                  <name>0</name>
102670                  <description>Passive input filter is disabled on the corresponding pin.</description>
102671                  <value>#0</value>
102672                </enumeratedValue>
102673                <enumeratedValue>
102674                  <name>1</name>
102675                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
102676                  <value>#1</value>
102677                </enumeratedValue>
102678              </enumeratedValues>
102679            </field>
102680            <field>
102681              <name>ODE</name>
102682              <description>Open Drain Enable</description>
102683              <bitOffset>5</bitOffset>
102684              <bitWidth>1</bitWidth>
102685              <access>read-only</access>
102686              <enumeratedValues>
102687                <enumeratedValue>
102688                  <name>0</name>
102689                  <description>Open drain output is disabled on the corresponding pin.</description>
102690                  <value>#0</value>
102691                </enumeratedValue>
102692                <enumeratedValue>
102693                  <name>1</name>
102694                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
102695                  <value>#1</value>
102696                </enumeratedValue>
102697              </enumeratedValues>
102698            </field>
102699            <field>
102700              <name>DSE</name>
102701              <description>Drive Strength Enable</description>
102702              <bitOffset>6</bitOffset>
102703              <bitWidth>1</bitWidth>
102704              <access>read-only</access>
102705              <enumeratedValues>
102706                <enumeratedValue>
102707                  <name>0</name>
102708                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
102709                  <value>#0</value>
102710                </enumeratedValue>
102711                <enumeratedValue>
102712                  <name>1</name>
102713                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
102714                  <value>#1</value>
102715                </enumeratedValue>
102716              </enumeratedValues>
102717            </field>
102718            <field>
102719              <name>MUX</name>
102720              <description>Pin Mux Control</description>
102721              <bitOffset>8</bitOffset>
102722              <bitWidth>3</bitWidth>
102723              <access>read-write</access>
102724              <enumeratedValues>
102725                <enumeratedValue>
102726                  <name>000</name>
102727                  <description>Pin disabled (Alternative 0) (analog).</description>
102728                  <value>#000</value>
102729                </enumeratedValue>
102730                <enumeratedValue>
102731                  <name>001</name>
102732                  <description>Alternative 1 (GPIO).</description>
102733                  <value>#001</value>
102734                </enumeratedValue>
102735                <enumeratedValue>
102736                  <name>010</name>
102737                  <description>Alternative 2 (chip-specific).</description>
102738                  <value>#010</value>
102739                </enumeratedValue>
102740                <enumeratedValue>
102741                  <name>011</name>
102742                  <description>Alternative 3 (chip-specific).</description>
102743                  <value>#011</value>
102744                </enumeratedValue>
102745                <enumeratedValue>
102746                  <name>100</name>
102747                  <description>Alternative 4 (chip-specific).</description>
102748                  <value>#100</value>
102749                </enumeratedValue>
102750                <enumeratedValue>
102751                  <name>101</name>
102752                  <description>Alternative 5 (chip-specific).</description>
102753                  <value>#101</value>
102754                </enumeratedValue>
102755                <enumeratedValue>
102756                  <name>110</name>
102757                  <description>Alternative 6 (chip-specific).</description>
102758                  <value>#110</value>
102759                </enumeratedValue>
102760                <enumeratedValue>
102761                  <name>111</name>
102762                  <description>Alternative 7 (chip-specific).</description>
102763                  <value>#111</value>
102764                </enumeratedValue>
102765              </enumeratedValues>
102766            </field>
102767            <field>
102768              <name>LK</name>
102769              <description>Lock Register</description>
102770              <bitOffset>15</bitOffset>
102771              <bitWidth>1</bitWidth>
102772              <access>read-write</access>
102773              <enumeratedValues>
102774                <enumeratedValue>
102775                  <name>0</name>
102776                  <description>Pin Control Register fields [15:0] are not locked.</description>
102777                  <value>#0</value>
102778                </enumeratedValue>
102779                <enumeratedValue>
102780                  <name>1</name>
102781                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
102782                  <value>#1</value>
102783                </enumeratedValue>
102784              </enumeratedValues>
102785            </field>
102786            <field>
102787              <name>IRQC</name>
102788              <description>Interrupt Configuration</description>
102789              <bitOffset>16</bitOffset>
102790              <bitWidth>4</bitWidth>
102791              <access>read-write</access>
102792              <enumeratedValues>
102793                <enumeratedValue>
102794                  <name>0000</name>
102795                  <description>Interrupt Status Flag (ISF) is disabled.</description>
102796                  <value>#0000</value>
102797                </enumeratedValue>
102798                <enumeratedValue>
102799                  <name>0001</name>
102800                  <description>ISF flag and DMA request on rising edge.</description>
102801                  <value>#0001</value>
102802                </enumeratedValue>
102803                <enumeratedValue>
102804                  <name>0010</name>
102805                  <description>ISF flag and DMA request on falling edge.</description>
102806                  <value>#0010</value>
102807                </enumeratedValue>
102808                <enumeratedValue>
102809                  <name>0011</name>
102810                  <description>ISF flag and DMA request on either edge.</description>
102811                  <value>#0011</value>
102812                </enumeratedValue>
102813                <enumeratedValue>
102814                  <name>1000</name>
102815                  <description>ISF flag and Interrupt when logic 0.</description>
102816                  <value>#1000</value>
102817                </enumeratedValue>
102818                <enumeratedValue>
102819                  <name>1001</name>
102820                  <description>ISF flag and Interrupt on rising-edge.</description>
102821                  <value>#1001</value>
102822                </enumeratedValue>
102823                <enumeratedValue>
102824                  <name>1010</name>
102825                  <description>ISF flag and Interrupt on falling-edge.</description>
102826                  <value>#1010</value>
102827                </enumeratedValue>
102828                <enumeratedValue>
102829                  <name>1011</name>
102830                  <description>ISF flag and Interrupt on either edge.</description>
102831                  <value>#1011</value>
102832                </enumeratedValue>
102833                <enumeratedValue>
102834                  <name>1100</name>
102835                  <description>ISF flag and Interrupt when logic 1.</description>
102836                  <value>#1100</value>
102837                </enumeratedValue>
102838              </enumeratedValues>
102839            </field>
102840            <field>
102841              <name>ISF</name>
102842              <description>Interrupt Status Flag</description>
102843              <bitOffset>24</bitOffset>
102844              <bitWidth>1</bitWidth>
102845              <access>read-write</access>
102846              <enumeratedValues>
102847                <enumeratedValue>
102848                  <name>0</name>
102849                  <description>Configured interrupt is not detected.</description>
102850                  <value>#0</value>
102851                </enumeratedValue>
102852                <enumeratedValue>
102853                  <name>1</name>
102854                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
102855                  <value>#1</value>
102856                </enumeratedValue>
102857              </enumeratedValues>
102858            </field>
102859          </fields>
102860        </register>
102861        <register>
102862          <name>PCR23</name>
102863          <description>Pin Control Register n</description>
102864          <addressOffset>0x5C</addressOffset>
102865          <size>32</size>
102866          <access>read-write</access>
102867          <resetValue>0</resetValue>
102868          <resetMask>0xFFFFFFFF</resetMask>
102869          <fields>
102870            <field>
102871              <name>PS</name>
102872              <description>Pull Select</description>
102873              <bitOffset>0</bitOffset>
102874              <bitWidth>1</bitWidth>
102875              <access>read-only</access>
102876              <enumeratedValues>
102877                <enumeratedValue>
102878                  <name>0</name>
102879                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
102880                  <value>#0</value>
102881                </enumeratedValue>
102882                <enumeratedValue>
102883                  <name>1</name>
102884                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
102885                  <value>#1</value>
102886                </enumeratedValue>
102887              </enumeratedValues>
102888            </field>
102889            <field>
102890              <name>PE</name>
102891              <description>Pull Enable</description>
102892              <bitOffset>1</bitOffset>
102893              <bitWidth>1</bitWidth>
102894              <access>read-only</access>
102895              <enumeratedValues>
102896                <enumeratedValue>
102897                  <name>0</name>
102898                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
102899                  <value>#0</value>
102900                </enumeratedValue>
102901                <enumeratedValue>
102902                  <name>1</name>
102903                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
102904                  <value>#1</value>
102905                </enumeratedValue>
102906              </enumeratedValues>
102907            </field>
102908            <field>
102909              <name>SRE</name>
102910              <description>Slew Rate Enable</description>
102911              <bitOffset>2</bitOffset>
102912              <bitWidth>1</bitWidth>
102913              <access>read-only</access>
102914              <enumeratedValues>
102915                <enumeratedValue>
102916                  <name>0</name>
102917                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
102918                  <value>#0</value>
102919                </enumeratedValue>
102920                <enumeratedValue>
102921                  <name>1</name>
102922                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
102923                  <value>#1</value>
102924                </enumeratedValue>
102925              </enumeratedValues>
102926            </field>
102927            <field>
102928              <name>PFE</name>
102929              <description>Passive Filter Enable</description>
102930              <bitOffset>4</bitOffset>
102931              <bitWidth>1</bitWidth>
102932              <access>read-only</access>
102933              <enumeratedValues>
102934                <enumeratedValue>
102935                  <name>0</name>
102936                  <description>Passive input filter is disabled on the corresponding pin.</description>
102937                  <value>#0</value>
102938                </enumeratedValue>
102939                <enumeratedValue>
102940                  <name>1</name>
102941                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
102942                  <value>#1</value>
102943                </enumeratedValue>
102944              </enumeratedValues>
102945            </field>
102946            <field>
102947              <name>ODE</name>
102948              <description>Open Drain Enable</description>
102949              <bitOffset>5</bitOffset>
102950              <bitWidth>1</bitWidth>
102951              <access>read-only</access>
102952              <enumeratedValues>
102953                <enumeratedValue>
102954                  <name>0</name>
102955                  <description>Open drain output is disabled on the corresponding pin.</description>
102956                  <value>#0</value>
102957                </enumeratedValue>
102958                <enumeratedValue>
102959                  <name>1</name>
102960                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
102961                  <value>#1</value>
102962                </enumeratedValue>
102963              </enumeratedValues>
102964            </field>
102965            <field>
102966              <name>DSE</name>
102967              <description>Drive Strength Enable</description>
102968              <bitOffset>6</bitOffset>
102969              <bitWidth>1</bitWidth>
102970              <access>read-only</access>
102971              <enumeratedValues>
102972                <enumeratedValue>
102973                  <name>0</name>
102974                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
102975                  <value>#0</value>
102976                </enumeratedValue>
102977                <enumeratedValue>
102978                  <name>1</name>
102979                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
102980                  <value>#1</value>
102981                </enumeratedValue>
102982              </enumeratedValues>
102983            </field>
102984            <field>
102985              <name>MUX</name>
102986              <description>Pin Mux Control</description>
102987              <bitOffset>8</bitOffset>
102988              <bitWidth>3</bitWidth>
102989              <access>read-write</access>
102990              <enumeratedValues>
102991                <enumeratedValue>
102992                  <name>000</name>
102993                  <description>Pin disabled (Alternative 0) (analog).</description>
102994                  <value>#000</value>
102995                </enumeratedValue>
102996                <enumeratedValue>
102997                  <name>001</name>
102998                  <description>Alternative 1 (GPIO).</description>
102999                  <value>#001</value>
103000                </enumeratedValue>
103001                <enumeratedValue>
103002                  <name>010</name>
103003                  <description>Alternative 2 (chip-specific).</description>
103004                  <value>#010</value>
103005                </enumeratedValue>
103006                <enumeratedValue>
103007                  <name>011</name>
103008                  <description>Alternative 3 (chip-specific).</description>
103009                  <value>#011</value>
103010                </enumeratedValue>
103011                <enumeratedValue>
103012                  <name>100</name>
103013                  <description>Alternative 4 (chip-specific).</description>
103014                  <value>#100</value>
103015                </enumeratedValue>
103016                <enumeratedValue>
103017                  <name>101</name>
103018                  <description>Alternative 5 (chip-specific).</description>
103019                  <value>#101</value>
103020                </enumeratedValue>
103021                <enumeratedValue>
103022                  <name>110</name>
103023                  <description>Alternative 6 (chip-specific).</description>
103024                  <value>#110</value>
103025                </enumeratedValue>
103026                <enumeratedValue>
103027                  <name>111</name>
103028                  <description>Alternative 7 (chip-specific).</description>
103029                  <value>#111</value>
103030                </enumeratedValue>
103031              </enumeratedValues>
103032            </field>
103033            <field>
103034              <name>LK</name>
103035              <description>Lock Register</description>
103036              <bitOffset>15</bitOffset>
103037              <bitWidth>1</bitWidth>
103038              <access>read-write</access>
103039              <enumeratedValues>
103040                <enumeratedValue>
103041                  <name>0</name>
103042                  <description>Pin Control Register fields [15:0] are not locked.</description>
103043                  <value>#0</value>
103044                </enumeratedValue>
103045                <enumeratedValue>
103046                  <name>1</name>
103047                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
103048                  <value>#1</value>
103049                </enumeratedValue>
103050              </enumeratedValues>
103051            </field>
103052            <field>
103053              <name>IRQC</name>
103054              <description>Interrupt Configuration</description>
103055              <bitOffset>16</bitOffset>
103056              <bitWidth>4</bitWidth>
103057              <access>read-write</access>
103058              <enumeratedValues>
103059                <enumeratedValue>
103060                  <name>0000</name>
103061                  <description>Interrupt Status Flag (ISF) is disabled.</description>
103062                  <value>#0000</value>
103063                </enumeratedValue>
103064                <enumeratedValue>
103065                  <name>0001</name>
103066                  <description>ISF flag and DMA request on rising edge.</description>
103067                  <value>#0001</value>
103068                </enumeratedValue>
103069                <enumeratedValue>
103070                  <name>0010</name>
103071                  <description>ISF flag and DMA request on falling edge.</description>
103072                  <value>#0010</value>
103073                </enumeratedValue>
103074                <enumeratedValue>
103075                  <name>0011</name>
103076                  <description>ISF flag and DMA request on either edge.</description>
103077                  <value>#0011</value>
103078                </enumeratedValue>
103079                <enumeratedValue>
103080                  <name>1000</name>
103081                  <description>ISF flag and Interrupt when logic 0.</description>
103082                  <value>#1000</value>
103083                </enumeratedValue>
103084                <enumeratedValue>
103085                  <name>1001</name>
103086                  <description>ISF flag and Interrupt on rising-edge.</description>
103087                  <value>#1001</value>
103088                </enumeratedValue>
103089                <enumeratedValue>
103090                  <name>1010</name>
103091                  <description>ISF flag and Interrupt on falling-edge.</description>
103092                  <value>#1010</value>
103093                </enumeratedValue>
103094                <enumeratedValue>
103095                  <name>1011</name>
103096                  <description>ISF flag and Interrupt on either edge.</description>
103097                  <value>#1011</value>
103098                </enumeratedValue>
103099                <enumeratedValue>
103100                  <name>1100</name>
103101                  <description>ISF flag and Interrupt when logic 1.</description>
103102                  <value>#1100</value>
103103                </enumeratedValue>
103104              </enumeratedValues>
103105            </field>
103106            <field>
103107              <name>ISF</name>
103108              <description>Interrupt Status Flag</description>
103109              <bitOffset>24</bitOffset>
103110              <bitWidth>1</bitWidth>
103111              <access>read-write</access>
103112              <enumeratedValues>
103113                <enumeratedValue>
103114                  <name>0</name>
103115                  <description>Configured interrupt is not detected.</description>
103116                  <value>#0</value>
103117                </enumeratedValue>
103118                <enumeratedValue>
103119                  <name>1</name>
103120                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
103121                  <value>#1</value>
103122                </enumeratedValue>
103123              </enumeratedValues>
103124            </field>
103125          </fields>
103126        </register>
103127        <register>
103128          <name>PCR24</name>
103129          <description>Pin Control Register n</description>
103130          <addressOffset>0x60</addressOffset>
103131          <size>32</size>
103132          <access>read-write</access>
103133          <resetValue>0</resetValue>
103134          <resetMask>0xFFFFFFFF</resetMask>
103135          <fields>
103136            <field>
103137              <name>PS</name>
103138              <description>Pull Select</description>
103139              <bitOffset>0</bitOffset>
103140              <bitWidth>1</bitWidth>
103141              <access>read-only</access>
103142              <enumeratedValues>
103143                <enumeratedValue>
103144                  <name>0</name>
103145                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
103146                  <value>#0</value>
103147                </enumeratedValue>
103148                <enumeratedValue>
103149                  <name>1</name>
103150                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
103151                  <value>#1</value>
103152                </enumeratedValue>
103153              </enumeratedValues>
103154            </field>
103155            <field>
103156              <name>PE</name>
103157              <description>Pull Enable</description>
103158              <bitOffset>1</bitOffset>
103159              <bitWidth>1</bitWidth>
103160              <access>read-only</access>
103161              <enumeratedValues>
103162                <enumeratedValue>
103163                  <name>0</name>
103164                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
103165                  <value>#0</value>
103166                </enumeratedValue>
103167                <enumeratedValue>
103168                  <name>1</name>
103169                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
103170                  <value>#1</value>
103171                </enumeratedValue>
103172              </enumeratedValues>
103173            </field>
103174            <field>
103175              <name>SRE</name>
103176              <description>Slew Rate Enable</description>
103177              <bitOffset>2</bitOffset>
103178              <bitWidth>1</bitWidth>
103179              <access>read-only</access>
103180              <enumeratedValues>
103181                <enumeratedValue>
103182                  <name>0</name>
103183                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
103184                  <value>#0</value>
103185                </enumeratedValue>
103186                <enumeratedValue>
103187                  <name>1</name>
103188                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
103189                  <value>#1</value>
103190                </enumeratedValue>
103191              </enumeratedValues>
103192            </field>
103193            <field>
103194              <name>PFE</name>
103195              <description>Passive Filter Enable</description>
103196              <bitOffset>4</bitOffset>
103197              <bitWidth>1</bitWidth>
103198              <access>read-only</access>
103199              <enumeratedValues>
103200                <enumeratedValue>
103201                  <name>0</name>
103202                  <description>Passive input filter is disabled on the corresponding pin.</description>
103203                  <value>#0</value>
103204                </enumeratedValue>
103205                <enumeratedValue>
103206                  <name>1</name>
103207                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
103208                  <value>#1</value>
103209                </enumeratedValue>
103210              </enumeratedValues>
103211            </field>
103212            <field>
103213              <name>ODE</name>
103214              <description>Open Drain Enable</description>
103215              <bitOffset>5</bitOffset>
103216              <bitWidth>1</bitWidth>
103217              <access>read-only</access>
103218              <enumeratedValues>
103219                <enumeratedValue>
103220                  <name>0</name>
103221                  <description>Open drain output is disabled on the corresponding pin.</description>
103222                  <value>#0</value>
103223                </enumeratedValue>
103224                <enumeratedValue>
103225                  <name>1</name>
103226                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
103227                  <value>#1</value>
103228                </enumeratedValue>
103229              </enumeratedValues>
103230            </field>
103231            <field>
103232              <name>DSE</name>
103233              <description>Drive Strength Enable</description>
103234              <bitOffset>6</bitOffset>
103235              <bitWidth>1</bitWidth>
103236              <access>read-only</access>
103237              <enumeratedValues>
103238                <enumeratedValue>
103239                  <name>0</name>
103240                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
103241                  <value>#0</value>
103242                </enumeratedValue>
103243                <enumeratedValue>
103244                  <name>1</name>
103245                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
103246                  <value>#1</value>
103247                </enumeratedValue>
103248              </enumeratedValues>
103249            </field>
103250            <field>
103251              <name>MUX</name>
103252              <description>Pin Mux Control</description>
103253              <bitOffset>8</bitOffset>
103254              <bitWidth>3</bitWidth>
103255              <access>read-write</access>
103256              <enumeratedValues>
103257                <enumeratedValue>
103258                  <name>000</name>
103259                  <description>Pin disabled (Alternative 0) (analog).</description>
103260                  <value>#000</value>
103261                </enumeratedValue>
103262                <enumeratedValue>
103263                  <name>001</name>
103264                  <description>Alternative 1 (GPIO).</description>
103265                  <value>#001</value>
103266                </enumeratedValue>
103267                <enumeratedValue>
103268                  <name>010</name>
103269                  <description>Alternative 2 (chip-specific).</description>
103270                  <value>#010</value>
103271                </enumeratedValue>
103272                <enumeratedValue>
103273                  <name>011</name>
103274                  <description>Alternative 3 (chip-specific).</description>
103275                  <value>#011</value>
103276                </enumeratedValue>
103277                <enumeratedValue>
103278                  <name>100</name>
103279                  <description>Alternative 4 (chip-specific).</description>
103280                  <value>#100</value>
103281                </enumeratedValue>
103282                <enumeratedValue>
103283                  <name>101</name>
103284                  <description>Alternative 5 (chip-specific).</description>
103285                  <value>#101</value>
103286                </enumeratedValue>
103287                <enumeratedValue>
103288                  <name>110</name>
103289                  <description>Alternative 6 (chip-specific).</description>
103290                  <value>#110</value>
103291                </enumeratedValue>
103292                <enumeratedValue>
103293                  <name>111</name>
103294                  <description>Alternative 7 (chip-specific).</description>
103295                  <value>#111</value>
103296                </enumeratedValue>
103297              </enumeratedValues>
103298            </field>
103299            <field>
103300              <name>LK</name>
103301              <description>Lock Register</description>
103302              <bitOffset>15</bitOffset>
103303              <bitWidth>1</bitWidth>
103304              <access>read-write</access>
103305              <enumeratedValues>
103306                <enumeratedValue>
103307                  <name>0</name>
103308                  <description>Pin Control Register fields [15:0] are not locked.</description>
103309                  <value>#0</value>
103310                </enumeratedValue>
103311                <enumeratedValue>
103312                  <name>1</name>
103313                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
103314                  <value>#1</value>
103315                </enumeratedValue>
103316              </enumeratedValues>
103317            </field>
103318            <field>
103319              <name>IRQC</name>
103320              <description>Interrupt Configuration</description>
103321              <bitOffset>16</bitOffset>
103322              <bitWidth>4</bitWidth>
103323              <access>read-write</access>
103324              <enumeratedValues>
103325                <enumeratedValue>
103326                  <name>0000</name>
103327                  <description>Interrupt Status Flag (ISF) is disabled.</description>
103328                  <value>#0000</value>
103329                </enumeratedValue>
103330                <enumeratedValue>
103331                  <name>0001</name>
103332                  <description>ISF flag and DMA request on rising edge.</description>
103333                  <value>#0001</value>
103334                </enumeratedValue>
103335                <enumeratedValue>
103336                  <name>0010</name>
103337                  <description>ISF flag and DMA request on falling edge.</description>
103338                  <value>#0010</value>
103339                </enumeratedValue>
103340                <enumeratedValue>
103341                  <name>0011</name>
103342                  <description>ISF flag and DMA request on either edge.</description>
103343                  <value>#0011</value>
103344                </enumeratedValue>
103345                <enumeratedValue>
103346                  <name>1000</name>
103347                  <description>ISF flag and Interrupt when logic 0.</description>
103348                  <value>#1000</value>
103349                </enumeratedValue>
103350                <enumeratedValue>
103351                  <name>1001</name>
103352                  <description>ISF flag and Interrupt on rising-edge.</description>
103353                  <value>#1001</value>
103354                </enumeratedValue>
103355                <enumeratedValue>
103356                  <name>1010</name>
103357                  <description>ISF flag and Interrupt on falling-edge.</description>
103358                  <value>#1010</value>
103359                </enumeratedValue>
103360                <enumeratedValue>
103361                  <name>1011</name>
103362                  <description>ISF flag and Interrupt on either edge.</description>
103363                  <value>#1011</value>
103364                </enumeratedValue>
103365                <enumeratedValue>
103366                  <name>1100</name>
103367                  <description>ISF flag and Interrupt when logic 1.</description>
103368                  <value>#1100</value>
103369                </enumeratedValue>
103370              </enumeratedValues>
103371            </field>
103372            <field>
103373              <name>ISF</name>
103374              <description>Interrupt Status Flag</description>
103375              <bitOffset>24</bitOffset>
103376              <bitWidth>1</bitWidth>
103377              <access>read-write</access>
103378              <enumeratedValues>
103379                <enumeratedValue>
103380                  <name>0</name>
103381                  <description>Configured interrupt is not detected.</description>
103382                  <value>#0</value>
103383                </enumeratedValue>
103384                <enumeratedValue>
103385                  <name>1</name>
103386                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
103387                  <value>#1</value>
103388                </enumeratedValue>
103389              </enumeratedValues>
103390            </field>
103391          </fields>
103392        </register>
103393        <register>
103394          <name>PCR25</name>
103395          <description>Pin Control Register n</description>
103396          <addressOffset>0x64</addressOffset>
103397          <size>32</size>
103398          <access>read-write</access>
103399          <resetValue>0</resetValue>
103400          <resetMask>0xFFFFFFFF</resetMask>
103401          <fields>
103402            <field>
103403              <name>PS</name>
103404              <description>Pull Select</description>
103405              <bitOffset>0</bitOffset>
103406              <bitWidth>1</bitWidth>
103407              <access>read-only</access>
103408              <enumeratedValues>
103409                <enumeratedValue>
103410                  <name>0</name>
103411                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
103412                  <value>#0</value>
103413                </enumeratedValue>
103414                <enumeratedValue>
103415                  <name>1</name>
103416                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
103417                  <value>#1</value>
103418                </enumeratedValue>
103419              </enumeratedValues>
103420            </field>
103421            <field>
103422              <name>PE</name>
103423              <description>Pull Enable</description>
103424              <bitOffset>1</bitOffset>
103425              <bitWidth>1</bitWidth>
103426              <access>read-only</access>
103427              <enumeratedValues>
103428                <enumeratedValue>
103429                  <name>0</name>
103430                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
103431                  <value>#0</value>
103432                </enumeratedValue>
103433                <enumeratedValue>
103434                  <name>1</name>
103435                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
103436                  <value>#1</value>
103437                </enumeratedValue>
103438              </enumeratedValues>
103439            </field>
103440            <field>
103441              <name>SRE</name>
103442              <description>Slew Rate Enable</description>
103443              <bitOffset>2</bitOffset>
103444              <bitWidth>1</bitWidth>
103445              <access>read-only</access>
103446              <enumeratedValues>
103447                <enumeratedValue>
103448                  <name>0</name>
103449                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
103450                  <value>#0</value>
103451                </enumeratedValue>
103452                <enumeratedValue>
103453                  <name>1</name>
103454                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
103455                  <value>#1</value>
103456                </enumeratedValue>
103457              </enumeratedValues>
103458            </field>
103459            <field>
103460              <name>PFE</name>
103461              <description>Passive Filter Enable</description>
103462              <bitOffset>4</bitOffset>
103463              <bitWidth>1</bitWidth>
103464              <access>read-only</access>
103465              <enumeratedValues>
103466                <enumeratedValue>
103467                  <name>0</name>
103468                  <description>Passive input filter is disabled on the corresponding pin.</description>
103469                  <value>#0</value>
103470                </enumeratedValue>
103471                <enumeratedValue>
103472                  <name>1</name>
103473                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
103474                  <value>#1</value>
103475                </enumeratedValue>
103476              </enumeratedValues>
103477            </field>
103478            <field>
103479              <name>ODE</name>
103480              <description>Open Drain Enable</description>
103481              <bitOffset>5</bitOffset>
103482              <bitWidth>1</bitWidth>
103483              <access>read-only</access>
103484              <enumeratedValues>
103485                <enumeratedValue>
103486                  <name>0</name>
103487                  <description>Open drain output is disabled on the corresponding pin.</description>
103488                  <value>#0</value>
103489                </enumeratedValue>
103490                <enumeratedValue>
103491                  <name>1</name>
103492                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
103493                  <value>#1</value>
103494                </enumeratedValue>
103495              </enumeratedValues>
103496            </field>
103497            <field>
103498              <name>DSE</name>
103499              <description>Drive Strength Enable</description>
103500              <bitOffset>6</bitOffset>
103501              <bitWidth>1</bitWidth>
103502              <access>read-only</access>
103503              <enumeratedValues>
103504                <enumeratedValue>
103505                  <name>0</name>
103506                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
103507                  <value>#0</value>
103508                </enumeratedValue>
103509                <enumeratedValue>
103510                  <name>1</name>
103511                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
103512                  <value>#1</value>
103513                </enumeratedValue>
103514              </enumeratedValues>
103515            </field>
103516            <field>
103517              <name>MUX</name>
103518              <description>Pin Mux Control</description>
103519              <bitOffset>8</bitOffset>
103520              <bitWidth>3</bitWidth>
103521              <access>read-write</access>
103522              <enumeratedValues>
103523                <enumeratedValue>
103524                  <name>000</name>
103525                  <description>Pin disabled (Alternative 0) (analog).</description>
103526                  <value>#000</value>
103527                </enumeratedValue>
103528                <enumeratedValue>
103529                  <name>001</name>
103530                  <description>Alternative 1 (GPIO).</description>
103531                  <value>#001</value>
103532                </enumeratedValue>
103533                <enumeratedValue>
103534                  <name>010</name>
103535                  <description>Alternative 2 (chip-specific).</description>
103536                  <value>#010</value>
103537                </enumeratedValue>
103538                <enumeratedValue>
103539                  <name>011</name>
103540                  <description>Alternative 3 (chip-specific).</description>
103541                  <value>#011</value>
103542                </enumeratedValue>
103543                <enumeratedValue>
103544                  <name>100</name>
103545                  <description>Alternative 4 (chip-specific).</description>
103546                  <value>#100</value>
103547                </enumeratedValue>
103548                <enumeratedValue>
103549                  <name>101</name>
103550                  <description>Alternative 5 (chip-specific).</description>
103551                  <value>#101</value>
103552                </enumeratedValue>
103553                <enumeratedValue>
103554                  <name>110</name>
103555                  <description>Alternative 6 (chip-specific).</description>
103556                  <value>#110</value>
103557                </enumeratedValue>
103558                <enumeratedValue>
103559                  <name>111</name>
103560                  <description>Alternative 7 (chip-specific).</description>
103561                  <value>#111</value>
103562                </enumeratedValue>
103563              </enumeratedValues>
103564            </field>
103565            <field>
103566              <name>LK</name>
103567              <description>Lock Register</description>
103568              <bitOffset>15</bitOffset>
103569              <bitWidth>1</bitWidth>
103570              <access>read-write</access>
103571              <enumeratedValues>
103572                <enumeratedValue>
103573                  <name>0</name>
103574                  <description>Pin Control Register fields [15:0] are not locked.</description>
103575                  <value>#0</value>
103576                </enumeratedValue>
103577                <enumeratedValue>
103578                  <name>1</name>
103579                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
103580                  <value>#1</value>
103581                </enumeratedValue>
103582              </enumeratedValues>
103583            </field>
103584            <field>
103585              <name>IRQC</name>
103586              <description>Interrupt Configuration</description>
103587              <bitOffset>16</bitOffset>
103588              <bitWidth>4</bitWidth>
103589              <access>read-write</access>
103590              <enumeratedValues>
103591                <enumeratedValue>
103592                  <name>0000</name>
103593                  <description>Interrupt Status Flag (ISF) is disabled.</description>
103594                  <value>#0000</value>
103595                </enumeratedValue>
103596                <enumeratedValue>
103597                  <name>0001</name>
103598                  <description>ISF flag and DMA request on rising edge.</description>
103599                  <value>#0001</value>
103600                </enumeratedValue>
103601                <enumeratedValue>
103602                  <name>0010</name>
103603                  <description>ISF flag and DMA request on falling edge.</description>
103604                  <value>#0010</value>
103605                </enumeratedValue>
103606                <enumeratedValue>
103607                  <name>0011</name>
103608                  <description>ISF flag and DMA request on either edge.</description>
103609                  <value>#0011</value>
103610                </enumeratedValue>
103611                <enumeratedValue>
103612                  <name>1000</name>
103613                  <description>ISF flag and Interrupt when logic 0.</description>
103614                  <value>#1000</value>
103615                </enumeratedValue>
103616                <enumeratedValue>
103617                  <name>1001</name>
103618                  <description>ISF flag and Interrupt on rising-edge.</description>
103619                  <value>#1001</value>
103620                </enumeratedValue>
103621                <enumeratedValue>
103622                  <name>1010</name>
103623                  <description>ISF flag and Interrupt on falling-edge.</description>
103624                  <value>#1010</value>
103625                </enumeratedValue>
103626                <enumeratedValue>
103627                  <name>1011</name>
103628                  <description>ISF flag and Interrupt on either edge.</description>
103629                  <value>#1011</value>
103630                </enumeratedValue>
103631                <enumeratedValue>
103632                  <name>1100</name>
103633                  <description>ISF flag and Interrupt when logic 1.</description>
103634                  <value>#1100</value>
103635                </enumeratedValue>
103636              </enumeratedValues>
103637            </field>
103638            <field>
103639              <name>ISF</name>
103640              <description>Interrupt Status Flag</description>
103641              <bitOffset>24</bitOffset>
103642              <bitWidth>1</bitWidth>
103643              <access>read-write</access>
103644              <enumeratedValues>
103645                <enumeratedValue>
103646                  <name>0</name>
103647                  <description>Configured interrupt is not detected.</description>
103648                  <value>#0</value>
103649                </enumeratedValue>
103650                <enumeratedValue>
103651                  <name>1</name>
103652                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
103653                  <value>#1</value>
103654                </enumeratedValue>
103655              </enumeratedValues>
103656            </field>
103657          </fields>
103658        </register>
103659        <register>
103660          <name>PCR26</name>
103661          <description>Pin Control Register n</description>
103662          <addressOffset>0x68</addressOffset>
103663          <size>32</size>
103664          <access>read-write</access>
103665          <resetValue>0</resetValue>
103666          <resetMask>0xFFFFFFFF</resetMask>
103667          <fields>
103668            <field>
103669              <name>PS</name>
103670              <description>Pull Select</description>
103671              <bitOffset>0</bitOffset>
103672              <bitWidth>1</bitWidth>
103673              <access>read-only</access>
103674              <enumeratedValues>
103675                <enumeratedValue>
103676                  <name>0</name>
103677                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
103678                  <value>#0</value>
103679                </enumeratedValue>
103680                <enumeratedValue>
103681                  <name>1</name>
103682                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
103683                  <value>#1</value>
103684                </enumeratedValue>
103685              </enumeratedValues>
103686            </field>
103687            <field>
103688              <name>PE</name>
103689              <description>Pull Enable</description>
103690              <bitOffset>1</bitOffset>
103691              <bitWidth>1</bitWidth>
103692              <access>read-only</access>
103693              <enumeratedValues>
103694                <enumeratedValue>
103695                  <name>0</name>
103696                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
103697                  <value>#0</value>
103698                </enumeratedValue>
103699                <enumeratedValue>
103700                  <name>1</name>
103701                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
103702                  <value>#1</value>
103703                </enumeratedValue>
103704              </enumeratedValues>
103705            </field>
103706            <field>
103707              <name>SRE</name>
103708              <description>Slew Rate Enable</description>
103709              <bitOffset>2</bitOffset>
103710              <bitWidth>1</bitWidth>
103711              <access>read-only</access>
103712              <enumeratedValues>
103713                <enumeratedValue>
103714                  <name>0</name>
103715                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
103716                  <value>#0</value>
103717                </enumeratedValue>
103718                <enumeratedValue>
103719                  <name>1</name>
103720                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
103721                  <value>#1</value>
103722                </enumeratedValue>
103723              </enumeratedValues>
103724            </field>
103725            <field>
103726              <name>PFE</name>
103727              <description>Passive Filter Enable</description>
103728              <bitOffset>4</bitOffset>
103729              <bitWidth>1</bitWidth>
103730              <access>read-only</access>
103731              <enumeratedValues>
103732                <enumeratedValue>
103733                  <name>0</name>
103734                  <description>Passive input filter is disabled on the corresponding pin.</description>
103735                  <value>#0</value>
103736                </enumeratedValue>
103737                <enumeratedValue>
103738                  <name>1</name>
103739                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
103740                  <value>#1</value>
103741                </enumeratedValue>
103742              </enumeratedValues>
103743            </field>
103744            <field>
103745              <name>ODE</name>
103746              <description>Open Drain Enable</description>
103747              <bitOffset>5</bitOffset>
103748              <bitWidth>1</bitWidth>
103749              <access>read-only</access>
103750              <enumeratedValues>
103751                <enumeratedValue>
103752                  <name>0</name>
103753                  <description>Open drain output is disabled on the corresponding pin.</description>
103754                  <value>#0</value>
103755                </enumeratedValue>
103756                <enumeratedValue>
103757                  <name>1</name>
103758                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
103759                  <value>#1</value>
103760                </enumeratedValue>
103761              </enumeratedValues>
103762            </field>
103763            <field>
103764              <name>DSE</name>
103765              <description>Drive Strength Enable</description>
103766              <bitOffset>6</bitOffset>
103767              <bitWidth>1</bitWidth>
103768              <access>read-only</access>
103769              <enumeratedValues>
103770                <enumeratedValue>
103771                  <name>0</name>
103772                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
103773                  <value>#0</value>
103774                </enumeratedValue>
103775                <enumeratedValue>
103776                  <name>1</name>
103777                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
103778                  <value>#1</value>
103779                </enumeratedValue>
103780              </enumeratedValues>
103781            </field>
103782            <field>
103783              <name>MUX</name>
103784              <description>Pin Mux Control</description>
103785              <bitOffset>8</bitOffset>
103786              <bitWidth>3</bitWidth>
103787              <access>read-write</access>
103788              <enumeratedValues>
103789                <enumeratedValue>
103790                  <name>000</name>
103791                  <description>Pin disabled (Alternative 0) (analog).</description>
103792                  <value>#000</value>
103793                </enumeratedValue>
103794                <enumeratedValue>
103795                  <name>001</name>
103796                  <description>Alternative 1 (GPIO).</description>
103797                  <value>#001</value>
103798                </enumeratedValue>
103799                <enumeratedValue>
103800                  <name>010</name>
103801                  <description>Alternative 2 (chip-specific).</description>
103802                  <value>#010</value>
103803                </enumeratedValue>
103804                <enumeratedValue>
103805                  <name>011</name>
103806                  <description>Alternative 3 (chip-specific).</description>
103807                  <value>#011</value>
103808                </enumeratedValue>
103809                <enumeratedValue>
103810                  <name>100</name>
103811                  <description>Alternative 4 (chip-specific).</description>
103812                  <value>#100</value>
103813                </enumeratedValue>
103814                <enumeratedValue>
103815                  <name>101</name>
103816                  <description>Alternative 5 (chip-specific).</description>
103817                  <value>#101</value>
103818                </enumeratedValue>
103819                <enumeratedValue>
103820                  <name>110</name>
103821                  <description>Alternative 6 (chip-specific).</description>
103822                  <value>#110</value>
103823                </enumeratedValue>
103824                <enumeratedValue>
103825                  <name>111</name>
103826                  <description>Alternative 7 (chip-specific).</description>
103827                  <value>#111</value>
103828                </enumeratedValue>
103829              </enumeratedValues>
103830            </field>
103831            <field>
103832              <name>LK</name>
103833              <description>Lock Register</description>
103834              <bitOffset>15</bitOffset>
103835              <bitWidth>1</bitWidth>
103836              <access>read-write</access>
103837              <enumeratedValues>
103838                <enumeratedValue>
103839                  <name>0</name>
103840                  <description>Pin Control Register fields [15:0] are not locked.</description>
103841                  <value>#0</value>
103842                </enumeratedValue>
103843                <enumeratedValue>
103844                  <name>1</name>
103845                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
103846                  <value>#1</value>
103847                </enumeratedValue>
103848              </enumeratedValues>
103849            </field>
103850            <field>
103851              <name>IRQC</name>
103852              <description>Interrupt Configuration</description>
103853              <bitOffset>16</bitOffset>
103854              <bitWidth>4</bitWidth>
103855              <access>read-write</access>
103856              <enumeratedValues>
103857                <enumeratedValue>
103858                  <name>0000</name>
103859                  <description>Interrupt Status Flag (ISF) is disabled.</description>
103860                  <value>#0000</value>
103861                </enumeratedValue>
103862                <enumeratedValue>
103863                  <name>0001</name>
103864                  <description>ISF flag and DMA request on rising edge.</description>
103865                  <value>#0001</value>
103866                </enumeratedValue>
103867                <enumeratedValue>
103868                  <name>0010</name>
103869                  <description>ISF flag and DMA request on falling edge.</description>
103870                  <value>#0010</value>
103871                </enumeratedValue>
103872                <enumeratedValue>
103873                  <name>0011</name>
103874                  <description>ISF flag and DMA request on either edge.</description>
103875                  <value>#0011</value>
103876                </enumeratedValue>
103877                <enumeratedValue>
103878                  <name>1000</name>
103879                  <description>ISF flag and Interrupt when logic 0.</description>
103880                  <value>#1000</value>
103881                </enumeratedValue>
103882                <enumeratedValue>
103883                  <name>1001</name>
103884                  <description>ISF flag and Interrupt on rising-edge.</description>
103885                  <value>#1001</value>
103886                </enumeratedValue>
103887                <enumeratedValue>
103888                  <name>1010</name>
103889                  <description>ISF flag and Interrupt on falling-edge.</description>
103890                  <value>#1010</value>
103891                </enumeratedValue>
103892                <enumeratedValue>
103893                  <name>1011</name>
103894                  <description>ISF flag and Interrupt on either edge.</description>
103895                  <value>#1011</value>
103896                </enumeratedValue>
103897                <enumeratedValue>
103898                  <name>1100</name>
103899                  <description>ISF flag and Interrupt when logic 1.</description>
103900                  <value>#1100</value>
103901                </enumeratedValue>
103902              </enumeratedValues>
103903            </field>
103904            <field>
103905              <name>ISF</name>
103906              <description>Interrupt Status Flag</description>
103907              <bitOffset>24</bitOffset>
103908              <bitWidth>1</bitWidth>
103909              <access>read-write</access>
103910              <enumeratedValues>
103911                <enumeratedValue>
103912                  <name>0</name>
103913                  <description>Configured interrupt is not detected.</description>
103914                  <value>#0</value>
103915                </enumeratedValue>
103916                <enumeratedValue>
103917                  <name>1</name>
103918                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
103919                  <value>#1</value>
103920                </enumeratedValue>
103921              </enumeratedValues>
103922            </field>
103923          </fields>
103924        </register>
103925        <register>
103926          <name>PCR27</name>
103927          <description>Pin Control Register n</description>
103928          <addressOffset>0x6C</addressOffset>
103929          <size>32</size>
103930          <access>read-write</access>
103931          <resetValue>0</resetValue>
103932          <resetMask>0xFFFFFFFF</resetMask>
103933          <fields>
103934            <field>
103935              <name>PS</name>
103936              <description>Pull Select</description>
103937              <bitOffset>0</bitOffset>
103938              <bitWidth>1</bitWidth>
103939              <access>read-only</access>
103940              <enumeratedValues>
103941                <enumeratedValue>
103942                  <name>0</name>
103943                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
103944                  <value>#0</value>
103945                </enumeratedValue>
103946                <enumeratedValue>
103947                  <name>1</name>
103948                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
103949                  <value>#1</value>
103950                </enumeratedValue>
103951              </enumeratedValues>
103952            </field>
103953            <field>
103954              <name>PE</name>
103955              <description>Pull Enable</description>
103956              <bitOffset>1</bitOffset>
103957              <bitWidth>1</bitWidth>
103958              <access>read-only</access>
103959              <enumeratedValues>
103960                <enumeratedValue>
103961                  <name>0</name>
103962                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
103963                  <value>#0</value>
103964                </enumeratedValue>
103965                <enumeratedValue>
103966                  <name>1</name>
103967                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
103968                  <value>#1</value>
103969                </enumeratedValue>
103970              </enumeratedValues>
103971            </field>
103972            <field>
103973              <name>SRE</name>
103974              <description>Slew Rate Enable</description>
103975              <bitOffset>2</bitOffset>
103976              <bitWidth>1</bitWidth>
103977              <access>read-only</access>
103978              <enumeratedValues>
103979                <enumeratedValue>
103980                  <name>0</name>
103981                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
103982                  <value>#0</value>
103983                </enumeratedValue>
103984                <enumeratedValue>
103985                  <name>1</name>
103986                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
103987                  <value>#1</value>
103988                </enumeratedValue>
103989              </enumeratedValues>
103990            </field>
103991            <field>
103992              <name>PFE</name>
103993              <description>Passive Filter Enable</description>
103994              <bitOffset>4</bitOffset>
103995              <bitWidth>1</bitWidth>
103996              <access>read-only</access>
103997              <enumeratedValues>
103998                <enumeratedValue>
103999                  <name>0</name>
104000                  <description>Passive input filter is disabled on the corresponding pin.</description>
104001                  <value>#0</value>
104002                </enumeratedValue>
104003                <enumeratedValue>
104004                  <name>1</name>
104005                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
104006                  <value>#1</value>
104007                </enumeratedValue>
104008              </enumeratedValues>
104009            </field>
104010            <field>
104011              <name>ODE</name>
104012              <description>Open Drain Enable</description>
104013              <bitOffset>5</bitOffset>
104014              <bitWidth>1</bitWidth>
104015              <access>read-only</access>
104016              <enumeratedValues>
104017                <enumeratedValue>
104018                  <name>0</name>
104019                  <description>Open drain output is disabled on the corresponding pin.</description>
104020                  <value>#0</value>
104021                </enumeratedValue>
104022                <enumeratedValue>
104023                  <name>1</name>
104024                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
104025                  <value>#1</value>
104026                </enumeratedValue>
104027              </enumeratedValues>
104028            </field>
104029            <field>
104030              <name>DSE</name>
104031              <description>Drive Strength Enable</description>
104032              <bitOffset>6</bitOffset>
104033              <bitWidth>1</bitWidth>
104034              <access>read-only</access>
104035              <enumeratedValues>
104036                <enumeratedValue>
104037                  <name>0</name>
104038                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
104039                  <value>#0</value>
104040                </enumeratedValue>
104041                <enumeratedValue>
104042                  <name>1</name>
104043                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
104044                  <value>#1</value>
104045                </enumeratedValue>
104046              </enumeratedValues>
104047            </field>
104048            <field>
104049              <name>MUX</name>
104050              <description>Pin Mux Control</description>
104051              <bitOffset>8</bitOffset>
104052              <bitWidth>3</bitWidth>
104053              <access>read-write</access>
104054              <enumeratedValues>
104055                <enumeratedValue>
104056                  <name>000</name>
104057                  <description>Pin disabled (Alternative 0) (analog).</description>
104058                  <value>#000</value>
104059                </enumeratedValue>
104060                <enumeratedValue>
104061                  <name>001</name>
104062                  <description>Alternative 1 (GPIO).</description>
104063                  <value>#001</value>
104064                </enumeratedValue>
104065                <enumeratedValue>
104066                  <name>010</name>
104067                  <description>Alternative 2 (chip-specific).</description>
104068                  <value>#010</value>
104069                </enumeratedValue>
104070                <enumeratedValue>
104071                  <name>011</name>
104072                  <description>Alternative 3 (chip-specific).</description>
104073                  <value>#011</value>
104074                </enumeratedValue>
104075                <enumeratedValue>
104076                  <name>100</name>
104077                  <description>Alternative 4 (chip-specific).</description>
104078                  <value>#100</value>
104079                </enumeratedValue>
104080                <enumeratedValue>
104081                  <name>101</name>
104082                  <description>Alternative 5 (chip-specific).</description>
104083                  <value>#101</value>
104084                </enumeratedValue>
104085                <enumeratedValue>
104086                  <name>110</name>
104087                  <description>Alternative 6 (chip-specific).</description>
104088                  <value>#110</value>
104089                </enumeratedValue>
104090                <enumeratedValue>
104091                  <name>111</name>
104092                  <description>Alternative 7 (chip-specific).</description>
104093                  <value>#111</value>
104094                </enumeratedValue>
104095              </enumeratedValues>
104096            </field>
104097            <field>
104098              <name>LK</name>
104099              <description>Lock Register</description>
104100              <bitOffset>15</bitOffset>
104101              <bitWidth>1</bitWidth>
104102              <access>read-write</access>
104103              <enumeratedValues>
104104                <enumeratedValue>
104105                  <name>0</name>
104106                  <description>Pin Control Register fields [15:0] are not locked.</description>
104107                  <value>#0</value>
104108                </enumeratedValue>
104109                <enumeratedValue>
104110                  <name>1</name>
104111                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
104112                  <value>#1</value>
104113                </enumeratedValue>
104114              </enumeratedValues>
104115            </field>
104116            <field>
104117              <name>IRQC</name>
104118              <description>Interrupt Configuration</description>
104119              <bitOffset>16</bitOffset>
104120              <bitWidth>4</bitWidth>
104121              <access>read-write</access>
104122              <enumeratedValues>
104123                <enumeratedValue>
104124                  <name>0000</name>
104125                  <description>Interrupt Status Flag (ISF) is disabled.</description>
104126                  <value>#0000</value>
104127                </enumeratedValue>
104128                <enumeratedValue>
104129                  <name>0001</name>
104130                  <description>ISF flag and DMA request on rising edge.</description>
104131                  <value>#0001</value>
104132                </enumeratedValue>
104133                <enumeratedValue>
104134                  <name>0010</name>
104135                  <description>ISF flag and DMA request on falling edge.</description>
104136                  <value>#0010</value>
104137                </enumeratedValue>
104138                <enumeratedValue>
104139                  <name>0011</name>
104140                  <description>ISF flag and DMA request on either edge.</description>
104141                  <value>#0011</value>
104142                </enumeratedValue>
104143                <enumeratedValue>
104144                  <name>1000</name>
104145                  <description>ISF flag and Interrupt when logic 0.</description>
104146                  <value>#1000</value>
104147                </enumeratedValue>
104148                <enumeratedValue>
104149                  <name>1001</name>
104150                  <description>ISF flag and Interrupt on rising-edge.</description>
104151                  <value>#1001</value>
104152                </enumeratedValue>
104153                <enumeratedValue>
104154                  <name>1010</name>
104155                  <description>ISF flag and Interrupt on falling-edge.</description>
104156                  <value>#1010</value>
104157                </enumeratedValue>
104158                <enumeratedValue>
104159                  <name>1011</name>
104160                  <description>ISF flag and Interrupt on either edge.</description>
104161                  <value>#1011</value>
104162                </enumeratedValue>
104163                <enumeratedValue>
104164                  <name>1100</name>
104165                  <description>ISF flag and Interrupt when logic 1.</description>
104166                  <value>#1100</value>
104167                </enumeratedValue>
104168              </enumeratedValues>
104169            </field>
104170            <field>
104171              <name>ISF</name>
104172              <description>Interrupt Status Flag</description>
104173              <bitOffset>24</bitOffset>
104174              <bitWidth>1</bitWidth>
104175              <access>read-write</access>
104176              <enumeratedValues>
104177                <enumeratedValue>
104178                  <name>0</name>
104179                  <description>Configured interrupt is not detected.</description>
104180                  <value>#0</value>
104181                </enumeratedValue>
104182                <enumeratedValue>
104183                  <name>1</name>
104184                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
104185                  <value>#1</value>
104186                </enumeratedValue>
104187              </enumeratedValues>
104188            </field>
104189          </fields>
104190        </register>
104191        <register>
104192          <name>PCR28</name>
104193          <description>Pin Control Register n</description>
104194          <addressOffset>0x70</addressOffset>
104195          <size>32</size>
104196          <access>read-write</access>
104197          <resetValue>0</resetValue>
104198          <resetMask>0xFFFFFFFF</resetMask>
104199          <fields>
104200            <field>
104201              <name>PS</name>
104202              <description>Pull Select</description>
104203              <bitOffset>0</bitOffset>
104204              <bitWidth>1</bitWidth>
104205              <access>read-only</access>
104206              <enumeratedValues>
104207                <enumeratedValue>
104208                  <name>0</name>
104209                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
104210                  <value>#0</value>
104211                </enumeratedValue>
104212                <enumeratedValue>
104213                  <name>1</name>
104214                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
104215                  <value>#1</value>
104216                </enumeratedValue>
104217              </enumeratedValues>
104218            </field>
104219            <field>
104220              <name>PE</name>
104221              <description>Pull Enable</description>
104222              <bitOffset>1</bitOffset>
104223              <bitWidth>1</bitWidth>
104224              <access>read-only</access>
104225              <enumeratedValues>
104226                <enumeratedValue>
104227                  <name>0</name>
104228                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
104229                  <value>#0</value>
104230                </enumeratedValue>
104231                <enumeratedValue>
104232                  <name>1</name>
104233                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
104234                  <value>#1</value>
104235                </enumeratedValue>
104236              </enumeratedValues>
104237            </field>
104238            <field>
104239              <name>SRE</name>
104240              <description>Slew Rate Enable</description>
104241              <bitOffset>2</bitOffset>
104242              <bitWidth>1</bitWidth>
104243              <access>read-only</access>
104244              <enumeratedValues>
104245                <enumeratedValue>
104246                  <name>0</name>
104247                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
104248                  <value>#0</value>
104249                </enumeratedValue>
104250                <enumeratedValue>
104251                  <name>1</name>
104252                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
104253                  <value>#1</value>
104254                </enumeratedValue>
104255              </enumeratedValues>
104256            </field>
104257            <field>
104258              <name>PFE</name>
104259              <description>Passive Filter Enable</description>
104260              <bitOffset>4</bitOffset>
104261              <bitWidth>1</bitWidth>
104262              <access>read-only</access>
104263              <enumeratedValues>
104264                <enumeratedValue>
104265                  <name>0</name>
104266                  <description>Passive input filter is disabled on the corresponding pin.</description>
104267                  <value>#0</value>
104268                </enumeratedValue>
104269                <enumeratedValue>
104270                  <name>1</name>
104271                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
104272                  <value>#1</value>
104273                </enumeratedValue>
104274              </enumeratedValues>
104275            </field>
104276            <field>
104277              <name>ODE</name>
104278              <description>Open Drain Enable</description>
104279              <bitOffset>5</bitOffset>
104280              <bitWidth>1</bitWidth>
104281              <access>read-only</access>
104282              <enumeratedValues>
104283                <enumeratedValue>
104284                  <name>0</name>
104285                  <description>Open drain output is disabled on the corresponding pin.</description>
104286                  <value>#0</value>
104287                </enumeratedValue>
104288                <enumeratedValue>
104289                  <name>1</name>
104290                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
104291                  <value>#1</value>
104292                </enumeratedValue>
104293              </enumeratedValues>
104294            </field>
104295            <field>
104296              <name>DSE</name>
104297              <description>Drive Strength Enable</description>
104298              <bitOffset>6</bitOffset>
104299              <bitWidth>1</bitWidth>
104300              <access>read-only</access>
104301              <enumeratedValues>
104302                <enumeratedValue>
104303                  <name>0</name>
104304                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
104305                  <value>#0</value>
104306                </enumeratedValue>
104307                <enumeratedValue>
104308                  <name>1</name>
104309                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
104310                  <value>#1</value>
104311                </enumeratedValue>
104312              </enumeratedValues>
104313            </field>
104314            <field>
104315              <name>MUX</name>
104316              <description>Pin Mux Control</description>
104317              <bitOffset>8</bitOffset>
104318              <bitWidth>3</bitWidth>
104319              <access>read-write</access>
104320              <enumeratedValues>
104321                <enumeratedValue>
104322                  <name>000</name>
104323                  <description>Pin disabled (Alternative 0) (analog).</description>
104324                  <value>#000</value>
104325                </enumeratedValue>
104326                <enumeratedValue>
104327                  <name>001</name>
104328                  <description>Alternative 1 (GPIO).</description>
104329                  <value>#001</value>
104330                </enumeratedValue>
104331                <enumeratedValue>
104332                  <name>010</name>
104333                  <description>Alternative 2 (chip-specific).</description>
104334                  <value>#010</value>
104335                </enumeratedValue>
104336                <enumeratedValue>
104337                  <name>011</name>
104338                  <description>Alternative 3 (chip-specific).</description>
104339                  <value>#011</value>
104340                </enumeratedValue>
104341                <enumeratedValue>
104342                  <name>100</name>
104343                  <description>Alternative 4 (chip-specific).</description>
104344                  <value>#100</value>
104345                </enumeratedValue>
104346                <enumeratedValue>
104347                  <name>101</name>
104348                  <description>Alternative 5 (chip-specific).</description>
104349                  <value>#101</value>
104350                </enumeratedValue>
104351                <enumeratedValue>
104352                  <name>110</name>
104353                  <description>Alternative 6 (chip-specific).</description>
104354                  <value>#110</value>
104355                </enumeratedValue>
104356                <enumeratedValue>
104357                  <name>111</name>
104358                  <description>Alternative 7 (chip-specific).</description>
104359                  <value>#111</value>
104360                </enumeratedValue>
104361              </enumeratedValues>
104362            </field>
104363            <field>
104364              <name>LK</name>
104365              <description>Lock Register</description>
104366              <bitOffset>15</bitOffset>
104367              <bitWidth>1</bitWidth>
104368              <access>read-write</access>
104369              <enumeratedValues>
104370                <enumeratedValue>
104371                  <name>0</name>
104372                  <description>Pin Control Register fields [15:0] are not locked.</description>
104373                  <value>#0</value>
104374                </enumeratedValue>
104375                <enumeratedValue>
104376                  <name>1</name>
104377                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
104378                  <value>#1</value>
104379                </enumeratedValue>
104380              </enumeratedValues>
104381            </field>
104382            <field>
104383              <name>IRQC</name>
104384              <description>Interrupt Configuration</description>
104385              <bitOffset>16</bitOffset>
104386              <bitWidth>4</bitWidth>
104387              <access>read-write</access>
104388              <enumeratedValues>
104389                <enumeratedValue>
104390                  <name>0000</name>
104391                  <description>Interrupt Status Flag (ISF) is disabled.</description>
104392                  <value>#0000</value>
104393                </enumeratedValue>
104394                <enumeratedValue>
104395                  <name>0001</name>
104396                  <description>ISF flag and DMA request on rising edge.</description>
104397                  <value>#0001</value>
104398                </enumeratedValue>
104399                <enumeratedValue>
104400                  <name>0010</name>
104401                  <description>ISF flag and DMA request on falling edge.</description>
104402                  <value>#0010</value>
104403                </enumeratedValue>
104404                <enumeratedValue>
104405                  <name>0011</name>
104406                  <description>ISF flag and DMA request on either edge.</description>
104407                  <value>#0011</value>
104408                </enumeratedValue>
104409                <enumeratedValue>
104410                  <name>1000</name>
104411                  <description>ISF flag and Interrupt when logic 0.</description>
104412                  <value>#1000</value>
104413                </enumeratedValue>
104414                <enumeratedValue>
104415                  <name>1001</name>
104416                  <description>ISF flag and Interrupt on rising-edge.</description>
104417                  <value>#1001</value>
104418                </enumeratedValue>
104419                <enumeratedValue>
104420                  <name>1010</name>
104421                  <description>ISF flag and Interrupt on falling-edge.</description>
104422                  <value>#1010</value>
104423                </enumeratedValue>
104424                <enumeratedValue>
104425                  <name>1011</name>
104426                  <description>ISF flag and Interrupt on either edge.</description>
104427                  <value>#1011</value>
104428                </enumeratedValue>
104429                <enumeratedValue>
104430                  <name>1100</name>
104431                  <description>ISF flag and Interrupt when logic 1.</description>
104432                  <value>#1100</value>
104433                </enumeratedValue>
104434              </enumeratedValues>
104435            </field>
104436            <field>
104437              <name>ISF</name>
104438              <description>Interrupt Status Flag</description>
104439              <bitOffset>24</bitOffset>
104440              <bitWidth>1</bitWidth>
104441              <access>read-write</access>
104442              <enumeratedValues>
104443                <enumeratedValue>
104444                  <name>0</name>
104445                  <description>Configured interrupt is not detected.</description>
104446                  <value>#0</value>
104447                </enumeratedValue>
104448                <enumeratedValue>
104449                  <name>1</name>
104450                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
104451                  <value>#1</value>
104452                </enumeratedValue>
104453              </enumeratedValues>
104454            </field>
104455          </fields>
104456        </register>
104457        <register>
104458          <name>PCR29</name>
104459          <description>Pin Control Register n</description>
104460          <addressOffset>0x74</addressOffset>
104461          <size>32</size>
104462          <access>read-write</access>
104463          <resetValue>0</resetValue>
104464          <resetMask>0xFFFFFFFF</resetMask>
104465          <fields>
104466            <field>
104467              <name>PS</name>
104468              <description>Pull Select</description>
104469              <bitOffset>0</bitOffset>
104470              <bitWidth>1</bitWidth>
104471              <access>read-only</access>
104472              <enumeratedValues>
104473                <enumeratedValue>
104474                  <name>0</name>
104475                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
104476                  <value>#0</value>
104477                </enumeratedValue>
104478                <enumeratedValue>
104479                  <name>1</name>
104480                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
104481                  <value>#1</value>
104482                </enumeratedValue>
104483              </enumeratedValues>
104484            </field>
104485            <field>
104486              <name>PE</name>
104487              <description>Pull Enable</description>
104488              <bitOffset>1</bitOffset>
104489              <bitWidth>1</bitWidth>
104490              <access>read-only</access>
104491              <enumeratedValues>
104492                <enumeratedValue>
104493                  <name>0</name>
104494                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
104495                  <value>#0</value>
104496                </enumeratedValue>
104497                <enumeratedValue>
104498                  <name>1</name>
104499                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
104500                  <value>#1</value>
104501                </enumeratedValue>
104502              </enumeratedValues>
104503            </field>
104504            <field>
104505              <name>SRE</name>
104506              <description>Slew Rate Enable</description>
104507              <bitOffset>2</bitOffset>
104508              <bitWidth>1</bitWidth>
104509              <access>read-only</access>
104510              <enumeratedValues>
104511                <enumeratedValue>
104512                  <name>0</name>
104513                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
104514                  <value>#0</value>
104515                </enumeratedValue>
104516                <enumeratedValue>
104517                  <name>1</name>
104518                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
104519                  <value>#1</value>
104520                </enumeratedValue>
104521              </enumeratedValues>
104522            </field>
104523            <field>
104524              <name>PFE</name>
104525              <description>Passive Filter Enable</description>
104526              <bitOffset>4</bitOffset>
104527              <bitWidth>1</bitWidth>
104528              <access>read-only</access>
104529              <enumeratedValues>
104530                <enumeratedValue>
104531                  <name>0</name>
104532                  <description>Passive input filter is disabled on the corresponding pin.</description>
104533                  <value>#0</value>
104534                </enumeratedValue>
104535                <enumeratedValue>
104536                  <name>1</name>
104537                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
104538                  <value>#1</value>
104539                </enumeratedValue>
104540              </enumeratedValues>
104541            </field>
104542            <field>
104543              <name>ODE</name>
104544              <description>Open Drain Enable</description>
104545              <bitOffset>5</bitOffset>
104546              <bitWidth>1</bitWidth>
104547              <access>read-only</access>
104548              <enumeratedValues>
104549                <enumeratedValue>
104550                  <name>0</name>
104551                  <description>Open drain output is disabled on the corresponding pin.</description>
104552                  <value>#0</value>
104553                </enumeratedValue>
104554                <enumeratedValue>
104555                  <name>1</name>
104556                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
104557                  <value>#1</value>
104558                </enumeratedValue>
104559              </enumeratedValues>
104560            </field>
104561            <field>
104562              <name>DSE</name>
104563              <description>Drive Strength Enable</description>
104564              <bitOffset>6</bitOffset>
104565              <bitWidth>1</bitWidth>
104566              <access>read-only</access>
104567              <enumeratedValues>
104568                <enumeratedValue>
104569                  <name>0</name>
104570                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
104571                  <value>#0</value>
104572                </enumeratedValue>
104573                <enumeratedValue>
104574                  <name>1</name>
104575                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
104576                  <value>#1</value>
104577                </enumeratedValue>
104578              </enumeratedValues>
104579            </field>
104580            <field>
104581              <name>MUX</name>
104582              <description>Pin Mux Control</description>
104583              <bitOffset>8</bitOffset>
104584              <bitWidth>3</bitWidth>
104585              <access>read-write</access>
104586              <enumeratedValues>
104587                <enumeratedValue>
104588                  <name>000</name>
104589                  <description>Pin disabled (Alternative 0) (analog).</description>
104590                  <value>#000</value>
104591                </enumeratedValue>
104592                <enumeratedValue>
104593                  <name>001</name>
104594                  <description>Alternative 1 (GPIO).</description>
104595                  <value>#001</value>
104596                </enumeratedValue>
104597                <enumeratedValue>
104598                  <name>010</name>
104599                  <description>Alternative 2 (chip-specific).</description>
104600                  <value>#010</value>
104601                </enumeratedValue>
104602                <enumeratedValue>
104603                  <name>011</name>
104604                  <description>Alternative 3 (chip-specific).</description>
104605                  <value>#011</value>
104606                </enumeratedValue>
104607                <enumeratedValue>
104608                  <name>100</name>
104609                  <description>Alternative 4 (chip-specific).</description>
104610                  <value>#100</value>
104611                </enumeratedValue>
104612                <enumeratedValue>
104613                  <name>101</name>
104614                  <description>Alternative 5 (chip-specific).</description>
104615                  <value>#101</value>
104616                </enumeratedValue>
104617                <enumeratedValue>
104618                  <name>110</name>
104619                  <description>Alternative 6 (chip-specific).</description>
104620                  <value>#110</value>
104621                </enumeratedValue>
104622                <enumeratedValue>
104623                  <name>111</name>
104624                  <description>Alternative 7 (chip-specific).</description>
104625                  <value>#111</value>
104626                </enumeratedValue>
104627              </enumeratedValues>
104628            </field>
104629            <field>
104630              <name>LK</name>
104631              <description>Lock Register</description>
104632              <bitOffset>15</bitOffset>
104633              <bitWidth>1</bitWidth>
104634              <access>read-write</access>
104635              <enumeratedValues>
104636                <enumeratedValue>
104637                  <name>0</name>
104638                  <description>Pin Control Register fields [15:0] are not locked.</description>
104639                  <value>#0</value>
104640                </enumeratedValue>
104641                <enumeratedValue>
104642                  <name>1</name>
104643                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
104644                  <value>#1</value>
104645                </enumeratedValue>
104646              </enumeratedValues>
104647            </field>
104648            <field>
104649              <name>IRQC</name>
104650              <description>Interrupt Configuration</description>
104651              <bitOffset>16</bitOffset>
104652              <bitWidth>4</bitWidth>
104653              <access>read-write</access>
104654              <enumeratedValues>
104655                <enumeratedValue>
104656                  <name>0000</name>
104657                  <description>Interrupt Status Flag (ISF) is disabled.</description>
104658                  <value>#0000</value>
104659                </enumeratedValue>
104660                <enumeratedValue>
104661                  <name>0001</name>
104662                  <description>ISF flag and DMA request on rising edge.</description>
104663                  <value>#0001</value>
104664                </enumeratedValue>
104665                <enumeratedValue>
104666                  <name>0010</name>
104667                  <description>ISF flag and DMA request on falling edge.</description>
104668                  <value>#0010</value>
104669                </enumeratedValue>
104670                <enumeratedValue>
104671                  <name>0011</name>
104672                  <description>ISF flag and DMA request on either edge.</description>
104673                  <value>#0011</value>
104674                </enumeratedValue>
104675                <enumeratedValue>
104676                  <name>1000</name>
104677                  <description>ISF flag and Interrupt when logic 0.</description>
104678                  <value>#1000</value>
104679                </enumeratedValue>
104680                <enumeratedValue>
104681                  <name>1001</name>
104682                  <description>ISF flag and Interrupt on rising-edge.</description>
104683                  <value>#1001</value>
104684                </enumeratedValue>
104685                <enumeratedValue>
104686                  <name>1010</name>
104687                  <description>ISF flag and Interrupt on falling-edge.</description>
104688                  <value>#1010</value>
104689                </enumeratedValue>
104690                <enumeratedValue>
104691                  <name>1011</name>
104692                  <description>ISF flag and Interrupt on either edge.</description>
104693                  <value>#1011</value>
104694                </enumeratedValue>
104695                <enumeratedValue>
104696                  <name>1100</name>
104697                  <description>ISF flag and Interrupt when logic 1.</description>
104698                  <value>#1100</value>
104699                </enumeratedValue>
104700              </enumeratedValues>
104701            </field>
104702            <field>
104703              <name>ISF</name>
104704              <description>Interrupt Status Flag</description>
104705              <bitOffset>24</bitOffset>
104706              <bitWidth>1</bitWidth>
104707              <access>read-write</access>
104708              <enumeratedValues>
104709                <enumeratedValue>
104710                  <name>0</name>
104711                  <description>Configured interrupt is not detected.</description>
104712                  <value>#0</value>
104713                </enumeratedValue>
104714                <enumeratedValue>
104715                  <name>1</name>
104716                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
104717                  <value>#1</value>
104718                </enumeratedValue>
104719              </enumeratedValues>
104720            </field>
104721          </fields>
104722        </register>
104723        <register>
104724          <name>PCR30</name>
104725          <description>Pin Control Register n</description>
104726          <addressOffset>0x78</addressOffset>
104727          <size>32</size>
104728          <access>read-write</access>
104729          <resetValue>0</resetValue>
104730          <resetMask>0xFFFFFFFF</resetMask>
104731          <fields>
104732            <field>
104733              <name>PS</name>
104734              <description>Pull Select</description>
104735              <bitOffset>0</bitOffset>
104736              <bitWidth>1</bitWidth>
104737              <access>read-only</access>
104738              <enumeratedValues>
104739                <enumeratedValue>
104740                  <name>0</name>
104741                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
104742                  <value>#0</value>
104743                </enumeratedValue>
104744                <enumeratedValue>
104745                  <name>1</name>
104746                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
104747                  <value>#1</value>
104748                </enumeratedValue>
104749              </enumeratedValues>
104750            </field>
104751            <field>
104752              <name>PE</name>
104753              <description>Pull Enable</description>
104754              <bitOffset>1</bitOffset>
104755              <bitWidth>1</bitWidth>
104756              <access>read-only</access>
104757              <enumeratedValues>
104758                <enumeratedValue>
104759                  <name>0</name>
104760                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
104761                  <value>#0</value>
104762                </enumeratedValue>
104763                <enumeratedValue>
104764                  <name>1</name>
104765                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
104766                  <value>#1</value>
104767                </enumeratedValue>
104768              </enumeratedValues>
104769            </field>
104770            <field>
104771              <name>SRE</name>
104772              <description>Slew Rate Enable</description>
104773              <bitOffset>2</bitOffset>
104774              <bitWidth>1</bitWidth>
104775              <access>read-only</access>
104776              <enumeratedValues>
104777                <enumeratedValue>
104778                  <name>0</name>
104779                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
104780                  <value>#0</value>
104781                </enumeratedValue>
104782                <enumeratedValue>
104783                  <name>1</name>
104784                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
104785                  <value>#1</value>
104786                </enumeratedValue>
104787              </enumeratedValues>
104788            </field>
104789            <field>
104790              <name>PFE</name>
104791              <description>Passive Filter Enable</description>
104792              <bitOffset>4</bitOffset>
104793              <bitWidth>1</bitWidth>
104794              <access>read-only</access>
104795              <enumeratedValues>
104796                <enumeratedValue>
104797                  <name>0</name>
104798                  <description>Passive input filter is disabled on the corresponding pin.</description>
104799                  <value>#0</value>
104800                </enumeratedValue>
104801                <enumeratedValue>
104802                  <name>1</name>
104803                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
104804                  <value>#1</value>
104805                </enumeratedValue>
104806              </enumeratedValues>
104807            </field>
104808            <field>
104809              <name>ODE</name>
104810              <description>Open Drain Enable</description>
104811              <bitOffset>5</bitOffset>
104812              <bitWidth>1</bitWidth>
104813              <access>read-only</access>
104814              <enumeratedValues>
104815                <enumeratedValue>
104816                  <name>0</name>
104817                  <description>Open drain output is disabled on the corresponding pin.</description>
104818                  <value>#0</value>
104819                </enumeratedValue>
104820                <enumeratedValue>
104821                  <name>1</name>
104822                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
104823                  <value>#1</value>
104824                </enumeratedValue>
104825              </enumeratedValues>
104826            </field>
104827            <field>
104828              <name>DSE</name>
104829              <description>Drive Strength Enable</description>
104830              <bitOffset>6</bitOffset>
104831              <bitWidth>1</bitWidth>
104832              <access>read-only</access>
104833              <enumeratedValues>
104834                <enumeratedValue>
104835                  <name>0</name>
104836                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
104837                  <value>#0</value>
104838                </enumeratedValue>
104839                <enumeratedValue>
104840                  <name>1</name>
104841                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
104842                  <value>#1</value>
104843                </enumeratedValue>
104844              </enumeratedValues>
104845            </field>
104846            <field>
104847              <name>MUX</name>
104848              <description>Pin Mux Control</description>
104849              <bitOffset>8</bitOffset>
104850              <bitWidth>3</bitWidth>
104851              <access>read-write</access>
104852              <enumeratedValues>
104853                <enumeratedValue>
104854                  <name>000</name>
104855                  <description>Pin disabled (Alternative 0) (analog).</description>
104856                  <value>#000</value>
104857                </enumeratedValue>
104858                <enumeratedValue>
104859                  <name>001</name>
104860                  <description>Alternative 1 (GPIO).</description>
104861                  <value>#001</value>
104862                </enumeratedValue>
104863                <enumeratedValue>
104864                  <name>010</name>
104865                  <description>Alternative 2 (chip-specific).</description>
104866                  <value>#010</value>
104867                </enumeratedValue>
104868                <enumeratedValue>
104869                  <name>011</name>
104870                  <description>Alternative 3 (chip-specific).</description>
104871                  <value>#011</value>
104872                </enumeratedValue>
104873                <enumeratedValue>
104874                  <name>100</name>
104875                  <description>Alternative 4 (chip-specific).</description>
104876                  <value>#100</value>
104877                </enumeratedValue>
104878                <enumeratedValue>
104879                  <name>101</name>
104880                  <description>Alternative 5 (chip-specific).</description>
104881                  <value>#101</value>
104882                </enumeratedValue>
104883                <enumeratedValue>
104884                  <name>110</name>
104885                  <description>Alternative 6 (chip-specific).</description>
104886                  <value>#110</value>
104887                </enumeratedValue>
104888                <enumeratedValue>
104889                  <name>111</name>
104890                  <description>Alternative 7 (chip-specific).</description>
104891                  <value>#111</value>
104892                </enumeratedValue>
104893              </enumeratedValues>
104894            </field>
104895            <field>
104896              <name>LK</name>
104897              <description>Lock Register</description>
104898              <bitOffset>15</bitOffset>
104899              <bitWidth>1</bitWidth>
104900              <access>read-write</access>
104901              <enumeratedValues>
104902                <enumeratedValue>
104903                  <name>0</name>
104904                  <description>Pin Control Register fields [15:0] are not locked.</description>
104905                  <value>#0</value>
104906                </enumeratedValue>
104907                <enumeratedValue>
104908                  <name>1</name>
104909                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
104910                  <value>#1</value>
104911                </enumeratedValue>
104912              </enumeratedValues>
104913            </field>
104914            <field>
104915              <name>IRQC</name>
104916              <description>Interrupt Configuration</description>
104917              <bitOffset>16</bitOffset>
104918              <bitWidth>4</bitWidth>
104919              <access>read-write</access>
104920              <enumeratedValues>
104921                <enumeratedValue>
104922                  <name>0000</name>
104923                  <description>Interrupt Status Flag (ISF) is disabled.</description>
104924                  <value>#0000</value>
104925                </enumeratedValue>
104926                <enumeratedValue>
104927                  <name>0001</name>
104928                  <description>ISF flag and DMA request on rising edge.</description>
104929                  <value>#0001</value>
104930                </enumeratedValue>
104931                <enumeratedValue>
104932                  <name>0010</name>
104933                  <description>ISF flag and DMA request on falling edge.</description>
104934                  <value>#0010</value>
104935                </enumeratedValue>
104936                <enumeratedValue>
104937                  <name>0011</name>
104938                  <description>ISF flag and DMA request on either edge.</description>
104939                  <value>#0011</value>
104940                </enumeratedValue>
104941                <enumeratedValue>
104942                  <name>1000</name>
104943                  <description>ISF flag and Interrupt when logic 0.</description>
104944                  <value>#1000</value>
104945                </enumeratedValue>
104946                <enumeratedValue>
104947                  <name>1001</name>
104948                  <description>ISF flag and Interrupt on rising-edge.</description>
104949                  <value>#1001</value>
104950                </enumeratedValue>
104951                <enumeratedValue>
104952                  <name>1010</name>
104953                  <description>ISF flag and Interrupt on falling-edge.</description>
104954                  <value>#1010</value>
104955                </enumeratedValue>
104956                <enumeratedValue>
104957                  <name>1011</name>
104958                  <description>ISF flag and Interrupt on either edge.</description>
104959                  <value>#1011</value>
104960                </enumeratedValue>
104961                <enumeratedValue>
104962                  <name>1100</name>
104963                  <description>ISF flag and Interrupt when logic 1.</description>
104964                  <value>#1100</value>
104965                </enumeratedValue>
104966              </enumeratedValues>
104967            </field>
104968            <field>
104969              <name>ISF</name>
104970              <description>Interrupt Status Flag</description>
104971              <bitOffset>24</bitOffset>
104972              <bitWidth>1</bitWidth>
104973              <access>read-write</access>
104974              <enumeratedValues>
104975                <enumeratedValue>
104976                  <name>0</name>
104977                  <description>Configured interrupt is not detected.</description>
104978                  <value>#0</value>
104979                </enumeratedValue>
104980                <enumeratedValue>
104981                  <name>1</name>
104982                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
104983                  <value>#1</value>
104984                </enumeratedValue>
104985              </enumeratedValues>
104986            </field>
104987          </fields>
104988        </register>
104989        <register>
104990          <name>PCR31</name>
104991          <description>Pin Control Register n</description>
104992          <addressOffset>0x7C</addressOffset>
104993          <size>32</size>
104994          <access>read-write</access>
104995          <resetValue>0</resetValue>
104996          <resetMask>0xFFFFFFFF</resetMask>
104997          <fields>
104998            <field>
104999              <name>PS</name>
105000              <description>Pull Select</description>
105001              <bitOffset>0</bitOffset>
105002              <bitWidth>1</bitWidth>
105003              <access>read-only</access>
105004              <enumeratedValues>
105005                <enumeratedValue>
105006                  <name>0</name>
105007                  <description>Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
105008                  <value>#0</value>
105009                </enumeratedValue>
105010                <enumeratedValue>
105011                  <name>1</name>
105012                  <description>Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.</description>
105013                  <value>#1</value>
105014                </enumeratedValue>
105015              </enumeratedValues>
105016            </field>
105017            <field>
105018              <name>PE</name>
105019              <description>Pull Enable</description>
105020              <bitOffset>1</bitOffset>
105021              <bitWidth>1</bitWidth>
105022              <access>read-only</access>
105023              <enumeratedValues>
105024                <enumeratedValue>
105025                  <name>0</name>
105026                  <description>Internal pullup or pulldown resistor is not enabled on the corresponding pin.</description>
105027                  <value>#0</value>
105028                </enumeratedValue>
105029                <enumeratedValue>
105030                  <name>1</name>
105031                  <description>Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input.</description>
105032                  <value>#1</value>
105033                </enumeratedValue>
105034              </enumeratedValues>
105035            </field>
105036            <field>
105037              <name>SRE</name>
105038              <description>Slew Rate Enable</description>
105039              <bitOffset>2</bitOffset>
105040              <bitWidth>1</bitWidth>
105041              <access>read-only</access>
105042              <enumeratedValues>
105043                <enumeratedValue>
105044                  <name>0</name>
105045                  <description>Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
105046                  <value>#0</value>
105047                </enumeratedValue>
105048                <enumeratedValue>
105049                  <name>1</name>
105050                  <description>Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.</description>
105051                  <value>#1</value>
105052                </enumeratedValue>
105053              </enumeratedValues>
105054            </field>
105055            <field>
105056              <name>PFE</name>
105057              <description>Passive Filter Enable</description>
105058              <bitOffset>4</bitOffset>
105059              <bitWidth>1</bitWidth>
105060              <access>read-only</access>
105061              <enumeratedValues>
105062                <enumeratedValue>
105063                  <name>0</name>
105064                  <description>Passive input filter is disabled on the corresponding pin.</description>
105065                  <value>#0</value>
105066                </enumeratedValue>
105067                <enumeratedValue>
105068                  <name>1</name>
105069                  <description>Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.</description>
105070                  <value>#1</value>
105071                </enumeratedValue>
105072              </enumeratedValues>
105073            </field>
105074            <field>
105075              <name>ODE</name>
105076              <description>Open Drain Enable</description>
105077              <bitOffset>5</bitOffset>
105078              <bitWidth>1</bitWidth>
105079              <access>read-only</access>
105080              <enumeratedValues>
105081                <enumeratedValue>
105082                  <name>0</name>
105083                  <description>Open drain output is disabled on the corresponding pin.</description>
105084                  <value>#0</value>
105085                </enumeratedValue>
105086                <enumeratedValue>
105087                  <name>1</name>
105088                  <description>Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.</description>
105089                  <value>#1</value>
105090                </enumeratedValue>
105091              </enumeratedValues>
105092            </field>
105093            <field>
105094              <name>DSE</name>
105095              <description>Drive Strength Enable</description>
105096              <bitOffset>6</bitOffset>
105097              <bitWidth>1</bitWidth>
105098              <access>read-only</access>
105099              <enumeratedValues>
105100                <enumeratedValue>
105101                  <name>0</name>
105102                  <description>Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
105103                  <value>#0</value>
105104                </enumeratedValue>
105105                <enumeratedValue>
105106                  <name>1</name>
105107                  <description>High drive strength is configured on the corresponding pin, if pin is configured as a digital output.</description>
105108                  <value>#1</value>
105109                </enumeratedValue>
105110              </enumeratedValues>
105111            </field>
105112            <field>
105113              <name>MUX</name>
105114              <description>Pin Mux Control</description>
105115              <bitOffset>8</bitOffset>
105116              <bitWidth>3</bitWidth>
105117              <access>read-write</access>
105118              <enumeratedValues>
105119                <enumeratedValue>
105120                  <name>000</name>
105121                  <description>Pin disabled (Alternative 0) (analog).</description>
105122                  <value>#000</value>
105123                </enumeratedValue>
105124                <enumeratedValue>
105125                  <name>001</name>
105126                  <description>Alternative 1 (GPIO).</description>
105127                  <value>#001</value>
105128                </enumeratedValue>
105129                <enumeratedValue>
105130                  <name>010</name>
105131                  <description>Alternative 2 (chip-specific).</description>
105132                  <value>#010</value>
105133                </enumeratedValue>
105134                <enumeratedValue>
105135                  <name>011</name>
105136                  <description>Alternative 3 (chip-specific).</description>
105137                  <value>#011</value>
105138                </enumeratedValue>
105139                <enumeratedValue>
105140                  <name>100</name>
105141                  <description>Alternative 4 (chip-specific).</description>
105142                  <value>#100</value>
105143                </enumeratedValue>
105144                <enumeratedValue>
105145                  <name>101</name>
105146                  <description>Alternative 5 (chip-specific).</description>
105147                  <value>#101</value>
105148                </enumeratedValue>
105149                <enumeratedValue>
105150                  <name>110</name>
105151                  <description>Alternative 6 (chip-specific).</description>
105152                  <value>#110</value>
105153                </enumeratedValue>
105154                <enumeratedValue>
105155                  <name>111</name>
105156                  <description>Alternative 7 (chip-specific).</description>
105157                  <value>#111</value>
105158                </enumeratedValue>
105159              </enumeratedValues>
105160            </field>
105161            <field>
105162              <name>LK</name>
105163              <description>Lock Register</description>
105164              <bitOffset>15</bitOffset>
105165              <bitWidth>1</bitWidth>
105166              <access>read-write</access>
105167              <enumeratedValues>
105168                <enumeratedValue>
105169                  <name>0</name>
105170                  <description>Pin Control Register fields [15:0] are not locked.</description>
105171                  <value>#0</value>
105172                </enumeratedValue>
105173                <enumeratedValue>
105174                  <name>1</name>
105175                  <description>Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset.</description>
105176                  <value>#1</value>
105177                </enumeratedValue>
105178              </enumeratedValues>
105179            </field>
105180            <field>
105181              <name>IRQC</name>
105182              <description>Interrupt Configuration</description>
105183              <bitOffset>16</bitOffset>
105184              <bitWidth>4</bitWidth>
105185              <access>read-write</access>
105186              <enumeratedValues>
105187                <enumeratedValue>
105188                  <name>0000</name>
105189                  <description>Interrupt Status Flag (ISF) is disabled.</description>
105190                  <value>#0000</value>
105191                </enumeratedValue>
105192                <enumeratedValue>
105193                  <name>0001</name>
105194                  <description>ISF flag and DMA request on rising edge.</description>
105195                  <value>#0001</value>
105196                </enumeratedValue>
105197                <enumeratedValue>
105198                  <name>0010</name>
105199                  <description>ISF flag and DMA request on falling edge.</description>
105200                  <value>#0010</value>
105201                </enumeratedValue>
105202                <enumeratedValue>
105203                  <name>0011</name>
105204                  <description>ISF flag and DMA request on either edge.</description>
105205                  <value>#0011</value>
105206                </enumeratedValue>
105207                <enumeratedValue>
105208                  <name>1000</name>
105209                  <description>ISF flag and Interrupt when logic 0.</description>
105210                  <value>#1000</value>
105211                </enumeratedValue>
105212                <enumeratedValue>
105213                  <name>1001</name>
105214                  <description>ISF flag and Interrupt on rising-edge.</description>
105215                  <value>#1001</value>
105216                </enumeratedValue>
105217                <enumeratedValue>
105218                  <name>1010</name>
105219                  <description>ISF flag and Interrupt on falling-edge.</description>
105220                  <value>#1010</value>
105221                </enumeratedValue>
105222                <enumeratedValue>
105223                  <name>1011</name>
105224                  <description>ISF flag and Interrupt on either edge.</description>
105225                  <value>#1011</value>
105226                </enumeratedValue>
105227                <enumeratedValue>
105228                  <name>1100</name>
105229                  <description>ISF flag and Interrupt when logic 1.</description>
105230                  <value>#1100</value>
105231                </enumeratedValue>
105232              </enumeratedValues>
105233            </field>
105234            <field>
105235              <name>ISF</name>
105236              <description>Interrupt Status Flag</description>
105237              <bitOffset>24</bitOffset>
105238              <bitWidth>1</bitWidth>
105239              <access>read-write</access>
105240              <enumeratedValues>
105241                <enumeratedValue>
105242                  <name>0</name>
105243                  <description>Configured interrupt is not detected.</description>
105244                  <value>#0</value>
105245                </enumeratedValue>
105246                <enumeratedValue>
105247                  <name>1</name>
105248                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
105249                  <value>#1</value>
105250                </enumeratedValue>
105251              </enumeratedValues>
105252            </field>
105253          </fields>
105254        </register>
105255        <register>
105256          <name>GPCLR</name>
105257          <description>Global Pin Control Low Register</description>
105258          <addressOffset>0x80</addressOffset>
105259          <size>32</size>
105260          <access>write-only</access>
105261          <resetValue>0</resetValue>
105262          <resetMask>0xFFFFFFFF</resetMask>
105263          <fields>
105264            <field>
105265              <name>GPWD</name>
105266              <description>Global Pin Write Data</description>
105267              <bitOffset>0</bitOffset>
105268              <bitWidth>16</bitWidth>
105269              <access>write-only</access>
105270            </field>
105271            <field>
105272              <name>GPWE0</name>
105273              <description>Global Pin Write Enable</description>
105274              <bitOffset>16</bitOffset>
105275              <bitWidth>1</bitWidth>
105276              <access>write-only</access>
105277              <enumeratedValues>
105278                <enumeratedValue>
105279                  <name>0</name>
105280                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105281                  <value>#0</value>
105282                </enumeratedValue>
105283                <enumeratedValue>
105284                  <name>1</name>
105285                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105286                  <value>#1</value>
105287                </enumeratedValue>
105288              </enumeratedValues>
105289            </field>
105290            <field>
105291              <name>GPWE1</name>
105292              <description>Global Pin Write Enable</description>
105293              <bitOffset>17</bitOffset>
105294              <bitWidth>1</bitWidth>
105295              <access>write-only</access>
105296              <enumeratedValues>
105297                <enumeratedValue>
105298                  <name>0</name>
105299                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105300                  <value>#0</value>
105301                </enumeratedValue>
105302                <enumeratedValue>
105303                  <name>1</name>
105304                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105305                  <value>#1</value>
105306                </enumeratedValue>
105307              </enumeratedValues>
105308            </field>
105309            <field>
105310              <name>GPWE2</name>
105311              <description>Global Pin Write Enable</description>
105312              <bitOffset>18</bitOffset>
105313              <bitWidth>1</bitWidth>
105314              <access>write-only</access>
105315              <enumeratedValues>
105316                <enumeratedValue>
105317                  <name>0</name>
105318                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105319                  <value>#0</value>
105320                </enumeratedValue>
105321                <enumeratedValue>
105322                  <name>1</name>
105323                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105324                  <value>#1</value>
105325                </enumeratedValue>
105326              </enumeratedValues>
105327            </field>
105328            <field>
105329              <name>GPWE3</name>
105330              <description>Global Pin Write Enable</description>
105331              <bitOffset>19</bitOffset>
105332              <bitWidth>1</bitWidth>
105333              <access>write-only</access>
105334              <enumeratedValues>
105335                <enumeratedValue>
105336                  <name>0</name>
105337                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105338                  <value>#0</value>
105339                </enumeratedValue>
105340                <enumeratedValue>
105341                  <name>1</name>
105342                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105343                  <value>#1</value>
105344                </enumeratedValue>
105345              </enumeratedValues>
105346            </field>
105347            <field>
105348              <name>GPWE4</name>
105349              <description>Global Pin Write Enable</description>
105350              <bitOffset>20</bitOffset>
105351              <bitWidth>1</bitWidth>
105352              <access>write-only</access>
105353              <enumeratedValues>
105354                <enumeratedValue>
105355                  <name>0</name>
105356                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105357                  <value>#0</value>
105358                </enumeratedValue>
105359                <enumeratedValue>
105360                  <name>1</name>
105361                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105362                  <value>#1</value>
105363                </enumeratedValue>
105364              </enumeratedValues>
105365            </field>
105366            <field>
105367              <name>GPWE5</name>
105368              <description>Global Pin Write Enable</description>
105369              <bitOffset>21</bitOffset>
105370              <bitWidth>1</bitWidth>
105371              <access>write-only</access>
105372              <enumeratedValues>
105373                <enumeratedValue>
105374                  <name>0</name>
105375                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105376                  <value>#0</value>
105377                </enumeratedValue>
105378                <enumeratedValue>
105379                  <name>1</name>
105380                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105381                  <value>#1</value>
105382                </enumeratedValue>
105383              </enumeratedValues>
105384            </field>
105385            <field>
105386              <name>GPWE6</name>
105387              <description>Global Pin Write Enable</description>
105388              <bitOffset>22</bitOffset>
105389              <bitWidth>1</bitWidth>
105390              <access>write-only</access>
105391              <enumeratedValues>
105392                <enumeratedValue>
105393                  <name>0</name>
105394                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105395                  <value>#0</value>
105396                </enumeratedValue>
105397                <enumeratedValue>
105398                  <name>1</name>
105399                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105400                  <value>#1</value>
105401                </enumeratedValue>
105402              </enumeratedValues>
105403            </field>
105404            <field>
105405              <name>GPWE7</name>
105406              <description>Global Pin Write Enable</description>
105407              <bitOffset>23</bitOffset>
105408              <bitWidth>1</bitWidth>
105409              <access>write-only</access>
105410              <enumeratedValues>
105411                <enumeratedValue>
105412                  <name>0</name>
105413                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105414                  <value>#0</value>
105415                </enumeratedValue>
105416                <enumeratedValue>
105417                  <name>1</name>
105418                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105419                  <value>#1</value>
105420                </enumeratedValue>
105421              </enumeratedValues>
105422            </field>
105423            <field>
105424              <name>GPWE8</name>
105425              <description>Global Pin Write Enable</description>
105426              <bitOffset>24</bitOffset>
105427              <bitWidth>1</bitWidth>
105428              <access>write-only</access>
105429              <enumeratedValues>
105430                <enumeratedValue>
105431                  <name>0</name>
105432                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105433                  <value>#0</value>
105434                </enumeratedValue>
105435                <enumeratedValue>
105436                  <name>1</name>
105437                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105438                  <value>#1</value>
105439                </enumeratedValue>
105440              </enumeratedValues>
105441            </field>
105442            <field>
105443              <name>GPWE9</name>
105444              <description>Global Pin Write Enable</description>
105445              <bitOffset>25</bitOffset>
105446              <bitWidth>1</bitWidth>
105447              <access>write-only</access>
105448              <enumeratedValues>
105449                <enumeratedValue>
105450                  <name>0</name>
105451                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105452                  <value>#0</value>
105453                </enumeratedValue>
105454                <enumeratedValue>
105455                  <name>1</name>
105456                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105457                  <value>#1</value>
105458                </enumeratedValue>
105459              </enumeratedValues>
105460            </field>
105461            <field>
105462              <name>GPWE10</name>
105463              <description>Global Pin Write Enable</description>
105464              <bitOffset>26</bitOffset>
105465              <bitWidth>1</bitWidth>
105466              <access>write-only</access>
105467              <enumeratedValues>
105468                <enumeratedValue>
105469                  <name>0</name>
105470                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105471                  <value>#0</value>
105472                </enumeratedValue>
105473                <enumeratedValue>
105474                  <name>1</name>
105475                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105476                  <value>#1</value>
105477                </enumeratedValue>
105478              </enumeratedValues>
105479            </field>
105480            <field>
105481              <name>GPWE11</name>
105482              <description>Global Pin Write Enable</description>
105483              <bitOffset>27</bitOffset>
105484              <bitWidth>1</bitWidth>
105485              <access>write-only</access>
105486              <enumeratedValues>
105487                <enumeratedValue>
105488                  <name>0</name>
105489                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105490                  <value>#0</value>
105491                </enumeratedValue>
105492                <enumeratedValue>
105493                  <name>1</name>
105494                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105495                  <value>#1</value>
105496                </enumeratedValue>
105497              </enumeratedValues>
105498            </field>
105499            <field>
105500              <name>GPWE12</name>
105501              <description>Global Pin Write Enable</description>
105502              <bitOffset>28</bitOffset>
105503              <bitWidth>1</bitWidth>
105504              <access>write-only</access>
105505              <enumeratedValues>
105506                <enumeratedValue>
105507                  <name>0</name>
105508                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105509                  <value>#0</value>
105510                </enumeratedValue>
105511                <enumeratedValue>
105512                  <name>1</name>
105513                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105514                  <value>#1</value>
105515                </enumeratedValue>
105516              </enumeratedValues>
105517            </field>
105518            <field>
105519              <name>GPWE13</name>
105520              <description>Global Pin Write Enable</description>
105521              <bitOffset>29</bitOffset>
105522              <bitWidth>1</bitWidth>
105523              <access>write-only</access>
105524              <enumeratedValues>
105525                <enumeratedValue>
105526                  <name>0</name>
105527                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105528                  <value>#0</value>
105529                </enumeratedValue>
105530                <enumeratedValue>
105531                  <name>1</name>
105532                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105533                  <value>#1</value>
105534                </enumeratedValue>
105535              </enumeratedValues>
105536            </field>
105537            <field>
105538              <name>GPWE14</name>
105539              <description>Global Pin Write Enable</description>
105540              <bitOffset>30</bitOffset>
105541              <bitWidth>1</bitWidth>
105542              <access>write-only</access>
105543              <enumeratedValues>
105544                <enumeratedValue>
105545                  <name>0</name>
105546                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105547                  <value>#0</value>
105548                </enumeratedValue>
105549                <enumeratedValue>
105550                  <name>1</name>
105551                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105552                  <value>#1</value>
105553                </enumeratedValue>
105554              </enumeratedValues>
105555            </field>
105556            <field>
105557              <name>GPWE15</name>
105558              <description>Global Pin Write Enable</description>
105559              <bitOffset>31</bitOffset>
105560              <bitWidth>1</bitWidth>
105561              <access>write-only</access>
105562              <enumeratedValues>
105563                <enumeratedValue>
105564                  <name>0</name>
105565                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105566                  <value>#0</value>
105567                </enumeratedValue>
105568                <enumeratedValue>
105569                  <name>1</name>
105570                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105571                  <value>#1</value>
105572                </enumeratedValue>
105573              </enumeratedValues>
105574            </field>
105575          </fields>
105576        </register>
105577        <register>
105578          <name>GPCHR</name>
105579          <description>Global Pin Control High Register</description>
105580          <addressOffset>0x84</addressOffset>
105581          <size>32</size>
105582          <access>write-only</access>
105583          <resetValue>0</resetValue>
105584          <resetMask>0xFFFFFFFF</resetMask>
105585          <fields>
105586            <field>
105587              <name>GPWD</name>
105588              <description>Global Pin Write Data</description>
105589              <bitOffset>0</bitOffset>
105590              <bitWidth>16</bitWidth>
105591              <access>write-only</access>
105592            </field>
105593            <field>
105594              <name>GPWE0</name>
105595              <description>Global Pin Write Enable</description>
105596              <bitOffset>16</bitOffset>
105597              <bitWidth>1</bitWidth>
105598              <access>write-only</access>
105599              <enumeratedValues>
105600                <enumeratedValue>
105601                  <name>0</name>
105602                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105603                  <value>#0</value>
105604                </enumeratedValue>
105605                <enumeratedValue>
105606                  <name>1</name>
105607                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105608                  <value>#1</value>
105609                </enumeratedValue>
105610              </enumeratedValues>
105611            </field>
105612            <field>
105613              <name>GPWE1</name>
105614              <description>Global Pin Write Enable</description>
105615              <bitOffset>17</bitOffset>
105616              <bitWidth>1</bitWidth>
105617              <access>write-only</access>
105618              <enumeratedValues>
105619                <enumeratedValue>
105620                  <name>0</name>
105621                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105622                  <value>#0</value>
105623                </enumeratedValue>
105624                <enumeratedValue>
105625                  <name>1</name>
105626                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105627                  <value>#1</value>
105628                </enumeratedValue>
105629              </enumeratedValues>
105630            </field>
105631            <field>
105632              <name>GPWE2</name>
105633              <description>Global Pin Write Enable</description>
105634              <bitOffset>18</bitOffset>
105635              <bitWidth>1</bitWidth>
105636              <access>write-only</access>
105637              <enumeratedValues>
105638                <enumeratedValue>
105639                  <name>0</name>
105640                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105641                  <value>#0</value>
105642                </enumeratedValue>
105643                <enumeratedValue>
105644                  <name>1</name>
105645                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105646                  <value>#1</value>
105647                </enumeratedValue>
105648              </enumeratedValues>
105649            </field>
105650            <field>
105651              <name>GPWE3</name>
105652              <description>Global Pin Write Enable</description>
105653              <bitOffset>19</bitOffset>
105654              <bitWidth>1</bitWidth>
105655              <access>write-only</access>
105656              <enumeratedValues>
105657                <enumeratedValue>
105658                  <name>0</name>
105659                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105660                  <value>#0</value>
105661                </enumeratedValue>
105662                <enumeratedValue>
105663                  <name>1</name>
105664                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105665                  <value>#1</value>
105666                </enumeratedValue>
105667              </enumeratedValues>
105668            </field>
105669            <field>
105670              <name>GPWE4</name>
105671              <description>Global Pin Write Enable</description>
105672              <bitOffset>20</bitOffset>
105673              <bitWidth>1</bitWidth>
105674              <access>write-only</access>
105675              <enumeratedValues>
105676                <enumeratedValue>
105677                  <name>0</name>
105678                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105679                  <value>#0</value>
105680                </enumeratedValue>
105681                <enumeratedValue>
105682                  <name>1</name>
105683                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105684                  <value>#1</value>
105685                </enumeratedValue>
105686              </enumeratedValues>
105687            </field>
105688            <field>
105689              <name>GPWE5</name>
105690              <description>Global Pin Write Enable</description>
105691              <bitOffset>21</bitOffset>
105692              <bitWidth>1</bitWidth>
105693              <access>write-only</access>
105694              <enumeratedValues>
105695                <enumeratedValue>
105696                  <name>0</name>
105697                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105698                  <value>#0</value>
105699                </enumeratedValue>
105700                <enumeratedValue>
105701                  <name>1</name>
105702                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105703                  <value>#1</value>
105704                </enumeratedValue>
105705              </enumeratedValues>
105706            </field>
105707            <field>
105708              <name>GPWE6</name>
105709              <description>Global Pin Write Enable</description>
105710              <bitOffset>22</bitOffset>
105711              <bitWidth>1</bitWidth>
105712              <access>write-only</access>
105713              <enumeratedValues>
105714                <enumeratedValue>
105715                  <name>0</name>
105716                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105717                  <value>#0</value>
105718                </enumeratedValue>
105719                <enumeratedValue>
105720                  <name>1</name>
105721                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105722                  <value>#1</value>
105723                </enumeratedValue>
105724              </enumeratedValues>
105725            </field>
105726            <field>
105727              <name>GPWE7</name>
105728              <description>Global Pin Write Enable</description>
105729              <bitOffset>23</bitOffset>
105730              <bitWidth>1</bitWidth>
105731              <access>write-only</access>
105732              <enumeratedValues>
105733                <enumeratedValue>
105734                  <name>0</name>
105735                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105736                  <value>#0</value>
105737                </enumeratedValue>
105738                <enumeratedValue>
105739                  <name>1</name>
105740                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105741                  <value>#1</value>
105742                </enumeratedValue>
105743              </enumeratedValues>
105744            </field>
105745            <field>
105746              <name>GPWE8</name>
105747              <description>Global Pin Write Enable</description>
105748              <bitOffset>24</bitOffset>
105749              <bitWidth>1</bitWidth>
105750              <access>write-only</access>
105751              <enumeratedValues>
105752                <enumeratedValue>
105753                  <name>0</name>
105754                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105755                  <value>#0</value>
105756                </enumeratedValue>
105757                <enumeratedValue>
105758                  <name>1</name>
105759                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105760                  <value>#1</value>
105761                </enumeratedValue>
105762              </enumeratedValues>
105763            </field>
105764            <field>
105765              <name>GPWE9</name>
105766              <description>Global Pin Write Enable</description>
105767              <bitOffset>25</bitOffset>
105768              <bitWidth>1</bitWidth>
105769              <access>write-only</access>
105770              <enumeratedValues>
105771                <enumeratedValue>
105772                  <name>0</name>
105773                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105774                  <value>#0</value>
105775                </enumeratedValue>
105776                <enumeratedValue>
105777                  <name>1</name>
105778                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105779                  <value>#1</value>
105780                </enumeratedValue>
105781              </enumeratedValues>
105782            </field>
105783            <field>
105784              <name>GPWE10</name>
105785              <description>Global Pin Write Enable</description>
105786              <bitOffset>26</bitOffset>
105787              <bitWidth>1</bitWidth>
105788              <access>write-only</access>
105789              <enumeratedValues>
105790                <enumeratedValue>
105791                  <name>0</name>
105792                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105793                  <value>#0</value>
105794                </enumeratedValue>
105795                <enumeratedValue>
105796                  <name>1</name>
105797                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105798                  <value>#1</value>
105799                </enumeratedValue>
105800              </enumeratedValues>
105801            </field>
105802            <field>
105803              <name>GPWE11</name>
105804              <description>Global Pin Write Enable</description>
105805              <bitOffset>27</bitOffset>
105806              <bitWidth>1</bitWidth>
105807              <access>write-only</access>
105808              <enumeratedValues>
105809                <enumeratedValue>
105810                  <name>0</name>
105811                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105812                  <value>#0</value>
105813                </enumeratedValue>
105814                <enumeratedValue>
105815                  <name>1</name>
105816                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105817                  <value>#1</value>
105818                </enumeratedValue>
105819              </enumeratedValues>
105820            </field>
105821            <field>
105822              <name>GPWE12</name>
105823              <description>Global Pin Write Enable</description>
105824              <bitOffset>28</bitOffset>
105825              <bitWidth>1</bitWidth>
105826              <access>write-only</access>
105827              <enumeratedValues>
105828                <enumeratedValue>
105829                  <name>0</name>
105830                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105831                  <value>#0</value>
105832                </enumeratedValue>
105833                <enumeratedValue>
105834                  <name>1</name>
105835                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105836                  <value>#1</value>
105837                </enumeratedValue>
105838              </enumeratedValues>
105839            </field>
105840            <field>
105841              <name>GPWE13</name>
105842              <description>Global Pin Write Enable</description>
105843              <bitOffset>29</bitOffset>
105844              <bitWidth>1</bitWidth>
105845              <access>write-only</access>
105846              <enumeratedValues>
105847                <enumeratedValue>
105848                  <name>0</name>
105849                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105850                  <value>#0</value>
105851                </enumeratedValue>
105852                <enumeratedValue>
105853                  <name>1</name>
105854                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105855                  <value>#1</value>
105856                </enumeratedValue>
105857              </enumeratedValues>
105858            </field>
105859            <field>
105860              <name>GPWE14</name>
105861              <description>Global Pin Write Enable</description>
105862              <bitOffset>30</bitOffset>
105863              <bitWidth>1</bitWidth>
105864              <access>write-only</access>
105865              <enumeratedValues>
105866                <enumeratedValue>
105867                  <name>0</name>
105868                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105869                  <value>#0</value>
105870                </enumeratedValue>
105871                <enumeratedValue>
105872                  <name>1</name>
105873                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105874                  <value>#1</value>
105875                </enumeratedValue>
105876              </enumeratedValues>
105877            </field>
105878            <field>
105879              <name>GPWE15</name>
105880              <description>Global Pin Write Enable</description>
105881              <bitOffset>31</bitOffset>
105882              <bitWidth>1</bitWidth>
105883              <access>write-only</access>
105884              <enumeratedValues>
105885                <enumeratedValue>
105886                  <name>0</name>
105887                  <description>Corresponding Pin Control Register is not updated with the value in GPWD.</description>
105888                  <value>#0</value>
105889                </enumeratedValue>
105890                <enumeratedValue>
105891                  <name>1</name>
105892                  <description>Corresponding Pin Control Register is updated with the value in GPWD.</description>
105893                  <value>#1</value>
105894                </enumeratedValue>
105895              </enumeratedValues>
105896            </field>
105897          </fields>
105898        </register>
105899        <register>
105900          <name>ISFR</name>
105901          <description>Interrupt Status Flag Register</description>
105902          <addressOffset>0xA0</addressOffset>
105903          <size>32</size>
105904          <access>read-write</access>
105905          <resetValue>0</resetValue>
105906          <resetMask>0xFFFFFFFF</resetMask>
105907          <fields>
105908            <field>
105909              <name>ISF0</name>
105910              <description>Interrupt Status Flag</description>
105911              <bitOffset>0</bitOffset>
105912              <bitWidth>1</bitWidth>
105913              <access>read-write</access>
105914              <enumeratedValues>
105915                <enumeratedValue>
105916                  <name>0</name>
105917                  <description>Configured interrupt is not detected.</description>
105918                  <value>#0</value>
105919                </enumeratedValue>
105920                <enumeratedValue>
105921                  <name>1</name>
105922                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
105923                  <value>#1</value>
105924                </enumeratedValue>
105925              </enumeratedValues>
105926            </field>
105927            <field>
105928              <name>ISF1</name>
105929              <description>Interrupt Status Flag</description>
105930              <bitOffset>1</bitOffset>
105931              <bitWidth>1</bitWidth>
105932              <access>read-write</access>
105933              <enumeratedValues>
105934                <enumeratedValue>
105935                  <name>0</name>
105936                  <description>Configured interrupt is not detected.</description>
105937                  <value>#0</value>
105938                </enumeratedValue>
105939                <enumeratedValue>
105940                  <name>1</name>
105941                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
105942                  <value>#1</value>
105943                </enumeratedValue>
105944              </enumeratedValues>
105945            </field>
105946            <field>
105947              <name>ISF2</name>
105948              <description>Interrupt Status Flag</description>
105949              <bitOffset>2</bitOffset>
105950              <bitWidth>1</bitWidth>
105951              <access>read-write</access>
105952              <enumeratedValues>
105953                <enumeratedValue>
105954                  <name>0</name>
105955                  <description>Configured interrupt is not detected.</description>
105956                  <value>#0</value>
105957                </enumeratedValue>
105958                <enumeratedValue>
105959                  <name>1</name>
105960                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
105961                  <value>#1</value>
105962                </enumeratedValue>
105963              </enumeratedValues>
105964            </field>
105965            <field>
105966              <name>ISF3</name>
105967              <description>Interrupt Status Flag</description>
105968              <bitOffset>3</bitOffset>
105969              <bitWidth>1</bitWidth>
105970              <access>read-write</access>
105971              <enumeratedValues>
105972                <enumeratedValue>
105973                  <name>0</name>
105974                  <description>Configured interrupt is not detected.</description>
105975                  <value>#0</value>
105976                </enumeratedValue>
105977                <enumeratedValue>
105978                  <name>1</name>
105979                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
105980                  <value>#1</value>
105981                </enumeratedValue>
105982              </enumeratedValues>
105983            </field>
105984            <field>
105985              <name>ISF4</name>
105986              <description>Interrupt Status Flag</description>
105987              <bitOffset>4</bitOffset>
105988              <bitWidth>1</bitWidth>
105989              <access>read-write</access>
105990              <enumeratedValues>
105991                <enumeratedValue>
105992                  <name>0</name>
105993                  <description>Configured interrupt is not detected.</description>
105994                  <value>#0</value>
105995                </enumeratedValue>
105996                <enumeratedValue>
105997                  <name>1</name>
105998                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
105999                  <value>#1</value>
106000                </enumeratedValue>
106001              </enumeratedValues>
106002            </field>
106003            <field>
106004              <name>ISF5</name>
106005              <description>Interrupt Status Flag</description>
106006              <bitOffset>5</bitOffset>
106007              <bitWidth>1</bitWidth>
106008              <access>read-write</access>
106009              <enumeratedValues>
106010                <enumeratedValue>
106011                  <name>0</name>
106012                  <description>Configured interrupt is not detected.</description>
106013                  <value>#0</value>
106014                </enumeratedValue>
106015                <enumeratedValue>
106016                  <name>1</name>
106017                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106018                  <value>#1</value>
106019                </enumeratedValue>
106020              </enumeratedValues>
106021            </field>
106022            <field>
106023              <name>ISF6</name>
106024              <description>Interrupt Status Flag</description>
106025              <bitOffset>6</bitOffset>
106026              <bitWidth>1</bitWidth>
106027              <access>read-write</access>
106028              <enumeratedValues>
106029                <enumeratedValue>
106030                  <name>0</name>
106031                  <description>Configured interrupt is not detected.</description>
106032                  <value>#0</value>
106033                </enumeratedValue>
106034                <enumeratedValue>
106035                  <name>1</name>
106036                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106037                  <value>#1</value>
106038                </enumeratedValue>
106039              </enumeratedValues>
106040            </field>
106041            <field>
106042              <name>ISF7</name>
106043              <description>Interrupt Status Flag</description>
106044              <bitOffset>7</bitOffset>
106045              <bitWidth>1</bitWidth>
106046              <access>read-write</access>
106047              <enumeratedValues>
106048                <enumeratedValue>
106049                  <name>0</name>
106050                  <description>Configured interrupt is not detected.</description>
106051                  <value>#0</value>
106052                </enumeratedValue>
106053                <enumeratedValue>
106054                  <name>1</name>
106055                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106056                  <value>#1</value>
106057                </enumeratedValue>
106058              </enumeratedValues>
106059            </field>
106060            <field>
106061              <name>ISF8</name>
106062              <description>Interrupt Status Flag</description>
106063              <bitOffset>8</bitOffset>
106064              <bitWidth>1</bitWidth>
106065              <access>read-write</access>
106066              <enumeratedValues>
106067                <enumeratedValue>
106068                  <name>0</name>
106069                  <description>Configured interrupt is not detected.</description>
106070                  <value>#0</value>
106071                </enumeratedValue>
106072                <enumeratedValue>
106073                  <name>1</name>
106074                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106075                  <value>#1</value>
106076                </enumeratedValue>
106077              </enumeratedValues>
106078            </field>
106079            <field>
106080              <name>ISF9</name>
106081              <description>Interrupt Status Flag</description>
106082              <bitOffset>9</bitOffset>
106083              <bitWidth>1</bitWidth>
106084              <access>read-write</access>
106085              <enumeratedValues>
106086                <enumeratedValue>
106087                  <name>0</name>
106088                  <description>Configured interrupt is not detected.</description>
106089                  <value>#0</value>
106090                </enumeratedValue>
106091                <enumeratedValue>
106092                  <name>1</name>
106093                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106094                  <value>#1</value>
106095                </enumeratedValue>
106096              </enumeratedValues>
106097            </field>
106098            <field>
106099              <name>ISF10</name>
106100              <description>Interrupt Status Flag</description>
106101              <bitOffset>10</bitOffset>
106102              <bitWidth>1</bitWidth>
106103              <access>read-write</access>
106104              <enumeratedValues>
106105                <enumeratedValue>
106106                  <name>0</name>
106107                  <description>Configured interrupt is not detected.</description>
106108                  <value>#0</value>
106109                </enumeratedValue>
106110                <enumeratedValue>
106111                  <name>1</name>
106112                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106113                  <value>#1</value>
106114                </enumeratedValue>
106115              </enumeratedValues>
106116            </field>
106117            <field>
106118              <name>ISF11</name>
106119              <description>Interrupt Status Flag</description>
106120              <bitOffset>11</bitOffset>
106121              <bitWidth>1</bitWidth>
106122              <access>read-write</access>
106123              <enumeratedValues>
106124                <enumeratedValue>
106125                  <name>0</name>
106126                  <description>Configured interrupt is not detected.</description>
106127                  <value>#0</value>
106128                </enumeratedValue>
106129                <enumeratedValue>
106130                  <name>1</name>
106131                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106132                  <value>#1</value>
106133                </enumeratedValue>
106134              </enumeratedValues>
106135            </field>
106136            <field>
106137              <name>ISF12</name>
106138              <description>Interrupt Status Flag</description>
106139              <bitOffset>12</bitOffset>
106140              <bitWidth>1</bitWidth>
106141              <access>read-write</access>
106142              <enumeratedValues>
106143                <enumeratedValue>
106144                  <name>0</name>
106145                  <description>Configured interrupt is not detected.</description>
106146                  <value>#0</value>
106147                </enumeratedValue>
106148                <enumeratedValue>
106149                  <name>1</name>
106150                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106151                  <value>#1</value>
106152                </enumeratedValue>
106153              </enumeratedValues>
106154            </field>
106155            <field>
106156              <name>ISF13</name>
106157              <description>Interrupt Status Flag</description>
106158              <bitOffset>13</bitOffset>
106159              <bitWidth>1</bitWidth>
106160              <access>read-write</access>
106161              <enumeratedValues>
106162                <enumeratedValue>
106163                  <name>0</name>
106164                  <description>Configured interrupt is not detected.</description>
106165                  <value>#0</value>
106166                </enumeratedValue>
106167                <enumeratedValue>
106168                  <name>1</name>
106169                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106170                  <value>#1</value>
106171                </enumeratedValue>
106172              </enumeratedValues>
106173            </field>
106174            <field>
106175              <name>ISF14</name>
106176              <description>Interrupt Status Flag</description>
106177              <bitOffset>14</bitOffset>
106178              <bitWidth>1</bitWidth>
106179              <access>read-write</access>
106180              <enumeratedValues>
106181                <enumeratedValue>
106182                  <name>0</name>
106183                  <description>Configured interrupt is not detected.</description>
106184                  <value>#0</value>
106185                </enumeratedValue>
106186                <enumeratedValue>
106187                  <name>1</name>
106188                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106189                  <value>#1</value>
106190                </enumeratedValue>
106191              </enumeratedValues>
106192            </field>
106193            <field>
106194              <name>ISF15</name>
106195              <description>Interrupt Status Flag</description>
106196              <bitOffset>15</bitOffset>
106197              <bitWidth>1</bitWidth>
106198              <access>read-write</access>
106199              <enumeratedValues>
106200                <enumeratedValue>
106201                  <name>0</name>
106202                  <description>Configured interrupt is not detected.</description>
106203                  <value>#0</value>
106204                </enumeratedValue>
106205                <enumeratedValue>
106206                  <name>1</name>
106207                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106208                  <value>#1</value>
106209                </enumeratedValue>
106210              </enumeratedValues>
106211            </field>
106212            <field>
106213              <name>ISF16</name>
106214              <description>Interrupt Status Flag</description>
106215              <bitOffset>16</bitOffset>
106216              <bitWidth>1</bitWidth>
106217              <access>read-write</access>
106218              <enumeratedValues>
106219                <enumeratedValue>
106220                  <name>0</name>
106221                  <description>Configured interrupt is not detected.</description>
106222                  <value>#0</value>
106223                </enumeratedValue>
106224                <enumeratedValue>
106225                  <name>1</name>
106226                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106227                  <value>#1</value>
106228                </enumeratedValue>
106229              </enumeratedValues>
106230            </field>
106231            <field>
106232              <name>ISF17</name>
106233              <description>Interrupt Status Flag</description>
106234              <bitOffset>17</bitOffset>
106235              <bitWidth>1</bitWidth>
106236              <access>read-write</access>
106237              <enumeratedValues>
106238                <enumeratedValue>
106239                  <name>0</name>
106240                  <description>Configured interrupt is not detected.</description>
106241                  <value>#0</value>
106242                </enumeratedValue>
106243                <enumeratedValue>
106244                  <name>1</name>
106245                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106246                  <value>#1</value>
106247                </enumeratedValue>
106248              </enumeratedValues>
106249            </field>
106250            <field>
106251              <name>ISF18</name>
106252              <description>Interrupt Status Flag</description>
106253              <bitOffset>18</bitOffset>
106254              <bitWidth>1</bitWidth>
106255              <access>read-write</access>
106256              <enumeratedValues>
106257                <enumeratedValue>
106258                  <name>0</name>
106259                  <description>Configured interrupt is not detected.</description>
106260                  <value>#0</value>
106261                </enumeratedValue>
106262                <enumeratedValue>
106263                  <name>1</name>
106264                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106265                  <value>#1</value>
106266                </enumeratedValue>
106267              </enumeratedValues>
106268            </field>
106269            <field>
106270              <name>ISF19</name>
106271              <description>Interrupt Status Flag</description>
106272              <bitOffset>19</bitOffset>
106273              <bitWidth>1</bitWidth>
106274              <access>read-write</access>
106275              <enumeratedValues>
106276                <enumeratedValue>
106277                  <name>0</name>
106278                  <description>Configured interrupt is not detected.</description>
106279                  <value>#0</value>
106280                </enumeratedValue>
106281                <enumeratedValue>
106282                  <name>1</name>
106283                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106284                  <value>#1</value>
106285                </enumeratedValue>
106286              </enumeratedValues>
106287            </field>
106288            <field>
106289              <name>ISF20</name>
106290              <description>Interrupt Status Flag</description>
106291              <bitOffset>20</bitOffset>
106292              <bitWidth>1</bitWidth>
106293              <access>read-write</access>
106294              <enumeratedValues>
106295                <enumeratedValue>
106296                  <name>0</name>
106297                  <description>Configured interrupt is not detected.</description>
106298                  <value>#0</value>
106299                </enumeratedValue>
106300                <enumeratedValue>
106301                  <name>1</name>
106302                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106303                  <value>#1</value>
106304                </enumeratedValue>
106305              </enumeratedValues>
106306            </field>
106307            <field>
106308              <name>ISF21</name>
106309              <description>Interrupt Status Flag</description>
106310              <bitOffset>21</bitOffset>
106311              <bitWidth>1</bitWidth>
106312              <access>read-write</access>
106313              <enumeratedValues>
106314                <enumeratedValue>
106315                  <name>0</name>
106316                  <description>Configured interrupt is not detected.</description>
106317                  <value>#0</value>
106318                </enumeratedValue>
106319                <enumeratedValue>
106320                  <name>1</name>
106321                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106322                  <value>#1</value>
106323                </enumeratedValue>
106324              </enumeratedValues>
106325            </field>
106326            <field>
106327              <name>ISF22</name>
106328              <description>Interrupt Status Flag</description>
106329              <bitOffset>22</bitOffset>
106330              <bitWidth>1</bitWidth>
106331              <access>read-write</access>
106332              <enumeratedValues>
106333                <enumeratedValue>
106334                  <name>0</name>
106335                  <description>Configured interrupt is not detected.</description>
106336                  <value>#0</value>
106337                </enumeratedValue>
106338                <enumeratedValue>
106339                  <name>1</name>
106340                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106341                  <value>#1</value>
106342                </enumeratedValue>
106343              </enumeratedValues>
106344            </field>
106345            <field>
106346              <name>ISF23</name>
106347              <description>Interrupt Status Flag</description>
106348              <bitOffset>23</bitOffset>
106349              <bitWidth>1</bitWidth>
106350              <access>read-write</access>
106351              <enumeratedValues>
106352                <enumeratedValue>
106353                  <name>0</name>
106354                  <description>Configured interrupt is not detected.</description>
106355                  <value>#0</value>
106356                </enumeratedValue>
106357                <enumeratedValue>
106358                  <name>1</name>
106359                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106360                  <value>#1</value>
106361                </enumeratedValue>
106362              </enumeratedValues>
106363            </field>
106364            <field>
106365              <name>ISF24</name>
106366              <description>Interrupt Status Flag</description>
106367              <bitOffset>24</bitOffset>
106368              <bitWidth>1</bitWidth>
106369              <access>read-write</access>
106370              <enumeratedValues>
106371                <enumeratedValue>
106372                  <name>0</name>
106373                  <description>Configured interrupt is not detected.</description>
106374                  <value>#0</value>
106375                </enumeratedValue>
106376                <enumeratedValue>
106377                  <name>1</name>
106378                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106379                  <value>#1</value>
106380                </enumeratedValue>
106381              </enumeratedValues>
106382            </field>
106383            <field>
106384              <name>ISF25</name>
106385              <description>Interrupt Status Flag</description>
106386              <bitOffset>25</bitOffset>
106387              <bitWidth>1</bitWidth>
106388              <access>read-write</access>
106389              <enumeratedValues>
106390                <enumeratedValue>
106391                  <name>0</name>
106392                  <description>Configured interrupt is not detected.</description>
106393                  <value>#0</value>
106394                </enumeratedValue>
106395                <enumeratedValue>
106396                  <name>1</name>
106397                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106398                  <value>#1</value>
106399                </enumeratedValue>
106400              </enumeratedValues>
106401            </field>
106402            <field>
106403              <name>ISF26</name>
106404              <description>Interrupt Status Flag</description>
106405              <bitOffset>26</bitOffset>
106406              <bitWidth>1</bitWidth>
106407              <access>read-write</access>
106408              <enumeratedValues>
106409                <enumeratedValue>
106410                  <name>0</name>
106411                  <description>Configured interrupt is not detected.</description>
106412                  <value>#0</value>
106413                </enumeratedValue>
106414                <enumeratedValue>
106415                  <name>1</name>
106416                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106417                  <value>#1</value>
106418                </enumeratedValue>
106419              </enumeratedValues>
106420            </field>
106421            <field>
106422              <name>ISF27</name>
106423              <description>Interrupt Status Flag</description>
106424              <bitOffset>27</bitOffset>
106425              <bitWidth>1</bitWidth>
106426              <access>read-write</access>
106427              <enumeratedValues>
106428                <enumeratedValue>
106429                  <name>0</name>
106430                  <description>Configured interrupt is not detected.</description>
106431                  <value>#0</value>
106432                </enumeratedValue>
106433                <enumeratedValue>
106434                  <name>1</name>
106435                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106436                  <value>#1</value>
106437                </enumeratedValue>
106438              </enumeratedValues>
106439            </field>
106440            <field>
106441              <name>ISF28</name>
106442              <description>Interrupt Status Flag</description>
106443              <bitOffset>28</bitOffset>
106444              <bitWidth>1</bitWidth>
106445              <access>read-write</access>
106446              <enumeratedValues>
106447                <enumeratedValue>
106448                  <name>0</name>
106449                  <description>Configured interrupt is not detected.</description>
106450                  <value>#0</value>
106451                </enumeratedValue>
106452                <enumeratedValue>
106453                  <name>1</name>
106454                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106455                  <value>#1</value>
106456                </enumeratedValue>
106457              </enumeratedValues>
106458            </field>
106459            <field>
106460              <name>ISF29</name>
106461              <description>Interrupt Status Flag</description>
106462              <bitOffset>29</bitOffset>
106463              <bitWidth>1</bitWidth>
106464              <access>read-write</access>
106465              <enumeratedValues>
106466                <enumeratedValue>
106467                  <name>0</name>
106468                  <description>Configured interrupt is not detected.</description>
106469                  <value>#0</value>
106470                </enumeratedValue>
106471                <enumeratedValue>
106472                  <name>1</name>
106473                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106474                  <value>#1</value>
106475                </enumeratedValue>
106476              </enumeratedValues>
106477            </field>
106478            <field>
106479              <name>ISF30</name>
106480              <description>Interrupt Status Flag</description>
106481              <bitOffset>30</bitOffset>
106482              <bitWidth>1</bitWidth>
106483              <access>read-write</access>
106484              <enumeratedValues>
106485                <enumeratedValue>
106486                  <name>0</name>
106487                  <description>Configured interrupt is not detected.</description>
106488                  <value>#0</value>
106489                </enumeratedValue>
106490                <enumeratedValue>
106491                  <name>1</name>
106492                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106493                  <value>#1</value>
106494                </enumeratedValue>
106495              </enumeratedValues>
106496            </field>
106497            <field>
106498              <name>ISF31</name>
106499              <description>Interrupt Status Flag</description>
106500              <bitOffset>31</bitOffset>
106501              <bitWidth>1</bitWidth>
106502              <access>read-write</access>
106503              <enumeratedValues>
106504                <enumeratedValue>
106505                  <name>0</name>
106506                  <description>Configured interrupt is not detected.</description>
106507                  <value>#0</value>
106508                </enumeratedValue>
106509                <enumeratedValue>
106510                  <name>1</name>
106511                  <description>Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.</description>
106512                  <value>#1</value>
106513                </enumeratedValue>
106514              </enumeratedValues>
106515            </field>
106516          </fields>
106517        </register>
106518      </registers>
106519    </peripheral>
106520    <peripheral>
106521      <name>WDOG</name>
106522      <description>Generation 2008 Watchdog Timer</description>
106523      <prependToName>WDOG_</prependToName>
106524      <baseAddress>0x40052000</baseAddress>
106525      <addressBlock>
106526        <offset>0</offset>
106527        <size>0x18</size>
106528        <usage>registers</usage>
106529      </addressBlock>
106530      <interrupt>
106531        <name>WDOG_EWM</name>
106532        <value>22</value>
106533      </interrupt>
106534      <registers>
106535        <register>
106536          <name>STCTRLH</name>
106537          <description>Watchdog Status and Control Register High</description>
106538          <addressOffset>0</addressOffset>
106539          <size>16</size>
106540          <access>read-write</access>
106541          <resetValue>0x1D3</resetValue>
106542          <resetMask>0xFFFF</resetMask>
106543          <fields>
106544            <field>
106545              <name>WDOGEN</name>
106546              <description>Enables or disables the WDOG&apos;s operation</description>
106547              <bitOffset>0</bitOffset>
106548              <bitWidth>1</bitWidth>
106549              <access>read-write</access>
106550              <enumeratedValues>
106551                <enumeratedValue>
106552                  <name>0</name>
106553                  <description>WDOG is disabled.</description>
106554                  <value>#0</value>
106555                </enumeratedValue>
106556                <enumeratedValue>
106557                  <name>1</name>
106558                  <description>WDOG is enabled.</description>
106559                  <value>#1</value>
106560                </enumeratedValue>
106561              </enumeratedValues>
106562            </field>
106563            <field>
106564              <name>CLKSRC</name>
106565              <description>Selects clock source for the WDOG timer and other internal timing operations.</description>
106566              <bitOffset>1</bitOffset>
106567              <bitWidth>1</bitWidth>
106568              <access>read-write</access>
106569              <enumeratedValues>
106570                <enumeratedValue>
106571                  <name>0</name>
106572                  <description>WDOG clock sourced from LPO .</description>
106573                  <value>#0</value>
106574                </enumeratedValue>
106575                <enumeratedValue>
106576                  <name>1</name>
106577                  <description>WDOG clock sourced from alternate clock source.</description>
106578                  <value>#1</value>
106579                </enumeratedValue>
106580              </enumeratedValues>
106581            </field>
106582            <field>
106583              <name>IRQRSTEN</name>
106584              <description>Used to enable the debug breadcrumbs feature</description>
106585              <bitOffset>2</bitOffset>
106586              <bitWidth>1</bitWidth>
106587              <access>read-write</access>
106588              <enumeratedValues>
106589                <enumeratedValue>
106590                  <name>0</name>
106591                  <description>WDOG time-out generates reset only.</description>
106592                  <value>#0</value>
106593                </enumeratedValue>
106594                <enumeratedValue>
106595                  <name>1</name>
106596                  <description>WDOG time-out initially generates an interrupt. After WCT, it generates a reset.</description>
106597                  <value>#1</value>
106598                </enumeratedValue>
106599              </enumeratedValues>
106600            </field>
106601            <field>
106602              <name>WINEN</name>
106603              <description>Enables Windowing mode.</description>
106604              <bitOffset>3</bitOffset>
106605              <bitWidth>1</bitWidth>
106606              <access>read-write</access>
106607              <enumeratedValues>
106608                <enumeratedValue>
106609                  <name>0</name>
106610                  <description>Windowing mode is disabled.</description>
106611                  <value>#0</value>
106612                </enumeratedValue>
106613                <enumeratedValue>
106614                  <name>1</name>
106615                  <description>Windowing mode is enabled.</description>
106616                  <value>#1</value>
106617                </enumeratedValue>
106618              </enumeratedValues>
106619            </field>
106620            <field>
106621              <name>ALLOWUPDATE</name>
106622              <description>Enables updates to watchdog write-once registers, after the reset-triggered initial configuration window (WCT) closes, through unlock sequence</description>
106623              <bitOffset>4</bitOffset>
106624              <bitWidth>1</bitWidth>
106625              <access>read-write</access>
106626              <enumeratedValues>
106627                <enumeratedValue>
106628                  <name>0</name>
106629                  <description>No further updates allowed to WDOG write-once registers.</description>
106630                  <value>#0</value>
106631                </enumeratedValue>
106632                <enumeratedValue>
106633                  <name>1</name>
106634                  <description>WDOG write-once registers can be unlocked for updating.</description>
106635                  <value>#1</value>
106636                </enumeratedValue>
106637              </enumeratedValues>
106638            </field>
106639            <field>
106640              <name>DBGEN</name>
106641              <description>Enables or disables WDOG in Debug mode.</description>
106642              <bitOffset>5</bitOffset>
106643              <bitWidth>1</bitWidth>
106644              <access>read-write</access>
106645              <enumeratedValues>
106646                <enumeratedValue>
106647                  <name>0</name>
106648                  <description>WDOG is disabled in CPU Debug mode.</description>
106649                  <value>#0</value>
106650                </enumeratedValue>
106651                <enumeratedValue>
106652                  <name>1</name>
106653                  <description>WDOG is enabled in CPU Debug mode.</description>
106654                  <value>#1</value>
106655                </enumeratedValue>
106656              </enumeratedValues>
106657            </field>
106658            <field>
106659              <name>STOPEN</name>
106660              <description>Enables or disables WDOG in Stop mode.</description>
106661              <bitOffset>6</bitOffset>
106662              <bitWidth>1</bitWidth>
106663              <access>read-write</access>
106664              <enumeratedValues>
106665                <enumeratedValue>
106666                  <name>0</name>
106667                  <description>WDOG is disabled in CPU Stop mode.</description>
106668                  <value>#0</value>
106669                </enumeratedValue>
106670                <enumeratedValue>
106671                  <name>1</name>
106672                  <description>WDOG is enabled in CPU Stop mode.</description>
106673                  <value>#1</value>
106674                </enumeratedValue>
106675              </enumeratedValues>
106676            </field>
106677            <field>
106678              <name>WAITEN</name>
106679              <description>Enables or disables WDOG in Wait mode.</description>
106680              <bitOffset>7</bitOffset>
106681              <bitWidth>1</bitWidth>
106682              <access>read-write</access>
106683              <enumeratedValues>
106684                <enumeratedValue>
106685                  <name>0</name>
106686                  <description>WDOG is disabled in CPU Wait mode.</description>
106687                  <value>#0</value>
106688                </enumeratedValue>
106689                <enumeratedValue>
106690                  <name>1</name>
106691                  <description>WDOG is enabled in CPU Wait mode.</description>
106692                  <value>#1</value>
106693                </enumeratedValue>
106694              </enumeratedValues>
106695            </field>
106696            <field>
106697              <name>TESTWDOG</name>
106698              <description>Puts the watchdog in the functional test mode</description>
106699              <bitOffset>10</bitOffset>
106700              <bitWidth>1</bitWidth>
106701              <access>read-write</access>
106702            </field>
106703            <field>
106704              <name>TESTSEL</name>
106705              <description>Effective only if TESTWDOG is set. Selects the test to be run on the watchdog timer.</description>
106706              <bitOffset>11</bitOffset>
106707              <bitWidth>1</bitWidth>
106708              <access>read-write</access>
106709              <enumeratedValues>
106710                <enumeratedValue>
106711                  <name>0</name>
106712                  <description>Quick test. The timer runs in normal operation. You can load a small time-out value to do a quick test.</description>
106713                  <value>#0</value>
106714                </enumeratedValue>
106715                <enumeratedValue>
106716                  <name>1</name>
106717                  <description>Byte test. Puts the timer in the byte test mode where individual bytes of the timer are enabled for operation and are compared for time-out against the corresponding byte of the programmed time-out value. Select the byte through BYTESEL[1:0] for testing.</description>
106718                  <value>#1</value>
106719                </enumeratedValue>
106720              </enumeratedValues>
106721            </field>
106722            <field>
106723              <name>BYTESEL</name>
106724              <description>This 2-bit field selects the byte to be tested when the watchdog is in the byte test mode.</description>
106725              <bitOffset>12</bitOffset>
106726              <bitWidth>2</bitWidth>
106727              <access>read-write</access>
106728              <enumeratedValues>
106729                <enumeratedValue>
106730                  <name>00</name>
106731                  <description>Byte 0 selected</description>
106732                  <value>#00</value>
106733                </enumeratedValue>
106734                <enumeratedValue>
106735                  <name>01</name>
106736                  <description>Byte 1 selected</description>
106737                  <value>#01</value>
106738                </enumeratedValue>
106739                <enumeratedValue>
106740                  <name>10</name>
106741                  <description>Byte 2 selected</description>
106742                  <value>#10</value>
106743                </enumeratedValue>
106744                <enumeratedValue>
106745                  <name>11</name>
106746                  <description>Byte 3 selected</description>
106747                  <value>#11</value>
106748                </enumeratedValue>
106749              </enumeratedValues>
106750            </field>
106751            <field>
106752              <name>DISTESTWDOG</name>
106753              <description>Allows the WDOG&apos;s functional test mode to be disabled permanently</description>
106754              <bitOffset>14</bitOffset>
106755              <bitWidth>1</bitWidth>
106756              <access>read-write</access>
106757              <enumeratedValues>
106758                <enumeratedValue>
106759                  <name>0</name>
106760                  <description>WDOG functional test mode is not disabled.</description>
106761                  <value>#0</value>
106762                </enumeratedValue>
106763                <enumeratedValue>
106764                  <name>1</name>
106765                  <description>WDOG functional test mode is disabled permanently until reset.</description>
106766                  <value>#1</value>
106767                </enumeratedValue>
106768              </enumeratedValues>
106769            </field>
106770          </fields>
106771        </register>
106772        <register>
106773          <name>STCTRLL</name>
106774          <description>Watchdog Status and Control Register Low</description>
106775          <addressOffset>0x2</addressOffset>
106776          <size>16</size>
106777          <access>read-write</access>
106778          <resetValue>0x1</resetValue>
106779          <resetMask>0xFFFF</resetMask>
106780          <fields>
106781            <field>
106782              <name>INTFLG</name>
106783              <description>Interrupt flag</description>
106784              <bitOffset>15</bitOffset>
106785              <bitWidth>1</bitWidth>
106786              <access>read-write</access>
106787            </field>
106788          </fields>
106789        </register>
106790        <register>
106791          <name>TOVALH</name>
106792          <description>Watchdog Time-out Value Register High</description>
106793          <addressOffset>0x4</addressOffset>
106794          <size>16</size>
106795          <access>read-write</access>
106796          <resetValue>0x4C</resetValue>
106797          <resetMask>0xFFFF</resetMask>
106798          <fields>
106799            <field>
106800              <name>TOVALHIGH</name>
106801              <description>Defines the upper 16 bits of the 32-bit time-out value for the watchdog timer</description>
106802              <bitOffset>0</bitOffset>
106803              <bitWidth>16</bitWidth>
106804              <access>read-write</access>
106805            </field>
106806          </fields>
106807        </register>
106808        <register>
106809          <name>TOVALL</name>
106810          <description>Watchdog Time-out Value Register Low</description>
106811          <addressOffset>0x6</addressOffset>
106812          <size>16</size>
106813          <access>read-write</access>
106814          <resetValue>0x4B4C</resetValue>
106815          <resetMask>0xFFFF</resetMask>
106816          <fields>
106817            <field>
106818              <name>TOVALLOW</name>
106819              <description>Defines the lower 16 bits of the 32-bit time-out value for the watchdog timer</description>
106820              <bitOffset>0</bitOffset>
106821              <bitWidth>16</bitWidth>
106822              <access>read-write</access>
106823            </field>
106824          </fields>
106825        </register>
106826        <register>
106827          <name>WINH</name>
106828          <description>Watchdog Window Register High</description>
106829          <addressOffset>0x8</addressOffset>
106830          <size>16</size>
106831          <access>read-write</access>
106832          <resetValue>0</resetValue>
106833          <resetMask>0xFFFF</resetMask>
106834          <fields>
106835            <field>
106836              <name>WINHIGH</name>
106837              <description>Defines the upper 16 bits of the 32-bit window for the windowed mode of operation of the watchdog</description>
106838              <bitOffset>0</bitOffset>
106839              <bitWidth>16</bitWidth>
106840              <access>read-write</access>
106841            </field>
106842          </fields>
106843        </register>
106844        <register>
106845          <name>WINL</name>
106846          <description>Watchdog Window Register Low</description>
106847          <addressOffset>0xA</addressOffset>
106848          <size>16</size>
106849          <access>read-write</access>
106850          <resetValue>0x10</resetValue>
106851          <resetMask>0xFFFF</resetMask>
106852          <fields>
106853            <field>
106854              <name>WINLOW</name>
106855              <description>Defines the lower 16 bits of the 32-bit window for the windowed mode of operation of the watchdog</description>
106856              <bitOffset>0</bitOffset>
106857              <bitWidth>16</bitWidth>
106858              <access>read-write</access>
106859            </field>
106860          </fields>
106861        </register>
106862        <register>
106863          <name>REFRESH</name>
106864          <description>Watchdog Refresh register</description>
106865          <addressOffset>0xC</addressOffset>
106866          <size>16</size>
106867          <access>read-write</access>
106868          <resetValue>0xB480</resetValue>
106869          <resetMask>0xFFFF</resetMask>
106870          <fields>
106871            <field>
106872              <name>WDOGREFRESH</name>
106873              <description>Watchdog refresh register</description>
106874              <bitOffset>0</bitOffset>
106875              <bitWidth>16</bitWidth>
106876              <access>read-write</access>
106877            </field>
106878          </fields>
106879        </register>
106880        <register>
106881          <name>UNLOCK</name>
106882          <description>Watchdog Unlock register</description>
106883          <addressOffset>0xE</addressOffset>
106884          <size>16</size>
106885          <access>read-write</access>
106886          <resetValue>0xD928</resetValue>
106887          <resetMask>0xFFFF</resetMask>
106888          <fields>
106889            <field>
106890              <name>WDOGUNLOCK</name>
106891              <description>Writing the unlock sequence values to this register to makes the watchdog write-once registers writable again</description>
106892              <bitOffset>0</bitOffset>
106893              <bitWidth>16</bitWidth>
106894              <access>read-write</access>
106895            </field>
106896          </fields>
106897        </register>
106898        <register>
106899          <name>TMROUTH</name>
106900          <description>Watchdog Timer Output Register High</description>
106901          <addressOffset>0x10</addressOffset>
106902          <size>16</size>
106903          <access>read-write</access>
106904          <resetValue>0</resetValue>
106905          <resetMask>0xFFFF</resetMask>
106906          <fields>
106907            <field>
106908              <name>TIMEROUTHIGH</name>
106909              <description>Shows the value of the upper 16 bits of the watchdog timer.</description>
106910              <bitOffset>0</bitOffset>
106911              <bitWidth>16</bitWidth>
106912              <access>read-write</access>
106913            </field>
106914          </fields>
106915        </register>
106916        <register>
106917          <name>TMROUTL</name>
106918          <description>Watchdog Timer Output Register Low</description>
106919          <addressOffset>0x12</addressOffset>
106920          <size>16</size>
106921          <access>read-write</access>
106922          <resetValue>0</resetValue>
106923          <resetMask>0xFFFF</resetMask>
106924          <fields>
106925            <field>
106926              <name>TIMEROUTLOW</name>
106927              <description>Shows the value of the lower 16 bits of the watchdog timer.</description>
106928              <bitOffset>0</bitOffset>
106929              <bitWidth>16</bitWidth>
106930              <access>read-write</access>
106931            </field>
106932          </fields>
106933        </register>
106934        <register>
106935          <name>RSTCNT</name>
106936          <description>Watchdog Reset Count register</description>
106937          <addressOffset>0x14</addressOffset>
106938          <size>16</size>
106939          <access>read-write</access>
106940          <resetValue>0</resetValue>
106941          <resetMask>0xFFFF</resetMask>
106942          <fields>
106943            <field>
106944              <name>RSTCNT</name>
106945              <description>Counts the number of times the watchdog resets the system</description>
106946              <bitOffset>0</bitOffset>
106947              <bitWidth>16</bitWidth>
106948              <access>read-write</access>
106949            </field>
106950          </fields>
106951        </register>
106952        <register>
106953          <name>PRESC</name>
106954          <description>Watchdog Prescaler register</description>
106955          <addressOffset>0x16</addressOffset>
106956          <size>16</size>
106957          <access>read-write</access>
106958          <resetValue>0x400</resetValue>
106959          <resetMask>0xFFFF</resetMask>
106960          <fields>
106961            <field>
106962              <name>PRESCVAL</name>
106963              <description>3-bit prescaler for the watchdog clock source</description>
106964              <bitOffset>8</bitOffset>
106965              <bitWidth>3</bitWidth>
106966              <access>read-write</access>
106967            </field>
106968          </fields>
106969        </register>
106970      </registers>
106971    </peripheral>
106972    <peripheral>
106973      <name>EWM</name>
106974      <description>External Watchdog Monitor</description>
106975      <prependToName>EWM_</prependToName>
106976      <baseAddress>0x40061000</baseAddress>
106977      <addressBlock>
106978        <offset>0</offset>
106979        <size>0x6</size>
106980        <usage>registers</usage>
106981      </addressBlock>
106982      <interrupt>
106983        <name>WDOG_EWM</name>
106984        <value>22</value>
106985      </interrupt>
106986      <registers>
106987        <register>
106988          <name>CTRL</name>
106989          <description>Control Register</description>
106990          <addressOffset>0</addressOffset>
106991          <size>8</size>
106992          <access>read-write</access>
106993          <resetValue>0</resetValue>
106994          <resetMask>0xFF</resetMask>
106995          <fields>
106996            <field>
106997              <name>EWMEN</name>
106998              <description>EWM enable.</description>
106999              <bitOffset>0</bitOffset>
107000              <bitWidth>1</bitWidth>
107001              <access>read-write</access>
107002            </field>
107003            <field>
107004              <name>ASSIN</name>
107005              <description>EWM_in&apos;s Assertion State Select.</description>
107006              <bitOffset>1</bitOffset>
107007              <bitWidth>1</bitWidth>
107008              <access>read-write</access>
107009            </field>
107010            <field>
107011              <name>INEN</name>
107012              <description>Input Enable.</description>
107013              <bitOffset>2</bitOffset>
107014              <bitWidth>1</bitWidth>
107015              <access>read-write</access>
107016            </field>
107017            <field>
107018              <name>INTEN</name>
107019              <description>Interrupt Enable.</description>
107020              <bitOffset>3</bitOffset>
107021              <bitWidth>1</bitWidth>
107022              <access>read-write</access>
107023            </field>
107024          </fields>
107025        </register>
107026        <register>
107027          <name>SERV</name>
107028          <description>Service Register</description>
107029          <addressOffset>0x1</addressOffset>
107030          <size>8</size>
107031          <access>write-only</access>
107032          <resetValue>0</resetValue>
107033          <resetMask>0xFF</resetMask>
107034          <fields>
107035            <field>
107036              <name>SERVICE</name>
107037              <description>The EWM service mechanism requires the CPU to write two values to the SERV register: a first data byte of 0xB4, followed by a second data byte of 0x2C</description>
107038              <bitOffset>0</bitOffset>
107039              <bitWidth>8</bitWidth>
107040              <access>write-only</access>
107041            </field>
107042          </fields>
107043        </register>
107044        <register>
107045          <name>CMPL</name>
107046          <description>Compare Low Register</description>
107047          <addressOffset>0x2</addressOffset>
107048          <size>8</size>
107049          <access>read-write</access>
107050          <resetValue>0</resetValue>
107051          <resetMask>0xFF</resetMask>
107052          <fields>
107053            <field>
107054              <name>COMPAREL</name>
107055              <description>To prevent runaway code from changing this field, software should write to this field after a CPU reset even if the (default) minimum service time is required</description>
107056              <bitOffset>0</bitOffset>
107057              <bitWidth>8</bitWidth>
107058              <access>read-write</access>
107059            </field>
107060          </fields>
107061        </register>
107062        <register>
107063          <name>CMPH</name>
107064          <description>Compare High Register</description>
107065          <addressOffset>0x3</addressOffset>
107066          <size>8</size>
107067          <access>read-write</access>
107068          <resetValue>0xFF</resetValue>
107069          <resetMask>0xFF</resetMask>
107070          <fields>
107071            <field>
107072              <name>COMPAREH</name>
107073              <description>To prevent runaway code from changing this field, software should write to this field after a CPU reset even if the (default) maximum service time is required</description>
107074              <bitOffset>0</bitOffset>
107075              <bitWidth>8</bitWidth>
107076              <access>read-write</access>
107077            </field>
107078          </fields>
107079        </register>
107080        <register>
107081          <name>CLKCTRL</name>
107082          <description>Clock Control Register</description>
107083          <addressOffset>0x4</addressOffset>
107084          <size>8</size>
107085          <access>read-write</access>
107086          <resetValue>0</resetValue>
107087          <resetMask>0xFF</resetMask>
107088          <fields>
107089            <field>
107090              <name>CLKSEL</name>
107091              <description>EWM has 4 possible low power clock sources for running EWM counter</description>
107092              <bitOffset>0</bitOffset>
107093              <bitWidth>2</bitWidth>
107094              <access>read-write</access>
107095            </field>
107096          </fields>
107097        </register>
107098        <register>
107099          <name>CLKPRESCALER</name>
107100          <description>Clock Prescaler Register</description>
107101          <addressOffset>0x5</addressOffset>
107102          <size>8</size>
107103          <access>read-write</access>
107104          <resetValue>0</resetValue>
107105          <resetMask>0xFF</resetMask>
107106          <fields>
107107            <field>
107108              <name>CLK_DIV</name>
107109              <description>Selected low power clock source for running the EWM counter can be prescaled as below</description>
107110              <bitOffset>0</bitOffset>
107111              <bitWidth>8</bitWidth>
107112              <access>read-write</access>
107113            </field>
107114          </fields>
107115        </register>
107116      </registers>
107117    </peripheral>
107118    <peripheral>
107119      <name>CMT</name>
107120      <description>Carrier Modulator Transmitter</description>
107121      <prependToName>CMT_</prependToName>
107122      <baseAddress>0x40062000</baseAddress>
107123      <addressBlock>
107124        <offset>0</offset>
107125        <size>0xC</size>
107126        <usage>registers</usage>
107127      </addressBlock>
107128      <interrupt>
107129        <name>CMT</name>
107130        <value>45</value>
107131      </interrupt>
107132      <registers>
107133        <register>
107134          <name>CGH1</name>
107135          <description>CMT Carrier Generator High Data Register 1</description>
107136          <addressOffset>0</addressOffset>
107137          <size>8</size>
107138          <access>read-write</access>
107139          <resetValue>0</resetValue>
107140          <resetMask>0</resetMask>
107141          <fields>
107142            <field>
107143              <name>PH</name>
107144              <description>Primary Carrier High Time Data Value</description>
107145              <bitOffset>0</bitOffset>
107146              <bitWidth>8</bitWidth>
107147              <access>read-write</access>
107148            </field>
107149          </fields>
107150        </register>
107151        <register>
107152          <name>CGL1</name>
107153          <description>CMT Carrier Generator Low Data Register 1</description>
107154          <addressOffset>0x1</addressOffset>
107155          <size>8</size>
107156          <access>read-write</access>
107157          <resetValue>0</resetValue>
107158          <resetMask>0</resetMask>
107159          <fields>
107160            <field>
107161              <name>PL</name>
107162              <description>Primary Carrier Low Time Data Value</description>
107163              <bitOffset>0</bitOffset>
107164              <bitWidth>8</bitWidth>
107165              <access>read-write</access>
107166            </field>
107167          </fields>
107168        </register>
107169        <register>
107170          <name>CGH2</name>
107171          <description>CMT Carrier Generator High Data Register 2</description>
107172          <addressOffset>0x2</addressOffset>
107173          <size>8</size>
107174          <access>read-write</access>
107175          <resetValue>0</resetValue>
107176          <resetMask>0</resetMask>
107177          <fields>
107178            <field>
107179              <name>SH</name>
107180              <description>Secondary Carrier High Time Data Value</description>
107181              <bitOffset>0</bitOffset>
107182              <bitWidth>8</bitWidth>
107183              <access>read-write</access>
107184            </field>
107185          </fields>
107186        </register>
107187        <register>
107188          <name>CGL2</name>
107189          <description>CMT Carrier Generator Low Data Register 2</description>
107190          <addressOffset>0x3</addressOffset>
107191          <size>8</size>
107192          <access>read-write</access>
107193          <resetValue>0</resetValue>
107194          <resetMask>0</resetMask>
107195          <fields>
107196            <field>
107197              <name>SL</name>
107198              <description>Secondary Carrier Low Time Data Value</description>
107199              <bitOffset>0</bitOffset>
107200              <bitWidth>8</bitWidth>
107201              <access>read-write</access>
107202            </field>
107203          </fields>
107204        </register>
107205        <register>
107206          <name>OC</name>
107207          <description>CMT Output Control Register</description>
107208          <addressOffset>0x4</addressOffset>
107209          <size>8</size>
107210          <access>read-write</access>
107211          <resetValue>0</resetValue>
107212          <resetMask>0xFF</resetMask>
107213          <fields>
107214            <field>
107215              <name>IROPEN</name>
107216              <description>IRO Pin Enable</description>
107217              <bitOffset>5</bitOffset>
107218              <bitWidth>1</bitWidth>
107219              <access>read-write</access>
107220              <enumeratedValues>
107221                <enumeratedValue>
107222                  <name>0</name>
107223                  <description>The IRO signal is disabled.</description>
107224                  <value>#0</value>
107225                </enumeratedValue>
107226                <enumeratedValue>
107227                  <name>1</name>
107228                  <description>The IRO signal is enabled as output.</description>
107229                  <value>#1</value>
107230                </enumeratedValue>
107231              </enumeratedValues>
107232            </field>
107233            <field>
107234              <name>CMTPOL</name>
107235              <description>CMT Output Polarity</description>
107236              <bitOffset>6</bitOffset>
107237              <bitWidth>1</bitWidth>
107238              <access>read-write</access>
107239              <enumeratedValues>
107240                <enumeratedValue>
107241                  <name>0</name>
107242                  <description>The IRO signal is active-low.</description>
107243                  <value>#0</value>
107244                </enumeratedValue>
107245                <enumeratedValue>
107246                  <name>1</name>
107247                  <description>The IRO signal is active-high.</description>
107248                  <value>#1</value>
107249                </enumeratedValue>
107250              </enumeratedValues>
107251            </field>
107252            <field>
107253              <name>IROL</name>
107254              <description>IRO Latch Control</description>
107255              <bitOffset>7</bitOffset>
107256              <bitWidth>1</bitWidth>
107257              <access>read-write</access>
107258            </field>
107259          </fields>
107260        </register>
107261        <register>
107262          <name>MSC</name>
107263          <description>CMT Modulator Status and Control Register</description>
107264          <addressOffset>0x5</addressOffset>
107265          <size>8</size>
107266          <access>read-write</access>
107267          <resetValue>0</resetValue>
107268          <resetMask>0xFF</resetMask>
107269          <fields>
107270            <field>
107271              <name>MCGEN</name>
107272              <description>Modulator and Carrier Generator Enable</description>
107273              <bitOffset>0</bitOffset>
107274              <bitWidth>1</bitWidth>
107275              <access>read-write</access>
107276              <enumeratedValues>
107277                <enumeratedValue>
107278                  <name>0</name>
107279                  <description>Modulator and carrier generator disabled</description>
107280                  <value>#0</value>
107281                </enumeratedValue>
107282                <enumeratedValue>
107283                  <name>1</name>
107284                  <description>Modulator and carrier generator enabled</description>
107285                  <value>#1</value>
107286                </enumeratedValue>
107287              </enumeratedValues>
107288            </field>
107289            <field>
107290              <name>EOCIE</name>
107291              <description>End of Cycle Interrupt Enable</description>
107292              <bitOffset>1</bitOffset>
107293              <bitWidth>1</bitWidth>
107294              <access>read-write</access>
107295              <enumeratedValues>
107296                <enumeratedValue>
107297                  <name>0</name>
107298                  <description>CPU interrupt is disabled.</description>
107299                  <value>#0</value>
107300                </enumeratedValue>
107301                <enumeratedValue>
107302                  <name>1</name>
107303                  <description>CPU interrupt is enabled.</description>
107304                  <value>#1</value>
107305                </enumeratedValue>
107306              </enumeratedValues>
107307            </field>
107308            <field>
107309              <name>FSK</name>
107310              <description>FSK Mode Select</description>
107311              <bitOffset>2</bitOffset>
107312              <bitWidth>1</bitWidth>
107313              <access>read-write</access>
107314              <enumeratedValues>
107315                <enumeratedValue>
107316                  <name>0</name>
107317                  <description>The CMT operates in Time or Baseband mode.</description>
107318                  <value>#0</value>
107319                </enumeratedValue>
107320                <enumeratedValue>
107321                  <name>1</name>
107322                  <description>The CMT operates in FSK mode.</description>
107323                  <value>#1</value>
107324                </enumeratedValue>
107325              </enumeratedValues>
107326            </field>
107327            <field>
107328              <name>BASE</name>
107329              <description>Baseband Enable</description>
107330              <bitOffset>3</bitOffset>
107331              <bitWidth>1</bitWidth>
107332              <access>read-write</access>
107333              <enumeratedValues>
107334                <enumeratedValue>
107335                  <name>0</name>
107336                  <description>Baseband mode is disabled.</description>
107337                  <value>#0</value>
107338                </enumeratedValue>
107339                <enumeratedValue>
107340                  <name>1</name>
107341                  <description>Baseband mode is enabled.</description>
107342                  <value>#1</value>
107343                </enumeratedValue>
107344              </enumeratedValues>
107345            </field>
107346            <field>
107347              <name>EXSPC</name>
107348              <description>Extended Space Enable</description>
107349              <bitOffset>4</bitOffset>
107350              <bitWidth>1</bitWidth>
107351              <access>read-write</access>
107352              <enumeratedValues>
107353                <enumeratedValue>
107354                  <name>0</name>
107355                  <description>Extended space is disabled.</description>
107356                  <value>#0</value>
107357                </enumeratedValue>
107358                <enumeratedValue>
107359                  <name>1</name>
107360                  <description>Extended space is enabled.</description>
107361                  <value>#1</value>
107362                </enumeratedValue>
107363              </enumeratedValues>
107364            </field>
107365            <field>
107366              <name>CMTDIV</name>
107367              <description>CMT Clock Divide Prescaler</description>
107368              <bitOffset>5</bitOffset>
107369              <bitWidth>2</bitWidth>
107370              <access>read-write</access>
107371              <enumeratedValues>
107372                <enumeratedValue>
107373                  <name>00</name>
107374                  <description>IF * 1</description>
107375                  <value>#00</value>
107376                </enumeratedValue>
107377                <enumeratedValue>
107378                  <name>01</name>
107379                  <description>IF * 2</description>
107380                  <value>#01</value>
107381                </enumeratedValue>
107382                <enumeratedValue>
107383                  <name>10</name>
107384                  <description>IF * 4</description>
107385                  <value>#10</value>
107386                </enumeratedValue>
107387                <enumeratedValue>
107388                  <name>11</name>
107389                  <description>IF * 8</description>
107390                  <value>#11</value>
107391                </enumeratedValue>
107392              </enumeratedValues>
107393            </field>
107394            <field>
107395              <name>EOCF</name>
107396              <description>End Of Cycle Status Flag</description>
107397              <bitOffset>7</bitOffset>
107398              <bitWidth>1</bitWidth>
107399              <access>read-only</access>
107400              <enumeratedValues>
107401                <enumeratedValue>
107402                  <name>0</name>
107403                  <description>End of modulation cycle has not occurred since the flag last cleared.</description>
107404                  <value>#0</value>
107405                </enumeratedValue>
107406                <enumeratedValue>
107407                  <name>1</name>
107408                  <description>End of modulator cycle has occurred.</description>
107409                  <value>#1</value>
107410                </enumeratedValue>
107411              </enumeratedValues>
107412            </field>
107413          </fields>
107414        </register>
107415        <register>
107416          <name>CMD1</name>
107417          <description>CMT Modulator Data Register Mark High</description>
107418          <addressOffset>0x6</addressOffset>
107419          <size>8</size>
107420          <access>read-write</access>
107421          <resetValue>0</resetValue>
107422          <resetMask>0</resetMask>
107423          <fields>
107424            <field>
107425              <name>MB</name>
107426              <description>MB[15:8]</description>
107427              <bitOffset>0</bitOffset>
107428              <bitWidth>8</bitWidth>
107429              <access>read-write</access>
107430            </field>
107431          </fields>
107432        </register>
107433        <register>
107434          <name>CMD2</name>
107435          <description>CMT Modulator Data Register Mark Low</description>
107436          <addressOffset>0x7</addressOffset>
107437          <size>8</size>
107438          <access>read-write</access>
107439          <resetValue>0</resetValue>
107440          <resetMask>0</resetMask>
107441          <fields>
107442            <field>
107443              <name>MB</name>
107444              <description>MB[7:0]</description>
107445              <bitOffset>0</bitOffset>
107446              <bitWidth>8</bitWidth>
107447              <access>read-write</access>
107448            </field>
107449          </fields>
107450        </register>
107451        <register>
107452          <name>CMD3</name>
107453          <description>CMT Modulator Data Register Space High</description>
107454          <addressOffset>0x8</addressOffset>
107455          <size>8</size>
107456          <access>read-write</access>
107457          <resetValue>0</resetValue>
107458          <resetMask>0</resetMask>
107459          <fields>
107460            <field>
107461              <name>SB</name>
107462              <description>SB[15:8]</description>
107463              <bitOffset>0</bitOffset>
107464              <bitWidth>8</bitWidth>
107465              <access>read-write</access>
107466            </field>
107467          </fields>
107468        </register>
107469        <register>
107470          <name>CMD4</name>
107471          <description>CMT Modulator Data Register Space Low</description>
107472          <addressOffset>0x9</addressOffset>
107473          <size>8</size>
107474          <access>read-write</access>
107475          <resetValue>0</resetValue>
107476          <resetMask>0</resetMask>
107477          <fields>
107478            <field>
107479              <name>SB</name>
107480              <description>SB[7:0]</description>
107481              <bitOffset>0</bitOffset>
107482              <bitWidth>8</bitWidth>
107483              <access>read-write</access>
107484            </field>
107485          </fields>
107486        </register>
107487        <register>
107488          <name>PPS</name>
107489          <description>CMT Primary Prescaler Register</description>
107490          <addressOffset>0xA</addressOffset>
107491          <size>8</size>
107492          <access>read-write</access>
107493          <resetValue>0</resetValue>
107494          <resetMask>0xFF</resetMask>
107495          <fields>
107496            <field>
107497              <name>PPSDIV</name>
107498              <description>Primary Prescaler Divider</description>
107499              <bitOffset>0</bitOffset>
107500              <bitWidth>4</bitWidth>
107501              <access>read-write</access>
107502              <enumeratedValues>
107503                <enumeratedValue>
107504                  <name>0000</name>
107505                  <description>Bus clock * 1</description>
107506                  <value>#0000</value>
107507                </enumeratedValue>
107508                <enumeratedValue>
107509                  <name>0001</name>
107510                  <description>Bus clock * 2</description>
107511                  <value>#0001</value>
107512                </enumeratedValue>
107513                <enumeratedValue>
107514                  <name>0010</name>
107515                  <description>Bus clock * 3</description>
107516                  <value>#0010</value>
107517                </enumeratedValue>
107518                <enumeratedValue>
107519                  <name>0011</name>
107520                  <description>Bus clock * 4</description>
107521                  <value>#0011</value>
107522                </enumeratedValue>
107523                <enumeratedValue>
107524                  <name>0100</name>
107525                  <description>Bus clock * 5</description>
107526                  <value>#0100</value>
107527                </enumeratedValue>
107528                <enumeratedValue>
107529                  <name>0101</name>
107530                  <description>Bus clock * 6</description>
107531                  <value>#0101</value>
107532                </enumeratedValue>
107533                <enumeratedValue>
107534                  <name>0110</name>
107535                  <description>Bus clock * 7</description>
107536                  <value>#0110</value>
107537                </enumeratedValue>
107538                <enumeratedValue>
107539                  <name>0111</name>
107540                  <description>Bus clock * 8</description>
107541                  <value>#0111</value>
107542                </enumeratedValue>
107543                <enumeratedValue>
107544                  <name>1000</name>
107545                  <description>Bus clock * 9</description>
107546                  <value>#1000</value>
107547                </enumeratedValue>
107548                <enumeratedValue>
107549                  <name>1001</name>
107550                  <description>Bus clock * 10</description>
107551                  <value>#1001</value>
107552                </enumeratedValue>
107553                <enumeratedValue>
107554                  <name>1010</name>
107555                  <description>Bus clock * 11</description>
107556                  <value>#1010</value>
107557                </enumeratedValue>
107558                <enumeratedValue>
107559                  <name>1011</name>
107560                  <description>Bus clock * 12</description>
107561                  <value>#1011</value>
107562                </enumeratedValue>
107563                <enumeratedValue>
107564                  <name>1100</name>
107565                  <description>Bus clock * 13</description>
107566                  <value>#1100</value>
107567                </enumeratedValue>
107568                <enumeratedValue>
107569                  <name>1101</name>
107570                  <description>Bus clock * 14</description>
107571                  <value>#1101</value>
107572                </enumeratedValue>
107573                <enumeratedValue>
107574                  <name>1110</name>
107575                  <description>Bus clock * 15</description>
107576                  <value>#1110</value>
107577                </enumeratedValue>
107578                <enumeratedValue>
107579                  <name>1111</name>
107580                  <description>Bus clock * 16</description>
107581                  <value>#1111</value>
107582                </enumeratedValue>
107583              </enumeratedValues>
107584            </field>
107585          </fields>
107586        </register>
107587        <register>
107588          <name>DMA</name>
107589          <description>CMT Direct Memory Access Register</description>
107590          <addressOffset>0xB</addressOffset>
107591          <size>8</size>
107592          <access>read-write</access>
107593          <resetValue>0</resetValue>
107594          <resetMask>0xFF</resetMask>
107595          <fields>
107596            <field>
107597              <name>DMA</name>
107598              <description>DMA Enable</description>
107599              <bitOffset>0</bitOffset>
107600              <bitWidth>1</bitWidth>
107601              <access>read-write</access>
107602              <enumeratedValues>
107603                <enumeratedValue>
107604                  <name>0</name>
107605                  <description>DMA transfer request and done are disabled.</description>
107606                  <value>#0</value>
107607                </enumeratedValue>
107608                <enumeratedValue>
107609                  <name>1</name>
107610                  <description>DMA transfer request and done are enabled.</description>
107611                  <value>#1</value>
107612                </enumeratedValue>
107613              </enumeratedValues>
107614            </field>
107615          </fields>
107616        </register>
107617      </registers>
107618    </peripheral>
107619    <peripheral>
107620      <name>MCG</name>
107621      <description>Multipurpose Clock Generator module</description>
107622      <prependToName>MCG_</prependToName>
107623      <baseAddress>0x40064000</baseAddress>
107624      <addressBlock>
107625        <offset>0</offset>
107626        <size>0xE</size>
107627        <usage>registers</usage>
107628      </addressBlock>
107629      <interrupt>
107630        <name>MCG</name>
107631        <value>57</value>
107632      </interrupt>
107633      <registers>
107634        <register>
107635          <name>C1</name>
107636          <description>MCG Control 1 Register</description>
107637          <addressOffset>0</addressOffset>
107638          <size>8</size>
107639          <access>read-write</access>
107640          <resetValue>0x4</resetValue>
107641          <resetMask>0xFF</resetMask>
107642          <fields>
107643            <field>
107644              <name>IREFSTEN</name>
107645              <description>Internal Reference Stop Enable</description>
107646              <bitOffset>0</bitOffset>
107647              <bitWidth>1</bitWidth>
107648              <access>read-write</access>
107649              <enumeratedValues>
107650                <enumeratedValue>
107651                  <name>0</name>
107652                  <description>Internal reference clock is disabled in Stop mode.</description>
107653                  <value>#0</value>
107654                </enumeratedValue>
107655                <enumeratedValue>
107656                  <name>1</name>
107657                  <description>Internal reference clock is enabled in Stop mode if IRCLKEN is set or if MCG is in FEI, FBI, or BLPI modes before entering Stop mode.</description>
107658                  <value>#1</value>
107659                </enumeratedValue>
107660              </enumeratedValues>
107661            </field>
107662            <field>
107663              <name>IRCLKEN</name>
107664              <description>Internal Reference Clock Enable</description>
107665              <bitOffset>1</bitOffset>
107666              <bitWidth>1</bitWidth>
107667              <access>read-write</access>
107668              <enumeratedValues>
107669                <enumeratedValue>
107670                  <name>0</name>
107671                  <description>MCGIRCLK inactive.</description>
107672                  <value>#0</value>
107673                </enumeratedValue>
107674                <enumeratedValue>
107675                  <name>1</name>
107676                  <description>MCGIRCLK active.</description>
107677                  <value>#1</value>
107678                </enumeratedValue>
107679              </enumeratedValues>
107680            </field>
107681            <field>
107682              <name>IREFS</name>
107683              <description>Internal Reference Select</description>
107684              <bitOffset>2</bitOffset>
107685              <bitWidth>1</bitWidth>
107686              <access>read-write</access>
107687              <enumeratedValues>
107688                <enumeratedValue>
107689                  <name>0</name>
107690                  <description>External reference clock is selected.</description>
107691                  <value>#0</value>
107692                </enumeratedValue>
107693                <enumeratedValue>
107694                  <name>1</name>
107695                  <description>The slow internal reference clock is selected.</description>
107696                  <value>#1</value>
107697                </enumeratedValue>
107698              </enumeratedValues>
107699            </field>
107700            <field>
107701              <name>FRDIV</name>
107702              <description>FLL External Reference Divider</description>
107703              <bitOffset>3</bitOffset>
107704              <bitWidth>3</bitWidth>
107705              <access>read-write</access>
107706              <enumeratedValues>
107707                <enumeratedValue>
107708                  <name>000</name>
107709                  <description>If RANGE = 0 or OSCSEL=1 , Divide Factor is 1; for all other RANGE values, Divide Factor is 32.</description>
107710                  <value>#000</value>
107711                </enumeratedValue>
107712                <enumeratedValue>
107713                  <name>001</name>
107714                  <description>If RANGE = 0 or OSCSEL=1 , Divide Factor is 2; for all other RANGE values, Divide Factor is 64.</description>
107715                  <value>#001</value>
107716                </enumeratedValue>
107717                <enumeratedValue>
107718                  <name>010</name>
107719                  <description>If RANGE = 0 or OSCSEL=1 , Divide Factor is 4; for all other RANGE values, Divide Factor is 128.</description>
107720                  <value>#010</value>
107721                </enumeratedValue>
107722                <enumeratedValue>
107723                  <name>011</name>
107724                  <description>If RANGE = 0 or OSCSEL=1 , Divide Factor is 8; for all other RANGE values, Divide Factor is 256.</description>
107725                  <value>#011</value>
107726                </enumeratedValue>
107727                <enumeratedValue>
107728                  <name>100</name>
107729                  <description>If RANGE = 0 or OSCSEL=1 , Divide Factor is 16; for all other RANGE values, Divide Factor is 512.</description>
107730                  <value>#100</value>
107731                </enumeratedValue>
107732                <enumeratedValue>
107733                  <name>101</name>
107734                  <description>If RANGE = 0 or OSCSEL=1 , Divide Factor is 32; for all other RANGE values, Divide Factor is 1024.</description>
107735                  <value>#101</value>
107736                </enumeratedValue>
107737                <enumeratedValue>
107738                  <name>110</name>
107739                  <description>If RANGE = 0 or OSCSEL=1 , Divide Factor is 64; for all other RANGE values, Divide Factor is 1280 .</description>
107740                  <value>#110</value>
107741                </enumeratedValue>
107742                <enumeratedValue>
107743                  <name>111</name>
107744                  <description>If RANGE = 0 or OSCSEL=1 , Divide Factor is 128; for all other RANGE values, Divide Factor is 1536 .</description>
107745                  <value>#111</value>
107746                </enumeratedValue>
107747              </enumeratedValues>
107748            </field>
107749            <field>
107750              <name>CLKS</name>
107751              <description>Clock Source Select</description>
107752              <bitOffset>6</bitOffset>
107753              <bitWidth>2</bitWidth>
107754              <access>read-write</access>
107755              <enumeratedValues>
107756                <enumeratedValue>
107757                  <name>00</name>
107758                  <description>Encoding 0 - Output of FLL or PLL is selected (depends on PLLS control bit).</description>
107759                  <value>#00</value>
107760                </enumeratedValue>
107761                <enumeratedValue>
107762                  <name>01</name>
107763                  <description>Encoding 1 - Internal reference clock is selected.</description>
107764                  <value>#01</value>
107765                </enumeratedValue>
107766                <enumeratedValue>
107767                  <name>10</name>
107768                  <description>Encoding 2 - External reference clock is selected.</description>
107769                  <value>#10</value>
107770                </enumeratedValue>
107771                <enumeratedValue>
107772                  <name>11</name>
107773                  <description>Encoding 3 - Reserved.</description>
107774                  <value>#11</value>
107775                </enumeratedValue>
107776              </enumeratedValues>
107777            </field>
107778          </fields>
107779        </register>
107780        <register>
107781          <name>C2</name>
107782          <description>MCG Control 2 Register</description>
107783          <addressOffset>0x1</addressOffset>
107784          <size>8</size>
107785          <access>read-write</access>
107786          <resetValue>0x80</resetValue>
107787          <resetMask>0xFF</resetMask>
107788          <fields>
107789            <field>
107790              <name>IRCS</name>
107791              <description>Internal Reference Clock Select</description>
107792              <bitOffset>0</bitOffset>
107793              <bitWidth>1</bitWidth>
107794              <access>read-write</access>
107795              <enumeratedValues>
107796                <enumeratedValue>
107797                  <name>0</name>
107798                  <description>Slow internal reference clock selected.</description>
107799                  <value>#0</value>
107800                </enumeratedValue>
107801                <enumeratedValue>
107802                  <name>1</name>
107803                  <description>Fast internal reference clock selected.</description>
107804                  <value>#1</value>
107805                </enumeratedValue>
107806              </enumeratedValues>
107807            </field>
107808            <field>
107809              <name>LP</name>
107810              <description>Low Power Select</description>
107811              <bitOffset>1</bitOffset>
107812              <bitWidth>1</bitWidth>
107813              <access>read-write</access>
107814              <enumeratedValues>
107815                <enumeratedValue>
107816                  <name>0</name>
107817                  <description>FLL or PLL is not disabled in bypass modes.</description>
107818                  <value>#0</value>
107819                </enumeratedValue>
107820                <enumeratedValue>
107821                  <name>1</name>
107822                  <description>FLL or PLL is disabled in bypass modes (lower power)</description>
107823                  <value>#1</value>
107824                </enumeratedValue>
107825              </enumeratedValues>
107826            </field>
107827            <field>
107828              <name>EREFS</name>
107829              <description>External Reference Select</description>
107830              <bitOffset>2</bitOffset>
107831              <bitWidth>1</bitWidth>
107832              <access>read-write</access>
107833              <enumeratedValues>
107834                <enumeratedValue>
107835                  <name>0</name>
107836                  <description>External reference clock requested.</description>
107837                  <value>#0</value>
107838                </enumeratedValue>
107839                <enumeratedValue>
107840                  <name>1</name>
107841                  <description>Oscillator requested.</description>
107842                  <value>#1</value>
107843                </enumeratedValue>
107844              </enumeratedValues>
107845            </field>
107846            <field>
107847              <name>HGO</name>
107848              <description>High Gain Oscillator Select</description>
107849              <bitOffset>3</bitOffset>
107850              <bitWidth>1</bitWidth>
107851              <access>read-write</access>
107852              <enumeratedValues>
107853                <enumeratedValue>
107854                  <name>0</name>
107855                  <description>Configure crystal oscillator for low-power operation.</description>
107856                  <value>#0</value>
107857                </enumeratedValue>
107858                <enumeratedValue>
107859                  <name>1</name>
107860                  <description>Configure crystal oscillator for high-gain operation.</description>
107861                  <value>#1</value>
107862                </enumeratedValue>
107863              </enumeratedValues>
107864            </field>
107865            <field>
107866              <name>RANGE</name>
107867              <description>Frequency Range Select</description>
107868              <bitOffset>4</bitOffset>
107869              <bitWidth>2</bitWidth>
107870              <access>read-write</access>
107871              <enumeratedValues>
107872                <enumeratedValue>
107873                  <name>00</name>
107874                  <description>Encoding 0 - Low frequency range selected for the crystal oscillator .</description>
107875                  <value>#00</value>
107876                </enumeratedValue>
107877                <enumeratedValue>
107878                  <name>01</name>
107879                  <description>Encoding 1 - High frequency range selected for the crystal oscillator .</description>
107880                  <value>#01</value>
107881                </enumeratedValue>
107882              </enumeratedValues>
107883            </field>
107884            <field>
107885              <name>FCFTRIM</name>
107886              <description>Fast Internal Reference Clock Fine Trim</description>
107887              <bitOffset>6</bitOffset>
107888              <bitWidth>1</bitWidth>
107889              <access>read-write</access>
107890            </field>
107891            <field>
107892              <name>LOCRE0</name>
107893              <description>Loss of Clock Reset Enable</description>
107894              <bitOffset>7</bitOffset>
107895              <bitWidth>1</bitWidth>
107896              <access>read-write</access>
107897              <enumeratedValues>
107898                <enumeratedValue>
107899                  <name>0</name>
107900                  <description>Interrupt request is generated on a loss of OSC0 external reference clock.</description>
107901                  <value>#0</value>
107902                </enumeratedValue>
107903                <enumeratedValue>
107904                  <name>1</name>
107905                  <description>Generate a reset request on a loss of OSC0 external reference clock.</description>
107906                  <value>#1</value>
107907                </enumeratedValue>
107908              </enumeratedValues>
107909            </field>
107910          </fields>
107911        </register>
107912        <register>
107913          <name>C3</name>
107914          <description>MCG Control 3 Register</description>
107915          <addressOffset>0x2</addressOffset>
107916          <size>8</size>
107917          <access>read-write</access>
107918          <resetValue>0</resetValue>
107919          <resetMask>0</resetMask>
107920          <fields>
107921            <field>
107922              <name>SCTRIM</name>
107923              <description>Slow Internal Reference Clock Trim Setting</description>
107924              <bitOffset>0</bitOffset>
107925              <bitWidth>8</bitWidth>
107926              <access>read-write</access>
107927            </field>
107928          </fields>
107929        </register>
107930        <register>
107931          <name>C4</name>
107932          <description>MCG Control 4 Register</description>
107933          <addressOffset>0x3</addressOffset>
107934          <size>8</size>
107935          <access>read-write</access>
107936          <resetValue>0</resetValue>
107937          <resetMask>0xE0</resetMask>
107938          <fields>
107939            <field>
107940              <name>SCFTRIM</name>
107941              <description>Slow Internal Reference Clock Fine Trim</description>
107942              <bitOffset>0</bitOffset>
107943              <bitWidth>1</bitWidth>
107944              <access>read-write</access>
107945            </field>
107946            <field>
107947              <name>FCTRIM</name>
107948              <description>Fast Internal Reference Clock Trim Setting</description>
107949              <bitOffset>1</bitOffset>
107950              <bitWidth>4</bitWidth>
107951              <access>read-write</access>
107952            </field>
107953            <field>
107954              <name>DRST_DRS</name>
107955              <description>DCO Range Select</description>
107956              <bitOffset>5</bitOffset>
107957              <bitWidth>2</bitWidth>
107958              <access>read-write</access>
107959              <enumeratedValues>
107960                <enumeratedValue>
107961                  <name>00</name>
107962                  <description>Encoding 0 - Low range (reset default).</description>
107963                  <value>#00</value>
107964                </enumeratedValue>
107965                <enumeratedValue>
107966                  <name>01</name>
107967                  <description>Encoding 1 - Mid range.</description>
107968                  <value>#01</value>
107969                </enumeratedValue>
107970                <enumeratedValue>
107971                  <name>10</name>
107972                  <description>Encoding 2 - Mid-high range.</description>
107973                  <value>#10</value>
107974                </enumeratedValue>
107975                <enumeratedValue>
107976                  <name>11</name>
107977                  <description>Encoding 3 - High range.</description>
107978                  <value>#11</value>
107979                </enumeratedValue>
107980              </enumeratedValues>
107981            </field>
107982            <field>
107983              <name>DMX32</name>
107984              <description>DCO Maximum Frequency with 32.768 kHz Reference</description>
107985              <bitOffset>7</bitOffset>
107986              <bitWidth>1</bitWidth>
107987              <access>read-write</access>
107988              <enumeratedValues>
107989                <enumeratedValue>
107990                  <name>0</name>
107991                  <description>DCO has a default range of 25%.</description>
107992                  <value>#0</value>
107993                </enumeratedValue>
107994                <enumeratedValue>
107995                  <name>1</name>
107996                  <description>DCO is fine-tuned for maximum frequency with 32.768 kHz reference.</description>
107997                  <value>#1</value>
107998                </enumeratedValue>
107999              </enumeratedValues>
108000            </field>
108001          </fields>
108002        </register>
108003        <register>
108004          <name>C5</name>
108005          <description>MCG Control 5 Register</description>
108006          <addressOffset>0x4</addressOffset>
108007          <size>8</size>
108008          <access>read-write</access>
108009          <resetValue>0</resetValue>
108010          <resetMask>0xFF</resetMask>
108011          <fields>
108012            <field>
108013              <name>PRDIV</name>
108014              <description>PLL External Reference Divider</description>
108015              <bitOffset>0</bitOffset>
108016              <bitWidth>3</bitWidth>
108017              <access>read-write</access>
108018              <enumeratedValues>
108019                <enumeratedValue>
108020                  <name>0</name>
108021                  <description>Divide Factor is 1</description>
108022                  <value>#000</value>
108023                </enumeratedValue>
108024                <enumeratedValue>
108025                  <name>1</name>
108026                  <description>Divide Factor is 2</description>
108027                  <value>#001</value>
108028                </enumeratedValue>
108029                <enumeratedValue>
108030                  <name>2</name>
108031                  <description>Divide Factor is 3</description>
108032                  <value>#010</value>
108033                </enumeratedValue>
108034                <enumeratedValue>
108035                  <name>3</name>
108036                  <description>Divide Factor is 4</description>
108037                  <value>#011</value>
108038                </enumeratedValue>
108039                <enumeratedValue>
108040                  <name>4</name>
108041                  <description>Divide Factor is 5</description>
108042                  <value>#100</value>
108043                </enumeratedValue>
108044                <enumeratedValue>
108045                  <name>5</name>
108046                  <description>Divide Factor is 6</description>
108047                  <value>#101</value>
108048                </enumeratedValue>
108049                <enumeratedValue>
108050                  <name>6</name>
108051                  <description>Divide Factor is 7</description>
108052                  <value>#110</value>
108053                </enumeratedValue>
108054                <enumeratedValue>
108055                  <name>7</name>
108056                  <description>Divide Factor is 8</description>
108057                  <value>#111</value>
108058                </enumeratedValue>
108059              </enumeratedValues>
108060            </field>
108061            <field>
108062              <name>PLLSTEN</name>
108063              <description>PLL Stop Enable</description>
108064              <bitOffset>5</bitOffset>
108065              <bitWidth>1</bitWidth>
108066              <access>read-write</access>
108067              <enumeratedValues>
108068                <enumeratedValue>
108069                  <name>0</name>
108070                  <description>MCGPLLCLK and MCGPLLCLK2X are disabled in any of the Stop modes.</description>
108071                  <value>#0</value>
108072                </enumeratedValue>
108073                <enumeratedValue>
108074                  <name>1</name>
108075                  <description>MCGPLLCLK and MCGPLLCLK2X are enabled if system is in Normal Stop mode.</description>
108076                  <value>#1</value>
108077                </enumeratedValue>
108078              </enumeratedValues>
108079            </field>
108080            <field>
108081              <name>PLLCLKEN</name>
108082              <description>PLL Clock Enable</description>
108083              <bitOffset>6</bitOffset>
108084              <bitWidth>1</bitWidth>
108085              <access>read-write</access>
108086              <enumeratedValues>
108087                <enumeratedValue>
108088                  <name>0</name>
108089                  <description>MCGPLLCLK is inactive.</description>
108090                  <value>#0</value>
108091                </enumeratedValue>
108092                <enumeratedValue>
108093                  <name>1</name>
108094                  <description>MCGPLLCLK is active.</description>
108095                  <value>#1</value>
108096                </enumeratedValue>
108097              </enumeratedValues>
108098            </field>
108099          </fields>
108100        </register>
108101        <register>
108102          <name>C6</name>
108103          <description>MCG Control 6 Register</description>
108104          <addressOffset>0x5</addressOffset>
108105          <size>8</size>
108106          <access>read-write</access>
108107          <resetValue>0</resetValue>
108108          <resetMask>0xFF</resetMask>
108109          <fields>
108110            <field>
108111              <name>VDIV</name>
108112              <description>VCO Divider</description>
108113              <bitOffset>0</bitOffset>
108114              <bitWidth>5</bitWidth>
108115              <access>read-write</access>
108116              <enumeratedValues>
108117                <enumeratedValue>
108118                  <name>0</name>
108119                  <description>Multiply Factor is 16</description>
108120                  <value>#00000</value>
108121                </enumeratedValue>
108122                <enumeratedValue>
108123                  <name>1</name>
108124                  <description>Multiply Factor is 17</description>
108125                  <value>#00001</value>
108126                </enumeratedValue>
108127                <enumeratedValue>
108128                  <name>2</name>
108129                  <description>Multiply Factor is 18</description>
108130                  <value>#00010</value>
108131                </enumeratedValue>
108132                <enumeratedValue>
108133                  <name>3</name>
108134                  <description>Multiply Factor is 19</description>
108135                  <value>#00011</value>
108136                </enumeratedValue>
108137                <enumeratedValue>
108138                  <name>4</name>
108139                  <description>Multiply Factor is 20</description>
108140                  <value>#00100</value>
108141                </enumeratedValue>
108142                <enumeratedValue>
108143                  <name>5</name>
108144                  <description>Multiply Factor is 21</description>
108145                  <value>#00101</value>
108146                </enumeratedValue>
108147                <enumeratedValue>
108148                  <name>6</name>
108149                  <description>Multiply Factor is 22</description>
108150                  <value>#00110</value>
108151                </enumeratedValue>
108152                <enumeratedValue>
108153                  <name>7</name>
108154                  <description>Multiply Factor is 23</description>
108155                  <value>#00111</value>
108156                </enumeratedValue>
108157                <enumeratedValue>
108158                  <name>8</name>
108159                  <description>Multiply Factor is 24</description>
108160                  <value>#01000</value>
108161                </enumeratedValue>
108162                <enumeratedValue>
108163                  <name>9</name>
108164                  <description>Multiply Factor is 25</description>
108165                  <value>#01001</value>
108166                </enumeratedValue>
108167                <enumeratedValue>
108168                  <name>10</name>
108169                  <description>Multiply Factor is 26</description>
108170                  <value>#01010</value>
108171                </enumeratedValue>
108172                <enumeratedValue>
108173                  <name>11</name>
108174                  <description>Multiply Factor is 27</description>
108175                  <value>#01011</value>
108176                </enumeratedValue>
108177                <enumeratedValue>
108178                  <name>12</name>
108179                  <description>Multiply Factor is 28</description>
108180                  <value>#01100</value>
108181                </enumeratedValue>
108182                <enumeratedValue>
108183                  <name>13</name>
108184                  <description>Multiply Factor is 29</description>
108185                  <value>#01101</value>
108186                </enumeratedValue>
108187                <enumeratedValue>
108188                  <name>14</name>
108189                  <description>Multiply Factor is 30</description>
108190                  <value>#01110</value>
108191                </enumeratedValue>
108192                <enumeratedValue>
108193                  <name>15</name>
108194                  <description>Multiply Factor is 31</description>
108195                  <value>#01111</value>
108196                </enumeratedValue>
108197                <enumeratedValue>
108198                  <name>16</name>
108199                  <description>Multiply Factor is 32</description>
108200                  <value>#10000</value>
108201                </enumeratedValue>
108202                <enumeratedValue>
108203                  <name>17</name>
108204                  <description>Multiply Factor is 33</description>
108205                  <value>#10001</value>
108206                </enumeratedValue>
108207                <enumeratedValue>
108208                  <name>18</name>
108209                  <description>Multiply Factor is 34</description>
108210                  <value>#10010</value>
108211                </enumeratedValue>
108212                <enumeratedValue>
108213                  <name>19</name>
108214                  <description>Multiply Factor is 35</description>
108215                  <value>#10011</value>
108216                </enumeratedValue>
108217                <enumeratedValue>
108218                  <name>20</name>
108219                  <description>Multiply Factor is 36</description>
108220                  <value>#10100</value>
108221                </enumeratedValue>
108222                <enumeratedValue>
108223                  <name>21</name>
108224                  <description>Multiply Factor is 37</description>
108225                  <value>#10101</value>
108226                </enumeratedValue>
108227                <enumeratedValue>
108228                  <name>22</name>
108229                  <description>Multiply Factor is 38</description>
108230                  <value>#10110</value>
108231                </enumeratedValue>
108232                <enumeratedValue>
108233                  <name>23</name>
108234                  <description>Multiply Factor is 39</description>
108235                  <value>#10111</value>
108236                </enumeratedValue>
108237                <enumeratedValue>
108238                  <name>24</name>
108239                  <description>Multiply Factor is 40</description>
108240                  <value>#11000</value>
108241                </enumeratedValue>
108242                <enumeratedValue>
108243                  <name>25</name>
108244                  <description>Multiply Factor is 41</description>
108245                  <value>#11001</value>
108246                </enumeratedValue>
108247                <enumeratedValue>
108248                  <name>26</name>
108249                  <description>Multiply Factor is 42</description>
108250                  <value>#11010</value>
108251                </enumeratedValue>
108252                <enumeratedValue>
108253                  <name>27</name>
108254                  <description>Multiply Factor is 43</description>
108255                  <value>#11011</value>
108256                </enumeratedValue>
108257                <enumeratedValue>
108258                  <name>28</name>
108259                  <description>Multiply Factor is 44</description>
108260                  <value>#11100</value>
108261                </enumeratedValue>
108262                <enumeratedValue>
108263                  <name>29</name>
108264                  <description>Multiply Factor is 45</description>
108265                  <value>#11101</value>
108266                </enumeratedValue>
108267                <enumeratedValue>
108268                  <name>30</name>
108269                  <description>Multiply Factor is 46</description>
108270                  <value>#11110</value>
108271                </enumeratedValue>
108272                <enumeratedValue>
108273                  <name>31</name>
108274                  <description>Multiply Factor is 47</description>
108275                  <value>#11111</value>
108276                </enumeratedValue>
108277              </enumeratedValues>
108278            </field>
108279            <field>
108280              <name>CME0</name>
108281              <description>Clock Monitor Enable</description>
108282              <bitOffset>5</bitOffset>
108283              <bitWidth>1</bitWidth>
108284              <access>read-write</access>
108285              <enumeratedValues>
108286                <enumeratedValue>
108287                  <name>0</name>
108288                  <description>External clock monitor is disabled for OSC0.</description>
108289                  <value>#0</value>
108290                </enumeratedValue>
108291                <enumeratedValue>
108292                  <name>1</name>
108293                  <description>External clock monitor is enabled for OSC0.</description>
108294                  <value>#1</value>
108295                </enumeratedValue>
108296              </enumeratedValues>
108297            </field>
108298            <field>
108299              <name>PLLS</name>
108300              <description>PLL Select</description>
108301              <bitOffset>6</bitOffset>
108302              <bitWidth>1</bitWidth>
108303              <access>read-write</access>
108304              <enumeratedValues>
108305                <enumeratedValue>
108306                  <name>0</name>
108307                  <description>FLL is selected.</description>
108308                  <value>#0</value>
108309                </enumeratedValue>
108310                <enumeratedValue>
108311                  <name>1</name>
108312                  <description>PLL is selected (PRDIV 0 need to be programmed to the correct divider to generate a PLL reference clock in the range of 8-16 MHz prior to setting the PLLS bit).</description>
108313                  <value>#1</value>
108314                </enumeratedValue>
108315              </enumeratedValues>
108316            </field>
108317            <field>
108318              <name>LOLIE0</name>
108319              <description>Loss of Lock Interrrupt Enable</description>
108320              <bitOffset>7</bitOffset>
108321              <bitWidth>1</bitWidth>
108322              <access>read-write</access>
108323              <enumeratedValues>
108324                <enumeratedValue>
108325                  <name>0</name>
108326                  <description>No interrupt request is generated on loss of lock.</description>
108327                  <value>#0</value>
108328                </enumeratedValue>
108329                <enumeratedValue>
108330                  <name>1</name>
108331                  <description>Generate an interrupt request on loss of lock.</description>
108332                  <value>#1</value>
108333                </enumeratedValue>
108334              </enumeratedValues>
108335            </field>
108336          </fields>
108337        </register>
108338        <register>
108339          <name>S</name>
108340          <description>MCG Status Register</description>
108341          <addressOffset>0x6</addressOffset>
108342          <size>8</size>
108343          <access>read-write</access>
108344          <resetValue>0x10</resetValue>
108345          <resetMask>0xFF</resetMask>
108346          <fields>
108347            <field>
108348              <name>IRCST</name>
108349              <description>Internal Reference Clock Status</description>
108350              <bitOffset>0</bitOffset>
108351              <bitWidth>1</bitWidth>
108352              <access>read-only</access>
108353              <enumeratedValues>
108354                <enumeratedValue>
108355                  <name>0</name>
108356                  <description>Source of internal reference clock is the slow clock (32 kHz IRC).</description>
108357                  <value>#0</value>
108358                </enumeratedValue>
108359                <enumeratedValue>
108360                  <name>1</name>
108361                  <description>Source of internal reference clock is the fast clock (4 MHz IRC).</description>
108362                  <value>#1</value>
108363                </enumeratedValue>
108364              </enumeratedValues>
108365            </field>
108366            <field>
108367              <name>OSCINIT0</name>
108368              <description>OSC Initialization</description>
108369              <bitOffset>1</bitOffset>
108370              <bitWidth>1</bitWidth>
108371              <access>read-only</access>
108372            </field>
108373            <field>
108374              <name>CLKST</name>
108375              <description>Clock Mode Status</description>
108376              <bitOffset>2</bitOffset>
108377              <bitWidth>2</bitWidth>
108378              <access>read-only</access>
108379              <enumeratedValues>
108380                <enumeratedValue>
108381                  <name>00</name>
108382                  <description>Encoding 0 - Output of the FLL is selected (reset default).</description>
108383                  <value>#00</value>
108384                </enumeratedValue>
108385                <enumeratedValue>
108386                  <name>01</name>
108387                  <description>Encoding 1 - Internal reference clock is selected.</description>
108388                  <value>#01</value>
108389                </enumeratedValue>
108390                <enumeratedValue>
108391                  <name>10</name>
108392                  <description>Encoding 2 - External reference clock is selected.</description>
108393                  <value>#10</value>
108394                </enumeratedValue>
108395                <enumeratedValue>
108396                  <name>11</name>
108397                  <description>Encoding 3 - Output of the PLL is selected.</description>
108398                  <value>#11</value>
108399                </enumeratedValue>
108400              </enumeratedValues>
108401            </field>
108402            <field>
108403              <name>IREFST</name>
108404              <description>Internal Reference Status</description>
108405              <bitOffset>4</bitOffset>
108406              <bitWidth>1</bitWidth>
108407              <access>read-only</access>
108408              <enumeratedValues>
108409                <enumeratedValue>
108410                  <name>0</name>
108411                  <description>Source of FLL reference clock is the external reference clock.</description>
108412                  <value>#0</value>
108413                </enumeratedValue>
108414                <enumeratedValue>
108415                  <name>1</name>
108416                  <description>Source of FLL reference clock is the internal reference clock.</description>
108417                  <value>#1</value>
108418                </enumeratedValue>
108419              </enumeratedValues>
108420            </field>
108421            <field>
108422              <name>PLLST</name>
108423              <description>PLL Select Status</description>
108424              <bitOffset>5</bitOffset>
108425              <bitWidth>1</bitWidth>
108426              <access>read-only</access>
108427              <enumeratedValues>
108428                <enumeratedValue>
108429                  <name>0</name>
108430                  <description>Source of PLLS clock is FLL clock.</description>
108431                  <value>#0</value>
108432                </enumeratedValue>
108433                <enumeratedValue>
108434                  <name>1</name>
108435                  <description>Source of PLLS clock is PLL output clock.</description>
108436                  <value>#1</value>
108437                </enumeratedValue>
108438              </enumeratedValues>
108439            </field>
108440            <field>
108441              <name>LOCK0</name>
108442              <description>Lock Status</description>
108443              <bitOffset>6</bitOffset>
108444              <bitWidth>1</bitWidth>
108445              <access>read-only</access>
108446              <enumeratedValues>
108447                <enumeratedValue>
108448                  <name>0</name>
108449                  <description>PLL is currently unlocked.</description>
108450                  <value>#0</value>
108451                </enumeratedValue>
108452                <enumeratedValue>
108453                  <name>1</name>
108454                  <description>PLL is currently locked.</description>
108455                  <value>#1</value>
108456                </enumeratedValue>
108457              </enumeratedValues>
108458            </field>
108459            <field>
108460              <name>LOLS0</name>
108461              <description>Loss of Lock Status</description>
108462              <bitOffset>7</bitOffset>
108463              <bitWidth>1</bitWidth>
108464              <access>read-write</access>
108465              <enumeratedValues>
108466                <enumeratedValue>
108467                  <name>0</name>
108468                  <description>PLL has not lost lock since LOLS 0 was last cleared.</description>
108469                  <value>#0</value>
108470                </enumeratedValue>
108471                <enumeratedValue>
108472                  <name>1</name>
108473                  <description>PLL has lost lock since LOLS 0 was last cleared.</description>
108474                  <value>#1</value>
108475                </enumeratedValue>
108476              </enumeratedValues>
108477            </field>
108478          </fields>
108479        </register>
108480        <register>
108481          <name>SC</name>
108482          <description>MCG Status and Control Register</description>
108483          <addressOffset>0x8</addressOffset>
108484          <size>8</size>
108485          <access>read-write</access>
108486          <resetValue>0x2</resetValue>
108487          <resetMask>0xFF</resetMask>
108488          <fields>
108489            <field>
108490              <name>LOCS0</name>
108491              <description>OSC0 Loss of Clock Status</description>
108492              <bitOffset>0</bitOffset>
108493              <bitWidth>1</bitWidth>
108494              <access>read-write</access>
108495              <enumeratedValues>
108496                <enumeratedValue>
108497                  <name>0</name>
108498                  <description>Loss of OSC0 has not occurred.</description>
108499                  <value>#0</value>
108500                </enumeratedValue>
108501                <enumeratedValue>
108502                  <name>1</name>
108503                  <description>Loss of OSC0 has occurred.</description>
108504                  <value>#1</value>
108505                </enumeratedValue>
108506              </enumeratedValues>
108507            </field>
108508            <field>
108509              <name>FCRDIV</name>
108510              <description>Fast Clock Internal Reference Divider</description>
108511              <bitOffset>1</bitOffset>
108512              <bitWidth>3</bitWidth>
108513              <access>read-write</access>
108514              <enumeratedValues>
108515                <enumeratedValue>
108516                  <name>000</name>
108517                  <description>Divide Factor is 1</description>
108518                  <value>#000</value>
108519                </enumeratedValue>
108520                <enumeratedValue>
108521                  <name>001</name>
108522                  <description>Divide Factor is 2.</description>
108523                  <value>#001</value>
108524                </enumeratedValue>
108525                <enumeratedValue>
108526                  <name>010</name>
108527                  <description>Divide Factor is 4.</description>
108528                  <value>#010</value>
108529                </enumeratedValue>
108530                <enumeratedValue>
108531                  <name>011</name>
108532                  <description>Divide Factor is 8.</description>
108533                  <value>#011</value>
108534                </enumeratedValue>
108535                <enumeratedValue>
108536                  <name>100</name>
108537                  <description>Divide Factor is 16</description>
108538                  <value>#100</value>
108539                </enumeratedValue>
108540                <enumeratedValue>
108541                  <name>101</name>
108542                  <description>Divide Factor is 32</description>
108543                  <value>#101</value>
108544                </enumeratedValue>
108545                <enumeratedValue>
108546                  <name>110</name>
108547                  <description>Divide Factor is 64</description>
108548                  <value>#110</value>
108549                </enumeratedValue>
108550                <enumeratedValue>
108551                  <name>111</name>
108552                  <description>Divide Factor is 128.</description>
108553                  <value>#111</value>
108554                </enumeratedValue>
108555              </enumeratedValues>
108556            </field>
108557            <field>
108558              <name>FLTPRSRV</name>
108559              <description>FLL Filter Preserve Enable</description>
108560              <bitOffset>4</bitOffset>
108561              <bitWidth>1</bitWidth>
108562              <access>read-write</access>
108563              <enumeratedValues>
108564                <enumeratedValue>
108565                  <name>0</name>
108566                  <description>FLL filter and FLL frequency will reset on changes to currect clock mode.</description>
108567                  <value>#0</value>
108568                </enumeratedValue>
108569                <enumeratedValue>
108570                  <name>1</name>
108571                  <description>Fll filter and FLL frequency retain their previous values during new clock mode change.</description>
108572                  <value>#1</value>
108573                </enumeratedValue>
108574              </enumeratedValues>
108575            </field>
108576            <field>
108577              <name>ATMF</name>
108578              <description>Automatic Trim Machine Fail Flag</description>
108579              <bitOffset>5</bitOffset>
108580              <bitWidth>1</bitWidth>
108581              <access>read-write</access>
108582              <enumeratedValues>
108583                <enumeratedValue>
108584                  <name>0</name>
108585                  <description>Automatic Trim Machine completed normally.</description>
108586                  <value>#0</value>
108587                </enumeratedValue>
108588                <enumeratedValue>
108589                  <name>1</name>
108590                  <description>Automatic Trim Machine failed.</description>
108591                  <value>#1</value>
108592                </enumeratedValue>
108593              </enumeratedValues>
108594            </field>
108595            <field>
108596              <name>ATMS</name>
108597              <description>Automatic Trim Machine Select</description>
108598              <bitOffset>6</bitOffset>
108599              <bitWidth>1</bitWidth>
108600              <access>read-write</access>
108601              <enumeratedValues>
108602                <enumeratedValue>
108603                  <name>0</name>
108604                  <description>32 kHz Internal Reference Clock selected.</description>
108605                  <value>#0</value>
108606                </enumeratedValue>
108607                <enumeratedValue>
108608                  <name>1</name>
108609                  <description>4 MHz Internal Reference Clock selected.</description>
108610                  <value>#1</value>
108611                </enumeratedValue>
108612              </enumeratedValues>
108613            </field>
108614            <field>
108615              <name>ATME</name>
108616              <description>Automatic Trim Machine Enable</description>
108617              <bitOffset>7</bitOffset>
108618              <bitWidth>1</bitWidth>
108619              <access>read-write</access>
108620              <enumeratedValues>
108621                <enumeratedValue>
108622                  <name>0</name>
108623                  <description>Auto Trim Machine disabled.</description>
108624                  <value>#0</value>
108625                </enumeratedValue>
108626                <enumeratedValue>
108627                  <name>1</name>
108628                  <description>Auto Trim Machine enabled.</description>
108629                  <value>#1</value>
108630                </enumeratedValue>
108631              </enumeratedValues>
108632            </field>
108633          </fields>
108634        </register>
108635        <register>
108636          <name>ATCVH</name>
108637          <description>MCG Auto Trim Compare Value High Register</description>
108638          <addressOffset>0xA</addressOffset>
108639          <size>8</size>
108640          <access>read-write</access>
108641          <resetValue>0</resetValue>
108642          <resetMask>0xFF</resetMask>
108643          <fields>
108644            <field>
108645              <name>ATCVH</name>
108646              <description>ATM Compare Value High</description>
108647              <bitOffset>0</bitOffset>
108648              <bitWidth>8</bitWidth>
108649              <access>read-write</access>
108650            </field>
108651          </fields>
108652        </register>
108653        <register>
108654          <name>ATCVL</name>
108655          <description>MCG Auto Trim Compare Value Low Register</description>
108656          <addressOffset>0xB</addressOffset>
108657          <size>8</size>
108658          <access>read-write</access>
108659          <resetValue>0</resetValue>
108660          <resetMask>0xFF</resetMask>
108661          <fields>
108662            <field>
108663              <name>ATCVL</name>
108664              <description>ATM Compare Value Low</description>
108665              <bitOffset>0</bitOffset>
108666              <bitWidth>8</bitWidth>
108667              <access>read-write</access>
108668            </field>
108669          </fields>
108670        </register>
108671        <register>
108672          <name>C7</name>
108673          <description>MCG Control 7 Register</description>
108674          <addressOffset>0xC</addressOffset>
108675          <size>8</size>
108676          <access>read-write</access>
108677          <resetValue>0</resetValue>
108678          <resetMask>0xFF</resetMask>
108679          <fields>
108680            <field>
108681              <name>OSCSEL</name>
108682              <description>MCG OSC Clock Select</description>
108683              <bitOffset>0</bitOffset>
108684              <bitWidth>2</bitWidth>
108685              <access>read-write</access>
108686              <enumeratedValues>
108687                <enumeratedValue>
108688                  <name>00</name>
108689                  <description>Selects Oscillator (OSCCLK0).</description>
108690                  <value>#00</value>
108691                </enumeratedValue>
108692                <enumeratedValue>
108693                  <name>01</name>
108694                  <description>Selects 32 kHz RTC Oscillator.</description>
108695                  <value>#01</value>
108696                </enumeratedValue>
108697                <enumeratedValue>
108698                  <name>10</name>
108699                  <description>Selects Oscillator (OSCCLK1).</description>
108700                  <value>#10</value>
108701                </enumeratedValue>
108702              </enumeratedValues>
108703            </field>
108704          </fields>
108705        </register>
108706        <register>
108707          <name>C8</name>
108708          <description>MCG Control 8 Register</description>
108709          <addressOffset>0xD</addressOffset>
108710          <size>8</size>
108711          <access>read-write</access>
108712          <resetValue>0x80</resetValue>
108713          <resetMask>0xFF</resetMask>
108714          <fields>
108715            <field>
108716              <name>LOCS1</name>
108717              <description>RTC Loss of Clock Status</description>
108718              <bitOffset>0</bitOffset>
108719              <bitWidth>1</bitWidth>
108720              <access>read-write</access>
108721              <enumeratedValues>
108722                <enumeratedValue>
108723                  <name>0</name>
108724                  <description>Loss of RTC has not occur.</description>
108725                  <value>#0</value>
108726                </enumeratedValue>
108727                <enumeratedValue>
108728                  <name>1</name>
108729                  <description>Loss of RTC has occur</description>
108730                  <value>#1</value>
108731                </enumeratedValue>
108732              </enumeratedValues>
108733            </field>
108734            <field>
108735              <name>CME1</name>
108736              <description>Clock Monitor Enable1</description>
108737              <bitOffset>5</bitOffset>
108738              <bitWidth>1</bitWidth>
108739              <access>read-write</access>
108740              <enumeratedValues>
108741                <enumeratedValue>
108742                  <name>0</name>
108743                  <description>External clock monitor is disabled for RTC clock.</description>
108744                  <value>#0</value>
108745                </enumeratedValue>
108746                <enumeratedValue>
108747                  <name>1</name>
108748                  <description>External clock monitor is enabled for RTC clock.</description>
108749                  <value>#1</value>
108750                </enumeratedValue>
108751              </enumeratedValues>
108752            </field>
108753            <field>
108754              <name>LOLRE</name>
108755              <description>PLL Loss of Lock Reset Enable</description>
108756              <bitOffset>6</bitOffset>
108757              <bitWidth>1</bitWidth>
108758              <access>read-write</access>
108759              <enumeratedValues>
108760                <enumeratedValue>
108761                  <name>0</name>
108762                  <description>Interrupt request is generated on a PLL loss of lock indication. The PLL loss of lock interrupt enable bit must also be set to generate the interrupt request.</description>
108763                  <value>#0</value>
108764                </enumeratedValue>
108765                <enumeratedValue>
108766                  <name>1</name>
108767                  <description>Generate a reset request on a PLL loss of lock indication.</description>
108768                  <value>#1</value>
108769                </enumeratedValue>
108770              </enumeratedValues>
108771            </field>
108772            <field>
108773              <name>LOCRE1</name>
108774              <description>Loss of Clock Reset Enable</description>
108775              <bitOffset>7</bitOffset>
108776              <bitWidth>1</bitWidth>
108777              <access>read-write</access>
108778              <enumeratedValues>
108779                <enumeratedValue>
108780                  <name>0</name>
108781                  <description>Interrupt request is generated on a loss of RTC external reference clock.</description>
108782                  <value>#0</value>
108783                </enumeratedValue>
108784                <enumeratedValue>
108785                  <name>1</name>
108786                  <description>Generate a reset request on a loss of RTC external reference clock</description>
108787                  <value>#1</value>
108788                </enumeratedValue>
108789              </enumeratedValues>
108790            </field>
108791          </fields>
108792        </register>
108793      </registers>
108794    </peripheral>
108795    <peripheral>
108796      <name>OSC</name>
108797      <description>Oscillator</description>
108798      <prependToName>OSC_</prependToName>
108799      <baseAddress>0x40065000</baseAddress>
108800      <addressBlock>
108801        <offset>0</offset>
108802        <size>0x3</size>
108803        <usage>registers</usage>
108804      </addressBlock>
108805      <registers>
108806        <register>
108807          <name>CR</name>
108808          <description>OSC Control Register</description>
108809          <addressOffset>0</addressOffset>
108810          <size>8</size>
108811          <access>read-write</access>
108812          <resetValue>0</resetValue>
108813          <resetMask>0xFF</resetMask>
108814          <fields>
108815            <field>
108816              <name>SC16P</name>
108817              <description>Oscillator 16 pF Capacitor Load Configure</description>
108818              <bitOffset>0</bitOffset>
108819              <bitWidth>1</bitWidth>
108820              <access>read-write</access>
108821              <enumeratedValues>
108822                <enumeratedValue>
108823                  <name>0</name>
108824                  <description>Disable the selection.</description>
108825                  <value>#0</value>
108826                </enumeratedValue>
108827                <enumeratedValue>
108828                  <name>1</name>
108829                  <description>Add 16 pF capacitor to the oscillator load.</description>
108830                  <value>#1</value>
108831                </enumeratedValue>
108832              </enumeratedValues>
108833            </field>
108834            <field>
108835              <name>SC8P</name>
108836              <description>Oscillator 8 pF Capacitor Load Configure</description>
108837              <bitOffset>1</bitOffset>
108838              <bitWidth>1</bitWidth>
108839              <access>read-write</access>
108840              <enumeratedValues>
108841                <enumeratedValue>
108842                  <name>0</name>
108843                  <description>Disable the selection.</description>
108844                  <value>#0</value>
108845                </enumeratedValue>
108846                <enumeratedValue>
108847                  <name>1</name>
108848                  <description>Add 8 pF capacitor to the oscillator load.</description>
108849                  <value>#1</value>
108850                </enumeratedValue>
108851              </enumeratedValues>
108852            </field>
108853            <field>
108854              <name>SC4P</name>
108855              <description>Oscillator 4 pF Capacitor Load Configure</description>
108856              <bitOffset>2</bitOffset>
108857              <bitWidth>1</bitWidth>
108858              <access>read-write</access>
108859              <enumeratedValues>
108860                <enumeratedValue>
108861                  <name>0</name>
108862                  <description>Disable the selection.</description>
108863                  <value>#0</value>
108864                </enumeratedValue>
108865                <enumeratedValue>
108866                  <name>1</name>
108867                  <description>Add 4 pF capacitor to the oscillator load.</description>
108868                  <value>#1</value>
108869                </enumeratedValue>
108870              </enumeratedValues>
108871            </field>
108872            <field>
108873              <name>SC2P</name>
108874              <description>Oscillator 2 pF Capacitor Load Configure</description>
108875              <bitOffset>3</bitOffset>
108876              <bitWidth>1</bitWidth>
108877              <access>read-write</access>
108878              <enumeratedValues>
108879                <enumeratedValue>
108880                  <name>0</name>
108881                  <description>Disable the selection.</description>
108882                  <value>#0</value>
108883                </enumeratedValue>
108884                <enumeratedValue>
108885                  <name>1</name>
108886                  <description>Add 2 pF capacitor to the oscillator load.</description>
108887                  <value>#1</value>
108888                </enumeratedValue>
108889              </enumeratedValues>
108890            </field>
108891            <field>
108892              <name>EREFSTEN</name>
108893              <description>External Reference Stop Enable</description>
108894              <bitOffset>5</bitOffset>
108895              <bitWidth>1</bitWidth>
108896              <access>read-write</access>
108897              <enumeratedValues>
108898                <enumeratedValue>
108899                  <name>0</name>
108900                  <description>External reference clock is disabled in Stop mode.</description>
108901                  <value>#0</value>
108902                </enumeratedValue>
108903                <enumeratedValue>
108904                  <name>1</name>
108905                  <description>External reference clock stays enabled in Stop mode if ERCLKEN is set before entering Stop mode.</description>
108906                  <value>#1</value>
108907                </enumeratedValue>
108908              </enumeratedValues>
108909            </field>
108910            <field>
108911              <name>ERCLKEN</name>
108912              <description>External Reference Enable</description>
108913              <bitOffset>7</bitOffset>
108914              <bitWidth>1</bitWidth>
108915              <access>read-write</access>
108916              <enumeratedValues>
108917                <enumeratedValue>
108918                  <name>0</name>
108919                  <description>External reference clock is inactive.</description>
108920                  <value>#0</value>
108921                </enumeratedValue>
108922                <enumeratedValue>
108923                  <name>1</name>
108924                  <description>External reference clock is enabled.</description>
108925                  <value>#1</value>
108926                </enumeratedValue>
108927              </enumeratedValues>
108928            </field>
108929          </fields>
108930        </register>
108931        <register>
108932          <name>DIV</name>
108933          <description>OSC_DIV</description>
108934          <addressOffset>0x2</addressOffset>
108935          <size>8</size>
108936          <access>read-write</access>
108937          <resetValue>0</resetValue>
108938          <resetMask>0xFF</resetMask>
108939          <fields>
108940            <field>
108941              <name>ERPS</name>
108942              <description>ERCLK prescaler</description>
108943              <bitOffset>6</bitOffset>
108944              <bitWidth>2</bitWidth>
108945              <access>read-write</access>
108946              <enumeratedValues>
108947                <enumeratedValue>
108948                  <name>00</name>
108949                  <description>The divisor ratio is 1.</description>
108950                  <value>#00</value>
108951                </enumeratedValue>
108952                <enumeratedValue>
108953                  <name>01</name>
108954                  <description>The divisor ratio is 2.</description>
108955                  <value>#01</value>
108956                </enumeratedValue>
108957                <enumeratedValue>
108958                  <name>10</name>
108959                  <description>The divisor ratio is 4.</description>
108960                  <value>#10</value>
108961                </enumeratedValue>
108962                <enumeratedValue>
108963                  <name>11</name>
108964                  <description>The divisor ratio is 8.</description>
108965                  <value>#11</value>
108966                </enumeratedValue>
108967              </enumeratedValues>
108968            </field>
108969          </fields>
108970        </register>
108971      </registers>
108972    </peripheral>
108973    <peripheral>
108974      <name>I2C0</name>
108975      <description>Inter-Integrated Circuit</description>
108976      <groupName>I2C</groupName>
108977      <prependToName>I2C0_</prependToName>
108978      <baseAddress>0x40066000</baseAddress>
108979      <addressBlock>
108980        <offset>0</offset>
108981        <size>0xD</size>
108982        <usage>registers</usage>
108983      </addressBlock>
108984      <interrupt>
108985        <name>I2C0</name>
108986        <value>24</value>
108987      </interrupt>
108988      <registers>
108989        <register>
108990          <name>A1</name>
108991          <description>I2C Address Register 1</description>
108992          <addressOffset>0</addressOffset>
108993          <size>8</size>
108994          <access>read-write</access>
108995          <resetValue>0</resetValue>
108996          <resetMask>0xFF</resetMask>
108997          <fields>
108998            <field>
108999              <name>AD</name>
109000              <description>Address</description>
109001              <bitOffset>1</bitOffset>
109002              <bitWidth>7</bitWidth>
109003              <access>read-write</access>
109004            </field>
109005          </fields>
109006        </register>
109007        <register>
109008          <name>F</name>
109009          <description>I2C Frequency Divider register</description>
109010          <addressOffset>0x1</addressOffset>
109011          <size>8</size>
109012          <access>read-write</access>
109013          <resetValue>0</resetValue>
109014          <resetMask>0xFF</resetMask>
109015          <fields>
109016            <field>
109017              <name>ICR</name>
109018              <description>ClockRate</description>
109019              <bitOffset>0</bitOffset>
109020              <bitWidth>6</bitWidth>
109021              <access>read-write</access>
109022            </field>
109023            <field>
109024              <name>MULT</name>
109025              <description>Multiplier Factor</description>
109026              <bitOffset>6</bitOffset>
109027              <bitWidth>2</bitWidth>
109028              <access>read-write</access>
109029              <enumeratedValues>
109030                <enumeratedValue>
109031                  <name>00</name>
109032                  <description>mul = 1</description>
109033                  <value>#00</value>
109034                </enumeratedValue>
109035                <enumeratedValue>
109036                  <name>01</name>
109037                  <description>mul = 2</description>
109038                  <value>#01</value>
109039                </enumeratedValue>
109040                <enumeratedValue>
109041                  <name>10</name>
109042                  <description>mul = 4</description>
109043                  <value>#10</value>
109044                </enumeratedValue>
109045              </enumeratedValues>
109046            </field>
109047          </fields>
109048        </register>
109049        <register>
109050          <name>C1</name>
109051          <description>I2C Control Register 1</description>
109052          <addressOffset>0x2</addressOffset>
109053          <size>8</size>
109054          <access>read-write</access>
109055          <resetValue>0</resetValue>
109056          <resetMask>0xFF</resetMask>
109057          <fields>
109058            <field>
109059              <name>DMAEN</name>
109060              <description>DMA Enable</description>
109061              <bitOffset>0</bitOffset>
109062              <bitWidth>1</bitWidth>
109063              <access>read-write</access>
109064              <enumeratedValues>
109065                <enumeratedValue>
109066                  <name>0</name>
109067                  <description>All DMA signalling disabled.</description>
109068                  <value>#0</value>
109069                </enumeratedValue>
109070                <enumeratedValue>
109071                  <name>1</name>
109072                  <description>DMA transfer is enabled. While SMB[FACK] = 0, the following conditions trigger the DMA request: a data byte is received, and either address or data is transmitted. (ACK/NACK is automatic) the first byte received matches the A1 register or is a general call address. If any address matching occurs, S[IAAS] and S[TCF] are set. If the direction of transfer is known from master to slave, then it is not required to check S[SRW]. With this assumption, DMA can also be used in this case. In other cases, if the master reads data from the slave, then it is required to rewrite the C1 register operation. With this assumption, DMA cannot be used. When FACK = 1, an address or a data byte is transmitted.</description>
109073                  <value>#1</value>
109074                </enumeratedValue>
109075              </enumeratedValues>
109076            </field>
109077            <field>
109078              <name>WUEN</name>
109079              <description>Wakeup Enable</description>
109080              <bitOffset>1</bitOffset>
109081              <bitWidth>1</bitWidth>
109082              <access>read-write</access>
109083              <enumeratedValues>
109084                <enumeratedValue>
109085                  <name>0</name>
109086                  <description>Normal operation. No interrupt generated when address matching in low power mode.</description>
109087                  <value>#0</value>
109088                </enumeratedValue>
109089                <enumeratedValue>
109090                  <name>1</name>
109091                  <description>Enables the wakeup function in low power mode.</description>
109092                  <value>#1</value>
109093                </enumeratedValue>
109094              </enumeratedValues>
109095            </field>
109096            <field>
109097              <name>RSTA</name>
109098              <description>Repeat START</description>
109099              <bitOffset>2</bitOffset>
109100              <bitWidth>1</bitWidth>
109101              <access>write-only</access>
109102            </field>
109103            <field>
109104              <name>TXAK</name>
109105              <description>Transmit Acknowledge Enable</description>
109106              <bitOffset>3</bitOffset>
109107              <bitWidth>1</bitWidth>
109108              <access>read-write</access>
109109              <enumeratedValues>
109110                <enumeratedValue>
109111                  <name>0</name>
109112                  <description>An acknowledge signal is sent to the bus on the following receiving byte (if FACK is cleared) or the current receiving byte (if FACK is set).</description>
109113                  <value>#0</value>
109114                </enumeratedValue>
109115                <enumeratedValue>
109116                  <name>1</name>
109117                  <description>No acknowledge signal is sent to the bus on the following receiving data byte (if FACK is cleared) or the current receiving data byte (if FACK is set).</description>
109118                  <value>#1</value>
109119                </enumeratedValue>
109120              </enumeratedValues>
109121            </field>
109122            <field>
109123              <name>TX</name>
109124              <description>Transmit Mode Select</description>
109125              <bitOffset>4</bitOffset>
109126              <bitWidth>1</bitWidth>
109127              <access>read-write</access>
109128              <enumeratedValues>
109129                <enumeratedValue>
109130                  <name>0</name>
109131                  <description>Receive</description>
109132                  <value>#0</value>
109133                </enumeratedValue>
109134                <enumeratedValue>
109135                  <name>1</name>
109136                  <description>Transmit</description>
109137                  <value>#1</value>
109138                </enumeratedValue>
109139              </enumeratedValues>
109140            </field>
109141            <field>
109142              <name>MST</name>
109143              <description>Master Mode Select</description>
109144              <bitOffset>5</bitOffset>
109145              <bitWidth>1</bitWidth>
109146              <access>read-write</access>
109147              <enumeratedValues>
109148                <enumeratedValue>
109149                  <name>0</name>
109150                  <description>Slave mode</description>
109151                  <value>#0</value>
109152                </enumeratedValue>
109153                <enumeratedValue>
109154                  <name>1</name>
109155                  <description>Master mode</description>
109156                  <value>#1</value>
109157                </enumeratedValue>
109158              </enumeratedValues>
109159            </field>
109160            <field>
109161              <name>IICIE</name>
109162              <description>I2C Interrupt Enable</description>
109163              <bitOffset>6</bitOffset>
109164              <bitWidth>1</bitWidth>
109165              <access>read-write</access>
109166              <enumeratedValues>
109167                <enumeratedValue>
109168                  <name>0</name>
109169                  <description>Disabled</description>
109170                  <value>#0</value>
109171                </enumeratedValue>
109172                <enumeratedValue>
109173                  <name>1</name>
109174                  <description>Enabled</description>
109175                  <value>#1</value>
109176                </enumeratedValue>
109177              </enumeratedValues>
109178            </field>
109179            <field>
109180              <name>IICEN</name>
109181              <description>I2C Enable</description>
109182              <bitOffset>7</bitOffset>
109183              <bitWidth>1</bitWidth>
109184              <access>read-write</access>
109185              <enumeratedValues>
109186                <enumeratedValue>
109187                  <name>0</name>
109188                  <description>Disabled</description>
109189                  <value>#0</value>
109190                </enumeratedValue>
109191                <enumeratedValue>
109192                  <name>1</name>
109193                  <description>Enabled</description>
109194                  <value>#1</value>
109195                </enumeratedValue>
109196              </enumeratedValues>
109197            </field>
109198          </fields>
109199        </register>
109200        <register>
109201          <name>S</name>
109202          <description>I2C Status register</description>
109203          <addressOffset>0x3</addressOffset>
109204          <size>8</size>
109205          <access>read-write</access>
109206          <resetValue>0x80</resetValue>
109207          <resetMask>0xFF</resetMask>
109208          <fields>
109209            <field>
109210              <name>RXAK</name>
109211              <description>Receive Acknowledge</description>
109212              <bitOffset>0</bitOffset>
109213              <bitWidth>1</bitWidth>
109214              <access>read-only</access>
109215              <enumeratedValues>
109216                <enumeratedValue>
109217                  <name>0</name>
109218                  <description>Acknowledge signal was received after the completion of one byte of data transmission on the bus</description>
109219                  <value>#0</value>
109220                </enumeratedValue>
109221                <enumeratedValue>
109222                  <name>1</name>
109223                  <description>No acknowledge signal detected</description>
109224                  <value>#1</value>
109225                </enumeratedValue>
109226              </enumeratedValues>
109227            </field>
109228            <field>
109229              <name>IICIF</name>
109230              <description>Interrupt Flag</description>
109231              <bitOffset>1</bitOffset>
109232              <bitWidth>1</bitWidth>
109233              <access>read-write</access>
109234              <enumeratedValues>
109235                <enumeratedValue>
109236                  <name>0</name>
109237                  <description>No interrupt pending</description>
109238                  <value>#0</value>
109239                </enumeratedValue>
109240                <enumeratedValue>
109241                  <name>1</name>
109242                  <description>Interrupt pending</description>
109243                  <value>#1</value>
109244                </enumeratedValue>
109245              </enumeratedValues>
109246            </field>
109247            <field>
109248              <name>SRW</name>
109249              <description>Slave Read/Write</description>
109250              <bitOffset>2</bitOffset>
109251              <bitWidth>1</bitWidth>
109252              <access>read-only</access>
109253              <enumeratedValues>
109254                <enumeratedValue>
109255                  <name>0</name>
109256                  <description>Slave receive, master writing to slave</description>
109257                  <value>#0</value>
109258                </enumeratedValue>
109259                <enumeratedValue>
109260                  <name>1</name>
109261                  <description>Slave transmit, master reading from slave</description>
109262                  <value>#1</value>
109263                </enumeratedValue>
109264              </enumeratedValues>
109265            </field>
109266            <field>
109267              <name>RAM</name>
109268              <description>Range Address Match</description>
109269              <bitOffset>3</bitOffset>
109270              <bitWidth>1</bitWidth>
109271              <access>read-write</access>
109272              <enumeratedValues>
109273                <enumeratedValue>
109274                  <name>0</name>
109275                  <description>Not addressed</description>
109276                  <value>#0</value>
109277                </enumeratedValue>
109278                <enumeratedValue>
109279                  <name>1</name>
109280                  <description>Addressed as a slave</description>
109281                  <value>#1</value>
109282                </enumeratedValue>
109283              </enumeratedValues>
109284            </field>
109285            <field>
109286              <name>ARBL</name>
109287              <description>Arbitration Lost</description>
109288              <bitOffset>4</bitOffset>
109289              <bitWidth>1</bitWidth>
109290              <access>read-write</access>
109291              <enumeratedValues>
109292                <enumeratedValue>
109293                  <name>0</name>
109294                  <description>Standard bus operation.</description>
109295                  <value>#0</value>
109296                </enumeratedValue>
109297                <enumeratedValue>
109298                  <name>1</name>
109299                  <description>Loss of arbitration.</description>
109300                  <value>#1</value>
109301                </enumeratedValue>
109302              </enumeratedValues>
109303            </field>
109304            <field>
109305              <name>BUSY</name>
109306              <description>Bus Busy</description>
109307              <bitOffset>5</bitOffset>
109308              <bitWidth>1</bitWidth>
109309              <access>read-only</access>
109310              <enumeratedValues>
109311                <enumeratedValue>
109312                  <name>0</name>
109313                  <description>Bus is idle</description>
109314                  <value>#0</value>
109315                </enumeratedValue>
109316                <enumeratedValue>
109317                  <name>1</name>
109318                  <description>Bus is busy</description>
109319                  <value>#1</value>
109320                </enumeratedValue>
109321              </enumeratedValues>
109322            </field>
109323            <field>
109324              <name>IAAS</name>
109325              <description>Addressed As A Slave</description>
109326              <bitOffset>6</bitOffset>
109327              <bitWidth>1</bitWidth>
109328              <access>read-write</access>
109329              <enumeratedValues>
109330                <enumeratedValue>
109331                  <name>0</name>
109332                  <description>Not addressed</description>
109333                  <value>#0</value>
109334                </enumeratedValue>
109335                <enumeratedValue>
109336                  <name>1</name>
109337                  <description>Addressed as a slave</description>
109338                  <value>#1</value>
109339                </enumeratedValue>
109340              </enumeratedValues>
109341            </field>
109342            <field>
109343              <name>TCF</name>
109344              <description>Transfer Complete Flag</description>
109345              <bitOffset>7</bitOffset>
109346              <bitWidth>1</bitWidth>
109347              <access>read-only</access>
109348              <enumeratedValues>
109349                <enumeratedValue>
109350                  <name>0</name>
109351                  <description>Transfer in progress</description>
109352                  <value>#0</value>
109353                </enumeratedValue>
109354                <enumeratedValue>
109355                  <name>1</name>
109356                  <description>Transfer complete</description>
109357                  <value>#1</value>
109358                </enumeratedValue>
109359              </enumeratedValues>
109360            </field>
109361          </fields>
109362        </register>
109363        <register>
109364          <name>D</name>
109365          <description>I2C Data I/O register</description>
109366          <addressOffset>0x4</addressOffset>
109367          <size>8</size>
109368          <access>read-write</access>
109369          <resetValue>0</resetValue>
109370          <resetMask>0xFF</resetMask>
109371          <fields>
109372            <field>
109373              <name>DATA</name>
109374              <description>Data</description>
109375              <bitOffset>0</bitOffset>
109376              <bitWidth>8</bitWidth>
109377              <access>read-write</access>
109378            </field>
109379          </fields>
109380        </register>
109381        <register>
109382          <name>C2</name>
109383          <description>I2C Control Register 2</description>
109384          <addressOffset>0x5</addressOffset>
109385          <size>8</size>
109386          <access>read-write</access>
109387          <resetValue>0</resetValue>
109388          <resetMask>0xFF</resetMask>
109389          <fields>
109390            <field>
109391              <name>AD</name>
109392              <description>Slave Address</description>
109393              <bitOffset>0</bitOffset>
109394              <bitWidth>3</bitWidth>
109395              <access>read-write</access>
109396            </field>
109397            <field>
109398              <name>RMEN</name>
109399              <description>Range Address Matching Enable</description>
109400              <bitOffset>3</bitOffset>
109401              <bitWidth>1</bitWidth>
109402              <access>read-write</access>
109403              <enumeratedValues>
109404                <enumeratedValue>
109405                  <name>0</name>
109406                  <description>Range mode disabled. No address matching occurs for an address within the range of values of the A1 and RA registers.</description>
109407                  <value>#0</value>
109408                </enumeratedValue>
109409                <enumeratedValue>
109410                  <name>1</name>
109411                  <description>Range mode enabled. Address matching occurs when a slave receives an address within the range of values of the A1 and RA registers.</description>
109412                  <value>#1</value>
109413                </enumeratedValue>
109414              </enumeratedValues>
109415            </field>
109416            <field>
109417              <name>SBRC</name>
109418              <description>Slave Baud Rate Control</description>
109419              <bitOffset>4</bitOffset>
109420              <bitWidth>1</bitWidth>
109421              <access>read-write</access>
109422              <enumeratedValues>
109423                <enumeratedValue>
109424                  <name>0</name>
109425                  <description>The slave baud rate follows the master baud rate and clock stretching may occur</description>
109426                  <value>#0</value>
109427                </enumeratedValue>
109428                <enumeratedValue>
109429                  <name>1</name>
109430                  <description>Slave baud rate is independent of the master baud rate</description>
109431                  <value>#1</value>
109432                </enumeratedValue>
109433              </enumeratedValues>
109434            </field>
109435            <field>
109436              <name>HDRS</name>
109437              <description>High Drive Select</description>
109438              <bitOffset>5</bitOffset>
109439              <bitWidth>1</bitWidth>
109440              <access>read-write</access>
109441              <enumeratedValues>
109442                <enumeratedValue>
109443                  <name>0</name>
109444                  <description>Normal drive mode</description>
109445                  <value>#0</value>
109446                </enumeratedValue>
109447                <enumeratedValue>
109448                  <name>1</name>
109449                  <description>High drive mode</description>
109450                  <value>#1</value>
109451                </enumeratedValue>
109452              </enumeratedValues>
109453            </field>
109454            <field>
109455              <name>ADEXT</name>
109456              <description>Address Extension</description>
109457              <bitOffset>6</bitOffset>
109458              <bitWidth>1</bitWidth>
109459              <access>read-write</access>
109460              <enumeratedValues>
109461                <enumeratedValue>
109462                  <name>0</name>
109463                  <description>7-bit address scheme</description>
109464                  <value>#0</value>
109465                </enumeratedValue>
109466                <enumeratedValue>
109467                  <name>1</name>
109468                  <description>10-bit address scheme</description>
109469                  <value>#1</value>
109470                </enumeratedValue>
109471              </enumeratedValues>
109472            </field>
109473            <field>
109474              <name>GCAEN</name>
109475              <description>General Call Address Enable</description>
109476              <bitOffset>7</bitOffset>
109477              <bitWidth>1</bitWidth>
109478              <access>read-write</access>
109479              <enumeratedValues>
109480                <enumeratedValue>
109481                  <name>0</name>
109482                  <description>Disabled</description>
109483                  <value>#0</value>
109484                </enumeratedValue>
109485                <enumeratedValue>
109486                  <name>1</name>
109487                  <description>Enabled</description>
109488                  <value>#1</value>
109489                </enumeratedValue>
109490              </enumeratedValues>
109491            </field>
109492          </fields>
109493        </register>
109494        <register>
109495          <name>FLT</name>
109496          <description>I2C Programmable Input Glitch Filter Register</description>
109497          <addressOffset>0x6</addressOffset>
109498          <size>8</size>
109499          <access>read-write</access>
109500          <resetValue>0</resetValue>
109501          <resetMask>0xFF</resetMask>
109502          <fields>
109503            <field>
109504              <name>FLT</name>
109505              <description>I2C Programmable Filter Factor</description>
109506              <bitOffset>0</bitOffset>
109507              <bitWidth>4</bitWidth>
109508              <access>read-write</access>
109509              <enumeratedValues>
109510                <enumeratedValue>
109511                  <name>0</name>
109512                  <description>No filter/bypass</description>
109513                  <value>#0000</value>
109514                </enumeratedValue>
109515              </enumeratedValues>
109516            </field>
109517            <field>
109518              <name>STARTF</name>
109519              <description>I2C Bus Start Detect Flag</description>
109520              <bitOffset>4</bitOffset>
109521              <bitWidth>1</bitWidth>
109522              <access>read-write</access>
109523              <enumeratedValues>
109524                <enumeratedValue>
109525                  <name>0</name>
109526                  <description>No start happens on I2C bus</description>
109527                  <value>#0</value>
109528                </enumeratedValue>
109529                <enumeratedValue>
109530                  <name>1</name>
109531                  <description>Start detected on I2C bus</description>
109532                  <value>#1</value>
109533                </enumeratedValue>
109534              </enumeratedValues>
109535            </field>
109536            <field>
109537              <name>SSIE</name>
109538              <description>I2C Bus Stop or Start Interrupt Enable</description>
109539              <bitOffset>5</bitOffset>
109540              <bitWidth>1</bitWidth>
109541              <access>read-write</access>
109542              <enumeratedValues>
109543                <enumeratedValue>
109544                  <name>0</name>
109545                  <description>Stop or start detection interrupt is disabled</description>
109546                  <value>#0</value>
109547                </enumeratedValue>
109548                <enumeratedValue>
109549                  <name>1</name>
109550                  <description>Stop or start detection interrupt is enabled</description>
109551                  <value>#1</value>
109552                </enumeratedValue>
109553              </enumeratedValues>
109554            </field>
109555            <field>
109556              <name>STOPF</name>
109557              <description>I2C Bus Stop Detect Flag</description>
109558              <bitOffset>6</bitOffset>
109559              <bitWidth>1</bitWidth>
109560              <access>read-write</access>
109561              <enumeratedValues>
109562                <enumeratedValue>
109563                  <name>0</name>
109564                  <description>No stop happens on I2C bus</description>
109565                  <value>#0</value>
109566                </enumeratedValue>
109567                <enumeratedValue>
109568                  <name>1</name>
109569                  <description>Stop detected on I2C bus</description>
109570                  <value>#1</value>
109571                </enumeratedValue>
109572              </enumeratedValues>
109573            </field>
109574            <field>
109575              <name>SHEN</name>
109576              <description>Stop Hold Enable</description>
109577              <bitOffset>7</bitOffset>
109578              <bitWidth>1</bitWidth>
109579              <access>read-write</access>
109580              <enumeratedValues>
109581                <enumeratedValue>
109582                  <name>0</name>
109583                  <description>Stop holdoff is disabled. The MCU&apos;s entry to stop mode is not gated.</description>
109584                  <value>#0</value>
109585                </enumeratedValue>
109586                <enumeratedValue>
109587                  <name>1</name>
109588                  <description>Stop holdoff is enabled.</description>
109589                  <value>#1</value>
109590                </enumeratedValue>
109591              </enumeratedValues>
109592            </field>
109593          </fields>
109594        </register>
109595        <register>
109596          <name>RA</name>
109597          <description>I2C Range Address register</description>
109598          <addressOffset>0x7</addressOffset>
109599          <size>8</size>
109600          <access>read-write</access>
109601          <resetValue>0</resetValue>
109602          <resetMask>0xFF</resetMask>
109603          <fields>
109604            <field>
109605              <name>RAD</name>
109606              <description>Range Slave Address</description>
109607              <bitOffset>1</bitOffset>
109608              <bitWidth>7</bitWidth>
109609              <access>read-write</access>
109610            </field>
109611          </fields>
109612        </register>
109613        <register>
109614          <name>SMB</name>
109615          <description>I2C SMBus Control and Status register</description>
109616          <addressOffset>0x8</addressOffset>
109617          <size>8</size>
109618          <access>read-write</access>
109619          <resetValue>0</resetValue>
109620          <resetMask>0xFF</resetMask>
109621          <fields>
109622            <field>
109623              <name>SHTF2IE</name>
109624              <description>SHTF2 Interrupt Enable</description>
109625              <bitOffset>0</bitOffset>
109626              <bitWidth>1</bitWidth>
109627              <access>read-write</access>
109628              <enumeratedValues>
109629                <enumeratedValue>
109630                  <name>0</name>
109631                  <description>SHTF2 interrupt is disabled</description>
109632                  <value>#0</value>
109633                </enumeratedValue>
109634                <enumeratedValue>
109635                  <name>1</name>
109636                  <description>SHTF2 interrupt is enabled</description>
109637                  <value>#1</value>
109638                </enumeratedValue>
109639              </enumeratedValues>
109640            </field>
109641            <field>
109642              <name>SHTF2</name>
109643              <description>SCL High Timeout Flag 2</description>
109644              <bitOffset>1</bitOffset>
109645              <bitWidth>1</bitWidth>
109646              <access>read-write</access>
109647              <enumeratedValues>
109648                <enumeratedValue>
109649                  <name>0</name>
109650                  <description>No SCL high and SDA low timeout occurs</description>
109651                  <value>#0</value>
109652                </enumeratedValue>
109653                <enumeratedValue>
109654                  <name>1</name>
109655                  <description>SCL high and SDA low timeout occurs</description>
109656                  <value>#1</value>
109657                </enumeratedValue>
109658              </enumeratedValues>
109659            </field>
109660            <field>
109661              <name>SHTF1</name>
109662              <description>SCL High Timeout Flag 1</description>
109663              <bitOffset>2</bitOffset>
109664              <bitWidth>1</bitWidth>
109665              <access>read-only</access>
109666              <enumeratedValues>
109667                <enumeratedValue>
109668                  <name>0</name>
109669                  <description>No SCL high and SDA high timeout occurs</description>
109670                  <value>#0</value>
109671                </enumeratedValue>
109672                <enumeratedValue>
109673                  <name>1</name>
109674                  <description>SCL high and SDA high timeout occurs</description>
109675                  <value>#1</value>
109676                </enumeratedValue>
109677              </enumeratedValues>
109678            </field>
109679            <field>
109680              <name>SLTF</name>
109681              <description>SCL Low Timeout Flag</description>
109682              <bitOffset>3</bitOffset>
109683              <bitWidth>1</bitWidth>
109684              <access>read-write</access>
109685              <enumeratedValues>
109686                <enumeratedValue>
109687                  <name>0</name>
109688                  <description>No low timeout occurs</description>
109689                  <value>#0</value>
109690                </enumeratedValue>
109691                <enumeratedValue>
109692                  <name>1</name>
109693                  <description>Low timeout occurs</description>
109694                  <value>#1</value>
109695                </enumeratedValue>
109696              </enumeratedValues>
109697            </field>
109698            <field>
109699              <name>TCKSEL</name>
109700              <description>Timeout Counter Clock Select</description>
109701              <bitOffset>4</bitOffset>
109702              <bitWidth>1</bitWidth>
109703              <access>read-write</access>
109704              <enumeratedValues>
109705                <enumeratedValue>
109706                  <name>0</name>
109707                  <description>Timeout counter counts at the frequency of the I2C module clock / 64</description>
109708                  <value>#0</value>
109709                </enumeratedValue>
109710                <enumeratedValue>
109711                  <name>1</name>
109712                  <description>Timeout counter counts at the frequency of the I2C module clock</description>
109713                  <value>#1</value>
109714                </enumeratedValue>
109715              </enumeratedValues>
109716            </field>
109717            <field>
109718              <name>SIICAEN</name>
109719              <description>Second I2C Address Enable</description>
109720              <bitOffset>5</bitOffset>
109721              <bitWidth>1</bitWidth>
109722              <access>read-write</access>
109723              <enumeratedValues>
109724                <enumeratedValue>
109725                  <name>0</name>
109726                  <description>I2C address register 2 matching is disabled</description>
109727                  <value>#0</value>
109728                </enumeratedValue>
109729                <enumeratedValue>
109730                  <name>1</name>
109731                  <description>I2C address register 2 matching is enabled</description>
109732                  <value>#1</value>
109733                </enumeratedValue>
109734              </enumeratedValues>
109735            </field>
109736            <field>
109737              <name>ALERTEN</name>
109738              <description>SMBus Alert Response Address Enable</description>
109739              <bitOffset>6</bitOffset>
109740              <bitWidth>1</bitWidth>
109741              <access>read-write</access>
109742              <enumeratedValues>
109743                <enumeratedValue>
109744                  <name>0</name>
109745                  <description>SMBus alert response address matching is disabled</description>
109746                  <value>#0</value>
109747                </enumeratedValue>
109748                <enumeratedValue>
109749                  <name>1</name>
109750                  <description>SMBus alert response address matching is enabled</description>
109751                  <value>#1</value>
109752                </enumeratedValue>
109753              </enumeratedValues>
109754            </field>
109755            <field>
109756              <name>FACK</name>
109757              <description>Fast NACK/ACK Enable</description>
109758              <bitOffset>7</bitOffset>
109759              <bitWidth>1</bitWidth>
109760              <access>read-write</access>
109761              <enumeratedValues>
109762                <enumeratedValue>
109763                  <name>0</name>
109764                  <description>An ACK or NACK is sent on the following receiving data byte</description>
109765                  <value>#0</value>
109766                </enumeratedValue>
109767                <enumeratedValue>
109768                  <name>1</name>
109769                  <description>Writing 0 to TXAK after receiving a data byte generates an ACK. Writing 1 to TXAK after receiving a data byte generates a NACK.</description>
109770                  <value>#1</value>
109771                </enumeratedValue>
109772              </enumeratedValues>
109773            </field>
109774          </fields>
109775        </register>
109776        <register>
109777          <name>A2</name>
109778          <description>I2C Address Register 2</description>
109779          <addressOffset>0x9</addressOffset>
109780          <size>8</size>
109781          <access>read-write</access>
109782          <resetValue>0xC2</resetValue>
109783          <resetMask>0xFF</resetMask>
109784          <fields>
109785            <field>
109786              <name>SAD</name>
109787              <description>SMBus Address</description>
109788              <bitOffset>1</bitOffset>
109789              <bitWidth>7</bitWidth>
109790              <access>read-write</access>
109791            </field>
109792          </fields>
109793        </register>
109794        <register>
109795          <name>SLTH</name>
109796          <description>I2C SCL Low Timeout Register High</description>
109797          <addressOffset>0xA</addressOffset>
109798          <size>8</size>
109799          <access>read-write</access>
109800          <resetValue>0</resetValue>
109801          <resetMask>0xFF</resetMask>
109802          <fields>
109803            <field>
109804              <name>SSLT</name>
109805              <description>SSLT[15:8]</description>
109806              <bitOffset>0</bitOffset>
109807              <bitWidth>8</bitWidth>
109808              <access>read-write</access>
109809            </field>
109810          </fields>
109811        </register>
109812        <register>
109813          <name>SLTL</name>
109814          <description>I2C SCL Low Timeout Register Low</description>
109815          <addressOffset>0xB</addressOffset>
109816          <size>8</size>
109817          <access>read-write</access>
109818          <resetValue>0</resetValue>
109819          <resetMask>0xFF</resetMask>
109820          <fields>
109821            <field>
109822              <name>SSLT</name>
109823              <description>SSLT[7:0]</description>
109824              <bitOffset>0</bitOffset>
109825              <bitWidth>8</bitWidth>
109826              <access>read-write</access>
109827            </field>
109828          </fields>
109829        </register>
109830        <register>
109831          <name>S2</name>
109832          <description>I2C Status register 2</description>
109833          <addressOffset>0xC</addressOffset>
109834          <size>8</size>
109835          <access>read-write</access>
109836          <resetValue>0x1</resetValue>
109837          <resetMask>0xFF</resetMask>
109838          <fields>
109839            <field>
109840              <name>EMPTY</name>
109841              <description>Empty flag</description>
109842              <bitOffset>0</bitOffset>
109843              <bitWidth>1</bitWidth>
109844              <access>read-only</access>
109845              <enumeratedValues>
109846                <enumeratedValue>
109847                  <name>0</name>
109848                  <description>Tx or Rx buffer is not empty and cannot be written to, that is new data cannot be loaded into the buffer.</description>
109849                  <value>#0</value>
109850                </enumeratedValue>
109851                <enumeratedValue>
109852                  <name>1</name>
109853                  <description>Tx or Rx buffer is empty and can be written to, that is new data can be loaded into the buffer.</description>
109854                  <value>#1</value>
109855                </enumeratedValue>
109856              </enumeratedValues>
109857            </field>
109858            <field>
109859              <name>ERROR</name>
109860              <description>Error flag</description>
109861              <bitOffset>1</bitOffset>
109862              <bitWidth>1</bitWidth>
109863              <access>read-write</access>
109864              <enumeratedValues>
109865                <enumeratedValue>
109866                  <name>0</name>
109867                  <description>The buffer is not full and all write/read operations have no errors.</description>
109868                  <value>#0</value>
109869                </enumeratedValue>
109870                <enumeratedValue>
109871                  <name>1</name>
109872                  <description>There are 3 or more write/read errors during the data transfer phase (when the Empty flag is not set and the buffer is busy).</description>
109873                  <value>#1</value>
109874                </enumeratedValue>
109875              </enumeratedValues>
109876            </field>
109877          </fields>
109878        </register>
109879      </registers>
109880    </peripheral>
109881    <peripheral>
109882      <name>I2C1</name>
109883      <description>Inter-Integrated Circuit</description>
109884      <groupName>I2C</groupName>
109885      <prependToName>I2C1_</prependToName>
109886      <baseAddress>0x40067000</baseAddress>
109887      <addressBlock>
109888        <offset>0</offset>
109889        <size>0xD</size>
109890        <usage>registers</usage>
109891      </addressBlock>
109892      <interrupt>
109893        <name>I2C1</name>
109894        <value>25</value>
109895      </interrupt>
109896      <registers>
109897        <register>
109898          <name>A1</name>
109899          <description>I2C Address Register 1</description>
109900          <addressOffset>0</addressOffset>
109901          <size>8</size>
109902          <access>read-write</access>
109903          <resetValue>0</resetValue>
109904          <resetMask>0xFF</resetMask>
109905          <fields>
109906            <field>
109907              <name>AD</name>
109908              <description>Address</description>
109909              <bitOffset>1</bitOffset>
109910              <bitWidth>7</bitWidth>
109911              <access>read-write</access>
109912            </field>
109913          </fields>
109914        </register>
109915        <register>
109916          <name>F</name>
109917          <description>I2C Frequency Divider register</description>
109918          <addressOffset>0x1</addressOffset>
109919          <size>8</size>
109920          <access>read-write</access>
109921          <resetValue>0</resetValue>
109922          <resetMask>0xFF</resetMask>
109923          <fields>
109924            <field>
109925              <name>ICR</name>
109926              <description>ClockRate</description>
109927              <bitOffset>0</bitOffset>
109928              <bitWidth>6</bitWidth>
109929              <access>read-write</access>
109930            </field>
109931            <field>
109932              <name>MULT</name>
109933              <description>Multiplier Factor</description>
109934              <bitOffset>6</bitOffset>
109935              <bitWidth>2</bitWidth>
109936              <access>read-write</access>
109937              <enumeratedValues>
109938                <enumeratedValue>
109939                  <name>00</name>
109940                  <description>mul = 1</description>
109941                  <value>#00</value>
109942                </enumeratedValue>
109943                <enumeratedValue>
109944                  <name>01</name>
109945                  <description>mul = 2</description>
109946                  <value>#01</value>
109947                </enumeratedValue>
109948                <enumeratedValue>
109949                  <name>10</name>
109950                  <description>mul = 4</description>
109951                  <value>#10</value>
109952                </enumeratedValue>
109953              </enumeratedValues>
109954            </field>
109955          </fields>
109956        </register>
109957        <register>
109958          <name>C1</name>
109959          <description>I2C Control Register 1</description>
109960          <addressOffset>0x2</addressOffset>
109961          <size>8</size>
109962          <access>read-write</access>
109963          <resetValue>0</resetValue>
109964          <resetMask>0xFF</resetMask>
109965          <fields>
109966            <field>
109967              <name>DMAEN</name>
109968              <description>DMA Enable</description>
109969              <bitOffset>0</bitOffset>
109970              <bitWidth>1</bitWidth>
109971              <access>read-write</access>
109972              <enumeratedValues>
109973                <enumeratedValue>
109974                  <name>0</name>
109975                  <description>All DMA signalling disabled.</description>
109976                  <value>#0</value>
109977                </enumeratedValue>
109978                <enumeratedValue>
109979                  <name>1</name>
109980                  <description>DMA transfer is enabled. While SMB[FACK] = 0, the following conditions trigger the DMA request: a data byte is received, and either address or data is transmitted. (ACK/NACK is automatic) the first byte received matches the A1 register or is a general call address. If any address matching occurs, S[IAAS] and S[TCF] are set. If the direction of transfer is known from master to slave, then it is not required to check S[SRW]. With this assumption, DMA can also be used in this case. In other cases, if the master reads data from the slave, then it is required to rewrite the C1 register operation. With this assumption, DMA cannot be used. When FACK = 1, an address or a data byte is transmitted.</description>
109981                  <value>#1</value>
109982                </enumeratedValue>
109983              </enumeratedValues>
109984            </field>
109985            <field>
109986              <name>WUEN</name>
109987              <description>Wakeup Enable</description>
109988              <bitOffset>1</bitOffset>
109989              <bitWidth>1</bitWidth>
109990              <access>read-write</access>
109991              <enumeratedValues>
109992                <enumeratedValue>
109993                  <name>0</name>
109994                  <description>Normal operation. No interrupt generated when address matching in low power mode.</description>
109995                  <value>#0</value>
109996                </enumeratedValue>
109997                <enumeratedValue>
109998                  <name>1</name>
109999                  <description>Enables the wakeup function in low power mode.</description>
110000                  <value>#1</value>
110001                </enumeratedValue>
110002              </enumeratedValues>
110003            </field>
110004            <field>
110005              <name>RSTA</name>
110006              <description>Repeat START</description>
110007              <bitOffset>2</bitOffset>
110008              <bitWidth>1</bitWidth>
110009              <access>write-only</access>
110010            </field>
110011            <field>
110012              <name>TXAK</name>
110013              <description>Transmit Acknowledge Enable</description>
110014              <bitOffset>3</bitOffset>
110015              <bitWidth>1</bitWidth>
110016              <access>read-write</access>
110017              <enumeratedValues>
110018                <enumeratedValue>
110019                  <name>0</name>
110020                  <description>An acknowledge signal is sent to the bus on the following receiving byte (if FACK is cleared) or the current receiving byte (if FACK is set).</description>
110021                  <value>#0</value>
110022                </enumeratedValue>
110023                <enumeratedValue>
110024                  <name>1</name>
110025                  <description>No acknowledge signal is sent to the bus on the following receiving data byte (if FACK is cleared) or the current receiving data byte (if FACK is set).</description>
110026                  <value>#1</value>
110027                </enumeratedValue>
110028              </enumeratedValues>
110029            </field>
110030            <field>
110031              <name>TX</name>
110032              <description>Transmit Mode Select</description>
110033              <bitOffset>4</bitOffset>
110034              <bitWidth>1</bitWidth>
110035              <access>read-write</access>
110036              <enumeratedValues>
110037                <enumeratedValue>
110038                  <name>0</name>
110039                  <description>Receive</description>
110040                  <value>#0</value>
110041                </enumeratedValue>
110042                <enumeratedValue>
110043                  <name>1</name>
110044                  <description>Transmit</description>
110045                  <value>#1</value>
110046                </enumeratedValue>
110047              </enumeratedValues>
110048            </field>
110049            <field>
110050              <name>MST</name>
110051              <description>Master Mode Select</description>
110052              <bitOffset>5</bitOffset>
110053              <bitWidth>1</bitWidth>
110054              <access>read-write</access>
110055              <enumeratedValues>
110056                <enumeratedValue>
110057                  <name>0</name>
110058                  <description>Slave mode</description>
110059                  <value>#0</value>
110060                </enumeratedValue>
110061                <enumeratedValue>
110062                  <name>1</name>
110063                  <description>Master mode</description>
110064                  <value>#1</value>
110065                </enumeratedValue>
110066              </enumeratedValues>
110067            </field>
110068            <field>
110069              <name>IICIE</name>
110070              <description>I2C Interrupt Enable</description>
110071              <bitOffset>6</bitOffset>
110072              <bitWidth>1</bitWidth>
110073              <access>read-write</access>
110074              <enumeratedValues>
110075                <enumeratedValue>
110076                  <name>0</name>
110077                  <description>Disabled</description>
110078                  <value>#0</value>
110079                </enumeratedValue>
110080                <enumeratedValue>
110081                  <name>1</name>
110082                  <description>Enabled</description>
110083                  <value>#1</value>
110084                </enumeratedValue>
110085              </enumeratedValues>
110086            </field>
110087            <field>
110088              <name>IICEN</name>
110089              <description>I2C Enable</description>
110090              <bitOffset>7</bitOffset>
110091              <bitWidth>1</bitWidth>
110092              <access>read-write</access>
110093              <enumeratedValues>
110094                <enumeratedValue>
110095                  <name>0</name>
110096                  <description>Disabled</description>
110097                  <value>#0</value>
110098                </enumeratedValue>
110099                <enumeratedValue>
110100                  <name>1</name>
110101                  <description>Enabled</description>
110102                  <value>#1</value>
110103                </enumeratedValue>
110104              </enumeratedValues>
110105            </field>
110106          </fields>
110107        </register>
110108        <register>
110109          <name>S</name>
110110          <description>I2C Status register</description>
110111          <addressOffset>0x3</addressOffset>
110112          <size>8</size>
110113          <access>read-write</access>
110114          <resetValue>0x80</resetValue>
110115          <resetMask>0xFF</resetMask>
110116          <fields>
110117            <field>
110118              <name>RXAK</name>
110119              <description>Receive Acknowledge</description>
110120              <bitOffset>0</bitOffset>
110121              <bitWidth>1</bitWidth>
110122              <access>read-only</access>
110123              <enumeratedValues>
110124                <enumeratedValue>
110125                  <name>0</name>
110126                  <description>Acknowledge signal was received after the completion of one byte of data transmission on the bus</description>
110127                  <value>#0</value>
110128                </enumeratedValue>
110129                <enumeratedValue>
110130                  <name>1</name>
110131                  <description>No acknowledge signal detected</description>
110132                  <value>#1</value>
110133                </enumeratedValue>
110134              </enumeratedValues>
110135            </field>
110136            <field>
110137              <name>IICIF</name>
110138              <description>Interrupt Flag</description>
110139              <bitOffset>1</bitOffset>
110140              <bitWidth>1</bitWidth>
110141              <access>read-write</access>
110142              <enumeratedValues>
110143                <enumeratedValue>
110144                  <name>0</name>
110145                  <description>No interrupt pending</description>
110146                  <value>#0</value>
110147                </enumeratedValue>
110148                <enumeratedValue>
110149                  <name>1</name>
110150                  <description>Interrupt pending</description>
110151                  <value>#1</value>
110152                </enumeratedValue>
110153              </enumeratedValues>
110154            </field>
110155            <field>
110156              <name>SRW</name>
110157              <description>Slave Read/Write</description>
110158              <bitOffset>2</bitOffset>
110159              <bitWidth>1</bitWidth>
110160              <access>read-only</access>
110161              <enumeratedValues>
110162                <enumeratedValue>
110163                  <name>0</name>
110164                  <description>Slave receive, master writing to slave</description>
110165                  <value>#0</value>
110166                </enumeratedValue>
110167                <enumeratedValue>
110168                  <name>1</name>
110169                  <description>Slave transmit, master reading from slave</description>
110170                  <value>#1</value>
110171                </enumeratedValue>
110172              </enumeratedValues>
110173            </field>
110174            <field>
110175              <name>RAM</name>
110176              <description>Range Address Match</description>
110177              <bitOffset>3</bitOffset>
110178              <bitWidth>1</bitWidth>
110179              <access>read-write</access>
110180              <enumeratedValues>
110181                <enumeratedValue>
110182                  <name>0</name>
110183                  <description>Not addressed</description>
110184                  <value>#0</value>
110185                </enumeratedValue>
110186                <enumeratedValue>
110187                  <name>1</name>
110188                  <description>Addressed as a slave</description>
110189                  <value>#1</value>
110190                </enumeratedValue>
110191              </enumeratedValues>
110192            </field>
110193            <field>
110194              <name>ARBL</name>
110195              <description>Arbitration Lost</description>
110196              <bitOffset>4</bitOffset>
110197              <bitWidth>1</bitWidth>
110198              <access>read-write</access>
110199              <enumeratedValues>
110200                <enumeratedValue>
110201                  <name>0</name>
110202                  <description>Standard bus operation.</description>
110203                  <value>#0</value>
110204                </enumeratedValue>
110205                <enumeratedValue>
110206                  <name>1</name>
110207                  <description>Loss of arbitration.</description>
110208                  <value>#1</value>
110209                </enumeratedValue>
110210              </enumeratedValues>
110211            </field>
110212            <field>
110213              <name>BUSY</name>
110214              <description>Bus Busy</description>
110215              <bitOffset>5</bitOffset>
110216              <bitWidth>1</bitWidth>
110217              <access>read-only</access>
110218              <enumeratedValues>
110219                <enumeratedValue>
110220                  <name>0</name>
110221                  <description>Bus is idle</description>
110222                  <value>#0</value>
110223                </enumeratedValue>
110224                <enumeratedValue>
110225                  <name>1</name>
110226                  <description>Bus is busy</description>
110227                  <value>#1</value>
110228                </enumeratedValue>
110229              </enumeratedValues>
110230            </field>
110231            <field>
110232              <name>IAAS</name>
110233              <description>Addressed As A Slave</description>
110234              <bitOffset>6</bitOffset>
110235              <bitWidth>1</bitWidth>
110236              <access>read-write</access>
110237              <enumeratedValues>
110238                <enumeratedValue>
110239                  <name>0</name>
110240                  <description>Not addressed</description>
110241                  <value>#0</value>
110242                </enumeratedValue>
110243                <enumeratedValue>
110244                  <name>1</name>
110245                  <description>Addressed as a slave</description>
110246                  <value>#1</value>
110247                </enumeratedValue>
110248              </enumeratedValues>
110249            </field>
110250            <field>
110251              <name>TCF</name>
110252              <description>Transfer Complete Flag</description>
110253              <bitOffset>7</bitOffset>
110254              <bitWidth>1</bitWidth>
110255              <access>read-only</access>
110256              <enumeratedValues>
110257                <enumeratedValue>
110258                  <name>0</name>
110259                  <description>Transfer in progress</description>
110260                  <value>#0</value>
110261                </enumeratedValue>
110262                <enumeratedValue>
110263                  <name>1</name>
110264                  <description>Transfer complete</description>
110265                  <value>#1</value>
110266                </enumeratedValue>
110267              </enumeratedValues>
110268            </field>
110269          </fields>
110270        </register>
110271        <register>
110272          <name>D</name>
110273          <description>I2C Data I/O register</description>
110274          <addressOffset>0x4</addressOffset>
110275          <size>8</size>
110276          <access>read-write</access>
110277          <resetValue>0</resetValue>
110278          <resetMask>0xFF</resetMask>
110279          <fields>
110280            <field>
110281              <name>DATA</name>
110282              <description>Data</description>
110283              <bitOffset>0</bitOffset>
110284              <bitWidth>8</bitWidth>
110285              <access>read-write</access>
110286            </field>
110287          </fields>
110288        </register>
110289        <register>
110290          <name>C2</name>
110291          <description>I2C Control Register 2</description>
110292          <addressOffset>0x5</addressOffset>
110293          <size>8</size>
110294          <access>read-write</access>
110295          <resetValue>0</resetValue>
110296          <resetMask>0xFF</resetMask>
110297          <fields>
110298            <field>
110299              <name>AD</name>
110300              <description>Slave Address</description>
110301              <bitOffset>0</bitOffset>
110302              <bitWidth>3</bitWidth>
110303              <access>read-write</access>
110304            </field>
110305            <field>
110306              <name>RMEN</name>
110307              <description>Range Address Matching Enable</description>
110308              <bitOffset>3</bitOffset>
110309              <bitWidth>1</bitWidth>
110310              <access>read-write</access>
110311              <enumeratedValues>
110312                <enumeratedValue>
110313                  <name>0</name>
110314                  <description>Range mode disabled. No address matching occurs for an address within the range of values of the A1 and RA registers.</description>
110315                  <value>#0</value>
110316                </enumeratedValue>
110317                <enumeratedValue>
110318                  <name>1</name>
110319                  <description>Range mode enabled. Address matching occurs when a slave receives an address within the range of values of the A1 and RA registers.</description>
110320                  <value>#1</value>
110321                </enumeratedValue>
110322              </enumeratedValues>
110323            </field>
110324            <field>
110325              <name>SBRC</name>
110326              <description>Slave Baud Rate Control</description>
110327              <bitOffset>4</bitOffset>
110328              <bitWidth>1</bitWidth>
110329              <access>read-write</access>
110330              <enumeratedValues>
110331                <enumeratedValue>
110332                  <name>0</name>
110333                  <description>The slave baud rate follows the master baud rate and clock stretching may occur</description>
110334                  <value>#0</value>
110335                </enumeratedValue>
110336                <enumeratedValue>
110337                  <name>1</name>
110338                  <description>Slave baud rate is independent of the master baud rate</description>
110339                  <value>#1</value>
110340                </enumeratedValue>
110341              </enumeratedValues>
110342            </field>
110343            <field>
110344              <name>HDRS</name>
110345              <description>High Drive Select</description>
110346              <bitOffset>5</bitOffset>
110347              <bitWidth>1</bitWidth>
110348              <access>read-write</access>
110349              <enumeratedValues>
110350                <enumeratedValue>
110351                  <name>0</name>
110352                  <description>Normal drive mode</description>
110353                  <value>#0</value>
110354                </enumeratedValue>
110355                <enumeratedValue>
110356                  <name>1</name>
110357                  <description>High drive mode</description>
110358                  <value>#1</value>
110359                </enumeratedValue>
110360              </enumeratedValues>
110361            </field>
110362            <field>
110363              <name>ADEXT</name>
110364              <description>Address Extension</description>
110365              <bitOffset>6</bitOffset>
110366              <bitWidth>1</bitWidth>
110367              <access>read-write</access>
110368              <enumeratedValues>
110369                <enumeratedValue>
110370                  <name>0</name>
110371                  <description>7-bit address scheme</description>
110372                  <value>#0</value>
110373                </enumeratedValue>
110374                <enumeratedValue>
110375                  <name>1</name>
110376                  <description>10-bit address scheme</description>
110377                  <value>#1</value>
110378                </enumeratedValue>
110379              </enumeratedValues>
110380            </field>
110381            <field>
110382              <name>GCAEN</name>
110383              <description>General Call Address Enable</description>
110384              <bitOffset>7</bitOffset>
110385              <bitWidth>1</bitWidth>
110386              <access>read-write</access>
110387              <enumeratedValues>
110388                <enumeratedValue>
110389                  <name>0</name>
110390                  <description>Disabled</description>
110391                  <value>#0</value>
110392                </enumeratedValue>
110393                <enumeratedValue>
110394                  <name>1</name>
110395                  <description>Enabled</description>
110396                  <value>#1</value>
110397                </enumeratedValue>
110398              </enumeratedValues>
110399            </field>
110400          </fields>
110401        </register>
110402        <register>
110403          <name>FLT</name>
110404          <description>I2C Programmable Input Glitch Filter Register</description>
110405          <addressOffset>0x6</addressOffset>
110406          <size>8</size>
110407          <access>read-write</access>
110408          <resetValue>0</resetValue>
110409          <resetMask>0xFF</resetMask>
110410          <fields>
110411            <field>
110412              <name>FLT</name>
110413              <description>I2C Programmable Filter Factor</description>
110414              <bitOffset>0</bitOffset>
110415              <bitWidth>4</bitWidth>
110416              <access>read-write</access>
110417              <enumeratedValues>
110418                <enumeratedValue>
110419                  <name>0</name>
110420                  <description>No filter/bypass</description>
110421                  <value>#0000</value>
110422                </enumeratedValue>
110423              </enumeratedValues>
110424            </field>
110425            <field>
110426              <name>STARTF</name>
110427              <description>I2C Bus Start Detect Flag</description>
110428              <bitOffset>4</bitOffset>
110429              <bitWidth>1</bitWidth>
110430              <access>read-write</access>
110431              <enumeratedValues>
110432                <enumeratedValue>
110433                  <name>0</name>
110434                  <description>No start happens on I2C bus</description>
110435                  <value>#0</value>
110436                </enumeratedValue>
110437                <enumeratedValue>
110438                  <name>1</name>
110439                  <description>Start detected on I2C bus</description>
110440                  <value>#1</value>
110441                </enumeratedValue>
110442              </enumeratedValues>
110443            </field>
110444            <field>
110445              <name>SSIE</name>
110446              <description>I2C Bus Stop or Start Interrupt Enable</description>
110447              <bitOffset>5</bitOffset>
110448              <bitWidth>1</bitWidth>
110449              <access>read-write</access>
110450              <enumeratedValues>
110451                <enumeratedValue>
110452                  <name>0</name>
110453                  <description>Stop or start detection interrupt is disabled</description>
110454                  <value>#0</value>
110455                </enumeratedValue>
110456                <enumeratedValue>
110457                  <name>1</name>
110458                  <description>Stop or start detection interrupt is enabled</description>
110459                  <value>#1</value>
110460                </enumeratedValue>
110461              </enumeratedValues>
110462            </field>
110463            <field>
110464              <name>STOPF</name>
110465              <description>I2C Bus Stop Detect Flag</description>
110466              <bitOffset>6</bitOffset>
110467              <bitWidth>1</bitWidth>
110468              <access>read-write</access>
110469              <enumeratedValues>
110470                <enumeratedValue>
110471                  <name>0</name>
110472                  <description>No stop happens on I2C bus</description>
110473                  <value>#0</value>
110474                </enumeratedValue>
110475                <enumeratedValue>
110476                  <name>1</name>
110477                  <description>Stop detected on I2C bus</description>
110478                  <value>#1</value>
110479                </enumeratedValue>
110480              </enumeratedValues>
110481            </field>
110482            <field>
110483              <name>SHEN</name>
110484              <description>Stop Hold Enable</description>
110485              <bitOffset>7</bitOffset>
110486              <bitWidth>1</bitWidth>
110487              <access>read-write</access>
110488              <enumeratedValues>
110489                <enumeratedValue>
110490                  <name>0</name>
110491                  <description>Stop holdoff is disabled. The MCU&apos;s entry to stop mode is not gated.</description>
110492                  <value>#0</value>
110493                </enumeratedValue>
110494                <enumeratedValue>
110495                  <name>1</name>
110496                  <description>Stop holdoff is enabled.</description>
110497                  <value>#1</value>
110498                </enumeratedValue>
110499              </enumeratedValues>
110500            </field>
110501          </fields>
110502        </register>
110503        <register>
110504          <name>RA</name>
110505          <description>I2C Range Address register</description>
110506          <addressOffset>0x7</addressOffset>
110507          <size>8</size>
110508          <access>read-write</access>
110509          <resetValue>0</resetValue>
110510          <resetMask>0xFF</resetMask>
110511          <fields>
110512            <field>
110513              <name>RAD</name>
110514              <description>Range Slave Address</description>
110515              <bitOffset>1</bitOffset>
110516              <bitWidth>7</bitWidth>
110517              <access>read-write</access>
110518            </field>
110519          </fields>
110520        </register>
110521        <register>
110522          <name>SMB</name>
110523          <description>I2C SMBus Control and Status register</description>
110524          <addressOffset>0x8</addressOffset>
110525          <size>8</size>
110526          <access>read-write</access>
110527          <resetValue>0</resetValue>
110528          <resetMask>0xFF</resetMask>
110529          <fields>
110530            <field>
110531              <name>SHTF2IE</name>
110532              <description>SHTF2 Interrupt Enable</description>
110533              <bitOffset>0</bitOffset>
110534              <bitWidth>1</bitWidth>
110535              <access>read-write</access>
110536              <enumeratedValues>
110537                <enumeratedValue>
110538                  <name>0</name>
110539                  <description>SHTF2 interrupt is disabled</description>
110540                  <value>#0</value>
110541                </enumeratedValue>
110542                <enumeratedValue>
110543                  <name>1</name>
110544                  <description>SHTF2 interrupt is enabled</description>
110545                  <value>#1</value>
110546                </enumeratedValue>
110547              </enumeratedValues>
110548            </field>
110549            <field>
110550              <name>SHTF2</name>
110551              <description>SCL High Timeout Flag 2</description>
110552              <bitOffset>1</bitOffset>
110553              <bitWidth>1</bitWidth>
110554              <access>read-write</access>
110555              <enumeratedValues>
110556                <enumeratedValue>
110557                  <name>0</name>
110558                  <description>No SCL high and SDA low timeout occurs</description>
110559                  <value>#0</value>
110560                </enumeratedValue>
110561                <enumeratedValue>
110562                  <name>1</name>
110563                  <description>SCL high and SDA low timeout occurs</description>
110564                  <value>#1</value>
110565                </enumeratedValue>
110566              </enumeratedValues>
110567            </field>
110568            <field>
110569              <name>SHTF1</name>
110570              <description>SCL High Timeout Flag 1</description>
110571              <bitOffset>2</bitOffset>
110572              <bitWidth>1</bitWidth>
110573              <access>read-only</access>
110574              <enumeratedValues>
110575                <enumeratedValue>
110576                  <name>0</name>
110577                  <description>No SCL high and SDA high timeout occurs</description>
110578                  <value>#0</value>
110579                </enumeratedValue>
110580                <enumeratedValue>
110581                  <name>1</name>
110582                  <description>SCL high and SDA high timeout occurs</description>
110583                  <value>#1</value>
110584                </enumeratedValue>
110585              </enumeratedValues>
110586            </field>
110587            <field>
110588              <name>SLTF</name>
110589              <description>SCL Low Timeout Flag</description>
110590              <bitOffset>3</bitOffset>
110591              <bitWidth>1</bitWidth>
110592              <access>read-write</access>
110593              <enumeratedValues>
110594                <enumeratedValue>
110595                  <name>0</name>
110596                  <description>No low timeout occurs</description>
110597                  <value>#0</value>
110598                </enumeratedValue>
110599                <enumeratedValue>
110600                  <name>1</name>
110601                  <description>Low timeout occurs</description>
110602                  <value>#1</value>
110603                </enumeratedValue>
110604              </enumeratedValues>
110605            </field>
110606            <field>
110607              <name>TCKSEL</name>
110608              <description>Timeout Counter Clock Select</description>
110609              <bitOffset>4</bitOffset>
110610              <bitWidth>1</bitWidth>
110611              <access>read-write</access>
110612              <enumeratedValues>
110613                <enumeratedValue>
110614                  <name>0</name>
110615                  <description>Timeout counter counts at the frequency of the I2C module clock / 64</description>
110616                  <value>#0</value>
110617                </enumeratedValue>
110618                <enumeratedValue>
110619                  <name>1</name>
110620                  <description>Timeout counter counts at the frequency of the I2C module clock</description>
110621                  <value>#1</value>
110622                </enumeratedValue>
110623              </enumeratedValues>
110624            </field>
110625            <field>
110626              <name>SIICAEN</name>
110627              <description>Second I2C Address Enable</description>
110628              <bitOffset>5</bitOffset>
110629              <bitWidth>1</bitWidth>
110630              <access>read-write</access>
110631              <enumeratedValues>
110632                <enumeratedValue>
110633                  <name>0</name>
110634                  <description>I2C address register 2 matching is disabled</description>
110635                  <value>#0</value>
110636                </enumeratedValue>
110637                <enumeratedValue>
110638                  <name>1</name>
110639                  <description>I2C address register 2 matching is enabled</description>
110640                  <value>#1</value>
110641                </enumeratedValue>
110642              </enumeratedValues>
110643            </field>
110644            <field>
110645              <name>ALERTEN</name>
110646              <description>SMBus Alert Response Address Enable</description>
110647              <bitOffset>6</bitOffset>
110648              <bitWidth>1</bitWidth>
110649              <access>read-write</access>
110650              <enumeratedValues>
110651                <enumeratedValue>
110652                  <name>0</name>
110653                  <description>SMBus alert response address matching is disabled</description>
110654                  <value>#0</value>
110655                </enumeratedValue>
110656                <enumeratedValue>
110657                  <name>1</name>
110658                  <description>SMBus alert response address matching is enabled</description>
110659                  <value>#1</value>
110660                </enumeratedValue>
110661              </enumeratedValues>
110662            </field>
110663            <field>
110664              <name>FACK</name>
110665              <description>Fast NACK/ACK Enable</description>
110666              <bitOffset>7</bitOffset>
110667              <bitWidth>1</bitWidth>
110668              <access>read-write</access>
110669              <enumeratedValues>
110670                <enumeratedValue>
110671                  <name>0</name>
110672                  <description>An ACK or NACK is sent on the following receiving data byte</description>
110673                  <value>#0</value>
110674                </enumeratedValue>
110675                <enumeratedValue>
110676                  <name>1</name>
110677                  <description>Writing 0 to TXAK after receiving a data byte generates an ACK. Writing 1 to TXAK after receiving a data byte generates a NACK.</description>
110678                  <value>#1</value>
110679                </enumeratedValue>
110680              </enumeratedValues>
110681            </field>
110682          </fields>
110683        </register>
110684        <register>
110685          <name>A2</name>
110686          <description>I2C Address Register 2</description>
110687          <addressOffset>0x9</addressOffset>
110688          <size>8</size>
110689          <access>read-write</access>
110690          <resetValue>0xC2</resetValue>
110691          <resetMask>0xFF</resetMask>
110692          <fields>
110693            <field>
110694              <name>SAD</name>
110695              <description>SMBus Address</description>
110696              <bitOffset>1</bitOffset>
110697              <bitWidth>7</bitWidth>
110698              <access>read-write</access>
110699            </field>
110700          </fields>
110701        </register>
110702        <register>
110703          <name>SLTH</name>
110704          <description>I2C SCL Low Timeout Register High</description>
110705          <addressOffset>0xA</addressOffset>
110706          <size>8</size>
110707          <access>read-write</access>
110708          <resetValue>0</resetValue>
110709          <resetMask>0xFF</resetMask>
110710          <fields>
110711            <field>
110712              <name>SSLT</name>
110713              <description>SSLT[15:8]</description>
110714              <bitOffset>0</bitOffset>
110715              <bitWidth>8</bitWidth>
110716              <access>read-write</access>
110717            </field>
110718          </fields>
110719        </register>
110720        <register>
110721          <name>SLTL</name>
110722          <description>I2C SCL Low Timeout Register Low</description>
110723          <addressOffset>0xB</addressOffset>
110724          <size>8</size>
110725          <access>read-write</access>
110726          <resetValue>0</resetValue>
110727          <resetMask>0xFF</resetMask>
110728          <fields>
110729            <field>
110730              <name>SSLT</name>
110731              <description>SSLT[7:0]</description>
110732              <bitOffset>0</bitOffset>
110733              <bitWidth>8</bitWidth>
110734              <access>read-write</access>
110735            </field>
110736          </fields>
110737        </register>
110738        <register>
110739          <name>S2</name>
110740          <description>I2C Status register 2</description>
110741          <addressOffset>0xC</addressOffset>
110742          <size>8</size>
110743          <access>read-write</access>
110744          <resetValue>0x1</resetValue>
110745          <resetMask>0xFF</resetMask>
110746          <fields>
110747            <field>
110748              <name>EMPTY</name>
110749              <description>Empty flag</description>
110750              <bitOffset>0</bitOffset>
110751              <bitWidth>1</bitWidth>
110752              <access>read-only</access>
110753              <enumeratedValues>
110754                <enumeratedValue>
110755                  <name>0</name>
110756                  <description>Tx or Rx buffer is not empty and cannot be written to, that is new data cannot be loaded into the buffer.</description>
110757                  <value>#0</value>
110758                </enumeratedValue>
110759                <enumeratedValue>
110760                  <name>1</name>
110761                  <description>Tx or Rx buffer is empty and can be written to, that is new data can be loaded into the buffer.</description>
110762                  <value>#1</value>
110763                </enumeratedValue>
110764              </enumeratedValues>
110765            </field>
110766            <field>
110767              <name>ERROR</name>
110768              <description>Error flag</description>
110769              <bitOffset>1</bitOffset>
110770              <bitWidth>1</bitWidth>
110771              <access>read-write</access>
110772              <enumeratedValues>
110773                <enumeratedValue>
110774                  <name>0</name>
110775                  <description>The buffer is not full and all write/read operations have no errors.</description>
110776                  <value>#0</value>
110777                </enumeratedValue>
110778                <enumeratedValue>
110779                  <name>1</name>
110780                  <description>There are 3 or more write/read errors during the data transfer phase (when the Empty flag is not set and the buffer is busy).</description>
110781                  <value>#1</value>
110782                </enumeratedValue>
110783              </enumeratedValues>
110784            </field>
110785          </fields>
110786        </register>
110787      </registers>
110788    </peripheral>
110789    <peripheral>
110790      <name>I2C2</name>
110791      <description>Inter-Integrated Circuit</description>
110792      <groupName>I2C</groupName>
110793      <prependToName>I2C2_</prependToName>
110794      <baseAddress>0x400E6000</baseAddress>
110795      <addressBlock>
110796        <offset>0</offset>
110797        <size>0xD</size>
110798        <usage>registers</usage>
110799      </addressBlock>
110800      <interrupt>
110801        <name>I2C2</name>
110802        <value>74</value>
110803      </interrupt>
110804      <registers>
110805        <register>
110806          <name>A1</name>
110807          <description>I2C Address Register 1</description>
110808          <addressOffset>0</addressOffset>
110809          <size>8</size>
110810          <access>read-write</access>
110811          <resetValue>0</resetValue>
110812          <resetMask>0xFF</resetMask>
110813          <fields>
110814            <field>
110815              <name>AD</name>
110816              <description>Address</description>
110817              <bitOffset>1</bitOffset>
110818              <bitWidth>7</bitWidth>
110819              <access>read-write</access>
110820            </field>
110821          </fields>
110822        </register>
110823        <register>
110824          <name>F</name>
110825          <description>I2C Frequency Divider register</description>
110826          <addressOffset>0x1</addressOffset>
110827          <size>8</size>
110828          <access>read-write</access>
110829          <resetValue>0</resetValue>
110830          <resetMask>0xFF</resetMask>
110831          <fields>
110832            <field>
110833              <name>ICR</name>
110834              <description>ClockRate</description>
110835              <bitOffset>0</bitOffset>
110836              <bitWidth>6</bitWidth>
110837              <access>read-write</access>
110838            </field>
110839            <field>
110840              <name>MULT</name>
110841              <description>Multiplier Factor</description>
110842              <bitOffset>6</bitOffset>
110843              <bitWidth>2</bitWidth>
110844              <access>read-write</access>
110845              <enumeratedValues>
110846                <enumeratedValue>
110847                  <name>00</name>
110848                  <description>mul = 1</description>
110849                  <value>#00</value>
110850                </enumeratedValue>
110851                <enumeratedValue>
110852                  <name>01</name>
110853                  <description>mul = 2</description>
110854                  <value>#01</value>
110855                </enumeratedValue>
110856                <enumeratedValue>
110857                  <name>10</name>
110858                  <description>mul = 4</description>
110859                  <value>#10</value>
110860                </enumeratedValue>
110861              </enumeratedValues>
110862            </field>
110863          </fields>
110864        </register>
110865        <register>
110866          <name>C1</name>
110867          <description>I2C Control Register 1</description>
110868          <addressOffset>0x2</addressOffset>
110869          <size>8</size>
110870          <access>read-write</access>
110871          <resetValue>0</resetValue>
110872          <resetMask>0xFF</resetMask>
110873          <fields>
110874            <field>
110875              <name>DMAEN</name>
110876              <description>DMA Enable</description>
110877              <bitOffset>0</bitOffset>
110878              <bitWidth>1</bitWidth>
110879              <access>read-write</access>
110880              <enumeratedValues>
110881                <enumeratedValue>
110882                  <name>0</name>
110883                  <description>All DMA signalling disabled.</description>
110884                  <value>#0</value>
110885                </enumeratedValue>
110886                <enumeratedValue>
110887                  <name>1</name>
110888                  <description>DMA transfer is enabled. While SMB[FACK] = 0, the following conditions trigger the DMA request: a data byte is received, and either address or data is transmitted. (ACK/NACK is automatic) the first byte received matches the A1 register or is a general call address. If any address matching occurs, S[IAAS] and S[TCF] are set. If the direction of transfer is known from master to slave, then it is not required to check S[SRW]. With this assumption, DMA can also be used in this case. In other cases, if the master reads data from the slave, then it is required to rewrite the C1 register operation. With this assumption, DMA cannot be used. When FACK = 1, an address or a data byte is transmitted.</description>
110889                  <value>#1</value>
110890                </enumeratedValue>
110891              </enumeratedValues>
110892            </field>
110893            <field>
110894              <name>WUEN</name>
110895              <description>Wakeup Enable</description>
110896              <bitOffset>1</bitOffset>
110897              <bitWidth>1</bitWidth>
110898              <access>read-write</access>
110899              <enumeratedValues>
110900                <enumeratedValue>
110901                  <name>0</name>
110902                  <description>Normal operation. No interrupt generated when address matching in low power mode.</description>
110903                  <value>#0</value>
110904                </enumeratedValue>
110905                <enumeratedValue>
110906                  <name>1</name>
110907                  <description>Enables the wakeup function in low power mode.</description>
110908                  <value>#1</value>
110909                </enumeratedValue>
110910              </enumeratedValues>
110911            </field>
110912            <field>
110913              <name>RSTA</name>
110914              <description>Repeat START</description>
110915              <bitOffset>2</bitOffset>
110916              <bitWidth>1</bitWidth>
110917              <access>write-only</access>
110918            </field>
110919            <field>
110920              <name>TXAK</name>
110921              <description>Transmit Acknowledge Enable</description>
110922              <bitOffset>3</bitOffset>
110923              <bitWidth>1</bitWidth>
110924              <access>read-write</access>
110925              <enumeratedValues>
110926                <enumeratedValue>
110927                  <name>0</name>
110928                  <description>An acknowledge signal is sent to the bus on the following receiving byte (if FACK is cleared) or the current receiving byte (if FACK is set).</description>
110929                  <value>#0</value>
110930                </enumeratedValue>
110931                <enumeratedValue>
110932                  <name>1</name>
110933                  <description>No acknowledge signal is sent to the bus on the following receiving data byte (if FACK is cleared) or the current receiving data byte (if FACK is set).</description>
110934                  <value>#1</value>
110935                </enumeratedValue>
110936              </enumeratedValues>
110937            </field>
110938            <field>
110939              <name>TX</name>
110940              <description>Transmit Mode Select</description>
110941              <bitOffset>4</bitOffset>
110942              <bitWidth>1</bitWidth>
110943              <access>read-write</access>
110944              <enumeratedValues>
110945                <enumeratedValue>
110946                  <name>0</name>
110947                  <description>Receive</description>
110948                  <value>#0</value>
110949                </enumeratedValue>
110950                <enumeratedValue>
110951                  <name>1</name>
110952                  <description>Transmit</description>
110953                  <value>#1</value>
110954                </enumeratedValue>
110955              </enumeratedValues>
110956            </field>
110957            <field>
110958              <name>MST</name>
110959              <description>Master Mode Select</description>
110960              <bitOffset>5</bitOffset>
110961              <bitWidth>1</bitWidth>
110962              <access>read-write</access>
110963              <enumeratedValues>
110964                <enumeratedValue>
110965                  <name>0</name>
110966                  <description>Slave mode</description>
110967                  <value>#0</value>
110968                </enumeratedValue>
110969                <enumeratedValue>
110970                  <name>1</name>
110971                  <description>Master mode</description>
110972                  <value>#1</value>
110973                </enumeratedValue>
110974              </enumeratedValues>
110975            </field>
110976            <field>
110977              <name>IICIE</name>
110978              <description>I2C Interrupt Enable</description>
110979              <bitOffset>6</bitOffset>
110980              <bitWidth>1</bitWidth>
110981              <access>read-write</access>
110982              <enumeratedValues>
110983                <enumeratedValue>
110984                  <name>0</name>
110985                  <description>Disabled</description>
110986                  <value>#0</value>
110987                </enumeratedValue>
110988                <enumeratedValue>
110989                  <name>1</name>
110990                  <description>Enabled</description>
110991                  <value>#1</value>
110992                </enumeratedValue>
110993              </enumeratedValues>
110994            </field>
110995            <field>
110996              <name>IICEN</name>
110997              <description>I2C Enable</description>
110998              <bitOffset>7</bitOffset>
110999              <bitWidth>1</bitWidth>
111000              <access>read-write</access>
111001              <enumeratedValues>
111002                <enumeratedValue>
111003                  <name>0</name>
111004                  <description>Disabled</description>
111005                  <value>#0</value>
111006                </enumeratedValue>
111007                <enumeratedValue>
111008                  <name>1</name>
111009                  <description>Enabled</description>
111010                  <value>#1</value>
111011                </enumeratedValue>
111012              </enumeratedValues>
111013            </field>
111014          </fields>
111015        </register>
111016        <register>
111017          <name>S</name>
111018          <description>I2C Status register</description>
111019          <addressOffset>0x3</addressOffset>
111020          <size>8</size>
111021          <access>read-write</access>
111022          <resetValue>0x80</resetValue>
111023          <resetMask>0xFF</resetMask>
111024          <fields>
111025            <field>
111026              <name>RXAK</name>
111027              <description>Receive Acknowledge</description>
111028              <bitOffset>0</bitOffset>
111029              <bitWidth>1</bitWidth>
111030              <access>read-only</access>
111031              <enumeratedValues>
111032                <enumeratedValue>
111033                  <name>0</name>
111034                  <description>Acknowledge signal was received after the completion of one byte of data transmission on the bus</description>
111035                  <value>#0</value>
111036                </enumeratedValue>
111037                <enumeratedValue>
111038                  <name>1</name>
111039                  <description>No acknowledge signal detected</description>
111040                  <value>#1</value>
111041                </enumeratedValue>
111042              </enumeratedValues>
111043            </field>
111044            <field>
111045              <name>IICIF</name>
111046              <description>Interrupt Flag</description>
111047              <bitOffset>1</bitOffset>
111048              <bitWidth>1</bitWidth>
111049              <access>read-write</access>
111050              <enumeratedValues>
111051                <enumeratedValue>
111052                  <name>0</name>
111053                  <description>No interrupt pending</description>
111054                  <value>#0</value>
111055                </enumeratedValue>
111056                <enumeratedValue>
111057                  <name>1</name>
111058                  <description>Interrupt pending</description>
111059                  <value>#1</value>
111060                </enumeratedValue>
111061              </enumeratedValues>
111062            </field>
111063            <field>
111064              <name>SRW</name>
111065              <description>Slave Read/Write</description>
111066              <bitOffset>2</bitOffset>
111067              <bitWidth>1</bitWidth>
111068              <access>read-only</access>
111069              <enumeratedValues>
111070                <enumeratedValue>
111071                  <name>0</name>
111072                  <description>Slave receive, master writing to slave</description>
111073                  <value>#0</value>
111074                </enumeratedValue>
111075                <enumeratedValue>
111076                  <name>1</name>
111077                  <description>Slave transmit, master reading from slave</description>
111078                  <value>#1</value>
111079                </enumeratedValue>
111080              </enumeratedValues>
111081            </field>
111082            <field>
111083              <name>RAM</name>
111084              <description>Range Address Match</description>
111085              <bitOffset>3</bitOffset>
111086              <bitWidth>1</bitWidth>
111087              <access>read-write</access>
111088              <enumeratedValues>
111089                <enumeratedValue>
111090                  <name>0</name>
111091                  <description>Not addressed</description>
111092                  <value>#0</value>
111093                </enumeratedValue>
111094                <enumeratedValue>
111095                  <name>1</name>
111096                  <description>Addressed as a slave</description>
111097                  <value>#1</value>
111098                </enumeratedValue>
111099              </enumeratedValues>
111100            </field>
111101            <field>
111102              <name>ARBL</name>
111103              <description>Arbitration Lost</description>
111104              <bitOffset>4</bitOffset>
111105              <bitWidth>1</bitWidth>
111106              <access>read-write</access>
111107              <enumeratedValues>
111108                <enumeratedValue>
111109                  <name>0</name>
111110                  <description>Standard bus operation.</description>
111111                  <value>#0</value>
111112                </enumeratedValue>
111113                <enumeratedValue>
111114                  <name>1</name>
111115                  <description>Loss of arbitration.</description>
111116                  <value>#1</value>
111117                </enumeratedValue>
111118              </enumeratedValues>
111119            </field>
111120            <field>
111121              <name>BUSY</name>
111122              <description>Bus Busy</description>
111123              <bitOffset>5</bitOffset>
111124              <bitWidth>1</bitWidth>
111125              <access>read-only</access>
111126              <enumeratedValues>
111127                <enumeratedValue>
111128                  <name>0</name>
111129                  <description>Bus is idle</description>
111130                  <value>#0</value>
111131                </enumeratedValue>
111132                <enumeratedValue>
111133                  <name>1</name>
111134                  <description>Bus is busy</description>
111135                  <value>#1</value>
111136                </enumeratedValue>
111137              </enumeratedValues>
111138            </field>
111139            <field>
111140              <name>IAAS</name>
111141              <description>Addressed As A Slave</description>
111142              <bitOffset>6</bitOffset>
111143              <bitWidth>1</bitWidth>
111144              <access>read-write</access>
111145              <enumeratedValues>
111146                <enumeratedValue>
111147                  <name>0</name>
111148                  <description>Not addressed</description>
111149                  <value>#0</value>
111150                </enumeratedValue>
111151                <enumeratedValue>
111152                  <name>1</name>
111153                  <description>Addressed as a slave</description>
111154                  <value>#1</value>
111155                </enumeratedValue>
111156              </enumeratedValues>
111157            </field>
111158            <field>
111159              <name>TCF</name>
111160              <description>Transfer Complete Flag</description>
111161              <bitOffset>7</bitOffset>
111162              <bitWidth>1</bitWidth>
111163              <access>read-only</access>
111164              <enumeratedValues>
111165                <enumeratedValue>
111166                  <name>0</name>
111167                  <description>Transfer in progress</description>
111168                  <value>#0</value>
111169                </enumeratedValue>
111170                <enumeratedValue>
111171                  <name>1</name>
111172                  <description>Transfer complete</description>
111173                  <value>#1</value>
111174                </enumeratedValue>
111175              </enumeratedValues>
111176            </field>
111177          </fields>
111178        </register>
111179        <register>
111180          <name>D</name>
111181          <description>I2C Data I/O register</description>
111182          <addressOffset>0x4</addressOffset>
111183          <size>8</size>
111184          <access>read-write</access>
111185          <resetValue>0</resetValue>
111186          <resetMask>0xFF</resetMask>
111187          <fields>
111188            <field>
111189              <name>DATA</name>
111190              <description>Data</description>
111191              <bitOffset>0</bitOffset>
111192              <bitWidth>8</bitWidth>
111193              <access>read-write</access>
111194            </field>
111195          </fields>
111196        </register>
111197        <register>
111198          <name>C2</name>
111199          <description>I2C Control Register 2</description>
111200          <addressOffset>0x5</addressOffset>
111201          <size>8</size>
111202          <access>read-write</access>
111203          <resetValue>0</resetValue>
111204          <resetMask>0xFF</resetMask>
111205          <fields>
111206            <field>
111207              <name>AD</name>
111208              <description>Slave Address</description>
111209              <bitOffset>0</bitOffset>
111210              <bitWidth>3</bitWidth>
111211              <access>read-write</access>
111212            </field>
111213            <field>
111214              <name>RMEN</name>
111215              <description>Range Address Matching Enable</description>
111216              <bitOffset>3</bitOffset>
111217              <bitWidth>1</bitWidth>
111218              <access>read-write</access>
111219              <enumeratedValues>
111220                <enumeratedValue>
111221                  <name>0</name>
111222                  <description>Range mode disabled. No address matching occurs for an address within the range of values of the A1 and RA registers.</description>
111223                  <value>#0</value>
111224                </enumeratedValue>
111225                <enumeratedValue>
111226                  <name>1</name>
111227                  <description>Range mode enabled. Address matching occurs when a slave receives an address within the range of values of the A1 and RA registers.</description>
111228                  <value>#1</value>
111229                </enumeratedValue>
111230              </enumeratedValues>
111231            </field>
111232            <field>
111233              <name>SBRC</name>
111234              <description>Slave Baud Rate Control</description>
111235              <bitOffset>4</bitOffset>
111236              <bitWidth>1</bitWidth>
111237              <access>read-write</access>
111238              <enumeratedValues>
111239                <enumeratedValue>
111240                  <name>0</name>
111241                  <description>The slave baud rate follows the master baud rate and clock stretching may occur</description>
111242                  <value>#0</value>
111243                </enumeratedValue>
111244                <enumeratedValue>
111245                  <name>1</name>
111246                  <description>Slave baud rate is independent of the master baud rate</description>
111247                  <value>#1</value>
111248                </enumeratedValue>
111249              </enumeratedValues>
111250            </field>
111251            <field>
111252              <name>HDRS</name>
111253              <description>High Drive Select</description>
111254              <bitOffset>5</bitOffset>
111255              <bitWidth>1</bitWidth>
111256              <access>read-write</access>
111257              <enumeratedValues>
111258                <enumeratedValue>
111259                  <name>0</name>
111260                  <description>Normal drive mode</description>
111261                  <value>#0</value>
111262                </enumeratedValue>
111263                <enumeratedValue>
111264                  <name>1</name>
111265                  <description>High drive mode</description>
111266                  <value>#1</value>
111267                </enumeratedValue>
111268              </enumeratedValues>
111269            </field>
111270            <field>
111271              <name>ADEXT</name>
111272              <description>Address Extension</description>
111273              <bitOffset>6</bitOffset>
111274              <bitWidth>1</bitWidth>
111275              <access>read-write</access>
111276              <enumeratedValues>
111277                <enumeratedValue>
111278                  <name>0</name>
111279                  <description>7-bit address scheme</description>
111280                  <value>#0</value>
111281                </enumeratedValue>
111282                <enumeratedValue>
111283                  <name>1</name>
111284                  <description>10-bit address scheme</description>
111285                  <value>#1</value>
111286                </enumeratedValue>
111287              </enumeratedValues>
111288            </field>
111289            <field>
111290              <name>GCAEN</name>
111291              <description>General Call Address Enable</description>
111292              <bitOffset>7</bitOffset>
111293              <bitWidth>1</bitWidth>
111294              <access>read-write</access>
111295              <enumeratedValues>
111296                <enumeratedValue>
111297                  <name>0</name>
111298                  <description>Disabled</description>
111299                  <value>#0</value>
111300                </enumeratedValue>
111301                <enumeratedValue>
111302                  <name>1</name>
111303                  <description>Enabled</description>
111304                  <value>#1</value>
111305                </enumeratedValue>
111306              </enumeratedValues>
111307            </field>
111308          </fields>
111309        </register>
111310        <register>
111311          <name>FLT</name>
111312          <description>I2C Programmable Input Glitch Filter Register</description>
111313          <addressOffset>0x6</addressOffset>
111314          <size>8</size>
111315          <access>read-write</access>
111316          <resetValue>0</resetValue>
111317          <resetMask>0xFF</resetMask>
111318          <fields>
111319            <field>
111320              <name>FLT</name>
111321              <description>I2C Programmable Filter Factor</description>
111322              <bitOffset>0</bitOffset>
111323              <bitWidth>4</bitWidth>
111324              <access>read-write</access>
111325              <enumeratedValues>
111326                <enumeratedValue>
111327                  <name>0</name>
111328                  <description>No filter/bypass</description>
111329                  <value>#0000</value>
111330                </enumeratedValue>
111331              </enumeratedValues>
111332            </field>
111333            <field>
111334              <name>STARTF</name>
111335              <description>I2C Bus Start Detect Flag</description>
111336              <bitOffset>4</bitOffset>
111337              <bitWidth>1</bitWidth>
111338              <access>read-write</access>
111339              <enumeratedValues>
111340                <enumeratedValue>
111341                  <name>0</name>
111342                  <description>No start happens on I2C bus</description>
111343                  <value>#0</value>
111344                </enumeratedValue>
111345                <enumeratedValue>
111346                  <name>1</name>
111347                  <description>Start detected on I2C bus</description>
111348                  <value>#1</value>
111349                </enumeratedValue>
111350              </enumeratedValues>
111351            </field>
111352            <field>
111353              <name>SSIE</name>
111354              <description>I2C Bus Stop or Start Interrupt Enable</description>
111355              <bitOffset>5</bitOffset>
111356              <bitWidth>1</bitWidth>
111357              <access>read-write</access>
111358              <enumeratedValues>
111359                <enumeratedValue>
111360                  <name>0</name>
111361                  <description>Stop or start detection interrupt is disabled</description>
111362                  <value>#0</value>
111363                </enumeratedValue>
111364                <enumeratedValue>
111365                  <name>1</name>
111366                  <description>Stop or start detection interrupt is enabled</description>
111367                  <value>#1</value>
111368                </enumeratedValue>
111369              </enumeratedValues>
111370            </field>
111371            <field>
111372              <name>STOPF</name>
111373              <description>I2C Bus Stop Detect Flag</description>
111374              <bitOffset>6</bitOffset>
111375              <bitWidth>1</bitWidth>
111376              <access>read-write</access>
111377              <enumeratedValues>
111378                <enumeratedValue>
111379                  <name>0</name>
111380                  <description>No stop happens on I2C bus</description>
111381                  <value>#0</value>
111382                </enumeratedValue>
111383                <enumeratedValue>
111384                  <name>1</name>
111385                  <description>Stop detected on I2C bus</description>
111386                  <value>#1</value>
111387                </enumeratedValue>
111388              </enumeratedValues>
111389            </field>
111390            <field>
111391              <name>SHEN</name>
111392              <description>Stop Hold Enable</description>
111393              <bitOffset>7</bitOffset>
111394              <bitWidth>1</bitWidth>
111395              <access>read-write</access>
111396              <enumeratedValues>
111397                <enumeratedValue>
111398                  <name>0</name>
111399                  <description>Stop holdoff is disabled. The MCU&apos;s entry to stop mode is not gated.</description>
111400                  <value>#0</value>
111401                </enumeratedValue>
111402                <enumeratedValue>
111403                  <name>1</name>
111404                  <description>Stop holdoff is enabled.</description>
111405                  <value>#1</value>
111406                </enumeratedValue>
111407              </enumeratedValues>
111408            </field>
111409          </fields>
111410        </register>
111411        <register>
111412          <name>RA</name>
111413          <description>I2C Range Address register</description>
111414          <addressOffset>0x7</addressOffset>
111415          <size>8</size>
111416          <access>read-write</access>
111417          <resetValue>0</resetValue>
111418          <resetMask>0xFF</resetMask>
111419          <fields>
111420            <field>
111421              <name>RAD</name>
111422              <description>Range Slave Address</description>
111423              <bitOffset>1</bitOffset>
111424              <bitWidth>7</bitWidth>
111425              <access>read-write</access>
111426            </field>
111427          </fields>
111428        </register>
111429        <register>
111430          <name>SMB</name>
111431          <description>I2C SMBus Control and Status register</description>
111432          <addressOffset>0x8</addressOffset>
111433          <size>8</size>
111434          <access>read-write</access>
111435          <resetValue>0</resetValue>
111436          <resetMask>0xFF</resetMask>
111437          <fields>
111438            <field>
111439              <name>SHTF2IE</name>
111440              <description>SHTF2 Interrupt Enable</description>
111441              <bitOffset>0</bitOffset>
111442              <bitWidth>1</bitWidth>
111443              <access>read-write</access>
111444              <enumeratedValues>
111445                <enumeratedValue>
111446                  <name>0</name>
111447                  <description>SHTF2 interrupt is disabled</description>
111448                  <value>#0</value>
111449                </enumeratedValue>
111450                <enumeratedValue>
111451                  <name>1</name>
111452                  <description>SHTF2 interrupt is enabled</description>
111453                  <value>#1</value>
111454                </enumeratedValue>
111455              </enumeratedValues>
111456            </field>
111457            <field>
111458              <name>SHTF2</name>
111459              <description>SCL High Timeout Flag 2</description>
111460              <bitOffset>1</bitOffset>
111461              <bitWidth>1</bitWidth>
111462              <access>read-write</access>
111463              <enumeratedValues>
111464                <enumeratedValue>
111465                  <name>0</name>
111466                  <description>No SCL high and SDA low timeout occurs</description>
111467                  <value>#0</value>
111468                </enumeratedValue>
111469                <enumeratedValue>
111470                  <name>1</name>
111471                  <description>SCL high and SDA low timeout occurs</description>
111472                  <value>#1</value>
111473                </enumeratedValue>
111474              </enumeratedValues>
111475            </field>
111476            <field>
111477              <name>SHTF1</name>
111478              <description>SCL High Timeout Flag 1</description>
111479              <bitOffset>2</bitOffset>
111480              <bitWidth>1</bitWidth>
111481              <access>read-only</access>
111482              <enumeratedValues>
111483                <enumeratedValue>
111484                  <name>0</name>
111485                  <description>No SCL high and SDA high timeout occurs</description>
111486                  <value>#0</value>
111487                </enumeratedValue>
111488                <enumeratedValue>
111489                  <name>1</name>
111490                  <description>SCL high and SDA high timeout occurs</description>
111491                  <value>#1</value>
111492                </enumeratedValue>
111493              </enumeratedValues>
111494            </field>
111495            <field>
111496              <name>SLTF</name>
111497              <description>SCL Low Timeout Flag</description>
111498              <bitOffset>3</bitOffset>
111499              <bitWidth>1</bitWidth>
111500              <access>read-write</access>
111501              <enumeratedValues>
111502                <enumeratedValue>
111503                  <name>0</name>
111504                  <description>No low timeout occurs</description>
111505                  <value>#0</value>
111506                </enumeratedValue>
111507                <enumeratedValue>
111508                  <name>1</name>
111509                  <description>Low timeout occurs</description>
111510                  <value>#1</value>
111511                </enumeratedValue>
111512              </enumeratedValues>
111513            </field>
111514            <field>
111515              <name>TCKSEL</name>
111516              <description>Timeout Counter Clock Select</description>
111517              <bitOffset>4</bitOffset>
111518              <bitWidth>1</bitWidth>
111519              <access>read-write</access>
111520              <enumeratedValues>
111521                <enumeratedValue>
111522                  <name>0</name>
111523                  <description>Timeout counter counts at the frequency of the I2C module clock / 64</description>
111524                  <value>#0</value>
111525                </enumeratedValue>
111526                <enumeratedValue>
111527                  <name>1</name>
111528                  <description>Timeout counter counts at the frequency of the I2C module clock</description>
111529                  <value>#1</value>
111530                </enumeratedValue>
111531              </enumeratedValues>
111532            </field>
111533            <field>
111534              <name>SIICAEN</name>
111535              <description>Second I2C Address Enable</description>
111536              <bitOffset>5</bitOffset>
111537              <bitWidth>1</bitWidth>
111538              <access>read-write</access>
111539              <enumeratedValues>
111540                <enumeratedValue>
111541                  <name>0</name>
111542                  <description>I2C address register 2 matching is disabled</description>
111543                  <value>#0</value>
111544                </enumeratedValue>
111545                <enumeratedValue>
111546                  <name>1</name>
111547                  <description>I2C address register 2 matching is enabled</description>
111548                  <value>#1</value>
111549                </enumeratedValue>
111550              </enumeratedValues>
111551            </field>
111552            <field>
111553              <name>ALERTEN</name>
111554              <description>SMBus Alert Response Address Enable</description>
111555              <bitOffset>6</bitOffset>
111556              <bitWidth>1</bitWidth>
111557              <access>read-write</access>
111558              <enumeratedValues>
111559                <enumeratedValue>
111560                  <name>0</name>
111561                  <description>SMBus alert response address matching is disabled</description>
111562                  <value>#0</value>
111563                </enumeratedValue>
111564                <enumeratedValue>
111565                  <name>1</name>
111566                  <description>SMBus alert response address matching is enabled</description>
111567                  <value>#1</value>
111568                </enumeratedValue>
111569              </enumeratedValues>
111570            </field>
111571            <field>
111572              <name>FACK</name>
111573              <description>Fast NACK/ACK Enable</description>
111574              <bitOffset>7</bitOffset>
111575              <bitWidth>1</bitWidth>
111576              <access>read-write</access>
111577              <enumeratedValues>
111578                <enumeratedValue>
111579                  <name>0</name>
111580                  <description>An ACK or NACK is sent on the following receiving data byte</description>
111581                  <value>#0</value>
111582                </enumeratedValue>
111583                <enumeratedValue>
111584                  <name>1</name>
111585                  <description>Writing 0 to TXAK after receiving a data byte generates an ACK. Writing 1 to TXAK after receiving a data byte generates a NACK.</description>
111586                  <value>#1</value>
111587                </enumeratedValue>
111588              </enumeratedValues>
111589            </field>
111590          </fields>
111591        </register>
111592        <register>
111593          <name>A2</name>
111594          <description>I2C Address Register 2</description>
111595          <addressOffset>0x9</addressOffset>
111596          <size>8</size>
111597          <access>read-write</access>
111598          <resetValue>0xC2</resetValue>
111599          <resetMask>0xFF</resetMask>
111600          <fields>
111601            <field>
111602              <name>SAD</name>
111603              <description>SMBus Address</description>
111604              <bitOffset>1</bitOffset>
111605              <bitWidth>7</bitWidth>
111606              <access>read-write</access>
111607            </field>
111608          </fields>
111609        </register>
111610        <register>
111611          <name>SLTH</name>
111612          <description>I2C SCL Low Timeout Register High</description>
111613          <addressOffset>0xA</addressOffset>
111614          <size>8</size>
111615          <access>read-write</access>
111616          <resetValue>0</resetValue>
111617          <resetMask>0xFF</resetMask>
111618          <fields>
111619            <field>
111620              <name>SSLT</name>
111621              <description>SSLT[15:8]</description>
111622              <bitOffset>0</bitOffset>
111623              <bitWidth>8</bitWidth>
111624              <access>read-write</access>
111625            </field>
111626          </fields>
111627        </register>
111628        <register>
111629          <name>SLTL</name>
111630          <description>I2C SCL Low Timeout Register Low</description>
111631          <addressOffset>0xB</addressOffset>
111632          <size>8</size>
111633          <access>read-write</access>
111634          <resetValue>0</resetValue>
111635          <resetMask>0xFF</resetMask>
111636          <fields>
111637            <field>
111638              <name>SSLT</name>
111639              <description>SSLT[7:0]</description>
111640              <bitOffset>0</bitOffset>
111641              <bitWidth>8</bitWidth>
111642              <access>read-write</access>
111643            </field>
111644          </fields>
111645        </register>
111646        <register>
111647          <name>S2</name>
111648          <description>I2C Status register 2</description>
111649          <addressOffset>0xC</addressOffset>
111650          <size>8</size>
111651          <access>read-write</access>
111652          <resetValue>0x1</resetValue>
111653          <resetMask>0xFF</resetMask>
111654          <fields>
111655            <field>
111656              <name>EMPTY</name>
111657              <description>Empty flag</description>
111658              <bitOffset>0</bitOffset>
111659              <bitWidth>1</bitWidth>
111660              <access>read-only</access>
111661              <enumeratedValues>
111662                <enumeratedValue>
111663                  <name>0</name>
111664                  <description>Tx or Rx buffer is not empty and cannot be written to, that is new data cannot be loaded into the buffer.</description>
111665                  <value>#0</value>
111666                </enumeratedValue>
111667                <enumeratedValue>
111668                  <name>1</name>
111669                  <description>Tx or Rx buffer is empty and can be written to, that is new data can be loaded into the buffer.</description>
111670                  <value>#1</value>
111671                </enumeratedValue>
111672              </enumeratedValues>
111673            </field>
111674            <field>
111675              <name>ERROR</name>
111676              <description>Error flag</description>
111677              <bitOffset>1</bitOffset>
111678              <bitWidth>1</bitWidth>
111679              <access>read-write</access>
111680              <enumeratedValues>
111681                <enumeratedValue>
111682                  <name>0</name>
111683                  <description>The buffer is not full and all write/read operations have no errors.</description>
111684                  <value>#0</value>
111685                </enumeratedValue>
111686                <enumeratedValue>
111687                  <name>1</name>
111688                  <description>There are 3 or more write/read errors during the data transfer phase (when the Empty flag is not set and the buffer is busy).</description>
111689                  <value>#1</value>
111690                </enumeratedValue>
111691              </enumeratedValues>
111692            </field>
111693          </fields>
111694        </register>
111695      </registers>
111696    </peripheral>
111697    <peripheral>
111698      <name>I2C3</name>
111699      <description>Inter-Integrated Circuit</description>
111700      <groupName>I2C</groupName>
111701      <prependToName>I2C3_</prependToName>
111702      <baseAddress>0x400E7000</baseAddress>
111703      <addressBlock>
111704        <offset>0</offset>
111705        <size>0xD</size>
111706        <usage>registers</usage>
111707      </addressBlock>
111708      <interrupt>
111709        <name>I2C3</name>
111710        <value>91</value>
111711      </interrupt>
111712      <registers>
111713        <register>
111714          <name>A1</name>
111715          <description>I2C Address Register 1</description>
111716          <addressOffset>0</addressOffset>
111717          <size>8</size>
111718          <access>read-write</access>
111719          <resetValue>0</resetValue>
111720          <resetMask>0xFF</resetMask>
111721          <fields>
111722            <field>
111723              <name>AD</name>
111724              <description>Address</description>
111725              <bitOffset>1</bitOffset>
111726              <bitWidth>7</bitWidth>
111727              <access>read-write</access>
111728            </field>
111729          </fields>
111730        </register>
111731        <register>
111732          <name>F</name>
111733          <description>I2C Frequency Divider register</description>
111734          <addressOffset>0x1</addressOffset>
111735          <size>8</size>
111736          <access>read-write</access>
111737          <resetValue>0</resetValue>
111738          <resetMask>0xFF</resetMask>
111739          <fields>
111740            <field>
111741              <name>ICR</name>
111742              <description>ClockRate</description>
111743              <bitOffset>0</bitOffset>
111744              <bitWidth>6</bitWidth>
111745              <access>read-write</access>
111746            </field>
111747            <field>
111748              <name>MULT</name>
111749              <description>Multiplier Factor</description>
111750              <bitOffset>6</bitOffset>
111751              <bitWidth>2</bitWidth>
111752              <access>read-write</access>
111753              <enumeratedValues>
111754                <enumeratedValue>
111755                  <name>00</name>
111756                  <description>mul = 1</description>
111757                  <value>#00</value>
111758                </enumeratedValue>
111759                <enumeratedValue>
111760                  <name>01</name>
111761                  <description>mul = 2</description>
111762                  <value>#01</value>
111763                </enumeratedValue>
111764                <enumeratedValue>
111765                  <name>10</name>
111766                  <description>mul = 4</description>
111767                  <value>#10</value>
111768                </enumeratedValue>
111769              </enumeratedValues>
111770            </field>
111771          </fields>
111772        </register>
111773        <register>
111774          <name>C1</name>
111775          <description>I2C Control Register 1</description>
111776          <addressOffset>0x2</addressOffset>
111777          <size>8</size>
111778          <access>read-write</access>
111779          <resetValue>0</resetValue>
111780          <resetMask>0xFF</resetMask>
111781          <fields>
111782            <field>
111783              <name>DMAEN</name>
111784              <description>DMA Enable</description>
111785              <bitOffset>0</bitOffset>
111786              <bitWidth>1</bitWidth>
111787              <access>read-write</access>
111788              <enumeratedValues>
111789                <enumeratedValue>
111790                  <name>0</name>
111791                  <description>All DMA signalling disabled.</description>
111792                  <value>#0</value>
111793                </enumeratedValue>
111794                <enumeratedValue>
111795                  <name>1</name>
111796                  <description>DMA transfer is enabled. While SMB[FACK] = 0, the following conditions trigger the DMA request: a data byte is received, and either address or data is transmitted. (ACK/NACK is automatic) the first byte received matches the A1 register or is a general call address. If any address matching occurs, S[IAAS] and S[TCF] are set. If the direction of transfer is known from master to slave, then it is not required to check S[SRW]. With this assumption, DMA can also be used in this case. In other cases, if the master reads data from the slave, then it is required to rewrite the C1 register operation. With this assumption, DMA cannot be used. When FACK = 1, an address or a data byte is transmitted.</description>
111797                  <value>#1</value>
111798                </enumeratedValue>
111799              </enumeratedValues>
111800            </field>
111801            <field>
111802              <name>WUEN</name>
111803              <description>Wakeup Enable</description>
111804              <bitOffset>1</bitOffset>
111805              <bitWidth>1</bitWidth>
111806              <access>read-write</access>
111807              <enumeratedValues>
111808                <enumeratedValue>
111809                  <name>0</name>
111810                  <description>Normal operation. No interrupt generated when address matching in low power mode.</description>
111811                  <value>#0</value>
111812                </enumeratedValue>
111813                <enumeratedValue>
111814                  <name>1</name>
111815                  <description>Enables the wakeup function in low power mode.</description>
111816                  <value>#1</value>
111817                </enumeratedValue>
111818              </enumeratedValues>
111819            </field>
111820            <field>
111821              <name>RSTA</name>
111822              <description>Repeat START</description>
111823              <bitOffset>2</bitOffset>
111824              <bitWidth>1</bitWidth>
111825              <access>write-only</access>
111826            </field>
111827            <field>
111828              <name>TXAK</name>
111829              <description>Transmit Acknowledge Enable</description>
111830              <bitOffset>3</bitOffset>
111831              <bitWidth>1</bitWidth>
111832              <access>read-write</access>
111833              <enumeratedValues>
111834                <enumeratedValue>
111835                  <name>0</name>
111836                  <description>An acknowledge signal is sent to the bus on the following receiving byte (if FACK is cleared) or the current receiving byte (if FACK is set).</description>
111837                  <value>#0</value>
111838                </enumeratedValue>
111839                <enumeratedValue>
111840                  <name>1</name>
111841                  <description>No acknowledge signal is sent to the bus on the following receiving data byte (if FACK is cleared) or the current receiving data byte (if FACK is set).</description>
111842                  <value>#1</value>
111843                </enumeratedValue>
111844              </enumeratedValues>
111845            </field>
111846            <field>
111847              <name>TX</name>
111848              <description>Transmit Mode Select</description>
111849              <bitOffset>4</bitOffset>
111850              <bitWidth>1</bitWidth>
111851              <access>read-write</access>
111852              <enumeratedValues>
111853                <enumeratedValue>
111854                  <name>0</name>
111855                  <description>Receive</description>
111856                  <value>#0</value>
111857                </enumeratedValue>
111858                <enumeratedValue>
111859                  <name>1</name>
111860                  <description>Transmit</description>
111861                  <value>#1</value>
111862                </enumeratedValue>
111863              </enumeratedValues>
111864            </field>
111865            <field>
111866              <name>MST</name>
111867              <description>Master Mode Select</description>
111868              <bitOffset>5</bitOffset>
111869              <bitWidth>1</bitWidth>
111870              <access>read-write</access>
111871              <enumeratedValues>
111872                <enumeratedValue>
111873                  <name>0</name>
111874                  <description>Slave mode</description>
111875                  <value>#0</value>
111876                </enumeratedValue>
111877                <enumeratedValue>
111878                  <name>1</name>
111879                  <description>Master mode</description>
111880                  <value>#1</value>
111881                </enumeratedValue>
111882              </enumeratedValues>
111883            </field>
111884            <field>
111885              <name>IICIE</name>
111886              <description>I2C Interrupt Enable</description>
111887              <bitOffset>6</bitOffset>
111888              <bitWidth>1</bitWidth>
111889              <access>read-write</access>
111890              <enumeratedValues>
111891                <enumeratedValue>
111892                  <name>0</name>
111893                  <description>Disabled</description>
111894                  <value>#0</value>
111895                </enumeratedValue>
111896                <enumeratedValue>
111897                  <name>1</name>
111898                  <description>Enabled</description>
111899                  <value>#1</value>
111900                </enumeratedValue>
111901              </enumeratedValues>
111902            </field>
111903            <field>
111904              <name>IICEN</name>
111905              <description>I2C Enable</description>
111906              <bitOffset>7</bitOffset>
111907              <bitWidth>1</bitWidth>
111908              <access>read-write</access>
111909              <enumeratedValues>
111910                <enumeratedValue>
111911                  <name>0</name>
111912                  <description>Disabled</description>
111913                  <value>#0</value>
111914                </enumeratedValue>
111915                <enumeratedValue>
111916                  <name>1</name>
111917                  <description>Enabled</description>
111918                  <value>#1</value>
111919                </enumeratedValue>
111920              </enumeratedValues>
111921            </field>
111922          </fields>
111923        </register>
111924        <register>
111925          <name>S</name>
111926          <description>I2C Status register</description>
111927          <addressOffset>0x3</addressOffset>
111928          <size>8</size>
111929          <access>read-write</access>
111930          <resetValue>0x80</resetValue>
111931          <resetMask>0xFF</resetMask>
111932          <fields>
111933            <field>
111934              <name>RXAK</name>
111935              <description>Receive Acknowledge</description>
111936              <bitOffset>0</bitOffset>
111937              <bitWidth>1</bitWidth>
111938              <access>read-only</access>
111939              <enumeratedValues>
111940                <enumeratedValue>
111941                  <name>0</name>
111942                  <description>Acknowledge signal was received after the completion of one byte of data transmission on the bus</description>
111943                  <value>#0</value>
111944                </enumeratedValue>
111945                <enumeratedValue>
111946                  <name>1</name>
111947                  <description>No acknowledge signal detected</description>
111948                  <value>#1</value>
111949                </enumeratedValue>
111950              </enumeratedValues>
111951            </field>
111952            <field>
111953              <name>IICIF</name>
111954              <description>Interrupt Flag</description>
111955              <bitOffset>1</bitOffset>
111956              <bitWidth>1</bitWidth>
111957              <access>read-write</access>
111958              <enumeratedValues>
111959                <enumeratedValue>
111960                  <name>0</name>
111961                  <description>No interrupt pending</description>
111962                  <value>#0</value>
111963                </enumeratedValue>
111964                <enumeratedValue>
111965                  <name>1</name>
111966                  <description>Interrupt pending</description>
111967                  <value>#1</value>
111968                </enumeratedValue>
111969              </enumeratedValues>
111970            </field>
111971            <field>
111972              <name>SRW</name>
111973              <description>Slave Read/Write</description>
111974              <bitOffset>2</bitOffset>
111975              <bitWidth>1</bitWidth>
111976              <access>read-only</access>
111977              <enumeratedValues>
111978                <enumeratedValue>
111979                  <name>0</name>
111980                  <description>Slave receive, master writing to slave</description>
111981                  <value>#0</value>
111982                </enumeratedValue>
111983                <enumeratedValue>
111984                  <name>1</name>
111985                  <description>Slave transmit, master reading from slave</description>
111986                  <value>#1</value>
111987                </enumeratedValue>
111988              </enumeratedValues>
111989            </field>
111990            <field>
111991              <name>RAM</name>
111992              <description>Range Address Match</description>
111993              <bitOffset>3</bitOffset>
111994              <bitWidth>1</bitWidth>
111995              <access>read-write</access>
111996              <enumeratedValues>
111997                <enumeratedValue>
111998                  <name>0</name>
111999                  <description>Not addressed</description>
112000                  <value>#0</value>
112001                </enumeratedValue>
112002                <enumeratedValue>
112003                  <name>1</name>
112004                  <description>Addressed as a slave</description>
112005                  <value>#1</value>
112006                </enumeratedValue>
112007              </enumeratedValues>
112008            </field>
112009            <field>
112010              <name>ARBL</name>
112011              <description>Arbitration Lost</description>
112012              <bitOffset>4</bitOffset>
112013              <bitWidth>1</bitWidth>
112014              <access>read-write</access>
112015              <enumeratedValues>
112016                <enumeratedValue>
112017                  <name>0</name>
112018                  <description>Standard bus operation.</description>
112019                  <value>#0</value>
112020                </enumeratedValue>
112021                <enumeratedValue>
112022                  <name>1</name>
112023                  <description>Loss of arbitration.</description>
112024                  <value>#1</value>
112025                </enumeratedValue>
112026              </enumeratedValues>
112027            </field>
112028            <field>
112029              <name>BUSY</name>
112030              <description>Bus Busy</description>
112031              <bitOffset>5</bitOffset>
112032              <bitWidth>1</bitWidth>
112033              <access>read-only</access>
112034              <enumeratedValues>
112035                <enumeratedValue>
112036                  <name>0</name>
112037                  <description>Bus is idle</description>
112038                  <value>#0</value>
112039                </enumeratedValue>
112040                <enumeratedValue>
112041                  <name>1</name>
112042                  <description>Bus is busy</description>
112043                  <value>#1</value>
112044                </enumeratedValue>
112045              </enumeratedValues>
112046            </field>
112047            <field>
112048              <name>IAAS</name>
112049              <description>Addressed As A Slave</description>
112050              <bitOffset>6</bitOffset>
112051              <bitWidth>1</bitWidth>
112052              <access>read-write</access>
112053              <enumeratedValues>
112054                <enumeratedValue>
112055                  <name>0</name>
112056                  <description>Not addressed</description>
112057                  <value>#0</value>
112058                </enumeratedValue>
112059                <enumeratedValue>
112060                  <name>1</name>
112061                  <description>Addressed as a slave</description>
112062                  <value>#1</value>
112063                </enumeratedValue>
112064              </enumeratedValues>
112065            </field>
112066            <field>
112067              <name>TCF</name>
112068              <description>Transfer Complete Flag</description>
112069              <bitOffset>7</bitOffset>
112070              <bitWidth>1</bitWidth>
112071              <access>read-only</access>
112072              <enumeratedValues>
112073                <enumeratedValue>
112074                  <name>0</name>
112075                  <description>Transfer in progress</description>
112076                  <value>#0</value>
112077                </enumeratedValue>
112078                <enumeratedValue>
112079                  <name>1</name>
112080                  <description>Transfer complete</description>
112081                  <value>#1</value>
112082                </enumeratedValue>
112083              </enumeratedValues>
112084            </field>
112085          </fields>
112086        </register>
112087        <register>
112088          <name>D</name>
112089          <description>I2C Data I/O register</description>
112090          <addressOffset>0x4</addressOffset>
112091          <size>8</size>
112092          <access>read-write</access>
112093          <resetValue>0</resetValue>
112094          <resetMask>0xFF</resetMask>
112095          <fields>
112096            <field>
112097              <name>DATA</name>
112098              <description>Data</description>
112099              <bitOffset>0</bitOffset>
112100              <bitWidth>8</bitWidth>
112101              <access>read-write</access>
112102            </field>
112103          </fields>
112104        </register>
112105        <register>
112106          <name>C2</name>
112107          <description>I2C Control Register 2</description>
112108          <addressOffset>0x5</addressOffset>
112109          <size>8</size>
112110          <access>read-write</access>
112111          <resetValue>0</resetValue>
112112          <resetMask>0xFF</resetMask>
112113          <fields>
112114            <field>
112115              <name>AD</name>
112116              <description>Slave Address</description>
112117              <bitOffset>0</bitOffset>
112118              <bitWidth>3</bitWidth>
112119              <access>read-write</access>
112120            </field>
112121            <field>
112122              <name>RMEN</name>
112123              <description>Range Address Matching Enable</description>
112124              <bitOffset>3</bitOffset>
112125              <bitWidth>1</bitWidth>
112126              <access>read-write</access>
112127              <enumeratedValues>
112128                <enumeratedValue>
112129                  <name>0</name>
112130                  <description>Range mode disabled. No address matching occurs for an address within the range of values of the A1 and RA registers.</description>
112131                  <value>#0</value>
112132                </enumeratedValue>
112133                <enumeratedValue>
112134                  <name>1</name>
112135                  <description>Range mode enabled. Address matching occurs when a slave receives an address within the range of values of the A1 and RA registers.</description>
112136                  <value>#1</value>
112137                </enumeratedValue>
112138              </enumeratedValues>
112139            </field>
112140            <field>
112141              <name>SBRC</name>
112142              <description>Slave Baud Rate Control</description>
112143              <bitOffset>4</bitOffset>
112144              <bitWidth>1</bitWidth>
112145              <access>read-write</access>
112146              <enumeratedValues>
112147                <enumeratedValue>
112148                  <name>0</name>
112149                  <description>The slave baud rate follows the master baud rate and clock stretching may occur</description>
112150                  <value>#0</value>
112151                </enumeratedValue>
112152                <enumeratedValue>
112153                  <name>1</name>
112154                  <description>Slave baud rate is independent of the master baud rate</description>
112155                  <value>#1</value>
112156                </enumeratedValue>
112157              </enumeratedValues>
112158            </field>
112159            <field>
112160              <name>HDRS</name>
112161              <description>High Drive Select</description>
112162              <bitOffset>5</bitOffset>
112163              <bitWidth>1</bitWidth>
112164              <access>read-write</access>
112165              <enumeratedValues>
112166                <enumeratedValue>
112167                  <name>0</name>
112168                  <description>Normal drive mode</description>
112169                  <value>#0</value>
112170                </enumeratedValue>
112171                <enumeratedValue>
112172                  <name>1</name>
112173                  <description>High drive mode</description>
112174                  <value>#1</value>
112175                </enumeratedValue>
112176              </enumeratedValues>
112177            </field>
112178            <field>
112179              <name>ADEXT</name>
112180              <description>Address Extension</description>
112181              <bitOffset>6</bitOffset>
112182              <bitWidth>1</bitWidth>
112183              <access>read-write</access>
112184              <enumeratedValues>
112185                <enumeratedValue>
112186                  <name>0</name>
112187                  <description>7-bit address scheme</description>
112188                  <value>#0</value>
112189                </enumeratedValue>
112190                <enumeratedValue>
112191                  <name>1</name>
112192                  <description>10-bit address scheme</description>
112193                  <value>#1</value>
112194                </enumeratedValue>
112195              </enumeratedValues>
112196            </field>
112197            <field>
112198              <name>GCAEN</name>
112199              <description>General Call Address Enable</description>
112200              <bitOffset>7</bitOffset>
112201              <bitWidth>1</bitWidth>
112202              <access>read-write</access>
112203              <enumeratedValues>
112204                <enumeratedValue>
112205                  <name>0</name>
112206                  <description>Disabled</description>
112207                  <value>#0</value>
112208                </enumeratedValue>
112209                <enumeratedValue>
112210                  <name>1</name>
112211                  <description>Enabled</description>
112212                  <value>#1</value>
112213                </enumeratedValue>
112214              </enumeratedValues>
112215            </field>
112216          </fields>
112217        </register>
112218        <register>
112219          <name>FLT</name>
112220          <description>I2C Programmable Input Glitch Filter Register</description>
112221          <addressOffset>0x6</addressOffset>
112222          <size>8</size>
112223          <access>read-write</access>
112224          <resetValue>0</resetValue>
112225          <resetMask>0xFF</resetMask>
112226          <fields>
112227            <field>
112228              <name>FLT</name>
112229              <description>I2C Programmable Filter Factor</description>
112230              <bitOffset>0</bitOffset>
112231              <bitWidth>4</bitWidth>
112232              <access>read-write</access>
112233              <enumeratedValues>
112234                <enumeratedValue>
112235                  <name>0</name>
112236                  <description>No filter/bypass</description>
112237                  <value>#0000</value>
112238                </enumeratedValue>
112239              </enumeratedValues>
112240            </field>
112241            <field>
112242              <name>STARTF</name>
112243              <description>I2C Bus Start Detect Flag</description>
112244              <bitOffset>4</bitOffset>
112245              <bitWidth>1</bitWidth>
112246              <access>read-write</access>
112247              <enumeratedValues>
112248                <enumeratedValue>
112249                  <name>0</name>
112250                  <description>No start happens on I2C bus</description>
112251                  <value>#0</value>
112252                </enumeratedValue>
112253                <enumeratedValue>
112254                  <name>1</name>
112255                  <description>Start detected on I2C bus</description>
112256                  <value>#1</value>
112257                </enumeratedValue>
112258              </enumeratedValues>
112259            </field>
112260            <field>
112261              <name>SSIE</name>
112262              <description>I2C Bus Stop or Start Interrupt Enable</description>
112263              <bitOffset>5</bitOffset>
112264              <bitWidth>1</bitWidth>
112265              <access>read-write</access>
112266              <enumeratedValues>
112267                <enumeratedValue>
112268                  <name>0</name>
112269                  <description>Stop or start detection interrupt is disabled</description>
112270                  <value>#0</value>
112271                </enumeratedValue>
112272                <enumeratedValue>
112273                  <name>1</name>
112274                  <description>Stop or start detection interrupt is enabled</description>
112275                  <value>#1</value>
112276                </enumeratedValue>
112277              </enumeratedValues>
112278            </field>
112279            <field>
112280              <name>STOPF</name>
112281              <description>I2C Bus Stop Detect Flag</description>
112282              <bitOffset>6</bitOffset>
112283              <bitWidth>1</bitWidth>
112284              <access>read-write</access>
112285              <enumeratedValues>
112286                <enumeratedValue>
112287                  <name>0</name>
112288                  <description>No stop happens on I2C bus</description>
112289                  <value>#0</value>
112290                </enumeratedValue>
112291                <enumeratedValue>
112292                  <name>1</name>
112293                  <description>Stop detected on I2C bus</description>
112294                  <value>#1</value>
112295                </enumeratedValue>
112296              </enumeratedValues>
112297            </field>
112298            <field>
112299              <name>SHEN</name>
112300              <description>Stop Hold Enable</description>
112301              <bitOffset>7</bitOffset>
112302              <bitWidth>1</bitWidth>
112303              <access>read-write</access>
112304              <enumeratedValues>
112305                <enumeratedValue>
112306                  <name>0</name>
112307                  <description>Stop holdoff is disabled. The MCU&apos;s entry to stop mode is not gated.</description>
112308                  <value>#0</value>
112309                </enumeratedValue>
112310                <enumeratedValue>
112311                  <name>1</name>
112312                  <description>Stop holdoff is enabled.</description>
112313                  <value>#1</value>
112314                </enumeratedValue>
112315              </enumeratedValues>
112316            </field>
112317          </fields>
112318        </register>
112319        <register>
112320          <name>RA</name>
112321          <description>I2C Range Address register</description>
112322          <addressOffset>0x7</addressOffset>
112323          <size>8</size>
112324          <access>read-write</access>
112325          <resetValue>0</resetValue>
112326          <resetMask>0xFF</resetMask>
112327          <fields>
112328            <field>
112329              <name>RAD</name>
112330              <description>Range Slave Address</description>
112331              <bitOffset>1</bitOffset>
112332              <bitWidth>7</bitWidth>
112333              <access>read-write</access>
112334            </field>
112335          </fields>
112336        </register>
112337        <register>
112338          <name>SMB</name>
112339          <description>I2C SMBus Control and Status register</description>
112340          <addressOffset>0x8</addressOffset>
112341          <size>8</size>
112342          <access>read-write</access>
112343          <resetValue>0</resetValue>
112344          <resetMask>0xFF</resetMask>
112345          <fields>
112346            <field>
112347              <name>SHTF2IE</name>
112348              <description>SHTF2 Interrupt Enable</description>
112349              <bitOffset>0</bitOffset>
112350              <bitWidth>1</bitWidth>
112351              <access>read-write</access>
112352              <enumeratedValues>
112353                <enumeratedValue>
112354                  <name>0</name>
112355                  <description>SHTF2 interrupt is disabled</description>
112356                  <value>#0</value>
112357                </enumeratedValue>
112358                <enumeratedValue>
112359                  <name>1</name>
112360                  <description>SHTF2 interrupt is enabled</description>
112361                  <value>#1</value>
112362                </enumeratedValue>
112363              </enumeratedValues>
112364            </field>
112365            <field>
112366              <name>SHTF2</name>
112367              <description>SCL High Timeout Flag 2</description>
112368              <bitOffset>1</bitOffset>
112369              <bitWidth>1</bitWidth>
112370              <access>read-write</access>
112371              <enumeratedValues>
112372                <enumeratedValue>
112373                  <name>0</name>
112374                  <description>No SCL high and SDA low timeout occurs</description>
112375                  <value>#0</value>
112376                </enumeratedValue>
112377                <enumeratedValue>
112378                  <name>1</name>
112379                  <description>SCL high and SDA low timeout occurs</description>
112380                  <value>#1</value>
112381                </enumeratedValue>
112382              </enumeratedValues>
112383            </field>
112384            <field>
112385              <name>SHTF1</name>
112386              <description>SCL High Timeout Flag 1</description>
112387              <bitOffset>2</bitOffset>
112388              <bitWidth>1</bitWidth>
112389              <access>read-only</access>
112390              <enumeratedValues>
112391                <enumeratedValue>
112392                  <name>0</name>
112393                  <description>No SCL high and SDA high timeout occurs</description>
112394                  <value>#0</value>
112395                </enumeratedValue>
112396                <enumeratedValue>
112397                  <name>1</name>
112398                  <description>SCL high and SDA high timeout occurs</description>
112399                  <value>#1</value>
112400                </enumeratedValue>
112401              </enumeratedValues>
112402            </field>
112403            <field>
112404              <name>SLTF</name>
112405              <description>SCL Low Timeout Flag</description>
112406              <bitOffset>3</bitOffset>
112407              <bitWidth>1</bitWidth>
112408              <access>read-write</access>
112409              <enumeratedValues>
112410                <enumeratedValue>
112411                  <name>0</name>
112412                  <description>No low timeout occurs</description>
112413                  <value>#0</value>
112414                </enumeratedValue>
112415                <enumeratedValue>
112416                  <name>1</name>
112417                  <description>Low timeout occurs</description>
112418                  <value>#1</value>
112419                </enumeratedValue>
112420              </enumeratedValues>
112421            </field>
112422            <field>
112423              <name>TCKSEL</name>
112424              <description>Timeout Counter Clock Select</description>
112425              <bitOffset>4</bitOffset>
112426              <bitWidth>1</bitWidth>
112427              <access>read-write</access>
112428              <enumeratedValues>
112429                <enumeratedValue>
112430                  <name>0</name>
112431                  <description>Timeout counter counts at the frequency of the I2C module clock / 64</description>
112432                  <value>#0</value>
112433                </enumeratedValue>
112434                <enumeratedValue>
112435                  <name>1</name>
112436                  <description>Timeout counter counts at the frequency of the I2C module clock</description>
112437                  <value>#1</value>
112438                </enumeratedValue>
112439              </enumeratedValues>
112440            </field>
112441            <field>
112442              <name>SIICAEN</name>
112443              <description>Second I2C Address Enable</description>
112444              <bitOffset>5</bitOffset>
112445              <bitWidth>1</bitWidth>
112446              <access>read-write</access>
112447              <enumeratedValues>
112448                <enumeratedValue>
112449                  <name>0</name>
112450                  <description>I2C address register 2 matching is disabled</description>
112451                  <value>#0</value>
112452                </enumeratedValue>
112453                <enumeratedValue>
112454                  <name>1</name>
112455                  <description>I2C address register 2 matching is enabled</description>
112456                  <value>#1</value>
112457                </enumeratedValue>
112458              </enumeratedValues>
112459            </field>
112460            <field>
112461              <name>ALERTEN</name>
112462              <description>SMBus Alert Response Address Enable</description>
112463              <bitOffset>6</bitOffset>
112464              <bitWidth>1</bitWidth>
112465              <access>read-write</access>
112466              <enumeratedValues>
112467                <enumeratedValue>
112468                  <name>0</name>
112469                  <description>SMBus alert response address matching is disabled</description>
112470                  <value>#0</value>
112471                </enumeratedValue>
112472                <enumeratedValue>
112473                  <name>1</name>
112474                  <description>SMBus alert response address matching is enabled</description>
112475                  <value>#1</value>
112476                </enumeratedValue>
112477              </enumeratedValues>
112478            </field>
112479            <field>
112480              <name>FACK</name>
112481              <description>Fast NACK/ACK Enable</description>
112482              <bitOffset>7</bitOffset>
112483              <bitWidth>1</bitWidth>
112484              <access>read-write</access>
112485              <enumeratedValues>
112486                <enumeratedValue>
112487                  <name>0</name>
112488                  <description>An ACK or NACK is sent on the following receiving data byte</description>
112489                  <value>#0</value>
112490                </enumeratedValue>
112491                <enumeratedValue>
112492                  <name>1</name>
112493                  <description>Writing 0 to TXAK after receiving a data byte generates an ACK. Writing 1 to TXAK after receiving a data byte generates a NACK.</description>
112494                  <value>#1</value>
112495                </enumeratedValue>
112496              </enumeratedValues>
112497            </field>
112498          </fields>
112499        </register>
112500        <register>
112501          <name>A2</name>
112502          <description>I2C Address Register 2</description>
112503          <addressOffset>0x9</addressOffset>
112504          <size>8</size>
112505          <access>read-write</access>
112506          <resetValue>0xC2</resetValue>
112507          <resetMask>0xFF</resetMask>
112508          <fields>
112509            <field>
112510              <name>SAD</name>
112511              <description>SMBus Address</description>
112512              <bitOffset>1</bitOffset>
112513              <bitWidth>7</bitWidth>
112514              <access>read-write</access>
112515            </field>
112516          </fields>
112517        </register>
112518        <register>
112519          <name>SLTH</name>
112520          <description>I2C SCL Low Timeout Register High</description>
112521          <addressOffset>0xA</addressOffset>
112522          <size>8</size>
112523          <access>read-write</access>
112524          <resetValue>0</resetValue>
112525          <resetMask>0xFF</resetMask>
112526          <fields>
112527            <field>
112528              <name>SSLT</name>
112529              <description>SSLT[15:8]</description>
112530              <bitOffset>0</bitOffset>
112531              <bitWidth>8</bitWidth>
112532              <access>read-write</access>
112533            </field>
112534          </fields>
112535        </register>
112536        <register>
112537          <name>SLTL</name>
112538          <description>I2C SCL Low Timeout Register Low</description>
112539          <addressOffset>0xB</addressOffset>
112540          <size>8</size>
112541          <access>read-write</access>
112542          <resetValue>0</resetValue>
112543          <resetMask>0xFF</resetMask>
112544          <fields>
112545            <field>
112546              <name>SSLT</name>
112547              <description>SSLT[7:0]</description>
112548              <bitOffset>0</bitOffset>
112549              <bitWidth>8</bitWidth>
112550              <access>read-write</access>
112551            </field>
112552          </fields>
112553        </register>
112554        <register>
112555          <name>S2</name>
112556          <description>I2C Status register 2</description>
112557          <addressOffset>0xC</addressOffset>
112558          <size>8</size>
112559          <access>read-write</access>
112560          <resetValue>0x1</resetValue>
112561          <resetMask>0xFF</resetMask>
112562          <fields>
112563            <field>
112564              <name>EMPTY</name>
112565              <description>Empty flag</description>
112566              <bitOffset>0</bitOffset>
112567              <bitWidth>1</bitWidth>
112568              <access>read-only</access>
112569              <enumeratedValues>
112570                <enumeratedValue>
112571                  <name>0</name>
112572                  <description>Tx or Rx buffer is not empty and cannot be written to, that is new data cannot be loaded into the buffer.</description>
112573                  <value>#0</value>
112574                </enumeratedValue>
112575                <enumeratedValue>
112576                  <name>1</name>
112577                  <description>Tx or Rx buffer is empty and can be written to, that is new data can be loaded into the buffer.</description>
112578                  <value>#1</value>
112579                </enumeratedValue>
112580              </enumeratedValues>
112581            </field>
112582            <field>
112583              <name>ERROR</name>
112584              <description>Error flag</description>
112585              <bitOffset>1</bitOffset>
112586              <bitWidth>1</bitWidth>
112587              <access>read-write</access>
112588              <enumeratedValues>
112589                <enumeratedValue>
112590                  <name>0</name>
112591                  <description>The buffer is not full and all write/read operations have no errors.</description>
112592                  <value>#0</value>
112593                </enumeratedValue>
112594                <enumeratedValue>
112595                  <name>1</name>
112596                  <description>There are 3 or more write/read errors during the data transfer phase (when the Empty flag is not set and the buffer is busy).</description>
112597                  <value>#1</value>
112598                </enumeratedValue>
112599              </enumeratedValues>
112600            </field>
112601          </fields>
112602        </register>
112603      </registers>
112604    </peripheral>
112605    <peripheral>
112606      <name>USB0</name>
112607      <description>Universal Serial Bus, OTG Capable Controller</description>
112608      <prependToName>USB0_</prependToName>
112609      <baseAddress>0x40072000</baseAddress>
112610      <addressBlock>
112611        <offset>0</offset>
112612        <size>0x15D</size>
112613        <usage>registers</usage>
112614      </addressBlock>
112615      <interrupt>
112616        <name>USB0</name>
112617        <value>53</value>
112618      </interrupt>
112619      <registers>
112620        <register>
112621          <name>PERID</name>
112622          <description>Peripheral ID register</description>
112623          <addressOffset>0</addressOffset>
112624          <size>8</size>
112625          <access>read-only</access>
112626          <resetValue>0x4</resetValue>
112627          <resetMask>0xFF</resetMask>
112628          <fields>
112629            <field>
112630              <name>ID</name>
112631              <description>Peripheral Identification</description>
112632              <bitOffset>0</bitOffset>
112633              <bitWidth>6</bitWidth>
112634              <access>read-only</access>
112635            </field>
112636          </fields>
112637        </register>
112638        <register>
112639          <name>IDCOMP</name>
112640          <description>Peripheral ID Complement register</description>
112641          <addressOffset>0x4</addressOffset>
112642          <size>8</size>
112643          <access>read-only</access>
112644          <resetValue>0xFB</resetValue>
112645          <resetMask>0xFF</resetMask>
112646          <fields>
112647            <field>
112648              <name>NID</name>
112649              <description>Ones&apos; complement of PERID[ID] bits.</description>
112650              <bitOffset>0</bitOffset>
112651              <bitWidth>6</bitWidth>
112652              <access>read-only</access>
112653            </field>
112654          </fields>
112655        </register>
112656        <register>
112657          <name>REV</name>
112658          <description>Peripheral Revision register</description>
112659          <addressOffset>0x8</addressOffset>
112660          <size>8</size>
112661          <access>read-only</access>
112662          <resetValue>0x33</resetValue>
112663          <resetMask>0xFF</resetMask>
112664          <fields>
112665            <field>
112666              <name>REV</name>
112667              <description>Revision</description>
112668              <bitOffset>0</bitOffset>
112669              <bitWidth>8</bitWidth>
112670              <access>read-only</access>
112671            </field>
112672          </fields>
112673        </register>
112674        <register>
112675          <name>ADDINFO</name>
112676          <description>Peripheral Additional Info register</description>
112677          <addressOffset>0xC</addressOffset>
112678          <size>8</size>
112679          <access>read-only</access>
112680          <resetValue>0x1</resetValue>
112681          <resetMask>0xFF</resetMask>
112682          <fields>
112683            <field>
112684              <name>IEHOST</name>
112685              <description>This bit is set if host mode is enabled.</description>
112686              <bitOffset>0</bitOffset>
112687              <bitWidth>1</bitWidth>
112688              <access>read-only</access>
112689            </field>
112690          </fields>
112691        </register>
112692        <register>
112693          <name>OTGISTAT</name>
112694          <description>OTG Interrupt Status register</description>
112695          <addressOffset>0x10</addressOffset>
112696          <size>8</size>
112697          <access>read-write</access>
112698          <resetValue>0</resetValue>
112699          <resetMask>0xFF</resetMask>
112700          <fields>
112701            <field>
112702              <name>AVBUSCHG</name>
112703              <description>This bit is set when a change in VBUS is detected on an A device.</description>
112704              <bitOffset>0</bitOffset>
112705              <bitWidth>1</bitWidth>
112706              <access>read-write</access>
112707            </field>
112708            <field>
112709              <name>B_SESS_CHG</name>
112710              <description>This bit is set when a change in VBUS is detected on a B device.</description>
112711              <bitOffset>2</bitOffset>
112712              <bitWidth>1</bitWidth>
112713              <access>read-write</access>
112714            </field>
112715            <field>
112716              <name>SESSVLDCHG</name>
112717              <description>This bit is set when a change in VBUS is detected indicating a session valid or a session no longer valid</description>
112718              <bitOffset>3</bitOffset>
112719              <bitWidth>1</bitWidth>
112720              <access>read-write</access>
112721            </field>
112722            <field>
112723              <name>LINE_STATE_CHG</name>
112724              <description>This interrupt is set when the USB line state (CTL[SE0] and CTL[JSTATE] bits) are stable without change for 1 millisecond, and the value of the line state is different from the last time when the line state was stable</description>
112725              <bitOffset>5</bitOffset>
112726              <bitWidth>1</bitWidth>
112727              <access>read-write</access>
112728            </field>
112729            <field>
112730              <name>ONEMSEC</name>
112731              <description>This bit is set when the 1 millisecond timer expires</description>
112732              <bitOffset>6</bitOffset>
112733              <bitWidth>1</bitWidth>
112734              <access>read-write</access>
112735            </field>
112736            <field>
112737              <name>IDCHG</name>
112738              <description>This bit is set when a change in the ID Signal from the USB connector is sensed.</description>
112739              <bitOffset>7</bitOffset>
112740              <bitWidth>1</bitWidth>
112741              <access>read-write</access>
112742            </field>
112743          </fields>
112744        </register>
112745        <register>
112746          <name>OTGICR</name>
112747          <description>OTG Interrupt Control register</description>
112748          <addressOffset>0x14</addressOffset>
112749          <size>8</size>
112750          <access>read-write</access>
112751          <resetValue>0</resetValue>
112752          <resetMask>0xFF</resetMask>
112753          <fields>
112754            <field>
112755              <name>AVBUSEN</name>
112756              <description>A VBUS Valid Interrupt Enable</description>
112757              <bitOffset>0</bitOffset>
112758              <bitWidth>1</bitWidth>
112759              <access>read-write</access>
112760              <enumeratedValues>
112761                <enumeratedValue>
112762                  <name>0</name>
112763                  <description>Disables the AVBUSCHG interrupt.</description>
112764                  <value>#0</value>
112765                </enumeratedValue>
112766                <enumeratedValue>
112767                  <name>1</name>
112768                  <description>Enables the AVBUSCHG interrupt.</description>
112769                  <value>#1</value>
112770                </enumeratedValue>
112771              </enumeratedValues>
112772            </field>
112773            <field>
112774              <name>BSESSEN</name>
112775              <description>B Session END Interrupt Enable</description>
112776              <bitOffset>2</bitOffset>
112777              <bitWidth>1</bitWidth>
112778              <access>read-write</access>
112779              <enumeratedValues>
112780                <enumeratedValue>
112781                  <name>0</name>
112782                  <description>Disables the B_SESS_CHG interrupt.</description>
112783                  <value>#0</value>
112784                </enumeratedValue>
112785                <enumeratedValue>
112786                  <name>1</name>
112787                  <description>Enables the B_SESS_CHG interrupt.</description>
112788                  <value>#1</value>
112789                </enumeratedValue>
112790              </enumeratedValues>
112791            </field>
112792            <field>
112793              <name>SESSVLDEN</name>
112794              <description>Session Valid Interrupt Enable</description>
112795              <bitOffset>3</bitOffset>
112796              <bitWidth>1</bitWidth>
112797              <access>read-write</access>
112798              <enumeratedValues>
112799                <enumeratedValue>
112800                  <name>0</name>
112801                  <description>Disables the SESSVLDCHG interrupt.</description>
112802                  <value>#0</value>
112803                </enumeratedValue>
112804                <enumeratedValue>
112805                  <name>1</name>
112806                  <description>Enables the SESSVLDCHG interrupt.</description>
112807                  <value>#1</value>
112808                </enumeratedValue>
112809              </enumeratedValues>
112810            </field>
112811            <field>
112812              <name>LINESTATEEN</name>
112813              <description>Line State Change Interrupt Enable</description>
112814              <bitOffset>5</bitOffset>
112815              <bitWidth>1</bitWidth>
112816              <access>read-write</access>
112817              <enumeratedValues>
112818                <enumeratedValue>
112819                  <name>0</name>
112820                  <description>Disables the LINE_STAT_CHG interrupt.</description>
112821                  <value>#0</value>
112822                </enumeratedValue>
112823                <enumeratedValue>
112824                  <name>1</name>
112825                  <description>Enables the LINE_STAT_CHG interrupt.</description>
112826                  <value>#1</value>
112827                </enumeratedValue>
112828              </enumeratedValues>
112829            </field>
112830            <field>
112831              <name>ONEMSECEN</name>
112832              <description>One Millisecond Interrupt Enable</description>
112833              <bitOffset>6</bitOffset>
112834              <bitWidth>1</bitWidth>
112835              <access>read-write</access>
112836              <enumeratedValues>
112837                <enumeratedValue>
112838                  <name>0</name>
112839                  <description>Diables the 1ms timer interrupt.</description>
112840                  <value>#0</value>
112841                </enumeratedValue>
112842                <enumeratedValue>
112843                  <name>1</name>
112844                  <description>Enables the 1ms timer interrupt.</description>
112845                  <value>#1</value>
112846                </enumeratedValue>
112847              </enumeratedValues>
112848            </field>
112849            <field>
112850              <name>IDEN</name>
112851              <description>ID Interrupt Enable</description>
112852              <bitOffset>7</bitOffset>
112853              <bitWidth>1</bitWidth>
112854              <access>read-write</access>
112855              <enumeratedValues>
112856                <enumeratedValue>
112857                  <name>0</name>
112858                  <description>The ID interrupt is disabled</description>
112859                  <value>#0</value>
112860                </enumeratedValue>
112861                <enumeratedValue>
112862                  <name>1</name>
112863                  <description>The ID interrupt is enabled</description>
112864                  <value>#1</value>
112865                </enumeratedValue>
112866              </enumeratedValues>
112867            </field>
112868          </fields>
112869        </register>
112870        <register>
112871          <name>OTGSTAT</name>
112872          <description>OTG Status register</description>
112873          <addressOffset>0x18</addressOffset>
112874          <size>8</size>
112875          <access>read-write</access>
112876          <resetValue>0</resetValue>
112877          <resetMask>0xFF</resetMask>
112878          <fields>
112879            <field>
112880              <name>AVBUSVLD</name>
112881              <description>A VBUS Valid</description>
112882              <bitOffset>0</bitOffset>
112883              <bitWidth>1</bitWidth>
112884              <access>read-write</access>
112885              <enumeratedValues>
112886                <enumeratedValue>
112887                  <name>0</name>
112888                  <description>The VBUS voltage is below the A VBUS Valid threshold.</description>
112889                  <value>#0</value>
112890                </enumeratedValue>
112891                <enumeratedValue>
112892                  <name>1</name>
112893                  <description>The VBUS voltage is above the A VBUS Valid threshold.</description>
112894                  <value>#1</value>
112895                </enumeratedValue>
112896              </enumeratedValues>
112897            </field>
112898            <field>
112899              <name>BSESSEND</name>
112900              <description>B Session End</description>
112901              <bitOffset>2</bitOffset>
112902              <bitWidth>1</bitWidth>
112903              <access>read-write</access>
112904              <enumeratedValues>
112905                <enumeratedValue>
112906                  <name>0</name>
112907                  <description>The VBUS voltage is above the B session end threshold.</description>
112908                  <value>#0</value>
112909                </enumeratedValue>
112910                <enumeratedValue>
112911                  <name>1</name>
112912                  <description>The VBUS voltage is below the B session end threshold.</description>
112913                  <value>#1</value>
112914                </enumeratedValue>
112915              </enumeratedValues>
112916            </field>
112917            <field>
112918              <name>SESS_VLD</name>
112919              <description>Session Valid</description>
112920              <bitOffset>3</bitOffset>
112921              <bitWidth>1</bitWidth>
112922              <access>read-write</access>
112923              <enumeratedValues>
112924                <enumeratedValue>
112925                  <name>0</name>
112926                  <description>The VBUS voltage is below the B session valid threshold</description>
112927                  <value>#0</value>
112928                </enumeratedValue>
112929                <enumeratedValue>
112930                  <name>1</name>
112931                  <description>The VBUS voltage is above the B session valid threshold.</description>
112932                  <value>#1</value>
112933                </enumeratedValue>
112934              </enumeratedValues>
112935            </field>
112936            <field>
112937              <name>LINESTATESTABLE</name>
112938              <description>Indicates that the internal signals that control the LINE_STATE_CHG field of OTGISTAT are stable for at least 1 ms</description>
112939              <bitOffset>5</bitOffset>
112940              <bitWidth>1</bitWidth>
112941              <access>read-write</access>
112942              <enumeratedValues>
112943                <enumeratedValue>
112944                  <name>0</name>
112945                  <description>The LINE_STAT_CHG bit is not yet stable.</description>
112946                  <value>#0</value>
112947                </enumeratedValue>
112948                <enumeratedValue>
112949                  <name>1</name>
112950                  <description>The LINE_STAT_CHG bit has been debounced and is stable.</description>
112951                  <value>#1</value>
112952                </enumeratedValue>
112953              </enumeratedValues>
112954            </field>
112955            <field>
112956              <name>ONEMSECEN</name>
112957              <description>This bit is reserved for the 1ms count, but it is not useful to software.</description>
112958              <bitOffset>6</bitOffset>
112959              <bitWidth>1</bitWidth>
112960              <access>read-write</access>
112961            </field>
112962            <field>
112963              <name>ID</name>
112964              <description>Indicates the current state of the ID pin on the USB connector</description>
112965              <bitOffset>7</bitOffset>
112966              <bitWidth>1</bitWidth>
112967              <access>read-write</access>
112968              <enumeratedValues>
112969                <enumeratedValue>
112970                  <name>0</name>
112971                  <description>Indicates a Type A cable is plugged into the USB connector.</description>
112972                  <value>#0</value>
112973                </enumeratedValue>
112974                <enumeratedValue>
112975                  <name>1</name>
112976                  <description>Indicates no cable is attached or a Type B cable is plugged into the USB connector.</description>
112977                  <value>#1</value>
112978                </enumeratedValue>
112979              </enumeratedValues>
112980            </field>
112981          </fields>
112982        </register>
112983        <register>
112984          <name>OTGCTL</name>
112985          <description>OTG Control register</description>
112986          <addressOffset>0x1C</addressOffset>
112987          <size>8</size>
112988          <access>read-write</access>
112989          <resetValue>0</resetValue>
112990          <resetMask>0xFF</resetMask>
112991          <fields>
112992            <field>
112993              <name>OTGEN</name>
112994              <description>On-The-Go pullup/pulldown resistor enable</description>
112995              <bitOffset>2</bitOffset>
112996              <bitWidth>1</bitWidth>
112997              <access>read-write</access>
112998              <enumeratedValues>
112999                <enumeratedValue>
113000                  <name>0</name>
113001                  <description>If USB_EN is 1 and HOST_MODE is 0 in the Control Register (CTL), then the D+ Data Line pull-up resistors are enabled. If HOST_MODE is 1 the D+ and D- Data Line pull-down resistors are engaged.</description>
113002                  <value>#0</value>
113003                </enumeratedValue>
113004                <enumeratedValue>
113005                  <name>1</name>
113006                  <description>The pull-up and pull-down controls in this register are used.</description>
113007                  <value>#1</value>
113008                </enumeratedValue>
113009              </enumeratedValues>
113010            </field>
113011            <field>
113012              <name>DMLOW</name>
113013              <description>D- Data Line pull-down resistor enable</description>
113014              <bitOffset>4</bitOffset>
113015              <bitWidth>1</bitWidth>
113016              <access>read-write</access>
113017              <enumeratedValues>
113018                <enumeratedValue>
113019                  <name>0</name>
113020                  <description>D- pulldown resistor is not enabled.</description>
113021                  <value>#0</value>
113022                </enumeratedValue>
113023                <enumeratedValue>
113024                  <name>1</name>
113025                  <description>D- pulldown resistor is enabled.</description>
113026                  <value>#1</value>
113027                </enumeratedValue>
113028              </enumeratedValues>
113029            </field>
113030            <field>
113031              <name>DPLOW</name>
113032              <description>D+ Data Line pull-down resistor enable</description>
113033              <bitOffset>5</bitOffset>
113034              <bitWidth>1</bitWidth>
113035              <access>read-write</access>
113036              <enumeratedValues>
113037                <enumeratedValue>
113038                  <name>0</name>
113039                  <description>D+ pulldown resistor is not enabled.</description>
113040                  <value>#0</value>
113041                </enumeratedValue>
113042                <enumeratedValue>
113043                  <name>1</name>
113044                  <description>D+ pulldown resistor is enabled.</description>
113045                  <value>#1</value>
113046                </enumeratedValue>
113047              </enumeratedValues>
113048            </field>
113049            <field>
113050              <name>DPHIGH</name>
113051              <description>D+ Data Line pullup resistor enable</description>
113052              <bitOffset>7</bitOffset>
113053              <bitWidth>1</bitWidth>
113054              <access>read-write</access>
113055              <enumeratedValues>
113056                <enumeratedValue>
113057                  <name>0</name>
113058                  <description>D+ pullup resistor is not enabled</description>
113059                  <value>#0</value>
113060                </enumeratedValue>
113061                <enumeratedValue>
113062                  <name>1</name>
113063                  <description>D+ pullup resistor is enabled</description>
113064                  <value>#1</value>
113065                </enumeratedValue>
113066              </enumeratedValues>
113067            </field>
113068          </fields>
113069        </register>
113070        <register>
113071          <name>ISTAT</name>
113072          <description>Interrupt Status register</description>
113073          <addressOffset>0x80</addressOffset>
113074          <size>8</size>
113075          <access>read-write</access>
113076          <resetValue>0</resetValue>
113077          <resetMask>0xFF</resetMask>
113078          <fields>
113079            <field>
113080              <name>USBRST</name>
113081              <description>This bit is set when the USB Module has decoded a valid USB reset</description>
113082              <bitOffset>0</bitOffset>
113083              <bitWidth>1</bitWidth>
113084              <access>read-write</access>
113085            </field>
113086            <field>
113087              <name>ERROR</name>
113088              <description>This bit is set when any of the error conditions within Error Interrupt Status (ERRSTAT) register occur</description>
113089              <bitOffset>1</bitOffset>
113090              <bitWidth>1</bitWidth>
113091              <access>read-write</access>
113092            </field>
113093            <field>
113094              <name>SOFTOK</name>
113095              <description>This bit is set when the USB Module receives a Start Of Frame (SOF) token</description>
113096              <bitOffset>2</bitOffset>
113097              <bitWidth>1</bitWidth>
113098              <access>read-write</access>
113099            </field>
113100            <field>
113101              <name>TOKDNE</name>
113102              <description>This bit is set when the current token being processed has completed</description>
113103              <bitOffset>3</bitOffset>
113104              <bitWidth>1</bitWidth>
113105              <access>read-write</access>
113106            </field>
113107            <field>
113108              <name>SLEEP</name>
113109              <description>This bit is set when the USB Module detects a constant idle on the USB bus for 3 ms</description>
113110              <bitOffset>4</bitOffset>
113111              <bitWidth>1</bitWidth>
113112              <access>read-write</access>
113113            </field>
113114            <field>
113115              <name>RESUME</name>
113116              <description>This bit is set when a K-state is observed on the DP/DM signals for 2</description>
113117              <bitOffset>5</bitOffset>
113118              <bitWidth>1</bitWidth>
113119              <access>read-write</access>
113120            </field>
113121            <field>
113122              <name>ATTACH</name>
113123              <description>Attach Interrupt</description>
113124              <bitOffset>6</bitOffset>
113125              <bitWidth>1</bitWidth>
113126              <access>read-write</access>
113127              <enumeratedValues>
113128                <enumeratedValue>
113129                  <name>0</name>
113130                  <description>No Attach is detected since the last time the ATTACH bit was cleared.</description>
113131                  <value>#0</value>
113132                </enumeratedValue>
113133                <enumeratedValue>
113134                  <name>1</name>
113135                  <description>A peripheral is now present and must be configured (a stable non-SE0 state is detected for more than 2.5 us).</description>
113136                  <value>#1</value>
113137                </enumeratedValue>
113138              </enumeratedValues>
113139            </field>
113140            <field>
113141              <name>STALL</name>
113142              <description>Stall Interrupt</description>
113143              <bitOffset>7</bitOffset>
113144              <bitWidth>1</bitWidth>
113145              <access>read-write</access>
113146            </field>
113147          </fields>
113148        </register>
113149        <register>
113150          <name>INTEN</name>
113151          <description>Interrupt Enable register</description>
113152          <addressOffset>0x84</addressOffset>
113153          <size>8</size>
113154          <access>read-write</access>
113155          <resetValue>0</resetValue>
113156          <resetMask>0xFF</resetMask>
113157          <fields>
113158            <field>
113159              <name>USBRSTEN</name>
113160              <description>USBRST Interrupt Enable</description>
113161              <bitOffset>0</bitOffset>
113162              <bitWidth>1</bitWidth>
113163              <access>read-write</access>
113164              <enumeratedValues>
113165                <enumeratedValue>
113166                  <name>0</name>
113167                  <description>Disables the USBRST interrupt.</description>
113168                  <value>#0</value>
113169                </enumeratedValue>
113170                <enumeratedValue>
113171                  <name>1</name>
113172                  <description>Enables the USBRST interrupt.</description>
113173                  <value>#1</value>
113174                </enumeratedValue>
113175              </enumeratedValues>
113176            </field>
113177            <field>
113178              <name>ERROREN</name>
113179              <description>ERROR Interrupt Enable</description>
113180              <bitOffset>1</bitOffset>
113181              <bitWidth>1</bitWidth>
113182              <access>read-write</access>
113183              <enumeratedValues>
113184                <enumeratedValue>
113185                  <name>0</name>
113186                  <description>Disables the ERROR interrupt.</description>
113187                  <value>#0</value>
113188                </enumeratedValue>
113189                <enumeratedValue>
113190                  <name>1</name>
113191                  <description>Enables the ERROR interrupt.</description>
113192                  <value>#1</value>
113193                </enumeratedValue>
113194              </enumeratedValues>
113195            </field>
113196            <field>
113197              <name>SOFTOKEN</name>
113198              <description>SOFTOK Interrupt Enable</description>
113199              <bitOffset>2</bitOffset>
113200              <bitWidth>1</bitWidth>
113201              <access>read-write</access>
113202              <enumeratedValues>
113203                <enumeratedValue>
113204                  <name>0</name>
113205                  <description>Disbles the SOFTOK interrupt.</description>
113206                  <value>#0</value>
113207                </enumeratedValue>
113208                <enumeratedValue>
113209                  <name>1</name>
113210                  <description>Enables the SOFTOK interrupt.</description>
113211                  <value>#1</value>
113212                </enumeratedValue>
113213              </enumeratedValues>
113214            </field>
113215            <field>
113216              <name>TOKDNEEN</name>
113217              <description>TOKDNE Interrupt Enable</description>
113218              <bitOffset>3</bitOffset>
113219              <bitWidth>1</bitWidth>
113220              <access>read-write</access>
113221              <enumeratedValues>
113222                <enumeratedValue>
113223                  <name>0</name>
113224                  <description>Disables the TOKDNE interrupt.</description>
113225                  <value>#0</value>
113226                </enumeratedValue>
113227                <enumeratedValue>
113228                  <name>1</name>
113229                  <description>Enables the TOKDNE interrupt.</description>
113230                  <value>#1</value>
113231                </enumeratedValue>
113232              </enumeratedValues>
113233            </field>
113234            <field>
113235              <name>SLEEPEN</name>
113236              <description>SLEEP Interrupt Enable</description>
113237              <bitOffset>4</bitOffset>
113238              <bitWidth>1</bitWidth>
113239              <access>read-write</access>
113240              <enumeratedValues>
113241                <enumeratedValue>
113242                  <name>0</name>
113243                  <description>Disables the SLEEP interrupt.</description>
113244                  <value>#0</value>
113245                </enumeratedValue>
113246                <enumeratedValue>
113247                  <name>1</name>
113248                  <description>Enables the SLEEP interrupt.</description>
113249                  <value>#1</value>
113250                </enumeratedValue>
113251              </enumeratedValues>
113252            </field>
113253            <field>
113254              <name>RESUMEEN</name>
113255              <description>RESUME Interrupt Enable</description>
113256              <bitOffset>5</bitOffset>
113257              <bitWidth>1</bitWidth>
113258              <access>read-write</access>
113259              <enumeratedValues>
113260                <enumeratedValue>
113261                  <name>0</name>
113262                  <description>Disables the RESUME interrupt.</description>
113263                  <value>#0</value>
113264                </enumeratedValue>
113265                <enumeratedValue>
113266                  <name>1</name>
113267                  <description>Enables the RESUME interrupt.</description>
113268                  <value>#1</value>
113269                </enumeratedValue>
113270              </enumeratedValues>
113271            </field>
113272            <field>
113273              <name>ATTACHEN</name>
113274              <description>ATTACH Interrupt Enable</description>
113275              <bitOffset>6</bitOffset>
113276              <bitWidth>1</bitWidth>
113277              <access>read-write</access>
113278              <enumeratedValues>
113279                <enumeratedValue>
113280                  <name>0</name>
113281                  <description>Disables the ATTACH interrupt.</description>
113282                  <value>#0</value>
113283                </enumeratedValue>
113284                <enumeratedValue>
113285                  <name>1</name>
113286                  <description>Enables the ATTACH interrupt.</description>
113287                  <value>#1</value>
113288                </enumeratedValue>
113289              </enumeratedValues>
113290            </field>
113291            <field>
113292              <name>STALLEN</name>
113293              <description>STALL Interrupt Enable</description>
113294              <bitOffset>7</bitOffset>
113295              <bitWidth>1</bitWidth>
113296              <access>read-write</access>
113297              <enumeratedValues>
113298                <enumeratedValue>
113299                  <name>0</name>
113300                  <description>Diasbles the STALL interrupt.</description>
113301                  <value>#0</value>
113302                </enumeratedValue>
113303                <enumeratedValue>
113304                  <name>1</name>
113305                  <description>Enables the STALL interrupt.</description>
113306                  <value>#1</value>
113307                </enumeratedValue>
113308              </enumeratedValues>
113309            </field>
113310          </fields>
113311        </register>
113312        <register>
113313          <name>ERRSTAT</name>
113314          <description>Error Interrupt Status register</description>
113315          <addressOffset>0x88</addressOffset>
113316          <size>8</size>
113317          <access>read-write</access>
113318          <resetValue>0</resetValue>
113319          <resetMask>0xFF</resetMask>
113320          <fields>
113321            <field>
113322              <name>PIDERR</name>
113323              <description>This bit is set when the PID check field fails.</description>
113324              <bitOffset>0</bitOffset>
113325              <bitWidth>1</bitWidth>
113326              <access>read-write</access>
113327            </field>
113328            <field>
113329              <name>CRC5EOF</name>
113330              <description>This error interrupt has two functions</description>
113331              <bitOffset>1</bitOffset>
113332              <bitWidth>1</bitWidth>
113333              <access>read-write</access>
113334            </field>
113335            <field>
113336              <name>CRC16</name>
113337              <description>This bit is set when a data packet is rejected due to a CRC16 error.</description>
113338              <bitOffset>2</bitOffset>
113339              <bitWidth>1</bitWidth>
113340              <access>read-write</access>
113341            </field>
113342            <field>
113343              <name>DFN8</name>
113344              <description>This bit is set if the data field received was not 8 bits in length</description>
113345              <bitOffset>3</bitOffset>
113346              <bitWidth>1</bitWidth>
113347              <access>read-write</access>
113348            </field>
113349            <field>
113350              <name>BTOERR</name>
113351              <description>This bit is set when a bus turnaround timeout error occurs</description>
113352              <bitOffset>4</bitOffset>
113353              <bitWidth>1</bitWidth>
113354              <access>read-write</access>
113355            </field>
113356            <field>
113357              <name>DMAERR</name>
113358              <description>This bit is set if the USB Module has requested a DMA access to read a new BDT but has not been given the bus before it needs to receive or transmit data</description>
113359              <bitOffset>5</bitOffset>
113360              <bitWidth>1</bitWidth>
113361              <access>read-write</access>
113362            </field>
113363            <field>
113364              <name>OWNERR</name>
113365              <description>This field is valid when the USB Module is operating in peripheral mode (CTL[HOSTMODEEN]=0)</description>
113366              <bitOffset>6</bitOffset>
113367              <bitWidth>1</bitWidth>
113368              <access>read-write</access>
113369            </field>
113370            <field>
113371              <name>BTSERR</name>
113372              <description>This bit is set when a bit stuff error is detected</description>
113373              <bitOffset>7</bitOffset>
113374              <bitWidth>1</bitWidth>
113375              <access>read-write</access>
113376            </field>
113377          </fields>
113378        </register>
113379        <register>
113380          <name>ERREN</name>
113381          <description>Error Interrupt Enable register</description>
113382          <addressOffset>0x8C</addressOffset>
113383          <size>8</size>
113384          <access>read-write</access>
113385          <resetValue>0</resetValue>
113386          <resetMask>0xFF</resetMask>
113387          <fields>
113388            <field>
113389              <name>PIDERREN</name>
113390              <description>PIDERR Interrupt Enable</description>
113391              <bitOffset>0</bitOffset>
113392              <bitWidth>1</bitWidth>
113393              <access>read-write</access>
113394              <enumeratedValues>
113395                <enumeratedValue>
113396                  <name>0</name>
113397                  <description>Disables the PIDERR interrupt.</description>
113398                  <value>#0</value>
113399                </enumeratedValue>
113400                <enumeratedValue>
113401                  <name>1</name>
113402                  <description>Enters the PIDERR interrupt.</description>
113403                  <value>#1</value>
113404                </enumeratedValue>
113405              </enumeratedValues>
113406            </field>
113407            <field>
113408              <name>CRC5EOFEN</name>
113409              <description>CRC5/EOF Interrupt Enable</description>
113410              <bitOffset>1</bitOffset>
113411              <bitWidth>1</bitWidth>
113412              <access>read-write</access>
113413              <enumeratedValues>
113414                <enumeratedValue>
113415                  <name>0</name>
113416                  <description>Disables the CRC5/EOF interrupt.</description>
113417                  <value>#0</value>
113418                </enumeratedValue>
113419                <enumeratedValue>
113420                  <name>1</name>
113421                  <description>Enables the CRC5/EOF interrupt.</description>
113422                  <value>#1</value>
113423                </enumeratedValue>
113424              </enumeratedValues>
113425            </field>
113426            <field>
113427              <name>CRC16EN</name>
113428              <description>CRC16 Interrupt Enable</description>
113429              <bitOffset>2</bitOffset>
113430              <bitWidth>1</bitWidth>
113431              <access>read-write</access>
113432              <enumeratedValues>
113433                <enumeratedValue>
113434                  <name>0</name>
113435                  <description>Disables the CRC16 interrupt.</description>
113436                  <value>#0</value>
113437                </enumeratedValue>
113438                <enumeratedValue>
113439                  <name>1</name>
113440                  <description>Enables the CRC16 interrupt.</description>
113441                  <value>#1</value>
113442                </enumeratedValue>
113443              </enumeratedValues>
113444            </field>
113445            <field>
113446              <name>DFN8EN</name>
113447              <description>DFN8 Interrupt Enable</description>
113448              <bitOffset>3</bitOffset>
113449              <bitWidth>1</bitWidth>
113450              <access>read-write</access>
113451              <enumeratedValues>
113452                <enumeratedValue>
113453                  <name>0</name>
113454                  <description>Disables the DFN8 interrupt.</description>
113455                  <value>#0</value>
113456                </enumeratedValue>
113457                <enumeratedValue>
113458                  <name>1</name>
113459                  <description>Enables the DFN8 interrupt.</description>
113460                  <value>#1</value>
113461                </enumeratedValue>
113462              </enumeratedValues>
113463            </field>
113464            <field>
113465              <name>BTOERREN</name>
113466              <description>BTOERR Interrupt Enable</description>
113467              <bitOffset>4</bitOffset>
113468              <bitWidth>1</bitWidth>
113469              <access>read-write</access>
113470              <enumeratedValues>
113471                <enumeratedValue>
113472                  <name>0</name>
113473                  <description>Disables the BTOERR interrupt.</description>
113474                  <value>#0</value>
113475                </enumeratedValue>
113476                <enumeratedValue>
113477                  <name>1</name>
113478                  <description>Enables the BTOERR interrupt.</description>
113479                  <value>#1</value>
113480                </enumeratedValue>
113481              </enumeratedValues>
113482            </field>
113483            <field>
113484              <name>DMAERREN</name>
113485              <description>DMAERR Interrupt Enable</description>
113486              <bitOffset>5</bitOffset>
113487              <bitWidth>1</bitWidth>
113488              <access>read-write</access>
113489              <enumeratedValues>
113490                <enumeratedValue>
113491                  <name>0</name>
113492                  <description>Disables the DMAERR interrupt.</description>
113493                  <value>#0</value>
113494                </enumeratedValue>
113495                <enumeratedValue>
113496                  <name>1</name>
113497                  <description>Enables the DMAERR interrupt.</description>
113498                  <value>#1</value>
113499                </enumeratedValue>
113500              </enumeratedValues>
113501            </field>
113502            <field>
113503              <name>OWNERREN</name>
113504              <description>OWNERR Interrupt Enable</description>
113505              <bitOffset>6</bitOffset>
113506              <bitWidth>1</bitWidth>
113507              <access>read-write</access>
113508              <enumeratedValues>
113509                <enumeratedValue>
113510                  <name>0</name>
113511                  <description>Disables the OWNERR interrupt.</description>
113512                  <value>#0</value>
113513                </enumeratedValue>
113514                <enumeratedValue>
113515                  <name>1</name>
113516                  <description>Enables the OWNERR interrupt.</description>
113517                  <value>#1</value>
113518                </enumeratedValue>
113519              </enumeratedValues>
113520            </field>
113521            <field>
113522              <name>BTSERREN</name>
113523              <description>BTSERR Interrupt Enable</description>
113524              <bitOffset>7</bitOffset>
113525              <bitWidth>1</bitWidth>
113526              <access>read-write</access>
113527              <enumeratedValues>
113528                <enumeratedValue>
113529                  <name>0</name>
113530                  <description>Disables the BTSERR interrupt.</description>
113531                  <value>#0</value>
113532                </enumeratedValue>
113533                <enumeratedValue>
113534                  <name>1</name>
113535                  <description>Enables the BTSERR interrupt.</description>
113536                  <value>#1</value>
113537                </enumeratedValue>
113538              </enumeratedValues>
113539            </field>
113540          </fields>
113541        </register>
113542        <register>
113543          <name>STAT</name>
113544          <description>Status register</description>
113545          <addressOffset>0x90</addressOffset>
113546          <size>8</size>
113547          <access>read-only</access>
113548          <resetValue>0</resetValue>
113549          <resetMask>0xFF</resetMask>
113550          <fields>
113551            <field>
113552              <name>ODD</name>
113553              <description>This bit is set if the last buffer descriptor updated was in the odd bank of the BDT.</description>
113554              <bitOffset>2</bitOffset>
113555              <bitWidth>1</bitWidth>
113556              <access>read-only</access>
113557            </field>
113558            <field>
113559              <name>TX</name>
113560              <description>Transmit Indicator</description>
113561              <bitOffset>3</bitOffset>
113562              <bitWidth>1</bitWidth>
113563              <access>read-only</access>
113564              <enumeratedValues>
113565                <enumeratedValue>
113566                  <name>0</name>
113567                  <description>The most recent transaction was a receive operation.</description>
113568                  <value>#0</value>
113569                </enumeratedValue>
113570                <enumeratedValue>
113571                  <name>1</name>
113572                  <description>The most recent transaction was a transmit operation.</description>
113573                  <value>#1</value>
113574                </enumeratedValue>
113575              </enumeratedValues>
113576            </field>
113577            <field>
113578              <name>ENDP</name>
113579              <description>This four-bit field encodes the endpoint address that received or transmitted the previous token</description>
113580              <bitOffset>4</bitOffset>
113581              <bitWidth>4</bitWidth>
113582              <access>read-only</access>
113583            </field>
113584          </fields>
113585        </register>
113586        <register>
113587          <name>CTL</name>
113588          <description>Control register</description>
113589          <addressOffset>0x94</addressOffset>
113590          <size>8</size>
113591          <access>read-write</access>
113592          <resetValue>0</resetValue>
113593          <resetMask>0xFF</resetMask>
113594          <fields>
113595            <field>
113596              <name>USBENSOFEN</name>
113597              <description>USB Enable</description>
113598              <bitOffset>0</bitOffset>
113599              <bitWidth>1</bitWidth>
113600              <access>read-write</access>
113601              <enumeratedValues>
113602                <enumeratedValue>
113603                  <name>0</name>
113604                  <description>Disables the USB Module.</description>
113605                  <value>#0</value>
113606                </enumeratedValue>
113607                <enumeratedValue>
113608                  <name>1</name>
113609                  <description>Enables the USB Module.</description>
113610                  <value>#1</value>
113611                </enumeratedValue>
113612              </enumeratedValues>
113613            </field>
113614            <field>
113615              <name>ODDRST</name>
113616              <description>Setting this bit to 1 resets all the BDT ODD ping/pong fields to 0, which then specifies the EVEN BDT bank</description>
113617              <bitOffset>1</bitOffset>
113618              <bitWidth>1</bitWidth>
113619              <access>read-write</access>
113620            </field>
113621            <field>
113622              <name>RESUME</name>
113623              <description>When set to 1 this bit enables the USB Module to execute resume signaling</description>
113624              <bitOffset>2</bitOffset>
113625              <bitWidth>1</bitWidth>
113626              <access>read-write</access>
113627            </field>
113628            <field>
113629              <name>HOSTMODEEN</name>
113630              <description>When set to 1, this bit enables the USB Module to operate in Host mode</description>
113631              <bitOffset>3</bitOffset>
113632              <bitWidth>1</bitWidth>
113633              <access>read-write</access>
113634            </field>
113635            <field>
113636              <name>RESET</name>
113637              <description>Setting this bit enables the USB Module to generate USB reset signaling</description>
113638              <bitOffset>4</bitOffset>
113639              <bitWidth>1</bitWidth>
113640              <access>read-write</access>
113641            </field>
113642            <field>
113643              <name>TXSUSPENDTOKENBUSY</name>
113644              <description>In Host mode, TOKEN_BUSY is set when the USB module is busy executing a USB token</description>
113645              <bitOffset>5</bitOffset>
113646              <bitWidth>1</bitWidth>
113647              <access>read-write</access>
113648            </field>
113649            <field>
113650              <name>SE0</name>
113651              <description>Live USB Single Ended Zero signal</description>
113652              <bitOffset>6</bitOffset>
113653              <bitWidth>1</bitWidth>
113654              <access>read-write</access>
113655            </field>
113656            <field>
113657              <name>JSTATE</name>
113658              <description>Live USB differential receiver JSTATE signal</description>
113659              <bitOffset>7</bitOffset>
113660              <bitWidth>1</bitWidth>
113661              <access>read-write</access>
113662            </field>
113663          </fields>
113664        </register>
113665        <register>
113666          <name>ADDR</name>
113667          <description>Address register</description>
113668          <addressOffset>0x98</addressOffset>
113669          <size>8</size>
113670          <access>read-write</access>
113671          <resetValue>0</resetValue>
113672          <resetMask>0xFF</resetMask>
113673          <fields>
113674            <field>
113675              <name>ADDR</name>
113676              <description>USB Address</description>
113677              <bitOffset>0</bitOffset>
113678              <bitWidth>7</bitWidth>
113679              <access>read-write</access>
113680            </field>
113681            <field>
113682              <name>LSEN</name>
113683              <description>Low Speed Enable bit</description>
113684              <bitOffset>7</bitOffset>
113685              <bitWidth>1</bitWidth>
113686              <access>read-write</access>
113687            </field>
113688          </fields>
113689        </register>
113690        <register>
113691          <name>BDTPAGE1</name>
113692          <description>BDT Page register 1</description>
113693          <addressOffset>0x9C</addressOffset>
113694          <size>8</size>
113695          <access>read-write</access>
113696          <resetValue>0</resetValue>
113697          <resetMask>0xFF</resetMask>
113698          <fields>
113699            <field>
113700              <name>BDTBA</name>
113701              <description>Provides address bits 15 through 9 of the BDT base address.</description>
113702              <bitOffset>1</bitOffset>
113703              <bitWidth>7</bitWidth>
113704              <access>read-write</access>
113705            </field>
113706          </fields>
113707        </register>
113708        <register>
113709          <name>FRMNUML</name>
113710          <description>Frame Number register Low</description>
113711          <addressOffset>0xA0</addressOffset>
113712          <size>8</size>
113713          <access>read-write</access>
113714          <resetValue>0</resetValue>
113715          <resetMask>0xFF</resetMask>
113716          <fields>
113717            <field>
113718              <name>FRM</name>
113719              <description>This 8-bit field and the 3-bit field in the Frame Number Register High are used to compute the address where the current Buffer Descriptor Table (BDT) resides in system memory</description>
113720              <bitOffset>0</bitOffset>
113721              <bitWidth>8</bitWidth>
113722              <access>read-write</access>
113723            </field>
113724          </fields>
113725        </register>
113726        <register>
113727          <name>FRMNUMH</name>
113728          <description>Frame Number register High</description>
113729          <addressOffset>0xA4</addressOffset>
113730          <size>8</size>
113731          <access>read-write</access>
113732          <resetValue>0</resetValue>
113733          <resetMask>0xFF</resetMask>
113734          <fields>
113735            <field>
113736              <name>FRM</name>
113737              <description>This 3-bit field and the 8-bit field in the Frame Number Register Low are used to compute the address where the current Buffer Descriptor Table (BDT) resides in system memory</description>
113738              <bitOffset>0</bitOffset>
113739              <bitWidth>3</bitWidth>
113740              <access>read-write</access>
113741            </field>
113742          </fields>
113743        </register>
113744        <register>
113745          <name>TOKEN</name>
113746          <description>Token register</description>
113747          <addressOffset>0xA8</addressOffset>
113748          <size>8</size>
113749          <access>read-write</access>
113750          <resetValue>0</resetValue>
113751          <resetMask>0xFF</resetMask>
113752          <fields>
113753            <field>
113754              <name>TOKENENDPT</name>
113755              <description>Holds the Endpoint address for the token command</description>
113756              <bitOffset>0</bitOffset>
113757              <bitWidth>4</bitWidth>
113758              <access>read-write</access>
113759            </field>
113760            <field>
113761              <name>TOKENPID</name>
113762              <description>Contains the token type executed by the USB module.</description>
113763              <bitOffset>4</bitOffset>
113764              <bitWidth>4</bitWidth>
113765              <access>read-write</access>
113766              <enumeratedValues>
113767                <enumeratedValue>
113768                  <name>0001</name>
113769                  <description>OUT Token. USB Module performs an OUT (TX) transaction.</description>
113770                  <value>#0001</value>
113771                </enumeratedValue>
113772                <enumeratedValue>
113773                  <name>1001</name>
113774                  <description>IN Token. USB Module performs an In (RX) transaction.</description>
113775                  <value>#1001</value>
113776                </enumeratedValue>
113777                <enumeratedValue>
113778                  <name>1101</name>
113779                  <description>SETUP Token. USB Module performs a SETUP (TX) transaction</description>
113780                  <value>#1101</value>
113781                </enumeratedValue>
113782              </enumeratedValues>
113783            </field>
113784          </fields>
113785        </register>
113786        <register>
113787          <name>SOFTHLD</name>
113788          <description>SOF Threshold register</description>
113789          <addressOffset>0xAC</addressOffset>
113790          <size>8</size>
113791          <access>read-write</access>
113792          <resetValue>0</resetValue>
113793          <resetMask>0xFF</resetMask>
113794          <fields>
113795            <field>
113796              <name>CNT</name>
113797              <description>Represents the SOF count threshold in byte times when SOFDYNTHLD=0 or 8 byte times when SOFDYNTHLD=1</description>
113798              <bitOffset>0</bitOffset>
113799              <bitWidth>8</bitWidth>
113800              <access>read-write</access>
113801            </field>
113802          </fields>
113803        </register>
113804        <register>
113805          <name>BDTPAGE2</name>
113806          <description>BDT Page Register 2</description>
113807          <addressOffset>0xB0</addressOffset>
113808          <size>8</size>
113809          <access>read-write</access>
113810          <resetValue>0</resetValue>
113811          <resetMask>0xFF</resetMask>
113812          <fields>
113813            <field>
113814              <name>BDTBA</name>
113815              <description>Provides address bits 23 through 16 of the BDT base address that defines the location of Buffer Descriptor Table resides in system memory</description>
113816              <bitOffset>0</bitOffset>
113817              <bitWidth>8</bitWidth>
113818              <access>read-write</access>
113819            </field>
113820          </fields>
113821        </register>
113822        <register>
113823          <name>BDTPAGE3</name>
113824          <description>BDT Page Register 3</description>
113825          <addressOffset>0xB4</addressOffset>
113826          <size>8</size>
113827          <access>read-write</access>
113828          <resetValue>0</resetValue>
113829          <resetMask>0xFF</resetMask>
113830          <fields>
113831            <field>
113832              <name>BDTBA</name>
113833              <description>Provides address bits 31 through 24 of the BDT base address that defines the location of Buffer Descriptor Table resides in system memory</description>
113834              <bitOffset>0</bitOffset>
113835              <bitWidth>8</bitWidth>
113836              <access>read-write</access>
113837            </field>
113838          </fields>
113839        </register>
113840        <register>
113841          <dim>16</dim>
113842          <dimIncrement>0x4</dimIncrement>
113843          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15</dimIndex>
113844          <name>ENDPT%s</name>
113845          <description>Endpoint Control register</description>
113846          <addressOffset>0xC0</addressOffset>
113847          <size>8</size>
113848          <access>read-write</access>
113849          <resetValue>0</resetValue>
113850          <resetMask>0xFF</resetMask>
113851          <fields>
113852            <field>
113853              <name>EPHSHK</name>
113854              <description>When set this bit enables an endpoint to perform handshaking during a transaction to this endpoint</description>
113855              <bitOffset>0</bitOffset>
113856              <bitWidth>1</bitWidth>
113857              <access>read-write</access>
113858            </field>
113859            <field>
113860              <name>EPSTALL</name>
113861              <description>When set this bit indicates that the endpoint is called</description>
113862              <bitOffset>1</bitOffset>
113863              <bitWidth>1</bitWidth>
113864              <access>read-write</access>
113865            </field>
113866            <field>
113867              <name>EPTXEN</name>
113868              <description>This bit, when set, enables the endpoint for TX transfers. See</description>
113869              <bitOffset>2</bitOffset>
113870              <bitWidth>1</bitWidth>
113871              <access>read-write</access>
113872            </field>
113873            <field>
113874              <name>EPRXEN</name>
113875              <description>This bit, when set, enables the endpoint for RX transfers. See</description>
113876              <bitOffset>3</bitOffset>
113877              <bitWidth>1</bitWidth>
113878              <access>read-write</access>
113879            </field>
113880            <field>
113881              <name>EPCTLDIS</name>
113882              <description>This bit, when set, disables control (SETUP) transfers</description>
113883              <bitOffset>4</bitOffset>
113884              <bitWidth>1</bitWidth>
113885              <access>read-write</access>
113886            </field>
113887            <field>
113888              <name>RETRYDIS</name>
113889              <description>This is a Host mode only bit and is present in the control register for endpoint 0 (ENDPT0) only</description>
113890              <bitOffset>6</bitOffset>
113891              <bitWidth>1</bitWidth>
113892              <access>read-write</access>
113893            </field>
113894            <field>
113895              <name>HOSTWOHUB</name>
113896              <description>Host without a hub This is a Host mode only field and is present in the control register for endpoint 0 (ENDPT0) only</description>
113897              <bitOffset>7</bitOffset>
113898              <bitWidth>1</bitWidth>
113899              <access>read-write</access>
113900              <enumeratedValues>
113901                <enumeratedValue>
113902                  <name>0</name>
113903                  <description>Low-speed device connected to Host through a hub. PRE_PID will be generated as required.</description>
113904                  <value>#0</value>
113905                </enumeratedValue>
113906                <enumeratedValue>
113907                  <name>1</name>
113908                  <description>Low-speed device directly connected. No hub, or no low-speed device attached.</description>
113909                  <value>#1</value>
113910                </enumeratedValue>
113911              </enumeratedValues>
113912            </field>
113913          </fields>
113914        </register>
113915        <register>
113916          <name>USBCTRL</name>
113917          <description>USB Control register</description>
113918          <addressOffset>0x100</addressOffset>
113919          <size>8</size>
113920          <access>read-write</access>
113921          <resetValue>0xC0</resetValue>
113922          <resetMask>0xFF</resetMask>
113923          <fields>
113924            <field>
113925              <name>UARTSEL</name>
113926              <description>Selects USB signals to be used as UART signals.</description>
113927              <bitOffset>4</bitOffset>
113928              <bitWidth>1</bitWidth>
113929              <access>read-write</access>
113930              <enumeratedValues>
113931                <enumeratedValue>
113932                  <name>0</name>
113933                  <description>USB signals not used as UART signals.</description>
113934                  <value>#0</value>
113935                </enumeratedValue>
113936                <enumeratedValue>
113937                  <name>1</name>
113938                  <description>USB signals used as UART signals.</description>
113939                  <value>#1</value>
113940                </enumeratedValue>
113941              </enumeratedValues>
113942            </field>
113943            <field>
113944              <name>UARTCHLS</name>
113945              <description>UART Signal Channel Select</description>
113946              <bitOffset>5</bitOffset>
113947              <bitWidth>1</bitWidth>
113948              <access>read-write</access>
113949              <enumeratedValues>
113950                <enumeratedValue>
113951                  <name>0</name>
113952                  <description>USB DP/DM signals used as UART TX/RX.</description>
113953                  <value>#0</value>
113954                </enumeratedValue>
113955                <enumeratedValue>
113956                  <name>1</name>
113957                  <description>USB DP/DM signals used as UART RX/TX.</description>
113958                  <value>#1</value>
113959                </enumeratedValue>
113960              </enumeratedValues>
113961            </field>
113962            <field>
113963              <name>PDE</name>
113964              <description>Enables the weak pulldowns on the USB transceiver.</description>
113965              <bitOffset>6</bitOffset>
113966              <bitWidth>1</bitWidth>
113967              <access>read-write</access>
113968              <enumeratedValues>
113969                <enumeratedValue>
113970                  <name>0</name>
113971                  <description>Weak pulldowns are disabled on D+ and D-.</description>
113972                  <value>#0</value>
113973                </enumeratedValue>
113974                <enumeratedValue>
113975                  <name>1</name>
113976                  <description>Weak pulldowns are enabled on D+ and D-.</description>
113977                  <value>#1</value>
113978                </enumeratedValue>
113979              </enumeratedValues>
113980            </field>
113981            <field>
113982              <name>SUSP</name>
113983              <description>Places the USB transceiver into the suspend state.</description>
113984              <bitOffset>7</bitOffset>
113985              <bitWidth>1</bitWidth>
113986              <access>read-write</access>
113987              <enumeratedValues>
113988                <enumeratedValue>
113989                  <name>0</name>
113990                  <description>USB transceiver is not in suspend state.</description>
113991                  <value>#0</value>
113992                </enumeratedValue>
113993                <enumeratedValue>
113994                  <name>1</name>
113995                  <description>USB transceiver is in suspend state.</description>
113996                  <value>#1</value>
113997                </enumeratedValue>
113998              </enumeratedValues>
113999            </field>
114000          </fields>
114001        </register>
114002        <register>
114003          <name>OBSERVE</name>
114004          <description>USB OTG Observe register</description>
114005          <addressOffset>0x104</addressOffset>
114006          <size>8</size>
114007          <access>read-only</access>
114008          <resetValue>0x50</resetValue>
114009          <resetMask>0xFF</resetMask>
114010          <fields>
114011            <field>
114012              <name>DMPD</name>
114013              <description>Provides observability of the D- Pulldown enable at the USB transceiver.</description>
114014              <bitOffset>4</bitOffset>
114015              <bitWidth>1</bitWidth>
114016              <access>read-only</access>
114017              <enumeratedValues>
114018                <enumeratedValue>
114019                  <name>0</name>
114020                  <description>D- pulldown disabled.</description>
114021                  <value>#0</value>
114022                </enumeratedValue>
114023                <enumeratedValue>
114024                  <name>1</name>
114025                  <description>D- pulldown enabled.</description>
114026                  <value>#1</value>
114027                </enumeratedValue>
114028              </enumeratedValues>
114029            </field>
114030            <field>
114031              <name>DPPD</name>
114032              <description>Provides observability of the D+ Pulldown enable at the USB transceiver.</description>
114033              <bitOffset>6</bitOffset>
114034              <bitWidth>1</bitWidth>
114035              <access>read-only</access>
114036              <enumeratedValues>
114037                <enumeratedValue>
114038                  <name>0</name>
114039                  <description>D+ pulldown disabled.</description>
114040                  <value>#0</value>
114041                </enumeratedValue>
114042                <enumeratedValue>
114043                  <name>1</name>
114044                  <description>D+ pulldown enabled.</description>
114045                  <value>#1</value>
114046                </enumeratedValue>
114047              </enumeratedValues>
114048            </field>
114049            <field>
114050              <name>DPPU</name>
114051              <description>Provides observability of the D+ Pullup enable at the USB transceiver.</description>
114052              <bitOffset>7</bitOffset>
114053              <bitWidth>1</bitWidth>
114054              <access>read-only</access>
114055              <enumeratedValues>
114056                <enumeratedValue>
114057                  <name>0</name>
114058                  <description>D+ pullup disabled.</description>
114059                  <value>#0</value>
114060                </enumeratedValue>
114061                <enumeratedValue>
114062                  <name>1</name>
114063                  <description>D+ pullup enabled.</description>
114064                  <value>#1</value>
114065                </enumeratedValue>
114066              </enumeratedValues>
114067            </field>
114068          </fields>
114069        </register>
114070        <register>
114071          <name>CONTROL</name>
114072          <description>USB OTG Control register</description>
114073          <addressOffset>0x108</addressOffset>
114074          <size>8</size>
114075          <access>read-write</access>
114076          <resetValue>0</resetValue>
114077          <resetMask>0xFF</resetMask>
114078          <fields>
114079            <field>
114080              <name>DPPULLUPNONOTG</name>
114081              <description>Provides control of the DP Pullup in USBOTG, if USB is configured in non-OTG device mode.</description>
114082              <bitOffset>4</bitOffset>
114083              <bitWidth>1</bitWidth>
114084              <access>read-write</access>
114085              <enumeratedValues>
114086                <enumeratedValue>
114087                  <name>0</name>
114088                  <description>DP Pullup in non-OTG device mode is not enabled.</description>
114089                  <value>#0</value>
114090                </enumeratedValue>
114091                <enumeratedValue>
114092                  <name>1</name>
114093                  <description>DP Pullup in non-OTG device mode is enabled.</description>
114094                  <value>#1</value>
114095                </enumeratedValue>
114096              </enumeratedValues>
114097            </field>
114098          </fields>
114099        </register>
114100        <register>
114101          <name>USBTRC0</name>
114102          <description>USB Transceiver Control register 0</description>
114103          <addressOffset>0x10C</addressOffset>
114104          <size>8</size>
114105          <access>read-write</access>
114106          <resetValue>0</resetValue>
114107          <resetMask>0xFF</resetMask>
114108          <fields>
114109            <field>
114110              <name>USB_RESUME_INT</name>
114111              <description>USB Asynchronous Interrupt</description>
114112              <bitOffset>0</bitOffset>
114113              <bitWidth>1</bitWidth>
114114              <access>read-only</access>
114115              <enumeratedValues>
114116                <enumeratedValue>
114117                  <name>0</name>
114118                  <description>No interrupt was generated.</description>
114119                  <value>#0</value>
114120                </enumeratedValue>
114121                <enumeratedValue>
114122                  <name>1</name>
114123                  <description>Interrupt was generated because of the USB asynchronous interrupt.</description>
114124                  <value>#1</value>
114125                </enumeratedValue>
114126              </enumeratedValues>
114127            </field>
114128            <field>
114129              <name>SYNC_DET</name>
114130              <description>Synchronous USB Interrupt Detect</description>
114131              <bitOffset>1</bitOffset>
114132              <bitWidth>1</bitWidth>
114133              <access>read-only</access>
114134              <enumeratedValues>
114135                <enumeratedValue>
114136                  <name>0</name>
114137                  <description>Synchronous interrupt has not been detected.</description>
114138                  <value>#0</value>
114139                </enumeratedValue>
114140                <enumeratedValue>
114141                  <name>1</name>
114142                  <description>Synchronous interrupt has been detected.</description>
114143                  <value>#1</value>
114144                </enumeratedValue>
114145              </enumeratedValues>
114146            </field>
114147            <field>
114148              <name>USB_CLK_RECOVERY_INT</name>
114149              <description>Combined USB Clock Recovery interrupt status</description>
114150              <bitOffset>2</bitOffset>
114151              <bitWidth>1</bitWidth>
114152              <access>read-only</access>
114153            </field>
114154            <field>
114155              <name>VREDG_DET</name>
114156              <description>VBUS Rising Edge Interrupt Detect</description>
114157              <bitOffset>3</bitOffset>
114158              <bitWidth>1</bitWidth>
114159              <access>read-write</access>
114160              <enumeratedValues>
114161                <enumeratedValue>
114162                  <name>0</name>
114163                  <description>VBUS rising edge interrupt has not been detected.</description>
114164                  <value>#0</value>
114165                </enumeratedValue>
114166                <enumeratedValue>
114167                  <name>1</name>
114168                  <description>VBUS rising edge interrupt has been detected.</description>
114169                  <value>#1</value>
114170                </enumeratedValue>
114171              </enumeratedValues>
114172            </field>
114173            <field>
114174              <name>VFEDG_DET</name>
114175              <description>VBUS Falling Edge Interrupt Detect</description>
114176              <bitOffset>4</bitOffset>
114177              <bitWidth>1</bitWidth>
114178              <access>read-write</access>
114179              <enumeratedValues>
114180                <enumeratedValue>
114181                  <name>0</name>
114182                  <description>VBUS falling edge interrupt has not been detected.</description>
114183                  <value>#0</value>
114184                </enumeratedValue>
114185                <enumeratedValue>
114186                  <name>1</name>
114187                  <description>VBUS falling edge interrupt has been detected.</description>
114188                  <value>#1</value>
114189                </enumeratedValue>
114190              </enumeratedValues>
114191            </field>
114192            <field>
114193              <name>USBRESMEN</name>
114194              <description>Asynchronous Resume Interrupt Enable</description>
114195              <bitOffset>5</bitOffset>
114196              <bitWidth>1</bitWidth>
114197              <access>read-write</access>
114198              <enumeratedValues>
114199                <enumeratedValue>
114200                  <name>0</name>
114201                  <description>USB asynchronous wakeup from suspend mode disabled.</description>
114202                  <value>#0</value>
114203                </enumeratedValue>
114204                <enumeratedValue>
114205                  <name>1</name>
114206                  <description>USB asynchronous wakeup from suspend mode enabled. The asynchronous resume interrupt differs from the synchronous resume interrupt in that it asynchronously detects K-state using the unfiltered state of the D+ and D- pins. This interrupt should only be enabled when the Transceiver is suspended.</description>
114207                  <value>#1</value>
114208                </enumeratedValue>
114209              </enumeratedValues>
114210            </field>
114211            <field>
114212              <name>USBRESET</name>
114213              <description>USB Reset</description>
114214              <bitOffset>7</bitOffset>
114215              <bitWidth>1</bitWidth>
114216              <access>write-only</access>
114217              <enumeratedValues>
114218                <enumeratedValue>
114219                  <name>0</name>
114220                  <description>Normal USB module operation.</description>
114221                  <value>#0</value>
114222                </enumeratedValue>
114223                <enumeratedValue>
114224                  <name>1</name>
114225                  <description>Returns the USB module to its reset state.</description>
114226                  <value>#1</value>
114227                </enumeratedValue>
114228              </enumeratedValues>
114229            </field>
114230          </fields>
114231        </register>
114232        <register>
114233          <name>USBFRMADJUST</name>
114234          <description>Frame Adjust Register</description>
114235          <addressOffset>0x114</addressOffset>
114236          <size>8</size>
114237          <access>read-write</access>
114238          <resetValue>0</resetValue>
114239          <resetMask>0xFF</resetMask>
114240          <fields>
114241            <field>
114242              <name>ADJ</name>
114243              <description>Frame Adjustment</description>
114244              <bitOffset>0</bitOffset>
114245              <bitWidth>8</bitWidth>
114246              <access>read-write</access>
114247            </field>
114248          </fields>
114249        </register>
114250        <register>
114251          <name>MISCCTRL</name>
114252          <description>Miscellaneous Control register</description>
114253          <addressOffset>0x12C</addressOffset>
114254          <size>8</size>
114255          <access>read-write</access>
114256          <resetValue>0</resetValue>
114257          <resetMask>0xFF</resetMask>
114258          <fields>
114259            <field>
114260              <name>SOFDYNTHLD</name>
114261              <description>Dynamic SOF Threshold Compare mode</description>
114262              <bitOffset>0</bitOffset>
114263              <bitWidth>1</bitWidth>
114264              <access>read-write</access>
114265              <enumeratedValues>
114266                <enumeratedValue>
114267                  <name>0</name>
114268                  <description>SOF_TOK interrupt is set when byte times SOF threshold is reached.</description>
114269                  <value>#0</value>
114270                </enumeratedValue>
114271                <enumeratedValue>
114272                  <name>1</name>
114273                  <description>SOF_TOK interrupt is set when 8 byte times SOF threshold is reached or overstepped.</description>
114274                  <value>#1</value>
114275                </enumeratedValue>
114276              </enumeratedValues>
114277            </field>
114278            <field>
114279              <name>SOFBUSSET</name>
114280              <description>SOF_TOK Interrupt Generation Mode Select</description>
114281              <bitOffset>1</bitOffset>
114282              <bitWidth>1</bitWidth>
114283              <access>read-write</access>
114284              <enumeratedValues>
114285                <enumeratedValue>
114286                  <name>0</name>
114287                  <description>SOF_TOK interrupt is set according to SOF threshold value.</description>
114288                  <value>#0</value>
114289                </enumeratedValue>
114290                <enumeratedValue>
114291                  <name>1</name>
114292                  <description>SOF_TOK interrupt is set when SOF counter reaches 0.</description>
114293                  <value>#1</value>
114294                </enumeratedValue>
114295              </enumeratedValues>
114296            </field>
114297            <field>
114298              <name>OWNERRISODIS</name>
114299              <description>OWN Error Detect for ISO IN / ISO OUT Disable</description>
114300              <bitOffset>2</bitOffset>
114301              <bitWidth>1</bitWidth>
114302              <access>read-write</access>
114303              <enumeratedValues>
114304                <enumeratedValue>
114305                  <name>0</name>
114306                  <description>OWN error detect for ISO IN / ISO OUT is not disabled.</description>
114307                  <value>#0</value>
114308                </enumeratedValue>
114309                <enumeratedValue>
114310                  <name>1</name>
114311                  <description>OWN error detect for ISO IN / ISO OUT is disabled.</description>
114312                  <value>#1</value>
114313                </enumeratedValue>
114314              </enumeratedValues>
114315            </field>
114316            <field>
114317              <name>VREDG_EN</name>
114318              <description>VBUS Rising Edge Interrupt Enable</description>
114319              <bitOffset>3</bitOffset>
114320              <bitWidth>1</bitWidth>
114321              <access>read-write</access>
114322              <enumeratedValues>
114323                <enumeratedValue>
114324                  <name>0</name>
114325                  <description>VBUS rising edge interrupt disabled.</description>
114326                  <value>#0</value>
114327                </enumeratedValue>
114328                <enumeratedValue>
114329                  <name>1</name>
114330                  <description>VBUS rising edge interrupt enabled.</description>
114331                  <value>#1</value>
114332                </enumeratedValue>
114333              </enumeratedValues>
114334            </field>
114335            <field>
114336              <name>VFEDG_EN</name>
114337              <description>VBUS Falling Edge Interrupt Enable</description>
114338              <bitOffset>4</bitOffset>
114339              <bitWidth>1</bitWidth>
114340              <access>read-write</access>
114341              <enumeratedValues>
114342                <enumeratedValue>
114343                  <name>0</name>
114344                  <description>VBUS falling edge interrupt disabled.</description>
114345                  <value>#0</value>
114346                </enumeratedValue>
114347                <enumeratedValue>
114348                  <name>1</name>
114349                  <description>VBUS falling edge interrupt enabled.</description>
114350                  <value>#1</value>
114351                </enumeratedValue>
114352              </enumeratedValues>
114353            </field>
114354          </fields>
114355        </register>
114356        <register>
114357          <name>CLK_RECOVER_CTRL</name>
114358          <description>USB Clock recovery control</description>
114359          <addressOffset>0x140</addressOffset>
114360          <size>8</size>
114361          <access>read-write</access>
114362          <resetValue>0</resetValue>
114363          <resetMask>0xFF</resetMask>
114364          <fields>
114365            <field>
114366              <name>RESTART_IFRTRIM_EN</name>
114367              <description>Restart from IFR trim value</description>
114368              <bitOffset>5</bitOffset>
114369              <bitWidth>1</bitWidth>
114370              <access>read-write</access>
114371              <enumeratedValues>
114372                <enumeratedValue>
114373                  <name>0</name>
114374                  <description>Trim fine adjustment always works based on the previous updated trim fine value (default)</description>
114375                  <value>#0</value>
114376                </enumeratedValue>
114377                <enumeratedValue>
114378                  <name>1</name>
114379                  <description>Trim fine restarts from the IFR trim value whenever bus_reset/bus_resume is detected or module enable is desasserted</description>
114380                  <value>#1</value>
114381                </enumeratedValue>
114382              </enumeratedValues>
114383            </field>
114384            <field>
114385              <name>RESET_RESUME_ROUGH_EN</name>
114386              <description>Reset/resume to rough phase enable</description>
114387              <bitOffset>6</bitOffset>
114388              <bitWidth>1</bitWidth>
114389              <access>read-write</access>
114390              <enumeratedValues>
114391                <enumeratedValue>
114392                  <name>0</name>
114393                  <description>Always works in tracking phase after the 1st time rough to track transition (default)</description>
114394                  <value>#0</value>
114395                </enumeratedValue>
114396                <enumeratedValue>
114397                  <name>1</name>
114398                  <description>Go back to rough stage whenever bus reset or bus resume occurs</description>
114399                  <value>#1</value>
114400                </enumeratedValue>
114401              </enumeratedValues>
114402            </field>
114403            <field>
114404              <name>CLOCK_RECOVER_EN</name>
114405              <description>Crystal-less USB enable</description>
114406              <bitOffset>7</bitOffset>
114407              <bitWidth>1</bitWidth>
114408              <access>read-write</access>
114409              <enumeratedValues>
114410                <enumeratedValue>
114411                  <name>0</name>
114412                  <description>Disable clock recovery block (default)</description>
114413                  <value>#0</value>
114414                </enumeratedValue>
114415                <enumeratedValue>
114416                  <name>1</name>
114417                  <description>Enable clock recovery block</description>
114418                  <value>#1</value>
114419                </enumeratedValue>
114420              </enumeratedValues>
114421            </field>
114422          </fields>
114423        </register>
114424        <register>
114425          <name>CLK_RECOVER_IRC_EN</name>
114426          <description>IRC48M oscillator enable register</description>
114427          <addressOffset>0x144</addressOffset>
114428          <size>8</size>
114429          <access>read-write</access>
114430          <resetValue>0x1</resetValue>
114431          <resetMask>0xFF</resetMask>
114432          <fields>
114433            <field>
114434              <name>REG_EN</name>
114435              <description>IRC48M regulator enable</description>
114436              <bitOffset>0</bitOffset>
114437              <bitWidth>1</bitWidth>
114438              <access>read-write</access>
114439              <enumeratedValues>
114440                <enumeratedValue>
114441                  <name>0</name>
114442                  <description>IRC48M local regulator is disabled</description>
114443                  <value>#0</value>
114444                </enumeratedValue>
114445                <enumeratedValue>
114446                  <name>1</name>
114447                  <description>IRC48M local regulator is enabled (default)</description>
114448                  <value>#1</value>
114449                </enumeratedValue>
114450              </enumeratedValues>
114451            </field>
114452            <field>
114453              <name>IRC_EN</name>
114454              <description>IRC48M enable</description>
114455              <bitOffset>1</bitOffset>
114456              <bitWidth>1</bitWidth>
114457              <access>read-write</access>
114458              <enumeratedValues>
114459                <enumeratedValue>
114460                  <name>0</name>
114461                  <description>Disable the IRC48M module (default)</description>
114462                  <value>#0</value>
114463                </enumeratedValue>
114464                <enumeratedValue>
114465                  <name>1</name>
114466                  <description>Enable the IRC48M module</description>
114467                  <value>#1</value>
114468                </enumeratedValue>
114469              </enumeratedValues>
114470            </field>
114471          </fields>
114472        </register>
114473        <register>
114474          <name>CLK_RECOVER_INT_EN</name>
114475          <description>Clock recovery combined interrupt enable</description>
114476          <addressOffset>0x154</addressOffset>
114477          <size>8</size>
114478          <access>read-write</access>
114479          <resetValue>0x10</resetValue>
114480          <resetMask>0xFF</resetMask>
114481          <fields>
114482            <field>
114483              <name>OVF_ERROR_EN</name>
114484              <description>Determines whether OVF_ERROR condition signal is used in generation of USB_CLK_RECOVERY_INT.</description>
114485              <bitOffset>4</bitOffset>
114486              <bitWidth>1</bitWidth>
114487              <access>read-write</access>
114488              <enumeratedValues>
114489                <enumeratedValue>
114490                  <name>0</name>
114491                  <description>The interrupt will be masked</description>
114492                  <value>#0</value>
114493                </enumeratedValue>
114494                <enumeratedValue>
114495                  <name>1</name>
114496                  <description>The interrupt will be enabled (default)</description>
114497                  <value>#1</value>
114498                </enumeratedValue>
114499              </enumeratedValues>
114500            </field>
114501          </fields>
114502        </register>
114503        <register>
114504          <name>CLK_RECOVER_INT_STATUS</name>
114505          <description>Clock recovery separated interrupt status</description>
114506          <addressOffset>0x15C</addressOffset>
114507          <size>8</size>
114508          <access>read-write</access>
114509          <resetValue>0</resetValue>
114510          <resetMask>0xFF</resetMask>
114511          <fields>
114512            <field>
114513              <name>OVF_ERROR</name>
114514              <description>Indicates that the USB clock recovery algorithm has detected that the frequency trim adjustment needed for the IRC48M output clock is outside the available TRIM_FINE adjustment range for the IRC48M module</description>
114515              <bitOffset>4</bitOffset>
114516              <bitWidth>1</bitWidth>
114517              <access>read-write</access>
114518              <enumeratedValues>
114519                <enumeratedValue>
114520                  <name>0</name>
114521                  <description>No interrupt is reported</description>
114522                  <value>#0</value>
114523                </enumeratedValue>
114524                <enumeratedValue>
114525                  <name>1</name>
114526                  <description>Unmasked interrupt has been generated</description>
114527                  <value>#1</value>
114528                </enumeratedValue>
114529              </enumeratedValues>
114530            </field>
114531          </fields>
114532        </register>
114533      </registers>
114534    </peripheral>
114535    <peripheral>
114536      <name>CMP0</name>
114537      <description>High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)</description>
114538      <groupName>CMP</groupName>
114539      <prependToName>CMP0_</prependToName>
114540      <baseAddress>0x40073000</baseAddress>
114541      <addressBlock>
114542        <offset>0</offset>
114543        <size>0x6</size>
114544        <usage>registers</usage>
114545      </addressBlock>
114546      <interrupt>
114547        <name>CMP0</name>
114548        <value>40</value>
114549      </interrupt>
114550      <registers>
114551        <register>
114552          <name>CR0</name>
114553          <description>CMP Control Register 0</description>
114554          <addressOffset>0</addressOffset>
114555          <size>8</size>
114556          <access>read-write</access>
114557          <resetValue>0</resetValue>
114558          <resetMask>0xFF</resetMask>
114559          <fields>
114560            <field>
114561              <name>HYSTCTR</name>
114562              <description>Comparator hard block hysteresis control</description>
114563              <bitOffset>0</bitOffset>
114564              <bitWidth>2</bitWidth>
114565              <access>read-write</access>
114566              <enumeratedValues>
114567                <enumeratedValue>
114568                  <name>00</name>
114569                  <description>Level 0</description>
114570                  <value>#00</value>
114571                </enumeratedValue>
114572                <enumeratedValue>
114573                  <name>01</name>
114574                  <description>Level 1</description>
114575                  <value>#01</value>
114576                </enumeratedValue>
114577                <enumeratedValue>
114578                  <name>10</name>
114579                  <description>Level 2</description>
114580                  <value>#10</value>
114581                </enumeratedValue>
114582                <enumeratedValue>
114583                  <name>11</name>
114584                  <description>Level 3</description>
114585                  <value>#11</value>
114586                </enumeratedValue>
114587              </enumeratedValues>
114588            </field>
114589            <field>
114590              <name>FILTER_CNT</name>
114591              <description>Filter Sample Count</description>
114592              <bitOffset>4</bitOffset>
114593              <bitWidth>3</bitWidth>
114594              <access>read-write</access>
114595              <enumeratedValues>
114596                <enumeratedValue>
114597                  <name>000</name>
114598                  <description>Filter is disabled. If SE = 1, then COUT is a logic 0. This is not a legal state, and is not recommended. If SE = 0, COUT = COUTA.</description>
114599                  <value>#000</value>
114600                </enumeratedValue>
114601                <enumeratedValue>
114602                  <name>001</name>
114603                  <description>One sample must agree. The comparator output is simply sampled.</description>
114604                  <value>#001</value>
114605                </enumeratedValue>
114606                <enumeratedValue>
114607                  <name>010</name>
114608                  <description>2 consecutive samples must agree.</description>
114609                  <value>#010</value>
114610                </enumeratedValue>
114611                <enumeratedValue>
114612                  <name>011</name>
114613                  <description>3 consecutive samples must agree.</description>
114614                  <value>#011</value>
114615                </enumeratedValue>
114616                <enumeratedValue>
114617                  <name>100</name>
114618                  <description>4 consecutive samples must agree.</description>
114619                  <value>#100</value>
114620                </enumeratedValue>
114621                <enumeratedValue>
114622                  <name>101</name>
114623                  <description>5 consecutive samples must agree.</description>
114624                  <value>#101</value>
114625                </enumeratedValue>
114626                <enumeratedValue>
114627                  <name>110</name>
114628                  <description>6 consecutive samples must agree.</description>
114629                  <value>#110</value>
114630                </enumeratedValue>
114631                <enumeratedValue>
114632                  <name>111</name>
114633                  <description>7 consecutive samples must agree.</description>
114634                  <value>#111</value>
114635                </enumeratedValue>
114636              </enumeratedValues>
114637            </field>
114638          </fields>
114639        </register>
114640        <register>
114641          <name>CR1</name>
114642          <description>CMP Control Register 1</description>
114643          <addressOffset>0x1</addressOffset>
114644          <size>8</size>
114645          <access>read-write</access>
114646          <resetValue>0</resetValue>
114647          <resetMask>0xFF</resetMask>
114648          <fields>
114649            <field>
114650              <name>EN</name>
114651              <description>Comparator Module Enable</description>
114652              <bitOffset>0</bitOffset>
114653              <bitWidth>1</bitWidth>
114654              <access>read-write</access>
114655              <enumeratedValues>
114656                <enumeratedValue>
114657                  <name>0</name>
114658                  <description>Analog Comparator is disabled.</description>
114659                  <value>#0</value>
114660                </enumeratedValue>
114661                <enumeratedValue>
114662                  <name>1</name>
114663                  <description>Analog Comparator is enabled.</description>
114664                  <value>#1</value>
114665                </enumeratedValue>
114666              </enumeratedValues>
114667            </field>
114668            <field>
114669              <name>OPE</name>
114670              <description>Comparator Output Pin Enable</description>
114671              <bitOffset>1</bitOffset>
114672              <bitWidth>1</bitWidth>
114673              <access>read-write</access>
114674              <enumeratedValues>
114675                <enumeratedValue>
114676                  <name>0</name>
114677                  <description>CMPO is not available on the associated CMPO output pin. If the comparator does not own the pin, this field has no effect.</description>
114678                  <value>#0</value>
114679                </enumeratedValue>
114680                <enumeratedValue>
114681                  <name>1</name>
114682                  <description>CMPO is available on the associated CMPO output pin. The comparator output (CMPO) is driven out on the associated CMPO output pin if the comparator owns the pin. If the comparator does not own the field, this bit has no effect.</description>
114683                  <value>#1</value>
114684                </enumeratedValue>
114685              </enumeratedValues>
114686            </field>
114687            <field>
114688              <name>COS</name>
114689              <description>Comparator Output Select</description>
114690              <bitOffset>2</bitOffset>
114691              <bitWidth>1</bitWidth>
114692              <access>read-write</access>
114693              <enumeratedValues>
114694                <enumeratedValue>
114695                  <name>0</name>
114696                  <description>Set the filtered comparator output (CMPO) to equal COUT.</description>
114697                  <value>#0</value>
114698                </enumeratedValue>
114699                <enumeratedValue>
114700                  <name>1</name>
114701                  <description>Set the unfiltered comparator output (CMPO) to equal COUTA.</description>
114702                  <value>#1</value>
114703                </enumeratedValue>
114704              </enumeratedValues>
114705            </field>
114706            <field>
114707              <name>INV</name>
114708              <description>Comparator INVERT</description>
114709              <bitOffset>3</bitOffset>
114710              <bitWidth>1</bitWidth>
114711              <access>read-write</access>
114712              <enumeratedValues>
114713                <enumeratedValue>
114714                  <name>0</name>
114715                  <description>Does not invert the comparator output.</description>
114716                  <value>#0</value>
114717                </enumeratedValue>
114718                <enumeratedValue>
114719                  <name>1</name>
114720                  <description>Inverts the comparator output.</description>
114721                  <value>#1</value>
114722                </enumeratedValue>
114723              </enumeratedValues>
114724            </field>
114725            <field>
114726              <name>PMODE</name>
114727              <description>Power Mode Select</description>
114728              <bitOffset>4</bitOffset>
114729              <bitWidth>1</bitWidth>
114730              <access>read-write</access>
114731              <enumeratedValues>
114732                <enumeratedValue>
114733                  <name>0</name>
114734                  <description>Low-Speed (LS) Comparison mode selected. In this mode, CMP has slower output propagation delay and lower current consumption.</description>
114735                  <value>#0</value>
114736                </enumeratedValue>
114737                <enumeratedValue>
114738                  <name>1</name>
114739                  <description>High-Speed (HS) Comparison mode selected. In this mode, CMP has faster output propagation delay and higher current consumption.</description>
114740                  <value>#1</value>
114741                </enumeratedValue>
114742              </enumeratedValues>
114743            </field>
114744            <field>
114745              <name>TRIGM</name>
114746              <description>Trigger Mode Enable</description>
114747              <bitOffset>5</bitOffset>
114748              <bitWidth>1</bitWidth>
114749              <access>read-write</access>
114750              <enumeratedValues>
114751                <enumeratedValue>
114752                  <name>0</name>
114753                  <description>Trigger mode is disabled.</description>
114754                  <value>#0</value>
114755                </enumeratedValue>
114756                <enumeratedValue>
114757                  <name>1</name>
114758                  <description>Trigger mode is enabled.</description>
114759                  <value>#1</value>
114760                </enumeratedValue>
114761              </enumeratedValues>
114762            </field>
114763            <field>
114764              <name>WE</name>
114765              <description>Windowing Enable</description>
114766              <bitOffset>6</bitOffset>
114767              <bitWidth>1</bitWidth>
114768              <access>read-write</access>
114769              <enumeratedValues>
114770                <enumeratedValue>
114771                  <name>0</name>
114772                  <description>Windowing mode is not selected.</description>
114773                  <value>#0</value>
114774                </enumeratedValue>
114775                <enumeratedValue>
114776                  <name>1</name>
114777                  <description>Windowing mode is selected.</description>
114778                  <value>#1</value>
114779                </enumeratedValue>
114780              </enumeratedValues>
114781            </field>
114782            <field>
114783              <name>SE</name>
114784              <description>Sample Enable</description>
114785              <bitOffset>7</bitOffset>
114786              <bitWidth>1</bitWidth>
114787              <access>read-write</access>
114788              <enumeratedValues>
114789                <enumeratedValue>
114790                  <name>0</name>
114791                  <description>Sampling mode is not selected.</description>
114792                  <value>#0</value>
114793                </enumeratedValue>
114794                <enumeratedValue>
114795                  <name>1</name>
114796                  <description>Sampling mode is selected.</description>
114797                  <value>#1</value>
114798                </enumeratedValue>
114799              </enumeratedValues>
114800            </field>
114801          </fields>
114802        </register>
114803        <register>
114804          <name>FPR</name>
114805          <description>CMP Filter Period Register</description>
114806          <addressOffset>0x2</addressOffset>
114807          <size>8</size>
114808          <access>read-write</access>
114809          <resetValue>0</resetValue>
114810          <resetMask>0xFF</resetMask>
114811          <fields>
114812            <field>
114813              <name>FILT_PER</name>
114814              <description>Filter Sample Period</description>
114815              <bitOffset>0</bitOffset>
114816              <bitWidth>8</bitWidth>
114817              <access>read-write</access>
114818            </field>
114819          </fields>
114820        </register>
114821        <register>
114822          <name>SCR</name>
114823          <description>CMP Status and Control Register</description>
114824          <addressOffset>0x3</addressOffset>
114825          <size>8</size>
114826          <access>read-write</access>
114827          <resetValue>0</resetValue>
114828          <resetMask>0xFF</resetMask>
114829          <fields>
114830            <field>
114831              <name>COUT</name>
114832              <description>Analog Comparator Output</description>
114833              <bitOffset>0</bitOffset>
114834              <bitWidth>1</bitWidth>
114835              <access>read-only</access>
114836            </field>
114837            <field>
114838              <name>CFF</name>
114839              <description>Analog Comparator Flag Falling</description>
114840              <bitOffset>1</bitOffset>
114841              <bitWidth>1</bitWidth>
114842              <access>read-write</access>
114843              <enumeratedValues>
114844                <enumeratedValue>
114845                  <name>0</name>
114846                  <description>Falling-edge on COUT has not been detected.</description>
114847                  <value>#0</value>
114848                </enumeratedValue>
114849                <enumeratedValue>
114850                  <name>1</name>
114851                  <description>Falling-edge on COUT has occurred.</description>
114852                  <value>#1</value>
114853                </enumeratedValue>
114854              </enumeratedValues>
114855            </field>
114856            <field>
114857              <name>CFR</name>
114858              <description>Analog Comparator Flag Rising</description>
114859              <bitOffset>2</bitOffset>
114860              <bitWidth>1</bitWidth>
114861              <access>read-write</access>
114862              <enumeratedValues>
114863                <enumeratedValue>
114864                  <name>0</name>
114865                  <description>Rising-edge on COUT has not been detected.</description>
114866                  <value>#0</value>
114867                </enumeratedValue>
114868                <enumeratedValue>
114869                  <name>1</name>
114870                  <description>Rising-edge on COUT has occurred.</description>
114871                  <value>#1</value>
114872                </enumeratedValue>
114873              </enumeratedValues>
114874            </field>
114875            <field>
114876              <name>IEF</name>
114877              <description>Comparator Interrupt Enable Falling</description>
114878              <bitOffset>3</bitOffset>
114879              <bitWidth>1</bitWidth>
114880              <access>read-write</access>
114881              <enumeratedValues>
114882                <enumeratedValue>
114883                  <name>0</name>
114884                  <description>Interrupt is disabled.</description>
114885                  <value>#0</value>
114886                </enumeratedValue>
114887                <enumeratedValue>
114888                  <name>1</name>
114889                  <description>Interrupt is enabled.</description>
114890                  <value>#1</value>
114891                </enumeratedValue>
114892              </enumeratedValues>
114893            </field>
114894            <field>
114895              <name>IER</name>
114896              <description>Comparator Interrupt Enable Rising</description>
114897              <bitOffset>4</bitOffset>
114898              <bitWidth>1</bitWidth>
114899              <access>read-write</access>
114900              <enumeratedValues>
114901                <enumeratedValue>
114902                  <name>0</name>
114903                  <description>Interrupt is disabled.</description>
114904                  <value>#0</value>
114905                </enumeratedValue>
114906                <enumeratedValue>
114907                  <name>1</name>
114908                  <description>Interrupt is enabled.</description>
114909                  <value>#1</value>
114910                </enumeratedValue>
114911              </enumeratedValues>
114912            </field>
114913            <field>
114914              <name>DMAEN</name>
114915              <description>DMA Enable Control</description>
114916              <bitOffset>6</bitOffset>
114917              <bitWidth>1</bitWidth>
114918              <access>read-write</access>
114919              <enumeratedValues>
114920                <enumeratedValue>
114921                  <name>0</name>
114922                  <description>DMA is disabled.</description>
114923                  <value>#0</value>
114924                </enumeratedValue>
114925                <enumeratedValue>
114926                  <name>1</name>
114927                  <description>DMA is enabled.</description>
114928                  <value>#1</value>
114929                </enumeratedValue>
114930              </enumeratedValues>
114931            </field>
114932          </fields>
114933        </register>
114934        <register>
114935          <name>DACCR</name>
114936          <description>DAC Control Register</description>
114937          <addressOffset>0x4</addressOffset>
114938          <size>8</size>
114939          <access>read-write</access>
114940          <resetValue>0</resetValue>
114941          <resetMask>0xFF</resetMask>
114942          <fields>
114943            <field>
114944              <name>VOSEL</name>
114945              <description>DAC Output Voltage Select</description>
114946              <bitOffset>0</bitOffset>
114947              <bitWidth>6</bitWidth>
114948              <access>read-write</access>
114949            </field>
114950            <field>
114951              <name>VRSEL</name>
114952              <description>Supply Voltage Reference Source Select</description>
114953              <bitOffset>6</bitOffset>
114954              <bitWidth>1</bitWidth>
114955              <access>read-write</access>
114956              <enumeratedValues>
114957                <enumeratedValue>
114958                  <name>0</name>
114959                  <description>Vin1 is selected as resistor ladder network supply reference.</description>
114960                  <value>#0</value>
114961                </enumeratedValue>
114962                <enumeratedValue>
114963                  <name>1</name>
114964                  <description>Vin2 is selected as resistor ladder network supply reference.</description>
114965                  <value>#1</value>
114966                </enumeratedValue>
114967              </enumeratedValues>
114968            </field>
114969            <field>
114970              <name>DACEN</name>
114971              <description>DAC Enable</description>
114972              <bitOffset>7</bitOffset>
114973              <bitWidth>1</bitWidth>
114974              <access>read-write</access>
114975              <enumeratedValues>
114976                <enumeratedValue>
114977                  <name>0</name>
114978                  <description>DAC is disabled.</description>
114979                  <value>#0</value>
114980                </enumeratedValue>
114981                <enumeratedValue>
114982                  <name>1</name>
114983                  <description>DAC is enabled.</description>
114984                  <value>#1</value>
114985                </enumeratedValue>
114986              </enumeratedValues>
114987            </field>
114988          </fields>
114989        </register>
114990        <register>
114991          <name>MUXCR</name>
114992          <description>MUX Control Register</description>
114993          <addressOffset>0x5</addressOffset>
114994          <size>8</size>
114995          <access>read-write</access>
114996          <resetValue>0</resetValue>
114997          <resetMask>0xFF</resetMask>
114998          <fields>
114999            <field>
115000              <name>MSEL</name>
115001              <description>Minus Input Mux Control</description>
115002              <bitOffset>0</bitOffset>
115003              <bitWidth>3</bitWidth>
115004              <access>read-write</access>
115005              <enumeratedValues>
115006                <enumeratedValue>
115007                  <name>000</name>
115008                  <description>IN0</description>
115009                  <value>#000</value>
115010                </enumeratedValue>
115011                <enumeratedValue>
115012                  <name>001</name>
115013                  <description>IN1</description>
115014                  <value>#001</value>
115015                </enumeratedValue>
115016                <enumeratedValue>
115017                  <name>010</name>
115018                  <description>IN2</description>
115019                  <value>#010</value>
115020                </enumeratedValue>
115021                <enumeratedValue>
115022                  <name>011</name>
115023                  <description>IN3</description>
115024                  <value>#011</value>
115025                </enumeratedValue>
115026                <enumeratedValue>
115027                  <name>100</name>
115028                  <description>IN4</description>
115029                  <value>#100</value>
115030                </enumeratedValue>
115031                <enumeratedValue>
115032                  <name>101</name>
115033                  <description>IN5</description>
115034                  <value>#101</value>
115035                </enumeratedValue>
115036                <enumeratedValue>
115037                  <name>110</name>
115038                  <description>IN6</description>
115039                  <value>#110</value>
115040                </enumeratedValue>
115041                <enumeratedValue>
115042                  <name>111</name>
115043                  <description>IN7</description>
115044                  <value>#111</value>
115045                </enumeratedValue>
115046              </enumeratedValues>
115047            </field>
115048            <field>
115049              <name>PSEL</name>
115050              <description>Plus Input Mux Control</description>
115051              <bitOffset>3</bitOffset>
115052              <bitWidth>3</bitWidth>
115053              <access>read-write</access>
115054              <enumeratedValues>
115055                <enumeratedValue>
115056                  <name>000</name>
115057                  <description>IN0</description>
115058                  <value>#000</value>
115059                </enumeratedValue>
115060                <enumeratedValue>
115061                  <name>001</name>
115062                  <description>IN1</description>
115063                  <value>#001</value>
115064                </enumeratedValue>
115065                <enumeratedValue>
115066                  <name>010</name>
115067                  <description>IN2</description>
115068                  <value>#010</value>
115069                </enumeratedValue>
115070                <enumeratedValue>
115071                  <name>011</name>
115072                  <description>IN3</description>
115073                  <value>#011</value>
115074                </enumeratedValue>
115075                <enumeratedValue>
115076                  <name>100</name>
115077                  <description>IN4</description>
115078                  <value>#100</value>
115079                </enumeratedValue>
115080                <enumeratedValue>
115081                  <name>101</name>
115082                  <description>IN5</description>
115083                  <value>#101</value>
115084                </enumeratedValue>
115085                <enumeratedValue>
115086                  <name>110</name>
115087                  <description>IN6</description>
115088                  <value>#110</value>
115089                </enumeratedValue>
115090                <enumeratedValue>
115091                  <name>111</name>
115092                  <description>IN7</description>
115093                  <value>#111</value>
115094                </enumeratedValue>
115095              </enumeratedValues>
115096            </field>
115097          </fields>
115098        </register>
115099      </registers>
115100    </peripheral>
115101    <peripheral>
115102      <name>CMP1</name>
115103      <description>High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)</description>
115104      <groupName>CMP</groupName>
115105      <prependToName>CMP1_</prependToName>
115106      <baseAddress>0x40073008</baseAddress>
115107      <addressBlock>
115108        <offset>0</offset>
115109        <size>0x6</size>
115110        <usage>registers</usage>
115111      </addressBlock>
115112      <interrupt>
115113        <name>CMP1</name>
115114        <value>41</value>
115115      </interrupt>
115116      <registers>
115117        <register>
115118          <name>CR0</name>
115119          <description>CMP Control Register 0</description>
115120          <addressOffset>0</addressOffset>
115121          <size>8</size>
115122          <access>read-write</access>
115123          <resetValue>0</resetValue>
115124          <resetMask>0xFF</resetMask>
115125          <fields>
115126            <field>
115127              <name>HYSTCTR</name>
115128              <description>Comparator hard block hysteresis control</description>
115129              <bitOffset>0</bitOffset>
115130              <bitWidth>2</bitWidth>
115131              <access>read-write</access>
115132              <enumeratedValues>
115133                <enumeratedValue>
115134                  <name>00</name>
115135                  <description>Level 0</description>
115136                  <value>#00</value>
115137                </enumeratedValue>
115138                <enumeratedValue>
115139                  <name>01</name>
115140                  <description>Level 1</description>
115141                  <value>#01</value>
115142                </enumeratedValue>
115143                <enumeratedValue>
115144                  <name>10</name>
115145                  <description>Level 2</description>
115146                  <value>#10</value>
115147                </enumeratedValue>
115148                <enumeratedValue>
115149                  <name>11</name>
115150                  <description>Level 3</description>
115151                  <value>#11</value>
115152                </enumeratedValue>
115153              </enumeratedValues>
115154            </field>
115155            <field>
115156              <name>FILTER_CNT</name>
115157              <description>Filter Sample Count</description>
115158              <bitOffset>4</bitOffset>
115159              <bitWidth>3</bitWidth>
115160              <access>read-write</access>
115161              <enumeratedValues>
115162                <enumeratedValue>
115163                  <name>000</name>
115164                  <description>Filter is disabled. If SE = 1, then COUT is a logic 0. This is not a legal state, and is not recommended. If SE = 0, COUT = COUTA.</description>
115165                  <value>#000</value>
115166                </enumeratedValue>
115167                <enumeratedValue>
115168                  <name>001</name>
115169                  <description>One sample must agree. The comparator output is simply sampled.</description>
115170                  <value>#001</value>
115171                </enumeratedValue>
115172                <enumeratedValue>
115173                  <name>010</name>
115174                  <description>2 consecutive samples must agree.</description>
115175                  <value>#010</value>
115176                </enumeratedValue>
115177                <enumeratedValue>
115178                  <name>011</name>
115179                  <description>3 consecutive samples must agree.</description>
115180                  <value>#011</value>
115181                </enumeratedValue>
115182                <enumeratedValue>
115183                  <name>100</name>
115184                  <description>4 consecutive samples must agree.</description>
115185                  <value>#100</value>
115186                </enumeratedValue>
115187                <enumeratedValue>
115188                  <name>101</name>
115189                  <description>5 consecutive samples must agree.</description>
115190                  <value>#101</value>
115191                </enumeratedValue>
115192                <enumeratedValue>
115193                  <name>110</name>
115194                  <description>6 consecutive samples must agree.</description>
115195                  <value>#110</value>
115196                </enumeratedValue>
115197                <enumeratedValue>
115198                  <name>111</name>
115199                  <description>7 consecutive samples must agree.</description>
115200                  <value>#111</value>
115201                </enumeratedValue>
115202              </enumeratedValues>
115203            </field>
115204          </fields>
115205        </register>
115206        <register>
115207          <name>CR1</name>
115208          <description>CMP Control Register 1</description>
115209          <addressOffset>0x1</addressOffset>
115210          <size>8</size>
115211          <access>read-write</access>
115212          <resetValue>0</resetValue>
115213          <resetMask>0xFF</resetMask>
115214          <fields>
115215            <field>
115216              <name>EN</name>
115217              <description>Comparator Module Enable</description>
115218              <bitOffset>0</bitOffset>
115219              <bitWidth>1</bitWidth>
115220              <access>read-write</access>
115221              <enumeratedValues>
115222                <enumeratedValue>
115223                  <name>0</name>
115224                  <description>Analog Comparator is disabled.</description>
115225                  <value>#0</value>
115226                </enumeratedValue>
115227                <enumeratedValue>
115228                  <name>1</name>
115229                  <description>Analog Comparator is enabled.</description>
115230                  <value>#1</value>
115231                </enumeratedValue>
115232              </enumeratedValues>
115233            </field>
115234            <field>
115235              <name>OPE</name>
115236              <description>Comparator Output Pin Enable</description>
115237              <bitOffset>1</bitOffset>
115238              <bitWidth>1</bitWidth>
115239              <access>read-write</access>
115240              <enumeratedValues>
115241                <enumeratedValue>
115242                  <name>0</name>
115243                  <description>CMPO is not available on the associated CMPO output pin. If the comparator does not own the pin, this field has no effect.</description>
115244                  <value>#0</value>
115245                </enumeratedValue>
115246                <enumeratedValue>
115247                  <name>1</name>
115248                  <description>CMPO is available on the associated CMPO output pin. The comparator output (CMPO) is driven out on the associated CMPO output pin if the comparator owns the pin. If the comparator does not own the field, this bit has no effect.</description>
115249                  <value>#1</value>
115250                </enumeratedValue>
115251              </enumeratedValues>
115252            </field>
115253            <field>
115254              <name>COS</name>
115255              <description>Comparator Output Select</description>
115256              <bitOffset>2</bitOffset>
115257              <bitWidth>1</bitWidth>
115258              <access>read-write</access>
115259              <enumeratedValues>
115260                <enumeratedValue>
115261                  <name>0</name>
115262                  <description>Set the filtered comparator output (CMPO) to equal COUT.</description>
115263                  <value>#0</value>
115264                </enumeratedValue>
115265                <enumeratedValue>
115266                  <name>1</name>
115267                  <description>Set the unfiltered comparator output (CMPO) to equal COUTA.</description>
115268                  <value>#1</value>
115269                </enumeratedValue>
115270              </enumeratedValues>
115271            </field>
115272            <field>
115273              <name>INV</name>
115274              <description>Comparator INVERT</description>
115275              <bitOffset>3</bitOffset>
115276              <bitWidth>1</bitWidth>
115277              <access>read-write</access>
115278              <enumeratedValues>
115279                <enumeratedValue>
115280                  <name>0</name>
115281                  <description>Does not invert the comparator output.</description>
115282                  <value>#0</value>
115283                </enumeratedValue>
115284                <enumeratedValue>
115285                  <name>1</name>
115286                  <description>Inverts the comparator output.</description>
115287                  <value>#1</value>
115288                </enumeratedValue>
115289              </enumeratedValues>
115290            </field>
115291            <field>
115292              <name>PMODE</name>
115293              <description>Power Mode Select</description>
115294              <bitOffset>4</bitOffset>
115295              <bitWidth>1</bitWidth>
115296              <access>read-write</access>
115297              <enumeratedValues>
115298                <enumeratedValue>
115299                  <name>0</name>
115300                  <description>Low-Speed (LS) Comparison mode selected. In this mode, CMP has slower output propagation delay and lower current consumption.</description>
115301                  <value>#0</value>
115302                </enumeratedValue>
115303                <enumeratedValue>
115304                  <name>1</name>
115305                  <description>High-Speed (HS) Comparison mode selected. In this mode, CMP has faster output propagation delay and higher current consumption.</description>
115306                  <value>#1</value>
115307                </enumeratedValue>
115308              </enumeratedValues>
115309            </field>
115310            <field>
115311              <name>TRIGM</name>
115312              <description>Trigger Mode Enable</description>
115313              <bitOffset>5</bitOffset>
115314              <bitWidth>1</bitWidth>
115315              <access>read-write</access>
115316              <enumeratedValues>
115317                <enumeratedValue>
115318                  <name>0</name>
115319                  <description>Trigger mode is disabled.</description>
115320                  <value>#0</value>
115321                </enumeratedValue>
115322                <enumeratedValue>
115323                  <name>1</name>
115324                  <description>Trigger mode is enabled.</description>
115325                  <value>#1</value>
115326                </enumeratedValue>
115327              </enumeratedValues>
115328            </field>
115329            <field>
115330              <name>WE</name>
115331              <description>Windowing Enable</description>
115332              <bitOffset>6</bitOffset>
115333              <bitWidth>1</bitWidth>
115334              <access>read-write</access>
115335              <enumeratedValues>
115336                <enumeratedValue>
115337                  <name>0</name>
115338                  <description>Windowing mode is not selected.</description>
115339                  <value>#0</value>
115340                </enumeratedValue>
115341                <enumeratedValue>
115342                  <name>1</name>
115343                  <description>Windowing mode is selected.</description>
115344                  <value>#1</value>
115345                </enumeratedValue>
115346              </enumeratedValues>
115347            </field>
115348            <field>
115349              <name>SE</name>
115350              <description>Sample Enable</description>
115351              <bitOffset>7</bitOffset>
115352              <bitWidth>1</bitWidth>
115353              <access>read-write</access>
115354              <enumeratedValues>
115355                <enumeratedValue>
115356                  <name>0</name>
115357                  <description>Sampling mode is not selected.</description>
115358                  <value>#0</value>
115359                </enumeratedValue>
115360                <enumeratedValue>
115361                  <name>1</name>
115362                  <description>Sampling mode is selected.</description>
115363                  <value>#1</value>
115364                </enumeratedValue>
115365              </enumeratedValues>
115366            </field>
115367          </fields>
115368        </register>
115369        <register>
115370          <name>FPR</name>
115371          <description>CMP Filter Period Register</description>
115372          <addressOffset>0x2</addressOffset>
115373          <size>8</size>
115374          <access>read-write</access>
115375          <resetValue>0</resetValue>
115376          <resetMask>0xFF</resetMask>
115377          <fields>
115378            <field>
115379              <name>FILT_PER</name>
115380              <description>Filter Sample Period</description>
115381              <bitOffset>0</bitOffset>
115382              <bitWidth>8</bitWidth>
115383              <access>read-write</access>
115384            </field>
115385          </fields>
115386        </register>
115387        <register>
115388          <name>SCR</name>
115389          <description>CMP Status and Control Register</description>
115390          <addressOffset>0x3</addressOffset>
115391          <size>8</size>
115392          <access>read-write</access>
115393          <resetValue>0</resetValue>
115394          <resetMask>0xFF</resetMask>
115395          <fields>
115396            <field>
115397              <name>COUT</name>
115398              <description>Analog Comparator Output</description>
115399              <bitOffset>0</bitOffset>
115400              <bitWidth>1</bitWidth>
115401              <access>read-only</access>
115402            </field>
115403            <field>
115404              <name>CFF</name>
115405              <description>Analog Comparator Flag Falling</description>
115406              <bitOffset>1</bitOffset>
115407              <bitWidth>1</bitWidth>
115408              <access>read-write</access>
115409              <enumeratedValues>
115410                <enumeratedValue>
115411                  <name>0</name>
115412                  <description>Falling-edge on COUT has not been detected.</description>
115413                  <value>#0</value>
115414                </enumeratedValue>
115415                <enumeratedValue>
115416                  <name>1</name>
115417                  <description>Falling-edge on COUT has occurred.</description>
115418                  <value>#1</value>
115419                </enumeratedValue>
115420              </enumeratedValues>
115421            </field>
115422            <field>
115423              <name>CFR</name>
115424              <description>Analog Comparator Flag Rising</description>
115425              <bitOffset>2</bitOffset>
115426              <bitWidth>1</bitWidth>
115427              <access>read-write</access>
115428              <enumeratedValues>
115429                <enumeratedValue>
115430                  <name>0</name>
115431                  <description>Rising-edge on COUT has not been detected.</description>
115432                  <value>#0</value>
115433                </enumeratedValue>
115434                <enumeratedValue>
115435                  <name>1</name>
115436                  <description>Rising-edge on COUT has occurred.</description>
115437                  <value>#1</value>
115438                </enumeratedValue>
115439              </enumeratedValues>
115440            </field>
115441            <field>
115442              <name>IEF</name>
115443              <description>Comparator Interrupt Enable Falling</description>
115444              <bitOffset>3</bitOffset>
115445              <bitWidth>1</bitWidth>
115446              <access>read-write</access>
115447              <enumeratedValues>
115448                <enumeratedValue>
115449                  <name>0</name>
115450                  <description>Interrupt is disabled.</description>
115451                  <value>#0</value>
115452                </enumeratedValue>
115453                <enumeratedValue>
115454                  <name>1</name>
115455                  <description>Interrupt is enabled.</description>
115456                  <value>#1</value>
115457                </enumeratedValue>
115458              </enumeratedValues>
115459            </field>
115460            <field>
115461              <name>IER</name>
115462              <description>Comparator Interrupt Enable Rising</description>
115463              <bitOffset>4</bitOffset>
115464              <bitWidth>1</bitWidth>
115465              <access>read-write</access>
115466              <enumeratedValues>
115467                <enumeratedValue>
115468                  <name>0</name>
115469                  <description>Interrupt is disabled.</description>
115470                  <value>#0</value>
115471                </enumeratedValue>
115472                <enumeratedValue>
115473                  <name>1</name>
115474                  <description>Interrupt is enabled.</description>
115475                  <value>#1</value>
115476                </enumeratedValue>
115477              </enumeratedValues>
115478            </field>
115479            <field>
115480              <name>DMAEN</name>
115481              <description>DMA Enable Control</description>
115482              <bitOffset>6</bitOffset>
115483              <bitWidth>1</bitWidth>
115484              <access>read-write</access>
115485              <enumeratedValues>
115486                <enumeratedValue>
115487                  <name>0</name>
115488                  <description>DMA is disabled.</description>
115489                  <value>#0</value>
115490                </enumeratedValue>
115491                <enumeratedValue>
115492                  <name>1</name>
115493                  <description>DMA is enabled.</description>
115494                  <value>#1</value>
115495                </enumeratedValue>
115496              </enumeratedValues>
115497            </field>
115498          </fields>
115499        </register>
115500        <register>
115501          <name>DACCR</name>
115502          <description>DAC Control Register</description>
115503          <addressOffset>0x4</addressOffset>
115504          <size>8</size>
115505          <access>read-write</access>
115506          <resetValue>0</resetValue>
115507          <resetMask>0xFF</resetMask>
115508          <fields>
115509            <field>
115510              <name>VOSEL</name>
115511              <description>DAC Output Voltage Select</description>
115512              <bitOffset>0</bitOffset>
115513              <bitWidth>6</bitWidth>
115514              <access>read-write</access>
115515            </field>
115516            <field>
115517              <name>VRSEL</name>
115518              <description>Supply Voltage Reference Source Select</description>
115519              <bitOffset>6</bitOffset>
115520              <bitWidth>1</bitWidth>
115521              <access>read-write</access>
115522              <enumeratedValues>
115523                <enumeratedValue>
115524                  <name>0</name>
115525                  <description>Vin1 is selected as resistor ladder network supply reference.</description>
115526                  <value>#0</value>
115527                </enumeratedValue>
115528                <enumeratedValue>
115529                  <name>1</name>
115530                  <description>Vin2 is selected as resistor ladder network supply reference.</description>
115531                  <value>#1</value>
115532                </enumeratedValue>
115533              </enumeratedValues>
115534            </field>
115535            <field>
115536              <name>DACEN</name>
115537              <description>DAC Enable</description>
115538              <bitOffset>7</bitOffset>
115539              <bitWidth>1</bitWidth>
115540              <access>read-write</access>
115541              <enumeratedValues>
115542                <enumeratedValue>
115543                  <name>0</name>
115544                  <description>DAC is disabled.</description>
115545                  <value>#0</value>
115546                </enumeratedValue>
115547                <enumeratedValue>
115548                  <name>1</name>
115549                  <description>DAC is enabled.</description>
115550                  <value>#1</value>
115551                </enumeratedValue>
115552              </enumeratedValues>
115553            </field>
115554          </fields>
115555        </register>
115556        <register>
115557          <name>MUXCR</name>
115558          <description>MUX Control Register</description>
115559          <addressOffset>0x5</addressOffset>
115560          <size>8</size>
115561          <access>read-write</access>
115562          <resetValue>0</resetValue>
115563          <resetMask>0xFF</resetMask>
115564          <fields>
115565            <field>
115566              <name>MSEL</name>
115567              <description>Minus Input Mux Control</description>
115568              <bitOffset>0</bitOffset>
115569              <bitWidth>3</bitWidth>
115570              <access>read-write</access>
115571              <enumeratedValues>
115572                <enumeratedValue>
115573                  <name>000</name>
115574                  <description>IN0</description>
115575                  <value>#000</value>
115576                </enumeratedValue>
115577                <enumeratedValue>
115578                  <name>001</name>
115579                  <description>IN1</description>
115580                  <value>#001</value>
115581                </enumeratedValue>
115582                <enumeratedValue>
115583                  <name>010</name>
115584                  <description>IN2</description>
115585                  <value>#010</value>
115586                </enumeratedValue>
115587                <enumeratedValue>
115588                  <name>011</name>
115589                  <description>IN3</description>
115590                  <value>#011</value>
115591                </enumeratedValue>
115592                <enumeratedValue>
115593                  <name>100</name>
115594                  <description>IN4</description>
115595                  <value>#100</value>
115596                </enumeratedValue>
115597                <enumeratedValue>
115598                  <name>101</name>
115599                  <description>IN5</description>
115600                  <value>#101</value>
115601                </enumeratedValue>
115602                <enumeratedValue>
115603                  <name>110</name>
115604                  <description>IN6</description>
115605                  <value>#110</value>
115606                </enumeratedValue>
115607                <enumeratedValue>
115608                  <name>111</name>
115609                  <description>IN7</description>
115610                  <value>#111</value>
115611                </enumeratedValue>
115612              </enumeratedValues>
115613            </field>
115614            <field>
115615              <name>PSEL</name>
115616              <description>Plus Input Mux Control</description>
115617              <bitOffset>3</bitOffset>
115618              <bitWidth>3</bitWidth>
115619              <access>read-write</access>
115620              <enumeratedValues>
115621                <enumeratedValue>
115622                  <name>000</name>
115623                  <description>IN0</description>
115624                  <value>#000</value>
115625                </enumeratedValue>
115626                <enumeratedValue>
115627                  <name>001</name>
115628                  <description>IN1</description>
115629                  <value>#001</value>
115630                </enumeratedValue>
115631                <enumeratedValue>
115632                  <name>010</name>
115633                  <description>IN2</description>
115634                  <value>#010</value>
115635                </enumeratedValue>
115636                <enumeratedValue>
115637                  <name>011</name>
115638                  <description>IN3</description>
115639                  <value>#011</value>
115640                </enumeratedValue>
115641                <enumeratedValue>
115642                  <name>100</name>
115643                  <description>IN4</description>
115644                  <value>#100</value>
115645                </enumeratedValue>
115646                <enumeratedValue>
115647                  <name>101</name>
115648                  <description>IN5</description>
115649                  <value>#101</value>
115650                </enumeratedValue>
115651                <enumeratedValue>
115652                  <name>110</name>
115653                  <description>IN6</description>
115654                  <value>#110</value>
115655                </enumeratedValue>
115656                <enumeratedValue>
115657                  <name>111</name>
115658                  <description>IN7</description>
115659                  <value>#111</value>
115660                </enumeratedValue>
115661              </enumeratedValues>
115662            </field>
115663          </fields>
115664        </register>
115665      </registers>
115666    </peripheral>
115667    <peripheral>
115668      <name>VREF</name>
115669      <description>Voltage Reference</description>
115670      <prependToName>VREF_</prependToName>
115671      <baseAddress>0x40074000</baseAddress>
115672      <addressBlock>
115673        <offset>0</offset>
115674        <size>0x2</size>
115675        <usage>registers</usage>
115676      </addressBlock>
115677      <registers>
115678        <register>
115679          <name>TRM</name>
115680          <description>VREF Trim Register</description>
115681          <addressOffset>0</addressOffset>
115682          <size>8</size>
115683          <access>read-write</access>
115684          <resetValue>0</resetValue>
115685          <resetMask>0x40</resetMask>
115686          <fields>
115687            <field>
115688              <name>TRIM</name>
115689              <description>Trim bits</description>
115690              <bitOffset>0</bitOffset>
115691              <bitWidth>6</bitWidth>
115692              <access>read-write</access>
115693              <enumeratedValues>
115694                <enumeratedValue>
115695                  <name>000000</name>
115696                  <description>Min</description>
115697                  <value>#0</value>
115698                </enumeratedValue>
115699                <enumeratedValue>
115700                  <name>111111</name>
115701                  <description>Max</description>
115702                  <value>#111111</value>
115703                </enumeratedValue>
115704              </enumeratedValues>
115705            </field>
115706            <field>
115707              <name>CHOPEN</name>
115708              <description>Chop oscillator enable. When set, internal chopping operation is enabled and the internal analog offset will be minimized.</description>
115709              <bitOffset>6</bitOffset>
115710              <bitWidth>1</bitWidth>
115711              <access>read-write</access>
115712              <enumeratedValues>
115713                <enumeratedValue>
115714                  <name>0</name>
115715                  <description>Chop oscillator is disabled.</description>
115716                  <value>#0</value>
115717                </enumeratedValue>
115718                <enumeratedValue>
115719                  <name>1</name>
115720                  <description>Chop oscillator is enabled.</description>
115721                  <value>#1</value>
115722                </enumeratedValue>
115723              </enumeratedValues>
115724            </field>
115725          </fields>
115726        </register>
115727        <register>
115728          <name>SC</name>
115729          <description>VREF Status and Control Register</description>
115730          <addressOffset>0x1</addressOffset>
115731          <size>8</size>
115732          <access>read-write</access>
115733          <resetValue>0</resetValue>
115734          <resetMask>0xFF</resetMask>
115735          <fields>
115736            <field>
115737              <name>MODE_LV</name>
115738              <description>Buffer Mode selection</description>
115739              <bitOffset>0</bitOffset>
115740              <bitWidth>2</bitWidth>
115741              <access>read-write</access>
115742              <enumeratedValues>
115743                <enumeratedValue>
115744                  <name>00</name>
115745                  <description>Bandgap on only, for stabilization and startup</description>
115746                  <value>#00</value>
115747                </enumeratedValue>
115748                <enumeratedValue>
115749                  <name>01</name>
115750                  <description>High power buffer mode enabled</description>
115751                  <value>#01</value>
115752                </enumeratedValue>
115753                <enumeratedValue>
115754                  <name>10</name>
115755                  <description>Low-power buffer mode enabled</description>
115756                  <value>#10</value>
115757                </enumeratedValue>
115758              </enumeratedValues>
115759            </field>
115760            <field>
115761              <name>VREFST</name>
115762              <description>Internal Voltage Reference stable</description>
115763              <bitOffset>2</bitOffset>
115764              <bitWidth>1</bitWidth>
115765              <access>read-only</access>
115766              <enumeratedValues>
115767                <enumeratedValue>
115768                  <name>0</name>
115769                  <description>The module is disabled or not stable.</description>
115770                  <value>#0</value>
115771                </enumeratedValue>
115772                <enumeratedValue>
115773                  <name>1</name>
115774                  <description>The module is stable.</description>
115775                  <value>#1</value>
115776                </enumeratedValue>
115777              </enumeratedValues>
115778            </field>
115779            <field>
115780              <name>ICOMPEN</name>
115781              <description>Second order curvature compensation enable</description>
115782              <bitOffset>5</bitOffset>
115783              <bitWidth>1</bitWidth>
115784              <access>read-write</access>
115785              <enumeratedValues>
115786                <enumeratedValue>
115787                  <name>0</name>
115788                  <description>Disabled</description>
115789                  <value>#0</value>
115790                </enumeratedValue>
115791                <enumeratedValue>
115792                  <name>1</name>
115793                  <description>Enabled</description>
115794                  <value>#1</value>
115795                </enumeratedValue>
115796              </enumeratedValues>
115797            </field>
115798            <field>
115799              <name>REGEN</name>
115800              <description>Regulator enable</description>
115801              <bitOffset>6</bitOffset>
115802              <bitWidth>1</bitWidth>
115803              <access>read-write</access>
115804              <enumeratedValues>
115805                <enumeratedValue>
115806                  <name>0</name>
115807                  <description>Internal 1.75 V regulator is disabled.</description>
115808                  <value>#0</value>
115809                </enumeratedValue>
115810                <enumeratedValue>
115811                  <name>1</name>
115812                  <description>Internal 1.75 V regulator is enabled.</description>
115813                  <value>#1</value>
115814                </enumeratedValue>
115815              </enumeratedValues>
115816            </field>
115817            <field>
115818              <name>VREFEN</name>
115819              <description>Internal Voltage Reference enable</description>
115820              <bitOffset>7</bitOffset>
115821              <bitWidth>1</bitWidth>
115822              <access>read-write</access>
115823              <enumeratedValues>
115824                <enumeratedValue>
115825                  <name>0</name>
115826                  <description>The module is disabled.</description>
115827                  <value>#0</value>
115828                </enumeratedValue>
115829                <enumeratedValue>
115830                  <name>1</name>
115831                  <description>The module is enabled.</description>
115832                  <value>#1</value>
115833                </enumeratedValue>
115834              </enumeratedValues>
115835            </field>
115836          </fields>
115837        </register>
115838      </registers>
115839    </peripheral>
115840    <peripheral>
115841      <name>LLWU</name>
115842      <description>Low leakage wakeup unit</description>
115843      <prependToName>LLWU_</prependToName>
115844      <baseAddress>0x4007C000</baseAddress>
115845      <addressBlock>
115846        <offset>0</offset>
115847        <size>0x12</size>
115848        <usage>registers</usage>
115849      </addressBlock>
115850      <interrupt>
115851        <name>LLWU</name>
115852        <value>21</value>
115853      </interrupt>
115854      <registers>
115855        <register>
115856          <name>PE1</name>
115857          <description>LLWU Pin Enable 1 register</description>
115858          <addressOffset>0</addressOffset>
115859          <size>8</size>
115860          <access>read-write</access>
115861          <resetValue>0</resetValue>
115862          <resetMask>0xFF</resetMask>
115863          <fields>
115864            <field>
115865              <name>WUPE0</name>
115866              <description>Wakeup Pin Enable For LLWU_P0</description>
115867              <bitOffset>0</bitOffset>
115868              <bitWidth>2</bitWidth>
115869              <access>read-write</access>
115870              <enumeratedValues>
115871                <enumeratedValue>
115872                  <name>00</name>
115873                  <description>External input pin disabled as wakeup input</description>
115874                  <value>#00</value>
115875                </enumeratedValue>
115876                <enumeratedValue>
115877                  <name>01</name>
115878                  <description>External input pin enabled with rising edge detection</description>
115879                  <value>#01</value>
115880                </enumeratedValue>
115881                <enumeratedValue>
115882                  <name>10</name>
115883                  <description>External input pin enabled with falling edge detection</description>
115884                  <value>#10</value>
115885                </enumeratedValue>
115886                <enumeratedValue>
115887                  <name>11</name>
115888                  <description>External input pin enabled with any change detection</description>
115889                  <value>#11</value>
115890                </enumeratedValue>
115891              </enumeratedValues>
115892            </field>
115893            <field>
115894              <name>WUPE1</name>
115895              <description>Wakeup Pin Enable For LLWU_P1</description>
115896              <bitOffset>2</bitOffset>
115897              <bitWidth>2</bitWidth>
115898              <access>read-write</access>
115899              <enumeratedValues>
115900                <enumeratedValue>
115901                  <name>00</name>
115902                  <description>External input pin disabled as wakeup input</description>
115903                  <value>#00</value>
115904                </enumeratedValue>
115905                <enumeratedValue>
115906                  <name>01</name>
115907                  <description>External input pin enabled with rising edge detection</description>
115908                  <value>#01</value>
115909                </enumeratedValue>
115910                <enumeratedValue>
115911                  <name>10</name>
115912                  <description>External input pin enabled with falling edge detection</description>
115913                  <value>#10</value>
115914                </enumeratedValue>
115915                <enumeratedValue>
115916                  <name>11</name>
115917                  <description>External input pin enabled with any change detection</description>
115918                  <value>#11</value>
115919                </enumeratedValue>
115920              </enumeratedValues>
115921            </field>
115922            <field>
115923              <name>WUPE2</name>
115924              <description>Wakeup Pin Enable For LLWU_P2</description>
115925              <bitOffset>4</bitOffset>
115926              <bitWidth>2</bitWidth>
115927              <access>read-write</access>
115928              <enumeratedValues>
115929                <enumeratedValue>
115930                  <name>00</name>
115931                  <description>External input pin disabled as wakeup input</description>
115932                  <value>#00</value>
115933                </enumeratedValue>
115934                <enumeratedValue>
115935                  <name>01</name>
115936                  <description>External input pin enabled with rising edge detection</description>
115937                  <value>#01</value>
115938                </enumeratedValue>
115939                <enumeratedValue>
115940                  <name>10</name>
115941                  <description>External input pin enabled with falling edge detection</description>
115942                  <value>#10</value>
115943                </enumeratedValue>
115944                <enumeratedValue>
115945                  <name>11</name>
115946                  <description>External input pin enabled with any change detection</description>
115947                  <value>#11</value>
115948                </enumeratedValue>
115949              </enumeratedValues>
115950            </field>
115951            <field>
115952              <name>WUPE3</name>
115953              <description>Wakeup Pin Enable For LLWU_P3</description>
115954              <bitOffset>6</bitOffset>
115955              <bitWidth>2</bitWidth>
115956              <access>read-write</access>
115957              <enumeratedValues>
115958                <enumeratedValue>
115959                  <name>00</name>
115960                  <description>External input pin disabled as wakeup input</description>
115961                  <value>#00</value>
115962                </enumeratedValue>
115963                <enumeratedValue>
115964                  <name>01</name>
115965                  <description>External input pin enabled with rising edge detection</description>
115966                  <value>#01</value>
115967                </enumeratedValue>
115968                <enumeratedValue>
115969                  <name>10</name>
115970                  <description>External input pin enabled with falling edge detection</description>
115971                  <value>#10</value>
115972                </enumeratedValue>
115973                <enumeratedValue>
115974                  <name>11</name>
115975                  <description>External input pin enabled with any change detection</description>
115976                  <value>#11</value>
115977                </enumeratedValue>
115978              </enumeratedValues>
115979            </field>
115980          </fields>
115981        </register>
115982        <register>
115983          <name>PE2</name>
115984          <description>LLWU Pin Enable 2 register</description>
115985          <addressOffset>0x1</addressOffset>
115986          <size>8</size>
115987          <access>read-write</access>
115988          <resetValue>0</resetValue>
115989          <resetMask>0xFF</resetMask>
115990          <fields>
115991            <field>
115992              <name>WUPE4</name>
115993              <description>Wakeup Pin Enable For LLWU_P4</description>
115994              <bitOffset>0</bitOffset>
115995              <bitWidth>2</bitWidth>
115996              <access>read-write</access>
115997              <enumeratedValues>
115998                <enumeratedValue>
115999                  <name>00</name>
116000                  <description>External input pin disabled as wakeup input</description>
116001                  <value>#00</value>
116002                </enumeratedValue>
116003                <enumeratedValue>
116004                  <name>01</name>
116005                  <description>External input pin enabled with rising edge detection</description>
116006                  <value>#01</value>
116007                </enumeratedValue>
116008                <enumeratedValue>
116009                  <name>10</name>
116010                  <description>External input pin enabled with falling edge detection</description>
116011                  <value>#10</value>
116012                </enumeratedValue>
116013                <enumeratedValue>
116014                  <name>11</name>
116015                  <description>External input pin enabled with any change detection</description>
116016                  <value>#11</value>
116017                </enumeratedValue>
116018              </enumeratedValues>
116019            </field>
116020            <field>
116021              <name>WUPE5</name>
116022              <description>Wakeup Pin Enable For LLWU_P5</description>
116023              <bitOffset>2</bitOffset>
116024              <bitWidth>2</bitWidth>
116025              <access>read-write</access>
116026              <enumeratedValues>
116027                <enumeratedValue>
116028                  <name>00</name>
116029                  <description>External input pin disabled as wakeup input</description>
116030                  <value>#00</value>
116031                </enumeratedValue>
116032                <enumeratedValue>
116033                  <name>01</name>
116034                  <description>External input pin enabled with rising edge detection</description>
116035                  <value>#01</value>
116036                </enumeratedValue>
116037                <enumeratedValue>
116038                  <name>10</name>
116039                  <description>External input pin enabled with falling edge detection</description>
116040                  <value>#10</value>
116041                </enumeratedValue>
116042                <enumeratedValue>
116043                  <name>11</name>
116044                  <description>External input pin enabled with any change detection</description>
116045                  <value>#11</value>
116046                </enumeratedValue>
116047              </enumeratedValues>
116048            </field>
116049            <field>
116050              <name>WUPE6</name>
116051              <description>Wakeup Pin Enable For LLWU_P6</description>
116052              <bitOffset>4</bitOffset>
116053              <bitWidth>2</bitWidth>
116054              <access>read-write</access>
116055              <enumeratedValues>
116056                <enumeratedValue>
116057                  <name>00</name>
116058                  <description>External input pin disabled as wakeup input</description>
116059                  <value>#00</value>
116060                </enumeratedValue>
116061                <enumeratedValue>
116062                  <name>01</name>
116063                  <description>External input pin enabled with rising edge detection</description>
116064                  <value>#01</value>
116065                </enumeratedValue>
116066                <enumeratedValue>
116067                  <name>10</name>
116068                  <description>External input pin enabled with falling edge detection</description>
116069                  <value>#10</value>
116070                </enumeratedValue>
116071                <enumeratedValue>
116072                  <name>11</name>
116073                  <description>External input pin enabled with any change detection</description>
116074                  <value>#11</value>
116075                </enumeratedValue>
116076              </enumeratedValues>
116077            </field>
116078            <field>
116079              <name>WUPE7</name>
116080              <description>Wakeup Pin Enable For LLWU_P7</description>
116081              <bitOffset>6</bitOffset>
116082              <bitWidth>2</bitWidth>
116083              <access>read-write</access>
116084              <enumeratedValues>
116085                <enumeratedValue>
116086                  <name>00</name>
116087                  <description>External input pin disabled as wakeup input</description>
116088                  <value>#00</value>
116089                </enumeratedValue>
116090                <enumeratedValue>
116091                  <name>01</name>
116092                  <description>External input pin enabled with rising edge detection</description>
116093                  <value>#01</value>
116094                </enumeratedValue>
116095                <enumeratedValue>
116096                  <name>10</name>
116097                  <description>External input pin enabled with falling edge detection</description>
116098                  <value>#10</value>
116099                </enumeratedValue>
116100                <enumeratedValue>
116101                  <name>11</name>
116102                  <description>External input pin enabled with any change detection</description>
116103                  <value>#11</value>
116104                </enumeratedValue>
116105              </enumeratedValues>
116106            </field>
116107          </fields>
116108        </register>
116109        <register>
116110          <name>PE3</name>
116111          <description>LLWU Pin Enable 3 register</description>
116112          <addressOffset>0x2</addressOffset>
116113          <size>8</size>
116114          <access>read-write</access>
116115          <resetValue>0</resetValue>
116116          <resetMask>0xFF</resetMask>
116117          <fields>
116118            <field>
116119              <name>WUPE8</name>
116120              <description>Wakeup Pin Enable For LLWU_P8</description>
116121              <bitOffset>0</bitOffset>
116122              <bitWidth>2</bitWidth>
116123              <access>read-write</access>
116124              <enumeratedValues>
116125                <enumeratedValue>
116126                  <name>00</name>
116127                  <description>External input pin disabled as wakeup input</description>
116128                  <value>#00</value>
116129                </enumeratedValue>
116130                <enumeratedValue>
116131                  <name>01</name>
116132                  <description>External input pin enabled with rising edge detection</description>
116133                  <value>#01</value>
116134                </enumeratedValue>
116135                <enumeratedValue>
116136                  <name>10</name>
116137                  <description>External input pin enabled with falling edge detection</description>
116138                  <value>#10</value>
116139                </enumeratedValue>
116140                <enumeratedValue>
116141                  <name>11</name>
116142                  <description>External input pin enabled with any change detection</description>
116143                  <value>#11</value>
116144                </enumeratedValue>
116145              </enumeratedValues>
116146            </field>
116147            <field>
116148              <name>WUPE9</name>
116149              <description>Wakeup Pin Enable For LLWU_P9</description>
116150              <bitOffset>2</bitOffset>
116151              <bitWidth>2</bitWidth>
116152              <access>read-write</access>
116153              <enumeratedValues>
116154                <enumeratedValue>
116155                  <name>00</name>
116156                  <description>External input pin disabled as wakeup input</description>
116157                  <value>#00</value>
116158                </enumeratedValue>
116159                <enumeratedValue>
116160                  <name>01</name>
116161                  <description>External input pin enabled with rising edge detection</description>
116162                  <value>#01</value>
116163                </enumeratedValue>
116164                <enumeratedValue>
116165                  <name>10</name>
116166                  <description>External input pin enabled with falling edge detection</description>
116167                  <value>#10</value>
116168                </enumeratedValue>
116169                <enumeratedValue>
116170                  <name>11</name>
116171                  <description>External input pin enabled with any change detection</description>
116172                  <value>#11</value>
116173                </enumeratedValue>
116174              </enumeratedValues>
116175            </field>
116176            <field>
116177              <name>WUPE10</name>
116178              <description>Wakeup Pin Enable For LLWU_P10</description>
116179              <bitOffset>4</bitOffset>
116180              <bitWidth>2</bitWidth>
116181              <access>read-write</access>
116182              <enumeratedValues>
116183                <enumeratedValue>
116184                  <name>00</name>
116185                  <description>External input pin disabled as wakeup input</description>
116186                  <value>#00</value>
116187                </enumeratedValue>
116188                <enumeratedValue>
116189                  <name>01</name>
116190                  <description>External input pin enabled with rising edge detection</description>
116191                  <value>#01</value>
116192                </enumeratedValue>
116193                <enumeratedValue>
116194                  <name>10</name>
116195                  <description>External input pin enabled with falling edge detection</description>
116196                  <value>#10</value>
116197                </enumeratedValue>
116198                <enumeratedValue>
116199                  <name>11</name>
116200                  <description>External input pin enabled with any change detection</description>
116201                  <value>#11</value>
116202                </enumeratedValue>
116203              </enumeratedValues>
116204            </field>
116205            <field>
116206              <name>WUPE11</name>
116207              <description>Wakeup Pin Enable For LLWU_P11</description>
116208              <bitOffset>6</bitOffset>
116209              <bitWidth>2</bitWidth>
116210              <access>read-write</access>
116211              <enumeratedValues>
116212                <enumeratedValue>
116213                  <name>00</name>
116214                  <description>External input pin disabled as wakeup input</description>
116215                  <value>#00</value>
116216                </enumeratedValue>
116217                <enumeratedValue>
116218                  <name>01</name>
116219                  <description>External input pin enabled with rising edge detection</description>
116220                  <value>#01</value>
116221                </enumeratedValue>
116222                <enumeratedValue>
116223                  <name>10</name>
116224                  <description>External input pin enabled with falling edge detection</description>
116225                  <value>#10</value>
116226                </enumeratedValue>
116227                <enumeratedValue>
116228                  <name>11</name>
116229                  <description>External input pin enabled with any change detection</description>
116230                  <value>#11</value>
116231                </enumeratedValue>
116232              </enumeratedValues>
116233            </field>
116234          </fields>
116235        </register>
116236        <register>
116237          <name>PE4</name>
116238          <description>LLWU Pin Enable 4 register</description>
116239          <addressOffset>0x3</addressOffset>
116240          <size>8</size>
116241          <access>read-write</access>
116242          <resetValue>0</resetValue>
116243          <resetMask>0xFF</resetMask>
116244          <fields>
116245            <field>
116246              <name>WUPE12</name>
116247              <description>Wakeup Pin Enable For LLWU_P12</description>
116248              <bitOffset>0</bitOffset>
116249              <bitWidth>2</bitWidth>
116250              <access>read-write</access>
116251              <enumeratedValues>
116252                <enumeratedValue>
116253                  <name>00</name>
116254                  <description>External input pin disabled as wakeup input</description>
116255                  <value>#00</value>
116256                </enumeratedValue>
116257                <enumeratedValue>
116258                  <name>01</name>
116259                  <description>External input pin enabled with rising edge detection</description>
116260                  <value>#01</value>
116261                </enumeratedValue>
116262                <enumeratedValue>
116263                  <name>10</name>
116264                  <description>External input pin enabled with falling edge detection</description>
116265                  <value>#10</value>
116266                </enumeratedValue>
116267                <enumeratedValue>
116268                  <name>11</name>
116269                  <description>External input pin enabled with any change detection</description>
116270                  <value>#11</value>
116271                </enumeratedValue>
116272              </enumeratedValues>
116273            </field>
116274            <field>
116275              <name>WUPE13</name>
116276              <description>Wakeup Pin Enable For LLWU_P13</description>
116277              <bitOffset>2</bitOffset>
116278              <bitWidth>2</bitWidth>
116279              <access>read-write</access>
116280              <enumeratedValues>
116281                <enumeratedValue>
116282                  <name>00</name>
116283                  <description>External input pin disabled as wakeup input</description>
116284                  <value>#00</value>
116285                </enumeratedValue>
116286                <enumeratedValue>
116287                  <name>01</name>
116288                  <description>External input pin enabled with rising edge detection</description>
116289                  <value>#01</value>
116290                </enumeratedValue>
116291                <enumeratedValue>
116292                  <name>10</name>
116293                  <description>External input pin enabled with falling edge detection</description>
116294                  <value>#10</value>
116295                </enumeratedValue>
116296                <enumeratedValue>
116297                  <name>11</name>
116298                  <description>External input pin enabled with any change detection</description>
116299                  <value>#11</value>
116300                </enumeratedValue>
116301              </enumeratedValues>
116302            </field>
116303            <field>
116304              <name>WUPE14</name>
116305              <description>Wakeup Pin Enable For LLWU_P14</description>
116306              <bitOffset>4</bitOffset>
116307              <bitWidth>2</bitWidth>
116308              <access>read-write</access>
116309              <enumeratedValues>
116310                <enumeratedValue>
116311                  <name>00</name>
116312                  <description>External input pin disabled as wakeup input</description>
116313                  <value>#00</value>
116314                </enumeratedValue>
116315                <enumeratedValue>
116316                  <name>01</name>
116317                  <description>External input pin enabled with rising edge detection</description>
116318                  <value>#01</value>
116319                </enumeratedValue>
116320                <enumeratedValue>
116321                  <name>10</name>
116322                  <description>External input pin enabled with falling edge detection</description>
116323                  <value>#10</value>
116324                </enumeratedValue>
116325                <enumeratedValue>
116326                  <name>11</name>
116327                  <description>External input pin enabled with any change detection</description>
116328                  <value>#11</value>
116329                </enumeratedValue>
116330              </enumeratedValues>
116331            </field>
116332            <field>
116333              <name>WUPE15</name>
116334              <description>Wakeup Pin Enable For LLWU_P15</description>
116335              <bitOffset>6</bitOffset>
116336              <bitWidth>2</bitWidth>
116337              <access>read-write</access>
116338              <enumeratedValues>
116339                <enumeratedValue>
116340                  <name>00</name>
116341                  <description>External input pin disabled as wakeup input</description>
116342                  <value>#00</value>
116343                </enumeratedValue>
116344                <enumeratedValue>
116345                  <name>01</name>
116346                  <description>External input pin enabled with rising edge detection</description>
116347                  <value>#01</value>
116348                </enumeratedValue>
116349                <enumeratedValue>
116350                  <name>10</name>
116351                  <description>External input pin enabled with falling edge detection</description>
116352                  <value>#10</value>
116353                </enumeratedValue>
116354                <enumeratedValue>
116355                  <name>11</name>
116356                  <description>External input pin enabled with any change detection</description>
116357                  <value>#11</value>
116358                </enumeratedValue>
116359              </enumeratedValues>
116360            </field>
116361          </fields>
116362        </register>
116363        <register>
116364          <name>PE5</name>
116365          <description>LLWU Pin Enable 5 register</description>
116366          <addressOffset>0x4</addressOffset>
116367          <size>8</size>
116368          <access>read-write</access>
116369          <resetValue>0</resetValue>
116370          <resetMask>0xFF</resetMask>
116371          <fields>
116372            <field>
116373              <name>WUPE16</name>
116374              <description>Wakeup Pin Enable For LLWU_P16</description>
116375              <bitOffset>0</bitOffset>
116376              <bitWidth>2</bitWidth>
116377              <access>read-write</access>
116378              <enumeratedValues>
116379                <enumeratedValue>
116380                  <name>00</name>
116381                  <description>External input pin disabled as wakeup input</description>
116382                  <value>#00</value>
116383                </enumeratedValue>
116384                <enumeratedValue>
116385                  <name>01</name>
116386                  <description>External input pin enabled with rising edge detection</description>
116387                  <value>#01</value>
116388                </enumeratedValue>
116389                <enumeratedValue>
116390                  <name>10</name>
116391                  <description>External input pin enabled with falling edge detection</description>
116392                  <value>#10</value>
116393                </enumeratedValue>
116394                <enumeratedValue>
116395                  <name>11</name>
116396                  <description>External input pin enabled with any change detection</description>
116397                  <value>#11</value>
116398                </enumeratedValue>
116399              </enumeratedValues>
116400            </field>
116401            <field>
116402              <name>WUPE17</name>
116403              <description>Wakeup Pin Enable For LLWU_P17</description>
116404              <bitOffset>2</bitOffset>
116405              <bitWidth>2</bitWidth>
116406              <access>read-write</access>
116407              <enumeratedValues>
116408                <enumeratedValue>
116409                  <name>00</name>
116410                  <description>External input pin disabled as wakeup input</description>
116411                  <value>#00</value>
116412                </enumeratedValue>
116413                <enumeratedValue>
116414                  <name>01</name>
116415                  <description>External input pin enabled with rising edge detection</description>
116416                  <value>#01</value>
116417                </enumeratedValue>
116418                <enumeratedValue>
116419                  <name>10</name>
116420                  <description>External input pin enabled with falling edge detection</description>
116421                  <value>#10</value>
116422                </enumeratedValue>
116423                <enumeratedValue>
116424                  <name>11</name>
116425                  <description>External input pin enabled with any change detection</description>
116426                  <value>#11</value>
116427                </enumeratedValue>
116428              </enumeratedValues>
116429            </field>
116430            <field>
116431              <name>WUPE18</name>
116432              <description>Wakeup Pin Enable For LLWU_P18</description>
116433              <bitOffset>4</bitOffset>
116434              <bitWidth>2</bitWidth>
116435              <access>read-write</access>
116436              <enumeratedValues>
116437                <enumeratedValue>
116438                  <name>00</name>
116439                  <description>External input pin disabled as wakeup input</description>
116440                  <value>#00</value>
116441                </enumeratedValue>
116442                <enumeratedValue>
116443                  <name>01</name>
116444                  <description>External input pin enabled with rising edge detection</description>
116445                  <value>#01</value>
116446                </enumeratedValue>
116447                <enumeratedValue>
116448                  <name>10</name>
116449                  <description>External input pin enabled with falling edge detection</description>
116450                  <value>#10</value>
116451                </enumeratedValue>
116452                <enumeratedValue>
116453                  <name>11</name>
116454                  <description>External input pin enabled with any change detection</description>
116455                  <value>#11</value>
116456                </enumeratedValue>
116457              </enumeratedValues>
116458            </field>
116459            <field>
116460              <name>WUPE19</name>
116461              <description>Wakeup Pin Enable For LLWU_P19</description>
116462              <bitOffset>6</bitOffset>
116463              <bitWidth>2</bitWidth>
116464              <access>read-write</access>
116465              <enumeratedValues>
116466                <enumeratedValue>
116467                  <name>00</name>
116468                  <description>External input pin disabled as wakeup input</description>
116469                  <value>#00</value>
116470                </enumeratedValue>
116471                <enumeratedValue>
116472                  <name>01</name>
116473                  <description>External input pin enabled with rising edge detection</description>
116474                  <value>#01</value>
116475                </enumeratedValue>
116476                <enumeratedValue>
116477                  <name>10</name>
116478                  <description>External input pin enabled with falling edge detection</description>
116479                  <value>#10</value>
116480                </enumeratedValue>
116481                <enumeratedValue>
116482                  <name>11</name>
116483                  <description>External input pin enabled with any change detection</description>
116484                  <value>#11</value>
116485                </enumeratedValue>
116486              </enumeratedValues>
116487            </field>
116488          </fields>
116489        </register>
116490        <register>
116491          <name>PE6</name>
116492          <description>LLWU Pin Enable 6 register</description>
116493          <addressOffset>0x5</addressOffset>
116494          <size>8</size>
116495          <access>read-write</access>
116496          <resetValue>0</resetValue>
116497          <resetMask>0xFF</resetMask>
116498          <fields>
116499            <field>
116500              <name>WUPE20</name>
116501              <description>Wakeup Pin Enable For LLWU_P20</description>
116502              <bitOffset>0</bitOffset>
116503              <bitWidth>2</bitWidth>
116504              <access>read-write</access>
116505              <enumeratedValues>
116506                <enumeratedValue>
116507                  <name>00</name>
116508                  <description>External input pin disabled as wakeup input</description>
116509                  <value>#00</value>
116510                </enumeratedValue>
116511                <enumeratedValue>
116512                  <name>01</name>
116513                  <description>External input pin enabled with rising edge detection</description>
116514                  <value>#01</value>
116515                </enumeratedValue>
116516                <enumeratedValue>
116517                  <name>10</name>
116518                  <description>External input pin enabled with falling edge detection</description>
116519                  <value>#10</value>
116520                </enumeratedValue>
116521                <enumeratedValue>
116522                  <name>11</name>
116523                  <description>External input pin enabled with any change detection</description>
116524                  <value>#11</value>
116525                </enumeratedValue>
116526              </enumeratedValues>
116527            </field>
116528            <field>
116529              <name>WUPE21</name>
116530              <description>Wakeup Pin Enable For LLWU_P21</description>
116531              <bitOffset>2</bitOffset>
116532              <bitWidth>2</bitWidth>
116533              <access>read-write</access>
116534              <enumeratedValues>
116535                <enumeratedValue>
116536                  <name>00</name>
116537                  <description>External input pin disabled as wakeup input</description>
116538                  <value>#00</value>
116539                </enumeratedValue>
116540                <enumeratedValue>
116541                  <name>01</name>
116542                  <description>External input pin enabled with rising edge detection</description>
116543                  <value>#01</value>
116544                </enumeratedValue>
116545                <enumeratedValue>
116546                  <name>10</name>
116547                  <description>External input pin enabled with falling edge detection</description>
116548                  <value>#10</value>
116549                </enumeratedValue>
116550                <enumeratedValue>
116551                  <name>11</name>
116552                  <description>External input pin enabled with any change detection</description>
116553                  <value>#11</value>
116554                </enumeratedValue>
116555              </enumeratedValues>
116556            </field>
116557            <field>
116558              <name>WUPE22</name>
116559              <description>Wakeup Pin Enable For LLWU_P22</description>
116560              <bitOffset>4</bitOffset>
116561              <bitWidth>2</bitWidth>
116562              <access>read-write</access>
116563              <enumeratedValues>
116564                <enumeratedValue>
116565                  <name>00</name>
116566                  <description>External input pin disabled as wakeup input</description>
116567                  <value>#00</value>
116568                </enumeratedValue>
116569                <enumeratedValue>
116570                  <name>01</name>
116571                  <description>External input pin enabled with rising edge detection</description>
116572                  <value>#01</value>
116573                </enumeratedValue>
116574                <enumeratedValue>
116575                  <name>10</name>
116576                  <description>External input pin enabled with falling edge detection</description>
116577                  <value>#10</value>
116578                </enumeratedValue>
116579                <enumeratedValue>
116580                  <name>11</name>
116581                  <description>External input pin enabled with any change detection</description>
116582                  <value>#11</value>
116583                </enumeratedValue>
116584              </enumeratedValues>
116585            </field>
116586            <field>
116587              <name>WUPE23</name>
116588              <description>Wakeup Pin Enable For LLWU_P23</description>
116589              <bitOffset>6</bitOffset>
116590              <bitWidth>2</bitWidth>
116591              <access>read-write</access>
116592              <enumeratedValues>
116593                <enumeratedValue>
116594                  <name>00</name>
116595                  <description>External input pin disabled as wakeup input</description>
116596                  <value>#00</value>
116597                </enumeratedValue>
116598                <enumeratedValue>
116599                  <name>01</name>
116600                  <description>External input pin enabled with rising edge detection</description>
116601                  <value>#01</value>
116602                </enumeratedValue>
116603                <enumeratedValue>
116604                  <name>10</name>
116605                  <description>External input pin enabled with falling edge detection</description>
116606                  <value>#10</value>
116607                </enumeratedValue>
116608                <enumeratedValue>
116609                  <name>11</name>
116610                  <description>External input pin enabled with any change detection</description>
116611                  <value>#11</value>
116612                </enumeratedValue>
116613              </enumeratedValues>
116614            </field>
116615          </fields>
116616        </register>
116617        <register>
116618          <name>PE7</name>
116619          <description>LLWU Pin Enable 7 register</description>
116620          <addressOffset>0x6</addressOffset>
116621          <size>8</size>
116622          <access>read-write</access>
116623          <resetValue>0</resetValue>
116624          <resetMask>0xFF</resetMask>
116625          <fields>
116626            <field>
116627              <name>WUPE24</name>
116628              <description>Wakeup Pin Enable For LLWU_P24</description>
116629              <bitOffset>0</bitOffset>
116630              <bitWidth>2</bitWidth>
116631              <access>read-write</access>
116632              <enumeratedValues>
116633                <enumeratedValue>
116634                  <name>00</name>
116635                  <description>External input pin disabled as wakeup input</description>
116636                  <value>#00</value>
116637                </enumeratedValue>
116638                <enumeratedValue>
116639                  <name>01</name>
116640                  <description>External input pin enabled with rising edge detection</description>
116641                  <value>#01</value>
116642                </enumeratedValue>
116643                <enumeratedValue>
116644                  <name>10</name>
116645                  <description>External input pin enabled with falling edge detection</description>
116646                  <value>#10</value>
116647                </enumeratedValue>
116648                <enumeratedValue>
116649                  <name>11</name>
116650                  <description>External input pin enabled with any change detection</description>
116651                  <value>#11</value>
116652                </enumeratedValue>
116653              </enumeratedValues>
116654            </field>
116655            <field>
116656              <name>WUPE25</name>
116657              <description>Wakeup Pin Enable For LLWU_P25</description>
116658              <bitOffset>2</bitOffset>
116659              <bitWidth>2</bitWidth>
116660              <access>read-write</access>
116661              <enumeratedValues>
116662                <enumeratedValue>
116663                  <name>00</name>
116664                  <description>External input pin disabled as wakeup input</description>
116665                  <value>#00</value>
116666                </enumeratedValue>
116667                <enumeratedValue>
116668                  <name>01</name>
116669                  <description>External input pin enabled with rising edge detection</description>
116670                  <value>#01</value>
116671                </enumeratedValue>
116672                <enumeratedValue>
116673                  <name>10</name>
116674                  <description>External input pin enabled with falling edge detection</description>
116675                  <value>#10</value>
116676                </enumeratedValue>
116677                <enumeratedValue>
116678                  <name>11</name>
116679                  <description>External input pin enabled with any change detection</description>
116680                  <value>#11</value>
116681                </enumeratedValue>
116682              </enumeratedValues>
116683            </field>
116684            <field>
116685              <name>WUPE26</name>
116686              <description>Wakeup Pin Enable For LLWU_P26</description>
116687              <bitOffset>4</bitOffset>
116688              <bitWidth>2</bitWidth>
116689              <access>read-write</access>
116690              <enumeratedValues>
116691                <enumeratedValue>
116692                  <name>00</name>
116693                  <description>External input pin disabled as wakeup input</description>
116694                  <value>#00</value>
116695                </enumeratedValue>
116696                <enumeratedValue>
116697                  <name>01</name>
116698                  <description>External input pin enabled with rising edge detection</description>
116699                  <value>#01</value>
116700                </enumeratedValue>
116701                <enumeratedValue>
116702                  <name>10</name>
116703                  <description>External input pin enabled with falling edge detection</description>
116704                  <value>#10</value>
116705                </enumeratedValue>
116706                <enumeratedValue>
116707                  <name>11</name>
116708                  <description>External input pin enabled with any change detection</description>
116709                  <value>#11</value>
116710                </enumeratedValue>
116711              </enumeratedValues>
116712            </field>
116713            <field>
116714              <name>WUPE27</name>
116715              <description>Wakeup Pin Enable For LLWU_P27</description>
116716              <bitOffset>6</bitOffset>
116717              <bitWidth>2</bitWidth>
116718              <access>read-write</access>
116719              <enumeratedValues>
116720                <enumeratedValue>
116721                  <name>00</name>
116722                  <description>External input pin disabled as wakeup input</description>
116723                  <value>#00</value>
116724                </enumeratedValue>
116725                <enumeratedValue>
116726                  <name>01</name>
116727                  <description>External input pin enabled with rising edge detection</description>
116728                  <value>#01</value>
116729                </enumeratedValue>
116730                <enumeratedValue>
116731                  <name>10</name>
116732                  <description>External input pin enabled with falling edge detection</description>
116733                  <value>#10</value>
116734                </enumeratedValue>
116735                <enumeratedValue>
116736                  <name>11</name>
116737                  <description>External input pin enabled with any change detection</description>
116738                  <value>#11</value>
116739                </enumeratedValue>
116740              </enumeratedValues>
116741            </field>
116742          </fields>
116743        </register>
116744        <register>
116745          <name>PE8</name>
116746          <description>LLWU Pin Enable 8 register</description>
116747          <addressOffset>0x7</addressOffset>
116748          <size>8</size>
116749          <access>read-write</access>
116750          <resetValue>0</resetValue>
116751          <resetMask>0xFF</resetMask>
116752          <fields>
116753            <field>
116754              <name>WUPE28</name>
116755              <description>Wakeup Pin Enable For LLWU_P28</description>
116756              <bitOffset>0</bitOffset>
116757              <bitWidth>2</bitWidth>
116758              <access>read-write</access>
116759              <enumeratedValues>
116760                <enumeratedValue>
116761                  <name>00</name>
116762                  <description>External input pin disabled as wakeup input</description>
116763                  <value>#00</value>
116764                </enumeratedValue>
116765                <enumeratedValue>
116766                  <name>01</name>
116767                  <description>External input pin enabled with rising edge detection</description>
116768                  <value>#01</value>
116769                </enumeratedValue>
116770                <enumeratedValue>
116771                  <name>10</name>
116772                  <description>External input pin enabled with falling edge detection</description>
116773                  <value>#10</value>
116774                </enumeratedValue>
116775                <enumeratedValue>
116776                  <name>11</name>
116777                  <description>External input pin enabled with any change detection</description>
116778                  <value>#11</value>
116779                </enumeratedValue>
116780              </enumeratedValues>
116781            </field>
116782            <field>
116783              <name>WUPE29</name>
116784              <description>Wakeup Pin Enable For LLWU_P29</description>
116785              <bitOffset>2</bitOffset>
116786              <bitWidth>2</bitWidth>
116787              <access>read-write</access>
116788              <enumeratedValues>
116789                <enumeratedValue>
116790                  <name>00</name>
116791                  <description>External input pin disabled as wakeup input</description>
116792                  <value>#00</value>
116793                </enumeratedValue>
116794                <enumeratedValue>
116795                  <name>01</name>
116796                  <description>External input pin enabled with rising edge detection</description>
116797                  <value>#01</value>
116798                </enumeratedValue>
116799                <enumeratedValue>
116800                  <name>10</name>
116801                  <description>External input pin enabled with falling edge detection</description>
116802                  <value>#10</value>
116803                </enumeratedValue>
116804                <enumeratedValue>
116805                  <name>11</name>
116806                  <description>External input pin enabled with any change detection</description>
116807                  <value>#11</value>
116808                </enumeratedValue>
116809              </enumeratedValues>
116810            </field>
116811            <field>
116812              <name>WUPE30</name>
116813              <description>Wakeup Pin Enable For LLWU_P30</description>
116814              <bitOffset>4</bitOffset>
116815              <bitWidth>2</bitWidth>
116816              <access>read-write</access>
116817              <enumeratedValues>
116818                <enumeratedValue>
116819                  <name>00</name>
116820                  <description>External input pin disabled as wakeup input</description>
116821                  <value>#00</value>
116822                </enumeratedValue>
116823                <enumeratedValue>
116824                  <name>01</name>
116825                  <description>External input pin enabled with rising edge detection</description>
116826                  <value>#01</value>
116827                </enumeratedValue>
116828                <enumeratedValue>
116829                  <name>10</name>
116830                  <description>External input pin enabled with falling edge detection</description>
116831                  <value>#10</value>
116832                </enumeratedValue>
116833                <enumeratedValue>
116834                  <name>11</name>
116835                  <description>External input pin enabled with any change detection</description>
116836                  <value>#11</value>
116837                </enumeratedValue>
116838              </enumeratedValues>
116839            </field>
116840            <field>
116841              <name>WUPE31</name>
116842              <description>Wakeup Pin Enable For LLWU_P31</description>
116843              <bitOffset>6</bitOffset>
116844              <bitWidth>2</bitWidth>
116845              <access>read-write</access>
116846              <enumeratedValues>
116847                <enumeratedValue>
116848                  <name>00</name>
116849                  <description>External input pin disabled as wakeup input</description>
116850                  <value>#00</value>
116851                </enumeratedValue>
116852                <enumeratedValue>
116853                  <name>01</name>
116854                  <description>External input pin enabled with rising edge detection</description>
116855                  <value>#01</value>
116856                </enumeratedValue>
116857                <enumeratedValue>
116858                  <name>10</name>
116859                  <description>External input pin enabled with falling edge detection</description>
116860                  <value>#10</value>
116861                </enumeratedValue>
116862                <enumeratedValue>
116863                  <name>11</name>
116864                  <description>External input pin enabled with any change detection</description>
116865                  <value>#11</value>
116866                </enumeratedValue>
116867              </enumeratedValues>
116868            </field>
116869          </fields>
116870        </register>
116871        <register>
116872          <name>ME</name>
116873          <description>LLWU Module Enable register</description>
116874          <addressOffset>0x8</addressOffset>
116875          <size>8</size>
116876          <access>read-write</access>
116877          <resetValue>0</resetValue>
116878          <resetMask>0xFF</resetMask>
116879          <fields>
116880            <field>
116881              <name>WUME0</name>
116882              <description>Wakeup Module Enable For Module 0</description>
116883              <bitOffset>0</bitOffset>
116884              <bitWidth>1</bitWidth>
116885              <access>read-write</access>
116886              <enumeratedValues>
116887                <enumeratedValue>
116888                  <name>0</name>
116889                  <description>Internal module flag not used as wakeup source</description>
116890                  <value>#0</value>
116891                </enumeratedValue>
116892                <enumeratedValue>
116893                  <name>1</name>
116894                  <description>Internal module flag used as wakeup source</description>
116895                  <value>#1</value>
116896                </enumeratedValue>
116897              </enumeratedValues>
116898            </field>
116899            <field>
116900              <name>WUME1</name>
116901              <description>Wakeup Module Enable for Module 1</description>
116902              <bitOffset>1</bitOffset>
116903              <bitWidth>1</bitWidth>
116904              <access>read-write</access>
116905              <enumeratedValues>
116906                <enumeratedValue>
116907                  <name>0</name>
116908                  <description>Internal module flag not used as wakeup source</description>
116909                  <value>#0</value>
116910                </enumeratedValue>
116911                <enumeratedValue>
116912                  <name>1</name>
116913                  <description>Internal module flag used as wakeup source</description>
116914                  <value>#1</value>
116915                </enumeratedValue>
116916              </enumeratedValues>
116917            </field>
116918            <field>
116919              <name>WUME2</name>
116920              <description>Wakeup Module Enable For Module 2</description>
116921              <bitOffset>2</bitOffset>
116922              <bitWidth>1</bitWidth>
116923              <access>read-write</access>
116924              <enumeratedValues>
116925                <enumeratedValue>
116926                  <name>0</name>
116927                  <description>Internal module flag not used as wakeup source</description>
116928                  <value>#0</value>
116929                </enumeratedValue>
116930                <enumeratedValue>
116931                  <name>1</name>
116932                  <description>Internal module flag used as wakeup source</description>
116933                  <value>#1</value>
116934                </enumeratedValue>
116935              </enumeratedValues>
116936            </field>
116937            <field>
116938              <name>WUME3</name>
116939              <description>Wakeup Module Enable For Module 3</description>
116940              <bitOffset>3</bitOffset>
116941              <bitWidth>1</bitWidth>
116942              <access>read-write</access>
116943              <enumeratedValues>
116944                <enumeratedValue>
116945                  <name>0</name>
116946                  <description>Internal module flag not used as wakeup source</description>
116947                  <value>#0</value>
116948                </enumeratedValue>
116949                <enumeratedValue>
116950                  <name>1</name>
116951                  <description>Internal module flag used as wakeup source</description>
116952                  <value>#1</value>
116953                </enumeratedValue>
116954              </enumeratedValues>
116955            </field>
116956            <field>
116957              <name>WUME4</name>
116958              <description>Wakeup Module Enable For Module 4</description>
116959              <bitOffset>4</bitOffset>
116960              <bitWidth>1</bitWidth>
116961              <access>read-write</access>
116962              <enumeratedValues>
116963                <enumeratedValue>
116964                  <name>0</name>
116965                  <description>Internal module flag not used as wakeup source</description>
116966                  <value>#0</value>
116967                </enumeratedValue>
116968                <enumeratedValue>
116969                  <name>1</name>
116970                  <description>Internal module flag used as wakeup source</description>
116971                  <value>#1</value>
116972                </enumeratedValue>
116973              </enumeratedValues>
116974            </field>
116975            <field>
116976              <name>WUME5</name>
116977              <description>Wakeup Module Enable For Module 5</description>
116978              <bitOffset>5</bitOffset>
116979              <bitWidth>1</bitWidth>
116980              <access>read-write</access>
116981              <enumeratedValues>
116982                <enumeratedValue>
116983                  <name>0</name>
116984                  <description>Internal module flag not used as wakeup source</description>
116985                  <value>#0</value>
116986                </enumeratedValue>
116987                <enumeratedValue>
116988                  <name>1</name>
116989                  <description>Internal module flag used as wakeup source</description>
116990                  <value>#1</value>
116991                </enumeratedValue>
116992              </enumeratedValues>
116993            </field>
116994            <field>
116995              <name>WUME6</name>
116996              <description>Wakeup Module Enable For Module 6</description>
116997              <bitOffset>6</bitOffset>
116998              <bitWidth>1</bitWidth>
116999              <access>read-write</access>
117000              <enumeratedValues>
117001                <enumeratedValue>
117002                  <name>0</name>
117003                  <description>Internal module flag not used as wakeup source</description>
117004                  <value>#0</value>
117005                </enumeratedValue>
117006                <enumeratedValue>
117007                  <name>1</name>
117008                  <description>Internal module flag used as wakeup source</description>
117009                  <value>#1</value>
117010                </enumeratedValue>
117011              </enumeratedValues>
117012            </field>
117013            <field>
117014              <name>WUME7</name>
117015              <description>Wakeup Module Enable For Module 7</description>
117016              <bitOffset>7</bitOffset>
117017              <bitWidth>1</bitWidth>
117018              <access>read-write</access>
117019              <enumeratedValues>
117020                <enumeratedValue>
117021                  <name>0</name>
117022                  <description>Internal module flag not used as wakeup source</description>
117023                  <value>#0</value>
117024                </enumeratedValue>
117025                <enumeratedValue>
117026                  <name>1</name>
117027                  <description>Internal module flag used as wakeup source</description>
117028                  <value>#1</value>
117029                </enumeratedValue>
117030              </enumeratedValues>
117031            </field>
117032          </fields>
117033        </register>
117034        <register>
117035          <name>PF1</name>
117036          <description>LLWU Pin Flag 1 register</description>
117037          <addressOffset>0x9</addressOffset>
117038          <size>8</size>
117039          <access>read-write</access>
117040          <resetValue>0</resetValue>
117041          <resetMask>0xFF</resetMask>
117042          <fields>
117043            <field>
117044              <name>WUF0</name>
117045              <description>Wakeup Flag For LLWU_P0</description>
117046              <bitOffset>0</bitOffset>
117047              <bitWidth>1</bitWidth>
117048              <access>read-write</access>
117049              <enumeratedValues>
117050                <enumeratedValue>
117051                  <name>0</name>
117052                  <description>LLWU_P0 input was not a wakeup source</description>
117053                  <value>#0</value>
117054                </enumeratedValue>
117055                <enumeratedValue>
117056                  <name>1</name>
117057                  <description>LLWU_P0 input was a wakeup source</description>
117058                  <value>#1</value>
117059                </enumeratedValue>
117060              </enumeratedValues>
117061            </field>
117062            <field>
117063              <name>WUF1</name>
117064              <description>Wakeup Flag For LLWU_P1</description>
117065              <bitOffset>1</bitOffset>
117066              <bitWidth>1</bitWidth>
117067              <access>read-write</access>
117068              <enumeratedValues>
117069                <enumeratedValue>
117070                  <name>0</name>
117071                  <description>LLWU_P1 input was not a wakeup source</description>
117072                  <value>#0</value>
117073                </enumeratedValue>
117074                <enumeratedValue>
117075                  <name>1</name>
117076                  <description>LLWU_P1 input was a wakeup source</description>
117077                  <value>#1</value>
117078                </enumeratedValue>
117079              </enumeratedValues>
117080            </field>
117081            <field>
117082              <name>WUF2</name>
117083              <description>Wakeup Flag For LLWU_P2</description>
117084              <bitOffset>2</bitOffset>
117085              <bitWidth>1</bitWidth>
117086              <access>read-write</access>
117087              <enumeratedValues>
117088                <enumeratedValue>
117089                  <name>0</name>
117090                  <description>LLWU_P2 input was not a wakeup source</description>
117091                  <value>#0</value>
117092                </enumeratedValue>
117093                <enumeratedValue>
117094                  <name>1</name>
117095                  <description>LLWU_P2 input was a wakeup source</description>
117096                  <value>#1</value>
117097                </enumeratedValue>
117098              </enumeratedValues>
117099            </field>
117100            <field>
117101              <name>WUF3</name>
117102              <description>Wakeup Flag For LLWU_P3</description>
117103              <bitOffset>3</bitOffset>
117104              <bitWidth>1</bitWidth>
117105              <access>read-write</access>
117106              <enumeratedValues>
117107                <enumeratedValue>
117108                  <name>0</name>
117109                  <description>LLWU_P3 input was not a wakeup source</description>
117110                  <value>#0</value>
117111                </enumeratedValue>
117112                <enumeratedValue>
117113                  <name>1</name>
117114                  <description>LLWU_P3 input was a wakeup source</description>
117115                  <value>#1</value>
117116                </enumeratedValue>
117117              </enumeratedValues>
117118            </field>
117119            <field>
117120              <name>WUF4</name>
117121              <description>Wakeup Flag For LLWU_P4</description>
117122              <bitOffset>4</bitOffset>
117123              <bitWidth>1</bitWidth>
117124              <access>read-write</access>
117125              <enumeratedValues>
117126                <enumeratedValue>
117127                  <name>0</name>
117128                  <description>LLWU_P4 input was not a wakeup source</description>
117129                  <value>#0</value>
117130                </enumeratedValue>
117131                <enumeratedValue>
117132                  <name>1</name>
117133                  <description>LLWU_P4 input was a wakeup source</description>
117134                  <value>#1</value>
117135                </enumeratedValue>
117136              </enumeratedValues>
117137            </field>
117138            <field>
117139              <name>WUF5</name>
117140              <description>Wakeup Flag For LLWU_P5</description>
117141              <bitOffset>5</bitOffset>
117142              <bitWidth>1</bitWidth>
117143              <access>read-write</access>
117144              <enumeratedValues>
117145                <enumeratedValue>
117146                  <name>0</name>
117147                  <description>LLWU_P5 input was not a wakeup source</description>
117148                  <value>#0</value>
117149                </enumeratedValue>
117150                <enumeratedValue>
117151                  <name>1</name>
117152                  <description>LLWU_P5 input was a wakeup source</description>
117153                  <value>#1</value>
117154                </enumeratedValue>
117155              </enumeratedValues>
117156            </field>
117157            <field>
117158              <name>WUF6</name>
117159              <description>Wakeup Flag For LLWU_P6</description>
117160              <bitOffset>6</bitOffset>
117161              <bitWidth>1</bitWidth>
117162              <access>read-write</access>
117163              <enumeratedValues>
117164                <enumeratedValue>
117165                  <name>0</name>
117166                  <description>LLWU_P6 input was not a wakeup source</description>
117167                  <value>#0</value>
117168                </enumeratedValue>
117169                <enumeratedValue>
117170                  <name>1</name>
117171                  <description>LLWU_P6 input was a wakeup source</description>
117172                  <value>#1</value>
117173                </enumeratedValue>
117174              </enumeratedValues>
117175            </field>
117176            <field>
117177              <name>WUF7</name>
117178              <description>Wakeup Flag For LLWU_P7</description>
117179              <bitOffset>7</bitOffset>
117180              <bitWidth>1</bitWidth>
117181              <access>read-write</access>
117182              <enumeratedValues>
117183                <enumeratedValue>
117184                  <name>0</name>
117185                  <description>LLWU_P7 input was not a wakeup source</description>
117186                  <value>#0</value>
117187                </enumeratedValue>
117188                <enumeratedValue>
117189                  <name>1</name>
117190                  <description>LLWU_P7 input was a wakeup source</description>
117191                  <value>#1</value>
117192                </enumeratedValue>
117193              </enumeratedValues>
117194            </field>
117195          </fields>
117196        </register>
117197        <register>
117198          <name>PF2</name>
117199          <description>LLWU Pin Flag 2 register</description>
117200          <addressOffset>0xA</addressOffset>
117201          <size>8</size>
117202          <access>read-write</access>
117203          <resetValue>0</resetValue>
117204          <resetMask>0xFF</resetMask>
117205          <fields>
117206            <field>
117207              <name>WUF8</name>
117208              <description>Wakeup Flag For LLWU_P8</description>
117209              <bitOffset>0</bitOffset>
117210              <bitWidth>1</bitWidth>
117211              <access>read-write</access>
117212              <enumeratedValues>
117213                <enumeratedValue>
117214                  <name>0</name>
117215                  <description>LLWU_P8 input was not a wakeup source</description>
117216                  <value>#0</value>
117217                </enumeratedValue>
117218                <enumeratedValue>
117219                  <name>1</name>
117220                  <description>LLWU_P8 input was a wakeup source</description>
117221                  <value>#1</value>
117222                </enumeratedValue>
117223              </enumeratedValues>
117224            </field>
117225            <field>
117226              <name>WUF9</name>
117227              <description>Wakeup Flag For LLWU_P9</description>
117228              <bitOffset>1</bitOffset>
117229              <bitWidth>1</bitWidth>
117230              <access>read-write</access>
117231              <enumeratedValues>
117232                <enumeratedValue>
117233                  <name>0</name>
117234                  <description>LLWU_P9 input was not a wakeup source</description>
117235                  <value>#0</value>
117236                </enumeratedValue>
117237                <enumeratedValue>
117238                  <name>1</name>
117239                  <description>LLWU_P9 input was a wakeup source</description>
117240                  <value>#1</value>
117241                </enumeratedValue>
117242              </enumeratedValues>
117243            </field>
117244            <field>
117245              <name>WUF10</name>
117246              <description>Wakeup Flag For LLWU_P10</description>
117247              <bitOffset>2</bitOffset>
117248              <bitWidth>1</bitWidth>
117249              <access>read-write</access>
117250              <enumeratedValues>
117251                <enumeratedValue>
117252                  <name>0</name>
117253                  <description>LLWU_P10 input was not a wakeup source</description>
117254                  <value>#0</value>
117255                </enumeratedValue>
117256                <enumeratedValue>
117257                  <name>1</name>
117258                  <description>LLWU_P10 input was a wakeup source</description>
117259                  <value>#1</value>
117260                </enumeratedValue>
117261              </enumeratedValues>
117262            </field>
117263            <field>
117264              <name>WUF11</name>
117265              <description>Wakeup Flag For LLWU_P11</description>
117266              <bitOffset>3</bitOffset>
117267              <bitWidth>1</bitWidth>
117268              <access>read-write</access>
117269              <enumeratedValues>
117270                <enumeratedValue>
117271                  <name>0</name>
117272                  <description>LLWU_P11 input was not a wakeup source</description>
117273                  <value>#0</value>
117274                </enumeratedValue>
117275                <enumeratedValue>
117276                  <name>1</name>
117277                  <description>LLWU_P11 input was a wakeup source</description>
117278                  <value>#1</value>
117279                </enumeratedValue>
117280              </enumeratedValues>
117281            </field>
117282            <field>
117283              <name>WUF12</name>
117284              <description>Wakeup Flag For LLWU_P12</description>
117285              <bitOffset>4</bitOffset>
117286              <bitWidth>1</bitWidth>
117287              <access>read-write</access>
117288              <enumeratedValues>
117289                <enumeratedValue>
117290                  <name>0</name>
117291                  <description>LLWU_P12 input was not a wakeup source</description>
117292                  <value>#0</value>
117293                </enumeratedValue>
117294                <enumeratedValue>
117295                  <name>1</name>
117296                  <description>LLWU_P12 input was a wakeup source</description>
117297                  <value>#1</value>
117298                </enumeratedValue>
117299              </enumeratedValues>
117300            </field>
117301            <field>
117302              <name>WUF13</name>
117303              <description>Wakeup Flag For LLWU_P13</description>
117304              <bitOffset>5</bitOffset>
117305              <bitWidth>1</bitWidth>
117306              <access>read-write</access>
117307              <enumeratedValues>
117308                <enumeratedValue>
117309                  <name>0</name>
117310                  <description>LLWU_P13 input was not a wakeup source</description>
117311                  <value>#0</value>
117312                </enumeratedValue>
117313                <enumeratedValue>
117314                  <name>1</name>
117315                  <description>LLWU_P13 input was a wakeup source</description>
117316                  <value>#1</value>
117317                </enumeratedValue>
117318              </enumeratedValues>
117319            </field>
117320            <field>
117321              <name>WUF14</name>
117322              <description>Wakeup Flag For LLWU_P14</description>
117323              <bitOffset>6</bitOffset>
117324              <bitWidth>1</bitWidth>
117325              <access>read-write</access>
117326              <enumeratedValues>
117327                <enumeratedValue>
117328                  <name>0</name>
117329                  <description>LLWU_P14 input was not a wakeup source</description>
117330                  <value>#0</value>
117331                </enumeratedValue>
117332                <enumeratedValue>
117333                  <name>1</name>
117334                  <description>LLWU_P14 input was a wakeup source</description>
117335                  <value>#1</value>
117336                </enumeratedValue>
117337              </enumeratedValues>
117338            </field>
117339            <field>
117340              <name>WUF15</name>
117341              <description>Wakeup Flag For LLWU_P15</description>
117342              <bitOffset>7</bitOffset>
117343              <bitWidth>1</bitWidth>
117344              <access>read-write</access>
117345              <enumeratedValues>
117346                <enumeratedValue>
117347                  <name>0</name>
117348                  <description>LLWU_P15 input was not a wakeup source</description>
117349                  <value>#0</value>
117350                </enumeratedValue>
117351                <enumeratedValue>
117352                  <name>1</name>
117353                  <description>LLWU_P15 input was a wakeup source</description>
117354                  <value>#1</value>
117355                </enumeratedValue>
117356              </enumeratedValues>
117357            </field>
117358          </fields>
117359        </register>
117360        <register>
117361          <name>PF3</name>
117362          <description>LLWU Pin Flag 3 register</description>
117363          <addressOffset>0xB</addressOffset>
117364          <size>8</size>
117365          <access>read-write</access>
117366          <resetValue>0</resetValue>
117367          <resetMask>0xFF</resetMask>
117368          <fields>
117369            <field>
117370              <name>WUF16</name>
117371              <description>Wakeup Flag For LLWU_P16</description>
117372              <bitOffset>0</bitOffset>
117373              <bitWidth>1</bitWidth>
117374              <access>read-write</access>
117375              <enumeratedValues>
117376                <enumeratedValue>
117377                  <name>0</name>
117378                  <description>LLWU_P16 input was not a wakeup source</description>
117379                  <value>#0</value>
117380                </enumeratedValue>
117381                <enumeratedValue>
117382                  <name>1</name>
117383                  <description>LLWU_P16 input was a wakeup source</description>
117384                  <value>#1</value>
117385                </enumeratedValue>
117386              </enumeratedValues>
117387            </field>
117388            <field>
117389              <name>WUF17</name>
117390              <description>Wakeup Flag For LLWU_P17</description>
117391              <bitOffset>1</bitOffset>
117392              <bitWidth>1</bitWidth>
117393              <access>read-write</access>
117394              <enumeratedValues>
117395                <enumeratedValue>
117396                  <name>0</name>
117397                  <description>LLWU_P17 input was not a wakeup source</description>
117398                  <value>#0</value>
117399                </enumeratedValue>
117400                <enumeratedValue>
117401                  <name>1</name>
117402                  <description>LLWU_P17 input was a wakeup source</description>
117403                  <value>#1</value>
117404                </enumeratedValue>
117405              </enumeratedValues>
117406            </field>
117407            <field>
117408              <name>WUF18</name>
117409              <description>Wakeup Flag For LLWU_P18</description>
117410              <bitOffset>2</bitOffset>
117411              <bitWidth>1</bitWidth>
117412              <access>read-write</access>
117413              <enumeratedValues>
117414                <enumeratedValue>
117415                  <name>0</name>
117416                  <description>LLWU_P18 input was not a wakeup source</description>
117417                  <value>#0</value>
117418                </enumeratedValue>
117419                <enumeratedValue>
117420                  <name>1</name>
117421                  <description>LLWU_P18 input was a wakeup source</description>
117422                  <value>#1</value>
117423                </enumeratedValue>
117424              </enumeratedValues>
117425            </field>
117426            <field>
117427              <name>WUF19</name>
117428              <description>Wakeup Flag For LLWU_P19</description>
117429              <bitOffset>3</bitOffset>
117430              <bitWidth>1</bitWidth>
117431              <access>read-write</access>
117432              <enumeratedValues>
117433                <enumeratedValue>
117434                  <name>0</name>
117435                  <description>LLWU_P19 input was not a wakeup source</description>
117436                  <value>#0</value>
117437                </enumeratedValue>
117438                <enumeratedValue>
117439                  <name>1</name>
117440                  <description>LLWU_P19 input was a wakeup source</description>
117441                  <value>#1</value>
117442                </enumeratedValue>
117443              </enumeratedValues>
117444            </field>
117445            <field>
117446              <name>WUF20</name>
117447              <description>Wakeup Flag For LLWU_P20</description>
117448              <bitOffset>4</bitOffset>
117449              <bitWidth>1</bitWidth>
117450              <access>read-write</access>
117451              <enumeratedValues>
117452                <enumeratedValue>
117453                  <name>0</name>
117454                  <description>LLWU_P20 input was not a wakeup source</description>
117455                  <value>#0</value>
117456                </enumeratedValue>
117457                <enumeratedValue>
117458                  <name>1</name>
117459                  <description>LLWU_P20 input was a wakeup source</description>
117460                  <value>#1</value>
117461                </enumeratedValue>
117462              </enumeratedValues>
117463            </field>
117464            <field>
117465              <name>WUF21</name>
117466              <description>Wakeup Flag For LLWU_P21</description>
117467              <bitOffset>5</bitOffset>
117468              <bitWidth>1</bitWidth>
117469              <access>read-write</access>
117470              <enumeratedValues>
117471                <enumeratedValue>
117472                  <name>0</name>
117473                  <description>LLWU_P21 input was not a wakeup source</description>
117474                  <value>#0</value>
117475                </enumeratedValue>
117476                <enumeratedValue>
117477                  <name>1</name>
117478                  <description>LLWU_P21 input was a wakeup source</description>
117479                  <value>#1</value>
117480                </enumeratedValue>
117481              </enumeratedValues>
117482            </field>
117483            <field>
117484              <name>WUF22</name>
117485              <description>Wakeup Flag For LLWU_P22</description>
117486              <bitOffset>6</bitOffset>
117487              <bitWidth>1</bitWidth>
117488              <access>read-write</access>
117489              <enumeratedValues>
117490                <enumeratedValue>
117491                  <name>0</name>
117492                  <description>LLWU_P22 input was not a wakeup source</description>
117493                  <value>#0</value>
117494                </enumeratedValue>
117495                <enumeratedValue>
117496                  <name>1</name>
117497                  <description>LLWU_P22 input was a wakeup source</description>
117498                  <value>#1</value>
117499                </enumeratedValue>
117500              </enumeratedValues>
117501            </field>
117502            <field>
117503              <name>WUF23</name>
117504              <description>Wakeup Flag For LLWU_P23</description>
117505              <bitOffset>7</bitOffset>
117506              <bitWidth>1</bitWidth>
117507              <access>read-write</access>
117508              <enumeratedValues>
117509                <enumeratedValue>
117510                  <name>0</name>
117511                  <description>LLWU_P23 input was not a wakeup source</description>
117512                  <value>#0</value>
117513                </enumeratedValue>
117514                <enumeratedValue>
117515                  <name>1</name>
117516                  <description>LLWU_P23 input was a wakeup source</description>
117517                  <value>#1</value>
117518                </enumeratedValue>
117519              </enumeratedValues>
117520            </field>
117521          </fields>
117522        </register>
117523        <register>
117524          <name>PF4</name>
117525          <description>LLWU Pin Flag 4 register</description>
117526          <addressOffset>0xC</addressOffset>
117527          <size>8</size>
117528          <access>read-write</access>
117529          <resetValue>0</resetValue>
117530          <resetMask>0xFF</resetMask>
117531          <fields>
117532            <field>
117533              <name>WUF24</name>
117534              <description>Wakeup Flag For LLWU_P24</description>
117535              <bitOffset>0</bitOffset>
117536              <bitWidth>1</bitWidth>
117537              <access>read-write</access>
117538              <enumeratedValues>
117539                <enumeratedValue>
117540                  <name>0</name>
117541                  <description>LLWU_P24 input was not a wakeup source</description>
117542                  <value>#0</value>
117543                </enumeratedValue>
117544                <enumeratedValue>
117545                  <name>1</name>
117546                  <description>LLWU_P24 input was a wakeup source</description>
117547                  <value>#1</value>
117548                </enumeratedValue>
117549              </enumeratedValues>
117550            </field>
117551            <field>
117552              <name>WUF25</name>
117553              <description>Wakeup Flag For LLWU_P25</description>
117554              <bitOffset>1</bitOffset>
117555              <bitWidth>1</bitWidth>
117556              <access>read-write</access>
117557              <enumeratedValues>
117558                <enumeratedValue>
117559                  <name>0</name>
117560                  <description>LLWU_P25 input was not a wakeup source</description>
117561                  <value>#0</value>
117562                </enumeratedValue>
117563                <enumeratedValue>
117564                  <name>1</name>
117565                  <description>LLWU_P25 input was a wakeup source</description>
117566                  <value>#1</value>
117567                </enumeratedValue>
117568              </enumeratedValues>
117569            </field>
117570            <field>
117571              <name>WUF26</name>
117572              <description>Wakeup Flag For LLWU_P26</description>
117573              <bitOffset>2</bitOffset>
117574              <bitWidth>1</bitWidth>
117575              <access>read-write</access>
117576              <enumeratedValues>
117577                <enumeratedValue>
117578                  <name>0</name>
117579                  <description>LLWU_P26 input was not a wakeup source</description>
117580                  <value>#0</value>
117581                </enumeratedValue>
117582                <enumeratedValue>
117583                  <name>1</name>
117584                  <description>LLWU_P26 input was a wakeup source</description>
117585                  <value>#1</value>
117586                </enumeratedValue>
117587              </enumeratedValues>
117588            </field>
117589            <field>
117590              <name>WUF27</name>
117591              <description>Wakeup Flag For LLWU_P27</description>
117592              <bitOffset>3</bitOffset>
117593              <bitWidth>1</bitWidth>
117594              <access>read-write</access>
117595              <enumeratedValues>
117596                <enumeratedValue>
117597                  <name>0</name>
117598                  <description>LLWU_P27 input was not a wakeup source</description>
117599                  <value>#0</value>
117600                </enumeratedValue>
117601                <enumeratedValue>
117602                  <name>1</name>
117603                  <description>LLWU_P27 input was a wakeup source</description>
117604                  <value>#1</value>
117605                </enumeratedValue>
117606              </enumeratedValues>
117607            </field>
117608            <field>
117609              <name>WUF28</name>
117610              <description>Wakeup Flag For LLWU_P28</description>
117611              <bitOffset>4</bitOffset>
117612              <bitWidth>1</bitWidth>
117613              <access>read-write</access>
117614              <enumeratedValues>
117615                <enumeratedValue>
117616                  <name>0</name>
117617                  <description>LLWU_P28 input was not a wakeup source</description>
117618                  <value>#0</value>
117619                </enumeratedValue>
117620                <enumeratedValue>
117621                  <name>1</name>
117622                  <description>LLWU_P28 input was a wakeup source</description>
117623                  <value>#1</value>
117624                </enumeratedValue>
117625              </enumeratedValues>
117626            </field>
117627            <field>
117628              <name>WUF29</name>
117629              <description>Wakeup Flag For LLWU_P29</description>
117630              <bitOffset>5</bitOffset>
117631              <bitWidth>1</bitWidth>
117632              <access>read-write</access>
117633              <enumeratedValues>
117634                <enumeratedValue>
117635                  <name>0</name>
117636                  <description>LLWU_P29 input was not a wakeup source</description>
117637                  <value>#0</value>
117638                </enumeratedValue>
117639                <enumeratedValue>
117640                  <name>1</name>
117641                  <description>LLWU_P29 input was a wakeup source</description>
117642                  <value>#1</value>
117643                </enumeratedValue>
117644              </enumeratedValues>
117645            </field>
117646            <field>
117647              <name>WUF30</name>
117648              <description>Wakeup Flag For LLWU_P30</description>
117649              <bitOffset>6</bitOffset>
117650              <bitWidth>1</bitWidth>
117651              <access>read-write</access>
117652              <enumeratedValues>
117653                <enumeratedValue>
117654                  <name>0</name>
117655                  <description>LLWU_P30 input was not a wakeup source</description>
117656                  <value>#0</value>
117657                </enumeratedValue>
117658                <enumeratedValue>
117659                  <name>1</name>
117660                  <description>LLWU_P30 input was a wakeup source</description>
117661                  <value>#1</value>
117662                </enumeratedValue>
117663              </enumeratedValues>
117664            </field>
117665            <field>
117666              <name>WUF31</name>
117667              <description>Wakeup Flag For LLWU_P31</description>
117668              <bitOffset>7</bitOffset>
117669              <bitWidth>1</bitWidth>
117670              <access>read-write</access>
117671              <enumeratedValues>
117672                <enumeratedValue>
117673                  <name>0</name>
117674                  <description>LLWU_P31 input was not a wakeup source</description>
117675                  <value>#0</value>
117676                </enumeratedValue>
117677                <enumeratedValue>
117678                  <name>1</name>
117679                  <description>LLWU_P31 input was a wakeup source</description>
117680                  <value>#1</value>
117681                </enumeratedValue>
117682              </enumeratedValues>
117683            </field>
117684          </fields>
117685        </register>
117686        <register>
117687          <name>MF5</name>
117688          <description>LLWU Module Flag 5 register</description>
117689          <addressOffset>0xD</addressOffset>
117690          <size>8</size>
117691          <access>read-only</access>
117692          <resetValue>0</resetValue>
117693          <resetMask>0xFF</resetMask>
117694          <fields>
117695            <field>
117696              <name>MWUF0</name>
117697              <description>Wakeup flag For module 0</description>
117698              <bitOffset>0</bitOffset>
117699              <bitWidth>1</bitWidth>
117700              <access>read-only</access>
117701              <enumeratedValues>
117702                <enumeratedValue>
117703                  <name>0</name>
117704                  <description>Module 0 input was not a wakeup source</description>
117705                  <value>#0</value>
117706                </enumeratedValue>
117707                <enumeratedValue>
117708                  <name>1</name>
117709                  <description>Module 0 input was a wakeup source</description>
117710                  <value>#1</value>
117711                </enumeratedValue>
117712              </enumeratedValues>
117713            </field>
117714            <field>
117715              <name>MWUF1</name>
117716              <description>Wakeup flag For module 1</description>
117717              <bitOffset>1</bitOffset>
117718              <bitWidth>1</bitWidth>
117719              <access>read-only</access>
117720              <enumeratedValues>
117721                <enumeratedValue>
117722                  <name>0</name>
117723                  <description>Module 1 input was not a wakeup source</description>
117724                  <value>#0</value>
117725                </enumeratedValue>
117726                <enumeratedValue>
117727                  <name>1</name>
117728                  <description>Module 1 input was a wakeup source</description>
117729                  <value>#1</value>
117730                </enumeratedValue>
117731              </enumeratedValues>
117732            </field>
117733            <field>
117734              <name>MWUF2</name>
117735              <description>Wakeup flag For module 2</description>
117736              <bitOffset>2</bitOffset>
117737              <bitWidth>1</bitWidth>
117738              <access>read-only</access>
117739              <enumeratedValues>
117740                <enumeratedValue>
117741                  <name>0</name>
117742                  <description>Module 2 input was not a wakeup source</description>
117743                  <value>#0</value>
117744                </enumeratedValue>
117745                <enumeratedValue>
117746                  <name>1</name>
117747                  <description>Module 2 input was a wakeup source</description>
117748                  <value>#1</value>
117749                </enumeratedValue>
117750              </enumeratedValues>
117751            </field>
117752            <field>
117753              <name>MWUF3</name>
117754              <description>Wakeup flag For module 3</description>
117755              <bitOffset>3</bitOffset>
117756              <bitWidth>1</bitWidth>
117757              <access>read-only</access>
117758              <enumeratedValues>
117759                <enumeratedValue>
117760                  <name>0</name>
117761                  <description>Module 3 input was not a wakeup source</description>
117762                  <value>#0</value>
117763                </enumeratedValue>
117764                <enumeratedValue>
117765                  <name>1</name>
117766                  <description>Module 3 input was a wakeup source</description>
117767                  <value>#1</value>
117768                </enumeratedValue>
117769              </enumeratedValues>
117770            </field>
117771            <field>
117772              <name>MWUF4</name>
117773              <description>Wakeup flag For module 4</description>
117774              <bitOffset>4</bitOffset>
117775              <bitWidth>1</bitWidth>
117776              <access>read-only</access>
117777              <enumeratedValues>
117778                <enumeratedValue>
117779                  <name>0</name>
117780                  <description>Module 4 input was not a wakeup source</description>
117781                  <value>#0</value>
117782                </enumeratedValue>
117783                <enumeratedValue>
117784                  <name>1</name>
117785                  <description>Module 4 input was a wakeup source</description>
117786                  <value>#1</value>
117787                </enumeratedValue>
117788              </enumeratedValues>
117789            </field>
117790            <field>
117791              <name>MWUF5</name>
117792              <description>Wakeup flag For module 5</description>
117793              <bitOffset>5</bitOffset>
117794              <bitWidth>1</bitWidth>
117795              <access>read-only</access>
117796              <enumeratedValues>
117797                <enumeratedValue>
117798                  <name>0</name>
117799                  <description>Module 5 input was not a wakeup source</description>
117800                  <value>#0</value>
117801                </enumeratedValue>
117802                <enumeratedValue>
117803                  <name>1</name>
117804                  <description>Module 5 input was a wakeup source</description>
117805                  <value>#1</value>
117806                </enumeratedValue>
117807              </enumeratedValues>
117808            </field>
117809            <field>
117810              <name>MWUF6</name>
117811              <description>Wakeup flag For module 6</description>
117812              <bitOffset>6</bitOffset>
117813              <bitWidth>1</bitWidth>
117814              <access>read-only</access>
117815              <enumeratedValues>
117816                <enumeratedValue>
117817                  <name>0</name>
117818                  <description>Module 6 input was not a wakeup source</description>
117819                  <value>#0</value>
117820                </enumeratedValue>
117821                <enumeratedValue>
117822                  <name>1</name>
117823                  <description>Module 6 input was a wakeup source</description>
117824                  <value>#1</value>
117825                </enumeratedValue>
117826              </enumeratedValues>
117827            </field>
117828            <field>
117829              <name>MWUF7</name>
117830              <description>Wakeup flag For module 7</description>
117831              <bitOffset>7</bitOffset>
117832              <bitWidth>1</bitWidth>
117833              <access>read-only</access>
117834              <enumeratedValues>
117835                <enumeratedValue>
117836                  <name>0</name>
117837                  <description>Module 7 input was not a wakeup source</description>
117838                  <value>#0</value>
117839                </enumeratedValue>
117840                <enumeratedValue>
117841                  <name>1</name>
117842                  <description>Module 7 input was a wakeup source</description>
117843                  <value>#1</value>
117844                </enumeratedValue>
117845              </enumeratedValues>
117846            </field>
117847          </fields>
117848        </register>
117849        <register>
117850          <name>FILT1</name>
117851          <description>LLWU Pin Filter 1 register</description>
117852          <addressOffset>0xE</addressOffset>
117853          <size>8</size>
117854          <access>read-write</access>
117855          <resetValue>0</resetValue>
117856          <resetMask>0xFF</resetMask>
117857          <fields>
117858            <field>
117859              <name>FILTSEL</name>
117860              <description>Filter Pin Select</description>
117861              <bitOffset>0</bitOffset>
117862              <bitWidth>5</bitWidth>
117863              <access>read-write</access>
117864              <enumeratedValues>
117865                <enumeratedValue>
117866                  <name>00000</name>
117867                  <description>Select LLWU_P0 for filter</description>
117868                  <value>#00000</value>
117869                </enumeratedValue>
117870                <enumeratedValue>
117871                  <name>11111</name>
117872                  <description>Select LLWU_P31 for filter</description>
117873                  <value>#11111</value>
117874                </enumeratedValue>
117875              </enumeratedValues>
117876            </field>
117877            <field>
117878              <name>FILTE</name>
117879              <description>Digital Filter On External Pin</description>
117880              <bitOffset>5</bitOffset>
117881              <bitWidth>2</bitWidth>
117882              <access>read-write</access>
117883              <enumeratedValues>
117884                <enumeratedValue>
117885                  <name>00</name>
117886                  <description>Filter disabled</description>
117887                  <value>#00</value>
117888                </enumeratedValue>
117889                <enumeratedValue>
117890                  <name>01</name>
117891                  <description>Filter posedge detect enabled</description>
117892                  <value>#01</value>
117893                </enumeratedValue>
117894                <enumeratedValue>
117895                  <name>10</name>
117896                  <description>Filter negedge detect enabled</description>
117897                  <value>#10</value>
117898                </enumeratedValue>
117899                <enumeratedValue>
117900                  <name>11</name>
117901                  <description>Filter any edge detect enabled</description>
117902                  <value>#11</value>
117903                </enumeratedValue>
117904              </enumeratedValues>
117905            </field>
117906            <field>
117907              <name>FILTF</name>
117908              <description>Filter Detect Flag</description>
117909              <bitOffset>7</bitOffset>
117910              <bitWidth>1</bitWidth>
117911              <access>read-write</access>
117912              <enumeratedValues>
117913                <enumeratedValue>
117914                  <name>0</name>
117915                  <description>Pin Filter 1 was not a wakeup source</description>
117916                  <value>#0</value>
117917                </enumeratedValue>
117918                <enumeratedValue>
117919                  <name>1</name>
117920                  <description>Pin Filter 1 was a wakeup source</description>
117921                  <value>#1</value>
117922                </enumeratedValue>
117923              </enumeratedValues>
117924            </field>
117925          </fields>
117926        </register>
117927        <register>
117928          <name>FILT2</name>
117929          <description>LLWU Pin Filter 2 register</description>
117930          <addressOffset>0xF</addressOffset>
117931          <size>8</size>
117932          <access>read-write</access>
117933          <resetValue>0</resetValue>
117934          <resetMask>0xFF</resetMask>
117935          <fields>
117936            <field>
117937              <name>FILTSEL</name>
117938              <description>Filter Pin Select</description>
117939              <bitOffset>0</bitOffset>
117940              <bitWidth>5</bitWidth>
117941              <access>read-write</access>
117942              <enumeratedValues>
117943                <enumeratedValue>
117944                  <name>00000</name>
117945                  <description>Select LLWU_P0 for filter</description>
117946                  <value>#00000</value>
117947                </enumeratedValue>
117948                <enumeratedValue>
117949                  <name>11111</name>
117950                  <description>Select LLWU_P31 for filter</description>
117951                  <value>#11111</value>
117952                </enumeratedValue>
117953              </enumeratedValues>
117954            </field>
117955            <field>
117956              <name>FILTE</name>
117957              <description>Digital Filter On External Pin</description>
117958              <bitOffset>5</bitOffset>
117959              <bitWidth>2</bitWidth>
117960              <access>read-write</access>
117961              <enumeratedValues>
117962                <enumeratedValue>
117963                  <name>00</name>
117964                  <description>Filter disabled</description>
117965                  <value>#00</value>
117966                </enumeratedValue>
117967                <enumeratedValue>
117968                  <name>01</name>
117969                  <description>Filter posedge detect enabled</description>
117970                  <value>#01</value>
117971                </enumeratedValue>
117972                <enumeratedValue>
117973                  <name>10</name>
117974                  <description>Filter negedge detect enabled</description>
117975                  <value>#10</value>
117976                </enumeratedValue>
117977                <enumeratedValue>
117978                  <name>11</name>
117979                  <description>Filter any edge detect enabled</description>
117980                  <value>#11</value>
117981                </enumeratedValue>
117982              </enumeratedValues>
117983            </field>
117984            <field>
117985              <name>FILTF</name>
117986              <description>Filter Detect Flag</description>
117987              <bitOffset>7</bitOffset>
117988              <bitWidth>1</bitWidth>
117989              <access>read-write</access>
117990              <enumeratedValues>
117991                <enumeratedValue>
117992                  <name>0</name>
117993                  <description>Pin Filter 2 was not a wakeup source</description>
117994                  <value>#0</value>
117995                </enumeratedValue>
117996                <enumeratedValue>
117997                  <name>1</name>
117998                  <description>Pin Filter 2 was a wakeup source</description>
117999                  <value>#1</value>
118000                </enumeratedValue>
118001              </enumeratedValues>
118002            </field>
118003          </fields>
118004        </register>
118005        <register>
118006          <name>FILT3</name>
118007          <description>LLWU Pin Filter 3 register</description>
118008          <addressOffset>0x10</addressOffset>
118009          <size>8</size>
118010          <access>read-write</access>
118011          <resetValue>0</resetValue>
118012          <resetMask>0xFF</resetMask>
118013          <fields>
118014            <field>
118015              <name>FILTSEL</name>
118016              <description>Filter Pin Select</description>
118017              <bitOffset>0</bitOffset>
118018              <bitWidth>5</bitWidth>
118019              <access>read-write</access>
118020              <enumeratedValues>
118021                <enumeratedValue>
118022                  <name>00000</name>
118023                  <description>Select LLWU_P0 for filter</description>
118024                  <value>#00000</value>
118025                </enumeratedValue>
118026                <enumeratedValue>
118027                  <name>11111</name>
118028                  <description>Select LLWU_P31 for filter</description>
118029                  <value>#11111</value>
118030                </enumeratedValue>
118031              </enumeratedValues>
118032            </field>
118033            <field>
118034              <name>FILTE</name>
118035              <description>Digital Filter On External Pin</description>
118036              <bitOffset>5</bitOffset>
118037              <bitWidth>2</bitWidth>
118038              <access>read-write</access>
118039              <enumeratedValues>
118040                <enumeratedValue>
118041                  <name>00</name>
118042                  <description>Filter disabled</description>
118043                  <value>#00</value>
118044                </enumeratedValue>
118045                <enumeratedValue>
118046                  <name>01</name>
118047                  <description>Filter posedge detect enabled</description>
118048                  <value>#01</value>
118049                </enumeratedValue>
118050                <enumeratedValue>
118051                  <name>10</name>
118052                  <description>Filter negedge detect enabled</description>
118053                  <value>#10</value>
118054                </enumeratedValue>
118055                <enumeratedValue>
118056                  <name>11</name>
118057                  <description>Filter any edge detect enabled</description>
118058                  <value>#11</value>
118059                </enumeratedValue>
118060              </enumeratedValues>
118061            </field>
118062            <field>
118063              <name>FILTF</name>
118064              <description>Filter Detect Flag</description>
118065              <bitOffset>7</bitOffset>
118066              <bitWidth>1</bitWidth>
118067              <access>read-write</access>
118068              <enumeratedValues>
118069                <enumeratedValue>
118070                  <name>0</name>
118071                  <description>Pin Filter 3 was not a wakeup source</description>
118072                  <value>#0</value>
118073                </enumeratedValue>
118074                <enumeratedValue>
118075                  <name>1</name>
118076                  <description>Pin Filter 3 was a wakeup source</description>
118077                  <value>#1</value>
118078                </enumeratedValue>
118079              </enumeratedValues>
118080            </field>
118081          </fields>
118082        </register>
118083        <register>
118084          <name>FILT4</name>
118085          <description>LLWU Pin Filter 4 register</description>
118086          <addressOffset>0x11</addressOffset>
118087          <size>8</size>
118088          <access>read-write</access>
118089          <resetValue>0</resetValue>
118090          <resetMask>0xFF</resetMask>
118091          <fields>
118092            <field>
118093              <name>FILTSEL</name>
118094              <description>Filter Pin Select</description>
118095              <bitOffset>0</bitOffset>
118096              <bitWidth>5</bitWidth>
118097              <access>read-write</access>
118098              <enumeratedValues>
118099                <enumeratedValue>
118100                  <name>00000</name>
118101                  <description>Select LLWU_P0 for filter</description>
118102                  <value>#00000</value>
118103                </enumeratedValue>
118104                <enumeratedValue>
118105                  <name>11111</name>
118106                  <description>Select LLWU_P31 for filter</description>
118107                  <value>#11111</value>
118108                </enumeratedValue>
118109              </enumeratedValues>
118110            </field>
118111            <field>
118112              <name>FILTE</name>
118113              <description>Digital Filter On External Pin</description>
118114              <bitOffset>5</bitOffset>
118115              <bitWidth>2</bitWidth>
118116              <access>read-write</access>
118117              <enumeratedValues>
118118                <enumeratedValue>
118119                  <name>00</name>
118120                  <description>Filter disabled</description>
118121                  <value>#00</value>
118122                </enumeratedValue>
118123                <enumeratedValue>
118124                  <name>01</name>
118125                  <description>Filter posedge detect enabled</description>
118126                  <value>#01</value>
118127                </enumeratedValue>
118128                <enumeratedValue>
118129                  <name>10</name>
118130                  <description>Filter negedge detect enabled</description>
118131                  <value>#10</value>
118132                </enumeratedValue>
118133                <enumeratedValue>
118134                  <name>11</name>
118135                  <description>Filter any edge detect enabled</description>
118136                  <value>#11</value>
118137                </enumeratedValue>
118138              </enumeratedValues>
118139            </field>
118140            <field>
118141              <name>FILTF</name>
118142              <description>Filter Detect Flag</description>
118143              <bitOffset>7</bitOffset>
118144              <bitWidth>1</bitWidth>
118145              <access>read-write</access>
118146              <enumeratedValues>
118147                <enumeratedValue>
118148                  <name>0</name>
118149                  <description>Pin Filter 4 was not a wakeup source</description>
118150                  <value>#0</value>
118151                </enumeratedValue>
118152                <enumeratedValue>
118153                  <name>1</name>
118154                  <description>Pin Filter 4 was a wakeup source</description>
118155                  <value>#1</value>
118156                </enumeratedValue>
118157              </enumeratedValues>
118158            </field>
118159          </fields>
118160        </register>
118161      </registers>
118162    </peripheral>
118163    <peripheral>
118164      <name>PMC</name>
118165      <description>Power Management Controller</description>
118166      <prependToName>PMC_</prependToName>
118167      <baseAddress>0x4007D000</baseAddress>
118168      <addressBlock>
118169        <offset>0</offset>
118170        <size>0xC</size>
118171        <usage>registers</usage>
118172      </addressBlock>
118173      <interrupt>
118174        <name>LVD_LVW</name>
118175        <value>20</value>
118176      </interrupt>
118177      <registers>
118178        <register>
118179          <name>LVDSC1</name>
118180          <description>Low Voltage Detect Status And Control 1 register</description>
118181          <addressOffset>0</addressOffset>
118182          <size>8</size>
118183          <access>read-write</access>
118184          <resetValue>0x10</resetValue>
118185          <resetMask>0xFF</resetMask>
118186          <fields>
118187            <field>
118188              <name>LVDV</name>
118189              <description>Low-Voltage Detect Voltage Select</description>
118190              <bitOffset>0</bitOffset>
118191              <bitWidth>2</bitWidth>
118192              <access>read-write</access>
118193              <enumeratedValues>
118194                <enumeratedValue>
118195                  <name>00</name>
118196                  <description>Low trip point selected (V LVD = V LVDL )</description>
118197                  <value>#00</value>
118198                </enumeratedValue>
118199                <enumeratedValue>
118200                  <name>01</name>
118201                  <description>High trip point selected (V LVD = V LVDH )</description>
118202                  <value>#01</value>
118203                </enumeratedValue>
118204              </enumeratedValues>
118205            </field>
118206            <field>
118207              <name>LVDRE</name>
118208              <description>Low-Voltage Detect Reset Enable</description>
118209              <bitOffset>4</bitOffset>
118210              <bitWidth>1</bitWidth>
118211              <access>read-write</access>
118212              <enumeratedValues>
118213                <enumeratedValue>
118214                  <name>0</name>
118215                  <description>LVDF does not generate hardware resets</description>
118216                  <value>#0</value>
118217                </enumeratedValue>
118218                <enumeratedValue>
118219                  <name>1</name>
118220                  <description>Force an MCU reset when LVDF = 1</description>
118221                  <value>#1</value>
118222                </enumeratedValue>
118223              </enumeratedValues>
118224            </field>
118225            <field>
118226              <name>LVDIE</name>
118227              <description>Low-Voltage Detect Interrupt Enable</description>
118228              <bitOffset>5</bitOffset>
118229              <bitWidth>1</bitWidth>
118230              <access>read-write</access>
118231              <enumeratedValues>
118232                <enumeratedValue>
118233                  <name>0</name>
118234                  <description>Hardware interrupt disabled (use polling)</description>
118235                  <value>#0</value>
118236                </enumeratedValue>
118237                <enumeratedValue>
118238                  <name>1</name>
118239                  <description>Request a hardware interrupt when LVDF = 1</description>
118240                  <value>#1</value>
118241                </enumeratedValue>
118242              </enumeratedValues>
118243            </field>
118244            <field>
118245              <name>LVDACK</name>
118246              <description>Low-Voltage Detect Acknowledge</description>
118247              <bitOffset>6</bitOffset>
118248              <bitWidth>1</bitWidth>
118249              <access>write-only</access>
118250            </field>
118251            <field>
118252              <name>LVDF</name>
118253              <description>Low-Voltage Detect Flag</description>
118254              <bitOffset>7</bitOffset>
118255              <bitWidth>1</bitWidth>
118256              <access>read-only</access>
118257              <enumeratedValues>
118258                <enumeratedValue>
118259                  <name>0</name>
118260                  <description>Low-voltage event not detected</description>
118261                  <value>#0</value>
118262                </enumeratedValue>
118263                <enumeratedValue>
118264                  <name>1</name>
118265                  <description>Low-voltage event detected</description>
118266                  <value>#1</value>
118267                </enumeratedValue>
118268              </enumeratedValues>
118269            </field>
118270          </fields>
118271        </register>
118272        <register>
118273          <name>LVDSC2</name>
118274          <description>Low Voltage Detect Status And Control 2 register</description>
118275          <addressOffset>0x1</addressOffset>
118276          <size>8</size>
118277          <access>read-write</access>
118278          <resetValue>0</resetValue>
118279          <resetMask>0xFF</resetMask>
118280          <fields>
118281            <field>
118282              <name>LVWV</name>
118283              <description>Low-Voltage Warning Voltage Select</description>
118284              <bitOffset>0</bitOffset>
118285              <bitWidth>2</bitWidth>
118286              <access>read-write</access>
118287              <enumeratedValues>
118288                <enumeratedValue>
118289                  <name>00</name>
118290                  <description>Low trip point selected (VLVW = VLVW1)</description>
118291                  <value>#00</value>
118292                </enumeratedValue>
118293                <enumeratedValue>
118294                  <name>01</name>
118295                  <description>Mid 1 trip point selected (VLVW = VLVW2)</description>
118296                  <value>#01</value>
118297                </enumeratedValue>
118298                <enumeratedValue>
118299                  <name>10</name>
118300                  <description>Mid 2 trip point selected (VLVW = VLVW3)</description>
118301                  <value>#10</value>
118302                </enumeratedValue>
118303                <enumeratedValue>
118304                  <name>11</name>
118305                  <description>High trip point selected (VLVW = VLVW4)</description>
118306                  <value>#11</value>
118307                </enumeratedValue>
118308              </enumeratedValues>
118309            </field>
118310            <field>
118311              <name>LVWIE</name>
118312              <description>Low-Voltage Warning Interrupt Enable</description>
118313              <bitOffset>5</bitOffset>
118314              <bitWidth>1</bitWidth>
118315              <access>read-write</access>
118316              <enumeratedValues>
118317                <enumeratedValue>
118318                  <name>0</name>
118319                  <description>Hardware interrupt disabled (use polling)</description>
118320                  <value>#0</value>
118321                </enumeratedValue>
118322                <enumeratedValue>
118323                  <name>1</name>
118324                  <description>Request a hardware interrupt when LVWF = 1</description>
118325                  <value>#1</value>
118326                </enumeratedValue>
118327              </enumeratedValues>
118328            </field>
118329            <field>
118330              <name>LVWACK</name>
118331              <description>Low-Voltage Warning Acknowledge</description>
118332              <bitOffset>6</bitOffset>
118333              <bitWidth>1</bitWidth>
118334              <access>write-only</access>
118335            </field>
118336            <field>
118337              <name>LVWF</name>
118338              <description>Low-Voltage Warning Flag</description>
118339              <bitOffset>7</bitOffset>
118340              <bitWidth>1</bitWidth>
118341              <access>read-only</access>
118342              <enumeratedValues>
118343                <enumeratedValue>
118344                  <name>0</name>
118345                  <description>Low-voltage warning event not detected</description>
118346                  <value>#0</value>
118347                </enumeratedValue>
118348                <enumeratedValue>
118349                  <name>1</name>
118350                  <description>Low-voltage warning event detected</description>
118351                  <value>#1</value>
118352                </enumeratedValue>
118353              </enumeratedValues>
118354            </field>
118355          </fields>
118356        </register>
118357        <register>
118358          <name>REGSC</name>
118359          <description>Regulator Status And Control register</description>
118360          <addressOffset>0x2</addressOffset>
118361          <size>8</size>
118362          <access>read-write</access>
118363          <resetValue>0x4</resetValue>
118364          <resetMask>0xFF</resetMask>
118365          <fields>
118366            <field>
118367              <name>BGBE</name>
118368              <description>Bandgap Buffer Enable</description>
118369              <bitOffset>0</bitOffset>
118370              <bitWidth>1</bitWidth>
118371              <access>read-write</access>
118372              <enumeratedValues>
118373                <enumeratedValue>
118374                  <name>0</name>
118375                  <description>Bandgap buffer not enabled</description>
118376                  <value>#0</value>
118377                </enumeratedValue>
118378                <enumeratedValue>
118379                  <name>1</name>
118380                  <description>Bandgap buffer enabled</description>
118381                  <value>#1</value>
118382                </enumeratedValue>
118383              </enumeratedValues>
118384            </field>
118385            <field>
118386              <name>REGONS</name>
118387              <description>Regulator In Run Regulation Status</description>
118388              <bitOffset>2</bitOffset>
118389              <bitWidth>1</bitWidth>
118390              <access>read-only</access>
118391              <enumeratedValues>
118392                <enumeratedValue>
118393                  <name>0</name>
118394                  <description>Regulator is in stop regulation or in transition to/from it</description>
118395                  <value>#0</value>
118396                </enumeratedValue>
118397                <enumeratedValue>
118398                  <name>1</name>
118399                  <description>Regulator is in run regulation</description>
118400                  <value>#1</value>
118401                </enumeratedValue>
118402              </enumeratedValues>
118403            </field>
118404            <field>
118405              <name>ACKISO</name>
118406              <description>Acknowledge Isolation</description>
118407              <bitOffset>3</bitOffset>
118408              <bitWidth>1</bitWidth>
118409              <access>read-write</access>
118410              <enumeratedValues>
118411                <enumeratedValue>
118412                  <name>0</name>
118413                  <description>Peripherals and I/O pads are in normal run state.</description>
118414                  <value>#0</value>
118415                </enumeratedValue>
118416                <enumeratedValue>
118417                  <name>1</name>
118418                  <description>Certain peripherals and I/O pads are in an isolated and latched state.</description>
118419                  <value>#1</value>
118420                </enumeratedValue>
118421              </enumeratedValues>
118422            </field>
118423            <field>
118424              <name>BGEN</name>
118425              <description>Bandgap Enable In VLPx Operation</description>
118426              <bitOffset>4</bitOffset>
118427              <bitWidth>1</bitWidth>
118428              <access>read-write</access>
118429              <enumeratedValues>
118430                <enumeratedValue>
118431                  <name>0</name>
118432                  <description>Bandgap voltage reference is disabled in VLPx , LLS , and VLLSx modes.</description>
118433                  <value>#0</value>
118434                </enumeratedValue>
118435                <enumeratedValue>
118436                  <name>1</name>
118437                  <description>Bandgap voltage reference is enabled in VLPx , LLS , and VLLSx modes.</description>
118438                  <value>#1</value>
118439                </enumeratedValue>
118440              </enumeratedValues>
118441            </field>
118442          </fields>
118443        </register>
118444        <register>
118445          <name>HVDSC1</name>
118446          <description>High Voltage Detect Status And Control 1 register</description>
118447          <addressOffset>0xB</addressOffset>
118448          <size>8</size>
118449          <access>read-write</access>
118450          <resetValue>0x1</resetValue>
118451          <resetMask>0xFF</resetMask>
118452          <fields>
118453            <field>
118454              <name>HVDV</name>
118455              <description>High-Voltage Detect Voltage Select</description>
118456              <bitOffset>0</bitOffset>
118457              <bitWidth>1</bitWidth>
118458              <access>read-write</access>
118459              <enumeratedValues>
118460                <enumeratedValue>
118461                  <name>0</name>
118462                  <description>Low trip point selected (V HVD = V HVDL )</description>
118463                  <value>#0</value>
118464                </enumeratedValue>
118465                <enumeratedValue>
118466                  <name>1</name>
118467                  <description>High trip point selected (V HVD = V HVDH )</description>
118468                  <value>#1</value>
118469                </enumeratedValue>
118470              </enumeratedValues>
118471            </field>
118472            <field>
118473              <name>HVDRE</name>
118474              <description>High-Voltage Detect Reset Enable</description>
118475              <bitOffset>4</bitOffset>
118476              <bitWidth>1</bitWidth>
118477              <access>read-write</access>
118478              <enumeratedValues>
118479                <enumeratedValue>
118480                  <name>0</name>
118481                  <description>HVDF does not generate hardware resets</description>
118482                  <value>#0</value>
118483                </enumeratedValue>
118484                <enumeratedValue>
118485                  <name>1</name>
118486                  <description>Force an MCU reset when HVDF = 1</description>
118487                  <value>#1</value>
118488                </enumeratedValue>
118489              </enumeratedValues>
118490            </field>
118491            <field>
118492              <name>HVDIE</name>
118493              <description>High-Voltage Detect Interrupt Enable</description>
118494              <bitOffset>5</bitOffset>
118495              <bitWidth>1</bitWidth>
118496              <access>read-write</access>
118497              <enumeratedValues>
118498                <enumeratedValue>
118499                  <name>0</name>
118500                  <description>Hardware interrupt disabled (use polling)</description>
118501                  <value>#0</value>
118502                </enumeratedValue>
118503                <enumeratedValue>
118504                  <name>1</name>
118505                  <description>Request a hardware interrupt when HVDF = 1</description>
118506                  <value>#1</value>
118507                </enumeratedValue>
118508              </enumeratedValues>
118509            </field>
118510            <field>
118511              <name>HVDACK</name>
118512              <description>High-Voltage Detect Acknowledge</description>
118513              <bitOffset>6</bitOffset>
118514              <bitWidth>1</bitWidth>
118515              <access>write-only</access>
118516            </field>
118517            <field>
118518              <name>HVDF</name>
118519              <description>High-Voltage Detect Flag</description>
118520              <bitOffset>7</bitOffset>
118521              <bitWidth>1</bitWidth>
118522              <access>read-only</access>
118523              <enumeratedValues>
118524                <enumeratedValue>
118525                  <name>0</name>
118526                  <description>High-voltage event not detected</description>
118527                  <value>#0</value>
118528                </enumeratedValue>
118529                <enumeratedValue>
118530                  <name>1</name>
118531                  <description>High-voltage event detected</description>
118532                  <value>#1</value>
118533                </enumeratedValue>
118534              </enumeratedValues>
118535            </field>
118536          </fields>
118537        </register>
118538      </registers>
118539    </peripheral>
118540    <peripheral>
118541      <name>SMC</name>
118542      <description>System Mode Controller</description>
118543      <prependToName>SMC_</prependToName>
118544      <baseAddress>0x4007E000</baseAddress>
118545      <addressBlock>
118546        <offset>0</offset>
118547        <size>0x4</size>
118548        <usage>registers</usage>
118549      </addressBlock>
118550      <registers>
118551        <register>
118552          <name>PMPROT</name>
118553          <description>Power Mode Protection register</description>
118554          <addressOffset>0</addressOffset>
118555          <size>8</size>
118556          <access>read-write</access>
118557          <resetValue>0x20</resetValue>
118558          <resetMask>0xFF</resetMask>
118559          <fields>
118560            <field>
118561              <name>AVLLS</name>
118562              <description>Allow Very-Low-Leakage Stop Mode</description>
118563              <bitOffset>1</bitOffset>
118564              <bitWidth>1</bitWidth>
118565              <access>read-write</access>
118566              <enumeratedValues>
118567                <enumeratedValue>
118568                  <name>0</name>
118569                  <description>Any VLLSx mode is not allowed</description>
118570                  <value>#0</value>
118571                </enumeratedValue>
118572                <enumeratedValue>
118573                  <name>1</name>
118574                  <description>Any VLLSx mode is allowed</description>
118575                  <value>#1</value>
118576                </enumeratedValue>
118577              </enumeratedValues>
118578            </field>
118579            <field>
118580              <name>ALLS</name>
118581              <description>Allow Low-Leakage Stop Mode</description>
118582              <bitOffset>3</bitOffset>
118583              <bitWidth>1</bitWidth>
118584              <access>read-write</access>
118585              <enumeratedValues>
118586                <enumeratedValue>
118587                  <name>0</name>
118588                  <description>Any LLSx mode is not allowed</description>
118589                  <value>#0</value>
118590                </enumeratedValue>
118591                <enumeratedValue>
118592                  <name>1</name>
118593                  <description>Any LLSx mode is allowed</description>
118594                  <value>#1</value>
118595                </enumeratedValue>
118596              </enumeratedValues>
118597            </field>
118598            <field>
118599              <name>AVLP</name>
118600              <description>Allow Very-Low-Power Modes</description>
118601              <bitOffset>5</bitOffset>
118602              <bitWidth>1</bitWidth>
118603              <access>read-write</access>
118604              <enumeratedValues>
118605                <enumeratedValue>
118606                  <name>0</name>
118607                  <description>VLPR, VLPW, and VLPS are not allowed.</description>
118608                  <value>#0</value>
118609                </enumeratedValue>
118610                <enumeratedValue>
118611                  <name>1</name>
118612                  <description>VLPR, VLPW, and VLPS are allowed.</description>
118613                  <value>#1</value>
118614                </enumeratedValue>
118615              </enumeratedValues>
118616            </field>
118617            <field>
118618              <name>AHSRUN</name>
118619              <description>Allow High Speed Run mode</description>
118620              <bitOffset>7</bitOffset>
118621              <bitWidth>1</bitWidth>
118622              <access>read-write</access>
118623              <enumeratedValues>
118624                <enumeratedValue>
118625                  <name>0</name>
118626                  <description>HSRUN is not allowed</description>
118627                  <value>#0</value>
118628                </enumeratedValue>
118629                <enumeratedValue>
118630                  <name>1</name>
118631                  <description>HSRUN is allowed</description>
118632                  <value>#1</value>
118633                </enumeratedValue>
118634              </enumeratedValues>
118635            </field>
118636          </fields>
118637        </register>
118638        <register>
118639          <name>PMCTRL</name>
118640          <description>Power Mode Control register</description>
118641          <addressOffset>0x1</addressOffset>
118642          <size>8</size>
118643          <access>read-write</access>
118644          <resetValue>0x40</resetValue>
118645          <resetMask>0xFF</resetMask>
118646          <fields>
118647            <field>
118648              <name>STOPM</name>
118649              <description>Stop Mode Control</description>
118650              <bitOffset>0</bitOffset>
118651              <bitWidth>3</bitWidth>
118652              <access>read-write</access>
118653              <enumeratedValues>
118654                <enumeratedValue>
118655                  <name>000</name>
118656                  <description>Normal Stop (STOP)</description>
118657                  <value>#000</value>
118658                </enumeratedValue>
118659                <enumeratedValue>
118660                  <name>010</name>
118661                  <description>Very-Low-Power Stop (VLPS)</description>
118662                  <value>#010</value>
118663                </enumeratedValue>
118664                <enumeratedValue>
118665                  <name>011</name>
118666                  <description>Low-Leakage Stop (LLSx)</description>
118667                  <value>#011</value>
118668                </enumeratedValue>
118669                <enumeratedValue>
118670                  <name>100</name>
118671                  <description>Very-Low-Leakage Stop (VLLSx)</description>
118672                  <value>#100</value>
118673                </enumeratedValue>
118674                <enumeratedValue>
118675                  <name>110</name>
118676                  <description>Reseved</description>
118677                  <value>#110</value>
118678                </enumeratedValue>
118679              </enumeratedValues>
118680            </field>
118681            <field>
118682              <name>STOPA</name>
118683              <description>Stop Aborted</description>
118684              <bitOffset>3</bitOffset>
118685              <bitWidth>1</bitWidth>
118686              <access>read-only</access>
118687              <enumeratedValues>
118688                <enumeratedValue>
118689                  <name>0</name>
118690                  <description>The previous stop mode entry was successsful.</description>
118691                  <value>#0</value>
118692                </enumeratedValue>
118693                <enumeratedValue>
118694                  <name>1</name>
118695                  <description>The previous stop mode entry was aborted.</description>
118696                  <value>#1</value>
118697                </enumeratedValue>
118698              </enumeratedValues>
118699            </field>
118700            <field>
118701              <name>RUNM</name>
118702              <description>Run Mode Control</description>
118703              <bitOffset>5</bitOffset>
118704              <bitWidth>2</bitWidth>
118705              <access>read-write</access>
118706              <enumeratedValues>
118707                <enumeratedValue>
118708                  <name>00</name>
118709                  <description>Normal Run mode (RUN)</description>
118710                  <value>#00</value>
118711                </enumeratedValue>
118712                <enumeratedValue>
118713                  <name>10</name>
118714                  <description>Very-Low-Power Run mode (VLPR)</description>
118715                  <value>#10</value>
118716                </enumeratedValue>
118717                <enumeratedValue>
118718                  <name>11</name>
118719                  <description>High Speed Run mode (HSRUN)</description>
118720                  <value>#11</value>
118721                </enumeratedValue>
118722              </enumeratedValues>
118723            </field>
118724          </fields>
118725        </register>
118726        <register>
118727          <name>STOPCTRL</name>
118728          <description>Stop Control Register</description>
118729          <addressOffset>0x2</addressOffset>
118730          <size>8</size>
118731          <access>read-write</access>
118732          <resetValue>0x3</resetValue>
118733          <resetMask>0xFF</resetMask>
118734          <fields>
118735            <field>
118736              <name>LLSM</name>
118737              <description>LLS or VLLS Mode Control</description>
118738              <bitOffset>0</bitOffset>
118739              <bitWidth>3</bitWidth>
118740              <access>read-write</access>
118741              <enumeratedValues>
118742                <enumeratedValue>
118743                  <name>000</name>
118744                  <description>VLLS0 if PMCTRL[STOPM]=VLLSx, reserved if PMCTRL[STOPM]=LLSx</description>
118745                  <value>#000</value>
118746                </enumeratedValue>
118747                <enumeratedValue>
118748                  <name>001</name>
118749                  <description>VLLS1 if PMCTRL[STOPM]=VLLSx, reserved if PMCTRL[STOPM]=LLSx</description>
118750                  <value>#001</value>
118751                </enumeratedValue>
118752                <enumeratedValue>
118753                  <name>010</name>
118754                  <description>VLLS2 if PMCTRL[STOPM]=VLLSx, LLS2 if PMCTRL[STOPM]=LLSx</description>
118755                  <value>#010</value>
118756                </enumeratedValue>
118757                <enumeratedValue>
118758                  <name>011</name>
118759                  <description>VLLS3 if PMCTRL[STOPM]=VLLSx, LLS3 if PMCTRL[STOPM]=LLSx</description>
118760                  <value>#011</value>
118761                </enumeratedValue>
118762              </enumeratedValues>
118763            </field>
118764            <field>
118765              <name>LPOPO</name>
118766              <description>LPO Power Option</description>
118767              <bitOffset>3</bitOffset>
118768              <bitWidth>1</bitWidth>
118769              <access>read-write</access>
118770              <enumeratedValues>
118771                <enumeratedValue>
118772                  <name>0</name>
118773                  <description>LPO clock is enabled in LLS/VLLSx</description>
118774                  <value>#0</value>
118775                </enumeratedValue>
118776                <enumeratedValue>
118777                  <name>1</name>
118778                  <description>LPO clock is disabled in LLS/VLLSx</description>
118779                  <value>#1</value>
118780                </enumeratedValue>
118781              </enumeratedValues>
118782            </field>
118783            <field>
118784              <name>RAM2PO</name>
118785              <description>RAM2 Power Option</description>
118786              <bitOffset>4</bitOffset>
118787              <bitWidth>1</bitWidth>
118788              <access>read-write</access>
118789              <enumeratedValues>
118790                <enumeratedValue>
118791                  <name>0</name>
118792                  <description>RAM2 not powered in LLS2/VLLS2</description>
118793                  <value>#0</value>
118794                </enumeratedValue>
118795                <enumeratedValue>
118796                  <name>1</name>
118797                  <description>RAM2 powered in LLS2/VLLS2</description>
118798                  <value>#1</value>
118799                </enumeratedValue>
118800              </enumeratedValues>
118801            </field>
118802            <field>
118803              <name>PORPO</name>
118804              <description>POR Power Option</description>
118805              <bitOffset>5</bitOffset>
118806              <bitWidth>1</bitWidth>
118807              <access>read-write</access>
118808              <enumeratedValues>
118809                <enumeratedValue>
118810                  <name>0</name>
118811                  <description>POR detect circuit is enabled in VLLS0</description>
118812                  <value>#0</value>
118813                </enumeratedValue>
118814                <enumeratedValue>
118815                  <name>1</name>
118816                  <description>POR detect circuit is disabled in VLLS0</description>
118817                  <value>#1</value>
118818                </enumeratedValue>
118819              </enumeratedValues>
118820            </field>
118821            <field>
118822              <name>PSTOPO</name>
118823              <description>Partial Stop Option</description>
118824              <bitOffset>6</bitOffset>
118825              <bitWidth>2</bitWidth>
118826              <access>read-write</access>
118827              <enumeratedValues>
118828                <enumeratedValue>
118829                  <name>00</name>
118830                  <description>STOP - Normal Stop mode</description>
118831                  <value>#00</value>
118832                </enumeratedValue>
118833                <enumeratedValue>
118834                  <name>01</name>
118835                  <description>PSTOP1 - Partial Stop with both system and bus clocks disabled</description>
118836                  <value>#01</value>
118837                </enumeratedValue>
118838                <enumeratedValue>
118839                  <name>10</name>
118840                  <description>PSTOP2 - Partial Stop with system clock disabled and bus clock enabled</description>
118841                  <value>#10</value>
118842                </enumeratedValue>
118843              </enumeratedValues>
118844            </field>
118845          </fields>
118846        </register>
118847        <register>
118848          <name>PMSTAT</name>
118849          <description>Power Mode Status register</description>
118850          <addressOffset>0x3</addressOffset>
118851          <size>8</size>
118852          <access>read-only</access>
118853          <resetValue>0x4</resetValue>
118854          <resetMask>0xFF</resetMask>
118855          <fields>
118856            <field>
118857              <name>PMSTAT</name>
118858              <description>Power Mode Status</description>
118859              <bitOffset>0</bitOffset>
118860              <bitWidth>8</bitWidth>
118861              <access>read-only</access>
118862            </field>
118863          </fields>
118864        </register>
118865      </registers>
118866    </peripheral>
118867    <peripheral>
118868      <name>RCM</name>
118869      <description>Reset Control Module</description>
118870      <prependToName>RCM_</prependToName>
118871      <baseAddress>0x4007F000</baseAddress>
118872      <addressBlock>
118873        <offset>0</offset>
118874        <size>0xA</size>
118875        <usage>registers</usage>
118876      </addressBlock>
118877      <registers>
118878        <register>
118879          <name>SRS0</name>
118880          <description>System Reset Status Register 0</description>
118881          <addressOffset>0</addressOffset>
118882          <size>8</size>
118883          <access>read-only</access>
118884          <resetValue>0x82</resetValue>
118885          <resetMask>0xFF</resetMask>
118886          <fields>
118887            <field>
118888              <name>WAKEUP</name>
118889              <description>Low Leakage Wakeup Reset</description>
118890              <bitOffset>0</bitOffset>
118891              <bitWidth>1</bitWidth>
118892              <access>read-only</access>
118893              <enumeratedValues>
118894                <enumeratedValue>
118895                  <name>0</name>
118896                  <description>Reset not caused by LLWU module wakeup source</description>
118897                  <value>#0</value>
118898                </enumeratedValue>
118899                <enumeratedValue>
118900                  <name>1</name>
118901                  <description>Reset caused by LLWU module wakeup source</description>
118902                  <value>#1</value>
118903                </enumeratedValue>
118904              </enumeratedValues>
118905            </field>
118906            <field>
118907              <name>LVD</name>
118908              <description>Low-Voltage Detect Reset</description>
118909              <bitOffset>1</bitOffset>
118910              <bitWidth>1</bitWidth>
118911              <access>read-only</access>
118912              <enumeratedValues>
118913                <enumeratedValue>
118914                  <name>0</name>
118915                  <description>Reset not caused by LVD trip or POR</description>
118916                  <value>#0</value>
118917                </enumeratedValue>
118918                <enumeratedValue>
118919                  <name>1</name>
118920                  <description>Reset caused by LVD trip or POR</description>
118921                  <value>#1</value>
118922                </enumeratedValue>
118923              </enumeratedValues>
118924            </field>
118925            <field>
118926              <name>LOC</name>
118927              <description>Loss-of-Clock Reset</description>
118928              <bitOffset>2</bitOffset>
118929              <bitWidth>1</bitWidth>
118930              <access>read-only</access>
118931              <enumeratedValues>
118932                <enumeratedValue>
118933                  <name>0</name>
118934                  <description>Reset not caused by a loss of external clock.</description>
118935                  <value>#0</value>
118936                </enumeratedValue>
118937                <enumeratedValue>
118938                  <name>1</name>
118939                  <description>Reset caused by a loss of external clock.</description>
118940                  <value>#1</value>
118941                </enumeratedValue>
118942              </enumeratedValues>
118943            </field>
118944            <field>
118945              <name>LOL</name>
118946              <description>Loss-of-Lock Reset</description>
118947              <bitOffset>3</bitOffset>
118948              <bitWidth>1</bitWidth>
118949              <access>read-only</access>
118950              <enumeratedValues>
118951                <enumeratedValue>
118952                  <name>0</name>
118953                  <description>Reset not caused by a loss of lock in the PLL</description>
118954                  <value>#0</value>
118955                </enumeratedValue>
118956                <enumeratedValue>
118957                  <name>1</name>
118958                  <description>Reset caused by a loss of lock in the PLL</description>
118959                  <value>#1</value>
118960                </enumeratedValue>
118961              </enumeratedValues>
118962            </field>
118963            <field>
118964              <name>WDOG</name>
118965              <description>Watchdog</description>
118966              <bitOffset>5</bitOffset>
118967              <bitWidth>1</bitWidth>
118968              <access>read-only</access>
118969              <enumeratedValues>
118970                <enumeratedValue>
118971                  <name>0</name>
118972                  <description>Reset not caused by watchdog timeout</description>
118973                  <value>#0</value>
118974                </enumeratedValue>
118975                <enumeratedValue>
118976                  <name>1</name>
118977                  <description>Reset caused by watchdog timeout</description>
118978                  <value>#1</value>
118979                </enumeratedValue>
118980              </enumeratedValues>
118981            </field>
118982            <field>
118983              <name>PIN</name>
118984              <description>External Reset Pin</description>
118985              <bitOffset>6</bitOffset>
118986              <bitWidth>1</bitWidth>
118987              <access>read-only</access>
118988              <enumeratedValues>
118989                <enumeratedValue>
118990                  <name>0</name>
118991                  <description>Reset not caused by external reset pin</description>
118992                  <value>#0</value>
118993                </enumeratedValue>
118994                <enumeratedValue>
118995                  <name>1</name>
118996                  <description>Reset caused by external reset pin</description>
118997                  <value>#1</value>
118998                </enumeratedValue>
118999              </enumeratedValues>
119000            </field>
119001            <field>
119002              <name>POR</name>
119003              <description>Power-On Reset</description>
119004              <bitOffset>7</bitOffset>
119005              <bitWidth>1</bitWidth>
119006              <access>read-only</access>
119007              <enumeratedValues>
119008                <enumeratedValue>
119009                  <name>0</name>
119010                  <description>Reset not caused by POR</description>
119011                  <value>#0</value>
119012                </enumeratedValue>
119013                <enumeratedValue>
119014                  <name>1</name>
119015                  <description>Reset caused by POR</description>
119016                  <value>#1</value>
119017                </enumeratedValue>
119018              </enumeratedValues>
119019            </field>
119020          </fields>
119021        </register>
119022        <register>
119023          <name>SRS1</name>
119024          <description>System Reset Status Register 1</description>
119025          <addressOffset>0x1</addressOffset>
119026          <size>8</size>
119027          <access>read-only</access>
119028          <resetValue>0</resetValue>
119029          <resetMask>0xFF</resetMask>
119030          <fields>
119031            <field>
119032              <name>JTAG</name>
119033              <description>JTAG Generated Reset</description>
119034              <bitOffset>0</bitOffset>
119035              <bitWidth>1</bitWidth>
119036              <access>read-only</access>
119037              <enumeratedValues>
119038                <enumeratedValue>
119039                  <name>0</name>
119040                  <description>Reset not caused by JTAG</description>
119041                  <value>#0</value>
119042                </enumeratedValue>
119043                <enumeratedValue>
119044                  <name>1</name>
119045                  <description>Reset caused by JTAG</description>
119046                  <value>#1</value>
119047                </enumeratedValue>
119048              </enumeratedValues>
119049            </field>
119050            <field>
119051              <name>LOCKUP</name>
119052              <description>Core Lockup</description>
119053              <bitOffset>1</bitOffset>
119054              <bitWidth>1</bitWidth>
119055              <access>read-only</access>
119056              <enumeratedValues>
119057                <enumeratedValue>
119058                  <name>0</name>
119059                  <description>Reset not caused by core LOCKUP event</description>
119060                  <value>#0</value>
119061                </enumeratedValue>
119062                <enumeratedValue>
119063                  <name>1</name>
119064                  <description>Reset caused by core LOCKUP event</description>
119065                  <value>#1</value>
119066                </enumeratedValue>
119067              </enumeratedValues>
119068            </field>
119069            <field>
119070              <name>SW</name>
119071              <description>Software</description>
119072              <bitOffset>2</bitOffset>
119073              <bitWidth>1</bitWidth>
119074              <access>read-only</access>
119075              <enumeratedValues>
119076                <enumeratedValue>
119077                  <name>0</name>
119078                  <description>Reset not caused by software setting of SYSRESETREQ bit</description>
119079                  <value>#0</value>
119080                </enumeratedValue>
119081                <enumeratedValue>
119082                  <name>1</name>
119083                  <description>Reset caused by software setting of SYSRESETREQ bit</description>
119084                  <value>#1</value>
119085                </enumeratedValue>
119086              </enumeratedValues>
119087            </field>
119088            <field>
119089              <name>MDM_AP</name>
119090              <description>MDM-AP System Reset Request</description>
119091              <bitOffset>3</bitOffset>
119092              <bitWidth>1</bitWidth>
119093              <access>read-only</access>
119094              <enumeratedValues>
119095                <enumeratedValue>
119096                  <name>0</name>
119097                  <description>Reset not caused by host debugger system setting of the System Reset Request bit</description>
119098                  <value>#0</value>
119099                </enumeratedValue>
119100                <enumeratedValue>
119101                  <name>1</name>
119102                  <description>Reset caused by host debugger system setting of the System Reset Request bit</description>
119103                  <value>#1</value>
119104                </enumeratedValue>
119105              </enumeratedValues>
119106            </field>
119107            <field>
119108              <name>SACKERR</name>
119109              <description>Stop Mode Acknowledge Error Reset</description>
119110              <bitOffset>5</bitOffset>
119111              <bitWidth>1</bitWidth>
119112              <access>read-only</access>
119113              <enumeratedValues>
119114                <enumeratedValue>
119115                  <name>0</name>
119116                  <description>Reset not caused by peripheral failure to acknowledge attempt to enter stop mode</description>
119117                  <value>#0</value>
119118                </enumeratedValue>
119119                <enumeratedValue>
119120                  <name>1</name>
119121                  <description>Reset caused by peripheral failure to acknowledge attempt to enter stop mode</description>
119122                  <value>#1</value>
119123                </enumeratedValue>
119124              </enumeratedValues>
119125            </field>
119126          </fields>
119127        </register>
119128        <register>
119129          <name>RPFC</name>
119130          <description>Reset Pin Filter Control register</description>
119131          <addressOffset>0x4</addressOffset>
119132          <size>8</size>
119133          <access>read-write</access>
119134          <resetValue>0</resetValue>
119135          <resetMask>0xFF</resetMask>
119136          <fields>
119137            <field>
119138              <name>RSTFLTSRW</name>
119139              <description>Reset Pin Filter Select in Run and Wait Modes</description>
119140              <bitOffset>0</bitOffset>
119141              <bitWidth>2</bitWidth>
119142              <access>read-write</access>
119143              <enumeratedValues>
119144                <enumeratedValue>
119145                  <name>00</name>
119146                  <description>All filtering disabled</description>
119147                  <value>#00</value>
119148                </enumeratedValue>
119149                <enumeratedValue>
119150                  <name>01</name>
119151                  <description>Bus clock filter enabled for normal operation</description>
119152                  <value>#01</value>
119153                </enumeratedValue>
119154                <enumeratedValue>
119155                  <name>10</name>
119156                  <description>LPO clock filter enabled for normal operation</description>
119157                  <value>#10</value>
119158                </enumeratedValue>
119159              </enumeratedValues>
119160            </field>
119161            <field>
119162              <name>RSTFLTSS</name>
119163              <description>Reset Pin Filter Select in Stop Mode</description>
119164              <bitOffset>2</bitOffset>
119165              <bitWidth>1</bitWidth>
119166              <access>read-write</access>
119167              <enumeratedValues>
119168                <enumeratedValue>
119169                  <name>0</name>
119170                  <description>All filtering disabled</description>
119171                  <value>#0</value>
119172                </enumeratedValue>
119173                <enumeratedValue>
119174                  <name>1</name>
119175                  <description>LPO clock filter enabled</description>
119176                  <value>#1</value>
119177                </enumeratedValue>
119178              </enumeratedValues>
119179            </field>
119180          </fields>
119181        </register>
119182        <register>
119183          <name>RPFW</name>
119184          <description>Reset Pin Filter Width register</description>
119185          <addressOffset>0x5</addressOffset>
119186          <size>8</size>
119187          <access>read-write</access>
119188          <resetValue>0</resetValue>
119189          <resetMask>0xFF</resetMask>
119190          <fields>
119191            <field>
119192              <name>RSTFLTSEL</name>
119193              <description>Reset Pin Filter Bus Clock Select</description>
119194              <bitOffset>0</bitOffset>
119195              <bitWidth>5</bitWidth>
119196              <access>read-write</access>
119197              <enumeratedValues>
119198                <enumeratedValue>
119199                  <name>00000</name>
119200                  <description>Bus clock filter count is 1</description>
119201                  <value>#00000</value>
119202                </enumeratedValue>
119203                <enumeratedValue>
119204                  <name>00001</name>
119205                  <description>Bus clock filter count is 2</description>
119206                  <value>#00001</value>
119207                </enumeratedValue>
119208                <enumeratedValue>
119209                  <name>00010</name>
119210                  <description>Bus clock filter count is 3</description>
119211                  <value>#00010</value>
119212                </enumeratedValue>
119213                <enumeratedValue>
119214                  <name>00011</name>
119215                  <description>Bus clock filter count is 4</description>
119216                  <value>#00011</value>
119217                </enumeratedValue>
119218                <enumeratedValue>
119219                  <name>00100</name>
119220                  <description>Bus clock filter count is 5</description>
119221                  <value>#00100</value>
119222                </enumeratedValue>
119223                <enumeratedValue>
119224                  <name>00101</name>
119225                  <description>Bus clock filter count is 6</description>
119226                  <value>#00101</value>
119227                </enumeratedValue>
119228                <enumeratedValue>
119229                  <name>00110</name>
119230                  <description>Bus clock filter count is 7</description>
119231                  <value>#00110</value>
119232                </enumeratedValue>
119233                <enumeratedValue>
119234                  <name>00111</name>
119235                  <description>Bus clock filter count is 8</description>
119236                  <value>#00111</value>
119237                </enumeratedValue>
119238                <enumeratedValue>
119239                  <name>01000</name>
119240                  <description>Bus clock filter count is 9</description>
119241                  <value>#01000</value>
119242                </enumeratedValue>
119243                <enumeratedValue>
119244                  <name>01001</name>
119245                  <description>Bus clock filter count is 10</description>
119246                  <value>#01001</value>
119247                </enumeratedValue>
119248                <enumeratedValue>
119249                  <name>01010</name>
119250                  <description>Bus clock filter count is 11</description>
119251                  <value>#01010</value>
119252                </enumeratedValue>
119253                <enumeratedValue>
119254                  <name>01011</name>
119255                  <description>Bus clock filter count is 12</description>
119256                  <value>#01011</value>
119257                </enumeratedValue>
119258                <enumeratedValue>
119259                  <name>01100</name>
119260                  <description>Bus clock filter count is 13</description>
119261                  <value>#01100</value>
119262                </enumeratedValue>
119263                <enumeratedValue>
119264                  <name>01101</name>
119265                  <description>Bus clock filter count is 14</description>
119266                  <value>#01101</value>
119267                </enumeratedValue>
119268                <enumeratedValue>
119269                  <name>01110</name>
119270                  <description>Bus clock filter count is 15</description>
119271                  <value>#01110</value>
119272                </enumeratedValue>
119273                <enumeratedValue>
119274                  <name>01111</name>
119275                  <description>Bus clock filter count is 16</description>
119276                  <value>#01111</value>
119277                </enumeratedValue>
119278                <enumeratedValue>
119279                  <name>10000</name>
119280                  <description>Bus clock filter count is 17</description>
119281                  <value>#10000</value>
119282                </enumeratedValue>
119283                <enumeratedValue>
119284                  <name>10001</name>
119285                  <description>Bus clock filter count is 18</description>
119286                  <value>#10001</value>
119287                </enumeratedValue>
119288                <enumeratedValue>
119289                  <name>10010</name>
119290                  <description>Bus clock filter count is 19</description>
119291                  <value>#10010</value>
119292                </enumeratedValue>
119293                <enumeratedValue>
119294                  <name>10011</name>
119295                  <description>Bus clock filter count is 20</description>
119296                  <value>#10011</value>
119297                </enumeratedValue>
119298                <enumeratedValue>
119299                  <name>10100</name>
119300                  <description>Bus clock filter count is 21</description>
119301                  <value>#10100</value>
119302                </enumeratedValue>
119303                <enumeratedValue>
119304                  <name>10101</name>
119305                  <description>Bus clock filter count is 22</description>
119306                  <value>#10101</value>
119307                </enumeratedValue>
119308                <enumeratedValue>
119309                  <name>10110</name>
119310                  <description>Bus clock filter count is 23</description>
119311                  <value>#10110</value>
119312                </enumeratedValue>
119313                <enumeratedValue>
119314                  <name>10111</name>
119315                  <description>Bus clock filter count is 24</description>
119316                  <value>#10111</value>
119317                </enumeratedValue>
119318                <enumeratedValue>
119319                  <name>11000</name>
119320                  <description>Bus clock filter count is 25</description>
119321                  <value>#11000</value>
119322                </enumeratedValue>
119323                <enumeratedValue>
119324                  <name>11001</name>
119325                  <description>Bus clock filter count is 26</description>
119326                  <value>#11001</value>
119327                </enumeratedValue>
119328                <enumeratedValue>
119329                  <name>11010</name>
119330                  <description>Bus clock filter count is 27</description>
119331                  <value>#11010</value>
119332                </enumeratedValue>
119333                <enumeratedValue>
119334                  <name>11011</name>
119335                  <description>Bus clock filter count is 28</description>
119336                  <value>#11011</value>
119337                </enumeratedValue>
119338                <enumeratedValue>
119339                  <name>11100</name>
119340                  <description>Bus clock filter count is 29</description>
119341                  <value>#11100</value>
119342                </enumeratedValue>
119343                <enumeratedValue>
119344                  <name>11101</name>
119345                  <description>Bus clock filter count is 30</description>
119346                  <value>#11101</value>
119347                </enumeratedValue>
119348                <enumeratedValue>
119349                  <name>11110</name>
119350                  <description>Bus clock filter count is 31</description>
119351                  <value>#11110</value>
119352                </enumeratedValue>
119353                <enumeratedValue>
119354                  <name>11111</name>
119355                  <description>Bus clock filter count is 32</description>
119356                  <value>#11111</value>
119357                </enumeratedValue>
119358              </enumeratedValues>
119359            </field>
119360          </fields>
119361        </register>
119362        <register>
119363          <name>FM</name>
119364          <description>Force Mode Register</description>
119365          <addressOffset>0x6</addressOffset>
119366          <size>8</size>
119367          <access>read-write</access>
119368          <resetValue>0</resetValue>
119369          <resetMask>0xFF</resetMask>
119370          <fields>
119371            <field>
119372              <name>FORCEROM</name>
119373              <description>Force ROM Boot</description>
119374              <bitOffset>1</bitOffset>
119375              <bitWidth>2</bitWidth>
119376              <access>read-write</access>
119377              <enumeratedValues>
119378                <enumeratedValue>
119379                  <name>00</name>
119380                  <description>No effect</description>
119381                  <value>#00</value>
119382                </enumeratedValue>
119383                <enumeratedValue>
119384                  <name>01</name>
119385                  <description>Force boot from ROM with RCM_MR[1] set.</description>
119386                  <value>#01</value>
119387                </enumeratedValue>
119388                <enumeratedValue>
119389                  <name>10</name>
119390                  <description>Force boot from ROM with RCM_MR[2] set.</description>
119391                  <value>#10</value>
119392                </enumeratedValue>
119393                <enumeratedValue>
119394                  <name>11</name>
119395                  <description>Force boot from ROM with RCM_MR[2:1] set.</description>
119396                  <value>#11</value>
119397                </enumeratedValue>
119398              </enumeratedValues>
119399            </field>
119400          </fields>
119401        </register>
119402        <register>
119403          <name>MR</name>
119404          <description>Mode Register</description>
119405          <addressOffset>0x7</addressOffset>
119406          <size>8</size>
119407          <access>read-write</access>
119408          <resetValue>0</resetValue>
119409          <resetMask>0xFF</resetMask>
119410          <fields>
119411            <field>
119412              <name>BOOTROM</name>
119413              <description>Boot ROM Configuration</description>
119414              <bitOffset>1</bitOffset>
119415              <bitWidth>2</bitWidth>
119416              <access>read-write</access>
119417              <enumeratedValues>
119418                <enumeratedValue>
119419                  <name>00</name>
119420                  <description>Boot from Flash</description>
119421                  <value>#00</value>
119422                </enumeratedValue>
119423                <enumeratedValue>
119424                  <name>01</name>
119425                  <description>Boot from ROM due to BOOTCFG0 pin assertion</description>
119426                  <value>#01</value>
119427                </enumeratedValue>
119428                <enumeratedValue>
119429                  <name>10</name>
119430                  <description>Boot form ROM due to FOPT[7] configuration</description>
119431                  <value>#10</value>
119432                </enumeratedValue>
119433                <enumeratedValue>
119434                  <name>11</name>
119435                  <description>Boot from ROM due to both BOOTCFG0 pin assertion and FOPT[7] configuration</description>
119436                  <value>#11</value>
119437                </enumeratedValue>
119438              </enumeratedValues>
119439            </field>
119440          </fields>
119441        </register>
119442        <register>
119443          <name>SSRS0</name>
119444          <description>Sticky System Reset Status Register 0</description>
119445          <addressOffset>0x8</addressOffset>
119446          <size>8</size>
119447          <access>read-write</access>
119448          <resetValue>0x82</resetValue>
119449          <resetMask>0xFF</resetMask>
119450          <fields>
119451            <field>
119452              <name>SWAKEUP</name>
119453              <description>Sticky Low Leakage Wakeup Reset</description>
119454              <bitOffset>0</bitOffset>
119455              <bitWidth>1</bitWidth>
119456              <access>read-write</access>
119457              <enumeratedValues>
119458                <enumeratedValue>
119459                  <name>0</name>
119460                  <description>Reset not caused by LLWU module wakeup source</description>
119461                  <value>#0</value>
119462                </enumeratedValue>
119463                <enumeratedValue>
119464                  <name>1</name>
119465                  <description>Reset caused by LLWU module wakeup source</description>
119466                  <value>#1</value>
119467                </enumeratedValue>
119468              </enumeratedValues>
119469            </field>
119470            <field>
119471              <name>SLVD</name>
119472              <description>Sticky Low-Voltage Detect Reset</description>
119473              <bitOffset>1</bitOffset>
119474              <bitWidth>1</bitWidth>
119475              <access>read-write</access>
119476              <enumeratedValues>
119477                <enumeratedValue>
119478                  <name>0</name>
119479                  <description>Reset not caused by LVD trip or POR</description>
119480                  <value>#0</value>
119481                </enumeratedValue>
119482                <enumeratedValue>
119483                  <name>1</name>
119484                  <description>Reset caused by LVD trip or POR</description>
119485                  <value>#1</value>
119486                </enumeratedValue>
119487              </enumeratedValues>
119488            </field>
119489            <field>
119490              <name>SLOC</name>
119491              <description>Sticky Loss-of-Clock Reset</description>
119492              <bitOffset>2</bitOffset>
119493              <bitWidth>1</bitWidth>
119494              <access>read-write</access>
119495              <enumeratedValues>
119496                <enumeratedValue>
119497                  <name>0</name>
119498                  <description>Reset not caused by a loss of external clock.</description>
119499                  <value>#0</value>
119500                </enumeratedValue>
119501                <enumeratedValue>
119502                  <name>1</name>
119503                  <description>Reset caused by a loss of external clock.</description>
119504                  <value>#1</value>
119505                </enumeratedValue>
119506              </enumeratedValues>
119507            </field>
119508            <field>
119509              <name>SLOL</name>
119510              <description>Sticky Loss-of-Lock Reset</description>
119511              <bitOffset>3</bitOffset>
119512              <bitWidth>1</bitWidth>
119513              <access>read-write</access>
119514              <enumeratedValues>
119515                <enumeratedValue>
119516                  <name>0</name>
119517                  <description>Reset not caused by a loss of lock in the PLL</description>
119518                  <value>#0</value>
119519                </enumeratedValue>
119520                <enumeratedValue>
119521                  <name>1</name>
119522                  <description>Reset caused by a loss of lock in the PLL</description>
119523                  <value>#1</value>
119524                </enumeratedValue>
119525              </enumeratedValues>
119526            </field>
119527            <field>
119528              <name>SWDOG</name>
119529              <description>Sticky Watchdog</description>
119530              <bitOffset>5</bitOffset>
119531              <bitWidth>1</bitWidth>
119532              <access>read-write</access>
119533              <enumeratedValues>
119534                <enumeratedValue>
119535                  <name>0</name>
119536                  <description>Reset not caused by watchdog timeout</description>
119537                  <value>#0</value>
119538                </enumeratedValue>
119539                <enumeratedValue>
119540                  <name>1</name>
119541                  <description>Reset caused by watchdog timeout</description>
119542                  <value>#1</value>
119543                </enumeratedValue>
119544              </enumeratedValues>
119545            </field>
119546            <field>
119547              <name>SPIN</name>
119548              <description>Sticky External Reset Pin</description>
119549              <bitOffset>6</bitOffset>
119550              <bitWidth>1</bitWidth>
119551              <access>read-write</access>
119552              <enumeratedValues>
119553                <enumeratedValue>
119554                  <name>0</name>
119555                  <description>Reset not caused by external reset pin</description>
119556                  <value>#0</value>
119557                </enumeratedValue>
119558                <enumeratedValue>
119559                  <name>1</name>
119560                  <description>Reset caused by external reset pin</description>
119561                  <value>#1</value>
119562                </enumeratedValue>
119563              </enumeratedValues>
119564            </field>
119565            <field>
119566              <name>SPOR</name>
119567              <description>Sticky Power-On Reset</description>
119568              <bitOffset>7</bitOffset>
119569              <bitWidth>1</bitWidth>
119570              <access>read-write</access>
119571              <enumeratedValues>
119572                <enumeratedValue>
119573                  <name>0</name>
119574                  <description>Reset not caused by POR</description>
119575                  <value>#0</value>
119576                </enumeratedValue>
119577                <enumeratedValue>
119578                  <name>1</name>
119579                  <description>Reset caused by POR</description>
119580                  <value>#1</value>
119581                </enumeratedValue>
119582              </enumeratedValues>
119583            </field>
119584          </fields>
119585        </register>
119586        <register>
119587          <name>SSRS1</name>
119588          <description>Sticky System Reset Status Register 1</description>
119589          <addressOffset>0x9</addressOffset>
119590          <size>8</size>
119591          <access>read-write</access>
119592          <resetValue>0</resetValue>
119593          <resetMask>0xFF</resetMask>
119594          <fields>
119595            <field>
119596              <name>SJTAG</name>
119597              <description>Sticky JTAG Generated Reset</description>
119598              <bitOffset>0</bitOffset>
119599              <bitWidth>1</bitWidth>
119600              <access>read-write</access>
119601              <enumeratedValues>
119602                <enumeratedValue>
119603                  <name>0</name>
119604                  <description>Reset not caused by JTAG</description>
119605                  <value>#0</value>
119606                </enumeratedValue>
119607                <enumeratedValue>
119608                  <name>1</name>
119609                  <description>Reset caused by JTAG</description>
119610                  <value>#1</value>
119611                </enumeratedValue>
119612              </enumeratedValues>
119613            </field>
119614            <field>
119615              <name>SLOCKUP</name>
119616              <description>Sticky Core Lockup</description>
119617              <bitOffset>1</bitOffset>
119618              <bitWidth>1</bitWidth>
119619              <access>read-write</access>
119620              <enumeratedValues>
119621                <enumeratedValue>
119622                  <name>0</name>
119623                  <description>Reset not caused by core LOCKUP event</description>
119624                  <value>#0</value>
119625                </enumeratedValue>
119626                <enumeratedValue>
119627                  <name>1</name>
119628                  <description>Reset caused by core LOCKUP event</description>
119629                  <value>#1</value>
119630                </enumeratedValue>
119631              </enumeratedValues>
119632            </field>
119633            <field>
119634              <name>SSW</name>
119635              <description>Sticky Software</description>
119636              <bitOffset>2</bitOffset>
119637              <bitWidth>1</bitWidth>
119638              <access>read-write</access>
119639              <enumeratedValues>
119640                <enumeratedValue>
119641                  <name>0</name>
119642                  <description>Reset not caused by software setting of SYSRESETREQ bit</description>
119643                  <value>#0</value>
119644                </enumeratedValue>
119645                <enumeratedValue>
119646                  <name>1</name>
119647                  <description>Reset caused by software setting of SYSRESETREQ bit</description>
119648                  <value>#1</value>
119649                </enumeratedValue>
119650              </enumeratedValues>
119651            </field>
119652            <field>
119653              <name>SMDM_AP</name>
119654              <description>Sticky MDM-AP System Reset Request</description>
119655              <bitOffset>3</bitOffset>
119656              <bitWidth>1</bitWidth>
119657              <access>read-write</access>
119658              <enumeratedValues>
119659                <enumeratedValue>
119660                  <name>0</name>
119661                  <description>Reset not caused by host debugger system setting of the System Reset Request bit</description>
119662                  <value>#0</value>
119663                </enumeratedValue>
119664                <enumeratedValue>
119665                  <name>1</name>
119666                  <description>Reset caused by host debugger system setting of the System Reset Request bit</description>
119667                  <value>#1</value>
119668                </enumeratedValue>
119669              </enumeratedValues>
119670            </field>
119671            <field>
119672              <name>SSACKERR</name>
119673              <description>Sticky Stop Mode Acknowledge Error Reset</description>
119674              <bitOffset>5</bitOffset>
119675              <bitWidth>1</bitWidth>
119676              <access>read-write</access>
119677              <enumeratedValues>
119678                <enumeratedValue>
119679                  <name>0</name>
119680                  <description>Reset not caused by peripheral failure to acknowledge attempt to enter stop mode</description>
119681                  <value>#0</value>
119682                </enumeratedValue>
119683                <enumeratedValue>
119684                  <name>1</name>
119685                  <description>Reset caused by peripheral failure to acknowledge attempt to enter stop mode</description>
119686                  <value>#1</value>
119687                </enumeratedValue>
119688              </enumeratedValues>
119689            </field>
119690          </fields>
119691        </register>
119692      </registers>
119693    </peripheral>
119694    <peripheral>
119695      <name>TRNG0</name>
119696      <description>RNG</description>
119697      <baseAddress>0x400A0000</baseAddress>
119698      <addressBlock>
119699        <offset>0</offset>
119700        <size>0xF8</size>
119701        <usage>registers</usage>
119702      </addressBlock>
119703      <interrupt>
119704        <name>TRNG0</name>
119705        <value>23</value>
119706      </interrupt>
119707      <registers>
119708        <register>
119709          <name>TRNG0_MCTL</name>
119710          <description>RNG Miscellaneous Control Register</description>
119711          <addressOffset>0</addressOffset>
119712          <size>32</size>
119713          <access>read-write</access>
119714          <resetValue>0x12001</resetValue>
119715          <resetMask>0xFFFFFFFF</resetMask>
119716          <fields>
119717            <field>
119718              <name>SAMP_MODE</name>
119719              <description>Sample Mode</description>
119720              <bitOffset>0</bitOffset>
119721              <bitWidth>2</bitWidth>
119722              <access>read-write</access>
119723              <enumeratedValues>
119724                <enumeratedValue>
119725                  <name>00</name>
119726                  <description>use Von Neumann data into both Entropy shifter and Statistical Checker</description>
119727                  <value>#00</value>
119728                </enumeratedValue>
119729                <enumeratedValue>
119730                  <name>01</name>
119731                  <description>use raw data into both Entropy shifter and Statistical Checker</description>
119732                  <value>#01</value>
119733                </enumeratedValue>
119734                <enumeratedValue>
119735                  <name>10</name>
119736                  <description>use Von Neumann data into Entropy shifter. Use raw data into Statistical Checker</description>
119737                  <value>#10</value>
119738                </enumeratedValue>
119739              </enumeratedValues>
119740            </field>
119741            <field>
119742              <name>OSC_DIV</name>
119743              <description>Oscillator Divide</description>
119744              <bitOffset>2</bitOffset>
119745              <bitWidth>2</bitWidth>
119746              <access>read-write</access>
119747              <enumeratedValues>
119748                <enumeratedValue>
119749                  <name>00</name>
119750                  <description>use ring oscillator with no divide</description>
119751                  <value>#00</value>
119752                </enumeratedValue>
119753                <enumeratedValue>
119754                  <name>01</name>
119755                  <description>use ring oscillator divided-by-2</description>
119756                  <value>#01</value>
119757                </enumeratedValue>
119758                <enumeratedValue>
119759                  <name>10</name>
119760                  <description>use ring oscillator divided-by-4</description>
119761                  <value>#10</value>
119762                </enumeratedValue>
119763                <enumeratedValue>
119764                  <name>11</name>
119765                  <description>use ring oscillator divided-by-8</description>
119766                  <value>#11</value>
119767                </enumeratedValue>
119768              </enumeratedValues>
119769            </field>
119770            <field>
119771              <name>UNUSED</name>
119772              <description>This bit is unused but write-able. Must be left as zero.</description>
119773              <bitOffset>4</bitOffset>
119774              <bitWidth>1</bitWidth>
119775              <access>read-write</access>
119776            </field>
119777            <field>
119778              <name>TRNG_ACC</name>
119779              <description>TRNG Access Mode</description>
119780              <bitOffset>5</bitOffset>
119781              <bitWidth>1</bitWidth>
119782              <access>read-write</access>
119783            </field>
119784            <field>
119785              <name>RST_DEF</name>
119786              <description>Reset Defaults</description>
119787              <bitOffset>6</bitOffset>
119788              <bitWidth>1</bitWidth>
119789              <access>write-only</access>
119790            </field>
119791            <field>
119792              <name>FOR_SCLK</name>
119793              <description>Force System Clock</description>
119794              <bitOffset>7</bitOffset>
119795              <bitWidth>1</bitWidth>
119796              <access>read-write</access>
119797            </field>
119798            <field>
119799              <name>FCT_FAIL</name>
119800              <description>Read only: Frequency Count Fail</description>
119801              <bitOffset>8</bitOffset>
119802              <bitWidth>1</bitWidth>
119803              <access>read-only</access>
119804            </field>
119805            <field>
119806              <name>FCT_VAL</name>
119807              <description>Read only: Frequency Count Valid. Indicates that a valid frequency count may be read from FRQCNT.</description>
119808              <bitOffset>9</bitOffset>
119809              <bitWidth>1</bitWidth>
119810              <access>read-only</access>
119811            </field>
119812            <field>
119813              <name>ENT_VAL</name>
119814              <description>Read only: Entropy Valid</description>
119815              <bitOffset>10</bitOffset>
119816              <bitWidth>1</bitWidth>
119817              <access>read-only</access>
119818            </field>
119819            <field>
119820              <name>TST_OUT</name>
119821              <description>Read only: Test point inside ring oscillator.</description>
119822              <bitOffset>11</bitOffset>
119823              <bitWidth>1</bitWidth>
119824              <access>read-only</access>
119825            </field>
119826            <field>
119827              <name>ERR</name>
119828              <description>Read: Error status</description>
119829              <bitOffset>12</bitOffset>
119830              <bitWidth>1</bitWidth>
119831              <access>read-write</access>
119832            </field>
119833            <field>
119834              <name>TSTOP_OK</name>
119835              <description>TRNG_OK_TO_STOP</description>
119836              <bitOffset>13</bitOffset>
119837              <bitWidth>1</bitWidth>
119838              <access>read-only</access>
119839            </field>
119840            <field>
119841              <name>PRGM</name>
119842              <description>Programming Mode Select</description>
119843              <bitOffset>16</bitOffset>
119844              <bitWidth>1</bitWidth>
119845              <access>read-write</access>
119846            </field>
119847          </fields>
119848        </register>
119849        <register>
119850          <name>TRNG0_SCMISC</name>
119851          <description>RNG Statistical Check Miscellaneous Register</description>
119852          <addressOffset>0x4</addressOffset>
119853          <size>32</size>
119854          <access>read-write</access>
119855          <resetValue>0x1001F</resetValue>
119856          <resetMask>0xFFFFFFFF</resetMask>
119857          <fields>
119858            <field>
119859              <name>LRUN_MAX</name>
119860              <description>LONG RUN MAX LIMIT</description>
119861              <bitOffset>0</bitOffset>
119862              <bitWidth>8</bitWidth>
119863              <access>read-write</access>
119864            </field>
119865            <field>
119866              <name>RTY_CT</name>
119867              <description>RETRY COUNT</description>
119868              <bitOffset>16</bitOffset>
119869              <bitWidth>4</bitWidth>
119870              <access>read-write</access>
119871            </field>
119872          </fields>
119873        </register>
119874        <register>
119875          <name>TRNG0_PKRRNG</name>
119876          <description>RNG Poker Range Register</description>
119877          <addressOffset>0x8</addressOffset>
119878          <size>32</size>
119879          <access>read-write</access>
119880          <resetValue>0x9A3</resetValue>
119881          <resetMask>0xFFFFFFFF</resetMask>
119882          <fields>
119883            <field>
119884              <name>PKR_RNG</name>
119885              <description>Poker Range</description>
119886              <bitOffset>0</bitOffset>
119887              <bitWidth>16</bitWidth>
119888              <access>read-write</access>
119889            </field>
119890          </fields>
119891        </register>
119892        <register>
119893          <name>TRNG0_PKRMAX</name>
119894          <description>RNG Poker Maximum Limit Register</description>
119895          <alternateGroup>TRNG0</alternateGroup>
119896          <addressOffset>0xC</addressOffset>
119897          <size>32</size>
119898          <access>read-write</access>
119899          <resetValue>0x6920</resetValue>
119900          <resetMask>0xFFFFFFFF</resetMask>
119901          <fields>
119902            <field>
119903              <name>PKR_MAX</name>
119904              <description>Poker Maximum Limit</description>
119905              <bitOffset>0</bitOffset>
119906              <bitWidth>24</bitWidth>
119907              <access>read-write</access>
119908            </field>
119909          </fields>
119910        </register>
119911        <register>
119912          <name>TRNG0_PKRSQ</name>
119913          <description>RNG Poker Square Calculation Result Register</description>
119914          <alternateGroup>TRNG0</alternateGroup>
119915          <addressOffset>0xC</addressOffset>
119916          <size>32</size>
119917          <access>read-only</access>
119918          <resetValue>0</resetValue>
119919          <resetMask>0xFFFFFFFF</resetMask>
119920          <fields>
119921            <field>
119922              <name>PKR_SQ</name>
119923              <description>Poker Square Calculation Result</description>
119924              <bitOffset>0</bitOffset>
119925              <bitWidth>24</bitWidth>
119926              <access>read-only</access>
119927            </field>
119928          </fields>
119929        </register>
119930        <register>
119931          <name>TRNG0_SDCTL</name>
119932          <description>RNG Seed Control Register</description>
119933          <addressOffset>0x10</addressOffset>
119934          <size>32</size>
119935          <access>read-write</access>
119936          <resetValue>0xC8009C4</resetValue>
119937          <resetMask>0xFFFFFFFF</resetMask>
119938          <fields>
119939            <field>
119940              <name>SAMP_SIZE</name>
119941              <description>Sample Size</description>
119942              <bitOffset>0</bitOffset>
119943              <bitWidth>16</bitWidth>
119944              <access>read-write</access>
119945            </field>
119946            <field>
119947              <name>ENT_DLY</name>
119948              <description>Entropy Delay</description>
119949              <bitOffset>16</bitOffset>
119950              <bitWidth>16</bitWidth>
119951              <access>read-write</access>
119952            </field>
119953          </fields>
119954        </register>
119955        <register>
119956          <name>TRNG0_SBLIM</name>
119957          <description>RNG Sparse Bit Limit Register</description>
119958          <alternateGroup>TRNG0</alternateGroup>
119959          <addressOffset>0x14</addressOffset>
119960          <size>32</size>
119961          <access>read-write</access>
119962          <resetValue>0x3F</resetValue>
119963          <resetMask>0xFFFFFFFF</resetMask>
119964          <fields>
119965            <field>
119966              <name>SB_LIM</name>
119967              <description>Sparse Bit Limit</description>
119968              <bitOffset>0</bitOffset>
119969              <bitWidth>10</bitWidth>
119970              <access>read-write</access>
119971            </field>
119972          </fields>
119973        </register>
119974        <register>
119975          <name>TRNG0_TOTSAM</name>
119976          <description>RNG Total Samples Register</description>
119977          <alternateGroup>TRNG0</alternateGroup>
119978          <addressOffset>0x14</addressOffset>
119979          <size>32</size>
119980          <access>read-only</access>
119981          <resetValue>0</resetValue>
119982          <resetMask>0xFFFFFFFF</resetMask>
119983          <fields>
119984            <field>
119985              <name>TOT_SAM</name>
119986              <description>Total Samples</description>
119987              <bitOffset>0</bitOffset>
119988              <bitWidth>20</bitWidth>
119989              <access>read-only</access>
119990            </field>
119991          </fields>
119992        </register>
119993        <register>
119994          <name>TRNG0_FRQMIN</name>
119995          <description>RNG Frequency Count Minimum Limit Register</description>
119996          <addressOffset>0x18</addressOffset>
119997          <size>32</size>
119998          <access>read-write</access>
119999          <resetValue>0x640</resetValue>
120000          <resetMask>0xFFFFFFFF</resetMask>
120001          <fields>
120002            <field>
120003              <name>FRQ_MIN</name>
120004              <description>Frequency Count Minimum Limit</description>
120005              <bitOffset>0</bitOffset>
120006              <bitWidth>22</bitWidth>
120007              <access>read-write</access>
120008            </field>
120009          </fields>
120010        </register>
120011        <register>
120012          <name>TRNG0_FRQCNT</name>
120013          <description>RNG Frequency Count Register</description>
120014          <alternateGroup>TRNG0</alternateGroup>
120015          <addressOffset>0x1C</addressOffset>
120016          <size>32</size>
120017          <access>read-only</access>
120018          <resetValue>0</resetValue>
120019          <resetMask>0xFFFFFFFF</resetMask>
120020          <fields>
120021            <field>
120022              <name>FRQ_CT</name>
120023              <description>Frequency Count</description>
120024              <bitOffset>0</bitOffset>
120025              <bitWidth>22</bitWidth>
120026              <access>read-only</access>
120027            </field>
120028          </fields>
120029        </register>
120030        <register>
120031          <name>TRNG0_FRQMAX</name>
120032          <description>RNG Frequency Count Maximum Limit Register</description>
120033          <alternateGroup>TRNG0</alternateGroup>
120034          <addressOffset>0x1C</addressOffset>
120035          <size>32</size>
120036          <access>read-write</access>
120037          <resetValue>0x6400</resetValue>
120038          <resetMask>0xFFFFFFFF</resetMask>
120039          <fields>
120040            <field>
120041              <name>FRQ_MAX</name>
120042              <description>Frequency Counter Maximum Limit</description>
120043              <bitOffset>0</bitOffset>
120044              <bitWidth>22</bitWidth>
120045              <access>read-write</access>
120046            </field>
120047          </fields>
120048        </register>
120049        <register>
120050          <name>TRNG0_SCMC</name>
120051          <description>RNG Statistical Check Monobit Count Register</description>
120052          <alternateGroup>TRNG0</alternateGroup>
120053          <addressOffset>0x20</addressOffset>
120054          <size>32</size>
120055          <access>read-only</access>
120056          <resetValue>0</resetValue>
120057          <resetMask>0xFFFFFFFF</resetMask>
120058          <fields>
120059            <field>
120060              <name>MONO_CT</name>
120061              <description>Monobit Count</description>
120062              <bitOffset>0</bitOffset>
120063              <bitWidth>16</bitWidth>
120064              <access>read-only</access>
120065            </field>
120066          </fields>
120067        </register>
120068        <register>
120069          <name>TRNG0_SCML</name>
120070          <description>RNG Statistical Check Monobit Limit Register</description>
120071          <alternateGroup>TRNG0</alternateGroup>
120072          <addressOffset>0x20</addressOffset>
120073          <size>32</size>
120074          <access>read-write</access>
120075          <resetValue>0x10C0568</resetValue>
120076          <resetMask>0xFFFFFFFF</resetMask>
120077          <fields>
120078            <field>
120079              <name>MONO_MAX</name>
120080              <description>Monobit Maximum Limit</description>
120081              <bitOffset>0</bitOffset>
120082              <bitWidth>16</bitWidth>
120083              <access>read-write</access>
120084            </field>
120085            <field>
120086              <name>MONO_RNG</name>
120087              <description>Monobit Range</description>
120088              <bitOffset>16</bitOffset>
120089              <bitWidth>16</bitWidth>
120090              <access>read-write</access>
120091            </field>
120092          </fields>
120093        </register>
120094        <register>
120095          <name>TRNG0_SCR1C</name>
120096          <description>RNG Statistical Check Run Length 1 Count Register</description>
120097          <alternateGroup>TRNG0</alternateGroup>
120098          <addressOffset>0x24</addressOffset>
120099          <size>32</size>
120100          <access>read-only</access>
120101          <resetValue>0</resetValue>
120102          <resetMask>0xFFFFFFFF</resetMask>
120103          <fields>
120104            <field>
120105              <name>R1_0_CT</name>
120106              <description>Runs of Zero, Length 1 Count</description>
120107              <bitOffset>0</bitOffset>
120108              <bitWidth>15</bitWidth>
120109              <access>read-only</access>
120110            </field>
120111            <field>
120112              <name>R1_1_CT</name>
120113              <description>Runs of One, Length 1 Count</description>
120114              <bitOffset>16</bitOffset>
120115              <bitWidth>15</bitWidth>
120116              <access>read-only</access>
120117            </field>
120118          </fields>
120119        </register>
120120        <register>
120121          <name>TRNG0_SCR1L</name>
120122          <description>RNG Statistical Check Run Length 1 Limit Register</description>
120123          <alternateGroup>TRNG0</alternateGroup>
120124          <addressOffset>0x24</addressOffset>
120125          <size>32</size>
120126          <access>read-write</access>
120127          <resetValue>0xB20195</resetValue>
120128          <resetMask>0xFFFFFFFF</resetMask>
120129          <fields>
120130            <field>
120131              <name>RUN1_MAX</name>
120132              <description>Run Length 1 Maximum Limit</description>
120133              <bitOffset>0</bitOffset>
120134              <bitWidth>15</bitWidth>
120135              <access>read-write</access>
120136            </field>
120137            <field>
120138              <name>RUN1_RNG</name>
120139              <description>Run Length 1 Range</description>
120140              <bitOffset>16</bitOffset>
120141              <bitWidth>15</bitWidth>
120142              <access>read-write</access>
120143            </field>
120144          </fields>
120145        </register>
120146        <register>
120147          <name>TRNG0_SCR2C</name>
120148          <description>RNG Statistical Check Run Length 2 Count Register</description>
120149          <alternateGroup>TRNG0</alternateGroup>
120150          <addressOffset>0x28</addressOffset>
120151          <size>32</size>
120152          <access>read-only</access>
120153          <resetValue>0</resetValue>
120154          <resetMask>0xFFFFFFFF</resetMask>
120155          <fields>
120156            <field>
120157              <name>R2_0_CT</name>
120158              <description>Runs of Zero, Length 2 Count</description>
120159              <bitOffset>0</bitOffset>
120160              <bitWidth>14</bitWidth>
120161              <access>read-only</access>
120162            </field>
120163            <field>
120164              <name>R2_1_CT</name>
120165              <description>Runs of One, Length 2 Count</description>
120166              <bitOffset>16</bitOffset>
120167              <bitWidth>14</bitWidth>
120168              <access>read-only</access>
120169            </field>
120170          </fields>
120171        </register>
120172        <register>
120173          <name>TRNG0_SCR2L</name>
120174          <description>RNG Statistical Check Run Length 2 Limit Register</description>
120175          <alternateGroup>TRNG0</alternateGroup>
120176          <addressOffset>0x28</addressOffset>
120177          <size>32</size>
120178          <access>read-write</access>
120179          <resetValue>0x7A00DC</resetValue>
120180          <resetMask>0xFFFFFFFF</resetMask>
120181          <fields>
120182            <field>
120183              <name>RUN2_MAX</name>
120184              <description>Run Length 2 Maximum Limit</description>
120185              <bitOffset>0</bitOffset>
120186              <bitWidth>14</bitWidth>
120187              <access>read-write</access>
120188            </field>
120189            <field>
120190              <name>RUN2_RNG</name>
120191              <description>Run Length 2 Range</description>
120192              <bitOffset>16</bitOffset>
120193              <bitWidth>14</bitWidth>
120194              <access>read-write</access>
120195            </field>
120196          </fields>
120197        </register>
120198        <register>
120199          <name>TRNG0_SCR3C</name>
120200          <description>RNG Statistical Check Run Length 3 Count Register</description>
120201          <alternateGroup>TRNG0</alternateGroup>
120202          <addressOffset>0x2C</addressOffset>
120203          <size>32</size>
120204          <access>read-only</access>
120205          <resetValue>0</resetValue>
120206          <resetMask>0xFFFFFFFF</resetMask>
120207          <fields>
120208            <field>
120209              <name>R3_0_CT</name>
120210              <description>Runs of Zeroes, Length 3 Count</description>
120211              <bitOffset>0</bitOffset>
120212              <bitWidth>13</bitWidth>
120213              <access>read-only</access>
120214            </field>
120215            <field>
120216              <name>R3_1_CT</name>
120217              <description>Runs of Ones, Length 3 Count</description>
120218              <bitOffset>16</bitOffset>
120219              <bitWidth>13</bitWidth>
120220              <access>read-only</access>
120221            </field>
120222          </fields>
120223        </register>
120224        <register>
120225          <name>TRNG0_SCR3L</name>
120226          <description>RNG Statistical Check Run Length 3 Limit Register</description>
120227          <alternateGroup>TRNG0</alternateGroup>
120228          <addressOffset>0x2C</addressOffset>
120229          <size>32</size>
120230          <access>read-write</access>
120231          <resetValue>0x58007D</resetValue>
120232          <resetMask>0xFFFFFFFF</resetMask>
120233          <fields>
120234            <field>
120235              <name>RUN3_MAX</name>
120236              <description>Run Length 3 Maximum Limit</description>
120237              <bitOffset>0</bitOffset>
120238              <bitWidth>13</bitWidth>
120239              <access>read-write</access>
120240            </field>
120241            <field>
120242              <name>RUN3_RNG</name>
120243              <description>Run Length 3 Range</description>
120244              <bitOffset>16</bitOffset>
120245              <bitWidth>13</bitWidth>
120246              <access>read-write</access>
120247            </field>
120248          </fields>
120249        </register>
120250        <register>
120251          <name>TRNG0_SCR4C</name>
120252          <description>RNG Statistical Check Run Length 4 Count Register</description>
120253          <alternateGroup>TRNG0</alternateGroup>
120254          <addressOffset>0x30</addressOffset>
120255          <size>32</size>
120256          <access>read-only</access>
120257          <resetValue>0</resetValue>
120258          <resetMask>0xFFFFFFFF</resetMask>
120259          <fields>
120260            <field>
120261              <name>R4_0_CT</name>
120262              <description>Runs of Zero, Length 4 Count</description>
120263              <bitOffset>0</bitOffset>
120264              <bitWidth>12</bitWidth>
120265              <access>read-only</access>
120266            </field>
120267            <field>
120268              <name>R4_1_CT</name>
120269              <description>Runs of One, Length 4 Count</description>
120270              <bitOffset>16</bitOffset>
120271              <bitWidth>12</bitWidth>
120272              <access>read-only</access>
120273            </field>
120274          </fields>
120275        </register>
120276        <register>
120277          <name>TRNG0_SCR4L</name>
120278          <description>RNG Statistical Check Run Length 4 Limit Register</description>
120279          <alternateGroup>TRNG0</alternateGroup>
120280          <addressOffset>0x30</addressOffset>
120281          <size>32</size>
120282          <access>read-write</access>
120283          <resetValue>0x40004B</resetValue>
120284          <resetMask>0xFFFFFFFF</resetMask>
120285          <fields>
120286            <field>
120287              <name>RUN4_MAX</name>
120288              <description>Run Length 4 Maximum Limit</description>
120289              <bitOffset>0</bitOffset>
120290              <bitWidth>12</bitWidth>
120291              <access>read-write</access>
120292            </field>
120293            <field>
120294              <name>RUN4_RNG</name>
120295              <description>Run Length 4 Range</description>
120296              <bitOffset>16</bitOffset>
120297              <bitWidth>12</bitWidth>
120298              <access>read-write</access>
120299            </field>
120300          </fields>
120301        </register>
120302        <register>
120303          <name>TRNG0_SCR5C</name>
120304          <description>RNG Statistical Check Run Length 5 Count Register</description>
120305          <alternateGroup>TRNG0</alternateGroup>
120306          <addressOffset>0x34</addressOffset>
120307          <size>32</size>
120308          <access>read-only</access>
120309          <resetValue>0</resetValue>
120310          <resetMask>0xFFFFFFFF</resetMask>
120311          <fields>
120312            <field>
120313              <name>R5_0_CT</name>
120314              <description>Runs of Zero, Length 5 Count</description>
120315              <bitOffset>0</bitOffset>
120316              <bitWidth>11</bitWidth>
120317              <access>read-only</access>
120318            </field>
120319            <field>
120320              <name>R5_1_CT</name>
120321              <description>Runs of One, Length 5 Count</description>
120322              <bitOffset>16</bitOffset>
120323              <bitWidth>11</bitWidth>
120324              <access>read-only</access>
120325            </field>
120326          </fields>
120327        </register>
120328        <register>
120329          <name>TRNG0_SCR5L</name>
120330          <description>RNG Statistical Check Run Length 5 Limit Register</description>
120331          <alternateGroup>TRNG0</alternateGroup>
120332          <addressOffset>0x34</addressOffset>
120333          <size>32</size>
120334          <access>read-write</access>
120335          <resetValue>0x2E002F</resetValue>
120336          <resetMask>0xFFFFFFFF</resetMask>
120337          <fields>
120338            <field>
120339              <name>RUN5_MAX</name>
120340              <description>Run Length 5 Maximum Limit</description>
120341              <bitOffset>0</bitOffset>
120342              <bitWidth>11</bitWidth>
120343              <access>read-write</access>
120344            </field>
120345            <field>
120346              <name>RUN5_RNG</name>
120347              <description>Run Length 5 Range</description>
120348              <bitOffset>16</bitOffset>
120349              <bitWidth>11</bitWidth>
120350              <access>read-write</access>
120351            </field>
120352          </fields>
120353        </register>
120354        <register>
120355          <name>TRNG0_SCR6PC</name>
120356          <description>RNG Statistical Check Run Length 6+ Count Register</description>
120357          <alternateGroup>TRNG0</alternateGroup>
120358          <addressOffset>0x38</addressOffset>
120359          <size>32</size>
120360          <access>read-only</access>
120361          <resetValue>0</resetValue>
120362          <resetMask>0xFFFFFFFF</resetMask>
120363          <fields>
120364            <field>
120365              <name>R6P_0_CT</name>
120366              <description>Runs of Zero, Length 6+ Count</description>
120367              <bitOffset>0</bitOffset>
120368              <bitWidth>11</bitWidth>
120369              <access>read-only</access>
120370            </field>
120371            <field>
120372              <name>R6P_1_CT</name>
120373              <description>Runs of One, Length 6+ Count</description>
120374              <bitOffset>16</bitOffset>
120375              <bitWidth>11</bitWidth>
120376              <access>read-only</access>
120377            </field>
120378          </fields>
120379        </register>
120380        <register>
120381          <name>TRNG0_SCR6PL</name>
120382          <description>RNG Statistical Check Run Length 6+ Limit Register</description>
120383          <alternateGroup>TRNG0</alternateGroup>
120384          <addressOffset>0x38</addressOffset>
120385          <size>32</size>
120386          <access>read-write</access>
120387          <resetValue>0x2E002F</resetValue>
120388          <resetMask>0xFFFFFFFF</resetMask>
120389          <fields>
120390            <field>
120391              <name>RUN6P_MAX</name>
120392              <description>Run Length 6+ Maximum Limit</description>
120393              <bitOffset>0</bitOffset>
120394              <bitWidth>11</bitWidth>
120395              <access>read-write</access>
120396            </field>
120397            <field>
120398              <name>RUN6P_RNG</name>
120399              <description>Run Length 6+ Range</description>
120400              <bitOffset>16</bitOffset>
120401              <bitWidth>11</bitWidth>
120402              <access>read-write</access>
120403            </field>
120404          </fields>
120405        </register>
120406        <register>
120407          <name>TRNG0_STATUS</name>
120408          <description>RNG Status Register</description>
120409          <addressOffset>0x3C</addressOffset>
120410          <size>32</size>
120411          <access>read-only</access>
120412          <resetValue>0</resetValue>
120413          <resetMask>0xFFFFFFFF</resetMask>
120414          <fields>
120415            <field>
120416              <name>TF1BR0</name>
120417              <description>Test Fail, 1-Bit Run, Sampling 0s. If TF1BR0=1, the 1-Bit Run, Sampling 0s Test has failed.</description>
120418              <bitOffset>0</bitOffset>
120419              <bitWidth>1</bitWidth>
120420              <access>read-only</access>
120421            </field>
120422            <field>
120423              <name>TF1BR1</name>
120424              <description>Test Fail, 1-Bit Run, Sampling 1s. If TF1BR1=1, the 1-Bit Run, Sampling 1s Test has failed.</description>
120425              <bitOffset>1</bitOffset>
120426              <bitWidth>1</bitWidth>
120427              <access>read-only</access>
120428            </field>
120429            <field>
120430              <name>TF2BR0</name>
120431              <description>Test Fail, 2-Bit Run, Sampling 0s. If TF2BR0=1, the 2-Bit Run, Sampling 0s Test has failed.</description>
120432              <bitOffset>2</bitOffset>
120433              <bitWidth>1</bitWidth>
120434              <access>read-only</access>
120435            </field>
120436            <field>
120437              <name>TF2BR1</name>
120438              <description>Test Fail, 2-Bit Run, Sampling 1s. If TF2BR1=1, the 2-Bit Run, Sampling 1s Test has failed.</description>
120439              <bitOffset>3</bitOffset>
120440              <bitWidth>1</bitWidth>
120441              <access>read-only</access>
120442            </field>
120443            <field>
120444              <name>TF3BR0</name>
120445              <description>Test Fail, 3-Bit Run, Sampling 0s. If TF3BR0=1, the 3-Bit Run, Sampling 0s Test has failed.</description>
120446              <bitOffset>4</bitOffset>
120447              <bitWidth>1</bitWidth>
120448              <access>read-only</access>
120449            </field>
120450            <field>
120451              <name>TF3BR1</name>
120452              <description>Test Fail, 3-Bit Run, Sampling 1s. If TF3BR1=1, the 3-Bit Run, Sampling 1s Test has failed.</description>
120453              <bitOffset>5</bitOffset>
120454              <bitWidth>1</bitWidth>
120455              <access>read-only</access>
120456            </field>
120457            <field>
120458              <name>TF4BR0</name>
120459              <description>Test Fail, 4-Bit Run, Sampling 0s. If TF4BR0=1, the 4-Bit Run, Sampling 0s Test has failed.</description>
120460              <bitOffset>6</bitOffset>
120461              <bitWidth>1</bitWidth>
120462              <access>read-only</access>
120463            </field>
120464            <field>
120465              <name>TF4BR1</name>
120466              <description>Test Fail, 4-Bit Run, Sampling 1s. If TF4BR1=1, the 4-Bit Run, Sampling 1s Test has failed.</description>
120467              <bitOffset>7</bitOffset>
120468              <bitWidth>1</bitWidth>
120469              <access>read-only</access>
120470            </field>
120471            <field>
120472              <name>TF5BR0</name>
120473              <description>Test Fail, 5-Bit Run, Sampling 0s. If TF5BR0=1, the 5-Bit Run, Sampling 0s Test has failed.</description>
120474              <bitOffset>8</bitOffset>
120475              <bitWidth>1</bitWidth>
120476              <access>read-only</access>
120477            </field>
120478            <field>
120479              <name>TF5BR1</name>
120480              <description>Test Fail, 5-Bit Run, Sampling 1s. If TF5BR1=1, the 5-Bit Run, Sampling 1s Test has failed.</description>
120481              <bitOffset>9</bitOffset>
120482              <bitWidth>1</bitWidth>
120483              <access>read-only</access>
120484            </field>
120485            <field>
120486              <name>TF6PBR0</name>
120487              <description>Test Fail, 6 Plus Bit Run, Sampling 0s</description>
120488              <bitOffset>10</bitOffset>
120489              <bitWidth>1</bitWidth>
120490              <access>read-only</access>
120491            </field>
120492            <field>
120493              <name>TF6PBR1</name>
120494              <description>Test Fail, 6 Plus Bit Run, Sampling 1s</description>
120495              <bitOffset>11</bitOffset>
120496              <bitWidth>1</bitWidth>
120497              <access>read-only</access>
120498            </field>
120499            <field>
120500              <name>TFSB</name>
120501              <description>Test Fail, Sparse Bit. If TFSB=1, the Sparse Bit Test has failed.</description>
120502              <bitOffset>12</bitOffset>
120503              <bitWidth>1</bitWidth>
120504              <access>read-only</access>
120505            </field>
120506            <field>
120507              <name>TFLR</name>
120508              <description>Test Fail, Long Run. If TFLR=1, the Long Run Test has failed.</description>
120509              <bitOffset>13</bitOffset>
120510              <bitWidth>1</bitWidth>
120511              <access>read-only</access>
120512            </field>
120513            <field>
120514              <name>TFP</name>
120515              <description>Test Fail, Poker. If TFP=1, the Poker Test has failed.</description>
120516              <bitOffset>14</bitOffset>
120517              <bitWidth>1</bitWidth>
120518              <access>read-only</access>
120519            </field>
120520            <field>
120521              <name>TFMB</name>
120522              <description>Test Fail, Mono Bit. If TFMB=1, the Mono Bit Test has failed.</description>
120523              <bitOffset>15</bitOffset>
120524              <bitWidth>1</bitWidth>
120525              <access>read-only</access>
120526            </field>
120527            <field>
120528              <name>RETRY_CT</name>
120529              <description>RETRY COUNT</description>
120530              <bitOffset>16</bitOffset>
120531              <bitWidth>4</bitWidth>
120532              <access>read-only</access>
120533            </field>
120534          </fields>
120535        </register>
120536        <register>
120537          <name>TRNG0_ENT0</name>
120538          <description>RNG TRNG Entropy Read Register</description>
120539          <addressOffset>0x40</addressOffset>
120540          <size>32</size>
120541          <access>read-only</access>
120542          <resetValue>0</resetValue>
120543          <resetMask>0xFFFFFFFF</resetMask>
120544          <fields>
120545            <field>
120546              <name>ENT</name>
120547              <description>Entropy Value</description>
120548              <bitOffset>0</bitOffset>
120549              <bitWidth>32</bitWidth>
120550              <access>read-only</access>
120551            </field>
120552          </fields>
120553        </register>
120554        <register>
120555          <name>TRNG0_ENT1</name>
120556          <description>RNG TRNG Entropy Read Register</description>
120557          <addressOffset>0x44</addressOffset>
120558          <size>32</size>
120559          <access>read-only</access>
120560          <resetValue>0</resetValue>
120561          <resetMask>0xFFFFFFFF</resetMask>
120562          <fields>
120563            <field>
120564              <name>ENT</name>
120565              <description>Entropy Value</description>
120566              <bitOffset>0</bitOffset>
120567              <bitWidth>32</bitWidth>
120568              <access>read-only</access>
120569            </field>
120570          </fields>
120571        </register>
120572        <register>
120573          <name>TRNG0_ENT2</name>
120574          <description>RNG TRNG Entropy Read Register</description>
120575          <addressOffset>0x48</addressOffset>
120576          <size>32</size>
120577          <access>read-only</access>
120578          <resetValue>0</resetValue>
120579          <resetMask>0xFFFFFFFF</resetMask>
120580          <fields>
120581            <field>
120582              <name>ENT</name>
120583              <description>Entropy Value</description>
120584              <bitOffset>0</bitOffset>
120585              <bitWidth>32</bitWidth>
120586              <access>read-only</access>
120587            </field>
120588          </fields>
120589        </register>
120590        <register>
120591          <name>TRNG0_ENT3</name>
120592          <description>RNG TRNG Entropy Read Register</description>
120593          <addressOffset>0x4C</addressOffset>
120594          <size>32</size>
120595          <access>read-only</access>
120596          <resetValue>0</resetValue>
120597          <resetMask>0xFFFFFFFF</resetMask>
120598          <fields>
120599            <field>
120600              <name>ENT</name>
120601              <description>Entropy Value</description>
120602              <bitOffset>0</bitOffset>
120603              <bitWidth>32</bitWidth>
120604              <access>read-only</access>
120605            </field>
120606          </fields>
120607        </register>
120608        <register>
120609          <name>TRNG0_ENT4</name>
120610          <description>RNG TRNG Entropy Read Register</description>
120611          <addressOffset>0x50</addressOffset>
120612          <size>32</size>
120613          <access>read-only</access>
120614          <resetValue>0</resetValue>
120615          <resetMask>0xFFFFFFFF</resetMask>
120616          <fields>
120617            <field>
120618              <name>ENT</name>
120619              <description>Entropy Value</description>
120620              <bitOffset>0</bitOffset>
120621              <bitWidth>32</bitWidth>
120622              <access>read-only</access>
120623            </field>
120624          </fields>
120625        </register>
120626        <register>
120627          <name>TRNG0_ENT5</name>
120628          <description>RNG TRNG Entropy Read Register</description>
120629          <addressOffset>0x54</addressOffset>
120630          <size>32</size>
120631          <access>read-only</access>
120632          <resetValue>0</resetValue>
120633          <resetMask>0xFFFFFFFF</resetMask>
120634          <fields>
120635            <field>
120636              <name>ENT</name>
120637              <description>Entropy Value</description>
120638              <bitOffset>0</bitOffset>
120639              <bitWidth>32</bitWidth>
120640              <access>read-only</access>
120641            </field>
120642          </fields>
120643        </register>
120644        <register>
120645          <name>TRNG0_ENT6</name>
120646          <description>RNG TRNG Entropy Read Register</description>
120647          <addressOffset>0x58</addressOffset>
120648          <size>32</size>
120649          <access>read-only</access>
120650          <resetValue>0</resetValue>
120651          <resetMask>0xFFFFFFFF</resetMask>
120652          <fields>
120653            <field>
120654              <name>ENT</name>
120655              <description>Entropy Value</description>
120656              <bitOffset>0</bitOffset>
120657              <bitWidth>32</bitWidth>
120658              <access>read-only</access>
120659            </field>
120660          </fields>
120661        </register>
120662        <register>
120663          <name>TRNG0_ENT7</name>
120664          <description>RNG TRNG Entropy Read Register</description>
120665          <addressOffset>0x5C</addressOffset>
120666          <size>32</size>
120667          <access>read-only</access>
120668          <resetValue>0</resetValue>
120669          <resetMask>0xFFFFFFFF</resetMask>
120670          <fields>
120671            <field>
120672              <name>ENT</name>
120673              <description>Entropy Value</description>
120674              <bitOffset>0</bitOffset>
120675              <bitWidth>32</bitWidth>
120676              <access>read-only</access>
120677            </field>
120678          </fields>
120679        </register>
120680        <register>
120681          <name>TRNG0_ENT8</name>
120682          <description>RNG TRNG Entropy Read Register</description>
120683          <addressOffset>0x60</addressOffset>
120684          <size>32</size>
120685          <access>read-only</access>
120686          <resetValue>0</resetValue>
120687          <resetMask>0xFFFFFFFF</resetMask>
120688          <fields>
120689            <field>
120690              <name>ENT</name>
120691              <description>Entropy Value</description>
120692              <bitOffset>0</bitOffset>
120693              <bitWidth>32</bitWidth>
120694              <access>read-only</access>
120695            </field>
120696          </fields>
120697        </register>
120698        <register>
120699          <name>TRNG0_ENT9</name>
120700          <description>RNG TRNG Entropy Read Register</description>
120701          <addressOffset>0x64</addressOffset>
120702          <size>32</size>
120703          <access>read-only</access>
120704          <resetValue>0</resetValue>
120705          <resetMask>0xFFFFFFFF</resetMask>
120706          <fields>
120707            <field>
120708              <name>ENT</name>
120709              <description>Entropy Value</description>
120710              <bitOffset>0</bitOffset>
120711              <bitWidth>32</bitWidth>
120712              <access>read-only</access>
120713            </field>
120714          </fields>
120715        </register>
120716        <register>
120717          <name>TRNG0_ENT10</name>
120718          <description>RNG TRNG Entropy Read Register</description>
120719          <addressOffset>0x68</addressOffset>
120720          <size>32</size>
120721          <access>read-only</access>
120722          <resetValue>0</resetValue>
120723          <resetMask>0xFFFFFFFF</resetMask>
120724          <fields>
120725            <field>
120726              <name>ENT</name>
120727              <description>Entropy Value</description>
120728              <bitOffset>0</bitOffset>
120729              <bitWidth>32</bitWidth>
120730              <access>read-only</access>
120731            </field>
120732          </fields>
120733        </register>
120734        <register>
120735          <name>TRNG0_ENT11</name>
120736          <description>RNG TRNG Entropy Read Register</description>
120737          <addressOffset>0x6C</addressOffset>
120738          <size>32</size>
120739          <access>read-only</access>
120740          <resetValue>0</resetValue>
120741          <resetMask>0xFFFFFFFF</resetMask>
120742          <fields>
120743            <field>
120744              <name>ENT</name>
120745              <description>Entropy Value</description>
120746              <bitOffset>0</bitOffset>
120747              <bitWidth>32</bitWidth>
120748              <access>read-only</access>
120749            </field>
120750          </fields>
120751        </register>
120752        <register>
120753          <name>TRNG0_ENT12</name>
120754          <description>RNG TRNG Entropy Read Register</description>
120755          <addressOffset>0x70</addressOffset>
120756          <size>32</size>
120757          <access>read-only</access>
120758          <resetValue>0</resetValue>
120759          <resetMask>0xFFFFFFFF</resetMask>
120760          <fields>
120761            <field>
120762              <name>ENT</name>
120763              <description>Entropy Value</description>
120764              <bitOffset>0</bitOffset>
120765              <bitWidth>32</bitWidth>
120766              <access>read-only</access>
120767            </field>
120768          </fields>
120769        </register>
120770        <register>
120771          <name>TRNG0_ENT13</name>
120772          <description>RNG TRNG Entropy Read Register</description>
120773          <addressOffset>0x74</addressOffset>
120774          <size>32</size>
120775          <access>read-only</access>
120776          <resetValue>0</resetValue>
120777          <resetMask>0xFFFFFFFF</resetMask>
120778          <fields>
120779            <field>
120780              <name>ENT</name>
120781              <description>Entropy Value</description>
120782              <bitOffset>0</bitOffset>
120783              <bitWidth>32</bitWidth>
120784              <access>read-only</access>
120785            </field>
120786          </fields>
120787        </register>
120788        <register>
120789          <name>TRNG0_ENT14</name>
120790          <description>RNG TRNG Entropy Read Register</description>
120791          <addressOffset>0x78</addressOffset>
120792          <size>32</size>
120793          <access>read-only</access>
120794          <resetValue>0</resetValue>
120795          <resetMask>0xFFFFFFFF</resetMask>
120796          <fields>
120797            <field>
120798              <name>ENT</name>
120799              <description>Entropy Value</description>
120800              <bitOffset>0</bitOffset>
120801              <bitWidth>32</bitWidth>
120802              <access>read-only</access>
120803            </field>
120804          </fields>
120805        </register>
120806        <register>
120807          <name>TRNG0_ENT15</name>
120808          <description>RNG TRNG Entropy Read Register</description>
120809          <addressOffset>0x7C</addressOffset>
120810          <size>32</size>
120811          <access>read-only</access>
120812          <resetValue>0</resetValue>
120813          <resetMask>0xFFFFFFFF</resetMask>
120814          <fields>
120815            <field>
120816              <name>ENT</name>
120817              <description>Entropy Value</description>
120818              <bitOffset>0</bitOffset>
120819              <bitWidth>32</bitWidth>
120820              <access>read-only</access>
120821            </field>
120822          </fields>
120823        </register>
120824        <register>
120825          <name>TRNG0_PKRCNT10</name>
120826          <description>RNG Statistical Check Poker Count 1 and 0 Register</description>
120827          <addressOffset>0x80</addressOffset>
120828          <size>32</size>
120829          <access>read-only</access>
120830          <resetValue>0</resetValue>
120831          <resetMask>0xFFFFFFFF</resetMask>
120832          <fields>
120833            <field>
120834              <name>PKR_0_CT</name>
120835              <description>Poker 0h Count</description>
120836              <bitOffset>0</bitOffset>
120837              <bitWidth>16</bitWidth>
120838              <access>read-only</access>
120839            </field>
120840            <field>
120841              <name>PKR_1_CT</name>
120842              <description>Poker 1h Count</description>
120843              <bitOffset>16</bitOffset>
120844              <bitWidth>16</bitWidth>
120845              <access>read-only</access>
120846            </field>
120847          </fields>
120848        </register>
120849        <register>
120850          <name>TRNG0_PKRCNT32</name>
120851          <description>RNG Statistical Check Poker Count 3 and 2 Register</description>
120852          <addressOffset>0x84</addressOffset>
120853          <size>32</size>
120854          <access>read-only</access>
120855          <resetValue>0</resetValue>
120856          <resetMask>0xFFFFFFFF</resetMask>
120857          <fields>
120858            <field>
120859              <name>PKR_2_CT</name>
120860              <description>Poker 2h Count</description>
120861              <bitOffset>0</bitOffset>
120862              <bitWidth>16</bitWidth>
120863              <access>read-only</access>
120864            </field>
120865            <field>
120866              <name>PKR_3_CT</name>
120867              <description>Poker 3h Count</description>
120868              <bitOffset>16</bitOffset>
120869              <bitWidth>16</bitWidth>
120870              <access>read-only</access>
120871            </field>
120872          </fields>
120873        </register>
120874        <register>
120875          <name>TRNG0_PKRCNT54</name>
120876          <description>RNG Statistical Check Poker Count 5 and 4 Register</description>
120877          <addressOffset>0x88</addressOffset>
120878          <size>32</size>
120879          <access>read-only</access>
120880          <resetValue>0</resetValue>
120881          <resetMask>0xFFFFFFFF</resetMask>
120882          <fields>
120883            <field>
120884              <name>PKR_4_CT</name>
120885              <description>Poker 4h Count</description>
120886              <bitOffset>0</bitOffset>
120887              <bitWidth>16</bitWidth>
120888              <access>read-only</access>
120889            </field>
120890            <field>
120891              <name>PKR_5_CT</name>
120892              <description>Poker 5h Count</description>
120893              <bitOffset>16</bitOffset>
120894              <bitWidth>16</bitWidth>
120895              <access>read-only</access>
120896            </field>
120897          </fields>
120898        </register>
120899        <register>
120900          <name>TRNG0_PKRCNT76</name>
120901          <description>RNG Statistical Check Poker Count 7 and 6 Register</description>
120902          <addressOffset>0x8C</addressOffset>
120903          <size>32</size>
120904          <access>read-only</access>
120905          <resetValue>0</resetValue>
120906          <resetMask>0xFFFFFFFF</resetMask>
120907          <fields>
120908            <field>
120909              <name>PKR_6_CT</name>
120910              <description>Poker 6h Count</description>
120911              <bitOffset>0</bitOffset>
120912              <bitWidth>16</bitWidth>
120913              <access>read-only</access>
120914            </field>
120915            <field>
120916              <name>PKR_7_CT</name>
120917              <description>Poker 7h Count</description>
120918              <bitOffset>16</bitOffset>
120919              <bitWidth>16</bitWidth>
120920              <access>read-only</access>
120921            </field>
120922          </fields>
120923        </register>
120924        <register>
120925          <name>TRNG0_PKRCNT98</name>
120926          <description>RNG Statistical Check Poker Count 9 and 8 Register</description>
120927          <addressOffset>0x90</addressOffset>
120928          <size>32</size>
120929          <access>read-only</access>
120930          <resetValue>0</resetValue>
120931          <resetMask>0xFFFFFFFF</resetMask>
120932          <fields>
120933            <field>
120934              <name>PKR_8_CT</name>
120935              <description>Poker 8h Count</description>
120936              <bitOffset>0</bitOffset>
120937              <bitWidth>16</bitWidth>
120938              <access>read-only</access>
120939            </field>
120940            <field>
120941              <name>PKR_9_CT</name>
120942              <description>Poker 9h Count</description>
120943              <bitOffset>16</bitOffset>
120944              <bitWidth>16</bitWidth>
120945              <access>read-only</access>
120946            </field>
120947          </fields>
120948        </register>
120949        <register>
120950          <name>TRNG0_PKRCNTBA</name>
120951          <description>RNG Statistical Check Poker Count B and A Register</description>
120952          <addressOffset>0x94</addressOffset>
120953          <size>32</size>
120954          <access>read-only</access>
120955          <resetValue>0</resetValue>
120956          <resetMask>0xFFFFFFFF</resetMask>
120957          <fields>
120958            <field>
120959              <name>PKR_A_CT</name>
120960              <description>Poker Ah Count</description>
120961              <bitOffset>0</bitOffset>
120962              <bitWidth>16</bitWidth>
120963              <access>read-only</access>
120964            </field>
120965            <field>
120966              <name>PKR_B_CT</name>
120967              <description>Poker Bh Count</description>
120968              <bitOffset>16</bitOffset>
120969              <bitWidth>16</bitWidth>
120970              <access>read-only</access>
120971            </field>
120972          </fields>
120973        </register>
120974        <register>
120975          <name>TRNG0_PKRCNTDC</name>
120976          <description>RNG Statistical Check Poker Count D and C Register</description>
120977          <addressOffset>0x98</addressOffset>
120978          <size>32</size>
120979          <access>read-only</access>
120980          <resetValue>0</resetValue>
120981          <resetMask>0xFFFFFFFF</resetMask>
120982          <fields>
120983            <field>
120984              <name>PKR_C_CT</name>
120985              <description>Poker Ch Count</description>
120986              <bitOffset>0</bitOffset>
120987              <bitWidth>16</bitWidth>
120988              <access>read-only</access>
120989            </field>
120990            <field>
120991              <name>PKR_D_CT</name>
120992              <description>Poker Dh Count</description>
120993              <bitOffset>16</bitOffset>
120994              <bitWidth>16</bitWidth>
120995              <access>read-only</access>
120996            </field>
120997          </fields>
120998        </register>
120999        <register>
121000          <name>TRNG0_PKRCNTFE</name>
121001          <description>RNG Statistical Check Poker Count F and E Register</description>
121002          <addressOffset>0x9C</addressOffset>
121003          <size>32</size>
121004          <access>read-only</access>
121005          <resetValue>0</resetValue>
121006          <resetMask>0xFFFFFFFF</resetMask>
121007          <fields>
121008            <field>
121009              <name>PKR_E_CT</name>
121010              <description>Poker Eh Count</description>
121011              <bitOffset>0</bitOffset>
121012              <bitWidth>16</bitWidth>
121013              <access>read-only</access>
121014            </field>
121015            <field>
121016              <name>PKR_F_CT</name>
121017              <description>Poker Fh Count</description>
121018              <bitOffset>16</bitOffset>
121019              <bitWidth>16</bitWidth>
121020              <access>read-only</access>
121021            </field>
121022          </fields>
121023        </register>
121024        <register>
121025          <name>TRNG0_SEC_CFG</name>
121026          <description>RNG Security Configuration Register</description>
121027          <addressOffset>0xB0</addressOffset>
121028          <size>32</size>
121029          <access>read-write</access>
121030          <resetValue>0</resetValue>
121031          <resetMask>0xFFFFFFFF</resetMask>
121032          <fields>
121033            <field>
121034              <name>SH0</name>
121035              <description>Reserved. DRNG specific, not applicable to this version.</description>
121036              <bitOffset>0</bitOffset>
121037              <bitWidth>1</bitWidth>
121038              <access>read-write</access>
121039              <enumeratedValues>
121040                <enumeratedValue>
121041                  <name>0</name>
121042                  <description>See DRNG version.</description>
121043                  <value>#0</value>
121044                </enumeratedValue>
121045                <enumeratedValue>
121046                  <name>1</name>
121047                  <description>See DRNG version.</description>
121048                  <value>#1</value>
121049                </enumeratedValue>
121050              </enumeratedValues>
121051            </field>
121052            <field>
121053              <name>NO_PRGM</name>
121054              <description>If set the TRNG registers cannot be programmed</description>
121055              <bitOffset>1</bitOffset>
121056              <bitWidth>1</bitWidth>
121057              <access>read-write</access>
121058              <enumeratedValues>
121059                <enumeratedValue>
121060                  <name>0</name>
121061                  <description>Programability of registers controlled only by the RNG Miscellaneous Control Register&apos;s access mode bit.</description>
121062                  <value>#0</value>
121063                </enumeratedValue>
121064                <enumeratedValue>
121065                  <name>1</name>
121066                  <description>Overides RNG Miscellaneous Control Register access mode and prevents TRNG register programming.</description>
121067                  <value>#1</value>
121068                </enumeratedValue>
121069              </enumeratedValues>
121070            </field>
121071            <field>
121072              <name>SK_VAL</name>
121073              <description>Reserved. DRNG-specific, not applicable to this version.</description>
121074              <bitOffset>2</bitOffset>
121075              <bitWidth>1</bitWidth>
121076              <access>read-write</access>
121077              <enumeratedValues>
121078                <enumeratedValue>
121079                  <name>0</name>
121080                  <description>See DRNG version.</description>
121081                  <value>#0</value>
121082                </enumeratedValue>
121083                <enumeratedValue>
121084                  <name>1</name>
121085                  <description>See DRNG version.</description>
121086                  <value>#1</value>
121087                </enumeratedValue>
121088              </enumeratedValues>
121089            </field>
121090          </fields>
121091        </register>
121092        <register>
121093          <name>TRNG0_INT_CTRL</name>
121094          <description>RNG Interrupt Control Register</description>
121095          <addressOffset>0xB4</addressOffset>
121096          <size>32</size>
121097          <access>read-write</access>
121098          <resetValue>0xFFFFFFFF</resetValue>
121099          <resetMask>0xFFFFFFFF</resetMask>
121100          <fields>
121101            <field>
121102              <name>HW_ERR</name>
121103              <description>Bit position that can be cleared if corresponding bit of INT_STATUS has been asserted.</description>
121104              <bitOffset>0</bitOffset>
121105              <bitWidth>1</bitWidth>
121106              <access>read-write</access>
121107              <enumeratedValues>
121108                <enumeratedValue>
121109                  <name>0</name>
121110                  <description>Corresponding bit of INT_STATUS cleared.</description>
121111                  <value>#0</value>
121112                </enumeratedValue>
121113                <enumeratedValue>
121114                  <name>1</name>
121115                  <description>Corresponding bit of INT_STATUS active.</description>
121116                  <value>#1</value>
121117                </enumeratedValue>
121118              </enumeratedValues>
121119            </field>
121120            <field>
121121              <name>ENT_VAL</name>
121122              <description>Same behavior as bit 0 above.</description>
121123              <bitOffset>1</bitOffset>
121124              <bitWidth>1</bitWidth>
121125              <access>read-write</access>
121126              <enumeratedValues>
121127                <enumeratedValue>
121128                  <name>0</name>
121129                  <description>Same behavior as bit 0 above.</description>
121130                  <value>#0</value>
121131                </enumeratedValue>
121132                <enumeratedValue>
121133                  <name>1</name>
121134                  <description>Same behavior as bit 0 above.</description>
121135                  <value>#1</value>
121136                </enumeratedValue>
121137              </enumeratedValues>
121138            </field>
121139            <field>
121140              <name>FRQ_CT_FAIL</name>
121141              <description>Same behavior as bit 0 above.</description>
121142              <bitOffset>2</bitOffset>
121143              <bitWidth>1</bitWidth>
121144              <access>read-write</access>
121145              <enumeratedValues>
121146                <enumeratedValue>
121147                  <name>0</name>
121148                  <description>Same behavior as bit 0 above.</description>
121149                  <value>#0</value>
121150                </enumeratedValue>
121151                <enumeratedValue>
121152                  <name>1</name>
121153                  <description>Same behavior as bit 0 above.</description>
121154                  <value>#1</value>
121155                </enumeratedValue>
121156              </enumeratedValues>
121157            </field>
121158            <field>
121159              <name>UNUSED</name>
121160              <description>Reserved but writeable.</description>
121161              <bitOffset>3</bitOffset>
121162              <bitWidth>29</bitWidth>
121163              <access>read-write</access>
121164            </field>
121165          </fields>
121166        </register>
121167        <register>
121168          <name>TRNG0_INT_MASK</name>
121169          <description>RNG Mask Register</description>
121170          <addressOffset>0xB8</addressOffset>
121171          <size>32</size>
121172          <access>read-write</access>
121173          <resetValue>0</resetValue>
121174          <resetMask>0xFFFFFFFF</resetMask>
121175          <fields>
121176            <field>
121177              <name>HW_ERR</name>
121178              <description>Bit position that can be cleared if corresponding bit of INT_STATUS has been asserted.</description>
121179              <bitOffset>0</bitOffset>
121180              <bitWidth>1</bitWidth>
121181              <access>read-write</access>
121182              <enumeratedValues>
121183                <enumeratedValue>
121184                  <name>0</name>
121185                  <description>Corresponding interrupt of INT_STATUS is masked.</description>
121186                  <value>#0</value>
121187                </enumeratedValue>
121188                <enumeratedValue>
121189                  <name>1</name>
121190                  <description>Corresponding bit of INT_STATUS is active.</description>
121191                  <value>#1</value>
121192                </enumeratedValue>
121193              </enumeratedValues>
121194            </field>
121195            <field>
121196              <name>ENT_VAL</name>
121197              <description>Same behavior as bit 0 above.</description>
121198              <bitOffset>1</bitOffset>
121199              <bitWidth>1</bitWidth>
121200              <access>read-write</access>
121201              <enumeratedValues>
121202                <enumeratedValue>
121203                  <name>0</name>
121204                  <description>Same behavior as bit 0 above.</description>
121205                  <value>#0</value>
121206                </enumeratedValue>
121207                <enumeratedValue>
121208                  <name>1</name>
121209                  <description>Same behavior as bit 0 above.</description>
121210                  <value>#1</value>
121211                </enumeratedValue>
121212              </enumeratedValues>
121213            </field>
121214            <field>
121215              <name>FRQ_CT_FAIL</name>
121216              <description>Same behavior as bit 0 above.</description>
121217              <bitOffset>2</bitOffset>
121218              <bitWidth>1</bitWidth>
121219              <access>read-write</access>
121220              <enumeratedValues>
121221                <enumeratedValue>
121222                  <name>0</name>
121223                  <description>Same behavior as bit 0 above.</description>
121224                  <value>#0</value>
121225                </enumeratedValue>
121226                <enumeratedValue>
121227                  <name>1</name>
121228                  <description>Same behavior as bit 0 above.</description>
121229                  <value>#1</value>
121230                </enumeratedValue>
121231              </enumeratedValues>
121232            </field>
121233          </fields>
121234        </register>
121235        <register>
121236          <name>TRNG0_INT_STATUS</name>
121237          <description>RNG Interrupt Status Register</description>
121238          <addressOffset>0xBC</addressOffset>
121239          <size>32</size>
121240          <access>read-write</access>
121241          <resetValue>0</resetValue>
121242          <resetMask>0xFFFFFFFF</resetMask>
121243          <fields>
121244            <field>
121245              <name>HW_ERR</name>
121246              <description>Read: Error status</description>
121247              <bitOffset>0</bitOffset>
121248              <bitWidth>1</bitWidth>
121249              <access>read-only</access>
121250              <enumeratedValues>
121251                <enumeratedValue>
121252                  <name>0</name>
121253                  <description>no error</description>
121254                  <value>#0</value>
121255                </enumeratedValue>
121256                <enumeratedValue>
121257                  <name>1</name>
121258                  <description>error detected.</description>
121259                  <value>#1</value>
121260                </enumeratedValue>
121261              </enumeratedValues>
121262            </field>
121263            <field>
121264              <name>ENT_VAL</name>
121265              <description>Read only: Entropy Valid</description>
121266              <bitOffset>1</bitOffset>
121267              <bitWidth>1</bitWidth>
121268              <access>read-only</access>
121269              <enumeratedValues>
121270                <enumeratedValue>
121271                  <name>0</name>
121272                  <description>Busy generation entropy. Any value read is invalid.</description>
121273                  <value>#0</value>
121274                </enumeratedValue>
121275                <enumeratedValue>
121276                  <name>1</name>
121277                  <description>TRNG can be stopped and entropy is valid if read.</description>
121278                  <value>#1</value>
121279                </enumeratedValue>
121280              </enumeratedValues>
121281            </field>
121282            <field>
121283              <name>FRQ_CT_FAIL</name>
121284              <description>Read only: Frequency Count Fail</description>
121285              <bitOffset>2</bitOffset>
121286              <bitWidth>1</bitWidth>
121287              <access>read-write</access>
121288              <enumeratedValues>
121289                <enumeratedValue>
121290                  <name>0</name>
121291                  <description>No hardware nor self test frequency errors.</description>
121292                  <value>#0</value>
121293                </enumeratedValue>
121294                <enumeratedValue>
121295                  <name>1</name>
121296                  <description>The frequency counter has detected a failure.</description>
121297                  <value>#1</value>
121298                </enumeratedValue>
121299              </enumeratedValues>
121300            </field>
121301          </fields>
121302        </register>
121303        <register>
121304          <name>TRNG0_VID1</name>
121305          <description>RNG Version ID Register (MS)</description>
121306          <addressOffset>0xF0</addressOffset>
121307          <size>32</size>
121308          <access>read-only</access>
121309          <resetValue>0x300100</resetValue>
121310          <resetMask>0xFFFFFFFF</resetMask>
121311          <fields>
121312            <field>
121313              <name>RNG_MIN_REV</name>
121314              <description>Shows the Freescale IP&apos;s Minor revision of the TRNG.</description>
121315              <bitOffset>0</bitOffset>
121316              <bitWidth>8</bitWidth>
121317              <access>read-only</access>
121318              <enumeratedValues>
121319                <enumeratedValue>
121320                  <name>0x00</name>
121321                  <description>Minor revision number for TRNG.</description>
121322                  <value>#0</value>
121323                </enumeratedValue>
121324              </enumeratedValues>
121325            </field>
121326            <field>
121327              <name>RNG_MAJ_REV</name>
121328              <description>Shows the Freescale IP&apos;s Major revision of the TRNG.</description>
121329              <bitOffset>8</bitOffset>
121330              <bitWidth>8</bitWidth>
121331              <access>read-only</access>
121332              <enumeratedValues>
121333                <enumeratedValue>
121334                  <name>0x01</name>
121335                  <description>Major revision number for TRNG.</description>
121336                  <value>#1</value>
121337                </enumeratedValue>
121338              </enumeratedValues>
121339            </field>
121340            <field>
121341              <name>RNG_IP_ID</name>
121342              <description>Shows the Freescale IP ID.</description>
121343              <bitOffset>16</bitOffset>
121344              <bitWidth>16</bitWidth>
121345              <access>read-only</access>
121346            </field>
121347          </fields>
121348        </register>
121349        <register>
121350          <name>TRNG0_VID2</name>
121351          <description>RNG Version ID Register (LS)</description>
121352          <addressOffset>0xF4</addressOffset>
121353          <size>32</size>
121354          <access>read-only</access>
121355          <resetValue>0</resetValue>
121356          <resetMask>0xFFFFFFFF</resetMask>
121357          <fields>
121358            <field>
121359              <name>RNG_CONFIG_OPT</name>
121360              <description>Shows the Freescale IP&apos;s Configuaration options for the TRNG.</description>
121361              <bitOffset>0</bitOffset>
121362              <bitWidth>8</bitWidth>
121363              <access>read-only</access>
121364              <enumeratedValues>
121365                <enumeratedValue>
121366                  <name>0x00</name>
121367                  <description>TRNG_CONFIG_OPT for TRNG.</description>
121368                  <value>#0</value>
121369                </enumeratedValue>
121370              </enumeratedValues>
121371            </field>
121372            <field>
121373              <name>RNG_ECO_REV</name>
121374              <description>Shows the Freescale IP&apos;s ECO revision of the TRNG.</description>
121375              <bitOffset>8</bitOffset>
121376              <bitWidth>8</bitWidth>
121377              <access>read-only</access>
121378              <enumeratedValues>
121379                <enumeratedValue>
121380                  <name>0x00</name>
121381                  <description>TRNG_ECO_REV for TRNG.</description>
121382                  <value>#0</value>
121383                </enumeratedValue>
121384              </enumeratedValues>
121385            </field>
121386            <field>
121387              <name>RNG_INTG_OPT</name>
121388              <description>Shows the Freescale integration options for the TRNG.</description>
121389              <bitOffset>16</bitOffset>
121390              <bitWidth>8</bitWidth>
121391              <access>read-only</access>
121392              <enumeratedValues>
121393                <enumeratedValue>
121394                  <name>0x00</name>
121395                  <description>INTG_OPT for TRNG.</description>
121396                  <value>#0</value>
121397                </enumeratedValue>
121398              </enumeratedValues>
121399            </field>
121400            <field>
121401              <name>RNG_ERA</name>
121402              <description>Shows the Freescale compile options for the TRNG.</description>
121403              <bitOffset>24</bitOffset>
121404              <bitWidth>8</bitWidth>
121405              <access>read-only</access>
121406              <enumeratedValues>
121407                <enumeratedValue>
121408                  <name>0x00</name>
121409                  <description>COMPILE_OPT for TRNG.</description>
121410                  <value>#0</value>
121411                </enumeratedValue>
121412              </enumeratedValues>
121413            </field>
121414          </fields>
121415        </register>
121416      </registers>
121417    </peripheral>
121418    <peripheral>
121419      <name>SDHC</name>
121420      <description>Secured Digital Host Controller</description>
121421      <prependToName>SDHC_</prependToName>
121422      <baseAddress>0x400B1000</baseAddress>
121423      <addressBlock>
121424        <offset>0</offset>
121425        <size>0x100</size>
121426        <usage>registers</usage>
121427      </addressBlock>
121428      <interrupt>
121429        <name>SDHC</name>
121430        <value>81</value>
121431      </interrupt>
121432      <registers>
121433        <register>
121434          <name>DSADDR</name>
121435          <description>DMA System Address register</description>
121436          <addressOffset>0</addressOffset>
121437          <size>32</size>
121438          <access>read-write</access>
121439          <resetValue>0</resetValue>
121440          <resetMask>0xFFFFFFFF</resetMask>
121441          <fields>
121442            <field>
121443              <name>DSADDR</name>
121444              <description>DMA System Address</description>
121445              <bitOffset>2</bitOffset>
121446              <bitWidth>30</bitWidth>
121447              <access>read-write</access>
121448            </field>
121449          </fields>
121450        </register>
121451        <register>
121452          <name>BLKATTR</name>
121453          <description>Block Attributes register</description>
121454          <addressOffset>0x4</addressOffset>
121455          <size>32</size>
121456          <access>read-write</access>
121457          <resetValue>0</resetValue>
121458          <resetMask>0xFFFFFFFF</resetMask>
121459          <fields>
121460            <field>
121461              <name>BLKSIZE</name>
121462              <description>Transfer Block Size</description>
121463              <bitOffset>0</bitOffset>
121464              <bitWidth>13</bitWidth>
121465              <access>read-write</access>
121466              <enumeratedValues>
121467                <enumeratedValue>
121468                  <name>0</name>
121469                  <description>No data transfer.</description>
121470                  <value>#0</value>
121471                </enumeratedValue>
121472                <enumeratedValue>
121473                  <name>1</name>
121474                  <description>1 Byte</description>
121475                  <value>#1</value>
121476                </enumeratedValue>
121477                <enumeratedValue>
121478                  <name>10</name>
121479                  <description>2 Bytes</description>
121480                  <value>#10</value>
121481                </enumeratedValue>
121482                <enumeratedValue>
121483                  <name>11</name>
121484                  <description>3 Bytes</description>
121485                  <value>#11</value>
121486                </enumeratedValue>
121487                <enumeratedValue>
121488                  <name>100</name>
121489                  <description>4 Bytes</description>
121490                  <value>#100</value>
121491                </enumeratedValue>
121492                <enumeratedValue>
121493                  <name>111111111</name>
121494                  <description>511 Bytes</description>
121495                  <value>#111111111</value>
121496                </enumeratedValue>
121497                <enumeratedValue>
121498                  <name>1000000000</name>
121499                  <description>512 Bytes</description>
121500                  <value>#1000000000</value>
121501                </enumeratedValue>
121502                <enumeratedValue>
121503                  <name>100000000000</name>
121504                  <description>2048 Bytes</description>
121505                  <value>#100000000000</value>
121506                </enumeratedValue>
121507                <enumeratedValue>
121508                  <name>1000000000000</name>
121509                  <description>4096 Bytes</description>
121510                  <value>#1000000000000</value>
121511                </enumeratedValue>
121512              </enumeratedValues>
121513            </field>
121514            <field>
121515              <name>BLKCNT</name>
121516              <description>Blocks Count For Current Transfer</description>
121517              <bitOffset>16</bitOffset>
121518              <bitWidth>16</bitWidth>
121519              <access>read-write</access>
121520              <enumeratedValues>
121521                <enumeratedValue>
121522                  <name>0</name>
121523                  <description>Stop count.</description>
121524                  <value>#0</value>
121525                </enumeratedValue>
121526                <enumeratedValue>
121527                  <name>1</name>
121528                  <description>1 block</description>
121529                  <value>#1</value>
121530                </enumeratedValue>
121531                <enumeratedValue>
121532                  <name>10</name>
121533                  <description>2 blocks</description>
121534                  <value>#10</value>
121535                </enumeratedValue>
121536                <enumeratedValue>
121537                  <name>1111111111111111</name>
121538                  <description>65535 blocks</description>
121539                  <value>#1111111111111111</value>
121540                </enumeratedValue>
121541              </enumeratedValues>
121542            </field>
121543          </fields>
121544        </register>
121545        <register>
121546          <name>CMDARG</name>
121547          <description>Command Argument register</description>
121548          <addressOffset>0x8</addressOffset>
121549          <size>32</size>
121550          <access>read-write</access>
121551          <resetValue>0</resetValue>
121552          <resetMask>0xFFFFFFFF</resetMask>
121553          <fields>
121554            <field>
121555              <name>CMDARG</name>
121556              <description>Command Argument</description>
121557              <bitOffset>0</bitOffset>
121558              <bitWidth>32</bitWidth>
121559              <access>read-write</access>
121560            </field>
121561          </fields>
121562        </register>
121563        <register>
121564          <name>XFERTYP</name>
121565          <description>Transfer Type register</description>
121566          <addressOffset>0xC</addressOffset>
121567          <size>32</size>
121568          <access>read-write</access>
121569          <resetValue>0</resetValue>
121570          <resetMask>0xFFFFFFFF</resetMask>
121571          <fields>
121572            <field>
121573              <name>DMAEN</name>
121574              <description>DMA Enable</description>
121575              <bitOffset>0</bitOffset>
121576              <bitWidth>1</bitWidth>
121577              <access>read-write</access>
121578              <enumeratedValues>
121579                <enumeratedValue>
121580                  <name>0</name>
121581                  <description>Disable</description>
121582                  <value>#0</value>
121583                </enumeratedValue>
121584                <enumeratedValue>
121585                  <name>1</name>
121586                  <description>Enable</description>
121587                  <value>#1</value>
121588                </enumeratedValue>
121589              </enumeratedValues>
121590            </field>
121591            <field>
121592              <name>BCEN</name>
121593              <description>Block Count Enable</description>
121594              <bitOffset>1</bitOffset>
121595              <bitWidth>1</bitWidth>
121596              <access>read-write</access>
121597              <enumeratedValues>
121598                <enumeratedValue>
121599                  <name>0</name>
121600                  <description>Disable</description>
121601                  <value>#0</value>
121602                </enumeratedValue>
121603                <enumeratedValue>
121604                  <name>1</name>
121605                  <description>Enable</description>
121606                  <value>#1</value>
121607                </enumeratedValue>
121608              </enumeratedValues>
121609            </field>
121610            <field>
121611              <name>AC12EN</name>
121612              <description>Auto CMD12 Enable</description>
121613              <bitOffset>2</bitOffset>
121614              <bitWidth>1</bitWidth>
121615              <access>read-write</access>
121616              <enumeratedValues>
121617                <enumeratedValue>
121618                  <name>0</name>
121619                  <description>Disable</description>
121620                  <value>#0</value>
121621                </enumeratedValue>
121622                <enumeratedValue>
121623                  <name>1</name>
121624                  <description>Enable</description>
121625                  <value>#1</value>
121626                </enumeratedValue>
121627              </enumeratedValues>
121628            </field>
121629            <field>
121630              <name>DTDSEL</name>
121631              <description>Data Transfer Direction Select</description>
121632              <bitOffset>4</bitOffset>
121633              <bitWidth>1</bitWidth>
121634              <access>read-write</access>
121635              <enumeratedValues>
121636                <enumeratedValue>
121637                  <name>0</name>
121638                  <description>Write host to card.</description>
121639                  <value>#0</value>
121640                </enumeratedValue>
121641                <enumeratedValue>
121642                  <name>1</name>
121643                  <description>Read card to host.</description>
121644                  <value>#1</value>
121645                </enumeratedValue>
121646              </enumeratedValues>
121647            </field>
121648            <field>
121649              <name>MSBSEL</name>
121650              <description>Multi/Single Block Select</description>
121651              <bitOffset>5</bitOffset>
121652              <bitWidth>1</bitWidth>
121653              <access>read-write</access>
121654              <enumeratedValues>
121655                <enumeratedValue>
121656                  <name>0</name>
121657                  <description>Single block.</description>
121658                  <value>#0</value>
121659                </enumeratedValue>
121660                <enumeratedValue>
121661                  <name>1</name>
121662                  <description>Multiple blocks.</description>
121663                  <value>#1</value>
121664                </enumeratedValue>
121665              </enumeratedValues>
121666            </field>
121667            <field>
121668              <name>RSPTYP</name>
121669              <description>Response Type Select</description>
121670              <bitOffset>16</bitOffset>
121671              <bitWidth>2</bitWidth>
121672              <access>read-write</access>
121673              <enumeratedValues>
121674                <enumeratedValue>
121675                  <name>00</name>
121676                  <description>No response.</description>
121677                  <value>#00</value>
121678                </enumeratedValue>
121679                <enumeratedValue>
121680                  <name>01</name>
121681                  <description>Response length 136.</description>
121682                  <value>#01</value>
121683                </enumeratedValue>
121684                <enumeratedValue>
121685                  <name>10</name>
121686                  <description>Response length 48.</description>
121687                  <value>#10</value>
121688                </enumeratedValue>
121689                <enumeratedValue>
121690                  <name>11</name>
121691                  <description>Response length 48, check busy after response.</description>
121692                  <value>#11</value>
121693                </enumeratedValue>
121694              </enumeratedValues>
121695            </field>
121696            <field>
121697              <name>CCCEN</name>
121698              <description>Command CRC Check Enable</description>
121699              <bitOffset>19</bitOffset>
121700              <bitWidth>1</bitWidth>
121701              <access>read-write</access>
121702              <enumeratedValues>
121703                <enumeratedValue>
121704                  <name>0</name>
121705                  <description>Disable</description>
121706                  <value>#0</value>
121707                </enumeratedValue>
121708                <enumeratedValue>
121709                  <name>1</name>
121710                  <description>Enable</description>
121711                  <value>#1</value>
121712                </enumeratedValue>
121713              </enumeratedValues>
121714            </field>
121715            <field>
121716              <name>CICEN</name>
121717              <description>Command Index Check Enable</description>
121718              <bitOffset>20</bitOffset>
121719              <bitWidth>1</bitWidth>
121720              <access>read-write</access>
121721              <enumeratedValues>
121722                <enumeratedValue>
121723                  <name>0</name>
121724                  <description>Disable</description>
121725                  <value>#0</value>
121726                </enumeratedValue>
121727                <enumeratedValue>
121728                  <name>1</name>
121729                  <description>Enable</description>
121730                  <value>#1</value>
121731                </enumeratedValue>
121732              </enumeratedValues>
121733            </field>
121734            <field>
121735              <name>DPSEL</name>
121736              <description>Data Present Select</description>
121737              <bitOffset>21</bitOffset>
121738              <bitWidth>1</bitWidth>
121739              <access>read-write</access>
121740              <enumeratedValues>
121741                <enumeratedValue>
121742                  <name>0</name>
121743                  <description>No data present.</description>
121744                  <value>#0</value>
121745                </enumeratedValue>
121746                <enumeratedValue>
121747                  <name>1</name>
121748                  <description>Data present.</description>
121749                  <value>#1</value>
121750                </enumeratedValue>
121751              </enumeratedValues>
121752            </field>
121753            <field>
121754              <name>CMDTYP</name>
121755              <description>Command Type</description>
121756              <bitOffset>22</bitOffset>
121757              <bitWidth>2</bitWidth>
121758              <access>read-write</access>
121759              <enumeratedValues>
121760                <enumeratedValue>
121761                  <name>00</name>
121762                  <description>Normal other commands.</description>
121763                  <value>#00</value>
121764                </enumeratedValue>
121765                <enumeratedValue>
121766                  <name>01</name>
121767                  <description>Suspend CMD52 for writing bus suspend in CCCR.</description>
121768                  <value>#01</value>
121769                </enumeratedValue>
121770                <enumeratedValue>
121771                  <name>10</name>
121772                  <description>Resume CMD52 for writing function select in CCCR.</description>
121773                  <value>#10</value>
121774                </enumeratedValue>
121775                <enumeratedValue>
121776                  <name>11</name>
121777                  <description>Abort CMD12, CMD52 for writing I/O abort in CCCR.</description>
121778                  <value>#11</value>
121779                </enumeratedValue>
121780              </enumeratedValues>
121781            </field>
121782            <field>
121783              <name>CMDINX</name>
121784              <description>Command Index</description>
121785              <bitOffset>24</bitOffset>
121786              <bitWidth>6</bitWidth>
121787              <access>read-write</access>
121788            </field>
121789          </fields>
121790        </register>
121791        <register>
121792          <name>CMDRSP0</name>
121793          <description>Command Response 0</description>
121794          <addressOffset>0x10</addressOffset>
121795          <size>32</size>
121796          <access>read-only</access>
121797          <resetValue>0</resetValue>
121798          <resetMask>0xFFFFFFFF</resetMask>
121799          <fields>
121800            <field>
121801              <name>CMDRSP0</name>
121802              <description>Command Response 0</description>
121803              <bitOffset>0</bitOffset>
121804              <bitWidth>32</bitWidth>
121805              <access>read-only</access>
121806            </field>
121807          </fields>
121808        </register>
121809        <register>
121810          <name>CMDRSP1</name>
121811          <description>Command Response 1</description>
121812          <addressOffset>0x14</addressOffset>
121813          <size>32</size>
121814          <access>read-only</access>
121815          <resetValue>0</resetValue>
121816          <resetMask>0xFFFFFFFF</resetMask>
121817          <fields>
121818            <field>
121819              <name>CMDRSP1</name>
121820              <description>Command Response 1</description>
121821              <bitOffset>0</bitOffset>
121822              <bitWidth>32</bitWidth>
121823              <access>read-only</access>
121824            </field>
121825          </fields>
121826        </register>
121827        <register>
121828          <name>CMDRSP2</name>
121829          <description>Command Response 2</description>
121830          <addressOffset>0x18</addressOffset>
121831          <size>32</size>
121832          <access>read-only</access>
121833          <resetValue>0</resetValue>
121834          <resetMask>0xFFFFFFFF</resetMask>
121835          <fields>
121836            <field>
121837              <name>CMDRSP2</name>
121838              <description>Command Response 2</description>
121839              <bitOffset>0</bitOffset>
121840              <bitWidth>32</bitWidth>
121841              <access>read-only</access>
121842            </field>
121843          </fields>
121844        </register>
121845        <register>
121846          <name>CMDRSP3</name>
121847          <description>Command Response 3</description>
121848          <addressOffset>0x1C</addressOffset>
121849          <size>32</size>
121850          <access>read-only</access>
121851          <resetValue>0</resetValue>
121852          <resetMask>0xFFFFFFFF</resetMask>
121853          <fields>
121854            <field>
121855              <name>CMDRSP3</name>
121856              <description>Command Response 3</description>
121857              <bitOffset>0</bitOffset>
121858              <bitWidth>32</bitWidth>
121859              <access>read-only</access>
121860            </field>
121861          </fields>
121862        </register>
121863        <register>
121864          <name>DATPORT</name>
121865          <description>Buffer Data Port register</description>
121866          <addressOffset>0x20</addressOffset>
121867          <size>32</size>
121868          <access>read-write</access>
121869          <resetValue>0</resetValue>
121870          <resetMask>0xFFFFFFFF</resetMask>
121871          <fields>
121872            <field>
121873              <name>DATCONT</name>
121874              <description>Data Content</description>
121875              <bitOffset>0</bitOffset>
121876              <bitWidth>32</bitWidth>
121877              <access>read-write</access>
121878            </field>
121879          </fields>
121880        </register>
121881        <register>
121882          <name>PRSSTAT</name>
121883          <description>Present State register</description>
121884          <addressOffset>0x24</addressOffset>
121885          <size>32</size>
121886          <access>read-only</access>
121887          <resetValue>0</resetValue>
121888          <resetMask>0xFFFFFFFF</resetMask>
121889          <fields>
121890            <field>
121891              <name>CIHB</name>
121892              <description>Command Inhibit (CMD)</description>
121893              <bitOffset>0</bitOffset>
121894              <bitWidth>1</bitWidth>
121895              <access>read-only</access>
121896              <enumeratedValues>
121897                <enumeratedValue>
121898                  <name>0</name>
121899                  <description>Can issue command using only CMD line.</description>
121900                  <value>#0</value>
121901                </enumeratedValue>
121902                <enumeratedValue>
121903                  <name>1</name>
121904                  <description>Cannot issue command.</description>
121905                  <value>#1</value>
121906                </enumeratedValue>
121907              </enumeratedValues>
121908            </field>
121909            <field>
121910              <name>CDIHB</name>
121911              <description>Command Inhibit (DAT)</description>
121912              <bitOffset>1</bitOffset>
121913              <bitWidth>1</bitWidth>
121914              <access>read-only</access>
121915              <enumeratedValues>
121916                <enumeratedValue>
121917                  <name>0</name>
121918                  <description>Can issue command which uses the DAT line.</description>
121919                  <value>#0</value>
121920                </enumeratedValue>
121921                <enumeratedValue>
121922                  <name>1</name>
121923                  <description>Cannot issue command which uses the DAT line.</description>
121924                  <value>#1</value>
121925                </enumeratedValue>
121926              </enumeratedValues>
121927            </field>
121928            <field>
121929              <name>DLA</name>
121930              <description>Data Line Active</description>
121931              <bitOffset>2</bitOffset>
121932              <bitWidth>1</bitWidth>
121933              <access>read-only</access>
121934              <enumeratedValues>
121935                <enumeratedValue>
121936                  <name>0</name>
121937                  <description>DAT line inactive.</description>
121938                  <value>#0</value>
121939                </enumeratedValue>
121940                <enumeratedValue>
121941                  <name>1</name>
121942                  <description>DAT line active.</description>
121943                  <value>#1</value>
121944                </enumeratedValue>
121945              </enumeratedValues>
121946            </field>
121947            <field>
121948              <name>SDSTB</name>
121949              <description>SD Clock Stable</description>
121950              <bitOffset>3</bitOffset>
121951              <bitWidth>1</bitWidth>
121952              <access>read-only</access>
121953              <enumeratedValues>
121954                <enumeratedValue>
121955                  <name>0</name>
121956                  <description>Clock is changing frequency and not stable.</description>
121957                  <value>#0</value>
121958                </enumeratedValue>
121959                <enumeratedValue>
121960                  <name>1</name>
121961                  <description>Clock is stable.</description>
121962                  <value>#1</value>
121963                </enumeratedValue>
121964              </enumeratedValues>
121965            </field>
121966            <field>
121967              <name>IPGOFF</name>
121968              <description>Bus Clock Gated Off Internally</description>
121969              <bitOffset>4</bitOffset>
121970              <bitWidth>1</bitWidth>
121971              <access>read-only</access>
121972              <enumeratedValues>
121973                <enumeratedValue>
121974                  <name>0</name>
121975                  <description>Bus clock is active.</description>
121976                  <value>#0</value>
121977                </enumeratedValue>
121978                <enumeratedValue>
121979                  <name>1</name>
121980                  <description>Bus clock is gated off.</description>
121981                  <value>#1</value>
121982                </enumeratedValue>
121983              </enumeratedValues>
121984            </field>
121985            <field>
121986              <name>HCKOFF</name>
121987              <description>System Clock Gated Off Internally</description>
121988              <bitOffset>5</bitOffset>
121989              <bitWidth>1</bitWidth>
121990              <access>read-only</access>
121991              <enumeratedValues>
121992                <enumeratedValue>
121993                  <name>0</name>
121994                  <description>System clock is active.</description>
121995                  <value>#0</value>
121996                </enumeratedValue>
121997                <enumeratedValue>
121998                  <name>1</name>
121999                  <description>System clock is gated off.</description>
122000                  <value>#1</value>
122001                </enumeratedValue>
122002              </enumeratedValues>
122003            </field>
122004            <field>
122005              <name>PEROFF</name>
122006              <description>SDHC clock Gated Off Internally</description>
122007              <bitOffset>6</bitOffset>
122008              <bitWidth>1</bitWidth>
122009              <access>read-only</access>
122010              <enumeratedValues>
122011                <enumeratedValue>
122012                  <name>0</name>
122013                  <description>SDHC clock is active.</description>
122014                  <value>#0</value>
122015                </enumeratedValue>
122016                <enumeratedValue>
122017                  <name>1</name>
122018                  <description>SDHC clock is gated off.</description>
122019                  <value>#1</value>
122020                </enumeratedValue>
122021              </enumeratedValues>
122022            </field>
122023            <field>
122024              <name>SDOFF</name>
122025              <description>SD Clock Gated Off Internally</description>
122026              <bitOffset>7</bitOffset>
122027              <bitWidth>1</bitWidth>
122028              <access>read-only</access>
122029              <enumeratedValues>
122030                <enumeratedValue>
122031                  <name>0</name>
122032                  <description>SD clock is active.</description>
122033                  <value>#0</value>
122034                </enumeratedValue>
122035                <enumeratedValue>
122036                  <name>1</name>
122037                  <description>SD clock is gated off.</description>
122038                  <value>#1</value>
122039                </enumeratedValue>
122040              </enumeratedValues>
122041            </field>
122042            <field>
122043              <name>WTA</name>
122044              <description>Write Transfer Active</description>
122045              <bitOffset>8</bitOffset>
122046              <bitWidth>1</bitWidth>
122047              <access>read-only</access>
122048              <enumeratedValues>
122049                <enumeratedValue>
122050                  <name>0</name>
122051                  <description>No valid data.</description>
122052                  <value>#0</value>
122053                </enumeratedValue>
122054                <enumeratedValue>
122055                  <name>1</name>
122056                  <description>Transferring data.</description>
122057                  <value>#1</value>
122058                </enumeratedValue>
122059              </enumeratedValues>
122060            </field>
122061            <field>
122062              <name>RTA</name>
122063              <description>Read Transfer Active</description>
122064              <bitOffset>9</bitOffset>
122065              <bitWidth>1</bitWidth>
122066              <access>read-only</access>
122067              <enumeratedValues>
122068                <enumeratedValue>
122069                  <name>0</name>
122070                  <description>No valid data.</description>
122071                  <value>#0</value>
122072                </enumeratedValue>
122073                <enumeratedValue>
122074                  <name>1</name>
122075                  <description>Transferring data.</description>
122076                  <value>#1</value>
122077                </enumeratedValue>
122078              </enumeratedValues>
122079            </field>
122080            <field>
122081              <name>BWEN</name>
122082              <description>Buffer Write Enable</description>
122083              <bitOffset>10</bitOffset>
122084              <bitWidth>1</bitWidth>
122085              <access>read-only</access>
122086              <enumeratedValues>
122087                <enumeratedValue>
122088                  <name>0</name>
122089                  <description>Write disable, the buffer can hold valid data less than the write watermark level.</description>
122090                  <value>#0</value>
122091                </enumeratedValue>
122092                <enumeratedValue>
122093                  <name>1</name>
122094                  <description>Write enable, the buffer can hold valid data greater than the write watermark level.</description>
122095                  <value>#1</value>
122096                </enumeratedValue>
122097              </enumeratedValues>
122098            </field>
122099            <field>
122100              <name>BREN</name>
122101              <description>Buffer Read Enable</description>
122102              <bitOffset>11</bitOffset>
122103              <bitWidth>1</bitWidth>
122104              <access>read-only</access>
122105              <enumeratedValues>
122106                <enumeratedValue>
122107                  <name>0</name>
122108                  <description>Read disable, valid data less than the watermark level exist in the buffer.</description>
122109                  <value>#0</value>
122110                </enumeratedValue>
122111                <enumeratedValue>
122112                  <name>1</name>
122113                  <description>Read enable, valid data greater than the watermark level exist in the buffer.</description>
122114                  <value>#1</value>
122115                </enumeratedValue>
122116              </enumeratedValues>
122117            </field>
122118            <field>
122119              <name>CINS</name>
122120              <description>Card Inserted</description>
122121              <bitOffset>16</bitOffset>
122122              <bitWidth>1</bitWidth>
122123              <access>read-only</access>
122124              <enumeratedValues>
122125                <enumeratedValue>
122126                  <name>0</name>
122127                  <description>Power on reset or no card.</description>
122128                  <value>#0</value>
122129                </enumeratedValue>
122130                <enumeratedValue>
122131                  <name>1</name>
122132                  <description>Card inserted.</description>
122133                  <value>#1</value>
122134                </enumeratedValue>
122135              </enumeratedValues>
122136            </field>
122137            <field>
122138              <name>CLSL</name>
122139              <description>CMD Line Signal Level</description>
122140              <bitOffset>23</bitOffset>
122141              <bitWidth>1</bitWidth>
122142              <access>read-only</access>
122143            </field>
122144            <field>
122145              <name>DLSL</name>
122146              <description>DAT Line Signal Level</description>
122147              <bitOffset>24</bitOffset>
122148              <bitWidth>8</bitWidth>
122149              <access>read-only</access>
122150            </field>
122151          </fields>
122152        </register>
122153        <register>
122154          <name>PROCTL</name>
122155          <description>Protocol Control register</description>
122156          <addressOffset>0x28</addressOffset>
122157          <size>32</size>
122158          <access>read-write</access>
122159          <resetValue>0x20</resetValue>
122160          <resetMask>0xFFFFFFFF</resetMask>
122161          <fields>
122162            <field>
122163              <name>LCTL</name>
122164              <description>LED Control</description>
122165              <bitOffset>0</bitOffset>
122166              <bitWidth>1</bitWidth>
122167              <access>read-write</access>
122168              <enumeratedValues>
122169                <enumeratedValue>
122170                  <name>0</name>
122171                  <description>LED off.</description>
122172                  <value>#0</value>
122173                </enumeratedValue>
122174                <enumeratedValue>
122175                  <name>1</name>
122176                  <description>LED on.</description>
122177                  <value>#1</value>
122178                </enumeratedValue>
122179              </enumeratedValues>
122180            </field>
122181            <field>
122182              <name>DTW</name>
122183              <description>Data Transfer Width</description>
122184              <bitOffset>1</bitOffset>
122185              <bitWidth>2</bitWidth>
122186              <access>read-write</access>
122187              <enumeratedValues>
122188                <enumeratedValue>
122189                  <name>00</name>
122190                  <description>1-bit mode</description>
122191                  <value>#00</value>
122192                </enumeratedValue>
122193                <enumeratedValue>
122194                  <name>01</name>
122195                  <description>4-bit mode</description>
122196                  <value>#01</value>
122197                </enumeratedValue>
122198                <enumeratedValue>
122199                  <name>10</name>
122200                  <description>8-bit mode</description>
122201                  <value>#10</value>
122202                </enumeratedValue>
122203              </enumeratedValues>
122204            </field>
122205            <field>
122206              <name>D3CD</name>
122207              <description>DAT3 As Card Detection Pin</description>
122208              <bitOffset>3</bitOffset>
122209              <bitWidth>1</bitWidth>
122210              <access>read-write</access>
122211              <enumeratedValues>
122212                <enumeratedValue>
122213                  <name>0</name>
122214                  <description>DAT3 does not monitor card Insertion.</description>
122215                  <value>#0</value>
122216                </enumeratedValue>
122217                <enumeratedValue>
122218                  <name>1</name>
122219                  <description>DAT3 as card detection pin.</description>
122220                  <value>#1</value>
122221                </enumeratedValue>
122222              </enumeratedValues>
122223            </field>
122224            <field>
122225              <name>EMODE</name>
122226              <description>Endian Mode</description>
122227              <bitOffset>4</bitOffset>
122228              <bitWidth>2</bitWidth>
122229              <access>read-write</access>
122230              <enumeratedValues>
122231                <enumeratedValue>
122232                  <name>00</name>
122233                  <description>Big endian mode</description>
122234                  <value>#00</value>
122235                </enumeratedValue>
122236                <enumeratedValue>
122237                  <name>01</name>
122238                  <description>Half word big endian mode</description>
122239                  <value>#01</value>
122240                </enumeratedValue>
122241                <enumeratedValue>
122242                  <name>10</name>
122243                  <description>Little endian mode</description>
122244                  <value>#10</value>
122245                </enumeratedValue>
122246              </enumeratedValues>
122247            </field>
122248            <field>
122249              <name>CDTL</name>
122250              <description>Card Detect Test Level</description>
122251              <bitOffset>6</bitOffset>
122252              <bitWidth>1</bitWidth>
122253              <access>read-write</access>
122254              <enumeratedValues>
122255                <enumeratedValue>
122256                  <name>0</name>
122257                  <description>Card detect test level is 0, no card inserted.</description>
122258                  <value>#0</value>
122259                </enumeratedValue>
122260                <enumeratedValue>
122261                  <name>1</name>
122262                  <description>Card detect test level is 1, card inserted.</description>
122263                  <value>#1</value>
122264                </enumeratedValue>
122265              </enumeratedValues>
122266            </field>
122267            <field>
122268              <name>CDSS</name>
122269              <description>Card Detect Signal Selection</description>
122270              <bitOffset>7</bitOffset>
122271              <bitWidth>1</bitWidth>
122272              <access>read-write</access>
122273              <enumeratedValues>
122274                <enumeratedValue>
122275                  <name>0</name>
122276                  <description>Card detection level is selected for normal purpose.</description>
122277                  <value>#0</value>
122278                </enumeratedValue>
122279                <enumeratedValue>
122280                  <name>1</name>
122281                  <description>Card detection test level is selected for test purpose.</description>
122282                  <value>#1</value>
122283                </enumeratedValue>
122284              </enumeratedValues>
122285            </field>
122286            <field>
122287              <name>DMAS</name>
122288              <description>DMA Select</description>
122289              <bitOffset>8</bitOffset>
122290              <bitWidth>2</bitWidth>
122291              <access>read-write</access>
122292              <enumeratedValues>
122293                <enumeratedValue>
122294                  <name>00</name>
122295                  <description>No DMA or simple DMA is selected.</description>
122296                  <value>#00</value>
122297                </enumeratedValue>
122298                <enumeratedValue>
122299                  <name>01</name>
122300                  <description>ADMA1 is selected.</description>
122301                  <value>#01</value>
122302                </enumeratedValue>
122303                <enumeratedValue>
122304                  <name>10</name>
122305                  <description>ADMA2 is selected.</description>
122306                  <value>#10</value>
122307                </enumeratedValue>
122308              </enumeratedValues>
122309            </field>
122310            <field>
122311              <name>SABGREQ</name>
122312              <description>Stop At Block Gap Request</description>
122313              <bitOffset>16</bitOffset>
122314              <bitWidth>1</bitWidth>
122315              <access>read-write</access>
122316              <enumeratedValues>
122317                <enumeratedValue>
122318                  <name>0</name>
122319                  <description>Transfer</description>
122320                  <value>#0</value>
122321                </enumeratedValue>
122322                <enumeratedValue>
122323                  <name>1</name>
122324                  <description>Stop</description>
122325                  <value>#1</value>
122326                </enumeratedValue>
122327              </enumeratedValues>
122328            </field>
122329            <field>
122330              <name>CREQ</name>
122331              <description>Continue Request</description>
122332              <bitOffset>17</bitOffset>
122333              <bitWidth>1</bitWidth>
122334              <access>read-write</access>
122335              <enumeratedValues>
122336                <enumeratedValue>
122337                  <name>0</name>
122338                  <description>No effect.</description>
122339                  <value>#0</value>
122340                </enumeratedValue>
122341                <enumeratedValue>
122342                  <name>1</name>
122343                  <description>Restart</description>
122344                  <value>#1</value>
122345                </enumeratedValue>
122346              </enumeratedValues>
122347            </field>
122348            <field>
122349              <name>RWCTL</name>
122350              <description>Read Wait Control</description>
122351              <bitOffset>18</bitOffset>
122352              <bitWidth>1</bitWidth>
122353              <access>read-write</access>
122354              <enumeratedValues>
122355                <enumeratedValue>
122356                  <name>0</name>
122357                  <description>Disable read wait control, and stop SD clock at block gap when SABGREQ is set.</description>
122358                  <value>#0</value>
122359                </enumeratedValue>
122360                <enumeratedValue>
122361                  <name>1</name>
122362                  <description>Enable read wait control, and assert read wait without stopping SD clock at block gap when SABGREQ bit is set.</description>
122363                  <value>#1</value>
122364                </enumeratedValue>
122365              </enumeratedValues>
122366            </field>
122367            <field>
122368              <name>IABG</name>
122369              <description>Interrupt At Block Gap</description>
122370              <bitOffset>19</bitOffset>
122371              <bitWidth>1</bitWidth>
122372              <access>read-write</access>
122373              <enumeratedValues>
122374                <enumeratedValue>
122375                  <name>0</name>
122376                  <description>Disabled</description>
122377                  <value>#0</value>
122378                </enumeratedValue>
122379                <enumeratedValue>
122380                  <name>1</name>
122381                  <description>Enabled</description>
122382                  <value>#1</value>
122383                </enumeratedValue>
122384              </enumeratedValues>
122385            </field>
122386            <field>
122387              <name>WECINT</name>
122388              <description>Wakeup Event Enable On Card Interrupt</description>
122389              <bitOffset>24</bitOffset>
122390              <bitWidth>1</bitWidth>
122391              <access>read-write</access>
122392              <enumeratedValues>
122393                <enumeratedValue>
122394                  <name>0</name>
122395                  <description>Disabled</description>
122396                  <value>#0</value>
122397                </enumeratedValue>
122398                <enumeratedValue>
122399                  <name>1</name>
122400                  <description>Enabled</description>
122401                  <value>#1</value>
122402                </enumeratedValue>
122403              </enumeratedValues>
122404            </field>
122405            <field>
122406              <name>WECINS</name>
122407              <description>Wakeup Event Enable On SD Card Insertion</description>
122408              <bitOffset>25</bitOffset>
122409              <bitWidth>1</bitWidth>
122410              <access>read-write</access>
122411              <enumeratedValues>
122412                <enumeratedValue>
122413                  <name>0</name>
122414                  <description>Disabled</description>
122415                  <value>#0</value>
122416                </enumeratedValue>
122417                <enumeratedValue>
122418                  <name>1</name>
122419                  <description>Enabled</description>
122420                  <value>#1</value>
122421                </enumeratedValue>
122422              </enumeratedValues>
122423            </field>
122424            <field>
122425              <name>WECRM</name>
122426              <description>Wakeup Event Enable On SD Card Removal</description>
122427              <bitOffset>26</bitOffset>
122428              <bitWidth>1</bitWidth>
122429              <access>read-write</access>
122430              <enumeratedValues>
122431                <enumeratedValue>
122432                  <name>0</name>
122433                  <description>Disabled</description>
122434                  <value>#0</value>
122435                </enumeratedValue>
122436                <enumeratedValue>
122437                  <name>1</name>
122438                  <description>Enabled</description>
122439                  <value>#1</value>
122440                </enumeratedValue>
122441              </enumeratedValues>
122442            </field>
122443          </fields>
122444        </register>
122445        <register>
122446          <name>SYSCTL</name>
122447          <description>System Control register</description>
122448          <addressOffset>0x2C</addressOffset>
122449          <size>32</size>
122450          <access>read-write</access>
122451          <resetValue>0x8008</resetValue>
122452          <resetMask>0xFFFFFFFF</resetMask>
122453          <fields>
122454            <field>
122455              <name>IPGEN</name>
122456              <description>IPG Clock Enable</description>
122457              <bitOffset>0</bitOffset>
122458              <bitWidth>1</bitWidth>
122459              <access>read-write</access>
122460              <enumeratedValues>
122461                <enumeratedValue>
122462                  <name>0</name>
122463                  <description>Bus clock will be internally gated off.</description>
122464                  <value>#0</value>
122465                </enumeratedValue>
122466                <enumeratedValue>
122467                  <name>1</name>
122468                  <description>Bus clock will not be automatically gated off.</description>
122469                  <value>#1</value>
122470                </enumeratedValue>
122471              </enumeratedValues>
122472            </field>
122473            <field>
122474              <name>HCKEN</name>
122475              <description>System Clock Enable</description>
122476              <bitOffset>1</bitOffset>
122477              <bitWidth>1</bitWidth>
122478              <access>read-write</access>
122479              <enumeratedValues>
122480                <enumeratedValue>
122481                  <name>0</name>
122482                  <description>System clock will be internally gated off.</description>
122483                  <value>#0</value>
122484                </enumeratedValue>
122485                <enumeratedValue>
122486                  <name>1</name>
122487                  <description>System clock will not be automatically gated off.</description>
122488                  <value>#1</value>
122489                </enumeratedValue>
122490              </enumeratedValues>
122491            </field>
122492            <field>
122493              <name>PEREN</name>
122494              <description>Peripheral Clock Enable</description>
122495              <bitOffset>2</bitOffset>
122496              <bitWidth>1</bitWidth>
122497              <access>read-write</access>
122498              <enumeratedValues>
122499                <enumeratedValue>
122500                  <name>0</name>
122501                  <description>SDHC clock will be internally gated off.</description>
122502                  <value>#0</value>
122503                </enumeratedValue>
122504                <enumeratedValue>
122505                  <name>1</name>
122506                  <description>SDHC clock will not be automatically gated off.</description>
122507                  <value>#1</value>
122508                </enumeratedValue>
122509              </enumeratedValues>
122510            </field>
122511            <field>
122512              <name>SDCLKEN</name>
122513              <description>SD Clock Enable</description>
122514              <bitOffset>3</bitOffset>
122515              <bitWidth>1</bitWidth>
122516              <access>read-write</access>
122517            </field>
122518            <field>
122519              <name>DVS</name>
122520              <description>Divisor</description>
122521              <bitOffset>4</bitOffset>
122522              <bitWidth>4</bitWidth>
122523              <access>read-write</access>
122524              <enumeratedValues>
122525                <enumeratedValue>
122526                  <name>0</name>
122527                  <description>Divisor by 1.</description>
122528                  <value>#0000</value>
122529                </enumeratedValue>
122530                <enumeratedValue>
122531                  <name>1</name>
122532                  <description>Divisor by 2.</description>
122533                  <value>#0001</value>
122534                </enumeratedValue>
122535                <enumeratedValue>
122536                  <name>1110</name>
122537                  <description>Divisor by 15.</description>
122538                  <value>#1110</value>
122539                </enumeratedValue>
122540                <enumeratedValue>
122541                  <name>1111</name>
122542                  <description>Divisor by 16.</description>
122543                  <value>#1111</value>
122544                </enumeratedValue>
122545              </enumeratedValues>
122546            </field>
122547            <field>
122548              <name>SDCLKFS</name>
122549              <description>SDCLK Frequency Select</description>
122550              <bitOffset>8</bitOffset>
122551              <bitWidth>8</bitWidth>
122552              <access>read-write</access>
122553              <enumeratedValues>
122554                <enumeratedValue>
122555                  <name>1</name>
122556                  <description>Base clock divided by 2.</description>
122557                  <value>#1</value>
122558                </enumeratedValue>
122559                <enumeratedValue>
122560                  <name>10</name>
122561                  <description>Base clock divided by 4.</description>
122562                  <value>#10</value>
122563                </enumeratedValue>
122564                <enumeratedValue>
122565                  <name>100</name>
122566                  <description>Base clock divided by 8.</description>
122567                  <value>#100</value>
122568                </enumeratedValue>
122569                <enumeratedValue>
122570                  <name>1000</name>
122571                  <description>Base clock divided by 16.</description>
122572                  <value>#1000</value>
122573                </enumeratedValue>
122574                <enumeratedValue>
122575                  <name>10000</name>
122576                  <description>Base clock divided by 32.</description>
122577                  <value>#10000</value>
122578                </enumeratedValue>
122579                <enumeratedValue>
122580                  <name>100000</name>
122581                  <description>Base clock divided by 64.</description>
122582                  <value>#100000</value>
122583                </enumeratedValue>
122584                <enumeratedValue>
122585                  <name>1000000</name>
122586                  <description>Base clock divided by 128.</description>
122587                  <value>#1000000</value>
122588                </enumeratedValue>
122589                <enumeratedValue>
122590                  <name>10000000</name>
122591                  <description>Base clock divided by 256.</description>
122592                  <value>#10000000</value>
122593                </enumeratedValue>
122594              </enumeratedValues>
122595            </field>
122596            <field>
122597              <name>DTOCV</name>
122598              <description>Data Timeout Counter Value</description>
122599              <bitOffset>16</bitOffset>
122600              <bitWidth>4</bitWidth>
122601              <access>read-write</access>
122602              <enumeratedValues>
122603                <enumeratedValue>
122604                  <name>0000</name>
122605                  <description>SDCLK x 2 13</description>
122606                  <value>#0000</value>
122607                </enumeratedValue>
122608                <enumeratedValue>
122609                  <name>0001</name>
122610                  <description>SDCLK x 2 14</description>
122611                  <value>#0001</value>
122612                </enumeratedValue>
122613                <enumeratedValue>
122614                  <name>1110</name>
122615                  <description>SDCLK x 2 27</description>
122616                  <value>#1110</value>
122617                </enumeratedValue>
122618              </enumeratedValues>
122619            </field>
122620            <field>
122621              <name>RSTA</name>
122622              <description>Software Reset For ALL</description>
122623              <bitOffset>24</bitOffset>
122624              <bitWidth>1</bitWidth>
122625              <access>write-only</access>
122626              <enumeratedValues>
122627                <enumeratedValue>
122628                  <name>0</name>
122629                  <description>No reset.</description>
122630                  <value>#0</value>
122631                </enumeratedValue>
122632                <enumeratedValue>
122633                  <name>1</name>
122634                  <description>Reset.</description>
122635                  <value>#1</value>
122636                </enumeratedValue>
122637              </enumeratedValues>
122638            </field>
122639            <field>
122640              <name>RSTC</name>
122641              <description>Software Reset For CMD Line</description>
122642              <bitOffset>25</bitOffset>
122643              <bitWidth>1</bitWidth>
122644              <access>write-only</access>
122645              <enumeratedValues>
122646                <enumeratedValue>
122647                  <name>0</name>
122648                  <description>No reset.</description>
122649                  <value>#0</value>
122650                </enumeratedValue>
122651                <enumeratedValue>
122652                  <name>1</name>
122653                  <description>Reset.</description>
122654                  <value>#1</value>
122655                </enumeratedValue>
122656              </enumeratedValues>
122657            </field>
122658            <field>
122659              <name>RSTD</name>
122660              <description>Software Reset For DAT Line</description>
122661              <bitOffset>26</bitOffset>
122662              <bitWidth>1</bitWidth>
122663              <access>write-only</access>
122664              <enumeratedValues>
122665                <enumeratedValue>
122666                  <name>0</name>
122667                  <description>No reset.</description>
122668                  <value>#0</value>
122669                </enumeratedValue>
122670                <enumeratedValue>
122671                  <name>1</name>
122672                  <description>Reset.</description>
122673                  <value>#1</value>
122674                </enumeratedValue>
122675              </enumeratedValues>
122676            </field>
122677            <field>
122678              <name>INITA</name>
122679              <description>Initialization Active</description>
122680              <bitOffset>27</bitOffset>
122681              <bitWidth>1</bitWidth>
122682              <access>read-write</access>
122683            </field>
122684          </fields>
122685        </register>
122686        <register>
122687          <name>IRQSTAT</name>
122688          <description>Interrupt Status register</description>
122689          <addressOffset>0x30</addressOffset>
122690          <size>32</size>
122691          <access>read-write</access>
122692          <resetValue>0</resetValue>
122693          <resetMask>0xFFFFFFFF</resetMask>
122694          <fields>
122695            <field>
122696              <name>CC</name>
122697              <description>Command Complete</description>
122698              <bitOffset>0</bitOffset>
122699              <bitWidth>1</bitWidth>
122700              <access>read-write</access>
122701              <enumeratedValues>
122702                <enumeratedValue>
122703                  <name>0</name>
122704                  <description>Command not complete.</description>
122705                  <value>#0</value>
122706                </enumeratedValue>
122707                <enumeratedValue>
122708                  <name>1</name>
122709                  <description>Command complete.</description>
122710                  <value>#1</value>
122711                </enumeratedValue>
122712              </enumeratedValues>
122713            </field>
122714            <field>
122715              <name>TC</name>
122716              <description>Transfer Complete</description>
122717              <bitOffset>1</bitOffset>
122718              <bitWidth>1</bitWidth>
122719              <access>read-write</access>
122720              <enumeratedValues>
122721                <enumeratedValue>
122722                  <name>0</name>
122723                  <description>Transfer not complete.</description>
122724                  <value>#0</value>
122725                </enumeratedValue>
122726                <enumeratedValue>
122727                  <name>1</name>
122728                  <description>Transfer complete.</description>
122729                  <value>#1</value>
122730                </enumeratedValue>
122731              </enumeratedValues>
122732            </field>
122733            <field>
122734              <name>BGE</name>
122735              <description>Block Gap Event</description>
122736              <bitOffset>2</bitOffset>
122737              <bitWidth>1</bitWidth>
122738              <access>read-write</access>
122739              <enumeratedValues>
122740                <enumeratedValue>
122741                  <name>0</name>
122742                  <description>No block gap event.</description>
122743                  <value>#0</value>
122744                </enumeratedValue>
122745                <enumeratedValue>
122746                  <name>1</name>
122747                  <description>Transaction stopped at block gap.</description>
122748                  <value>#1</value>
122749                </enumeratedValue>
122750              </enumeratedValues>
122751            </field>
122752            <field>
122753              <name>DINT</name>
122754              <description>DMA Interrupt</description>
122755              <bitOffset>3</bitOffset>
122756              <bitWidth>1</bitWidth>
122757              <access>read-write</access>
122758              <enumeratedValues>
122759                <enumeratedValue>
122760                  <name>0</name>
122761                  <description>No DMA Interrupt.</description>
122762                  <value>#0</value>
122763                </enumeratedValue>
122764                <enumeratedValue>
122765                  <name>1</name>
122766                  <description>DMA Interrupt is generated.</description>
122767                  <value>#1</value>
122768                </enumeratedValue>
122769              </enumeratedValues>
122770            </field>
122771            <field>
122772              <name>BWR</name>
122773              <description>Buffer Write Ready</description>
122774              <bitOffset>4</bitOffset>
122775              <bitWidth>1</bitWidth>
122776              <access>read-write</access>
122777              <enumeratedValues>
122778                <enumeratedValue>
122779                  <name>0</name>
122780                  <description>Not ready to write buffer.</description>
122781                  <value>#0</value>
122782                </enumeratedValue>
122783                <enumeratedValue>
122784                  <name>1</name>
122785                  <description>Ready to write buffer.</description>
122786                  <value>#1</value>
122787                </enumeratedValue>
122788              </enumeratedValues>
122789            </field>
122790            <field>
122791              <name>BRR</name>
122792              <description>Buffer Read Ready</description>
122793              <bitOffset>5</bitOffset>
122794              <bitWidth>1</bitWidth>
122795              <access>read-write</access>
122796              <enumeratedValues>
122797                <enumeratedValue>
122798                  <name>0</name>
122799                  <description>Not ready to read buffer.</description>
122800                  <value>#0</value>
122801                </enumeratedValue>
122802                <enumeratedValue>
122803                  <name>1</name>
122804                  <description>Ready to read buffer.</description>
122805                  <value>#1</value>
122806                </enumeratedValue>
122807              </enumeratedValues>
122808            </field>
122809            <field>
122810              <name>CINS</name>
122811              <description>Card Insertion</description>
122812              <bitOffset>6</bitOffset>
122813              <bitWidth>1</bitWidth>
122814              <access>read-write</access>
122815              <enumeratedValues>
122816                <enumeratedValue>
122817                  <name>0</name>
122818                  <description>Card state unstable or removed.</description>
122819                  <value>#0</value>
122820                </enumeratedValue>
122821                <enumeratedValue>
122822                  <name>1</name>
122823                  <description>Card inserted.</description>
122824                  <value>#1</value>
122825                </enumeratedValue>
122826              </enumeratedValues>
122827            </field>
122828            <field>
122829              <name>CRM</name>
122830              <description>Card Removal</description>
122831              <bitOffset>7</bitOffset>
122832              <bitWidth>1</bitWidth>
122833              <access>read-write</access>
122834              <enumeratedValues>
122835                <enumeratedValue>
122836                  <name>0</name>
122837                  <description>Card state unstable or inserted.</description>
122838                  <value>#0</value>
122839                </enumeratedValue>
122840                <enumeratedValue>
122841                  <name>1</name>
122842                  <description>Card removed.</description>
122843                  <value>#1</value>
122844                </enumeratedValue>
122845              </enumeratedValues>
122846            </field>
122847            <field>
122848              <name>CINT</name>
122849              <description>Card Interrupt</description>
122850              <bitOffset>8</bitOffset>
122851              <bitWidth>1</bitWidth>
122852              <access>read-write</access>
122853              <enumeratedValues>
122854                <enumeratedValue>
122855                  <name>0</name>
122856                  <description>No Card Interrupt.</description>
122857                  <value>#0</value>
122858                </enumeratedValue>
122859                <enumeratedValue>
122860                  <name>1</name>
122861                  <description>Generate Card Interrupt.</description>
122862                  <value>#1</value>
122863                </enumeratedValue>
122864              </enumeratedValues>
122865            </field>
122866            <field>
122867              <name>CTOE</name>
122868              <description>Command Timeout Error</description>
122869              <bitOffset>16</bitOffset>
122870              <bitWidth>1</bitWidth>
122871              <access>read-write</access>
122872              <enumeratedValues>
122873                <enumeratedValue>
122874                  <name>0</name>
122875                  <description>No error.</description>
122876                  <value>#0</value>
122877                </enumeratedValue>
122878                <enumeratedValue>
122879                  <name>1</name>
122880                  <description>Time out.</description>
122881                  <value>#1</value>
122882                </enumeratedValue>
122883              </enumeratedValues>
122884            </field>
122885            <field>
122886              <name>CCE</name>
122887              <description>Command CRC Error</description>
122888              <bitOffset>17</bitOffset>
122889              <bitWidth>1</bitWidth>
122890              <access>read-write</access>
122891              <enumeratedValues>
122892                <enumeratedValue>
122893                  <name>0</name>
122894                  <description>No error.</description>
122895                  <value>#0</value>
122896                </enumeratedValue>
122897                <enumeratedValue>
122898                  <name>1</name>
122899                  <description>CRC Error generated.</description>
122900                  <value>#1</value>
122901                </enumeratedValue>
122902              </enumeratedValues>
122903            </field>
122904            <field>
122905              <name>CEBE</name>
122906              <description>Command End Bit Error</description>
122907              <bitOffset>18</bitOffset>
122908              <bitWidth>1</bitWidth>
122909              <access>read-write</access>
122910              <enumeratedValues>
122911                <enumeratedValue>
122912                  <name>0</name>
122913                  <description>No error.</description>
122914                  <value>#0</value>
122915                </enumeratedValue>
122916                <enumeratedValue>
122917                  <name>1</name>
122918                  <description>End Bit Error generated.</description>
122919                  <value>#1</value>
122920                </enumeratedValue>
122921              </enumeratedValues>
122922            </field>
122923            <field>
122924              <name>CIE</name>
122925              <description>Command Index Error</description>
122926              <bitOffset>19</bitOffset>
122927              <bitWidth>1</bitWidth>
122928              <access>read-write</access>
122929              <enumeratedValues>
122930                <enumeratedValue>
122931                  <name>0</name>
122932                  <description>No error.</description>
122933                  <value>#0</value>
122934                </enumeratedValue>
122935                <enumeratedValue>
122936                  <name>1</name>
122937                  <description>Error.</description>
122938                  <value>#1</value>
122939                </enumeratedValue>
122940              </enumeratedValues>
122941            </field>
122942            <field>
122943              <name>DTOE</name>
122944              <description>Data Timeout Error</description>
122945              <bitOffset>20</bitOffset>
122946              <bitWidth>1</bitWidth>
122947              <access>read-write</access>
122948              <enumeratedValues>
122949                <enumeratedValue>
122950                  <name>0</name>
122951                  <description>No error.</description>
122952                  <value>#0</value>
122953                </enumeratedValue>
122954                <enumeratedValue>
122955                  <name>1</name>
122956                  <description>Time out.</description>
122957                  <value>#1</value>
122958                </enumeratedValue>
122959              </enumeratedValues>
122960            </field>
122961            <field>
122962              <name>DCE</name>
122963              <description>Data CRC Error</description>
122964              <bitOffset>21</bitOffset>
122965              <bitWidth>1</bitWidth>
122966              <access>read-write</access>
122967              <enumeratedValues>
122968                <enumeratedValue>
122969                  <name>0</name>
122970                  <description>No error.</description>
122971                  <value>#0</value>
122972                </enumeratedValue>
122973                <enumeratedValue>
122974                  <name>1</name>
122975                  <description>Error.</description>
122976                  <value>#1</value>
122977                </enumeratedValue>
122978              </enumeratedValues>
122979            </field>
122980            <field>
122981              <name>DEBE</name>
122982              <description>Data End Bit Error</description>
122983              <bitOffset>22</bitOffset>
122984              <bitWidth>1</bitWidth>
122985              <access>read-write</access>
122986              <enumeratedValues>
122987                <enumeratedValue>
122988                  <name>0</name>
122989                  <description>No error.</description>
122990                  <value>#0</value>
122991                </enumeratedValue>
122992                <enumeratedValue>
122993                  <name>1</name>
122994                  <description>Error.</description>
122995                  <value>#1</value>
122996                </enumeratedValue>
122997              </enumeratedValues>
122998            </field>
122999            <field>
123000              <name>AC12E</name>
123001              <description>Auto CMD12 Error</description>
123002              <bitOffset>24</bitOffset>
123003              <bitWidth>1</bitWidth>
123004              <access>read-write</access>
123005              <enumeratedValues>
123006                <enumeratedValue>
123007                  <name>0</name>
123008                  <description>No error.</description>
123009                  <value>#0</value>
123010                </enumeratedValue>
123011                <enumeratedValue>
123012                  <name>1</name>
123013                  <description>Error.</description>
123014                  <value>#1</value>
123015                </enumeratedValue>
123016              </enumeratedValues>
123017            </field>
123018            <field>
123019              <name>DMAE</name>
123020              <description>DMA Error</description>
123021              <bitOffset>28</bitOffset>
123022              <bitWidth>1</bitWidth>
123023              <access>read-write</access>
123024              <enumeratedValues>
123025                <enumeratedValue>
123026                  <name>0</name>
123027                  <description>No error.</description>
123028                  <value>#0</value>
123029                </enumeratedValue>
123030                <enumeratedValue>
123031                  <name>1</name>
123032                  <description>Error.</description>
123033                  <value>#1</value>
123034                </enumeratedValue>
123035              </enumeratedValues>
123036            </field>
123037          </fields>
123038        </register>
123039        <register>
123040          <name>IRQSTATEN</name>
123041          <description>Interrupt Status Enable register</description>
123042          <addressOffset>0x34</addressOffset>
123043          <size>32</size>
123044          <access>read-write</access>
123045          <resetValue>0x117F013F</resetValue>
123046          <resetMask>0xFFFFFFFF</resetMask>
123047          <fields>
123048            <field>
123049              <name>CCSEN</name>
123050              <description>Command Complete Status Enable</description>
123051              <bitOffset>0</bitOffset>
123052              <bitWidth>1</bitWidth>
123053              <access>read-write</access>
123054              <enumeratedValues>
123055                <enumeratedValue>
123056                  <name>0</name>
123057                  <description>Masked</description>
123058                  <value>#0</value>
123059                </enumeratedValue>
123060                <enumeratedValue>
123061                  <name>1</name>
123062                  <description>Enabled</description>
123063                  <value>#1</value>
123064                </enumeratedValue>
123065              </enumeratedValues>
123066            </field>
123067            <field>
123068              <name>TCSEN</name>
123069              <description>Transfer Complete Status Enable</description>
123070              <bitOffset>1</bitOffset>
123071              <bitWidth>1</bitWidth>
123072              <access>read-write</access>
123073              <enumeratedValues>
123074                <enumeratedValue>
123075                  <name>0</name>
123076                  <description>Masked</description>
123077                  <value>#0</value>
123078                </enumeratedValue>
123079                <enumeratedValue>
123080                  <name>1</name>
123081                  <description>Enabled</description>
123082                  <value>#1</value>
123083                </enumeratedValue>
123084              </enumeratedValues>
123085            </field>
123086            <field>
123087              <name>BGESEN</name>
123088              <description>Block Gap Event Status Enable</description>
123089              <bitOffset>2</bitOffset>
123090              <bitWidth>1</bitWidth>
123091              <access>read-write</access>
123092              <enumeratedValues>
123093                <enumeratedValue>
123094                  <name>0</name>
123095                  <description>Masked</description>
123096                  <value>#0</value>
123097                </enumeratedValue>
123098                <enumeratedValue>
123099                  <name>1</name>
123100                  <description>Enabled</description>
123101                  <value>#1</value>
123102                </enumeratedValue>
123103              </enumeratedValues>
123104            </field>
123105            <field>
123106              <name>DINTSEN</name>
123107              <description>DMA Interrupt Status Enable</description>
123108              <bitOffset>3</bitOffset>
123109              <bitWidth>1</bitWidth>
123110              <access>read-write</access>
123111              <enumeratedValues>
123112                <enumeratedValue>
123113                  <name>0</name>
123114                  <description>Masked</description>
123115                  <value>#0</value>
123116                </enumeratedValue>
123117                <enumeratedValue>
123118                  <name>1</name>
123119                  <description>Enabled</description>
123120                  <value>#1</value>
123121                </enumeratedValue>
123122              </enumeratedValues>
123123            </field>
123124            <field>
123125              <name>BWRSEN</name>
123126              <description>Buffer Write Ready Status Enable</description>
123127              <bitOffset>4</bitOffset>
123128              <bitWidth>1</bitWidth>
123129              <access>read-write</access>
123130              <enumeratedValues>
123131                <enumeratedValue>
123132                  <name>0</name>
123133                  <description>Masked</description>
123134                  <value>#0</value>
123135                </enumeratedValue>
123136                <enumeratedValue>
123137                  <name>1</name>
123138                  <description>Enabled</description>
123139                  <value>#1</value>
123140                </enumeratedValue>
123141              </enumeratedValues>
123142            </field>
123143            <field>
123144              <name>BRRSEN</name>
123145              <description>Buffer Read Ready Status Enable</description>
123146              <bitOffset>5</bitOffset>
123147              <bitWidth>1</bitWidth>
123148              <access>read-write</access>
123149              <enumeratedValues>
123150                <enumeratedValue>
123151                  <name>0</name>
123152                  <description>Masked</description>
123153                  <value>#0</value>
123154                </enumeratedValue>
123155                <enumeratedValue>
123156                  <name>1</name>
123157                  <description>Enabled</description>
123158                  <value>#1</value>
123159                </enumeratedValue>
123160              </enumeratedValues>
123161            </field>
123162            <field>
123163              <name>CINSEN</name>
123164              <description>Card Insertion Status Enable</description>
123165              <bitOffset>6</bitOffset>
123166              <bitWidth>1</bitWidth>
123167              <access>read-write</access>
123168              <enumeratedValues>
123169                <enumeratedValue>
123170                  <name>0</name>
123171                  <description>Masked</description>
123172                  <value>#0</value>
123173                </enumeratedValue>
123174                <enumeratedValue>
123175                  <name>1</name>
123176                  <description>Enabled</description>
123177                  <value>#1</value>
123178                </enumeratedValue>
123179              </enumeratedValues>
123180            </field>
123181            <field>
123182              <name>CRMSEN</name>
123183              <description>Card Removal Status Enable</description>
123184              <bitOffset>7</bitOffset>
123185              <bitWidth>1</bitWidth>
123186              <access>read-write</access>
123187              <enumeratedValues>
123188                <enumeratedValue>
123189                  <name>0</name>
123190                  <description>Masked</description>
123191                  <value>#0</value>
123192                </enumeratedValue>
123193                <enumeratedValue>
123194                  <name>1</name>
123195                  <description>Enabled</description>
123196                  <value>#1</value>
123197                </enumeratedValue>
123198              </enumeratedValues>
123199            </field>
123200            <field>
123201              <name>CINTSEN</name>
123202              <description>Card Interrupt Status Enable</description>
123203              <bitOffset>8</bitOffset>
123204              <bitWidth>1</bitWidth>
123205              <access>read-write</access>
123206              <enumeratedValues>
123207                <enumeratedValue>
123208                  <name>0</name>
123209                  <description>Masked</description>
123210                  <value>#0</value>
123211                </enumeratedValue>
123212                <enumeratedValue>
123213                  <name>1</name>
123214                  <description>Enabled</description>
123215                  <value>#1</value>
123216                </enumeratedValue>
123217              </enumeratedValues>
123218            </field>
123219            <field>
123220              <name>CTOESEN</name>
123221              <description>Command Timeout Error Status Enable</description>
123222              <bitOffset>16</bitOffset>
123223              <bitWidth>1</bitWidth>
123224              <access>read-write</access>
123225              <enumeratedValues>
123226                <enumeratedValue>
123227                  <name>0</name>
123228                  <description>Masked</description>
123229                  <value>#0</value>
123230                </enumeratedValue>
123231                <enumeratedValue>
123232                  <name>1</name>
123233                  <description>Enabled</description>
123234                  <value>#1</value>
123235                </enumeratedValue>
123236              </enumeratedValues>
123237            </field>
123238            <field>
123239              <name>CCESEN</name>
123240              <description>Command CRC Error Status Enable</description>
123241              <bitOffset>17</bitOffset>
123242              <bitWidth>1</bitWidth>
123243              <access>read-write</access>
123244              <enumeratedValues>
123245                <enumeratedValue>
123246                  <name>0</name>
123247                  <description>Masked</description>
123248                  <value>#0</value>
123249                </enumeratedValue>
123250                <enumeratedValue>
123251                  <name>1</name>
123252                  <description>Enabled</description>
123253                  <value>#1</value>
123254                </enumeratedValue>
123255              </enumeratedValues>
123256            </field>
123257            <field>
123258              <name>CEBESEN</name>
123259              <description>Command End Bit Error Status Enable</description>
123260              <bitOffset>18</bitOffset>
123261              <bitWidth>1</bitWidth>
123262              <access>read-write</access>
123263              <enumeratedValues>
123264                <enumeratedValue>
123265                  <name>0</name>
123266                  <description>Masked</description>
123267                  <value>#0</value>
123268                </enumeratedValue>
123269                <enumeratedValue>
123270                  <name>1</name>
123271                  <description>Enabled</description>
123272                  <value>#1</value>
123273                </enumeratedValue>
123274              </enumeratedValues>
123275            </field>
123276            <field>
123277              <name>CIESEN</name>
123278              <description>Command Index Error Status Enable</description>
123279              <bitOffset>19</bitOffset>
123280              <bitWidth>1</bitWidth>
123281              <access>read-write</access>
123282              <enumeratedValues>
123283                <enumeratedValue>
123284                  <name>0</name>
123285                  <description>Masked</description>
123286                  <value>#0</value>
123287                </enumeratedValue>
123288                <enumeratedValue>
123289                  <name>1</name>
123290                  <description>Enabled</description>
123291                  <value>#1</value>
123292                </enumeratedValue>
123293              </enumeratedValues>
123294            </field>
123295            <field>
123296              <name>DTOESEN</name>
123297              <description>Data Timeout Error Status Enable</description>
123298              <bitOffset>20</bitOffset>
123299              <bitWidth>1</bitWidth>
123300              <access>read-write</access>
123301              <enumeratedValues>
123302                <enumeratedValue>
123303                  <name>0</name>
123304                  <description>Masked</description>
123305                  <value>#0</value>
123306                </enumeratedValue>
123307                <enumeratedValue>
123308                  <name>1</name>
123309                  <description>Enabled</description>
123310                  <value>#1</value>
123311                </enumeratedValue>
123312              </enumeratedValues>
123313            </field>
123314            <field>
123315              <name>DCESEN</name>
123316              <description>Data CRC Error Status Enable</description>
123317              <bitOffset>21</bitOffset>
123318              <bitWidth>1</bitWidth>
123319              <access>read-write</access>
123320              <enumeratedValues>
123321                <enumeratedValue>
123322                  <name>0</name>
123323                  <description>Masked</description>
123324                  <value>#0</value>
123325                </enumeratedValue>
123326                <enumeratedValue>
123327                  <name>1</name>
123328                  <description>Enabled</description>
123329                  <value>#1</value>
123330                </enumeratedValue>
123331              </enumeratedValues>
123332            </field>
123333            <field>
123334              <name>DEBESEN</name>
123335              <description>Data End Bit Error Status Enable</description>
123336              <bitOffset>22</bitOffset>
123337              <bitWidth>1</bitWidth>
123338              <access>read-write</access>
123339              <enumeratedValues>
123340                <enumeratedValue>
123341                  <name>0</name>
123342                  <description>Masked</description>
123343                  <value>#0</value>
123344                </enumeratedValue>
123345                <enumeratedValue>
123346                  <name>1</name>
123347                  <description>Enabled</description>
123348                  <value>#1</value>
123349                </enumeratedValue>
123350              </enumeratedValues>
123351            </field>
123352            <field>
123353              <name>AC12ESEN</name>
123354              <description>Auto CMD12 Error Status Enable</description>
123355              <bitOffset>24</bitOffset>
123356              <bitWidth>1</bitWidth>
123357              <access>read-write</access>
123358              <enumeratedValues>
123359                <enumeratedValue>
123360                  <name>0</name>
123361                  <description>Masked</description>
123362                  <value>#0</value>
123363                </enumeratedValue>
123364                <enumeratedValue>
123365                  <name>1</name>
123366                  <description>Enabled</description>
123367                  <value>#1</value>
123368                </enumeratedValue>
123369              </enumeratedValues>
123370            </field>
123371            <field>
123372              <name>DMAESEN</name>
123373              <description>DMA Error Status Enable</description>
123374              <bitOffset>28</bitOffset>
123375              <bitWidth>1</bitWidth>
123376              <access>read-write</access>
123377              <enumeratedValues>
123378                <enumeratedValue>
123379                  <name>0</name>
123380                  <description>Masked</description>
123381                  <value>#0</value>
123382                </enumeratedValue>
123383                <enumeratedValue>
123384                  <name>1</name>
123385                  <description>Enabled</description>
123386                  <value>#1</value>
123387                </enumeratedValue>
123388              </enumeratedValues>
123389            </field>
123390          </fields>
123391        </register>
123392        <register>
123393          <name>IRQSIGEN</name>
123394          <description>Interrupt Signal Enable register</description>
123395          <addressOffset>0x38</addressOffset>
123396          <size>32</size>
123397          <access>read-write</access>
123398          <resetValue>0</resetValue>
123399          <resetMask>0xFFFFFFFF</resetMask>
123400          <fields>
123401            <field>
123402              <name>CCIEN</name>
123403              <description>Command Complete Interrupt Enable</description>
123404              <bitOffset>0</bitOffset>
123405              <bitWidth>1</bitWidth>
123406              <access>read-write</access>
123407              <enumeratedValues>
123408                <enumeratedValue>
123409                  <name>0</name>
123410                  <description>Masked</description>
123411                  <value>#0</value>
123412                </enumeratedValue>
123413                <enumeratedValue>
123414                  <name>1</name>
123415                  <description>Enabled</description>
123416                  <value>#1</value>
123417                </enumeratedValue>
123418              </enumeratedValues>
123419            </field>
123420            <field>
123421              <name>TCIEN</name>
123422              <description>Transfer Complete Interrupt Enable</description>
123423              <bitOffset>1</bitOffset>
123424              <bitWidth>1</bitWidth>
123425              <access>read-write</access>
123426              <enumeratedValues>
123427                <enumeratedValue>
123428                  <name>0</name>
123429                  <description>Masked</description>
123430                  <value>#0</value>
123431                </enumeratedValue>
123432                <enumeratedValue>
123433                  <name>1</name>
123434                  <description>Enabled</description>
123435                  <value>#1</value>
123436                </enumeratedValue>
123437              </enumeratedValues>
123438            </field>
123439            <field>
123440              <name>BGEIEN</name>
123441              <description>Block Gap Event Interrupt Enable</description>
123442              <bitOffset>2</bitOffset>
123443              <bitWidth>1</bitWidth>
123444              <access>read-write</access>
123445              <enumeratedValues>
123446                <enumeratedValue>
123447                  <name>0</name>
123448                  <description>Masked</description>
123449                  <value>#0</value>
123450                </enumeratedValue>
123451                <enumeratedValue>
123452                  <name>1</name>
123453                  <description>Enabled</description>
123454                  <value>#1</value>
123455                </enumeratedValue>
123456              </enumeratedValues>
123457            </field>
123458            <field>
123459              <name>DINTIEN</name>
123460              <description>DMA Interrupt Enable</description>
123461              <bitOffset>3</bitOffset>
123462              <bitWidth>1</bitWidth>
123463              <access>read-write</access>
123464              <enumeratedValues>
123465                <enumeratedValue>
123466                  <name>0</name>
123467                  <description>Masked</description>
123468                  <value>#0</value>
123469                </enumeratedValue>
123470                <enumeratedValue>
123471                  <name>1</name>
123472                  <description>Enabled</description>
123473                  <value>#1</value>
123474                </enumeratedValue>
123475              </enumeratedValues>
123476            </field>
123477            <field>
123478              <name>BWRIEN</name>
123479              <description>Buffer Write Ready Interrupt Enable</description>
123480              <bitOffset>4</bitOffset>
123481              <bitWidth>1</bitWidth>
123482              <access>read-write</access>
123483              <enumeratedValues>
123484                <enumeratedValue>
123485                  <name>0</name>
123486                  <description>Masked</description>
123487                  <value>#0</value>
123488                </enumeratedValue>
123489                <enumeratedValue>
123490                  <name>1</name>
123491                  <description>Enabled</description>
123492                  <value>#1</value>
123493                </enumeratedValue>
123494              </enumeratedValues>
123495            </field>
123496            <field>
123497              <name>BRRIEN</name>
123498              <description>Buffer Read Ready Interrupt Enable</description>
123499              <bitOffset>5</bitOffset>
123500              <bitWidth>1</bitWidth>
123501              <access>read-write</access>
123502              <enumeratedValues>
123503                <enumeratedValue>
123504                  <name>0</name>
123505                  <description>Masked</description>
123506                  <value>#0</value>
123507                </enumeratedValue>
123508                <enumeratedValue>
123509                  <name>1</name>
123510                  <description>Enabled</description>
123511                  <value>#1</value>
123512                </enumeratedValue>
123513              </enumeratedValues>
123514            </field>
123515            <field>
123516              <name>CINSIEN</name>
123517              <description>Card Insertion Interrupt Enable</description>
123518              <bitOffset>6</bitOffset>
123519              <bitWidth>1</bitWidth>
123520              <access>read-write</access>
123521              <enumeratedValues>
123522                <enumeratedValue>
123523                  <name>0</name>
123524                  <description>Masked</description>
123525                  <value>#0</value>
123526                </enumeratedValue>
123527                <enumeratedValue>
123528                  <name>1</name>
123529                  <description>Enabled</description>
123530                  <value>#1</value>
123531                </enumeratedValue>
123532              </enumeratedValues>
123533            </field>
123534            <field>
123535              <name>CRMIEN</name>
123536              <description>Card Removal Interrupt Enable</description>
123537              <bitOffset>7</bitOffset>
123538              <bitWidth>1</bitWidth>
123539              <access>read-write</access>
123540              <enumeratedValues>
123541                <enumeratedValue>
123542                  <name>0</name>
123543                  <description>Masked</description>
123544                  <value>#0</value>
123545                </enumeratedValue>
123546                <enumeratedValue>
123547                  <name>1</name>
123548                  <description>Enabled</description>
123549                  <value>#1</value>
123550                </enumeratedValue>
123551              </enumeratedValues>
123552            </field>
123553            <field>
123554              <name>CINTIEN</name>
123555              <description>Card Interrupt Enable</description>
123556              <bitOffset>8</bitOffset>
123557              <bitWidth>1</bitWidth>
123558              <access>read-write</access>
123559              <enumeratedValues>
123560                <enumeratedValue>
123561                  <name>0</name>
123562                  <description>Masked</description>
123563                  <value>#0</value>
123564                </enumeratedValue>
123565                <enumeratedValue>
123566                  <name>1</name>
123567                  <description>Enabled</description>
123568                  <value>#1</value>
123569                </enumeratedValue>
123570              </enumeratedValues>
123571            </field>
123572            <field>
123573              <name>CTOEIEN</name>
123574              <description>Command Timeout Error Interrupt Enable</description>
123575              <bitOffset>16</bitOffset>
123576              <bitWidth>1</bitWidth>
123577              <access>read-write</access>
123578              <enumeratedValues>
123579                <enumeratedValue>
123580                  <name>0</name>
123581                  <description>Masked</description>
123582                  <value>#0</value>
123583                </enumeratedValue>
123584                <enumeratedValue>
123585                  <name>1</name>
123586                  <description>Enabled</description>
123587                  <value>#1</value>
123588                </enumeratedValue>
123589              </enumeratedValues>
123590            </field>
123591            <field>
123592              <name>CCEIEN</name>
123593              <description>Command CRC Error Interrupt Enable</description>
123594              <bitOffset>17</bitOffset>
123595              <bitWidth>1</bitWidth>
123596              <access>read-write</access>
123597              <enumeratedValues>
123598                <enumeratedValue>
123599                  <name>0</name>
123600                  <description>Masked</description>
123601                  <value>#0</value>
123602                </enumeratedValue>
123603                <enumeratedValue>
123604                  <name>1</name>
123605                  <description>Enabled</description>
123606                  <value>#1</value>
123607                </enumeratedValue>
123608              </enumeratedValues>
123609            </field>
123610            <field>
123611              <name>CEBEIEN</name>
123612              <description>Command End Bit Error Interrupt Enable</description>
123613              <bitOffset>18</bitOffset>
123614              <bitWidth>1</bitWidth>
123615              <access>read-write</access>
123616              <enumeratedValues>
123617                <enumeratedValue>
123618                  <name>0</name>
123619                  <description>Masked</description>
123620                  <value>#0</value>
123621                </enumeratedValue>
123622                <enumeratedValue>
123623                  <name>1</name>
123624                  <description>Enabled</description>
123625                  <value>#1</value>
123626                </enumeratedValue>
123627              </enumeratedValues>
123628            </field>
123629            <field>
123630              <name>CIEIEN</name>
123631              <description>Command Index Error Interrupt Enable</description>
123632              <bitOffset>19</bitOffset>
123633              <bitWidth>1</bitWidth>
123634              <access>read-write</access>
123635              <enumeratedValues>
123636                <enumeratedValue>
123637                  <name>0</name>
123638                  <description>Masked</description>
123639                  <value>#0</value>
123640                </enumeratedValue>
123641                <enumeratedValue>
123642                  <name>1</name>
123643                  <description>Enabled</description>
123644                  <value>#1</value>
123645                </enumeratedValue>
123646              </enumeratedValues>
123647            </field>
123648            <field>
123649              <name>DTOEIEN</name>
123650              <description>Data Timeout Error Interrupt Enable</description>
123651              <bitOffset>20</bitOffset>
123652              <bitWidth>1</bitWidth>
123653              <access>read-write</access>
123654              <enumeratedValues>
123655                <enumeratedValue>
123656                  <name>0</name>
123657                  <description>Masked</description>
123658                  <value>#0</value>
123659                </enumeratedValue>
123660                <enumeratedValue>
123661                  <name>1</name>
123662                  <description>Enabled</description>
123663                  <value>#1</value>
123664                </enumeratedValue>
123665              </enumeratedValues>
123666            </field>
123667            <field>
123668              <name>DCEIEN</name>
123669              <description>Data CRC Error Interrupt Enable</description>
123670              <bitOffset>21</bitOffset>
123671              <bitWidth>1</bitWidth>
123672              <access>read-write</access>
123673              <enumeratedValues>
123674                <enumeratedValue>
123675                  <name>0</name>
123676                  <description>Masked</description>
123677                  <value>#0</value>
123678                </enumeratedValue>
123679                <enumeratedValue>
123680                  <name>1</name>
123681                  <description>Enabled</description>
123682                  <value>#1</value>
123683                </enumeratedValue>
123684              </enumeratedValues>
123685            </field>
123686            <field>
123687              <name>DEBEIEN</name>
123688              <description>Data End Bit Error Interrupt Enable</description>
123689              <bitOffset>22</bitOffset>
123690              <bitWidth>1</bitWidth>
123691              <access>read-write</access>
123692              <enumeratedValues>
123693                <enumeratedValue>
123694                  <name>0</name>
123695                  <description>Masked</description>
123696                  <value>#0</value>
123697                </enumeratedValue>
123698                <enumeratedValue>
123699                  <name>1</name>
123700                  <description>Enabled</description>
123701                  <value>#1</value>
123702                </enumeratedValue>
123703              </enumeratedValues>
123704            </field>
123705            <field>
123706              <name>AC12EIEN</name>
123707              <description>Auto CMD12 Error Interrupt Enable</description>
123708              <bitOffset>24</bitOffset>
123709              <bitWidth>1</bitWidth>
123710              <access>read-write</access>
123711              <enumeratedValues>
123712                <enumeratedValue>
123713                  <name>0</name>
123714                  <description>Masked</description>
123715                  <value>#0</value>
123716                </enumeratedValue>
123717                <enumeratedValue>
123718                  <name>1</name>
123719                  <description>Enabled</description>
123720                  <value>#1</value>
123721                </enumeratedValue>
123722              </enumeratedValues>
123723            </field>
123724            <field>
123725              <name>DMAEIEN</name>
123726              <description>DMA Error Interrupt Enable</description>
123727              <bitOffset>28</bitOffset>
123728              <bitWidth>1</bitWidth>
123729              <access>read-write</access>
123730              <enumeratedValues>
123731                <enumeratedValue>
123732                  <name>0</name>
123733                  <description>Masked</description>
123734                  <value>#0</value>
123735                </enumeratedValue>
123736                <enumeratedValue>
123737                  <name>1</name>
123738                  <description>Enabled</description>
123739                  <value>#1</value>
123740                </enumeratedValue>
123741              </enumeratedValues>
123742            </field>
123743          </fields>
123744        </register>
123745        <register>
123746          <name>AC12ERR</name>
123747          <description>Auto CMD12 Error Status Register</description>
123748          <addressOffset>0x3C</addressOffset>
123749          <size>32</size>
123750          <access>read-only</access>
123751          <resetValue>0</resetValue>
123752          <resetMask>0xFFFFFFFF</resetMask>
123753          <fields>
123754            <field>
123755              <name>AC12NE</name>
123756              <description>Auto CMD12 Not Executed</description>
123757              <bitOffset>0</bitOffset>
123758              <bitWidth>1</bitWidth>
123759              <access>read-only</access>
123760              <enumeratedValues>
123761                <enumeratedValue>
123762                  <name>0</name>
123763                  <description>Executed.</description>
123764                  <value>#0</value>
123765                </enumeratedValue>
123766                <enumeratedValue>
123767                  <name>1</name>
123768                  <description>Not executed.</description>
123769                  <value>#1</value>
123770                </enumeratedValue>
123771              </enumeratedValues>
123772            </field>
123773            <field>
123774              <name>AC12TOE</name>
123775              <description>Auto CMD12 Timeout Error</description>
123776              <bitOffset>1</bitOffset>
123777              <bitWidth>1</bitWidth>
123778              <access>read-only</access>
123779              <enumeratedValues>
123780                <enumeratedValue>
123781                  <name>0</name>
123782                  <description>No error.</description>
123783                  <value>#0</value>
123784                </enumeratedValue>
123785                <enumeratedValue>
123786                  <name>1</name>
123787                  <description>Time out.</description>
123788                  <value>#1</value>
123789                </enumeratedValue>
123790              </enumeratedValues>
123791            </field>
123792            <field>
123793              <name>AC12EBE</name>
123794              <description>Auto CMD12 End Bit Error</description>
123795              <bitOffset>2</bitOffset>
123796              <bitWidth>1</bitWidth>
123797              <access>read-only</access>
123798              <enumeratedValues>
123799                <enumeratedValue>
123800                  <name>0</name>
123801                  <description>No error.</description>
123802                  <value>#0</value>
123803                </enumeratedValue>
123804                <enumeratedValue>
123805                  <name>1</name>
123806                  <description>End bit error generated.</description>
123807                  <value>#1</value>
123808                </enumeratedValue>
123809              </enumeratedValues>
123810            </field>
123811            <field>
123812              <name>AC12CE</name>
123813              <description>Auto CMD12 CRC Error</description>
123814              <bitOffset>3</bitOffset>
123815              <bitWidth>1</bitWidth>
123816              <access>read-only</access>
123817              <enumeratedValues>
123818                <enumeratedValue>
123819                  <name>0</name>
123820                  <description>No CRC error.</description>
123821                  <value>#0</value>
123822                </enumeratedValue>
123823                <enumeratedValue>
123824                  <name>1</name>
123825                  <description>CRC error met in Auto CMD12 response.</description>
123826                  <value>#1</value>
123827                </enumeratedValue>
123828              </enumeratedValues>
123829            </field>
123830            <field>
123831              <name>AC12IE</name>
123832              <description>Auto CMD12 Index Error</description>
123833              <bitOffset>4</bitOffset>
123834              <bitWidth>1</bitWidth>
123835              <access>read-only</access>
123836              <enumeratedValues>
123837                <enumeratedValue>
123838                  <name>0</name>
123839                  <description>No error.</description>
123840                  <value>#0</value>
123841                </enumeratedValue>
123842                <enumeratedValue>
123843                  <name>1</name>
123844                  <description>Error, the CMD index in response is not CMD12.</description>
123845                  <value>#1</value>
123846                </enumeratedValue>
123847              </enumeratedValues>
123848            </field>
123849            <field>
123850              <name>CNIBAC12E</name>
123851              <description>Command Not Issued By Auto CMD12 Error</description>
123852              <bitOffset>7</bitOffset>
123853              <bitWidth>1</bitWidth>
123854              <access>read-only</access>
123855              <enumeratedValues>
123856                <enumeratedValue>
123857                  <name>0</name>
123858                  <description>No error.</description>
123859                  <value>#0</value>
123860                </enumeratedValue>
123861                <enumeratedValue>
123862                  <name>1</name>
123863                  <description>Not issued.</description>
123864                  <value>#1</value>
123865                </enumeratedValue>
123866              </enumeratedValues>
123867            </field>
123868          </fields>
123869        </register>
123870        <register>
123871          <name>HTCAPBLT</name>
123872          <description>Host Controller Capabilities</description>
123873          <addressOffset>0x40</addressOffset>
123874          <size>32</size>
123875          <access>read-only</access>
123876          <resetValue>0x7F30000</resetValue>
123877          <resetMask>0xFFFFFFFF</resetMask>
123878          <fields>
123879            <field>
123880              <name>MBL</name>
123881              <description>Max Block Length</description>
123882              <bitOffset>16</bitOffset>
123883              <bitWidth>3</bitWidth>
123884              <access>read-only</access>
123885              <enumeratedValues>
123886                <enumeratedValue>
123887                  <name>000</name>
123888                  <description>512 bytes</description>
123889                  <value>#000</value>
123890                </enumeratedValue>
123891                <enumeratedValue>
123892                  <name>001</name>
123893                  <description>1024 bytes</description>
123894                  <value>#001</value>
123895                </enumeratedValue>
123896                <enumeratedValue>
123897                  <name>010</name>
123898                  <description>2048 bytes</description>
123899                  <value>#010</value>
123900                </enumeratedValue>
123901                <enumeratedValue>
123902                  <name>011</name>
123903                  <description>4096 bytes</description>
123904                  <value>#011</value>
123905                </enumeratedValue>
123906              </enumeratedValues>
123907            </field>
123908            <field>
123909              <name>ADMAS</name>
123910              <description>ADMA Support</description>
123911              <bitOffset>20</bitOffset>
123912              <bitWidth>1</bitWidth>
123913              <access>read-only</access>
123914              <enumeratedValues>
123915                <enumeratedValue>
123916                  <name>0</name>
123917                  <description>Advanced DMA not supported.</description>
123918                  <value>#0</value>
123919                </enumeratedValue>
123920                <enumeratedValue>
123921                  <name>1</name>
123922                  <description>Advanced DMA supported.</description>
123923                  <value>#1</value>
123924                </enumeratedValue>
123925              </enumeratedValues>
123926            </field>
123927            <field>
123928              <name>HSS</name>
123929              <description>High Speed Support</description>
123930              <bitOffset>21</bitOffset>
123931              <bitWidth>1</bitWidth>
123932              <access>read-only</access>
123933              <enumeratedValues>
123934                <enumeratedValue>
123935                  <name>0</name>
123936                  <description>High speed not supported.</description>
123937                  <value>#0</value>
123938                </enumeratedValue>
123939                <enumeratedValue>
123940                  <name>1</name>
123941                  <description>High speed supported.</description>
123942                  <value>#1</value>
123943                </enumeratedValue>
123944              </enumeratedValues>
123945            </field>
123946            <field>
123947              <name>DMAS</name>
123948              <description>DMA Support</description>
123949              <bitOffset>22</bitOffset>
123950              <bitWidth>1</bitWidth>
123951              <access>read-only</access>
123952              <enumeratedValues>
123953                <enumeratedValue>
123954                  <name>0</name>
123955                  <description>DMA not supported.</description>
123956                  <value>#0</value>
123957                </enumeratedValue>
123958                <enumeratedValue>
123959                  <name>1</name>
123960                  <description>DMA supported.</description>
123961                  <value>#1</value>
123962                </enumeratedValue>
123963              </enumeratedValues>
123964            </field>
123965            <field>
123966              <name>SRS</name>
123967              <description>Suspend/Resume Support</description>
123968              <bitOffset>23</bitOffset>
123969              <bitWidth>1</bitWidth>
123970              <access>read-only</access>
123971              <enumeratedValues>
123972                <enumeratedValue>
123973                  <name>0</name>
123974                  <description>Not supported.</description>
123975                  <value>#0</value>
123976                </enumeratedValue>
123977                <enumeratedValue>
123978                  <name>1</name>
123979                  <description>Supported.</description>
123980                  <value>#1</value>
123981                </enumeratedValue>
123982              </enumeratedValues>
123983            </field>
123984            <field>
123985              <name>VS33</name>
123986              <description>Voltage Support 3.3 V</description>
123987              <bitOffset>24</bitOffset>
123988              <bitWidth>1</bitWidth>
123989              <access>read-only</access>
123990              <enumeratedValues>
123991                <enumeratedValue>
123992                  <name>0</name>
123993                  <description>3.3 V not supported.</description>
123994                  <value>#0</value>
123995                </enumeratedValue>
123996                <enumeratedValue>
123997                  <name>1</name>
123998                  <description>3.3 V supported.</description>
123999                  <value>#1</value>
124000                </enumeratedValue>
124001              </enumeratedValues>
124002            </field>
124003          </fields>
124004        </register>
124005        <register>
124006          <name>WML</name>
124007          <description>Watermark Level Register</description>
124008          <addressOffset>0x44</addressOffset>
124009          <size>32</size>
124010          <access>read-write</access>
124011          <resetValue>0x100010</resetValue>
124012          <resetMask>0xFFFFFFFF</resetMask>
124013          <fields>
124014            <field>
124015              <name>RDWML</name>
124016              <description>Read Watermark Level</description>
124017              <bitOffset>0</bitOffset>
124018              <bitWidth>8</bitWidth>
124019              <access>read-write</access>
124020            </field>
124021            <field>
124022              <name>WRWML</name>
124023              <description>Write Watermark Level</description>
124024              <bitOffset>16</bitOffset>
124025              <bitWidth>8</bitWidth>
124026              <access>read-write</access>
124027            </field>
124028          </fields>
124029        </register>
124030        <register>
124031          <name>FEVT</name>
124032          <description>Force Event register</description>
124033          <addressOffset>0x50</addressOffset>
124034          <size>32</size>
124035          <access>write-only</access>
124036          <resetValue>0</resetValue>
124037          <resetMask>0xFFFFFFFF</resetMask>
124038          <fields>
124039            <field>
124040              <name>AC12NE</name>
124041              <description>Force Event Auto Command 12 Not Executed</description>
124042              <bitOffset>0</bitOffset>
124043              <bitWidth>1</bitWidth>
124044              <access>write-only</access>
124045            </field>
124046            <field>
124047              <name>AC12TOE</name>
124048              <description>Force Event Auto Command 12 Time Out Error</description>
124049              <bitOffset>1</bitOffset>
124050              <bitWidth>1</bitWidth>
124051              <access>write-only</access>
124052            </field>
124053            <field>
124054              <name>AC12CE</name>
124055              <description>Force Event Auto Command 12 CRC Error</description>
124056              <bitOffset>2</bitOffset>
124057              <bitWidth>1</bitWidth>
124058              <access>write-only</access>
124059            </field>
124060            <field>
124061              <name>AC12EBE</name>
124062              <description>Force Event Auto Command 12 End Bit Error</description>
124063              <bitOffset>3</bitOffset>
124064              <bitWidth>1</bitWidth>
124065              <access>write-only</access>
124066            </field>
124067            <field>
124068              <name>AC12IE</name>
124069              <description>Force Event Auto Command 12 Index Error</description>
124070              <bitOffset>4</bitOffset>
124071              <bitWidth>1</bitWidth>
124072              <access>write-only</access>
124073            </field>
124074            <field>
124075              <name>CNIBAC12E</name>
124076              <description>Force Event Command Not Executed By Auto Command 12 Error</description>
124077              <bitOffset>7</bitOffset>
124078              <bitWidth>1</bitWidth>
124079              <access>write-only</access>
124080            </field>
124081            <field>
124082              <name>CTOE</name>
124083              <description>Force Event Command Time Out Error</description>
124084              <bitOffset>16</bitOffset>
124085              <bitWidth>1</bitWidth>
124086              <access>write-only</access>
124087            </field>
124088            <field>
124089              <name>CCE</name>
124090              <description>Force Event Command CRC Error</description>
124091              <bitOffset>17</bitOffset>
124092              <bitWidth>1</bitWidth>
124093              <access>write-only</access>
124094            </field>
124095            <field>
124096              <name>CEBE</name>
124097              <description>Force Event Command End Bit Error</description>
124098              <bitOffset>18</bitOffset>
124099              <bitWidth>1</bitWidth>
124100              <access>write-only</access>
124101            </field>
124102            <field>
124103              <name>CIE</name>
124104              <description>Force Event Command Index Error</description>
124105              <bitOffset>19</bitOffset>
124106              <bitWidth>1</bitWidth>
124107              <access>write-only</access>
124108            </field>
124109            <field>
124110              <name>DTOE</name>
124111              <description>Force Event Data Time Out Error</description>
124112              <bitOffset>20</bitOffset>
124113              <bitWidth>1</bitWidth>
124114              <access>write-only</access>
124115            </field>
124116            <field>
124117              <name>DCE</name>
124118              <description>Force Event Data CRC Error</description>
124119              <bitOffset>21</bitOffset>
124120              <bitWidth>1</bitWidth>
124121              <access>write-only</access>
124122            </field>
124123            <field>
124124              <name>DEBE</name>
124125              <description>Force Event Data End Bit Error</description>
124126              <bitOffset>22</bitOffset>
124127              <bitWidth>1</bitWidth>
124128              <access>write-only</access>
124129            </field>
124130            <field>
124131              <name>AC12E</name>
124132              <description>Force Event Auto Command 12 Error</description>
124133              <bitOffset>24</bitOffset>
124134              <bitWidth>1</bitWidth>
124135              <access>write-only</access>
124136            </field>
124137            <field>
124138              <name>DMAE</name>
124139              <description>Force Event DMA Error</description>
124140              <bitOffset>28</bitOffset>
124141              <bitWidth>1</bitWidth>
124142              <access>write-only</access>
124143            </field>
124144            <field>
124145              <name>CINT</name>
124146              <description>Force Event Card Interrupt</description>
124147              <bitOffset>31</bitOffset>
124148              <bitWidth>1</bitWidth>
124149              <access>write-only</access>
124150            </field>
124151          </fields>
124152        </register>
124153        <register>
124154          <name>ADMAES</name>
124155          <description>ADMA Error Status register</description>
124156          <addressOffset>0x54</addressOffset>
124157          <size>32</size>
124158          <access>read-only</access>
124159          <resetValue>0</resetValue>
124160          <resetMask>0xFFFFFFFF</resetMask>
124161          <fields>
124162            <field>
124163              <name>ADMAES</name>
124164              <description>ADMA Error State (When ADMA Error Is Occurred.)</description>
124165              <bitOffset>0</bitOffset>
124166              <bitWidth>2</bitWidth>
124167              <access>read-only</access>
124168            </field>
124169            <field>
124170              <name>ADMALME</name>
124171              <description>ADMA Length Mismatch Error</description>
124172              <bitOffset>2</bitOffset>
124173              <bitWidth>1</bitWidth>
124174              <access>read-only</access>
124175              <enumeratedValues>
124176                <enumeratedValue>
124177                  <name>0</name>
124178                  <description>No error.</description>
124179                  <value>#0</value>
124180                </enumeratedValue>
124181                <enumeratedValue>
124182                  <name>1</name>
124183                  <description>Error.</description>
124184                  <value>#1</value>
124185                </enumeratedValue>
124186              </enumeratedValues>
124187            </field>
124188            <field>
124189              <name>ADMADCE</name>
124190              <description>ADMA Descriptor Error</description>
124191              <bitOffset>3</bitOffset>
124192              <bitWidth>1</bitWidth>
124193              <access>read-only</access>
124194              <enumeratedValues>
124195                <enumeratedValue>
124196                  <name>0</name>
124197                  <description>No error.</description>
124198                  <value>#0</value>
124199                </enumeratedValue>
124200                <enumeratedValue>
124201                  <name>1</name>
124202                  <description>Error.</description>
124203                  <value>#1</value>
124204                </enumeratedValue>
124205              </enumeratedValues>
124206            </field>
124207          </fields>
124208        </register>
124209        <register>
124210          <name>ADSADDR</name>
124211          <description>ADMA System Addressregister</description>
124212          <addressOffset>0x58</addressOffset>
124213          <size>32</size>
124214          <access>read-write</access>
124215          <resetValue>0</resetValue>
124216          <resetMask>0xFFFFFFFF</resetMask>
124217          <fields>
124218            <field>
124219              <name>ADSADDR</name>
124220              <description>ADMA System Address</description>
124221              <bitOffset>2</bitOffset>
124222              <bitWidth>30</bitWidth>
124223              <access>read-write</access>
124224            </field>
124225          </fields>
124226        </register>
124227        <register>
124228          <name>VENDOR</name>
124229          <description>Vendor Specific register</description>
124230          <addressOffset>0xC0</addressOffset>
124231          <size>32</size>
124232          <access>read-write</access>
124233          <resetValue>0x1</resetValue>
124234          <resetMask>0xFFFFFFFF</resetMask>
124235          <fields>
124236            <field>
124237              <name>EXBLKNU</name>
124238              <description>Exact Block Number Block Read Enable For SDIO CMD53</description>
124239              <bitOffset>1</bitOffset>
124240              <bitWidth>1</bitWidth>
124241              <access>read-write</access>
124242              <enumeratedValues>
124243                <enumeratedValue>
124244                  <name>0</name>
124245                  <description>None exact block read.</description>
124246                  <value>#0</value>
124247                </enumeratedValue>
124248                <enumeratedValue>
124249                  <name>1</name>
124250                  <description>Exact block read for SDIO CMD53.</description>
124251                  <value>#1</value>
124252                </enumeratedValue>
124253              </enumeratedValues>
124254            </field>
124255            <field>
124256              <name>INTSTVAL</name>
124257              <description>Internal State Value</description>
124258              <bitOffset>16</bitOffset>
124259              <bitWidth>8</bitWidth>
124260              <access>read-only</access>
124261            </field>
124262          </fields>
124263        </register>
124264        <register>
124265          <name>MMCBOOT</name>
124266          <description>MMC Boot register</description>
124267          <addressOffset>0xC4</addressOffset>
124268          <size>32</size>
124269          <access>read-write</access>
124270          <resetValue>0</resetValue>
124271          <resetMask>0xFFFFFFFF</resetMask>
124272          <fields>
124273            <field>
124274              <name>DTOCVACK</name>
124275              <description>Boot ACK Time Out Counter Value</description>
124276              <bitOffset>0</bitOffset>
124277              <bitWidth>4</bitWidth>
124278              <access>read-write</access>
124279              <enumeratedValues>
124280                <enumeratedValue>
124281                  <name>0000</name>
124282                  <description>SDCLK x 2^8</description>
124283                  <value>#0000</value>
124284                </enumeratedValue>
124285                <enumeratedValue>
124286                  <name>0001</name>
124287                  <description>SDCLK x 2^9</description>
124288                  <value>#0001</value>
124289                </enumeratedValue>
124290                <enumeratedValue>
124291                  <name>0010</name>
124292                  <description>SDCLK x 2^10</description>
124293                  <value>#0010</value>
124294                </enumeratedValue>
124295                <enumeratedValue>
124296                  <name>0011</name>
124297                  <description>SDCLK x 2^11</description>
124298                  <value>#0011</value>
124299                </enumeratedValue>
124300                <enumeratedValue>
124301                  <name>0100</name>
124302                  <description>SDCLK x 2^12</description>
124303                  <value>#0100</value>
124304                </enumeratedValue>
124305                <enumeratedValue>
124306                  <name>0101</name>
124307                  <description>SDCLK x 2^13</description>
124308                  <value>#0101</value>
124309                </enumeratedValue>
124310                <enumeratedValue>
124311                  <name>0110</name>
124312                  <description>SDCLK x 2^14</description>
124313                  <value>#0110</value>
124314                </enumeratedValue>
124315                <enumeratedValue>
124316                  <name>0111</name>
124317                  <description>SDCLK x 2^15</description>
124318                  <value>#0111</value>
124319                </enumeratedValue>
124320                <enumeratedValue>
124321                  <name>1110</name>
124322                  <description>SDCLK x 2^22</description>
124323                  <value>#1110</value>
124324                </enumeratedValue>
124325              </enumeratedValues>
124326            </field>
124327            <field>
124328              <name>BOOTACK</name>
124329              <description>Boot Ack Mode Select</description>
124330              <bitOffset>4</bitOffset>
124331              <bitWidth>1</bitWidth>
124332              <access>read-write</access>
124333              <enumeratedValues>
124334                <enumeratedValue>
124335                  <name>0</name>
124336                  <description>No ack.</description>
124337                  <value>#0</value>
124338                </enumeratedValue>
124339                <enumeratedValue>
124340                  <name>1</name>
124341                  <description>Ack.</description>
124342                  <value>#1</value>
124343                </enumeratedValue>
124344              </enumeratedValues>
124345            </field>
124346            <field>
124347              <name>BOOTMODE</name>
124348              <description>Boot Mode Select</description>
124349              <bitOffset>5</bitOffset>
124350              <bitWidth>1</bitWidth>
124351              <access>read-write</access>
124352              <enumeratedValues>
124353                <enumeratedValue>
124354                  <name>0</name>
124355                  <description>Normal boot.</description>
124356                  <value>#0</value>
124357                </enumeratedValue>
124358                <enumeratedValue>
124359                  <name>1</name>
124360                  <description>Alternative boot.</description>
124361                  <value>#1</value>
124362                </enumeratedValue>
124363              </enumeratedValues>
124364            </field>
124365            <field>
124366              <name>BOOTEN</name>
124367              <description>Boot Mode Enable</description>
124368              <bitOffset>6</bitOffset>
124369              <bitWidth>1</bitWidth>
124370              <access>read-write</access>
124371              <enumeratedValues>
124372                <enumeratedValue>
124373                  <name>0</name>
124374                  <description>Fast boot disable.</description>
124375                  <value>#0</value>
124376                </enumeratedValue>
124377                <enumeratedValue>
124378                  <name>1</name>
124379                  <description>Fast boot enable.</description>
124380                  <value>#1</value>
124381                </enumeratedValue>
124382              </enumeratedValues>
124383            </field>
124384            <field>
124385              <name>AUTOSABGEN</name>
124386              <description>When boot, enable auto stop at block gap function</description>
124387              <bitOffset>7</bitOffset>
124388              <bitWidth>1</bitWidth>
124389              <access>read-write</access>
124390            </field>
124391            <field>
124392              <name>BOOTBLKCNT</name>
124393              <description>Defines the stop at block gap value of automatic mode</description>
124394              <bitOffset>16</bitOffset>
124395              <bitWidth>16</bitWidth>
124396              <access>read-write</access>
124397            </field>
124398          </fields>
124399        </register>
124400        <register>
124401          <name>HOSTVER</name>
124402          <description>Host Controller Version</description>
124403          <addressOffset>0xFC</addressOffset>
124404          <size>32</size>
124405          <access>read-only</access>
124406          <resetValue>0x1201</resetValue>
124407          <resetMask>0xFFFFFFFF</resetMask>
124408          <fields>
124409            <field>
124410              <name>SVN</name>
124411              <description>Specification Version Number</description>
124412              <bitOffset>0</bitOffset>
124413              <bitWidth>8</bitWidth>
124414              <access>read-only</access>
124415              <enumeratedValues>
124416                <enumeratedValue>
124417                  <name>1</name>
124418                  <description>SD host specification version 2.0, supports test event register and ADMA.</description>
124419                  <value>#1</value>
124420                </enumeratedValue>
124421              </enumeratedValues>
124422            </field>
124423            <field>
124424              <name>VVN</name>
124425              <description>Vendor Version Number</description>
124426              <bitOffset>8</bitOffset>
124427              <bitWidth>8</bitWidth>
124428              <access>read-only</access>
124429              <enumeratedValues>
124430                <enumeratedValue>
124431                  <name>0</name>
124432                  <description>Freescale SDHC version 1.0</description>
124433                  <value>#0</value>
124434                </enumeratedValue>
124435                <enumeratedValue>
124436                  <name>10000</name>
124437                  <description>Freescale SDHC version 2.0</description>
124438                  <value>#10000</value>
124439                </enumeratedValue>
124440                <enumeratedValue>
124441                  <name>10001</name>
124442                  <description>Freescale SDHC version 2.1</description>
124443                  <value>#10001</value>
124444                </enumeratedValue>
124445                <enumeratedValue>
124446                  <name>10010</name>
124447                  <description>Freescale SDHC version 2.2</description>
124448                  <value>#10010</value>
124449                </enumeratedValue>
124450              </enumeratedValues>
124451            </field>
124452          </fields>
124453        </register>
124454      </registers>
124455    </peripheral>
124456    <peripheral>
124457      <name>LPUART0</name>
124458      <description>Universal Asynchronous Receiver/Transmitter</description>
124459      <groupName>LPUART</groupName>
124460      <prependToName>LPUART0_</prependToName>
124461      <baseAddress>0x400C4000</baseAddress>
124462      <addressBlock>
124463        <offset>0</offset>
124464        <size>0x20</size>
124465        <usage>registers</usage>
124466      </addressBlock>
124467      <interrupt>
124468        <name>LPUART0</name>
124469        <value>30</value>
124470      </interrupt>
124471      <registers>
124472        <register>
124473          <name>BAUD</name>
124474          <description>LPUART Baud Rate Register</description>
124475          <addressOffset>0</addressOffset>
124476          <size>32</size>
124477          <access>read-write</access>
124478          <resetValue>0xF000004</resetValue>
124479          <resetMask>0xFFFFFFFF</resetMask>
124480          <fields>
124481            <field>
124482              <name>SBR</name>
124483              <description>Baud Rate Modulo Divisor.</description>
124484              <bitOffset>0</bitOffset>
124485              <bitWidth>13</bitWidth>
124486              <access>read-write</access>
124487            </field>
124488            <field>
124489              <name>SBNS</name>
124490              <description>Stop Bit Number Select</description>
124491              <bitOffset>13</bitOffset>
124492              <bitWidth>1</bitWidth>
124493              <access>read-write</access>
124494              <enumeratedValues>
124495                <enumeratedValue>
124496                  <name>0</name>
124497                  <description>One stop bit.</description>
124498                  <value>#0</value>
124499                </enumeratedValue>
124500                <enumeratedValue>
124501                  <name>1</name>
124502                  <description>Two stop bits.</description>
124503                  <value>#1</value>
124504                </enumeratedValue>
124505              </enumeratedValues>
124506            </field>
124507            <field>
124508              <name>RXEDGIE</name>
124509              <description>RX Input Active Edge Interrupt Enable</description>
124510              <bitOffset>14</bitOffset>
124511              <bitWidth>1</bitWidth>
124512              <access>read-write</access>
124513              <enumeratedValues>
124514                <enumeratedValue>
124515                  <name>0</name>
124516                  <description>Hardware interrupts from LPUART_STAT[RXEDGIF] disabled (use polling).</description>
124517                  <value>#0</value>
124518                </enumeratedValue>
124519                <enumeratedValue>
124520                  <name>1</name>
124521                  <description>Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1.</description>
124522                  <value>#1</value>
124523                </enumeratedValue>
124524              </enumeratedValues>
124525            </field>
124526            <field>
124527              <name>LBKDIE</name>
124528              <description>LIN Break Detect Interrupt Enable</description>
124529              <bitOffset>15</bitOffset>
124530              <bitWidth>1</bitWidth>
124531              <access>read-write</access>
124532              <enumeratedValues>
124533                <enumeratedValue>
124534                  <name>0</name>
124535                  <description>Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling).</description>
124536                  <value>#0</value>
124537                </enumeratedValue>
124538                <enumeratedValue>
124539                  <name>1</name>
124540                  <description>Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1.</description>
124541                  <value>#1</value>
124542                </enumeratedValue>
124543              </enumeratedValues>
124544            </field>
124545            <field>
124546              <name>RESYNCDIS</name>
124547              <description>Resynchronization Disable</description>
124548              <bitOffset>16</bitOffset>
124549              <bitWidth>1</bitWidth>
124550              <access>read-write</access>
124551              <enumeratedValues>
124552                <enumeratedValue>
124553                  <name>0</name>
124554                  <description>Resynchronization during received data word is supported</description>
124555                  <value>#0</value>
124556                </enumeratedValue>
124557                <enumeratedValue>
124558                  <name>1</name>
124559                  <description>Resynchronization during received data word is disabled</description>
124560                  <value>#1</value>
124561                </enumeratedValue>
124562              </enumeratedValues>
124563            </field>
124564            <field>
124565              <name>BOTHEDGE</name>
124566              <description>Both Edge Sampling</description>
124567              <bitOffset>17</bitOffset>
124568              <bitWidth>1</bitWidth>
124569              <access>read-write</access>
124570              <enumeratedValues>
124571                <enumeratedValue>
124572                  <name>0</name>
124573                  <description>Receiver samples input data using the rising edge of the baud rate clock.</description>
124574                  <value>#0</value>
124575                </enumeratedValue>
124576                <enumeratedValue>
124577                  <name>1</name>
124578                  <description>Receiver samples input data using the rising and falling edge of the baud rate clock.</description>
124579                  <value>#1</value>
124580                </enumeratedValue>
124581              </enumeratedValues>
124582            </field>
124583            <field>
124584              <name>MATCFG</name>
124585              <description>Match Configuration</description>
124586              <bitOffset>18</bitOffset>
124587              <bitWidth>2</bitWidth>
124588              <access>read-write</access>
124589              <enumeratedValues>
124590                <enumeratedValue>
124591                  <name>00</name>
124592                  <description>Address Match Wakeup</description>
124593                  <value>#00</value>
124594                </enumeratedValue>
124595                <enumeratedValue>
124596                  <name>01</name>
124597                  <description>Idle Match Wakeup</description>
124598                  <value>#01</value>
124599                </enumeratedValue>
124600                <enumeratedValue>
124601                  <name>10</name>
124602                  <description>Match On and Match Off</description>
124603                  <value>#10</value>
124604                </enumeratedValue>
124605                <enumeratedValue>
124606                  <name>11</name>
124607                  <description>Enables RWU on Data Match and Match On/Off for transmitter CTS input</description>
124608                  <value>#11</value>
124609                </enumeratedValue>
124610              </enumeratedValues>
124611            </field>
124612            <field>
124613              <name>RDMAE</name>
124614              <description>Receiver Full DMA Enable</description>
124615              <bitOffset>21</bitOffset>
124616              <bitWidth>1</bitWidth>
124617              <access>read-write</access>
124618              <enumeratedValues>
124619                <enumeratedValue>
124620                  <name>0</name>
124621                  <description>DMA request disabled.</description>
124622                  <value>#0</value>
124623                </enumeratedValue>
124624                <enumeratedValue>
124625                  <name>1</name>
124626                  <description>DMA request enabled.</description>
124627                  <value>#1</value>
124628                </enumeratedValue>
124629              </enumeratedValues>
124630            </field>
124631            <field>
124632              <name>TDMAE</name>
124633              <description>Transmitter DMA Enable</description>
124634              <bitOffset>23</bitOffset>
124635              <bitWidth>1</bitWidth>
124636              <access>read-write</access>
124637              <enumeratedValues>
124638                <enumeratedValue>
124639                  <name>0</name>
124640                  <description>DMA request disabled.</description>
124641                  <value>#0</value>
124642                </enumeratedValue>
124643                <enumeratedValue>
124644                  <name>1</name>
124645                  <description>DMA request enabled.</description>
124646                  <value>#1</value>
124647                </enumeratedValue>
124648              </enumeratedValues>
124649            </field>
124650            <field>
124651              <name>OSR</name>
124652              <description>Over Sampling Ratio</description>
124653              <bitOffset>24</bitOffset>
124654              <bitWidth>5</bitWidth>
124655              <access>read-write</access>
124656            </field>
124657            <field>
124658              <name>M10</name>
124659              <description>10-bit Mode select</description>
124660              <bitOffset>29</bitOffset>
124661              <bitWidth>1</bitWidth>
124662              <access>read-write</access>
124663              <enumeratedValues>
124664                <enumeratedValue>
124665                  <name>0</name>
124666                  <description>Receiver and transmitter use 8-bit or 9-bit data characters.</description>
124667                  <value>#0</value>
124668                </enumeratedValue>
124669                <enumeratedValue>
124670                  <name>1</name>
124671                  <description>Receiver and transmitter use 10-bit data characters.</description>
124672                  <value>#1</value>
124673                </enumeratedValue>
124674              </enumeratedValues>
124675            </field>
124676            <field>
124677              <name>MAEN2</name>
124678              <description>Match Address Mode Enable 2</description>
124679              <bitOffset>30</bitOffset>
124680              <bitWidth>1</bitWidth>
124681              <access>read-write</access>
124682              <enumeratedValues>
124683                <enumeratedValue>
124684                  <name>0</name>
124685                  <description>Normal operation.</description>
124686                  <value>#0</value>
124687                </enumeratedValue>
124688                <enumeratedValue>
124689                  <name>1</name>
124690                  <description>Enables automatic address matching or data matching mode for MATCH[MA2].</description>
124691                  <value>#1</value>
124692                </enumeratedValue>
124693              </enumeratedValues>
124694            </field>
124695            <field>
124696              <name>MAEN1</name>
124697              <description>Match Address Mode Enable 1</description>
124698              <bitOffset>31</bitOffset>
124699              <bitWidth>1</bitWidth>
124700              <access>read-write</access>
124701              <enumeratedValues>
124702                <enumeratedValue>
124703                  <name>0</name>
124704                  <description>Normal operation.</description>
124705                  <value>#0</value>
124706                </enumeratedValue>
124707                <enumeratedValue>
124708                  <name>1</name>
124709                  <description>Enables automatic address matching or data matching mode for MATCH[MA1].</description>
124710                  <value>#1</value>
124711                </enumeratedValue>
124712              </enumeratedValues>
124713            </field>
124714          </fields>
124715        </register>
124716        <register>
124717          <name>STAT</name>
124718          <description>LPUART Status Register</description>
124719          <addressOffset>0x4</addressOffset>
124720          <size>32</size>
124721          <access>read-write</access>
124722          <resetValue>0xC00000</resetValue>
124723          <resetMask>0xFFFFFFFF</resetMask>
124724          <fields>
124725            <field>
124726              <name>MA2F</name>
124727              <description>Match 2 Flag</description>
124728              <bitOffset>14</bitOffset>
124729              <bitWidth>1</bitWidth>
124730              <access>read-write</access>
124731              <enumeratedValues>
124732                <enumeratedValue>
124733                  <name>0</name>
124734                  <description>Received data is not equal to MA2</description>
124735                  <value>#0</value>
124736                </enumeratedValue>
124737                <enumeratedValue>
124738                  <name>1</name>
124739                  <description>Received data is equal to MA2</description>
124740                  <value>#1</value>
124741                </enumeratedValue>
124742              </enumeratedValues>
124743            </field>
124744            <field>
124745              <name>MA1F</name>
124746              <description>Match 1 Flag</description>
124747              <bitOffset>15</bitOffset>
124748              <bitWidth>1</bitWidth>
124749              <access>read-write</access>
124750              <enumeratedValues>
124751                <enumeratedValue>
124752                  <name>0</name>
124753                  <description>Received data is not equal to MA1</description>
124754                  <value>#0</value>
124755                </enumeratedValue>
124756                <enumeratedValue>
124757                  <name>1</name>
124758                  <description>Received data is equal to MA1</description>
124759                  <value>#1</value>
124760                </enumeratedValue>
124761              </enumeratedValues>
124762            </field>
124763            <field>
124764              <name>PF</name>
124765              <description>Parity Error Flag</description>
124766              <bitOffset>16</bitOffset>
124767              <bitWidth>1</bitWidth>
124768              <access>read-write</access>
124769              <enumeratedValues>
124770                <enumeratedValue>
124771                  <name>0</name>
124772                  <description>No parity error.</description>
124773                  <value>#0</value>
124774                </enumeratedValue>
124775                <enumeratedValue>
124776                  <name>1</name>
124777                  <description>Parity error.</description>
124778                  <value>#1</value>
124779                </enumeratedValue>
124780              </enumeratedValues>
124781            </field>
124782            <field>
124783              <name>FE</name>
124784              <description>Framing Error Flag</description>
124785              <bitOffset>17</bitOffset>
124786              <bitWidth>1</bitWidth>
124787              <access>read-write</access>
124788              <enumeratedValues>
124789                <enumeratedValue>
124790                  <name>0</name>
124791                  <description>No framing error detected. This does not guarantee the framing is correct.</description>
124792                  <value>#0</value>
124793                </enumeratedValue>
124794                <enumeratedValue>
124795                  <name>1</name>
124796                  <description>Framing error.</description>
124797                  <value>#1</value>
124798                </enumeratedValue>
124799              </enumeratedValues>
124800            </field>
124801            <field>
124802              <name>NF</name>
124803              <description>Noise Flag</description>
124804              <bitOffset>18</bitOffset>
124805              <bitWidth>1</bitWidth>
124806              <access>read-write</access>
124807              <enumeratedValues>
124808                <enumeratedValue>
124809                  <name>0</name>
124810                  <description>No noise detected.</description>
124811                  <value>#0</value>
124812                </enumeratedValue>
124813                <enumeratedValue>
124814                  <name>1</name>
124815                  <description>Noise detected in the received character in LPUART_DATA.</description>
124816                  <value>#1</value>
124817                </enumeratedValue>
124818              </enumeratedValues>
124819            </field>
124820            <field>
124821              <name>OR</name>
124822              <description>Receiver Overrun Flag</description>
124823              <bitOffset>19</bitOffset>
124824              <bitWidth>1</bitWidth>
124825              <access>read-write</access>
124826              <enumeratedValues>
124827                <enumeratedValue>
124828                  <name>0</name>
124829                  <description>No overrun.</description>
124830                  <value>#0</value>
124831                </enumeratedValue>
124832                <enumeratedValue>
124833                  <name>1</name>
124834                  <description>Receive overrun (new LPUART data lost).</description>
124835                  <value>#1</value>
124836                </enumeratedValue>
124837              </enumeratedValues>
124838            </field>
124839            <field>
124840              <name>IDLE</name>
124841              <description>Idle Line Flag</description>
124842              <bitOffset>20</bitOffset>
124843              <bitWidth>1</bitWidth>
124844              <access>read-write</access>
124845              <enumeratedValues>
124846                <enumeratedValue>
124847                  <name>0</name>
124848                  <description>No idle line detected.</description>
124849                  <value>#0</value>
124850                </enumeratedValue>
124851                <enumeratedValue>
124852                  <name>1</name>
124853                  <description>Idle line was detected.</description>
124854                  <value>#1</value>
124855                </enumeratedValue>
124856              </enumeratedValues>
124857            </field>
124858            <field>
124859              <name>RDRF</name>
124860              <description>Receive Data Register Full Flag</description>
124861              <bitOffset>21</bitOffset>
124862              <bitWidth>1</bitWidth>
124863              <access>read-only</access>
124864              <enumeratedValues>
124865                <enumeratedValue>
124866                  <name>0</name>
124867                  <description>Receive data buffer empty.</description>
124868                  <value>#0</value>
124869                </enumeratedValue>
124870                <enumeratedValue>
124871                  <name>1</name>
124872                  <description>Receive data buffer full.</description>
124873                  <value>#1</value>
124874                </enumeratedValue>
124875              </enumeratedValues>
124876            </field>
124877            <field>
124878              <name>TC</name>
124879              <description>Transmission Complete Flag</description>
124880              <bitOffset>22</bitOffset>
124881              <bitWidth>1</bitWidth>
124882              <access>read-only</access>
124883              <enumeratedValues>
124884                <enumeratedValue>
124885                  <name>0</name>
124886                  <description>Transmitter active (sending data, a preamble, or a break).</description>
124887                  <value>#0</value>
124888                </enumeratedValue>
124889                <enumeratedValue>
124890                  <name>1</name>
124891                  <description>Transmitter idle (transmission activity complete).</description>
124892                  <value>#1</value>
124893                </enumeratedValue>
124894              </enumeratedValues>
124895            </field>
124896            <field>
124897              <name>TDRE</name>
124898              <description>Transmit Data Register Empty Flag</description>
124899              <bitOffset>23</bitOffset>
124900              <bitWidth>1</bitWidth>
124901              <access>read-only</access>
124902              <enumeratedValues>
124903                <enumeratedValue>
124904                  <name>0</name>
124905                  <description>Transmit data buffer full.</description>
124906                  <value>#0</value>
124907                </enumeratedValue>
124908                <enumeratedValue>
124909                  <name>1</name>
124910                  <description>Transmit data buffer empty.</description>
124911                  <value>#1</value>
124912                </enumeratedValue>
124913              </enumeratedValues>
124914            </field>
124915            <field>
124916              <name>RAF</name>
124917              <description>Receiver Active Flag</description>
124918              <bitOffset>24</bitOffset>
124919              <bitWidth>1</bitWidth>
124920              <access>read-only</access>
124921              <enumeratedValues>
124922                <enumeratedValue>
124923                  <name>0</name>
124924                  <description>LPUART receiver idle waiting for a start bit.</description>
124925                  <value>#0</value>
124926                </enumeratedValue>
124927                <enumeratedValue>
124928                  <name>1</name>
124929                  <description>LPUART receiver active (LPUART_RX input not idle).</description>
124930                  <value>#1</value>
124931                </enumeratedValue>
124932              </enumeratedValues>
124933            </field>
124934            <field>
124935              <name>LBKDE</name>
124936              <description>LIN Break Detection Enable</description>
124937              <bitOffset>25</bitOffset>
124938              <bitWidth>1</bitWidth>
124939              <access>read-write</access>
124940              <enumeratedValues>
124941                <enumeratedValue>
124942                  <name>0</name>
124943                  <description>Break character is detected at length 10 bit times (if M = 0, SBNS = 0) or 11 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 12 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 13 (if M10 = 1, SNBS = 1).</description>
124944                  <value>#0</value>
124945                </enumeratedValue>
124946                <enumeratedValue>
124947                  <name>1</name>
124948                  <description>Break character is detected at length of 11 bit times (if M = 0, SBNS = 0) or 12 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 14 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 15 (if M10 = 1, SNBS = 1).</description>
124949                  <value>#1</value>
124950                </enumeratedValue>
124951              </enumeratedValues>
124952            </field>
124953            <field>
124954              <name>BRK13</name>
124955              <description>Break Character Generation Length</description>
124956              <bitOffset>26</bitOffset>
124957              <bitWidth>1</bitWidth>
124958              <access>read-write</access>
124959              <enumeratedValues>
124960                <enumeratedValue>
124961                  <name>0</name>
124962                  <description>Break character is transmitted with length of 10 bit times (if M = 0, SBNS = 0) or 11 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 12 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 13 (if M10 = 1, SNBS = 1).</description>
124963                  <value>#0</value>
124964                </enumeratedValue>
124965                <enumeratedValue>
124966                  <name>1</name>
124967                  <description>Break character is transmitted with length of 13 bit times (if M = 0, SBNS = 0) or 14 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 15 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 16 (if M10 = 1, SNBS = 1).</description>
124968                  <value>#1</value>
124969                </enumeratedValue>
124970              </enumeratedValues>
124971            </field>
124972            <field>
124973              <name>RWUID</name>
124974              <description>Receive Wake Up Idle Detect</description>
124975              <bitOffset>27</bitOffset>
124976              <bitWidth>1</bitWidth>
124977              <access>read-write</access>
124978              <enumeratedValues>
124979                <enumeratedValue>
124980                  <name>0</name>
124981                  <description>During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not get set when an address does not match.</description>
124982                  <value>#0</value>
124983                </enumeratedValue>
124984                <enumeratedValue>
124985                  <name>1</name>
124986                  <description>During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does get set when an address does not match.</description>
124987                  <value>#1</value>
124988                </enumeratedValue>
124989              </enumeratedValues>
124990            </field>
124991            <field>
124992              <name>RXINV</name>
124993              <description>Receive Data Inversion</description>
124994              <bitOffset>28</bitOffset>
124995              <bitWidth>1</bitWidth>
124996              <access>read-write</access>
124997              <enumeratedValues>
124998                <enumeratedValue>
124999                  <name>0</name>
125000                  <description>Receive data not inverted.</description>
125001                  <value>#0</value>
125002                </enumeratedValue>
125003                <enumeratedValue>
125004                  <name>1</name>
125005                  <description>Receive data inverted.</description>
125006                  <value>#1</value>
125007                </enumeratedValue>
125008              </enumeratedValues>
125009            </field>
125010            <field>
125011              <name>MSBF</name>
125012              <description>MSB First</description>
125013              <bitOffset>29</bitOffset>
125014              <bitWidth>1</bitWidth>
125015              <access>read-write</access>
125016              <enumeratedValues>
125017                <enumeratedValue>
125018                  <name>0</name>
125019                  <description>LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0.</description>
125020                  <value>#0</value>
125021                </enumeratedValue>
125022                <enumeratedValue>
125023                  <name>1</name>
125024                  <description>MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE].</description>
125025                  <value>#1</value>
125026                </enumeratedValue>
125027              </enumeratedValues>
125028            </field>
125029            <field>
125030              <name>RXEDGIF</name>
125031              <description>LPUART_RX Pin Active Edge Interrupt Flag</description>
125032              <bitOffset>30</bitOffset>
125033              <bitWidth>1</bitWidth>
125034              <access>read-write</access>
125035              <enumeratedValues>
125036                <enumeratedValue>
125037                  <name>0</name>
125038                  <description>No active edge on the receive pin has occurred.</description>
125039                  <value>#0</value>
125040                </enumeratedValue>
125041                <enumeratedValue>
125042                  <name>1</name>
125043                  <description>An active edge on the receive pin has occurred.</description>
125044                  <value>#1</value>
125045                </enumeratedValue>
125046              </enumeratedValues>
125047            </field>
125048            <field>
125049              <name>LBKDIF</name>
125050              <description>LIN Break Detect Interrupt Flag</description>
125051              <bitOffset>31</bitOffset>
125052              <bitWidth>1</bitWidth>
125053              <access>read-write</access>
125054              <enumeratedValues>
125055                <enumeratedValue>
125056                  <name>0</name>
125057                  <description>No LIN break character has been detected.</description>
125058                  <value>#0</value>
125059                </enumeratedValue>
125060                <enumeratedValue>
125061                  <name>1</name>
125062                  <description>LIN break character has been detected.</description>
125063                  <value>#1</value>
125064                </enumeratedValue>
125065              </enumeratedValues>
125066            </field>
125067          </fields>
125068        </register>
125069        <register>
125070          <name>CTRL</name>
125071          <description>LPUART Control Register</description>
125072          <addressOffset>0x8</addressOffset>
125073          <size>32</size>
125074          <access>read-write</access>
125075          <resetValue>0</resetValue>
125076          <resetMask>0xFFFFFFFF</resetMask>
125077          <fields>
125078            <field>
125079              <name>PT</name>
125080              <description>Parity Type</description>
125081              <bitOffset>0</bitOffset>
125082              <bitWidth>1</bitWidth>
125083              <access>read-write</access>
125084              <enumeratedValues>
125085                <enumeratedValue>
125086                  <name>0</name>
125087                  <description>Even parity.</description>
125088                  <value>#0</value>
125089                </enumeratedValue>
125090                <enumeratedValue>
125091                  <name>1</name>
125092                  <description>Odd parity.</description>
125093                  <value>#1</value>
125094                </enumeratedValue>
125095              </enumeratedValues>
125096            </field>
125097            <field>
125098              <name>PE</name>
125099              <description>Parity Enable</description>
125100              <bitOffset>1</bitOffset>
125101              <bitWidth>1</bitWidth>
125102              <access>read-write</access>
125103              <enumeratedValues>
125104                <enumeratedValue>
125105                  <name>0</name>
125106                  <description>No hardware parity generation or checking.</description>
125107                  <value>#0</value>
125108                </enumeratedValue>
125109                <enumeratedValue>
125110                  <name>1</name>
125111                  <description>Parity enabled.</description>
125112                  <value>#1</value>
125113                </enumeratedValue>
125114              </enumeratedValues>
125115            </field>
125116            <field>
125117              <name>ILT</name>
125118              <description>Idle Line Type Select</description>
125119              <bitOffset>2</bitOffset>
125120              <bitWidth>1</bitWidth>
125121              <access>read-write</access>
125122              <enumeratedValues>
125123                <enumeratedValue>
125124                  <name>0</name>
125125                  <description>Idle character bit count starts after start bit.</description>
125126                  <value>#0</value>
125127                </enumeratedValue>
125128                <enumeratedValue>
125129                  <name>1</name>
125130                  <description>Idle character bit count starts after stop bit.</description>
125131                  <value>#1</value>
125132                </enumeratedValue>
125133              </enumeratedValues>
125134            </field>
125135            <field>
125136              <name>WAKE</name>
125137              <description>Receiver Wakeup Method Select</description>
125138              <bitOffset>3</bitOffset>
125139              <bitWidth>1</bitWidth>
125140              <access>read-write</access>
125141              <enumeratedValues>
125142                <enumeratedValue>
125143                  <name>0</name>
125144                  <description>Configures RWU for idle-line wakeup.</description>
125145                  <value>#0</value>
125146                </enumeratedValue>
125147                <enumeratedValue>
125148                  <name>1</name>
125149                  <description>Configures RWU with address-mark wakeup.</description>
125150                  <value>#1</value>
125151                </enumeratedValue>
125152              </enumeratedValues>
125153            </field>
125154            <field>
125155              <name>M</name>
125156              <description>9-Bit or 8-Bit Mode Select</description>
125157              <bitOffset>4</bitOffset>
125158              <bitWidth>1</bitWidth>
125159              <access>read-write</access>
125160              <enumeratedValues>
125161                <enumeratedValue>
125162                  <name>0</name>
125163                  <description>Receiver and transmitter use 8-bit data characters.</description>
125164                  <value>#0</value>
125165                </enumeratedValue>
125166                <enumeratedValue>
125167                  <name>1</name>
125168                  <description>Receiver and transmitter use 9-bit data characters.</description>
125169                  <value>#1</value>
125170                </enumeratedValue>
125171              </enumeratedValues>
125172            </field>
125173            <field>
125174              <name>RSRC</name>
125175              <description>Receiver Source Select</description>
125176              <bitOffset>5</bitOffset>
125177              <bitWidth>1</bitWidth>
125178              <access>read-write</access>
125179              <enumeratedValues>
125180                <enumeratedValue>
125181                  <name>0</name>
125182                  <description>Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the LPUART_RX pin.</description>
125183                  <value>#0</value>
125184                </enumeratedValue>
125185                <enumeratedValue>
125186                  <name>1</name>
125187                  <description>Single-wire LPUART mode where the LPUART_TX pin is connected to the transmitter output and receiver input.</description>
125188                  <value>#1</value>
125189                </enumeratedValue>
125190              </enumeratedValues>
125191            </field>
125192            <field>
125193              <name>DOZEEN</name>
125194              <description>Doze Enable</description>
125195              <bitOffset>6</bitOffset>
125196              <bitWidth>1</bitWidth>
125197              <access>read-write</access>
125198              <enumeratedValues>
125199                <enumeratedValue>
125200                  <name>0</name>
125201                  <description>LPUART is enabled in Doze mode.</description>
125202                  <value>#0</value>
125203                </enumeratedValue>
125204                <enumeratedValue>
125205                  <name>1</name>
125206                  <description>LPUART is disabled in Doze mode.</description>
125207                  <value>#1</value>
125208                </enumeratedValue>
125209              </enumeratedValues>
125210            </field>
125211            <field>
125212              <name>LOOPS</name>
125213              <description>Loop Mode Select</description>
125214              <bitOffset>7</bitOffset>
125215              <bitWidth>1</bitWidth>
125216              <access>read-write</access>
125217              <enumeratedValues>
125218                <enumeratedValue>
125219                  <name>0</name>
125220                  <description>Normal operation - LPUART_RX and LPUART_TX use separate pins.</description>
125221                  <value>#0</value>
125222                </enumeratedValue>
125223                <enumeratedValue>
125224                  <name>1</name>
125225                  <description>Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit).</description>
125226                  <value>#1</value>
125227                </enumeratedValue>
125228              </enumeratedValues>
125229            </field>
125230            <field>
125231              <name>IDLECFG</name>
125232              <description>Idle Configuration</description>
125233              <bitOffset>8</bitOffset>
125234              <bitWidth>3</bitWidth>
125235              <access>read-write</access>
125236              <enumeratedValues>
125237                <enumeratedValue>
125238                  <name>000</name>
125239                  <description>1 idle character</description>
125240                  <value>#000</value>
125241                </enumeratedValue>
125242                <enumeratedValue>
125243                  <name>001</name>
125244                  <description>2 idle characters</description>
125245                  <value>#001</value>
125246                </enumeratedValue>
125247                <enumeratedValue>
125248                  <name>010</name>
125249                  <description>4 idle characters</description>
125250                  <value>#010</value>
125251                </enumeratedValue>
125252                <enumeratedValue>
125253                  <name>011</name>
125254                  <description>8 idle characters</description>
125255                  <value>#011</value>
125256                </enumeratedValue>
125257                <enumeratedValue>
125258                  <name>100</name>
125259                  <description>16 idle characters</description>
125260                  <value>#100</value>
125261                </enumeratedValue>
125262                <enumeratedValue>
125263                  <name>101</name>
125264                  <description>32 idle characters</description>
125265                  <value>#101</value>
125266                </enumeratedValue>
125267                <enumeratedValue>
125268                  <name>110</name>
125269                  <description>64 idle characters</description>
125270                  <value>#110</value>
125271                </enumeratedValue>
125272                <enumeratedValue>
125273                  <name>111</name>
125274                  <description>128 idle characters</description>
125275                  <value>#111</value>
125276                </enumeratedValue>
125277              </enumeratedValues>
125278            </field>
125279            <field>
125280              <name>MA2IE</name>
125281              <description>Match 2 Interrupt Enable</description>
125282              <bitOffset>14</bitOffset>
125283              <bitWidth>1</bitWidth>
125284              <access>read-write</access>
125285              <enumeratedValues>
125286                <enumeratedValue>
125287                  <name>0</name>
125288                  <description>MA2F interrupt disabled</description>
125289                  <value>#0</value>
125290                </enumeratedValue>
125291                <enumeratedValue>
125292                  <name>1</name>
125293                  <description>MA2F interrupt enabled</description>
125294                  <value>#1</value>
125295                </enumeratedValue>
125296              </enumeratedValues>
125297            </field>
125298            <field>
125299              <name>MA1IE</name>
125300              <description>Match 1 Interrupt Enable</description>
125301              <bitOffset>15</bitOffset>
125302              <bitWidth>1</bitWidth>
125303              <access>read-write</access>
125304              <enumeratedValues>
125305                <enumeratedValue>
125306                  <name>0</name>
125307                  <description>MA1F interrupt disabled</description>
125308                  <value>#0</value>
125309                </enumeratedValue>
125310                <enumeratedValue>
125311                  <name>1</name>
125312                  <description>MA1F interrupt enabled</description>
125313                  <value>#1</value>
125314                </enumeratedValue>
125315              </enumeratedValues>
125316            </field>
125317            <field>
125318              <name>SBK</name>
125319              <description>Send Break</description>
125320              <bitOffset>16</bitOffset>
125321              <bitWidth>1</bitWidth>
125322              <access>read-write</access>
125323              <enumeratedValues>
125324                <enumeratedValue>
125325                  <name>0</name>
125326                  <description>Normal transmitter operation.</description>
125327                  <value>#0</value>
125328                </enumeratedValue>
125329                <enumeratedValue>
125330                  <name>1</name>
125331                  <description>Queue break character(s) to be sent.</description>
125332                  <value>#1</value>
125333                </enumeratedValue>
125334              </enumeratedValues>
125335            </field>
125336            <field>
125337              <name>RWU</name>
125338              <description>Receiver Wakeup Control</description>
125339              <bitOffset>17</bitOffset>
125340              <bitWidth>1</bitWidth>
125341              <access>read-write</access>
125342              <enumeratedValues>
125343                <enumeratedValue>
125344                  <name>0</name>
125345                  <description>Normal receiver operation.</description>
125346                  <value>#0</value>
125347                </enumeratedValue>
125348                <enumeratedValue>
125349                  <name>1</name>
125350                  <description>LPUART receiver in standby waiting for wakeup condition.</description>
125351                  <value>#1</value>
125352                </enumeratedValue>
125353              </enumeratedValues>
125354            </field>
125355            <field>
125356              <name>RE</name>
125357              <description>Receiver Enable</description>
125358              <bitOffset>18</bitOffset>
125359              <bitWidth>1</bitWidth>
125360              <access>read-write</access>
125361              <enumeratedValues>
125362                <enumeratedValue>
125363                  <name>0</name>
125364                  <description>Receiver disabled.</description>
125365                  <value>#0</value>
125366                </enumeratedValue>
125367                <enumeratedValue>
125368                  <name>1</name>
125369                  <description>Receiver enabled.</description>
125370                  <value>#1</value>
125371                </enumeratedValue>
125372              </enumeratedValues>
125373            </field>
125374            <field>
125375              <name>TE</name>
125376              <description>Transmitter Enable</description>
125377              <bitOffset>19</bitOffset>
125378              <bitWidth>1</bitWidth>
125379              <access>read-write</access>
125380              <enumeratedValues>
125381                <enumeratedValue>
125382                  <name>0</name>
125383                  <description>Transmitter disabled.</description>
125384                  <value>#0</value>
125385                </enumeratedValue>
125386                <enumeratedValue>
125387                  <name>1</name>
125388                  <description>Transmitter enabled.</description>
125389                  <value>#1</value>
125390                </enumeratedValue>
125391              </enumeratedValues>
125392            </field>
125393            <field>
125394              <name>ILIE</name>
125395              <description>Idle Line Interrupt Enable</description>
125396              <bitOffset>20</bitOffset>
125397              <bitWidth>1</bitWidth>
125398              <access>read-write</access>
125399              <enumeratedValues>
125400                <enumeratedValue>
125401                  <name>0</name>
125402                  <description>Hardware interrupts from IDLE disabled; use polling.</description>
125403                  <value>#0</value>
125404                </enumeratedValue>
125405                <enumeratedValue>
125406                  <name>1</name>
125407                  <description>Hardware interrupt requested when IDLE flag is 1.</description>
125408                  <value>#1</value>
125409                </enumeratedValue>
125410              </enumeratedValues>
125411            </field>
125412            <field>
125413              <name>RIE</name>
125414              <description>Receiver Interrupt Enable</description>
125415              <bitOffset>21</bitOffset>
125416              <bitWidth>1</bitWidth>
125417              <access>read-write</access>
125418              <enumeratedValues>
125419                <enumeratedValue>
125420                  <name>0</name>
125421                  <description>Hardware interrupts from RDRF disabled; use polling.</description>
125422                  <value>#0</value>
125423                </enumeratedValue>
125424                <enumeratedValue>
125425                  <name>1</name>
125426                  <description>Hardware interrupt requested when RDRF flag is 1.</description>
125427                  <value>#1</value>
125428                </enumeratedValue>
125429              </enumeratedValues>
125430            </field>
125431            <field>
125432              <name>TCIE</name>
125433              <description>Transmission Complete Interrupt Enable for</description>
125434              <bitOffset>22</bitOffset>
125435              <bitWidth>1</bitWidth>
125436              <access>read-write</access>
125437              <enumeratedValues>
125438                <enumeratedValue>
125439                  <name>0</name>
125440                  <description>Hardware interrupts from TC disabled; use polling.</description>
125441                  <value>#0</value>
125442                </enumeratedValue>
125443                <enumeratedValue>
125444                  <name>1</name>
125445                  <description>Hardware interrupt requested when TC flag is 1.</description>
125446                  <value>#1</value>
125447                </enumeratedValue>
125448              </enumeratedValues>
125449            </field>
125450            <field>
125451              <name>TIE</name>
125452              <description>Transmit Interrupt Enable</description>
125453              <bitOffset>23</bitOffset>
125454              <bitWidth>1</bitWidth>
125455              <access>read-write</access>
125456              <enumeratedValues>
125457                <enumeratedValue>
125458                  <name>0</name>
125459                  <description>Hardware interrupts from TDRE disabled; use polling.</description>
125460                  <value>#0</value>
125461                </enumeratedValue>
125462                <enumeratedValue>
125463                  <name>1</name>
125464                  <description>Hardware interrupt requested when TDRE flag is 1.</description>
125465                  <value>#1</value>
125466                </enumeratedValue>
125467              </enumeratedValues>
125468            </field>
125469            <field>
125470              <name>PEIE</name>
125471              <description>Parity Error Interrupt Enable</description>
125472              <bitOffset>24</bitOffset>
125473              <bitWidth>1</bitWidth>
125474              <access>read-write</access>
125475              <enumeratedValues>
125476                <enumeratedValue>
125477                  <name>0</name>
125478                  <description>PF interrupts disabled; use polling).</description>
125479                  <value>#0</value>
125480                </enumeratedValue>
125481                <enumeratedValue>
125482                  <name>1</name>
125483                  <description>Hardware interrupt requested when PF is set.</description>
125484                  <value>#1</value>
125485                </enumeratedValue>
125486              </enumeratedValues>
125487            </field>
125488            <field>
125489              <name>FEIE</name>
125490              <description>Framing Error Interrupt Enable</description>
125491              <bitOffset>25</bitOffset>
125492              <bitWidth>1</bitWidth>
125493              <access>read-write</access>
125494              <enumeratedValues>
125495                <enumeratedValue>
125496                  <name>0</name>
125497                  <description>FE interrupts disabled; use polling.</description>
125498                  <value>#0</value>
125499                </enumeratedValue>
125500                <enumeratedValue>
125501                  <name>1</name>
125502                  <description>Hardware interrupt requested when FE is set.</description>
125503                  <value>#1</value>
125504                </enumeratedValue>
125505              </enumeratedValues>
125506            </field>
125507            <field>
125508              <name>NEIE</name>
125509              <description>Noise Error Interrupt Enable</description>
125510              <bitOffset>26</bitOffset>
125511              <bitWidth>1</bitWidth>
125512              <access>read-write</access>
125513              <enumeratedValues>
125514                <enumeratedValue>
125515                  <name>0</name>
125516                  <description>NF interrupts disabled; use polling.</description>
125517                  <value>#0</value>
125518                </enumeratedValue>
125519                <enumeratedValue>
125520                  <name>1</name>
125521                  <description>Hardware interrupt requested when NF is set.</description>
125522                  <value>#1</value>
125523                </enumeratedValue>
125524              </enumeratedValues>
125525            </field>
125526            <field>
125527              <name>ORIE</name>
125528              <description>Overrun Interrupt Enable</description>
125529              <bitOffset>27</bitOffset>
125530              <bitWidth>1</bitWidth>
125531              <access>read-write</access>
125532              <enumeratedValues>
125533                <enumeratedValue>
125534                  <name>0</name>
125535                  <description>OR interrupts disabled; use polling.</description>
125536                  <value>#0</value>
125537                </enumeratedValue>
125538                <enumeratedValue>
125539                  <name>1</name>
125540                  <description>Hardware interrupt requested when OR is set.</description>
125541                  <value>#1</value>
125542                </enumeratedValue>
125543              </enumeratedValues>
125544            </field>
125545            <field>
125546              <name>TXINV</name>
125547              <description>Transmit Data Inversion</description>
125548              <bitOffset>28</bitOffset>
125549              <bitWidth>1</bitWidth>
125550              <access>read-write</access>
125551              <enumeratedValues>
125552                <enumeratedValue>
125553                  <name>0</name>
125554                  <description>Transmit data not inverted.</description>
125555                  <value>#0</value>
125556                </enumeratedValue>
125557                <enumeratedValue>
125558                  <name>1</name>
125559                  <description>Transmit data inverted.</description>
125560                  <value>#1</value>
125561                </enumeratedValue>
125562              </enumeratedValues>
125563            </field>
125564            <field>
125565              <name>TXDIR</name>
125566              <description>LPUART_TX Pin Direction in Single-Wire Mode</description>
125567              <bitOffset>29</bitOffset>
125568              <bitWidth>1</bitWidth>
125569              <access>read-write</access>
125570              <enumeratedValues>
125571                <enumeratedValue>
125572                  <name>0</name>
125573                  <description>LPUART_TX pin is an input in single-wire mode.</description>
125574                  <value>#0</value>
125575                </enumeratedValue>
125576                <enumeratedValue>
125577                  <name>1</name>
125578                  <description>LPUART_TX pin is an output in single-wire mode.</description>
125579                  <value>#1</value>
125580                </enumeratedValue>
125581              </enumeratedValues>
125582            </field>
125583            <field>
125584              <name>R9T8</name>
125585              <description>Receive Bit 9 / Transmit Bit 8</description>
125586              <bitOffset>30</bitOffset>
125587              <bitWidth>1</bitWidth>
125588              <access>read-write</access>
125589            </field>
125590            <field>
125591              <name>R8T9</name>
125592              <description>Receive Bit 8 / Transmit Bit 9</description>
125593              <bitOffset>31</bitOffset>
125594              <bitWidth>1</bitWidth>
125595              <access>read-write</access>
125596            </field>
125597          </fields>
125598        </register>
125599        <register>
125600          <name>DATA</name>
125601          <description>LPUART Data Register</description>
125602          <addressOffset>0xC</addressOffset>
125603          <size>32</size>
125604          <access>read-write</access>
125605          <resetValue>0x1000</resetValue>
125606          <resetMask>0xFFFFFFFF</resetMask>
125607          <fields>
125608            <field>
125609              <name>R0T0</name>
125610              <description>Read receive data buffer 0 or write transmit data buffer 0.</description>
125611              <bitOffset>0</bitOffset>
125612              <bitWidth>1</bitWidth>
125613              <access>read-write</access>
125614            </field>
125615            <field>
125616              <name>R1T1</name>
125617              <description>Read receive data buffer 1 or write transmit data buffer 1.</description>
125618              <bitOffset>1</bitOffset>
125619              <bitWidth>1</bitWidth>
125620              <access>read-write</access>
125621            </field>
125622            <field>
125623              <name>R2T2</name>
125624              <description>Read receive data buffer 2 or write transmit data buffer 2.</description>
125625              <bitOffset>2</bitOffset>
125626              <bitWidth>1</bitWidth>
125627              <access>read-write</access>
125628            </field>
125629            <field>
125630              <name>R3T3</name>
125631              <description>Read receive data buffer 3 or write transmit data buffer 3.</description>
125632              <bitOffset>3</bitOffset>
125633              <bitWidth>1</bitWidth>
125634              <access>read-write</access>
125635            </field>
125636            <field>
125637              <name>R4T4</name>
125638              <description>Read receive data buffer 4 or write transmit data buffer 4.</description>
125639              <bitOffset>4</bitOffset>
125640              <bitWidth>1</bitWidth>
125641              <access>read-write</access>
125642            </field>
125643            <field>
125644              <name>R5T5</name>
125645              <description>Read receive data buffer 5 or write transmit data buffer 5.</description>
125646              <bitOffset>5</bitOffset>
125647              <bitWidth>1</bitWidth>
125648              <access>read-write</access>
125649            </field>
125650            <field>
125651              <name>R6T6</name>
125652              <description>Read receive data buffer 6 or write transmit data buffer 6.</description>
125653              <bitOffset>6</bitOffset>
125654              <bitWidth>1</bitWidth>
125655              <access>read-write</access>
125656            </field>
125657            <field>
125658              <name>R7T7</name>
125659              <description>Read receive data buffer 7 or write transmit data buffer 7.</description>
125660              <bitOffset>7</bitOffset>
125661              <bitWidth>1</bitWidth>
125662              <access>read-write</access>
125663            </field>
125664            <field>
125665              <name>R8T8</name>
125666              <description>Read receive data buffer 8 or write transmit data buffer 8.</description>
125667              <bitOffset>8</bitOffset>
125668              <bitWidth>1</bitWidth>
125669              <access>read-write</access>
125670            </field>
125671            <field>
125672              <name>R9T9</name>
125673              <description>Read receive data buffer 9 or write transmit data buffer 9.</description>
125674              <bitOffset>9</bitOffset>
125675              <bitWidth>1</bitWidth>
125676              <access>read-write</access>
125677            </field>
125678            <field>
125679              <name>IDLINE</name>
125680              <description>Idle Line</description>
125681              <bitOffset>11</bitOffset>
125682              <bitWidth>1</bitWidth>
125683              <access>read-only</access>
125684              <enumeratedValues>
125685                <enumeratedValue>
125686                  <name>0</name>
125687                  <description>Receiver was not idle before receiving this character.</description>
125688                  <value>#0</value>
125689                </enumeratedValue>
125690                <enumeratedValue>
125691                  <name>1</name>
125692                  <description>Receiver was idle before receiving this character.</description>
125693                  <value>#1</value>
125694                </enumeratedValue>
125695              </enumeratedValues>
125696            </field>
125697            <field>
125698              <name>RXEMPT</name>
125699              <description>Receive Buffer Empty</description>
125700              <bitOffset>12</bitOffset>
125701              <bitWidth>1</bitWidth>
125702              <access>read-only</access>
125703              <enumeratedValues>
125704                <enumeratedValue>
125705                  <name>0</name>
125706                  <description>Receive buffer contains valid data.</description>
125707                  <value>#0</value>
125708                </enumeratedValue>
125709                <enumeratedValue>
125710                  <name>1</name>
125711                  <description>Receive buffer is empty, data returned on read is not valid.</description>
125712                  <value>#1</value>
125713                </enumeratedValue>
125714              </enumeratedValues>
125715            </field>
125716            <field>
125717              <name>FRETSC</name>
125718              <description>Frame Error / Transmit Special Character</description>
125719              <bitOffset>13</bitOffset>
125720              <bitWidth>1</bitWidth>
125721              <access>read-write</access>
125722              <enumeratedValues>
125723                <enumeratedValue>
125724                  <name>0</name>
125725                  <description>The dataword was received without a frame error on read, transmit a normal character on write.</description>
125726                  <value>#0</value>
125727                </enumeratedValue>
125728                <enumeratedValue>
125729                  <name>1</name>
125730                  <description>The dataword was received with a frame error, transmit an idle or break character on transmit.</description>
125731                  <value>#1</value>
125732                </enumeratedValue>
125733              </enumeratedValues>
125734            </field>
125735            <field>
125736              <name>PARITYE</name>
125737              <description>The current received dataword contained in DATA[R9:R0] was received with a parity error.</description>
125738              <bitOffset>14</bitOffset>
125739              <bitWidth>1</bitWidth>
125740              <access>read-only</access>
125741              <enumeratedValues>
125742                <enumeratedValue>
125743                  <name>0</name>
125744                  <description>The dataword was received without a parity error.</description>
125745                  <value>#0</value>
125746                </enumeratedValue>
125747                <enumeratedValue>
125748                  <name>1</name>
125749                  <description>The dataword was received with a parity error.</description>
125750                  <value>#1</value>
125751                </enumeratedValue>
125752              </enumeratedValues>
125753            </field>
125754            <field>
125755              <name>NOISY</name>
125756              <description>The current received dataword contained in DATA[R9:R0] was received with noise.</description>
125757              <bitOffset>15</bitOffset>
125758              <bitWidth>1</bitWidth>
125759              <access>read-only</access>
125760              <enumeratedValues>
125761                <enumeratedValue>
125762                  <name>0</name>
125763                  <description>The dataword was received without noise.</description>
125764                  <value>#0</value>
125765                </enumeratedValue>
125766                <enumeratedValue>
125767                  <name>1</name>
125768                  <description>The data was received with noise.</description>
125769                  <value>#1</value>
125770                </enumeratedValue>
125771              </enumeratedValues>
125772            </field>
125773          </fields>
125774        </register>
125775        <register>
125776          <name>MATCH</name>
125777          <description>LPUART Match Address Register</description>
125778          <addressOffset>0x10</addressOffset>
125779          <size>32</size>
125780          <access>read-write</access>
125781          <resetValue>0</resetValue>
125782          <resetMask>0xFFFFFFFF</resetMask>
125783          <fields>
125784            <field>
125785              <name>MA1</name>
125786              <description>Match Address 1</description>
125787              <bitOffset>0</bitOffset>
125788              <bitWidth>10</bitWidth>
125789              <access>read-write</access>
125790            </field>
125791            <field>
125792              <name>MA2</name>
125793              <description>Match Address 2</description>
125794              <bitOffset>16</bitOffset>
125795              <bitWidth>10</bitWidth>
125796              <access>read-write</access>
125797            </field>
125798          </fields>
125799        </register>
125800        <register>
125801          <name>MODIR</name>
125802          <description>LPUART Modem IrDA Register</description>
125803          <addressOffset>0x14</addressOffset>
125804          <size>32</size>
125805          <access>read-write</access>
125806          <resetValue>0</resetValue>
125807          <resetMask>0xFFFFFFFF</resetMask>
125808          <fields>
125809            <field>
125810              <name>TXCTSE</name>
125811              <description>Transmitter clear-to-send enable</description>
125812              <bitOffset>0</bitOffset>
125813              <bitWidth>1</bitWidth>
125814              <access>read-write</access>
125815              <enumeratedValues>
125816                <enumeratedValue>
125817                  <name>0</name>
125818                  <description>CTS has no effect on the transmitter.</description>
125819                  <value>#0</value>
125820                </enumeratedValue>
125821                <enumeratedValue>
125822                  <name>1</name>
125823                  <description>Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission.</description>
125824                  <value>#1</value>
125825                </enumeratedValue>
125826              </enumeratedValues>
125827            </field>
125828            <field>
125829              <name>TXRTSE</name>
125830              <description>Transmitter request-to-send enable</description>
125831              <bitOffset>1</bitOffset>
125832              <bitWidth>1</bitWidth>
125833              <access>read-write</access>
125834              <enumeratedValues>
125835                <enumeratedValue>
125836                  <name>0</name>
125837                  <description>The transmitter has no effect on RTS.</description>
125838                  <value>#0</value>
125839                </enumeratedValue>
125840                <enumeratedValue>
125841                  <name>1</name>
125842                  <description>When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit.</description>
125843                  <value>#1</value>
125844                </enumeratedValue>
125845              </enumeratedValues>
125846            </field>
125847            <field>
125848              <name>TXRTSPOL</name>
125849              <description>Transmitter request-to-send polarity</description>
125850              <bitOffset>2</bitOffset>
125851              <bitWidth>1</bitWidth>
125852              <access>read-write</access>
125853              <enumeratedValues>
125854                <enumeratedValue>
125855                  <name>0</name>
125856                  <description>Transmitter RTS is active low.</description>
125857                  <value>#0</value>
125858                </enumeratedValue>
125859                <enumeratedValue>
125860                  <name>1</name>
125861                  <description>Transmitter RTS is active high.</description>
125862                  <value>#1</value>
125863                </enumeratedValue>
125864              </enumeratedValues>
125865            </field>
125866            <field>
125867              <name>RXRTSE</name>
125868              <description>Receiver request-to-send enable</description>
125869              <bitOffset>3</bitOffset>
125870              <bitWidth>1</bitWidth>
125871              <access>read-write</access>
125872              <enumeratedValues>
125873                <enumeratedValue>
125874                  <name>0</name>
125875                  <description>The receiver has no effect on RTS.</description>
125876                  <value>#0</value>
125877                </enumeratedValue>
125878                <enumeratedValue>
125879                  <name>1</name>
125880                  <description>RTS is deasserted if the receiver data register is full or a start bit has been detected that would cause the receiver data register to become full. RTS is asserted if the receiver data register is not full and has not detected a start bit that would cause the receiver data register to become full.</description>
125881                  <value>#1</value>
125882                </enumeratedValue>
125883              </enumeratedValues>
125884            </field>
125885            <field>
125886              <name>TXCTSC</name>
125887              <description>Transmit CTS Configuration</description>
125888              <bitOffset>4</bitOffset>
125889              <bitWidth>1</bitWidth>
125890              <access>read-write</access>
125891              <enumeratedValues>
125892                <enumeratedValue>
125893                  <name>0</name>
125894                  <description>CTS input is sampled at the start of each character.</description>
125895                  <value>#0</value>
125896                </enumeratedValue>
125897                <enumeratedValue>
125898                  <name>1</name>
125899                  <description>CTS input is sampled when the transmitter is idle.</description>
125900                  <value>#1</value>
125901                </enumeratedValue>
125902              </enumeratedValues>
125903            </field>
125904            <field>
125905              <name>TXCTSSRC</name>
125906              <description>Transmit CTS Source</description>
125907              <bitOffset>5</bitOffset>
125908              <bitWidth>1</bitWidth>
125909              <access>read-write</access>
125910              <enumeratedValues>
125911                <enumeratedValue>
125912                  <name>0</name>
125913                  <description>CTS input is the LPUART_CTS pin.</description>
125914                  <value>#0</value>
125915                </enumeratedValue>
125916                <enumeratedValue>
125917                  <name>1</name>
125918                  <description>CTS input is the inverted Receiver Match result.</description>
125919                  <value>#1</value>
125920                </enumeratedValue>
125921              </enumeratedValues>
125922            </field>
125923            <field>
125924              <name>RTSWATER</name>
125925              <description>Receive RTS Configuration</description>
125926              <bitOffset>8</bitOffset>
125927              <bitWidth>8</bitWidth>
125928              <access>read-write</access>
125929              <enumeratedValues>
125930                <enumeratedValue>
125931                  <name>0</name>
125932                  <description>RTS asserts when the receiver FIFO is full or receiving a character that causes the FIFO to become full.</description>
125933                  <value>#0</value>
125934                </enumeratedValue>
125935                <enumeratedValue>
125936                  <name>1</name>
125937                  <description>RTS asserts when the receive FIFO is less than or equal to the RXWATER configuration and negates when the receive FIFO is greater than the RXWATER configuration.</description>
125938                  <value>#1</value>
125939                </enumeratedValue>
125940              </enumeratedValues>
125941            </field>
125942            <field>
125943              <name>TNP</name>
125944              <description>Transmitter narrow pulse</description>
125945              <bitOffset>16</bitOffset>
125946              <bitWidth>2</bitWidth>
125947              <access>read-write</access>
125948              <enumeratedValues>
125949                <enumeratedValue>
125950                  <name>00</name>
125951                  <description>1/OSR.</description>
125952                  <value>#00</value>
125953                </enumeratedValue>
125954                <enumeratedValue>
125955                  <name>01</name>
125956                  <description>2/OSR.</description>
125957                  <value>#01</value>
125958                </enumeratedValue>
125959                <enumeratedValue>
125960                  <name>10</name>
125961                  <description>3/OSR.</description>
125962                  <value>#10</value>
125963                </enumeratedValue>
125964                <enumeratedValue>
125965                  <name>11</name>
125966                  <description>4/OSR.</description>
125967                  <value>#11</value>
125968                </enumeratedValue>
125969              </enumeratedValues>
125970            </field>
125971            <field>
125972              <name>IREN</name>
125973              <description>Infrared enable</description>
125974              <bitOffset>18</bitOffset>
125975              <bitWidth>1</bitWidth>
125976              <access>read-write</access>
125977              <enumeratedValues>
125978                <enumeratedValue>
125979                  <name>0</name>
125980                  <description>IR disabled.</description>
125981                  <value>#0</value>
125982                </enumeratedValue>
125983                <enumeratedValue>
125984                  <name>1</name>
125985                  <description>IR enabled.</description>
125986                  <value>#1</value>
125987                </enumeratedValue>
125988              </enumeratedValues>
125989            </field>
125990          </fields>
125991        </register>
125992        <register>
125993          <name>FIFO</name>
125994          <description>LPUART FIFO Register</description>
125995          <addressOffset>0x18</addressOffset>
125996          <size>32</size>
125997          <access>read-write</access>
125998          <resetValue>0x22</resetValue>
125999          <resetMask>0xFFFFFFFF</resetMask>
126000          <fields>
126001            <field>
126002              <name>RXFIFOSIZE</name>
126003              <description>Receive FIFO. Buffer Depth</description>
126004              <bitOffset>0</bitOffset>
126005              <bitWidth>3</bitWidth>
126006              <access>read-only</access>
126007              <enumeratedValues>
126008                <enumeratedValue>
126009                  <name>000</name>
126010                  <description>Receive FIFO/Buffer depth = 1 dataword.</description>
126011                  <value>#000</value>
126012                </enumeratedValue>
126013                <enumeratedValue>
126014                  <name>001</name>
126015                  <description>Receive FIFO/Buffer depth = 4 datawords.</description>
126016                  <value>#001</value>
126017                </enumeratedValue>
126018                <enumeratedValue>
126019                  <name>010</name>
126020                  <description>Receive FIFO/Buffer depth = 8 datawords.</description>
126021                  <value>#010</value>
126022                </enumeratedValue>
126023                <enumeratedValue>
126024                  <name>011</name>
126025                  <description>Receive FIFO/Buffer depth = 16 datawords.</description>
126026                  <value>#011</value>
126027                </enumeratedValue>
126028                <enumeratedValue>
126029                  <name>100</name>
126030                  <description>Receive FIFO/Buffer depth = 32 datawords.</description>
126031                  <value>#100</value>
126032                </enumeratedValue>
126033                <enumeratedValue>
126034                  <name>101</name>
126035                  <description>Receive FIFO/Buffer depth = 64 datawords.</description>
126036                  <value>#101</value>
126037                </enumeratedValue>
126038                <enumeratedValue>
126039                  <name>110</name>
126040                  <description>Receive FIFO/Buffer depth = 128 datawords.</description>
126041                  <value>#110</value>
126042                </enumeratedValue>
126043                <enumeratedValue>
126044                  <name>111</name>
126045                  <description>Receive FIFO/Buffer depth = 256 datawords.</description>
126046                  <value>#111</value>
126047                </enumeratedValue>
126048              </enumeratedValues>
126049            </field>
126050            <field>
126051              <name>RXFE</name>
126052              <description>Receive FIFO Enable</description>
126053              <bitOffset>3</bitOffset>
126054              <bitWidth>1</bitWidth>
126055              <access>read-write</access>
126056              <enumeratedValues>
126057                <enumeratedValue>
126058                  <name>0</name>
126059                  <description>Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)</description>
126060                  <value>#0</value>
126061                </enumeratedValue>
126062                <enumeratedValue>
126063                  <name>1</name>
126064                  <description>Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE.</description>
126065                  <value>#1</value>
126066                </enumeratedValue>
126067              </enumeratedValues>
126068            </field>
126069            <field>
126070              <name>TXFIFOSIZE</name>
126071              <description>Transmit FIFO. Buffer Depth</description>
126072              <bitOffset>4</bitOffset>
126073              <bitWidth>3</bitWidth>
126074              <access>read-only</access>
126075              <enumeratedValues>
126076                <enumeratedValue>
126077                  <name>000</name>
126078                  <description>Transmit FIFO/Buffer depth = 1 dataword.</description>
126079                  <value>#000</value>
126080                </enumeratedValue>
126081                <enumeratedValue>
126082                  <name>001</name>
126083                  <description>Transmit FIFO/Buffer depth = 4 datawords.</description>
126084                  <value>#001</value>
126085                </enumeratedValue>
126086                <enumeratedValue>
126087                  <name>010</name>
126088                  <description>Transmit FIFO/Buffer depth = 8 datawords.</description>
126089                  <value>#010</value>
126090                </enumeratedValue>
126091                <enumeratedValue>
126092                  <name>011</name>
126093                  <description>Transmit FIFO/Buffer depth = 16 datawords.</description>
126094                  <value>#011</value>
126095                </enumeratedValue>
126096                <enumeratedValue>
126097                  <name>100</name>
126098                  <description>Transmit FIFO/Buffer depth = 32 datawords.</description>
126099                  <value>#100</value>
126100                </enumeratedValue>
126101                <enumeratedValue>
126102                  <name>101</name>
126103                  <description>Transmit FIFO/Buffer depth = 64 datawords.</description>
126104                  <value>#101</value>
126105                </enumeratedValue>
126106                <enumeratedValue>
126107                  <name>110</name>
126108                  <description>Transmit FIFO/Buffer depth = 128 datawords.</description>
126109                  <value>#110</value>
126110                </enumeratedValue>
126111                <enumeratedValue>
126112                  <name>111</name>
126113                  <description>Transmit FIFO/Buffer depth = 256 datawords</description>
126114                  <value>#111</value>
126115                </enumeratedValue>
126116              </enumeratedValues>
126117            </field>
126118            <field>
126119              <name>TXFE</name>
126120              <description>Transmit FIFO Enable</description>
126121              <bitOffset>7</bitOffset>
126122              <bitWidth>1</bitWidth>
126123              <access>read-write</access>
126124              <enumeratedValues>
126125                <enumeratedValue>
126126                  <name>0</name>
126127                  <description>Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support).</description>
126128                  <value>#0</value>
126129                </enumeratedValue>
126130                <enumeratedValue>
126131                  <name>1</name>
126132                  <description>Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.</description>
126133                  <value>#1</value>
126134                </enumeratedValue>
126135              </enumeratedValues>
126136            </field>
126137            <field>
126138              <name>RXUFE</name>
126139              <description>Receive FIFO Underflow Interrupt Enable</description>
126140              <bitOffset>8</bitOffset>
126141              <bitWidth>1</bitWidth>
126142              <access>read-write</access>
126143              <enumeratedValues>
126144                <enumeratedValue>
126145                  <name>0</name>
126146                  <description>RXUF flag does not generate an interrupt to the host.</description>
126147                  <value>#0</value>
126148                </enumeratedValue>
126149                <enumeratedValue>
126150                  <name>1</name>
126151                  <description>RXUF flag generates an interrupt to the host.</description>
126152                  <value>#1</value>
126153                </enumeratedValue>
126154              </enumeratedValues>
126155            </field>
126156            <field>
126157              <name>TXOFE</name>
126158              <description>Transmit FIFO Overflow Interrupt Enable</description>
126159              <bitOffset>9</bitOffset>
126160              <bitWidth>1</bitWidth>
126161              <access>read-write</access>
126162              <enumeratedValues>
126163                <enumeratedValue>
126164                  <name>0</name>
126165                  <description>TXOF flag does not generate an interrupt to the host.</description>
126166                  <value>#0</value>
126167                </enumeratedValue>
126168                <enumeratedValue>
126169                  <name>1</name>
126170                  <description>TXOF flag generates an interrupt to the host.</description>
126171                  <value>#1</value>
126172                </enumeratedValue>
126173              </enumeratedValues>
126174            </field>
126175            <field>
126176              <name>RXIDEN</name>
126177              <description>Receiver Idle Empty Enable</description>
126178              <bitOffset>10</bitOffset>
126179              <bitWidth>3</bitWidth>
126180              <access>read-write</access>
126181              <enumeratedValues>
126182                <enumeratedValue>
126183                  <name>000</name>
126184                  <description>Disable RDRF assertion due to partially filled FIFO when receiver is idle.</description>
126185                  <value>#000</value>
126186                </enumeratedValue>
126187                <enumeratedValue>
126188                  <name>001</name>
126189                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character.</description>
126190                  <value>#001</value>
126191                </enumeratedValue>
126192                <enumeratedValue>
126193                  <name>010</name>
126194                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters.</description>
126195                  <value>#010</value>
126196                </enumeratedValue>
126197                <enumeratedValue>
126198                  <name>011</name>
126199                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters.</description>
126200                  <value>#011</value>
126201                </enumeratedValue>
126202                <enumeratedValue>
126203                  <name>100</name>
126204                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters.</description>
126205                  <value>#100</value>
126206                </enumeratedValue>
126207                <enumeratedValue>
126208                  <name>101</name>
126209                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters.</description>
126210                  <value>#101</value>
126211                </enumeratedValue>
126212                <enumeratedValue>
126213                  <name>110</name>
126214                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters.</description>
126215                  <value>#110</value>
126216                </enumeratedValue>
126217                <enumeratedValue>
126218                  <name>111</name>
126219                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters.</description>
126220                  <value>#111</value>
126221                </enumeratedValue>
126222              </enumeratedValues>
126223            </field>
126224            <field>
126225              <name>RXFLUSH</name>
126226              <description>Receive FIFO/Buffer Flush</description>
126227              <bitOffset>14</bitOffset>
126228              <bitWidth>1</bitWidth>
126229              <access>write-only</access>
126230              <enumeratedValues>
126231                <enumeratedValue>
126232                  <name>0</name>
126233                  <description>No flush operation occurs.</description>
126234                  <value>#0</value>
126235                </enumeratedValue>
126236                <enumeratedValue>
126237                  <name>1</name>
126238                  <description>All data in the receive FIFO/buffer is cleared out.</description>
126239                  <value>#1</value>
126240                </enumeratedValue>
126241              </enumeratedValues>
126242            </field>
126243            <field>
126244              <name>TXFLUSH</name>
126245              <description>Transmit FIFO/Buffer Flush</description>
126246              <bitOffset>15</bitOffset>
126247              <bitWidth>1</bitWidth>
126248              <access>write-only</access>
126249              <enumeratedValues>
126250                <enumeratedValue>
126251                  <name>0</name>
126252                  <description>No flush operation occurs.</description>
126253                  <value>#0</value>
126254                </enumeratedValue>
126255                <enumeratedValue>
126256                  <name>1</name>
126257                  <description>All data in the transmit FIFO/Buffer is cleared out.</description>
126258                  <value>#1</value>
126259                </enumeratedValue>
126260              </enumeratedValues>
126261            </field>
126262            <field>
126263              <name>RXUF</name>
126264              <description>Receiver Buffer Underflow Flag</description>
126265              <bitOffset>16</bitOffset>
126266              <bitWidth>1</bitWidth>
126267              <access>read-write</access>
126268              <enumeratedValues>
126269                <enumeratedValue>
126270                  <name>0</name>
126271                  <description>No receive buffer underflow has occurred since the last time the flag was cleared.</description>
126272                  <value>#0</value>
126273                </enumeratedValue>
126274                <enumeratedValue>
126275                  <name>1</name>
126276                  <description>At least one receive buffer underflow has occurred since the last time the flag was cleared.</description>
126277                  <value>#1</value>
126278                </enumeratedValue>
126279              </enumeratedValues>
126280            </field>
126281            <field>
126282              <name>TXOF</name>
126283              <description>Transmitter Buffer Overflow Flag</description>
126284              <bitOffset>17</bitOffset>
126285              <bitWidth>1</bitWidth>
126286              <access>read-write</access>
126287              <enumeratedValues>
126288                <enumeratedValue>
126289                  <name>0</name>
126290                  <description>No transmit buffer overflow has occurred since the last time the flag was cleared.</description>
126291                  <value>#0</value>
126292                </enumeratedValue>
126293                <enumeratedValue>
126294                  <name>1</name>
126295                  <description>At least one transmit buffer overflow has occurred since the last time the flag was cleared.</description>
126296                  <value>#1</value>
126297                </enumeratedValue>
126298              </enumeratedValues>
126299            </field>
126300            <field>
126301              <name>RXEMPT</name>
126302              <description>Receive Buffer/FIFO Empty</description>
126303              <bitOffset>22</bitOffset>
126304              <bitWidth>1</bitWidth>
126305              <access>read-only</access>
126306              <enumeratedValues>
126307                <enumeratedValue>
126308                  <name>0</name>
126309                  <description>Receive buffer is not empty.</description>
126310                  <value>#0</value>
126311                </enumeratedValue>
126312                <enumeratedValue>
126313                  <name>1</name>
126314                  <description>Receive buffer is empty.</description>
126315                  <value>#1</value>
126316                </enumeratedValue>
126317              </enumeratedValues>
126318            </field>
126319            <field>
126320              <name>TXEMPT</name>
126321              <description>Transmit Buffer/FIFO Empty</description>
126322              <bitOffset>23</bitOffset>
126323              <bitWidth>1</bitWidth>
126324              <access>read-only</access>
126325              <enumeratedValues>
126326                <enumeratedValue>
126327                  <name>0</name>
126328                  <description>Transmit buffer is not empty.</description>
126329                  <value>#0</value>
126330                </enumeratedValue>
126331                <enumeratedValue>
126332                  <name>1</name>
126333                  <description>Transmit buffer is empty.</description>
126334                  <value>#1</value>
126335                </enumeratedValue>
126336              </enumeratedValues>
126337            </field>
126338          </fields>
126339        </register>
126340        <register>
126341          <name>WATER</name>
126342          <description>LPUART Watermark Register</description>
126343          <addressOffset>0x1C</addressOffset>
126344          <size>32</size>
126345          <access>read-write</access>
126346          <resetValue>0</resetValue>
126347          <resetMask>0xFFFFFFFF</resetMask>
126348          <fields>
126349            <field>
126350              <name>TXWATER</name>
126351              <description>Transmit Watermark</description>
126352              <bitOffset>0</bitOffset>
126353              <bitWidth>8</bitWidth>
126354              <access>read-write</access>
126355            </field>
126356            <field>
126357              <name>TXCOUNT</name>
126358              <description>Transmit Counter</description>
126359              <bitOffset>8</bitOffset>
126360              <bitWidth>8</bitWidth>
126361              <access>read-only</access>
126362            </field>
126363            <field>
126364              <name>RXWATER</name>
126365              <description>Receive Watermark</description>
126366              <bitOffset>16</bitOffset>
126367              <bitWidth>8</bitWidth>
126368              <access>read-write</access>
126369            </field>
126370            <field>
126371              <name>RXCOUNT</name>
126372              <description>Receive Counter</description>
126373              <bitOffset>24</bitOffset>
126374              <bitWidth>8</bitWidth>
126375              <access>read-only</access>
126376            </field>
126377          </fields>
126378        </register>
126379      </registers>
126380    </peripheral>
126381    <peripheral>
126382      <name>LPUART1</name>
126383      <description>Universal Asynchronous Receiver/Transmitter</description>
126384      <groupName>LPUART</groupName>
126385      <prependToName>LPUART1_</prependToName>
126386      <baseAddress>0x400C5000</baseAddress>
126387      <addressBlock>
126388        <offset>0</offset>
126389        <size>0x20</size>
126390        <usage>registers</usage>
126391      </addressBlock>
126392      <interrupt>
126393        <name>LPUART1</name>
126394        <value>31</value>
126395      </interrupt>
126396      <registers>
126397        <register>
126398          <name>BAUD</name>
126399          <description>LPUART Baud Rate Register</description>
126400          <addressOffset>0</addressOffset>
126401          <size>32</size>
126402          <access>read-write</access>
126403          <resetValue>0xF000004</resetValue>
126404          <resetMask>0xFFFFFFFF</resetMask>
126405          <fields>
126406            <field>
126407              <name>SBR</name>
126408              <description>Baud Rate Modulo Divisor.</description>
126409              <bitOffset>0</bitOffset>
126410              <bitWidth>13</bitWidth>
126411              <access>read-write</access>
126412            </field>
126413            <field>
126414              <name>SBNS</name>
126415              <description>Stop Bit Number Select</description>
126416              <bitOffset>13</bitOffset>
126417              <bitWidth>1</bitWidth>
126418              <access>read-write</access>
126419              <enumeratedValues>
126420                <enumeratedValue>
126421                  <name>0</name>
126422                  <description>One stop bit.</description>
126423                  <value>#0</value>
126424                </enumeratedValue>
126425                <enumeratedValue>
126426                  <name>1</name>
126427                  <description>Two stop bits.</description>
126428                  <value>#1</value>
126429                </enumeratedValue>
126430              </enumeratedValues>
126431            </field>
126432            <field>
126433              <name>RXEDGIE</name>
126434              <description>RX Input Active Edge Interrupt Enable</description>
126435              <bitOffset>14</bitOffset>
126436              <bitWidth>1</bitWidth>
126437              <access>read-write</access>
126438              <enumeratedValues>
126439                <enumeratedValue>
126440                  <name>0</name>
126441                  <description>Hardware interrupts from LPUART_STAT[RXEDGIF] disabled (use polling).</description>
126442                  <value>#0</value>
126443                </enumeratedValue>
126444                <enumeratedValue>
126445                  <name>1</name>
126446                  <description>Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1.</description>
126447                  <value>#1</value>
126448                </enumeratedValue>
126449              </enumeratedValues>
126450            </field>
126451            <field>
126452              <name>LBKDIE</name>
126453              <description>LIN Break Detect Interrupt Enable</description>
126454              <bitOffset>15</bitOffset>
126455              <bitWidth>1</bitWidth>
126456              <access>read-write</access>
126457              <enumeratedValues>
126458                <enumeratedValue>
126459                  <name>0</name>
126460                  <description>Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling).</description>
126461                  <value>#0</value>
126462                </enumeratedValue>
126463                <enumeratedValue>
126464                  <name>1</name>
126465                  <description>Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1.</description>
126466                  <value>#1</value>
126467                </enumeratedValue>
126468              </enumeratedValues>
126469            </field>
126470            <field>
126471              <name>RESYNCDIS</name>
126472              <description>Resynchronization Disable</description>
126473              <bitOffset>16</bitOffset>
126474              <bitWidth>1</bitWidth>
126475              <access>read-write</access>
126476              <enumeratedValues>
126477                <enumeratedValue>
126478                  <name>0</name>
126479                  <description>Resynchronization during received data word is supported</description>
126480                  <value>#0</value>
126481                </enumeratedValue>
126482                <enumeratedValue>
126483                  <name>1</name>
126484                  <description>Resynchronization during received data word is disabled</description>
126485                  <value>#1</value>
126486                </enumeratedValue>
126487              </enumeratedValues>
126488            </field>
126489            <field>
126490              <name>BOTHEDGE</name>
126491              <description>Both Edge Sampling</description>
126492              <bitOffset>17</bitOffset>
126493              <bitWidth>1</bitWidth>
126494              <access>read-write</access>
126495              <enumeratedValues>
126496                <enumeratedValue>
126497                  <name>0</name>
126498                  <description>Receiver samples input data using the rising edge of the baud rate clock.</description>
126499                  <value>#0</value>
126500                </enumeratedValue>
126501                <enumeratedValue>
126502                  <name>1</name>
126503                  <description>Receiver samples input data using the rising and falling edge of the baud rate clock.</description>
126504                  <value>#1</value>
126505                </enumeratedValue>
126506              </enumeratedValues>
126507            </field>
126508            <field>
126509              <name>MATCFG</name>
126510              <description>Match Configuration</description>
126511              <bitOffset>18</bitOffset>
126512              <bitWidth>2</bitWidth>
126513              <access>read-write</access>
126514              <enumeratedValues>
126515                <enumeratedValue>
126516                  <name>00</name>
126517                  <description>Address Match Wakeup</description>
126518                  <value>#00</value>
126519                </enumeratedValue>
126520                <enumeratedValue>
126521                  <name>01</name>
126522                  <description>Idle Match Wakeup</description>
126523                  <value>#01</value>
126524                </enumeratedValue>
126525                <enumeratedValue>
126526                  <name>10</name>
126527                  <description>Match On and Match Off</description>
126528                  <value>#10</value>
126529                </enumeratedValue>
126530                <enumeratedValue>
126531                  <name>11</name>
126532                  <description>Enables RWU on Data Match and Match On/Off for transmitter CTS input</description>
126533                  <value>#11</value>
126534                </enumeratedValue>
126535              </enumeratedValues>
126536            </field>
126537            <field>
126538              <name>RDMAE</name>
126539              <description>Receiver Full DMA Enable</description>
126540              <bitOffset>21</bitOffset>
126541              <bitWidth>1</bitWidth>
126542              <access>read-write</access>
126543              <enumeratedValues>
126544                <enumeratedValue>
126545                  <name>0</name>
126546                  <description>DMA request disabled.</description>
126547                  <value>#0</value>
126548                </enumeratedValue>
126549                <enumeratedValue>
126550                  <name>1</name>
126551                  <description>DMA request enabled.</description>
126552                  <value>#1</value>
126553                </enumeratedValue>
126554              </enumeratedValues>
126555            </field>
126556            <field>
126557              <name>TDMAE</name>
126558              <description>Transmitter DMA Enable</description>
126559              <bitOffset>23</bitOffset>
126560              <bitWidth>1</bitWidth>
126561              <access>read-write</access>
126562              <enumeratedValues>
126563                <enumeratedValue>
126564                  <name>0</name>
126565                  <description>DMA request disabled.</description>
126566                  <value>#0</value>
126567                </enumeratedValue>
126568                <enumeratedValue>
126569                  <name>1</name>
126570                  <description>DMA request enabled.</description>
126571                  <value>#1</value>
126572                </enumeratedValue>
126573              </enumeratedValues>
126574            </field>
126575            <field>
126576              <name>OSR</name>
126577              <description>Over Sampling Ratio</description>
126578              <bitOffset>24</bitOffset>
126579              <bitWidth>5</bitWidth>
126580              <access>read-write</access>
126581            </field>
126582            <field>
126583              <name>M10</name>
126584              <description>10-bit Mode select</description>
126585              <bitOffset>29</bitOffset>
126586              <bitWidth>1</bitWidth>
126587              <access>read-write</access>
126588              <enumeratedValues>
126589                <enumeratedValue>
126590                  <name>0</name>
126591                  <description>Receiver and transmitter use 8-bit or 9-bit data characters.</description>
126592                  <value>#0</value>
126593                </enumeratedValue>
126594                <enumeratedValue>
126595                  <name>1</name>
126596                  <description>Receiver and transmitter use 10-bit data characters.</description>
126597                  <value>#1</value>
126598                </enumeratedValue>
126599              </enumeratedValues>
126600            </field>
126601            <field>
126602              <name>MAEN2</name>
126603              <description>Match Address Mode Enable 2</description>
126604              <bitOffset>30</bitOffset>
126605              <bitWidth>1</bitWidth>
126606              <access>read-write</access>
126607              <enumeratedValues>
126608                <enumeratedValue>
126609                  <name>0</name>
126610                  <description>Normal operation.</description>
126611                  <value>#0</value>
126612                </enumeratedValue>
126613                <enumeratedValue>
126614                  <name>1</name>
126615                  <description>Enables automatic address matching or data matching mode for MATCH[MA2].</description>
126616                  <value>#1</value>
126617                </enumeratedValue>
126618              </enumeratedValues>
126619            </field>
126620            <field>
126621              <name>MAEN1</name>
126622              <description>Match Address Mode Enable 1</description>
126623              <bitOffset>31</bitOffset>
126624              <bitWidth>1</bitWidth>
126625              <access>read-write</access>
126626              <enumeratedValues>
126627                <enumeratedValue>
126628                  <name>0</name>
126629                  <description>Normal operation.</description>
126630                  <value>#0</value>
126631                </enumeratedValue>
126632                <enumeratedValue>
126633                  <name>1</name>
126634                  <description>Enables automatic address matching or data matching mode for MATCH[MA1].</description>
126635                  <value>#1</value>
126636                </enumeratedValue>
126637              </enumeratedValues>
126638            </field>
126639          </fields>
126640        </register>
126641        <register>
126642          <name>STAT</name>
126643          <description>LPUART Status Register</description>
126644          <addressOffset>0x4</addressOffset>
126645          <size>32</size>
126646          <access>read-write</access>
126647          <resetValue>0xC00000</resetValue>
126648          <resetMask>0xFFFFFFFF</resetMask>
126649          <fields>
126650            <field>
126651              <name>MA2F</name>
126652              <description>Match 2 Flag</description>
126653              <bitOffset>14</bitOffset>
126654              <bitWidth>1</bitWidth>
126655              <access>read-write</access>
126656              <enumeratedValues>
126657                <enumeratedValue>
126658                  <name>0</name>
126659                  <description>Received data is not equal to MA2</description>
126660                  <value>#0</value>
126661                </enumeratedValue>
126662                <enumeratedValue>
126663                  <name>1</name>
126664                  <description>Received data is equal to MA2</description>
126665                  <value>#1</value>
126666                </enumeratedValue>
126667              </enumeratedValues>
126668            </field>
126669            <field>
126670              <name>MA1F</name>
126671              <description>Match 1 Flag</description>
126672              <bitOffset>15</bitOffset>
126673              <bitWidth>1</bitWidth>
126674              <access>read-write</access>
126675              <enumeratedValues>
126676                <enumeratedValue>
126677                  <name>0</name>
126678                  <description>Received data is not equal to MA1</description>
126679                  <value>#0</value>
126680                </enumeratedValue>
126681                <enumeratedValue>
126682                  <name>1</name>
126683                  <description>Received data is equal to MA1</description>
126684                  <value>#1</value>
126685                </enumeratedValue>
126686              </enumeratedValues>
126687            </field>
126688            <field>
126689              <name>PF</name>
126690              <description>Parity Error Flag</description>
126691              <bitOffset>16</bitOffset>
126692              <bitWidth>1</bitWidth>
126693              <access>read-write</access>
126694              <enumeratedValues>
126695                <enumeratedValue>
126696                  <name>0</name>
126697                  <description>No parity error.</description>
126698                  <value>#0</value>
126699                </enumeratedValue>
126700                <enumeratedValue>
126701                  <name>1</name>
126702                  <description>Parity error.</description>
126703                  <value>#1</value>
126704                </enumeratedValue>
126705              </enumeratedValues>
126706            </field>
126707            <field>
126708              <name>FE</name>
126709              <description>Framing Error Flag</description>
126710              <bitOffset>17</bitOffset>
126711              <bitWidth>1</bitWidth>
126712              <access>read-write</access>
126713              <enumeratedValues>
126714                <enumeratedValue>
126715                  <name>0</name>
126716                  <description>No framing error detected. This does not guarantee the framing is correct.</description>
126717                  <value>#0</value>
126718                </enumeratedValue>
126719                <enumeratedValue>
126720                  <name>1</name>
126721                  <description>Framing error.</description>
126722                  <value>#1</value>
126723                </enumeratedValue>
126724              </enumeratedValues>
126725            </field>
126726            <field>
126727              <name>NF</name>
126728              <description>Noise Flag</description>
126729              <bitOffset>18</bitOffset>
126730              <bitWidth>1</bitWidth>
126731              <access>read-write</access>
126732              <enumeratedValues>
126733                <enumeratedValue>
126734                  <name>0</name>
126735                  <description>No noise detected.</description>
126736                  <value>#0</value>
126737                </enumeratedValue>
126738                <enumeratedValue>
126739                  <name>1</name>
126740                  <description>Noise detected in the received character in LPUART_DATA.</description>
126741                  <value>#1</value>
126742                </enumeratedValue>
126743              </enumeratedValues>
126744            </field>
126745            <field>
126746              <name>OR</name>
126747              <description>Receiver Overrun Flag</description>
126748              <bitOffset>19</bitOffset>
126749              <bitWidth>1</bitWidth>
126750              <access>read-write</access>
126751              <enumeratedValues>
126752                <enumeratedValue>
126753                  <name>0</name>
126754                  <description>No overrun.</description>
126755                  <value>#0</value>
126756                </enumeratedValue>
126757                <enumeratedValue>
126758                  <name>1</name>
126759                  <description>Receive overrun (new LPUART data lost).</description>
126760                  <value>#1</value>
126761                </enumeratedValue>
126762              </enumeratedValues>
126763            </field>
126764            <field>
126765              <name>IDLE</name>
126766              <description>Idle Line Flag</description>
126767              <bitOffset>20</bitOffset>
126768              <bitWidth>1</bitWidth>
126769              <access>read-write</access>
126770              <enumeratedValues>
126771                <enumeratedValue>
126772                  <name>0</name>
126773                  <description>No idle line detected.</description>
126774                  <value>#0</value>
126775                </enumeratedValue>
126776                <enumeratedValue>
126777                  <name>1</name>
126778                  <description>Idle line was detected.</description>
126779                  <value>#1</value>
126780                </enumeratedValue>
126781              </enumeratedValues>
126782            </field>
126783            <field>
126784              <name>RDRF</name>
126785              <description>Receive Data Register Full Flag</description>
126786              <bitOffset>21</bitOffset>
126787              <bitWidth>1</bitWidth>
126788              <access>read-only</access>
126789              <enumeratedValues>
126790                <enumeratedValue>
126791                  <name>0</name>
126792                  <description>Receive data buffer empty.</description>
126793                  <value>#0</value>
126794                </enumeratedValue>
126795                <enumeratedValue>
126796                  <name>1</name>
126797                  <description>Receive data buffer full.</description>
126798                  <value>#1</value>
126799                </enumeratedValue>
126800              </enumeratedValues>
126801            </field>
126802            <field>
126803              <name>TC</name>
126804              <description>Transmission Complete Flag</description>
126805              <bitOffset>22</bitOffset>
126806              <bitWidth>1</bitWidth>
126807              <access>read-only</access>
126808              <enumeratedValues>
126809                <enumeratedValue>
126810                  <name>0</name>
126811                  <description>Transmitter active (sending data, a preamble, or a break).</description>
126812                  <value>#0</value>
126813                </enumeratedValue>
126814                <enumeratedValue>
126815                  <name>1</name>
126816                  <description>Transmitter idle (transmission activity complete).</description>
126817                  <value>#1</value>
126818                </enumeratedValue>
126819              </enumeratedValues>
126820            </field>
126821            <field>
126822              <name>TDRE</name>
126823              <description>Transmit Data Register Empty Flag</description>
126824              <bitOffset>23</bitOffset>
126825              <bitWidth>1</bitWidth>
126826              <access>read-only</access>
126827              <enumeratedValues>
126828                <enumeratedValue>
126829                  <name>0</name>
126830                  <description>Transmit data buffer full.</description>
126831                  <value>#0</value>
126832                </enumeratedValue>
126833                <enumeratedValue>
126834                  <name>1</name>
126835                  <description>Transmit data buffer empty.</description>
126836                  <value>#1</value>
126837                </enumeratedValue>
126838              </enumeratedValues>
126839            </field>
126840            <field>
126841              <name>RAF</name>
126842              <description>Receiver Active Flag</description>
126843              <bitOffset>24</bitOffset>
126844              <bitWidth>1</bitWidth>
126845              <access>read-only</access>
126846              <enumeratedValues>
126847                <enumeratedValue>
126848                  <name>0</name>
126849                  <description>LPUART receiver idle waiting for a start bit.</description>
126850                  <value>#0</value>
126851                </enumeratedValue>
126852                <enumeratedValue>
126853                  <name>1</name>
126854                  <description>LPUART receiver active (LPUART_RX input not idle).</description>
126855                  <value>#1</value>
126856                </enumeratedValue>
126857              </enumeratedValues>
126858            </field>
126859            <field>
126860              <name>LBKDE</name>
126861              <description>LIN Break Detection Enable</description>
126862              <bitOffset>25</bitOffset>
126863              <bitWidth>1</bitWidth>
126864              <access>read-write</access>
126865              <enumeratedValues>
126866                <enumeratedValue>
126867                  <name>0</name>
126868                  <description>Break character is detected at length 10 bit times (if M = 0, SBNS = 0) or 11 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 12 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 13 (if M10 = 1, SNBS = 1).</description>
126869                  <value>#0</value>
126870                </enumeratedValue>
126871                <enumeratedValue>
126872                  <name>1</name>
126873                  <description>Break character is detected at length of 11 bit times (if M = 0, SBNS = 0) or 12 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 14 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 15 (if M10 = 1, SNBS = 1).</description>
126874                  <value>#1</value>
126875                </enumeratedValue>
126876              </enumeratedValues>
126877            </field>
126878            <field>
126879              <name>BRK13</name>
126880              <description>Break Character Generation Length</description>
126881              <bitOffset>26</bitOffset>
126882              <bitWidth>1</bitWidth>
126883              <access>read-write</access>
126884              <enumeratedValues>
126885                <enumeratedValue>
126886                  <name>0</name>
126887                  <description>Break character is transmitted with length of 10 bit times (if M = 0, SBNS = 0) or 11 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 12 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 13 (if M10 = 1, SNBS = 1).</description>
126888                  <value>#0</value>
126889                </enumeratedValue>
126890                <enumeratedValue>
126891                  <name>1</name>
126892                  <description>Break character is transmitted with length of 13 bit times (if M = 0, SBNS = 0) or 14 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 15 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 16 (if M10 = 1, SNBS = 1).</description>
126893                  <value>#1</value>
126894                </enumeratedValue>
126895              </enumeratedValues>
126896            </field>
126897            <field>
126898              <name>RWUID</name>
126899              <description>Receive Wake Up Idle Detect</description>
126900              <bitOffset>27</bitOffset>
126901              <bitWidth>1</bitWidth>
126902              <access>read-write</access>
126903              <enumeratedValues>
126904                <enumeratedValue>
126905                  <name>0</name>
126906                  <description>During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not get set when an address does not match.</description>
126907                  <value>#0</value>
126908                </enumeratedValue>
126909                <enumeratedValue>
126910                  <name>1</name>
126911                  <description>During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does get set when an address does not match.</description>
126912                  <value>#1</value>
126913                </enumeratedValue>
126914              </enumeratedValues>
126915            </field>
126916            <field>
126917              <name>RXINV</name>
126918              <description>Receive Data Inversion</description>
126919              <bitOffset>28</bitOffset>
126920              <bitWidth>1</bitWidth>
126921              <access>read-write</access>
126922              <enumeratedValues>
126923                <enumeratedValue>
126924                  <name>0</name>
126925                  <description>Receive data not inverted.</description>
126926                  <value>#0</value>
126927                </enumeratedValue>
126928                <enumeratedValue>
126929                  <name>1</name>
126930                  <description>Receive data inverted.</description>
126931                  <value>#1</value>
126932                </enumeratedValue>
126933              </enumeratedValues>
126934            </field>
126935            <field>
126936              <name>MSBF</name>
126937              <description>MSB First</description>
126938              <bitOffset>29</bitOffset>
126939              <bitWidth>1</bitWidth>
126940              <access>read-write</access>
126941              <enumeratedValues>
126942                <enumeratedValue>
126943                  <name>0</name>
126944                  <description>LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0.</description>
126945                  <value>#0</value>
126946                </enumeratedValue>
126947                <enumeratedValue>
126948                  <name>1</name>
126949                  <description>MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE].</description>
126950                  <value>#1</value>
126951                </enumeratedValue>
126952              </enumeratedValues>
126953            </field>
126954            <field>
126955              <name>RXEDGIF</name>
126956              <description>LPUART_RX Pin Active Edge Interrupt Flag</description>
126957              <bitOffset>30</bitOffset>
126958              <bitWidth>1</bitWidth>
126959              <access>read-write</access>
126960              <enumeratedValues>
126961                <enumeratedValue>
126962                  <name>0</name>
126963                  <description>No active edge on the receive pin has occurred.</description>
126964                  <value>#0</value>
126965                </enumeratedValue>
126966                <enumeratedValue>
126967                  <name>1</name>
126968                  <description>An active edge on the receive pin has occurred.</description>
126969                  <value>#1</value>
126970                </enumeratedValue>
126971              </enumeratedValues>
126972            </field>
126973            <field>
126974              <name>LBKDIF</name>
126975              <description>LIN Break Detect Interrupt Flag</description>
126976              <bitOffset>31</bitOffset>
126977              <bitWidth>1</bitWidth>
126978              <access>read-write</access>
126979              <enumeratedValues>
126980                <enumeratedValue>
126981                  <name>0</name>
126982                  <description>No LIN break character has been detected.</description>
126983                  <value>#0</value>
126984                </enumeratedValue>
126985                <enumeratedValue>
126986                  <name>1</name>
126987                  <description>LIN break character has been detected.</description>
126988                  <value>#1</value>
126989                </enumeratedValue>
126990              </enumeratedValues>
126991            </field>
126992          </fields>
126993        </register>
126994        <register>
126995          <name>CTRL</name>
126996          <description>LPUART Control Register</description>
126997          <addressOffset>0x8</addressOffset>
126998          <size>32</size>
126999          <access>read-write</access>
127000          <resetValue>0</resetValue>
127001          <resetMask>0xFFFFFFFF</resetMask>
127002          <fields>
127003            <field>
127004              <name>PT</name>
127005              <description>Parity Type</description>
127006              <bitOffset>0</bitOffset>
127007              <bitWidth>1</bitWidth>
127008              <access>read-write</access>
127009              <enumeratedValues>
127010                <enumeratedValue>
127011                  <name>0</name>
127012                  <description>Even parity.</description>
127013                  <value>#0</value>
127014                </enumeratedValue>
127015                <enumeratedValue>
127016                  <name>1</name>
127017                  <description>Odd parity.</description>
127018                  <value>#1</value>
127019                </enumeratedValue>
127020              </enumeratedValues>
127021            </field>
127022            <field>
127023              <name>PE</name>
127024              <description>Parity Enable</description>
127025              <bitOffset>1</bitOffset>
127026              <bitWidth>1</bitWidth>
127027              <access>read-write</access>
127028              <enumeratedValues>
127029                <enumeratedValue>
127030                  <name>0</name>
127031                  <description>No hardware parity generation or checking.</description>
127032                  <value>#0</value>
127033                </enumeratedValue>
127034                <enumeratedValue>
127035                  <name>1</name>
127036                  <description>Parity enabled.</description>
127037                  <value>#1</value>
127038                </enumeratedValue>
127039              </enumeratedValues>
127040            </field>
127041            <field>
127042              <name>ILT</name>
127043              <description>Idle Line Type Select</description>
127044              <bitOffset>2</bitOffset>
127045              <bitWidth>1</bitWidth>
127046              <access>read-write</access>
127047              <enumeratedValues>
127048                <enumeratedValue>
127049                  <name>0</name>
127050                  <description>Idle character bit count starts after start bit.</description>
127051                  <value>#0</value>
127052                </enumeratedValue>
127053                <enumeratedValue>
127054                  <name>1</name>
127055                  <description>Idle character bit count starts after stop bit.</description>
127056                  <value>#1</value>
127057                </enumeratedValue>
127058              </enumeratedValues>
127059            </field>
127060            <field>
127061              <name>WAKE</name>
127062              <description>Receiver Wakeup Method Select</description>
127063              <bitOffset>3</bitOffset>
127064              <bitWidth>1</bitWidth>
127065              <access>read-write</access>
127066              <enumeratedValues>
127067                <enumeratedValue>
127068                  <name>0</name>
127069                  <description>Configures RWU for idle-line wakeup.</description>
127070                  <value>#0</value>
127071                </enumeratedValue>
127072                <enumeratedValue>
127073                  <name>1</name>
127074                  <description>Configures RWU with address-mark wakeup.</description>
127075                  <value>#1</value>
127076                </enumeratedValue>
127077              </enumeratedValues>
127078            </field>
127079            <field>
127080              <name>M</name>
127081              <description>9-Bit or 8-Bit Mode Select</description>
127082              <bitOffset>4</bitOffset>
127083              <bitWidth>1</bitWidth>
127084              <access>read-write</access>
127085              <enumeratedValues>
127086                <enumeratedValue>
127087                  <name>0</name>
127088                  <description>Receiver and transmitter use 8-bit data characters.</description>
127089                  <value>#0</value>
127090                </enumeratedValue>
127091                <enumeratedValue>
127092                  <name>1</name>
127093                  <description>Receiver and transmitter use 9-bit data characters.</description>
127094                  <value>#1</value>
127095                </enumeratedValue>
127096              </enumeratedValues>
127097            </field>
127098            <field>
127099              <name>RSRC</name>
127100              <description>Receiver Source Select</description>
127101              <bitOffset>5</bitOffset>
127102              <bitWidth>1</bitWidth>
127103              <access>read-write</access>
127104              <enumeratedValues>
127105                <enumeratedValue>
127106                  <name>0</name>
127107                  <description>Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the LPUART_RX pin.</description>
127108                  <value>#0</value>
127109                </enumeratedValue>
127110                <enumeratedValue>
127111                  <name>1</name>
127112                  <description>Single-wire LPUART mode where the LPUART_TX pin is connected to the transmitter output and receiver input.</description>
127113                  <value>#1</value>
127114                </enumeratedValue>
127115              </enumeratedValues>
127116            </field>
127117            <field>
127118              <name>DOZEEN</name>
127119              <description>Doze Enable</description>
127120              <bitOffset>6</bitOffset>
127121              <bitWidth>1</bitWidth>
127122              <access>read-write</access>
127123              <enumeratedValues>
127124                <enumeratedValue>
127125                  <name>0</name>
127126                  <description>LPUART is enabled in Doze mode.</description>
127127                  <value>#0</value>
127128                </enumeratedValue>
127129                <enumeratedValue>
127130                  <name>1</name>
127131                  <description>LPUART is disabled in Doze mode.</description>
127132                  <value>#1</value>
127133                </enumeratedValue>
127134              </enumeratedValues>
127135            </field>
127136            <field>
127137              <name>LOOPS</name>
127138              <description>Loop Mode Select</description>
127139              <bitOffset>7</bitOffset>
127140              <bitWidth>1</bitWidth>
127141              <access>read-write</access>
127142              <enumeratedValues>
127143                <enumeratedValue>
127144                  <name>0</name>
127145                  <description>Normal operation - LPUART_RX and LPUART_TX use separate pins.</description>
127146                  <value>#0</value>
127147                </enumeratedValue>
127148                <enumeratedValue>
127149                  <name>1</name>
127150                  <description>Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit).</description>
127151                  <value>#1</value>
127152                </enumeratedValue>
127153              </enumeratedValues>
127154            </field>
127155            <field>
127156              <name>IDLECFG</name>
127157              <description>Idle Configuration</description>
127158              <bitOffset>8</bitOffset>
127159              <bitWidth>3</bitWidth>
127160              <access>read-write</access>
127161              <enumeratedValues>
127162                <enumeratedValue>
127163                  <name>000</name>
127164                  <description>1 idle character</description>
127165                  <value>#000</value>
127166                </enumeratedValue>
127167                <enumeratedValue>
127168                  <name>001</name>
127169                  <description>2 idle characters</description>
127170                  <value>#001</value>
127171                </enumeratedValue>
127172                <enumeratedValue>
127173                  <name>010</name>
127174                  <description>4 idle characters</description>
127175                  <value>#010</value>
127176                </enumeratedValue>
127177                <enumeratedValue>
127178                  <name>011</name>
127179                  <description>8 idle characters</description>
127180                  <value>#011</value>
127181                </enumeratedValue>
127182                <enumeratedValue>
127183                  <name>100</name>
127184                  <description>16 idle characters</description>
127185                  <value>#100</value>
127186                </enumeratedValue>
127187                <enumeratedValue>
127188                  <name>101</name>
127189                  <description>32 idle characters</description>
127190                  <value>#101</value>
127191                </enumeratedValue>
127192                <enumeratedValue>
127193                  <name>110</name>
127194                  <description>64 idle characters</description>
127195                  <value>#110</value>
127196                </enumeratedValue>
127197                <enumeratedValue>
127198                  <name>111</name>
127199                  <description>128 idle characters</description>
127200                  <value>#111</value>
127201                </enumeratedValue>
127202              </enumeratedValues>
127203            </field>
127204            <field>
127205              <name>MA2IE</name>
127206              <description>Match 2 Interrupt Enable</description>
127207              <bitOffset>14</bitOffset>
127208              <bitWidth>1</bitWidth>
127209              <access>read-write</access>
127210              <enumeratedValues>
127211                <enumeratedValue>
127212                  <name>0</name>
127213                  <description>MA2F interrupt disabled</description>
127214                  <value>#0</value>
127215                </enumeratedValue>
127216                <enumeratedValue>
127217                  <name>1</name>
127218                  <description>MA2F interrupt enabled</description>
127219                  <value>#1</value>
127220                </enumeratedValue>
127221              </enumeratedValues>
127222            </field>
127223            <field>
127224              <name>MA1IE</name>
127225              <description>Match 1 Interrupt Enable</description>
127226              <bitOffset>15</bitOffset>
127227              <bitWidth>1</bitWidth>
127228              <access>read-write</access>
127229              <enumeratedValues>
127230                <enumeratedValue>
127231                  <name>0</name>
127232                  <description>MA1F interrupt disabled</description>
127233                  <value>#0</value>
127234                </enumeratedValue>
127235                <enumeratedValue>
127236                  <name>1</name>
127237                  <description>MA1F interrupt enabled</description>
127238                  <value>#1</value>
127239                </enumeratedValue>
127240              </enumeratedValues>
127241            </field>
127242            <field>
127243              <name>SBK</name>
127244              <description>Send Break</description>
127245              <bitOffset>16</bitOffset>
127246              <bitWidth>1</bitWidth>
127247              <access>read-write</access>
127248              <enumeratedValues>
127249                <enumeratedValue>
127250                  <name>0</name>
127251                  <description>Normal transmitter operation.</description>
127252                  <value>#0</value>
127253                </enumeratedValue>
127254                <enumeratedValue>
127255                  <name>1</name>
127256                  <description>Queue break character(s) to be sent.</description>
127257                  <value>#1</value>
127258                </enumeratedValue>
127259              </enumeratedValues>
127260            </field>
127261            <field>
127262              <name>RWU</name>
127263              <description>Receiver Wakeup Control</description>
127264              <bitOffset>17</bitOffset>
127265              <bitWidth>1</bitWidth>
127266              <access>read-write</access>
127267              <enumeratedValues>
127268                <enumeratedValue>
127269                  <name>0</name>
127270                  <description>Normal receiver operation.</description>
127271                  <value>#0</value>
127272                </enumeratedValue>
127273                <enumeratedValue>
127274                  <name>1</name>
127275                  <description>LPUART receiver in standby waiting for wakeup condition.</description>
127276                  <value>#1</value>
127277                </enumeratedValue>
127278              </enumeratedValues>
127279            </field>
127280            <field>
127281              <name>RE</name>
127282              <description>Receiver Enable</description>
127283              <bitOffset>18</bitOffset>
127284              <bitWidth>1</bitWidth>
127285              <access>read-write</access>
127286              <enumeratedValues>
127287                <enumeratedValue>
127288                  <name>0</name>
127289                  <description>Receiver disabled.</description>
127290                  <value>#0</value>
127291                </enumeratedValue>
127292                <enumeratedValue>
127293                  <name>1</name>
127294                  <description>Receiver enabled.</description>
127295                  <value>#1</value>
127296                </enumeratedValue>
127297              </enumeratedValues>
127298            </field>
127299            <field>
127300              <name>TE</name>
127301              <description>Transmitter Enable</description>
127302              <bitOffset>19</bitOffset>
127303              <bitWidth>1</bitWidth>
127304              <access>read-write</access>
127305              <enumeratedValues>
127306                <enumeratedValue>
127307                  <name>0</name>
127308                  <description>Transmitter disabled.</description>
127309                  <value>#0</value>
127310                </enumeratedValue>
127311                <enumeratedValue>
127312                  <name>1</name>
127313                  <description>Transmitter enabled.</description>
127314                  <value>#1</value>
127315                </enumeratedValue>
127316              </enumeratedValues>
127317            </field>
127318            <field>
127319              <name>ILIE</name>
127320              <description>Idle Line Interrupt Enable</description>
127321              <bitOffset>20</bitOffset>
127322              <bitWidth>1</bitWidth>
127323              <access>read-write</access>
127324              <enumeratedValues>
127325                <enumeratedValue>
127326                  <name>0</name>
127327                  <description>Hardware interrupts from IDLE disabled; use polling.</description>
127328                  <value>#0</value>
127329                </enumeratedValue>
127330                <enumeratedValue>
127331                  <name>1</name>
127332                  <description>Hardware interrupt requested when IDLE flag is 1.</description>
127333                  <value>#1</value>
127334                </enumeratedValue>
127335              </enumeratedValues>
127336            </field>
127337            <field>
127338              <name>RIE</name>
127339              <description>Receiver Interrupt Enable</description>
127340              <bitOffset>21</bitOffset>
127341              <bitWidth>1</bitWidth>
127342              <access>read-write</access>
127343              <enumeratedValues>
127344                <enumeratedValue>
127345                  <name>0</name>
127346                  <description>Hardware interrupts from RDRF disabled; use polling.</description>
127347                  <value>#0</value>
127348                </enumeratedValue>
127349                <enumeratedValue>
127350                  <name>1</name>
127351                  <description>Hardware interrupt requested when RDRF flag is 1.</description>
127352                  <value>#1</value>
127353                </enumeratedValue>
127354              </enumeratedValues>
127355            </field>
127356            <field>
127357              <name>TCIE</name>
127358              <description>Transmission Complete Interrupt Enable for</description>
127359              <bitOffset>22</bitOffset>
127360              <bitWidth>1</bitWidth>
127361              <access>read-write</access>
127362              <enumeratedValues>
127363                <enumeratedValue>
127364                  <name>0</name>
127365                  <description>Hardware interrupts from TC disabled; use polling.</description>
127366                  <value>#0</value>
127367                </enumeratedValue>
127368                <enumeratedValue>
127369                  <name>1</name>
127370                  <description>Hardware interrupt requested when TC flag is 1.</description>
127371                  <value>#1</value>
127372                </enumeratedValue>
127373              </enumeratedValues>
127374            </field>
127375            <field>
127376              <name>TIE</name>
127377              <description>Transmit Interrupt Enable</description>
127378              <bitOffset>23</bitOffset>
127379              <bitWidth>1</bitWidth>
127380              <access>read-write</access>
127381              <enumeratedValues>
127382                <enumeratedValue>
127383                  <name>0</name>
127384                  <description>Hardware interrupts from TDRE disabled; use polling.</description>
127385                  <value>#0</value>
127386                </enumeratedValue>
127387                <enumeratedValue>
127388                  <name>1</name>
127389                  <description>Hardware interrupt requested when TDRE flag is 1.</description>
127390                  <value>#1</value>
127391                </enumeratedValue>
127392              </enumeratedValues>
127393            </field>
127394            <field>
127395              <name>PEIE</name>
127396              <description>Parity Error Interrupt Enable</description>
127397              <bitOffset>24</bitOffset>
127398              <bitWidth>1</bitWidth>
127399              <access>read-write</access>
127400              <enumeratedValues>
127401                <enumeratedValue>
127402                  <name>0</name>
127403                  <description>PF interrupts disabled; use polling).</description>
127404                  <value>#0</value>
127405                </enumeratedValue>
127406                <enumeratedValue>
127407                  <name>1</name>
127408                  <description>Hardware interrupt requested when PF is set.</description>
127409                  <value>#1</value>
127410                </enumeratedValue>
127411              </enumeratedValues>
127412            </field>
127413            <field>
127414              <name>FEIE</name>
127415              <description>Framing Error Interrupt Enable</description>
127416              <bitOffset>25</bitOffset>
127417              <bitWidth>1</bitWidth>
127418              <access>read-write</access>
127419              <enumeratedValues>
127420                <enumeratedValue>
127421                  <name>0</name>
127422                  <description>FE interrupts disabled; use polling.</description>
127423                  <value>#0</value>
127424                </enumeratedValue>
127425                <enumeratedValue>
127426                  <name>1</name>
127427                  <description>Hardware interrupt requested when FE is set.</description>
127428                  <value>#1</value>
127429                </enumeratedValue>
127430              </enumeratedValues>
127431            </field>
127432            <field>
127433              <name>NEIE</name>
127434              <description>Noise Error Interrupt Enable</description>
127435              <bitOffset>26</bitOffset>
127436              <bitWidth>1</bitWidth>
127437              <access>read-write</access>
127438              <enumeratedValues>
127439                <enumeratedValue>
127440                  <name>0</name>
127441                  <description>NF interrupts disabled; use polling.</description>
127442                  <value>#0</value>
127443                </enumeratedValue>
127444                <enumeratedValue>
127445                  <name>1</name>
127446                  <description>Hardware interrupt requested when NF is set.</description>
127447                  <value>#1</value>
127448                </enumeratedValue>
127449              </enumeratedValues>
127450            </field>
127451            <field>
127452              <name>ORIE</name>
127453              <description>Overrun Interrupt Enable</description>
127454              <bitOffset>27</bitOffset>
127455              <bitWidth>1</bitWidth>
127456              <access>read-write</access>
127457              <enumeratedValues>
127458                <enumeratedValue>
127459                  <name>0</name>
127460                  <description>OR interrupts disabled; use polling.</description>
127461                  <value>#0</value>
127462                </enumeratedValue>
127463                <enumeratedValue>
127464                  <name>1</name>
127465                  <description>Hardware interrupt requested when OR is set.</description>
127466                  <value>#1</value>
127467                </enumeratedValue>
127468              </enumeratedValues>
127469            </field>
127470            <field>
127471              <name>TXINV</name>
127472              <description>Transmit Data Inversion</description>
127473              <bitOffset>28</bitOffset>
127474              <bitWidth>1</bitWidth>
127475              <access>read-write</access>
127476              <enumeratedValues>
127477                <enumeratedValue>
127478                  <name>0</name>
127479                  <description>Transmit data not inverted.</description>
127480                  <value>#0</value>
127481                </enumeratedValue>
127482                <enumeratedValue>
127483                  <name>1</name>
127484                  <description>Transmit data inverted.</description>
127485                  <value>#1</value>
127486                </enumeratedValue>
127487              </enumeratedValues>
127488            </field>
127489            <field>
127490              <name>TXDIR</name>
127491              <description>LPUART_TX Pin Direction in Single-Wire Mode</description>
127492              <bitOffset>29</bitOffset>
127493              <bitWidth>1</bitWidth>
127494              <access>read-write</access>
127495              <enumeratedValues>
127496                <enumeratedValue>
127497                  <name>0</name>
127498                  <description>LPUART_TX pin is an input in single-wire mode.</description>
127499                  <value>#0</value>
127500                </enumeratedValue>
127501                <enumeratedValue>
127502                  <name>1</name>
127503                  <description>LPUART_TX pin is an output in single-wire mode.</description>
127504                  <value>#1</value>
127505                </enumeratedValue>
127506              </enumeratedValues>
127507            </field>
127508            <field>
127509              <name>R9T8</name>
127510              <description>Receive Bit 9 / Transmit Bit 8</description>
127511              <bitOffset>30</bitOffset>
127512              <bitWidth>1</bitWidth>
127513              <access>read-write</access>
127514            </field>
127515            <field>
127516              <name>R8T9</name>
127517              <description>Receive Bit 8 / Transmit Bit 9</description>
127518              <bitOffset>31</bitOffset>
127519              <bitWidth>1</bitWidth>
127520              <access>read-write</access>
127521            </field>
127522          </fields>
127523        </register>
127524        <register>
127525          <name>DATA</name>
127526          <description>LPUART Data Register</description>
127527          <addressOffset>0xC</addressOffset>
127528          <size>32</size>
127529          <access>read-write</access>
127530          <resetValue>0x1000</resetValue>
127531          <resetMask>0xFFFFFFFF</resetMask>
127532          <fields>
127533            <field>
127534              <name>R0T0</name>
127535              <description>Read receive data buffer 0 or write transmit data buffer 0.</description>
127536              <bitOffset>0</bitOffset>
127537              <bitWidth>1</bitWidth>
127538              <access>read-write</access>
127539            </field>
127540            <field>
127541              <name>R1T1</name>
127542              <description>Read receive data buffer 1 or write transmit data buffer 1.</description>
127543              <bitOffset>1</bitOffset>
127544              <bitWidth>1</bitWidth>
127545              <access>read-write</access>
127546            </field>
127547            <field>
127548              <name>R2T2</name>
127549              <description>Read receive data buffer 2 or write transmit data buffer 2.</description>
127550              <bitOffset>2</bitOffset>
127551              <bitWidth>1</bitWidth>
127552              <access>read-write</access>
127553            </field>
127554            <field>
127555              <name>R3T3</name>
127556              <description>Read receive data buffer 3 or write transmit data buffer 3.</description>
127557              <bitOffset>3</bitOffset>
127558              <bitWidth>1</bitWidth>
127559              <access>read-write</access>
127560            </field>
127561            <field>
127562              <name>R4T4</name>
127563              <description>Read receive data buffer 4 or write transmit data buffer 4.</description>
127564              <bitOffset>4</bitOffset>
127565              <bitWidth>1</bitWidth>
127566              <access>read-write</access>
127567            </field>
127568            <field>
127569              <name>R5T5</name>
127570              <description>Read receive data buffer 5 or write transmit data buffer 5.</description>
127571              <bitOffset>5</bitOffset>
127572              <bitWidth>1</bitWidth>
127573              <access>read-write</access>
127574            </field>
127575            <field>
127576              <name>R6T6</name>
127577              <description>Read receive data buffer 6 or write transmit data buffer 6.</description>
127578              <bitOffset>6</bitOffset>
127579              <bitWidth>1</bitWidth>
127580              <access>read-write</access>
127581            </field>
127582            <field>
127583              <name>R7T7</name>
127584              <description>Read receive data buffer 7 or write transmit data buffer 7.</description>
127585              <bitOffset>7</bitOffset>
127586              <bitWidth>1</bitWidth>
127587              <access>read-write</access>
127588            </field>
127589            <field>
127590              <name>R8T8</name>
127591              <description>Read receive data buffer 8 or write transmit data buffer 8.</description>
127592              <bitOffset>8</bitOffset>
127593              <bitWidth>1</bitWidth>
127594              <access>read-write</access>
127595            </field>
127596            <field>
127597              <name>R9T9</name>
127598              <description>Read receive data buffer 9 or write transmit data buffer 9.</description>
127599              <bitOffset>9</bitOffset>
127600              <bitWidth>1</bitWidth>
127601              <access>read-write</access>
127602            </field>
127603            <field>
127604              <name>IDLINE</name>
127605              <description>Idle Line</description>
127606              <bitOffset>11</bitOffset>
127607              <bitWidth>1</bitWidth>
127608              <access>read-only</access>
127609              <enumeratedValues>
127610                <enumeratedValue>
127611                  <name>0</name>
127612                  <description>Receiver was not idle before receiving this character.</description>
127613                  <value>#0</value>
127614                </enumeratedValue>
127615                <enumeratedValue>
127616                  <name>1</name>
127617                  <description>Receiver was idle before receiving this character.</description>
127618                  <value>#1</value>
127619                </enumeratedValue>
127620              </enumeratedValues>
127621            </field>
127622            <field>
127623              <name>RXEMPT</name>
127624              <description>Receive Buffer Empty</description>
127625              <bitOffset>12</bitOffset>
127626              <bitWidth>1</bitWidth>
127627              <access>read-only</access>
127628              <enumeratedValues>
127629                <enumeratedValue>
127630                  <name>0</name>
127631                  <description>Receive buffer contains valid data.</description>
127632                  <value>#0</value>
127633                </enumeratedValue>
127634                <enumeratedValue>
127635                  <name>1</name>
127636                  <description>Receive buffer is empty, data returned on read is not valid.</description>
127637                  <value>#1</value>
127638                </enumeratedValue>
127639              </enumeratedValues>
127640            </field>
127641            <field>
127642              <name>FRETSC</name>
127643              <description>Frame Error / Transmit Special Character</description>
127644              <bitOffset>13</bitOffset>
127645              <bitWidth>1</bitWidth>
127646              <access>read-write</access>
127647              <enumeratedValues>
127648                <enumeratedValue>
127649                  <name>0</name>
127650                  <description>The dataword was received without a frame error on read, transmit a normal character on write.</description>
127651                  <value>#0</value>
127652                </enumeratedValue>
127653                <enumeratedValue>
127654                  <name>1</name>
127655                  <description>The dataword was received with a frame error, transmit an idle or break character on transmit.</description>
127656                  <value>#1</value>
127657                </enumeratedValue>
127658              </enumeratedValues>
127659            </field>
127660            <field>
127661              <name>PARITYE</name>
127662              <description>The current received dataword contained in DATA[R9:R0] was received with a parity error.</description>
127663              <bitOffset>14</bitOffset>
127664              <bitWidth>1</bitWidth>
127665              <access>read-only</access>
127666              <enumeratedValues>
127667                <enumeratedValue>
127668                  <name>0</name>
127669                  <description>The dataword was received without a parity error.</description>
127670                  <value>#0</value>
127671                </enumeratedValue>
127672                <enumeratedValue>
127673                  <name>1</name>
127674                  <description>The dataword was received with a parity error.</description>
127675                  <value>#1</value>
127676                </enumeratedValue>
127677              </enumeratedValues>
127678            </field>
127679            <field>
127680              <name>NOISY</name>
127681              <description>The current received dataword contained in DATA[R9:R0] was received with noise.</description>
127682              <bitOffset>15</bitOffset>
127683              <bitWidth>1</bitWidth>
127684              <access>read-only</access>
127685              <enumeratedValues>
127686                <enumeratedValue>
127687                  <name>0</name>
127688                  <description>The dataword was received without noise.</description>
127689                  <value>#0</value>
127690                </enumeratedValue>
127691                <enumeratedValue>
127692                  <name>1</name>
127693                  <description>The data was received with noise.</description>
127694                  <value>#1</value>
127695                </enumeratedValue>
127696              </enumeratedValues>
127697            </field>
127698          </fields>
127699        </register>
127700        <register>
127701          <name>MATCH</name>
127702          <description>LPUART Match Address Register</description>
127703          <addressOffset>0x10</addressOffset>
127704          <size>32</size>
127705          <access>read-write</access>
127706          <resetValue>0</resetValue>
127707          <resetMask>0xFFFFFFFF</resetMask>
127708          <fields>
127709            <field>
127710              <name>MA1</name>
127711              <description>Match Address 1</description>
127712              <bitOffset>0</bitOffset>
127713              <bitWidth>10</bitWidth>
127714              <access>read-write</access>
127715            </field>
127716            <field>
127717              <name>MA2</name>
127718              <description>Match Address 2</description>
127719              <bitOffset>16</bitOffset>
127720              <bitWidth>10</bitWidth>
127721              <access>read-write</access>
127722            </field>
127723          </fields>
127724        </register>
127725        <register>
127726          <name>MODIR</name>
127727          <description>LPUART Modem IrDA Register</description>
127728          <addressOffset>0x14</addressOffset>
127729          <size>32</size>
127730          <access>read-write</access>
127731          <resetValue>0</resetValue>
127732          <resetMask>0xFFFFFFFF</resetMask>
127733          <fields>
127734            <field>
127735              <name>TXCTSE</name>
127736              <description>Transmitter clear-to-send enable</description>
127737              <bitOffset>0</bitOffset>
127738              <bitWidth>1</bitWidth>
127739              <access>read-write</access>
127740              <enumeratedValues>
127741                <enumeratedValue>
127742                  <name>0</name>
127743                  <description>CTS has no effect on the transmitter.</description>
127744                  <value>#0</value>
127745                </enumeratedValue>
127746                <enumeratedValue>
127747                  <name>1</name>
127748                  <description>Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission.</description>
127749                  <value>#1</value>
127750                </enumeratedValue>
127751              </enumeratedValues>
127752            </field>
127753            <field>
127754              <name>TXRTSE</name>
127755              <description>Transmitter request-to-send enable</description>
127756              <bitOffset>1</bitOffset>
127757              <bitWidth>1</bitWidth>
127758              <access>read-write</access>
127759              <enumeratedValues>
127760                <enumeratedValue>
127761                  <name>0</name>
127762                  <description>The transmitter has no effect on RTS.</description>
127763                  <value>#0</value>
127764                </enumeratedValue>
127765                <enumeratedValue>
127766                  <name>1</name>
127767                  <description>When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit.</description>
127768                  <value>#1</value>
127769                </enumeratedValue>
127770              </enumeratedValues>
127771            </field>
127772            <field>
127773              <name>TXRTSPOL</name>
127774              <description>Transmitter request-to-send polarity</description>
127775              <bitOffset>2</bitOffset>
127776              <bitWidth>1</bitWidth>
127777              <access>read-write</access>
127778              <enumeratedValues>
127779                <enumeratedValue>
127780                  <name>0</name>
127781                  <description>Transmitter RTS is active low.</description>
127782                  <value>#0</value>
127783                </enumeratedValue>
127784                <enumeratedValue>
127785                  <name>1</name>
127786                  <description>Transmitter RTS is active high.</description>
127787                  <value>#1</value>
127788                </enumeratedValue>
127789              </enumeratedValues>
127790            </field>
127791            <field>
127792              <name>RXRTSE</name>
127793              <description>Receiver request-to-send enable</description>
127794              <bitOffset>3</bitOffset>
127795              <bitWidth>1</bitWidth>
127796              <access>read-write</access>
127797              <enumeratedValues>
127798                <enumeratedValue>
127799                  <name>0</name>
127800                  <description>The receiver has no effect on RTS.</description>
127801                  <value>#0</value>
127802                </enumeratedValue>
127803                <enumeratedValue>
127804                  <name>1</name>
127805                  <description>RTS is deasserted if the receiver data register is full or a start bit has been detected that would cause the receiver data register to become full. RTS is asserted if the receiver data register is not full and has not detected a start bit that would cause the receiver data register to become full.</description>
127806                  <value>#1</value>
127807                </enumeratedValue>
127808              </enumeratedValues>
127809            </field>
127810            <field>
127811              <name>TXCTSC</name>
127812              <description>Transmit CTS Configuration</description>
127813              <bitOffset>4</bitOffset>
127814              <bitWidth>1</bitWidth>
127815              <access>read-write</access>
127816              <enumeratedValues>
127817                <enumeratedValue>
127818                  <name>0</name>
127819                  <description>CTS input is sampled at the start of each character.</description>
127820                  <value>#0</value>
127821                </enumeratedValue>
127822                <enumeratedValue>
127823                  <name>1</name>
127824                  <description>CTS input is sampled when the transmitter is idle.</description>
127825                  <value>#1</value>
127826                </enumeratedValue>
127827              </enumeratedValues>
127828            </field>
127829            <field>
127830              <name>TXCTSSRC</name>
127831              <description>Transmit CTS Source</description>
127832              <bitOffset>5</bitOffset>
127833              <bitWidth>1</bitWidth>
127834              <access>read-write</access>
127835              <enumeratedValues>
127836                <enumeratedValue>
127837                  <name>0</name>
127838                  <description>CTS input is the LPUART_CTS pin.</description>
127839                  <value>#0</value>
127840                </enumeratedValue>
127841                <enumeratedValue>
127842                  <name>1</name>
127843                  <description>CTS input is the inverted Receiver Match result.</description>
127844                  <value>#1</value>
127845                </enumeratedValue>
127846              </enumeratedValues>
127847            </field>
127848            <field>
127849              <name>RTSWATER</name>
127850              <description>Receive RTS Configuration</description>
127851              <bitOffset>8</bitOffset>
127852              <bitWidth>8</bitWidth>
127853              <access>read-write</access>
127854              <enumeratedValues>
127855                <enumeratedValue>
127856                  <name>0</name>
127857                  <description>RTS asserts when the receiver FIFO is full or receiving a character that causes the FIFO to become full.</description>
127858                  <value>#0</value>
127859                </enumeratedValue>
127860                <enumeratedValue>
127861                  <name>1</name>
127862                  <description>RTS asserts when the receive FIFO is less than or equal to the RXWATER configuration and negates when the receive FIFO is greater than the RXWATER configuration.</description>
127863                  <value>#1</value>
127864                </enumeratedValue>
127865              </enumeratedValues>
127866            </field>
127867            <field>
127868              <name>TNP</name>
127869              <description>Transmitter narrow pulse</description>
127870              <bitOffset>16</bitOffset>
127871              <bitWidth>2</bitWidth>
127872              <access>read-write</access>
127873              <enumeratedValues>
127874                <enumeratedValue>
127875                  <name>00</name>
127876                  <description>1/OSR.</description>
127877                  <value>#00</value>
127878                </enumeratedValue>
127879                <enumeratedValue>
127880                  <name>01</name>
127881                  <description>2/OSR.</description>
127882                  <value>#01</value>
127883                </enumeratedValue>
127884                <enumeratedValue>
127885                  <name>10</name>
127886                  <description>3/OSR.</description>
127887                  <value>#10</value>
127888                </enumeratedValue>
127889                <enumeratedValue>
127890                  <name>11</name>
127891                  <description>4/OSR.</description>
127892                  <value>#11</value>
127893                </enumeratedValue>
127894              </enumeratedValues>
127895            </field>
127896            <field>
127897              <name>IREN</name>
127898              <description>Infrared enable</description>
127899              <bitOffset>18</bitOffset>
127900              <bitWidth>1</bitWidth>
127901              <access>read-write</access>
127902              <enumeratedValues>
127903                <enumeratedValue>
127904                  <name>0</name>
127905                  <description>IR disabled.</description>
127906                  <value>#0</value>
127907                </enumeratedValue>
127908                <enumeratedValue>
127909                  <name>1</name>
127910                  <description>IR enabled.</description>
127911                  <value>#1</value>
127912                </enumeratedValue>
127913              </enumeratedValues>
127914            </field>
127915          </fields>
127916        </register>
127917        <register>
127918          <name>FIFO</name>
127919          <description>LPUART FIFO Register</description>
127920          <addressOffset>0x18</addressOffset>
127921          <size>32</size>
127922          <access>read-write</access>
127923          <resetValue>0x22</resetValue>
127924          <resetMask>0xFFFFFFFF</resetMask>
127925          <fields>
127926            <field>
127927              <name>RXFIFOSIZE</name>
127928              <description>Receive FIFO. Buffer Depth</description>
127929              <bitOffset>0</bitOffset>
127930              <bitWidth>3</bitWidth>
127931              <access>read-only</access>
127932              <enumeratedValues>
127933                <enumeratedValue>
127934                  <name>000</name>
127935                  <description>Receive FIFO/Buffer depth = 1 dataword.</description>
127936                  <value>#000</value>
127937                </enumeratedValue>
127938                <enumeratedValue>
127939                  <name>001</name>
127940                  <description>Receive FIFO/Buffer depth = 4 datawords.</description>
127941                  <value>#001</value>
127942                </enumeratedValue>
127943                <enumeratedValue>
127944                  <name>010</name>
127945                  <description>Receive FIFO/Buffer depth = 8 datawords.</description>
127946                  <value>#010</value>
127947                </enumeratedValue>
127948                <enumeratedValue>
127949                  <name>011</name>
127950                  <description>Receive FIFO/Buffer depth = 16 datawords.</description>
127951                  <value>#011</value>
127952                </enumeratedValue>
127953                <enumeratedValue>
127954                  <name>100</name>
127955                  <description>Receive FIFO/Buffer depth = 32 datawords.</description>
127956                  <value>#100</value>
127957                </enumeratedValue>
127958                <enumeratedValue>
127959                  <name>101</name>
127960                  <description>Receive FIFO/Buffer depth = 64 datawords.</description>
127961                  <value>#101</value>
127962                </enumeratedValue>
127963                <enumeratedValue>
127964                  <name>110</name>
127965                  <description>Receive FIFO/Buffer depth = 128 datawords.</description>
127966                  <value>#110</value>
127967                </enumeratedValue>
127968                <enumeratedValue>
127969                  <name>111</name>
127970                  <description>Receive FIFO/Buffer depth = 256 datawords.</description>
127971                  <value>#111</value>
127972                </enumeratedValue>
127973              </enumeratedValues>
127974            </field>
127975            <field>
127976              <name>RXFE</name>
127977              <description>Receive FIFO Enable</description>
127978              <bitOffset>3</bitOffset>
127979              <bitWidth>1</bitWidth>
127980              <access>read-write</access>
127981              <enumeratedValues>
127982                <enumeratedValue>
127983                  <name>0</name>
127984                  <description>Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)</description>
127985                  <value>#0</value>
127986                </enumeratedValue>
127987                <enumeratedValue>
127988                  <name>1</name>
127989                  <description>Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE.</description>
127990                  <value>#1</value>
127991                </enumeratedValue>
127992              </enumeratedValues>
127993            </field>
127994            <field>
127995              <name>TXFIFOSIZE</name>
127996              <description>Transmit FIFO. Buffer Depth</description>
127997              <bitOffset>4</bitOffset>
127998              <bitWidth>3</bitWidth>
127999              <access>read-only</access>
128000              <enumeratedValues>
128001                <enumeratedValue>
128002                  <name>000</name>
128003                  <description>Transmit FIFO/Buffer depth = 1 dataword.</description>
128004                  <value>#000</value>
128005                </enumeratedValue>
128006                <enumeratedValue>
128007                  <name>001</name>
128008                  <description>Transmit FIFO/Buffer depth = 4 datawords.</description>
128009                  <value>#001</value>
128010                </enumeratedValue>
128011                <enumeratedValue>
128012                  <name>010</name>
128013                  <description>Transmit FIFO/Buffer depth = 8 datawords.</description>
128014                  <value>#010</value>
128015                </enumeratedValue>
128016                <enumeratedValue>
128017                  <name>011</name>
128018                  <description>Transmit FIFO/Buffer depth = 16 datawords.</description>
128019                  <value>#011</value>
128020                </enumeratedValue>
128021                <enumeratedValue>
128022                  <name>100</name>
128023                  <description>Transmit FIFO/Buffer depth = 32 datawords.</description>
128024                  <value>#100</value>
128025                </enumeratedValue>
128026                <enumeratedValue>
128027                  <name>101</name>
128028                  <description>Transmit FIFO/Buffer depth = 64 datawords.</description>
128029                  <value>#101</value>
128030                </enumeratedValue>
128031                <enumeratedValue>
128032                  <name>110</name>
128033                  <description>Transmit FIFO/Buffer depth = 128 datawords.</description>
128034                  <value>#110</value>
128035                </enumeratedValue>
128036                <enumeratedValue>
128037                  <name>111</name>
128038                  <description>Transmit FIFO/Buffer depth = 256 datawords</description>
128039                  <value>#111</value>
128040                </enumeratedValue>
128041              </enumeratedValues>
128042            </field>
128043            <field>
128044              <name>TXFE</name>
128045              <description>Transmit FIFO Enable</description>
128046              <bitOffset>7</bitOffset>
128047              <bitWidth>1</bitWidth>
128048              <access>read-write</access>
128049              <enumeratedValues>
128050                <enumeratedValue>
128051                  <name>0</name>
128052                  <description>Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support).</description>
128053                  <value>#0</value>
128054                </enumeratedValue>
128055                <enumeratedValue>
128056                  <name>1</name>
128057                  <description>Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.</description>
128058                  <value>#1</value>
128059                </enumeratedValue>
128060              </enumeratedValues>
128061            </field>
128062            <field>
128063              <name>RXUFE</name>
128064              <description>Receive FIFO Underflow Interrupt Enable</description>
128065              <bitOffset>8</bitOffset>
128066              <bitWidth>1</bitWidth>
128067              <access>read-write</access>
128068              <enumeratedValues>
128069                <enumeratedValue>
128070                  <name>0</name>
128071                  <description>RXUF flag does not generate an interrupt to the host.</description>
128072                  <value>#0</value>
128073                </enumeratedValue>
128074                <enumeratedValue>
128075                  <name>1</name>
128076                  <description>RXUF flag generates an interrupt to the host.</description>
128077                  <value>#1</value>
128078                </enumeratedValue>
128079              </enumeratedValues>
128080            </field>
128081            <field>
128082              <name>TXOFE</name>
128083              <description>Transmit FIFO Overflow Interrupt Enable</description>
128084              <bitOffset>9</bitOffset>
128085              <bitWidth>1</bitWidth>
128086              <access>read-write</access>
128087              <enumeratedValues>
128088                <enumeratedValue>
128089                  <name>0</name>
128090                  <description>TXOF flag does not generate an interrupt to the host.</description>
128091                  <value>#0</value>
128092                </enumeratedValue>
128093                <enumeratedValue>
128094                  <name>1</name>
128095                  <description>TXOF flag generates an interrupt to the host.</description>
128096                  <value>#1</value>
128097                </enumeratedValue>
128098              </enumeratedValues>
128099            </field>
128100            <field>
128101              <name>RXIDEN</name>
128102              <description>Receiver Idle Empty Enable</description>
128103              <bitOffset>10</bitOffset>
128104              <bitWidth>3</bitWidth>
128105              <access>read-write</access>
128106              <enumeratedValues>
128107                <enumeratedValue>
128108                  <name>000</name>
128109                  <description>Disable RDRF assertion due to partially filled FIFO when receiver is idle.</description>
128110                  <value>#000</value>
128111                </enumeratedValue>
128112                <enumeratedValue>
128113                  <name>001</name>
128114                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character.</description>
128115                  <value>#001</value>
128116                </enumeratedValue>
128117                <enumeratedValue>
128118                  <name>010</name>
128119                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters.</description>
128120                  <value>#010</value>
128121                </enumeratedValue>
128122                <enumeratedValue>
128123                  <name>011</name>
128124                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters.</description>
128125                  <value>#011</value>
128126                </enumeratedValue>
128127                <enumeratedValue>
128128                  <name>100</name>
128129                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters.</description>
128130                  <value>#100</value>
128131                </enumeratedValue>
128132                <enumeratedValue>
128133                  <name>101</name>
128134                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters.</description>
128135                  <value>#101</value>
128136                </enumeratedValue>
128137                <enumeratedValue>
128138                  <name>110</name>
128139                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters.</description>
128140                  <value>#110</value>
128141                </enumeratedValue>
128142                <enumeratedValue>
128143                  <name>111</name>
128144                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters.</description>
128145                  <value>#111</value>
128146                </enumeratedValue>
128147              </enumeratedValues>
128148            </field>
128149            <field>
128150              <name>RXFLUSH</name>
128151              <description>Receive FIFO/Buffer Flush</description>
128152              <bitOffset>14</bitOffset>
128153              <bitWidth>1</bitWidth>
128154              <access>write-only</access>
128155              <enumeratedValues>
128156                <enumeratedValue>
128157                  <name>0</name>
128158                  <description>No flush operation occurs.</description>
128159                  <value>#0</value>
128160                </enumeratedValue>
128161                <enumeratedValue>
128162                  <name>1</name>
128163                  <description>All data in the receive FIFO/buffer is cleared out.</description>
128164                  <value>#1</value>
128165                </enumeratedValue>
128166              </enumeratedValues>
128167            </field>
128168            <field>
128169              <name>TXFLUSH</name>
128170              <description>Transmit FIFO/Buffer Flush</description>
128171              <bitOffset>15</bitOffset>
128172              <bitWidth>1</bitWidth>
128173              <access>write-only</access>
128174              <enumeratedValues>
128175                <enumeratedValue>
128176                  <name>0</name>
128177                  <description>No flush operation occurs.</description>
128178                  <value>#0</value>
128179                </enumeratedValue>
128180                <enumeratedValue>
128181                  <name>1</name>
128182                  <description>All data in the transmit FIFO/Buffer is cleared out.</description>
128183                  <value>#1</value>
128184                </enumeratedValue>
128185              </enumeratedValues>
128186            </field>
128187            <field>
128188              <name>RXUF</name>
128189              <description>Receiver Buffer Underflow Flag</description>
128190              <bitOffset>16</bitOffset>
128191              <bitWidth>1</bitWidth>
128192              <access>read-write</access>
128193              <enumeratedValues>
128194                <enumeratedValue>
128195                  <name>0</name>
128196                  <description>No receive buffer underflow has occurred since the last time the flag was cleared.</description>
128197                  <value>#0</value>
128198                </enumeratedValue>
128199                <enumeratedValue>
128200                  <name>1</name>
128201                  <description>At least one receive buffer underflow has occurred since the last time the flag was cleared.</description>
128202                  <value>#1</value>
128203                </enumeratedValue>
128204              </enumeratedValues>
128205            </field>
128206            <field>
128207              <name>TXOF</name>
128208              <description>Transmitter Buffer Overflow Flag</description>
128209              <bitOffset>17</bitOffset>
128210              <bitWidth>1</bitWidth>
128211              <access>read-write</access>
128212              <enumeratedValues>
128213                <enumeratedValue>
128214                  <name>0</name>
128215                  <description>No transmit buffer overflow has occurred since the last time the flag was cleared.</description>
128216                  <value>#0</value>
128217                </enumeratedValue>
128218                <enumeratedValue>
128219                  <name>1</name>
128220                  <description>At least one transmit buffer overflow has occurred since the last time the flag was cleared.</description>
128221                  <value>#1</value>
128222                </enumeratedValue>
128223              </enumeratedValues>
128224            </field>
128225            <field>
128226              <name>RXEMPT</name>
128227              <description>Receive Buffer/FIFO Empty</description>
128228              <bitOffset>22</bitOffset>
128229              <bitWidth>1</bitWidth>
128230              <access>read-only</access>
128231              <enumeratedValues>
128232                <enumeratedValue>
128233                  <name>0</name>
128234                  <description>Receive buffer is not empty.</description>
128235                  <value>#0</value>
128236                </enumeratedValue>
128237                <enumeratedValue>
128238                  <name>1</name>
128239                  <description>Receive buffer is empty.</description>
128240                  <value>#1</value>
128241                </enumeratedValue>
128242              </enumeratedValues>
128243            </field>
128244            <field>
128245              <name>TXEMPT</name>
128246              <description>Transmit Buffer/FIFO Empty</description>
128247              <bitOffset>23</bitOffset>
128248              <bitWidth>1</bitWidth>
128249              <access>read-only</access>
128250              <enumeratedValues>
128251                <enumeratedValue>
128252                  <name>0</name>
128253                  <description>Transmit buffer is not empty.</description>
128254                  <value>#0</value>
128255                </enumeratedValue>
128256                <enumeratedValue>
128257                  <name>1</name>
128258                  <description>Transmit buffer is empty.</description>
128259                  <value>#1</value>
128260                </enumeratedValue>
128261              </enumeratedValues>
128262            </field>
128263          </fields>
128264        </register>
128265        <register>
128266          <name>WATER</name>
128267          <description>LPUART Watermark Register</description>
128268          <addressOffset>0x1C</addressOffset>
128269          <size>32</size>
128270          <access>read-write</access>
128271          <resetValue>0</resetValue>
128272          <resetMask>0xFFFFFFFF</resetMask>
128273          <fields>
128274            <field>
128275              <name>TXWATER</name>
128276              <description>Transmit Watermark</description>
128277              <bitOffset>0</bitOffset>
128278              <bitWidth>8</bitWidth>
128279              <access>read-write</access>
128280            </field>
128281            <field>
128282              <name>TXCOUNT</name>
128283              <description>Transmit Counter</description>
128284              <bitOffset>8</bitOffset>
128285              <bitWidth>8</bitWidth>
128286              <access>read-only</access>
128287            </field>
128288            <field>
128289              <name>RXWATER</name>
128290              <description>Receive Watermark</description>
128291              <bitOffset>16</bitOffset>
128292              <bitWidth>8</bitWidth>
128293              <access>read-write</access>
128294            </field>
128295            <field>
128296              <name>RXCOUNT</name>
128297              <description>Receive Counter</description>
128298              <bitOffset>24</bitOffset>
128299              <bitWidth>8</bitWidth>
128300              <access>read-only</access>
128301            </field>
128302          </fields>
128303        </register>
128304      </registers>
128305    </peripheral>
128306    <peripheral>
128307      <name>LPUART2</name>
128308      <description>Universal Asynchronous Receiver/Transmitter</description>
128309      <groupName>LPUART</groupName>
128310      <prependToName>LPUART2_</prependToName>
128311      <baseAddress>0x400C6000</baseAddress>
128312      <addressBlock>
128313        <offset>0</offset>
128314        <size>0x20</size>
128315        <usage>registers</usage>
128316      </addressBlock>
128317      <interrupt>
128318        <name>LPUART2</name>
128319        <value>32</value>
128320      </interrupt>
128321      <registers>
128322        <register>
128323          <name>BAUD</name>
128324          <description>LPUART Baud Rate Register</description>
128325          <addressOffset>0</addressOffset>
128326          <size>32</size>
128327          <access>read-write</access>
128328          <resetValue>0xF000004</resetValue>
128329          <resetMask>0xFFFFFFFF</resetMask>
128330          <fields>
128331            <field>
128332              <name>SBR</name>
128333              <description>Baud Rate Modulo Divisor.</description>
128334              <bitOffset>0</bitOffset>
128335              <bitWidth>13</bitWidth>
128336              <access>read-write</access>
128337            </field>
128338            <field>
128339              <name>SBNS</name>
128340              <description>Stop Bit Number Select</description>
128341              <bitOffset>13</bitOffset>
128342              <bitWidth>1</bitWidth>
128343              <access>read-write</access>
128344              <enumeratedValues>
128345                <enumeratedValue>
128346                  <name>0</name>
128347                  <description>One stop bit.</description>
128348                  <value>#0</value>
128349                </enumeratedValue>
128350                <enumeratedValue>
128351                  <name>1</name>
128352                  <description>Two stop bits.</description>
128353                  <value>#1</value>
128354                </enumeratedValue>
128355              </enumeratedValues>
128356            </field>
128357            <field>
128358              <name>RXEDGIE</name>
128359              <description>RX Input Active Edge Interrupt Enable</description>
128360              <bitOffset>14</bitOffset>
128361              <bitWidth>1</bitWidth>
128362              <access>read-write</access>
128363              <enumeratedValues>
128364                <enumeratedValue>
128365                  <name>0</name>
128366                  <description>Hardware interrupts from LPUART_STAT[RXEDGIF] disabled (use polling).</description>
128367                  <value>#0</value>
128368                </enumeratedValue>
128369                <enumeratedValue>
128370                  <name>1</name>
128371                  <description>Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1.</description>
128372                  <value>#1</value>
128373                </enumeratedValue>
128374              </enumeratedValues>
128375            </field>
128376            <field>
128377              <name>LBKDIE</name>
128378              <description>LIN Break Detect Interrupt Enable</description>
128379              <bitOffset>15</bitOffset>
128380              <bitWidth>1</bitWidth>
128381              <access>read-write</access>
128382              <enumeratedValues>
128383                <enumeratedValue>
128384                  <name>0</name>
128385                  <description>Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling).</description>
128386                  <value>#0</value>
128387                </enumeratedValue>
128388                <enumeratedValue>
128389                  <name>1</name>
128390                  <description>Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1.</description>
128391                  <value>#1</value>
128392                </enumeratedValue>
128393              </enumeratedValues>
128394            </field>
128395            <field>
128396              <name>RESYNCDIS</name>
128397              <description>Resynchronization Disable</description>
128398              <bitOffset>16</bitOffset>
128399              <bitWidth>1</bitWidth>
128400              <access>read-write</access>
128401              <enumeratedValues>
128402                <enumeratedValue>
128403                  <name>0</name>
128404                  <description>Resynchronization during received data word is supported</description>
128405                  <value>#0</value>
128406                </enumeratedValue>
128407                <enumeratedValue>
128408                  <name>1</name>
128409                  <description>Resynchronization during received data word is disabled</description>
128410                  <value>#1</value>
128411                </enumeratedValue>
128412              </enumeratedValues>
128413            </field>
128414            <field>
128415              <name>BOTHEDGE</name>
128416              <description>Both Edge Sampling</description>
128417              <bitOffset>17</bitOffset>
128418              <bitWidth>1</bitWidth>
128419              <access>read-write</access>
128420              <enumeratedValues>
128421                <enumeratedValue>
128422                  <name>0</name>
128423                  <description>Receiver samples input data using the rising edge of the baud rate clock.</description>
128424                  <value>#0</value>
128425                </enumeratedValue>
128426                <enumeratedValue>
128427                  <name>1</name>
128428                  <description>Receiver samples input data using the rising and falling edge of the baud rate clock.</description>
128429                  <value>#1</value>
128430                </enumeratedValue>
128431              </enumeratedValues>
128432            </field>
128433            <field>
128434              <name>MATCFG</name>
128435              <description>Match Configuration</description>
128436              <bitOffset>18</bitOffset>
128437              <bitWidth>2</bitWidth>
128438              <access>read-write</access>
128439              <enumeratedValues>
128440                <enumeratedValue>
128441                  <name>00</name>
128442                  <description>Address Match Wakeup</description>
128443                  <value>#00</value>
128444                </enumeratedValue>
128445                <enumeratedValue>
128446                  <name>01</name>
128447                  <description>Idle Match Wakeup</description>
128448                  <value>#01</value>
128449                </enumeratedValue>
128450                <enumeratedValue>
128451                  <name>10</name>
128452                  <description>Match On and Match Off</description>
128453                  <value>#10</value>
128454                </enumeratedValue>
128455                <enumeratedValue>
128456                  <name>11</name>
128457                  <description>Enables RWU on Data Match and Match On/Off for transmitter CTS input</description>
128458                  <value>#11</value>
128459                </enumeratedValue>
128460              </enumeratedValues>
128461            </field>
128462            <field>
128463              <name>RDMAE</name>
128464              <description>Receiver Full DMA Enable</description>
128465              <bitOffset>21</bitOffset>
128466              <bitWidth>1</bitWidth>
128467              <access>read-write</access>
128468              <enumeratedValues>
128469                <enumeratedValue>
128470                  <name>0</name>
128471                  <description>DMA request disabled.</description>
128472                  <value>#0</value>
128473                </enumeratedValue>
128474                <enumeratedValue>
128475                  <name>1</name>
128476                  <description>DMA request enabled.</description>
128477                  <value>#1</value>
128478                </enumeratedValue>
128479              </enumeratedValues>
128480            </field>
128481            <field>
128482              <name>TDMAE</name>
128483              <description>Transmitter DMA Enable</description>
128484              <bitOffset>23</bitOffset>
128485              <bitWidth>1</bitWidth>
128486              <access>read-write</access>
128487              <enumeratedValues>
128488                <enumeratedValue>
128489                  <name>0</name>
128490                  <description>DMA request disabled.</description>
128491                  <value>#0</value>
128492                </enumeratedValue>
128493                <enumeratedValue>
128494                  <name>1</name>
128495                  <description>DMA request enabled.</description>
128496                  <value>#1</value>
128497                </enumeratedValue>
128498              </enumeratedValues>
128499            </field>
128500            <field>
128501              <name>OSR</name>
128502              <description>Over Sampling Ratio</description>
128503              <bitOffset>24</bitOffset>
128504              <bitWidth>5</bitWidth>
128505              <access>read-write</access>
128506            </field>
128507            <field>
128508              <name>M10</name>
128509              <description>10-bit Mode select</description>
128510              <bitOffset>29</bitOffset>
128511              <bitWidth>1</bitWidth>
128512              <access>read-write</access>
128513              <enumeratedValues>
128514                <enumeratedValue>
128515                  <name>0</name>
128516                  <description>Receiver and transmitter use 8-bit or 9-bit data characters.</description>
128517                  <value>#0</value>
128518                </enumeratedValue>
128519                <enumeratedValue>
128520                  <name>1</name>
128521                  <description>Receiver and transmitter use 10-bit data characters.</description>
128522                  <value>#1</value>
128523                </enumeratedValue>
128524              </enumeratedValues>
128525            </field>
128526            <field>
128527              <name>MAEN2</name>
128528              <description>Match Address Mode Enable 2</description>
128529              <bitOffset>30</bitOffset>
128530              <bitWidth>1</bitWidth>
128531              <access>read-write</access>
128532              <enumeratedValues>
128533                <enumeratedValue>
128534                  <name>0</name>
128535                  <description>Normal operation.</description>
128536                  <value>#0</value>
128537                </enumeratedValue>
128538                <enumeratedValue>
128539                  <name>1</name>
128540                  <description>Enables automatic address matching or data matching mode for MATCH[MA2].</description>
128541                  <value>#1</value>
128542                </enumeratedValue>
128543              </enumeratedValues>
128544            </field>
128545            <field>
128546              <name>MAEN1</name>
128547              <description>Match Address Mode Enable 1</description>
128548              <bitOffset>31</bitOffset>
128549              <bitWidth>1</bitWidth>
128550              <access>read-write</access>
128551              <enumeratedValues>
128552                <enumeratedValue>
128553                  <name>0</name>
128554                  <description>Normal operation.</description>
128555                  <value>#0</value>
128556                </enumeratedValue>
128557                <enumeratedValue>
128558                  <name>1</name>
128559                  <description>Enables automatic address matching or data matching mode for MATCH[MA1].</description>
128560                  <value>#1</value>
128561                </enumeratedValue>
128562              </enumeratedValues>
128563            </field>
128564          </fields>
128565        </register>
128566        <register>
128567          <name>STAT</name>
128568          <description>LPUART Status Register</description>
128569          <addressOffset>0x4</addressOffset>
128570          <size>32</size>
128571          <access>read-write</access>
128572          <resetValue>0xC00000</resetValue>
128573          <resetMask>0xFFFFFFFF</resetMask>
128574          <fields>
128575            <field>
128576              <name>MA2F</name>
128577              <description>Match 2 Flag</description>
128578              <bitOffset>14</bitOffset>
128579              <bitWidth>1</bitWidth>
128580              <access>read-write</access>
128581              <enumeratedValues>
128582                <enumeratedValue>
128583                  <name>0</name>
128584                  <description>Received data is not equal to MA2</description>
128585                  <value>#0</value>
128586                </enumeratedValue>
128587                <enumeratedValue>
128588                  <name>1</name>
128589                  <description>Received data is equal to MA2</description>
128590                  <value>#1</value>
128591                </enumeratedValue>
128592              </enumeratedValues>
128593            </field>
128594            <field>
128595              <name>MA1F</name>
128596              <description>Match 1 Flag</description>
128597              <bitOffset>15</bitOffset>
128598              <bitWidth>1</bitWidth>
128599              <access>read-write</access>
128600              <enumeratedValues>
128601                <enumeratedValue>
128602                  <name>0</name>
128603                  <description>Received data is not equal to MA1</description>
128604                  <value>#0</value>
128605                </enumeratedValue>
128606                <enumeratedValue>
128607                  <name>1</name>
128608                  <description>Received data is equal to MA1</description>
128609                  <value>#1</value>
128610                </enumeratedValue>
128611              </enumeratedValues>
128612            </field>
128613            <field>
128614              <name>PF</name>
128615              <description>Parity Error Flag</description>
128616              <bitOffset>16</bitOffset>
128617              <bitWidth>1</bitWidth>
128618              <access>read-write</access>
128619              <enumeratedValues>
128620                <enumeratedValue>
128621                  <name>0</name>
128622                  <description>No parity error.</description>
128623                  <value>#0</value>
128624                </enumeratedValue>
128625                <enumeratedValue>
128626                  <name>1</name>
128627                  <description>Parity error.</description>
128628                  <value>#1</value>
128629                </enumeratedValue>
128630              </enumeratedValues>
128631            </field>
128632            <field>
128633              <name>FE</name>
128634              <description>Framing Error Flag</description>
128635              <bitOffset>17</bitOffset>
128636              <bitWidth>1</bitWidth>
128637              <access>read-write</access>
128638              <enumeratedValues>
128639                <enumeratedValue>
128640                  <name>0</name>
128641                  <description>No framing error detected. This does not guarantee the framing is correct.</description>
128642                  <value>#0</value>
128643                </enumeratedValue>
128644                <enumeratedValue>
128645                  <name>1</name>
128646                  <description>Framing error.</description>
128647                  <value>#1</value>
128648                </enumeratedValue>
128649              </enumeratedValues>
128650            </field>
128651            <field>
128652              <name>NF</name>
128653              <description>Noise Flag</description>
128654              <bitOffset>18</bitOffset>
128655              <bitWidth>1</bitWidth>
128656              <access>read-write</access>
128657              <enumeratedValues>
128658                <enumeratedValue>
128659                  <name>0</name>
128660                  <description>No noise detected.</description>
128661                  <value>#0</value>
128662                </enumeratedValue>
128663                <enumeratedValue>
128664                  <name>1</name>
128665                  <description>Noise detected in the received character in LPUART_DATA.</description>
128666                  <value>#1</value>
128667                </enumeratedValue>
128668              </enumeratedValues>
128669            </field>
128670            <field>
128671              <name>OR</name>
128672              <description>Receiver Overrun Flag</description>
128673              <bitOffset>19</bitOffset>
128674              <bitWidth>1</bitWidth>
128675              <access>read-write</access>
128676              <enumeratedValues>
128677                <enumeratedValue>
128678                  <name>0</name>
128679                  <description>No overrun.</description>
128680                  <value>#0</value>
128681                </enumeratedValue>
128682                <enumeratedValue>
128683                  <name>1</name>
128684                  <description>Receive overrun (new LPUART data lost).</description>
128685                  <value>#1</value>
128686                </enumeratedValue>
128687              </enumeratedValues>
128688            </field>
128689            <field>
128690              <name>IDLE</name>
128691              <description>Idle Line Flag</description>
128692              <bitOffset>20</bitOffset>
128693              <bitWidth>1</bitWidth>
128694              <access>read-write</access>
128695              <enumeratedValues>
128696                <enumeratedValue>
128697                  <name>0</name>
128698                  <description>No idle line detected.</description>
128699                  <value>#0</value>
128700                </enumeratedValue>
128701                <enumeratedValue>
128702                  <name>1</name>
128703                  <description>Idle line was detected.</description>
128704                  <value>#1</value>
128705                </enumeratedValue>
128706              </enumeratedValues>
128707            </field>
128708            <field>
128709              <name>RDRF</name>
128710              <description>Receive Data Register Full Flag</description>
128711              <bitOffset>21</bitOffset>
128712              <bitWidth>1</bitWidth>
128713              <access>read-only</access>
128714              <enumeratedValues>
128715                <enumeratedValue>
128716                  <name>0</name>
128717                  <description>Receive data buffer empty.</description>
128718                  <value>#0</value>
128719                </enumeratedValue>
128720                <enumeratedValue>
128721                  <name>1</name>
128722                  <description>Receive data buffer full.</description>
128723                  <value>#1</value>
128724                </enumeratedValue>
128725              </enumeratedValues>
128726            </field>
128727            <field>
128728              <name>TC</name>
128729              <description>Transmission Complete Flag</description>
128730              <bitOffset>22</bitOffset>
128731              <bitWidth>1</bitWidth>
128732              <access>read-only</access>
128733              <enumeratedValues>
128734                <enumeratedValue>
128735                  <name>0</name>
128736                  <description>Transmitter active (sending data, a preamble, or a break).</description>
128737                  <value>#0</value>
128738                </enumeratedValue>
128739                <enumeratedValue>
128740                  <name>1</name>
128741                  <description>Transmitter idle (transmission activity complete).</description>
128742                  <value>#1</value>
128743                </enumeratedValue>
128744              </enumeratedValues>
128745            </field>
128746            <field>
128747              <name>TDRE</name>
128748              <description>Transmit Data Register Empty Flag</description>
128749              <bitOffset>23</bitOffset>
128750              <bitWidth>1</bitWidth>
128751              <access>read-only</access>
128752              <enumeratedValues>
128753                <enumeratedValue>
128754                  <name>0</name>
128755                  <description>Transmit data buffer full.</description>
128756                  <value>#0</value>
128757                </enumeratedValue>
128758                <enumeratedValue>
128759                  <name>1</name>
128760                  <description>Transmit data buffer empty.</description>
128761                  <value>#1</value>
128762                </enumeratedValue>
128763              </enumeratedValues>
128764            </field>
128765            <field>
128766              <name>RAF</name>
128767              <description>Receiver Active Flag</description>
128768              <bitOffset>24</bitOffset>
128769              <bitWidth>1</bitWidth>
128770              <access>read-only</access>
128771              <enumeratedValues>
128772                <enumeratedValue>
128773                  <name>0</name>
128774                  <description>LPUART receiver idle waiting for a start bit.</description>
128775                  <value>#0</value>
128776                </enumeratedValue>
128777                <enumeratedValue>
128778                  <name>1</name>
128779                  <description>LPUART receiver active (LPUART_RX input not idle).</description>
128780                  <value>#1</value>
128781                </enumeratedValue>
128782              </enumeratedValues>
128783            </field>
128784            <field>
128785              <name>LBKDE</name>
128786              <description>LIN Break Detection Enable</description>
128787              <bitOffset>25</bitOffset>
128788              <bitWidth>1</bitWidth>
128789              <access>read-write</access>
128790              <enumeratedValues>
128791                <enumeratedValue>
128792                  <name>0</name>
128793                  <description>Break character is detected at length 10 bit times (if M = 0, SBNS = 0) or 11 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 12 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 13 (if M10 = 1, SNBS = 1).</description>
128794                  <value>#0</value>
128795                </enumeratedValue>
128796                <enumeratedValue>
128797                  <name>1</name>
128798                  <description>Break character is detected at length of 11 bit times (if M = 0, SBNS = 0) or 12 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 14 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 15 (if M10 = 1, SNBS = 1).</description>
128799                  <value>#1</value>
128800                </enumeratedValue>
128801              </enumeratedValues>
128802            </field>
128803            <field>
128804              <name>BRK13</name>
128805              <description>Break Character Generation Length</description>
128806              <bitOffset>26</bitOffset>
128807              <bitWidth>1</bitWidth>
128808              <access>read-write</access>
128809              <enumeratedValues>
128810                <enumeratedValue>
128811                  <name>0</name>
128812                  <description>Break character is transmitted with length of 10 bit times (if M = 0, SBNS = 0) or 11 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 12 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 13 (if M10 = 1, SNBS = 1).</description>
128813                  <value>#0</value>
128814                </enumeratedValue>
128815                <enumeratedValue>
128816                  <name>1</name>
128817                  <description>Break character is transmitted with length of 13 bit times (if M = 0, SBNS = 0) or 14 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 15 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 16 (if M10 = 1, SNBS = 1).</description>
128818                  <value>#1</value>
128819                </enumeratedValue>
128820              </enumeratedValues>
128821            </field>
128822            <field>
128823              <name>RWUID</name>
128824              <description>Receive Wake Up Idle Detect</description>
128825              <bitOffset>27</bitOffset>
128826              <bitWidth>1</bitWidth>
128827              <access>read-write</access>
128828              <enumeratedValues>
128829                <enumeratedValue>
128830                  <name>0</name>
128831                  <description>During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not get set when an address does not match.</description>
128832                  <value>#0</value>
128833                </enumeratedValue>
128834                <enumeratedValue>
128835                  <name>1</name>
128836                  <description>During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does get set when an address does not match.</description>
128837                  <value>#1</value>
128838                </enumeratedValue>
128839              </enumeratedValues>
128840            </field>
128841            <field>
128842              <name>RXINV</name>
128843              <description>Receive Data Inversion</description>
128844              <bitOffset>28</bitOffset>
128845              <bitWidth>1</bitWidth>
128846              <access>read-write</access>
128847              <enumeratedValues>
128848                <enumeratedValue>
128849                  <name>0</name>
128850                  <description>Receive data not inverted.</description>
128851                  <value>#0</value>
128852                </enumeratedValue>
128853                <enumeratedValue>
128854                  <name>1</name>
128855                  <description>Receive data inverted.</description>
128856                  <value>#1</value>
128857                </enumeratedValue>
128858              </enumeratedValues>
128859            </field>
128860            <field>
128861              <name>MSBF</name>
128862              <description>MSB First</description>
128863              <bitOffset>29</bitOffset>
128864              <bitWidth>1</bitWidth>
128865              <access>read-write</access>
128866              <enumeratedValues>
128867                <enumeratedValue>
128868                  <name>0</name>
128869                  <description>LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0.</description>
128870                  <value>#0</value>
128871                </enumeratedValue>
128872                <enumeratedValue>
128873                  <name>1</name>
128874                  <description>MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE].</description>
128875                  <value>#1</value>
128876                </enumeratedValue>
128877              </enumeratedValues>
128878            </field>
128879            <field>
128880              <name>RXEDGIF</name>
128881              <description>LPUART_RX Pin Active Edge Interrupt Flag</description>
128882              <bitOffset>30</bitOffset>
128883              <bitWidth>1</bitWidth>
128884              <access>read-write</access>
128885              <enumeratedValues>
128886                <enumeratedValue>
128887                  <name>0</name>
128888                  <description>No active edge on the receive pin has occurred.</description>
128889                  <value>#0</value>
128890                </enumeratedValue>
128891                <enumeratedValue>
128892                  <name>1</name>
128893                  <description>An active edge on the receive pin has occurred.</description>
128894                  <value>#1</value>
128895                </enumeratedValue>
128896              </enumeratedValues>
128897            </field>
128898            <field>
128899              <name>LBKDIF</name>
128900              <description>LIN Break Detect Interrupt Flag</description>
128901              <bitOffset>31</bitOffset>
128902              <bitWidth>1</bitWidth>
128903              <access>read-write</access>
128904              <enumeratedValues>
128905                <enumeratedValue>
128906                  <name>0</name>
128907                  <description>No LIN break character has been detected.</description>
128908                  <value>#0</value>
128909                </enumeratedValue>
128910                <enumeratedValue>
128911                  <name>1</name>
128912                  <description>LIN break character has been detected.</description>
128913                  <value>#1</value>
128914                </enumeratedValue>
128915              </enumeratedValues>
128916            </field>
128917          </fields>
128918        </register>
128919        <register>
128920          <name>CTRL</name>
128921          <description>LPUART Control Register</description>
128922          <addressOffset>0x8</addressOffset>
128923          <size>32</size>
128924          <access>read-write</access>
128925          <resetValue>0</resetValue>
128926          <resetMask>0xFFFFFFFF</resetMask>
128927          <fields>
128928            <field>
128929              <name>PT</name>
128930              <description>Parity Type</description>
128931              <bitOffset>0</bitOffset>
128932              <bitWidth>1</bitWidth>
128933              <access>read-write</access>
128934              <enumeratedValues>
128935                <enumeratedValue>
128936                  <name>0</name>
128937                  <description>Even parity.</description>
128938                  <value>#0</value>
128939                </enumeratedValue>
128940                <enumeratedValue>
128941                  <name>1</name>
128942                  <description>Odd parity.</description>
128943                  <value>#1</value>
128944                </enumeratedValue>
128945              </enumeratedValues>
128946            </field>
128947            <field>
128948              <name>PE</name>
128949              <description>Parity Enable</description>
128950              <bitOffset>1</bitOffset>
128951              <bitWidth>1</bitWidth>
128952              <access>read-write</access>
128953              <enumeratedValues>
128954                <enumeratedValue>
128955                  <name>0</name>
128956                  <description>No hardware parity generation or checking.</description>
128957                  <value>#0</value>
128958                </enumeratedValue>
128959                <enumeratedValue>
128960                  <name>1</name>
128961                  <description>Parity enabled.</description>
128962                  <value>#1</value>
128963                </enumeratedValue>
128964              </enumeratedValues>
128965            </field>
128966            <field>
128967              <name>ILT</name>
128968              <description>Idle Line Type Select</description>
128969              <bitOffset>2</bitOffset>
128970              <bitWidth>1</bitWidth>
128971              <access>read-write</access>
128972              <enumeratedValues>
128973                <enumeratedValue>
128974                  <name>0</name>
128975                  <description>Idle character bit count starts after start bit.</description>
128976                  <value>#0</value>
128977                </enumeratedValue>
128978                <enumeratedValue>
128979                  <name>1</name>
128980                  <description>Idle character bit count starts after stop bit.</description>
128981                  <value>#1</value>
128982                </enumeratedValue>
128983              </enumeratedValues>
128984            </field>
128985            <field>
128986              <name>WAKE</name>
128987              <description>Receiver Wakeup Method Select</description>
128988              <bitOffset>3</bitOffset>
128989              <bitWidth>1</bitWidth>
128990              <access>read-write</access>
128991              <enumeratedValues>
128992                <enumeratedValue>
128993                  <name>0</name>
128994                  <description>Configures RWU for idle-line wakeup.</description>
128995                  <value>#0</value>
128996                </enumeratedValue>
128997                <enumeratedValue>
128998                  <name>1</name>
128999                  <description>Configures RWU with address-mark wakeup.</description>
129000                  <value>#1</value>
129001                </enumeratedValue>
129002              </enumeratedValues>
129003            </field>
129004            <field>
129005              <name>M</name>
129006              <description>9-Bit or 8-Bit Mode Select</description>
129007              <bitOffset>4</bitOffset>
129008              <bitWidth>1</bitWidth>
129009              <access>read-write</access>
129010              <enumeratedValues>
129011                <enumeratedValue>
129012                  <name>0</name>
129013                  <description>Receiver and transmitter use 8-bit data characters.</description>
129014                  <value>#0</value>
129015                </enumeratedValue>
129016                <enumeratedValue>
129017                  <name>1</name>
129018                  <description>Receiver and transmitter use 9-bit data characters.</description>
129019                  <value>#1</value>
129020                </enumeratedValue>
129021              </enumeratedValues>
129022            </field>
129023            <field>
129024              <name>RSRC</name>
129025              <description>Receiver Source Select</description>
129026              <bitOffset>5</bitOffset>
129027              <bitWidth>1</bitWidth>
129028              <access>read-write</access>
129029              <enumeratedValues>
129030                <enumeratedValue>
129031                  <name>0</name>
129032                  <description>Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the LPUART_RX pin.</description>
129033                  <value>#0</value>
129034                </enumeratedValue>
129035                <enumeratedValue>
129036                  <name>1</name>
129037                  <description>Single-wire LPUART mode where the LPUART_TX pin is connected to the transmitter output and receiver input.</description>
129038                  <value>#1</value>
129039                </enumeratedValue>
129040              </enumeratedValues>
129041            </field>
129042            <field>
129043              <name>DOZEEN</name>
129044              <description>Doze Enable</description>
129045              <bitOffset>6</bitOffset>
129046              <bitWidth>1</bitWidth>
129047              <access>read-write</access>
129048              <enumeratedValues>
129049                <enumeratedValue>
129050                  <name>0</name>
129051                  <description>LPUART is enabled in Doze mode.</description>
129052                  <value>#0</value>
129053                </enumeratedValue>
129054                <enumeratedValue>
129055                  <name>1</name>
129056                  <description>LPUART is disabled in Doze mode.</description>
129057                  <value>#1</value>
129058                </enumeratedValue>
129059              </enumeratedValues>
129060            </field>
129061            <field>
129062              <name>LOOPS</name>
129063              <description>Loop Mode Select</description>
129064              <bitOffset>7</bitOffset>
129065              <bitWidth>1</bitWidth>
129066              <access>read-write</access>
129067              <enumeratedValues>
129068                <enumeratedValue>
129069                  <name>0</name>
129070                  <description>Normal operation - LPUART_RX and LPUART_TX use separate pins.</description>
129071                  <value>#0</value>
129072                </enumeratedValue>
129073                <enumeratedValue>
129074                  <name>1</name>
129075                  <description>Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit).</description>
129076                  <value>#1</value>
129077                </enumeratedValue>
129078              </enumeratedValues>
129079            </field>
129080            <field>
129081              <name>IDLECFG</name>
129082              <description>Idle Configuration</description>
129083              <bitOffset>8</bitOffset>
129084              <bitWidth>3</bitWidth>
129085              <access>read-write</access>
129086              <enumeratedValues>
129087                <enumeratedValue>
129088                  <name>000</name>
129089                  <description>1 idle character</description>
129090                  <value>#000</value>
129091                </enumeratedValue>
129092                <enumeratedValue>
129093                  <name>001</name>
129094                  <description>2 idle characters</description>
129095                  <value>#001</value>
129096                </enumeratedValue>
129097                <enumeratedValue>
129098                  <name>010</name>
129099                  <description>4 idle characters</description>
129100                  <value>#010</value>
129101                </enumeratedValue>
129102                <enumeratedValue>
129103                  <name>011</name>
129104                  <description>8 idle characters</description>
129105                  <value>#011</value>
129106                </enumeratedValue>
129107                <enumeratedValue>
129108                  <name>100</name>
129109                  <description>16 idle characters</description>
129110                  <value>#100</value>
129111                </enumeratedValue>
129112                <enumeratedValue>
129113                  <name>101</name>
129114                  <description>32 idle characters</description>
129115                  <value>#101</value>
129116                </enumeratedValue>
129117                <enumeratedValue>
129118                  <name>110</name>
129119                  <description>64 idle characters</description>
129120                  <value>#110</value>
129121                </enumeratedValue>
129122                <enumeratedValue>
129123                  <name>111</name>
129124                  <description>128 idle characters</description>
129125                  <value>#111</value>
129126                </enumeratedValue>
129127              </enumeratedValues>
129128            </field>
129129            <field>
129130              <name>MA2IE</name>
129131              <description>Match 2 Interrupt Enable</description>
129132              <bitOffset>14</bitOffset>
129133              <bitWidth>1</bitWidth>
129134              <access>read-write</access>
129135              <enumeratedValues>
129136                <enumeratedValue>
129137                  <name>0</name>
129138                  <description>MA2F interrupt disabled</description>
129139                  <value>#0</value>
129140                </enumeratedValue>
129141                <enumeratedValue>
129142                  <name>1</name>
129143                  <description>MA2F interrupt enabled</description>
129144                  <value>#1</value>
129145                </enumeratedValue>
129146              </enumeratedValues>
129147            </field>
129148            <field>
129149              <name>MA1IE</name>
129150              <description>Match 1 Interrupt Enable</description>
129151              <bitOffset>15</bitOffset>
129152              <bitWidth>1</bitWidth>
129153              <access>read-write</access>
129154              <enumeratedValues>
129155                <enumeratedValue>
129156                  <name>0</name>
129157                  <description>MA1F interrupt disabled</description>
129158                  <value>#0</value>
129159                </enumeratedValue>
129160                <enumeratedValue>
129161                  <name>1</name>
129162                  <description>MA1F interrupt enabled</description>
129163                  <value>#1</value>
129164                </enumeratedValue>
129165              </enumeratedValues>
129166            </field>
129167            <field>
129168              <name>SBK</name>
129169              <description>Send Break</description>
129170              <bitOffset>16</bitOffset>
129171              <bitWidth>1</bitWidth>
129172              <access>read-write</access>
129173              <enumeratedValues>
129174                <enumeratedValue>
129175                  <name>0</name>
129176                  <description>Normal transmitter operation.</description>
129177                  <value>#0</value>
129178                </enumeratedValue>
129179                <enumeratedValue>
129180                  <name>1</name>
129181                  <description>Queue break character(s) to be sent.</description>
129182                  <value>#1</value>
129183                </enumeratedValue>
129184              </enumeratedValues>
129185            </field>
129186            <field>
129187              <name>RWU</name>
129188              <description>Receiver Wakeup Control</description>
129189              <bitOffset>17</bitOffset>
129190              <bitWidth>1</bitWidth>
129191              <access>read-write</access>
129192              <enumeratedValues>
129193                <enumeratedValue>
129194                  <name>0</name>
129195                  <description>Normal receiver operation.</description>
129196                  <value>#0</value>
129197                </enumeratedValue>
129198                <enumeratedValue>
129199                  <name>1</name>
129200                  <description>LPUART receiver in standby waiting for wakeup condition.</description>
129201                  <value>#1</value>
129202                </enumeratedValue>
129203              </enumeratedValues>
129204            </field>
129205            <field>
129206              <name>RE</name>
129207              <description>Receiver Enable</description>
129208              <bitOffset>18</bitOffset>
129209              <bitWidth>1</bitWidth>
129210              <access>read-write</access>
129211              <enumeratedValues>
129212                <enumeratedValue>
129213                  <name>0</name>
129214                  <description>Receiver disabled.</description>
129215                  <value>#0</value>
129216                </enumeratedValue>
129217                <enumeratedValue>
129218                  <name>1</name>
129219                  <description>Receiver enabled.</description>
129220                  <value>#1</value>
129221                </enumeratedValue>
129222              </enumeratedValues>
129223            </field>
129224            <field>
129225              <name>TE</name>
129226              <description>Transmitter Enable</description>
129227              <bitOffset>19</bitOffset>
129228              <bitWidth>1</bitWidth>
129229              <access>read-write</access>
129230              <enumeratedValues>
129231                <enumeratedValue>
129232                  <name>0</name>
129233                  <description>Transmitter disabled.</description>
129234                  <value>#0</value>
129235                </enumeratedValue>
129236                <enumeratedValue>
129237                  <name>1</name>
129238                  <description>Transmitter enabled.</description>
129239                  <value>#1</value>
129240                </enumeratedValue>
129241              </enumeratedValues>
129242            </field>
129243            <field>
129244              <name>ILIE</name>
129245              <description>Idle Line Interrupt Enable</description>
129246              <bitOffset>20</bitOffset>
129247              <bitWidth>1</bitWidth>
129248              <access>read-write</access>
129249              <enumeratedValues>
129250                <enumeratedValue>
129251                  <name>0</name>
129252                  <description>Hardware interrupts from IDLE disabled; use polling.</description>
129253                  <value>#0</value>
129254                </enumeratedValue>
129255                <enumeratedValue>
129256                  <name>1</name>
129257                  <description>Hardware interrupt requested when IDLE flag is 1.</description>
129258                  <value>#1</value>
129259                </enumeratedValue>
129260              </enumeratedValues>
129261            </field>
129262            <field>
129263              <name>RIE</name>
129264              <description>Receiver Interrupt Enable</description>
129265              <bitOffset>21</bitOffset>
129266              <bitWidth>1</bitWidth>
129267              <access>read-write</access>
129268              <enumeratedValues>
129269                <enumeratedValue>
129270                  <name>0</name>
129271                  <description>Hardware interrupts from RDRF disabled; use polling.</description>
129272                  <value>#0</value>
129273                </enumeratedValue>
129274                <enumeratedValue>
129275                  <name>1</name>
129276                  <description>Hardware interrupt requested when RDRF flag is 1.</description>
129277                  <value>#1</value>
129278                </enumeratedValue>
129279              </enumeratedValues>
129280            </field>
129281            <field>
129282              <name>TCIE</name>
129283              <description>Transmission Complete Interrupt Enable for</description>
129284              <bitOffset>22</bitOffset>
129285              <bitWidth>1</bitWidth>
129286              <access>read-write</access>
129287              <enumeratedValues>
129288                <enumeratedValue>
129289                  <name>0</name>
129290                  <description>Hardware interrupts from TC disabled; use polling.</description>
129291                  <value>#0</value>
129292                </enumeratedValue>
129293                <enumeratedValue>
129294                  <name>1</name>
129295                  <description>Hardware interrupt requested when TC flag is 1.</description>
129296                  <value>#1</value>
129297                </enumeratedValue>
129298              </enumeratedValues>
129299            </field>
129300            <field>
129301              <name>TIE</name>
129302              <description>Transmit Interrupt Enable</description>
129303              <bitOffset>23</bitOffset>
129304              <bitWidth>1</bitWidth>
129305              <access>read-write</access>
129306              <enumeratedValues>
129307                <enumeratedValue>
129308                  <name>0</name>
129309                  <description>Hardware interrupts from TDRE disabled; use polling.</description>
129310                  <value>#0</value>
129311                </enumeratedValue>
129312                <enumeratedValue>
129313                  <name>1</name>
129314                  <description>Hardware interrupt requested when TDRE flag is 1.</description>
129315                  <value>#1</value>
129316                </enumeratedValue>
129317              </enumeratedValues>
129318            </field>
129319            <field>
129320              <name>PEIE</name>
129321              <description>Parity Error Interrupt Enable</description>
129322              <bitOffset>24</bitOffset>
129323              <bitWidth>1</bitWidth>
129324              <access>read-write</access>
129325              <enumeratedValues>
129326                <enumeratedValue>
129327                  <name>0</name>
129328                  <description>PF interrupts disabled; use polling).</description>
129329                  <value>#0</value>
129330                </enumeratedValue>
129331                <enumeratedValue>
129332                  <name>1</name>
129333                  <description>Hardware interrupt requested when PF is set.</description>
129334                  <value>#1</value>
129335                </enumeratedValue>
129336              </enumeratedValues>
129337            </field>
129338            <field>
129339              <name>FEIE</name>
129340              <description>Framing Error Interrupt Enable</description>
129341              <bitOffset>25</bitOffset>
129342              <bitWidth>1</bitWidth>
129343              <access>read-write</access>
129344              <enumeratedValues>
129345                <enumeratedValue>
129346                  <name>0</name>
129347                  <description>FE interrupts disabled; use polling.</description>
129348                  <value>#0</value>
129349                </enumeratedValue>
129350                <enumeratedValue>
129351                  <name>1</name>
129352                  <description>Hardware interrupt requested when FE is set.</description>
129353                  <value>#1</value>
129354                </enumeratedValue>
129355              </enumeratedValues>
129356            </field>
129357            <field>
129358              <name>NEIE</name>
129359              <description>Noise Error Interrupt Enable</description>
129360              <bitOffset>26</bitOffset>
129361              <bitWidth>1</bitWidth>
129362              <access>read-write</access>
129363              <enumeratedValues>
129364                <enumeratedValue>
129365                  <name>0</name>
129366                  <description>NF interrupts disabled; use polling.</description>
129367                  <value>#0</value>
129368                </enumeratedValue>
129369                <enumeratedValue>
129370                  <name>1</name>
129371                  <description>Hardware interrupt requested when NF is set.</description>
129372                  <value>#1</value>
129373                </enumeratedValue>
129374              </enumeratedValues>
129375            </field>
129376            <field>
129377              <name>ORIE</name>
129378              <description>Overrun Interrupt Enable</description>
129379              <bitOffset>27</bitOffset>
129380              <bitWidth>1</bitWidth>
129381              <access>read-write</access>
129382              <enumeratedValues>
129383                <enumeratedValue>
129384                  <name>0</name>
129385                  <description>OR interrupts disabled; use polling.</description>
129386                  <value>#0</value>
129387                </enumeratedValue>
129388                <enumeratedValue>
129389                  <name>1</name>
129390                  <description>Hardware interrupt requested when OR is set.</description>
129391                  <value>#1</value>
129392                </enumeratedValue>
129393              </enumeratedValues>
129394            </field>
129395            <field>
129396              <name>TXINV</name>
129397              <description>Transmit Data Inversion</description>
129398              <bitOffset>28</bitOffset>
129399              <bitWidth>1</bitWidth>
129400              <access>read-write</access>
129401              <enumeratedValues>
129402                <enumeratedValue>
129403                  <name>0</name>
129404                  <description>Transmit data not inverted.</description>
129405                  <value>#0</value>
129406                </enumeratedValue>
129407                <enumeratedValue>
129408                  <name>1</name>
129409                  <description>Transmit data inverted.</description>
129410                  <value>#1</value>
129411                </enumeratedValue>
129412              </enumeratedValues>
129413            </field>
129414            <field>
129415              <name>TXDIR</name>
129416              <description>LPUART_TX Pin Direction in Single-Wire Mode</description>
129417              <bitOffset>29</bitOffset>
129418              <bitWidth>1</bitWidth>
129419              <access>read-write</access>
129420              <enumeratedValues>
129421                <enumeratedValue>
129422                  <name>0</name>
129423                  <description>LPUART_TX pin is an input in single-wire mode.</description>
129424                  <value>#0</value>
129425                </enumeratedValue>
129426                <enumeratedValue>
129427                  <name>1</name>
129428                  <description>LPUART_TX pin is an output in single-wire mode.</description>
129429                  <value>#1</value>
129430                </enumeratedValue>
129431              </enumeratedValues>
129432            </field>
129433            <field>
129434              <name>R9T8</name>
129435              <description>Receive Bit 9 / Transmit Bit 8</description>
129436              <bitOffset>30</bitOffset>
129437              <bitWidth>1</bitWidth>
129438              <access>read-write</access>
129439            </field>
129440            <field>
129441              <name>R8T9</name>
129442              <description>Receive Bit 8 / Transmit Bit 9</description>
129443              <bitOffset>31</bitOffset>
129444              <bitWidth>1</bitWidth>
129445              <access>read-write</access>
129446            </field>
129447          </fields>
129448        </register>
129449        <register>
129450          <name>DATA</name>
129451          <description>LPUART Data Register</description>
129452          <addressOffset>0xC</addressOffset>
129453          <size>32</size>
129454          <access>read-write</access>
129455          <resetValue>0x1000</resetValue>
129456          <resetMask>0xFFFFFFFF</resetMask>
129457          <fields>
129458            <field>
129459              <name>R0T0</name>
129460              <description>Read receive data buffer 0 or write transmit data buffer 0.</description>
129461              <bitOffset>0</bitOffset>
129462              <bitWidth>1</bitWidth>
129463              <access>read-write</access>
129464            </field>
129465            <field>
129466              <name>R1T1</name>
129467              <description>Read receive data buffer 1 or write transmit data buffer 1.</description>
129468              <bitOffset>1</bitOffset>
129469              <bitWidth>1</bitWidth>
129470              <access>read-write</access>
129471            </field>
129472            <field>
129473              <name>R2T2</name>
129474              <description>Read receive data buffer 2 or write transmit data buffer 2.</description>
129475              <bitOffset>2</bitOffset>
129476              <bitWidth>1</bitWidth>
129477              <access>read-write</access>
129478            </field>
129479            <field>
129480              <name>R3T3</name>
129481              <description>Read receive data buffer 3 or write transmit data buffer 3.</description>
129482              <bitOffset>3</bitOffset>
129483              <bitWidth>1</bitWidth>
129484              <access>read-write</access>
129485            </field>
129486            <field>
129487              <name>R4T4</name>
129488              <description>Read receive data buffer 4 or write transmit data buffer 4.</description>
129489              <bitOffset>4</bitOffset>
129490              <bitWidth>1</bitWidth>
129491              <access>read-write</access>
129492            </field>
129493            <field>
129494              <name>R5T5</name>
129495              <description>Read receive data buffer 5 or write transmit data buffer 5.</description>
129496              <bitOffset>5</bitOffset>
129497              <bitWidth>1</bitWidth>
129498              <access>read-write</access>
129499            </field>
129500            <field>
129501              <name>R6T6</name>
129502              <description>Read receive data buffer 6 or write transmit data buffer 6.</description>
129503              <bitOffset>6</bitOffset>
129504              <bitWidth>1</bitWidth>
129505              <access>read-write</access>
129506            </field>
129507            <field>
129508              <name>R7T7</name>
129509              <description>Read receive data buffer 7 or write transmit data buffer 7.</description>
129510              <bitOffset>7</bitOffset>
129511              <bitWidth>1</bitWidth>
129512              <access>read-write</access>
129513            </field>
129514            <field>
129515              <name>R8T8</name>
129516              <description>Read receive data buffer 8 or write transmit data buffer 8.</description>
129517              <bitOffset>8</bitOffset>
129518              <bitWidth>1</bitWidth>
129519              <access>read-write</access>
129520            </field>
129521            <field>
129522              <name>R9T9</name>
129523              <description>Read receive data buffer 9 or write transmit data buffer 9.</description>
129524              <bitOffset>9</bitOffset>
129525              <bitWidth>1</bitWidth>
129526              <access>read-write</access>
129527            </field>
129528            <field>
129529              <name>IDLINE</name>
129530              <description>Idle Line</description>
129531              <bitOffset>11</bitOffset>
129532              <bitWidth>1</bitWidth>
129533              <access>read-only</access>
129534              <enumeratedValues>
129535                <enumeratedValue>
129536                  <name>0</name>
129537                  <description>Receiver was not idle before receiving this character.</description>
129538                  <value>#0</value>
129539                </enumeratedValue>
129540                <enumeratedValue>
129541                  <name>1</name>
129542                  <description>Receiver was idle before receiving this character.</description>
129543                  <value>#1</value>
129544                </enumeratedValue>
129545              </enumeratedValues>
129546            </field>
129547            <field>
129548              <name>RXEMPT</name>
129549              <description>Receive Buffer Empty</description>
129550              <bitOffset>12</bitOffset>
129551              <bitWidth>1</bitWidth>
129552              <access>read-only</access>
129553              <enumeratedValues>
129554                <enumeratedValue>
129555                  <name>0</name>
129556                  <description>Receive buffer contains valid data.</description>
129557                  <value>#0</value>
129558                </enumeratedValue>
129559                <enumeratedValue>
129560                  <name>1</name>
129561                  <description>Receive buffer is empty, data returned on read is not valid.</description>
129562                  <value>#1</value>
129563                </enumeratedValue>
129564              </enumeratedValues>
129565            </field>
129566            <field>
129567              <name>FRETSC</name>
129568              <description>Frame Error / Transmit Special Character</description>
129569              <bitOffset>13</bitOffset>
129570              <bitWidth>1</bitWidth>
129571              <access>read-write</access>
129572              <enumeratedValues>
129573                <enumeratedValue>
129574                  <name>0</name>
129575                  <description>The dataword was received without a frame error on read, transmit a normal character on write.</description>
129576                  <value>#0</value>
129577                </enumeratedValue>
129578                <enumeratedValue>
129579                  <name>1</name>
129580                  <description>The dataword was received with a frame error, transmit an idle or break character on transmit.</description>
129581                  <value>#1</value>
129582                </enumeratedValue>
129583              </enumeratedValues>
129584            </field>
129585            <field>
129586              <name>PARITYE</name>
129587              <description>The current received dataword contained in DATA[R9:R0] was received with a parity error.</description>
129588              <bitOffset>14</bitOffset>
129589              <bitWidth>1</bitWidth>
129590              <access>read-only</access>
129591              <enumeratedValues>
129592                <enumeratedValue>
129593                  <name>0</name>
129594                  <description>The dataword was received without a parity error.</description>
129595                  <value>#0</value>
129596                </enumeratedValue>
129597                <enumeratedValue>
129598                  <name>1</name>
129599                  <description>The dataword was received with a parity error.</description>
129600                  <value>#1</value>
129601                </enumeratedValue>
129602              </enumeratedValues>
129603            </field>
129604            <field>
129605              <name>NOISY</name>
129606              <description>The current received dataword contained in DATA[R9:R0] was received with noise.</description>
129607              <bitOffset>15</bitOffset>
129608              <bitWidth>1</bitWidth>
129609              <access>read-only</access>
129610              <enumeratedValues>
129611                <enumeratedValue>
129612                  <name>0</name>
129613                  <description>The dataword was received without noise.</description>
129614                  <value>#0</value>
129615                </enumeratedValue>
129616                <enumeratedValue>
129617                  <name>1</name>
129618                  <description>The data was received with noise.</description>
129619                  <value>#1</value>
129620                </enumeratedValue>
129621              </enumeratedValues>
129622            </field>
129623          </fields>
129624        </register>
129625        <register>
129626          <name>MATCH</name>
129627          <description>LPUART Match Address Register</description>
129628          <addressOffset>0x10</addressOffset>
129629          <size>32</size>
129630          <access>read-write</access>
129631          <resetValue>0</resetValue>
129632          <resetMask>0xFFFFFFFF</resetMask>
129633          <fields>
129634            <field>
129635              <name>MA1</name>
129636              <description>Match Address 1</description>
129637              <bitOffset>0</bitOffset>
129638              <bitWidth>10</bitWidth>
129639              <access>read-write</access>
129640            </field>
129641            <field>
129642              <name>MA2</name>
129643              <description>Match Address 2</description>
129644              <bitOffset>16</bitOffset>
129645              <bitWidth>10</bitWidth>
129646              <access>read-write</access>
129647            </field>
129648          </fields>
129649        </register>
129650        <register>
129651          <name>MODIR</name>
129652          <description>LPUART Modem IrDA Register</description>
129653          <addressOffset>0x14</addressOffset>
129654          <size>32</size>
129655          <access>read-write</access>
129656          <resetValue>0</resetValue>
129657          <resetMask>0xFFFFFFFF</resetMask>
129658          <fields>
129659            <field>
129660              <name>TXCTSE</name>
129661              <description>Transmitter clear-to-send enable</description>
129662              <bitOffset>0</bitOffset>
129663              <bitWidth>1</bitWidth>
129664              <access>read-write</access>
129665              <enumeratedValues>
129666                <enumeratedValue>
129667                  <name>0</name>
129668                  <description>CTS has no effect on the transmitter.</description>
129669                  <value>#0</value>
129670                </enumeratedValue>
129671                <enumeratedValue>
129672                  <name>1</name>
129673                  <description>Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission.</description>
129674                  <value>#1</value>
129675                </enumeratedValue>
129676              </enumeratedValues>
129677            </field>
129678            <field>
129679              <name>TXRTSE</name>
129680              <description>Transmitter request-to-send enable</description>
129681              <bitOffset>1</bitOffset>
129682              <bitWidth>1</bitWidth>
129683              <access>read-write</access>
129684              <enumeratedValues>
129685                <enumeratedValue>
129686                  <name>0</name>
129687                  <description>The transmitter has no effect on RTS.</description>
129688                  <value>#0</value>
129689                </enumeratedValue>
129690                <enumeratedValue>
129691                  <name>1</name>
129692                  <description>When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit.</description>
129693                  <value>#1</value>
129694                </enumeratedValue>
129695              </enumeratedValues>
129696            </field>
129697            <field>
129698              <name>TXRTSPOL</name>
129699              <description>Transmitter request-to-send polarity</description>
129700              <bitOffset>2</bitOffset>
129701              <bitWidth>1</bitWidth>
129702              <access>read-write</access>
129703              <enumeratedValues>
129704                <enumeratedValue>
129705                  <name>0</name>
129706                  <description>Transmitter RTS is active low.</description>
129707                  <value>#0</value>
129708                </enumeratedValue>
129709                <enumeratedValue>
129710                  <name>1</name>
129711                  <description>Transmitter RTS is active high.</description>
129712                  <value>#1</value>
129713                </enumeratedValue>
129714              </enumeratedValues>
129715            </field>
129716            <field>
129717              <name>RXRTSE</name>
129718              <description>Receiver request-to-send enable</description>
129719              <bitOffset>3</bitOffset>
129720              <bitWidth>1</bitWidth>
129721              <access>read-write</access>
129722              <enumeratedValues>
129723                <enumeratedValue>
129724                  <name>0</name>
129725                  <description>The receiver has no effect on RTS.</description>
129726                  <value>#0</value>
129727                </enumeratedValue>
129728                <enumeratedValue>
129729                  <name>1</name>
129730                  <description>RTS is deasserted if the receiver data register is full or a start bit has been detected that would cause the receiver data register to become full. RTS is asserted if the receiver data register is not full and has not detected a start bit that would cause the receiver data register to become full.</description>
129731                  <value>#1</value>
129732                </enumeratedValue>
129733              </enumeratedValues>
129734            </field>
129735            <field>
129736              <name>TXCTSC</name>
129737              <description>Transmit CTS Configuration</description>
129738              <bitOffset>4</bitOffset>
129739              <bitWidth>1</bitWidth>
129740              <access>read-write</access>
129741              <enumeratedValues>
129742                <enumeratedValue>
129743                  <name>0</name>
129744                  <description>CTS input is sampled at the start of each character.</description>
129745                  <value>#0</value>
129746                </enumeratedValue>
129747                <enumeratedValue>
129748                  <name>1</name>
129749                  <description>CTS input is sampled when the transmitter is idle.</description>
129750                  <value>#1</value>
129751                </enumeratedValue>
129752              </enumeratedValues>
129753            </field>
129754            <field>
129755              <name>TXCTSSRC</name>
129756              <description>Transmit CTS Source</description>
129757              <bitOffset>5</bitOffset>
129758              <bitWidth>1</bitWidth>
129759              <access>read-write</access>
129760              <enumeratedValues>
129761                <enumeratedValue>
129762                  <name>0</name>
129763                  <description>CTS input is the LPUART_CTS pin.</description>
129764                  <value>#0</value>
129765                </enumeratedValue>
129766                <enumeratedValue>
129767                  <name>1</name>
129768                  <description>CTS input is the inverted Receiver Match result.</description>
129769                  <value>#1</value>
129770                </enumeratedValue>
129771              </enumeratedValues>
129772            </field>
129773            <field>
129774              <name>RTSWATER</name>
129775              <description>Receive RTS Configuration</description>
129776              <bitOffset>8</bitOffset>
129777              <bitWidth>8</bitWidth>
129778              <access>read-write</access>
129779              <enumeratedValues>
129780                <enumeratedValue>
129781                  <name>0</name>
129782                  <description>RTS asserts when the receiver FIFO is full or receiving a character that causes the FIFO to become full.</description>
129783                  <value>#0</value>
129784                </enumeratedValue>
129785                <enumeratedValue>
129786                  <name>1</name>
129787                  <description>RTS asserts when the receive FIFO is less than or equal to the RXWATER configuration and negates when the receive FIFO is greater than the RXWATER configuration.</description>
129788                  <value>#1</value>
129789                </enumeratedValue>
129790              </enumeratedValues>
129791            </field>
129792            <field>
129793              <name>TNP</name>
129794              <description>Transmitter narrow pulse</description>
129795              <bitOffset>16</bitOffset>
129796              <bitWidth>2</bitWidth>
129797              <access>read-write</access>
129798              <enumeratedValues>
129799                <enumeratedValue>
129800                  <name>00</name>
129801                  <description>1/OSR.</description>
129802                  <value>#00</value>
129803                </enumeratedValue>
129804                <enumeratedValue>
129805                  <name>01</name>
129806                  <description>2/OSR.</description>
129807                  <value>#01</value>
129808                </enumeratedValue>
129809                <enumeratedValue>
129810                  <name>10</name>
129811                  <description>3/OSR.</description>
129812                  <value>#10</value>
129813                </enumeratedValue>
129814                <enumeratedValue>
129815                  <name>11</name>
129816                  <description>4/OSR.</description>
129817                  <value>#11</value>
129818                </enumeratedValue>
129819              </enumeratedValues>
129820            </field>
129821            <field>
129822              <name>IREN</name>
129823              <description>Infrared enable</description>
129824              <bitOffset>18</bitOffset>
129825              <bitWidth>1</bitWidth>
129826              <access>read-write</access>
129827              <enumeratedValues>
129828                <enumeratedValue>
129829                  <name>0</name>
129830                  <description>IR disabled.</description>
129831                  <value>#0</value>
129832                </enumeratedValue>
129833                <enumeratedValue>
129834                  <name>1</name>
129835                  <description>IR enabled.</description>
129836                  <value>#1</value>
129837                </enumeratedValue>
129838              </enumeratedValues>
129839            </field>
129840          </fields>
129841        </register>
129842        <register>
129843          <name>FIFO</name>
129844          <description>LPUART FIFO Register</description>
129845          <addressOffset>0x18</addressOffset>
129846          <size>32</size>
129847          <access>read-write</access>
129848          <resetValue>0x22</resetValue>
129849          <resetMask>0xFFFFFFFF</resetMask>
129850          <fields>
129851            <field>
129852              <name>RXFIFOSIZE</name>
129853              <description>Receive FIFO. Buffer Depth</description>
129854              <bitOffset>0</bitOffset>
129855              <bitWidth>3</bitWidth>
129856              <access>read-only</access>
129857              <enumeratedValues>
129858                <enumeratedValue>
129859                  <name>000</name>
129860                  <description>Receive FIFO/Buffer depth = 1 dataword.</description>
129861                  <value>#000</value>
129862                </enumeratedValue>
129863                <enumeratedValue>
129864                  <name>001</name>
129865                  <description>Receive FIFO/Buffer depth = 4 datawords.</description>
129866                  <value>#001</value>
129867                </enumeratedValue>
129868                <enumeratedValue>
129869                  <name>010</name>
129870                  <description>Receive FIFO/Buffer depth = 8 datawords.</description>
129871                  <value>#010</value>
129872                </enumeratedValue>
129873                <enumeratedValue>
129874                  <name>011</name>
129875                  <description>Receive FIFO/Buffer depth = 16 datawords.</description>
129876                  <value>#011</value>
129877                </enumeratedValue>
129878                <enumeratedValue>
129879                  <name>100</name>
129880                  <description>Receive FIFO/Buffer depth = 32 datawords.</description>
129881                  <value>#100</value>
129882                </enumeratedValue>
129883                <enumeratedValue>
129884                  <name>101</name>
129885                  <description>Receive FIFO/Buffer depth = 64 datawords.</description>
129886                  <value>#101</value>
129887                </enumeratedValue>
129888                <enumeratedValue>
129889                  <name>110</name>
129890                  <description>Receive FIFO/Buffer depth = 128 datawords.</description>
129891                  <value>#110</value>
129892                </enumeratedValue>
129893                <enumeratedValue>
129894                  <name>111</name>
129895                  <description>Receive FIFO/Buffer depth = 256 datawords.</description>
129896                  <value>#111</value>
129897                </enumeratedValue>
129898              </enumeratedValues>
129899            </field>
129900            <field>
129901              <name>RXFE</name>
129902              <description>Receive FIFO Enable</description>
129903              <bitOffset>3</bitOffset>
129904              <bitWidth>1</bitWidth>
129905              <access>read-write</access>
129906              <enumeratedValues>
129907                <enumeratedValue>
129908                  <name>0</name>
129909                  <description>Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)</description>
129910                  <value>#0</value>
129911                </enumeratedValue>
129912                <enumeratedValue>
129913                  <name>1</name>
129914                  <description>Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE.</description>
129915                  <value>#1</value>
129916                </enumeratedValue>
129917              </enumeratedValues>
129918            </field>
129919            <field>
129920              <name>TXFIFOSIZE</name>
129921              <description>Transmit FIFO. Buffer Depth</description>
129922              <bitOffset>4</bitOffset>
129923              <bitWidth>3</bitWidth>
129924              <access>read-only</access>
129925              <enumeratedValues>
129926                <enumeratedValue>
129927                  <name>000</name>
129928                  <description>Transmit FIFO/Buffer depth = 1 dataword.</description>
129929                  <value>#000</value>
129930                </enumeratedValue>
129931                <enumeratedValue>
129932                  <name>001</name>
129933                  <description>Transmit FIFO/Buffer depth = 4 datawords.</description>
129934                  <value>#001</value>
129935                </enumeratedValue>
129936                <enumeratedValue>
129937                  <name>010</name>
129938                  <description>Transmit FIFO/Buffer depth = 8 datawords.</description>
129939                  <value>#010</value>
129940                </enumeratedValue>
129941                <enumeratedValue>
129942                  <name>011</name>
129943                  <description>Transmit FIFO/Buffer depth = 16 datawords.</description>
129944                  <value>#011</value>
129945                </enumeratedValue>
129946                <enumeratedValue>
129947                  <name>100</name>
129948                  <description>Transmit FIFO/Buffer depth = 32 datawords.</description>
129949                  <value>#100</value>
129950                </enumeratedValue>
129951                <enumeratedValue>
129952                  <name>101</name>
129953                  <description>Transmit FIFO/Buffer depth = 64 datawords.</description>
129954                  <value>#101</value>
129955                </enumeratedValue>
129956                <enumeratedValue>
129957                  <name>110</name>
129958                  <description>Transmit FIFO/Buffer depth = 128 datawords.</description>
129959                  <value>#110</value>
129960                </enumeratedValue>
129961                <enumeratedValue>
129962                  <name>111</name>
129963                  <description>Transmit FIFO/Buffer depth = 256 datawords</description>
129964                  <value>#111</value>
129965                </enumeratedValue>
129966              </enumeratedValues>
129967            </field>
129968            <field>
129969              <name>TXFE</name>
129970              <description>Transmit FIFO Enable</description>
129971              <bitOffset>7</bitOffset>
129972              <bitWidth>1</bitWidth>
129973              <access>read-write</access>
129974              <enumeratedValues>
129975                <enumeratedValue>
129976                  <name>0</name>
129977                  <description>Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support).</description>
129978                  <value>#0</value>
129979                </enumeratedValue>
129980                <enumeratedValue>
129981                  <name>1</name>
129982                  <description>Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.</description>
129983                  <value>#1</value>
129984                </enumeratedValue>
129985              </enumeratedValues>
129986            </field>
129987            <field>
129988              <name>RXUFE</name>
129989              <description>Receive FIFO Underflow Interrupt Enable</description>
129990              <bitOffset>8</bitOffset>
129991              <bitWidth>1</bitWidth>
129992              <access>read-write</access>
129993              <enumeratedValues>
129994                <enumeratedValue>
129995                  <name>0</name>
129996                  <description>RXUF flag does not generate an interrupt to the host.</description>
129997                  <value>#0</value>
129998                </enumeratedValue>
129999                <enumeratedValue>
130000                  <name>1</name>
130001                  <description>RXUF flag generates an interrupt to the host.</description>
130002                  <value>#1</value>
130003                </enumeratedValue>
130004              </enumeratedValues>
130005            </field>
130006            <field>
130007              <name>TXOFE</name>
130008              <description>Transmit FIFO Overflow Interrupt Enable</description>
130009              <bitOffset>9</bitOffset>
130010              <bitWidth>1</bitWidth>
130011              <access>read-write</access>
130012              <enumeratedValues>
130013                <enumeratedValue>
130014                  <name>0</name>
130015                  <description>TXOF flag does not generate an interrupt to the host.</description>
130016                  <value>#0</value>
130017                </enumeratedValue>
130018                <enumeratedValue>
130019                  <name>1</name>
130020                  <description>TXOF flag generates an interrupt to the host.</description>
130021                  <value>#1</value>
130022                </enumeratedValue>
130023              </enumeratedValues>
130024            </field>
130025            <field>
130026              <name>RXIDEN</name>
130027              <description>Receiver Idle Empty Enable</description>
130028              <bitOffset>10</bitOffset>
130029              <bitWidth>3</bitWidth>
130030              <access>read-write</access>
130031              <enumeratedValues>
130032                <enumeratedValue>
130033                  <name>000</name>
130034                  <description>Disable RDRF assertion due to partially filled FIFO when receiver is idle.</description>
130035                  <value>#000</value>
130036                </enumeratedValue>
130037                <enumeratedValue>
130038                  <name>001</name>
130039                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character.</description>
130040                  <value>#001</value>
130041                </enumeratedValue>
130042                <enumeratedValue>
130043                  <name>010</name>
130044                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters.</description>
130045                  <value>#010</value>
130046                </enumeratedValue>
130047                <enumeratedValue>
130048                  <name>011</name>
130049                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters.</description>
130050                  <value>#011</value>
130051                </enumeratedValue>
130052                <enumeratedValue>
130053                  <name>100</name>
130054                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters.</description>
130055                  <value>#100</value>
130056                </enumeratedValue>
130057                <enumeratedValue>
130058                  <name>101</name>
130059                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters.</description>
130060                  <value>#101</value>
130061                </enumeratedValue>
130062                <enumeratedValue>
130063                  <name>110</name>
130064                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters.</description>
130065                  <value>#110</value>
130066                </enumeratedValue>
130067                <enumeratedValue>
130068                  <name>111</name>
130069                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters.</description>
130070                  <value>#111</value>
130071                </enumeratedValue>
130072              </enumeratedValues>
130073            </field>
130074            <field>
130075              <name>RXFLUSH</name>
130076              <description>Receive FIFO/Buffer Flush</description>
130077              <bitOffset>14</bitOffset>
130078              <bitWidth>1</bitWidth>
130079              <access>write-only</access>
130080              <enumeratedValues>
130081                <enumeratedValue>
130082                  <name>0</name>
130083                  <description>No flush operation occurs.</description>
130084                  <value>#0</value>
130085                </enumeratedValue>
130086                <enumeratedValue>
130087                  <name>1</name>
130088                  <description>All data in the receive FIFO/buffer is cleared out.</description>
130089                  <value>#1</value>
130090                </enumeratedValue>
130091              </enumeratedValues>
130092            </field>
130093            <field>
130094              <name>TXFLUSH</name>
130095              <description>Transmit FIFO/Buffer Flush</description>
130096              <bitOffset>15</bitOffset>
130097              <bitWidth>1</bitWidth>
130098              <access>write-only</access>
130099              <enumeratedValues>
130100                <enumeratedValue>
130101                  <name>0</name>
130102                  <description>No flush operation occurs.</description>
130103                  <value>#0</value>
130104                </enumeratedValue>
130105                <enumeratedValue>
130106                  <name>1</name>
130107                  <description>All data in the transmit FIFO/Buffer is cleared out.</description>
130108                  <value>#1</value>
130109                </enumeratedValue>
130110              </enumeratedValues>
130111            </field>
130112            <field>
130113              <name>RXUF</name>
130114              <description>Receiver Buffer Underflow Flag</description>
130115              <bitOffset>16</bitOffset>
130116              <bitWidth>1</bitWidth>
130117              <access>read-write</access>
130118              <enumeratedValues>
130119                <enumeratedValue>
130120                  <name>0</name>
130121                  <description>No receive buffer underflow has occurred since the last time the flag was cleared.</description>
130122                  <value>#0</value>
130123                </enumeratedValue>
130124                <enumeratedValue>
130125                  <name>1</name>
130126                  <description>At least one receive buffer underflow has occurred since the last time the flag was cleared.</description>
130127                  <value>#1</value>
130128                </enumeratedValue>
130129              </enumeratedValues>
130130            </field>
130131            <field>
130132              <name>TXOF</name>
130133              <description>Transmitter Buffer Overflow Flag</description>
130134              <bitOffset>17</bitOffset>
130135              <bitWidth>1</bitWidth>
130136              <access>read-write</access>
130137              <enumeratedValues>
130138                <enumeratedValue>
130139                  <name>0</name>
130140                  <description>No transmit buffer overflow has occurred since the last time the flag was cleared.</description>
130141                  <value>#0</value>
130142                </enumeratedValue>
130143                <enumeratedValue>
130144                  <name>1</name>
130145                  <description>At least one transmit buffer overflow has occurred since the last time the flag was cleared.</description>
130146                  <value>#1</value>
130147                </enumeratedValue>
130148              </enumeratedValues>
130149            </field>
130150            <field>
130151              <name>RXEMPT</name>
130152              <description>Receive Buffer/FIFO Empty</description>
130153              <bitOffset>22</bitOffset>
130154              <bitWidth>1</bitWidth>
130155              <access>read-only</access>
130156              <enumeratedValues>
130157                <enumeratedValue>
130158                  <name>0</name>
130159                  <description>Receive buffer is not empty.</description>
130160                  <value>#0</value>
130161                </enumeratedValue>
130162                <enumeratedValue>
130163                  <name>1</name>
130164                  <description>Receive buffer is empty.</description>
130165                  <value>#1</value>
130166                </enumeratedValue>
130167              </enumeratedValues>
130168            </field>
130169            <field>
130170              <name>TXEMPT</name>
130171              <description>Transmit Buffer/FIFO Empty</description>
130172              <bitOffset>23</bitOffset>
130173              <bitWidth>1</bitWidth>
130174              <access>read-only</access>
130175              <enumeratedValues>
130176                <enumeratedValue>
130177                  <name>0</name>
130178                  <description>Transmit buffer is not empty.</description>
130179                  <value>#0</value>
130180                </enumeratedValue>
130181                <enumeratedValue>
130182                  <name>1</name>
130183                  <description>Transmit buffer is empty.</description>
130184                  <value>#1</value>
130185                </enumeratedValue>
130186              </enumeratedValues>
130187            </field>
130188          </fields>
130189        </register>
130190        <register>
130191          <name>WATER</name>
130192          <description>LPUART Watermark Register</description>
130193          <addressOffset>0x1C</addressOffset>
130194          <size>32</size>
130195          <access>read-write</access>
130196          <resetValue>0</resetValue>
130197          <resetMask>0xFFFFFFFF</resetMask>
130198          <fields>
130199            <field>
130200              <name>TXWATER</name>
130201              <description>Transmit Watermark</description>
130202              <bitOffset>0</bitOffset>
130203              <bitWidth>8</bitWidth>
130204              <access>read-write</access>
130205            </field>
130206            <field>
130207              <name>TXCOUNT</name>
130208              <description>Transmit Counter</description>
130209              <bitOffset>8</bitOffset>
130210              <bitWidth>8</bitWidth>
130211              <access>read-only</access>
130212            </field>
130213            <field>
130214              <name>RXWATER</name>
130215              <description>Receive Watermark</description>
130216              <bitOffset>16</bitOffset>
130217              <bitWidth>8</bitWidth>
130218              <access>read-write</access>
130219            </field>
130220            <field>
130221              <name>RXCOUNT</name>
130222              <description>Receive Counter</description>
130223              <bitOffset>24</bitOffset>
130224              <bitWidth>8</bitWidth>
130225              <access>read-only</access>
130226            </field>
130227          </fields>
130228        </register>
130229      </registers>
130230    </peripheral>
130231    <peripheral>
130232      <name>LPUART3</name>
130233      <description>Universal Asynchronous Receiver/Transmitter</description>
130234      <groupName>LPUART</groupName>
130235      <prependToName>LPUART3_</prependToName>
130236      <baseAddress>0x400C7000</baseAddress>
130237      <addressBlock>
130238        <offset>0</offset>
130239        <size>0x20</size>
130240        <usage>registers</usage>
130241      </addressBlock>
130242      <interrupt>
130243        <name>LPUART3</name>
130244        <value>33</value>
130245      </interrupt>
130246      <registers>
130247        <register>
130248          <name>BAUD</name>
130249          <description>LPUART Baud Rate Register</description>
130250          <addressOffset>0</addressOffset>
130251          <size>32</size>
130252          <access>read-write</access>
130253          <resetValue>0xF000004</resetValue>
130254          <resetMask>0xFFFFFFFF</resetMask>
130255          <fields>
130256            <field>
130257              <name>SBR</name>
130258              <description>Baud Rate Modulo Divisor.</description>
130259              <bitOffset>0</bitOffset>
130260              <bitWidth>13</bitWidth>
130261              <access>read-write</access>
130262            </field>
130263            <field>
130264              <name>SBNS</name>
130265              <description>Stop Bit Number Select</description>
130266              <bitOffset>13</bitOffset>
130267              <bitWidth>1</bitWidth>
130268              <access>read-write</access>
130269              <enumeratedValues>
130270                <enumeratedValue>
130271                  <name>0</name>
130272                  <description>One stop bit.</description>
130273                  <value>#0</value>
130274                </enumeratedValue>
130275                <enumeratedValue>
130276                  <name>1</name>
130277                  <description>Two stop bits.</description>
130278                  <value>#1</value>
130279                </enumeratedValue>
130280              </enumeratedValues>
130281            </field>
130282            <field>
130283              <name>RXEDGIE</name>
130284              <description>RX Input Active Edge Interrupt Enable</description>
130285              <bitOffset>14</bitOffset>
130286              <bitWidth>1</bitWidth>
130287              <access>read-write</access>
130288              <enumeratedValues>
130289                <enumeratedValue>
130290                  <name>0</name>
130291                  <description>Hardware interrupts from LPUART_STAT[RXEDGIF] disabled (use polling).</description>
130292                  <value>#0</value>
130293                </enumeratedValue>
130294                <enumeratedValue>
130295                  <name>1</name>
130296                  <description>Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1.</description>
130297                  <value>#1</value>
130298                </enumeratedValue>
130299              </enumeratedValues>
130300            </field>
130301            <field>
130302              <name>LBKDIE</name>
130303              <description>LIN Break Detect Interrupt Enable</description>
130304              <bitOffset>15</bitOffset>
130305              <bitWidth>1</bitWidth>
130306              <access>read-write</access>
130307              <enumeratedValues>
130308                <enumeratedValue>
130309                  <name>0</name>
130310                  <description>Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling).</description>
130311                  <value>#0</value>
130312                </enumeratedValue>
130313                <enumeratedValue>
130314                  <name>1</name>
130315                  <description>Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1.</description>
130316                  <value>#1</value>
130317                </enumeratedValue>
130318              </enumeratedValues>
130319            </field>
130320            <field>
130321              <name>RESYNCDIS</name>
130322              <description>Resynchronization Disable</description>
130323              <bitOffset>16</bitOffset>
130324              <bitWidth>1</bitWidth>
130325              <access>read-write</access>
130326              <enumeratedValues>
130327                <enumeratedValue>
130328                  <name>0</name>
130329                  <description>Resynchronization during received data word is supported</description>
130330                  <value>#0</value>
130331                </enumeratedValue>
130332                <enumeratedValue>
130333                  <name>1</name>
130334                  <description>Resynchronization during received data word is disabled</description>
130335                  <value>#1</value>
130336                </enumeratedValue>
130337              </enumeratedValues>
130338            </field>
130339            <field>
130340              <name>BOTHEDGE</name>
130341              <description>Both Edge Sampling</description>
130342              <bitOffset>17</bitOffset>
130343              <bitWidth>1</bitWidth>
130344              <access>read-write</access>
130345              <enumeratedValues>
130346                <enumeratedValue>
130347                  <name>0</name>
130348                  <description>Receiver samples input data using the rising edge of the baud rate clock.</description>
130349                  <value>#0</value>
130350                </enumeratedValue>
130351                <enumeratedValue>
130352                  <name>1</name>
130353                  <description>Receiver samples input data using the rising and falling edge of the baud rate clock.</description>
130354                  <value>#1</value>
130355                </enumeratedValue>
130356              </enumeratedValues>
130357            </field>
130358            <field>
130359              <name>MATCFG</name>
130360              <description>Match Configuration</description>
130361              <bitOffset>18</bitOffset>
130362              <bitWidth>2</bitWidth>
130363              <access>read-write</access>
130364              <enumeratedValues>
130365                <enumeratedValue>
130366                  <name>00</name>
130367                  <description>Address Match Wakeup</description>
130368                  <value>#00</value>
130369                </enumeratedValue>
130370                <enumeratedValue>
130371                  <name>01</name>
130372                  <description>Idle Match Wakeup</description>
130373                  <value>#01</value>
130374                </enumeratedValue>
130375                <enumeratedValue>
130376                  <name>10</name>
130377                  <description>Match On and Match Off</description>
130378                  <value>#10</value>
130379                </enumeratedValue>
130380                <enumeratedValue>
130381                  <name>11</name>
130382                  <description>Enables RWU on Data Match and Match On/Off for transmitter CTS input</description>
130383                  <value>#11</value>
130384                </enumeratedValue>
130385              </enumeratedValues>
130386            </field>
130387            <field>
130388              <name>RDMAE</name>
130389              <description>Receiver Full DMA Enable</description>
130390              <bitOffset>21</bitOffset>
130391              <bitWidth>1</bitWidth>
130392              <access>read-write</access>
130393              <enumeratedValues>
130394                <enumeratedValue>
130395                  <name>0</name>
130396                  <description>DMA request disabled.</description>
130397                  <value>#0</value>
130398                </enumeratedValue>
130399                <enumeratedValue>
130400                  <name>1</name>
130401                  <description>DMA request enabled.</description>
130402                  <value>#1</value>
130403                </enumeratedValue>
130404              </enumeratedValues>
130405            </field>
130406            <field>
130407              <name>TDMAE</name>
130408              <description>Transmitter DMA Enable</description>
130409              <bitOffset>23</bitOffset>
130410              <bitWidth>1</bitWidth>
130411              <access>read-write</access>
130412              <enumeratedValues>
130413                <enumeratedValue>
130414                  <name>0</name>
130415                  <description>DMA request disabled.</description>
130416                  <value>#0</value>
130417                </enumeratedValue>
130418                <enumeratedValue>
130419                  <name>1</name>
130420                  <description>DMA request enabled.</description>
130421                  <value>#1</value>
130422                </enumeratedValue>
130423              </enumeratedValues>
130424            </field>
130425            <field>
130426              <name>OSR</name>
130427              <description>Over Sampling Ratio</description>
130428              <bitOffset>24</bitOffset>
130429              <bitWidth>5</bitWidth>
130430              <access>read-write</access>
130431            </field>
130432            <field>
130433              <name>M10</name>
130434              <description>10-bit Mode select</description>
130435              <bitOffset>29</bitOffset>
130436              <bitWidth>1</bitWidth>
130437              <access>read-write</access>
130438              <enumeratedValues>
130439                <enumeratedValue>
130440                  <name>0</name>
130441                  <description>Receiver and transmitter use 8-bit or 9-bit data characters.</description>
130442                  <value>#0</value>
130443                </enumeratedValue>
130444                <enumeratedValue>
130445                  <name>1</name>
130446                  <description>Receiver and transmitter use 10-bit data characters.</description>
130447                  <value>#1</value>
130448                </enumeratedValue>
130449              </enumeratedValues>
130450            </field>
130451            <field>
130452              <name>MAEN2</name>
130453              <description>Match Address Mode Enable 2</description>
130454              <bitOffset>30</bitOffset>
130455              <bitWidth>1</bitWidth>
130456              <access>read-write</access>
130457              <enumeratedValues>
130458                <enumeratedValue>
130459                  <name>0</name>
130460                  <description>Normal operation.</description>
130461                  <value>#0</value>
130462                </enumeratedValue>
130463                <enumeratedValue>
130464                  <name>1</name>
130465                  <description>Enables automatic address matching or data matching mode for MATCH[MA2].</description>
130466                  <value>#1</value>
130467                </enumeratedValue>
130468              </enumeratedValues>
130469            </field>
130470            <field>
130471              <name>MAEN1</name>
130472              <description>Match Address Mode Enable 1</description>
130473              <bitOffset>31</bitOffset>
130474              <bitWidth>1</bitWidth>
130475              <access>read-write</access>
130476              <enumeratedValues>
130477                <enumeratedValue>
130478                  <name>0</name>
130479                  <description>Normal operation.</description>
130480                  <value>#0</value>
130481                </enumeratedValue>
130482                <enumeratedValue>
130483                  <name>1</name>
130484                  <description>Enables automatic address matching or data matching mode for MATCH[MA1].</description>
130485                  <value>#1</value>
130486                </enumeratedValue>
130487              </enumeratedValues>
130488            </field>
130489          </fields>
130490        </register>
130491        <register>
130492          <name>STAT</name>
130493          <description>LPUART Status Register</description>
130494          <addressOffset>0x4</addressOffset>
130495          <size>32</size>
130496          <access>read-write</access>
130497          <resetValue>0xC00000</resetValue>
130498          <resetMask>0xFFFFFFFF</resetMask>
130499          <fields>
130500            <field>
130501              <name>MA2F</name>
130502              <description>Match 2 Flag</description>
130503              <bitOffset>14</bitOffset>
130504              <bitWidth>1</bitWidth>
130505              <access>read-write</access>
130506              <enumeratedValues>
130507                <enumeratedValue>
130508                  <name>0</name>
130509                  <description>Received data is not equal to MA2</description>
130510                  <value>#0</value>
130511                </enumeratedValue>
130512                <enumeratedValue>
130513                  <name>1</name>
130514                  <description>Received data is equal to MA2</description>
130515                  <value>#1</value>
130516                </enumeratedValue>
130517              </enumeratedValues>
130518            </field>
130519            <field>
130520              <name>MA1F</name>
130521              <description>Match 1 Flag</description>
130522              <bitOffset>15</bitOffset>
130523              <bitWidth>1</bitWidth>
130524              <access>read-write</access>
130525              <enumeratedValues>
130526                <enumeratedValue>
130527                  <name>0</name>
130528                  <description>Received data is not equal to MA1</description>
130529                  <value>#0</value>
130530                </enumeratedValue>
130531                <enumeratedValue>
130532                  <name>1</name>
130533                  <description>Received data is equal to MA1</description>
130534                  <value>#1</value>
130535                </enumeratedValue>
130536              </enumeratedValues>
130537            </field>
130538            <field>
130539              <name>PF</name>
130540              <description>Parity Error Flag</description>
130541              <bitOffset>16</bitOffset>
130542              <bitWidth>1</bitWidth>
130543              <access>read-write</access>
130544              <enumeratedValues>
130545                <enumeratedValue>
130546                  <name>0</name>
130547                  <description>No parity error.</description>
130548                  <value>#0</value>
130549                </enumeratedValue>
130550                <enumeratedValue>
130551                  <name>1</name>
130552                  <description>Parity error.</description>
130553                  <value>#1</value>
130554                </enumeratedValue>
130555              </enumeratedValues>
130556            </field>
130557            <field>
130558              <name>FE</name>
130559              <description>Framing Error Flag</description>
130560              <bitOffset>17</bitOffset>
130561              <bitWidth>1</bitWidth>
130562              <access>read-write</access>
130563              <enumeratedValues>
130564                <enumeratedValue>
130565                  <name>0</name>
130566                  <description>No framing error detected. This does not guarantee the framing is correct.</description>
130567                  <value>#0</value>
130568                </enumeratedValue>
130569                <enumeratedValue>
130570                  <name>1</name>
130571                  <description>Framing error.</description>
130572                  <value>#1</value>
130573                </enumeratedValue>
130574              </enumeratedValues>
130575            </field>
130576            <field>
130577              <name>NF</name>
130578              <description>Noise Flag</description>
130579              <bitOffset>18</bitOffset>
130580              <bitWidth>1</bitWidth>
130581              <access>read-write</access>
130582              <enumeratedValues>
130583                <enumeratedValue>
130584                  <name>0</name>
130585                  <description>No noise detected.</description>
130586                  <value>#0</value>
130587                </enumeratedValue>
130588                <enumeratedValue>
130589                  <name>1</name>
130590                  <description>Noise detected in the received character in LPUART_DATA.</description>
130591                  <value>#1</value>
130592                </enumeratedValue>
130593              </enumeratedValues>
130594            </field>
130595            <field>
130596              <name>OR</name>
130597              <description>Receiver Overrun Flag</description>
130598              <bitOffset>19</bitOffset>
130599              <bitWidth>1</bitWidth>
130600              <access>read-write</access>
130601              <enumeratedValues>
130602                <enumeratedValue>
130603                  <name>0</name>
130604                  <description>No overrun.</description>
130605                  <value>#0</value>
130606                </enumeratedValue>
130607                <enumeratedValue>
130608                  <name>1</name>
130609                  <description>Receive overrun (new LPUART data lost).</description>
130610                  <value>#1</value>
130611                </enumeratedValue>
130612              </enumeratedValues>
130613            </field>
130614            <field>
130615              <name>IDLE</name>
130616              <description>Idle Line Flag</description>
130617              <bitOffset>20</bitOffset>
130618              <bitWidth>1</bitWidth>
130619              <access>read-write</access>
130620              <enumeratedValues>
130621                <enumeratedValue>
130622                  <name>0</name>
130623                  <description>No idle line detected.</description>
130624                  <value>#0</value>
130625                </enumeratedValue>
130626                <enumeratedValue>
130627                  <name>1</name>
130628                  <description>Idle line was detected.</description>
130629                  <value>#1</value>
130630                </enumeratedValue>
130631              </enumeratedValues>
130632            </field>
130633            <field>
130634              <name>RDRF</name>
130635              <description>Receive Data Register Full Flag</description>
130636              <bitOffset>21</bitOffset>
130637              <bitWidth>1</bitWidth>
130638              <access>read-only</access>
130639              <enumeratedValues>
130640                <enumeratedValue>
130641                  <name>0</name>
130642                  <description>Receive data buffer empty.</description>
130643                  <value>#0</value>
130644                </enumeratedValue>
130645                <enumeratedValue>
130646                  <name>1</name>
130647                  <description>Receive data buffer full.</description>
130648                  <value>#1</value>
130649                </enumeratedValue>
130650              </enumeratedValues>
130651            </field>
130652            <field>
130653              <name>TC</name>
130654              <description>Transmission Complete Flag</description>
130655              <bitOffset>22</bitOffset>
130656              <bitWidth>1</bitWidth>
130657              <access>read-only</access>
130658              <enumeratedValues>
130659                <enumeratedValue>
130660                  <name>0</name>
130661                  <description>Transmitter active (sending data, a preamble, or a break).</description>
130662                  <value>#0</value>
130663                </enumeratedValue>
130664                <enumeratedValue>
130665                  <name>1</name>
130666                  <description>Transmitter idle (transmission activity complete).</description>
130667                  <value>#1</value>
130668                </enumeratedValue>
130669              </enumeratedValues>
130670            </field>
130671            <field>
130672              <name>TDRE</name>
130673              <description>Transmit Data Register Empty Flag</description>
130674              <bitOffset>23</bitOffset>
130675              <bitWidth>1</bitWidth>
130676              <access>read-only</access>
130677              <enumeratedValues>
130678                <enumeratedValue>
130679                  <name>0</name>
130680                  <description>Transmit data buffer full.</description>
130681                  <value>#0</value>
130682                </enumeratedValue>
130683                <enumeratedValue>
130684                  <name>1</name>
130685                  <description>Transmit data buffer empty.</description>
130686                  <value>#1</value>
130687                </enumeratedValue>
130688              </enumeratedValues>
130689            </field>
130690            <field>
130691              <name>RAF</name>
130692              <description>Receiver Active Flag</description>
130693              <bitOffset>24</bitOffset>
130694              <bitWidth>1</bitWidth>
130695              <access>read-only</access>
130696              <enumeratedValues>
130697                <enumeratedValue>
130698                  <name>0</name>
130699                  <description>LPUART receiver idle waiting for a start bit.</description>
130700                  <value>#0</value>
130701                </enumeratedValue>
130702                <enumeratedValue>
130703                  <name>1</name>
130704                  <description>LPUART receiver active (LPUART_RX input not idle).</description>
130705                  <value>#1</value>
130706                </enumeratedValue>
130707              </enumeratedValues>
130708            </field>
130709            <field>
130710              <name>LBKDE</name>
130711              <description>LIN Break Detection Enable</description>
130712              <bitOffset>25</bitOffset>
130713              <bitWidth>1</bitWidth>
130714              <access>read-write</access>
130715              <enumeratedValues>
130716                <enumeratedValue>
130717                  <name>0</name>
130718                  <description>Break character is detected at length 10 bit times (if M = 0, SBNS = 0) or 11 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 12 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 13 (if M10 = 1, SNBS = 1).</description>
130719                  <value>#0</value>
130720                </enumeratedValue>
130721                <enumeratedValue>
130722                  <name>1</name>
130723                  <description>Break character is detected at length of 11 bit times (if M = 0, SBNS = 0) or 12 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 14 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 15 (if M10 = 1, SNBS = 1).</description>
130724                  <value>#1</value>
130725                </enumeratedValue>
130726              </enumeratedValues>
130727            </field>
130728            <field>
130729              <name>BRK13</name>
130730              <description>Break Character Generation Length</description>
130731              <bitOffset>26</bitOffset>
130732              <bitWidth>1</bitWidth>
130733              <access>read-write</access>
130734              <enumeratedValues>
130735                <enumeratedValue>
130736                  <name>0</name>
130737                  <description>Break character is transmitted with length of 10 bit times (if M = 0, SBNS = 0) or 11 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 12 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 13 (if M10 = 1, SNBS = 1).</description>
130738                  <value>#0</value>
130739                </enumeratedValue>
130740                <enumeratedValue>
130741                  <name>1</name>
130742                  <description>Break character is transmitted with length of 13 bit times (if M = 0, SBNS = 0) or 14 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 15 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 16 (if M10 = 1, SNBS = 1).</description>
130743                  <value>#1</value>
130744                </enumeratedValue>
130745              </enumeratedValues>
130746            </field>
130747            <field>
130748              <name>RWUID</name>
130749              <description>Receive Wake Up Idle Detect</description>
130750              <bitOffset>27</bitOffset>
130751              <bitWidth>1</bitWidth>
130752              <access>read-write</access>
130753              <enumeratedValues>
130754                <enumeratedValue>
130755                  <name>0</name>
130756                  <description>During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not get set when an address does not match.</description>
130757                  <value>#0</value>
130758                </enumeratedValue>
130759                <enumeratedValue>
130760                  <name>1</name>
130761                  <description>During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does get set when an address does not match.</description>
130762                  <value>#1</value>
130763                </enumeratedValue>
130764              </enumeratedValues>
130765            </field>
130766            <field>
130767              <name>RXINV</name>
130768              <description>Receive Data Inversion</description>
130769              <bitOffset>28</bitOffset>
130770              <bitWidth>1</bitWidth>
130771              <access>read-write</access>
130772              <enumeratedValues>
130773                <enumeratedValue>
130774                  <name>0</name>
130775                  <description>Receive data not inverted.</description>
130776                  <value>#0</value>
130777                </enumeratedValue>
130778                <enumeratedValue>
130779                  <name>1</name>
130780                  <description>Receive data inverted.</description>
130781                  <value>#1</value>
130782                </enumeratedValue>
130783              </enumeratedValues>
130784            </field>
130785            <field>
130786              <name>MSBF</name>
130787              <description>MSB First</description>
130788              <bitOffset>29</bitOffset>
130789              <bitWidth>1</bitWidth>
130790              <access>read-write</access>
130791              <enumeratedValues>
130792                <enumeratedValue>
130793                  <name>0</name>
130794                  <description>LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0.</description>
130795                  <value>#0</value>
130796                </enumeratedValue>
130797                <enumeratedValue>
130798                  <name>1</name>
130799                  <description>MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE].</description>
130800                  <value>#1</value>
130801                </enumeratedValue>
130802              </enumeratedValues>
130803            </field>
130804            <field>
130805              <name>RXEDGIF</name>
130806              <description>LPUART_RX Pin Active Edge Interrupt Flag</description>
130807              <bitOffset>30</bitOffset>
130808              <bitWidth>1</bitWidth>
130809              <access>read-write</access>
130810              <enumeratedValues>
130811                <enumeratedValue>
130812                  <name>0</name>
130813                  <description>No active edge on the receive pin has occurred.</description>
130814                  <value>#0</value>
130815                </enumeratedValue>
130816                <enumeratedValue>
130817                  <name>1</name>
130818                  <description>An active edge on the receive pin has occurred.</description>
130819                  <value>#1</value>
130820                </enumeratedValue>
130821              </enumeratedValues>
130822            </field>
130823            <field>
130824              <name>LBKDIF</name>
130825              <description>LIN Break Detect Interrupt Flag</description>
130826              <bitOffset>31</bitOffset>
130827              <bitWidth>1</bitWidth>
130828              <access>read-write</access>
130829              <enumeratedValues>
130830                <enumeratedValue>
130831                  <name>0</name>
130832                  <description>No LIN break character has been detected.</description>
130833                  <value>#0</value>
130834                </enumeratedValue>
130835                <enumeratedValue>
130836                  <name>1</name>
130837                  <description>LIN break character has been detected.</description>
130838                  <value>#1</value>
130839                </enumeratedValue>
130840              </enumeratedValues>
130841            </field>
130842          </fields>
130843        </register>
130844        <register>
130845          <name>CTRL</name>
130846          <description>LPUART Control Register</description>
130847          <addressOffset>0x8</addressOffset>
130848          <size>32</size>
130849          <access>read-write</access>
130850          <resetValue>0</resetValue>
130851          <resetMask>0xFFFFFFFF</resetMask>
130852          <fields>
130853            <field>
130854              <name>PT</name>
130855              <description>Parity Type</description>
130856              <bitOffset>0</bitOffset>
130857              <bitWidth>1</bitWidth>
130858              <access>read-write</access>
130859              <enumeratedValues>
130860                <enumeratedValue>
130861                  <name>0</name>
130862                  <description>Even parity.</description>
130863                  <value>#0</value>
130864                </enumeratedValue>
130865                <enumeratedValue>
130866                  <name>1</name>
130867                  <description>Odd parity.</description>
130868                  <value>#1</value>
130869                </enumeratedValue>
130870              </enumeratedValues>
130871            </field>
130872            <field>
130873              <name>PE</name>
130874              <description>Parity Enable</description>
130875              <bitOffset>1</bitOffset>
130876              <bitWidth>1</bitWidth>
130877              <access>read-write</access>
130878              <enumeratedValues>
130879                <enumeratedValue>
130880                  <name>0</name>
130881                  <description>No hardware parity generation or checking.</description>
130882                  <value>#0</value>
130883                </enumeratedValue>
130884                <enumeratedValue>
130885                  <name>1</name>
130886                  <description>Parity enabled.</description>
130887                  <value>#1</value>
130888                </enumeratedValue>
130889              </enumeratedValues>
130890            </field>
130891            <field>
130892              <name>ILT</name>
130893              <description>Idle Line Type Select</description>
130894              <bitOffset>2</bitOffset>
130895              <bitWidth>1</bitWidth>
130896              <access>read-write</access>
130897              <enumeratedValues>
130898                <enumeratedValue>
130899                  <name>0</name>
130900                  <description>Idle character bit count starts after start bit.</description>
130901                  <value>#0</value>
130902                </enumeratedValue>
130903                <enumeratedValue>
130904                  <name>1</name>
130905                  <description>Idle character bit count starts after stop bit.</description>
130906                  <value>#1</value>
130907                </enumeratedValue>
130908              </enumeratedValues>
130909            </field>
130910            <field>
130911              <name>WAKE</name>
130912              <description>Receiver Wakeup Method Select</description>
130913              <bitOffset>3</bitOffset>
130914              <bitWidth>1</bitWidth>
130915              <access>read-write</access>
130916              <enumeratedValues>
130917                <enumeratedValue>
130918                  <name>0</name>
130919                  <description>Configures RWU for idle-line wakeup.</description>
130920                  <value>#0</value>
130921                </enumeratedValue>
130922                <enumeratedValue>
130923                  <name>1</name>
130924                  <description>Configures RWU with address-mark wakeup.</description>
130925                  <value>#1</value>
130926                </enumeratedValue>
130927              </enumeratedValues>
130928            </field>
130929            <field>
130930              <name>M</name>
130931              <description>9-Bit or 8-Bit Mode Select</description>
130932              <bitOffset>4</bitOffset>
130933              <bitWidth>1</bitWidth>
130934              <access>read-write</access>
130935              <enumeratedValues>
130936                <enumeratedValue>
130937                  <name>0</name>
130938                  <description>Receiver and transmitter use 8-bit data characters.</description>
130939                  <value>#0</value>
130940                </enumeratedValue>
130941                <enumeratedValue>
130942                  <name>1</name>
130943                  <description>Receiver and transmitter use 9-bit data characters.</description>
130944                  <value>#1</value>
130945                </enumeratedValue>
130946              </enumeratedValues>
130947            </field>
130948            <field>
130949              <name>RSRC</name>
130950              <description>Receiver Source Select</description>
130951              <bitOffset>5</bitOffset>
130952              <bitWidth>1</bitWidth>
130953              <access>read-write</access>
130954              <enumeratedValues>
130955                <enumeratedValue>
130956                  <name>0</name>
130957                  <description>Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the LPUART_RX pin.</description>
130958                  <value>#0</value>
130959                </enumeratedValue>
130960                <enumeratedValue>
130961                  <name>1</name>
130962                  <description>Single-wire LPUART mode where the LPUART_TX pin is connected to the transmitter output and receiver input.</description>
130963                  <value>#1</value>
130964                </enumeratedValue>
130965              </enumeratedValues>
130966            </field>
130967            <field>
130968              <name>DOZEEN</name>
130969              <description>Doze Enable</description>
130970              <bitOffset>6</bitOffset>
130971              <bitWidth>1</bitWidth>
130972              <access>read-write</access>
130973              <enumeratedValues>
130974                <enumeratedValue>
130975                  <name>0</name>
130976                  <description>LPUART is enabled in Doze mode.</description>
130977                  <value>#0</value>
130978                </enumeratedValue>
130979                <enumeratedValue>
130980                  <name>1</name>
130981                  <description>LPUART is disabled in Doze mode.</description>
130982                  <value>#1</value>
130983                </enumeratedValue>
130984              </enumeratedValues>
130985            </field>
130986            <field>
130987              <name>LOOPS</name>
130988              <description>Loop Mode Select</description>
130989              <bitOffset>7</bitOffset>
130990              <bitWidth>1</bitWidth>
130991              <access>read-write</access>
130992              <enumeratedValues>
130993                <enumeratedValue>
130994                  <name>0</name>
130995                  <description>Normal operation - LPUART_RX and LPUART_TX use separate pins.</description>
130996                  <value>#0</value>
130997                </enumeratedValue>
130998                <enumeratedValue>
130999                  <name>1</name>
131000                  <description>Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit).</description>
131001                  <value>#1</value>
131002                </enumeratedValue>
131003              </enumeratedValues>
131004            </field>
131005            <field>
131006              <name>IDLECFG</name>
131007              <description>Idle Configuration</description>
131008              <bitOffset>8</bitOffset>
131009              <bitWidth>3</bitWidth>
131010              <access>read-write</access>
131011              <enumeratedValues>
131012                <enumeratedValue>
131013                  <name>000</name>
131014                  <description>1 idle character</description>
131015                  <value>#000</value>
131016                </enumeratedValue>
131017                <enumeratedValue>
131018                  <name>001</name>
131019                  <description>2 idle characters</description>
131020                  <value>#001</value>
131021                </enumeratedValue>
131022                <enumeratedValue>
131023                  <name>010</name>
131024                  <description>4 idle characters</description>
131025                  <value>#010</value>
131026                </enumeratedValue>
131027                <enumeratedValue>
131028                  <name>011</name>
131029                  <description>8 idle characters</description>
131030                  <value>#011</value>
131031                </enumeratedValue>
131032                <enumeratedValue>
131033                  <name>100</name>
131034                  <description>16 idle characters</description>
131035                  <value>#100</value>
131036                </enumeratedValue>
131037                <enumeratedValue>
131038                  <name>101</name>
131039                  <description>32 idle characters</description>
131040                  <value>#101</value>
131041                </enumeratedValue>
131042                <enumeratedValue>
131043                  <name>110</name>
131044                  <description>64 idle characters</description>
131045                  <value>#110</value>
131046                </enumeratedValue>
131047                <enumeratedValue>
131048                  <name>111</name>
131049                  <description>128 idle characters</description>
131050                  <value>#111</value>
131051                </enumeratedValue>
131052              </enumeratedValues>
131053            </field>
131054            <field>
131055              <name>MA2IE</name>
131056              <description>Match 2 Interrupt Enable</description>
131057              <bitOffset>14</bitOffset>
131058              <bitWidth>1</bitWidth>
131059              <access>read-write</access>
131060              <enumeratedValues>
131061                <enumeratedValue>
131062                  <name>0</name>
131063                  <description>MA2F interrupt disabled</description>
131064                  <value>#0</value>
131065                </enumeratedValue>
131066                <enumeratedValue>
131067                  <name>1</name>
131068                  <description>MA2F interrupt enabled</description>
131069                  <value>#1</value>
131070                </enumeratedValue>
131071              </enumeratedValues>
131072            </field>
131073            <field>
131074              <name>MA1IE</name>
131075              <description>Match 1 Interrupt Enable</description>
131076              <bitOffset>15</bitOffset>
131077              <bitWidth>1</bitWidth>
131078              <access>read-write</access>
131079              <enumeratedValues>
131080                <enumeratedValue>
131081                  <name>0</name>
131082                  <description>MA1F interrupt disabled</description>
131083                  <value>#0</value>
131084                </enumeratedValue>
131085                <enumeratedValue>
131086                  <name>1</name>
131087                  <description>MA1F interrupt enabled</description>
131088                  <value>#1</value>
131089                </enumeratedValue>
131090              </enumeratedValues>
131091            </field>
131092            <field>
131093              <name>SBK</name>
131094              <description>Send Break</description>
131095              <bitOffset>16</bitOffset>
131096              <bitWidth>1</bitWidth>
131097              <access>read-write</access>
131098              <enumeratedValues>
131099                <enumeratedValue>
131100                  <name>0</name>
131101                  <description>Normal transmitter operation.</description>
131102                  <value>#0</value>
131103                </enumeratedValue>
131104                <enumeratedValue>
131105                  <name>1</name>
131106                  <description>Queue break character(s) to be sent.</description>
131107                  <value>#1</value>
131108                </enumeratedValue>
131109              </enumeratedValues>
131110            </field>
131111            <field>
131112              <name>RWU</name>
131113              <description>Receiver Wakeup Control</description>
131114              <bitOffset>17</bitOffset>
131115              <bitWidth>1</bitWidth>
131116              <access>read-write</access>
131117              <enumeratedValues>
131118                <enumeratedValue>
131119                  <name>0</name>
131120                  <description>Normal receiver operation.</description>
131121                  <value>#0</value>
131122                </enumeratedValue>
131123                <enumeratedValue>
131124                  <name>1</name>
131125                  <description>LPUART receiver in standby waiting for wakeup condition.</description>
131126                  <value>#1</value>
131127                </enumeratedValue>
131128              </enumeratedValues>
131129            </field>
131130            <field>
131131              <name>RE</name>
131132              <description>Receiver Enable</description>
131133              <bitOffset>18</bitOffset>
131134              <bitWidth>1</bitWidth>
131135              <access>read-write</access>
131136              <enumeratedValues>
131137                <enumeratedValue>
131138                  <name>0</name>
131139                  <description>Receiver disabled.</description>
131140                  <value>#0</value>
131141                </enumeratedValue>
131142                <enumeratedValue>
131143                  <name>1</name>
131144                  <description>Receiver enabled.</description>
131145                  <value>#1</value>
131146                </enumeratedValue>
131147              </enumeratedValues>
131148            </field>
131149            <field>
131150              <name>TE</name>
131151              <description>Transmitter Enable</description>
131152              <bitOffset>19</bitOffset>
131153              <bitWidth>1</bitWidth>
131154              <access>read-write</access>
131155              <enumeratedValues>
131156                <enumeratedValue>
131157                  <name>0</name>
131158                  <description>Transmitter disabled.</description>
131159                  <value>#0</value>
131160                </enumeratedValue>
131161                <enumeratedValue>
131162                  <name>1</name>
131163                  <description>Transmitter enabled.</description>
131164                  <value>#1</value>
131165                </enumeratedValue>
131166              </enumeratedValues>
131167            </field>
131168            <field>
131169              <name>ILIE</name>
131170              <description>Idle Line Interrupt Enable</description>
131171              <bitOffset>20</bitOffset>
131172              <bitWidth>1</bitWidth>
131173              <access>read-write</access>
131174              <enumeratedValues>
131175                <enumeratedValue>
131176                  <name>0</name>
131177                  <description>Hardware interrupts from IDLE disabled; use polling.</description>
131178                  <value>#0</value>
131179                </enumeratedValue>
131180                <enumeratedValue>
131181                  <name>1</name>
131182                  <description>Hardware interrupt requested when IDLE flag is 1.</description>
131183                  <value>#1</value>
131184                </enumeratedValue>
131185              </enumeratedValues>
131186            </field>
131187            <field>
131188              <name>RIE</name>
131189              <description>Receiver Interrupt Enable</description>
131190              <bitOffset>21</bitOffset>
131191              <bitWidth>1</bitWidth>
131192              <access>read-write</access>
131193              <enumeratedValues>
131194                <enumeratedValue>
131195                  <name>0</name>
131196                  <description>Hardware interrupts from RDRF disabled; use polling.</description>
131197                  <value>#0</value>
131198                </enumeratedValue>
131199                <enumeratedValue>
131200                  <name>1</name>
131201                  <description>Hardware interrupt requested when RDRF flag is 1.</description>
131202                  <value>#1</value>
131203                </enumeratedValue>
131204              </enumeratedValues>
131205            </field>
131206            <field>
131207              <name>TCIE</name>
131208              <description>Transmission Complete Interrupt Enable for</description>
131209              <bitOffset>22</bitOffset>
131210              <bitWidth>1</bitWidth>
131211              <access>read-write</access>
131212              <enumeratedValues>
131213                <enumeratedValue>
131214                  <name>0</name>
131215                  <description>Hardware interrupts from TC disabled; use polling.</description>
131216                  <value>#0</value>
131217                </enumeratedValue>
131218                <enumeratedValue>
131219                  <name>1</name>
131220                  <description>Hardware interrupt requested when TC flag is 1.</description>
131221                  <value>#1</value>
131222                </enumeratedValue>
131223              </enumeratedValues>
131224            </field>
131225            <field>
131226              <name>TIE</name>
131227              <description>Transmit Interrupt Enable</description>
131228              <bitOffset>23</bitOffset>
131229              <bitWidth>1</bitWidth>
131230              <access>read-write</access>
131231              <enumeratedValues>
131232                <enumeratedValue>
131233                  <name>0</name>
131234                  <description>Hardware interrupts from TDRE disabled; use polling.</description>
131235                  <value>#0</value>
131236                </enumeratedValue>
131237                <enumeratedValue>
131238                  <name>1</name>
131239                  <description>Hardware interrupt requested when TDRE flag is 1.</description>
131240                  <value>#1</value>
131241                </enumeratedValue>
131242              </enumeratedValues>
131243            </field>
131244            <field>
131245              <name>PEIE</name>
131246              <description>Parity Error Interrupt Enable</description>
131247              <bitOffset>24</bitOffset>
131248              <bitWidth>1</bitWidth>
131249              <access>read-write</access>
131250              <enumeratedValues>
131251                <enumeratedValue>
131252                  <name>0</name>
131253                  <description>PF interrupts disabled; use polling).</description>
131254                  <value>#0</value>
131255                </enumeratedValue>
131256                <enumeratedValue>
131257                  <name>1</name>
131258                  <description>Hardware interrupt requested when PF is set.</description>
131259                  <value>#1</value>
131260                </enumeratedValue>
131261              </enumeratedValues>
131262            </field>
131263            <field>
131264              <name>FEIE</name>
131265              <description>Framing Error Interrupt Enable</description>
131266              <bitOffset>25</bitOffset>
131267              <bitWidth>1</bitWidth>
131268              <access>read-write</access>
131269              <enumeratedValues>
131270                <enumeratedValue>
131271                  <name>0</name>
131272                  <description>FE interrupts disabled; use polling.</description>
131273                  <value>#0</value>
131274                </enumeratedValue>
131275                <enumeratedValue>
131276                  <name>1</name>
131277                  <description>Hardware interrupt requested when FE is set.</description>
131278                  <value>#1</value>
131279                </enumeratedValue>
131280              </enumeratedValues>
131281            </field>
131282            <field>
131283              <name>NEIE</name>
131284              <description>Noise Error Interrupt Enable</description>
131285              <bitOffset>26</bitOffset>
131286              <bitWidth>1</bitWidth>
131287              <access>read-write</access>
131288              <enumeratedValues>
131289                <enumeratedValue>
131290                  <name>0</name>
131291                  <description>NF interrupts disabled; use polling.</description>
131292                  <value>#0</value>
131293                </enumeratedValue>
131294                <enumeratedValue>
131295                  <name>1</name>
131296                  <description>Hardware interrupt requested when NF is set.</description>
131297                  <value>#1</value>
131298                </enumeratedValue>
131299              </enumeratedValues>
131300            </field>
131301            <field>
131302              <name>ORIE</name>
131303              <description>Overrun Interrupt Enable</description>
131304              <bitOffset>27</bitOffset>
131305              <bitWidth>1</bitWidth>
131306              <access>read-write</access>
131307              <enumeratedValues>
131308                <enumeratedValue>
131309                  <name>0</name>
131310                  <description>OR interrupts disabled; use polling.</description>
131311                  <value>#0</value>
131312                </enumeratedValue>
131313                <enumeratedValue>
131314                  <name>1</name>
131315                  <description>Hardware interrupt requested when OR is set.</description>
131316                  <value>#1</value>
131317                </enumeratedValue>
131318              </enumeratedValues>
131319            </field>
131320            <field>
131321              <name>TXINV</name>
131322              <description>Transmit Data Inversion</description>
131323              <bitOffset>28</bitOffset>
131324              <bitWidth>1</bitWidth>
131325              <access>read-write</access>
131326              <enumeratedValues>
131327                <enumeratedValue>
131328                  <name>0</name>
131329                  <description>Transmit data not inverted.</description>
131330                  <value>#0</value>
131331                </enumeratedValue>
131332                <enumeratedValue>
131333                  <name>1</name>
131334                  <description>Transmit data inverted.</description>
131335                  <value>#1</value>
131336                </enumeratedValue>
131337              </enumeratedValues>
131338            </field>
131339            <field>
131340              <name>TXDIR</name>
131341              <description>LPUART_TX Pin Direction in Single-Wire Mode</description>
131342              <bitOffset>29</bitOffset>
131343              <bitWidth>1</bitWidth>
131344              <access>read-write</access>
131345              <enumeratedValues>
131346                <enumeratedValue>
131347                  <name>0</name>
131348                  <description>LPUART_TX pin is an input in single-wire mode.</description>
131349                  <value>#0</value>
131350                </enumeratedValue>
131351                <enumeratedValue>
131352                  <name>1</name>
131353                  <description>LPUART_TX pin is an output in single-wire mode.</description>
131354                  <value>#1</value>
131355                </enumeratedValue>
131356              </enumeratedValues>
131357            </field>
131358            <field>
131359              <name>R9T8</name>
131360              <description>Receive Bit 9 / Transmit Bit 8</description>
131361              <bitOffset>30</bitOffset>
131362              <bitWidth>1</bitWidth>
131363              <access>read-write</access>
131364            </field>
131365            <field>
131366              <name>R8T9</name>
131367              <description>Receive Bit 8 / Transmit Bit 9</description>
131368              <bitOffset>31</bitOffset>
131369              <bitWidth>1</bitWidth>
131370              <access>read-write</access>
131371            </field>
131372          </fields>
131373        </register>
131374        <register>
131375          <name>DATA</name>
131376          <description>LPUART Data Register</description>
131377          <addressOffset>0xC</addressOffset>
131378          <size>32</size>
131379          <access>read-write</access>
131380          <resetValue>0x1000</resetValue>
131381          <resetMask>0xFFFFFFFF</resetMask>
131382          <fields>
131383            <field>
131384              <name>R0T0</name>
131385              <description>Read receive data buffer 0 or write transmit data buffer 0.</description>
131386              <bitOffset>0</bitOffset>
131387              <bitWidth>1</bitWidth>
131388              <access>read-write</access>
131389            </field>
131390            <field>
131391              <name>R1T1</name>
131392              <description>Read receive data buffer 1 or write transmit data buffer 1.</description>
131393              <bitOffset>1</bitOffset>
131394              <bitWidth>1</bitWidth>
131395              <access>read-write</access>
131396            </field>
131397            <field>
131398              <name>R2T2</name>
131399              <description>Read receive data buffer 2 or write transmit data buffer 2.</description>
131400              <bitOffset>2</bitOffset>
131401              <bitWidth>1</bitWidth>
131402              <access>read-write</access>
131403            </field>
131404            <field>
131405              <name>R3T3</name>
131406              <description>Read receive data buffer 3 or write transmit data buffer 3.</description>
131407              <bitOffset>3</bitOffset>
131408              <bitWidth>1</bitWidth>
131409              <access>read-write</access>
131410            </field>
131411            <field>
131412              <name>R4T4</name>
131413              <description>Read receive data buffer 4 or write transmit data buffer 4.</description>
131414              <bitOffset>4</bitOffset>
131415              <bitWidth>1</bitWidth>
131416              <access>read-write</access>
131417            </field>
131418            <field>
131419              <name>R5T5</name>
131420              <description>Read receive data buffer 5 or write transmit data buffer 5.</description>
131421              <bitOffset>5</bitOffset>
131422              <bitWidth>1</bitWidth>
131423              <access>read-write</access>
131424            </field>
131425            <field>
131426              <name>R6T6</name>
131427              <description>Read receive data buffer 6 or write transmit data buffer 6.</description>
131428              <bitOffset>6</bitOffset>
131429              <bitWidth>1</bitWidth>
131430              <access>read-write</access>
131431            </field>
131432            <field>
131433              <name>R7T7</name>
131434              <description>Read receive data buffer 7 or write transmit data buffer 7.</description>
131435              <bitOffset>7</bitOffset>
131436              <bitWidth>1</bitWidth>
131437              <access>read-write</access>
131438            </field>
131439            <field>
131440              <name>R8T8</name>
131441              <description>Read receive data buffer 8 or write transmit data buffer 8.</description>
131442              <bitOffset>8</bitOffset>
131443              <bitWidth>1</bitWidth>
131444              <access>read-write</access>
131445            </field>
131446            <field>
131447              <name>R9T9</name>
131448              <description>Read receive data buffer 9 or write transmit data buffer 9.</description>
131449              <bitOffset>9</bitOffset>
131450              <bitWidth>1</bitWidth>
131451              <access>read-write</access>
131452            </field>
131453            <field>
131454              <name>IDLINE</name>
131455              <description>Idle Line</description>
131456              <bitOffset>11</bitOffset>
131457              <bitWidth>1</bitWidth>
131458              <access>read-only</access>
131459              <enumeratedValues>
131460                <enumeratedValue>
131461                  <name>0</name>
131462                  <description>Receiver was not idle before receiving this character.</description>
131463                  <value>#0</value>
131464                </enumeratedValue>
131465                <enumeratedValue>
131466                  <name>1</name>
131467                  <description>Receiver was idle before receiving this character.</description>
131468                  <value>#1</value>
131469                </enumeratedValue>
131470              </enumeratedValues>
131471            </field>
131472            <field>
131473              <name>RXEMPT</name>
131474              <description>Receive Buffer Empty</description>
131475              <bitOffset>12</bitOffset>
131476              <bitWidth>1</bitWidth>
131477              <access>read-only</access>
131478              <enumeratedValues>
131479                <enumeratedValue>
131480                  <name>0</name>
131481                  <description>Receive buffer contains valid data.</description>
131482                  <value>#0</value>
131483                </enumeratedValue>
131484                <enumeratedValue>
131485                  <name>1</name>
131486                  <description>Receive buffer is empty, data returned on read is not valid.</description>
131487                  <value>#1</value>
131488                </enumeratedValue>
131489              </enumeratedValues>
131490            </field>
131491            <field>
131492              <name>FRETSC</name>
131493              <description>Frame Error / Transmit Special Character</description>
131494              <bitOffset>13</bitOffset>
131495              <bitWidth>1</bitWidth>
131496              <access>read-write</access>
131497              <enumeratedValues>
131498                <enumeratedValue>
131499                  <name>0</name>
131500                  <description>The dataword was received without a frame error on read, transmit a normal character on write.</description>
131501                  <value>#0</value>
131502                </enumeratedValue>
131503                <enumeratedValue>
131504                  <name>1</name>
131505                  <description>The dataword was received with a frame error, transmit an idle or break character on transmit.</description>
131506                  <value>#1</value>
131507                </enumeratedValue>
131508              </enumeratedValues>
131509            </field>
131510            <field>
131511              <name>PARITYE</name>
131512              <description>The current received dataword contained in DATA[R9:R0] was received with a parity error.</description>
131513              <bitOffset>14</bitOffset>
131514              <bitWidth>1</bitWidth>
131515              <access>read-only</access>
131516              <enumeratedValues>
131517                <enumeratedValue>
131518                  <name>0</name>
131519                  <description>The dataword was received without a parity error.</description>
131520                  <value>#0</value>
131521                </enumeratedValue>
131522                <enumeratedValue>
131523                  <name>1</name>
131524                  <description>The dataword was received with a parity error.</description>
131525                  <value>#1</value>
131526                </enumeratedValue>
131527              </enumeratedValues>
131528            </field>
131529            <field>
131530              <name>NOISY</name>
131531              <description>The current received dataword contained in DATA[R9:R0] was received with noise.</description>
131532              <bitOffset>15</bitOffset>
131533              <bitWidth>1</bitWidth>
131534              <access>read-only</access>
131535              <enumeratedValues>
131536                <enumeratedValue>
131537                  <name>0</name>
131538                  <description>The dataword was received without noise.</description>
131539                  <value>#0</value>
131540                </enumeratedValue>
131541                <enumeratedValue>
131542                  <name>1</name>
131543                  <description>The data was received with noise.</description>
131544                  <value>#1</value>
131545                </enumeratedValue>
131546              </enumeratedValues>
131547            </field>
131548          </fields>
131549        </register>
131550        <register>
131551          <name>MATCH</name>
131552          <description>LPUART Match Address Register</description>
131553          <addressOffset>0x10</addressOffset>
131554          <size>32</size>
131555          <access>read-write</access>
131556          <resetValue>0</resetValue>
131557          <resetMask>0xFFFFFFFF</resetMask>
131558          <fields>
131559            <field>
131560              <name>MA1</name>
131561              <description>Match Address 1</description>
131562              <bitOffset>0</bitOffset>
131563              <bitWidth>10</bitWidth>
131564              <access>read-write</access>
131565            </field>
131566            <field>
131567              <name>MA2</name>
131568              <description>Match Address 2</description>
131569              <bitOffset>16</bitOffset>
131570              <bitWidth>10</bitWidth>
131571              <access>read-write</access>
131572            </field>
131573          </fields>
131574        </register>
131575        <register>
131576          <name>MODIR</name>
131577          <description>LPUART Modem IrDA Register</description>
131578          <addressOffset>0x14</addressOffset>
131579          <size>32</size>
131580          <access>read-write</access>
131581          <resetValue>0</resetValue>
131582          <resetMask>0xFFFFFFFF</resetMask>
131583          <fields>
131584            <field>
131585              <name>TXCTSE</name>
131586              <description>Transmitter clear-to-send enable</description>
131587              <bitOffset>0</bitOffset>
131588              <bitWidth>1</bitWidth>
131589              <access>read-write</access>
131590              <enumeratedValues>
131591                <enumeratedValue>
131592                  <name>0</name>
131593                  <description>CTS has no effect on the transmitter.</description>
131594                  <value>#0</value>
131595                </enumeratedValue>
131596                <enumeratedValue>
131597                  <name>1</name>
131598                  <description>Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission.</description>
131599                  <value>#1</value>
131600                </enumeratedValue>
131601              </enumeratedValues>
131602            </field>
131603            <field>
131604              <name>TXRTSE</name>
131605              <description>Transmitter request-to-send enable</description>
131606              <bitOffset>1</bitOffset>
131607              <bitWidth>1</bitWidth>
131608              <access>read-write</access>
131609              <enumeratedValues>
131610                <enumeratedValue>
131611                  <name>0</name>
131612                  <description>The transmitter has no effect on RTS.</description>
131613                  <value>#0</value>
131614                </enumeratedValue>
131615                <enumeratedValue>
131616                  <name>1</name>
131617                  <description>When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit.</description>
131618                  <value>#1</value>
131619                </enumeratedValue>
131620              </enumeratedValues>
131621            </field>
131622            <field>
131623              <name>TXRTSPOL</name>
131624              <description>Transmitter request-to-send polarity</description>
131625              <bitOffset>2</bitOffset>
131626              <bitWidth>1</bitWidth>
131627              <access>read-write</access>
131628              <enumeratedValues>
131629                <enumeratedValue>
131630                  <name>0</name>
131631                  <description>Transmitter RTS is active low.</description>
131632                  <value>#0</value>
131633                </enumeratedValue>
131634                <enumeratedValue>
131635                  <name>1</name>
131636                  <description>Transmitter RTS is active high.</description>
131637                  <value>#1</value>
131638                </enumeratedValue>
131639              </enumeratedValues>
131640            </field>
131641            <field>
131642              <name>RXRTSE</name>
131643              <description>Receiver request-to-send enable</description>
131644              <bitOffset>3</bitOffset>
131645              <bitWidth>1</bitWidth>
131646              <access>read-write</access>
131647              <enumeratedValues>
131648                <enumeratedValue>
131649                  <name>0</name>
131650                  <description>The receiver has no effect on RTS.</description>
131651                  <value>#0</value>
131652                </enumeratedValue>
131653                <enumeratedValue>
131654                  <name>1</name>
131655                  <description>RTS is deasserted if the receiver data register is full or a start bit has been detected that would cause the receiver data register to become full. RTS is asserted if the receiver data register is not full and has not detected a start bit that would cause the receiver data register to become full.</description>
131656                  <value>#1</value>
131657                </enumeratedValue>
131658              </enumeratedValues>
131659            </field>
131660            <field>
131661              <name>TXCTSC</name>
131662              <description>Transmit CTS Configuration</description>
131663              <bitOffset>4</bitOffset>
131664              <bitWidth>1</bitWidth>
131665              <access>read-write</access>
131666              <enumeratedValues>
131667                <enumeratedValue>
131668                  <name>0</name>
131669                  <description>CTS input is sampled at the start of each character.</description>
131670                  <value>#0</value>
131671                </enumeratedValue>
131672                <enumeratedValue>
131673                  <name>1</name>
131674                  <description>CTS input is sampled when the transmitter is idle.</description>
131675                  <value>#1</value>
131676                </enumeratedValue>
131677              </enumeratedValues>
131678            </field>
131679            <field>
131680              <name>TXCTSSRC</name>
131681              <description>Transmit CTS Source</description>
131682              <bitOffset>5</bitOffset>
131683              <bitWidth>1</bitWidth>
131684              <access>read-write</access>
131685              <enumeratedValues>
131686                <enumeratedValue>
131687                  <name>0</name>
131688                  <description>CTS input is the LPUART_CTS pin.</description>
131689                  <value>#0</value>
131690                </enumeratedValue>
131691                <enumeratedValue>
131692                  <name>1</name>
131693                  <description>CTS input is the inverted Receiver Match result.</description>
131694                  <value>#1</value>
131695                </enumeratedValue>
131696              </enumeratedValues>
131697            </field>
131698            <field>
131699              <name>RTSWATER</name>
131700              <description>Receive RTS Configuration</description>
131701              <bitOffset>8</bitOffset>
131702              <bitWidth>8</bitWidth>
131703              <access>read-write</access>
131704              <enumeratedValues>
131705                <enumeratedValue>
131706                  <name>0</name>
131707                  <description>RTS asserts when the receiver FIFO is full or receiving a character that causes the FIFO to become full.</description>
131708                  <value>#0</value>
131709                </enumeratedValue>
131710                <enumeratedValue>
131711                  <name>1</name>
131712                  <description>RTS asserts when the receive FIFO is less than or equal to the RXWATER configuration and negates when the receive FIFO is greater than the RXWATER configuration.</description>
131713                  <value>#1</value>
131714                </enumeratedValue>
131715              </enumeratedValues>
131716            </field>
131717            <field>
131718              <name>TNP</name>
131719              <description>Transmitter narrow pulse</description>
131720              <bitOffset>16</bitOffset>
131721              <bitWidth>2</bitWidth>
131722              <access>read-write</access>
131723              <enumeratedValues>
131724                <enumeratedValue>
131725                  <name>00</name>
131726                  <description>1/OSR.</description>
131727                  <value>#00</value>
131728                </enumeratedValue>
131729                <enumeratedValue>
131730                  <name>01</name>
131731                  <description>2/OSR.</description>
131732                  <value>#01</value>
131733                </enumeratedValue>
131734                <enumeratedValue>
131735                  <name>10</name>
131736                  <description>3/OSR.</description>
131737                  <value>#10</value>
131738                </enumeratedValue>
131739                <enumeratedValue>
131740                  <name>11</name>
131741                  <description>4/OSR.</description>
131742                  <value>#11</value>
131743                </enumeratedValue>
131744              </enumeratedValues>
131745            </field>
131746            <field>
131747              <name>IREN</name>
131748              <description>Infrared enable</description>
131749              <bitOffset>18</bitOffset>
131750              <bitWidth>1</bitWidth>
131751              <access>read-write</access>
131752              <enumeratedValues>
131753                <enumeratedValue>
131754                  <name>0</name>
131755                  <description>IR disabled.</description>
131756                  <value>#0</value>
131757                </enumeratedValue>
131758                <enumeratedValue>
131759                  <name>1</name>
131760                  <description>IR enabled.</description>
131761                  <value>#1</value>
131762                </enumeratedValue>
131763              </enumeratedValues>
131764            </field>
131765          </fields>
131766        </register>
131767        <register>
131768          <name>FIFO</name>
131769          <description>LPUART FIFO Register</description>
131770          <addressOffset>0x18</addressOffset>
131771          <size>32</size>
131772          <access>read-write</access>
131773          <resetValue>0x22</resetValue>
131774          <resetMask>0xFFFFFFFF</resetMask>
131775          <fields>
131776            <field>
131777              <name>RXFIFOSIZE</name>
131778              <description>Receive FIFO. Buffer Depth</description>
131779              <bitOffset>0</bitOffset>
131780              <bitWidth>3</bitWidth>
131781              <access>read-only</access>
131782              <enumeratedValues>
131783                <enumeratedValue>
131784                  <name>000</name>
131785                  <description>Receive FIFO/Buffer depth = 1 dataword.</description>
131786                  <value>#000</value>
131787                </enumeratedValue>
131788                <enumeratedValue>
131789                  <name>001</name>
131790                  <description>Receive FIFO/Buffer depth = 4 datawords.</description>
131791                  <value>#001</value>
131792                </enumeratedValue>
131793                <enumeratedValue>
131794                  <name>010</name>
131795                  <description>Receive FIFO/Buffer depth = 8 datawords.</description>
131796                  <value>#010</value>
131797                </enumeratedValue>
131798                <enumeratedValue>
131799                  <name>011</name>
131800                  <description>Receive FIFO/Buffer depth = 16 datawords.</description>
131801                  <value>#011</value>
131802                </enumeratedValue>
131803                <enumeratedValue>
131804                  <name>100</name>
131805                  <description>Receive FIFO/Buffer depth = 32 datawords.</description>
131806                  <value>#100</value>
131807                </enumeratedValue>
131808                <enumeratedValue>
131809                  <name>101</name>
131810                  <description>Receive FIFO/Buffer depth = 64 datawords.</description>
131811                  <value>#101</value>
131812                </enumeratedValue>
131813                <enumeratedValue>
131814                  <name>110</name>
131815                  <description>Receive FIFO/Buffer depth = 128 datawords.</description>
131816                  <value>#110</value>
131817                </enumeratedValue>
131818                <enumeratedValue>
131819                  <name>111</name>
131820                  <description>Receive FIFO/Buffer depth = 256 datawords.</description>
131821                  <value>#111</value>
131822                </enumeratedValue>
131823              </enumeratedValues>
131824            </field>
131825            <field>
131826              <name>RXFE</name>
131827              <description>Receive FIFO Enable</description>
131828              <bitOffset>3</bitOffset>
131829              <bitWidth>1</bitWidth>
131830              <access>read-write</access>
131831              <enumeratedValues>
131832                <enumeratedValue>
131833                  <name>0</name>
131834                  <description>Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)</description>
131835                  <value>#0</value>
131836                </enumeratedValue>
131837                <enumeratedValue>
131838                  <name>1</name>
131839                  <description>Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE.</description>
131840                  <value>#1</value>
131841                </enumeratedValue>
131842              </enumeratedValues>
131843            </field>
131844            <field>
131845              <name>TXFIFOSIZE</name>
131846              <description>Transmit FIFO. Buffer Depth</description>
131847              <bitOffset>4</bitOffset>
131848              <bitWidth>3</bitWidth>
131849              <access>read-only</access>
131850              <enumeratedValues>
131851                <enumeratedValue>
131852                  <name>000</name>
131853                  <description>Transmit FIFO/Buffer depth = 1 dataword.</description>
131854                  <value>#000</value>
131855                </enumeratedValue>
131856                <enumeratedValue>
131857                  <name>001</name>
131858                  <description>Transmit FIFO/Buffer depth = 4 datawords.</description>
131859                  <value>#001</value>
131860                </enumeratedValue>
131861                <enumeratedValue>
131862                  <name>010</name>
131863                  <description>Transmit FIFO/Buffer depth = 8 datawords.</description>
131864                  <value>#010</value>
131865                </enumeratedValue>
131866                <enumeratedValue>
131867                  <name>011</name>
131868                  <description>Transmit FIFO/Buffer depth = 16 datawords.</description>
131869                  <value>#011</value>
131870                </enumeratedValue>
131871                <enumeratedValue>
131872                  <name>100</name>
131873                  <description>Transmit FIFO/Buffer depth = 32 datawords.</description>
131874                  <value>#100</value>
131875                </enumeratedValue>
131876                <enumeratedValue>
131877                  <name>101</name>
131878                  <description>Transmit FIFO/Buffer depth = 64 datawords.</description>
131879                  <value>#101</value>
131880                </enumeratedValue>
131881                <enumeratedValue>
131882                  <name>110</name>
131883                  <description>Transmit FIFO/Buffer depth = 128 datawords.</description>
131884                  <value>#110</value>
131885                </enumeratedValue>
131886                <enumeratedValue>
131887                  <name>111</name>
131888                  <description>Transmit FIFO/Buffer depth = 256 datawords</description>
131889                  <value>#111</value>
131890                </enumeratedValue>
131891              </enumeratedValues>
131892            </field>
131893            <field>
131894              <name>TXFE</name>
131895              <description>Transmit FIFO Enable</description>
131896              <bitOffset>7</bitOffset>
131897              <bitWidth>1</bitWidth>
131898              <access>read-write</access>
131899              <enumeratedValues>
131900                <enumeratedValue>
131901                  <name>0</name>
131902                  <description>Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support).</description>
131903                  <value>#0</value>
131904                </enumeratedValue>
131905                <enumeratedValue>
131906                  <name>1</name>
131907                  <description>Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.</description>
131908                  <value>#1</value>
131909                </enumeratedValue>
131910              </enumeratedValues>
131911            </field>
131912            <field>
131913              <name>RXUFE</name>
131914              <description>Receive FIFO Underflow Interrupt Enable</description>
131915              <bitOffset>8</bitOffset>
131916              <bitWidth>1</bitWidth>
131917              <access>read-write</access>
131918              <enumeratedValues>
131919                <enumeratedValue>
131920                  <name>0</name>
131921                  <description>RXUF flag does not generate an interrupt to the host.</description>
131922                  <value>#0</value>
131923                </enumeratedValue>
131924                <enumeratedValue>
131925                  <name>1</name>
131926                  <description>RXUF flag generates an interrupt to the host.</description>
131927                  <value>#1</value>
131928                </enumeratedValue>
131929              </enumeratedValues>
131930            </field>
131931            <field>
131932              <name>TXOFE</name>
131933              <description>Transmit FIFO Overflow Interrupt Enable</description>
131934              <bitOffset>9</bitOffset>
131935              <bitWidth>1</bitWidth>
131936              <access>read-write</access>
131937              <enumeratedValues>
131938                <enumeratedValue>
131939                  <name>0</name>
131940                  <description>TXOF flag does not generate an interrupt to the host.</description>
131941                  <value>#0</value>
131942                </enumeratedValue>
131943                <enumeratedValue>
131944                  <name>1</name>
131945                  <description>TXOF flag generates an interrupt to the host.</description>
131946                  <value>#1</value>
131947                </enumeratedValue>
131948              </enumeratedValues>
131949            </field>
131950            <field>
131951              <name>RXIDEN</name>
131952              <description>Receiver Idle Empty Enable</description>
131953              <bitOffset>10</bitOffset>
131954              <bitWidth>3</bitWidth>
131955              <access>read-write</access>
131956              <enumeratedValues>
131957                <enumeratedValue>
131958                  <name>000</name>
131959                  <description>Disable RDRF assertion due to partially filled FIFO when receiver is idle.</description>
131960                  <value>#000</value>
131961                </enumeratedValue>
131962                <enumeratedValue>
131963                  <name>001</name>
131964                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character.</description>
131965                  <value>#001</value>
131966                </enumeratedValue>
131967                <enumeratedValue>
131968                  <name>010</name>
131969                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters.</description>
131970                  <value>#010</value>
131971                </enumeratedValue>
131972                <enumeratedValue>
131973                  <name>011</name>
131974                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters.</description>
131975                  <value>#011</value>
131976                </enumeratedValue>
131977                <enumeratedValue>
131978                  <name>100</name>
131979                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters.</description>
131980                  <value>#100</value>
131981                </enumeratedValue>
131982                <enumeratedValue>
131983                  <name>101</name>
131984                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters.</description>
131985                  <value>#101</value>
131986                </enumeratedValue>
131987                <enumeratedValue>
131988                  <name>110</name>
131989                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters.</description>
131990                  <value>#110</value>
131991                </enumeratedValue>
131992                <enumeratedValue>
131993                  <name>111</name>
131994                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters.</description>
131995                  <value>#111</value>
131996                </enumeratedValue>
131997              </enumeratedValues>
131998            </field>
131999            <field>
132000              <name>RXFLUSH</name>
132001              <description>Receive FIFO/Buffer Flush</description>
132002              <bitOffset>14</bitOffset>
132003              <bitWidth>1</bitWidth>
132004              <access>write-only</access>
132005              <enumeratedValues>
132006                <enumeratedValue>
132007                  <name>0</name>
132008                  <description>No flush operation occurs.</description>
132009                  <value>#0</value>
132010                </enumeratedValue>
132011                <enumeratedValue>
132012                  <name>1</name>
132013                  <description>All data in the receive FIFO/buffer is cleared out.</description>
132014                  <value>#1</value>
132015                </enumeratedValue>
132016              </enumeratedValues>
132017            </field>
132018            <field>
132019              <name>TXFLUSH</name>
132020              <description>Transmit FIFO/Buffer Flush</description>
132021              <bitOffset>15</bitOffset>
132022              <bitWidth>1</bitWidth>
132023              <access>write-only</access>
132024              <enumeratedValues>
132025                <enumeratedValue>
132026                  <name>0</name>
132027                  <description>No flush operation occurs.</description>
132028                  <value>#0</value>
132029                </enumeratedValue>
132030                <enumeratedValue>
132031                  <name>1</name>
132032                  <description>All data in the transmit FIFO/Buffer is cleared out.</description>
132033                  <value>#1</value>
132034                </enumeratedValue>
132035              </enumeratedValues>
132036            </field>
132037            <field>
132038              <name>RXUF</name>
132039              <description>Receiver Buffer Underflow Flag</description>
132040              <bitOffset>16</bitOffset>
132041              <bitWidth>1</bitWidth>
132042              <access>read-write</access>
132043              <enumeratedValues>
132044                <enumeratedValue>
132045                  <name>0</name>
132046                  <description>No receive buffer underflow has occurred since the last time the flag was cleared.</description>
132047                  <value>#0</value>
132048                </enumeratedValue>
132049                <enumeratedValue>
132050                  <name>1</name>
132051                  <description>At least one receive buffer underflow has occurred since the last time the flag was cleared.</description>
132052                  <value>#1</value>
132053                </enumeratedValue>
132054              </enumeratedValues>
132055            </field>
132056            <field>
132057              <name>TXOF</name>
132058              <description>Transmitter Buffer Overflow Flag</description>
132059              <bitOffset>17</bitOffset>
132060              <bitWidth>1</bitWidth>
132061              <access>read-write</access>
132062              <enumeratedValues>
132063                <enumeratedValue>
132064                  <name>0</name>
132065                  <description>No transmit buffer overflow has occurred since the last time the flag was cleared.</description>
132066                  <value>#0</value>
132067                </enumeratedValue>
132068                <enumeratedValue>
132069                  <name>1</name>
132070                  <description>At least one transmit buffer overflow has occurred since the last time the flag was cleared.</description>
132071                  <value>#1</value>
132072                </enumeratedValue>
132073              </enumeratedValues>
132074            </field>
132075            <field>
132076              <name>RXEMPT</name>
132077              <description>Receive Buffer/FIFO Empty</description>
132078              <bitOffset>22</bitOffset>
132079              <bitWidth>1</bitWidth>
132080              <access>read-only</access>
132081              <enumeratedValues>
132082                <enumeratedValue>
132083                  <name>0</name>
132084                  <description>Receive buffer is not empty.</description>
132085                  <value>#0</value>
132086                </enumeratedValue>
132087                <enumeratedValue>
132088                  <name>1</name>
132089                  <description>Receive buffer is empty.</description>
132090                  <value>#1</value>
132091                </enumeratedValue>
132092              </enumeratedValues>
132093            </field>
132094            <field>
132095              <name>TXEMPT</name>
132096              <description>Transmit Buffer/FIFO Empty</description>
132097              <bitOffset>23</bitOffset>
132098              <bitWidth>1</bitWidth>
132099              <access>read-only</access>
132100              <enumeratedValues>
132101                <enumeratedValue>
132102                  <name>0</name>
132103                  <description>Transmit buffer is not empty.</description>
132104                  <value>#0</value>
132105                </enumeratedValue>
132106                <enumeratedValue>
132107                  <name>1</name>
132108                  <description>Transmit buffer is empty.</description>
132109                  <value>#1</value>
132110                </enumeratedValue>
132111              </enumeratedValues>
132112            </field>
132113          </fields>
132114        </register>
132115        <register>
132116          <name>WATER</name>
132117          <description>LPUART Watermark Register</description>
132118          <addressOffset>0x1C</addressOffset>
132119          <size>32</size>
132120          <access>read-write</access>
132121          <resetValue>0</resetValue>
132122          <resetMask>0xFFFFFFFF</resetMask>
132123          <fields>
132124            <field>
132125              <name>TXWATER</name>
132126              <description>Transmit Watermark</description>
132127              <bitOffset>0</bitOffset>
132128              <bitWidth>8</bitWidth>
132129              <access>read-write</access>
132130            </field>
132131            <field>
132132              <name>TXCOUNT</name>
132133              <description>Transmit Counter</description>
132134              <bitOffset>8</bitOffset>
132135              <bitWidth>8</bitWidth>
132136              <access>read-only</access>
132137            </field>
132138            <field>
132139              <name>RXWATER</name>
132140              <description>Receive Watermark</description>
132141              <bitOffset>16</bitOffset>
132142              <bitWidth>8</bitWidth>
132143              <access>read-write</access>
132144            </field>
132145            <field>
132146              <name>RXCOUNT</name>
132147              <description>Receive Counter</description>
132148              <bitOffset>24</bitOffset>
132149              <bitWidth>8</bitWidth>
132150              <access>read-only</access>
132151            </field>
132152          </fields>
132153        </register>
132154      </registers>
132155    </peripheral>
132156    <peripheral>
132157      <name>LPUART4</name>
132158      <description>Universal Asynchronous Receiver/Transmitter</description>
132159      <groupName>LPUART</groupName>
132160      <prependToName>LPUART4_</prependToName>
132161      <baseAddress>0x400D6000</baseAddress>
132162      <addressBlock>
132163        <offset>0</offset>
132164        <size>0x20</size>
132165        <usage>registers</usage>
132166      </addressBlock>
132167      <interrupt>
132168        <name>LPUART4</name>
132169        <value>34</value>
132170      </interrupt>
132171      <registers>
132172        <register>
132173          <name>BAUD</name>
132174          <description>LPUART Baud Rate Register</description>
132175          <addressOffset>0</addressOffset>
132176          <size>32</size>
132177          <access>read-write</access>
132178          <resetValue>0xF000004</resetValue>
132179          <resetMask>0xFFFFFFFF</resetMask>
132180          <fields>
132181            <field>
132182              <name>SBR</name>
132183              <description>Baud Rate Modulo Divisor.</description>
132184              <bitOffset>0</bitOffset>
132185              <bitWidth>13</bitWidth>
132186              <access>read-write</access>
132187            </field>
132188            <field>
132189              <name>SBNS</name>
132190              <description>Stop Bit Number Select</description>
132191              <bitOffset>13</bitOffset>
132192              <bitWidth>1</bitWidth>
132193              <access>read-write</access>
132194              <enumeratedValues>
132195                <enumeratedValue>
132196                  <name>0</name>
132197                  <description>One stop bit.</description>
132198                  <value>#0</value>
132199                </enumeratedValue>
132200                <enumeratedValue>
132201                  <name>1</name>
132202                  <description>Two stop bits.</description>
132203                  <value>#1</value>
132204                </enumeratedValue>
132205              </enumeratedValues>
132206            </field>
132207            <field>
132208              <name>RXEDGIE</name>
132209              <description>RX Input Active Edge Interrupt Enable</description>
132210              <bitOffset>14</bitOffset>
132211              <bitWidth>1</bitWidth>
132212              <access>read-write</access>
132213              <enumeratedValues>
132214                <enumeratedValue>
132215                  <name>0</name>
132216                  <description>Hardware interrupts from LPUART_STAT[RXEDGIF] disabled (use polling).</description>
132217                  <value>#0</value>
132218                </enumeratedValue>
132219                <enumeratedValue>
132220                  <name>1</name>
132221                  <description>Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1.</description>
132222                  <value>#1</value>
132223                </enumeratedValue>
132224              </enumeratedValues>
132225            </field>
132226            <field>
132227              <name>LBKDIE</name>
132228              <description>LIN Break Detect Interrupt Enable</description>
132229              <bitOffset>15</bitOffset>
132230              <bitWidth>1</bitWidth>
132231              <access>read-write</access>
132232              <enumeratedValues>
132233                <enumeratedValue>
132234                  <name>0</name>
132235                  <description>Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling).</description>
132236                  <value>#0</value>
132237                </enumeratedValue>
132238                <enumeratedValue>
132239                  <name>1</name>
132240                  <description>Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1.</description>
132241                  <value>#1</value>
132242                </enumeratedValue>
132243              </enumeratedValues>
132244            </field>
132245            <field>
132246              <name>RESYNCDIS</name>
132247              <description>Resynchronization Disable</description>
132248              <bitOffset>16</bitOffset>
132249              <bitWidth>1</bitWidth>
132250              <access>read-write</access>
132251              <enumeratedValues>
132252                <enumeratedValue>
132253                  <name>0</name>
132254                  <description>Resynchronization during received data word is supported</description>
132255                  <value>#0</value>
132256                </enumeratedValue>
132257                <enumeratedValue>
132258                  <name>1</name>
132259                  <description>Resynchronization during received data word is disabled</description>
132260                  <value>#1</value>
132261                </enumeratedValue>
132262              </enumeratedValues>
132263            </field>
132264            <field>
132265              <name>BOTHEDGE</name>
132266              <description>Both Edge Sampling</description>
132267              <bitOffset>17</bitOffset>
132268              <bitWidth>1</bitWidth>
132269              <access>read-write</access>
132270              <enumeratedValues>
132271                <enumeratedValue>
132272                  <name>0</name>
132273                  <description>Receiver samples input data using the rising edge of the baud rate clock.</description>
132274                  <value>#0</value>
132275                </enumeratedValue>
132276                <enumeratedValue>
132277                  <name>1</name>
132278                  <description>Receiver samples input data using the rising and falling edge of the baud rate clock.</description>
132279                  <value>#1</value>
132280                </enumeratedValue>
132281              </enumeratedValues>
132282            </field>
132283            <field>
132284              <name>MATCFG</name>
132285              <description>Match Configuration</description>
132286              <bitOffset>18</bitOffset>
132287              <bitWidth>2</bitWidth>
132288              <access>read-write</access>
132289              <enumeratedValues>
132290                <enumeratedValue>
132291                  <name>00</name>
132292                  <description>Address Match Wakeup</description>
132293                  <value>#00</value>
132294                </enumeratedValue>
132295                <enumeratedValue>
132296                  <name>01</name>
132297                  <description>Idle Match Wakeup</description>
132298                  <value>#01</value>
132299                </enumeratedValue>
132300                <enumeratedValue>
132301                  <name>10</name>
132302                  <description>Match On and Match Off</description>
132303                  <value>#10</value>
132304                </enumeratedValue>
132305                <enumeratedValue>
132306                  <name>11</name>
132307                  <description>Enables RWU on Data Match and Match On/Off for transmitter CTS input</description>
132308                  <value>#11</value>
132309                </enumeratedValue>
132310              </enumeratedValues>
132311            </field>
132312            <field>
132313              <name>RDMAE</name>
132314              <description>Receiver Full DMA Enable</description>
132315              <bitOffset>21</bitOffset>
132316              <bitWidth>1</bitWidth>
132317              <access>read-write</access>
132318              <enumeratedValues>
132319                <enumeratedValue>
132320                  <name>0</name>
132321                  <description>DMA request disabled.</description>
132322                  <value>#0</value>
132323                </enumeratedValue>
132324                <enumeratedValue>
132325                  <name>1</name>
132326                  <description>DMA request enabled.</description>
132327                  <value>#1</value>
132328                </enumeratedValue>
132329              </enumeratedValues>
132330            </field>
132331            <field>
132332              <name>TDMAE</name>
132333              <description>Transmitter DMA Enable</description>
132334              <bitOffset>23</bitOffset>
132335              <bitWidth>1</bitWidth>
132336              <access>read-write</access>
132337              <enumeratedValues>
132338                <enumeratedValue>
132339                  <name>0</name>
132340                  <description>DMA request disabled.</description>
132341                  <value>#0</value>
132342                </enumeratedValue>
132343                <enumeratedValue>
132344                  <name>1</name>
132345                  <description>DMA request enabled.</description>
132346                  <value>#1</value>
132347                </enumeratedValue>
132348              </enumeratedValues>
132349            </field>
132350            <field>
132351              <name>OSR</name>
132352              <description>Over Sampling Ratio</description>
132353              <bitOffset>24</bitOffset>
132354              <bitWidth>5</bitWidth>
132355              <access>read-write</access>
132356            </field>
132357            <field>
132358              <name>M10</name>
132359              <description>10-bit Mode select</description>
132360              <bitOffset>29</bitOffset>
132361              <bitWidth>1</bitWidth>
132362              <access>read-write</access>
132363              <enumeratedValues>
132364                <enumeratedValue>
132365                  <name>0</name>
132366                  <description>Receiver and transmitter use 8-bit or 9-bit data characters.</description>
132367                  <value>#0</value>
132368                </enumeratedValue>
132369                <enumeratedValue>
132370                  <name>1</name>
132371                  <description>Receiver and transmitter use 10-bit data characters.</description>
132372                  <value>#1</value>
132373                </enumeratedValue>
132374              </enumeratedValues>
132375            </field>
132376            <field>
132377              <name>MAEN2</name>
132378              <description>Match Address Mode Enable 2</description>
132379              <bitOffset>30</bitOffset>
132380              <bitWidth>1</bitWidth>
132381              <access>read-write</access>
132382              <enumeratedValues>
132383                <enumeratedValue>
132384                  <name>0</name>
132385                  <description>Normal operation.</description>
132386                  <value>#0</value>
132387                </enumeratedValue>
132388                <enumeratedValue>
132389                  <name>1</name>
132390                  <description>Enables automatic address matching or data matching mode for MATCH[MA2].</description>
132391                  <value>#1</value>
132392                </enumeratedValue>
132393              </enumeratedValues>
132394            </field>
132395            <field>
132396              <name>MAEN1</name>
132397              <description>Match Address Mode Enable 1</description>
132398              <bitOffset>31</bitOffset>
132399              <bitWidth>1</bitWidth>
132400              <access>read-write</access>
132401              <enumeratedValues>
132402                <enumeratedValue>
132403                  <name>0</name>
132404                  <description>Normal operation.</description>
132405                  <value>#0</value>
132406                </enumeratedValue>
132407                <enumeratedValue>
132408                  <name>1</name>
132409                  <description>Enables automatic address matching or data matching mode for MATCH[MA1].</description>
132410                  <value>#1</value>
132411                </enumeratedValue>
132412              </enumeratedValues>
132413            </field>
132414          </fields>
132415        </register>
132416        <register>
132417          <name>STAT</name>
132418          <description>LPUART Status Register</description>
132419          <addressOffset>0x4</addressOffset>
132420          <size>32</size>
132421          <access>read-write</access>
132422          <resetValue>0xC00000</resetValue>
132423          <resetMask>0xFFFFFFFF</resetMask>
132424          <fields>
132425            <field>
132426              <name>MA2F</name>
132427              <description>Match 2 Flag</description>
132428              <bitOffset>14</bitOffset>
132429              <bitWidth>1</bitWidth>
132430              <access>read-write</access>
132431              <enumeratedValues>
132432                <enumeratedValue>
132433                  <name>0</name>
132434                  <description>Received data is not equal to MA2</description>
132435                  <value>#0</value>
132436                </enumeratedValue>
132437                <enumeratedValue>
132438                  <name>1</name>
132439                  <description>Received data is equal to MA2</description>
132440                  <value>#1</value>
132441                </enumeratedValue>
132442              </enumeratedValues>
132443            </field>
132444            <field>
132445              <name>MA1F</name>
132446              <description>Match 1 Flag</description>
132447              <bitOffset>15</bitOffset>
132448              <bitWidth>1</bitWidth>
132449              <access>read-write</access>
132450              <enumeratedValues>
132451                <enumeratedValue>
132452                  <name>0</name>
132453                  <description>Received data is not equal to MA1</description>
132454                  <value>#0</value>
132455                </enumeratedValue>
132456                <enumeratedValue>
132457                  <name>1</name>
132458                  <description>Received data is equal to MA1</description>
132459                  <value>#1</value>
132460                </enumeratedValue>
132461              </enumeratedValues>
132462            </field>
132463            <field>
132464              <name>PF</name>
132465              <description>Parity Error Flag</description>
132466              <bitOffset>16</bitOffset>
132467              <bitWidth>1</bitWidth>
132468              <access>read-write</access>
132469              <enumeratedValues>
132470                <enumeratedValue>
132471                  <name>0</name>
132472                  <description>No parity error.</description>
132473                  <value>#0</value>
132474                </enumeratedValue>
132475                <enumeratedValue>
132476                  <name>1</name>
132477                  <description>Parity error.</description>
132478                  <value>#1</value>
132479                </enumeratedValue>
132480              </enumeratedValues>
132481            </field>
132482            <field>
132483              <name>FE</name>
132484              <description>Framing Error Flag</description>
132485              <bitOffset>17</bitOffset>
132486              <bitWidth>1</bitWidth>
132487              <access>read-write</access>
132488              <enumeratedValues>
132489                <enumeratedValue>
132490                  <name>0</name>
132491                  <description>No framing error detected. This does not guarantee the framing is correct.</description>
132492                  <value>#0</value>
132493                </enumeratedValue>
132494                <enumeratedValue>
132495                  <name>1</name>
132496                  <description>Framing error.</description>
132497                  <value>#1</value>
132498                </enumeratedValue>
132499              </enumeratedValues>
132500            </field>
132501            <field>
132502              <name>NF</name>
132503              <description>Noise Flag</description>
132504              <bitOffset>18</bitOffset>
132505              <bitWidth>1</bitWidth>
132506              <access>read-write</access>
132507              <enumeratedValues>
132508                <enumeratedValue>
132509                  <name>0</name>
132510                  <description>No noise detected.</description>
132511                  <value>#0</value>
132512                </enumeratedValue>
132513                <enumeratedValue>
132514                  <name>1</name>
132515                  <description>Noise detected in the received character in LPUART_DATA.</description>
132516                  <value>#1</value>
132517                </enumeratedValue>
132518              </enumeratedValues>
132519            </field>
132520            <field>
132521              <name>OR</name>
132522              <description>Receiver Overrun Flag</description>
132523              <bitOffset>19</bitOffset>
132524              <bitWidth>1</bitWidth>
132525              <access>read-write</access>
132526              <enumeratedValues>
132527                <enumeratedValue>
132528                  <name>0</name>
132529                  <description>No overrun.</description>
132530                  <value>#0</value>
132531                </enumeratedValue>
132532                <enumeratedValue>
132533                  <name>1</name>
132534                  <description>Receive overrun (new LPUART data lost).</description>
132535                  <value>#1</value>
132536                </enumeratedValue>
132537              </enumeratedValues>
132538            </field>
132539            <field>
132540              <name>IDLE</name>
132541              <description>Idle Line Flag</description>
132542              <bitOffset>20</bitOffset>
132543              <bitWidth>1</bitWidth>
132544              <access>read-write</access>
132545              <enumeratedValues>
132546                <enumeratedValue>
132547                  <name>0</name>
132548                  <description>No idle line detected.</description>
132549                  <value>#0</value>
132550                </enumeratedValue>
132551                <enumeratedValue>
132552                  <name>1</name>
132553                  <description>Idle line was detected.</description>
132554                  <value>#1</value>
132555                </enumeratedValue>
132556              </enumeratedValues>
132557            </field>
132558            <field>
132559              <name>RDRF</name>
132560              <description>Receive Data Register Full Flag</description>
132561              <bitOffset>21</bitOffset>
132562              <bitWidth>1</bitWidth>
132563              <access>read-only</access>
132564              <enumeratedValues>
132565                <enumeratedValue>
132566                  <name>0</name>
132567                  <description>Receive data buffer empty.</description>
132568                  <value>#0</value>
132569                </enumeratedValue>
132570                <enumeratedValue>
132571                  <name>1</name>
132572                  <description>Receive data buffer full.</description>
132573                  <value>#1</value>
132574                </enumeratedValue>
132575              </enumeratedValues>
132576            </field>
132577            <field>
132578              <name>TC</name>
132579              <description>Transmission Complete Flag</description>
132580              <bitOffset>22</bitOffset>
132581              <bitWidth>1</bitWidth>
132582              <access>read-only</access>
132583              <enumeratedValues>
132584                <enumeratedValue>
132585                  <name>0</name>
132586                  <description>Transmitter active (sending data, a preamble, or a break).</description>
132587                  <value>#0</value>
132588                </enumeratedValue>
132589                <enumeratedValue>
132590                  <name>1</name>
132591                  <description>Transmitter idle (transmission activity complete).</description>
132592                  <value>#1</value>
132593                </enumeratedValue>
132594              </enumeratedValues>
132595            </field>
132596            <field>
132597              <name>TDRE</name>
132598              <description>Transmit Data Register Empty Flag</description>
132599              <bitOffset>23</bitOffset>
132600              <bitWidth>1</bitWidth>
132601              <access>read-only</access>
132602              <enumeratedValues>
132603                <enumeratedValue>
132604                  <name>0</name>
132605                  <description>Transmit data buffer full.</description>
132606                  <value>#0</value>
132607                </enumeratedValue>
132608                <enumeratedValue>
132609                  <name>1</name>
132610                  <description>Transmit data buffer empty.</description>
132611                  <value>#1</value>
132612                </enumeratedValue>
132613              </enumeratedValues>
132614            </field>
132615            <field>
132616              <name>RAF</name>
132617              <description>Receiver Active Flag</description>
132618              <bitOffset>24</bitOffset>
132619              <bitWidth>1</bitWidth>
132620              <access>read-only</access>
132621              <enumeratedValues>
132622                <enumeratedValue>
132623                  <name>0</name>
132624                  <description>LPUART receiver idle waiting for a start bit.</description>
132625                  <value>#0</value>
132626                </enumeratedValue>
132627                <enumeratedValue>
132628                  <name>1</name>
132629                  <description>LPUART receiver active (LPUART_RX input not idle).</description>
132630                  <value>#1</value>
132631                </enumeratedValue>
132632              </enumeratedValues>
132633            </field>
132634            <field>
132635              <name>LBKDE</name>
132636              <description>LIN Break Detection Enable</description>
132637              <bitOffset>25</bitOffset>
132638              <bitWidth>1</bitWidth>
132639              <access>read-write</access>
132640              <enumeratedValues>
132641                <enumeratedValue>
132642                  <name>0</name>
132643                  <description>Break character is detected at length 10 bit times (if M = 0, SBNS = 0) or 11 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 12 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 13 (if M10 = 1, SNBS = 1).</description>
132644                  <value>#0</value>
132645                </enumeratedValue>
132646                <enumeratedValue>
132647                  <name>1</name>
132648                  <description>Break character is detected at length of 11 bit times (if M = 0, SBNS = 0) or 12 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 14 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 15 (if M10 = 1, SNBS = 1).</description>
132649                  <value>#1</value>
132650                </enumeratedValue>
132651              </enumeratedValues>
132652            </field>
132653            <field>
132654              <name>BRK13</name>
132655              <description>Break Character Generation Length</description>
132656              <bitOffset>26</bitOffset>
132657              <bitWidth>1</bitWidth>
132658              <access>read-write</access>
132659              <enumeratedValues>
132660                <enumeratedValue>
132661                  <name>0</name>
132662                  <description>Break character is transmitted with length of 10 bit times (if M = 0, SBNS = 0) or 11 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 12 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 13 (if M10 = 1, SNBS = 1).</description>
132663                  <value>#0</value>
132664                </enumeratedValue>
132665                <enumeratedValue>
132666                  <name>1</name>
132667                  <description>Break character is transmitted with length of 13 bit times (if M = 0, SBNS = 0) or 14 (if M = 1, SBNS = 0 or M = 0, SBNS = 1) or 15 (if M = 1, SBNS = 1 or M10 = 1, SNBS = 0) or 16 (if M10 = 1, SNBS = 1).</description>
132668                  <value>#1</value>
132669                </enumeratedValue>
132670              </enumeratedValues>
132671            </field>
132672            <field>
132673              <name>RWUID</name>
132674              <description>Receive Wake Up Idle Detect</description>
132675              <bitOffset>27</bitOffset>
132676              <bitWidth>1</bitWidth>
132677              <access>read-write</access>
132678              <enumeratedValues>
132679                <enumeratedValue>
132680                  <name>0</name>
132681                  <description>During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not get set when an address does not match.</description>
132682                  <value>#0</value>
132683                </enumeratedValue>
132684                <enumeratedValue>
132685                  <name>1</name>
132686                  <description>During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does get set when an address does not match.</description>
132687                  <value>#1</value>
132688                </enumeratedValue>
132689              </enumeratedValues>
132690            </field>
132691            <field>
132692              <name>RXINV</name>
132693              <description>Receive Data Inversion</description>
132694              <bitOffset>28</bitOffset>
132695              <bitWidth>1</bitWidth>
132696              <access>read-write</access>
132697              <enumeratedValues>
132698                <enumeratedValue>
132699                  <name>0</name>
132700                  <description>Receive data not inverted.</description>
132701                  <value>#0</value>
132702                </enumeratedValue>
132703                <enumeratedValue>
132704                  <name>1</name>
132705                  <description>Receive data inverted.</description>
132706                  <value>#1</value>
132707                </enumeratedValue>
132708              </enumeratedValues>
132709            </field>
132710            <field>
132711              <name>MSBF</name>
132712              <description>MSB First</description>
132713              <bitOffset>29</bitOffset>
132714              <bitWidth>1</bitWidth>
132715              <access>read-write</access>
132716              <enumeratedValues>
132717                <enumeratedValue>
132718                  <name>0</name>
132719                  <description>LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0.</description>
132720                  <value>#0</value>
132721                </enumeratedValue>
132722                <enumeratedValue>
132723                  <name>1</name>
132724                  <description>MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE].</description>
132725                  <value>#1</value>
132726                </enumeratedValue>
132727              </enumeratedValues>
132728            </field>
132729            <field>
132730              <name>RXEDGIF</name>
132731              <description>LPUART_RX Pin Active Edge Interrupt Flag</description>
132732              <bitOffset>30</bitOffset>
132733              <bitWidth>1</bitWidth>
132734              <access>read-write</access>
132735              <enumeratedValues>
132736                <enumeratedValue>
132737                  <name>0</name>
132738                  <description>No active edge on the receive pin has occurred.</description>
132739                  <value>#0</value>
132740                </enumeratedValue>
132741                <enumeratedValue>
132742                  <name>1</name>
132743                  <description>An active edge on the receive pin has occurred.</description>
132744                  <value>#1</value>
132745                </enumeratedValue>
132746              </enumeratedValues>
132747            </field>
132748            <field>
132749              <name>LBKDIF</name>
132750              <description>LIN Break Detect Interrupt Flag</description>
132751              <bitOffset>31</bitOffset>
132752              <bitWidth>1</bitWidth>
132753              <access>read-write</access>
132754              <enumeratedValues>
132755                <enumeratedValue>
132756                  <name>0</name>
132757                  <description>No LIN break character has been detected.</description>
132758                  <value>#0</value>
132759                </enumeratedValue>
132760                <enumeratedValue>
132761                  <name>1</name>
132762                  <description>LIN break character has been detected.</description>
132763                  <value>#1</value>
132764                </enumeratedValue>
132765              </enumeratedValues>
132766            </field>
132767          </fields>
132768        </register>
132769        <register>
132770          <name>CTRL</name>
132771          <description>LPUART Control Register</description>
132772          <addressOffset>0x8</addressOffset>
132773          <size>32</size>
132774          <access>read-write</access>
132775          <resetValue>0</resetValue>
132776          <resetMask>0xFFFFFFFF</resetMask>
132777          <fields>
132778            <field>
132779              <name>PT</name>
132780              <description>Parity Type</description>
132781              <bitOffset>0</bitOffset>
132782              <bitWidth>1</bitWidth>
132783              <access>read-write</access>
132784              <enumeratedValues>
132785                <enumeratedValue>
132786                  <name>0</name>
132787                  <description>Even parity.</description>
132788                  <value>#0</value>
132789                </enumeratedValue>
132790                <enumeratedValue>
132791                  <name>1</name>
132792                  <description>Odd parity.</description>
132793                  <value>#1</value>
132794                </enumeratedValue>
132795              </enumeratedValues>
132796            </field>
132797            <field>
132798              <name>PE</name>
132799              <description>Parity Enable</description>
132800              <bitOffset>1</bitOffset>
132801              <bitWidth>1</bitWidth>
132802              <access>read-write</access>
132803              <enumeratedValues>
132804                <enumeratedValue>
132805                  <name>0</name>
132806                  <description>No hardware parity generation or checking.</description>
132807                  <value>#0</value>
132808                </enumeratedValue>
132809                <enumeratedValue>
132810                  <name>1</name>
132811                  <description>Parity enabled.</description>
132812                  <value>#1</value>
132813                </enumeratedValue>
132814              </enumeratedValues>
132815            </field>
132816            <field>
132817              <name>ILT</name>
132818              <description>Idle Line Type Select</description>
132819              <bitOffset>2</bitOffset>
132820              <bitWidth>1</bitWidth>
132821              <access>read-write</access>
132822              <enumeratedValues>
132823                <enumeratedValue>
132824                  <name>0</name>
132825                  <description>Idle character bit count starts after start bit.</description>
132826                  <value>#0</value>
132827                </enumeratedValue>
132828                <enumeratedValue>
132829                  <name>1</name>
132830                  <description>Idle character bit count starts after stop bit.</description>
132831                  <value>#1</value>
132832                </enumeratedValue>
132833              </enumeratedValues>
132834            </field>
132835            <field>
132836              <name>WAKE</name>
132837              <description>Receiver Wakeup Method Select</description>
132838              <bitOffset>3</bitOffset>
132839              <bitWidth>1</bitWidth>
132840              <access>read-write</access>
132841              <enumeratedValues>
132842                <enumeratedValue>
132843                  <name>0</name>
132844                  <description>Configures RWU for idle-line wakeup.</description>
132845                  <value>#0</value>
132846                </enumeratedValue>
132847                <enumeratedValue>
132848                  <name>1</name>
132849                  <description>Configures RWU with address-mark wakeup.</description>
132850                  <value>#1</value>
132851                </enumeratedValue>
132852              </enumeratedValues>
132853            </field>
132854            <field>
132855              <name>M</name>
132856              <description>9-Bit or 8-Bit Mode Select</description>
132857              <bitOffset>4</bitOffset>
132858              <bitWidth>1</bitWidth>
132859              <access>read-write</access>
132860              <enumeratedValues>
132861                <enumeratedValue>
132862                  <name>0</name>
132863                  <description>Receiver and transmitter use 8-bit data characters.</description>
132864                  <value>#0</value>
132865                </enumeratedValue>
132866                <enumeratedValue>
132867                  <name>1</name>
132868                  <description>Receiver and transmitter use 9-bit data characters.</description>
132869                  <value>#1</value>
132870                </enumeratedValue>
132871              </enumeratedValues>
132872            </field>
132873            <field>
132874              <name>RSRC</name>
132875              <description>Receiver Source Select</description>
132876              <bitOffset>5</bitOffset>
132877              <bitWidth>1</bitWidth>
132878              <access>read-write</access>
132879              <enumeratedValues>
132880                <enumeratedValue>
132881                  <name>0</name>
132882                  <description>Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the LPUART_RX pin.</description>
132883                  <value>#0</value>
132884                </enumeratedValue>
132885                <enumeratedValue>
132886                  <name>1</name>
132887                  <description>Single-wire LPUART mode where the LPUART_TX pin is connected to the transmitter output and receiver input.</description>
132888                  <value>#1</value>
132889                </enumeratedValue>
132890              </enumeratedValues>
132891            </field>
132892            <field>
132893              <name>DOZEEN</name>
132894              <description>Doze Enable</description>
132895              <bitOffset>6</bitOffset>
132896              <bitWidth>1</bitWidth>
132897              <access>read-write</access>
132898              <enumeratedValues>
132899                <enumeratedValue>
132900                  <name>0</name>
132901                  <description>LPUART is enabled in Doze mode.</description>
132902                  <value>#0</value>
132903                </enumeratedValue>
132904                <enumeratedValue>
132905                  <name>1</name>
132906                  <description>LPUART is disabled in Doze mode.</description>
132907                  <value>#1</value>
132908                </enumeratedValue>
132909              </enumeratedValues>
132910            </field>
132911            <field>
132912              <name>LOOPS</name>
132913              <description>Loop Mode Select</description>
132914              <bitOffset>7</bitOffset>
132915              <bitWidth>1</bitWidth>
132916              <access>read-write</access>
132917              <enumeratedValues>
132918                <enumeratedValue>
132919                  <name>0</name>
132920                  <description>Normal operation - LPUART_RX and LPUART_TX use separate pins.</description>
132921                  <value>#0</value>
132922                </enumeratedValue>
132923                <enumeratedValue>
132924                  <name>1</name>
132925                  <description>Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit).</description>
132926                  <value>#1</value>
132927                </enumeratedValue>
132928              </enumeratedValues>
132929            </field>
132930            <field>
132931              <name>IDLECFG</name>
132932              <description>Idle Configuration</description>
132933              <bitOffset>8</bitOffset>
132934              <bitWidth>3</bitWidth>
132935              <access>read-write</access>
132936              <enumeratedValues>
132937                <enumeratedValue>
132938                  <name>000</name>
132939                  <description>1 idle character</description>
132940                  <value>#000</value>
132941                </enumeratedValue>
132942                <enumeratedValue>
132943                  <name>001</name>
132944                  <description>2 idle characters</description>
132945                  <value>#001</value>
132946                </enumeratedValue>
132947                <enumeratedValue>
132948                  <name>010</name>
132949                  <description>4 idle characters</description>
132950                  <value>#010</value>
132951                </enumeratedValue>
132952                <enumeratedValue>
132953                  <name>011</name>
132954                  <description>8 idle characters</description>
132955                  <value>#011</value>
132956                </enumeratedValue>
132957                <enumeratedValue>
132958                  <name>100</name>
132959                  <description>16 idle characters</description>
132960                  <value>#100</value>
132961                </enumeratedValue>
132962                <enumeratedValue>
132963                  <name>101</name>
132964                  <description>32 idle characters</description>
132965                  <value>#101</value>
132966                </enumeratedValue>
132967                <enumeratedValue>
132968                  <name>110</name>
132969                  <description>64 idle characters</description>
132970                  <value>#110</value>
132971                </enumeratedValue>
132972                <enumeratedValue>
132973                  <name>111</name>
132974                  <description>128 idle characters</description>
132975                  <value>#111</value>
132976                </enumeratedValue>
132977              </enumeratedValues>
132978            </field>
132979            <field>
132980              <name>MA2IE</name>
132981              <description>Match 2 Interrupt Enable</description>
132982              <bitOffset>14</bitOffset>
132983              <bitWidth>1</bitWidth>
132984              <access>read-write</access>
132985              <enumeratedValues>
132986                <enumeratedValue>
132987                  <name>0</name>
132988                  <description>MA2F interrupt disabled</description>
132989                  <value>#0</value>
132990                </enumeratedValue>
132991                <enumeratedValue>
132992                  <name>1</name>
132993                  <description>MA2F interrupt enabled</description>
132994                  <value>#1</value>
132995                </enumeratedValue>
132996              </enumeratedValues>
132997            </field>
132998            <field>
132999              <name>MA1IE</name>
133000              <description>Match 1 Interrupt Enable</description>
133001              <bitOffset>15</bitOffset>
133002              <bitWidth>1</bitWidth>
133003              <access>read-write</access>
133004              <enumeratedValues>
133005                <enumeratedValue>
133006                  <name>0</name>
133007                  <description>MA1F interrupt disabled</description>
133008                  <value>#0</value>
133009                </enumeratedValue>
133010                <enumeratedValue>
133011                  <name>1</name>
133012                  <description>MA1F interrupt enabled</description>
133013                  <value>#1</value>
133014                </enumeratedValue>
133015              </enumeratedValues>
133016            </field>
133017            <field>
133018              <name>SBK</name>
133019              <description>Send Break</description>
133020              <bitOffset>16</bitOffset>
133021              <bitWidth>1</bitWidth>
133022              <access>read-write</access>
133023              <enumeratedValues>
133024                <enumeratedValue>
133025                  <name>0</name>
133026                  <description>Normal transmitter operation.</description>
133027                  <value>#0</value>
133028                </enumeratedValue>
133029                <enumeratedValue>
133030                  <name>1</name>
133031                  <description>Queue break character(s) to be sent.</description>
133032                  <value>#1</value>
133033                </enumeratedValue>
133034              </enumeratedValues>
133035            </field>
133036            <field>
133037              <name>RWU</name>
133038              <description>Receiver Wakeup Control</description>
133039              <bitOffset>17</bitOffset>
133040              <bitWidth>1</bitWidth>
133041              <access>read-write</access>
133042              <enumeratedValues>
133043                <enumeratedValue>
133044                  <name>0</name>
133045                  <description>Normal receiver operation.</description>
133046                  <value>#0</value>
133047                </enumeratedValue>
133048                <enumeratedValue>
133049                  <name>1</name>
133050                  <description>LPUART receiver in standby waiting for wakeup condition.</description>
133051                  <value>#1</value>
133052                </enumeratedValue>
133053              </enumeratedValues>
133054            </field>
133055            <field>
133056              <name>RE</name>
133057              <description>Receiver Enable</description>
133058              <bitOffset>18</bitOffset>
133059              <bitWidth>1</bitWidth>
133060              <access>read-write</access>
133061              <enumeratedValues>
133062                <enumeratedValue>
133063                  <name>0</name>
133064                  <description>Receiver disabled.</description>
133065                  <value>#0</value>
133066                </enumeratedValue>
133067                <enumeratedValue>
133068                  <name>1</name>
133069                  <description>Receiver enabled.</description>
133070                  <value>#1</value>
133071                </enumeratedValue>
133072              </enumeratedValues>
133073            </field>
133074            <field>
133075              <name>TE</name>
133076              <description>Transmitter Enable</description>
133077              <bitOffset>19</bitOffset>
133078              <bitWidth>1</bitWidth>
133079              <access>read-write</access>
133080              <enumeratedValues>
133081                <enumeratedValue>
133082                  <name>0</name>
133083                  <description>Transmitter disabled.</description>
133084                  <value>#0</value>
133085                </enumeratedValue>
133086                <enumeratedValue>
133087                  <name>1</name>
133088                  <description>Transmitter enabled.</description>
133089                  <value>#1</value>
133090                </enumeratedValue>
133091              </enumeratedValues>
133092            </field>
133093            <field>
133094              <name>ILIE</name>
133095              <description>Idle Line Interrupt Enable</description>
133096              <bitOffset>20</bitOffset>
133097              <bitWidth>1</bitWidth>
133098              <access>read-write</access>
133099              <enumeratedValues>
133100                <enumeratedValue>
133101                  <name>0</name>
133102                  <description>Hardware interrupts from IDLE disabled; use polling.</description>
133103                  <value>#0</value>
133104                </enumeratedValue>
133105                <enumeratedValue>
133106                  <name>1</name>
133107                  <description>Hardware interrupt requested when IDLE flag is 1.</description>
133108                  <value>#1</value>
133109                </enumeratedValue>
133110              </enumeratedValues>
133111            </field>
133112            <field>
133113              <name>RIE</name>
133114              <description>Receiver Interrupt Enable</description>
133115              <bitOffset>21</bitOffset>
133116              <bitWidth>1</bitWidth>
133117              <access>read-write</access>
133118              <enumeratedValues>
133119                <enumeratedValue>
133120                  <name>0</name>
133121                  <description>Hardware interrupts from RDRF disabled; use polling.</description>
133122                  <value>#0</value>
133123                </enumeratedValue>
133124                <enumeratedValue>
133125                  <name>1</name>
133126                  <description>Hardware interrupt requested when RDRF flag is 1.</description>
133127                  <value>#1</value>
133128                </enumeratedValue>
133129              </enumeratedValues>
133130            </field>
133131            <field>
133132              <name>TCIE</name>
133133              <description>Transmission Complete Interrupt Enable for</description>
133134              <bitOffset>22</bitOffset>
133135              <bitWidth>1</bitWidth>
133136              <access>read-write</access>
133137              <enumeratedValues>
133138                <enumeratedValue>
133139                  <name>0</name>
133140                  <description>Hardware interrupts from TC disabled; use polling.</description>
133141                  <value>#0</value>
133142                </enumeratedValue>
133143                <enumeratedValue>
133144                  <name>1</name>
133145                  <description>Hardware interrupt requested when TC flag is 1.</description>
133146                  <value>#1</value>
133147                </enumeratedValue>
133148              </enumeratedValues>
133149            </field>
133150            <field>
133151              <name>TIE</name>
133152              <description>Transmit Interrupt Enable</description>
133153              <bitOffset>23</bitOffset>
133154              <bitWidth>1</bitWidth>
133155              <access>read-write</access>
133156              <enumeratedValues>
133157                <enumeratedValue>
133158                  <name>0</name>
133159                  <description>Hardware interrupts from TDRE disabled; use polling.</description>
133160                  <value>#0</value>
133161                </enumeratedValue>
133162                <enumeratedValue>
133163                  <name>1</name>
133164                  <description>Hardware interrupt requested when TDRE flag is 1.</description>
133165                  <value>#1</value>
133166                </enumeratedValue>
133167              </enumeratedValues>
133168            </field>
133169            <field>
133170              <name>PEIE</name>
133171              <description>Parity Error Interrupt Enable</description>
133172              <bitOffset>24</bitOffset>
133173              <bitWidth>1</bitWidth>
133174              <access>read-write</access>
133175              <enumeratedValues>
133176                <enumeratedValue>
133177                  <name>0</name>
133178                  <description>PF interrupts disabled; use polling).</description>
133179                  <value>#0</value>
133180                </enumeratedValue>
133181                <enumeratedValue>
133182                  <name>1</name>
133183                  <description>Hardware interrupt requested when PF is set.</description>
133184                  <value>#1</value>
133185                </enumeratedValue>
133186              </enumeratedValues>
133187            </field>
133188            <field>
133189              <name>FEIE</name>
133190              <description>Framing Error Interrupt Enable</description>
133191              <bitOffset>25</bitOffset>
133192              <bitWidth>1</bitWidth>
133193              <access>read-write</access>
133194              <enumeratedValues>
133195                <enumeratedValue>
133196                  <name>0</name>
133197                  <description>FE interrupts disabled; use polling.</description>
133198                  <value>#0</value>
133199                </enumeratedValue>
133200                <enumeratedValue>
133201                  <name>1</name>
133202                  <description>Hardware interrupt requested when FE is set.</description>
133203                  <value>#1</value>
133204                </enumeratedValue>
133205              </enumeratedValues>
133206            </field>
133207            <field>
133208              <name>NEIE</name>
133209              <description>Noise Error Interrupt Enable</description>
133210              <bitOffset>26</bitOffset>
133211              <bitWidth>1</bitWidth>
133212              <access>read-write</access>
133213              <enumeratedValues>
133214                <enumeratedValue>
133215                  <name>0</name>
133216                  <description>NF interrupts disabled; use polling.</description>
133217                  <value>#0</value>
133218                </enumeratedValue>
133219                <enumeratedValue>
133220                  <name>1</name>
133221                  <description>Hardware interrupt requested when NF is set.</description>
133222                  <value>#1</value>
133223                </enumeratedValue>
133224              </enumeratedValues>
133225            </field>
133226            <field>
133227              <name>ORIE</name>
133228              <description>Overrun Interrupt Enable</description>
133229              <bitOffset>27</bitOffset>
133230              <bitWidth>1</bitWidth>
133231              <access>read-write</access>
133232              <enumeratedValues>
133233                <enumeratedValue>
133234                  <name>0</name>
133235                  <description>OR interrupts disabled; use polling.</description>
133236                  <value>#0</value>
133237                </enumeratedValue>
133238                <enumeratedValue>
133239                  <name>1</name>
133240                  <description>Hardware interrupt requested when OR is set.</description>
133241                  <value>#1</value>
133242                </enumeratedValue>
133243              </enumeratedValues>
133244            </field>
133245            <field>
133246              <name>TXINV</name>
133247              <description>Transmit Data Inversion</description>
133248              <bitOffset>28</bitOffset>
133249              <bitWidth>1</bitWidth>
133250              <access>read-write</access>
133251              <enumeratedValues>
133252                <enumeratedValue>
133253                  <name>0</name>
133254                  <description>Transmit data not inverted.</description>
133255                  <value>#0</value>
133256                </enumeratedValue>
133257                <enumeratedValue>
133258                  <name>1</name>
133259                  <description>Transmit data inverted.</description>
133260                  <value>#1</value>
133261                </enumeratedValue>
133262              </enumeratedValues>
133263            </field>
133264            <field>
133265              <name>TXDIR</name>
133266              <description>LPUART_TX Pin Direction in Single-Wire Mode</description>
133267              <bitOffset>29</bitOffset>
133268              <bitWidth>1</bitWidth>
133269              <access>read-write</access>
133270              <enumeratedValues>
133271                <enumeratedValue>
133272                  <name>0</name>
133273                  <description>LPUART_TX pin is an input in single-wire mode.</description>
133274                  <value>#0</value>
133275                </enumeratedValue>
133276                <enumeratedValue>
133277                  <name>1</name>
133278                  <description>LPUART_TX pin is an output in single-wire mode.</description>
133279                  <value>#1</value>
133280                </enumeratedValue>
133281              </enumeratedValues>
133282            </field>
133283            <field>
133284              <name>R9T8</name>
133285              <description>Receive Bit 9 / Transmit Bit 8</description>
133286              <bitOffset>30</bitOffset>
133287              <bitWidth>1</bitWidth>
133288              <access>read-write</access>
133289            </field>
133290            <field>
133291              <name>R8T9</name>
133292              <description>Receive Bit 8 / Transmit Bit 9</description>
133293              <bitOffset>31</bitOffset>
133294              <bitWidth>1</bitWidth>
133295              <access>read-write</access>
133296            </field>
133297          </fields>
133298        </register>
133299        <register>
133300          <name>DATA</name>
133301          <description>LPUART Data Register</description>
133302          <addressOffset>0xC</addressOffset>
133303          <size>32</size>
133304          <access>read-write</access>
133305          <resetValue>0x1000</resetValue>
133306          <resetMask>0xFFFFFFFF</resetMask>
133307          <fields>
133308            <field>
133309              <name>R0T0</name>
133310              <description>Read receive data buffer 0 or write transmit data buffer 0.</description>
133311              <bitOffset>0</bitOffset>
133312              <bitWidth>1</bitWidth>
133313              <access>read-write</access>
133314            </field>
133315            <field>
133316              <name>R1T1</name>
133317              <description>Read receive data buffer 1 or write transmit data buffer 1.</description>
133318              <bitOffset>1</bitOffset>
133319              <bitWidth>1</bitWidth>
133320              <access>read-write</access>
133321            </field>
133322            <field>
133323              <name>R2T2</name>
133324              <description>Read receive data buffer 2 or write transmit data buffer 2.</description>
133325              <bitOffset>2</bitOffset>
133326              <bitWidth>1</bitWidth>
133327              <access>read-write</access>
133328            </field>
133329            <field>
133330              <name>R3T3</name>
133331              <description>Read receive data buffer 3 or write transmit data buffer 3.</description>
133332              <bitOffset>3</bitOffset>
133333              <bitWidth>1</bitWidth>
133334              <access>read-write</access>
133335            </field>
133336            <field>
133337              <name>R4T4</name>
133338              <description>Read receive data buffer 4 or write transmit data buffer 4.</description>
133339              <bitOffset>4</bitOffset>
133340              <bitWidth>1</bitWidth>
133341              <access>read-write</access>
133342            </field>
133343            <field>
133344              <name>R5T5</name>
133345              <description>Read receive data buffer 5 or write transmit data buffer 5.</description>
133346              <bitOffset>5</bitOffset>
133347              <bitWidth>1</bitWidth>
133348              <access>read-write</access>
133349            </field>
133350            <field>
133351              <name>R6T6</name>
133352              <description>Read receive data buffer 6 or write transmit data buffer 6.</description>
133353              <bitOffset>6</bitOffset>
133354              <bitWidth>1</bitWidth>
133355              <access>read-write</access>
133356            </field>
133357            <field>
133358              <name>R7T7</name>
133359              <description>Read receive data buffer 7 or write transmit data buffer 7.</description>
133360              <bitOffset>7</bitOffset>
133361              <bitWidth>1</bitWidth>
133362              <access>read-write</access>
133363            </field>
133364            <field>
133365              <name>R8T8</name>
133366              <description>Read receive data buffer 8 or write transmit data buffer 8.</description>
133367              <bitOffset>8</bitOffset>
133368              <bitWidth>1</bitWidth>
133369              <access>read-write</access>
133370            </field>
133371            <field>
133372              <name>R9T9</name>
133373              <description>Read receive data buffer 9 or write transmit data buffer 9.</description>
133374              <bitOffset>9</bitOffset>
133375              <bitWidth>1</bitWidth>
133376              <access>read-write</access>
133377            </field>
133378            <field>
133379              <name>IDLINE</name>
133380              <description>Idle Line</description>
133381              <bitOffset>11</bitOffset>
133382              <bitWidth>1</bitWidth>
133383              <access>read-only</access>
133384              <enumeratedValues>
133385                <enumeratedValue>
133386                  <name>0</name>
133387                  <description>Receiver was not idle before receiving this character.</description>
133388                  <value>#0</value>
133389                </enumeratedValue>
133390                <enumeratedValue>
133391                  <name>1</name>
133392                  <description>Receiver was idle before receiving this character.</description>
133393                  <value>#1</value>
133394                </enumeratedValue>
133395              </enumeratedValues>
133396            </field>
133397            <field>
133398              <name>RXEMPT</name>
133399              <description>Receive Buffer Empty</description>
133400              <bitOffset>12</bitOffset>
133401              <bitWidth>1</bitWidth>
133402              <access>read-only</access>
133403              <enumeratedValues>
133404                <enumeratedValue>
133405                  <name>0</name>
133406                  <description>Receive buffer contains valid data.</description>
133407                  <value>#0</value>
133408                </enumeratedValue>
133409                <enumeratedValue>
133410                  <name>1</name>
133411                  <description>Receive buffer is empty, data returned on read is not valid.</description>
133412                  <value>#1</value>
133413                </enumeratedValue>
133414              </enumeratedValues>
133415            </field>
133416            <field>
133417              <name>FRETSC</name>
133418              <description>Frame Error / Transmit Special Character</description>
133419              <bitOffset>13</bitOffset>
133420              <bitWidth>1</bitWidth>
133421              <access>read-write</access>
133422              <enumeratedValues>
133423                <enumeratedValue>
133424                  <name>0</name>
133425                  <description>The dataword was received without a frame error on read, transmit a normal character on write.</description>
133426                  <value>#0</value>
133427                </enumeratedValue>
133428                <enumeratedValue>
133429                  <name>1</name>
133430                  <description>The dataword was received with a frame error, transmit an idle or break character on transmit.</description>
133431                  <value>#1</value>
133432                </enumeratedValue>
133433              </enumeratedValues>
133434            </field>
133435            <field>
133436              <name>PARITYE</name>
133437              <description>The current received dataword contained in DATA[R9:R0] was received with a parity error.</description>
133438              <bitOffset>14</bitOffset>
133439              <bitWidth>1</bitWidth>
133440              <access>read-only</access>
133441              <enumeratedValues>
133442                <enumeratedValue>
133443                  <name>0</name>
133444                  <description>The dataword was received without a parity error.</description>
133445                  <value>#0</value>
133446                </enumeratedValue>
133447                <enumeratedValue>
133448                  <name>1</name>
133449                  <description>The dataword was received with a parity error.</description>
133450                  <value>#1</value>
133451                </enumeratedValue>
133452              </enumeratedValues>
133453            </field>
133454            <field>
133455              <name>NOISY</name>
133456              <description>The current received dataword contained in DATA[R9:R0] was received with noise.</description>
133457              <bitOffset>15</bitOffset>
133458              <bitWidth>1</bitWidth>
133459              <access>read-only</access>
133460              <enumeratedValues>
133461                <enumeratedValue>
133462                  <name>0</name>
133463                  <description>The dataword was received without noise.</description>
133464                  <value>#0</value>
133465                </enumeratedValue>
133466                <enumeratedValue>
133467                  <name>1</name>
133468                  <description>The data was received with noise.</description>
133469                  <value>#1</value>
133470                </enumeratedValue>
133471              </enumeratedValues>
133472            </field>
133473          </fields>
133474        </register>
133475        <register>
133476          <name>MATCH</name>
133477          <description>LPUART Match Address Register</description>
133478          <addressOffset>0x10</addressOffset>
133479          <size>32</size>
133480          <access>read-write</access>
133481          <resetValue>0</resetValue>
133482          <resetMask>0xFFFFFFFF</resetMask>
133483          <fields>
133484            <field>
133485              <name>MA1</name>
133486              <description>Match Address 1</description>
133487              <bitOffset>0</bitOffset>
133488              <bitWidth>10</bitWidth>
133489              <access>read-write</access>
133490            </field>
133491            <field>
133492              <name>MA2</name>
133493              <description>Match Address 2</description>
133494              <bitOffset>16</bitOffset>
133495              <bitWidth>10</bitWidth>
133496              <access>read-write</access>
133497            </field>
133498          </fields>
133499        </register>
133500        <register>
133501          <name>MODIR</name>
133502          <description>LPUART Modem IrDA Register</description>
133503          <addressOffset>0x14</addressOffset>
133504          <size>32</size>
133505          <access>read-write</access>
133506          <resetValue>0</resetValue>
133507          <resetMask>0xFFFFFFFF</resetMask>
133508          <fields>
133509            <field>
133510              <name>TXCTSE</name>
133511              <description>Transmitter clear-to-send enable</description>
133512              <bitOffset>0</bitOffset>
133513              <bitWidth>1</bitWidth>
133514              <access>read-write</access>
133515              <enumeratedValues>
133516                <enumeratedValue>
133517                  <name>0</name>
133518                  <description>CTS has no effect on the transmitter.</description>
133519                  <value>#0</value>
133520                </enumeratedValue>
133521                <enumeratedValue>
133522                  <name>1</name>
133523                  <description>Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission.</description>
133524                  <value>#1</value>
133525                </enumeratedValue>
133526              </enumeratedValues>
133527            </field>
133528            <field>
133529              <name>TXRTSE</name>
133530              <description>Transmitter request-to-send enable</description>
133531              <bitOffset>1</bitOffset>
133532              <bitWidth>1</bitWidth>
133533              <access>read-write</access>
133534              <enumeratedValues>
133535                <enumeratedValue>
133536                  <name>0</name>
133537                  <description>The transmitter has no effect on RTS.</description>
133538                  <value>#0</value>
133539                </enumeratedValue>
133540                <enumeratedValue>
133541                  <name>1</name>
133542                  <description>When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit.</description>
133543                  <value>#1</value>
133544                </enumeratedValue>
133545              </enumeratedValues>
133546            </field>
133547            <field>
133548              <name>TXRTSPOL</name>
133549              <description>Transmitter request-to-send polarity</description>
133550              <bitOffset>2</bitOffset>
133551              <bitWidth>1</bitWidth>
133552              <access>read-write</access>
133553              <enumeratedValues>
133554                <enumeratedValue>
133555                  <name>0</name>
133556                  <description>Transmitter RTS is active low.</description>
133557                  <value>#0</value>
133558                </enumeratedValue>
133559                <enumeratedValue>
133560                  <name>1</name>
133561                  <description>Transmitter RTS is active high.</description>
133562                  <value>#1</value>
133563                </enumeratedValue>
133564              </enumeratedValues>
133565            </field>
133566            <field>
133567              <name>RXRTSE</name>
133568              <description>Receiver request-to-send enable</description>
133569              <bitOffset>3</bitOffset>
133570              <bitWidth>1</bitWidth>
133571              <access>read-write</access>
133572              <enumeratedValues>
133573                <enumeratedValue>
133574                  <name>0</name>
133575                  <description>The receiver has no effect on RTS.</description>
133576                  <value>#0</value>
133577                </enumeratedValue>
133578                <enumeratedValue>
133579                  <name>1</name>
133580                  <description>RTS is deasserted if the receiver data register is full or a start bit has been detected that would cause the receiver data register to become full. RTS is asserted if the receiver data register is not full and has not detected a start bit that would cause the receiver data register to become full.</description>
133581                  <value>#1</value>
133582                </enumeratedValue>
133583              </enumeratedValues>
133584            </field>
133585            <field>
133586              <name>TXCTSC</name>
133587              <description>Transmit CTS Configuration</description>
133588              <bitOffset>4</bitOffset>
133589              <bitWidth>1</bitWidth>
133590              <access>read-write</access>
133591              <enumeratedValues>
133592                <enumeratedValue>
133593                  <name>0</name>
133594                  <description>CTS input is sampled at the start of each character.</description>
133595                  <value>#0</value>
133596                </enumeratedValue>
133597                <enumeratedValue>
133598                  <name>1</name>
133599                  <description>CTS input is sampled when the transmitter is idle.</description>
133600                  <value>#1</value>
133601                </enumeratedValue>
133602              </enumeratedValues>
133603            </field>
133604            <field>
133605              <name>TXCTSSRC</name>
133606              <description>Transmit CTS Source</description>
133607              <bitOffset>5</bitOffset>
133608              <bitWidth>1</bitWidth>
133609              <access>read-write</access>
133610              <enumeratedValues>
133611                <enumeratedValue>
133612                  <name>0</name>
133613                  <description>CTS input is the LPUART_CTS pin.</description>
133614                  <value>#0</value>
133615                </enumeratedValue>
133616                <enumeratedValue>
133617                  <name>1</name>
133618                  <description>CTS input is the inverted Receiver Match result.</description>
133619                  <value>#1</value>
133620                </enumeratedValue>
133621              </enumeratedValues>
133622            </field>
133623            <field>
133624              <name>RTSWATER</name>
133625              <description>Receive RTS Configuration</description>
133626              <bitOffset>8</bitOffset>
133627              <bitWidth>8</bitWidth>
133628              <access>read-write</access>
133629              <enumeratedValues>
133630                <enumeratedValue>
133631                  <name>0</name>
133632                  <description>RTS asserts when the receiver FIFO is full or receiving a character that causes the FIFO to become full.</description>
133633                  <value>#0</value>
133634                </enumeratedValue>
133635                <enumeratedValue>
133636                  <name>1</name>
133637                  <description>RTS asserts when the receive FIFO is less than or equal to the RXWATER configuration and negates when the receive FIFO is greater than the RXWATER configuration.</description>
133638                  <value>#1</value>
133639                </enumeratedValue>
133640              </enumeratedValues>
133641            </field>
133642            <field>
133643              <name>TNP</name>
133644              <description>Transmitter narrow pulse</description>
133645              <bitOffset>16</bitOffset>
133646              <bitWidth>2</bitWidth>
133647              <access>read-write</access>
133648              <enumeratedValues>
133649                <enumeratedValue>
133650                  <name>00</name>
133651                  <description>1/OSR.</description>
133652                  <value>#00</value>
133653                </enumeratedValue>
133654                <enumeratedValue>
133655                  <name>01</name>
133656                  <description>2/OSR.</description>
133657                  <value>#01</value>
133658                </enumeratedValue>
133659                <enumeratedValue>
133660                  <name>10</name>
133661                  <description>3/OSR.</description>
133662                  <value>#10</value>
133663                </enumeratedValue>
133664                <enumeratedValue>
133665                  <name>11</name>
133666                  <description>4/OSR.</description>
133667                  <value>#11</value>
133668                </enumeratedValue>
133669              </enumeratedValues>
133670            </field>
133671            <field>
133672              <name>IREN</name>
133673              <description>Infrared enable</description>
133674              <bitOffset>18</bitOffset>
133675              <bitWidth>1</bitWidth>
133676              <access>read-write</access>
133677              <enumeratedValues>
133678                <enumeratedValue>
133679                  <name>0</name>
133680                  <description>IR disabled.</description>
133681                  <value>#0</value>
133682                </enumeratedValue>
133683                <enumeratedValue>
133684                  <name>1</name>
133685                  <description>IR enabled.</description>
133686                  <value>#1</value>
133687                </enumeratedValue>
133688              </enumeratedValues>
133689            </field>
133690          </fields>
133691        </register>
133692        <register>
133693          <name>FIFO</name>
133694          <description>LPUART FIFO Register</description>
133695          <addressOffset>0x18</addressOffset>
133696          <size>32</size>
133697          <access>read-write</access>
133698          <resetValue>0x22</resetValue>
133699          <resetMask>0xFFFFFFFF</resetMask>
133700          <fields>
133701            <field>
133702              <name>RXFIFOSIZE</name>
133703              <description>Receive FIFO. Buffer Depth</description>
133704              <bitOffset>0</bitOffset>
133705              <bitWidth>3</bitWidth>
133706              <access>read-only</access>
133707              <enumeratedValues>
133708                <enumeratedValue>
133709                  <name>000</name>
133710                  <description>Receive FIFO/Buffer depth = 1 dataword.</description>
133711                  <value>#000</value>
133712                </enumeratedValue>
133713                <enumeratedValue>
133714                  <name>001</name>
133715                  <description>Receive FIFO/Buffer depth = 4 datawords.</description>
133716                  <value>#001</value>
133717                </enumeratedValue>
133718                <enumeratedValue>
133719                  <name>010</name>
133720                  <description>Receive FIFO/Buffer depth = 8 datawords.</description>
133721                  <value>#010</value>
133722                </enumeratedValue>
133723                <enumeratedValue>
133724                  <name>011</name>
133725                  <description>Receive FIFO/Buffer depth = 16 datawords.</description>
133726                  <value>#011</value>
133727                </enumeratedValue>
133728                <enumeratedValue>
133729                  <name>100</name>
133730                  <description>Receive FIFO/Buffer depth = 32 datawords.</description>
133731                  <value>#100</value>
133732                </enumeratedValue>
133733                <enumeratedValue>
133734                  <name>101</name>
133735                  <description>Receive FIFO/Buffer depth = 64 datawords.</description>
133736                  <value>#101</value>
133737                </enumeratedValue>
133738                <enumeratedValue>
133739                  <name>110</name>
133740                  <description>Receive FIFO/Buffer depth = 128 datawords.</description>
133741                  <value>#110</value>
133742                </enumeratedValue>
133743                <enumeratedValue>
133744                  <name>111</name>
133745                  <description>Receive FIFO/Buffer depth = 256 datawords.</description>
133746                  <value>#111</value>
133747                </enumeratedValue>
133748              </enumeratedValues>
133749            </field>
133750            <field>
133751              <name>RXFE</name>
133752              <description>Receive FIFO Enable</description>
133753              <bitOffset>3</bitOffset>
133754              <bitWidth>1</bitWidth>
133755              <access>read-write</access>
133756              <enumeratedValues>
133757                <enumeratedValue>
133758                  <name>0</name>
133759                  <description>Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)</description>
133760                  <value>#0</value>
133761                </enumeratedValue>
133762                <enumeratedValue>
133763                  <name>1</name>
133764                  <description>Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE.</description>
133765                  <value>#1</value>
133766                </enumeratedValue>
133767              </enumeratedValues>
133768            </field>
133769            <field>
133770              <name>TXFIFOSIZE</name>
133771              <description>Transmit FIFO. Buffer Depth</description>
133772              <bitOffset>4</bitOffset>
133773              <bitWidth>3</bitWidth>
133774              <access>read-only</access>
133775              <enumeratedValues>
133776                <enumeratedValue>
133777                  <name>000</name>
133778                  <description>Transmit FIFO/Buffer depth = 1 dataword.</description>
133779                  <value>#000</value>
133780                </enumeratedValue>
133781                <enumeratedValue>
133782                  <name>001</name>
133783                  <description>Transmit FIFO/Buffer depth = 4 datawords.</description>
133784                  <value>#001</value>
133785                </enumeratedValue>
133786                <enumeratedValue>
133787                  <name>010</name>
133788                  <description>Transmit FIFO/Buffer depth = 8 datawords.</description>
133789                  <value>#010</value>
133790                </enumeratedValue>
133791                <enumeratedValue>
133792                  <name>011</name>
133793                  <description>Transmit FIFO/Buffer depth = 16 datawords.</description>
133794                  <value>#011</value>
133795                </enumeratedValue>
133796                <enumeratedValue>
133797                  <name>100</name>
133798                  <description>Transmit FIFO/Buffer depth = 32 datawords.</description>
133799                  <value>#100</value>
133800                </enumeratedValue>
133801                <enumeratedValue>
133802                  <name>101</name>
133803                  <description>Transmit FIFO/Buffer depth = 64 datawords.</description>
133804                  <value>#101</value>
133805                </enumeratedValue>
133806                <enumeratedValue>
133807                  <name>110</name>
133808                  <description>Transmit FIFO/Buffer depth = 128 datawords.</description>
133809                  <value>#110</value>
133810                </enumeratedValue>
133811                <enumeratedValue>
133812                  <name>111</name>
133813                  <description>Transmit FIFO/Buffer depth = 256 datawords</description>
133814                  <value>#111</value>
133815                </enumeratedValue>
133816              </enumeratedValues>
133817            </field>
133818            <field>
133819              <name>TXFE</name>
133820              <description>Transmit FIFO Enable</description>
133821              <bitOffset>7</bitOffset>
133822              <bitWidth>1</bitWidth>
133823              <access>read-write</access>
133824              <enumeratedValues>
133825                <enumeratedValue>
133826                  <name>0</name>
133827                  <description>Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support).</description>
133828                  <value>#0</value>
133829                </enumeratedValue>
133830                <enumeratedValue>
133831                  <name>1</name>
133832                  <description>Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.</description>
133833                  <value>#1</value>
133834                </enumeratedValue>
133835              </enumeratedValues>
133836            </field>
133837            <field>
133838              <name>RXUFE</name>
133839              <description>Receive FIFO Underflow Interrupt Enable</description>
133840              <bitOffset>8</bitOffset>
133841              <bitWidth>1</bitWidth>
133842              <access>read-write</access>
133843              <enumeratedValues>
133844                <enumeratedValue>
133845                  <name>0</name>
133846                  <description>RXUF flag does not generate an interrupt to the host.</description>
133847                  <value>#0</value>
133848                </enumeratedValue>
133849                <enumeratedValue>
133850                  <name>1</name>
133851                  <description>RXUF flag generates an interrupt to the host.</description>
133852                  <value>#1</value>
133853                </enumeratedValue>
133854              </enumeratedValues>
133855            </field>
133856            <field>
133857              <name>TXOFE</name>
133858              <description>Transmit FIFO Overflow Interrupt Enable</description>
133859              <bitOffset>9</bitOffset>
133860              <bitWidth>1</bitWidth>
133861              <access>read-write</access>
133862              <enumeratedValues>
133863                <enumeratedValue>
133864                  <name>0</name>
133865                  <description>TXOF flag does not generate an interrupt to the host.</description>
133866                  <value>#0</value>
133867                </enumeratedValue>
133868                <enumeratedValue>
133869                  <name>1</name>
133870                  <description>TXOF flag generates an interrupt to the host.</description>
133871                  <value>#1</value>
133872                </enumeratedValue>
133873              </enumeratedValues>
133874            </field>
133875            <field>
133876              <name>RXIDEN</name>
133877              <description>Receiver Idle Empty Enable</description>
133878              <bitOffset>10</bitOffset>
133879              <bitWidth>3</bitWidth>
133880              <access>read-write</access>
133881              <enumeratedValues>
133882                <enumeratedValue>
133883                  <name>000</name>
133884                  <description>Disable RDRF assertion due to partially filled FIFO when receiver is idle.</description>
133885                  <value>#000</value>
133886                </enumeratedValue>
133887                <enumeratedValue>
133888                  <name>001</name>
133889                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character.</description>
133890                  <value>#001</value>
133891                </enumeratedValue>
133892                <enumeratedValue>
133893                  <name>010</name>
133894                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters.</description>
133895                  <value>#010</value>
133896                </enumeratedValue>
133897                <enumeratedValue>
133898                  <name>011</name>
133899                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters.</description>
133900                  <value>#011</value>
133901                </enumeratedValue>
133902                <enumeratedValue>
133903                  <name>100</name>
133904                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters.</description>
133905                  <value>#100</value>
133906                </enumeratedValue>
133907                <enumeratedValue>
133908                  <name>101</name>
133909                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters.</description>
133910                  <value>#101</value>
133911                </enumeratedValue>
133912                <enumeratedValue>
133913                  <name>110</name>
133914                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters.</description>
133915                  <value>#110</value>
133916                </enumeratedValue>
133917                <enumeratedValue>
133918                  <name>111</name>
133919                  <description>Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters.</description>
133920                  <value>#111</value>
133921                </enumeratedValue>
133922              </enumeratedValues>
133923            </field>
133924            <field>
133925              <name>RXFLUSH</name>
133926              <description>Receive FIFO/Buffer Flush</description>
133927              <bitOffset>14</bitOffset>
133928              <bitWidth>1</bitWidth>
133929              <access>write-only</access>
133930              <enumeratedValues>
133931                <enumeratedValue>
133932                  <name>0</name>
133933                  <description>No flush operation occurs.</description>
133934                  <value>#0</value>
133935                </enumeratedValue>
133936                <enumeratedValue>
133937                  <name>1</name>
133938                  <description>All data in the receive FIFO/buffer is cleared out.</description>
133939                  <value>#1</value>
133940                </enumeratedValue>
133941              </enumeratedValues>
133942            </field>
133943            <field>
133944              <name>TXFLUSH</name>
133945              <description>Transmit FIFO/Buffer Flush</description>
133946              <bitOffset>15</bitOffset>
133947              <bitWidth>1</bitWidth>
133948              <access>write-only</access>
133949              <enumeratedValues>
133950                <enumeratedValue>
133951                  <name>0</name>
133952                  <description>No flush operation occurs.</description>
133953                  <value>#0</value>
133954                </enumeratedValue>
133955                <enumeratedValue>
133956                  <name>1</name>
133957                  <description>All data in the transmit FIFO/Buffer is cleared out.</description>
133958                  <value>#1</value>
133959                </enumeratedValue>
133960              </enumeratedValues>
133961            </field>
133962            <field>
133963              <name>RXUF</name>
133964              <description>Receiver Buffer Underflow Flag</description>
133965              <bitOffset>16</bitOffset>
133966              <bitWidth>1</bitWidth>
133967              <access>read-write</access>
133968              <enumeratedValues>
133969                <enumeratedValue>
133970                  <name>0</name>
133971                  <description>No receive buffer underflow has occurred since the last time the flag was cleared.</description>
133972                  <value>#0</value>
133973                </enumeratedValue>
133974                <enumeratedValue>
133975                  <name>1</name>
133976                  <description>At least one receive buffer underflow has occurred since the last time the flag was cleared.</description>
133977                  <value>#1</value>
133978                </enumeratedValue>
133979              </enumeratedValues>
133980            </field>
133981            <field>
133982              <name>TXOF</name>
133983              <description>Transmitter Buffer Overflow Flag</description>
133984              <bitOffset>17</bitOffset>
133985              <bitWidth>1</bitWidth>
133986              <access>read-write</access>
133987              <enumeratedValues>
133988                <enumeratedValue>
133989                  <name>0</name>
133990                  <description>No transmit buffer overflow has occurred since the last time the flag was cleared.</description>
133991                  <value>#0</value>
133992                </enumeratedValue>
133993                <enumeratedValue>
133994                  <name>1</name>
133995                  <description>At least one transmit buffer overflow has occurred since the last time the flag was cleared.</description>
133996                  <value>#1</value>
133997                </enumeratedValue>
133998              </enumeratedValues>
133999            </field>
134000            <field>
134001              <name>RXEMPT</name>
134002              <description>Receive Buffer/FIFO Empty</description>
134003              <bitOffset>22</bitOffset>
134004              <bitWidth>1</bitWidth>
134005              <access>read-only</access>
134006              <enumeratedValues>
134007                <enumeratedValue>
134008                  <name>0</name>
134009                  <description>Receive buffer is not empty.</description>
134010                  <value>#0</value>
134011                </enumeratedValue>
134012                <enumeratedValue>
134013                  <name>1</name>
134014                  <description>Receive buffer is empty.</description>
134015                  <value>#1</value>
134016                </enumeratedValue>
134017              </enumeratedValues>
134018            </field>
134019            <field>
134020              <name>TXEMPT</name>
134021              <description>Transmit Buffer/FIFO Empty</description>
134022              <bitOffset>23</bitOffset>
134023              <bitWidth>1</bitWidth>
134024              <access>read-only</access>
134025              <enumeratedValues>
134026                <enumeratedValue>
134027                  <name>0</name>
134028                  <description>Transmit buffer is not empty.</description>
134029                  <value>#0</value>
134030                </enumeratedValue>
134031                <enumeratedValue>
134032                  <name>1</name>
134033                  <description>Transmit buffer is empty.</description>
134034                  <value>#1</value>
134035                </enumeratedValue>
134036              </enumeratedValues>
134037            </field>
134038          </fields>
134039        </register>
134040        <register>
134041          <name>WATER</name>
134042          <description>LPUART Watermark Register</description>
134043          <addressOffset>0x1C</addressOffset>
134044          <size>32</size>
134045          <access>read-write</access>
134046          <resetValue>0</resetValue>
134047          <resetMask>0xFFFFFFFF</resetMask>
134048          <fields>
134049            <field>
134050              <name>TXWATER</name>
134051              <description>Transmit Watermark</description>
134052              <bitOffset>0</bitOffset>
134053              <bitWidth>8</bitWidth>
134054              <access>read-write</access>
134055            </field>
134056            <field>
134057              <name>TXCOUNT</name>
134058              <description>Transmit Counter</description>
134059              <bitOffset>8</bitOffset>
134060              <bitWidth>8</bitWidth>
134061              <access>read-only</access>
134062            </field>
134063            <field>
134064              <name>RXWATER</name>
134065              <description>Receive Watermark</description>
134066              <bitOffset>16</bitOffset>
134067              <bitWidth>8</bitWidth>
134068              <access>read-write</access>
134069            </field>
134070            <field>
134071              <name>RXCOUNT</name>
134072              <description>Receive Counter</description>
134073              <bitOffset>24</bitOffset>
134074              <bitWidth>8</bitWidth>
134075              <access>read-only</access>
134076            </field>
134077          </fields>
134078        </register>
134079      </registers>
134080    </peripheral>
134081    <peripheral>
134082      <name>TPM1</name>
134083      <description>Timer/PWM Module</description>
134084      <groupName>TPM</groupName>
134085      <prependToName>TPM1_</prependToName>
134086      <baseAddress>0x400C9000</baseAddress>
134087      <addressBlock>
134088        <offset>0</offset>
134089        <size>0x88</size>
134090        <usage>registers</usage>
134091      </addressBlock>
134092      <interrupt>
134093        <name>TPM1</name>
134094        <value>88</value>
134095      </interrupt>
134096      <registers>
134097        <register>
134098          <name>SC</name>
134099          <description>Status and Control</description>
134100          <addressOffset>0</addressOffset>
134101          <size>32</size>
134102          <access>read-write</access>
134103          <resetValue>0</resetValue>
134104          <resetMask>0xFFFFFFFF</resetMask>
134105          <fields>
134106            <field>
134107              <name>PS</name>
134108              <description>Prescale Factor Selection</description>
134109              <bitOffset>0</bitOffset>
134110              <bitWidth>3</bitWidth>
134111              <access>read-write</access>
134112              <enumeratedValues>
134113                <enumeratedValue>
134114                  <name>000</name>
134115                  <description>Divide by 1</description>
134116                  <value>#000</value>
134117                </enumeratedValue>
134118                <enumeratedValue>
134119                  <name>001</name>
134120                  <description>Divide by 2</description>
134121                  <value>#001</value>
134122                </enumeratedValue>
134123                <enumeratedValue>
134124                  <name>010</name>
134125                  <description>Divide by 4</description>
134126                  <value>#010</value>
134127                </enumeratedValue>
134128                <enumeratedValue>
134129                  <name>011</name>
134130                  <description>Divide by 8</description>
134131                  <value>#011</value>
134132                </enumeratedValue>
134133                <enumeratedValue>
134134                  <name>100</name>
134135                  <description>Divide by 16</description>
134136                  <value>#100</value>
134137                </enumeratedValue>
134138                <enumeratedValue>
134139                  <name>101</name>
134140                  <description>Divide by 32</description>
134141                  <value>#101</value>
134142                </enumeratedValue>
134143                <enumeratedValue>
134144                  <name>110</name>
134145                  <description>Divide by 64</description>
134146                  <value>#110</value>
134147                </enumeratedValue>
134148                <enumeratedValue>
134149                  <name>111</name>
134150                  <description>Divide by 128</description>
134151                  <value>#111</value>
134152                </enumeratedValue>
134153              </enumeratedValues>
134154            </field>
134155            <field>
134156              <name>CMOD</name>
134157              <description>Clock Mode Selection</description>
134158              <bitOffset>3</bitOffset>
134159              <bitWidth>2</bitWidth>
134160              <access>read-write</access>
134161              <enumeratedValues>
134162                <enumeratedValue>
134163                  <name>00</name>
134164                  <description>TPM counter is disabled</description>
134165                  <value>#00</value>
134166                </enumeratedValue>
134167                <enumeratedValue>
134168                  <name>01</name>
134169                  <description>TPM counter increments on every TPM counter clock</description>
134170                  <value>#01</value>
134171                </enumeratedValue>
134172                <enumeratedValue>
134173                  <name>10</name>
134174                  <description>TPM counter increments on rising edge of TPM_EXTCLK synchronized to the TPM counter clock</description>
134175                  <value>#10</value>
134176                </enumeratedValue>
134177              </enumeratedValues>
134178            </field>
134179            <field>
134180              <name>CPWMS</name>
134181              <description>Center-Aligned PWM Select</description>
134182              <bitOffset>5</bitOffset>
134183              <bitWidth>1</bitWidth>
134184              <access>read-write</access>
134185              <enumeratedValues>
134186                <enumeratedValue>
134187                  <name>0</name>
134188                  <description>TPM counter operates in up counting mode.</description>
134189                  <value>#0</value>
134190                </enumeratedValue>
134191                <enumeratedValue>
134192                  <name>1</name>
134193                  <description>TPM counter operates in up-down counting mode.</description>
134194                  <value>#1</value>
134195                </enumeratedValue>
134196              </enumeratedValues>
134197            </field>
134198            <field>
134199              <name>TOIE</name>
134200              <description>Timer Overflow Interrupt Enable</description>
134201              <bitOffset>6</bitOffset>
134202              <bitWidth>1</bitWidth>
134203              <access>read-write</access>
134204              <enumeratedValues>
134205                <enumeratedValue>
134206                  <name>0</name>
134207                  <description>Disable TOF interrupts. Use software polling or DMA request.</description>
134208                  <value>#0</value>
134209                </enumeratedValue>
134210                <enumeratedValue>
134211                  <name>1</name>
134212                  <description>Enable TOF interrupts. An interrupt is generated when TOF equals one.</description>
134213                  <value>#1</value>
134214                </enumeratedValue>
134215              </enumeratedValues>
134216            </field>
134217            <field>
134218              <name>TOF</name>
134219              <description>Timer Overflow Flag</description>
134220              <bitOffset>7</bitOffset>
134221              <bitWidth>1</bitWidth>
134222              <access>read-write</access>
134223              <enumeratedValues>
134224                <enumeratedValue>
134225                  <name>0</name>
134226                  <description>TPM counter has not overflowed.</description>
134227                  <value>#0</value>
134228                </enumeratedValue>
134229                <enumeratedValue>
134230                  <name>1</name>
134231                  <description>TPM counter has overflowed.</description>
134232                  <value>#1</value>
134233                </enumeratedValue>
134234              </enumeratedValues>
134235            </field>
134236            <field>
134237              <name>DMA</name>
134238              <description>DMA Enable</description>
134239              <bitOffset>8</bitOffset>
134240              <bitWidth>1</bitWidth>
134241              <access>read-write</access>
134242              <enumeratedValues>
134243                <enumeratedValue>
134244                  <name>0</name>
134245                  <description>Disables DMA transfers.</description>
134246                  <value>#0</value>
134247                </enumeratedValue>
134248                <enumeratedValue>
134249                  <name>1</name>
134250                  <description>Enables DMA transfers.</description>
134251                  <value>#1</value>
134252                </enumeratedValue>
134253              </enumeratedValues>
134254            </field>
134255          </fields>
134256        </register>
134257        <register>
134258          <name>CNT</name>
134259          <description>Counter</description>
134260          <addressOffset>0x4</addressOffset>
134261          <size>32</size>
134262          <access>read-write</access>
134263          <resetValue>0</resetValue>
134264          <resetMask>0xFFFFFFFF</resetMask>
134265          <fields>
134266            <field>
134267              <name>COUNT</name>
134268              <description>Counter value</description>
134269              <bitOffset>0</bitOffset>
134270              <bitWidth>16</bitWidth>
134271              <access>read-write</access>
134272            </field>
134273          </fields>
134274        </register>
134275        <register>
134276          <name>MOD</name>
134277          <description>Modulo</description>
134278          <addressOffset>0x8</addressOffset>
134279          <size>32</size>
134280          <access>read-write</access>
134281          <resetValue>0xFFFF</resetValue>
134282          <resetMask>0xFFFFFFFF</resetMask>
134283          <fields>
134284            <field>
134285              <name>MOD</name>
134286              <description>Modulo value</description>
134287              <bitOffset>0</bitOffset>
134288              <bitWidth>16</bitWidth>
134289              <access>read-write</access>
134290            </field>
134291          </fields>
134292        </register>
134293        <register>
134294          <dim>2</dim>
134295          <dimIncrement>0x8</dimIncrement>
134296          <dimIndex>0,1</dimIndex>
134297          <name>C%sSC</name>
134298          <description>Channel (n) Status and Control</description>
134299          <addressOffset>0xC</addressOffset>
134300          <size>32</size>
134301          <access>read-write</access>
134302          <resetValue>0</resetValue>
134303          <resetMask>0xFFFFFFFF</resetMask>
134304          <fields>
134305            <field>
134306              <name>DMA</name>
134307              <description>DMA Enable</description>
134308              <bitOffset>0</bitOffset>
134309              <bitWidth>1</bitWidth>
134310              <access>read-write</access>
134311              <enumeratedValues>
134312                <enumeratedValue>
134313                  <name>0</name>
134314                  <description>Disable DMA transfers.</description>
134315                  <value>#0</value>
134316                </enumeratedValue>
134317                <enumeratedValue>
134318                  <name>1</name>
134319                  <description>Enable DMA transfers.</description>
134320                  <value>#1</value>
134321                </enumeratedValue>
134322              </enumeratedValues>
134323            </field>
134324            <field>
134325              <name>ELSA</name>
134326              <description>Edge or Level Select</description>
134327              <bitOffset>2</bitOffset>
134328              <bitWidth>1</bitWidth>
134329              <access>read-write</access>
134330            </field>
134331            <field>
134332              <name>ELSB</name>
134333              <description>Edge or Level Select</description>
134334              <bitOffset>3</bitOffset>
134335              <bitWidth>1</bitWidth>
134336              <access>read-write</access>
134337            </field>
134338            <field>
134339              <name>MSA</name>
134340              <description>Channel Mode Select</description>
134341              <bitOffset>4</bitOffset>
134342              <bitWidth>1</bitWidth>
134343              <access>read-write</access>
134344            </field>
134345            <field>
134346              <name>MSB</name>
134347              <description>Channel Mode Select</description>
134348              <bitOffset>5</bitOffset>
134349              <bitWidth>1</bitWidth>
134350              <access>read-write</access>
134351            </field>
134352            <field>
134353              <name>CHIE</name>
134354              <description>Channel Interrupt Enable</description>
134355              <bitOffset>6</bitOffset>
134356              <bitWidth>1</bitWidth>
134357              <access>read-write</access>
134358              <enumeratedValues>
134359                <enumeratedValue>
134360                  <name>0</name>
134361                  <description>Disable channel interrupts.</description>
134362                  <value>#0</value>
134363                </enumeratedValue>
134364                <enumeratedValue>
134365                  <name>1</name>
134366                  <description>Enable channel interrupts.</description>
134367                  <value>#1</value>
134368                </enumeratedValue>
134369              </enumeratedValues>
134370            </field>
134371            <field>
134372              <name>CHF</name>
134373              <description>Channel Flag</description>
134374              <bitOffset>7</bitOffset>
134375              <bitWidth>1</bitWidth>
134376              <access>read-write</access>
134377              <enumeratedValues>
134378                <enumeratedValue>
134379                  <name>0</name>
134380                  <description>No channel event has occurred.</description>
134381                  <value>#0</value>
134382                </enumeratedValue>
134383                <enumeratedValue>
134384                  <name>1</name>
134385                  <description>A channel event has occurred.</description>
134386                  <value>#1</value>
134387                </enumeratedValue>
134388              </enumeratedValues>
134389            </field>
134390          </fields>
134391        </register>
134392        <register>
134393          <dim>2</dim>
134394          <dimIncrement>0x8</dimIncrement>
134395          <dimIndex>0,1</dimIndex>
134396          <name>C%sV</name>
134397          <description>Channel (n) Value</description>
134398          <addressOffset>0x10</addressOffset>
134399          <size>32</size>
134400          <access>read-write</access>
134401          <resetValue>0</resetValue>
134402          <resetMask>0xFFFFFFFF</resetMask>
134403          <fields>
134404            <field>
134405              <name>VAL</name>
134406              <description>Channel Value</description>
134407              <bitOffset>0</bitOffset>
134408              <bitWidth>16</bitWidth>
134409              <access>read-write</access>
134410            </field>
134411          </fields>
134412        </register>
134413        <register>
134414          <name>STATUS</name>
134415          <description>Capture and Compare Status</description>
134416          <addressOffset>0x50</addressOffset>
134417          <size>32</size>
134418          <access>read-write</access>
134419          <resetValue>0</resetValue>
134420          <resetMask>0xFFFFFFFF</resetMask>
134421          <fields>
134422            <field>
134423              <name>CH0F</name>
134424              <description>Channel 0 Flag</description>
134425              <bitOffset>0</bitOffset>
134426              <bitWidth>1</bitWidth>
134427              <access>read-write</access>
134428              <enumeratedValues>
134429                <enumeratedValue>
134430                  <name>0</name>
134431                  <description>No channel event has occurred.</description>
134432                  <value>#0</value>
134433                </enumeratedValue>
134434                <enumeratedValue>
134435                  <name>1</name>
134436                  <description>A channel event has occurred.</description>
134437                  <value>#1</value>
134438                </enumeratedValue>
134439              </enumeratedValues>
134440            </field>
134441            <field>
134442              <name>CH1F</name>
134443              <description>Channel 1 Flag</description>
134444              <bitOffset>1</bitOffset>
134445              <bitWidth>1</bitWidth>
134446              <access>read-write</access>
134447              <enumeratedValues>
134448                <enumeratedValue>
134449                  <name>0</name>
134450                  <description>No channel event has occurred.</description>
134451                  <value>#0</value>
134452                </enumeratedValue>
134453                <enumeratedValue>
134454                  <name>1</name>
134455                  <description>A channel event has occurred.</description>
134456                  <value>#1</value>
134457                </enumeratedValue>
134458              </enumeratedValues>
134459            </field>
134460            <field>
134461              <name>TOF</name>
134462              <description>Timer Overflow Flag</description>
134463              <bitOffset>8</bitOffset>
134464              <bitWidth>1</bitWidth>
134465              <access>read-write</access>
134466              <enumeratedValues>
134467                <enumeratedValue>
134468                  <name>0</name>
134469                  <description>TPM counter has not overflowed.</description>
134470                  <value>#0</value>
134471                </enumeratedValue>
134472                <enumeratedValue>
134473                  <name>1</name>
134474                  <description>TPM counter has overflowed.</description>
134475                  <value>#1</value>
134476                </enumeratedValue>
134477              </enumeratedValues>
134478            </field>
134479          </fields>
134480        </register>
134481        <register>
134482          <name>COMBINE</name>
134483          <description>Combine Channel Register</description>
134484          <addressOffset>0x64</addressOffset>
134485          <size>32</size>
134486          <access>read-write</access>
134487          <resetValue>0</resetValue>
134488          <resetMask>0xFFFFFFFF</resetMask>
134489          <fields>
134490            <field>
134491              <name>COMBINE0</name>
134492              <description>Combine Channels 0 and 1</description>
134493              <bitOffset>0</bitOffset>
134494              <bitWidth>1</bitWidth>
134495              <access>read-write</access>
134496              <enumeratedValues>
134497                <enumeratedValue>
134498                  <name>0</name>
134499                  <description>Channels 0 and 1 are independent.</description>
134500                  <value>#0</value>
134501                </enumeratedValue>
134502                <enumeratedValue>
134503                  <name>1</name>
134504                  <description>Channels 0 and 1 are combined.</description>
134505                  <value>#1</value>
134506                </enumeratedValue>
134507              </enumeratedValues>
134508            </field>
134509            <field>
134510              <name>COMSWAP0</name>
134511              <description>Combine Channel 0 and 1 Swap</description>
134512              <bitOffset>1</bitOffset>
134513              <bitWidth>1</bitWidth>
134514              <access>read-write</access>
134515              <enumeratedValues>
134516                <enumeratedValue>
134517                  <name>0</name>
134518                  <description>Even channel is used for input capture and 1st compare.</description>
134519                  <value>#0</value>
134520                </enumeratedValue>
134521                <enumeratedValue>
134522                  <name>1</name>
134523                  <description>Odd channel is used for input capture and 1st compare.</description>
134524                  <value>#1</value>
134525                </enumeratedValue>
134526              </enumeratedValues>
134527            </field>
134528          </fields>
134529        </register>
134530        <register>
134531          <name>POL</name>
134532          <description>Channel Polarity</description>
134533          <addressOffset>0x70</addressOffset>
134534          <size>32</size>
134535          <access>read-write</access>
134536          <resetValue>0</resetValue>
134537          <resetMask>0xFFFFFFFF</resetMask>
134538          <fields>
134539            <field>
134540              <name>POL0</name>
134541              <description>Channel 0 Polarity</description>
134542              <bitOffset>0</bitOffset>
134543              <bitWidth>1</bitWidth>
134544              <access>read-write</access>
134545              <enumeratedValues>
134546                <enumeratedValue>
134547                  <name>0</name>
134548                  <description>The channel polarity is active high.</description>
134549                  <value>#0</value>
134550                </enumeratedValue>
134551                <enumeratedValue>
134552                  <name>1</name>
134553                  <description>The channel polarity is active low.</description>
134554                  <value>#1</value>
134555                </enumeratedValue>
134556              </enumeratedValues>
134557            </field>
134558            <field>
134559              <name>POL1</name>
134560              <description>Channel 1 Polarity</description>
134561              <bitOffset>1</bitOffset>
134562              <bitWidth>1</bitWidth>
134563              <access>read-write</access>
134564              <enumeratedValues>
134565                <enumeratedValue>
134566                  <name>0</name>
134567                  <description>The channel polarity is active high.</description>
134568                  <value>#0</value>
134569                </enumeratedValue>
134570                <enumeratedValue>
134571                  <name>1</name>
134572                  <description>The channel polarity is active low.</description>
134573                  <value>#1</value>
134574                </enumeratedValue>
134575              </enumeratedValues>
134576            </field>
134577          </fields>
134578        </register>
134579        <register>
134580          <name>FILTER</name>
134581          <description>Filter Control</description>
134582          <addressOffset>0x78</addressOffset>
134583          <size>32</size>
134584          <access>read-write</access>
134585          <resetValue>0</resetValue>
134586          <resetMask>0xFFFFFFFF</resetMask>
134587          <fields>
134588            <field>
134589              <name>CH0FVAL</name>
134590              <description>Channel 0 Filter Value</description>
134591              <bitOffset>0</bitOffset>
134592              <bitWidth>4</bitWidth>
134593              <access>read-write</access>
134594            </field>
134595            <field>
134596              <name>CH1FVAL</name>
134597              <description>Channel 1 Filter Value</description>
134598              <bitOffset>4</bitOffset>
134599              <bitWidth>4</bitWidth>
134600              <access>read-write</access>
134601            </field>
134602          </fields>
134603        </register>
134604        <register>
134605          <name>QDCTRL</name>
134606          <description>Quadrature Decoder Control and Status</description>
134607          <addressOffset>0x80</addressOffset>
134608          <size>32</size>
134609          <access>read-write</access>
134610          <resetValue>0</resetValue>
134611          <resetMask>0xFFFFFFFF</resetMask>
134612          <fields>
134613            <field>
134614              <name>QUADEN</name>
134615              <description>Enables the quadrature decoder mode</description>
134616              <bitOffset>0</bitOffset>
134617              <bitWidth>1</bitWidth>
134618              <access>read-write</access>
134619              <enumeratedValues>
134620                <enumeratedValue>
134621                  <name>0</name>
134622                  <description>Quadrature decoder mode is disabled.</description>
134623                  <value>#0</value>
134624                </enumeratedValue>
134625                <enumeratedValue>
134626                  <name>1</name>
134627                  <description>Quadrature decoder mode is enabled.</description>
134628                  <value>#1</value>
134629                </enumeratedValue>
134630              </enumeratedValues>
134631            </field>
134632            <field>
134633              <name>TOFDIR</name>
134634              <description>Indicates if the TOF bit was set on the top or the bottom of counting.</description>
134635              <bitOffset>1</bitOffset>
134636              <bitWidth>1</bitWidth>
134637              <access>read-only</access>
134638              <enumeratedValues>
134639                <enumeratedValue>
134640                  <name>0</name>
134641                  <description>TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter changes from its minimum value (zero) to its maximum value (MOD register).</description>
134642                  <value>#0</value>
134643                </enumeratedValue>
134644                <enumeratedValue>
134645                  <name>1</name>
134646                  <description>TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter changes from its maximum value (MOD register) to its minimum value (zero).</description>
134647                  <value>#1</value>
134648                </enumeratedValue>
134649              </enumeratedValues>
134650            </field>
134651            <field>
134652              <name>QUADIR</name>
134653              <description>Counter Direction in Quadrature Decode Mode</description>
134654              <bitOffset>2</bitOffset>
134655              <bitWidth>1</bitWidth>
134656              <access>read-only</access>
134657              <enumeratedValues>
134658                <enumeratedValue>
134659                  <name>0</name>
134660                  <description>Counter direction is decreasing (counter decrement).</description>
134661                  <value>#0</value>
134662                </enumeratedValue>
134663                <enumeratedValue>
134664                  <name>1</name>
134665                  <description>Counter direction is increasing (counter increment).</description>
134666                  <value>#1</value>
134667                </enumeratedValue>
134668              </enumeratedValues>
134669            </field>
134670            <field>
134671              <name>QUADMODE</name>
134672              <description>Quadrature Decoder Mode</description>
134673              <bitOffset>3</bitOffset>
134674              <bitWidth>1</bitWidth>
134675              <access>read-write</access>
134676              <enumeratedValues>
134677                <enumeratedValue>
134678                  <name>0</name>
134679                  <description>Phase encoding mode.</description>
134680                  <value>#0</value>
134681                </enumeratedValue>
134682                <enumeratedValue>
134683                  <name>1</name>
134684                  <description>Count and direction encoding mode.</description>
134685                  <value>#1</value>
134686                </enumeratedValue>
134687              </enumeratedValues>
134688            </field>
134689          </fields>
134690        </register>
134691        <register>
134692          <name>CONF</name>
134693          <description>Configuration</description>
134694          <addressOffset>0x84</addressOffset>
134695          <size>32</size>
134696          <access>read-write</access>
134697          <resetValue>0</resetValue>
134698          <resetMask>0xFFFFFFFF</resetMask>
134699          <fields>
134700            <field>
134701              <name>DOZEEN</name>
134702              <description>Doze Enable</description>
134703              <bitOffset>5</bitOffset>
134704              <bitWidth>1</bitWidth>
134705              <access>read-write</access>
134706              <enumeratedValues>
134707                <enumeratedValue>
134708                  <name>0</name>
134709                  <description>Internal TPM counter continues in Doze mode.</description>
134710                  <value>#0</value>
134711                </enumeratedValue>
134712                <enumeratedValue>
134713                  <name>1</name>
134714                  <description>Internal TPM counter is paused and does not increment during Doze mode. Trigger inputs and input capture events are also ignored.</description>
134715                  <value>#1</value>
134716                </enumeratedValue>
134717              </enumeratedValues>
134718            </field>
134719            <field>
134720              <name>DBGMODE</name>
134721              <description>Debug Mode</description>
134722              <bitOffset>6</bitOffset>
134723              <bitWidth>2</bitWidth>
134724              <access>read-write</access>
134725              <enumeratedValues>
134726                <enumeratedValue>
134727                  <name>00</name>
134728                  <description>TPM counter is paused and does not increment during debug mode. Trigger inputs and input capture events are also ignored.</description>
134729                  <value>#00</value>
134730                </enumeratedValue>
134731                <enumeratedValue>
134732                  <name>11</name>
134733                  <description>TPM counter continues in debug mode.</description>
134734                  <value>#11</value>
134735                </enumeratedValue>
134736              </enumeratedValues>
134737            </field>
134738            <field>
134739              <name>GTBSYNC</name>
134740              <description>Global Time Base Synchronization</description>
134741              <bitOffset>8</bitOffset>
134742              <bitWidth>1</bitWidth>
134743              <access>read-write</access>
134744              <enumeratedValues>
134745                <enumeratedValue>
134746                  <name>0</name>
134747                  <description>Global timebase synchronization disabled.</description>
134748                  <value>#0</value>
134749                </enumeratedValue>
134750                <enumeratedValue>
134751                  <name>1</name>
134752                  <description>Global timebase synchronization enabled.</description>
134753                  <value>#1</value>
134754                </enumeratedValue>
134755              </enumeratedValues>
134756            </field>
134757            <field>
134758              <name>GTBEEN</name>
134759              <description>Global time base enable</description>
134760              <bitOffset>9</bitOffset>
134761              <bitWidth>1</bitWidth>
134762              <access>read-write</access>
134763              <enumeratedValues>
134764                <enumeratedValue>
134765                  <name>0</name>
134766                  <description>All channels use the internally generated TPM counter as their timebase</description>
134767                  <value>#0</value>
134768                </enumeratedValue>
134769                <enumeratedValue>
134770                  <name>1</name>
134771                  <description>All channels use an externally generated global timebase as their timebase</description>
134772                  <value>#1</value>
134773                </enumeratedValue>
134774              </enumeratedValues>
134775            </field>
134776            <field>
134777              <name>CSOT</name>
134778              <description>Counter Start on Trigger</description>
134779              <bitOffset>16</bitOffset>
134780              <bitWidth>1</bitWidth>
134781              <access>read-write</access>
134782              <enumeratedValues>
134783                <enumeratedValue>
134784                  <name>0</name>
134785                  <description>TPM counter starts to increment immediately, once it is enabled.</description>
134786                  <value>#0</value>
134787                </enumeratedValue>
134788                <enumeratedValue>
134789                  <name>1</name>
134790                  <description>TPM counter only starts to increment when it a rising edge on the selected input trigger is detected, after it has been enabled or after it has stopped due to overflow.</description>
134791                  <value>#1</value>
134792                </enumeratedValue>
134793              </enumeratedValues>
134794            </field>
134795            <field>
134796              <name>CSOO</name>
134797              <description>Counter Stop On Overflow</description>
134798              <bitOffset>17</bitOffset>
134799              <bitWidth>1</bitWidth>
134800              <access>read-write</access>
134801              <enumeratedValues>
134802                <enumeratedValue>
134803                  <name>0</name>
134804                  <description>TPM counter continues incrementing or decrementing after overflow</description>
134805                  <value>#0</value>
134806                </enumeratedValue>
134807                <enumeratedValue>
134808                  <name>1</name>
134809                  <description>TPM counter stops incrementing or decrementing after overflow.</description>
134810                  <value>#1</value>
134811                </enumeratedValue>
134812              </enumeratedValues>
134813            </field>
134814            <field>
134815              <name>CROT</name>
134816              <description>Counter Reload On Trigger</description>
134817              <bitOffset>18</bitOffset>
134818              <bitWidth>1</bitWidth>
134819              <access>read-write</access>
134820              <enumeratedValues>
134821                <enumeratedValue>
134822                  <name>0</name>
134823                  <description>Counter is not reloaded due to a rising edge on the selected input trigger</description>
134824                  <value>#0</value>
134825                </enumeratedValue>
134826                <enumeratedValue>
134827                  <name>1</name>
134828                  <description>Counter is reloaded when a rising edge is detected on the selected input trigger</description>
134829                  <value>#1</value>
134830                </enumeratedValue>
134831              </enumeratedValues>
134832            </field>
134833            <field>
134834              <name>CPOT</name>
134835              <description>Counter Pause On Trigger</description>
134836              <bitOffset>19</bitOffset>
134837              <bitWidth>1</bitWidth>
134838              <access>read-write</access>
134839            </field>
134840            <field>
134841              <name>TRGPOL</name>
134842              <description>Trigger Polarity</description>
134843              <bitOffset>22</bitOffset>
134844              <bitWidth>1</bitWidth>
134845              <access>read-write</access>
134846              <enumeratedValues>
134847                <enumeratedValue>
134848                  <name>0</name>
134849                  <description>Trigger is active high.</description>
134850                  <value>#0</value>
134851                </enumeratedValue>
134852                <enumeratedValue>
134853                  <name>1</name>
134854                  <description>Trigger is active low.</description>
134855                  <value>#1</value>
134856                </enumeratedValue>
134857              </enumeratedValues>
134858            </field>
134859            <field>
134860              <name>TRGSRC</name>
134861              <description>Trigger Source</description>
134862              <bitOffset>23</bitOffset>
134863              <bitWidth>1</bitWidth>
134864              <access>read-write</access>
134865              <enumeratedValues>
134866                <enumeratedValue>
134867                  <name>0</name>
134868                  <description>Trigger source selected by TRGSEL is external.</description>
134869                  <value>#0</value>
134870                </enumeratedValue>
134871                <enumeratedValue>
134872                  <name>1</name>
134873                  <description>Trigger source selected by TRGSEL is internal (channel pin input capture).</description>
134874                  <value>#1</value>
134875                </enumeratedValue>
134876              </enumeratedValues>
134877            </field>
134878            <field>
134879              <name>TRGSEL</name>
134880              <description>Trigger Select</description>
134881              <bitOffset>24</bitOffset>
134882              <bitWidth>4</bitWidth>
134883              <access>read-write</access>
134884              <enumeratedValues>
134885                <enumeratedValue>
134886                  <name>0001</name>
134887                  <description>Channel 0 pin input capture</description>
134888                  <value>#0001</value>
134889                </enumeratedValue>
134890                <enumeratedValue>
134891                  <name>0010</name>
134892                  <description>Channel 1 pin input capture</description>
134893                  <value>#0010</value>
134894                </enumeratedValue>
134895                <enumeratedValue>
134896                  <name>0011</name>
134897                  <description>Channel 0 or Channel 1 pin input capture</description>
134898                  <value>#0011</value>
134899                </enumeratedValue>
134900              </enumeratedValues>
134901            </field>
134902          </fields>
134903        </register>
134904      </registers>
134905    </peripheral>
134906    <peripheral>
134907      <name>TPM2</name>
134908      <description>Timer/PWM Module</description>
134909      <groupName>TPM</groupName>
134910      <prependToName>TPM2_</prependToName>
134911      <baseAddress>0x400CA000</baseAddress>
134912      <addressBlock>
134913        <offset>0</offset>
134914        <size>0x88</size>
134915        <usage>registers</usage>
134916      </addressBlock>
134917      <interrupt>
134918        <name>TPM2</name>
134919        <value>89</value>
134920      </interrupt>
134921      <registers>
134922        <register>
134923          <name>SC</name>
134924          <description>Status and Control</description>
134925          <addressOffset>0</addressOffset>
134926          <size>32</size>
134927          <access>read-write</access>
134928          <resetValue>0</resetValue>
134929          <resetMask>0xFFFFFFFF</resetMask>
134930          <fields>
134931            <field>
134932              <name>PS</name>
134933              <description>Prescale Factor Selection</description>
134934              <bitOffset>0</bitOffset>
134935              <bitWidth>3</bitWidth>
134936              <access>read-write</access>
134937              <enumeratedValues>
134938                <enumeratedValue>
134939                  <name>000</name>
134940                  <description>Divide by 1</description>
134941                  <value>#000</value>
134942                </enumeratedValue>
134943                <enumeratedValue>
134944                  <name>001</name>
134945                  <description>Divide by 2</description>
134946                  <value>#001</value>
134947                </enumeratedValue>
134948                <enumeratedValue>
134949                  <name>010</name>
134950                  <description>Divide by 4</description>
134951                  <value>#010</value>
134952                </enumeratedValue>
134953                <enumeratedValue>
134954                  <name>011</name>
134955                  <description>Divide by 8</description>
134956                  <value>#011</value>
134957                </enumeratedValue>
134958                <enumeratedValue>
134959                  <name>100</name>
134960                  <description>Divide by 16</description>
134961                  <value>#100</value>
134962                </enumeratedValue>
134963                <enumeratedValue>
134964                  <name>101</name>
134965                  <description>Divide by 32</description>
134966                  <value>#101</value>
134967                </enumeratedValue>
134968                <enumeratedValue>
134969                  <name>110</name>
134970                  <description>Divide by 64</description>
134971                  <value>#110</value>
134972                </enumeratedValue>
134973                <enumeratedValue>
134974                  <name>111</name>
134975                  <description>Divide by 128</description>
134976                  <value>#111</value>
134977                </enumeratedValue>
134978              </enumeratedValues>
134979            </field>
134980            <field>
134981              <name>CMOD</name>
134982              <description>Clock Mode Selection</description>
134983              <bitOffset>3</bitOffset>
134984              <bitWidth>2</bitWidth>
134985              <access>read-write</access>
134986              <enumeratedValues>
134987                <enumeratedValue>
134988                  <name>00</name>
134989                  <description>TPM counter is disabled</description>
134990                  <value>#00</value>
134991                </enumeratedValue>
134992                <enumeratedValue>
134993                  <name>01</name>
134994                  <description>TPM counter increments on every TPM counter clock</description>
134995                  <value>#01</value>
134996                </enumeratedValue>
134997                <enumeratedValue>
134998                  <name>10</name>
134999                  <description>TPM counter increments on rising edge of TPM_EXTCLK synchronized to the TPM counter clock</description>
135000                  <value>#10</value>
135001                </enumeratedValue>
135002              </enumeratedValues>
135003            </field>
135004            <field>
135005              <name>CPWMS</name>
135006              <description>Center-Aligned PWM Select</description>
135007              <bitOffset>5</bitOffset>
135008              <bitWidth>1</bitWidth>
135009              <access>read-write</access>
135010              <enumeratedValues>
135011                <enumeratedValue>
135012                  <name>0</name>
135013                  <description>TPM counter operates in up counting mode.</description>
135014                  <value>#0</value>
135015                </enumeratedValue>
135016                <enumeratedValue>
135017                  <name>1</name>
135018                  <description>TPM counter operates in up-down counting mode.</description>
135019                  <value>#1</value>
135020                </enumeratedValue>
135021              </enumeratedValues>
135022            </field>
135023            <field>
135024              <name>TOIE</name>
135025              <description>Timer Overflow Interrupt Enable</description>
135026              <bitOffset>6</bitOffset>
135027              <bitWidth>1</bitWidth>
135028              <access>read-write</access>
135029              <enumeratedValues>
135030                <enumeratedValue>
135031                  <name>0</name>
135032                  <description>Disable TOF interrupts. Use software polling or DMA request.</description>
135033                  <value>#0</value>
135034                </enumeratedValue>
135035                <enumeratedValue>
135036                  <name>1</name>
135037                  <description>Enable TOF interrupts. An interrupt is generated when TOF equals one.</description>
135038                  <value>#1</value>
135039                </enumeratedValue>
135040              </enumeratedValues>
135041            </field>
135042            <field>
135043              <name>TOF</name>
135044              <description>Timer Overflow Flag</description>
135045              <bitOffset>7</bitOffset>
135046              <bitWidth>1</bitWidth>
135047              <access>read-write</access>
135048              <enumeratedValues>
135049                <enumeratedValue>
135050                  <name>0</name>
135051                  <description>TPM counter has not overflowed.</description>
135052                  <value>#0</value>
135053                </enumeratedValue>
135054                <enumeratedValue>
135055                  <name>1</name>
135056                  <description>TPM counter has overflowed.</description>
135057                  <value>#1</value>
135058                </enumeratedValue>
135059              </enumeratedValues>
135060            </field>
135061            <field>
135062              <name>DMA</name>
135063              <description>DMA Enable</description>
135064              <bitOffset>8</bitOffset>
135065              <bitWidth>1</bitWidth>
135066              <access>read-write</access>
135067              <enumeratedValues>
135068                <enumeratedValue>
135069                  <name>0</name>
135070                  <description>Disables DMA transfers.</description>
135071                  <value>#0</value>
135072                </enumeratedValue>
135073                <enumeratedValue>
135074                  <name>1</name>
135075                  <description>Enables DMA transfers.</description>
135076                  <value>#1</value>
135077                </enumeratedValue>
135078              </enumeratedValues>
135079            </field>
135080          </fields>
135081        </register>
135082        <register>
135083          <name>CNT</name>
135084          <description>Counter</description>
135085          <addressOffset>0x4</addressOffset>
135086          <size>32</size>
135087          <access>read-write</access>
135088          <resetValue>0</resetValue>
135089          <resetMask>0xFFFFFFFF</resetMask>
135090          <fields>
135091            <field>
135092              <name>COUNT</name>
135093              <description>Counter value</description>
135094              <bitOffset>0</bitOffset>
135095              <bitWidth>16</bitWidth>
135096              <access>read-write</access>
135097            </field>
135098          </fields>
135099        </register>
135100        <register>
135101          <name>MOD</name>
135102          <description>Modulo</description>
135103          <addressOffset>0x8</addressOffset>
135104          <size>32</size>
135105          <access>read-write</access>
135106          <resetValue>0xFFFF</resetValue>
135107          <resetMask>0xFFFFFFFF</resetMask>
135108          <fields>
135109            <field>
135110              <name>MOD</name>
135111              <description>Modulo value</description>
135112              <bitOffset>0</bitOffset>
135113              <bitWidth>16</bitWidth>
135114              <access>read-write</access>
135115            </field>
135116          </fields>
135117        </register>
135118        <register>
135119          <dim>2</dim>
135120          <dimIncrement>0x8</dimIncrement>
135121          <dimIndex>0,1</dimIndex>
135122          <name>C%sSC</name>
135123          <description>Channel (n) Status and Control</description>
135124          <addressOffset>0xC</addressOffset>
135125          <size>32</size>
135126          <access>read-write</access>
135127          <resetValue>0</resetValue>
135128          <resetMask>0xFFFFFFFF</resetMask>
135129          <fields>
135130            <field>
135131              <name>DMA</name>
135132              <description>DMA Enable</description>
135133              <bitOffset>0</bitOffset>
135134              <bitWidth>1</bitWidth>
135135              <access>read-write</access>
135136              <enumeratedValues>
135137                <enumeratedValue>
135138                  <name>0</name>
135139                  <description>Disable DMA transfers.</description>
135140                  <value>#0</value>
135141                </enumeratedValue>
135142                <enumeratedValue>
135143                  <name>1</name>
135144                  <description>Enable DMA transfers.</description>
135145                  <value>#1</value>
135146                </enumeratedValue>
135147              </enumeratedValues>
135148            </field>
135149            <field>
135150              <name>ELSA</name>
135151              <description>Edge or Level Select</description>
135152              <bitOffset>2</bitOffset>
135153              <bitWidth>1</bitWidth>
135154              <access>read-write</access>
135155            </field>
135156            <field>
135157              <name>ELSB</name>
135158              <description>Edge or Level Select</description>
135159              <bitOffset>3</bitOffset>
135160              <bitWidth>1</bitWidth>
135161              <access>read-write</access>
135162            </field>
135163            <field>
135164              <name>MSA</name>
135165              <description>Channel Mode Select</description>
135166              <bitOffset>4</bitOffset>
135167              <bitWidth>1</bitWidth>
135168              <access>read-write</access>
135169            </field>
135170            <field>
135171              <name>MSB</name>
135172              <description>Channel Mode Select</description>
135173              <bitOffset>5</bitOffset>
135174              <bitWidth>1</bitWidth>
135175              <access>read-write</access>
135176            </field>
135177            <field>
135178              <name>CHIE</name>
135179              <description>Channel Interrupt Enable</description>
135180              <bitOffset>6</bitOffset>
135181              <bitWidth>1</bitWidth>
135182              <access>read-write</access>
135183              <enumeratedValues>
135184                <enumeratedValue>
135185                  <name>0</name>
135186                  <description>Disable channel interrupts.</description>
135187                  <value>#0</value>
135188                </enumeratedValue>
135189                <enumeratedValue>
135190                  <name>1</name>
135191                  <description>Enable channel interrupts.</description>
135192                  <value>#1</value>
135193                </enumeratedValue>
135194              </enumeratedValues>
135195            </field>
135196            <field>
135197              <name>CHF</name>
135198              <description>Channel Flag</description>
135199              <bitOffset>7</bitOffset>
135200              <bitWidth>1</bitWidth>
135201              <access>read-write</access>
135202              <enumeratedValues>
135203                <enumeratedValue>
135204                  <name>0</name>
135205                  <description>No channel event has occurred.</description>
135206                  <value>#0</value>
135207                </enumeratedValue>
135208                <enumeratedValue>
135209                  <name>1</name>
135210                  <description>A channel event has occurred.</description>
135211                  <value>#1</value>
135212                </enumeratedValue>
135213              </enumeratedValues>
135214            </field>
135215          </fields>
135216        </register>
135217        <register>
135218          <dim>2</dim>
135219          <dimIncrement>0x8</dimIncrement>
135220          <dimIndex>0,1</dimIndex>
135221          <name>C%sV</name>
135222          <description>Channel (n) Value</description>
135223          <addressOffset>0x10</addressOffset>
135224          <size>32</size>
135225          <access>read-write</access>
135226          <resetValue>0</resetValue>
135227          <resetMask>0xFFFFFFFF</resetMask>
135228          <fields>
135229            <field>
135230              <name>VAL</name>
135231              <description>Channel Value</description>
135232              <bitOffset>0</bitOffset>
135233              <bitWidth>16</bitWidth>
135234              <access>read-write</access>
135235            </field>
135236          </fields>
135237        </register>
135238        <register>
135239          <name>STATUS</name>
135240          <description>Capture and Compare Status</description>
135241          <addressOffset>0x50</addressOffset>
135242          <size>32</size>
135243          <access>read-write</access>
135244          <resetValue>0</resetValue>
135245          <resetMask>0xFFFFFFFF</resetMask>
135246          <fields>
135247            <field>
135248              <name>CH0F</name>
135249              <description>Channel 0 Flag</description>
135250              <bitOffset>0</bitOffset>
135251              <bitWidth>1</bitWidth>
135252              <access>read-write</access>
135253              <enumeratedValues>
135254                <enumeratedValue>
135255                  <name>0</name>
135256                  <description>No channel event has occurred.</description>
135257                  <value>#0</value>
135258                </enumeratedValue>
135259                <enumeratedValue>
135260                  <name>1</name>
135261                  <description>A channel event has occurred.</description>
135262                  <value>#1</value>
135263                </enumeratedValue>
135264              </enumeratedValues>
135265            </field>
135266            <field>
135267              <name>CH1F</name>
135268              <description>Channel 1 Flag</description>
135269              <bitOffset>1</bitOffset>
135270              <bitWidth>1</bitWidth>
135271              <access>read-write</access>
135272              <enumeratedValues>
135273                <enumeratedValue>
135274                  <name>0</name>
135275                  <description>No channel event has occurred.</description>
135276                  <value>#0</value>
135277                </enumeratedValue>
135278                <enumeratedValue>
135279                  <name>1</name>
135280                  <description>A channel event has occurred.</description>
135281                  <value>#1</value>
135282                </enumeratedValue>
135283              </enumeratedValues>
135284            </field>
135285            <field>
135286              <name>TOF</name>
135287              <description>Timer Overflow Flag</description>
135288              <bitOffset>8</bitOffset>
135289              <bitWidth>1</bitWidth>
135290              <access>read-write</access>
135291              <enumeratedValues>
135292                <enumeratedValue>
135293                  <name>0</name>
135294                  <description>TPM counter has not overflowed.</description>
135295                  <value>#0</value>
135296                </enumeratedValue>
135297                <enumeratedValue>
135298                  <name>1</name>
135299                  <description>TPM counter has overflowed.</description>
135300                  <value>#1</value>
135301                </enumeratedValue>
135302              </enumeratedValues>
135303            </field>
135304          </fields>
135305        </register>
135306        <register>
135307          <name>COMBINE</name>
135308          <description>Combine Channel Register</description>
135309          <addressOffset>0x64</addressOffset>
135310          <size>32</size>
135311          <access>read-write</access>
135312          <resetValue>0</resetValue>
135313          <resetMask>0xFFFFFFFF</resetMask>
135314          <fields>
135315            <field>
135316              <name>COMBINE0</name>
135317              <description>Combine Channels 0 and 1</description>
135318              <bitOffset>0</bitOffset>
135319              <bitWidth>1</bitWidth>
135320              <access>read-write</access>
135321              <enumeratedValues>
135322                <enumeratedValue>
135323                  <name>0</name>
135324                  <description>Channels 0 and 1 are independent.</description>
135325                  <value>#0</value>
135326                </enumeratedValue>
135327                <enumeratedValue>
135328                  <name>1</name>
135329                  <description>Channels 0 and 1 are combined.</description>
135330                  <value>#1</value>
135331                </enumeratedValue>
135332              </enumeratedValues>
135333            </field>
135334            <field>
135335              <name>COMSWAP0</name>
135336              <description>Combine Channel 0 and 1 Swap</description>
135337              <bitOffset>1</bitOffset>
135338              <bitWidth>1</bitWidth>
135339              <access>read-write</access>
135340              <enumeratedValues>
135341                <enumeratedValue>
135342                  <name>0</name>
135343                  <description>Even channel is used for input capture and 1st compare.</description>
135344                  <value>#0</value>
135345                </enumeratedValue>
135346                <enumeratedValue>
135347                  <name>1</name>
135348                  <description>Odd channel is used for input capture and 1st compare.</description>
135349                  <value>#1</value>
135350                </enumeratedValue>
135351              </enumeratedValues>
135352            </field>
135353          </fields>
135354        </register>
135355        <register>
135356          <name>POL</name>
135357          <description>Channel Polarity</description>
135358          <addressOffset>0x70</addressOffset>
135359          <size>32</size>
135360          <access>read-write</access>
135361          <resetValue>0</resetValue>
135362          <resetMask>0xFFFFFFFF</resetMask>
135363          <fields>
135364            <field>
135365              <name>POL0</name>
135366              <description>Channel 0 Polarity</description>
135367              <bitOffset>0</bitOffset>
135368              <bitWidth>1</bitWidth>
135369              <access>read-write</access>
135370              <enumeratedValues>
135371                <enumeratedValue>
135372                  <name>0</name>
135373                  <description>The channel polarity is active high.</description>
135374                  <value>#0</value>
135375                </enumeratedValue>
135376                <enumeratedValue>
135377                  <name>1</name>
135378                  <description>The channel polarity is active low.</description>
135379                  <value>#1</value>
135380                </enumeratedValue>
135381              </enumeratedValues>
135382            </field>
135383            <field>
135384              <name>POL1</name>
135385              <description>Channel 1 Polarity</description>
135386              <bitOffset>1</bitOffset>
135387              <bitWidth>1</bitWidth>
135388              <access>read-write</access>
135389              <enumeratedValues>
135390                <enumeratedValue>
135391                  <name>0</name>
135392                  <description>The channel polarity is active high.</description>
135393                  <value>#0</value>
135394                </enumeratedValue>
135395                <enumeratedValue>
135396                  <name>1</name>
135397                  <description>The channel polarity is active low.</description>
135398                  <value>#1</value>
135399                </enumeratedValue>
135400              </enumeratedValues>
135401            </field>
135402          </fields>
135403        </register>
135404        <register>
135405          <name>FILTER</name>
135406          <description>Filter Control</description>
135407          <addressOffset>0x78</addressOffset>
135408          <size>32</size>
135409          <access>read-write</access>
135410          <resetValue>0</resetValue>
135411          <resetMask>0xFFFFFFFF</resetMask>
135412          <fields>
135413            <field>
135414              <name>CH0FVAL</name>
135415              <description>Channel 0 Filter Value</description>
135416              <bitOffset>0</bitOffset>
135417              <bitWidth>4</bitWidth>
135418              <access>read-write</access>
135419            </field>
135420            <field>
135421              <name>CH1FVAL</name>
135422              <description>Channel 1 Filter Value</description>
135423              <bitOffset>4</bitOffset>
135424              <bitWidth>4</bitWidth>
135425              <access>read-write</access>
135426            </field>
135427          </fields>
135428        </register>
135429        <register>
135430          <name>QDCTRL</name>
135431          <description>Quadrature Decoder Control and Status</description>
135432          <addressOffset>0x80</addressOffset>
135433          <size>32</size>
135434          <access>read-write</access>
135435          <resetValue>0</resetValue>
135436          <resetMask>0xFFFFFFFF</resetMask>
135437          <fields>
135438            <field>
135439              <name>QUADEN</name>
135440              <description>Enables the quadrature decoder mode</description>
135441              <bitOffset>0</bitOffset>
135442              <bitWidth>1</bitWidth>
135443              <access>read-write</access>
135444              <enumeratedValues>
135445                <enumeratedValue>
135446                  <name>0</name>
135447                  <description>Quadrature decoder mode is disabled.</description>
135448                  <value>#0</value>
135449                </enumeratedValue>
135450                <enumeratedValue>
135451                  <name>1</name>
135452                  <description>Quadrature decoder mode is enabled.</description>
135453                  <value>#1</value>
135454                </enumeratedValue>
135455              </enumeratedValues>
135456            </field>
135457            <field>
135458              <name>TOFDIR</name>
135459              <description>Indicates if the TOF bit was set on the top or the bottom of counting.</description>
135460              <bitOffset>1</bitOffset>
135461              <bitWidth>1</bitWidth>
135462              <access>read-only</access>
135463              <enumeratedValues>
135464                <enumeratedValue>
135465                  <name>0</name>
135466                  <description>TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter changes from its minimum value (zero) to its maximum value (MOD register).</description>
135467                  <value>#0</value>
135468                </enumeratedValue>
135469                <enumeratedValue>
135470                  <name>1</name>
135471                  <description>TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter changes from its maximum value (MOD register) to its minimum value (zero).</description>
135472                  <value>#1</value>
135473                </enumeratedValue>
135474              </enumeratedValues>
135475            </field>
135476            <field>
135477              <name>QUADIR</name>
135478              <description>Counter Direction in Quadrature Decode Mode</description>
135479              <bitOffset>2</bitOffset>
135480              <bitWidth>1</bitWidth>
135481              <access>read-only</access>
135482              <enumeratedValues>
135483                <enumeratedValue>
135484                  <name>0</name>
135485                  <description>Counter direction is decreasing (counter decrement).</description>
135486                  <value>#0</value>
135487                </enumeratedValue>
135488                <enumeratedValue>
135489                  <name>1</name>
135490                  <description>Counter direction is increasing (counter increment).</description>
135491                  <value>#1</value>
135492                </enumeratedValue>
135493              </enumeratedValues>
135494            </field>
135495            <field>
135496              <name>QUADMODE</name>
135497              <description>Quadrature Decoder Mode</description>
135498              <bitOffset>3</bitOffset>
135499              <bitWidth>1</bitWidth>
135500              <access>read-write</access>
135501              <enumeratedValues>
135502                <enumeratedValue>
135503                  <name>0</name>
135504                  <description>Phase encoding mode.</description>
135505                  <value>#0</value>
135506                </enumeratedValue>
135507                <enumeratedValue>
135508                  <name>1</name>
135509                  <description>Count and direction encoding mode.</description>
135510                  <value>#1</value>
135511                </enumeratedValue>
135512              </enumeratedValues>
135513            </field>
135514          </fields>
135515        </register>
135516        <register>
135517          <name>CONF</name>
135518          <description>Configuration</description>
135519          <addressOffset>0x84</addressOffset>
135520          <size>32</size>
135521          <access>read-write</access>
135522          <resetValue>0</resetValue>
135523          <resetMask>0xFFFFFFFF</resetMask>
135524          <fields>
135525            <field>
135526              <name>DOZEEN</name>
135527              <description>Doze Enable</description>
135528              <bitOffset>5</bitOffset>
135529              <bitWidth>1</bitWidth>
135530              <access>read-write</access>
135531              <enumeratedValues>
135532                <enumeratedValue>
135533                  <name>0</name>
135534                  <description>Internal TPM counter continues in Doze mode.</description>
135535                  <value>#0</value>
135536                </enumeratedValue>
135537                <enumeratedValue>
135538                  <name>1</name>
135539                  <description>Internal TPM counter is paused and does not increment during Doze mode. Trigger inputs and input capture events are also ignored.</description>
135540                  <value>#1</value>
135541                </enumeratedValue>
135542              </enumeratedValues>
135543            </field>
135544            <field>
135545              <name>DBGMODE</name>
135546              <description>Debug Mode</description>
135547              <bitOffset>6</bitOffset>
135548              <bitWidth>2</bitWidth>
135549              <access>read-write</access>
135550              <enumeratedValues>
135551                <enumeratedValue>
135552                  <name>00</name>
135553                  <description>TPM counter is paused and does not increment during debug mode. Trigger inputs and input capture events are also ignored.</description>
135554                  <value>#00</value>
135555                </enumeratedValue>
135556                <enumeratedValue>
135557                  <name>11</name>
135558                  <description>TPM counter continues in debug mode.</description>
135559                  <value>#11</value>
135560                </enumeratedValue>
135561              </enumeratedValues>
135562            </field>
135563            <field>
135564              <name>GTBSYNC</name>
135565              <description>Global Time Base Synchronization</description>
135566              <bitOffset>8</bitOffset>
135567              <bitWidth>1</bitWidth>
135568              <access>read-write</access>
135569              <enumeratedValues>
135570                <enumeratedValue>
135571                  <name>0</name>
135572                  <description>Global timebase synchronization disabled.</description>
135573                  <value>#0</value>
135574                </enumeratedValue>
135575                <enumeratedValue>
135576                  <name>1</name>
135577                  <description>Global timebase synchronization enabled.</description>
135578                  <value>#1</value>
135579                </enumeratedValue>
135580              </enumeratedValues>
135581            </field>
135582            <field>
135583              <name>GTBEEN</name>
135584              <description>Global time base enable</description>
135585              <bitOffset>9</bitOffset>
135586              <bitWidth>1</bitWidth>
135587              <access>read-write</access>
135588              <enumeratedValues>
135589                <enumeratedValue>
135590                  <name>0</name>
135591                  <description>All channels use the internally generated TPM counter as their timebase</description>
135592                  <value>#0</value>
135593                </enumeratedValue>
135594                <enumeratedValue>
135595                  <name>1</name>
135596                  <description>All channels use an externally generated global timebase as their timebase</description>
135597                  <value>#1</value>
135598                </enumeratedValue>
135599              </enumeratedValues>
135600            </field>
135601            <field>
135602              <name>CSOT</name>
135603              <description>Counter Start on Trigger</description>
135604              <bitOffset>16</bitOffset>
135605              <bitWidth>1</bitWidth>
135606              <access>read-write</access>
135607              <enumeratedValues>
135608                <enumeratedValue>
135609                  <name>0</name>
135610                  <description>TPM counter starts to increment immediately, once it is enabled.</description>
135611                  <value>#0</value>
135612                </enumeratedValue>
135613                <enumeratedValue>
135614                  <name>1</name>
135615                  <description>TPM counter only starts to increment when it a rising edge on the selected input trigger is detected, after it has been enabled or after it has stopped due to overflow.</description>
135616                  <value>#1</value>
135617                </enumeratedValue>
135618              </enumeratedValues>
135619            </field>
135620            <field>
135621              <name>CSOO</name>
135622              <description>Counter Stop On Overflow</description>
135623              <bitOffset>17</bitOffset>
135624              <bitWidth>1</bitWidth>
135625              <access>read-write</access>
135626              <enumeratedValues>
135627                <enumeratedValue>
135628                  <name>0</name>
135629                  <description>TPM counter continues incrementing or decrementing after overflow</description>
135630                  <value>#0</value>
135631                </enumeratedValue>
135632                <enumeratedValue>
135633                  <name>1</name>
135634                  <description>TPM counter stops incrementing or decrementing after overflow.</description>
135635                  <value>#1</value>
135636                </enumeratedValue>
135637              </enumeratedValues>
135638            </field>
135639            <field>
135640              <name>CROT</name>
135641              <description>Counter Reload On Trigger</description>
135642              <bitOffset>18</bitOffset>
135643              <bitWidth>1</bitWidth>
135644              <access>read-write</access>
135645              <enumeratedValues>
135646                <enumeratedValue>
135647                  <name>0</name>
135648                  <description>Counter is not reloaded due to a rising edge on the selected input trigger</description>
135649                  <value>#0</value>
135650                </enumeratedValue>
135651                <enumeratedValue>
135652                  <name>1</name>
135653                  <description>Counter is reloaded when a rising edge is detected on the selected input trigger</description>
135654                  <value>#1</value>
135655                </enumeratedValue>
135656              </enumeratedValues>
135657            </field>
135658            <field>
135659              <name>CPOT</name>
135660              <description>Counter Pause On Trigger</description>
135661              <bitOffset>19</bitOffset>
135662              <bitWidth>1</bitWidth>
135663              <access>read-write</access>
135664            </field>
135665            <field>
135666              <name>TRGPOL</name>
135667              <description>Trigger Polarity</description>
135668              <bitOffset>22</bitOffset>
135669              <bitWidth>1</bitWidth>
135670              <access>read-write</access>
135671              <enumeratedValues>
135672                <enumeratedValue>
135673                  <name>0</name>
135674                  <description>Trigger is active high.</description>
135675                  <value>#0</value>
135676                </enumeratedValue>
135677                <enumeratedValue>
135678                  <name>1</name>
135679                  <description>Trigger is active low.</description>
135680                  <value>#1</value>
135681                </enumeratedValue>
135682              </enumeratedValues>
135683            </field>
135684            <field>
135685              <name>TRGSRC</name>
135686              <description>Trigger Source</description>
135687              <bitOffset>23</bitOffset>
135688              <bitWidth>1</bitWidth>
135689              <access>read-write</access>
135690              <enumeratedValues>
135691                <enumeratedValue>
135692                  <name>0</name>
135693                  <description>Trigger source selected by TRGSEL is external.</description>
135694                  <value>#0</value>
135695                </enumeratedValue>
135696                <enumeratedValue>
135697                  <name>1</name>
135698                  <description>Trigger source selected by TRGSEL is internal (channel pin input capture).</description>
135699                  <value>#1</value>
135700                </enumeratedValue>
135701              </enumeratedValues>
135702            </field>
135703            <field>
135704              <name>TRGSEL</name>
135705              <description>Trigger Select</description>
135706              <bitOffset>24</bitOffset>
135707              <bitWidth>4</bitWidth>
135708              <access>read-write</access>
135709              <enumeratedValues>
135710                <enumeratedValue>
135711                  <name>0001</name>
135712                  <description>Channel 0 pin input capture</description>
135713                  <value>#0001</value>
135714                </enumeratedValue>
135715                <enumeratedValue>
135716                  <name>0010</name>
135717                  <description>Channel 1 pin input capture</description>
135718                  <value>#0010</value>
135719                </enumeratedValue>
135720                <enumeratedValue>
135721                  <name>0011</name>
135722                  <description>Channel 0 or Channel 1 pin input capture</description>
135723                  <value>#0011</value>
135724                </enumeratedValue>
135725              </enumeratedValues>
135726            </field>
135727          </fields>
135728        </register>
135729      </registers>
135730    </peripheral>
135731    <peripheral>
135732      <name>DAC0</name>
135733      <description>12-Bit Digital-to-Analog Converter</description>
135734      <prependToName>DAC0_</prependToName>
135735      <baseAddress>0x400CC000</baseAddress>
135736      <addressBlock>
135737        <offset>0</offset>
135738        <size>0x24</size>
135739        <usage>registers</usage>
135740      </addressBlock>
135741      <interrupt>
135742        <name>DAC0</name>
135743        <value>56</value>
135744      </interrupt>
135745      <registers>
135746        <register>
135747          <dim>16</dim>
135748          <dimIncrement>0x2</dimIncrement>
135749          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15</dimIndex>
135750          <name>DAT%sL</name>
135751          <description>DAC Data Low Register</description>
135752          <addressOffset>0</addressOffset>
135753          <size>8</size>
135754          <access>read-write</access>
135755          <resetValue>0</resetValue>
135756          <resetMask>0xFF</resetMask>
135757          <fields>
135758            <field>
135759              <name>DATA0</name>
135760              <description>DATA0</description>
135761              <bitOffset>0</bitOffset>
135762              <bitWidth>8</bitWidth>
135763              <access>read-write</access>
135764            </field>
135765          </fields>
135766        </register>
135767        <register>
135768          <dim>16</dim>
135769          <dimIncrement>0x2</dimIncrement>
135770          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15</dimIndex>
135771          <name>DAT%sH</name>
135772          <description>DAC Data High Register</description>
135773          <addressOffset>0x1</addressOffset>
135774          <size>8</size>
135775          <access>read-write</access>
135776          <resetValue>0</resetValue>
135777          <resetMask>0xFF</resetMask>
135778          <fields>
135779            <field>
135780              <name>DATA1</name>
135781              <description>DATA1</description>
135782              <bitOffset>0</bitOffset>
135783              <bitWidth>4</bitWidth>
135784              <access>read-write</access>
135785            </field>
135786          </fields>
135787        </register>
135788        <register>
135789          <name>SR</name>
135790          <description>DAC Status Register</description>
135791          <addressOffset>0x20</addressOffset>
135792          <size>8</size>
135793          <access>read-write</access>
135794          <resetValue>0x2</resetValue>
135795          <resetMask>0xFF</resetMask>
135796          <fields>
135797            <field>
135798              <name>DACBFRPBF</name>
135799              <description>DAC Buffer Read Pointer Bottom Position Flag</description>
135800              <bitOffset>0</bitOffset>
135801              <bitWidth>1</bitWidth>
135802              <access>read-write</access>
135803              <enumeratedValues>
135804                <enumeratedValue>
135805                  <name>0</name>
135806                  <description>The DAC buffer read pointer is not equal to C2[DACBFUP].</description>
135807                  <value>#0</value>
135808                </enumeratedValue>
135809                <enumeratedValue>
135810                  <name>1</name>
135811                  <description>The DAC buffer read pointer is equal to C2[DACBFUP].</description>
135812                  <value>#1</value>
135813                </enumeratedValue>
135814              </enumeratedValues>
135815            </field>
135816            <field>
135817              <name>DACBFRPTF</name>
135818              <description>DAC Buffer Read Pointer Top Position Flag</description>
135819              <bitOffset>1</bitOffset>
135820              <bitWidth>1</bitWidth>
135821              <access>read-write</access>
135822              <enumeratedValues>
135823                <enumeratedValue>
135824                  <name>0</name>
135825                  <description>The DAC buffer read pointer is not zero.</description>
135826                  <value>#0</value>
135827                </enumeratedValue>
135828                <enumeratedValue>
135829                  <name>1</name>
135830                  <description>The DAC buffer read pointer is zero.</description>
135831                  <value>#1</value>
135832                </enumeratedValue>
135833              </enumeratedValues>
135834            </field>
135835            <field>
135836              <name>DACBFWMF</name>
135837              <description>DAC Buffer Watermark Flag</description>
135838              <bitOffset>2</bitOffset>
135839              <bitWidth>1</bitWidth>
135840              <access>read-write</access>
135841              <enumeratedValues>
135842                <enumeratedValue>
135843                  <name>0</name>
135844                  <description>The DAC buffer read pointer has not reached the watermark level.</description>
135845                  <value>#0</value>
135846                </enumeratedValue>
135847                <enumeratedValue>
135848                  <name>1</name>
135849                  <description>The DAC buffer read pointer has reached the watermark level.</description>
135850                  <value>#1</value>
135851                </enumeratedValue>
135852              </enumeratedValues>
135853            </field>
135854          </fields>
135855        </register>
135856        <register>
135857          <name>C0</name>
135858          <description>DAC Control Register</description>
135859          <addressOffset>0x21</addressOffset>
135860          <size>8</size>
135861          <access>read-write</access>
135862          <resetValue>0</resetValue>
135863          <resetMask>0xFF</resetMask>
135864          <fields>
135865            <field>
135866              <name>DACBBIEN</name>
135867              <description>DAC Buffer Read Pointer Bottom Flag Interrupt Enable</description>
135868              <bitOffset>0</bitOffset>
135869              <bitWidth>1</bitWidth>
135870              <access>read-write</access>
135871              <enumeratedValues>
135872                <enumeratedValue>
135873                  <name>0</name>
135874                  <description>The DAC buffer read pointer bottom flag interrupt is disabled.</description>
135875                  <value>#0</value>
135876                </enumeratedValue>
135877                <enumeratedValue>
135878                  <name>1</name>
135879                  <description>The DAC buffer read pointer bottom flag interrupt is enabled.</description>
135880                  <value>#1</value>
135881                </enumeratedValue>
135882              </enumeratedValues>
135883            </field>
135884            <field>
135885              <name>DACBTIEN</name>
135886              <description>DAC Buffer Read Pointer Top Flag Interrupt Enable</description>
135887              <bitOffset>1</bitOffset>
135888              <bitWidth>1</bitWidth>
135889              <access>read-write</access>
135890              <enumeratedValues>
135891                <enumeratedValue>
135892                  <name>0</name>
135893                  <description>The DAC buffer read pointer top flag interrupt is disabled.</description>
135894                  <value>#0</value>
135895                </enumeratedValue>
135896                <enumeratedValue>
135897                  <name>1</name>
135898                  <description>The DAC buffer read pointer top flag interrupt is enabled.</description>
135899                  <value>#1</value>
135900                </enumeratedValue>
135901              </enumeratedValues>
135902            </field>
135903            <field>
135904              <name>DACBWIEN</name>
135905              <description>DAC Buffer Watermark Interrupt Enable</description>
135906              <bitOffset>2</bitOffset>
135907              <bitWidth>1</bitWidth>
135908              <access>read-write</access>
135909              <enumeratedValues>
135910                <enumeratedValue>
135911                  <name>0</name>
135912                  <description>The DAC buffer watermark interrupt is disabled.</description>
135913                  <value>#0</value>
135914                </enumeratedValue>
135915                <enumeratedValue>
135916                  <name>1</name>
135917                  <description>The DAC buffer watermark interrupt is enabled.</description>
135918                  <value>#1</value>
135919                </enumeratedValue>
135920              </enumeratedValues>
135921            </field>
135922            <field>
135923              <name>LPEN</name>
135924              <description>DAC Low Power Control</description>
135925              <bitOffset>3</bitOffset>
135926              <bitWidth>1</bitWidth>
135927              <access>read-write</access>
135928              <enumeratedValues>
135929                <enumeratedValue>
135930                  <name>0</name>
135931                  <description>High-Power mode</description>
135932                  <value>#0</value>
135933                </enumeratedValue>
135934                <enumeratedValue>
135935                  <name>1</name>
135936                  <description>Low-Power mode</description>
135937                  <value>#1</value>
135938                </enumeratedValue>
135939              </enumeratedValues>
135940            </field>
135941            <field>
135942              <name>DACSWTRG</name>
135943              <description>DAC Software Trigger</description>
135944              <bitOffset>4</bitOffset>
135945              <bitWidth>1</bitWidth>
135946              <access>write-only</access>
135947              <enumeratedValues>
135948                <enumeratedValue>
135949                  <name>0</name>
135950                  <description>The DAC soft trigger is not valid.</description>
135951                  <value>#0</value>
135952                </enumeratedValue>
135953                <enumeratedValue>
135954                  <name>1</name>
135955                  <description>The DAC soft trigger is valid.</description>
135956                  <value>#1</value>
135957                </enumeratedValue>
135958              </enumeratedValues>
135959            </field>
135960            <field>
135961              <name>DACTRGSEL</name>
135962              <description>DAC Trigger Select</description>
135963              <bitOffset>5</bitOffset>
135964              <bitWidth>1</bitWidth>
135965              <access>read-write</access>
135966              <enumeratedValues>
135967                <enumeratedValue>
135968                  <name>0</name>
135969                  <description>The DAC hardware trigger is selected.</description>
135970                  <value>#0</value>
135971                </enumeratedValue>
135972                <enumeratedValue>
135973                  <name>1</name>
135974                  <description>The DAC software trigger is selected.</description>
135975                  <value>#1</value>
135976                </enumeratedValue>
135977              </enumeratedValues>
135978            </field>
135979            <field>
135980              <name>DACRFS</name>
135981              <description>DAC Reference Select</description>
135982              <bitOffset>6</bitOffset>
135983              <bitWidth>1</bitWidth>
135984              <access>read-write</access>
135985              <enumeratedValues>
135986                <enumeratedValue>
135987                  <name>0</name>
135988                  <description>The DAC selects DACREF_1 as the reference voltage.</description>
135989                  <value>#0</value>
135990                </enumeratedValue>
135991                <enumeratedValue>
135992                  <name>1</name>
135993                  <description>The DAC selects DACREF_2 as the reference voltage.</description>
135994                  <value>#1</value>
135995                </enumeratedValue>
135996              </enumeratedValues>
135997            </field>
135998            <field>
135999              <name>DACEN</name>
136000              <description>DAC Enable</description>
136001              <bitOffset>7</bitOffset>
136002              <bitWidth>1</bitWidth>
136003              <access>read-write</access>
136004              <enumeratedValues>
136005                <enumeratedValue>
136006                  <name>0</name>
136007                  <description>The DAC system is disabled.</description>
136008                  <value>#0</value>
136009                </enumeratedValue>
136010                <enumeratedValue>
136011                  <name>1</name>
136012                  <description>The DAC system is enabled.</description>
136013                  <value>#1</value>
136014                </enumeratedValue>
136015              </enumeratedValues>
136016            </field>
136017          </fields>
136018        </register>
136019        <register>
136020          <name>C1</name>
136021          <description>DAC Control Register 1</description>
136022          <addressOffset>0x22</addressOffset>
136023          <size>8</size>
136024          <access>read-write</access>
136025          <resetValue>0</resetValue>
136026          <resetMask>0xFF</resetMask>
136027          <fields>
136028            <field>
136029              <name>DACBFEN</name>
136030              <description>DAC Buffer Enable</description>
136031              <bitOffset>0</bitOffset>
136032              <bitWidth>1</bitWidth>
136033              <access>read-write</access>
136034              <enumeratedValues>
136035                <enumeratedValue>
136036                  <name>0</name>
136037                  <description>Buffer read pointer is disabled. The converted data is always the first word of the buffer.</description>
136038                  <value>#0</value>
136039                </enumeratedValue>
136040                <enumeratedValue>
136041                  <name>1</name>
136042                  <description>Buffer read pointer is enabled. The converted data is the word that the read pointer points to. It means converted data can be from any word of the buffer.</description>
136043                  <value>#1</value>
136044                </enumeratedValue>
136045              </enumeratedValues>
136046            </field>
136047            <field>
136048              <name>DACBFMD</name>
136049              <description>DAC Buffer Work Mode Select</description>
136050              <bitOffset>1</bitOffset>
136051              <bitWidth>2</bitWidth>
136052              <access>read-write</access>
136053              <enumeratedValues>
136054                <enumeratedValue>
136055                  <name>00</name>
136056                  <description>Normal mode</description>
136057                  <value>#00</value>
136058                </enumeratedValue>
136059                <enumeratedValue>
136060                  <name>01</name>
136061                  <description>Swing mode</description>
136062                  <value>#01</value>
136063                </enumeratedValue>
136064                <enumeratedValue>
136065                  <name>10</name>
136066                  <description>One-Time Scan mode</description>
136067                  <value>#10</value>
136068                </enumeratedValue>
136069                <enumeratedValue>
136070                  <name>11</name>
136071                  <description>FIFO mode</description>
136072                  <value>#11</value>
136073                </enumeratedValue>
136074              </enumeratedValues>
136075            </field>
136076            <field>
136077              <name>DACBFWM</name>
136078              <description>DAC Buffer Watermark Select</description>
136079              <bitOffset>3</bitOffset>
136080              <bitWidth>2</bitWidth>
136081              <access>read-write</access>
136082              <enumeratedValues>
136083                <enumeratedValue>
136084                  <name>00</name>
136085                  <description>In normal mode, 1 word . In FIFO mode, 2 or less than 2 data remaining in FIFO will set watermark status bit.</description>
136086                  <value>#00</value>
136087                </enumeratedValue>
136088                <enumeratedValue>
136089                  <name>01</name>
136090                  <description>In normal mode, 2 words . In FIFO mode, Max/4 or less than Max/4 data remaining in FIFO will set watermark status bit.</description>
136091                  <value>#01</value>
136092                </enumeratedValue>
136093                <enumeratedValue>
136094                  <name>10</name>
136095                  <description>In normal mode, 3 words . In FIFO mode, Max/2 or less than Max/2 data remaining in FIFO will set watermark status bit.</description>
136096                  <value>#10</value>
136097                </enumeratedValue>
136098                <enumeratedValue>
136099                  <name>11</name>
136100                  <description>In normal mode, 4 words . In FIFO mode, Max-2 or less than Max-2 data remaining in FIFO will set watermark status bit.</description>
136101                  <value>#11</value>
136102                </enumeratedValue>
136103              </enumeratedValues>
136104            </field>
136105            <field>
136106              <name>DMAEN</name>
136107              <description>DMA Enable Select</description>
136108              <bitOffset>7</bitOffset>
136109              <bitWidth>1</bitWidth>
136110              <access>read-write</access>
136111              <enumeratedValues>
136112                <enumeratedValue>
136113                  <name>0</name>
136114                  <description>DMA is disabled.</description>
136115                  <value>#0</value>
136116                </enumeratedValue>
136117                <enumeratedValue>
136118                  <name>1</name>
136119                  <description>DMA is enabled. When DMA is enabled, the DMA request will be generated by original interrupts. The interrupts will not be presented on this module at the same time.</description>
136120                  <value>#1</value>
136121                </enumeratedValue>
136122              </enumeratedValues>
136123            </field>
136124          </fields>
136125        </register>
136126        <register>
136127          <name>C2</name>
136128          <description>DAC Control Register 2</description>
136129          <addressOffset>0x23</addressOffset>
136130          <size>8</size>
136131          <access>read-write</access>
136132          <resetValue>0xF</resetValue>
136133          <resetMask>0xFF</resetMask>
136134          <fields>
136135            <field>
136136              <name>DACBFUP</name>
136137              <description>DAC Buffer Upper Limit</description>
136138              <bitOffset>0</bitOffset>
136139              <bitWidth>4</bitWidth>
136140              <access>read-write</access>
136141            </field>
136142            <field>
136143              <name>DACBFRP</name>
136144              <description>DAC Buffer Read Pointer</description>
136145              <bitOffset>4</bitOffset>
136146              <bitWidth>4</bitWidth>
136147              <access>read-write</access>
136148            </field>
136149          </fields>
136150        </register>
136151      </registers>
136152    </peripheral>
136153    <peripheral>
136154      <name>LTC0</name>
136155      <description>LTC</description>
136156      <baseAddress>0x400D1000</baseAddress>
136157      <addressBlock>
136158        <offset>0</offset>
136159        <size>0xF00</size>
136160        <usage>registers</usage>
136161      </addressBlock>
136162      <interrupt>
136163        <name>LTC0</name>
136164        <value>104</value>
136165      </interrupt>
136166      <registers>
136167        <register>
136168          <name>LTC0_MD</name>
136169          <description>LTC Mode Register (non-PKHA/non-RNG use)</description>
136170          <alternateGroup>LTC0</alternateGroup>
136171          <addressOffset>0</addressOffset>
136172          <size>32</size>
136173          <access>read-write</access>
136174          <resetValue>0</resetValue>
136175          <resetMask>0xFFFFFFFF</resetMask>
136176          <fields>
136177            <field>
136178              <name>ENC</name>
136179              <description>Encrypt/Decrypt. This bit selects encryption or decryption.</description>
136180              <bitOffset>0</bitOffset>
136181              <bitWidth>1</bitWidth>
136182              <access>read-write</access>
136183              <enumeratedValues>
136184                <enumeratedValue>
136185                  <name>0</name>
136186                  <description>Decrypt.</description>
136187                  <value>#0</value>
136188                </enumeratedValue>
136189                <enumeratedValue>
136190                  <name>1</name>
136191                  <description>Encrypt.</description>
136192                  <value>#1</value>
136193                </enumeratedValue>
136194              </enumeratedValues>
136195            </field>
136196            <field>
136197              <name>ICV_TEST</name>
136198              <description>ICV Checking / Test AES fault detection</description>
136199              <bitOffset>1</bitOffset>
136200              <bitWidth>1</bitWidth>
136201              <access>read-write</access>
136202            </field>
136203            <field>
136204              <name>AS</name>
136205              <description>Algorithm State</description>
136206              <bitOffset>2</bitOffset>
136207              <bitWidth>2</bitWidth>
136208              <access>read-write</access>
136209              <enumeratedValues>
136210                <enumeratedValue>
136211                  <name>00</name>
136212                  <description>Update</description>
136213                  <value>#00</value>
136214                </enumeratedValue>
136215                <enumeratedValue>
136216                  <name>01</name>
136217                  <description>Initialize</description>
136218                  <value>#01</value>
136219                </enumeratedValue>
136220                <enumeratedValue>
136221                  <name>10</name>
136222                  <description>Finalize</description>
136223                  <value>#10</value>
136224                </enumeratedValue>
136225                <enumeratedValue>
136226                  <name>11</name>
136227                  <description>Initialize/Finalize</description>
136228                  <value>#11</value>
136229                </enumeratedValue>
136230              </enumeratedValues>
136231            </field>
136232            <field>
136233              <name>AAI</name>
136234              <description>Additional Algorithm information</description>
136235              <bitOffset>4</bitOffset>
136236              <bitWidth>9</bitWidth>
136237              <access>read-write</access>
136238            </field>
136239            <field>
136240              <name>ALG</name>
136241              <description>Algorithm. This field specifies which algorithm is being selected.</description>
136242              <bitOffset>16</bitOffset>
136243              <bitWidth>8</bitWidth>
136244              <access>read-write</access>
136245              <enumeratedValues>
136246                <enumeratedValue>
136247                  <name>00010000</name>
136248                  <description>AES</description>
136249                  <value>#10000</value>
136250                </enumeratedValue>
136251                <enumeratedValue>
136252                  <name>00100000</name>
136253                  <description>DES</description>
136254                  <value>#100000</value>
136255                </enumeratedValue>
136256                <enumeratedValue>
136257                  <name>00100001</name>
136258                  <description>3DES</description>
136259                  <value>#100001</value>
136260                </enumeratedValue>
136261              </enumeratedValues>
136262            </field>
136263          </fields>
136264        </register>
136265        <register>
136266          <name>LTC0_MDPK</name>
136267          <description>LTC Mode Register (PublicKey)</description>
136268          <alternateGroup>LTC0</alternateGroup>
136269          <addressOffset>0</addressOffset>
136270          <size>32</size>
136271          <access>read-write</access>
136272          <resetValue>0</resetValue>
136273          <resetMask>0xFFFFFFFF</resetMask>
136274          <fields>
136275            <field>
136276              <name>PKHA_MODE_LS</name>
136277              <description>PKHA_MODE least significant 12 bits</description>
136278              <bitOffset>0</bitOffset>
136279              <bitWidth>12</bitWidth>
136280              <access>read-write</access>
136281            </field>
136282            <field>
136283              <name>PKHA_MODE_MS</name>
136284              <description>PKHA_MODE most-significant 4 bits</description>
136285              <bitOffset>16</bitOffset>
136286              <bitWidth>4</bitWidth>
136287              <access>read-write</access>
136288            </field>
136289            <field>
136290              <name>ALG</name>
136291              <description>Algorithm. This field specifies which algorithm is being selected.</description>
136292              <bitOffset>20</bitOffset>
136293              <bitWidth>4</bitWidth>
136294              <access>read-write</access>
136295              <enumeratedValues>
136296                <enumeratedValue>
136297                  <name>1000</name>
136298                  <description>PKHA</description>
136299                  <value>#1000</value>
136300                </enumeratedValue>
136301              </enumeratedValues>
136302            </field>
136303          </fields>
136304        </register>
136305        <register>
136306          <name>LTC0_KS</name>
136307          <description>LTC Key Size Register</description>
136308          <addressOffset>0x8</addressOffset>
136309          <size>32</size>
136310          <access>read-write</access>
136311          <resetValue>0</resetValue>
136312          <resetMask>0xFFFFFFFF</resetMask>
136313          <fields>
136314            <field>
136315              <name>KS</name>
136316              <description>Key Size. This is the size of a Key measured in bytes</description>
136317              <bitOffset>0</bitOffset>
136318              <bitWidth>6</bitWidth>
136319              <access>read-write</access>
136320            </field>
136321          </fields>
136322        </register>
136323        <register>
136324          <name>LTC0_DS</name>
136325          <description>LTC Data Size Register</description>
136326          <addressOffset>0x10</addressOffset>
136327          <size>32</size>
136328          <access>read-write</access>
136329          <resetValue>0</resetValue>
136330          <resetMask>0xFFFFFFFF</resetMask>
136331          <fields>
136332            <field>
136333              <name>DS</name>
136334              <description>Data Size</description>
136335              <bitOffset>0</bitOffset>
136336              <bitWidth>12</bitWidth>
136337              <access>read-write</access>
136338            </field>
136339          </fields>
136340        </register>
136341        <register>
136342          <name>LTC0_ICVS</name>
136343          <description>LTC ICV Size Register</description>
136344          <addressOffset>0x18</addressOffset>
136345          <size>32</size>
136346          <access>read-write</access>
136347          <resetValue>0</resetValue>
136348          <resetMask>0xFFFFFFFF</resetMask>
136349          <fields>
136350            <field>
136351              <name>ICVS</name>
136352              <description>ICV Size, in Bytes.</description>
136353              <bitOffset>0</bitOffset>
136354              <bitWidth>5</bitWidth>
136355              <access>read-write</access>
136356            </field>
136357          </fields>
136358        </register>
136359        <register>
136360          <name>LTC0_COM</name>
136361          <description>LTC Command Register</description>
136362          <addressOffset>0x30</addressOffset>
136363          <size>32</size>
136364          <access>read-write</access>
136365          <resetValue>0</resetValue>
136366          <resetMask>0xFFFFFFFF</resetMask>
136367          <fields>
136368            <field>
136369              <name>ALL</name>
136370              <description>Reset All Internal Logic</description>
136371              <bitOffset>0</bitOffset>
136372              <bitWidth>1</bitWidth>
136373              <access>write-only</access>
136374              <enumeratedValues>
136375                <enumeratedValue>
136376                  <name>0</name>
136377                  <description>Do Not Reset</description>
136378                  <value>#0</value>
136379                </enumeratedValue>
136380                <enumeratedValue>
136381                  <name>1</name>
136382                  <description>Reset all CHAs in use by this CCB.</description>
136383                  <value>#1</value>
136384                </enumeratedValue>
136385              </enumeratedValues>
136386            </field>
136387            <field>
136388              <name>AES</name>
136389              <description>Reset AESA. Writing a 1 to this bit resets the AES Accelerator core engine.</description>
136390              <bitOffset>1</bitOffset>
136391              <bitWidth>1</bitWidth>
136392              <access>write-only</access>
136393              <enumeratedValues>
136394                <enumeratedValue>
136395                  <name>0</name>
136396                  <description>Do Not Reset</description>
136397                  <value>#0</value>
136398                </enumeratedValue>
136399                <enumeratedValue>
136400                  <name>1</name>
136401                  <description>Reset AES Accelerator</description>
136402                  <value>#1</value>
136403                </enumeratedValue>
136404              </enumeratedValues>
136405            </field>
136406            <field>
136407              <name>DES</name>
136408              <description>Reset DESA. Writing a 1 to this bit resets the DES Accelerator.</description>
136409              <bitOffset>2</bitOffset>
136410              <bitWidth>1</bitWidth>
136411              <access>write-only</access>
136412              <enumeratedValues>
136413                <enumeratedValue>
136414                  <name>0</name>
136415                  <description>Do Not Reset</description>
136416                  <value>#0</value>
136417                </enumeratedValue>
136418                <enumeratedValue>
136419                  <name>1</name>
136420                  <description>Reset DES Accelerator</description>
136421                  <value>#1</value>
136422                </enumeratedValue>
136423              </enumeratedValues>
136424            </field>
136425            <field>
136426              <name>PK</name>
136427              <description>Reset PKHA. Writing a 1 to this bit resets the Public Key Hardware Accelerator.</description>
136428              <bitOffset>6</bitOffset>
136429              <bitWidth>1</bitWidth>
136430              <access>write-only</access>
136431              <enumeratedValues>
136432                <enumeratedValue>
136433                  <name>0</name>
136434                  <description>Do Not Reset</description>
136435                  <value>#0</value>
136436                </enumeratedValue>
136437                <enumeratedValue>
136438                  <name>1</name>
136439                  <description>Reset Public Key Hardware Accelerator</description>
136440                  <value>#1</value>
136441                </enumeratedValue>
136442              </enumeratedValues>
136443            </field>
136444          </fields>
136445        </register>
136446        <register>
136447          <name>LTC0_CTL</name>
136448          <description>LTC Control Register</description>
136449          <addressOffset>0x34</addressOffset>
136450          <size>32</size>
136451          <access>read-write</access>
136452          <resetValue>0</resetValue>
136453          <resetMask>0xFFFFFFFF</resetMask>
136454          <fields>
136455            <field>
136456              <name>IM</name>
136457              <description>Interrupt Mask. Once this bit is set, it can only be cleared by hard reset.</description>
136458              <bitOffset>0</bitOffset>
136459              <bitWidth>1</bitWidth>
136460              <access>read-write</access>
136461              <enumeratedValues>
136462                <enumeratedValue>
136463                  <name>0</name>
136464                  <description>Interrupt not masked.</description>
136465                  <value>#0</value>
136466                </enumeratedValue>
136467                <enumeratedValue>
136468                  <name>1</name>
136469                  <description>Interrupt masked</description>
136470                  <value>#1</value>
136471                </enumeratedValue>
136472              </enumeratedValues>
136473            </field>
136474            <field>
136475              <name>PDE</name>
136476              <description>PKHA Register DMA Enable.</description>
136477              <bitOffset>4</bitOffset>
136478              <bitWidth>1</bitWidth>
136479              <access>read-write</access>
136480              <enumeratedValues>
136481                <enumeratedValue>
136482                  <name>0</name>
136483                  <description>DMA Request and Done signals disabled for the PKHA Registers.</description>
136484                  <value>#0</value>
136485                </enumeratedValue>
136486                <enumeratedValue>
136487                  <name>1</name>
136488                  <description>DMA Request and Done signals enabled for the PKHA Registers.</description>
136489                  <value>#1</value>
136490                </enumeratedValue>
136491              </enumeratedValues>
136492            </field>
136493            <field>
136494              <name>IFE</name>
136495              <description>Input FIFO DMA Enable.</description>
136496              <bitOffset>8</bitOffset>
136497              <bitWidth>1</bitWidth>
136498              <access>read-write</access>
136499              <enumeratedValues>
136500                <enumeratedValue>
136501                  <name>0</name>
136502                  <description>DMA Request and Done signals disabled for the Input FIFO.</description>
136503                  <value>#0</value>
136504                </enumeratedValue>
136505                <enumeratedValue>
136506                  <name>1</name>
136507                  <description>DMA Request and Done signals enabled for the Input FIFO.</description>
136508                  <value>#1</value>
136509                </enumeratedValue>
136510              </enumeratedValues>
136511            </field>
136512            <field>
136513              <name>IFR</name>
136514              <description>Input FIFO DMA Request Size</description>
136515              <bitOffset>9</bitOffset>
136516              <bitWidth>1</bitWidth>
136517              <access>read-write</access>
136518              <enumeratedValues>
136519                <enumeratedValue>
136520                  <name>0</name>
136521                  <description>DMA request size is 1 entry.</description>
136522                  <value>#0</value>
136523                </enumeratedValue>
136524                <enumeratedValue>
136525                  <name>1</name>
136526                  <description>DMA request size is 4 entries.</description>
136527                  <value>#1</value>
136528                </enumeratedValue>
136529              </enumeratedValues>
136530            </field>
136531            <field>
136532              <name>OFE</name>
136533              <description>Output FIFO DMA Enable.</description>
136534              <bitOffset>12</bitOffset>
136535              <bitWidth>1</bitWidth>
136536              <access>read-write</access>
136537              <enumeratedValues>
136538                <enumeratedValue>
136539                  <name>0</name>
136540                  <description>DMA Request and Done signals disabled for the Output FIFO.</description>
136541                  <value>#0</value>
136542                </enumeratedValue>
136543                <enumeratedValue>
136544                  <name>1</name>
136545                  <description>DMA Request and Done signals enabled for the Output FIFO.</description>
136546                  <value>#1</value>
136547                </enumeratedValue>
136548              </enumeratedValues>
136549            </field>
136550            <field>
136551              <name>OFR</name>
136552              <description>Output FIFO DMA Request Size</description>
136553              <bitOffset>13</bitOffset>
136554              <bitWidth>1</bitWidth>
136555              <access>read-write</access>
136556              <enumeratedValues>
136557                <enumeratedValue>
136558                  <name>0</name>
136559                  <description>DMA request size is 1 entry.</description>
136560                  <value>#0</value>
136561                </enumeratedValue>
136562                <enumeratedValue>
136563                  <name>1</name>
136564                  <description>DMA request size is 4 entries.</description>
136565                  <value>#1</value>
136566                </enumeratedValue>
136567              </enumeratedValues>
136568            </field>
136569            <field>
136570              <name>IFS</name>
136571              <description>Input FIFO Byte Swap. Byte swap all data that is written to the Input FIFO.</description>
136572              <bitOffset>16</bitOffset>
136573              <bitWidth>1</bitWidth>
136574              <access>read-write</access>
136575              <enumeratedValues>
136576                <enumeratedValue>
136577                  <name>0</name>
136578                  <description>Do Not Byte Swap Data.</description>
136579                  <value>#0</value>
136580                </enumeratedValue>
136581                <enumeratedValue>
136582                  <name>1</name>
136583                  <description>Byte Swap Data.</description>
136584                  <value>#1</value>
136585                </enumeratedValue>
136586              </enumeratedValues>
136587            </field>
136588            <field>
136589              <name>OFS</name>
136590              <description>Output FIFO Byte Swap. Byte swap all data that is read from the Onput FIFO.</description>
136591              <bitOffset>17</bitOffset>
136592              <bitWidth>1</bitWidth>
136593              <access>read-write</access>
136594              <enumeratedValues>
136595                <enumeratedValue>
136596                  <name>0</name>
136597                  <description>Do Not Byte Swap Data.</description>
136598                  <value>#0</value>
136599                </enumeratedValue>
136600                <enumeratedValue>
136601                  <name>1</name>
136602                  <description>Byte Swap Data.</description>
136603                  <value>#1</value>
136604                </enumeratedValue>
136605              </enumeratedValues>
136606            </field>
136607            <field>
136608              <name>KIS</name>
136609              <description>Key Register Input Byte Swap</description>
136610              <bitOffset>20</bitOffset>
136611              <bitWidth>1</bitWidth>
136612              <access>read-write</access>
136613              <enumeratedValues>
136614                <enumeratedValue>
136615                  <name>0</name>
136616                  <description>Do Not Byte Swap Data.</description>
136617                  <value>#0</value>
136618                </enumeratedValue>
136619                <enumeratedValue>
136620                  <name>1</name>
136621                  <description>Byte Swap Data.</description>
136622                  <value>#1</value>
136623                </enumeratedValue>
136624              </enumeratedValues>
136625            </field>
136626            <field>
136627              <name>KOS</name>
136628              <description>Key Register Output Byte Swap</description>
136629              <bitOffset>21</bitOffset>
136630              <bitWidth>1</bitWidth>
136631              <access>read-write</access>
136632              <enumeratedValues>
136633                <enumeratedValue>
136634                  <name>0</name>
136635                  <description>Do Not Byte Swap Data.</description>
136636                  <value>#0</value>
136637                </enumeratedValue>
136638                <enumeratedValue>
136639                  <name>1</name>
136640                  <description>Byte Swap Data.</description>
136641                  <value>#1</value>
136642                </enumeratedValue>
136643              </enumeratedValues>
136644            </field>
136645            <field>
136646              <name>CIS</name>
136647              <description>Context Register Input Byte Swap</description>
136648              <bitOffset>22</bitOffset>
136649              <bitWidth>1</bitWidth>
136650              <access>read-write</access>
136651              <enumeratedValues>
136652                <enumeratedValue>
136653                  <name>0</name>
136654                  <description>Do Not Byte Swap Data.</description>
136655                  <value>#0</value>
136656                </enumeratedValue>
136657                <enumeratedValue>
136658                  <name>1</name>
136659                  <description>Byte Swap Data.</description>
136660                  <value>#1</value>
136661                </enumeratedValue>
136662              </enumeratedValues>
136663            </field>
136664            <field>
136665              <name>COS</name>
136666              <description>Context Register Output Byte Swap</description>
136667              <bitOffset>23</bitOffset>
136668              <bitWidth>1</bitWidth>
136669              <access>read-write</access>
136670              <enumeratedValues>
136671                <enumeratedValue>
136672                  <name>0</name>
136673                  <description>Do Not Byte Swap Data.</description>
136674                  <value>#0</value>
136675                </enumeratedValue>
136676                <enumeratedValue>
136677                  <name>1</name>
136678                  <description>Byte Swap Data.</description>
136679                  <value>#1</value>
136680                </enumeratedValue>
136681              </enumeratedValues>
136682            </field>
136683            <field>
136684              <name>KAL</name>
136685              <description>Key Register Access Lock</description>
136686              <bitOffset>31</bitOffset>
136687              <bitWidth>1</bitWidth>
136688              <access>read-write</access>
136689              <enumeratedValues>
136690                <enumeratedValue>
136691                  <name>0</name>
136692                  <description>Key Register is readable.</description>
136693                  <value>#0</value>
136694                </enumeratedValue>
136695                <enumeratedValue>
136696                  <name>1</name>
136697                  <description>Key Register is not readable.</description>
136698                  <value>#1</value>
136699                </enumeratedValue>
136700              </enumeratedValues>
136701            </field>
136702          </fields>
136703        </register>
136704        <register>
136705          <name>LTC0_CW</name>
136706          <description>LTC Clear Written Register</description>
136707          <addressOffset>0x40</addressOffset>
136708          <size>32</size>
136709          <access>read-write</access>
136710          <resetValue>0</resetValue>
136711          <resetMask>0xFFFFFFFF</resetMask>
136712          <fields>
136713            <field>
136714              <name>CM</name>
136715              <description>Clear the Mode Register. Writing a one to this bit causes the Mode Register to be cleared.</description>
136716              <bitOffset>0</bitOffset>
136717              <bitWidth>1</bitWidth>
136718              <access>write-only</access>
136719            </field>
136720            <field>
136721              <name>CDS</name>
136722              <description>Clear the Data Size Register</description>
136723              <bitOffset>2</bitOffset>
136724              <bitWidth>1</bitWidth>
136725              <access>write-only</access>
136726            </field>
136727            <field>
136728              <name>CICV</name>
136729              <description>Clear the ICV Size Register. Writing a one to this bit causes the ICV Size Register to be cleared.</description>
136730              <bitOffset>3</bitOffset>
136731              <bitWidth>1</bitWidth>
136732              <access>write-only</access>
136733            </field>
136734            <field>
136735              <name>CCR</name>
136736              <description>Clear the Context Register. Writing a one to this bit causes the Context Register to be cleared.</description>
136737              <bitOffset>5</bitOffset>
136738              <bitWidth>1</bitWidth>
136739              <access>write-only</access>
136740            </field>
136741            <field>
136742              <name>CKR</name>
136743              <description>Clear the Key Register</description>
136744              <bitOffset>6</bitOffset>
136745              <bitWidth>1</bitWidth>
136746              <access>write-only</access>
136747            </field>
136748            <field>
136749              <name>CPKA</name>
136750              <description>Clear the PKHA A Size Register</description>
136751              <bitOffset>12</bitOffset>
136752              <bitWidth>1</bitWidth>
136753              <access>write-only</access>
136754            </field>
136755            <field>
136756              <name>CPKB</name>
136757              <description>Clear the PKHA B Size Register</description>
136758              <bitOffset>13</bitOffset>
136759              <bitWidth>1</bitWidth>
136760              <access>write-only</access>
136761            </field>
136762            <field>
136763              <name>CPKN</name>
136764              <description>Clear the PKHA N Size Register</description>
136765              <bitOffset>14</bitOffset>
136766              <bitWidth>1</bitWidth>
136767              <access>write-only</access>
136768            </field>
136769            <field>
136770              <name>CPKE</name>
136771              <description>Clear the PKHA E Size Register</description>
136772              <bitOffset>15</bitOffset>
136773              <bitWidth>1</bitWidth>
136774              <access>write-only</access>
136775            </field>
136776            <field>
136777              <name>COF</name>
136778              <description>Clear Output FIFO. Writing a 1 to this bit causes the Output FIFO to be cleared.</description>
136779              <bitOffset>30</bitOffset>
136780              <bitWidth>1</bitWidth>
136781              <access>write-only</access>
136782            </field>
136783            <field>
136784              <name>CIF</name>
136785              <description>Clear Input FIFO. Writing a 1 to this bit causes the Input Data FIFO.</description>
136786              <bitOffset>31</bitOffset>
136787              <bitWidth>1</bitWidth>
136788              <access>write-only</access>
136789            </field>
136790          </fields>
136791        </register>
136792        <register>
136793          <name>LTC0_STA</name>
136794          <description>LTC Status Register</description>
136795          <addressOffset>0x48</addressOffset>
136796          <size>32</size>
136797          <access>read-write</access>
136798          <resetValue>0</resetValue>
136799          <resetMask>0xFFFFFFFF</resetMask>
136800          <fields>
136801            <field>
136802              <name>AB</name>
136803              <description>AESA Busy</description>
136804              <bitOffset>1</bitOffset>
136805              <bitWidth>1</bitWidth>
136806              <access>read-only</access>
136807              <enumeratedValues>
136808                <enumeratedValue>
136809                  <name>0</name>
136810                  <description>AESA Idle</description>
136811                  <value>#0</value>
136812                </enumeratedValue>
136813                <enumeratedValue>
136814                  <name>1</name>
136815                  <description>AESA Busy.</description>
136816                  <value>#1</value>
136817                </enumeratedValue>
136818              </enumeratedValues>
136819            </field>
136820            <field>
136821              <name>DB</name>
136822              <description>DESA Busy</description>
136823              <bitOffset>2</bitOffset>
136824              <bitWidth>1</bitWidth>
136825              <access>read-only</access>
136826              <enumeratedValues>
136827                <enumeratedValue>
136828                  <name>0</name>
136829                  <description>DESA Idle</description>
136830                  <value>#0</value>
136831                </enumeratedValue>
136832                <enumeratedValue>
136833                  <name>1</name>
136834                  <description>DESA Busy.</description>
136835                  <value>#1</value>
136836                </enumeratedValue>
136837              </enumeratedValues>
136838            </field>
136839            <field>
136840              <name>PB</name>
136841              <description>PKHA Busy</description>
136842              <bitOffset>6</bitOffset>
136843              <bitWidth>1</bitWidth>
136844              <access>read-only</access>
136845              <enumeratedValues>
136846                <enumeratedValue>
136847                  <name>0</name>
136848                  <description>PKHA Idle</description>
136849                  <value>#0</value>
136850                </enumeratedValue>
136851                <enumeratedValue>
136852                  <name>1</name>
136853                  <description>PKHA Busy.</description>
136854                  <value>#1</value>
136855                </enumeratedValue>
136856              </enumeratedValues>
136857            </field>
136858            <field>
136859              <name>DI</name>
136860              <description>Done Interrupt</description>
136861              <bitOffset>16</bitOffset>
136862              <bitWidth>1</bitWidth>
136863              <access>read-write</access>
136864            </field>
136865            <field>
136866              <name>EI</name>
136867              <description>Error Interrupt</description>
136868              <bitOffset>20</bitOffset>
136869              <bitWidth>1</bitWidth>
136870              <access>read-only</access>
136871              <enumeratedValues>
136872                <enumeratedValue>
136873                  <name>0</name>
136874                  <description>Not Error.</description>
136875                  <value>#0</value>
136876                </enumeratedValue>
136877                <enumeratedValue>
136878                  <name>1</name>
136879                  <description>Error Interrupt.</description>
136880                  <value>#1</value>
136881                </enumeratedValue>
136882              </enumeratedValues>
136883            </field>
136884            <field>
136885              <name>PKP</name>
136886              <description>Public Key is Prime</description>
136887              <bitOffset>28</bitOffset>
136888              <bitWidth>1</bitWidth>
136889              <access>read-only</access>
136890            </field>
136891            <field>
136892              <name>PKO</name>
136893              <description>Public Key Operation is One</description>
136894              <bitOffset>29</bitOffset>
136895              <bitWidth>1</bitWidth>
136896              <access>read-only</access>
136897            </field>
136898            <field>
136899              <name>PKZ</name>
136900              <description>Public Key Operation is Zero</description>
136901              <bitOffset>30</bitOffset>
136902              <bitWidth>1</bitWidth>
136903              <access>read-only</access>
136904            </field>
136905          </fields>
136906        </register>
136907        <register>
136908          <name>LTC0_ESTA</name>
136909          <description>LTC Error Status Register</description>
136910          <addressOffset>0x4C</addressOffset>
136911          <size>32</size>
136912          <access>read-only</access>
136913          <resetValue>0</resetValue>
136914          <resetMask>0xFFFFFFFF</resetMask>
136915          <fields>
136916            <field>
136917              <name>ERRID1</name>
136918              <description>Error ID 1</description>
136919              <bitOffset>0</bitOffset>
136920              <bitWidth>4</bitWidth>
136921              <access>read-only</access>
136922              <enumeratedValues>
136923                <enumeratedValue>
136924                  <name>0001</name>
136925                  <description>Mode Error</description>
136926                  <value>#0001</value>
136927                </enumeratedValue>
136928                <enumeratedValue>
136929                  <name>0010</name>
136930                  <description>Data Size Error, including PKHA N Register Size Error</description>
136931                  <value>#0010</value>
136932                </enumeratedValue>
136933                <enumeratedValue>
136934                  <name>0011</name>
136935                  <description>Key Size Error, including PKHA E Register Size Error</description>
136936                  <value>#0011</value>
136937                </enumeratedValue>
136938                <enumeratedValue>
136939                  <name>0100</name>
136940                  <description>PKHA A Register Size Error</description>
136941                  <value>#0100</value>
136942                </enumeratedValue>
136943                <enumeratedValue>
136944                  <name>0101</name>
136945                  <description>PKHA B Register Size Error</description>
136946                  <value>#0101</value>
136947                </enumeratedValue>
136948                <enumeratedValue>
136949                  <name>0110</name>
136950                  <description>Data Arrived out of Sequence Error</description>
136951                  <value>#0110</value>
136952                </enumeratedValue>
136953                <enumeratedValue>
136954                  <name>0111</name>
136955                  <description>PKHA Divide by Zero Error</description>
136956                  <value>#0111</value>
136957                </enumeratedValue>
136958                <enumeratedValue>
136959                  <name>1000</name>
136960                  <description>PKHA Modulus Even Error</description>
136961                  <value>#1000</value>
136962                </enumeratedValue>
136963                <enumeratedValue>
136964                  <name>1001</name>
136965                  <description>DES Key Parity Error</description>
136966                  <value>#1001</value>
136967                </enumeratedValue>
136968                <enumeratedValue>
136969                  <name>1010</name>
136970                  <description>ICV Check Failed</description>
136971                  <value>#1010</value>
136972                </enumeratedValue>
136973                <enumeratedValue>
136974                  <name>1011</name>
136975                  <description>Internal Hardware Failure</description>
136976                  <value>#1011</value>
136977                </enumeratedValue>
136978                <enumeratedValue>
136979                  <name>1100</name>
136980                  <description>CCM AAD Size Error (either 1. AAD flag in B0 =1 and no AAD type provided, 2. AAD flag in B0 = 0 and AAD povided, or 3. AAD flag in B0 =1 and not enough AAD provided - expecting more based on AAD size.)</description>
136981                  <value>#1100</value>
136982                </enumeratedValue>
136983                <enumeratedValue>
136984                  <name>1111</name>
136985                  <description>Invalid Crypto Engine Selected</description>
136986                  <value>#1111</value>
136987                </enumeratedValue>
136988              </enumeratedValues>
136989            </field>
136990            <field>
136991              <name>CL1</name>
136992              <description>algorithms. The algorithms field indicates which algorithm is asserting an error. Others reserved</description>
136993              <bitOffset>8</bitOffset>
136994              <bitWidth>4</bitWidth>
136995              <access>read-only</access>
136996              <enumeratedValues>
136997                <enumeratedValue>
136998                  <name>0000</name>
136999                  <description>LTC General Error</description>
137000                  <value>#0000</value>
137001                </enumeratedValue>
137002                <enumeratedValue>
137003                  <name>0001</name>
137004                  <description>AES</description>
137005                  <value>#0001</value>
137006                </enumeratedValue>
137007                <enumeratedValue>
137008                  <name>0010</name>
137009                  <description>DES</description>
137010                  <value>#0010</value>
137011                </enumeratedValue>
137012                <enumeratedValue>
137013                  <name>1000</name>
137014                  <description>Public Key</description>
137015                  <value>#1000</value>
137016                </enumeratedValue>
137017              </enumeratedValues>
137018            </field>
137019          </fields>
137020        </register>
137021        <register>
137022          <name>LTC0_AADSZ</name>
137023          <description>LTC AAD Size Register</description>
137024          <addressOffset>0x58</addressOffset>
137025          <size>32</size>
137026          <access>read-write</access>
137027          <resetValue>0</resetValue>
137028          <resetMask>0xFFFFFFFF</resetMask>
137029          <fields>
137030            <field>
137031              <name>AADSZ</name>
137032              <description>AAD size in Bytes, mod 16.</description>
137033              <bitOffset>0</bitOffset>
137034              <bitWidth>4</bitWidth>
137035              <access>read-write</access>
137036            </field>
137037            <field>
137038              <name>AL</name>
137039              <description>AAD Last. Only AAD data will be written into the Input FIFO.</description>
137040              <bitOffset>31</bitOffset>
137041              <bitWidth>1</bitWidth>
137042              <access>read-write</access>
137043            </field>
137044          </fields>
137045        </register>
137046        <register>
137047          <name>LTC0_IVSZ</name>
137048          <description>LTC IV Size Register</description>
137049          <addressOffset>0x60</addressOffset>
137050          <size>32</size>
137051          <access>read-write</access>
137052          <resetValue>0</resetValue>
137053          <resetMask>0xFFFFFFFF</resetMask>
137054          <fields>
137055            <field>
137056              <name>IVSZ</name>
137057              <description>IV size in Bytes, mod 16.</description>
137058              <bitOffset>0</bitOffset>
137059              <bitWidth>4</bitWidth>
137060              <access>read-write</access>
137061            </field>
137062            <field>
137063              <name>IL</name>
137064              <description>IV Last. Only IV data will be written into the Input FIFO.</description>
137065              <bitOffset>31</bitOffset>
137066              <bitWidth>1</bitWidth>
137067              <access>read-write</access>
137068            </field>
137069          </fields>
137070        </register>
137071        <register>
137072          <name>LTC0_DPAMS</name>
137073          <description>LTC DPA Mask Seed Register</description>
137074          <addressOffset>0x68</addressOffset>
137075          <size>32</size>
137076          <access>write-only</access>
137077          <resetValue>0</resetValue>
137078          <resetMask>0xFFFFFFFF</resetMask>
137079          <fields>
137080            <field>
137081              <name>DPAMS</name>
137082              <description>Differential Power Analysis Mask Seed</description>
137083              <bitOffset>0</bitOffset>
137084              <bitWidth>32</bitWidth>
137085              <access>write-only</access>
137086            </field>
137087          </fields>
137088        </register>
137089        <register>
137090          <name>LTC0_PKASZ</name>
137091          <description>LTC PKHA A Size Register</description>
137092          <addressOffset>0x80</addressOffset>
137093          <size>32</size>
137094          <access>read-write</access>
137095          <resetValue>0</resetValue>
137096          <resetMask>0xFFFFFFFF</resetMask>
137097          <fields>
137098            <field>
137099              <name>PKASZ</name>
137100              <description>PKHA A Size. This is the size of the numeric value, in bytes, contained within the PKHA A Register.</description>
137101              <bitOffset>0</bitOffset>
137102              <bitWidth>9</bitWidth>
137103              <access>read-write</access>
137104            </field>
137105          </fields>
137106        </register>
137107        <register>
137108          <name>LTC0_PKBSZ</name>
137109          <description>LTC PKHA B Size Register</description>
137110          <addressOffset>0x88</addressOffset>
137111          <size>32</size>
137112          <access>read-write</access>
137113          <resetValue>0</resetValue>
137114          <resetMask>0xFFFFFFFF</resetMask>
137115          <fields>
137116            <field>
137117              <name>PKBSZ</name>
137118              <description>PKHA B Size. This is the size of the numeric value, in bytes, contained within the PKHA B Register.</description>
137119              <bitOffset>0</bitOffset>
137120              <bitWidth>9</bitWidth>
137121              <access>read-write</access>
137122            </field>
137123          </fields>
137124        </register>
137125        <register>
137126          <name>LTC0_PKNSZ</name>
137127          <description>LTC PKHA N Size Register</description>
137128          <addressOffset>0x90</addressOffset>
137129          <size>32</size>
137130          <access>read-write</access>
137131          <resetValue>0</resetValue>
137132          <resetMask>0xFFFFFFFF</resetMask>
137133          <fields>
137134            <field>
137135              <name>PKNSZ</name>
137136              <description>PKHA N Size. This is the size of the numeric value, in bytes, contained within the PKHA N Register.</description>
137137              <bitOffset>0</bitOffset>
137138              <bitWidth>9</bitWidth>
137139              <access>read-write</access>
137140            </field>
137141          </fields>
137142        </register>
137143        <register>
137144          <name>LTC0_PKESZ</name>
137145          <description>LTC PKHA E Size Register</description>
137146          <addressOffset>0x98</addressOffset>
137147          <size>32</size>
137148          <access>read-write</access>
137149          <resetValue>0</resetValue>
137150          <resetMask>0xFFFFFFFF</resetMask>
137151          <fields>
137152            <field>
137153              <name>PKESZ</name>
137154              <description>PKHA E Size. This is the size of the numeric value, in bytes, contained within the PKHA E Register.</description>
137155              <bitOffset>0</bitOffset>
137156              <bitWidth>9</bitWidth>
137157              <access>read-write</access>
137158            </field>
137159          </fields>
137160        </register>
137161        <register>
137162          <name>LTC0_CTX_0</name>
137163          <description>LTC Context Register</description>
137164          <addressOffset>0x100</addressOffset>
137165          <size>32</size>
137166          <access>read-write</access>
137167          <resetValue>0</resetValue>
137168          <resetMask>0xFFFFFFFF</resetMask>
137169          <fields>
137170            <field>
137171              <name>CTX</name>
137172              <description>CTX</description>
137173              <bitOffset>0</bitOffset>
137174              <bitWidth>32</bitWidth>
137175              <access>read-write</access>
137176            </field>
137177          </fields>
137178        </register>
137179        <register>
137180          <name>LTC0_CTX_1</name>
137181          <description>LTC Context Register</description>
137182          <addressOffset>0x104</addressOffset>
137183          <size>32</size>
137184          <access>read-write</access>
137185          <resetValue>0</resetValue>
137186          <resetMask>0xFFFFFFFF</resetMask>
137187          <fields>
137188            <field>
137189              <name>CTX</name>
137190              <description>CTX</description>
137191              <bitOffset>0</bitOffset>
137192              <bitWidth>32</bitWidth>
137193              <access>read-write</access>
137194            </field>
137195          </fields>
137196        </register>
137197        <register>
137198          <name>LTC0_CTX_2</name>
137199          <description>LTC Context Register</description>
137200          <addressOffset>0x108</addressOffset>
137201          <size>32</size>
137202          <access>read-write</access>
137203          <resetValue>0</resetValue>
137204          <resetMask>0xFFFFFFFF</resetMask>
137205          <fields>
137206            <field>
137207              <name>CTX</name>
137208              <description>CTX</description>
137209              <bitOffset>0</bitOffset>
137210              <bitWidth>32</bitWidth>
137211              <access>read-write</access>
137212            </field>
137213          </fields>
137214        </register>
137215        <register>
137216          <name>LTC0_CTX_3</name>
137217          <description>LTC Context Register</description>
137218          <addressOffset>0x10C</addressOffset>
137219          <size>32</size>
137220          <access>read-write</access>
137221          <resetValue>0</resetValue>
137222          <resetMask>0xFFFFFFFF</resetMask>
137223          <fields>
137224            <field>
137225              <name>CTX</name>
137226              <description>CTX</description>
137227              <bitOffset>0</bitOffset>
137228              <bitWidth>32</bitWidth>
137229              <access>read-write</access>
137230            </field>
137231          </fields>
137232        </register>
137233        <register>
137234          <name>LTC0_CTX_4</name>
137235          <description>LTC Context Register</description>
137236          <addressOffset>0x110</addressOffset>
137237          <size>32</size>
137238          <access>read-write</access>
137239          <resetValue>0</resetValue>
137240          <resetMask>0xFFFFFFFF</resetMask>
137241          <fields>
137242            <field>
137243              <name>CTX</name>
137244              <description>CTX</description>
137245              <bitOffset>0</bitOffset>
137246              <bitWidth>32</bitWidth>
137247              <access>read-write</access>
137248            </field>
137249          </fields>
137250        </register>
137251        <register>
137252          <name>LTC0_CTX_5</name>
137253          <description>LTC Context Register</description>
137254          <addressOffset>0x114</addressOffset>
137255          <size>32</size>
137256          <access>read-write</access>
137257          <resetValue>0</resetValue>
137258          <resetMask>0xFFFFFFFF</resetMask>
137259          <fields>
137260            <field>
137261              <name>CTX</name>
137262              <description>CTX</description>
137263              <bitOffset>0</bitOffset>
137264              <bitWidth>32</bitWidth>
137265              <access>read-write</access>
137266            </field>
137267          </fields>
137268        </register>
137269        <register>
137270          <name>LTC0_CTX_6</name>
137271          <description>LTC Context Register</description>
137272          <addressOffset>0x118</addressOffset>
137273          <size>32</size>
137274          <access>read-write</access>
137275          <resetValue>0</resetValue>
137276          <resetMask>0xFFFFFFFF</resetMask>
137277          <fields>
137278            <field>
137279              <name>CTX</name>
137280              <description>CTX</description>
137281              <bitOffset>0</bitOffset>
137282              <bitWidth>32</bitWidth>
137283              <access>read-write</access>
137284            </field>
137285          </fields>
137286        </register>
137287        <register>
137288          <name>LTC0_CTX_7</name>
137289          <description>LTC Context Register</description>
137290          <addressOffset>0x11C</addressOffset>
137291          <size>32</size>
137292          <access>read-write</access>
137293          <resetValue>0</resetValue>
137294          <resetMask>0xFFFFFFFF</resetMask>
137295          <fields>
137296            <field>
137297              <name>CTX</name>
137298              <description>CTX</description>
137299              <bitOffset>0</bitOffset>
137300              <bitWidth>32</bitWidth>
137301              <access>read-write</access>
137302            </field>
137303          </fields>
137304        </register>
137305        <register>
137306          <name>LTC0_CTX_8</name>
137307          <description>LTC Context Register</description>
137308          <addressOffset>0x120</addressOffset>
137309          <size>32</size>
137310          <access>read-write</access>
137311          <resetValue>0</resetValue>
137312          <resetMask>0xFFFFFFFF</resetMask>
137313          <fields>
137314            <field>
137315              <name>CTX</name>
137316              <description>CTX</description>
137317              <bitOffset>0</bitOffset>
137318              <bitWidth>32</bitWidth>
137319              <access>read-write</access>
137320            </field>
137321          </fields>
137322        </register>
137323        <register>
137324          <name>LTC0_CTX_9</name>
137325          <description>LTC Context Register</description>
137326          <addressOffset>0x124</addressOffset>
137327          <size>32</size>
137328          <access>read-write</access>
137329          <resetValue>0</resetValue>
137330          <resetMask>0xFFFFFFFF</resetMask>
137331          <fields>
137332            <field>
137333              <name>CTX</name>
137334              <description>CTX</description>
137335              <bitOffset>0</bitOffset>
137336              <bitWidth>32</bitWidth>
137337              <access>read-write</access>
137338            </field>
137339          </fields>
137340        </register>
137341        <register>
137342          <name>LTC0_CTX_10</name>
137343          <description>LTC Context Register</description>
137344          <addressOffset>0x128</addressOffset>
137345          <size>32</size>
137346          <access>read-write</access>
137347          <resetValue>0</resetValue>
137348          <resetMask>0xFFFFFFFF</resetMask>
137349          <fields>
137350            <field>
137351              <name>CTX</name>
137352              <description>CTX</description>
137353              <bitOffset>0</bitOffset>
137354              <bitWidth>32</bitWidth>
137355              <access>read-write</access>
137356            </field>
137357          </fields>
137358        </register>
137359        <register>
137360          <name>LTC0_CTX_11</name>
137361          <description>LTC Context Register</description>
137362          <addressOffset>0x12C</addressOffset>
137363          <size>32</size>
137364          <access>read-write</access>
137365          <resetValue>0</resetValue>
137366          <resetMask>0xFFFFFFFF</resetMask>
137367          <fields>
137368            <field>
137369              <name>CTX</name>
137370              <description>CTX</description>
137371              <bitOffset>0</bitOffset>
137372              <bitWidth>32</bitWidth>
137373              <access>read-write</access>
137374            </field>
137375          </fields>
137376        </register>
137377        <register>
137378          <name>LTC0_CTX_12</name>
137379          <description>LTC Context Register</description>
137380          <addressOffset>0x130</addressOffset>
137381          <size>32</size>
137382          <access>read-write</access>
137383          <resetValue>0</resetValue>
137384          <resetMask>0xFFFFFFFF</resetMask>
137385          <fields>
137386            <field>
137387              <name>CTX</name>
137388              <description>CTX</description>
137389              <bitOffset>0</bitOffset>
137390              <bitWidth>32</bitWidth>
137391              <access>read-write</access>
137392            </field>
137393          </fields>
137394        </register>
137395        <register>
137396          <name>LTC0_CTX_13</name>
137397          <description>LTC Context Register</description>
137398          <addressOffset>0x134</addressOffset>
137399          <size>32</size>
137400          <access>read-write</access>
137401          <resetValue>0</resetValue>
137402          <resetMask>0xFFFFFFFF</resetMask>
137403          <fields>
137404            <field>
137405              <name>CTX</name>
137406              <description>CTX</description>
137407              <bitOffset>0</bitOffset>
137408              <bitWidth>32</bitWidth>
137409              <access>read-write</access>
137410            </field>
137411          </fields>
137412        </register>
137413        <register>
137414          <name>LTC0_CTX_14</name>
137415          <description>LTC Context Register</description>
137416          <addressOffset>0x138</addressOffset>
137417          <size>32</size>
137418          <access>read-write</access>
137419          <resetValue>0</resetValue>
137420          <resetMask>0xFFFFFFFF</resetMask>
137421          <fields>
137422            <field>
137423              <name>CTX</name>
137424              <description>CTX</description>
137425              <bitOffset>0</bitOffset>
137426              <bitWidth>32</bitWidth>
137427              <access>read-write</access>
137428            </field>
137429          </fields>
137430        </register>
137431        <register>
137432          <name>LTC0_CTX_15</name>
137433          <description>LTC Context Register</description>
137434          <addressOffset>0x13C</addressOffset>
137435          <size>32</size>
137436          <access>read-write</access>
137437          <resetValue>0</resetValue>
137438          <resetMask>0xFFFFFFFF</resetMask>
137439          <fields>
137440            <field>
137441              <name>CTX</name>
137442              <description>CTX</description>
137443              <bitOffset>0</bitOffset>
137444              <bitWidth>32</bitWidth>
137445              <access>read-write</access>
137446            </field>
137447          </fields>
137448        </register>
137449        <register>
137450          <name>LTC0_KEY_0</name>
137451          <description>LTC Key Registers</description>
137452          <addressOffset>0x200</addressOffset>
137453          <size>32</size>
137454          <access>read-write</access>
137455          <resetValue>0</resetValue>
137456          <resetMask>0xFFFFFFFF</resetMask>
137457          <fields>
137458            <field>
137459              <name>KEY</name>
137460              <description>KEY</description>
137461              <bitOffset>0</bitOffset>
137462              <bitWidth>32</bitWidth>
137463              <access>read-write</access>
137464            </field>
137465          </fields>
137466        </register>
137467        <register>
137468          <name>LTC0_KEY_1</name>
137469          <description>LTC Key Registers</description>
137470          <addressOffset>0x204</addressOffset>
137471          <size>32</size>
137472          <access>read-write</access>
137473          <resetValue>0</resetValue>
137474          <resetMask>0xFFFFFFFF</resetMask>
137475          <fields>
137476            <field>
137477              <name>KEY</name>
137478              <description>KEY</description>
137479              <bitOffset>0</bitOffset>
137480              <bitWidth>32</bitWidth>
137481              <access>read-write</access>
137482            </field>
137483          </fields>
137484        </register>
137485        <register>
137486          <name>LTC0_KEY_2</name>
137487          <description>LTC Key Registers</description>
137488          <addressOffset>0x208</addressOffset>
137489          <size>32</size>
137490          <access>read-write</access>
137491          <resetValue>0</resetValue>
137492          <resetMask>0xFFFFFFFF</resetMask>
137493          <fields>
137494            <field>
137495              <name>KEY</name>
137496              <description>KEY</description>
137497              <bitOffset>0</bitOffset>
137498              <bitWidth>32</bitWidth>
137499              <access>read-write</access>
137500            </field>
137501          </fields>
137502        </register>
137503        <register>
137504          <name>LTC0_KEY_3</name>
137505          <description>LTC Key Registers</description>
137506          <addressOffset>0x20C</addressOffset>
137507          <size>32</size>
137508          <access>read-write</access>
137509          <resetValue>0</resetValue>
137510          <resetMask>0xFFFFFFFF</resetMask>
137511          <fields>
137512            <field>
137513              <name>KEY</name>
137514              <description>KEY</description>
137515              <bitOffset>0</bitOffset>
137516              <bitWidth>32</bitWidth>
137517              <access>read-write</access>
137518            </field>
137519          </fields>
137520        </register>
137521        <register>
137522          <name>LTC0_KEY_4</name>
137523          <description>LTC Key Registers</description>
137524          <addressOffset>0x210</addressOffset>
137525          <size>32</size>
137526          <access>read-write</access>
137527          <resetValue>0</resetValue>
137528          <resetMask>0xFFFFFFFF</resetMask>
137529          <fields>
137530            <field>
137531              <name>KEY</name>
137532              <description>KEY</description>
137533              <bitOffset>0</bitOffset>
137534              <bitWidth>32</bitWidth>
137535              <access>read-write</access>
137536            </field>
137537          </fields>
137538        </register>
137539        <register>
137540          <name>LTC0_KEY_5</name>
137541          <description>LTC Key Registers</description>
137542          <addressOffset>0x214</addressOffset>
137543          <size>32</size>
137544          <access>read-write</access>
137545          <resetValue>0</resetValue>
137546          <resetMask>0xFFFFFFFF</resetMask>
137547          <fields>
137548            <field>
137549              <name>KEY</name>
137550              <description>KEY</description>
137551              <bitOffset>0</bitOffset>
137552              <bitWidth>32</bitWidth>
137553              <access>read-write</access>
137554            </field>
137555          </fields>
137556        </register>
137557        <register>
137558          <name>LTC0_KEY_6</name>
137559          <description>LTC Key Registers</description>
137560          <addressOffset>0x218</addressOffset>
137561          <size>32</size>
137562          <access>read-write</access>
137563          <resetValue>0</resetValue>
137564          <resetMask>0xFFFFFFFF</resetMask>
137565          <fields>
137566            <field>
137567              <name>KEY</name>
137568              <description>KEY</description>
137569              <bitOffset>0</bitOffset>
137570              <bitWidth>32</bitWidth>
137571              <access>read-write</access>
137572            </field>
137573          </fields>
137574        </register>
137575        <register>
137576          <name>LTC0_KEY_7</name>
137577          <description>LTC Key Registers</description>
137578          <addressOffset>0x21C</addressOffset>
137579          <size>32</size>
137580          <access>read-write</access>
137581          <resetValue>0</resetValue>
137582          <resetMask>0xFFFFFFFF</resetMask>
137583          <fields>
137584            <field>
137585              <name>KEY</name>
137586              <description>KEY</description>
137587              <bitOffset>0</bitOffset>
137588              <bitWidth>32</bitWidth>
137589              <access>read-write</access>
137590            </field>
137591          </fields>
137592        </register>
137593        <register>
137594          <name>LTC0_VID1</name>
137595          <description>LTC Version ID Register</description>
137596          <addressOffset>0x4F0</addressOffset>
137597          <size>32</size>
137598          <access>read-only</access>
137599          <resetValue>0x340100</resetValue>
137600          <resetMask>0xFFFFFFFF</resetMask>
137601          <fields>
137602            <field>
137603              <name>MIN_REV</name>
137604              <description>Minor revision number.</description>
137605              <bitOffset>0</bitOffset>
137606              <bitWidth>8</bitWidth>
137607              <access>read-only</access>
137608            </field>
137609            <field>
137610              <name>MAJ_REV</name>
137611              <description>Major revision number.</description>
137612              <bitOffset>8</bitOffset>
137613              <bitWidth>8</bitWidth>
137614              <access>read-only</access>
137615            </field>
137616            <field>
137617              <name>IP_ID</name>
137618              <description>ID(0x0038).</description>
137619              <bitOffset>16</bitOffset>
137620              <bitWidth>16</bitWidth>
137621              <access>read-only</access>
137622            </field>
137623          </fields>
137624        </register>
137625        <register>
137626          <name>LTC0_CHAVID</name>
137627          <description>LTC CHA Version ID Register</description>
137628          <addressOffset>0x4F8</addressOffset>
137629          <size>32</size>
137630          <access>read-only</access>
137631          <resetValue>0x440151</resetValue>
137632          <resetMask>0xFFFFFFFF</resetMask>
137633          <fields>
137634            <field>
137635              <name>AESREV</name>
137636              <description>AES Revision Number</description>
137637              <bitOffset>0</bitOffset>
137638              <bitWidth>4</bitWidth>
137639              <access>read-only</access>
137640            </field>
137641            <field>
137642              <name>AESVID</name>
137643              <description>AES Version ID</description>
137644              <bitOffset>4</bitOffset>
137645              <bitWidth>4</bitWidth>
137646              <access>read-only</access>
137647            </field>
137648            <field>
137649              <name>DESREV</name>
137650              <description>DES Revision Number</description>
137651              <bitOffset>8</bitOffset>
137652              <bitWidth>4</bitWidth>
137653              <access>read-only</access>
137654            </field>
137655            <field>
137656              <name>DESVID</name>
137657              <description>DES Version ID(0x0). 0000 - High-performance DESA 0001 - Low-performance DESA</description>
137658              <bitOffset>12</bitOffset>
137659              <bitWidth>4</bitWidth>
137660              <access>read-only</access>
137661            </field>
137662            <field>
137663              <name>PKHAREV</name>
137664              <description>PK Revision Number</description>
137665              <bitOffset>16</bitOffset>
137666              <bitWidth>4</bitWidth>
137667              <access>read-only</access>
137668            </field>
137669            <field>
137670              <name>PKHAVID</name>
137671              <description>PK Version ID 0001 - 32-bit PKHA-SD 0010 - 64-bit PKHA-SD 0011 - 128-bit PKHA-SD 0100 - 16-bit PKHA-SD</description>
137672              <bitOffset>20</bitOffset>
137673              <bitWidth>4</bitWidth>
137674              <access>read-only</access>
137675            </field>
137676          </fields>
137677        </register>
137678        <register>
137679          <name>LTC0_FIFOSTA</name>
137680          <description>LTC FIFO Status Register</description>
137681          <addressOffset>0x7C0</addressOffset>
137682          <size>32</size>
137683          <access>read-only</access>
137684          <resetValue>0</resetValue>
137685          <resetMask>0xFFFFFFFF</resetMask>
137686          <fields>
137687            <field>
137688              <name>IFL</name>
137689              <description>Input FIFO Level. These bits indicate the current number of entries in the Input FIFO.</description>
137690              <bitOffset>0</bitOffset>
137691              <bitWidth>7</bitWidth>
137692              <access>read-only</access>
137693            </field>
137694            <field>
137695              <name>IFF</name>
137696              <description>Input FIFO Full. The Input FIFO is full and should not be written to.</description>
137697              <bitOffset>15</bitOffset>
137698              <bitWidth>1</bitWidth>
137699              <access>read-only</access>
137700            </field>
137701            <field>
137702              <name>OFL</name>
137703              <description>Output FIFO Level. These bits indicate the current number of entries in the Output FIFO.</description>
137704              <bitOffset>16</bitOffset>
137705              <bitWidth>7</bitWidth>
137706              <access>read-only</access>
137707            </field>
137708            <field>
137709              <name>OFF</name>
137710              <description>Output FIFO Full. The Output FIFO is full and should not be written to.</description>
137711              <bitOffset>31</bitOffset>
137712              <bitWidth>1</bitWidth>
137713              <access>read-only</access>
137714            </field>
137715          </fields>
137716        </register>
137717        <register>
137718          <name>LTC0_IFIFO</name>
137719          <description>LTC Input Data FIFO</description>
137720          <addressOffset>0x7E0</addressOffset>
137721          <size>32</size>
137722          <access>write-only</access>
137723          <resetValue>0</resetValue>
137724          <resetMask>0xFFFFFFFF</resetMask>
137725          <fields>
137726            <field>
137727              <name>IFIFO</name>
137728              <description>IFIFO</description>
137729              <bitOffset>0</bitOffset>
137730              <bitWidth>32</bitWidth>
137731              <access>write-only</access>
137732            </field>
137733          </fields>
137734        </register>
137735        <register>
137736          <name>LTC0_OFIFO</name>
137737          <description>LTC Output Data FIFO</description>
137738          <addressOffset>0x7F0</addressOffset>
137739          <size>32</size>
137740          <access>read-only</access>
137741          <resetValue>0</resetValue>
137742          <resetMask>0xFFFFFFFF</resetMask>
137743          <fields>
137744            <field>
137745              <name>OFIFO</name>
137746              <description>Output FIFO</description>
137747              <bitOffset>0</bitOffset>
137748              <bitWidth>32</bitWidth>
137749              <access>read-only</access>
137750            </field>
137751          </fields>
137752        </register>
137753        <register>
137754          <name>LTC0_PKA0_0</name>
137755          <description>LTC PKHA A0 0 Register</description>
137756          <alternateGroup>LTC0</alternateGroup>
137757          <addressOffset>0x800</addressOffset>
137758          <size>32</size>
137759          <access>read-write</access>
137760          <resetValue>0</resetValue>
137761          <resetMask>0xFFFFFFFF</resetMask>
137762          <fields>
137763            <field>
137764              <name>PKHA_A0</name>
137765              <description>A0 VALUE</description>
137766              <bitOffset>0</bitOffset>
137767              <bitWidth>32</bitWidth>
137768              <access>read-write</access>
137769            </field>
137770          </fields>
137771        </register>
137772        <register>
137773          <name>LTC0_PKA_0</name>
137774          <description>LTC PKHA A 0 Register</description>
137775          <alternateGroup>LTC0</alternateGroup>
137776          <addressOffset>0x800</addressOffset>
137777          <size>32</size>
137778          <access>read-write</access>
137779          <resetValue>0</resetValue>
137780          <resetMask>0xFFFFFFFF</resetMask>
137781        </register>
137782        <register>
137783          <name>LTC0_PKA0_1</name>
137784          <description>LTC PKHA A0 1 Register</description>
137785          <alternateGroup>LTC0</alternateGroup>
137786          <addressOffset>0x804</addressOffset>
137787          <size>32</size>
137788          <access>read-write</access>
137789          <resetValue>0</resetValue>
137790          <resetMask>0xFFFFFFFF</resetMask>
137791          <fields>
137792            <field>
137793              <name>PKHA_A0</name>
137794              <description>A0 VALUE</description>
137795              <bitOffset>0</bitOffset>
137796              <bitWidth>32</bitWidth>
137797              <access>read-write</access>
137798            </field>
137799          </fields>
137800        </register>
137801        <register>
137802          <name>LTC0_PKA_1</name>
137803          <description>LTC PKHA A 1 Register</description>
137804          <alternateGroup>LTC0</alternateGroup>
137805          <addressOffset>0x804</addressOffset>
137806          <size>32</size>
137807          <access>read-write</access>
137808          <resetValue>0</resetValue>
137809          <resetMask>0xFFFFFFFF</resetMask>
137810        </register>
137811        <register>
137812          <name>LTC0_PKA0_2</name>
137813          <description>LTC PKHA A0 2 Register</description>
137814          <alternateGroup>LTC0</alternateGroup>
137815          <addressOffset>0x808</addressOffset>
137816          <size>32</size>
137817          <access>read-write</access>
137818          <resetValue>0</resetValue>
137819          <resetMask>0xFFFFFFFF</resetMask>
137820          <fields>
137821            <field>
137822              <name>PKHA_A0</name>
137823              <description>A0 VALUE</description>
137824              <bitOffset>0</bitOffset>
137825              <bitWidth>32</bitWidth>
137826              <access>read-write</access>
137827            </field>
137828          </fields>
137829        </register>
137830        <register>
137831          <name>LTC0_PKA_2</name>
137832          <description>LTC PKHA A 2 Register</description>
137833          <alternateGroup>LTC0</alternateGroup>
137834          <addressOffset>0x808</addressOffset>
137835          <size>32</size>
137836          <access>read-write</access>
137837          <resetValue>0</resetValue>
137838          <resetMask>0xFFFFFFFF</resetMask>
137839        </register>
137840        <register>
137841          <name>LTC0_PKA0_3</name>
137842          <description>LTC PKHA A0 3 Register</description>
137843          <alternateGroup>LTC0</alternateGroup>
137844          <addressOffset>0x80C</addressOffset>
137845          <size>32</size>
137846          <access>read-write</access>
137847          <resetValue>0</resetValue>
137848          <resetMask>0xFFFFFFFF</resetMask>
137849          <fields>
137850            <field>
137851              <name>PKHA_A0</name>
137852              <description>A0 VALUE</description>
137853              <bitOffset>0</bitOffset>
137854              <bitWidth>32</bitWidth>
137855              <access>read-write</access>
137856            </field>
137857          </fields>
137858        </register>
137859        <register>
137860          <name>LTC0_PKA_3</name>
137861          <description>LTC PKHA A 3 Register</description>
137862          <alternateGroup>LTC0</alternateGroup>
137863          <addressOffset>0x80C</addressOffset>
137864          <size>32</size>
137865          <access>read-write</access>
137866          <resetValue>0</resetValue>
137867          <resetMask>0xFFFFFFFF</resetMask>
137868        </register>
137869        <register>
137870          <name>LTC0_PKA0_4</name>
137871          <description>LTC PKHA A0 4 Register</description>
137872          <alternateGroup>LTC0</alternateGroup>
137873          <addressOffset>0x810</addressOffset>
137874          <size>32</size>
137875          <access>read-write</access>
137876          <resetValue>0</resetValue>
137877          <resetMask>0xFFFFFFFF</resetMask>
137878          <fields>
137879            <field>
137880              <name>PKHA_A0</name>
137881              <description>A0 VALUE</description>
137882              <bitOffset>0</bitOffset>
137883              <bitWidth>32</bitWidth>
137884              <access>read-write</access>
137885            </field>
137886          </fields>
137887        </register>
137888        <register>
137889          <name>LTC0_PKA_4</name>
137890          <description>LTC PKHA A 4 Register</description>
137891          <alternateGroup>LTC0</alternateGroup>
137892          <addressOffset>0x810</addressOffset>
137893          <size>32</size>
137894          <access>read-write</access>
137895          <resetValue>0</resetValue>
137896          <resetMask>0xFFFFFFFF</resetMask>
137897        </register>
137898        <register>
137899          <name>LTC0_PKA0_5</name>
137900          <description>LTC PKHA A0 5 Register</description>
137901          <alternateGroup>LTC0</alternateGroup>
137902          <addressOffset>0x814</addressOffset>
137903          <size>32</size>
137904          <access>read-write</access>
137905          <resetValue>0</resetValue>
137906          <resetMask>0xFFFFFFFF</resetMask>
137907          <fields>
137908            <field>
137909              <name>PKHA_A0</name>
137910              <description>A0 VALUE</description>
137911              <bitOffset>0</bitOffset>
137912              <bitWidth>32</bitWidth>
137913              <access>read-write</access>
137914            </field>
137915          </fields>
137916        </register>
137917        <register>
137918          <name>LTC0_PKA_5</name>
137919          <description>LTC PKHA A 5 Register</description>
137920          <alternateGroup>LTC0</alternateGroup>
137921          <addressOffset>0x814</addressOffset>
137922          <size>32</size>
137923          <access>read-write</access>
137924          <resetValue>0</resetValue>
137925          <resetMask>0xFFFFFFFF</resetMask>
137926        </register>
137927        <register>
137928          <name>LTC0_PKA0_6</name>
137929          <description>LTC PKHA A0 6 Register</description>
137930          <alternateGroup>LTC0</alternateGroup>
137931          <addressOffset>0x818</addressOffset>
137932          <size>32</size>
137933          <access>read-write</access>
137934          <resetValue>0</resetValue>
137935          <resetMask>0xFFFFFFFF</resetMask>
137936          <fields>
137937            <field>
137938              <name>PKHA_A0</name>
137939              <description>A0 VALUE</description>
137940              <bitOffset>0</bitOffset>
137941              <bitWidth>32</bitWidth>
137942              <access>read-write</access>
137943            </field>
137944          </fields>
137945        </register>
137946        <register>
137947          <name>LTC0_PKA_6</name>
137948          <description>LTC PKHA A 6 Register</description>
137949          <alternateGroup>LTC0</alternateGroup>
137950          <addressOffset>0x818</addressOffset>
137951          <size>32</size>
137952          <access>read-write</access>
137953          <resetValue>0</resetValue>
137954          <resetMask>0xFFFFFFFF</resetMask>
137955        </register>
137956        <register>
137957          <name>LTC0_PKA0_7</name>
137958          <description>LTC PKHA A0 7 Register</description>
137959          <alternateGroup>LTC0</alternateGroup>
137960          <addressOffset>0x81C</addressOffset>
137961          <size>32</size>
137962          <access>read-write</access>
137963          <resetValue>0</resetValue>
137964          <resetMask>0xFFFFFFFF</resetMask>
137965          <fields>
137966            <field>
137967              <name>PKHA_A0</name>
137968              <description>A0 VALUE</description>
137969              <bitOffset>0</bitOffset>
137970              <bitWidth>32</bitWidth>
137971              <access>read-write</access>
137972            </field>
137973          </fields>
137974        </register>
137975        <register>
137976          <name>LTC0_PKA_7</name>
137977          <description>LTC PKHA A 7 Register</description>
137978          <alternateGroup>LTC0</alternateGroup>
137979          <addressOffset>0x81C</addressOffset>
137980          <size>32</size>
137981          <access>read-write</access>
137982          <resetValue>0</resetValue>
137983          <resetMask>0xFFFFFFFF</resetMask>
137984        </register>
137985        <register>
137986          <name>LTC0_PKA0_8</name>
137987          <description>LTC PKHA A0 8 Register</description>
137988          <alternateGroup>LTC0</alternateGroup>
137989          <addressOffset>0x820</addressOffset>
137990          <size>32</size>
137991          <access>read-write</access>
137992          <resetValue>0</resetValue>
137993          <resetMask>0xFFFFFFFF</resetMask>
137994          <fields>
137995            <field>
137996              <name>PKHA_A0</name>
137997              <description>A0 VALUE</description>
137998              <bitOffset>0</bitOffset>
137999              <bitWidth>32</bitWidth>
138000              <access>read-write</access>
138001            </field>
138002          </fields>
138003        </register>
138004        <register>
138005          <name>LTC0_PKA_8</name>
138006          <description>LTC PKHA A 8 Register</description>
138007          <alternateGroup>LTC0</alternateGroup>
138008          <addressOffset>0x820</addressOffset>
138009          <size>32</size>
138010          <access>read-write</access>
138011          <resetValue>0</resetValue>
138012          <resetMask>0xFFFFFFFF</resetMask>
138013        </register>
138014        <register>
138015          <name>LTC0_PKA0_9</name>
138016          <description>LTC PKHA A0 9 Register</description>
138017          <alternateGroup>LTC0</alternateGroup>
138018          <addressOffset>0x824</addressOffset>
138019          <size>32</size>
138020          <access>read-write</access>
138021          <resetValue>0</resetValue>
138022          <resetMask>0xFFFFFFFF</resetMask>
138023          <fields>
138024            <field>
138025              <name>PKHA_A0</name>
138026              <description>A0 VALUE</description>
138027              <bitOffset>0</bitOffset>
138028              <bitWidth>32</bitWidth>
138029              <access>read-write</access>
138030            </field>
138031          </fields>
138032        </register>
138033        <register>
138034          <name>LTC0_PKA_9</name>
138035          <description>LTC PKHA A 9 Register</description>
138036          <alternateGroup>LTC0</alternateGroup>
138037          <addressOffset>0x824</addressOffset>
138038          <size>32</size>
138039          <access>read-write</access>
138040          <resetValue>0</resetValue>
138041          <resetMask>0xFFFFFFFF</resetMask>
138042        </register>
138043        <register>
138044          <name>LTC0_PKA0_10</name>
138045          <description>LTC PKHA A0 10 Register</description>
138046          <alternateGroup>LTC0</alternateGroup>
138047          <addressOffset>0x828</addressOffset>
138048          <size>32</size>
138049          <access>read-write</access>
138050          <resetValue>0</resetValue>
138051          <resetMask>0xFFFFFFFF</resetMask>
138052          <fields>
138053            <field>
138054              <name>PKHA_A0</name>
138055              <description>A0 VALUE</description>
138056              <bitOffset>0</bitOffset>
138057              <bitWidth>32</bitWidth>
138058              <access>read-write</access>
138059            </field>
138060          </fields>
138061        </register>
138062        <register>
138063          <name>LTC0_PKA_10</name>
138064          <description>LTC PKHA A 10 Register</description>
138065          <alternateGroup>LTC0</alternateGroup>
138066          <addressOffset>0x828</addressOffset>
138067          <size>32</size>
138068          <access>read-write</access>
138069          <resetValue>0</resetValue>
138070          <resetMask>0xFFFFFFFF</resetMask>
138071        </register>
138072        <register>
138073          <name>LTC0_PKA0_11</name>
138074          <description>LTC PKHA A0 11 Register</description>
138075          <alternateGroup>LTC0</alternateGroup>
138076          <addressOffset>0x82C</addressOffset>
138077          <size>32</size>
138078          <access>read-write</access>
138079          <resetValue>0</resetValue>
138080          <resetMask>0xFFFFFFFF</resetMask>
138081          <fields>
138082            <field>
138083              <name>PKHA_A0</name>
138084              <description>A0 VALUE</description>
138085              <bitOffset>0</bitOffset>
138086              <bitWidth>32</bitWidth>
138087              <access>read-write</access>
138088            </field>
138089          </fields>
138090        </register>
138091        <register>
138092          <name>LTC0_PKA_11</name>
138093          <description>LTC PKHA A 11 Register</description>
138094          <alternateGroup>LTC0</alternateGroup>
138095          <addressOffset>0x82C</addressOffset>
138096          <size>32</size>
138097          <access>read-write</access>
138098          <resetValue>0</resetValue>
138099          <resetMask>0xFFFFFFFF</resetMask>
138100        </register>
138101        <register>
138102          <name>LTC0_PKA0_12</name>
138103          <description>LTC PKHA A0 12 Register</description>
138104          <alternateGroup>LTC0</alternateGroup>
138105          <addressOffset>0x830</addressOffset>
138106          <size>32</size>
138107          <access>read-write</access>
138108          <resetValue>0</resetValue>
138109          <resetMask>0xFFFFFFFF</resetMask>
138110          <fields>
138111            <field>
138112              <name>PKHA_A0</name>
138113              <description>A0 VALUE</description>
138114              <bitOffset>0</bitOffset>
138115              <bitWidth>32</bitWidth>
138116              <access>read-write</access>
138117            </field>
138118          </fields>
138119        </register>
138120        <register>
138121          <name>LTC0_PKA_12</name>
138122          <description>LTC PKHA A 12 Register</description>
138123          <alternateGroup>LTC0</alternateGroup>
138124          <addressOffset>0x830</addressOffset>
138125          <size>32</size>
138126          <access>read-write</access>
138127          <resetValue>0</resetValue>
138128          <resetMask>0xFFFFFFFF</resetMask>
138129        </register>
138130        <register>
138131          <name>LTC0_PKA0_13</name>
138132          <description>LTC PKHA A0 13 Register</description>
138133          <alternateGroup>LTC0</alternateGroup>
138134          <addressOffset>0x834</addressOffset>
138135          <size>32</size>
138136          <access>read-write</access>
138137          <resetValue>0</resetValue>
138138          <resetMask>0xFFFFFFFF</resetMask>
138139          <fields>
138140            <field>
138141              <name>PKHA_A0</name>
138142              <description>A0 VALUE</description>
138143              <bitOffset>0</bitOffset>
138144              <bitWidth>32</bitWidth>
138145              <access>read-write</access>
138146            </field>
138147          </fields>
138148        </register>
138149        <register>
138150          <name>LTC0_PKA_13</name>
138151          <description>LTC PKHA A 13 Register</description>
138152          <alternateGroup>LTC0</alternateGroup>
138153          <addressOffset>0x834</addressOffset>
138154          <size>32</size>
138155          <access>read-write</access>
138156          <resetValue>0</resetValue>
138157          <resetMask>0xFFFFFFFF</resetMask>
138158        </register>
138159        <register>
138160          <name>LTC0_PKA0_14</name>
138161          <description>LTC PKHA A0 14 Register</description>
138162          <alternateGroup>LTC0</alternateGroup>
138163          <addressOffset>0x838</addressOffset>
138164          <size>32</size>
138165          <access>read-write</access>
138166          <resetValue>0</resetValue>
138167          <resetMask>0xFFFFFFFF</resetMask>
138168          <fields>
138169            <field>
138170              <name>PKHA_A0</name>
138171              <description>A0 VALUE</description>
138172              <bitOffset>0</bitOffset>
138173              <bitWidth>32</bitWidth>
138174              <access>read-write</access>
138175            </field>
138176          </fields>
138177        </register>
138178        <register>
138179          <name>LTC0_PKA_14</name>
138180          <description>LTC PKHA A 14 Register</description>
138181          <alternateGroup>LTC0</alternateGroup>
138182          <addressOffset>0x838</addressOffset>
138183          <size>32</size>
138184          <access>read-write</access>
138185          <resetValue>0</resetValue>
138186          <resetMask>0xFFFFFFFF</resetMask>
138187        </register>
138188        <register>
138189          <name>LTC0_PKA0_15</name>
138190          <description>LTC PKHA A0 15 Register</description>
138191          <alternateGroup>LTC0</alternateGroup>
138192          <addressOffset>0x83C</addressOffset>
138193          <size>32</size>
138194          <access>read-write</access>
138195          <resetValue>0</resetValue>
138196          <resetMask>0xFFFFFFFF</resetMask>
138197          <fields>
138198            <field>
138199              <name>PKHA_A0</name>
138200              <description>A0 VALUE</description>
138201              <bitOffset>0</bitOffset>
138202              <bitWidth>32</bitWidth>
138203              <access>read-write</access>
138204            </field>
138205          </fields>
138206        </register>
138207        <register>
138208          <name>LTC0_PKA_15</name>
138209          <description>LTC PKHA A 15 Register</description>
138210          <alternateGroup>LTC0</alternateGroup>
138211          <addressOffset>0x83C</addressOffset>
138212          <size>32</size>
138213          <access>read-write</access>
138214          <resetValue>0</resetValue>
138215          <resetMask>0xFFFFFFFF</resetMask>
138216        </register>
138217        <register>
138218          <name>LTC0_PKA1_0</name>
138219          <description>LTC PKHA A1 0 Register</description>
138220          <alternateGroup>LTC0</alternateGroup>
138221          <addressOffset>0x840</addressOffset>
138222          <size>32</size>
138223          <access>read-write</access>
138224          <resetValue>0</resetValue>
138225          <resetMask>0xFFFFFFFF</resetMask>
138226          <fields>
138227            <field>
138228              <name>PKHA_A1</name>
138229              <description>A1 VALUE</description>
138230              <bitOffset>0</bitOffset>
138231              <bitWidth>32</bitWidth>
138232              <access>read-write</access>
138233            </field>
138234          </fields>
138235        </register>
138236        <register>
138237          <name>LTC0_PKA_16</name>
138238          <description>LTC PKHA A 16 Register</description>
138239          <alternateGroup>LTC0</alternateGroup>
138240          <addressOffset>0x840</addressOffset>
138241          <size>32</size>
138242          <access>read-write</access>
138243          <resetValue>0</resetValue>
138244          <resetMask>0xFFFFFFFF</resetMask>
138245        </register>
138246        <register>
138247          <name>LTC0_PKA1_1</name>
138248          <description>LTC PKHA A1 1 Register</description>
138249          <alternateGroup>LTC0</alternateGroup>
138250          <addressOffset>0x844</addressOffset>
138251          <size>32</size>
138252          <access>read-write</access>
138253          <resetValue>0</resetValue>
138254          <resetMask>0xFFFFFFFF</resetMask>
138255          <fields>
138256            <field>
138257              <name>PKHA_A1</name>
138258              <description>A1 VALUE</description>
138259              <bitOffset>0</bitOffset>
138260              <bitWidth>32</bitWidth>
138261              <access>read-write</access>
138262            </field>
138263          </fields>
138264        </register>
138265        <register>
138266          <name>LTC0_PKA_17</name>
138267          <description>LTC PKHA A 17 Register</description>
138268          <alternateGroup>LTC0</alternateGroup>
138269          <addressOffset>0x844</addressOffset>
138270          <size>32</size>
138271          <access>read-write</access>
138272          <resetValue>0</resetValue>
138273          <resetMask>0xFFFFFFFF</resetMask>
138274        </register>
138275        <register>
138276          <name>LTC0_PKA1_2</name>
138277          <description>LTC PKHA A1 2 Register</description>
138278          <alternateGroup>LTC0</alternateGroup>
138279          <addressOffset>0x848</addressOffset>
138280          <size>32</size>
138281          <access>read-write</access>
138282          <resetValue>0</resetValue>
138283          <resetMask>0xFFFFFFFF</resetMask>
138284          <fields>
138285            <field>
138286              <name>PKHA_A1</name>
138287              <description>A1 VALUE</description>
138288              <bitOffset>0</bitOffset>
138289              <bitWidth>32</bitWidth>
138290              <access>read-write</access>
138291            </field>
138292          </fields>
138293        </register>
138294        <register>
138295          <name>LTC0_PKA_18</name>
138296          <description>LTC PKHA A 18 Register</description>
138297          <alternateGroup>LTC0</alternateGroup>
138298          <addressOffset>0x848</addressOffset>
138299          <size>32</size>
138300          <access>read-write</access>
138301          <resetValue>0</resetValue>
138302          <resetMask>0xFFFFFFFF</resetMask>
138303        </register>
138304        <register>
138305          <name>LTC0_PKA1_3</name>
138306          <description>LTC PKHA A1 3 Register</description>
138307          <alternateGroup>LTC0</alternateGroup>
138308          <addressOffset>0x84C</addressOffset>
138309          <size>32</size>
138310          <access>read-write</access>
138311          <resetValue>0</resetValue>
138312          <resetMask>0xFFFFFFFF</resetMask>
138313          <fields>
138314            <field>
138315              <name>PKHA_A1</name>
138316              <description>A1 VALUE</description>
138317              <bitOffset>0</bitOffset>
138318              <bitWidth>32</bitWidth>
138319              <access>read-write</access>
138320            </field>
138321          </fields>
138322        </register>
138323        <register>
138324          <name>LTC0_PKA_19</name>
138325          <description>LTC PKHA A 19 Register</description>
138326          <alternateGroup>LTC0</alternateGroup>
138327          <addressOffset>0x84C</addressOffset>
138328          <size>32</size>
138329          <access>read-write</access>
138330          <resetValue>0</resetValue>
138331          <resetMask>0xFFFFFFFF</resetMask>
138332        </register>
138333        <register>
138334          <name>LTC0_PKA1_4</name>
138335          <description>LTC PKHA A1 4 Register</description>
138336          <alternateGroup>LTC0</alternateGroup>
138337          <addressOffset>0x850</addressOffset>
138338          <size>32</size>
138339          <access>read-write</access>
138340          <resetValue>0</resetValue>
138341          <resetMask>0xFFFFFFFF</resetMask>
138342          <fields>
138343            <field>
138344              <name>PKHA_A1</name>
138345              <description>A1 VALUE</description>
138346              <bitOffset>0</bitOffset>
138347              <bitWidth>32</bitWidth>
138348              <access>read-write</access>
138349            </field>
138350          </fields>
138351        </register>
138352        <register>
138353          <name>LTC0_PKA_20</name>
138354          <description>LTC PKHA A 20 Register</description>
138355          <alternateGroup>LTC0</alternateGroup>
138356          <addressOffset>0x850</addressOffset>
138357          <size>32</size>
138358          <access>read-write</access>
138359          <resetValue>0</resetValue>
138360          <resetMask>0xFFFFFFFF</resetMask>
138361        </register>
138362        <register>
138363          <name>LTC0_PKA1_5</name>
138364          <description>LTC PKHA A1 5 Register</description>
138365          <alternateGroup>LTC0</alternateGroup>
138366          <addressOffset>0x854</addressOffset>
138367          <size>32</size>
138368          <access>read-write</access>
138369          <resetValue>0</resetValue>
138370          <resetMask>0xFFFFFFFF</resetMask>
138371          <fields>
138372            <field>
138373              <name>PKHA_A1</name>
138374              <description>A1 VALUE</description>
138375              <bitOffset>0</bitOffset>
138376              <bitWidth>32</bitWidth>
138377              <access>read-write</access>
138378            </field>
138379          </fields>
138380        </register>
138381        <register>
138382          <name>LTC0_PKA_21</name>
138383          <description>LTC PKHA A 21 Register</description>
138384          <alternateGroup>LTC0</alternateGroup>
138385          <addressOffset>0x854</addressOffset>
138386          <size>32</size>
138387          <access>read-write</access>
138388          <resetValue>0</resetValue>
138389          <resetMask>0xFFFFFFFF</resetMask>
138390        </register>
138391        <register>
138392          <name>LTC0_PKA1_6</name>
138393          <description>LTC PKHA A1 6 Register</description>
138394          <alternateGroup>LTC0</alternateGroup>
138395          <addressOffset>0x858</addressOffset>
138396          <size>32</size>
138397          <access>read-write</access>
138398          <resetValue>0</resetValue>
138399          <resetMask>0xFFFFFFFF</resetMask>
138400          <fields>
138401            <field>
138402              <name>PKHA_A1</name>
138403              <description>A1 VALUE</description>
138404              <bitOffset>0</bitOffset>
138405              <bitWidth>32</bitWidth>
138406              <access>read-write</access>
138407            </field>
138408          </fields>
138409        </register>
138410        <register>
138411          <name>LTC0_PKA_22</name>
138412          <description>LTC PKHA A 22 Register</description>
138413          <alternateGroup>LTC0</alternateGroup>
138414          <addressOffset>0x858</addressOffset>
138415          <size>32</size>
138416          <access>read-write</access>
138417          <resetValue>0</resetValue>
138418          <resetMask>0xFFFFFFFF</resetMask>
138419        </register>
138420        <register>
138421          <name>LTC0_PKA1_7</name>
138422          <description>LTC PKHA A1 7 Register</description>
138423          <alternateGroup>LTC0</alternateGroup>
138424          <addressOffset>0x85C</addressOffset>
138425          <size>32</size>
138426          <access>read-write</access>
138427          <resetValue>0</resetValue>
138428          <resetMask>0xFFFFFFFF</resetMask>
138429          <fields>
138430            <field>
138431              <name>PKHA_A1</name>
138432              <description>A1 VALUE</description>
138433              <bitOffset>0</bitOffset>
138434              <bitWidth>32</bitWidth>
138435              <access>read-write</access>
138436            </field>
138437          </fields>
138438        </register>
138439        <register>
138440          <name>LTC0_PKA_23</name>
138441          <description>LTC PKHA A 23 Register</description>
138442          <alternateGroup>LTC0</alternateGroup>
138443          <addressOffset>0x85C</addressOffset>
138444          <size>32</size>
138445          <access>read-write</access>
138446          <resetValue>0</resetValue>
138447          <resetMask>0xFFFFFFFF</resetMask>
138448        </register>
138449        <register>
138450          <name>LTC0_PKA1_8</name>
138451          <description>LTC PKHA A1 8 Register</description>
138452          <alternateGroup>LTC0</alternateGroup>
138453          <addressOffset>0x860</addressOffset>
138454          <size>32</size>
138455          <access>read-write</access>
138456          <resetValue>0</resetValue>
138457          <resetMask>0xFFFFFFFF</resetMask>
138458          <fields>
138459            <field>
138460              <name>PKHA_A1</name>
138461              <description>A1 VALUE</description>
138462              <bitOffset>0</bitOffset>
138463              <bitWidth>32</bitWidth>
138464              <access>read-write</access>
138465            </field>
138466          </fields>
138467        </register>
138468        <register>
138469          <name>LTC0_PKA_24</name>
138470          <description>LTC PKHA A 24 Register</description>
138471          <alternateGroup>LTC0</alternateGroup>
138472          <addressOffset>0x860</addressOffset>
138473          <size>32</size>
138474          <access>read-write</access>
138475          <resetValue>0</resetValue>
138476          <resetMask>0xFFFFFFFF</resetMask>
138477        </register>
138478        <register>
138479          <name>LTC0_PKA1_9</name>
138480          <description>LTC PKHA A1 9 Register</description>
138481          <alternateGroup>LTC0</alternateGroup>
138482          <addressOffset>0x864</addressOffset>
138483          <size>32</size>
138484          <access>read-write</access>
138485          <resetValue>0</resetValue>
138486          <resetMask>0xFFFFFFFF</resetMask>
138487          <fields>
138488            <field>
138489              <name>PKHA_A1</name>
138490              <description>A1 VALUE</description>
138491              <bitOffset>0</bitOffset>
138492              <bitWidth>32</bitWidth>
138493              <access>read-write</access>
138494            </field>
138495          </fields>
138496        </register>
138497        <register>
138498          <name>LTC0_PKA_25</name>
138499          <description>LTC PKHA A 25 Register</description>
138500          <alternateGroup>LTC0</alternateGroup>
138501          <addressOffset>0x864</addressOffset>
138502          <size>32</size>
138503          <access>read-write</access>
138504          <resetValue>0</resetValue>
138505          <resetMask>0xFFFFFFFF</resetMask>
138506        </register>
138507        <register>
138508          <name>LTC0_PKA1_10</name>
138509          <description>LTC PKHA A1 10 Register</description>
138510          <alternateGroup>LTC0</alternateGroup>
138511          <addressOffset>0x868</addressOffset>
138512          <size>32</size>
138513          <access>read-write</access>
138514          <resetValue>0</resetValue>
138515          <resetMask>0xFFFFFFFF</resetMask>
138516          <fields>
138517            <field>
138518              <name>PKHA_A1</name>
138519              <description>A1 VALUE</description>
138520              <bitOffset>0</bitOffset>
138521              <bitWidth>32</bitWidth>
138522              <access>read-write</access>
138523            </field>
138524          </fields>
138525        </register>
138526        <register>
138527          <name>LTC0_PKA_26</name>
138528          <description>LTC PKHA A 26 Register</description>
138529          <alternateGroup>LTC0</alternateGroup>
138530          <addressOffset>0x868</addressOffset>
138531          <size>32</size>
138532          <access>read-write</access>
138533          <resetValue>0</resetValue>
138534          <resetMask>0xFFFFFFFF</resetMask>
138535        </register>
138536        <register>
138537          <name>LTC0_PKA1_11</name>
138538          <description>LTC PKHA A1 11 Register</description>
138539          <alternateGroup>LTC0</alternateGroup>
138540          <addressOffset>0x86C</addressOffset>
138541          <size>32</size>
138542          <access>read-write</access>
138543          <resetValue>0</resetValue>
138544          <resetMask>0xFFFFFFFF</resetMask>
138545          <fields>
138546            <field>
138547              <name>PKHA_A1</name>
138548              <description>A1 VALUE</description>
138549              <bitOffset>0</bitOffset>
138550              <bitWidth>32</bitWidth>
138551              <access>read-write</access>
138552            </field>
138553          </fields>
138554        </register>
138555        <register>
138556          <name>LTC0_PKA_27</name>
138557          <description>LTC PKHA A 27 Register</description>
138558          <alternateGroup>LTC0</alternateGroup>
138559          <addressOffset>0x86C</addressOffset>
138560          <size>32</size>
138561          <access>read-write</access>
138562          <resetValue>0</resetValue>
138563          <resetMask>0xFFFFFFFF</resetMask>
138564        </register>
138565        <register>
138566          <name>LTC0_PKA1_12</name>
138567          <description>LTC PKHA A1 12 Register</description>
138568          <alternateGroup>LTC0</alternateGroup>
138569          <addressOffset>0x870</addressOffset>
138570          <size>32</size>
138571          <access>read-write</access>
138572          <resetValue>0</resetValue>
138573          <resetMask>0xFFFFFFFF</resetMask>
138574          <fields>
138575            <field>
138576              <name>PKHA_A1</name>
138577              <description>A1 VALUE</description>
138578              <bitOffset>0</bitOffset>
138579              <bitWidth>32</bitWidth>
138580              <access>read-write</access>
138581            </field>
138582          </fields>
138583        </register>
138584        <register>
138585          <name>LTC0_PKA_28</name>
138586          <description>LTC PKHA A 28 Register</description>
138587          <alternateGroup>LTC0</alternateGroup>
138588          <addressOffset>0x870</addressOffset>
138589          <size>32</size>
138590          <access>read-write</access>
138591          <resetValue>0</resetValue>
138592          <resetMask>0xFFFFFFFF</resetMask>
138593        </register>
138594        <register>
138595          <name>LTC0_PKA1_13</name>
138596          <description>LTC PKHA A1 13 Register</description>
138597          <alternateGroup>LTC0</alternateGroup>
138598          <addressOffset>0x874</addressOffset>
138599          <size>32</size>
138600          <access>read-write</access>
138601          <resetValue>0</resetValue>
138602          <resetMask>0xFFFFFFFF</resetMask>
138603          <fields>
138604            <field>
138605              <name>PKHA_A1</name>
138606              <description>A1 VALUE</description>
138607              <bitOffset>0</bitOffset>
138608              <bitWidth>32</bitWidth>
138609              <access>read-write</access>
138610            </field>
138611          </fields>
138612        </register>
138613        <register>
138614          <name>LTC0_PKA_29</name>
138615          <description>LTC PKHA A 29 Register</description>
138616          <alternateGroup>LTC0</alternateGroup>
138617          <addressOffset>0x874</addressOffset>
138618          <size>32</size>
138619          <access>read-write</access>
138620          <resetValue>0</resetValue>
138621          <resetMask>0xFFFFFFFF</resetMask>
138622        </register>
138623        <register>
138624          <name>LTC0_PKA1_14</name>
138625          <description>LTC PKHA A1 14 Register</description>
138626          <alternateGroup>LTC0</alternateGroup>
138627          <addressOffset>0x878</addressOffset>
138628          <size>32</size>
138629          <access>read-write</access>
138630          <resetValue>0</resetValue>
138631          <resetMask>0xFFFFFFFF</resetMask>
138632          <fields>
138633            <field>
138634              <name>PKHA_A1</name>
138635              <description>A1 VALUE</description>
138636              <bitOffset>0</bitOffset>
138637              <bitWidth>32</bitWidth>
138638              <access>read-write</access>
138639            </field>
138640          </fields>
138641        </register>
138642        <register>
138643          <name>LTC0_PKA_30</name>
138644          <description>LTC PKHA A 30 Register</description>
138645          <alternateGroup>LTC0</alternateGroup>
138646          <addressOffset>0x878</addressOffset>
138647          <size>32</size>
138648          <access>read-write</access>
138649          <resetValue>0</resetValue>
138650          <resetMask>0xFFFFFFFF</resetMask>
138651        </register>
138652        <register>
138653          <name>LTC0_PKA1_15</name>
138654          <description>LTC PKHA A1 15 Register</description>
138655          <alternateGroup>LTC0</alternateGroup>
138656          <addressOffset>0x87C</addressOffset>
138657          <size>32</size>
138658          <access>read-write</access>
138659          <resetValue>0</resetValue>
138660          <resetMask>0xFFFFFFFF</resetMask>
138661          <fields>
138662            <field>
138663              <name>PKHA_A1</name>
138664              <description>A1 VALUE</description>
138665              <bitOffset>0</bitOffset>
138666              <bitWidth>32</bitWidth>
138667              <access>read-write</access>
138668            </field>
138669          </fields>
138670        </register>
138671        <register>
138672          <name>LTC0_PKA_31</name>
138673          <description>LTC PKHA A 31 Register</description>
138674          <alternateGroup>LTC0</alternateGroup>
138675          <addressOffset>0x87C</addressOffset>
138676          <size>32</size>
138677          <access>read-write</access>
138678          <resetValue>0</resetValue>
138679          <resetMask>0xFFFFFFFF</resetMask>
138680        </register>
138681        <register>
138682          <name>LTC0_PKA2_0</name>
138683          <description>LTC PKHA A2 0 Register</description>
138684          <alternateGroup>LTC0</alternateGroup>
138685          <addressOffset>0x880</addressOffset>
138686          <size>32</size>
138687          <access>read-write</access>
138688          <resetValue>0</resetValue>
138689          <resetMask>0xFFFFFFFF</resetMask>
138690          <fields>
138691            <field>
138692              <name>PKHA_A2</name>
138693              <description>A2 VALUE</description>
138694              <bitOffset>0</bitOffset>
138695              <bitWidth>32</bitWidth>
138696              <access>read-write</access>
138697            </field>
138698          </fields>
138699        </register>
138700        <register>
138701          <name>LTC0_PKA_32</name>
138702          <description>LTC PKHA A 32 Register</description>
138703          <alternateGroup>LTC0</alternateGroup>
138704          <addressOffset>0x880</addressOffset>
138705          <size>32</size>
138706          <access>read-write</access>
138707          <resetValue>0</resetValue>
138708          <resetMask>0xFFFFFFFF</resetMask>
138709        </register>
138710        <register>
138711          <name>LTC0_PKA2_1</name>
138712          <description>LTC PKHA A2 1 Register</description>
138713          <alternateGroup>LTC0</alternateGroup>
138714          <addressOffset>0x884</addressOffset>
138715          <size>32</size>
138716          <access>read-write</access>
138717          <resetValue>0</resetValue>
138718          <resetMask>0xFFFFFFFF</resetMask>
138719          <fields>
138720            <field>
138721              <name>PKHA_A2</name>
138722              <description>A2 VALUE</description>
138723              <bitOffset>0</bitOffset>
138724              <bitWidth>32</bitWidth>
138725              <access>read-write</access>
138726            </field>
138727          </fields>
138728        </register>
138729        <register>
138730          <name>LTC0_PKA_33</name>
138731          <description>LTC PKHA A 33 Register</description>
138732          <alternateGroup>LTC0</alternateGroup>
138733          <addressOffset>0x884</addressOffset>
138734          <size>32</size>
138735          <access>read-write</access>
138736          <resetValue>0</resetValue>
138737          <resetMask>0xFFFFFFFF</resetMask>
138738        </register>
138739        <register>
138740          <name>LTC0_PKA2_2</name>
138741          <description>LTC PKHA A2 2 Register</description>
138742          <alternateGroup>LTC0</alternateGroup>
138743          <addressOffset>0x888</addressOffset>
138744          <size>32</size>
138745          <access>read-write</access>
138746          <resetValue>0</resetValue>
138747          <resetMask>0xFFFFFFFF</resetMask>
138748          <fields>
138749            <field>
138750              <name>PKHA_A2</name>
138751              <description>A2 VALUE</description>
138752              <bitOffset>0</bitOffset>
138753              <bitWidth>32</bitWidth>
138754              <access>read-write</access>
138755            </field>
138756          </fields>
138757        </register>
138758        <register>
138759          <name>LTC0_PKA_34</name>
138760          <description>LTC PKHA A 34 Register</description>
138761          <alternateGroup>LTC0</alternateGroup>
138762          <addressOffset>0x888</addressOffset>
138763          <size>32</size>
138764          <access>read-write</access>
138765          <resetValue>0</resetValue>
138766          <resetMask>0xFFFFFFFF</resetMask>
138767        </register>
138768        <register>
138769          <name>LTC0_PKA2_3</name>
138770          <description>LTC PKHA A2 3 Register</description>
138771          <alternateGroup>LTC0</alternateGroup>
138772          <addressOffset>0x88C</addressOffset>
138773          <size>32</size>
138774          <access>read-write</access>
138775          <resetValue>0</resetValue>
138776          <resetMask>0xFFFFFFFF</resetMask>
138777          <fields>
138778            <field>
138779              <name>PKHA_A2</name>
138780              <description>A2 VALUE</description>
138781              <bitOffset>0</bitOffset>
138782              <bitWidth>32</bitWidth>
138783              <access>read-write</access>
138784            </field>
138785          </fields>
138786        </register>
138787        <register>
138788          <name>LTC0_PKA_35</name>
138789          <description>LTC PKHA A 35 Register</description>
138790          <alternateGroup>LTC0</alternateGroup>
138791          <addressOffset>0x88C</addressOffset>
138792          <size>32</size>
138793          <access>read-write</access>
138794          <resetValue>0</resetValue>
138795          <resetMask>0xFFFFFFFF</resetMask>
138796        </register>
138797        <register>
138798          <name>LTC0_PKA2_4</name>
138799          <description>LTC PKHA A2 4 Register</description>
138800          <alternateGroup>LTC0</alternateGroup>
138801          <addressOffset>0x890</addressOffset>
138802          <size>32</size>
138803          <access>read-write</access>
138804          <resetValue>0</resetValue>
138805          <resetMask>0xFFFFFFFF</resetMask>
138806          <fields>
138807            <field>
138808              <name>PKHA_A2</name>
138809              <description>A2 VALUE</description>
138810              <bitOffset>0</bitOffset>
138811              <bitWidth>32</bitWidth>
138812              <access>read-write</access>
138813            </field>
138814          </fields>
138815        </register>
138816        <register>
138817          <name>LTC0_PKA_36</name>
138818          <description>LTC PKHA A 36 Register</description>
138819          <alternateGroup>LTC0</alternateGroup>
138820          <addressOffset>0x890</addressOffset>
138821          <size>32</size>
138822          <access>read-write</access>
138823          <resetValue>0</resetValue>
138824          <resetMask>0xFFFFFFFF</resetMask>
138825        </register>
138826        <register>
138827          <name>LTC0_PKA2_5</name>
138828          <description>LTC PKHA A2 5 Register</description>
138829          <alternateGroup>LTC0</alternateGroup>
138830          <addressOffset>0x894</addressOffset>
138831          <size>32</size>
138832          <access>read-write</access>
138833          <resetValue>0</resetValue>
138834          <resetMask>0xFFFFFFFF</resetMask>
138835          <fields>
138836            <field>
138837              <name>PKHA_A2</name>
138838              <description>A2 VALUE</description>
138839              <bitOffset>0</bitOffset>
138840              <bitWidth>32</bitWidth>
138841              <access>read-write</access>
138842            </field>
138843          </fields>
138844        </register>
138845        <register>
138846          <name>LTC0_PKA_37</name>
138847          <description>LTC PKHA A 37 Register</description>
138848          <alternateGroup>LTC0</alternateGroup>
138849          <addressOffset>0x894</addressOffset>
138850          <size>32</size>
138851          <access>read-write</access>
138852          <resetValue>0</resetValue>
138853          <resetMask>0xFFFFFFFF</resetMask>
138854        </register>
138855        <register>
138856          <name>LTC0_PKA2_6</name>
138857          <description>LTC PKHA A2 6 Register</description>
138858          <alternateGroup>LTC0</alternateGroup>
138859          <addressOffset>0x898</addressOffset>
138860          <size>32</size>
138861          <access>read-write</access>
138862          <resetValue>0</resetValue>
138863          <resetMask>0xFFFFFFFF</resetMask>
138864          <fields>
138865            <field>
138866              <name>PKHA_A2</name>
138867              <description>A2 VALUE</description>
138868              <bitOffset>0</bitOffset>
138869              <bitWidth>32</bitWidth>
138870              <access>read-write</access>
138871            </field>
138872          </fields>
138873        </register>
138874        <register>
138875          <name>LTC0_PKA_38</name>
138876          <description>LTC PKHA A 38 Register</description>
138877          <alternateGroup>LTC0</alternateGroup>
138878          <addressOffset>0x898</addressOffset>
138879          <size>32</size>
138880          <access>read-write</access>
138881          <resetValue>0</resetValue>
138882          <resetMask>0xFFFFFFFF</resetMask>
138883        </register>
138884        <register>
138885          <name>LTC0_PKA2_7</name>
138886          <description>LTC PKHA A2 7 Register</description>
138887          <alternateGroup>LTC0</alternateGroup>
138888          <addressOffset>0x89C</addressOffset>
138889          <size>32</size>
138890          <access>read-write</access>
138891          <resetValue>0</resetValue>
138892          <resetMask>0xFFFFFFFF</resetMask>
138893          <fields>
138894            <field>
138895              <name>PKHA_A2</name>
138896              <description>A2 VALUE</description>
138897              <bitOffset>0</bitOffset>
138898              <bitWidth>32</bitWidth>
138899              <access>read-write</access>
138900            </field>
138901          </fields>
138902        </register>
138903        <register>
138904          <name>LTC0_PKA_39</name>
138905          <description>LTC PKHA A 39 Register</description>
138906          <alternateGroup>LTC0</alternateGroup>
138907          <addressOffset>0x89C</addressOffset>
138908          <size>32</size>
138909          <access>read-write</access>
138910          <resetValue>0</resetValue>
138911          <resetMask>0xFFFFFFFF</resetMask>
138912        </register>
138913        <register>
138914          <name>LTC0_PKA2_8</name>
138915          <description>LTC PKHA A2 8 Register</description>
138916          <alternateGroup>LTC0</alternateGroup>
138917          <addressOffset>0x8A0</addressOffset>
138918          <size>32</size>
138919          <access>read-write</access>
138920          <resetValue>0</resetValue>
138921          <resetMask>0xFFFFFFFF</resetMask>
138922          <fields>
138923            <field>
138924              <name>PKHA_A2</name>
138925              <description>A2 VALUE</description>
138926              <bitOffset>0</bitOffset>
138927              <bitWidth>32</bitWidth>
138928              <access>read-write</access>
138929            </field>
138930          </fields>
138931        </register>
138932        <register>
138933          <name>LTC0_PKA_40</name>
138934          <description>LTC PKHA A 40 Register</description>
138935          <alternateGroup>LTC0</alternateGroup>
138936          <addressOffset>0x8A0</addressOffset>
138937          <size>32</size>
138938          <access>read-write</access>
138939          <resetValue>0</resetValue>
138940          <resetMask>0xFFFFFFFF</resetMask>
138941        </register>
138942        <register>
138943          <name>LTC0_PKA2_9</name>
138944          <description>LTC PKHA A2 9 Register</description>
138945          <alternateGroup>LTC0</alternateGroup>
138946          <addressOffset>0x8A4</addressOffset>
138947          <size>32</size>
138948          <access>read-write</access>
138949          <resetValue>0</resetValue>
138950          <resetMask>0xFFFFFFFF</resetMask>
138951          <fields>
138952            <field>
138953              <name>PKHA_A2</name>
138954              <description>A2 VALUE</description>
138955              <bitOffset>0</bitOffset>
138956              <bitWidth>32</bitWidth>
138957              <access>read-write</access>
138958            </field>
138959          </fields>
138960        </register>
138961        <register>
138962          <name>LTC0_PKA_41</name>
138963          <description>LTC PKHA A 41 Register</description>
138964          <alternateGroup>LTC0</alternateGroup>
138965          <addressOffset>0x8A4</addressOffset>
138966          <size>32</size>
138967          <access>read-write</access>
138968          <resetValue>0</resetValue>
138969          <resetMask>0xFFFFFFFF</resetMask>
138970        </register>
138971        <register>
138972          <name>LTC0_PKA2_10</name>
138973          <description>LTC PKHA A2 10 Register</description>
138974          <alternateGroup>LTC0</alternateGroup>
138975          <addressOffset>0x8A8</addressOffset>
138976          <size>32</size>
138977          <access>read-write</access>
138978          <resetValue>0</resetValue>
138979          <resetMask>0xFFFFFFFF</resetMask>
138980          <fields>
138981            <field>
138982              <name>PKHA_A2</name>
138983              <description>A2 VALUE</description>
138984              <bitOffset>0</bitOffset>
138985              <bitWidth>32</bitWidth>
138986              <access>read-write</access>
138987            </field>
138988          </fields>
138989        </register>
138990        <register>
138991          <name>LTC0_PKA_42</name>
138992          <description>LTC PKHA A 42 Register</description>
138993          <alternateGroup>LTC0</alternateGroup>
138994          <addressOffset>0x8A8</addressOffset>
138995          <size>32</size>
138996          <access>read-write</access>
138997          <resetValue>0</resetValue>
138998          <resetMask>0xFFFFFFFF</resetMask>
138999        </register>
139000        <register>
139001          <name>LTC0_PKA2_11</name>
139002          <description>LTC PKHA A2 11 Register</description>
139003          <alternateGroup>LTC0</alternateGroup>
139004          <addressOffset>0x8AC</addressOffset>
139005          <size>32</size>
139006          <access>read-write</access>
139007          <resetValue>0</resetValue>
139008          <resetMask>0xFFFFFFFF</resetMask>
139009          <fields>
139010            <field>
139011              <name>PKHA_A2</name>
139012              <description>A2 VALUE</description>
139013              <bitOffset>0</bitOffset>
139014              <bitWidth>32</bitWidth>
139015              <access>read-write</access>
139016            </field>
139017          </fields>
139018        </register>
139019        <register>
139020          <name>LTC0_PKA_43</name>
139021          <description>LTC PKHA A 43 Register</description>
139022          <alternateGroup>LTC0</alternateGroup>
139023          <addressOffset>0x8AC</addressOffset>
139024          <size>32</size>
139025          <access>read-write</access>
139026          <resetValue>0</resetValue>
139027          <resetMask>0xFFFFFFFF</resetMask>
139028        </register>
139029        <register>
139030          <name>LTC0_PKA2_12</name>
139031          <description>LTC PKHA A2 12 Register</description>
139032          <alternateGroup>LTC0</alternateGroup>
139033          <addressOffset>0x8B0</addressOffset>
139034          <size>32</size>
139035          <access>read-write</access>
139036          <resetValue>0</resetValue>
139037          <resetMask>0xFFFFFFFF</resetMask>
139038          <fields>
139039            <field>
139040              <name>PKHA_A2</name>
139041              <description>A2 VALUE</description>
139042              <bitOffset>0</bitOffset>
139043              <bitWidth>32</bitWidth>
139044              <access>read-write</access>
139045            </field>
139046          </fields>
139047        </register>
139048        <register>
139049          <name>LTC0_PKA_44</name>
139050          <description>LTC PKHA A 44 Register</description>
139051          <alternateGroup>LTC0</alternateGroup>
139052          <addressOffset>0x8B0</addressOffset>
139053          <size>32</size>
139054          <access>read-write</access>
139055          <resetValue>0</resetValue>
139056          <resetMask>0xFFFFFFFF</resetMask>
139057        </register>
139058        <register>
139059          <name>LTC0_PKA2_13</name>
139060          <description>LTC PKHA A2 13 Register</description>
139061          <alternateGroup>LTC0</alternateGroup>
139062          <addressOffset>0x8B4</addressOffset>
139063          <size>32</size>
139064          <access>read-write</access>
139065          <resetValue>0</resetValue>
139066          <resetMask>0xFFFFFFFF</resetMask>
139067          <fields>
139068            <field>
139069              <name>PKHA_A2</name>
139070              <description>A2 VALUE</description>
139071              <bitOffset>0</bitOffset>
139072              <bitWidth>32</bitWidth>
139073              <access>read-write</access>
139074            </field>
139075          </fields>
139076        </register>
139077        <register>
139078          <name>LTC0_PKA_45</name>
139079          <description>LTC PKHA A 45 Register</description>
139080          <alternateGroup>LTC0</alternateGroup>
139081          <addressOffset>0x8B4</addressOffset>
139082          <size>32</size>
139083          <access>read-write</access>
139084          <resetValue>0</resetValue>
139085          <resetMask>0xFFFFFFFF</resetMask>
139086        </register>
139087        <register>
139088          <name>LTC0_PKA2_14</name>
139089          <description>LTC PKHA A2 14 Register</description>
139090          <alternateGroup>LTC0</alternateGroup>
139091          <addressOffset>0x8B8</addressOffset>
139092          <size>32</size>
139093          <access>read-write</access>
139094          <resetValue>0</resetValue>
139095          <resetMask>0xFFFFFFFF</resetMask>
139096          <fields>
139097            <field>
139098              <name>PKHA_A2</name>
139099              <description>A2 VALUE</description>
139100              <bitOffset>0</bitOffset>
139101              <bitWidth>32</bitWidth>
139102              <access>read-write</access>
139103            </field>
139104          </fields>
139105        </register>
139106        <register>
139107          <name>LTC0_PKA_46</name>
139108          <description>LTC PKHA A 46 Register</description>
139109          <alternateGroup>LTC0</alternateGroup>
139110          <addressOffset>0x8B8</addressOffset>
139111          <size>32</size>
139112          <access>read-write</access>
139113          <resetValue>0</resetValue>
139114          <resetMask>0xFFFFFFFF</resetMask>
139115        </register>
139116        <register>
139117          <name>LTC0_PKA2_15</name>
139118          <description>LTC PKHA A2 15 Register</description>
139119          <alternateGroup>LTC0</alternateGroup>
139120          <addressOffset>0x8BC</addressOffset>
139121          <size>32</size>
139122          <access>read-write</access>
139123          <resetValue>0</resetValue>
139124          <resetMask>0xFFFFFFFF</resetMask>
139125          <fields>
139126            <field>
139127              <name>PKHA_A2</name>
139128              <description>A2 VALUE</description>
139129              <bitOffset>0</bitOffset>
139130              <bitWidth>32</bitWidth>
139131              <access>read-write</access>
139132            </field>
139133          </fields>
139134        </register>
139135        <register>
139136          <name>LTC0_PKA_47</name>
139137          <description>LTC PKHA A 47 Register</description>
139138          <alternateGroup>LTC0</alternateGroup>
139139          <addressOffset>0x8BC</addressOffset>
139140          <size>32</size>
139141          <access>read-write</access>
139142          <resetValue>0</resetValue>
139143          <resetMask>0xFFFFFFFF</resetMask>
139144        </register>
139145        <register>
139146          <name>LTC0_PKA3_0</name>
139147          <description>LTC PKHA A3 0 Register</description>
139148          <alternateGroup>LTC0</alternateGroup>
139149          <addressOffset>0x8C0</addressOffset>
139150          <size>32</size>
139151          <access>read-write</access>
139152          <resetValue>0</resetValue>
139153          <resetMask>0xFFFFFFFF</resetMask>
139154          <fields>
139155            <field>
139156              <name>PKHA_A3</name>
139157              <description>A3 VALUE</description>
139158              <bitOffset>0</bitOffset>
139159              <bitWidth>32</bitWidth>
139160              <access>read-write</access>
139161            </field>
139162          </fields>
139163        </register>
139164        <register>
139165          <name>LTC0_PKA_48</name>
139166          <description>LTC PKHA A 48 Register</description>
139167          <alternateGroup>LTC0</alternateGroup>
139168          <addressOffset>0x8C0</addressOffset>
139169          <size>32</size>
139170          <access>read-write</access>
139171          <resetValue>0</resetValue>
139172          <resetMask>0xFFFFFFFF</resetMask>
139173        </register>
139174        <register>
139175          <name>LTC0_PKA3_1</name>
139176          <description>LTC PKHA A3 1 Register</description>
139177          <alternateGroup>LTC0</alternateGroup>
139178          <addressOffset>0x8C4</addressOffset>
139179          <size>32</size>
139180          <access>read-write</access>
139181          <resetValue>0</resetValue>
139182          <resetMask>0xFFFFFFFF</resetMask>
139183          <fields>
139184            <field>
139185              <name>PKHA_A3</name>
139186              <description>A3 VALUE</description>
139187              <bitOffset>0</bitOffset>
139188              <bitWidth>32</bitWidth>
139189              <access>read-write</access>
139190            </field>
139191          </fields>
139192        </register>
139193        <register>
139194          <name>LTC0_PKA_49</name>
139195          <description>LTC PKHA A 49 Register</description>
139196          <alternateGroup>LTC0</alternateGroup>
139197          <addressOffset>0x8C4</addressOffset>
139198          <size>32</size>
139199          <access>read-write</access>
139200          <resetValue>0</resetValue>
139201          <resetMask>0xFFFFFFFF</resetMask>
139202        </register>
139203        <register>
139204          <name>LTC0_PKA3_2</name>
139205          <description>LTC PKHA A3 2 Register</description>
139206          <alternateGroup>LTC0</alternateGroup>
139207          <addressOffset>0x8C8</addressOffset>
139208          <size>32</size>
139209          <access>read-write</access>
139210          <resetValue>0</resetValue>
139211          <resetMask>0xFFFFFFFF</resetMask>
139212          <fields>
139213            <field>
139214              <name>PKHA_A3</name>
139215              <description>A3 VALUE</description>
139216              <bitOffset>0</bitOffset>
139217              <bitWidth>32</bitWidth>
139218              <access>read-write</access>
139219            </field>
139220          </fields>
139221        </register>
139222        <register>
139223          <name>LTC0_PKA_50</name>
139224          <description>LTC PKHA A 50 Register</description>
139225          <alternateGroup>LTC0</alternateGroup>
139226          <addressOffset>0x8C8</addressOffset>
139227          <size>32</size>
139228          <access>read-write</access>
139229          <resetValue>0</resetValue>
139230          <resetMask>0xFFFFFFFF</resetMask>
139231        </register>
139232        <register>
139233          <name>LTC0_PKA3_3</name>
139234          <description>LTC PKHA A3 3 Register</description>
139235          <alternateGroup>LTC0</alternateGroup>
139236          <addressOffset>0x8CC</addressOffset>
139237          <size>32</size>
139238          <access>read-write</access>
139239          <resetValue>0</resetValue>
139240          <resetMask>0xFFFFFFFF</resetMask>
139241          <fields>
139242            <field>
139243              <name>PKHA_A3</name>
139244              <description>A3 VALUE</description>
139245              <bitOffset>0</bitOffset>
139246              <bitWidth>32</bitWidth>
139247              <access>read-write</access>
139248            </field>
139249          </fields>
139250        </register>
139251        <register>
139252          <name>LTC0_PKA_51</name>
139253          <description>LTC PKHA A 51 Register</description>
139254          <alternateGroup>LTC0</alternateGroup>
139255          <addressOffset>0x8CC</addressOffset>
139256          <size>32</size>
139257          <access>read-write</access>
139258          <resetValue>0</resetValue>
139259          <resetMask>0xFFFFFFFF</resetMask>
139260        </register>
139261        <register>
139262          <name>LTC0_PKA3_4</name>
139263          <description>LTC PKHA A3 4 Register</description>
139264          <alternateGroup>LTC0</alternateGroup>
139265          <addressOffset>0x8D0</addressOffset>
139266          <size>32</size>
139267          <access>read-write</access>
139268          <resetValue>0</resetValue>
139269          <resetMask>0xFFFFFFFF</resetMask>
139270          <fields>
139271            <field>
139272              <name>PKHA_A3</name>
139273              <description>A3 VALUE</description>
139274              <bitOffset>0</bitOffset>
139275              <bitWidth>32</bitWidth>
139276              <access>read-write</access>
139277            </field>
139278          </fields>
139279        </register>
139280        <register>
139281          <name>LTC0_PKA_52</name>
139282          <description>LTC PKHA A 52 Register</description>
139283          <alternateGroup>LTC0</alternateGroup>
139284          <addressOffset>0x8D0</addressOffset>
139285          <size>32</size>
139286          <access>read-write</access>
139287          <resetValue>0</resetValue>
139288          <resetMask>0xFFFFFFFF</resetMask>
139289        </register>
139290        <register>
139291          <name>LTC0_PKA3_5</name>
139292          <description>LTC PKHA A3 5 Register</description>
139293          <alternateGroup>LTC0</alternateGroup>
139294          <addressOffset>0x8D4</addressOffset>
139295          <size>32</size>
139296          <access>read-write</access>
139297          <resetValue>0</resetValue>
139298          <resetMask>0xFFFFFFFF</resetMask>
139299          <fields>
139300            <field>
139301              <name>PKHA_A3</name>
139302              <description>A3 VALUE</description>
139303              <bitOffset>0</bitOffset>
139304              <bitWidth>32</bitWidth>
139305              <access>read-write</access>
139306            </field>
139307          </fields>
139308        </register>
139309        <register>
139310          <name>LTC0_PKA_53</name>
139311          <description>LTC PKHA A 53 Register</description>
139312          <alternateGroup>LTC0</alternateGroup>
139313          <addressOffset>0x8D4</addressOffset>
139314          <size>32</size>
139315          <access>read-write</access>
139316          <resetValue>0</resetValue>
139317          <resetMask>0xFFFFFFFF</resetMask>
139318        </register>
139319        <register>
139320          <name>LTC0_PKA3_6</name>
139321          <description>LTC PKHA A3 6 Register</description>
139322          <alternateGroup>LTC0</alternateGroup>
139323          <addressOffset>0x8D8</addressOffset>
139324          <size>32</size>
139325          <access>read-write</access>
139326          <resetValue>0</resetValue>
139327          <resetMask>0xFFFFFFFF</resetMask>
139328          <fields>
139329            <field>
139330              <name>PKHA_A3</name>
139331              <description>A3 VALUE</description>
139332              <bitOffset>0</bitOffset>
139333              <bitWidth>32</bitWidth>
139334              <access>read-write</access>
139335            </field>
139336          </fields>
139337        </register>
139338        <register>
139339          <name>LTC0_PKA_54</name>
139340          <description>LTC PKHA A 54 Register</description>
139341          <alternateGroup>LTC0</alternateGroup>
139342          <addressOffset>0x8D8</addressOffset>
139343          <size>32</size>
139344          <access>read-write</access>
139345          <resetValue>0</resetValue>
139346          <resetMask>0xFFFFFFFF</resetMask>
139347        </register>
139348        <register>
139349          <name>LTC0_PKA3_7</name>
139350          <description>LTC PKHA A3 7 Register</description>
139351          <alternateGroup>LTC0</alternateGroup>
139352          <addressOffset>0x8DC</addressOffset>
139353          <size>32</size>
139354          <access>read-write</access>
139355          <resetValue>0</resetValue>
139356          <resetMask>0xFFFFFFFF</resetMask>
139357          <fields>
139358            <field>
139359              <name>PKHA_A3</name>
139360              <description>A3 VALUE</description>
139361              <bitOffset>0</bitOffset>
139362              <bitWidth>32</bitWidth>
139363              <access>read-write</access>
139364            </field>
139365          </fields>
139366        </register>
139367        <register>
139368          <name>LTC0_PKA_55</name>
139369          <description>LTC PKHA A 55 Register</description>
139370          <alternateGroup>LTC0</alternateGroup>
139371          <addressOffset>0x8DC</addressOffset>
139372          <size>32</size>
139373          <access>read-write</access>
139374          <resetValue>0</resetValue>
139375          <resetMask>0xFFFFFFFF</resetMask>
139376        </register>
139377        <register>
139378          <name>LTC0_PKA3_8</name>
139379          <description>LTC PKHA A3 8 Register</description>
139380          <alternateGroup>LTC0</alternateGroup>
139381          <addressOffset>0x8E0</addressOffset>
139382          <size>32</size>
139383          <access>read-write</access>
139384          <resetValue>0</resetValue>
139385          <resetMask>0xFFFFFFFF</resetMask>
139386          <fields>
139387            <field>
139388              <name>PKHA_A3</name>
139389              <description>A3 VALUE</description>
139390              <bitOffset>0</bitOffset>
139391              <bitWidth>32</bitWidth>
139392              <access>read-write</access>
139393            </field>
139394          </fields>
139395        </register>
139396        <register>
139397          <name>LTC0_PKA_56</name>
139398          <description>LTC PKHA A 56 Register</description>
139399          <alternateGroup>LTC0</alternateGroup>
139400          <addressOffset>0x8E0</addressOffset>
139401          <size>32</size>
139402          <access>read-write</access>
139403          <resetValue>0</resetValue>
139404          <resetMask>0xFFFFFFFF</resetMask>
139405        </register>
139406        <register>
139407          <name>LTC0_PKA3_9</name>
139408          <description>LTC PKHA A3 9 Register</description>
139409          <alternateGroup>LTC0</alternateGroup>
139410          <addressOffset>0x8E4</addressOffset>
139411          <size>32</size>
139412          <access>read-write</access>
139413          <resetValue>0</resetValue>
139414          <resetMask>0xFFFFFFFF</resetMask>
139415          <fields>
139416            <field>
139417              <name>PKHA_A3</name>
139418              <description>A3 VALUE</description>
139419              <bitOffset>0</bitOffset>
139420              <bitWidth>32</bitWidth>
139421              <access>read-write</access>
139422            </field>
139423          </fields>
139424        </register>
139425        <register>
139426          <name>LTC0_PKA_57</name>
139427          <description>LTC PKHA A 57 Register</description>
139428          <alternateGroup>LTC0</alternateGroup>
139429          <addressOffset>0x8E4</addressOffset>
139430          <size>32</size>
139431          <access>read-write</access>
139432          <resetValue>0</resetValue>
139433          <resetMask>0xFFFFFFFF</resetMask>
139434        </register>
139435        <register>
139436          <name>LTC0_PKA3_10</name>
139437          <description>LTC PKHA A3 10 Register</description>
139438          <alternateGroup>LTC0</alternateGroup>
139439          <addressOffset>0x8E8</addressOffset>
139440          <size>32</size>
139441          <access>read-write</access>
139442          <resetValue>0</resetValue>
139443          <resetMask>0xFFFFFFFF</resetMask>
139444          <fields>
139445            <field>
139446              <name>PKHA_A3</name>
139447              <description>A3 VALUE</description>
139448              <bitOffset>0</bitOffset>
139449              <bitWidth>32</bitWidth>
139450              <access>read-write</access>
139451            </field>
139452          </fields>
139453        </register>
139454        <register>
139455          <name>LTC0_PKA_58</name>
139456          <description>LTC PKHA A 58 Register</description>
139457          <alternateGroup>LTC0</alternateGroup>
139458          <addressOffset>0x8E8</addressOffset>
139459          <size>32</size>
139460          <access>read-write</access>
139461          <resetValue>0</resetValue>
139462          <resetMask>0xFFFFFFFF</resetMask>
139463        </register>
139464        <register>
139465          <name>LTC0_PKA3_11</name>
139466          <description>LTC PKHA A3 11 Register</description>
139467          <alternateGroup>LTC0</alternateGroup>
139468          <addressOffset>0x8EC</addressOffset>
139469          <size>32</size>
139470          <access>read-write</access>
139471          <resetValue>0</resetValue>
139472          <resetMask>0xFFFFFFFF</resetMask>
139473          <fields>
139474            <field>
139475              <name>PKHA_A3</name>
139476              <description>A3 VALUE</description>
139477              <bitOffset>0</bitOffset>
139478              <bitWidth>32</bitWidth>
139479              <access>read-write</access>
139480            </field>
139481          </fields>
139482        </register>
139483        <register>
139484          <name>LTC0_PKA_59</name>
139485          <description>LTC PKHA A 59 Register</description>
139486          <alternateGroup>LTC0</alternateGroup>
139487          <addressOffset>0x8EC</addressOffset>
139488          <size>32</size>
139489          <access>read-write</access>
139490          <resetValue>0</resetValue>
139491          <resetMask>0xFFFFFFFF</resetMask>
139492        </register>
139493        <register>
139494          <name>LTC0_PKA3_12</name>
139495          <description>LTC PKHA A3 12 Register</description>
139496          <alternateGroup>LTC0</alternateGroup>
139497          <addressOffset>0x8F0</addressOffset>
139498          <size>32</size>
139499          <access>read-write</access>
139500          <resetValue>0</resetValue>
139501          <resetMask>0xFFFFFFFF</resetMask>
139502          <fields>
139503            <field>
139504              <name>PKHA_A3</name>
139505              <description>A3 VALUE</description>
139506              <bitOffset>0</bitOffset>
139507              <bitWidth>32</bitWidth>
139508              <access>read-write</access>
139509            </field>
139510          </fields>
139511        </register>
139512        <register>
139513          <name>LTC0_PKA_60</name>
139514          <description>LTC PKHA A 60 Register</description>
139515          <alternateGroup>LTC0</alternateGroup>
139516          <addressOffset>0x8F0</addressOffset>
139517          <size>32</size>
139518          <access>read-write</access>
139519          <resetValue>0</resetValue>
139520          <resetMask>0xFFFFFFFF</resetMask>
139521        </register>
139522        <register>
139523          <name>LTC0_PKA3_13</name>
139524          <description>LTC PKHA A3 13 Register</description>
139525          <alternateGroup>LTC0</alternateGroup>
139526          <addressOffset>0x8F4</addressOffset>
139527          <size>32</size>
139528          <access>read-write</access>
139529          <resetValue>0</resetValue>
139530          <resetMask>0xFFFFFFFF</resetMask>
139531          <fields>
139532            <field>
139533              <name>PKHA_A3</name>
139534              <description>A3 VALUE</description>
139535              <bitOffset>0</bitOffset>
139536              <bitWidth>32</bitWidth>
139537              <access>read-write</access>
139538            </field>
139539          </fields>
139540        </register>
139541        <register>
139542          <name>LTC0_PKA_61</name>
139543          <description>LTC PKHA A 61 Register</description>
139544          <alternateGroup>LTC0</alternateGroup>
139545          <addressOffset>0x8F4</addressOffset>
139546          <size>32</size>
139547          <access>read-write</access>
139548          <resetValue>0</resetValue>
139549          <resetMask>0xFFFFFFFF</resetMask>
139550        </register>
139551        <register>
139552          <name>LTC0_PKA3_14</name>
139553          <description>LTC PKHA A3 14 Register</description>
139554          <alternateGroup>LTC0</alternateGroup>
139555          <addressOffset>0x8F8</addressOffset>
139556          <size>32</size>
139557          <access>read-write</access>
139558          <resetValue>0</resetValue>
139559          <resetMask>0xFFFFFFFF</resetMask>
139560          <fields>
139561            <field>
139562              <name>PKHA_A3</name>
139563              <description>A3 VALUE</description>
139564              <bitOffset>0</bitOffset>
139565              <bitWidth>32</bitWidth>
139566              <access>read-write</access>
139567            </field>
139568          </fields>
139569        </register>
139570        <register>
139571          <name>LTC0_PKA_62</name>
139572          <description>LTC PKHA A 62 Register</description>
139573          <alternateGroup>LTC0</alternateGroup>
139574          <addressOffset>0x8F8</addressOffset>
139575          <size>32</size>
139576          <access>read-write</access>
139577          <resetValue>0</resetValue>
139578          <resetMask>0xFFFFFFFF</resetMask>
139579        </register>
139580        <register>
139581          <name>LTC0_PKA3_15</name>
139582          <description>LTC PKHA A3 15 Register</description>
139583          <alternateGroup>LTC0</alternateGroup>
139584          <addressOffset>0x8FC</addressOffset>
139585          <size>32</size>
139586          <access>read-write</access>
139587          <resetValue>0</resetValue>
139588          <resetMask>0xFFFFFFFF</resetMask>
139589          <fields>
139590            <field>
139591              <name>PKHA_A3</name>
139592              <description>A3 VALUE</description>
139593              <bitOffset>0</bitOffset>
139594              <bitWidth>32</bitWidth>
139595              <access>read-write</access>
139596            </field>
139597          </fields>
139598        </register>
139599        <register>
139600          <name>LTC0_PKA_63</name>
139601          <description>LTC PKHA A 63 Register</description>
139602          <alternateGroup>LTC0</alternateGroup>
139603          <addressOffset>0x8FC</addressOffset>
139604          <size>32</size>
139605          <access>read-write</access>
139606          <resetValue>0</resetValue>
139607          <resetMask>0xFFFFFFFF</resetMask>
139608        </register>
139609        <register>
139610          <name>LTC0_PKB0_0</name>
139611          <description>LTC PKHA B0 0 Register</description>
139612          <alternateGroup>LTC0</alternateGroup>
139613          <addressOffset>0xA00</addressOffset>
139614          <size>32</size>
139615          <access>read-write</access>
139616          <resetValue>0</resetValue>
139617          <resetMask>0xFFFFFFFF</resetMask>
139618          <fields>
139619            <field>
139620              <name>PKHA_B0</name>
139621              <description>B0 VALUE</description>
139622              <bitOffset>0</bitOffset>
139623              <bitWidth>32</bitWidth>
139624              <access>read-write</access>
139625            </field>
139626          </fields>
139627        </register>
139628        <register>
139629          <name>LTC0_PKB_0</name>
139630          <description>LTC PKHA B 0 Register</description>
139631          <alternateGroup>LTC0</alternateGroup>
139632          <addressOffset>0xA00</addressOffset>
139633          <size>32</size>
139634          <access>read-write</access>
139635          <resetValue>0</resetValue>
139636          <resetMask>0xFFFFFFFF</resetMask>
139637        </register>
139638        <register>
139639          <name>LTC0_PKB0_1</name>
139640          <description>LTC PKHA B0 1 Register</description>
139641          <alternateGroup>LTC0</alternateGroup>
139642          <addressOffset>0xA04</addressOffset>
139643          <size>32</size>
139644          <access>read-write</access>
139645          <resetValue>0</resetValue>
139646          <resetMask>0xFFFFFFFF</resetMask>
139647          <fields>
139648            <field>
139649              <name>PKHA_B0</name>
139650              <description>B0 VALUE</description>
139651              <bitOffset>0</bitOffset>
139652              <bitWidth>32</bitWidth>
139653              <access>read-write</access>
139654            </field>
139655          </fields>
139656        </register>
139657        <register>
139658          <name>LTC0_PKB_1</name>
139659          <description>LTC PKHA B 1 Register</description>
139660          <alternateGroup>LTC0</alternateGroup>
139661          <addressOffset>0xA04</addressOffset>
139662          <size>32</size>
139663          <access>read-write</access>
139664          <resetValue>0</resetValue>
139665          <resetMask>0xFFFFFFFF</resetMask>
139666        </register>
139667        <register>
139668          <name>LTC0_PKB0_2</name>
139669          <description>LTC PKHA B0 2 Register</description>
139670          <alternateGroup>LTC0</alternateGroup>
139671          <addressOffset>0xA08</addressOffset>
139672          <size>32</size>
139673          <access>read-write</access>
139674          <resetValue>0</resetValue>
139675          <resetMask>0xFFFFFFFF</resetMask>
139676          <fields>
139677            <field>
139678              <name>PKHA_B0</name>
139679              <description>B0 VALUE</description>
139680              <bitOffset>0</bitOffset>
139681              <bitWidth>32</bitWidth>
139682              <access>read-write</access>
139683            </field>
139684          </fields>
139685        </register>
139686        <register>
139687          <name>LTC0_PKB_2</name>
139688          <description>LTC PKHA B 2 Register</description>
139689          <alternateGroup>LTC0</alternateGroup>
139690          <addressOffset>0xA08</addressOffset>
139691          <size>32</size>
139692          <access>read-write</access>
139693          <resetValue>0</resetValue>
139694          <resetMask>0xFFFFFFFF</resetMask>
139695        </register>
139696        <register>
139697          <name>LTC0_PKB0_3</name>
139698          <description>LTC PKHA B0 3 Register</description>
139699          <alternateGroup>LTC0</alternateGroup>
139700          <addressOffset>0xA0C</addressOffset>
139701          <size>32</size>
139702          <access>read-write</access>
139703          <resetValue>0</resetValue>
139704          <resetMask>0xFFFFFFFF</resetMask>
139705          <fields>
139706            <field>
139707              <name>PKHA_B0</name>
139708              <description>B0 VALUE</description>
139709              <bitOffset>0</bitOffset>
139710              <bitWidth>32</bitWidth>
139711              <access>read-write</access>
139712            </field>
139713          </fields>
139714        </register>
139715        <register>
139716          <name>LTC0_PKB_3</name>
139717          <description>LTC PKHA B 3 Register</description>
139718          <alternateGroup>LTC0</alternateGroup>
139719          <addressOffset>0xA0C</addressOffset>
139720          <size>32</size>
139721          <access>read-write</access>
139722          <resetValue>0</resetValue>
139723          <resetMask>0xFFFFFFFF</resetMask>
139724        </register>
139725        <register>
139726          <name>LTC0_PKB0_4</name>
139727          <description>LTC PKHA B0 4 Register</description>
139728          <alternateGroup>LTC0</alternateGroup>
139729          <addressOffset>0xA10</addressOffset>
139730          <size>32</size>
139731          <access>read-write</access>
139732          <resetValue>0</resetValue>
139733          <resetMask>0xFFFFFFFF</resetMask>
139734          <fields>
139735            <field>
139736              <name>PKHA_B0</name>
139737              <description>B0 VALUE</description>
139738              <bitOffset>0</bitOffset>
139739              <bitWidth>32</bitWidth>
139740              <access>read-write</access>
139741            </field>
139742          </fields>
139743        </register>
139744        <register>
139745          <name>LTC0_PKB_4</name>
139746          <description>LTC PKHA B 4 Register</description>
139747          <alternateGroup>LTC0</alternateGroup>
139748          <addressOffset>0xA10</addressOffset>
139749          <size>32</size>
139750          <access>read-write</access>
139751          <resetValue>0</resetValue>
139752          <resetMask>0xFFFFFFFF</resetMask>
139753        </register>
139754        <register>
139755          <name>LTC0_PKB0_5</name>
139756          <description>LTC PKHA B0 5 Register</description>
139757          <alternateGroup>LTC0</alternateGroup>
139758          <addressOffset>0xA14</addressOffset>
139759          <size>32</size>
139760          <access>read-write</access>
139761          <resetValue>0</resetValue>
139762          <resetMask>0xFFFFFFFF</resetMask>
139763          <fields>
139764            <field>
139765              <name>PKHA_B0</name>
139766              <description>B0 VALUE</description>
139767              <bitOffset>0</bitOffset>
139768              <bitWidth>32</bitWidth>
139769              <access>read-write</access>
139770            </field>
139771          </fields>
139772        </register>
139773        <register>
139774          <name>LTC0_PKB_5</name>
139775          <description>LTC PKHA B 5 Register</description>
139776          <alternateGroup>LTC0</alternateGroup>
139777          <addressOffset>0xA14</addressOffset>
139778          <size>32</size>
139779          <access>read-write</access>
139780          <resetValue>0</resetValue>
139781          <resetMask>0xFFFFFFFF</resetMask>
139782        </register>
139783        <register>
139784          <name>LTC0_PKB0_6</name>
139785          <description>LTC PKHA B0 6 Register</description>
139786          <alternateGroup>LTC0</alternateGroup>
139787          <addressOffset>0xA18</addressOffset>
139788          <size>32</size>
139789          <access>read-write</access>
139790          <resetValue>0</resetValue>
139791          <resetMask>0xFFFFFFFF</resetMask>
139792          <fields>
139793            <field>
139794              <name>PKHA_B0</name>
139795              <description>B0 VALUE</description>
139796              <bitOffset>0</bitOffset>
139797              <bitWidth>32</bitWidth>
139798              <access>read-write</access>
139799            </field>
139800          </fields>
139801        </register>
139802        <register>
139803          <name>LTC0_PKB_6</name>
139804          <description>LTC PKHA B 6 Register</description>
139805          <alternateGroup>LTC0</alternateGroup>
139806          <addressOffset>0xA18</addressOffset>
139807          <size>32</size>
139808          <access>read-write</access>
139809          <resetValue>0</resetValue>
139810          <resetMask>0xFFFFFFFF</resetMask>
139811        </register>
139812        <register>
139813          <name>LTC0_PKB0_7</name>
139814          <description>LTC PKHA B0 7 Register</description>
139815          <alternateGroup>LTC0</alternateGroup>
139816          <addressOffset>0xA1C</addressOffset>
139817          <size>32</size>
139818          <access>read-write</access>
139819          <resetValue>0</resetValue>
139820          <resetMask>0xFFFFFFFF</resetMask>
139821          <fields>
139822            <field>
139823              <name>PKHA_B0</name>
139824              <description>B0 VALUE</description>
139825              <bitOffset>0</bitOffset>
139826              <bitWidth>32</bitWidth>
139827              <access>read-write</access>
139828            </field>
139829          </fields>
139830        </register>
139831        <register>
139832          <name>LTC0_PKB_7</name>
139833          <description>LTC PKHA B 7 Register</description>
139834          <alternateGroup>LTC0</alternateGroup>
139835          <addressOffset>0xA1C</addressOffset>
139836          <size>32</size>
139837          <access>read-write</access>
139838          <resetValue>0</resetValue>
139839          <resetMask>0xFFFFFFFF</resetMask>
139840        </register>
139841        <register>
139842          <name>LTC0_PKB0_8</name>
139843          <description>LTC PKHA B0 8 Register</description>
139844          <alternateGroup>LTC0</alternateGroup>
139845          <addressOffset>0xA20</addressOffset>
139846          <size>32</size>
139847          <access>read-write</access>
139848          <resetValue>0</resetValue>
139849          <resetMask>0xFFFFFFFF</resetMask>
139850          <fields>
139851            <field>
139852              <name>PKHA_B0</name>
139853              <description>B0 VALUE</description>
139854              <bitOffset>0</bitOffset>
139855              <bitWidth>32</bitWidth>
139856              <access>read-write</access>
139857            </field>
139858          </fields>
139859        </register>
139860        <register>
139861          <name>LTC0_PKB_8</name>
139862          <description>LTC PKHA B 8 Register</description>
139863          <alternateGroup>LTC0</alternateGroup>
139864          <addressOffset>0xA20</addressOffset>
139865          <size>32</size>
139866          <access>read-write</access>
139867          <resetValue>0</resetValue>
139868          <resetMask>0xFFFFFFFF</resetMask>
139869        </register>
139870        <register>
139871          <name>LTC0_PKB0_9</name>
139872          <description>LTC PKHA B0 9 Register</description>
139873          <alternateGroup>LTC0</alternateGroup>
139874          <addressOffset>0xA24</addressOffset>
139875          <size>32</size>
139876          <access>read-write</access>
139877          <resetValue>0</resetValue>
139878          <resetMask>0xFFFFFFFF</resetMask>
139879          <fields>
139880            <field>
139881              <name>PKHA_B0</name>
139882              <description>B0 VALUE</description>
139883              <bitOffset>0</bitOffset>
139884              <bitWidth>32</bitWidth>
139885              <access>read-write</access>
139886            </field>
139887          </fields>
139888        </register>
139889        <register>
139890          <name>LTC0_PKB_9</name>
139891          <description>LTC PKHA B 9 Register</description>
139892          <alternateGroup>LTC0</alternateGroup>
139893          <addressOffset>0xA24</addressOffset>
139894          <size>32</size>
139895          <access>read-write</access>
139896          <resetValue>0</resetValue>
139897          <resetMask>0xFFFFFFFF</resetMask>
139898        </register>
139899        <register>
139900          <name>LTC0_PKB0_10</name>
139901          <description>LTC PKHA B0 10 Register</description>
139902          <alternateGroup>LTC0</alternateGroup>
139903          <addressOffset>0xA28</addressOffset>
139904          <size>32</size>
139905          <access>read-write</access>
139906          <resetValue>0</resetValue>
139907          <resetMask>0xFFFFFFFF</resetMask>
139908          <fields>
139909            <field>
139910              <name>PKHA_B0</name>
139911              <description>B0 VALUE</description>
139912              <bitOffset>0</bitOffset>
139913              <bitWidth>32</bitWidth>
139914              <access>read-write</access>
139915            </field>
139916          </fields>
139917        </register>
139918        <register>
139919          <name>LTC0_PKB_10</name>
139920          <description>LTC PKHA B 10 Register</description>
139921          <alternateGroup>LTC0</alternateGroup>
139922          <addressOffset>0xA28</addressOffset>
139923          <size>32</size>
139924          <access>read-write</access>
139925          <resetValue>0</resetValue>
139926          <resetMask>0xFFFFFFFF</resetMask>
139927        </register>
139928        <register>
139929          <name>LTC0_PKB0_11</name>
139930          <description>LTC PKHA B0 11 Register</description>
139931          <alternateGroup>LTC0</alternateGroup>
139932          <addressOffset>0xA2C</addressOffset>
139933          <size>32</size>
139934          <access>read-write</access>
139935          <resetValue>0</resetValue>
139936          <resetMask>0xFFFFFFFF</resetMask>
139937          <fields>
139938            <field>
139939              <name>PKHA_B0</name>
139940              <description>B0 VALUE</description>
139941              <bitOffset>0</bitOffset>
139942              <bitWidth>32</bitWidth>
139943              <access>read-write</access>
139944            </field>
139945          </fields>
139946        </register>
139947        <register>
139948          <name>LTC0_PKB_11</name>
139949          <description>LTC PKHA B 11 Register</description>
139950          <alternateGroup>LTC0</alternateGroup>
139951          <addressOffset>0xA2C</addressOffset>
139952          <size>32</size>
139953          <access>read-write</access>
139954          <resetValue>0</resetValue>
139955          <resetMask>0xFFFFFFFF</resetMask>
139956        </register>
139957        <register>
139958          <name>LTC0_PKB0_12</name>
139959          <description>LTC PKHA B0 12 Register</description>
139960          <alternateGroup>LTC0</alternateGroup>
139961          <addressOffset>0xA30</addressOffset>
139962          <size>32</size>
139963          <access>read-write</access>
139964          <resetValue>0</resetValue>
139965          <resetMask>0xFFFFFFFF</resetMask>
139966          <fields>
139967            <field>
139968              <name>PKHA_B0</name>
139969              <description>B0 VALUE</description>
139970              <bitOffset>0</bitOffset>
139971              <bitWidth>32</bitWidth>
139972              <access>read-write</access>
139973            </field>
139974          </fields>
139975        </register>
139976        <register>
139977          <name>LTC0_PKB_12</name>
139978          <description>LTC PKHA B 12 Register</description>
139979          <alternateGroup>LTC0</alternateGroup>
139980          <addressOffset>0xA30</addressOffset>
139981          <size>32</size>
139982          <access>read-write</access>
139983          <resetValue>0</resetValue>
139984          <resetMask>0xFFFFFFFF</resetMask>
139985        </register>
139986        <register>
139987          <name>LTC0_PKB0_13</name>
139988          <description>LTC PKHA B0 13 Register</description>
139989          <alternateGroup>LTC0</alternateGroup>
139990          <addressOffset>0xA34</addressOffset>
139991          <size>32</size>
139992          <access>read-write</access>
139993          <resetValue>0</resetValue>
139994          <resetMask>0xFFFFFFFF</resetMask>
139995          <fields>
139996            <field>
139997              <name>PKHA_B0</name>
139998              <description>B0 VALUE</description>
139999              <bitOffset>0</bitOffset>
140000              <bitWidth>32</bitWidth>
140001              <access>read-write</access>
140002            </field>
140003          </fields>
140004        </register>
140005        <register>
140006          <name>LTC0_PKB_13</name>
140007          <description>LTC PKHA B 13 Register</description>
140008          <alternateGroup>LTC0</alternateGroup>
140009          <addressOffset>0xA34</addressOffset>
140010          <size>32</size>
140011          <access>read-write</access>
140012          <resetValue>0</resetValue>
140013          <resetMask>0xFFFFFFFF</resetMask>
140014        </register>
140015        <register>
140016          <name>LTC0_PKB0_14</name>
140017          <description>LTC PKHA B0 14 Register</description>
140018          <alternateGroup>LTC0</alternateGroup>
140019          <addressOffset>0xA38</addressOffset>
140020          <size>32</size>
140021          <access>read-write</access>
140022          <resetValue>0</resetValue>
140023          <resetMask>0xFFFFFFFF</resetMask>
140024          <fields>
140025            <field>
140026              <name>PKHA_B0</name>
140027              <description>B0 VALUE</description>
140028              <bitOffset>0</bitOffset>
140029              <bitWidth>32</bitWidth>
140030              <access>read-write</access>
140031            </field>
140032          </fields>
140033        </register>
140034        <register>
140035          <name>LTC0_PKB_14</name>
140036          <description>LTC PKHA B 14 Register</description>
140037          <alternateGroup>LTC0</alternateGroup>
140038          <addressOffset>0xA38</addressOffset>
140039          <size>32</size>
140040          <access>read-write</access>
140041          <resetValue>0</resetValue>
140042          <resetMask>0xFFFFFFFF</resetMask>
140043        </register>
140044        <register>
140045          <name>LTC0_PKB0_15</name>
140046          <description>LTC PKHA B0 15 Register</description>
140047          <alternateGroup>LTC0</alternateGroup>
140048          <addressOffset>0xA3C</addressOffset>
140049          <size>32</size>
140050          <access>read-write</access>
140051          <resetValue>0</resetValue>
140052          <resetMask>0xFFFFFFFF</resetMask>
140053          <fields>
140054            <field>
140055              <name>PKHA_B0</name>
140056              <description>B0 VALUE</description>
140057              <bitOffset>0</bitOffset>
140058              <bitWidth>32</bitWidth>
140059              <access>read-write</access>
140060            </field>
140061          </fields>
140062        </register>
140063        <register>
140064          <name>LTC0_PKB_15</name>
140065          <description>LTC PKHA B 15 Register</description>
140066          <alternateGroup>LTC0</alternateGroup>
140067          <addressOffset>0xA3C</addressOffset>
140068          <size>32</size>
140069          <access>read-write</access>
140070          <resetValue>0</resetValue>
140071          <resetMask>0xFFFFFFFF</resetMask>
140072        </register>
140073        <register>
140074          <name>LTC0_PKB1_0</name>
140075          <description>LTC PKHA B1 0 Register</description>
140076          <alternateGroup>LTC0</alternateGroup>
140077          <addressOffset>0xA40</addressOffset>
140078          <size>32</size>
140079          <access>read-write</access>
140080          <resetValue>0</resetValue>
140081          <resetMask>0xFFFFFFFF</resetMask>
140082          <fields>
140083            <field>
140084              <name>PKHA_B1</name>
140085              <description>B1 VALUE</description>
140086              <bitOffset>0</bitOffset>
140087              <bitWidth>32</bitWidth>
140088              <access>read-write</access>
140089            </field>
140090          </fields>
140091        </register>
140092        <register>
140093          <name>LTC0_PKB_16</name>
140094          <description>LTC PKHA B 16 Register</description>
140095          <alternateGroup>LTC0</alternateGroup>
140096          <addressOffset>0xA40</addressOffset>
140097          <size>32</size>
140098          <access>read-write</access>
140099          <resetValue>0</resetValue>
140100          <resetMask>0xFFFFFFFF</resetMask>
140101        </register>
140102        <register>
140103          <name>LTC0_PKB1_1</name>
140104          <description>LTC PKHA B1 1 Register</description>
140105          <alternateGroup>LTC0</alternateGroup>
140106          <addressOffset>0xA44</addressOffset>
140107          <size>32</size>
140108          <access>read-write</access>
140109          <resetValue>0</resetValue>
140110          <resetMask>0xFFFFFFFF</resetMask>
140111          <fields>
140112            <field>
140113              <name>PKHA_B1</name>
140114              <description>B1 VALUE</description>
140115              <bitOffset>0</bitOffset>
140116              <bitWidth>32</bitWidth>
140117              <access>read-write</access>
140118            </field>
140119          </fields>
140120        </register>
140121        <register>
140122          <name>LTC0_PKB_17</name>
140123          <description>LTC PKHA B 17 Register</description>
140124          <alternateGroup>LTC0</alternateGroup>
140125          <addressOffset>0xA44</addressOffset>
140126          <size>32</size>
140127          <access>read-write</access>
140128          <resetValue>0</resetValue>
140129          <resetMask>0xFFFFFFFF</resetMask>
140130        </register>
140131        <register>
140132          <name>LTC0_PKB1_2</name>
140133          <description>LTC PKHA B1 2 Register</description>
140134          <alternateGroup>LTC0</alternateGroup>
140135          <addressOffset>0xA48</addressOffset>
140136          <size>32</size>
140137          <access>read-write</access>
140138          <resetValue>0</resetValue>
140139          <resetMask>0xFFFFFFFF</resetMask>
140140          <fields>
140141            <field>
140142              <name>PKHA_B1</name>
140143              <description>B1 VALUE</description>
140144              <bitOffset>0</bitOffset>
140145              <bitWidth>32</bitWidth>
140146              <access>read-write</access>
140147            </field>
140148          </fields>
140149        </register>
140150        <register>
140151          <name>LTC0_PKB_18</name>
140152          <description>LTC PKHA B 18 Register</description>
140153          <alternateGroup>LTC0</alternateGroup>
140154          <addressOffset>0xA48</addressOffset>
140155          <size>32</size>
140156          <access>read-write</access>
140157          <resetValue>0</resetValue>
140158          <resetMask>0xFFFFFFFF</resetMask>
140159        </register>
140160        <register>
140161          <name>LTC0_PKB1_3</name>
140162          <description>LTC PKHA B1 3 Register</description>
140163          <alternateGroup>LTC0</alternateGroup>
140164          <addressOffset>0xA4C</addressOffset>
140165          <size>32</size>
140166          <access>read-write</access>
140167          <resetValue>0</resetValue>
140168          <resetMask>0xFFFFFFFF</resetMask>
140169          <fields>
140170            <field>
140171              <name>PKHA_B1</name>
140172              <description>B1 VALUE</description>
140173              <bitOffset>0</bitOffset>
140174              <bitWidth>32</bitWidth>
140175              <access>read-write</access>
140176            </field>
140177          </fields>
140178        </register>
140179        <register>
140180          <name>LTC0_PKB_19</name>
140181          <description>LTC PKHA B 19 Register</description>
140182          <alternateGroup>LTC0</alternateGroup>
140183          <addressOffset>0xA4C</addressOffset>
140184          <size>32</size>
140185          <access>read-write</access>
140186          <resetValue>0</resetValue>
140187          <resetMask>0xFFFFFFFF</resetMask>
140188        </register>
140189        <register>
140190          <name>LTC0_PKB1_4</name>
140191          <description>LTC PKHA B1 4 Register</description>
140192          <alternateGroup>LTC0</alternateGroup>
140193          <addressOffset>0xA50</addressOffset>
140194          <size>32</size>
140195          <access>read-write</access>
140196          <resetValue>0</resetValue>
140197          <resetMask>0xFFFFFFFF</resetMask>
140198          <fields>
140199            <field>
140200              <name>PKHA_B1</name>
140201              <description>B1 VALUE</description>
140202              <bitOffset>0</bitOffset>
140203              <bitWidth>32</bitWidth>
140204              <access>read-write</access>
140205            </field>
140206          </fields>
140207        </register>
140208        <register>
140209          <name>LTC0_PKB_20</name>
140210          <description>LTC PKHA B 20 Register</description>
140211          <alternateGroup>LTC0</alternateGroup>
140212          <addressOffset>0xA50</addressOffset>
140213          <size>32</size>
140214          <access>read-write</access>
140215          <resetValue>0</resetValue>
140216          <resetMask>0xFFFFFFFF</resetMask>
140217        </register>
140218        <register>
140219          <name>LTC0_PKB1_5</name>
140220          <description>LTC PKHA B1 5 Register</description>
140221          <alternateGroup>LTC0</alternateGroup>
140222          <addressOffset>0xA54</addressOffset>
140223          <size>32</size>
140224          <access>read-write</access>
140225          <resetValue>0</resetValue>
140226          <resetMask>0xFFFFFFFF</resetMask>
140227          <fields>
140228            <field>
140229              <name>PKHA_B1</name>
140230              <description>B1 VALUE</description>
140231              <bitOffset>0</bitOffset>
140232              <bitWidth>32</bitWidth>
140233              <access>read-write</access>
140234            </field>
140235          </fields>
140236        </register>
140237        <register>
140238          <name>LTC0_PKB_21</name>
140239          <description>LTC PKHA B 21 Register</description>
140240          <alternateGroup>LTC0</alternateGroup>
140241          <addressOffset>0xA54</addressOffset>
140242          <size>32</size>
140243          <access>read-write</access>
140244          <resetValue>0</resetValue>
140245          <resetMask>0xFFFFFFFF</resetMask>
140246        </register>
140247        <register>
140248          <name>LTC0_PKB1_6</name>
140249          <description>LTC PKHA B1 6 Register</description>
140250          <alternateGroup>LTC0</alternateGroup>
140251          <addressOffset>0xA58</addressOffset>
140252          <size>32</size>
140253          <access>read-write</access>
140254          <resetValue>0</resetValue>
140255          <resetMask>0xFFFFFFFF</resetMask>
140256          <fields>
140257            <field>
140258              <name>PKHA_B1</name>
140259              <description>B1 VALUE</description>
140260              <bitOffset>0</bitOffset>
140261              <bitWidth>32</bitWidth>
140262              <access>read-write</access>
140263            </field>
140264          </fields>
140265        </register>
140266        <register>
140267          <name>LTC0_PKB_22</name>
140268          <description>LTC PKHA B 22 Register</description>
140269          <alternateGroup>LTC0</alternateGroup>
140270          <addressOffset>0xA58</addressOffset>
140271          <size>32</size>
140272          <access>read-write</access>
140273          <resetValue>0</resetValue>
140274          <resetMask>0xFFFFFFFF</resetMask>
140275        </register>
140276        <register>
140277          <name>LTC0_PKB1_7</name>
140278          <description>LTC PKHA B1 7 Register</description>
140279          <alternateGroup>LTC0</alternateGroup>
140280          <addressOffset>0xA5C</addressOffset>
140281          <size>32</size>
140282          <access>read-write</access>
140283          <resetValue>0</resetValue>
140284          <resetMask>0xFFFFFFFF</resetMask>
140285          <fields>
140286            <field>
140287              <name>PKHA_B1</name>
140288              <description>B1 VALUE</description>
140289              <bitOffset>0</bitOffset>
140290              <bitWidth>32</bitWidth>
140291              <access>read-write</access>
140292            </field>
140293          </fields>
140294        </register>
140295        <register>
140296          <name>LTC0_PKB_23</name>
140297          <description>LTC PKHA B 23 Register</description>
140298          <alternateGroup>LTC0</alternateGroup>
140299          <addressOffset>0xA5C</addressOffset>
140300          <size>32</size>
140301          <access>read-write</access>
140302          <resetValue>0</resetValue>
140303          <resetMask>0xFFFFFFFF</resetMask>
140304        </register>
140305        <register>
140306          <name>LTC0_PKB1_8</name>
140307          <description>LTC PKHA B1 8 Register</description>
140308          <alternateGroup>LTC0</alternateGroup>
140309          <addressOffset>0xA60</addressOffset>
140310          <size>32</size>
140311          <access>read-write</access>
140312          <resetValue>0</resetValue>
140313          <resetMask>0xFFFFFFFF</resetMask>
140314          <fields>
140315            <field>
140316              <name>PKHA_B1</name>
140317              <description>B1 VALUE</description>
140318              <bitOffset>0</bitOffset>
140319              <bitWidth>32</bitWidth>
140320              <access>read-write</access>
140321            </field>
140322          </fields>
140323        </register>
140324        <register>
140325          <name>LTC0_PKB_24</name>
140326          <description>LTC PKHA B 24 Register</description>
140327          <alternateGroup>LTC0</alternateGroup>
140328          <addressOffset>0xA60</addressOffset>
140329          <size>32</size>
140330          <access>read-write</access>
140331          <resetValue>0</resetValue>
140332          <resetMask>0xFFFFFFFF</resetMask>
140333        </register>
140334        <register>
140335          <name>LTC0_PKB1_9</name>
140336          <description>LTC PKHA B1 9 Register</description>
140337          <alternateGroup>LTC0</alternateGroup>
140338          <addressOffset>0xA64</addressOffset>
140339          <size>32</size>
140340          <access>read-write</access>
140341          <resetValue>0</resetValue>
140342          <resetMask>0xFFFFFFFF</resetMask>
140343          <fields>
140344            <field>
140345              <name>PKHA_B1</name>
140346              <description>B1 VALUE</description>
140347              <bitOffset>0</bitOffset>
140348              <bitWidth>32</bitWidth>
140349              <access>read-write</access>
140350            </field>
140351          </fields>
140352        </register>
140353        <register>
140354          <name>LTC0_PKB_25</name>
140355          <description>LTC PKHA B 25 Register</description>
140356          <alternateGroup>LTC0</alternateGroup>
140357          <addressOffset>0xA64</addressOffset>
140358          <size>32</size>
140359          <access>read-write</access>
140360          <resetValue>0</resetValue>
140361          <resetMask>0xFFFFFFFF</resetMask>
140362        </register>
140363        <register>
140364          <name>LTC0_PKB1_10</name>
140365          <description>LTC PKHA B1 10 Register</description>
140366          <alternateGroup>LTC0</alternateGroup>
140367          <addressOffset>0xA68</addressOffset>
140368          <size>32</size>
140369          <access>read-write</access>
140370          <resetValue>0</resetValue>
140371          <resetMask>0xFFFFFFFF</resetMask>
140372          <fields>
140373            <field>
140374              <name>PKHA_B1</name>
140375              <description>B1 VALUE</description>
140376              <bitOffset>0</bitOffset>
140377              <bitWidth>32</bitWidth>
140378              <access>read-write</access>
140379            </field>
140380          </fields>
140381        </register>
140382        <register>
140383          <name>LTC0_PKB_26</name>
140384          <description>LTC PKHA B 26 Register</description>
140385          <alternateGroup>LTC0</alternateGroup>
140386          <addressOffset>0xA68</addressOffset>
140387          <size>32</size>
140388          <access>read-write</access>
140389          <resetValue>0</resetValue>
140390          <resetMask>0xFFFFFFFF</resetMask>
140391        </register>
140392        <register>
140393          <name>LTC0_PKB1_11</name>
140394          <description>LTC PKHA B1 11 Register</description>
140395          <alternateGroup>LTC0</alternateGroup>
140396          <addressOffset>0xA6C</addressOffset>
140397          <size>32</size>
140398          <access>read-write</access>
140399          <resetValue>0</resetValue>
140400          <resetMask>0xFFFFFFFF</resetMask>
140401          <fields>
140402            <field>
140403              <name>PKHA_B1</name>
140404              <description>B1 VALUE</description>
140405              <bitOffset>0</bitOffset>
140406              <bitWidth>32</bitWidth>
140407              <access>read-write</access>
140408            </field>
140409          </fields>
140410        </register>
140411        <register>
140412          <name>LTC0_PKB_27</name>
140413          <description>LTC PKHA B 27 Register</description>
140414          <alternateGroup>LTC0</alternateGroup>
140415          <addressOffset>0xA6C</addressOffset>
140416          <size>32</size>
140417          <access>read-write</access>
140418          <resetValue>0</resetValue>
140419          <resetMask>0xFFFFFFFF</resetMask>
140420        </register>
140421        <register>
140422          <name>LTC0_PKB1_12</name>
140423          <description>LTC PKHA B1 12 Register</description>
140424          <alternateGroup>LTC0</alternateGroup>
140425          <addressOffset>0xA70</addressOffset>
140426          <size>32</size>
140427          <access>read-write</access>
140428          <resetValue>0</resetValue>
140429          <resetMask>0xFFFFFFFF</resetMask>
140430          <fields>
140431            <field>
140432              <name>PKHA_B1</name>
140433              <description>B1 VALUE</description>
140434              <bitOffset>0</bitOffset>
140435              <bitWidth>32</bitWidth>
140436              <access>read-write</access>
140437            </field>
140438          </fields>
140439        </register>
140440        <register>
140441          <name>LTC0_PKB_28</name>
140442          <description>LTC PKHA B 28 Register</description>
140443          <alternateGroup>LTC0</alternateGroup>
140444          <addressOffset>0xA70</addressOffset>
140445          <size>32</size>
140446          <access>read-write</access>
140447          <resetValue>0</resetValue>
140448          <resetMask>0xFFFFFFFF</resetMask>
140449        </register>
140450        <register>
140451          <name>LTC0_PKB1_13</name>
140452          <description>LTC PKHA B1 13 Register</description>
140453          <alternateGroup>LTC0</alternateGroup>
140454          <addressOffset>0xA74</addressOffset>
140455          <size>32</size>
140456          <access>read-write</access>
140457          <resetValue>0</resetValue>
140458          <resetMask>0xFFFFFFFF</resetMask>
140459          <fields>
140460            <field>
140461              <name>PKHA_B1</name>
140462              <description>B1 VALUE</description>
140463              <bitOffset>0</bitOffset>
140464              <bitWidth>32</bitWidth>
140465              <access>read-write</access>
140466            </field>
140467          </fields>
140468        </register>
140469        <register>
140470          <name>LTC0_PKB_29</name>
140471          <description>LTC PKHA B 29 Register</description>
140472          <alternateGroup>LTC0</alternateGroup>
140473          <addressOffset>0xA74</addressOffset>
140474          <size>32</size>
140475          <access>read-write</access>
140476          <resetValue>0</resetValue>
140477          <resetMask>0xFFFFFFFF</resetMask>
140478        </register>
140479        <register>
140480          <name>LTC0_PKB1_14</name>
140481          <description>LTC PKHA B1 14 Register</description>
140482          <alternateGroup>LTC0</alternateGroup>
140483          <addressOffset>0xA78</addressOffset>
140484          <size>32</size>
140485          <access>read-write</access>
140486          <resetValue>0</resetValue>
140487          <resetMask>0xFFFFFFFF</resetMask>
140488          <fields>
140489            <field>
140490              <name>PKHA_B1</name>
140491              <description>B1 VALUE</description>
140492              <bitOffset>0</bitOffset>
140493              <bitWidth>32</bitWidth>
140494              <access>read-write</access>
140495            </field>
140496          </fields>
140497        </register>
140498        <register>
140499          <name>LTC0_PKB_30</name>
140500          <description>LTC PKHA B 30 Register</description>
140501          <alternateGroup>LTC0</alternateGroup>
140502          <addressOffset>0xA78</addressOffset>
140503          <size>32</size>
140504          <access>read-write</access>
140505          <resetValue>0</resetValue>
140506          <resetMask>0xFFFFFFFF</resetMask>
140507        </register>
140508        <register>
140509          <name>LTC0_PKB1_15</name>
140510          <description>LTC PKHA B1 15 Register</description>
140511          <alternateGroup>LTC0</alternateGroup>
140512          <addressOffset>0xA7C</addressOffset>
140513          <size>32</size>
140514          <access>read-write</access>
140515          <resetValue>0</resetValue>
140516          <resetMask>0xFFFFFFFF</resetMask>
140517          <fields>
140518            <field>
140519              <name>PKHA_B1</name>
140520              <description>B1 VALUE</description>
140521              <bitOffset>0</bitOffset>
140522              <bitWidth>32</bitWidth>
140523              <access>read-write</access>
140524            </field>
140525          </fields>
140526        </register>
140527        <register>
140528          <name>LTC0_PKB_31</name>
140529          <description>LTC PKHA B 31 Register</description>
140530          <alternateGroup>LTC0</alternateGroup>
140531          <addressOffset>0xA7C</addressOffset>
140532          <size>32</size>
140533          <access>read-write</access>
140534          <resetValue>0</resetValue>
140535          <resetMask>0xFFFFFFFF</resetMask>
140536        </register>
140537        <register>
140538          <name>LTC0_PKB2_0</name>
140539          <description>LTC PKHA B2 0 Register</description>
140540          <alternateGroup>LTC0</alternateGroup>
140541          <addressOffset>0xA80</addressOffset>
140542          <size>32</size>
140543          <access>read-write</access>
140544          <resetValue>0</resetValue>
140545          <resetMask>0xFFFFFFFF</resetMask>
140546          <fields>
140547            <field>
140548              <name>PKHA_B2</name>
140549              <description>B2 VALUE</description>
140550              <bitOffset>0</bitOffset>
140551              <bitWidth>32</bitWidth>
140552              <access>read-write</access>
140553            </field>
140554          </fields>
140555        </register>
140556        <register>
140557          <name>LTC0_PKB_32</name>
140558          <description>LTC PKHA B 32 Register</description>
140559          <alternateGroup>LTC0</alternateGroup>
140560          <addressOffset>0xA80</addressOffset>
140561          <size>32</size>
140562          <access>read-write</access>
140563          <resetValue>0</resetValue>
140564          <resetMask>0xFFFFFFFF</resetMask>
140565        </register>
140566        <register>
140567          <name>LTC0_PKB2_1</name>
140568          <description>LTC PKHA B2 1 Register</description>
140569          <alternateGroup>LTC0</alternateGroup>
140570          <addressOffset>0xA84</addressOffset>
140571          <size>32</size>
140572          <access>read-write</access>
140573          <resetValue>0</resetValue>
140574          <resetMask>0xFFFFFFFF</resetMask>
140575          <fields>
140576            <field>
140577              <name>PKHA_B2</name>
140578              <description>B2 VALUE</description>
140579              <bitOffset>0</bitOffset>
140580              <bitWidth>32</bitWidth>
140581              <access>read-write</access>
140582            </field>
140583          </fields>
140584        </register>
140585        <register>
140586          <name>LTC0_PKB_33</name>
140587          <description>LTC PKHA B 33 Register</description>
140588          <alternateGroup>LTC0</alternateGroup>
140589          <addressOffset>0xA84</addressOffset>
140590          <size>32</size>
140591          <access>read-write</access>
140592          <resetValue>0</resetValue>
140593          <resetMask>0xFFFFFFFF</resetMask>
140594        </register>
140595        <register>
140596          <name>LTC0_PKB2_2</name>
140597          <description>LTC PKHA B2 2 Register</description>
140598          <alternateGroup>LTC0</alternateGroup>
140599          <addressOffset>0xA88</addressOffset>
140600          <size>32</size>
140601          <access>read-write</access>
140602          <resetValue>0</resetValue>
140603          <resetMask>0xFFFFFFFF</resetMask>
140604          <fields>
140605            <field>
140606              <name>PKHA_B2</name>
140607              <description>B2 VALUE</description>
140608              <bitOffset>0</bitOffset>
140609              <bitWidth>32</bitWidth>
140610              <access>read-write</access>
140611            </field>
140612          </fields>
140613        </register>
140614        <register>
140615          <name>LTC0_PKB_34</name>
140616          <description>LTC PKHA B 34 Register</description>
140617          <alternateGroup>LTC0</alternateGroup>
140618          <addressOffset>0xA88</addressOffset>
140619          <size>32</size>
140620          <access>read-write</access>
140621          <resetValue>0</resetValue>
140622          <resetMask>0xFFFFFFFF</resetMask>
140623        </register>
140624        <register>
140625          <name>LTC0_PKB2_3</name>
140626          <description>LTC PKHA B2 3 Register</description>
140627          <alternateGroup>LTC0</alternateGroup>
140628          <addressOffset>0xA8C</addressOffset>
140629          <size>32</size>
140630          <access>read-write</access>
140631          <resetValue>0</resetValue>
140632          <resetMask>0xFFFFFFFF</resetMask>
140633          <fields>
140634            <field>
140635              <name>PKHA_B2</name>
140636              <description>B2 VALUE</description>
140637              <bitOffset>0</bitOffset>
140638              <bitWidth>32</bitWidth>
140639              <access>read-write</access>
140640            </field>
140641          </fields>
140642        </register>
140643        <register>
140644          <name>LTC0_PKB_35</name>
140645          <description>LTC PKHA B 35 Register</description>
140646          <alternateGroup>LTC0</alternateGroup>
140647          <addressOffset>0xA8C</addressOffset>
140648          <size>32</size>
140649          <access>read-write</access>
140650          <resetValue>0</resetValue>
140651          <resetMask>0xFFFFFFFF</resetMask>
140652        </register>
140653        <register>
140654          <name>LTC0_PKB2_4</name>
140655          <description>LTC PKHA B2 4 Register</description>
140656          <alternateGroup>LTC0</alternateGroup>
140657          <addressOffset>0xA90</addressOffset>
140658          <size>32</size>
140659          <access>read-write</access>
140660          <resetValue>0</resetValue>
140661          <resetMask>0xFFFFFFFF</resetMask>
140662          <fields>
140663            <field>
140664              <name>PKHA_B2</name>
140665              <description>B2 VALUE</description>
140666              <bitOffset>0</bitOffset>
140667              <bitWidth>32</bitWidth>
140668              <access>read-write</access>
140669            </field>
140670          </fields>
140671        </register>
140672        <register>
140673          <name>LTC0_PKB_36</name>
140674          <description>LTC PKHA B 36 Register</description>
140675          <alternateGroup>LTC0</alternateGroup>
140676          <addressOffset>0xA90</addressOffset>
140677          <size>32</size>
140678          <access>read-write</access>
140679          <resetValue>0</resetValue>
140680          <resetMask>0xFFFFFFFF</resetMask>
140681        </register>
140682        <register>
140683          <name>LTC0_PKB2_5</name>
140684          <description>LTC PKHA B2 5 Register</description>
140685          <alternateGroup>LTC0</alternateGroup>
140686          <addressOffset>0xA94</addressOffset>
140687          <size>32</size>
140688          <access>read-write</access>
140689          <resetValue>0</resetValue>
140690          <resetMask>0xFFFFFFFF</resetMask>
140691          <fields>
140692            <field>
140693              <name>PKHA_B2</name>
140694              <description>B2 VALUE</description>
140695              <bitOffset>0</bitOffset>
140696              <bitWidth>32</bitWidth>
140697              <access>read-write</access>
140698            </field>
140699          </fields>
140700        </register>
140701        <register>
140702          <name>LTC0_PKB_37</name>
140703          <description>LTC PKHA B 37 Register</description>
140704          <alternateGroup>LTC0</alternateGroup>
140705          <addressOffset>0xA94</addressOffset>
140706          <size>32</size>
140707          <access>read-write</access>
140708          <resetValue>0</resetValue>
140709          <resetMask>0xFFFFFFFF</resetMask>
140710        </register>
140711        <register>
140712          <name>LTC0_PKB2_6</name>
140713          <description>LTC PKHA B2 6 Register</description>
140714          <alternateGroup>LTC0</alternateGroup>
140715          <addressOffset>0xA98</addressOffset>
140716          <size>32</size>
140717          <access>read-write</access>
140718          <resetValue>0</resetValue>
140719          <resetMask>0xFFFFFFFF</resetMask>
140720          <fields>
140721            <field>
140722              <name>PKHA_B2</name>
140723              <description>B2 VALUE</description>
140724              <bitOffset>0</bitOffset>
140725              <bitWidth>32</bitWidth>
140726              <access>read-write</access>
140727            </field>
140728          </fields>
140729        </register>
140730        <register>
140731          <name>LTC0_PKB_38</name>
140732          <description>LTC PKHA B 38 Register</description>
140733          <alternateGroup>LTC0</alternateGroup>
140734          <addressOffset>0xA98</addressOffset>
140735          <size>32</size>
140736          <access>read-write</access>
140737          <resetValue>0</resetValue>
140738          <resetMask>0xFFFFFFFF</resetMask>
140739        </register>
140740        <register>
140741          <name>LTC0_PKB2_7</name>
140742          <description>LTC PKHA B2 7 Register</description>
140743          <alternateGroup>LTC0</alternateGroup>
140744          <addressOffset>0xA9C</addressOffset>
140745          <size>32</size>
140746          <access>read-write</access>
140747          <resetValue>0</resetValue>
140748          <resetMask>0xFFFFFFFF</resetMask>
140749          <fields>
140750            <field>
140751              <name>PKHA_B2</name>
140752              <description>B2 VALUE</description>
140753              <bitOffset>0</bitOffset>
140754              <bitWidth>32</bitWidth>
140755              <access>read-write</access>
140756            </field>
140757          </fields>
140758        </register>
140759        <register>
140760          <name>LTC0_PKB_39</name>
140761          <description>LTC PKHA B 39 Register</description>
140762          <alternateGroup>LTC0</alternateGroup>
140763          <addressOffset>0xA9C</addressOffset>
140764          <size>32</size>
140765          <access>read-write</access>
140766          <resetValue>0</resetValue>
140767          <resetMask>0xFFFFFFFF</resetMask>
140768        </register>
140769        <register>
140770          <name>LTC0_PKB2_8</name>
140771          <description>LTC PKHA B2 8 Register</description>
140772          <alternateGroup>LTC0</alternateGroup>
140773          <addressOffset>0xAA0</addressOffset>
140774          <size>32</size>
140775          <access>read-write</access>
140776          <resetValue>0</resetValue>
140777          <resetMask>0xFFFFFFFF</resetMask>
140778          <fields>
140779            <field>
140780              <name>PKHA_B2</name>
140781              <description>B2 VALUE</description>
140782              <bitOffset>0</bitOffset>
140783              <bitWidth>32</bitWidth>
140784              <access>read-write</access>
140785            </field>
140786          </fields>
140787        </register>
140788        <register>
140789          <name>LTC0_PKB_40</name>
140790          <description>LTC PKHA B 40 Register</description>
140791          <alternateGroup>LTC0</alternateGroup>
140792          <addressOffset>0xAA0</addressOffset>
140793          <size>32</size>
140794          <access>read-write</access>
140795          <resetValue>0</resetValue>
140796          <resetMask>0xFFFFFFFF</resetMask>
140797        </register>
140798        <register>
140799          <name>LTC0_PKB2_9</name>
140800          <description>LTC PKHA B2 9 Register</description>
140801          <alternateGroup>LTC0</alternateGroup>
140802          <addressOffset>0xAA4</addressOffset>
140803          <size>32</size>
140804          <access>read-write</access>
140805          <resetValue>0</resetValue>
140806          <resetMask>0xFFFFFFFF</resetMask>
140807          <fields>
140808            <field>
140809              <name>PKHA_B2</name>
140810              <description>B2 VALUE</description>
140811              <bitOffset>0</bitOffset>
140812              <bitWidth>32</bitWidth>
140813              <access>read-write</access>
140814            </field>
140815          </fields>
140816        </register>
140817        <register>
140818          <name>LTC0_PKB_41</name>
140819          <description>LTC PKHA B 41 Register</description>
140820          <alternateGroup>LTC0</alternateGroup>
140821          <addressOffset>0xAA4</addressOffset>
140822          <size>32</size>
140823          <access>read-write</access>
140824          <resetValue>0</resetValue>
140825          <resetMask>0xFFFFFFFF</resetMask>
140826        </register>
140827        <register>
140828          <name>LTC0_PKB2_10</name>
140829          <description>LTC PKHA B2 10 Register</description>
140830          <alternateGroup>LTC0</alternateGroup>
140831          <addressOffset>0xAA8</addressOffset>
140832          <size>32</size>
140833          <access>read-write</access>
140834          <resetValue>0</resetValue>
140835          <resetMask>0xFFFFFFFF</resetMask>
140836          <fields>
140837            <field>
140838              <name>PKHA_B2</name>
140839              <description>B2 VALUE</description>
140840              <bitOffset>0</bitOffset>
140841              <bitWidth>32</bitWidth>
140842              <access>read-write</access>
140843            </field>
140844          </fields>
140845        </register>
140846        <register>
140847          <name>LTC0_PKB_42</name>
140848          <description>LTC PKHA B 42 Register</description>
140849          <alternateGroup>LTC0</alternateGroup>
140850          <addressOffset>0xAA8</addressOffset>
140851          <size>32</size>
140852          <access>read-write</access>
140853          <resetValue>0</resetValue>
140854          <resetMask>0xFFFFFFFF</resetMask>
140855        </register>
140856        <register>
140857          <name>LTC0_PKB2_11</name>
140858          <description>LTC PKHA B2 11 Register</description>
140859          <alternateGroup>LTC0</alternateGroup>
140860          <addressOffset>0xAAC</addressOffset>
140861          <size>32</size>
140862          <access>read-write</access>
140863          <resetValue>0</resetValue>
140864          <resetMask>0xFFFFFFFF</resetMask>
140865          <fields>
140866            <field>
140867              <name>PKHA_B2</name>
140868              <description>B2 VALUE</description>
140869              <bitOffset>0</bitOffset>
140870              <bitWidth>32</bitWidth>
140871              <access>read-write</access>
140872            </field>
140873          </fields>
140874        </register>
140875        <register>
140876          <name>LTC0_PKB_43</name>
140877          <description>LTC PKHA B 43 Register</description>
140878          <alternateGroup>LTC0</alternateGroup>
140879          <addressOffset>0xAAC</addressOffset>
140880          <size>32</size>
140881          <access>read-write</access>
140882          <resetValue>0</resetValue>
140883          <resetMask>0xFFFFFFFF</resetMask>
140884        </register>
140885        <register>
140886          <name>LTC0_PKB2_12</name>
140887          <description>LTC PKHA B2 12 Register</description>
140888          <alternateGroup>LTC0</alternateGroup>
140889          <addressOffset>0xAB0</addressOffset>
140890          <size>32</size>
140891          <access>read-write</access>
140892          <resetValue>0</resetValue>
140893          <resetMask>0xFFFFFFFF</resetMask>
140894          <fields>
140895            <field>
140896              <name>PKHA_B2</name>
140897              <description>B2 VALUE</description>
140898              <bitOffset>0</bitOffset>
140899              <bitWidth>32</bitWidth>
140900              <access>read-write</access>
140901            </field>
140902          </fields>
140903        </register>
140904        <register>
140905          <name>LTC0_PKB_44</name>
140906          <description>LTC PKHA B 44 Register</description>
140907          <alternateGroup>LTC0</alternateGroup>
140908          <addressOffset>0xAB0</addressOffset>
140909          <size>32</size>
140910          <access>read-write</access>
140911          <resetValue>0</resetValue>
140912          <resetMask>0xFFFFFFFF</resetMask>
140913        </register>
140914        <register>
140915          <name>LTC0_PKB2_13</name>
140916          <description>LTC PKHA B2 13 Register</description>
140917          <alternateGroup>LTC0</alternateGroup>
140918          <addressOffset>0xAB4</addressOffset>
140919          <size>32</size>
140920          <access>read-write</access>
140921          <resetValue>0</resetValue>
140922          <resetMask>0xFFFFFFFF</resetMask>
140923          <fields>
140924            <field>
140925              <name>PKHA_B2</name>
140926              <description>B2 VALUE</description>
140927              <bitOffset>0</bitOffset>
140928              <bitWidth>32</bitWidth>
140929              <access>read-write</access>
140930            </field>
140931          </fields>
140932        </register>
140933        <register>
140934          <name>LTC0_PKB_45</name>
140935          <description>LTC PKHA B 45 Register</description>
140936          <alternateGroup>LTC0</alternateGroup>
140937          <addressOffset>0xAB4</addressOffset>
140938          <size>32</size>
140939          <access>read-write</access>
140940          <resetValue>0</resetValue>
140941          <resetMask>0xFFFFFFFF</resetMask>
140942        </register>
140943        <register>
140944          <name>LTC0_PKB2_14</name>
140945          <description>LTC PKHA B2 14 Register</description>
140946          <alternateGroup>LTC0</alternateGroup>
140947          <addressOffset>0xAB8</addressOffset>
140948          <size>32</size>
140949          <access>read-write</access>
140950          <resetValue>0</resetValue>
140951          <resetMask>0xFFFFFFFF</resetMask>
140952          <fields>
140953            <field>
140954              <name>PKHA_B2</name>
140955              <description>B2 VALUE</description>
140956              <bitOffset>0</bitOffset>
140957              <bitWidth>32</bitWidth>
140958              <access>read-write</access>
140959            </field>
140960          </fields>
140961        </register>
140962        <register>
140963          <name>LTC0_PKB_46</name>
140964          <description>LTC PKHA B 46 Register</description>
140965          <alternateGroup>LTC0</alternateGroup>
140966          <addressOffset>0xAB8</addressOffset>
140967          <size>32</size>
140968          <access>read-write</access>
140969          <resetValue>0</resetValue>
140970          <resetMask>0xFFFFFFFF</resetMask>
140971        </register>
140972        <register>
140973          <name>LTC0_PKB2_15</name>
140974          <description>LTC PKHA B2 15 Register</description>
140975          <alternateGroup>LTC0</alternateGroup>
140976          <addressOffset>0xABC</addressOffset>
140977          <size>32</size>
140978          <access>read-write</access>
140979          <resetValue>0</resetValue>
140980          <resetMask>0xFFFFFFFF</resetMask>
140981          <fields>
140982            <field>
140983              <name>PKHA_B2</name>
140984              <description>B2 VALUE</description>
140985              <bitOffset>0</bitOffset>
140986              <bitWidth>32</bitWidth>
140987              <access>read-write</access>
140988            </field>
140989          </fields>
140990        </register>
140991        <register>
140992          <name>LTC0_PKB_47</name>
140993          <description>LTC PKHA B 47 Register</description>
140994          <alternateGroup>LTC0</alternateGroup>
140995          <addressOffset>0xABC</addressOffset>
140996          <size>32</size>
140997          <access>read-write</access>
140998          <resetValue>0</resetValue>
140999          <resetMask>0xFFFFFFFF</resetMask>
141000        </register>
141001        <register>
141002          <name>LTC0_PKB3_0</name>
141003          <description>LTC PKHA B3 0 Register</description>
141004          <alternateGroup>LTC0</alternateGroup>
141005          <addressOffset>0xAC0</addressOffset>
141006          <size>32</size>
141007          <access>read-write</access>
141008          <resetValue>0</resetValue>
141009          <resetMask>0xFFFFFFFF</resetMask>
141010          <fields>
141011            <field>
141012              <name>PKHA_B3</name>
141013              <description>B3 VALUE</description>
141014              <bitOffset>0</bitOffset>
141015              <bitWidth>32</bitWidth>
141016              <access>read-write</access>
141017            </field>
141018          </fields>
141019        </register>
141020        <register>
141021          <name>LTC0_PKB_48</name>
141022          <description>LTC PKHA B 48 Register</description>
141023          <alternateGroup>LTC0</alternateGroup>
141024          <addressOffset>0xAC0</addressOffset>
141025          <size>32</size>
141026          <access>read-write</access>
141027          <resetValue>0</resetValue>
141028          <resetMask>0xFFFFFFFF</resetMask>
141029        </register>
141030        <register>
141031          <name>LTC0_PKB3_1</name>
141032          <description>LTC PKHA B3 1 Register</description>
141033          <alternateGroup>LTC0</alternateGroup>
141034          <addressOffset>0xAC4</addressOffset>
141035          <size>32</size>
141036          <access>read-write</access>
141037          <resetValue>0</resetValue>
141038          <resetMask>0xFFFFFFFF</resetMask>
141039          <fields>
141040            <field>
141041              <name>PKHA_B3</name>
141042              <description>B3 VALUE</description>
141043              <bitOffset>0</bitOffset>
141044              <bitWidth>32</bitWidth>
141045              <access>read-write</access>
141046            </field>
141047          </fields>
141048        </register>
141049        <register>
141050          <name>LTC0_PKB_49</name>
141051          <description>LTC PKHA B 49 Register</description>
141052          <alternateGroup>LTC0</alternateGroup>
141053          <addressOffset>0xAC4</addressOffset>
141054          <size>32</size>
141055          <access>read-write</access>
141056          <resetValue>0</resetValue>
141057          <resetMask>0xFFFFFFFF</resetMask>
141058        </register>
141059        <register>
141060          <name>LTC0_PKB3_2</name>
141061          <description>LTC PKHA B3 2 Register</description>
141062          <alternateGroup>LTC0</alternateGroup>
141063          <addressOffset>0xAC8</addressOffset>
141064          <size>32</size>
141065          <access>read-write</access>
141066          <resetValue>0</resetValue>
141067          <resetMask>0xFFFFFFFF</resetMask>
141068          <fields>
141069            <field>
141070              <name>PKHA_B3</name>
141071              <description>B3 VALUE</description>
141072              <bitOffset>0</bitOffset>
141073              <bitWidth>32</bitWidth>
141074              <access>read-write</access>
141075            </field>
141076          </fields>
141077        </register>
141078        <register>
141079          <name>LTC0_PKB_50</name>
141080          <description>LTC PKHA B 50 Register</description>
141081          <alternateGroup>LTC0</alternateGroup>
141082          <addressOffset>0xAC8</addressOffset>
141083          <size>32</size>
141084          <access>read-write</access>
141085          <resetValue>0</resetValue>
141086          <resetMask>0xFFFFFFFF</resetMask>
141087        </register>
141088        <register>
141089          <name>LTC0_PKB3_3</name>
141090          <description>LTC PKHA B3 3 Register</description>
141091          <alternateGroup>LTC0</alternateGroup>
141092          <addressOffset>0xACC</addressOffset>
141093          <size>32</size>
141094          <access>read-write</access>
141095          <resetValue>0</resetValue>
141096          <resetMask>0xFFFFFFFF</resetMask>
141097          <fields>
141098            <field>
141099              <name>PKHA_B3</name>
141100              <description>B3 VALUE</description>
141101              <bitOffset>0</bitOffset>
141102              <bitWidth>32</bitWidth>
141103              <access>read-write</access>
141104            </field>
141105          </fields>
141106        </register>
141107        <register>
141108          <name>LTC0_PKB_51</name>
141109          <description>LTC PKHA B 51 Register</description>
141110          <alternateGroup>LTC0</alternateGroup>
141111          <addressOffset>0xACC</addressOffset>
141112          <size>32</size>
141113          <access>read-write</access>
141114          <resetValue>0</resetValue>
141115          <resetMask>0xFFFFFFFF</resetMask>
141116        </register>
141117        <register>
141118          <name>LTC0_PKB3_4</name>
141119          <description>LTC PKHA B3 4 Register</description>
141120          <alternateGroup>LTC0</alternateGroup>
141121          <addressOffset>0xAD0</addressOffset>
141122          <size>32</size>
141123          <access>read-write</access>
141124          <resetValue>0</resetValue>
141125          <resetMask>0xFFFFFFFF</resetMask>
141126          <fields>
141127            <field>
141128              <name>PKHA_B3</name>
141129              <description>B3 VALUE</description>
141130              <bitOffset>0</bitOffset>
141131              <bitWidth>32</bitWidth>
141132              <access>read-write</access>
141133            </field>
141134          </fields>
141135        </register>
141136        <register>
141137          <name>LTC0_PKB_52</name>
141138          <description>LTC PKHA B 52 Register</description>
141139          <alternateGroup>LTC0</alternateGroup>
141140          <addressOffset>0xAD0</addressOffset>
141141          <size>32</size>
141142          <access>read-write</access>
141143          <resetValue>0</resetValue>
141144          <resetMask>0xFFFFFFFF</resetMask>
141145        </register>
141146        <register>
141147          <name>LTC0_PKB3_5</name>
141148          <description>LTC PKHA B3 5 Register</description>
141149          <alternateGroup>LTC0</alternateGroup>
141150          <addressOffset>0xAD4</addressOffset>
141151          <size>32</size>
141152          <access>read-write</access>
141153          <resetValue>0</resetValue>
141154          <resetMask>0xFFFFFFFF</resetMask>
141155          <fields>
141156            <field>
141157              <name>PKHA_B3</name>
141158              <description>B3 VALUE</description>
141159              <bitOffset>0</bitOffset>
141160              <bitWidth>32</bitWidth>
141161              <access>read-write</access>
141162            </field>
141163          </fields>
141164        </register>
141165        <register>
141166          <name>LTC0_PKB_53</name>
141167          <description>LTC PKHA B 53 Register</description>
141168          <alternateGroup>LTC0</alternateGroup>
141169          <addressOffset>0xAD4</addressOffset>
141170          <size>32</size>
141171          <access>read-write</access>
141172          <resetValue>0</resetValue>
141173          <resetMask>0xFFFFFFFF</resetMask>
141174        </register>
141175        <register>
141176          <name>LTC0_PKB3_6</name>
141177          <description>LTC PKHA B3 6 Register</description>
141178          <alternateGroup>LTC0</alternateGroup>
141179          <addressOffset>0xAD8</addressOffset>
141180          <size>32</size>
141181          <access>read-write</access>
141182          <resetValue>0</resetValue>
141183          <resetMask>0xFFFFFFFF</resetMask>
141184          <fields>
141185            <field>
141186              <name>PKHA_B3</name>
141187              <description>B3 VALUE</description>
141188              <bitOffset>0</bitOffset>
141189              <bitWidth>32</bitWidth>
141190              <access>read-write</access>
141191            </field>
141192          </fields>
141193        </register>
141194        <register>
141195          <name>LTC0_PKB_54</name>
141196          <description>LTC PKHA B 54 Register</description>
141197          <alternateGroup>LTC0</alternateGroup>
141198          <addressOffset>0xAD8</addressOffset>
141199          <size>32</size>
141200          <access>read-write</access>
141201          <resetValue>0</resetValue>
141202          <resetMask>0xFFFFFFFF</resetMask>
141203        </register>
141204        <register>
141205          <name>LTC0_PKB3_7</name>
141206          <description>LTC PKHA B3 7 Register</description>
141207          <alternateGroup>LTC0</alternateGroup>
141208          <addressOffset>0xADC</addressOffset>
141209          <size>32</size>
141210          <access>read-write</access>
141211          <resetValue>0</resetValue>
141212          <resetMask>0xFFFFFFFF</resetMask>
141213          <fields>
141214            <field>
141215              <name>PKHA_B3</name>
141216              <description>B3 VALUE</description>
141217              <bitOffset>0</bitOffset>
141218              <bitWidth>32</bitWidth>
141219              <access>read-write</access>
141220            </field>
141221          </fields>
141222        </register>
141223        <register>
141224          <name>LTC0_PKB_55</name>
141225          <description>LTC PKHA B 55 Register</description>
141226          <alternateGroup>LTC0</alternateGroup>
141227          <addressOffset>0xADC</addressOffset>
141228          <size>32</size>
141229          <access>read-write</access>
141230          <resetValue>0</resetValue>
141231          <resetMask>0xFFFFFFFF</resetMask>
141232        </register>
141233        <register>
141234          <name>LTC0_PKB3_8</name>
141235          <description>LTC PKHA B3 8 Register</description>
141236          <alternateGroup>LTC0</alternateGroup>
141237          <addressOffset>0xAE0</addressOffset>
141238          <size>32</size>
141239          <access>read-write</access>
141240          <resetValue>0</resetValue>
141241          <resetMask>0xFFFFFFFF</resetMask>
141242          <fields>
141243            <field>
141244              <name>PKHA_B3</name>
141245              <description>B3 VALUE</description>
141246              <bitOffset>0</bitOffset>
141247              <bitWidth>32</bitWidth>
141248              <access>read-write</access>
141249            </field>
141250          </fields>
141251        </register>
141252        <register>
141253          <name>LTC0_PKB_56</name>
141254          <description>LTC PKHA B 56 Register</description>
141255          <alternateGroup>LTC0</alternateGroup>
141256          <addressOffset>0xAE0</addressOffset>
141257          <size>32</size>
141258          <access>read-write</access>
141259          <resetValue>0</resetValue>
141260          <resetMask>0xFFFFFFFF</resetMask>
141261        </register>
141262        <register>
141263          <name>LTC0_PKB3_9</name>
141264          <description>LTC PKHA B3 9 Register</description>
141265          <alternateGroup>LTC0</alternateGroup>
141266          <addressOffset>0xAE4</addressOffset>
141267          <size>32</size>
141268          <access>read-write</access>
141269          <resetValue>0</resetValue>
141270          <resetMask>0xFFFFFFFF</resetMask>
141271          <fields>
141272            <field>
141273              <name>PKHA_B3</name>
141274              <description>B3 VALUE</description>
141275              <bitOffset>0</bitOffset>
141276              <bitWidth>32</bitWidth>
141277              <access>read-write</access>
141278            </field>
141279          </fields>
141280        </register>
141281        <register>
141282          <name>LTC0_PKB_57</name>
141283          <description>LTC PKHA B 57 Register</description>
141284          <alternateGroup>LTC0</alternateGroup>
141285          <addressOffset>0xAE4</addressOffset>
141286          <size>32</size>
141287          <access>read-write</access>
141288          <resetValue>0</resetValue>
141289          <resetMask>0xFFFFFFFF</resetMask>
141290        </register>
141291        <register>
141292          <name>LTC0_PKB3_10</name>
141293          <description>LTC PKHA B3 10 Register</description>
141294          <alternateGroup>LTC0</alternateGroup>
141295          <addressOffset>0xAE8</addressOffset>
141296          <size>32</size>
141297          <access>read-write</access>
141298          <resetValue>0</resetValue>
141299          <resetMask>0xFFFFFFFF</resetMask>
141300          <fields>
141301            <field>
141302              <name>PKHA_B3</name>
141303              <description>B3 VALUE</description>
141304              <bitOffset>0</bitOffset>
141305              <bitWidth>32</bitWidth>
141306              <access>read-write</access>
141307            </field>
141308          </fields>
141309        </register>
141310        <register>
141311          <name>LTC0_PKB_58</name>
141312          <description>LTC PKHA B 58 Register</description>
141313          <alternateGroup>LTC0</alternateGroup>
141314          <addressOffset>0xAE8</addressOffset>
141315          <size>32</size>
141316          <access>read-write</access>
141317          <resetValue>0</resetValue>
141318          <resetMask>0xFFFFFFFF</resetMask>
141319        </register>
141320        <register>
141321          <name>LTC0_PKB3_11</name>
141322          <description>LTC PKHA B3 11 Register</description>
141323          <alternateGroup>LTC0</alternateGroup>
141324          <addressOffset>0xAEC</addressOffset>
141325          <size>32</size>
141326          <access>read-write</access>
141327          <resetValue>0</resetValue>
141328          <resetMask>0xFFFFFFFF</resetMask>
141329          <fields>
141330            <field>
141331              <name>PKHA_B3</name>
141332              <description>B3 VALUE</description>
141333              <bitOffset>0</bitOffset>
141334              <bitWidth>32</bitWidth>
141335              <access>read-write</access>
141336            </field>
141337          </fields>
141338        </register>
141339        <register>
141340          <name>LTC0_PKB_59</name>
141341          <description>LTC PKHA B 59 Register</description>
141342          <alternateGroup>LTC0</alternateGroup>
141343          <addressOffset>0xAEC</addressOffset>
141344          <size>32</size>
141345          <access>read-write</access>
141346          <resetValue>0</resetValue>
141347          <resetMask>0xFFFFFFFF</resetMask>
141348        </register>
141349        <register>
141350          <name>LTC0_PKB3_12</name>
141351          <description>LTC PKHA B3 12 Register</description>
141352          <alternateGroup>LTC0</alternateGroup>
141353          <addressOffset>0xAF0</addressOffset>
141354          <size>32</size>
141355          <access>read-write</access>
141356          <resetValue>0</resetValue>
141357          <resetMask>0xFFFFFFFF</resetMask>
141358          <fields>
141359            <field>
141360              <name>PKHA_B3</name>
141361              <description>B3 VALUE</description>
141362              <bitOffset>0</bitOffset>
141363              <bitWidth>32</bitWidth>
141364              <access>read-write</access>
141365            </field>
141366          </fields>
141367        </register>
141368        <register>
141369          <name>LTC0_PKB_60</name>
141370          <description>LTC PKHA B 60 Register</description>
141371          <alternateGroup>LTC0</alternateGroup>
141372          <addressOffset>0xAF0</addressOffset>
141373          <size>32</size>
141374          <access>read-write</access>
141375          <resetValue>0</resetValue>
141376          <resetMask>0xFFFFFFFF</resetMask>
141377        </register>
141378        <register>
141379          <name>LTC0_PKB3_13</name>
141380          <description>LTC PKHA B3 13 Register</description>
141381          <alternateGroup>LTC0</alternateGroup>
141382          <addressOffset>0xAF4</addressOffset>
141383          <size>32</size>
141384          <access>read-write</access>
141385          <resetValue>0</resetValue>
141386          <resetMask>0xFFFFFFFF</resetMask>
141387          <fields>
141388            <field>
141389              <name>PKHA_B3</name>
141390              <description>B3 VALUE</description>
141391              <bitOffset>0</bitOffset>
141392              <bitWidth>32</bitWidth>
141393              <access>read-write</access>
141394            </field>
141395          </fields>
141396        </register>
141397        <register>
141398          <name>LTC0_PKB_61</name>
141399          <description>LTC PKHA B 61 Register</description>
141400          <alternateGroup>LTC0</alternateGroup>
141401          <addressOffset>0xAF4</addressOffset>
141402          <size>32</size>
141403          <access>read-write</access>
141404          <resetValue>0</resetValue>
141405          <resetMask>0xFFFFFFFF</resetMask>
141406        </register>
141407        <register>
141408          <name>LTC0_PKB3_14</name>
141409          <description>LTC PKHA B3 14 Register</description>
141410          <alternateGroup>LTC0</alternateGroup>
141411          <addressOffset>0xAF8</addressOffset>
141412          <size>32</size>
141413          <access>read-write</access>
141414          <resetValue>0</resetValue>
141415          <resetMask>0xFFFFFFFF</resetMask>
141416          <fields>
141417            <field>
141418              <name>PKHA_B3</name>
141419              <description>B3 VALUE</description>
141420              <bitOffset>0</bitOffset>
141421              <bitWidth>32</bitWidth>
141422              <access>read-write</access>
141423            </field>
141424          </fields>
141425        </register>
141426        <register>
141427          <name>LTC0_PKB_62</name>
141428          <description>LTC PKHA B 62 Register</description>
141429          <alternateGroup>LTC0</alternateGroup>
141430          <addressOffset>0xAF8</addressOffset>
141431          <size>32</size>
141432          <access>read-write</access>
141433          <resetValue>0</resetValue>
141434          <resetMask>0xFFFFFFFF</resetMask>
141435        </register>
141436        <register>
141437          <name>LTC0_PKB3_15</name>
141438          <description>LTC PKHA B3 15 Register</description>
141439          <alternateGroup>LTC0</alternateGroup>
141440          <addressOffset>0xAFC</addressOffset>
141441          <size>32</size>
141442          <access>read-write</access>
141443          <resetValue>0</resetValue>
141444          <resetMask>0xFFFFFFFF</resetMask>
141445          <fields>
141446            <field>
141447              <name>PKHA_B3</name>
141448              <description>B3 VALUE</description>
141449              <bitOffset>0</bitOffset>
141450              <bitWidth>32</bitWidth>
141451              <access>read-write</access>
141452            </field>
141453          </fields>
141454        </register>
141455        <register>
141456          <name>LTC0_PKB_63</name>
141457          <description>LTC PKHA B 63 Register</description>
141458          <alternateGroup>LTC0</alternateGroup>
141459          <addressOffset>0xAFC</addressOffset>
141460          <size>32</size>
141461          <access>read-write</access>
141462          <resetValue>0</resetValue>
141463          <resetMask>0xFFFFFFFF</resetMask>
141464        </register>
141465        <register>
141466          <name>LTC0_PKN0_0</name>
141467          <description>LTC PKHA N0 0 Register</description>
141468          <alternateGroup>LTC0</alternateGroup>
141469          <addressOffset>0xC00</addressOffset>
141470          <size>32</size>
141471          <access>read-write</access>
141472          <resetValue>0</resetValue>
141473          <resetMask>0xFFFFFFFF</resetMask>
141474          <fields>
141475            <field>
141476              <name>PKHA_N0</name>
141477              <description>N0 VALUE</description>
141478              <bitOffset>0</bitOffset>
141479              <bitWidth>32</bitWidth>
141480              <access>read-write</access>
141481            </field>
141482          </fields>
141483        </register>
141484        <register>
141485          <name>LTC0_PKN_0</name>
141486          <description>LTC PKHA N 0 Register</description>
141487          <alternateGroup>LTC0</alternateGroup>
141488          <addressOffset>0xC00</addressOffset>
141489          <size>32</size>
141490          <access>read-write</access>
141491          <resetValue>0</resetValue>
141492          <resetMask>0xFFFFFFFF</resetMask>
141493        </register>
141494        <register>
141495          <name>LTC0_PKN0_1</name>
141496          <description>LTC PKHA N0 1 Register</description>
141497          <alternateGroup>LTC0</alternateGroup>
141498          <addressOffset>0xC04</addressOffset>
141499          <size>32</size>
141500          <access>read-write</access>
141501          <resetValue>0</resetValue>
141502          <resetMask>0xFFFFFFFF</resetMask>
141503          <fields>
141504            <field>
141505              <name>PKHA_N0</name>
141506              <description>N0 VALUE</description>
141507              <bitOffset>0</bitOffset>
141508              <bitWidth>32</bitWidth>
141509              <access>read-write</access>
141510            </field>
141511          </fields>
141512        </register>
141513        <register>
141514          <name>LTC0_PKN_1</name>
141515          <description>LTC PKHA N 1 Register</description>
141516          <alternateGroup>LTC0</alternateGroup>
141517          <addressOffset>0xC04</addressOffset>
141518          <size>32</size>
141519          <access>read-write</access>
141520          <resetValue>0</resetValue>
141521          <resetMask>0xFFFFFFFF</resetMask>
141522        </register>
141523        <register>
141524          <name>LTC0_PKN0_2</name>
141525          <description>LTC PKHA N0 2 Register</description>
141526          <alternateGroup>LTC0</alternateGroup>
141527          <addressOffset>0xC08</addressOffset>
141528          <size>32</size>
141529          <access>read-write</access>
141530          <resetValue>0</resetValue>
141531          <resetMask>0xFFFFFFFF</resetMask>
141532          <fields>
141533            <field>
141534              <name>PKHA_N0</name>
141535              <description>N0 VALUE</description>
141536              <bitOffset>0</bitOffset>
141537              <bitWidth>32</bitWidth>
141538              <access>read-write</access>
141539            </field>
141540          </fields>
141541        </register>
141542        <register>
141543          <name>LTC0_PKN_2</name>
141544          <description>LTC PKHA N 2 Register</description>
141545          <alternateGroup>LTC0</alternateGroup>
141546          <addressOffset>0xC08</addressOffset>
141547          <size>32</size>
141548          <access>read-write</access>
141549          <resetValue>0</resetValue>
141550          <resetMask>0xFFFFFFFF</resetMask>
141551        </register>
141552        <register>
141553          <name>LTC0_PKN0_3</name>
141554          <description>LTC PKHA N0 3 Register</description>
141555          <alternateGroup>LTC0</alternateGroup>
141556          <addressOffset>0xC0C</addressOffset>
141557          <size>32</size>
141558          <access>read-write</access>
141559          <resetValue>0</resetValue>
141560          <resetMask>0xFFFFFFFF</resetMask>
141561          <fields>
141562            <field>
141563              <name>PKHA_N0</name>
141564              <description>N0 VALUE</description>
141565              <bitOffset>0</bitOffset>
141566              <bitWidth>32</bitWidth>
141567              <access>read-write</access>
141568            </field>
141569          </fields>
141570        </register>
141571        <register>
141572          <name>LTC0_PKN_3</name>
141573          <description>LTC PKHA N 3 Register</description>
141574          <alternateGroup>LTC0</alternateGroup>
141575          <addressOffset>0xC0C</addressOffset>
141576          <size>32</size>
141577          <access>read-write</access>
141578          <resetValue>0</resetValue>
141579          <resetMask>0xFFFFFFFF</resetMask>
141580        </register>
141581        <register>
141582          <name>LTC0_PKN0_4</name>
141583          <description>LTC PKHA N0 4 Register</description>
141584          <alternateGroup>LTC0</alternateGroup>
141585          <addressOffset>0xC10</addressOffset>
141586          <size>32</size>
141587          <access>read-write</access>
141588          <resetValue>0</resetValue>
141589          <resetMask>0xFFFFFFFF</resetMask>
141590          <fields>
141591            <field>
141592              <name>PKHA_N0</name>
141593              <description>N0 VALUE</description>
141594              <bitOffset>0</bitOffset>
141595              <bitWidth>32</bitWidth>
141596              <access>read-write</access>
141597            </field>
141598          </fields>
141599        </register>
141600        <register>
141601          <name>LTC0_PKN_4</name>
141602          <description>LTC PKHA N 4 Register</description>
141603          <alternateGroup>LTC0</alternateGroup>
141604          <addressOffset>0xC10</addressOffset>
141605          <size>32</size>
141606          <access>read-write</access>
141607          <resetValue>0</resetValue>
141608          <resetMask>0xFFFFFFFF</resetMask>
141609        </register>
141610        <register>
141611          <name>LTC0_PKN0_5</name>
141612          <description>LTC PKHA N0 5 Register</description>
141613          <alternateGroup>LTC0</alternateGroup>
141614          <addressOffset>0xC14</addressOffset>
141615          <size>32</size>
141616          <access>read-write</access>
141617          <resetValue>0</resetValue>
141618          <resetMask>0xFFFFFFFF</resetMask>
141619          <fields>
141620            <field>
141621              <name>PKHA_N0</name>
141622              <description>N0 VALUE</description>
141623              <bitOffset>0</bitOffset>
141624              <bitWidth>32</bitWidth>
141625              <access>read-write</access>
141626            </field>
141627          </fields>
141628        </register>
141629        <register>
141630          <name>LTC0_PKN_5</name>
141631          <description>LTC PKHA N 5 Register</description>
141632          <alternateGroup>LTC0</alternateGroup>
141633          <addressOffset>0xC14</addressOffset>
141634          <size>32</size>
141635          <access>read-write</access>
141636          <resetValue>0</resetValue>
141637          <resetMask>0xFFFFFFFF</resetMask>
141638        </register>
141639        <register>
141640          <name>LTC0_PKN0_6</name>
141641          <description>LTC PKHA N0 6 Register</description>
141642          <alternateGroup>LTC0</alternateGroup>
141643          <addressOffset>0xC18</addressOffset>
141644          <size>32</size>
141645          <access>read-write</access>
141646          <resetValue>0</resetValue>
141647          <resetMask>0xFFFFFFFF</resetMask>
141648          <fields>
141649            <field>
141650              <name>PKHA_N0</name>
141651              <description>N0 VALUE</description>
141652              <bitOffset>0</bitOffset>
141653              <bitWidth>32</bitWidth>
141654              <access>read-write</access>
141655            </field>
141656          </fields>
141657        </register>
141658        <register>
141659          <name>LTC0_PKN_6</name>
141660          <description>LTC PKHA N 6 Register</description>
141661          <alternateGroup>LTC0</alternateGroup>
141662          <addressOffset>0xC18</addressOffset>
141663          <size>32</size>
141664          <access>read-write</access>
141665          <resetValue>0</resetValue>
141666          <resetMask>0xFFFFFFFF</resetMask>
141667        </register>
141668        <register>
141669          <name>LTC0_PKN0_7</name>
141670          <description>LTC PKHA N0 7 Register</description>
141671          <alternateGroup>LTC0</alternateGroup>
141672          <addressOffset>0xC1C</addressOffset>
141673          <size>32</size>
141674          <access>read-write</access>
141675          <resetValue>0</resetValue>
141676          <resetMask>0xFFFFFFFF</resetMask>
141677          <fields>
141678            <field>
141679              <name>PKHA_N0</name>
141680              <description>N0 VALUE</description>
141681              <bitOffset>0</bitOffset>
141682              <bitWidth>32</bitWidth>
141683              <access>read-write</access>
141684            </field>
141685          </fields>
141686        </register>
141687        <register>
141688          <name>LTC0_PKN_7</name>
141689          <description>LTC PKHA N 7 Register</description>
141690          <alternateGroup>LTC0</alternateGroup>
141691          <addressOffset>0xC1C</addressOffset>
141692          <size>32</size>
141693          <access>read-write</access>
141694          <resetValue>0</resetValue>
141695          <resetMask>0xFFFFFFFF</resetMask>
141696        </register>
141697        <register>
141698          <name>LTC0_PKN0_8</name>
141699          <description>LTC PKHA N0 8 Register</description>
141700          <alternateGroup>LTC0</alternateGroup>
141701          <addressOffset>0xC20</addressOffset>
141702          <size>32</size>
141703          <access>read-write</access>
141704          <resetValue>0</resetValue>
141705          <resetMask>0xFFFFFFFF</resetMask>
141706          <fields>
141707            <field>
141708              <name>PKHA_N0</name>
141709              <description>N0 VALUE</description>
141710              <bitOffset>0</bitOffset>
141711              <bitWidth>32</bitWidth>
141712              <access>read-write</access>
141713            </field>
141714          </fields>
141715        </register>
141716        <register>
141717          <name>LTC0_PKN_8</name>
141718          <description>LTC PKHA N 8 Register</description>
141719          <alternateGroup>LTC0</alternateGroup>
141720          <addressOffset>0xC20</addressOffset>
141721          <size>32</size>
141722          <access>read-write</access>
141723          <resetValue>0</resetValue>
141724          <resetMask>0xFFFFFFFF</resetMask>
141725        </register>
141726        <register>
141727          <name>LTC0_PKN0_9</name>
141728          <description>LTC PKHA N0 9 Register</description>
141729          <alternateGroup>LTC0</alternateGroup>
141730          <addressOffset>0xC24</addressOffset>
141731          <size>32</size>
141732          <access>read-write</access>
141733          <resetValue>0</resetValue>
141734          <resetMask>0xFFFFFFFF</resetMask>
141735          <fields>
141736            <field>
141737              <name>PKHA_N0</name>
141738              <description>N0 VALUE</description>
141739              <bitOffset>0</bitOffset>
141740              <bitWidth>32</bitWidth>
141741              <access>read-write</access>
141742            </field>
141743          </fields>
141744        </register>
141745        <register>
141746          <name>LTC0_PKN_9</name>
141747          <description>LTC PKHA N 9 Register</description>
141748          <alternateGroup>LTC0</alternateGroup>
141749          <addressOffset>0xC24</addressOffset>
141750          <size>32</size>
141751          <access>read-write</access>
141752          <resetValue>0</resetValue>
141753          <resetMask>0xFFFFFFFF</resetMask>
141754        </register>
141755        <register>
141756          <name>LTC0_PKN0_10</name>
141757          <description>LTC PKHA N0 10 Register</description>
141758          <alternateGroup>LTC0</alternateGroup>
141759          <addressOffset>0xC28</addressOffset>
141760          <size>32</size>
141761          <access>read-write</access>
141762          <resetValue>0</resetValue>
141763          <resetMask>0xFFFFFFFF</resetMask>
141764          <fields>
141765            <field>
141766              <name>PKHA_N0</name>
141767              <description>N0 VALUE</description>
141768              <bitOffset>0</bitOffset>
141769              <bitWidth>32</bitWidth>
141770              <access>read-write</access>
141771            </field>
141772          </fields>
141773        </register>
141774        <register>
141775          <name>LTC0_PKN_10</name>
141776          <description>LTC PKHA N 10 Register</description>
141777          <alternateGroup>LTC0</alternateGroup>
141778          <addressOffset>0xC28</addressOffset>
141779          <size>32</size>
141780          <access>read-write</access>
141781          <resetValue>0</resetValue>
141782          <resetMask>0xFFFFFFFF</resetMask>
141783        </register>
141784        <register>
141785          <name>LTC0_PKN0_11</name>
141786          <description>LTC PKHA N0 11 Register</description>
141787          <alternateGroup>LTC0</alternateGroup>
141788          <addressOffset>0xC2C</addressOffset>
141789          <size>32</size>
141790          <access>read-write</access>
141791          <resetValue>0</resetValue>
141792          <resetMask>0xFFFFFFFF</resetMask>
141793          <fields>
141794            <field>
141795              <name>PKHA_N0</name>
141796              <description>N0 VALUE</description>
141797              <bitOffset>0</bitOffset>
141798              <bitWidth>32</bitWidth>
141799              <access>read-write</access>
141800            </field>
141801          </fields>
141802        </register>
141803        <register>
141804          <name>LTC0_PKN_11</name>
141805          <description>LTC PKHA N 11 Register</description>
141806          <alternateGroup>LTC0</alternateGroup>
141807          <addressOffset>0xC2C</addressOffset>
141808          <size>32</size>
141809          <access>read-write</access>
141810          <resetValue>0</resetValue>
141811          <resetMask>0xFFFFFFFF</resetMask>
141812        </register>
141813        <register>
141814          <name>LTC0_PKN0_12</name>
141815          <description>LTC PKHA N0 12 Register</description>
141816          <alternateGroup>LTC0</alternateGroup>
141817          <addressOffset>0xC30</addressOffset>
141818          <size>32</size>
141819          <access>read-write</access>
141820          <resetValue>0</resetValue>
141821          <resetMask>0xFFFFFFFF</resetMask>
141822          <fields>
141823            <field>
141824              <name>PKHA_N0</name>
141825              <description>N0 VALUE</description>
141826              <bitOffset>0</bitOffset>
141827              <bitWidth>32</bitWidth>
141828              <access>read-write</access>
141829            </field>
141830          </fields>
141831        </register>
141832        <register>
141833          <name>LTC0_PKN_12</name>
141834          <description>LTC PKHA N 12 Register</description>
141835          <alternateGroup>LTC0</alternateGroup>
141836          <addressOffset>0xC30</addressOffset>
141837          <size>32</size>
141838          <access>read-write</access>
141839          <resetValue>0</resetValue>
141840          <resetMask>0xFFFFFFFF</resetMask>
141841        </register>
141842        <register>
141843          <name>LTC0_PKN0_13</name>
141844          <description>LTC PKHA N0 13 Register</description>
141845          <alternateGroup>LTC0</alternateGroup>
141846          <addressOffset>0xC34</addressOffset>
141847          <size>32</size>
141848          <access>read-write</access>
141849          <resetValue>0</resetValue>
141850          <resetMask>0xFFFFFFFF</resetMask>
141851          <fields>
141852            <field>
141853              <name>PKHA_N0</name>
141854              <description>N0 VALUE</description>
141855              <bitOffset>0</bitOffset>
141856              <bitWidth>32</bitWidth>
141857              <access>read-write</access>
141858            </field>
141859          </fields>
141860        </register>
141861        <register>
141862          <name>LTC0_PKN_13</name>
141863          <description>LTC PKHA N 13 Register</description>
141864          <alternateGroup>LTC0</alternateGroup>
141865          <addressOffset>0xC34</addressOffset>
141866          <size>32</size>
141867          <access>read-write</access>
141868          <resetValue>0</resetValue>
141869          <resetMask>0xFFFFFFFF</resetMask>
141870        </register>
141871        <register>
141872          <name>LTC0_PKN0_14</name>
141873          <description>LTC PKHA N0 14 Register</description>
141874          <alternateGroup>LTC0</alternateGroup>
141875          <addressOffset>0xC38</addressOffset>
141876          <size>32</size>
141877          <access>read-write</access>
141878          <resetValue>0</resetValue>
141879          <resetMask>0xFFFFFFFF</resetMask>
141880          <fields>
141881            <field>
141882              <name>PKHA_N0</name>
141883              <description>N0 VALUE</description>
141884              <bitOffset>0</bitOffset>
141885              <bitWidth>32</bitWidth>
141886              <access>read-write</access>
141887            </field>
141888          </fields>
141889        </register>
141890        <register>
141891          <name>LTC0_PKN_14</name>
141892          <description>LTC PKHA N 14 Register</description>
141893          <alternateGroup>LTC0</alternateGroup>
141894          <addressOffset>0xC38</addressOffset>
141895          <size>32</size>
141896          <access>read-write</access>
141897          <resetValue>0</resetValue>
141898          <resetMask>0xFFFFFFFF</resetMask>
141899        </register>
141900        <register>
141901          <name>LTC0_PKN0_15</name>
141902          <description>LTC PKHA N0 15 Register</description>
141903          <alternateGroup>LTC0</alternateGroup>
141904          <addressOffset>0xC3C</addressOffset>
141905          <size>32</size>
141906          <access>read-write</access>
141907          <resetValue>0</resetValue>
141908          <resetMask>0xFFFFFFFF</resetMask>
141909          <fields>
141910            <field>
141911              <name>PKHA_N0</name>
141912              <description>N0 VALUE</description>
141913              <bitOffset>0</bitOffset>
141914              <bitWidth>32</bitWidth>
141915              <access>read-write</access>
141916            </field>
141917          </fields>
141918        </register>
141919        <register>
141920          <name>LTC0_PKN_15</name>
141921          <description>LTC PKHA N 15 Register</description>
141922          <alternateGroup>LTC0</alternateGroup>
141923          <addressOffset>0xC3C</addressOffset>
141924          <size>32</size>
141925          <access>read-write</access>
141926          <resetValue>0</resetValue>
141927          <resetMask>0xFFFFFFFF</resetMask>
141928        </register>
141929        <register>
141930          <name>LTC0_PKN1_0</name>
141931          <description>LTC PKHA N1 0 Register</description>
141932          <alternateGroup>LTC0</alternateGroup>
141933          <addressOffset>0xC40</addressOffset>
141934          <size>32</size>
141935          <access>read-write</access>
141936          <resetValue>0</resetValue>
141937          <resetMask>0xFFFFFFFF</resetMask>
141938          <fields>
141939            <field>
141940              <name>PKHA_N1</name>
141941              <description>N1 VALUE</description>
141942              <bitOffset>0</bitOffset>
141943              <bitWidth>32</bitWidth>
141944              <access>read-write</access>
141945            </field>
141946          </fields>
141947        </register>
141948        <register>
141949          <name>LTC0_PKN_16</name>
141950          <description>LTC PKHA N 16 Register</description>
141951          <alternateGroup>LTC0</alternateGroup>
141952          <addressOffset>0xC40</addressOffset>
141953          <size>32</size>
141954          <access>read-write</access>
141955          <resetValue>0</resetValue>
141956          <resetMask>0xFFFFFFFF</resetMask>
141957        </register>
141958        <register>
141959          <name>LTC0_PKN1_1</name>
141960          <description>LTC PKHA N1 1 Register</description>
141961          <alternateGroup>LTC0</alternateGroup>
141962          <addressOffset>0xC44</addressOffset>
141963          <size>32</size>
141964          <access>read-write</access>
141965          <resetValue>0</resetValue>
141966          <resetMask>0xFFFFFFFF</resetMask>
141967          <fields>
141968            <field>
141969              <name>PKHA_N1</name>
141970              <description>N1 VALUE</description>
141971              <bitOffset>0</bitOffset>
141972              <bitWidth>32</bitWidth>
141973              <access>read-write</access>
141974            </field>
141975          </fields>
141976        </register>
141977        <register>
141978          <name>LTC0_PKN_17</name>
141979          <description>LTC PKHA N 17 Register</description>
141980          <alternateGroup>LTC0</alternateGroup>
141981          <addressOffset>0xC44</addressOffset>
141982          <size>32</size>
141983          <access>read-write</access>
141984          <resetValue>0</resetValue>
141985          <resetMask>0xFFFFFFFF</resetMask>
141986        </register>
141987        <register>
141988          <name>LTC0_PKN1_2</name>
141989          <description>LTC PKHA N1 2 Register</description>
141990          <alternateGroup>LTC0</alternateGroup>
141991          <addressOffset>0xC48</addressOffset>
141992          <size>32</size>
141993          <access>read-write</access>
141994          <resetValue>0</resetValue>
141995          <resetMask>0xFFFFFFFF</resetMask>
141996          <fields>
141997            <field>
141998              <name>PKHA_N1</name>
141999              <description>N1 VALUE</description>
142000              <bitOffset>0</bitOffset>
142001              <bitWidth>32</bitWidth>
142002              <access>read-write</access>
142003            </field>
142004          </fields>
142005        </register>
142006        <register>
142007          <name>LTC0_PKN_18</name>
142008          <description>LTC PKHA N 18 Register</description>
142009          <alternateGroup>LTC0</alternateGroup>
142010          <addressOffset>0xC48</addressOffset>
142011          <size>32</size>
142012          <access>read-write</access>
142013          <resetValue>0</resetValue>
142014          <resetMask>0xFFFFFFFF</resetMask>
142015        </register>
142016        <register>
142017          <name>LTC0_PKN1_3</name>
142018          <description>LTC PKHA N1 3 Register</description>
142019          <alternateGroup>LTC0</alternateGroup>
142020          <addressOffset>0xC4C</addressOffset>
142021          <size>32</size>
142022          <access>read-write</access>
142023          <resetValue>0</resetValue>
142024          <resetMask>0xFFFFFFFF</resetMask>
142025          <fields>
142026            <field>
142027              <name>PKHA_N1</name>
142028              <description>N1 VALUE</description>
142029              <bitOffset>0</bitOffset>
142030              <bitWidth>32</bitWidth>
142031              <access>read-write</access>
142032            </field>
142033          </fields>
142034        </register>
142035        <register>
142036          <name>LTC0_PKN_19</name>
142037          <description>LTC PKHA N 19 Register</description>
142038          <alternateGroup>LTC0</alternateGroup>
142039          <addressOffset>0xC4C</addressOffset>
142040          <size>32</size>
142041          <access>read-write</access>
142042          <resetValue>0</resetValue>
142043          <resetMask>0xFFFFFFFF</resetMask>
142044        </register>
142045        <register>
142046          <name>LTC0_PKN1_4</name>
142047          <description>LTC PKHA N1 4 Register</description>
142048          <alternateGroup>LTC0</alternateGroup>
142049          <addressOffset>0xC50</addressOffset>
142050          <size>32</size>
142051          <access>read-write</access>
142052          <resetValue>0</resetValue>
142053          <resetMask>0xFFFFFFFF</resetMask>
142054          <fields>
142055            <field>
142056              <name>PKHA_N1</name>
142057              <description>N1 VALUE</description>
142058              <bitOffset>0</bitOffset>
142059              <bitWidth>32</bitWidth>
142060              <access>read-write</access>
142061            </field>
142062          </fields>
142063        </register>
142064        <register>
142065          <name>LTC0_PKN_20</name>
142066          <description>LTC PKHA N 20 Register</description>
142067          <alternateGroup>LTC0</alternateGroup>
142068          <addressOffset>0xC50</addressOffset>
142069          <size>32</size>
142070          <access>read-write</access>
142071          <resetValue>0</resetValue>
142072          <resetMask>0xFFFFFFFF</resetMask>
142073        </register>
142074        <register>
142075          <name>LTC0_PKN1_5</name>
142076          <description>LTC PKHA N1 5 Register</description>
142077          <alternateGroup>LTC0</alternateGroup>
142078          <addressOffset>0xC54</addressOffset>
142079          <size>32</size>
142080          <access>read-write</access>
142081          <resetValue>0</resetValue>
142082          <resetMask>0xFFFFFFFF</resetMask>
142083          <fields>
142084            <field>
142085              <name>PKHA_N1</name>
142086              <description>N1 VALUE</description>
142087              <bitOffset>0</bitOffset>
142088              <bitWidth>32</bitWidth>
142089              <access>read-write</access>
142090            </field>
142091          </fields>
142092        </register>
142093        <register>
142094          <name>LTC0_PKN_21</name>
142095          <description>LTC PKHA N 21 Register</description>
142096          <alternateGroup>LTC0</alternateGroup>
142097          <addressOffset>0xC54</addressOffset>
142098          <size>32</size>
142099          <access>read-write</access>
142100          <resetValue>0</resetValue>
142101          <resetMask>0xFFFFFFFF</resetMask>
142102        </register>
142103        <register>
142104          <name>LTC0_PKN1_6</name>
142105          <description>LTC PKHA N1 6 Register</description>
142106          <alternateGroup>LTC0</alternateGroup>
142107          <addressOffset>0xC58</addressOffset>
142108          <size>32</size>
142109          <access>read-write</access>
142110          <resetValue>0</resetValue>
142111          <resetMask>0xFFFFFFFF</resetMask>
142112          <fields>
142113            <field>
142114              <name>PKHA_N1</name>
142115              <description>N1 VALUE</description>
142116              <bitOffset>0</bitOffset>
142117              <bitWidth>32</bitWidth>
142118              <access>read-write</access>
142119            </field>
142120          </fields>
142121        </register>
142122        <register>
142123          <name>LTC0_PKN_22</name>
142124          <description>LTC PKHA N 22 Register</description>
142125          <alternateGroup>LTC0</alternateGroup>
142126          <addressOffset>0xC58</addressOffset>
142127          <size>32</size>
142128          <access>read-write</access>
142129          <resetValue>0</resetValue>
142130          <resetMask>0xFFFFFFFF</resetMask>
142131        </register>
142132        <register>
142133          <name>LTC0_PKN1_7</name>
142134          <description>LTC PKHA N1 7 Register</description>
142135          <alternateGroup>LTC0</alternateGroup>
142136          <addressOffset>0xC5C</addressOffset>
142137          <size>32</size>
142138          <access>read-write</access>
142139          <resetValue>0</resetValue>
142140          <resetMask>0xFFFFFFFF</resetMask>
142141          <fields>
142142            <field>
142143              <name>PKHA_N1</name>
142144              <description>N1 VALUE</description>
142145              <bitOffset>0</bitOffset>
142146              <bitWidth>32</bitWidth>
142147              <access>read-write</access>
142148            </field>
142149          </fields>
142150        </register>
142151        <register>
142152          <name>LTC0_PKN_23</name>
142153          <description>LTC PKHA N 23 Register</description>
142154          <alternateGroup>LTC0</alternateGroup>
142155          <addressOffset>0xC5C</addressOffset>
142156          <size>32</size>
142157          <access>read-write</access>
142158          <resetValue>0</resetValue>
142159          <resetMask>0xFFFFFFFF</resetMask>
142160        </register>
142161        <register>
142162          <name>LTC0_PKN1_8</name>
142163          <description>LTC PKHA N1 8 Register</description>
142164          <alternateGroup>LTC0</alternateGroup>
142165          <addressOffset>0xC60</addressOffset>
142166          <size>32</size>
142167          <access>read-write</access>
142168          <resetValue>0</resetValue>
142169          <resetMask>0xFFFFFFFF</resetMask>
142170          <fields>
142171            <field>
142172              <name>PKHA_N1</name>
142173              <description>N1 VALUE</description>
142174              <bitOffset>0</bitOffset>
142175              <bitWidth>32</bitWidth>
142176              <access>read-write</access>
142177            </field>
142178          </fields>
142179        </register>
142180        <register>
142181          <name>LTC0_PKN_24</name>
142182          <description>LTC PKHA N 24 Register</description>
142183          <alternateGroup>LTC0</alternateGroup>
142184          <addressOffset>0xC60</addressOffset>
142185          <size>32</size>
142186          <access>read-write</access>
142187          <resetValue>0</resetValue>
142188          <resetMask>0xFFFFFFFF</resetMask>
142189        </register>
142190        <register>
142191          <name>LTC0_PKN1_9</name>
142192          <description>LTC PKHA N1 9 Register</description>
142193          <alternateGroup>LTC0</alternateGroup>
142194          <addressOffset>0xC64</addressOffset>
142195          <size>32</size>
142196          <access>read-write</access>
142197          <resetValue>0</resetValue>
142198          <resetMask>0xFFFFFFFF</resetMask>
142199          <fields>
142200            <field>
142201              <name>PKHA_N1</name>
142202              <description>N1 VALUE</description>
142203              <bitOffset>0</bitOffset>
142204              <bitWidth>32</bitWidth>
142205              <access>read-write</access>
142206            </field>
142207          </fields>
142208        </register>
142209        <register>
142210          <name>LTC0_PKN_25</name>
142211          <description>LTC PKHA N 25 Register</description>
142212          <alternateGroup>LTC0</alternateGroup>
142213          <addressOffset>0xC64</addressOffset>
142214          <size>32</size>
142215          <access>read-write</access>
142216          <resetValue>0</resetValue>
142217          <resetMask>0xFFFFFFFF</resetMask>
142218        </register>
142219        <register>
142220          <name>LTC0_PKN1_10</name>
142221          <description>LTC PKHA N1 10 Register</description>
142222          <alternateGroup>LTC0</alternateGroup>
142223          <addressOffset>0xC68</addressOffset>
142224          <size>32</size>
142225          <access>read-write</access>
142226          <resetValue>0</resetValue>
142227          <resetMask>0xFFFFFFFF</resetMask>
142228          <fields>
142229            <field>
142230              <name>PKHA_N1</name>
142231              <description>N1 VALUE</description>
142232              <bitOffset>0</bitOffset>
142233              <bitWidth>32</bitWidth>
142234              <access>read-write</access>
142235            </field>
142236          </fields>
142237        </register>
142238        <register>
142239          <name>LTC0_PKN_26</name>
142240          <description>LTC PKHA N 26 Register</description>
142241          <alternateGroup>LTC0</alternateGroup>
142242          <addressOffset>0xC68</addressOffset>
142243          <size>32</size>
142244          <access>read-write</access>
142245          <resetValue>0</resetValue>
142246          <resetMask>0xFFFFFFFF</resetMask>
142247        </register>
142248        <register>
142249          <name>LTC0_PKN1_11</name>
142250          <description>LTC PKHA N1 11 Register</description>
142251          <alternateGroup>LTC0</alternateGroup>
142252          <addressOffset>0xC6C</addressOffset>
142253          <size>32</size>
142254          <access>read-write</access>
142255          <resetValue>0</resetValue>
142256          <resetMask>0xFFFFFFFF</resetMask>
142257          <fields>
142258            <field>
142259              <name>PKHA_N1</name>
142260              <description>N1 VALUE</description>
142261              <bitOffset>0</bitOffset>
142262              <bitWidth>32</bitWidth>
142263              <access>read-write</access>
142264            </field>
142265          </fields>
142266        </register>
142267        <register>
142268          <name>LTC0_PKN_27</name>
142269          <description>LTC PKHA N 27 Register</description>
142270          <alternateGroup>LTC0</alternateGroup>
142271          <addressOffset>0xC6C</addressOffset>
142272          <size>32</size>
142273          <access>read-write</access>
142274          <resetValue>0</resetValue>
142275          <resetMask>0xFFFFFFFF</resetMask>
142276        </register>
142277        <register>
142278          <name>LTC0_PKN1_12</name>
142279          <description>LTC PKHA N1 12 Register</description>
142280          <alternateGroup>LTC0</alternateGroup>
142281          <addressOffset>0xC70</addressOffset>
142282          <size>32</size>
142283          <access>read-write</access>
142284          <resetValue>0</resetValue>
142285          <resetMask>0xFFFFFFFF</resetMask>
142286          <fields>
142287            <field>
142288              <name>PKHA_N1</name>
142289              <description>N1 VALUE</description>
142290              <bitOffset>0</bitOffset>
142291              <bitWidth>32</bitWidth>
142292              <access>read-write</access>
142293            </field>
142294          </fields>
142295        </register>
142296        <register>
142297          <name>LTC0_PKN_28</name>
142298          <description>LTC PKHA N 28 Register</description>
142299          <alternateGroup>LTC0</alternateGroup>
142300          <addressOffset>0xC70</addressOffset>
142301          <size>32</size>
142302          <access>read-write</access>
142303          <resetValue>0</resetValue>
142304          <resetMask>0xFFFFFFFF</resetMask>
142305        </register>
142306        <register>
142307          <name>LTC0_PKN1_13</name>
142308          <description>LTC PKHA N1 13 Register</description>
142309          <alternateGroup>LTC0</alternateGroup>
142310          <addressOffset>0xC74</addressOffset>
142311          <size>32</size>
142312          <access>read-write</access>
142313          <resetValue>0</resetValue>
142314          <resetMask>0xFFFFFFFF</resetMask>
142315          <fields>
142316            <field>
142317              <name>PKHA_N1</name>
142318              <description>N1 VALUE</description>
142319              <bitOffset>0</bitOffset>
142320              <bitWidth>32</bitWidth>
142321              <access>read-write</access>
142322            </field>
142323          </fields>
142324        </register>
142325        <register>
142326          <name>LTC0_PKN_29</name>
142327          <description>LTC PKHA N 29 Register</description>
142328          <alternateGroup>LTC0</alternateGroup>
142329          <addressOffset>0xC74</addressOffset>
142330          <size>32</size>
142331          <access>read-write</access>
142332          <resetValue>0</resetValue>
142333          <resetMask>0xFFFFFFFF</resetMask>
142334        </register>
142335        <register>
142336          <name>LTC0_PKN1_14</name>
142337          <description>LTC PKHA N1 14 Register</description>
142338          <alternateGroup>LTC0</alternateGroup>
142339          <addressOffset>0xC78</addressOffset>
142340          <size>32</size>
142341          <access>read-write</access>
142342          <resetValue>0</resetValue>
142343          <resetMask>0xFFFFFFFF</resetMask>
142344          <fields>
142345            <field>
142346              <name>PKHA_N1</name>
142347              <description>N1 VALUE</description>
142348              <bitOffset>0</bitOffset>
142349              <bitWidth>32</bitWidth>
142350              <access>read-write</access>
142351            </field>
142352          </fields>
142353        </register>
142354        <register>
142355          <name>LTC0_PKN_30</name>
142356          <description>LTC PKHA N 30 Register</description>
142357          <alternateGroup>LTC0</alternateGroup>
142358          <addressOffset>0xC78</addressOffset>
142359          <size>32</size>
142360          <access>read-write</access>
142361          <resetValue>0</resetValue>
142362          <resetMask>0xFFFFFFFF</resetMask>
142363        </register>
142364        <register>
142365          <name>LTC0_PKN1_15</name>
142366          <description>LTC PKHA N1 15 Register</description>
142367          <alternateGroup>LTC0</alternateGroup>
142368          <addressOffset>0xC7C</addressOffset>
142369          <size>32</size>
142370          <access>read-write</access>
142371          <resetValue>0</resetValue>
142372          <resetMask>0xFFFFFFFF</resetMask>
142373          <fields>
142374            <field>
142375              <name>PKHA_N1</name>
142376              <description>N1 VALUE</description>
142377              <bitOffset>0</bitOffset>
142378              <bitWidth>32</bitWidth>
142379              <access>read-write</access>
142380            </field>
142381          </fields>
142382        </register>
142383        <register>
142384          <name>LTC0_PKN_31</name>
142385          <description>LTC PKHA N 31 Register</description>
142386          <alternateGroup>LTC0</alternateGroup>
142387          <addressOffset>0xC7C</addressOffset>
142388          <size>32</size>
142389          <access>read-write</access>
142390          <resetValue>0</resetValue>
142391          <resetMask>0xFFFFFFFF</resetMask>
142392        </register>
142393        <register>
142394          <name>LTC0_PKN2_0</name>
142395          <description>LTC PKHA N2 0 Register</description>
142396          <alternateGroup>LTC0</alternateGroup>
142397          <addressOffset>0xC80</addressOffset>
142398          <size>32</size>
142399          <access>read-write</access>
142400          <resetValue>0</resetValue>
142401          <resetMask>0xFFFFFFFF</resetMask>
142402          <fields>
142403            <field>
142404              <name>PKHA_N2</name>
142405              <description>N2 VALUE</description>
142406              <bitOffset>0</bitOffset>
142407              <bitWidth>32</bitWidth>
142408              <access>read-write</access>
142409            </field>
142410          </fields>
142411        </register>
142412        <register>
142413          <name>LTC0_PKN_32</name>
142414          <description>LTC PKHA N 32 Register</description>
142415          <alternateGroup>LTC0</alternateGroup>
142416          <addressOffset>0xC80</addressOffset>
142417          <size>32</size>
142418          <access>read-write</access>
142419          <resetValue>0</resetValue>
142420          <resetMask>0xFFFFFFFF</resetMask>
142421        </register>
142422        <register>
142423          <name>LTC0_PKN2_1</name>
142424          <description>LTC PKHA N2 1 Register</description>
142425          <alternateGroup>LTC0</alternateGroup>
142426          <addressOffset>0xC84</addressOffset>
142427          <size>32</size>
142428          <access>read-write</access>
142429          <resetValue>0</resetValue>
142430          <resetMask>0xFFFFFFFF</resetMask>
142431          <fields>
142432            <field>
142433              <name>PKHA_N2</name>
142434              <description>N2 VALUE</description>
142435              <bitOffset>0</bitOffset>
142436              <bitWidth>32</bitWidth>
142437              <access>read-write</access>
142438            </field>
142439          </fields>
142440        </register>
142441        <register>
142442          <name>LTC0_PKN_33</name>
142443          <description>LTC PKHA N 33 Register</description>
142444          <alternateGroup>LTC0</alternateGroup>
142445          <addressOffset>0xC84</addressOffset>
142446          <size>32</size>
142447          <access>read-write</access>
142448          <resetValue>0</resetValue>
142449          <resetMask>0xFFFFFFFF</resetMask>
142450        </register>
142451        <register>
142452          <name>LTC0_PKN2_2</name>
142453          <description>LTC PKHA N2 2 Register</description>
142454          <alternateGroup>LTC0</alternateGroup>
142455          <addressOffset>0xC88</addressOffset>
142456          <size>32</size>
142457          <access>read-write</access>
142458          <resetValue>0</resetValue>
142459          <resetMask>0xFFFFFFFF</resetMask>
142460          <fields>
142461            <field>
142462              <name>PKHA_N2</name>
142463              <description>N2 VALUE</description>
142464              <bitOffset>0</bitOffset>
142465              <bitWidth>32</bitWidth>
142466              <access>read-write</access>
142467            </field>
142468          </fields>
142469        </register>
142470        <register>
142471          <name>LTC0_PKN_34</name>
142472          <description>LTC PKHA N 34 Register</description>
142473          <alternateGroup>LTC0</alternateGroup>
142474          <addressOffset>0xC88</addressOffset>
142475          <size>32</size>
142476          <access>read-write</access>
142477          <resetValue>0</resetValue>
142478          <resetMask>0xFFFFFFFF</resetMask>
142479        </register>
142480        <register>
142481          <name>LTC0_PKN2_3</name>
142482          <description>LTC PKHA N2 3 Register</description>
142483          <alternateGroup>LTC0</alternateGroup>
142484          <addressOffset>0xC8C</addressOffset>
142485          <size>32</size>
142486          <access>read-write</access>
142487          <resetValue>0</resetValue>
142488          <resetMask>0xFFFFFFFF</resetMask>
142489          <fields>
142490            <field>
142491              <name>PKHA_N2</name>
142492              <description>N2 VALUE</description>
142493              <bitOffset>0</bitOffset>
142494              <bitWidth>32</bitWidth>
142495              <access>read-write</access>
142496            </field>
142497          </fields>
142498        </register>
142499        <register>
142500          <name>LTC0_PKN_35</name>
142501          <description>LTC PKHA N 35 Register</description>
142502          <alternateGroup>LTC0</alternateGroup>
142503          <addressOffset>0xC8C</addressOffset>
142504          <size>32</size>
142505          <access>read-write</access>
142506          <resetValue>0</resetValue>
142507          <resetMask>0xFFFFFFFF</resetMask>
142508        </register>
142509        <register>
142510          <name>LTC0_PKN2_4</name>
142511          <description>LTC PKHA N2 4 Register</description>
142512          <alternateGroup>LTC0</alternateGroup>
142513          <addressOffset>0xC90</addressOffset>
142514          <size>32</size>
142515          <access>read-write</access>
142516          <resetValue>0</resetValue>
142517          <resetMask>0xFFFFFFFF</resetMask>
142518          <fields>
142519            <field>
142520              <name>PKHA_N2</name>
142521              <description>N2 VALUE</description>
142522              <bitOffset>0</bitOffset>
142523              <bitWidth>32</bitWidth>
142524              <access>read-write</access>
142525            </field>
142526          </fields>
142527        </register>
142528        <register>
142529          <name>LTC0_PKN_36</name>
142530          <description>LTC PKHA N 36 Register</description>
142531          <alternateGroup>LTC0</alternateGroup>
142532          <addressOffset>0xC90</addressOffset>
142533          <size>32</size>
142534          <access>read-write</access>
142535          <resetValue>0</resetValue>
142536          <resetMask>0xFFFFFFFF</resetMask>
142537        </register>
142538        <register>
142539          <name>LTC0_PKN2_5</name>
142540          <description>LTC PKHA N2 5 Register</description>
142541          <alternateGroup>LTC0</alternateGroup>
142542          <addressOffset>0xC94</addressOffset>
142543          <size>32</size>
142544          <access>read-write</access>
142545          <resetValue>0</resetValue>
142546          <resetMask>0xFFFFFFFF</resetMask>
142547          <fields>
142548            <field>
142549              <name>PKHA_N2</name>
142550              <description>N2 VALUE</description>
142551              <bitOffset>0</bitOffset>
142552              <bitWidth>32</bitWidth>
142553              <access>read-write</access>
142554            </field>
142555          </fields>
142556        </register>
142557        <register>
142558          <name>LTC0_PKN_37</name>
142559          <description>LTC PKHA N 37 Register</description>
142560          <alternateGroup>LTC0</alternateGroup>
142561          <addressOffset>0xC94</addressOffset>
142562          <size>32</size>
142563          <access>read-write</access>
142564          <resetValue>0</resetValue>
142565          <resetMask>0xFFFFFFFF</resetMask>
142566        </register>
142567        <register>
142568          <name>LTC0_PKN2_6</name>
142569          <description>LTC PKHA N2 6 Register</description>
142570          <alternateGroup>LTC0</alternateGroup>
142571          <addressOffset>0xC98</addressOffset>
142572          <size>32</size>
142573          <access>read-write</access>
142574          <resetValue>0</resetValue>
142575          <resetMask>0xFFFFFFFF</resetMask>
142576          <fields>
142577            <field>
142578              <name>PKHA_N2</name>
142579              <description>N2 VALUE</description>
142580              <bitOffset>0</bitOffset>
142581              <bitWidth>32</bitWidth>
142582              <access>read-write</access>
142583            </field>
142584          </fields>
142585        </register>
142586        <register>
142587          <name>LTC0_PKN_38</name>
142588          <description>LTC PKHA N 38 Register</description>
142589          <alternateGroup>LTC0</alternateGroup>
142590          <addressOffset>0xC98</addressOffset>
142591          <size>32</size>
142592          <access>read-write</access>
142593          <resetValue>0</resetValue>
142594          <resetMask>0xFFFFFFFF</resetMask>
142595        </register>
142596        <register>
142597          <name>LTC0_PKN2_7</name>
142598          <description>LTC PKHA N2 7 Register</description>
142599          <alternateGroup>LTC0</alternateGroup>
142600          <addressOffset>0xC9C</addressOffset>
142601          <size>32</size>
142602          <access>read-write</access>
142603          <resetValue>0</resetValue>
142604          <resetMask>0xFFFFFFFF</resetMask>
142605          <fields>
142606            <field>
142607              <name>PKHA_N2</name>
142608              <description>N2 VALUE</description>
142609              <bitOffset>0</bitOffset>
142610              <bitWidth>32</bitWidth>
142611              <access>read-write</access>
142612            </field>
142613          </fields>
142614        </register>
142615        <register>
142616          <name>LTC0_PKN_39</name>
142617          <description>LTC PKHA N 39 Register</description>
142618          <alternateGroup>LTC0</alternateGroup>
142619          <addressOffset>0xC9C</addressOffset>
142620          <size>32</size>
142621          <access>read-write</access>
142622          <resetValue>0</resetValue>
142623          <resetMask>0xFFFFFFFF</resetMask>
142624        </register>
142625        <register>
142626          <name>LTC0_PKN2_8</name>
142627          <description>LTC PKHA N2 8 Register</description>
142628          <alternateGroup>LTC0</alternateGroup>
142629          <addressOffset>0xCA0</addressOffset>
142630          <size>32</size>
142631          <access>read-write</access>
142632          <resetValue>0</resetValue>
142633          <resetMask>0xFFFFFFFF</resetMask>
142634          <fields>
142635            <field>
142636              <name>PKHA_N2</name>
142637              <description>N2 VALUE</description>
142638              <bitOffset>0</bitOffset>
142639              <bitWidth>32</bitWidth>
142640              <access>read-write</access>
142641            </field>
142642          </fields>
142643        </register>
142644        <register>
142645          <name>LTC0_PKN_40</name>
142646          <description>LTC PKHA N 40 Register</description>
142647          <alternateGroup>LTC0</alternateGroup>
142648          <addressOffset>0xCA0</addressOffset>
142649          <size>32</size>
142650          <access>read-write</access>
142651          <resetValue>0</resetValue>
142652          <resetMask>0xFFFFFFFF</resetMask>
142653        </register>
142654        <register>
142655          <name>LTC0_PKN2_9</name>
142656          <description>LTC PKHA N2 9 Register</description>
142657          <alternateGroup>LTC0</alternateGroup>
142658          <addressOffset>0xCA4</addressOffset>
142659          <size>32</size>
142660          <access>read-write</access>
142661          <resetValue>0</resetValue>
142662          <resetMask>0xFFFFFFFF</resetMask>
142663          <fields>
142664            <field>
142665              <name>PKHA_N2</name>
142666              <description>N2 VALUE</description>
142667              <bitOffset>0</bitOffset>
142668              <bitWidth>32</bitWidth>
142669              <access>read-write</access>
142670            </field>
142671          </fields>
142672        </register>
142673        <register>
142674          <name>LTC0_PKN_41</name>
142675          <description>LTC PKHA N 41 Register</description>
142676          <alternateGroup>LTC0</alternateGroup>
142677          <addressOffset>0xCA4</addressOffset>
142678          <size>32</size>
142679          <access>read-write</access>
142680          <resetValue>0</resetValue>
142681          <resetMask>0xFFFFFFFF</resetMask>
142682        </register>
142683        <register>
142684          <name>LTC0_PKN2_10</name>
142685          <description>LTC PKHA N2 10 Register</description>
142686          <alternateGroup>LTC0</alternateGroup>
142687          <addressOffset>0xCA8</addressOffset>
142688          <size>32</size>
142689          <access>read-write</access>
142690          <resetValue>0</resetValue>
142691          <resetMask>0xFFFFFFFF</resetMask>
142692          <fields>
142693            <field>
142694              <name>PKHA_N2</name>
142695              <description>N2 VALUE</description>
142696              <bitOffset>0</bitOffset>
142697              <bitWidth>32</bitWidth>
142698              <access>read-write</access>
142699            </field>
142700          </fields>
142701        </register>
142702        <register>
142703          <name>LTC0_PKN_42</name>
142704          <description>LTC PKHA N 42 Register</description>
142705          <alternateGroup>LTC0</alternateGroup>
142706          <addressOffset>0xCA8</addressOffset>
142707          <size>32</size>
142708          <access>read-write</access>
142709          <resetValue>0</resetValue>
142710          <resetMask>0xFFFFFFFF</resetMask>
142711        </register>
142712        <register>
142713          <name>LTC0_PKN2_11</name>
142714          <description>LTC PKHA N2 11 Register</description>
142715          <alternateGroup>LTC0</alternateGroup>
142716          <addressOffset>0xCAC</addressOffset>
142717          <size>32</size>
142718          <access>read-write</access>
142719          <resetValue>0</resetValue>
142720          <resetMask>0xFFFFFFFF</resetMask>
142721          <fields>
142722            <field>
142723              <name>PKHA_N2</name>
142724              <description>N2 VALUE</description>
142725              <bitOffset>0</bitOffset>
142726              <bitWidth>32</bitWidth>
142727              <access>read-write</access>
142728            </field>
142729          </fields>
142730        </register>
142731        <register>
142732          <name>LTC0_PKN_43</name>
142733          <description>LTC PKHA N 43 Register</description>
142734          <alternateGroup>LTC0</alternateGroup>
142735          <addressOffset>0xCAC</addressOffset>
142736          <size>32</size>
142737          <access>read-write</access>
142738          <resetValue>0</resetValue>
142739          <resetMask>0xFFFFFFFF</resetMask>
142740        </register>
142741        <register>
142742          <name>LTC0_PKN2_12</name>
142743          <description>LTC PKHA N2 12 Register</description>
142744          <alternateGroup>LTC0</alternateGroup>
142745          <addressOffset>0xCB0</addressOffset>
142746          <size>32</size>
142747          <access>read-write</access>
142748          <resetValue>0</resetValue>
142749          <resetMask>0xFFFFFFFF</resetMask>
142750          <fields>
142751            <field>
142752              <name>PKHA_N2</name>
142753              <description>N2 VALUE</description>
142754              <bitOffset>0</bitOffset>
142755              <bitWidth>32</bitWidth>
142756              <access>read-write</access>
142757            </field>
142758          </fields>
142759        </register>
142760        <register>
142761          <name>LTC0_PKN_44</name>
142762          <description>LTC PKHA N 44 Register</description>
142763          <alternateGroup>LTC0</alternateGroup>
142764          <addressOffset>0xCB0</addressOffset>
142765          <size>32</size>
142766          <access>read-write</access>
142767          <resetValue>0</resetValue>
142768          <resetMask>0xFFFFFFFF</resetMask>
142769        </register>
142770        <register>
142771          <name>LTC0_PKN2_13</name>
142772          <description>LTC PKHA N2 13 Register</description>
142773          <alternateGroup>LTC0</alternateGroup>
142774          <addressOffset>0xCB4</addressOffset>
142775          <size>32</size>
142776          <access>read-write</access>
142777          <resetValue>0</resetValue>
142778          <resetMask>0xFFFFFFFF</resetMask>
142779          <fields>
142780            <field>
142781              <name>PKHA_N2</name>
142782              <description>N2 VALUE</description>
142783              <bitOffset>0</bitOffset>
142784              <bitWidth>32</bitWidth>
142785              <access>read-write</access>
142786            </field>
142787          </fields>
142788        </register>
142789        <register>
142790          <name>LTC0_PKN_45</name>
142791          <description>LTC PKHA N 45 Register</description>
142792          <alternateGroup>LTC0</alternateGroup>
142793          <addressOffset>0xCB4</addressOffset>
142794          <size>32</size>
142795          <access>read-write</access>
142796          <resetValue>0</resetValue>
142797          <resetMask>0xFFFFFFFF</resetMask>
142798        </register>
142799        <register>
142800          <name>LTC0_PKN2_14</name>
142801          <description>LTC PKHA N2 14 Register</description>
142802          <alternateGroup>LTC0</alternateGroup>
142803          <addressOffset>0xCB8</addressOffset>
142804          <size>32</size>
142805          <access>read-write</access>
142806          <resetValue>0</resetValue>
142807          <resetMask>0xFFFFFFFF</resetMask>
142808          <fields>
142809            <field>
142810              <name>PKHA_N2</name>
142811              <description>N2 VALUE</description>
142812              <bitOffset>0</bitOffset>
142813              <bitWidth>32</bitWidth>
142814              <access>read-write</access>
142815            </field>
142816          </fields>
142817        </register>
142818        <register>
142819          <name>LTC0_PKN_46</name>
142820          <description>LTC PKHA N 46 Register</description>
142821          <alternateGroup>LTC0</alternateGroup>
142822          <addressOffset>0xCB8</addressOffset>
142823          <size>32</size>
142824          <access>read-write</access>
142825          <resetValue>0</resetValue>
142826          <resetMask>0xFFFFFFFF</resetMask>
142827        </register>
142828        <register>
142829          <name>LTC0_PKN2_15</name>
142830          <description>LTC PKHA N2 15 Register</description>
142831          <alternateGroup>LTC0</alternateGroup>
142832          <addressOffset>0xCBC</addressOffset>
142833          <size>32</size>
142834          <access>read-write</access>
142835          <resetValue>0</resetValue>
142836          <resetMask>0xFFFFFFFF</resetMask>
142837          <fields>
142838            <field>
142839              <name>PKHA_N2</name>
142840              <description>N2 VALUE</description>
142841              <bitOffset>0</bitOffset>
142842              <bitWidth>32</bitWidth>
142843              <access>read-write</access>
142844            </field>
142845          </fields>
142846        </register>
142847        <register>
142848          <name>LTC0_PKN_47</name>
142849          <description>LTC PKHA N 47 Register</description>
142850          <alternateGroup>LTC0</alternateGroup>
142851          <addressOffset>0xCBC</addressOffset>
142852          <size>32</size>
142853          <access>read-write</access>
142854          <resetValue>0</resetValue>
142855          <resetMask>0xFFFFFFFF</resetMask>
142856        </register>
142857        <register>
142858          <name>LTC0_PKN3_0</name>
142859          <description>LTC PKHA N3 0 Register</description>
142860          <alternateGroup>LTC0</alternateGroup>
142861          <addressOffset>0xCC0</addressOffset>
142862          <size>32</size>
142863          <access>read-write</access>
142864          <resetValue>0</resetValue>
142865          <resetMask>0xFFFFFFFF</resetMask>
142866          <fields>
142867            <field>
142868              <name>PKHA_N3</name>
142869              <description>N3 VALUE</description>
142870              <bitOffset>0</bitOffset>
142871              <bitWidth>32</bitWidth>
142872              <access>read-write</access>
142873            </field>
142874          </fields>
142875        </register>
142876        <register>
142877          <name>LTC0_PKN_48</name>
142878          <description>LTC PKHA N 48 Register</description>
142879          <alternateGroup>LTC0</alternateGroup>
142880          <addressOffset>0xCC0</addressOffset>
142881          <size>32</size>
142882          <access>read-write</access>
142883          <resetValue>0</resetValue>
142884          <resetMask>0xFFFFFFFF</resetMask>
142885        </register>
142886        <register>
142887          <name>LTC0_PKN3_1</name>
142888          <description>LTC PKHA N3 1 Register</description>
142889          <alternateGroup>LTC0</alternateGroup>
142890          <addressOffset>0xCC4</addressOffset>
142891          <size>32</size>
142892          <access>read-write</access>
142893          <resetValue>0</resetValue>
142894          <resetMask>0xFFFFFFFF</resetMask>
142895          <fields>
142896            <field>
142897              <name>PKHA_N3</name>
142898              <description>N3 VALUE</description>
142899              <bitOffset>0</bitOffset>
142900              <bitWidth>32</bitWidth>
142901              <access>read-write</access>
142902            </field>
142903          </fields>
142904        </register>
142905        <register>
142906          <name>LTC0_PKN_49</name>
142907          <description>LTC PKHA N 49 Register</description>
142908          <alternateGroup>LTC0</alternateGroup>
142909          <addressOffset>0xCC4</addressOffset>
142910          <size>32</size>
142911          <access>read-write</access>
142912          <resetValue>0</resetValue>
142913          <resetMask>0xFFFFFFFF</resetMask>
142914        </register>
142915        <register>
142916          <name>LTC0_PKN3_2</name>
142917          <description>LTC PKHA N3 2 Register</description>
142918          <alternateGroup>LTC0</alternateGroup>
142919          <addressOffset>0xCC8</addressOffset>
142920          <size>32</size>
142921          <access>read-write</access>
142922          <resetValue>0</resetValue>
142923          <resetMask>0xFFFFFFFF</resetMask>
142924          <fields>
142925            <field>
142926              <name>PKHA_N3</name>
142927              <description>N3 VALUE</description>
142928              <bitOffset>0</bitOffset>
142929              <bitWidth>32</bitWidth>
142930              <access>read-write</access>
142931            </field>
142932          </fields>
142933        </register>
142934        <register>
142935          <name>LTC0_PKN_50</name>
142936          <description>LTC PKHA N 50 Register</description>
142937          <alternateGroup>LTC0</alternateGroup>
142938          <addressOffset>0xCC8</addressOffset>
142939          <size>32</size>
142940          <access>read-write</access>
142941          <resetValue>0</resetValue>
142942          <resetMask>0xFFFFFFFF</resetMask>
142943        </register>
142944        <register>
142945          <name>LTC0_PKN3_3</name>
142946          <description>LTC PKHA N3 3 Register</description>
142947          <alternateGroup>LTC0</alternateGroup>
142948          <addressOffset>0xCCC</addressOffset>
142949          <size>32</size>
142950          <access>read-write</access>
142951          <resetValue>0</resetValue>
142952          <resetMask>0xFFFFFFFF</resetMask>
142953          <fields>
142954            <field>
142955              <name>PKHA_N3</name>
142956              <description>N3 VALUE</description>
142957              <bitOffset>0</bitOffset>
142958              <bitWidth>32</bitWidth>
142959              <access>read-write</access>
142960            </field>
142961          </fields>
142962        </register>
142963        <register>
142964          <name>LTC0_PKN_51</name>
142965          <description>LTC PKHA N 51 Register</description>
142966          <alternateGroup>LTC0</alternateGroup>
142967          <addressOffset>0xCCC</addressOffset>
142968          <size>32</size>
142969          <access>read-write</access>
142970          <resetValue>0</resetValue>
142971          <resetMask>0xFFFFFFFF</resetMask>
142972        </register>
142973        <register>
142974          <name>LTC0_PKN3_4</name>
142975          <description>LTC PKHA N3 4 Register</description>
142976          <alternateGroup>LTC0</alternateGroup>
142977          <addressOffset>0xCD0</addressOffset>
142978          <size>32</size>
142979          <access>read-write</access>
142980          <resetValue>0</resetValue>
142981          <resetMask>0xFFFFFFFF</resetMask>
142982          <fields>
142983            <field>
142984              <name>PKHA_N3</name>
142985              <description>N3 VALUE</description>
142986              <bitOffset>0</bitOffset>
142987              <bitWidth>32</bitWidth>
142988              <access>read-write</access>
142989            </field>
142990          </fields>
142991        </register>
142992        <register>
142993          <name>LTC0_PKN_52</name>
142994          <description>LTC PKHA N 52 Register</description>
142995          <alternateGroup>LTC0</alternateGroup>
142996          <addressOffset>0xCD0</addressOffset>
142997          <size>32</size>
142998          <access>read-write</access>
142999          <resetValue>0</resetValue>
143000          <resetMask>0xFFFFFFFF</resetMask>
143001        </register>
143002        <register>
143003          <name>LTC0_PKN3_5</name>
143004          <description>LTC PKHA N3 5 Register</description>
143005          <alternateGroup>LTC0</alternateGroup>
143006          <addressOffset>0xCD4</addressOffset>
143007          <size>32</size>
143008          <access>read-write</access>
143009          <resetValue>0</resetValue>
143010          <resetMask>0xFFFFFFFF</resetMask>
143011          <fields>
143012            <field>
143013              <name>PKHA_N3</name>
143014              <description>N3 VALUE</description>
143015              <bitOffset>0</bitOffset>
143016              <bitWidth>32</bitWidth>
143017              <access>read-write</access>
143018            </field>
143019          </fields>
143020        </register>
143021        <register>
143022          <name>LTC0_PKN_53</name>
143023          <description>LTC PKHA N 53 Register</description>
143024          <alternateGroup>LTC0</alternateGroup>
143025          <addressOffset>0xCD4</addressOffset>
143026          <size>32</size>
143027          <access>read-write</access>
143028          <resetValue>0</resetValue>
143029          <resetMask>0xFFFFFFFF</resetMask>
143030        </register>
143031        <register>
143032          <name>LTC0_PKN3_6</name>
143033          <description>LTC PKHA N3 6 Register</description>
143034          <alternateGroup>LTC0</alternateGroup>
143035          <addressOffset>0xCD8</addressOffset>
143036          <size>32</size>
143037          <access>read-write</access>
143038          <resetValue>0</resetValue>
143039          <resetMask>0xFFFFFFFF</resetMask>
143040          <fields>
143041            <field>
143042              <name>PKHA_N3</name>
143043              <description>N3 VALUE</description>
143044              <bitOffset>0</bitOffset>
143045              <bitWidth>32</bitWidth>
143046              <access>read-write</access>
143047            </field>
143048          </fields>
143049        </register>
143050        <register>
143051          <name>LTC0_PKN_54</name>
143052          <description>LTC PKHA N 54 Register</description>
143053          <alternateGroup>LTC0</alternateGroup>
143054          <addressOffset>0xCD8</addressOffset>
143055          <size>32</size>
143056          <access>read-write</access>
143057          <resetValue>0</resetValue>
143058          <resetMask>0xFFFFFFFF</resetMask>
143059        </register>
143060        <register>
143061          <name>LTC0_PKN3_7</name>
143062          <description>LTC PKHA N3 7 Register</description>
143063          <alternateGroup>LTC0</alternateGroup>
143064          <addressOffset>0xCDC</addressOffset>
143065          <size>32</size>
143066          <access>read-write</access>
143067          <resetValue>0</resetValue>
143068          <resetMask>0xFFFFFFFF</resetMask>
143069          <fields>
143070            <field>
143071              <name>PKHA_N3</name>
143072              <description>N3 VALUE</description>
143073              <bitOffset>0</bitOffset>
143074              <bitWidth>32</bitWidth>
143075              <access>read-write</access>
143076            </field>
143077          </fields>
143078        </register>
143079        <register>
143080          <name>LTC0_PKN_55</name>
143081          <description>LTC PKHA N 55 Register</description>
143082          <alternateGroup>LTC0</alternateGroup>
143083          <addressOffset>0xCDC</addressOffset>
143084          <size>32</size>
143085          <access>read-write</access>
143086          <resetValue>0</resetValue>
143087          <resetMask>0xFFFFFFFF</resetMask>
143088        </register>
143089        <register>
143090          <name>LTC0_PKN3_8</name>
143091          <description>LTC PKHA N3 8 Register</description>
143092          <alternateGroup>LTC0</alternateGroup>
143093          <addressOffset>0xCE0</addressOffset>
143094          <size>32</size>
143095          <access>read-write</access>
143096          <resetValue>0</resetValue>
143097          <resetMask>0xFFFFFFFF</resetMask>
143098          <fields>
143099            <field>
143100              <name>PKHA_N3</name>
143101              <description>N3 VALUE</description>
143102              <bitOffset>0</bitOffset>
143103              <bitWidth>32</bitWidth>
143104              <access>read-write</access>
143105            </field>
143106          </fields>
143107        </register>
143108        <register>
143109          <name>LTC0_PKN_56</name>
143110          <description>LTC PKHA N 56 Register</description>
143111          <alternateGroup>LTC0</alternateGroup>
143112          <addressOffset>0xCE0</addressOffset>
143113          <size>32</size>
143114          <access>read-write</access>
143115          <resetValue>0</resetValue>
143116          <resetMask>0xFFFFFFFF</resetMask>
143117        </register>
143118        <register>
143119          <name>LTC0_PKN3_9</name>
143120          <description>LTC PKHA N3 9 Register</description>
143121          <alternateGroup>LTC0</alternateGroup>
143122          <addressOffset>0xCE4</addressOffset>
143123          <size>32</size>
143124          <access>read-write</access>
143125          <resetValue>0</resetValue>
143126          <resetMask>0xFFFFFFFF</resetMask>
143127          <fields>
143128            <field>
143129              <name>PKHA_N3</name>
143130              <description>N3 VALUE</description>
143131              <bitOffset>0</bitOffset>
143132              <bitWidth>32</bitWidth>
143133              <access>read-write</access>
143134            </field>
143135          </fields>
143136        </register>
143137        <register>
143138          <name>LTC0_PKN_57</name>
143139          <description>LTC PKHA N 57 Register</description>
143140          <alternateGroup>LTC0</alternateGroup>
143141          <addressOffset>0xCE4</addressOffset>
143142          <size>32</size>
143143          <access>read-write</access>
143144          <resetValue>0</resetValue>
143145          <resetMask>0xFFFFFFFF</resetMask>
143146        </register>
143147        <register>
143148          <name>LTC0_PKN3_10</name>
143149          <description>LTC PKHA N3 10 Register</description>
143150          <alternateGroup>LTC0</alternateGroup>
143151          <addressOffset>0xCE8</addressOffset>
143152          <size>32</size>
143153          <access>read-write</access>
143154          <resetValue>0</resetValue>
143155          <resetMask>0xFFFFFFFF</resetMask>
143156          <fields>
143157            <field>
143158              <name>PKHA_N3</name>
143159              <description>N3 VALUE</description>
143160              <bitOffset>0</bitOffset>
143161              <bitWidth>32</bitWidth>
143162              <access>read-write</access>
143163            </field>
143164          </fields>
143165        </register>
143166        <register>
143167          <name>LTC0_PKN_58</name>
143168          <description>LTC PKHA N 58 Register</description>
143169          <alternateGroup>LTC0</alternateGroup>
143170          <addressOffset>0xCE8</addressOffset>
143171          <size>32</size>
143172          <access>read-write</access>
143173          <resetValue>0</resetValue>
143174          <resetMask>0xFFFFFFFF</resetMask>
143175        </register>
143176        <register>
143177          <name>LTC0_PKN3_11</name>
143178          <description>LTC PKHA N3 11 Register</description>
143179          <alternateGroup>LTC0</alternateGroup>
143180          <addressOffset>0xCEC</addressOffset>
143181          <size>32</size>
143182          <access>read-write</access>
143183          <resetValue>0</resetValue>
143184          <resetMask>0xFFFFFFFF</resetMask>
143185          <fields>
143186            <field>
143187              <name>PKHA_N3</name>
143188              <description>N3 VALUE</description>
143189              <bitOffset>0</bitOffset>
143190              <bitWidth>32</bitWidth>
143191              <access>read-write</access>
143192            </field>
143193          </fields>
143194        </register>
143195        <register>
143196          <name>LTC0_PKN_59</name>
143197          <description>LTC PKHA N 59 Register</description>
143198          <alternateGroup>LTC0</alternateGroup>
143199          <addressOffset>0xCEC</addressOffset>
143200          <size>32</size>
143201          <access>read-write</access>
143202          <resetValue>0</resetValue>
143203          <resetMask>0xFFFFFFFF</resetMask>
143204        </register>
143205        <register>
143206          <name>LTC0_PKN3_12</name>
143207          <description>LTC PKHA N3 12 Register</description>
143208          <alternateGroup>LTC0</alternateGroup>
143209          <addressOffset>0xCF0</addressOffset>
143210          <size>32</size>
143211          <access>read-write</access>
143212          <resetValue>0</resetValue>
143213          <resetMask>0xFFFFFFFF</resetMask>
143214          <fields>
143215            <field>
143216              <name>PKHA_N3</name>
143217              <description>N3 VALUE</description>
143218              <bitOffset>0</bitOffset>
143219              <bitWidth>32</bitWidth>
143220              <access>read-write</access>
143221            </field>
143222          </fields>
143223        </register>
143224        <register>
143225          <name>LTC0_PKN_60</name>
143226          <description>LTC PKHA N 60 Register</description>
143227          <alternateGroup>LTC0</alternateGroup>
143228          <addressOffset>0xCF0</addressOffset>
143229          <size>32</size>
143230          <access>read-write</access>
143231          <resetValue>0</resetValue>
143232          <resetMask>0xFFFFFFFF</resetMask>
143233        </register>
143234        <register>
143235          <name>LTC0_PKN3_13</name>
143236          <description>LTC PKHA N3 13 Register</description>
143237          <alternateGroup>LTC0</alternateGroup>
143238          <addressOffset>0xCF4</addressOffset>
143239          <size>32</size>
143240          <access>read-write</access>
143241          <resetValue>0</resetValue>
143242          <resetMask>0xFFFFFFFF</resetMask>
143243          <fields>
143244            <field>
143245              <name>PKHA_N3</name>
143246              <description>N3 VALUE</description>
143247              <bitOffset>0</bitOffset>
143248              <bitWidth>32</bitWidth>
143249              <access>read-write</access>
143250            </field>
143251          </fields>
143252        </register>
143253        <register>
143254          <name>LTC0_PKN_61</name>
143255          <description>LTC PKHA N 61 Register</description>
143256          <alternateGroup>LTC0</alternateGroup>
143257          <addressOffset>0xCF4</addressOffset>
143258          <size>32</size>
143259          <access>read-write</access>
143260          <resetValue>0</resetValue>
143261          <resetMask>0xFFFFFFFF</resetMask>
143262        </register>
143263        <register>
143264          <name>LTC0_PKN3_14</name>
143265          <description>LTC PKHA N3 14 Register</description>
143266          <alternateGroup>LTC0</alternateGroup>
143267          <addressOffset>0xCF8</addressOffset>
143268          <size>32</size>
143269          <access>read-write</access>
143270          <resetValue>0</resetValue>
143271          <resetMask>0xFFFFFFFF</resetMask>
143272          <fields>
143273            <field>
143274              <name>PKHA_N3</name>
143275              <description>N3 VALUE</description>
143276              <bitOffset>0</bitOffset>
143277              <bitWidth>32</bitWidth>
143278              <access>read-write</access>
143279            </field>
143280          </fields>
143281        </register>
143282        <register>
143283          <name>LTC0_PKN_62</name>
143284          <description>LTC PKHA N 62 Register</description>
143285          <alternateGroup>LTC0</alternateGroup>
143286          <addressOffset>0xCF8</addressOffset>
143287          <size>32</size>
143288          <access>read-write</access>
143289          <resetValue>0</resetValue>
143290          <resetMask>0xFFFFFFFF</resetMask>
143291        </register>
143292        <register>
143293          <name>LTC0_PKN3_15</name>
143294          <description>LTC PKHA N3 15 Register</description>
143295          <alternateGroup>LTC0</alternateGroup>
143296          <addressOffset>0xCFC</addressOffset>
143297          <size>32</size>
143298          <access>read-write</access>
143299          <resetValue>0</resetValue>
143300          <resetMask>0xFFFFFFFF</resetMask>
143301          <fields>
143302            <field>
143303              <name>PKHA_N3</name>
143304              <description>N3 VALUE</description>
143305              <bitOffset>0</bitOffset>
143306              <bitWidth>32</bitWidth>
143307              <access>read-write</access>
143308            </field>
143309          </fields>
143310        </register>
143311        <register>
143312          <name>LTC0_PKN_63</name>
143313          <description>LTC PKHA N 63 Register</description>
143314          <alternateGroup>LTC0</alternateGroup>
143315          <addressOffset>0xCFC</addressOffset>
143316          <size>32</size>
143317          <access>read-write</access>
143318          <resetValue>0</resetValue>
143319          <resetMask>0xFFFFFFFF</resetMask>
143320        </register>
143321        <register>
143322          <name>LTC0_PKE0_0</name>
143323          <description>LTC PKHA E0 0 Register</description>
143324          <alternateGroup>LTC0</alternateGroup>
143325          <addressOffset>0xE00</addressOffset>
143326          <size>32</size>
143327          <access>read-write</access>
143328          <resetValue>0</resetValue>
143329          <resetMask>0xFFFFFFFF</resetMask>
143330          <fields>
143331            <field>
143332              <name>PKHA_E0</name>
143333              <description>E0 VALUE</description>
143334              <bitOffset>0</bitOffset>
143335              <bitWidth>32</bitWidth>
143336              <access>read-write</access>
143337            </field>
143338          </fields>
143339        </register>
143340        <register>
143341          <name>LTC0_PKE_0</name>
143342          <description>LTC PKHA E 0 Register</description>
143343          <alternateGroup>LTC0</alternateGroup>
143344          <addressOffset>0xE00</addressOffset>
143345          <size>32</size>
143346          <access>read-write</access>
143347          <resetValue>0</resetValue>
143348          <resetMask>0xFFFFFFFF</resetMask>
143349        </register>
143350        <register>
143351          <name>LTC0_PKE0_1</name>
143352          <description>LTC PKHA E0 1 Register</description>
143353          <alternateGroup>LTC0</alternateGroup>
143354          <addressOffset>0xE04</addressOffset>
143355          <size>32</size>
143356          <access>read-write</access>
143357          <resetValue>0</resetValue>
143358          <resetMask>0xFFFFFFFF</resetMask>
143359          <fields>
143360            <field>
143361              <name>PKHA_E0</name>
143362              <description>E0 VALUE</description>
143363              <bitOffset>0</bitOffset>
143364              <bitWidth>32</bitWidth>
143365              <access>read-write</access>
143366            </field>
143367          </fields>
143368        </register>
143369        <register>
143370          <name>LTC0_PKE_1</name>
143371          <description>LTC PKHA E 1 Register</description>
143372          <alternateGroup>LTC0</alternateGroup>
143373          <addressOffset>0xE04</addressOffset>
143374          <size>32</size>
143375          <access>read-write</access>
143376          <resetValue>0</resetValue>
143377          <resetMask>0xFFFFFFFF</resetMask>
143378        </register>
143379        <register>
143380          <name>LTC0_PKE0_2</name>
143381          <description>LTC PKHA E0 2 Register</description>
143382          <alternateGroup>LTC0</alternateGroup>
143383          <addressOffset>0xE08</addressOffset>
143384          <size>32</size>
143385          <access>read-write</access>
143386          <resetValue>0</resetValue>
143387          <resetMask>0xFFFFFFFF</resetMask>
143388          <fields>
143389            <field>
143390              <name>PKHA_E0</name>
143391              <description>E0 VALUE</description>
143392              <bitOffset>0</bitOffset>
143393              <bitWidth>32</bitWidth>
143394              <access>read-write</access>
143395            </field>
143396          </fields>
143397        </register>
143398        <register>
143399          <name>LTC0_PKE_2</name>
143400          <description>LTC PKHA E 2 Register</description>
143401          <alternateGroup>LTC0</alternateGroup>
143402          <addressOffset>0xE08</addressOffset>
143403          <size>32</size>
143404          <access>read-write</access>
143405          <resetValue>0</resetValue>
143406          <resetMask>0xFFFFFFFF</resetMask>
143407        </register>
143408        <register>
143409          <name>LTC0_PKE0_3</name>
143410          <description>LTC PKHA E0 3 Register</description>
143411          <alternateGroup>LTC0</alternateGroup>
143412          <addressOffset>0xE0C</addressOffset>
143413          <size>32</size>
143414          <access>read-write</access>
143415          <resetValue>0</resetValue>
143416          <resetMask>0xFFFFFFFF</resetMask>
143417          <fields>
143418            <field>
143419              <name>PKHA_E0</name>
143420              <description>E0 VALUE</description>
143421              <bitOffset>0</bitOffset>
143422              <bitWidth>32</bitWidth>
143423              <access>read-write</access>
143424            </field>
143425          </fields>
143426        </register>
143427        <register>
143428          <name>LTC0_PKE_3</name>
143429          <description>LTC PKHA E 3 Register</description>
143430          <alternateGroup>LTC0</alternateGroup>
143431          <addressOffset>0xE0C</addressOffset>
143432          <size>32</size>
143433          <access>read-write</access>
143434          <resetValue>0</resetValue>
143435          <resetMask>0xFFFFFFFF</resetMask>
143436        </register>
143437        <register>
143438          <name>LTC0_PKE0_4</name>
143439          <description>LTC PKHA E0 4 Register</description>
143440          <alternateGroup>LTC0</alternateGroup>
143441          <addressOffset>0xE10</addressOffset>
143442          <size>32</size>
143443          <access>read-write</access>
143444          <resetValue>0</resetValue>
143445          <resetMask>0xFFFFFFFF</resetMask>
143446          <fields>
143447            <field>
143448              <name>PKHA_E0</name>
143449              <description>E0 VALUE</description>
143450              <bitOffset>0</bitOffset>
143451              <bitWidth>32</bitWidth>
143452              <access>read-write</access>
143453            </field>
143454          </fields>
143455        </register>
143456        <register>
143457          <name>LTC0_PKE_4</name>
143458          <description>LTC PKHA E 4 Register</description>
143459          <alternateGroup>LTC0</alternateGroup>
143460          <addressOffset>0xE10</addressOffset>
143461          <size>32</size>
143462          <access>read-write</access>
143463          <resetValue>0</resetValue>
143464          <resetMask>0xFFFFFFFF</resetMask>
143465        </register>
143466        <register>
143467          <name>LTC0_PKE0_5</name>
143468          <description>LTC PKHA E0 5 Register</description>
143469          <alternateGroup>LTC0</alternateGroup>
143470          <addressOffset>0xE14</addressOffset>
143471          <size>32</size>
143472          <access>read-write</access>
143473          <resetValue>0</resetValue>
143474          <resetMask>0xFFFFFFFF</resetMask>
143475          <fields>
143476            <field>
143477              <name>PKHA_E0</name>
143478              <description>E0 VALUE</description>
143479              <bitOffset>0</bitOffset>
143480              <bitWidth>32</bitWidth>
143481              <access>read-write</access>
143482            </field>
143483          </fields>
143484        </register>
143485        <register>
143486          <name>LTC0_PKE_5</name>
143487          <description>LTC PKHA E 5 Register</description>
143488          <alternateGroup>LTC0</alternateGroup>
143489          <addressOffset>0xE14</addressOffset>
143490          <size>32</size>
143491          <access>read-write</access>
143492          <resetValue>0</resetValue>
143493          <resetMask>0xFFFFFFFF</resetMask>
143494        </register>
143495        <register>
143496          <name>LTC0_PKE0_6</name>
143497          <description>LTC PKHA E0 6 Register</description>
143498          <alternateGroup>LTC0</alternateGroup>
143499          <addressOffset>0xE18</addressOffset>
143500          <size>32</size>
143501          <access>read-write</access>
143502          <resetValue>0</resetValue>
143503          <resetMask>0xFFFFFFFF</resetMask>
143504          <fields>
143505            <field>
143506              <name>PKHA_E0</name>
143507              <description>E0 VALUE</description>
143508              <bitOffset>0</bitOffset>
143509              <bitWidth>32</bitWidth>
143510              <access>read-write</access>
143511            </field>
143512          </fields>
143513        </register>
143514        <register>
143515          <name>LTC0_PKE_6</name>
143516          <description>LTC PKHA E 6 Register</description>
143517          <alternateGroup>LTC0</alternateGroup>
143518          <addressOffset>0xE18</addressOffset>
143519          <size>32</size>
143520          <access>read-write</access>
143521          <resetValue>0</resetValue>
143522          <resetMask>0xFFFFFFFF</resetMask>
143523        </register>
143524        <register>
143525          <name>LTC0_PKE0_7</name>
143526          <description>LTC PKHA E0 7 Register</description>
143527          <alternateGroup>LTC0</alternateGroup>
143528          <addressOffset>0xE1C</addressOffset>
143529          <size>32</size>
143530          <access>read-write</access>
143531          <resetValue>0</resetValue>
143532          <resetMask>0xFFFFFFFF</resetMask>
143533          <fields>
143534            <field>
143535              <name>PKHA_E0</name>
143536              <description>E0 VALUE</description>
143537              <bitOffset>0</bitOffset>
143538              <bitWidth>32</bitWidth>
143539              <access>read-write</access>
143540            </field>
143541          </fields>
143542        </register>
143543        <register>
143544          <name>LTC0_PKE_7</name>
143545          <description>LTC PKHA E 7 Register</description>
143546          <alternateGroup>LTC0</alternateGroup>
143547          <addressOffset>0xE1C</addressOffset>
143548          <size>32</size>
143549          <access>read-write</access>
143550          <resetValue>0</resetValue>
143551          <resetMask>0xFFFFFFFF</resetMask>
143552        </register>
143553        <register>
143554          <name>LTC0_PKE0_8</name>
143555          <description>LTC PKHA E0 8 Register</description>
143556          <alternateGroup>LTC0</alternateGroup>
143557          <addressOffset>0xE20</addressOffset>
143558          <size>32</size>
143559          <access>read-write</access>
143560          <resetValue>0</resetValue>
143561          <resetMask>0xFFFFFFFF</resetMask>
143562          <fields>
143563            <field>
143564              <name>PKHA_E0</name>
143565              <description>E0 VALUE</description>
143566              <bitOffset>0</bitOffset>
143567              <bitWidth>32</bitWidth>
143568              <access>read-write</access>
143569            </field>
143570          </fields>
143571        </register>
143572        <register>
143573          <name>LTC0_PKE_8</name>
143574          <description>LTC PKHA E 8 Register</description>
143575          <alternateGroup>LTC0</alternateGroup>
143576          <addressOffset>0xE20</addressOffset>
143577          <size>32</size>
143578          <access>read-write</access>
143579          <resetValue>0</resetValue>
143580          <resetMask>0xFFFFFFFF</resetMask>
143581        </register>
143582        <register>
143583          <name>LTC0_PKE0_9</name>
143584          <description>LTC PKHA E0 9 Register</description>
143585          <alternateGroup>LTC0</alternateGroup>
143586          <addressOffset>0xE24</addressOffset>
143587          <size>32</size>
143588          <access>read-write</access>
143589          <resetValue>0</resetValue>
143590          <resetMask>0xFFFFFFFF</resetMask>
143591          <fields>
143592            <field>
143593              <name>PKHA_E0</name>
143594              <description>E0 VALUE</description>
143595              <bitOffset>0</bitOffset>
143596              <bitWidth>32</bitWidth>
143597              <access>read-write</access>
143598            </field>
143599          </fields>
143600        </register>
143601        <register>
143602          <name>LTC0_PKE_9</name>
143603          <description>LTC PKHA E 9 Register</description>
143604          <alternateGroup>LTC0</alternateGroup>
143605          <addressOffset>0xE24</addressOffset>
143606          <size>32</size>
143607          <access>read-write</access>
143608          <resetValue>0</resetValue>
143609          <resetMask>0xFFFFFFFF</resetMask>
143610        </register>
143611        <register>
143612          <name>LTC0_PKE0_10</name>
143613          <description>LTC PKHA E0 10 Register</description>
143614          <alternateGroup>LTC0</alternateGroup>
143615          <addressOffset>0xE28</addressOffset>
143616          <size>32</size>
143617          <access>read-write</access>
143618          <resetValue>0</resetValue>
143619          <resetMask>0xFFFFFFFF</resetMask>
143620          <fields>
143621            <field>
143622              <name>PKHA_E0</name>
143623              <description>E0 VALUE</description>
143624              <bitOffset>0</bitOffset>
143625              <bitWidth>32</bitWidth>
143626              <access>read-write</access>
143627            </field>
143628          </fields>
143629        </register>
143630        <register>
143631          <name>LTC0_PKE_10</name>
143632          <description>LTC PKHA E 10 Register</description>
143633          <alternateGroup>LTC0</alternateGroup>
143634          <addressOffset>0xE28</addressOffset>
143635          <size>32</size>
143636          <access>read-write</access>
143637          <resetValue>0</resetValue>
143638          <resetMask>0xFFFFFFFF</resetMask>
143639        </register>
143640        <register>
143641          <name>LTC0_PKE0_11</name>
143642          <description>LTC PKHA E0 11 Register</description>
143643          <alternateGroup>LTC0</alternateGroup>
143644          <addressOffset>0xE2C</addressOffset>
143645          <size>32</size>
143646          <access>read-write</access>
143647          <resetValue>0</resetValue>
143648          <resetMask>0xFFFFFFFF</resetMask>
143649          <fields>
143650            <field>
143651              <name>PKHA_E0</name>
143652              <description>E0 VALUE</description>
143653              <bitOffset>0</bitOffset>
143654              <bitWidth>32</bitWidth>
143655              <access>read-write</access>
143656            </field>
143657          </fields>
143658        </register>
143659        <register>
143660          <name>LTC0_PKE_11</name>
143661          <description>LTC PKHA E 11 Register</description>
143662          <alternateGroup>LTC0</alternateGroup>
143663          <addressOffset>0xE2C</addressOffset>
143664          <size>32</size>
143665          <access>read-write</access>
143666          <resetValue>0</resetValue>
143667          <resetMask>0xFFFFFFFF</resetMask>
143668        </register>
143669        <register>
143670          <name>LTC0_PKE0_12</name>
143671          <description>LTC PKHA E0 12 Register</description>
143672          <alternateGroup>LTC0</alternateGroup>
143673          <addressOffset>0xE30</addressOffset>
143674          <size>32</size>
143675          <access>read-write</access>
143676          <resetValue>0</resetValue>
143677          <resetMask>0xFFFFFFFF</resetMask>
143678          <fields>
143679            <field>
143680              <name>PKHA_E0</name>
143681              <description>E0 VALUE</description>
143682              <bitOffset>0</bitOffset>
143683              <bitWidth>32</bitWidth>
143684              <access>read-write</access>
143685            </field>
143686          </fields>
143687        </register>
143688        <register>
143689          <name>LTC0_PKE_12</name>
143690          <description>LTC PKHA E 12 Register</description>
143691          <alternateGroup>LTC0</alternateGroup>
143692          <addressOffset>0xE30</addressOffset>
143693          <size>32</size>
143694          <access>read-write</access>
143695          <resetValue>0</resetValue>
143696          <resetMask>0xFFFFFFFF</resetMask>
143697        </register>
143698        <register>
143699          <name>LTC0_PKE0_13</name>
143700          <description>LTC PKHA E0 13 Register</description>
143701          <alternateGroup>LTC0</alternateGroup>
143702          <addressOffset>0xE34</addressOffset>
143703          <size>32</size>
143704          <access>read-write</access>
143705          <resetValue>0</resetValue>
143706          <resetMask>0xFFFFFFFF</resetMask>
143707          <fields>
143708            <field>
143709              <name>PKHA_E0</name>
143710              <description>E0 VALUE</description>
143711              <bitOffset>0</bitOffset>
143712              <bitWidth>32</bitWidth>
143713              <access>read-write</access>
143714            </field>
143715          </fields>
143716        </register>
143717        <register>
143718          <name>LTC0_PKE_13</name>
143719          <description>LTC PKHA E 13 Register</description>
143720          <alternateGroup>LTC0</alternateGroup>
143721          <addressOffset>0xE34</addressOffset>
143722          <size>32</size>
143723          <access>read-write</access>
143724          <resetValue>0</resetValue>
143725          <resetMask>0xFFFFFFFF</resetMask>
143726        </register>
143727        <register>
143728          <name>LTC0_PKE0_14</name>
143729          <description>LTC PKHA E0 14 Register</description>
143730          <alternateGroup>LTC0</alternateGroup>
143731          <addressOffset>0xE38</addressOffset>
143732          <size>32</size>
143733          <access>read-write</access>
143734          <resetValue>0</resetValue>
143735          <resetMask>0xFFFFFFFF</resetMask>
143736          <fields>
143737            <field>
143738              <name>PKHA_E0</name>
143739              <description>E0 VALUE</description>
143740              <bitOffset>0</bitOffset>
143741              <bitWidth>32</bitWidth>
143742              <access>read-write</access>
143743            </field>
143744          </fields>
143745        </register>
143746        <register>
143747          <name>LTC0_PKE_14</name>
143748          <description>LTC PKHA E 14 Register</description>
143749          <alternateGroup>LTC0</alternateGroup>
143750          <addressOffset>0xE38</addressOffset>
143751          <size>32</size>
143752          <access>read-write</access>
143753          <resetValue>0</resetValue>
143754          <resetMask>0xFFFFFFFF</resetMask>
143755        </register>
143756        <register>
143757          <name>LTC0_PKE0_15</name>
143758          <description>LTC PKHA E0 15 Register</description>
143759          <alternateGroup>LTC0</alternateGroup>
143760          <addressOffset>0xE3C</addressOffset>
143761          <size>32</size>
143762          <access>read-write</access>
143763          <resetValue>0</resetValue>
143764          <resetMask>0xFFFFFFFF</resetMask>
143765          <fields>
143766            <field>
143767              <name>PKHA_E0</name>
143768              <description>E0 VALUE</description>
143769              <bitOffset>0</bitOffset>
143770              <bitWidth>32</bitWidth>
143771              <access>read-write</access>
143772            </field>
143773          </fields>
143774        </register>
143775        <register>
143776          <name>LTC0_PKE_15</name>
143777          <description>LTC PKHA E 15 Register</description>
143778          <alternateGroup>LTC0</alternateGroup>
143779          <addressOffset>0xE3C</addressOffset>
143780          <size>32</size>
143781          <access>read-write</access>
143782          <resetValue>0</resetValue>
143783          <resetMask>0xFFFFFFFF</resetMask>
143784        </register>
143785        <register>
143786          <name>LTC0_PKE1_0</name>
143787          <description>LTC PKHA E1 0 Register</description>
143788          <alternateGroup>LTC0</alternateGroup>
143789          <addressOffset>0xE40</addressOffset>
143790          <size>32</size>
143791          <access>read-write</access>
143792          <resetValue>0</resetValue>
143793          <resetMask>0xFFFFFFFF</resetMask>
143794          <fields>
143795            <field>
143796              <name>PKHA_E1</name>
143797              <description>E1 VALUE</description>
143798              <bitOffset>0</bitOffset>
143799              <bitWidth>32</bitWidth>
143800              <access>read-write</access>
143801            </field>
143802          </fields>
143803        </register>
143804        <register>
143805          <name>LTC0_PKE_16</name>
143806          <description>LTC PKHA E 16 Register</description>
143807          <alternateGroup>LTC0</alternateGroup>
143808          <addressOffset>0xE40</addressOffset>
143809          <size>32</size>
143810          <access>read-write</access>
143811          <resetValue>0</resetValue>
143812          <resetMask>0xFFFFFFFF</resetMask>
143813        </register>
143814        <register>
143815          <name>LTC0_PKE1_1</name>
143816          <description>LTC PKHA E1 1 Register</description>
143817          <alternateGroup>LTC0</alternateGroup>
143818          <addressOffset>0xE44</addressOffset>
143819          <size>32</size>
143820          <access>read-write</access>
143821          <resetValue>0</resetValue>
143822          <resetMask>0xFFFFFFFF</resetMask>
143823          <fields>
143824            <field>
143825              <name>PKHA_E1</name>
143826              <description>E1 VALUE</description>
143827              <bitOffset>0</bitOffset>
143828              <bitWidth>32</bitWidth>
143829              <access>read-write</access>
143830            </field>
143831          </fields>
143832        </register>
143833        <register>
143834          <name>LTC0_PKE_17</name>
143835          <description>LTC PKHA E 17 Register</description>
143836          <alternateGroup>LTC0</alternateGroup>
143837          <addressOffset>0xE44</addressOffset>
143838          <size>32</size>
143839          <access>read-write</access>
143840          <resetValue>0</resetValue>
143841          <resetMask>0xFFFFFFFF</resetMask>
143842        </register>
143843        <register>
143844          <name>LTC0_PKE1_2</name>
143845          <description>LTC PKHA E1 2 Register</description>
143846          <alternateGroup>LTC0</alternateGroup>
143847          <addressOffset>0xE48</addressOffset>
143848          <size>32</size>
143849          <access>read-write</access>
143850          <resetValue>0</resetValue>
143851          <resetMask>0xFFFFFFFF</resetMask>
143852          <fields>
143853            <field>
143854              <name>PKHA_E1</name>
143855              <description>E1 VALUE</description>
143856              <bitOffset>0</bitOffset>
143857              <bitWidth>32</bitWidth>
143858              <access>read-write</access>
143859            </field>
143860          </fields>
143861        </register>
143862        <register>
143863          <name>LTC0_PKE_18</name>
143864          <description>LTC PKHA E 18 Register</description>
143865          <alternateGroup>LTC0</alternateGroup>
143866          <addressOffset>0xE48</addressOffset>
143867          <size>32</size>
143868          <access>read-write</access>
143869          <resetValue>0</resetValue>
143870          <resetMask>0xFFFFFFFF</resetMask>
143871        </register>
143872        <register>
143873          <name>LTC0_PKE1_3</name>
143874          <description>LTC PKHA E1 3 Register</description>
143875          <alternateGroup>LTC0</alternateGroup>
143876          <addressOffset>0xE4C</addressOffset>
143877          <size>32</size>
143878          <access>read-write</access>
143879          <resetValue>0</resetValue>
143880          <resetMask>0xFFFFFFFF</resetMask>
143881          <fields>
143882            <field>
143883              <name>PKHA_E1</name>
143884              <description>E1 VALUE</description>
143885              <bitOffset>0</bitOffset>
143886              <bitWidth>32</bitWidth>
143887              <access>read-write</access>
143888            </field>
143889          </fields>
143890        </register>
143891        <register>
143892          <name>LTC0_PKE_19</name>
143893          <description>LTC PKHA E 19 Register</description>
143894          <alternateGroup>LTC0</alternateGroup>
143895          <addressOffset>0xE4C</addressOffset>
143896          <size>32</size>
143897          <access>read-write</access>
143898          <resetValue>0</resetValue>
143899          <resetMask>0xFFFFFFFF</resetMask>
143900        </register>
143901        <register>
143902          <name>LTC0_PKE1_4</name>
143903          <description>LTC PKHA E1 4 Register</description>
143904          <alternateGroup>LTC0</alternateGroup>
143905          <addressOffset>0xE50</addressOffset>
143906          <size>32</size>
143907          <access>read-write</access>
143908          <resetValue>0</resetValue>
143909          <resetMask>0xFFFFFFFF</resetMask>
143910          <fields>
143911            <field>
143912              <name>PKHA_E1</name>
143913              <description>E1 VALUE</description>
143914              <bitOffset>0</bitOffset>
143915              <bitWidth>32</bitWidth>
143916              <access>read-write</access>
143917            </field>
143918          </fields>
143919        </register>
143920        <register>
143921          <name>LTC0_PKE_20</name>
143922          <description>LTC PKHA E 20 Register</description>
143923          <alternateGroup>LTC0</alternateGroup>
143924          <addressOffset>0xE50</addressOffset>
143925          <size>32</size>
143926          <access>read-write</access>
143927          <resetValue>0</resetValue>
143928          <resetMask>0xFFFFFFFF</resetMask>
143929        </register>
143930        <register>
143931          <name>LTC0_PKE1_5</name>
143932          <description>LTC PKHA E1 5 Register</description>
143933          <alternateGroup>LTC0</alternateGroup>
143934          <addressOffset>0xE54</addressOffset>
143935          <size>32</size>
143936          <access>read-write</access>
143937          <resetValue>0</resetValue>
143938          <resetMask>0xFFFFFFFF</resetMask>
143939          <fields>
143940            <field>
143941              <name>PKHA_E1</name>
143942              <description>E1 VALUE</description>
143943              <bitOffset>0</bitOffset>
143944              <bitWidth>32</bitWidth>
143945              <access>read-write</access>
143946            </field>
143947          </fields>
143948        </register>
143949        <register>
143950          <name>LTC0_PKE_21</name>
143951          <description>LTC PKHA E 21 Register</description>
143952          <alternateGroup>LTC0</alternateGroup>
143953          <addressOffset>0xE54</addressOffset>
143954          <size>32</size>
143955          <access>read-write</access>
143956          <resetValue>0</resetValue>
143957          <resetMask>0xFFFFFFFF</resetMask>
143958        </register>
143959        <register>
143960          <name>LTC0_PKE1_6</name>
143961          <description>LTC PKHA E1 6 Register</description>
143962          <alternateGroup>LTC0</alternateGroup>
143963          <addressOffset>0xE58</addressOffset>
143964          <size>32</size>
143965          <access>read-write</access>
143966          <resetValue>0</resetValue>
143967          <resetMask>0xFFFFFFFF</resetMask>
143968          <fields>
143969            <field>
143970              <name>PKHA_E1</name>
143971              <description>E1 VALUE</description>
143972              <bitOffset>0</bitOffset>
143973              <bitWidth>32</bitWidth>
143974              <access>read-write</access>
143975            </field>
143976          </fields>
143977        </register>
143978        <register>
143979          <name>LTC0_PKE_22</name>
143980          <description>LTC PKHA E 22 Register</description>
143981          <alternateGroup>LTC0</alternateGroup>
143982          <addressOffset>0xE58</addressOffset>
143983          <size>32</size>
143984          <access>read-write</access>
143985          <resetValue>0</resetValue>
143986          <resetMask>0xFFFFFFFF</resetMask>
143987        </register>
143988        <register>
143989          <name>LTC0_PKE1_7</name>
143990          <description>LTC PKHA E1 7 Register</description>
143991          <alternateGroup>LTC0</alternateGroup>
143992          <addressOffset>0xE5C</addressOffset>
143993          <size>32</size>
143994          <access>read-write</access>
143995          <resetValue>0</resetValue>
143996          <resetMask>0xFFFFFFFF</resetMask>
143997          <fields>
143998            <field>
143999              <name>PKHA_E1</name>
144000              <description>E1 VALUE</description>
144001              <bitOffset>0</bitOffset>
144002              <bitWidth>32</bitWidth>
144003              <access>read-write</access>
144004            </field>
144005          </fields>
144006        </register>
144007        <register>
144008          <name>LTC0_PKE_23</name>
144009          <description>LTC PKHA E 23 Register</description>
144010          <alternateGroup>LTC0</alternateGroup>
144011          <addressOffset>0xE5C</addressOffset>
144012          <size>32</size>
144013          <access>read-write</access>
144014          <resetValue>0</resetValue>
144015          <resetMask>0xFFFFFFFF</resetMask>
144016        </register>
144017        <register>
144018          <name>LTC0_PKE1_8</name>
144019          <description>LTC PKHA E1 8 Register</description>
144020          <alternateGroup>LTC0</alternateGroup>
144021          <addressOffset>0xE60</addressOffset>
144022          <size>32</size>
144023          <access>read-write</access>
144024          <resetValue>0</resetValue>
144025          <resetMask>0xFFFFFFFF</resetMask>
144026          <fields>
144027            <field>
144028              <name>PKHA_E1</name>
144029              <description>E1 VALUE</description>
144030              <bitOffset>0</bitOffset>
144031              <bitWidth>32</bitWidth>
144032              <access>read-write</access>
144033            </field>
144034          </fields>
144035        </register>
144036        <register>
144037          <name>LTC0_PKE_24</name>
144038          <description>LTC PKHA E 24 Register</description>
144039          <alternateGroup>LTC0</alternateGroup>
144040          <addressOffset>0xE60</addressOffset>
144041          <size>32</size>
144042          <access>read-write</access>
144043          <resetValue>0</resetValue>
144044          <resetMask>0xFFFFFFFF</resetMask>
144045        </register>
144046        <register>
144047          <name>LTC0_PKE1_9</name>
144048          <description>LTC PKHA E1 9 Register</description>
144049          <alternateGroup>LTC0</alternateGroup>
144050          <addressOffset>0xE64</addressOffset>
144051          <size>32</size>
144052          <access>read-write</access>
144053          <resetValue>0</resetValue>
144054          <resetMask>0xFFFFFFFF</resetMask>
144055          <fields>
144056            <field>
144057              <name>PKHA_E1</name>
144058              <description>E1 VALUE</description>
144059              <bitOffset>0</bitOffset>
144060              <bitWidth>32</bitWidth>
144061              <access>read-write</access>
144062            </field>
144063          </fields>
144064        </register>
144065        <register>
144066          <name>LTC0_PKE_25</name>
144067          <description>LTC PKHA E 25 Register</description>
144068          <alternateGroup>LTC0</alternateGroup>
144069          <addressOffset>0xE64</addressOffset>
144070          <size>32</size>
144071          <access>read-write</access>
144072          <resetValue>0</resetValue>
144073          <resetMask>0xFFFFFFFF</resetMask>
144074        </register>
144075        <register>
144076          <name>LTC0_PKE1_10</name>
144077          <description>LTC PKHA E1 10 Register</description>
144078          <alternateGroup>LTC0</alternateGroup>
144079          <addressOffset>0xE68</addressOffset>
144080          <size>32</size>
144081          <access>read-write</access>
144082          <resetValue>0</resetValue>
144083          <resetMask>0xFFFFFFFF</resetMask>
144084          <fields>
144085            <field>
144086              <name>PKHA_E1</name>
144087              <description>E1 VALUE</description>
144088              <bitOffset>0</bitOffset>
144089              <bitWidth>32</bitWidth>
144090              <access>read-write</access>
144091            </field>
144092          </fields>
144093        </register>
144094        <register>
144095          <name>LTC0_PKE_26</name>
144096          <description>LTC PKHA E 26 Register</description>
144097          <alternateGroup>LTC0</alternateGroup>
144098          <addressOffset>0xE68</addressOffset>
144099          <size>32</size>
144100          <access>read-write</access>
144101          <resetValue>0</resetValue>
144102          <resetMask>0xFFFFFFFF</resetMask>
144103        </register>
144104        <register>
144105          <name>LTC0_PKE1_11</name>
144106          <description>LTC PKHA E1 11 Register</description>
144107          <alternateGroup>LTC0</alternateGroup>
144108          <addressOffset>0xE6C</addressOffset>
144109          <size>32</size>
144110          <access>read-write</access>
144111          <resetValue>0</resetValue>
144112          <resetMask>0xFFFFFFFF</resetMask>
144113          <fields>
144114            <field>
144115              <name>PKHA_E1</name>
144116              <description>E1 VALUE</description>
144117              <bitOffset>0</bitOffset>
144118              <bitWidth>32</bitWidth>
144119              <access>read-write</access>
144120            </field>
144121          </fields>
144122        </register>
144123        <register>
144124          <name>LTC0_PKE_27</name>
144125          <description>LTC PKHA E 27 Register</description>
144126          <alternateGroup>LTC0</alternateGroup>
144127          <addressOffset>0xE6C</addressOffset>
144128          <size>32</size>
144129          <access>read-write</access>
144130          <resetValue>0</resetValue>
144131          <resetMask>0xFFFFFFFF</resetMask>
144132        </register>
144133        <register>
144134          <name>LTC0_PKE1_12</name>
144135          <description>LTC PKHA E1 12 Register</description>
144136          <alternateGroup>LTC0</alternateGroup>
144137          <addressOffset>0xE70</addressOffset>
144138          <size>32</size>
144139          <access>read-write</access>
144140          <resetValue>0</resetValue>
144141          <resetMask>0xFFFFFFFF</resetMask>
144142          <fields>
144143            <field>
144144              <name>PKHA_E1</name>
144145              <description>E1 VALUE</description>
144146              <bitOffset>0</bitOffset>
144147              <bitWidth>32</bitWidth>
144148              <access>read-write</access>
144149            </field>
144150          </fields>
144151        </register>
144152        <register>
144153          <name>LTC0_PKE_28</name>
144154          <description>LTC PKHA E 28 Register</description>
144155          <alternateGroup>LTC0</alternateGroup>
144156          <addressOffset>0xE70</addressOffset>
144157          <size>32</size>
144158          <access>read-write</access>
144159          <resetValue>0</resetValue>
144160          <resetMask>0xFFFFFFFF</resetMask>
144161        </register>
144162        <register>
144163          <name>LTC0_PKE1_13</name>
144164          <description>LTC PKHA E1 13 Register</description>
144165          <alternateGroup>LTC0</alternateGroup>
144166          <addressOffset>0xE74</addressOffset>
144167          <size>32</size>
144168          <access>read-write</access>
144169          <resetValue>0</resetValue>
144170          <resetMask>0xFFFFFFFF</resetMask>
144171          <fields>
144172            <field>
144173              <name>PKHA_E1</name>
144174              <description>E1 VALUE</description>
144175              <bitOffset>0</bitOffset>
144176              <bitWidth>32</bitWidth>
144177              <access>read-write</access>
144178            </field>
144179          </fields>
144180        </register>
144181        <register>
144182          <name>LTC0_PKE_29</name>
144183          <description>LTC PKHA E 29 Register</description>
144184          <alternateGroup>LTC0</alternateGroup>
144185          <addressOffset>0xE74</addressOffset>
144186          <size>32</size>
144187          <access>read-write</access>
144188          <resetValue>0</resetValue>
144189          <resetMask>0xFFFFFFFF</resetMask>
144190        </register>
144191        <register>
144192          <name>LTC0_PKE1_14</name>
144193          <description>LTC PKHA E1 14 Register</description>
144194          <alternateGroup>LTC0</alternateGroup>
144195          <addressOffset>0xE78</addressOffset>
144196          <size>32</size>
144197          <access>read-write</access>
144198          <resetValue>0</resetValue>
144199          <resetMask>0xFFFFFFFF</resetMask>
144200          <fields>
144201            <field>
144202              <name>PKHA_E1</name>
144203              <description>E1 VALUE</description>
144204              <bitOffset>0</bitOffset>
144205              <bitWidth>32</bitWidth>
144206              <access>read-write</access>
144207            </field>
144208          </fields>
144209        </register>
144210        <register>
144211          <name>LTC0_PKE_30</name>
144212          <description>LTC PKHA E 30 Register</description>
144213          <alternateGroup>LTC0</alternateGroup>
144214          <addressOffset>0xE78</addressOffset>
144215          <size>32</size>
144216          <access>read-write</access>
144217          <resetValue>0</resetValue>
144218          <resetMask>0xFFFFFFFF</resetMask>
144219        </register>
144220        <register>
144221          <name>LTC0_PKE1_15</name>
144222          <description>LTC PKHA E1 15 Register</description>
144223          <alternateGroup>LTC0</alternateGroup>
144224          <addressOffset>0xE7C</addressOffset>
144225          <size>32</size>
144226          <access>read-write</access>
144227          <resetValue>0</resetValue>
144228          <resetMask>0xFFFFFFFF</resetMask>
144229          <fields>
144230            <field>
144231              <name>PKHA_E1</name>
144232              <description>E1 VALUE</description>
144233              <bitOffset>0</bitOffset>
144234              <bitWidth>32</bitWidth>
144235              <access>read-write</access>
144236            </field>
144237          </fields>
144238        </register>
144239        <register>
144240          <name>LTC0_PKE_31</name>
144241          <description>LTC PKHA E 31 Register</description>
144242          <alternateGroup>LTC0</alternateGroup>
144243          <addressOffset>0xE7C</addressOffset>
144244          <size>32</size>
144245          <access>read-write</access>
144246          <resetValue>0</resetValue>
144247          <resetMask>0xFFFFFFFF</resetMask>
144248        </register>
144249        <register>
144250          <name>LTC0_PKE2_0</name>
144251          <description>LTC PKHA E2 0 Register</description>
144252          <alternateGroup>LTC0</alternateGroup>
144253          <addressOffset>0xE80</addressOffset>
144254          <size>32</size>
144255          <access>read-write</access>
144256          <resetValue>0</resetValue>
144257          <resetMask>0xFFFFFFFF</resetMask>
144258          <fields>
144259            <field>
144260              <name>PKHA_E2</name>
144261              <description>E2 VALUE</description>
144262              <bitOffset>0</bitOffset>
144263              <bitWidth>32</bitWidth>
144264              <access>read-write</access>
144265            </field>
144266          </fields>
144267        </register>
144268        <register>
144269          <name>LTC0_PKE_32</name>
144270          <description>LTC PKHA E 32 Register</description>
144271          <alternateGroup>LTC0</alternateGroup>
144272          <addressOffset>0xE80</addressOffset>
144273          <size>32</size>
144274          <access>read-write</access>
144275          <resetValue>0</resetValue>
144276          <resetMask>0xFFFFFFFF</resetMask>
144277        </register>
144278        <register>
144279          <name>LTC0_PKE2_1</name>
144280          <description>LTC PKHA E2 1 Register</description>
144281          <alternateGroup>LTC0</alternateGroup>
144282          <addressOffset>0xE84</addressOffset>
144283          <size>32</size>
144284          <access>read-write</access>
144285          <resetValue>0</resetValue>
144286          <resetMask>0xFFFFFFFF</resetMask>
144287          <fields>
144288            <field>
144289              <name>PKHA_E2</name>
144290              <description>E2 VALUE</description>
144291              <bitOffset>0</bitOffset>
144292              <bitWidth>32</bitWidth>
144293              <access>read-write</access>
144294            </field>
144295          </fields>
144296        </register>
144297        <register>
144298          <name>LTC0_PKE_33</name>
144299          <description>LTC PKHA E 33 Register</description>
144300          <alternateGroup>LTC0</alternateGroup>
144301          <addressOffset>0xE84</addressOffset>
144302          <size>32</size>
144303          <access>read-write</access>
144304          <resetValue>0</resetValue>
144305          <resetMask>0xFFFFFFFF</resetMask>
144306        </register>
144307        <register>
144308          <name>LTC0_PKE2_2</name>
144309          <description>LTC PKHA E2 2 Register</description>
144310          <alternateGroup>LTC0</alternateGroup>
144311          <addressOffset>0xE88</addressOffset>
144312          <size>32</size>
144313          <access>read-write</access>
144314          <resetValue>0</resetValue>
144315          <resetMask>0xFFFFFFFF</resetMask>
144316          <fields>
144317            <field>
144318              <name>PKHA_E2</name>
144319              <description>E2 VALUE</description>
144320              <bitOffset>0</bitOffset>
144321              <bitWidth>32</bitWidth>
144322              <access>read-write</access>
144323            </field>
144324          </fields>
144325        </register>
144326        <register>
144327          <name>LTC0_PKE_34</name>
144328          <description>LTC PKHA E 34 Register</description>
144329          <alternateGroup>LTC0</alternateGroup>
144330          <addressOffset>0xE88</addressOffset>
144331          <size>32</size>
144332          <access>read-write</access>
144333          <resetValue>0</resetValue>
144334          <resetMask>0xFFFFFFFF</resetMask>
144335        </register>
144336        <register>
144337          <name>LTC0_PKE2_3</name>
144338          <description>LTC PKHA E2 3 Register</description>
144339          <alternateGroup>LTC0</alternateGroup>
144340          <addressOffset>0xE8C</addressOffset>
144341          <size>32</size>
144342          <access>read-write</access>
144343          <resetValue>0</resetValue>
144344          <resetMask>0xFFFFFFFF</resetMask>
144345          <fields>
144346            <field>
144347              <name>PKHA_E2</name>
144348              <description>E2 VALUE</description>
144349              <bitOffset>0</bitOffset>
144350              <bitWidth>32</bitWidth>
144351              <access>read-write</access>
144352            </field>
144353          </fields>
144354        </register>
144355        <register>
144356          <name>LTC0_PKE_35</name>
144357          <description>LTC PKHA E 35 Register</description>
144358          <alternateGroup>LTC0</alternateGroup>
144359          <addressOffset>0xE8C</addressOffset>
144360          <size>32</size>
144361          <access>read-write</access>
144362          <resetValue>0</resetValue>
144363          <resetMask>0xFFFFFFFF</resetMask>
144364        </register>
144365        <register>
144366          <name>LTC0_PKE2_4</name>
144367          <description>LTC PKHA E2 4 Register</description>
144368          <alternateGroup>LTC0</alternateGroup>
144369          <addressOffset>0xE90</addressOffset>
144370          <size>32</size>
144371          <access>read-write</access>
144372          <resetValue>0</resetValue>
144373          <resetMask>0xFFFFFFFF</resetMask>
144374          <fields>
144375            <field>
144376              <name>PKHA_E2</name>
144377              <description>E2 VALUE</description>
144378              <bitOffset>0</bitOffset>
144379              <bitWidth>32</bitWidth>
144380              <access>read-write</access>
144381            </field>
144382          </fields>
144383        </register>
144384        <register>
144385          <name>LTC0_PKE_36</name>
144386          <description>LTC PKHA E 36 Register</description>
144387          <alternateGroup>LTC0</alternateGroup>
144388          <addressOffset>0xE90</addressOffset>
144389          <size>32</size>
144390          <access>read-write</access>
144391          <resetValue>0</resetValue>
144392          <resetMask>0xFFFFFFFF</resetMask>
144393        </register>
144394        <register>
144395          <name>LTC0_PKE2_5</name>
144396          <description>LTC PKHA E2 5 Register</description>
144397          <alternateGroup>LTC0</alternateGroup>
144398          <addressOffset>0xE94</addressOffset>
144399          <size>32</size>
144400          <access>read-write</access>
144401          <resetValue>0</resetValue>
144402          <resetMask>0xFFFFFFFF</resetMask>
144403          <fields>
144404            <field>
144405              <name>PKHA_E2</name>
144406              <description>E2 VALUE</description>
144407              <bitOffset>0</bitOffset>
144408              <bitWidth>32</bitWidth>
144409              <access>read-write</access>
144410            </field>
144411          </fields>
144412        </register>
144413        <register>
144414          <name>LTC0_PKE_37</name>
144415          <description>LTC PKHA E 37 Register</description>
144416          <alternateGroup>LTC0</alternateGroup>
144417          <addressOffset>0xE94</addressOffset>
144418          <size>32</size>
144419          <access>read-write</access>
144420          <resetValue>0</resetValue>
144421          <resetMask>0xFFFFFFFF</resetMask>
144422        </register>
144423        <register>
144424          <name>LTC0_PKE2_6</name>
144425          <description>LTC PKHA E2 6 Register</description>
144426          <alternateGroup>LTC0</alternateGroup>
144427          <addressOffset>0xE98</addressOffset>
144428          <size>32</size>
144429          <access>read-write</access>
144430          <resetValue>0</resetValue>
144431          <resetMask>0xFFFFFFFF</resetMask>
144432          <fields>
144433            <field>
144434              <name>PKHA_E2</name>
144435              <description>E2 VALUE</description>
144436              <bitOffset>0</bitOffset>
144437              <bitWidth>32</bitWidth>
144438              <access>read-write</access>
144439            </field>
144440          </fields>
144441        </register>
144442        <register>
144443          <name>LTC0_PKE_38</name>
144444          <description>LTC PKHA E 38 Register</description>
144445          <alternateGroup>LTC0</alternateGroup>
144446          <addressOffset>0xE98</addressOffset>
144447          <size>32</size>
144448          <access>read-write</access>
144449          <resetValue>0</resetValue>
144450          <resetMask>0xFFFFFFFF</resetMask>
144451        </register>
144452        <register>
144453          <name>LTC0_PKE2_7</name>
144454          <description>LTC PKHA E2 7 Register</description>
144455          <alternateGroup>LTC0</alternateGroup>
144456          <addressOffset>0xE9C</addressOffset>
144457          <size>32</size>
144458          <access>read-write</access>
144459          <resetValue>0</resetValue>
144460          <resetMask>0xFFFFFFFF</resetMask>
144461          <fields>
144462            <field>
144463              <name>PKHA_E2</name>
144464              <description>E2 VALUE</description>
144465              <bitOffset>0</bitOffset>
144466              <bitWidth>32</bitWidth>
144467              <access>read-write</access>
144468            </field>
144469          </fields>
144470        </register>
144471        <register>
144472          <name>LTC0_PKE_39</name>
144473          <description>LTC PKHA E 39 Register</description>
144474          <alternateGroup>LTC0</alternateGroup>
144475          <addressOffset>0xE9C</addressOffset>
144476          <size>32</size>
144477          <access>read-write</access>
144478          <resetValue>0</resetValue>
144479          <resetMask>0xFFFFFFFF</resetMask>
144480        </register>
144481        <register>
144482          <name>LTC0_PKE2_8</name>
144483          <description>LTC PKHA E2 8 Register</description>
144484          <alternateGroup>LTC0</alternateGroup>
144485          <addressOffset>0xEA0</addressOffset>
144486          <size>32</size>
144487          <access>read-write</access>
144488          <resetValue>0</resetValue>
144489          <resetMask>0xFFFFFFFF</resetMask>
144490          <fields>
144491            <field>
144492              <name>PKHA_E2</name>
144493              <description>E2 VALUE</description>
144494              <bitOffset>0</bitOffset>
144495              <bitWidth>32</bitWidth>
144496              <access>read-write</access>
144497            </field>
144498          </fields>
144499        </register>
144500        <register>
144501          <name>LTC0_PKE_40</name>
144502          <description>LTC PKHA E 40 Register</description>
144503          <alternateGroup>LTC0</alternateGroup>
144504          <addressOffset>0xEA0</addressOffset>
144505          <size>32</size>
144506          <access>read-write</access>
144507          <resetValue>0</resetValue>
144508          <resetMask>0xFFFFFFFF</resetMask>
144509        </register>
144510        <register>
144511          <name>LTC0_PKE2_9</name>
144512          <description>LTC PKHA E2 9 Register</description>
144513          <alternateGroup>LTC0</alternateGroup>
144514          <addressOffset>0xEA4</addressOffset>
144515          <size>32</size>
144516          <access>read-write</access>
144517          <resetValue>0</resetValue>
144518          <resetMask>0xFFFFFFFF</resetMask>
144519          <fields>
144520            <field>
144521              <name>PKHA_E2</name>
144522              <description>E2 VALUE</description>
144523              <bitOffset>0</bitOffset>
144524              <bitWidth>32</bitWidth>
144525              <access>read-write</access>
144526            </field>
144527          </fields>
144528        </register>
144529        <register>
144530          <name>LTC0_PKE_41</name>
144531          <description>LTC PKHA E 41 Register</description>
144532          <alternateGroup>LTC0</alternateGroup>
144533          <addressOffset>0xEA4</addressOffset>
144534          <size>32</size>
144535          <access>read-write</access>
144536          <resetValue>0</resetValue>
144537          <resetMask>0xFFFFFFFF</resetMask>
144538        </register>
144539        <register>
144540          <name>LTC0_PKE2_10</name>
144541          <description>LTC PKHA E2 10 Register</description>
144542          <alternateGroup>LTC0</alternateGroup>
144543          <addressOffset>0xEA8</addressOffset>
144544          <size>32</size>
144545          <access>read-write</access>
144546          <resetValue>0</resetValue>
144547          <resetMask>0xFFFFFFFF</resetMask>
144548          <fields>
144549            <field>
144550              <name>PKHA_E2</name>
144551              <description>E2 VALUE</description>
144552              <bitOffset>0</bitOffset>
144553              <bitWidth>32</bitWidth>
144554              <access>read-write</access>
144555            </field>
144556          </fields>
144557        </register>
144558        <register>
144559          <name>LTC0_PKE_42</name>
144560          <description>LTC PKHA E 42 Register</description>
144561          <alternateGroup>LTC0</alternateGroup>
144562          <addressOffset>0xEA8</addressOffset>
144563          <size>32</size>
144564          <access>read-write</access>
144565          <resetValue>0</resetValue>
144566          <resetMask>0xFFFFFFFF</resetMask>
144567        </register>
144568        <register>
144569          <name>LTC0_PKE2_11</name>
144570          <description>LTC PKHA E2 11 Register</description>
144571          <alternateGroup>LTC0</alternateGroup>
144572          <addressOffset>0xEAC</addressOffset>
144573          <size>32</size>
144574          <access>read-write</access>
144575          <resetValue>0</resetValue>
144576          <resetMask>0xFFFFFFFF</resetMask>
144577          <fields>
144578            <field>
144579              <name>PKHA_E2</name>
144580              <description>E2 VALUE</description>
144581              <bitOffset>0</bitOffset>
144582              <bitWidth>32</bitWidth>
144583              <access>read-write</access>
144584            </field>
144585          </fields>
144586        </register>
144587        <register>
144588          <name>LTC0_PKE_43</name>
144589          <description>LTC PKHA E 43 Register</description>
144590          <alternateGroup>LTC0</alternateGroup>
144591          <addressOffset>0xEAC</addressOffset>
144592          <size>32</size>
144593          <access>read-write</access>
144594          <resetValue>0</resetValue>
144595          <resetMask>0xFFFFFFFF</resetMask>
144596        </register>
144597        <register>
144598          <name>LTC0_PKE2_12</name>
144599          <description>LTC PKHA E2 12 Register</description>
144600          <alternateGroup>LTC0</alternateGroup>
144601          <addressOffset>0xEB0</addressOffset>
144602          <size>32</size>
144603          <access>read-write</access>
144604          <resetValue>0</resetValue>
144605          <resetMask>0xFFFFFFFF</resetMask>
144606          <fields>
144607            <field>
144608              <name>PKHA_E2</name>
144609              <description>E2 VALUE</description>
144610              <bitOffset>0</bitOffset>
144611              <bitWidth>32</bitWidth>
144612              <access>read-write</access>
144613            </field>
144614          </fields>
144615        </register>
144616        <register>
144617          <name>LTC0_PKE_44</name>
144618          <description>LTC PKHA E 44 Register</description>
144619          <alternateGroup>LTC0</alternateGroup>
144620          <addressOffset>0xEB0</addressOffset>
144621          <size>32</size>
144622          <access>read-write</access>
144623          <resetValue>0</resetValue>
144624          <resetMask>0xFFFFFFFF</resetMask>
144625        </register>
144626        <register>
144627          <name>LTC0_PKE2_13</name>
144628          <description>LTC PKHA E2 13 Register</description>
144629          <alternateGroup>LTC0</alternateGroup>
144630          <addressOffset>0xEB4</addressOffset>
144631          <size>32</size>
144632          <access>read-write</access>
144633          <resetValue>0</resetValue>
144634          <resetMask>0xFFFFFFFF</resetMask>
144635          <fields>
144636            <field>
144637              <name>PKHA_E2</name>
144638              <description>E2 VALUE</description>
144639              <bitOffset>0</bitOffset>
144640              <bitWidth>32</bitWidth>
144641              <access>read-write</access>
144642            </field>
144643          </fields>
144644        </register>
144645        <register>
144646          <name>LTC0_PKE_45</name>
144647          <description>LTC PKHA E 45 Register</description>
144648          <alternateGroup>LTC0</alternateGroup>
144649          <addressOffset>0xEB4</addressOffset>
144650          <size>32</size>
144651          <access>read-write</access>
144652          <resetValue>0</resetValue>
144653          <resetMask>0xFFFFFFFF</resetMask>
144654        </register>
144655        <register>
144656          <name>LTC0_PKE2_14</name>
144657          <description>LTC PKHA E2 14 Register</description>
144658          <alternateGroup>LTC0</alternateGroup>
144659          <addressOffset>0xEB8</addressOffset>
144660          <size>32</size>
144661          <access>read-write</access>
144662          <resetValue>0</resetValue>
144663          <resetMask>0xFFFFFFFF</resetMask>
144664          <fields>
144665            <field>
144666              <name>PKHA_E2</name>
144667              <description>E2 VALUE</description>
144668              <bitOffset>0</bitOffset>
144669              <bitWidth>32</bitWidth>
144670              <access>read-write</access>
144671            </field>
144672          </fields>
144673        </register>
144674        <register>
144675          <name>LTC0_PKE_46</name>
144676          <description>LTC PKHA E 46 Register</description>
144677          <alternateGroup>LTC0</alternateGroup>
144678          <addressOffset>0xEB8</addressOffset>
144679          <size>32</size>
144680          <access>read-write</access>
144681          <resetValue>0</resetValue>
144682          <resetMask>0xFFFFFFFF</resetMask>
144683        </register>
144684        <register>
144685          <name>LTC0_PKE2_15</name>
144686          <description>LTC PKHA E2 15 Register</description>
144687          <alternateGroup>LTC0</alternateGroup>
144688          <addressOffset>0xEBC</addressOffset>
144689          <size>32</size>
144690          <access>read-write</access>
144691          <resetValue>0</resetValue>
144692          <resetMask>0xFFFFFFFF</resetMask>
144693          <fields>
144694            <field>
144695              <name>PKHA_E2</name>
144696              <description>E2 VALUE</description>
144697              <bitOffset>0</bitOffset>
144698              <bitWidth>32</bitWidth>
144699              <access>read-write</access>
144700            </field>
144701          </fields>
144702        </register>
144703        <register>
144704          <name>LTC0_PKE_47</name>
144705          <description>LTC PKHA E 47 Register</description>
144706          <alternateGroup>LTC0</alternateGroup>
144707          <addressOffset>0xEBC</addressOffset>
144708          <size>32</size>
144709          <access>read-write</access>
144710          <resetValue>0</resetValue>
144711          <resetMask>0xFFFFFFFF</resetMask>
144712        </register>
144713        <register>
144714          <name>LTC0_PKE3_0</name>
144715          <description>LTC PKHA E3 0 Register</description>
144716          <alternateGroup>LTC0</alternateGroup>
144717          <addressOffset>0xEC0</addressOffset>
144718          <size>32</size>
144719          <access>read-write</access>
144720          <resetValue>0</resetValue>
144721          <resetMask>0xFFFFFFFF</resetMask>
144722          <fields>
144723            <field>
144724              <name>PKHA_E3</name>
144725              <description>E3 VALUE</description>
144726              <bitOffset>0</bitOffset>
144727              <bitWidth>32</bitWidth>
144728              <access>read-write</access>
144729            </field>
144730          </fields>
144731        </register>
144732        <register>
144733          <name>LTC0_PKE_48</name>
144734          <description>LTC PKHA E 48 Register</description>
144735          <alternateGroup>LTC0</alternateGroup>
144736          <addressOffset>0xEC0</addressOffset>
144737          <size>32</size>
144738          <access>read-write</access>
144739          <resetValue>0</resetValue>
144740          <resetMask>0xFFFFFFFF</resetMask>
144741        </register>
144742        <register>
144743          <name>LTC0_PKE3_1</name>
144744          <description>LTC PKHA E3 1 Register</description>
144745          <alternateGroup>LTC0</alternateGroup>
144746          <addressOffset>0xEC4</addressOffset>
144747          <size>32</size>
144748          <access>read-write</access>
144749          <resetValue>0</resetValue>
144750          <resetMask>0xFFFFFFFF</resetMask>
144751          <fields>
144752            <field>
144753              <name>PKHA_E3</name>
144754              <description>E3 VALUE</description>
144755              <bitOffset>0</bitOffset>
144756              <bitWidth>32</bitWidth>
144757              <access>read-write</access>
144758            </field>
144759          </fields>
144760        </register>
144761        <register>
144762          <name>LTC0_PKE_49</name>
144763          <description>LTC PKHA E 49 Register</description>
144764          <alternateGroup>LTC0</alternateGroup>
144765          <addressOffset>0xEC4</addressOffset>
144766          <size>32</size>
144767          <access>read-write</access>
144768          <resetValue>0</resetValue>
144769          <resetMask>0xFFFFFFFF</resetMask>
144770        </register>
144771        <register>
144772          <name>LTC0_PKE3_2</name>
144773          <description>LTC PKHA E3 2 Register</description>
144774          <alternateGroup>LTC0</alternateGroup>
144775          <addressOffset>0xEC8</addressOffset>
144776          <size>32</size>
144777          <access>read-write</access>
144778          <resetValue>0</resetValue>
144779          <resetMask>0xFFFFFFFF</resetMask>
144780          <fields>
144781            <field>
144782              <name>PKHA_E3</name>
144783              <description>E3 VALUE</description>
144784              <bitOffset>0</bitOffset>
144785              <bitWidth>32</bitWidth>
144786              <access>read-write</access>
144787            </field>
144788          </fields>
144789        </register>
144790        <register>
144791          <name>LTC0_PKE_50</name>
144792          <description>LTC PKHA E 50 Register</description>
144793          <alternateGroup>LTC0</alternateGroup>
144794          <addressOffset>0xEC8</addressOffset>
144795          <size>32</size>
144796          <access>read-write</access>
144797          <resetValue>0</resetValue>
144798          <resetMask>0xFFFFFFFF</resetMask>
144799        </register>
144800        <register>
144801          <name>LTC0_PKE3_3</name>
144802          <description>LTC PKHA E3 3 Register</description>
144803          <alternateGroup>LTC0</alternateGroup>
144804          <addressOffset>0xECC</addressOffset>
144805          <size>32</size>
144806          <access>read-write</access>
144807          <resetValue>0</resetValue>
144808          <resetMask>0xFFFFFFFF</resetMask>
144809          <fields>
144810            <field>
144811              <name>PKHA_E3</name>
144812              <description>E3 VALUE</description>
144813              <bitOffset>0</bitOffset>
144814              <bitWidth>32</bitWidth>
144815              <access>read-write</access>
144816            </field>
144817          </fields>
144818        </register>
144819        <register>
144820          <name>LTC0_PKE_51</name>
144821          <description>LTC PKHA E 51 Register</description>
144822          <alternateGroup>LTC0</alternateGroup>
144823          <addressOffset>0xECC</addressOffset>
144824          <size>32</size>
144825          <access>read-write</access>
144826          <resetValue>0</resetValue>
144827          <resetMask>0xFFFFFFFF</resetMask>
144828        </register>
144829        <register>
144830          <name>LTC0_PKE3_4</name>
144831          <description>LTC PKHA E3 4 Register</description>
144832          <alternateGroup>LTC0</alternateGroup>
144833          <addressOffset>0xED0</addressOffset>
144834          <size>32</size>
144835          <access>read-write</access>
144836          <resetValue>0</resetValue>
144837          <resetMask>0xFFFFFFFF</resetMask>
144838          <fields>
144839            <field>
144840              <name>PKHA_E3</name>
144841              <description>E3 VALUE</description>
144842              <bitOffset>0</bitOffset>
144843              <bitWidth>32</bitWidth>
144844              <access>read-write</access>
144845            </field>
144846          </fields>
144847        </register>
144848        <register>
144849          <name>LTC0_PKE_52</name>
144850          <description>LTC PKHA E 52 Register</description>
144851          <alternateGroup>LTC0</alternateGroup>
144852          <addressOffset>0xED0</addressOffset>
144853          <size>32</size>
144854          <access>read-write</access>
144855          <resetValue>0</resetValue>
144856          <resetMask>0xFFFFFFFF</resetMask>
144857        </register>
144858        <register>
144859          <name>LTC0_PKE3_5</name>
144860          <description>LTC PKHA E3 5 Register</description>
144861          <alternateGroup>LTC0</alternateGroup>
144862          <addressOffset>0xED4</addressOffset>
144863          <size>32</size>
144864          <access>read-write</access>
144865          <resetValue>0</resetValue>
144866          <resetMask>0xFFFFFFFF</resetMask>
144867          <fields>
144868            <field>
144869              <name>PKHA_E3</name>
144870              <description>E3 VALUE</description>
144871              <bitOffset>0</bitOffset>
144872              <bitWidth>32</bitWidth>
144873              <access>read-write</access>
144874            </field>
144875          </fields>
144876        </register>
144877        <register>
144878          <name>LTC0_PKE_53</name>
144879          <description>LTC PKHA E 53 Register</description>
144880          <alternateGroup>LTC0</alternateGroup>
144881          <addressOffset>0xED4</addressOffset>
144882          <size>32</size>
144883          <access>read-write</access>
144884          <resetValue>0</resetValue>
144885          <resetMask>0xFFFFFFFF</resetMask>
144886        </register>
144887        <register>
144888          <name>LTC0_PKE3_6</name>
144889          <description>LTC PKHA E3 6 Register</description>
144890          <alternateGroup>LTC0</alternateGroup>
144891          <addressOffset>0xED8</addressOffset>
144892          <size>32</size>
144893          <access>read-write</access>
144894          <resetValue>0</resetValue>
144895          <resetMask>0xFFFFFFFF</resetMask>
144896          <fields>
144897            <field>
144898              <name>PKHA_E3</name>
144899              <description>E3 VALUE</description>
144900              <bitOffset>0</bitOffset>
144901              <bitWidth>32</bitWidth>
144902              <access>read-write</access>
144903            </field>
144904          </fields>
144905        </register>
144906        <register>
144907          <name>LTC0_PKE_54</name>
144908          <description>LTC PKHA E 54 Register</description>
144909          <alternateGroup>LTC0</alternateGroup>
144910          <addressOffset>0xED8</addressOffset>
144911          <size>32</size>
144912          <access>read-write</access>
144913          <resetValue>0</resetValue>
144914          <resetMask>0xFFFFFFFF</resetMask>
144915        </register>
144916        <register>
144917          <name>LTC0_PKE3_7</name>
144918          <description>LTC PKHA E3 7 Register</description>
144919          <alternateGroup>LTC0</alternateGroup>
144920          <addressOffset>0xEDC</addressOffset>
144921          <size>32</size>
144922          <access>read-write</access>
144923          <resetValue>0</resetValue>
144924          <resetMask>0xFFFFFFFF</resetMask>
144925          <fields>
144926            <field>
144927              <name>PKHA_E3</name>
144928              <description>E3 VALUE</description>
144929              <bitOffset>0</bitOffset>
144930              <bitWidth>32</bitWidth>
144931              <access>read-write</access>
144932            </field>
144933          </fields>
144934        </register>
144935        <register>
144936          <name>LTC0_PKE_55</name>
144937          <description>LTC PKHA E 55 Register</description>
144938          <alternateGroup>LTC0</alternateGroup>
144939          <addressOffset>0xEDC</addressOffset>
144940          <size>32</size>
144941          <access>read-write</access>
144942          <resetValue>0</resetValue>
144943          <resetMask>0xFFFFFFFF</resetMask>
144944        </register>
144945        <register>
144946          <name>LTC0_PKE3_8</name>
144947          <description>LTC PKHA E3 8 Register</description>
144948          <alternateGroup>LTC0</alternateGroup>
144949          <addressOffset>0xEE0</addressOffset>
144950          <size>32</size>
144951          <access>read-write</access>
144952          <resetValue>0</resetValue>
144953          <resetMask>0xFFFFFFFF</resetMask>
144954          <fields>
144955            <field>
144956              <name>PKHA_E3</name>
144957              <description>E3 VALUE</description>
144958              <bitOffset>0</bitOffset>
144959              <bitWidth>32</bitWidth>
144960              <access>read-write</access>
144961            </field>
144962          </fields>
144963        </register>
144964        <register>
144965          <name>LTC0_PKE_56</name>
144966          <description>LTC PKHA E 56 Register</description>
144967          <alternateGroup>LTC0</alternateGroup>
144968          <addressOffset>0xEE0</addressOffset>
144969          <size>32</size>
144970          <access>read-write</access>
144971          <resetValue>0</resetValue>
144972          <resetMask>0xFFFFFFFF</resetMask>
144973        </register>
144974        <register>
144975          <name>LTC0_PKE3_9</name>
144976          <description>LTC PKHA E3 9 Register</description>
144977          <alternateGroup>LTC0</alternateGroup>
144978          <addressOffset>0xEE4</addressOffset>
144979          <size>32</size>
144980          <access>read-write</access>
144981          <resetValue>0</resetValue>
144982          <resetMask>0xFFFFFFFF</resetMask>
144983          <fields>
144984            <field>
144985              <name>PKHA_E3</name>
144986              <description>E3 VALUE</description>
144987              <bitOffset>0</bitOffset>
144988              <bitWidth>32</bitWidth>
144989              <access>read-write</access>
144990            </field>
144991          </fields>
144992        </register>
144993        <register>
144994          <name>LTC0_PKE_57</name>
144995          <description>LTC PKHA E 57 Register</description>
144996          <alternateGroup>LTC0</alternateGroup>
144997          <addressOffset>0xEE4</addressOffset>
144998          <size>32</size>
144999          <access>read-write</access>
145000          <resetValue>0</resetValue>
145001          <resetMask>0xFFFFFFFF</resetMask>
145002        </register>
145003        <register>
145004          <name>LTC0_PKE3_10</name>
145005          <description>LTC PKHA E3 10 Register</description>
145006          <alternateGroup>LTC0</alternateGroup>
145007          <addressOffset>0xEE8</addressOffset>
145008          <size>32</size>
145009          <access>read-write</access>
145010          <resetValue>0</resetValue>
145011          <resetMask>0xFFFFFFFF</resetMask>
145012          <fields>
145013            <field>
145014              <name>PKHA_E3</name>
145015              <description>E3 VALUE</description>
145016              <bitOffset>0</bitOffset>
145017              <bitWidth>32</bitWidth>
145018              <access>read-write</access>
145019            </field>
145020          </fields>
145021        </register>
145022        <register>
145023          <name>LTC0_PKE_58</name>
145024          <description>LTC PKHA E 58 Register</description>
145025          <alternateGroup>LTC0</alternateGroup>
145026          <addressOffset>0xEE8</addressOffset>
145027          <size>32</size>
145028          <access>read-write</access>
145029          <resetValue>0</resetValue>
145030          <resetMask>0xFFFFFFFF</resetMask>
145031        </register>
145032        <register>
145033          <name>LTC0_PKE3_11</name>
145034          <description>LTC PKHA E3 11 Register</description>
145035          <alternateGroup>LTC0</alternateGroup>
145036          <addressOffset>0xEEC</addressOffset>
145037          <size>32</size>
145038          <access>read-write</access>
145039          <resetValue>0</resetValue>
145040          <resetMask>0xFFFFFFFF</resetMask>
145041          <fields>
145042            <field>
145043              <name>PKHA_E3</name>
145044              <description>E3 VALUE</description>
145045              <bitOffset>0</bitOffset>
145046              <bitWidth>32</bitWidth>
145047              <access>read-write</access>
145048            </field>
145049          </fields>
145050        </register>
145051        <register>
145052          <name>LTC0_PKE_59</name>
145053          <description>LTC PKHA E 59 Register</description>
145054          <alternateGroup>LTC0</alternateGroup>
145055          <addressOffset>0xEEC</addressOffset>
145056          <size>32</size>
145057          <access>read-write</access>
145058          <resetValue>0</resetValue>
145059          <resetMask>0xFFFFFFFF</resetMask>
145060        </register>
145061        <register>
145062          <name>LTC0_PKE3_12</name>
145063          <description>LTC PKHA E3 12 Register</description>
145064          <alternateGroup>LTC0</alternateGroup>
145065          <addressOffset>0xEF0</addressOffset>
145066          <size>32</size>
145067          <access>read-write</access>
145068          <resetValue>0</resetValue>
145069          <resetMask>0xFFFFFFFF</resetMask>
145070          <fields>
145071            <field>
145072              <name>PKHA_E3</name>
145073              <description>E3 VALUE</description>
145074              <bitOffset>0</bitOffset>
145075              <bitWidth>32</bitWidth>
145076              <access>read-write</access>
145077            </field>
145078          </fields>
145079        </register>
145080        <register>
145081          <name>LTC0_PKE_60</name>
145082          <description>LTC PKHA E 60 Register</description>
145083          <alternateGroup>LTC0</alternateGroup>
145084          <addressOffset>0xEF0</addressOffset>
145085          <size>32</size>
145086          <access>read-write</access>
145087          <resetValue>0</resetValue>
145088          <resetMask>0xFFFFFFFF</resetMask>
145089        </register>
145090        <register>
145091          <name>LTC0_PKE3_13</name>
145092          <description>LTC PKHA E3 13 Register</description>
145093          <alternateGroup>LTC0</alternateGroup>
145094          <addressOffset>0xEF4</addressOffset>
145095          <size>32</size>
145096          <access>read-write</access>
145097          <resetValue>0</resetValue>
145098          <resetMask>0xFFFFFFFF</resetMask>
145099          <fields>
145100            <field>
145101              <name>PKHA_E3</name>
145102              <description>E3 VALUE</description>
145103              <bitOffset>0</bitOffset>
145104              <bitWidth>32</bitWidth>
145105              <access>read-write</access>
145106            </field>
145107          </fields>
145108        </register>
145109        <register>
145110          <name>LTC0_PKE_61</name>
145111          <description>LTC PKHA E 61 Register</description>
145112          <alternateGroup>LTC0</alternateGroup>
145113          <addressOffset>0xEF4</addressOffset>
145114          <size>32</size>
145115          <access>read-write</access>
145116          <resetValue>0</resetValue>
145117          <resetMask>0xFFFFFFFF</resetMask>
145118        </register>
145119        <register>
145120          <name>LTC0_PKE3_14</name>
145121          <description>LTC PKHA E3 14 Register</description>
145122          <alternateGroup>LTC0</alternateGroup>
145123          <addressOffset>0xEF8</addressOffset>
145124          <size>32</size>
145125          <access>read-write</access>
145126          <resetValue>0</resetValue>
145127          <resetMask>0xFFFFFFFF</resetMask>
145128          <fields>
145129            <field>
145130              <name>PKHA_E3</name>
145131              <description>E3 VALUE</description>
145132              <bitOffset>0</bitOffset>
145133              <bitWidth>32</bitWidth>
145134              <access>read-write</access>
145135            </field>
145136          </fields>
145137        </register>
145138        <register>
145139          <name>LTC0_PKE_62</name>
145140          <description>LTC PKHA E 62 Register</description>
145141          <alternateGroup>LTC0</alternateGroup>
145142          <addressOffset>0xEF8</addressOffset>
145143          <size>32</size>
145144          <access>read-write</access>
145145          <resetValue>0</resetValue>
145146          <resetMask>0xFFFFFFFF</resetMask>
145147        </register>
145148        <register>
145149          <name>LTC0_PKE3_15</name>
145150          <description>LTC PKHA E3 15 Register</description>
145151          <alternateGroup>LTC0</alternateGroup>
145152          <addressOffset>0xEFC</addressOffset>
145153          <size>32</size>
145154          <access>read-write</access>
145155          <resetValue>0</resetValue>
145156          <resetMask>0xFFFFFFFF</resetMask>
145157          <fields>
145158            <field>
145159              <name>PKHA_E3</name>
145160              <description>E3 VALUE</description>
145161              <bitOffset>0</bitOffset>
145162              <bitWidth>32</bitWidth>
145163              <access>read-write</access>
145164            </field>
145165          </fields>
145166        </register>
145167        <register>
145168          <name>LTC0_PKE_63</name>
145169          <description>LTC PKHA E 63 Register</description>
145170          <alternateGroup>LTC0</alternateGroup>
145171          <addressOffset>0xEFC</addressOffset>
145172          <size>32</size>
145173          <access>read-write</access>
145174          <resetValue>0</resetValue>
145175          <resetMask>0xFFFFFFFF</resetMask>
145176        </register>
145177      </registers>
145178    </peripheral>
145179    <peripheral>
145180      <name>EMVSIM0</name>
145181      <description>EMVSIM</description>
145182      <groupName>EMVSIM</groupName>
145183      <prependToName>EMVSIM0_</prependToName>
145184      <baseAddress>0x400D4000</baseAddress>
145185      <addressBlock>
145186        <offset>0</offset>
145187        <size>0x4C</size>
145188        <usage>registers</usage>
145189      </addressBlock>
145190      <interrupt>
145191        <name>EMVSIM0</name>
145192        <value>37</value>
145193      </interrupt>
145194      <registers>
145195        <register>
145196          <name>VER_ID</name>
145197          <description>Version ID Register</description>
145198          <addressOffset>0</addressOffset>
145199          <size>32</size>
145200          <access>read-only</access>
145201          <resetValue>0</resetValue>
145202          <resetMask>0xFFFFFFFF</resetMask>
145203          <fields>
145204            <field>
145205              <name>VER</name>
145206              <description>Version ID of the module</description>
145207              <bitOffset>0</bitOffset>
145208              <bitWidth>32</bitWidth>
145209              <access>read-only</access>
145210            </field>
145211          </fields>
145212        </register>
145213        <register>
145214          <name>PARAM</name>
145215          <description>Parameter Register</description>
145216          <addressOffset>0x4</addressOffset>
145217          <size>32</size>
145218          <access>read-only</access>
145219          <resetValue>0x1010</resetValue>
145220          <resetMask>0xFFFFFFFF</resetMask>
145221          <fields>
145222            <field>
145223              <name>RX_FIFO_DEPTH</name>
145224              <description>Receive FIFO Depth</description>
145225              <bitOffset>0</bitOffset>
145226              <bitWidth>8</bitWidth>
145227              <access>read-only</access>
145228            </field>
145229            <field>
145230              <name>TX_FIFO_DEPTH</name>
145231              <description>Transmit FIFO Depth</description>
145232              <bitOffset>8</bitOffset>
145233              <bitWidth>8</bitWidth>
145234              <access>read-only</access>
145235            </field>
145236          </fields>
145237        </register>
145238        <register>
145239          <name>CLKCFG</name>
145240          <description>Clock Configuration Register</description>
145241          <addressOffset>0x8</addressOffset>
145242          <size>32</size>
145243          <access>read-write</access>
145244          <resetValue>0</resetValue>
145245          <resetMask>0xFFFFFFFF</resetMask>
145246          <fields>
145247            <field>
145248              <name>CLK_PRSC</name>
145249              <description>Clock Prescaler Value</description>
145250              <bitOffset>0</bitOffset>
145251              <bitWidth>8</bitWidth>
145252              <access>read-write</access>
145253              <enumeratedValues>
145254                <enumeratedValue>
145255                  <name>10</name>
145256                  <description>Divide by 2</description>
145257                  <value>#10</value>
145258                </enumeratedValue>
145259              </enumeratedValues>
145260            </field>
145261            <field>
145262              <name>GPCNT1_CLK_SEL</name>
145263              <description>General Purpose Counter 1 Clock Select</description>
145264              <bitOffset>8</bitOffset>
145265              <bitWidth>2</bitWidth>
145266              <access>read-write</access>
145267              <enumeratedValues>
145268                <enumeratedValue>
145269                  <name>00</name>
145270                  <description>Disabled / Reset (default)</description>
145271                  <value>#00</value>
145272                </enumeratedValue>
145273                <enumeratedValue>
145274                  <name>01</name>
145275                  <description>Card Clock</description>
145276                  <value>#01</value>
145277                </enumeratedValue>
145278                <enumeratedValue>
145279                  <name>10</name>
145280                  <description>Receive Clock</description>
145281                  <value>#10</value>
145282                </enumeratedValue>
145283                <enumeratedValue>
145284                  <name>11</name>
145285                  <description>ETU Clock (transmit clock)</description>
145286                  <value>#11</value>
145287                </enumeratedValue>
145288              </enumeratedValues>
145289            </field>
145290            <field>
145291              <name>GPCNT0_CLK_SEL</name>
145292              <description>General Purpose Counter 0 Clock Select</description>
145293              <bitOffset>10</bitOffset>
145294              <bitWidth>2</bitWidth>
145295              <access>read-write</access>
145296              <enumeratedValues>
145297                <enumeratedValue>
145298                  <name>00</name>
145299                  <description>Disabled / Reset (default)</description>
145300                  <value>#00</value>
145301                </enumeratedValue>
145302                <enumeratedValue>
145303                  <name>01</name>
145304                  <description>Card Clock</description>
145305                  <value>#01</value>
145306                </enumeratedValue>
145307                <enumeratedValue>
145308                  <name>10</name>
145309                  <description>Receive Clock</description>
145310                  <value>#10</value>
145311                </enumeratedValue>
145312                <enumeratedValue>
145313                  <name>11</name>
145314                  <description>ETU Clock (transmit clock)</description>
145315                  <value>#11</value>
145316                </enumeratedValue>
145317              </enumeratedValues>
145318            </field>
145319          </fields>
145320        </register>
145321        <register>
145322          <name>DIVISOR</name>
145323          <description>Baud Rate Divisor Register</description>
145324          <addressOffset>0xC</addressOffset>
145325          <size>32</size>
145326          <access>read-write</access>
145327          <resetValue>0x174</resetValue>
145328          <resetMask>0xFFFFFFFF</resetMask>
145329          <fields>
145330            <field>
145331              <name>DIVISOR_VALUE</name>
145332              <description>Divisor (F/D) Value</description>
145333              <bitOffset>0</bitOffset>
145334              <bitWidth>9</bitWidth>
145335              <access>read-write</access>
145336              <enumeratedValues>
145337                <enumeratedValue>
145338                  <name>101110100</name>
145339                  <description>Divisor value for F = 372 and D = 1 (default)</description>
145340                  <value>#101110100</value>
145341                </enumeratedValue>
145342              </enumeratedValues>
145343            </field>
145344          </fields>
145345        </register>
145346        <register>
145347          <name>CTRL</name>
145348          <description>Control Register</description>
145349          <addressOffset>0x10</addressOffset>
145350          <size>32</size>
145351          <access>read-write</access>
145352          <resetValue>0x1000006</resetValue>
145353          <resetMask>0xFFFFFFFF</resetMask>
145354          <fields>
145355            <field>
145356              <name>IC</name>
145357              <description>Inverse Convention</description>
145358              <bitOffset>0</bitOffset>
145359              <bitWidth>1</bitWidth>
145360              <access>read-write</access>
145361              <enumeratedValues>
145362                <enumeratedValue>
145363                  <name>0</name>
145364                  <description>Direction convention transfers enabled (default)</description>
145365                  <value>#0</value>
145366                </enumeratedValue>
145367                <enumeratedValue>
145368                  <name>1</name>
145369                  <description>Inverse convention transfers enabled</description>
145370                  <value>#1</value>
145371                </enumeratedValue>
145372              </enumeratedValues>
145373            </field>
145374            <field>
145375              <name>ICM</name>
145376              <description>Initial Character Mode</description>
145377              <bitOffset>1</bitOffset>
145378              <bitWidth>1</bitWidth>
145379              <access>read-write</access>
145380              <enumeratedValues>
145381                <enumeratedValue>
145382                  <name>0</name>
145383                  <description>Initial Character Mode disabled</description>
145384                  <value>#0</value>
145385                </enumeratedValue>
145386                <enumeratedValue>
145387                  <name>1</name>
145388                  <description>Initial Character Mode enabled (default)</description>
145389                  <value>#1</value>
145390                </enumeratedValue>
145391              </enumeratedValues>
145392            </field>
145393            <field>
145394              <name>ANACK</name>
145395              <description>Auto NACK Enable</description>
145396              <bitOffset>2</bitOffset>
145397              <bitWidth>1</bitWidth>
145398              <access>read-write</access>
145399              <enumeratedValues>
145400                <enumeratedValue>
145401                  <name>0</name>
145402                  <description>NACK generation on errors disabled</description>
145403                  <value>#0</value>
145404                </enumeratedValue>
145405                <enumeratedValue>
145406                  <name>1</name>
145407                  <description>NACK generation on errors enabled (default)</description>
145408                  <value>#1</value>
145409                </enumeratedValue>
145410              </enumeratedValues>
145411            </field>
145412            <field>
145413              <name>ONACK</name>
145414              <description>Overrun NACK Enable</description>
145415              <bitOffset>3</bitOffset>
145416              <bitWidth>1</bitWidth>
145417              <access>read-write</access>
145418              <enumeratedValues>
145419                <enumeratedValue>
145420                  <name>0</name>
145421                  <description>NACK generation on overrun is disabled (default)</description>
145422                  <value>#0</value>
145423                </enumeratedValue>
145424                <enumeratedValue>
145425                  <name>1</name>
145426                  <description>NACK generation on overrun is enabled</description>
145427                  <value>#1</value>
145428                </enumeratedValue>
145429              </enumeratedValues>
145430            </field>
145431            <field>
145432              <name>FLSH_RX</name>
145433              <description>Flush Receiver Bit</description>
145434              <bitOffset>8</bitOffset>
145435              <bitWidth>1</bitWidth>
145436              <access>write-only</access>
145437              <enumeratedValues>
145438                <enumeratedValue>
145439                  <name>0</name>
145440                  <description>EMV SIM Receiver normal operation (default)</description>
145441                  <value>#0</value>
145442                </enumeratedValue>
145443                <enumeratedValue>
145444                  <name>1</name>
145445                  <description>EMV SIM Receiver held in Reset</description>
145446                  <value>#1</value>
145447                </enumeratedValue>
145448              </enumeratedValues>
145449            </field>
145450            <field>
145451              <name>FLSH_TX</name>
145452              <description>Flush Transmitter Bit</description>
145453              <bitOffset>9</bitOffset>
145454              <bitWidth>1</bitWidth>
145455              <access>write-only</access>
145456              <enumeratedValues>
145457                <enumeratedValue>
145458                  <name>0</name>
145459                  <description>EMV SIM Transmitter normal operation (default)</description>
145460                  <value>#0</value>
145461                </enumeratedValue>
145462                <enumeratedValue>
145463                  <name>1</name>
145464                  <description>EMV SIM Transmitter held in Reset</description>
145465                  <value>#1</value>
145466                </enumeratedValue>
145467              </enumeratedValues>
145468            </field>
145469            <field>
145470              <name>SW_RST</name>
145471              <description>Software Reset Bit</description>
145472              <bitOffset>10</bitOffset>
145473              <bitWidth>1</bitWidth>
145474              <access>write-only</access>
145475              <enumeratedValues>
145476                <enumeratedValue>
145477                  <name>0</name>
145478                  <description>EMV SIM Normal operation (default)</description>
145479                  <value>#0</value>
145480                </enumeratedValue>
145481                <enumeratedValue>
145482                  <name>1</name>
145483                  <description>EMV SIM held in Reset</description>
145484                  <value>#1</value>
145485                </enumeratedValue>
145486              </enumeratedValues>
145487            </field>
145488            <field>
145489              <name>KILL_CLOCKS</name>
145490              <description>Kill all internal clocks</description>
145491              <bitOffset>11</bitOffset>
145492              <bitWidth>1</bitWidth>
145493              <access>read-write</access>
145494              <enumeratedValues>
145495                <enumeratedValue>
145496                  <name>0</name>
145497                  <description>EMV SIM input clock enabled (default)</description>
145498                  <value>#0</value>
145499                </enumeratedValue>
145500                <enumeratedValue>
145501                  <name>1</name>
145502                  <description>EMV SIM input clock is disabled</description>
145503                  <value>#1</value>
145504                </enumeratedValue>
145505              </enumeratedValues>
145506            </field>
145507            <field>
145508              <name>DOZE_EN</name>
145509              <description>Doze Enable</description>
145510              <bitOffset>12</bitOffset>
145511              <bitWidth>1</bitWidth>
145512              <access>read-write</access>
145513              <enumeratedValues>
145514                <enumeratedValue>
145515                  <name>0</name>
145516                  <description>DOZE instruction will gate all internal EMV SIM clocks as well as the Smart Card clock when the transmit FIFO is empty (default)</description>
145517                  <value>#0</value>
145518                </enumeratedValue>
145519                <enumeratedValue>
145520                  <name>1</name>
145521                  <description>DOZE instruction has no effect on EMV SIM module</description>
145522                  <value>#1</value>
145523                </enumeratedValue>
145524              </enumeratedValues>
145525            </field>
145526            <field>
145527              <name>STOP_EN</name>
145528              <description>STOP Enable</description>
145529              <bitOffset>13</bitOffset>
145530              <bitWidth>1</bitWidth>
145531              <access>read-write</access>
145532              <enumeratedValues>
145533                <enumeratedValue>
145534                  <name>0</name>
145535                  <description>STOP instruction shuts down all EMV SIM clocks (default)</description>
145536                  <value>#0</value>
145537                </enumeratedValue>
145538                <enumeratedValue>
145539                  <name>1</name>
145540                  <description>STOP instruction shuts down all clocks except for the Smart Card Clock (SCK) (clock provided to Smart Card)</description>
145541                  <value>#1</value>
145542                </enumeratedValue>
145543              </enumeratedValues>
145544            </field>
145545            <field>
145546              <name>RCV_EN</name>
145547              <description>Receiver Enable</description>
145548              <bitOffset>16</bitOffset>
145549              <bitWidth>1</bitWidth>
145550              <access>read-write</access>
145551              <enumeratedValues>
145552                <enumeratedValue>
145553                  <name>0</name>
145554                  <description>EMV SIM Receiver disabled (default)</description>
145555                  <value>#0</value>
145556                </enumeratedValue>
145557                <enumeratedValue>
145558                  <name>1</name>
145559                  <description>EMV SIM Receiver enabled</description>
145560                  <value>#1</value>
145561                </enumeratedValue>
145562              </enumeratedValues>
145563            </field>
145564            <field>
145565              <name>XMT_EN</name>
145566              <description>Transmitter Enable</description>
145567              <bitOffset>17</bitOffset>
145568              <bitWidth>1</bitWidth>
145569              <access>read-write</access>
145570              <enumeratedValues>
145571                <enumeratedValue>
145572                  <name>0</name>
145573                  <description>EMV SIM Transmitter disabled (default)</description>
145574                  <value>#0</value>
145575                </enumeratedValue>
145576                <enumeratedValue>
145577                  <name>1</name>
145578                  <description>EMV SIM Transmitter enabled</description>
145579                  <value>#1</value>
145580                </enumeratedValue>
145581              </enumeratedValues>
145582            </field>
145583            <field>
145584              <name>RCVR_11</name>
145585              <description>Receiver 11 ETU Mode Enable</description>
145586              <bitOffset>18</bitOffset>
145587              <bitWidth>1</bitWidth>
145588              <access>read-write</access>
145589              <enumeratedValues>
145590                <enumeratedValue>
145591                  <name>0</name>
145592                  <description>Receiver configured for 12 ETU operation mode (default)</description>
145593                  <value>#0</value>
145594                </enumeratedValue>
145595                <enumeratedValue>
145596                  <name>1</name>
145597                  <description>Receiver configured for 11 ETU operation mode</description>
145598                  <value>#1</value>
145599                </enumeratedValue>
145600              </enumeratedValues>
145601            </field>
145602            <field>
145603              <name>RX_DMA_EN</name>
145604              <description>Receive DMA Enable</description>
145605              <bitOffset>19</bitOffset>
145606              <bitWidth>1</bitWidth>
145607              <access>read-write</access>
145608              <enumeratedValues>
145609                <enumeratedValue>
145610                  <name>0</name>
145611                  <description>No DMA Read Request asserted for Receiver (default)</description>
145612                  <value>#0</value>
145613                </enumeratedValue>
145614                <enumeratedValue>
145615                  <name>1</name>
145616                  <description>DMA Read Request asserted for Receiver</description>
145617                  <value>#1</value>
145618                </enumeratedValue>
145619              </enumeratedValues>
145620            </field>
145621            <field>
145622              <name>TX_DMA_EN</name>
145623              <description>Transmit DMA Enable</description>
145624              <bitOffset>20</bitOffset>
145625              <bitWidth>1</bitWidth>
145626              <access>read-write</access>
145627              <enumeratedValues>
145628                <enumeratedValue>
145629                  <name>0</name>
145630                  <description>No DMA Write Request asserted for Transmitter (default)</description>
145631                  <value>#0</value>
145632                </enumeratedValue>
145633                <enumeratedValue>
145634                  <name>1</name>
145635                  <description>DMA Write Request asserted for Transmitter</description>
145636                  <value>#1</value>
145637                </enumeratedValue>
145638              </enumeratedValues>
145639            </field>
145640            <field>
145641              <name>INV_CRC_VAL</name>
145642              <description>Invert bits in the CRC Output Value</description>
145643              <bitOffset>24</bitOffset>
145644              <bitWidth>1</bitWidth>
145645              <access>read-write</access>
145646              <enumeratedValues>
145647                <enumeratedValue>
145648                  <name>0</name>
145649                  <description>Bits in CRC Output value will not be inverted.</description>
145650                  <value>#0</value>
145651                </enumeratedValue>
145652                <enumeratedValue>
145653                  <name>1</name>
145654                  <description>Bits in CRC Output value will be inverted. (default)</description>
145655                  <value>#1</value>
145656                </enumeratedValue>
145657              </enumeratedValues>
145658            </field>
145659            <field>
145660              <name>CRC_OUT_FLIP</name>
145661              <description>CRC Output Value Bit Reversal or Flip</description>
145662              <bitOffset>25</bitOffset>
145663              <bitWidth>1</bitWidth>
145664              <access>read-write</access>
145665              <enumeratedValues>
145666                <enumeratedValue>
145667                  <name>0</name>
145668                  <description>Bits within the CRC output bytes will not be reversed i.e. 15:0 will remain 15:0 (default)</description>
145669                  <value>#0</value>
145670                </enumeratedValue>
145671                <enumeratedValue>
145672                  <name>1</name>
145673                  <description>Bits within the CRC output bytes will be reversed i.e. 15:0 will become {8:15,0:7}</description>
145674                  <value>#1</value>
145675                </enumeratedValue>
145676              </enumeratedValues>
145677            </field>
145678            <field>
145679              <name>CRC_IN_FLIP</name>
145680              <description>CRC Input Byte&apos;s Bit Reversal or Flip Control</description>
145681              <bitOffset>26</bitOffset>
145682              <bitWidth>1</bitWidth>
145683              <access>read-write</access>
145684              <enumeratedValues>
145685                <enumeratedValue>
145686                  <name>0</name>
145687                  <description>Bits in the input byte will not be reversed (i.e. 7:0 will remain 7:0) before the CRC calculation (default)</description>
145688                  <value>#0</value>
145689                </enumeratedValue>
145690                <enumeratedValue>
145691                  <name>1</name>
145692                  <description>Bits in the input byte will be reversed (i.e. 7:0 will become 0:7) before CRC calculation</description>
145693                  <value>#1</value>
145694                </enumeratedValue>
145695              </enumeratedValues>
145696            </field>
145697            <field>
145698              <name>CWT_EN</name>
145699              <description>Character Wait Time Counter Enable</description>
145700              <bitOffset>27</bitOffset>
145701              <bitWidth>1</bitWidth>
145702              <access>read-write</access>
145703              <enumeratedValues>
145704                <enumeratedValue>
145705                  <name>0</name>
145706                  <description>Character Wait time Counter is disabled (default)</description>
145707                  <value>#0</value>
145708                </enumeratedValue>
145709                <enumeratedValue>
145710                  <name>1</name>
145711                  <description>Character Wait time counter is enabled</description>
145712                  <value>#1</value>
145713                </enumeratedValue>
145714              </enumeratedValues>
145715            </field>
145716            <field>
145717              <name>LRC_EN</name>
145718              <description>LRC Enable</description>
145719              <bitOffset>28</bitOffset>
145720              <bitWidth>1</bitWidth>
145721              <access>read-write</access>
145722              <enumeratedValues>
145723                <enumeratedValue>
145724                  <name>0</name>
145725                  <description>8-bit Linear Redundancy Checking disabled (default)</description>
145726                  <value>#0</value>
145727                </enumeratedValue>
145728                <enumeratedValue>
145729                  <name>1</name>
145730                  <description>8-bit Linear Redundancy Checking enabled</description>
145731                  <value>#1</value>
145732                </enumeratedValue>
145733              </enumeratedValues>
145734            </field>
145735            <field>
145736              <name>CRC_EN</name>
145737              <description>CRC Enable</description>
145738              <bitOffset>29</bitOffset>
145739              <bitWidth>1</bitWidth>
145740              <access>read-write</access>
145741              <enumeratedValues>
145742                <enumeratedValue>
145743                  <name>0</name>
145744                  <description>16-bit Cyclic Redundancy Checking disabled (default)</description>
145745                  <value>#0</value>
145746                </enumeratedValue>
145747                <enumeratedValue>
145748                  <name>1</name>
145749                  <description>16-bit Cyclic Redundancy Checking enabled</description>
145750                  <value>#1</value>
145751                </enumeratedValue>
145752              </enumeratedValues>
145753            </field>
145754            <field>
145755              <name>XMT_CRC_LRC</name>
145756              <description>Transmit CRC or LRC Enable</description>
145757              <bitOffset>30</bitOffset>
145758              <bitWidth>1</bitWidth>
145759              <access>read-write</access>
145760              <enumeratedValues>
145761                <enumeratedValue>
145762                  <name>0</name>
145763                  <description>No CRC or LRC value is transmitted (default)</description>
145764                  <value>#0</value>
145765                </enumeratedValue>
145766                <enumeratedValue>
145767                  <name>1</name>
145768                  <description>Transmit LRC or CRC info when FIFO empties (whichever is enabled)</description>
145769                  <value>#1</value>
145770                </enumeratedValue>
145771              </enumeratedValues>
145772            </field>
145773            <field>
145774              <name>BWT_EN</name>
145775              <description>Block Wait Time Counter Enable</description>
145776              <bitOffset>31</bitOffset>
145777              <bitWidth>1</bitWidth>
145778              <access>read-write</access>
145779              <enumeratedValues>
145780                <enumeratedValue>
145781                  <name>0</name>
145782                  <description>Disable BWT, BGT Counters (default)</description>
145783                  <value>#0</value>
145784                </enumeratedValue>
145785                <enumeratedValue>
145786                  <name>1</name>
145787                  <description>Enable BWT, BGT Counters</description>
145788                  <value>#1</value>
145789                </enumeratedValue>
145790              </enumeratedValues>
145791            </field>
145792          </fields>
145793        </register>
145794        <register>
145795          <name>INT_MASK</name>
145796          <description>Interrupt Mask Register</description>
145797          <addressOffset>0x14</addressOffset>
145798          <size>32</size>
145799          <access>read-write</access>
145800          <resetValue>0xFFFF</resetValue>
145801          <resetMask>0xFFFFFFFF</resetMask>
145802          <fields>
145803            <field>
145804              <name>RDT_IM</name>
145805              <description>Receive Data Threshold Interrupt Mask</description>
145806              <bitOffset>0</bitOffset>
145807              <bitWidth>1</bitWidth>
145808              <access>read-write</access>
145809              <enumeratedValues>
145810                <enumeratedValue>
145811                  <name>0</name>
145812                  <description>RDTF interrupt enabled</description>
145813                  <value>#0</value>
145814                </enumeratedValue>
145815                <enumeratedValue>
145816                  <name>1</name>
145817                  <description>RDTF interrupt masked (default)</description>
145818                  <value>#1</value>
145819                </enumeratedValue>
145820              </enumeratedValues>
145821            </field>
145822            <field>
145823              <name>TC_IM</name>
145824              <description>Transmit Complete Interrupt Mask</description>
145825              <bitOffset>1</bitOffset>
145826              <bitWidth>1</bitWidth>
145827              <access>read-write</access>
145828              <enumeratedValues>
145829                <enumeratedValue>
145830                  <name>0</name>
145831                  <description>TCF interrupt enabled</description>
145832                  <value>#0</value>
145833                </enumeratedValue>
145834                <enumeratedValue>
145835                  <name>1</name>
145836                  <description>TCF interrupt masked (default)</description>
145837                  <value>#1</value>
145838                </enumeratedValue>
145839              </enumeratedValues>
145840            </field>
145841            <field>
145842              <name>RFO_IM</name>
145843              <description>Receive FIFO Overflow Interrupt Mask</description>
145844              <bitOffset>2</bitOffset>
145845              <bitWidth>1</bitWidth>
145846              <access>read-write</access>
145847              <enumeratedValues>
145848                <enumeratedValue>
145849                  <name>0</name>
145850                  <description>RFO interrupt enabled</description>
145851                  <value>#0</value>
145852                </enumeratedValue>
145853                <enumeratedValue>
145854                  <name>1</name>
145855                  <description>RFO interrupt masked (default)</description>
145856                  <value>#1</value>
145857                </enumeratedValue>
145858              </enumeratedValues>
145859            </field>
145860            <field>
145861              <name>ETC_IM</name>
145862              <description>Early Transmit Complete Interrupt Mask</description>
145863              <bitOffset>3</bitOffset>
145864              <bitWidth>1</bitWidth>
145865              <access>read-write</access>
145866              <enumeratedValues>
145867                <enumeratedValue>
145868                  <name>0</name>
145869                  <description>ETC interrupt enabled</description>
145870                  <value>#0</value>
145871                </enumeratedValue>
145872                <enumeratedValue>
145873                  <name>1</name>
145874                  <description>ETC interrupt masked (default)</description>
145875                  <value>#1</value>
145876                </enumeratedValue>
145877              </enumeratedValues>
145878            </field>
145879            <field>
145880              <name>TFE_IM</name>
145881              <description>Transmit FIFO Empty Interrupt Mask</description>
145882              <bitOffset>4</bitOffset>
145883              <bitWidth>1</bitWidth>
145884              <access>read-write</access>
145885              <enumeratedValues>
145886                <enumeratedValue>
145887                  <name>0</name>
145888                  <description>TFE interrupt enabled</description>
145889                  <value>#0</value>
145890                </enumeratedValue>
145891                <enumeratedValue>
145892                  <name>1</name>
145893                  <description>TFE interrupt masked (default)</description>
145894                  <value>#1</value>
145895                </enumeratedValue>
145896              </enumeratedValues>
145897            </field>
145898            <field>
145899              <name>TNACK_IM</name>
145900              <description>Transmit NACK Threshold Interrupt Mask</description>
145901              <bitOffset>5</bitOffset>
145902              <bitWidth>1</bitWidth>
145903              <access>read-write</access>
145904              <enumeratedValues>
145905                <enumeratedValue>
145906                  <name>0</name>
145907                  <description>TNTE interrupt enabled</description>
145908                  <value>#0</value>
145909                </enumeratedValue>
145910                <enumeratedValue>
145911                  <name>1</name>
145912                  <description>TNTE interrupt masked (default)</description>
145913                  <value>#1</value>
145914                </enumeratedValue>
145915              </enumeratedValues>
145916            </field>
145917            <field>
145918              <name>TFF_IM</name>
145919              <description>Transmit FIFO Full Interrupt Mask</description>
145920              <bitOffset>6</bitOffset>
145921              <bitWidth>1</bitWidth>
145922              <access>read-write</access>
145923              <enumeratedValues>
145924                <enumeratedValue>
145925                  <name>0</name>
145926                  <description>TFF interrupt enabled</description>
145927                  <value>#0</value>
145928                </enumeratedValue>
145929                <enumeratedValue>
145930                  <name>1</name>
145931                  <description>TFF interrupt masked (default)</description>
145932                  <value>#1</value>
145933                </enumeratedValue>
145934              </enumeratedValues>
145935            </field>
145936            <field>
145937              <name>TDT_IM</name>
145938              <description>Transmit Data Threshold Interrupt Mask</description>
145939              <bitOffset>7</bitOffset>
145940              <bitWidth>1</bitWidth>
145941              <access>read-write</access>
145942              <enumeratedValues>
145943                <enumeratedValue>
145944                  <name>0</name>
145945                  <description>TDTF interrupt enabled</description>
145946                  <value>#0</value>
145947                </enumeratedValue>
145948                <enumeratedValue>
145949                  <name>1</name>
145950                  <description>TDTF interrupt masked (default)</description>
145951                  <value>#1</value>
145952                </enumeratedValue>
145953              </enumeratedValues>
145954            </field>
145955            <field>
145956              <name>GPCNT0_IM</name>
145957              <description>General Purpose Timer 0 Timeout Interrupt Mask</description>
145958              <bitOffset>8</bitOffset>
145959              <bitWidth>1</bitWidth>
145960              <access>read-write</access>
145961              <enumeratedValues>
145962                <enumeratedValue>
145963                  <name>0</name>
145964                  <description>GPCNT0_TO interrupt enabled</description>
145965                  <value>#0</value>
145966                </enumeratedValue>
145967                <enumeratedValue>
145968                  <name>1</name>
145969                  <description>GPCNT0_TO interrupt masked (default)</description>
145970                  <value>#1</value>
145971                </enumeratedValue>
145972              </enumeratedValues>
145973            </field>
145974            <field>
145975              <name>CWT_ERR_IM</name>
145976              <description>Character Wait Time Error Interrupt Mask</description>
145977              <bitOffset>9</bitOffset>
145978              <bitWidth>1</bitWidth>
145979              <access>read-write</access>
145980              <enumeratedValues>
145981                <enumeratedValue>
145982                  <name>0</name>
145983                  <description>CWT_ERR interrupt enabled</description>
145984                  <value>#0</value>
145985                </enumeratedValue>
145986                <enumeratedValue>
145987                  <name>1</name>
145988                  <description>CWT_ERR interrupt masked (default)</description>
145989                  <value>#1</value>
145990                </enumeratedValue>
145991              </enumeratedValues>
145992            </field>
145993            <field>
145994              <name>RNACK_IM</name>
145995              <description>Receiver NACK Threshold Interrupt Mask</description>
145996              <bitOffset>10</bitOffset>
145997              <bitWidth>1</bitWidth>
145998              <access>read-write</access>
145999              <enumeratedValues>
146000                <enumeratedValue>
146001                  <name>0</name>
146002                  <description>RTE interrupt enabled</description>
146003                  <value>#0</value>
146004                </enumeratedValue>
146005                <enumeratedValue>
146006                  <name>1</name>
146007                  <description>RTE interrupt masked (default)</description>
146008                  <value>#1</value>
146009                </enumeratedValue>
146010              </enumeratedValues>
146011            </field>
146012            <field>
146013              <name>BWT_ERR_IM</name>
146014              <description>Block Wait Time Error Interrupt Mask</description>
146015              <bitOffset>11</bitOffset>
146016              <bitWidth>1</bitWidth>
146017              <access>read-write</access>
146018              <enumeratedValues>
146019                <enumeratedValue>
146020                  <name>0</name>
146021                  <description>BWT_ERR interrupt enabled</description>
146022                  <value>#0</value>
146023                </enumeratedValue>
146024                <enumeratedValue>
146025                  <name>1</name>
146026                  <description>BWT_ERR interrupt masked (default)</description>
146027                  <value>#1</value>
146028                </enumeratedValue>
146029              </enumeratedValues>
146030            </field>
146031            <field>
146032              <name>BGT_ERR_IM</name>
146033              <description>Block Guard Time Error Interrupt</description>
146034              <bitOffset>12</bitOffset>
146035              <bitWidth>1</bitWidth>
146036              <access>read-write</access>
146037              <enumeratedValues>
146038                <enumeratedValue>
146039                  <name>0</name>
146040                  <description>BGT_ERR interrupt enabled</description>
146041                  <value>#0</value>
146042                </enumeratedValue>
146043                <enumeratedValue>
146044                  <name>1</name>
146045                  <description>BGT_ERR interrupt masked (default)</description>
146046                  <value>#1</value>
146047                </enumeratedValue>
146048              </enumeratedValues>
146049            </field>
146050            <field>
146051              <name>GPCNT1_IM</name>
146052              <description>General Purpose Counter 1 Timeout Interrupt Mask</description>
146053              <bitOffset>13</bitOffset>
146054              <bitWidth>1</bitWidth>
146055              <access>read-write</access>
146056              <enumeratedValues>
146057                <enumeratedValue>
146058                  <name>0</name>
146059                  <description>GPCNT1_TO interrupt enabled</description>
146060                  <value>#0</value>
146061                </enumeratedValue>
146062                <enumeratedValue>
146063                  <name>1</name>
146064                  <description>GPCNT1_TO interrupt masked (default)</description>
146065                  <value>#1</value>
146066                </enumeratedValue>
146067              </enumeratedValues>
146068            </field>
146069            <field>
146070              <name>RX_DATA_IM</name>
146071              <description>Receive Data Interrupt Mask</description>
146072              <bitOffset>14</bitOffset>
146073              <bitWidth>1</bitWidth>
146074              <access>read-write</access>
146075              <enumeratedValues>
146076                <enumeratedValue>
146077                  <name>0</name>
146078                  <description>RX_DATA interrupt enabled</description>
146079                  <value>#0</value>
146080                </enumeratedValue>
146081                <enumeratedValue>
146082                  <name>1</name>
146083                  <description>RX_DATA interrupt masked (default)</description>
146084                  <value>#1</value>
146085                </enumeratedValue>
146086              </enumeratedValues>
146087            </field>
146088            <field>
146089              <name>PEF_IM</name>
146090              <description>Parity Error Interrupt Mask</description>
146091              <bitOffset>15</bitOffset>
146092              <bitWidth>1</bitWidth>
146093              <access>read-write</access>
146094              <enumeratedValues>
146095                <enumeratedValue>
146096                  <name>0</name>
146097                  <description>PEF interrupt enabled</description>
146098                  <value>#0</value>
146099                </enumeratedValue>
146100                <enumeratedValue>
146101                  <name>1</name>
146102                  <description>PEF interrupt masked (default)</description>
146103                  <value>#1</value>
146104                </enumeratedValue>
146105              </enumeratedValues>
146106            </field>
146107          </fields>
146108        </register>
146109        <register>
146110          <name>RX_THD</name>
146111          <description>Receiver Threshold Register</description>
146112          <addressOffset>0x18</addressOffset>
146113          <size>32</size>
146114          <access>read-write</access>
146115          <resetValue>0x1</resetValue>
146116          <resetMask>0xFFFFFFFF</resetMask>
146117          <fields>
146118            <field>
146119              <name>RDT</name>
146120              <description>Receiver Data Threshold Value</description>
146121              <bitOffset>0</bitOffset>
146122              <bitWidth>4</bitWidth>
146123              <access>read-write</access>
146124            </field>
146125            <field>
146126              <name>RNCK_THD</name>
146127              <description>Receiver NACK Threshold Value</description>
146128              <bitOffset>8</bitOffset>
146129              <bitWidth>4</bitWidth>
146130              <access>read-write</access>
146131              <enumeratedValues>
146132                <enumeratedValue>
146133                  <name>0</name>
146134                  <description>Zero Threshold. RTE will not be set</description>
146135                  <value>#0000</value>
146136                </enumeratedValue>
146137              </enumeratedValues>
146138            </field>
146139          </fields>
146140        </register>
146141        <register>
146142          <name>TX_THD</name>
146143          <description>Transmitter Threshold Register</description>
146144          <addressOffset>0x1C</addressOffset>
146145          <size>32</size>
146146          <access>read-write</access>
146147          <resetValue>0xF</resetValue>
146148          <resetMask>0xFFFFFFFF</resetMask>
146149          <fields>
146150            <field>
146151              <name>TDT</name>
146152              <description>Transmitter Data Threshold Value</description>
146153              <bitOffset>0</bitOffset>
146154              <bitWidth>4</bitWidth>
146155              <access>read-write</access>
146156            </field>
146157            <field>
146158              <name>TNCK_THD</name>
146159              <description>Transmitter NACK Threshold Value</description>
146160              <bitOffset>8</bitOffset>
146161              <bitWidth>4</bitWidth>
146162              <access>read-write</access>
146163              <enumeratedValues>
146164                <enumeratedValue>
146165                  <name>0</name>
146166                  <description>TNTE will never be set; retransmission after NACK reception is disabled.</description>
146167                  <value>#0000</value>
146168                </enumeratedValue>
146169                <enumeratedValue>
146170                  <name>1</name>
146171                  <description>TNTE will be set after 1 nack is received; 0 retransmissions occurs.</description>
146172                  <value>#0001</value>
146173                </enumeratedValue>
146174                <enumeratedValue>
146175                  <name>10</name>
146176                  <description>TNTE will be set after 2 nacks are received; at most 1 retransmission occurs.</description>
146177                  <value>#0010</value>
146178                </enumeratedValue>
146179                <enumeratedValue>
146180                  <name>11</name>
146181                  <description>TNTE will be set after 3 nacks are received; at most 2 retransmissions occurs.</description>
146182                  <value>#0011</value>
146183                </enumeratedValue>
146184                <enumeratedValue>
146185                  <name>1111</name>
146186                  <description>TNTE will be set after 15 nacks are received; at most 14 retransmissions occurs.</description>
146187                  <value>#1111</value>
146188                </enumeratedValue>
146189              </enumeratedValues>
146190            </field>
146191          </fields>
146192        </register>
146193        <register>
146194          <name>RX_STATUS</name>
146195          <description>Receive Status Register</description>
146196          <addressOffset>0x20</addressOffset>
146197          <size>32</size>
146198          <access>read-write</access>
146199          <resetValue>0</resetValue>
146200          <resetMask>0xFFFFFFFF</resetMask>
146201          <fields>
146202            <field>
146203              <name>RFO</name>
146204              <description>Receive FIFO Overflow Flag</description>
146205              <bitOffset>0</bitOffset>
146206              <bitWidth>1</bitWidth>
146207              <access>read-write</access>
146208              <enumeratedValues>
146209                <enumeratedValue>
146210                  <name>0</name>
146211                  <description>No overrun error has occurred (default)</description>
146212                  <value>#0</value>
146213                </enumeratedValue>
146214                <enumeratedValue>
146215                  <name>1</name>
146216                  <description>A byte was received when the received FIFO was already full</description>
146217                  <value>#1</value>
146218                </enumeratedValue>
146219              </enumeratedValues>
146220            </field>
146221            <field>
146222              <name>RX_DATA</name>
146223              <description>Receive Data Interrupt Flag</description>
146224              <bitOffset>4</bitOffset>
146225              <bitWidth>1</bitWidth>
146226              <access>read-write</access>
146227              <enumeratedValues>
146228                <enumeratedValue>
146229                  <name>0</name>
146230                  <description>No new byte is received</description>
146231                  <value>#0</value>
146232                </enumeratedValue>
146233                <enumeratedValue>
146234                  <name>1</name>
146235                  <description>New byte is received ans stored in Receive FIFO</description>
146236                  <value>#1</value>
146237                </enumeratedValue>
146238              </enumeratedValues>
146239            </field>
146240            <field>
146241              <name>RDTF</name>
146242              <description>Receive Data Threshold Interrupt Flag</description>
146243              <bitOffset>5</bitOffset>
146244              <bitWidth>1</bitWidth>
146245              <access>read-only</access>
146246              <enumeratedValues>
146247                <enumeratedValue>
146248                  <name>0</name>
146249                  <description>Number of unread bytes in receive FIFO less than the value set by RDT[3:0] (default).</description>
146250                  <value>#0</value>
146251                </enumeratedValue>
146252                <enumeratedValue>
146253                  <name>1</name>
146254                  <description>Number of unread bytes in receive FIFO greater or than equal to value set by RDT[3:0].</description>
146255                  <value>#1</value>
146256                </enumeratedValue>
146257              </enumeratedValues>
146258            </field>
146259            <field>
146260              <name>LRC_OK</name>
146261              <description>LRC Check OK Flag</description>
146262              <bitOffset>6</bitOffset>
146263              <bitWidth>1</bitWidth>
146264              <access>read-only</access>
146265              <enumeratedValues>
146266                <enumeratedValue>
146267                  <name>0</name>
146268                  <description>Current LRC value does not match remainder.</description>
146269                  <value>#0</value>
146270                </enumeratedValue>
146271                <enumeratedValue>
146272                  <name>1</name>
146273                  <description>Current calculated LRC value matches the expected result (i.e. zero).</description>
146274                  <value>#1</value>
146275                </enumeratedValue>
146276              </enumeratedValues>
146277            </field>
146278            <field>
146279              <name>CRC_OK</name>
146280              <description>CRC Check OK Flag</description>
146281              <bitOffset>7</bitOffset>
146282              <bitWidth>1</bitWidth>
146283              <access>read-only</access>
146284              <enumeratedValues>
146285                <enumeratedValue>
146286                  <name>0</name>
146287                  <description>Current CRC value does not match remainder.</description>
146288                  <value>#0</value>
146289                </enumeratedValue>
146290                <enumeratedValue>
146291                  <name>1</name>
146292                  <description>Current calculated CRC value matches the expected result.</description>
146293                  <value>#1</value>
146294                </enumeratedValue>
146295              </enumeratedValues>
146296            </field>
146297            <field>
146298              <name>CWT_ERR</name>
146299              <description>Character Wait Time Error Flag</description>
146300              <bitOffset>8</bitOffset>
146301              <bitWidth>1</bitWidth>
146302              <access>read-write</access>
146303              <enumeratedValues>
146304                <enumeratedValue>
146305                  <name>0</name>
146306                  <description>No CWT violation has occurred (default).</description>
146307                  <value>#0</value>
146308                </enumeratedValue>
146309                <enumeratedValue>
146310                  <name>1</name>
146311                  <description>Time between two consecutive characters has exceeded the value in CHAR_WAIT.</description>
146312                  <value>#1</value>
146313                </enumeratedValue>
146314              </enumeratedValues>
146315            </field>
146316            <field>
146317              <name>RTE</name>
146318              <description>Received NACK Threshold Error Flag</description>
146319              <bitOffset>9</bitOffset>
146320              <bitWidth>1</bitWidth>
146321              <access>read-write</access>
146322              <enumeratedValues>
146323                <enumeratedValue>
146324                  <name>0</name>
146325                  <description>Number of NACKs generated by the receiver is less than the value programmed in RTH[3:0]</description>
146326                  <value>#0</value>
146327                </enumeratedValue>
146328                <enumeratedValue>
146329                  <name>1</name>
146330                  <description>Number of NACKs generated by the receiver is equal to the value programmed in RTH[3:0]</description>
146331                  <value>#1</value>
146332                </enumeratedValue>
146333              </enumeratedValues>
146334            </field>
146335            <field>
146336              <name>BWT_ERR</name>
146337              <description>Block Wait Time Error Flag</description>
146338              <bitOffset>10</bitOffset>
146339              <bitWidth>1</bitWidth>
146340              <access>read-write</access>
146341              <enumeratedValues>
146342                <enumeratedValue>
146343                  <name>0</name>
146344                  <description>Block wait time not exceeded</description>
146345                  <value>#0</value>
146346                </enumeratedValue>
146347                <enumeratedValue>
146348                  <name>1</name>
146349                  <description>Block wait time was exceeded</description>
146350                  <value>#1</value>
146351                </enumeratedValue>
146352              </enumeratedValues>
146353            </field>
146354            <field>
146355              <name>BGT_ERR</name>
146356              <description>Block Guard Time Error Flag</description>
146357              <bitOffset>11</bitOffset>
146358              <bitWidth>1</bitWidth>
146359              <access>read-write</access>
146360              <enumeratedValues>
146361                <enumeratedValue>
146362                  <name>0</name>
146363                  <description>Block guard time was sufficient</description>
146364                  <value>#0</value>
146365                </enumeratedValue>
146366                <enumeratedValue>
146367                  <name>1</name>
146368                  <description>Block guard time was too small</description>
146369                  <value>#1</value>
146370                </enumeratedValue>
146371              </enumeratedValues>
146372            </field>
146373            <field>
146374              <name>PEF</name>
146375              <description>Parity Error Flag</description>
146376              <bitOffset>12</bitOffset>
146377              <bitWidth>1</bitWidth>
146378              <access>read-write</access>
146379              <enumeratedValues>
146380                <enumeratedValue>
146381                  <name>0</name>
146382                  <description>No parity error detected</description>
146383                  <value>#0</value>
146384                </enumeratedValue>
146385                <enumeratedValue>
146386                  <name>1</name>
146387                  <description>Parity error detected</description>
146388                  <value>#1</value>
146389                </enumeratedValue>
146390              </enumeratedValues>
146391            </field>
146392            <field>
146393              <name>FEF</name>
146394              <description>Frame Error Flag</description>
146395              <bitOffset>13</bitOffset>
146396              <bitWidth>1</bitWidth>
146397              <access>read-write</access>
146398              <enumeratedValues>
146399                <enumeratedValue>
146400                  <name>0</name>
146401                  <description>No frame error detected</description>
146402                  <value>#0</value>
146403                </enumeratedValue>
146404                <enumeratedValue>
146405                  <name>1</name>
146406                  <description>Frame error detected</description>
146407                  <value>#1</value>
146408                </enumeratedValue>
146409              </enumeratedValues>
146410            </field>
146411            <field>
146412              <name>RX_WPTR</name>
146413              <description>Receive FIFO Write Pointer Value</description>
146414              <bitOffset>16</bitOffset>
146415              <bitWidth>4</bitWidth>
146416              <access>read-only</access>
146417            </field>
146418            <field>
146419              <name>RX_CNT</name>
146420              <description>Receive FIFO Byte Count</description>
146421              <bitOffset>24</bitOffset>
146422              <bitWidth>5</bitWidth>
146423              <access>read-only</access>
146424              <enumeratedValues>
146425                <enumeratedValue>
146426                  <name>0</name>
146427                  <description>FIFO is emtpy</description>
146428                  <value>#00000</value>
146429                </enumeratedValue>
146430              </enumeratedValues>
146431            </field>
146432          </fields>
146433        </register>
146434        <register>
146435          <name>TX_STATUS</name>
146436          <description>Transmitter Status Register</description>
146437          <addressOffset>0x24</addressOffset>
146438          <size>32</size>
146439          <access>read-write</access>
146440          <resetValue>0xB8</resetValue>
146441          <resetMask>0xFFFFFFFF</resetMask>
146442          <fields>
146443            <field>
146444              <name>TNTE</name>
146445              <description>Transmit NACK Threshold Error Flag</description>
146446              <bitOffset>0</bitOffset>
146447              <bitWidth>1</bitWidth>
146448              <access>read-write</access>
146449              <enumeratedValues>
146450                <enumeratedValue>
146451                  <name>0</name>
146452                  <description>Transmit NACK threshold has not been reached (default)</description>
146453                  <value>#0</value>
146454                </enumeratedValue>
146455                <enumeratedValue>
146456                  <name>1</name>
146457                  <description>Transmit NACK threshold reached; transmitter frozen</description>
146458                  <value>#1</value>
146459                </enumeratedValue>
146460              </enumeratedValues>
146461            </field>
146462            <field>
146463              <name>TFE</name>
146464              <description>Transmit FIFO Empty Flag</description>
146465              <bitOffset>3</bitOffset>
146466              <bitWidth>1</bitWidth>
146467              <access>read-write</access>
146468              <enumeratedValues>
146469                <enumeratedValue>
146470                  <name>0</name>
146471                  <description>Transmit FIFO is not empty</description>
146472                  <value>#0</value>
146473                </enumeratedValue>
146474                <enumeratedValue>
146475                  <name>1</name>
146476                  <description>Transmit FIFO is empty (default)</description>
146477                  <value>#1</value>
146478                </enumeratedValue>
146479              </enumeratedValues>
146480            </field>
146481            <field>
146482              <name>ETCF</name>
146483              <description>Early Transmit Complete Flag</description>
146484              <bitOffset>4</bitOffset>
146485              <bitWidth>1</bitWidth>
146486              <access>read-write</access>
146487              <enumeratedValues>
146488                <enumeratedValue>
146489                  <name>0</name>
146490                  <description>Transmit pending or in progress</description>
146491                  <value>#0</value>
146492                </enumeratedValue>
146493                <enumeratedValue>
146494                  <name>1</name>
146495                  <description>Transmit complete (default)</description>
146496                  <value>#1</value>
146497                </enumeratedValue>
146498              </enumeratedValues>
146499            </field>
146500            <field>
146501              <name>TCF</name>
146502              <description>Transmit Complete Flag</description>
146503              <bitOffset>5</bitOffset>
146504              <bitWidth>1</bitWidth>
146505              <access>read-write</access>
146506              <enumeratedValues>
146507                <enumeratedValue>
146508                  <name>0</name>
146509                  <description>Transmit pending or in progress</description>
146510                  <value>#0</value>
146511                </enumeratedValue>
146512                <enumeratedValue>
146513                  <name>1</name>
146514                  <description>Transmit complete (default)</description>
146515                  <value>#1</value>
146516                </enumeratedValue>
146517              </enumeratedValues>
146518            </field>
146519            <field>
146520              <name>TFF</name>
146521              <description>Transmit FIFO Full Flag</description>
146522              <bitOffset>6</bitOffset>
146523              <bitWidth>1</bitWidth>
146524              <access>read-write</access>
146525              <enumeratedValues>
146526                <enumeratedValue>
146527                  <name>0</name>
146528                  <description>Transmit FIFO Full condition has not occurred (default)</description>
146529                  <value>#0</value>
146530                </enumeratedValue>
146531                <enumeratedValue>
146532                  <name>1</name>
146533                  <description>A Transmit FIFO Full condition has occurred</description>
146534                  <value>#1</value>
146535                </enumeratedValue>
146536              </enumeratedValues>
146537            </field>
146538            <field>
146539              <name>TDTF</name>
146540              <description>Transmit Data Threshold Flag</description>
146541              <bitOffset>7</bitOffset>
146542              <bitWidth>1</bitWidth>
146543              <access>read-only</access>
146544              <enumeratedValues>
146545                <enumeratedValue>
146546                  <name>0</name>
146547                  <description>Number of bytes in FIFO is greater than TDT[3:0], or bit has been cleared</description>
146548                  <value>#0</value>
146549                </enumeratedValue>
146550                <enumeratedValue>
146551                  <name>1</name>
146552                  <description>Number of bytes in FIFO is less than or equal to TDT[3:0] (default)</description>
146553                  <value>#1</value>
146554                </enumeratedValue>
146555              </enumeratedValues>
146556            </field>
146557            <field>
146558              <name>GPCNT0_TO</name>
146559              <description>General Purpose Counter 0 Timeout Flag</description>
146560              <bitOffset>8</bitOffset>
146561              <bitWidth>1</bitWidth>
146562              <access>read-write</access>
146563              <enumeratedValues>
146564                <enumeratedValue>
146565                  <name>0</name>
146566                  <description>GPCNT0_VAL time not reached, or bit has been cleared. (default)</description>
146567                  <value>#0</value>
146568                </enumeratedValue>
146569                <enumeratedValue>
146570                  <name>1</name>
146571                  <description>General Purpose counter has reached the GPCNT0_VAL value</description>
146572                  <value>#1</value>
146573                </enumeratedValue>
146574              </enumeratedValues>
146575            </field>
146576            <field>
146577              <name>GPCNT1_TO</name>
146578              <description>General Purpose Counter 1 Timeout Flag</description>
146579              <bitOffset>9</bitOffset>
146580              <bitWidth>1</bitWidth>
146581              <access>read-write</access>
146582              <enumeratedValues>
146583                <enumeratedValue>
146584                  <name>0</name>
146585                  <description>GPCNT1_VAL time not reached, or bit has been cleared. (default)</description>
146586                  <value>#0</value>
146587                </enumeratedValue>
146588                <enumeratedValue>
146589                  <name>1</name>
146590                  <description>General Purpose counter has reached the GPCNT1_VAL value</description>
146591                  <value>#1</value>
146592                </enumeratedValue>
146593              </enumeratedValues>
146594            </field>
146595            <field>
146596              <name>TX_RPTR</name>
146597              <description>Transmit FIFO Read Pointer</description>
146598              <bitOffset>16</bitOffset>
146599              <bitWidth>4</bitWidth>
146600              <access>read-only</access>
146601            </field>
146602            <field>
146603              <name>TX_CNT</name>
146604              <description>Transmit FIFO Byte Count</description>
146605              <bitOffset>24</bitOffset>
146606              <bitWidth>5</bitWidth>
146607              <access>read-only</access>
146608              <enumeratedValues>
146609                <enumeratedValue>
146610                  <name>0</name>
146611                  <description>FIFO is emtpy</description>
146612                  <value>#00000</value>
146613                </enumeratedValue>
146614              </enumeratedValues>
146615            </field>
146616          </fields>
146617        </register>
146618        <register>
146619          <name>PCSR</name>
146620          <description>Port Control and Status Register</description>
146621          <addressOffset>0x28</addressOffset>
146622          <size>32</size>
146623          <access>read-write</access>
146624          <resetValue>0x1000000</resetValue>
146625          <resetMask>0xFFFFFFFF</resetMask>
146626          <fields>
146627            <field>
146628              <name>SAPD</name>
146629              <description>Auto Power Down Enable</description>
146630              <bitOffset>0</bitOffset>
146631              <bitWidth>1</bitWidth>
146632              <access>read-write</access>
146633              <enumeratedValues>
146634                <enumeratedValue>
146635                  <name>0</name>
146636                  <description>Auto power down disabled (default)</description>
146637                  <value>#0</value>
146638                </enumeratedValue>
146639                <enumeratedValue>
146640                  <name>1</name>
146641                  <description>Auto power down enabled</description>
146642                  <value>#1</value>
146643                </enumeratedValue>
146644              </enumeratedValues>
146645            </field>
146646            <field>
146647              <name>SVCC_EN</name>
146648              <description>Vcc Enable for Smart Card</description>
146649              <bitOffset>1</bitOffset>
146650              <bitWidth>1</bitWidth>
146651              <access>read-write</access>
146652              <enumeratedValues>
146653                <enumeratedValue>
146654                  <name>0</name>
146655                  <description>Smart Card Voltage disabled (default)</description>
146656                  <value>#0</value>
146657                </enumeratedValue>
146658                <enumeratedValue>
146659                  <name>1</name>
146660                  <description>Smart Card Voltage enabled</description>
146661                  <value>#1</value>
146662                </enumeratedValue>
146663              </enumeratedValues>
146664            </field>
146665            <field>
146666              <name>VCCENP</name>
146667              <description>VCC Enable Polarity Control</description>
146668              <bitOffset>2</bitOffset>
146669              <bitWidth>1</bitWidth>
146670              <access>read-write</access>
146671              <enumeratedValues>
146672                <enumeratedValue>
146673                  <name>0</name>
146674                  <description>VCC_EN is active high. Polarity of SVCC_EN is unchanged.</description>
146675                  <value>#0</value>
146676                </enumeratedValue>
146677                <enumeratedValue>
146678                  <name>1</name>
146679                  <description>VCC_EN is active low. Polarity of SVCC_EN is inverted.</description>
146680                  <value>#1</value>
146681                </enumeratedValue>
146682              </enumeratedValues>
146683            </field>
146684            <field>
146685              <name>SRST</name>
146686              <description>Reset to Smart Card</description>
146687              <bitOffset>3</bitOffset>
146688              <bitWidth>1</bitWidth>
146689              <access>read-write</access>
146690              <enumeratedValues>
146691                <enumeratedValue>
146692                  <name>0</name>
146693                  <description>Smart Card Reset is asserted (default)</description>
146694                  <value>#0</value>
146695                </enumeratedValue>
146696                <enumeratedValue>
146697                  <name>1</name>
146698                  <description>Smart Card Reset is de-asserted</description>
146699                  <value>#1</value>
146700                </enumeratedValue>
146701              </enumeratedValues>
146702            </field>
146703            <field>
146704              <name>SCEN</name>
146705              <description>Clock Enable for Smart Card</description>
146706              <bitOffset>4</bitOffset>
146707              <bitWidth>1</bitWidth>
146708              <access>read-write</access>
146709              <enumeratedValues>
146710                <enumeratedValue>
146711                  <name>0</name>
146712                  <description>Smart Card Clock Disabled</description>
146713                  <value>#0</value>
146714                </enumeratedValue>
146715                <enumeratedValue>
146716                  <name>1</name>
146717                  <description>Smart Card Clock Enabled</description>
146718                  <value>#1</value>
146719                </enumeratedValue>
146720              </enumeratedValues>
146721            </field>
146722            <field>
146723              <name>SCSP</name>
146724              <description>Smart Card Clock Stop Polarity</description>
146725              <bitOffset>5</bitOffset>
146726              <bitWidth>1</bitWidth>
146727              <access>read-write</access>
146728              <enumeratedValues>
146729                <enumeratedValue>
146730                  <name>0</name>
146731                  <description>Clock is logic 0 when stopped by SCEN</description>
146732                  <value>#0</value>
146733                </enumeratedValue>
146734                <enumeratedValue>
146735                  <name>1</name>
146736                  <description>Clock is logic 1 when stopped by SCEN</description>
146737                  <value>#1</value>
146738                </enumeratedValue>
146739              </enumeratedValues>
146740            </field>
146741            <field>
146742              <name>SPD</name>
146743              <description>Auto Power Down Control</description>
146744              <bitOffset>7</bitOffset>
146745              <bitWidth>1</bitWidth>
146746              <access>read-write</access>
146747              <enumeratedValues>
146748                <enumeratedValue>
146749                  <name>0</name>
146750                  <description>No effect (default)</description>
146751                  <value>#0</value>
146752                </enumeratedValue>
146753                <enumeratedValue>
146754                  <name>1</name>
146755                  <description>Start Auto Powerdown or Power Down is in progress</description>
146756                  <value>#1</value>
146757                </enumeratedValue>
146758              </enumeratedValues>
146759            </field>
146760            <field>
146761              <name>SPDIM</name>
146762              <description>Smart Card Presence Detect Interrupt Mask</description>
146763              <bitOffset>24</bitOffset>
146764              <bitWidth>1</bitWidth>
146765              <access>read-write</access>
146766              <enumeratedValues>
146767                <enumeratedValue>
146768                  <name>0</name>
146769                  <description>SIM presence detect interrupt is enabled</description>
146770                  <value>#0</value>
146771                </enumeratedValue>
146772                <enumeratedValue>
146773                  <name>1</name>
146774                  <description>SIM presence detect interrupt is masked (default)</description>
146775                  <value>#1</value>
146776                </enumeratedValue>
146777              </enumeratedValues>
146778            </field>
146779            <field>
146780              <name>SPDIF</name>
146781              <description>Smart Card Presence Detect Interrupt Flag</description>
146782              <bitOffset>25</bitOffset>
146783              <bitWidth>1</bitWidth>
146784              <access>read-write</access>
146785              <enumeratedValues>
146786                <enumeratedValue>
146787                  <name>0</name>
146788                  <description>No insertion or removal of Smart Card detected on Port (default)</description>
146789                  <value>#0</value>
146790                </enumeratedValue>
146791                <enumeratedValue>
146792                  <name>1</name>
146793                  <description>Insertion or removal of Smart Card detected on Port</description>
146794                  <value>#1</value>
146795                </enumeratedValue>
146796              </enumeratedValues>
146797            </field>
146798            <field>
146799              <name>SPDP</name>
146800              <description>Smart Card Presence Detect Pin Status</description>
146801              <bitOffset>26</bitOffset>
146802              <bitWidth>1</bitWidth>
146803              <access>read-only</access>
146804              <enumeratedValues>
146805                <enumeratedValue>
146806                  <name>0</name>
146807                  <description>SIM Presence Detect pin is logic low</description>
146808                  <value>#0</value>
146809                </enumeratedValue>
146810                <enumeratedValue>
146811                  <name>1</name>
146812                  <description>SIM Presence Detectpin is logic high</description>
146813                  <value>#1</value>
146814                </enumeratedValue>
146815              </enumeratedValues>
146816            </field>
146817            <field>
146818              <name>SPDES</name>
146819              <description>SIM Presence Detect Edge Select</description>
146820              <bitOffset>27</bitOffset>
146821              <bitWidth>1</bitWidth>
146822              <access>read-write</access>
146823              <enumeratedValues>
146824                <enumeratedValue>
146825                  <name>0</name>
146826                  <description>Falling edge on the pin (default)</description>
146827                  <value>#0</value>
146828                </enumeratedValue>
146829                <enumeratedValue>
146830                  <name>1</name>
146831                  <description>Rising edge on the pin</description>
146832                  <value>#1</value>
146833                </enumeratedValue>
146834              </enumeratedValues>
146835            </field>
146836          </fields>
146837        </register>
146838        <register>
146839          <name>RX_BUF</name>
146840          <description>Receive Data Read Buffer</description>
146841          <addressOffset>0x2C</addressOffset>
146842          <size>32</size>
146843          <access>read-only</access>
146844          <resetValue>0</resetValue>
146845          <resetMask>0xFFFFFFFF</resetMask>
146846          <fields>
146847            <field>
146848              <name>RX_BYTE</name>
146849              <description>Receive Data Byte Read</description>
146850              <bitOffset>0</bitOffset>
146851              <bitWidth>8</bitWidth>
146852              <access>read-only</access>
146853            </field>
146854          </fields>
146855        </register>
146856        <register>
146857          <name>TX_BUF</name>
146858          <description>Transmit Data Buffer</description>
146859          <addressOffset>0x30</addressOffset>
146860          <size>32</size>
146861          <access>read-write</access>
146862          <resetValue>0</resetValue>
146863          <resetMask>0xFFFFFFFF</resetMask>
146864          <fields>
146865            <field>
146866              <name>TX_BYTE</name>
146867              <description>Transmit Data Byte</description>
146868              <bitOffset>0</bitOffset>
146869              <bitWidth>8</bitWidth>
146870              <access>write-only</access>
146871            </field>
146872          </fields>
146873        </register>
146874        <register>
146875          <name>TX_GETU</name>
146876          <description>Transmitter Guard ETU Value Register</description>
146877          <addressOffset>0x34</addressOffset>
146878          <size>32</size>
146879          <access>read-write</access>
146880          <resetValue>0</resetValue>
146881          <resetMask>0xFFFFFFFF</resetMask>
146882          <fields>
146883            <field>
146884              <name>GETU</name>
146885              <description>Transmitter Guard Time Value in ETU</description>
146886              <bitOffset>0</bitOffset>
146887              <bitWidth>8</bitWidth>
146888              <access>read-write</access>
146889              <enumeratedValues>
146890                <enumeratedValue>
146891                  <name>0</name>
146892                  <description>no additional ETUs inserted (default)</description>
146893                  <value>#0</value>
146894                </enumeratedValue>
146895                <enumeratedValue>
146896                  <name>1</name>
146897                  <description>1 additional ETU inserted</description>
146898                  <value>#1</value>
146899                </enumeratedValue>
146900                <enumeratedValue>
146901                  <name>11111110</name>
146902                  <description>254 additional ETUs inserted</description>
146903                  <value>#11111110</value>
146904                </enumeratedValue>
146905                <enumeratedValue>
146906                  <name>11111111</name>
146907                  <description>Subtracts one ETU by reducing the number of STOP bits from two to one</description>
146908                  <value>#11111111</value>
146909                </enumeratedValue>
146910              </enumeratedValues>
146911            </field>
146912          </fields>
146913        </register>
146914        <register>
146915          <name>CWT_VAL</name>
146916          <description>Character Wait Time Value Register</description>
146917          <addressOffset>0x38</addressOffset>
146918          <size>32</size>
146919          <access>read-write</access>
146920          <resetValue>0xFFFF</resetValue>
146921          <resetMask>0xFFFFFFFF</resetMask>
146922          <fields>
146923            <field>
146924              <name>CWT</name>
146925              <description>Character Wait Time Value</description>
146926              <bitOffset>0</bitOffset>
146927              <bitWidth>16</bitWidth>
146928              <access>read-write</access>
146929            </field>
146930          </fields>
146931        </register>
146932        <register>
146933          <name>BWT_VAL</name>
146934          <description>Block Wait Time Value Register</description>
146935          <addressOffset>0x3C</addressOffset>
146936          <size>32</size>
146937          <access>read-write</access>
146938          <resetValue>0xFFFFFFFF</resetValue>
146939          <resetMask>0xFFFFFFFF</resetMask>
146940          <fields>
146941            <field>
146942              <name>BWT</name>
146943              <description>Block Wait Time Value</description>
146944              <bitOffset>0</bitOffset>
146945              <bitWidth>32</bitWidth>
146946              <access>read-write</access>
146947            </field>
146948          </fields>
146949        </register>
146950        <register>
146951          <name>BGT_VAL</name>
146952          <description>Block Guard Time Value Register</description>
146953          <addressOffset>0x40</addressOffset>
146954          <size>32</size>
146955          <access>read-write</access>
146956          <resetValue>0</resetValue>
146957          <resetMask>0xFFFFFFFF</resetMask>
146958          <fields>
146959            <field>
146960              <name>BGT</name>
146961              <description>Block Guard Time Value</description>
146962              <bitOffset>0</bitOffset>
146963              <bitWidth>16</bitWidth>
146964              <access>read-write</access>
146965            </field>
146966          </fields>
146967        </register>
146968        <register>
146969          <name>GPCNT0_VAL</name>
146970          <description>General Purpose Counter 0 Timeout Value Register</description>
146971          <addressOffset>0x44</addressOffset>
146972          <size>32</size>
146973          <access>read-write</access>
146974          <resetValue>0xFFFF</resetValue>
146975          <resetMask>0xFFFFFFFF</resetMask>
146976          <fields>
146977            <field>
146978              <name>GPCNT0</name>
146979              <description>General Purpose Counter 0 Timeout Value</description>
146980              <bitOffset>0</bitOffset>
146981              <bitWidth>16</bitWidth>
146982              <access>read-write</access>
146983            </field>
146984          </fields>
146985        </register>
146986        <register>
146987          <name>GPCNT1_VAL</name>
146988          <description>General Purpose Counter 1 Timeout Value</description>
146989          <addressOffset>0x48</addressOffset>
146990          <size>32</size>
146991          <access>read-write</access>
146992          <resetValue>0xFFFF</resetValue>
146993          <resetMask>0xFFFFFFFF</resetMask>
146994          <fields>
146995            <field>
146996              <name>GPCNT1</name>
146997              <description>General Purpose Counter 1 Timeout Value</description>
146998              <bitOffset>0</bitOffset>
146999              <bitWidth>16</bitWidth>
147000              <access>read-write</access>
147001            </field>
147002          </fields>
147003        </register>
147004      </registers>
147005    </peripheral>
147006    <peripheral>
147007      <name>EMVSIM1</name>
147008      <description>EMVSIM</description>
147009      <groupName>EMVSIM</groupName>
147010      <prependToName>EMVSIM1_</prependToName>
147011      <baseAddress>0x400D5000</baseAddress>
147012      <addressBlock>
147013        <offset>0</offset>
147014        <size>0x4C</size>
147015        <usage>registers</usage>
147016      </addressBlock>
147017      <interrupt>
147018        <name>EMVSIM1</name>
147019        <value>38</value>
147020      </interrupt>
147021      <registers>
147022        <register>
147023          <name>VER_ID</name>
147024          <description>Version ID Register</description>
147025          <addressOffset>0</addressOffset>
147026          <size>32</size>
147027          <access>read-only</access>
147028          <resetValue>0</resetValue>
147029          <resetMask>0xFFFFFFFF</resetMask>
147030          <fields>
147031            <field>
147032              <name>VER</name>
147033              <description>Version ID of the module</description>
147034              <bitOffset>0</bitOffset>
147035              <bitWidth>32</bitWidth>
147036              <access>read-only</access>
147037            </field>
147038          </fields>
147039        </register>
147040        <register>
147041          <name>PARAM</name>
147042          <description>Parameter Register</description>
147043          <addressOffset>0x4</addressOffset>
147044          <size>32</size>
147045          <access>read-only</access>
147046          <resetValue>0x1010</resetValue>
147047          <resetMask>0xFFFFFFFF</resetMask>
147048          <fields>
147049            <field>
147050              <name>RX_FIFO_DEPTH</name>
147051              <description>Receive FIFO Depth</description>
147052              <bitOffset>0</bitOffset>
147053              <bitWidth>8</bitWidth>
147054              <access>read-only</access>
147055            </field>
147056            <field>
147057              <name>TX_FIFO_DEPTH</name>
147058              <description>Transmit FIFO Depth</description>
147059              <bitOffset>8</bitOffset>
147060              <bitWidth>8</bitWidth>
147061              <access>read-only</access>
147062            </field>
147063          </fields>
147064        </register>
147065        <register>
147066          <name>CLKCFG</name>
147067          <description>Clock Configuration Register</description>
147068          <addressOffset>0x8</addressOffset>
147069          <size>32</size>
147070          <access>read-write</access>
147071          <resetValue>0</resetValue>
147072          <resetMask>0xFFFFFFFF</resetMask>
147073          <fields>
147074            <field>
147075              <name>CLK_PRSC</name>
147076              <description>Clock Prescaler Value</description>
147077              <bitOffset>0</bitOffset>
147078              <bitWidth>8</bitWidth>
147079              <access>read-write</access>
147080              <enumeratedValues>
147081                <enumeratedValue>
147082                  <name>10</name>
147083                  <description>Divide by 2</description>
147084                  <value>#10</value>
147085                </enumeratedValue>
147086              </enumeratedValues>
147087            </field>
147088            <field>
147089              <name>GPCNT1_CLK_SEL</name>
147090              <description>General Purpose Counter 1 Clock Select</description>
147091              <bitOffset>8</bitOffset>
147092              <bitWidth>2</bitWidth>
147093              <access>read-write</access>
147094              <enumeratedValues>
147095                <enumeratedValue>
147096                  <name>00</name>
147097                  <description>Disabled / Reset (default)</description>
147098                  <value>#00</value>
147099                </enumeratedValue>
147100                <enumeratedValue>
147101                  <name>01</name>
147102                  <description>Card Clock</description>
147103                  <value>#01</value>
147104                </enumeratedValue>
147105                <enumeratedValue>
147106                  <name>10</name>
147107                  <description>Receive Clock</description>
147108                  <value>#10</value>
147109                </enumeratedValue>
147110                <enumeratedValue>
147111                  <name>11</name>
147112                  <description>ETU Clock (transmit clock)</description>
147113                  <value>#11</value>
147114                </enumeratedValue>
147115              </enumeratedValues>
147116            </field>
147117            <field>
147118              <name>GPCNT0_CLK_SEL</name>
147119              <description>General Purpose Counter 0 Clock Select</description>
147120              <bitOffset>10</bitOffset>
147121              <bitWidth>2</bitWidth>
147122              <access>read-write</access>
147123              <enumeratedValues>
147124                <enumeratedValue>
147125                  <name>00</name>
147126                  <description>Disabled / Reset (default)</description>
147127                  <value>#00</value>
147128                </enumeratedValue>
147129                <enumeratedValue>
147130                  <name>01</name>
147131                  <description>Card Clock</description>
147132                  <value>#01</value>
147133                </enumeratedValue>
147134                <enumeratedValue>
147135                  <name>10</name>
147136                  <description>Receive Clock</description>
147137                  <value>#10</value>
147138                </enumeratedValue>
147139                <enumeratedValue>
147140                  <name>11</name>
147141                  <description>ETU Clock (transmit clock)</description>
147142                  <value>#11</value>
147143                </enumeratedValue>
147144              </enumeratedValues>
147145            </field>
147146          </fields>
147147        </register>
147148        <register>
147149          <name>DIVISOR</name>
147150          <description>Baud Rate Divisor Register</description>
147151          <addressOffset>0xC</addressOffset>
147152          <size>32</size>
147153          <access>read-write</access>
147154          <resetValue>0x174</resetValue>
147155          <resetMask>0xFFFFFFFF</resetMask>
147156          <fields>
147157            <field>
147158              <name>DIVISOR_VALUE</name>
147159              <description>Divisor (F/D) Value</description>
147160              <bitOffset>0</bitOffset>
147161              <bitWidth>9</bitWidth>
147162              <access>read-write</access>
147163              <enumeratedValues>
147164                <enumeratedValue>
147165                  <name>101110100</name>
147166                  <description>Divisor value for F = 372 and D = 1 (default)</description>
147167                  <value>#101110100</value>
147168                </enumeratedValue>
147169              </enumeratedValues>
147170            </field>
147171          </fields>
147172        </register>
147173        <register>
147174          <name>CTRL</name>
147175          <description>Control Register</description>
147176          <addressOffset>0x10</addressOffset>
147177          <size>32</size>
147178          <access>read-write</access>
147179          <resetValue>0x1000006</resetValue>
147180          <resetMask>0xFFFFFFFF</resetMask>
147181          <fields>
147182            <field>
147183              <name>IC</name>
147184              <description>Inverse Convention</description>
147185              <bitOffset>0</bitOffset>
147186              <bitWidth>1</bitWidth>
147187              <access>read-write</access>
147188              <enumeratedValues>
147189                <enumeratedValue>
147190                  <name>0</name>
147191                  <description>Direction convention transfers enabled (default)</description>
147192                  <value>#0</value>
147193                </enumeratedValue>
147194                <enumeratedValue>
147195                  <name>1</name>
147196                  <description>Inverse convention transfers enabled</description>
147197                  <value>#1</value>
147198                </enumeratedValue>
147199              </enumeratedValues>
147200            </field>
147201            <field>
147202              <name>ICM</name>
147203              <description>Initial Character Mode</description>
147204              <bitOffset>1</bitOffset>
147205              <bitWidth>1</bitWidth>
147206              <access>read-write</access>
147207              <enumeratedValues>
147208                <enumeratedValue>
147209                  <name>0</name>
147210                  <description>Initial Character Mode disabled</description>
147211                  <value>#0</value>
147212                </enumeratedValue>
147213                <enumeratedValue>
147214                  <name>1</name>
147215                  <description>Initial Character Mode enabled (default)</description>
147216                  <value>#1</value>
147217                </enumeratedValue>
147218              </enumeratedValues>
147219            </field>
147220            <field>
147221              <name>ANACK</name>
147222              <description>Auto NACK Enable</description>
147223              <bitOffset>2</bitOffset>
147224              <bitWidth>1</bitWidth>
147225              <access>read-write</access>
147226              <enumeratedValues>
147227                <enumeratedValue>
147228                  <name>0</name>
147229                  <description>NACK generation on errors disabled</description>
147230                  <value>#0</value>
147231                </enumeratedValue>
147232                <enumeratedValue>
147233                  <name>1</name>
147234                  <description>NACK generation on errors enabled (default)</description>
147235                  <value>#1</value>
147236                </enumeratedValue>
147237              </enumeratedValues>
147238            </field>
147239            <field>
147240              <name>ONACK</name>
147241              <description>Overrun NACK Enable</description>
147242              <bitOffset>3</bitOffset>
147243              <bitWidth>1</bitWidth>
147244              <access>read-write</access>
147245              <enumeratedValues>
147246                <enumeratedValue>
147247                  <name>0</name>
147248                  <description>NACK generation on overrun is disabled (default)</description>
147249                  <value>#0</value>
147250                </enumeratedValue>
147251                <enumeratedValue>
147252                  <name>1</name>
147253                  <description>NACK generation on overrun is enabled</description>
147254                  <value>#1</value>
147255                </enumeratedValue>
147256              </enumeratedValues>
147257            </field>
147258            <field>
147259              <name>FLSH_RX</name>
147260              <description>Flush Receiver Bit</description>
147261              <bitOffset>8</bitOffset>
147262              <bitWidth>1</bitWidth>
147263              <access>write-only</access>
147264              <enumeratedValues>
147265                <enumeratedValue>
147266                  <name>0</name>
147267                  <description>EMV SIM Receiver normal operation (default)</description>
147268                  <value>#0</value>
147269                </enumeratedValue>
147270                <enumeratedValue>
147271                  <name>1</name>
147272                  <description>EMV SIM Receiver held in Reset</description>
147273                  <value>#1</value>
147274                </enumeratedValue>
147275              </enumeratedValues>
147276            </field>
147277            <field>
147278              <name>FLSH_TX</name>
147279              <description>Flush Transmitter Bit</description>
147280              <bitOffset>9</bitOffset>
147281              <bitWidth>1</bitWidth>
147282              <access>write-only</access>
147283              <enumeratedValues>
147284                <enumeratedValue>
147285                  <name>0</name>
147286                  <description>EMV SIM Transmitter normal operation (default)</description>
147287                  <value>#0</value>
147288                </enumeratedValue>
147289                <enumeratedValue>
147290                  <name>1</name>
147291                  <description>EMV SIM Transmitter held in Reset</description>
147292                  <value>#1</value>
147293                </enumeratedValue>
147294              </enumeratedValues>
147295            </field>
147296            <field>
147297              <name>SW_RST</name>
147298              <description>Software Reset Bit</description>
147299              <bitOffset>10</bitOffset>
147300              <bitWidth>1</bitWidth>
147301              <access>write-only</access>
147302              <enumeratedValues>
147303                <enumeratedValue>
147304                  <name>0</name>
147305                  <description>EMV SIM Normal operation (default)</description>
147306                  <value>#0</value>
147307                </enumeratedValue>
147308                <enumeratedValue>
147309                  <name>1</name>
147310                  <description>EMV SIM held in Reset</description>
147311                  <value>#1</value>
147312                </enumeratedValue>
147313              </enumeratedValues>
147314            </field>
147315            <field>
147316              <name>KILL_CLOCKS</name>
147317              <description>Kill all internal clocks</description>
147318              <bitOffset>11</bitOffset>
147319              <bitWidth>1</bitWidth>
147320              <access>read-write</access>
147321              <enumeratedValues>
147322                <enumeratedValue>
147323                  <name>0</name>
147324                  <description>EMV SIM input clock enabled (default)</description>
147325                  <value>#0</value>
147326                </enumeratedValue>
147327                <enumeratedValue>
147328                  <name>1</name>
147329                  <description>EMV SIM input clock is disabled</description>
147330                  <value>#1</value>
147331                </enumeratedValue>
147332              </enumeratedValues>
147333            </field>
147334            <field>
147335              <name>DOZE_EN</name>
147336              <description>Doze Enable</description>
147337              <bitOffset>12</bitOffset>
147338              <bitWidth>1</bitWidth>
147339              <access>read-write</access>
147340              <enumeratedValues>
147341                <enumeratedValue>
147342                  <name>0</name>
147343                  <description>DOZE instruction will gate all internal EMV SIM clocks as well as the Smart Card clock when the transmit FIFO is empty (default)</description>
147344                  <value>#0</value>
147345                </enumeratedValue>
147346                <enumeratedValue>
147347                  <name>1</name>
147348                  <description>DOZE instruction has no effect on EMV SIM module</description>
147349                  <value>#1</value>
147350                </enumeratedValue>
147351              </enumeratedValues>
147352            </field>
147353            <field>
147354              <name>STOP_EN</name>
147355              <description>STOP Enable</description>
147356              <bitOffset>13</bitOffset>
147357              <bitWidth>1</bitWidth>
147358              <access>read-write</access>
147359              <enumeratedValues>
147360                <enumeratedValue>
147361                  <name>0</name>
147362                  <description>STOP instruction shuts down all EMV SIM clocks (default)</description>
147363                  <value>#0</value>
147364                </enumeratedValue>
147365                <enumeratedValue>
147366                  <name>1</name>
147367                  <description>STOP instruction shuts down all clocks except for the Smart Card Clock (SCK) (clock provided to Smart Card)</description>
147368                  <value>#1</value>
147369                </enumeratedValue>
147370              </enumeratedValues>
147371            </field>
147372            <field>
147373              <name>RCV_EN</name>
147374              <description>Receiver Enable</description>
147375              <bitOffset>16</bitOffset>
147376              <bitWidth>1</bitWidth>
147377              <access>read-write</access>
147378              <enumeratedValues>
147379                <enumeratedValue>
147380                  <name>0</name>
147381                  <description>EMV SIM Receiver disabled (default)</description>
147382                  <value>#0</value>
147383                </enumeratedValue>
147384                <enumeratedValue>
147385                  <name>1</name>
147386                  <description>EMV SIM Receiver enabled</description>
147387                  <value>#1</value>
147388                </enumeratedValue>
147389              </enumeratedValues>
147390            </field>
147391            <field>
147392              <name>XMT_EN</name>
147393              <description>Transmitter Enable</description>
147394              <bitOffset>17</bitOffset>
147395              <bitWidth>1</bitWidth>
147396              <access>read-write</access>
147397              <enumeratedValues>
147398                <enumeratedValue>
147399                  <name>0</name>
147400                  <description>EMV SIM Transmitter disabled (default)</description>
147401                  <value>#0</value>
147402                </enumeratedValue>
147403                <enumeratedValue>
147404                  <name>1</name>
147405                  <description>EMV SIM Transmitter enabled</description>
147406                  <value>#1</value>
147407                </enumeratedValue>
147408              </enumeratedValues>
147409            </field>
147410            <field>
147411              <name>RCVR_11</name>
147412              <description>Receiver 11 ETU Mode Enable</description>
147413              <bitOffset>18</bitOffset>
147414              <bitWidth>1</bitWidth>
147415              <access>read-write</access>
147416              <enumeratedValues>
147417                <enumeratedValue>
147418                  <name>0</name>
147419                  <description>Receiver configured for 12 ETU operation mode (default)</description>
147420                  <value>#0</value>
147421                </enumeratedValue>
147422                <enumeratedValue>
147423                  <name>1</name>
147424                  <description>Receiver configured for 11 ETU operation mode</description>
147425                  <value>#1</value>
147426                </enumeratedValue>
147427              </enumeratedValues>
147428            </field>
147429            <field>
147430              <name>RX_DMA_EN</name>
147431              <description>Receive DMA Enable</description>
147432              <bitOffset>19</bitOffset>
147433              <bitWidth>1</bitWidth>
147434              <access>read-write</access>
147435              <enumeratedValues>
147436                <enumeratedValue>
147437                  <name>0</name>
147438                  <description>No DMA Read Request asserted for Receiver (default)</description>
147439                  <value>#0</value>
147440                </enumeratedValue>
147441                <enumeratedValue>
147442                  <name>1</name>
147443                  <description>DMA Read Request asserted for Receiver</description>
147444                  <value>#1</value>
147445                </enumeratedValue>
147446              </enumeratedValues>
147447            </field>
147448            <field>
147449              <name>TX_DMA_EN</name>
147450              <description>Transmit DMA Enable</description>
147451              <bitOffset>20</bitOffset>
147452              <bitWidth>1</bitWidth>
147453              <access>read-write</access>
147454              <enumeratedValues>
147455                <enumeratedValue>
147456                  <name>0</name>
147457                  <description>No DMA Write Request asserted for Transmitter (default)</description>
147458                  <value>#0</value>
147459                </enumeratedValue>
147460                <enumeratedValue>
147461                  <name>1</name>
147462                  <description>DMA Write Request asserted for Transmitter</description>
147463                  <value>#1</value>
147464                </enumeratedValue>
147465              </enumeratedValues>
147466            </field>
147467            <field>
147468              <name>INV_CRC_VAL</name>
147469              <description>Invert bits in the CRC Output Value</description>
147470              <bitOffset>24</bitOffset>
147471              <bitWidth>1</bitWidth>
147472              <access>read-write</access>
147473              <enumeratedValues>
147474                <enumeratedValue>
147475                  <name>0</name>
147476                  <description>Bits in CRC Output value will not be inverted.</description>
147477                  <value>#0</value>
147478                </enumeratedValue>
147479                <enumeratedValue>
147480                  <name>1</name>
147481                  <description>Bits in CRC Output value will be inverted. (default)</description>
147482                  <value>#1</value>
147483                </enumeratedValue>
147484              </enumeratedValues>
147485            </field>
147486            <field>
147487              <name>CRC_OUT_FLIP</name>
147488              <description>CRC Output Value Bit Reversal or Flip</description>
147489              <bitOffset>25</bitOffset>
147490              <bitWidth>1</bitWidth>
147491              <access>read-write</access>
147492              <enumeratedValues>
147493                <enumeratedValue>
147494                  <name>0</name>
147495                  <description>Bits within the CRC output bytes will not be reversed i.e. 15:0 will remain 15:0 (default)</description>
147496                  <value>#0</value>
147497                </enumeratedValue>
147498                <enumeratedValue>
147499                  <name>1</name>
147500                  <description>Bits within the CRC output bytes will be reversed i.e. 15:0 will become {8:15,0:7}</description>
147501                  <value>#1</value>
147502                </enumeratedValue>
147503              </enumeratedValues>
147504            </field>
147505            <field>
147506              <name>CRC_IN_FLIP</name>
147507              <description>CRC Input Byte&apos;s Bit Reversal or Flip Control</description>
147508              <bitOffset>26</bitOffset>
147509              <bitWidth>1</bitWidth>
147510              <access>read-write</access>
147511              <enumeratedValues>
147512                <enumeratedValue>
147513                  <name>0</name>
147514                  <description>Bits in the input byte will not be reversed (i.e. 7:0 will remain 7:0) before the CRC calculation (default)</description>
147515                  <value>#0</value>
147516                </enumeratedValue>
147517                <enumeratedValue>
147518                  <name>1</name>
147519                  <description>Bits in the input byte will be reversed (i.e. 7:0 will become 0:7) before CRC calculation</description>
147520                  <value>#1</value>
147521                </enumeratedValue>
147522              </enumeratedValues>
147523            </field>
147524            <field>
147525              <name>CWT_EN</name>
147526              <description>Character Wait Time Counter Enable</description>
147527              <bitOffset>27</bitOffset>
147528              <bitWidth>1</bitWidth>
147529              <access>read-write</access>
147530              <enumeratedValues>
147531                <enumeratedValue>
147532                  <name>0</name>
147533                  <description>Character Wait time Counter is disabled (default)</description>
147534                  <value>#0</value>
147535                </enumeratedValue>
147536                <enumeratedValue>
147537                  <name>1</name>
147538                  <description>Character Wait time counter is enabled</description>
147539                  <value>#1</value>
147540                </enumeratedValue>
147541              </enumeratedValues>
147542            </field>
147543            <field>
147544              <name>LRC_EN</name>
147545              <description>LRC Enable</description>
147546              <bitOffset>28</bitOffset>
147547              <bitWidth>1</bitWidth>
147548              <access>read-write</access>
147549              <enumeratedValues>
147550                <enumeratedValue>
147551                  <name>0</name>
147552                  <description>8-bit Linear Redundancy Checking disabled (default)</description>
147553                  <value>#0</value>
147554                </enumeratedValue>
147555                <enumeratedValue>
147556                  <name>1</name>
147557                  <description>8-bit Linear Redundancy Checking enabled</description>
147558                  <value>#1</value>
147559                </enumeratedValue>
147560              </enumeratedValues>
147561            </field>
147562            <field>
147563              <name>CRC_EN</name>
147564              <description>CRC Enable</description>
147565              <bitOffset>29</bitOffset>
147566              <bitWidth>1</bitWidth>
147567              <access>read-write</access>
147568              <enumeratedValues>
147569                <enumeratedValue>
147570                  <name>0</name>
147571                  <description>16-bit Cyclic Redundancy Checking disabled (default)</description>
147572                  <value>#0</value>
147573                </enumeratedValue>
147574                <enumeratedValue>
147575                  <name>1</name>
147576                  <description>16-bit Cyclic Redundancy Checking enabled</description>
147577                  <value>#1</value>
147578                </enumeratedValue>
147579              </enumeratedValues>
147580            </field>
147581            <field>
147582              <name>XMT_CRC_LRC</name>
147583              <description>Transmit CRC or LRC Enable</description>
147584              <bitOffset>30</bitOffset>
147585              <bitWidth>1</bitWidth>
147586              <access>read-write</access>
147587              <enumeratedValues>
147588                <enumeratedValue>
147589                  <name>0</name>
147590                  <description>No CRC or LRC value is transmitted (default)</description>
147591                  <value>#0</value>
147592                </enumeratedValue>
147593                <enumeratedValue>
147594                  <name>1</name>
147595                  <description>Transmit LRC or CRC info when FIFO empties (whichever is enabled)</description>
147596                  <value>#1</value>
147597                </enumeratedValue>
147598              </enumeratedValues>
147599            </field>
147600            <field>
147601              <name>BWT_EN</name>
147602              <description>Block Wait Time Counter Enable</description>
147603              <bitOffset>31</bitOffset>
147604              <bitWidth>1</bitWidth>
147605              <access>read-write</access>
147606              <enumeratedValues>
147607                <enumeratedValue>
147608                  <name>0</name>
147609                  <description>Disable BWT, BGT Counters (default)</description>
147610                  <value>#0</value>
147611                </enumeratedValue>
147612                <enumeratedValue>
147613                  <name>1</name>
147614                  <description>Enable BWT, BGT Counters</description>
147615                  <value>#1</value>
147616                </enumeratedValue>
147617              </enumeratedValues>
147618            </field>
147619          </fields>
147620        </register>
147621        <register>
147622          <name>INT_MASK</name>
147623          <description>Interrupt Mask Register</description>
147624          <addressOffset>0x14</addressOffset>
147625          <size>32</size>
147626          <access>read-write</access>
147627          <resetValue>0xFFFF</resetValue>
147628          <resetMask>0xFFFFFFFF</resetMask>
147629          <fields>
147630            <field>
147631              <name>RDT_IM</name>
147632              <description>Receive Data Threshold Interrupt Mask</description>
147633              <bitOffset>0</bitOffset>
147634              <bitWidth>1</bitWidth>
147635              <access>read-write</access>
147636              <enumeratedValues>
147637                <enumeratedValue>
147638                  <name>0</name>
147639                  <description>RDTF interrupt enabled</description>
147640                  <value>#0</value>
147641                </enumeratedValue>
147642                <enumeratedValue>
147643                  <name>1</name>
147644                  <description>RDTF interrupt masked (default)</description>
147645                  <value>#1</value>
147646                </enumeratedValue>
147647              </enumeratedValues>
147648            </field>
147649            <field>
147650              <name>TC_IM</name>
147651              <description>Transmit Complete Interrupt Mask</description>
147652              <bitOffset>1</bitOffset>
147653              <bitWidth>1</bitWidth>
147654              <access>read-write</access>
147655              <enumeratedValues>
147656                <enumeratedValue>
147657                  <name>0</name>
147658                  <description>TCF interrupt enabled</description>
147659                  <value>#0</value>
147660                </enumeratedValue>
147661                <enumeratedValue>
147662                  <name>1</name>
147663                  <description>TCF interrupt masked (default)</description>
147664                  <value>#1</value>
147665                </enumeratedValue>
147666              </enumeratedValues>
147667            </field>
147668            <field>
147669              <name>RFO_IM</name>
147670              <description>Receive FIFO Overflow Interrupt Mask</description>
147671              <bitOffset>2</bitOffset>
147672              <bitWidth>1</bitWidth>
147673              <access>read-write</access>
147674              <enumeratedValues>
147675                <enumeratedValue>
147676                  <name>0</name>
147677                  <description>RFO interrupt enabled</description>
147678                  <value>#0</value>
147679                </enumeratedValue>
147680                <enumeratedValue>
147681                  <name>1</name>
147682                  <description>RFO interrupt masked (default)</description>
147683                  <value>#1</value>
147684                </enumeratedValue>
147685              </enumeratedValues>
147686            </field>
147687            <field>
147688              <name>ETC_IM</name>
147689              <description>Early Transmit Complete Interrupt Mask</description>
147690              <bitOffset>3</bitOffset>
147691              <bitWidth>1</bitWidth>
147692              <access>read-write</access>
147693              <enumeratedValues>
147694                <enumeratedValue>
147695                  <name>0</name>
147696                  <description>ETC interrupt enabled</description>
147697                  <value>#0</value>
147698                </enumeratedValue>
147699                <enumeratedValue>
147700                  <name>1</name>
147701                  <description>ETC interrupt masked (default)</description>
147702                  <value>#1</value>
147703                </enumeratedValue>
147704              </enumeratedValues>
147705            </field>
147706            <field>
147707              <name>TFE_IM</name>
147708              <description>Transmit FIFO Empty Interrupt Mask</description>
147709              <bitOffset>4</bitOffset>
147710              <bitWidth>1</bitWidth>
147711              <access>read-write</access>
147712              <enumeratedValues>
147713                <enumeratedValue>
147714                  <name>0</name>
147715                  <description>TFE interrupt enabled</description>
147716                  <value>#0</value>
147717                </enumeratedValue>
147718                <enumeratedValue>
147719                  <name>1</name>
147720                  <description>TFE interrupt masked (default)</description>
147721                  <value>#1</value>
147722                </enumeratedValue>
147723              </enumeratedValues>
147724            </field>
147725            <field>
147726              <name>TNACK_IM</name>
147727              <description>Transmit NACK Threshold Interrupt Mask</description>
147728              <bitOffset>5</bitOffset>
147729              <bitWidth>1</bitWidth>
147730              <access>read-write</access>
147731              <enumeratedValues>
147732                <enumeratedValue>
147733                  <name>0</name>
147734                  <description>TNTE interrupt enabled</description>
147735                  <value>#0</value>
147736                </enumeratedValue>
147737                <enumeratedValue>
147738                  <name>1</name>
147739                  <description>TNTE interrupt masked (default)</description>
147740                  <value>#1</value>
147741                </enumeratedValue>
147742              </enumeratedValues>
147743            </field>
147744            <field>
147745              <name>TFF_IM</name>
147746              <description>Transmit FIFO Full Interrupt Mask</description>
147747              <bitOffset>6</bitOffset>
147748              <bitWidth>1</bitWidth>
147749              <access>read-write</access>
147750              <enumeratedValues>
147751                <enumeratedValue>
147752                  <name>0</name>
147753                  <description>TFF interrupt enabled</description>
147754                  <value>#0</value>
147755                </enumeratedValue>
147756                <enumeratedValue>
147757                  <name>1</name>
147758                  <description>TFF interrupt masked (default)</description>
147759                  <value>#1</value>
147760                </enumeratedValue>
147761              </enumeratedValues>
147762            </field>
147763            <field>
147764              <name>TDT_IM</name>
147765              <description>Transmit Data Threshold Interrupt Mask</description>
147766              <bitOffset>7</bitOffset>
147767              <bitWidth>1</bitWidth>
147768              <access>read-write</access>
147769              <enumeratedValues>
147770                <enumeratedValue>
147771                  <name>0</name>
147772                  <description>TDTF interrupt enabled</description>
147773                  <value>#0</value>
147774                </enumeratedValue>
147775                <enumeratedValue>
147776                  <name>1</name>
147777                  <description>TDTF interrupt masked (default)</description>
147778                  <value>#1</value>
147779                </enumeratedValue>
147780              </enumeratedValues>
147781            </field>
147782            <field>
147783              <name>GPCNT0_IM</name>
147784              <description>General Purpose Timer 0 Timeout Interrupt Mask</description>
147785              <bitOffset>8</bitOffset>
147786              <bitWidth>1</bitWidth>
147787              <access>read-write</access>
147788              <enumeratedValues>
147789                <enumeratedValue>
147790                  <name>0</name>
147791                  <description>GPCNT0_TO interrupt enabled</description>
147792                  <value>#0</value>
147793                </enumeratedValue>
147794                <enumeratedValue>
147795                  <name>1</name>
147796                  <description>GPCNT0_TO interrupt masked (default)</description>
147797                  <value>#1</value>
147798                </enumeratedValue>
147799              </enumeratedValues>
147800            </field>
147801            <field>
147802              <name>CWT_ERR_IM</name>
147803              <description>Character Wait Time Error Interrupt Mask</description>
147804              <bitOffset>9</bitOffset>
147805              <bitWidth>1</bitWidth>
147806              <access>read-write</access>
147807              <enumeratedValues>
147808                <enumeratedValue>
147809                  <name>0</name>
147810                  <description>CWT_ERR interrupt enabled</description>
147811                  <value>#0</value>
147812                </enumeratedValue>
147813                <enumeratedValue>
147814                  <name>1</name>
147815                  <description>CWT_ERR interrupt masked (default)</description>
147816                  <value>#1</value>
147817                </enumeratedValue>
147818              </enumeratedValues>
147819            </field>
147820            <field>
147821              <name>RNACK_IM</name>
147822              <description>Receiver NACK Threshold Interrupt Mask</description>
147823              <bitOffset>10</bitOffset>
147824              <bitWidth>1</bitWidth>
147825              <access>read-write</access>
147826              <enumeratedValues>
147827                <enumeratedValue>
147828                  <name>0</name>
147829                  <description>RTE interrupt enabled</description>
147830                  <value>#0</value>
147831                </enumeratedValue>
147832                <enumeratedValue>
147833                  <name>1</name>
147834                  <description>RTE interrupt masked (default)</description>
147835                  <value>#1</value>
147836                </enumeratedValue>
147837              </enumeratedValues>
147838            </field>
147839            <field>
147840              <name>BWT_ERR_IM</name>
147841              <description>Block Wait Time Error Interrupt Mask</description>
147842              <bitOffset>11</bitOffset>
147843              <bitWidth>1</bitWidth>
147844              <access>read-write</access>
147845              <enumeratedValues>
147846                <enumeratedValue>
147847                  <name>0</name>
147848                  <description>BWT_ERR interrupt enabled</description>
147849                  <value>#0</value>
147850                </enumeratedValue>
147851                <enumeratedValue>
147852                  <name>1</name>
147853                  <description>BWT_ERR interrupt masked (default)</description>
147854                  <value>#1</value>
147855                </enumeratedValue>
147856              </enumeratedValues>
147857            </field>
147858            <field>
147859              <name>BGT_ERR_IM</name>
147860              <description>Block Guard Time Error Interrupt</description>
147861              <bitOffset>12</bitOffset>
147862              <bitWidth>1</bitWidth>
147863              <access>read-write</access>
147864              <enumeratedValues>
147865                <enumeratedValue>
147866                  <name>0</name>
147867                  <description>BGT_ERR interrupt enabled</description>
147868                  <value>#0</value>
147869                </enumeratedValue>
147870                <enumeratedValue>
147871                  <name>1</name>
147872                  <description>BGT_ERR interrupt masked (default)</description>
147873                  <value>#1</value>
147874                </enumeratedValue>
147875              </enumeratedValues>
147876            </field>
147877            <field>
147878              <name>GPCNT1_IM</name>
147879              <description>General Purpose Counter 1 Timeout Interrupt Mask</description>
147880              <bitOffset>13</bitOffset>
147881              <bitWidth>1</bitWidth>
147882              <access>read-write</access>
147883              <enumeratedValues>
147884                <enumeratedValue>
147885                  <name>0</name>
147886                  <description>GPCNT1_TO interrupt enabled</description>
147887                  <value>#0</value>
147888                </enumeratedValue>
147889                <enumeratedValue>
147890                  <name>1</name>
147891                  <description>GPCNT1_TO interrupt masked (default)</description>
147892                  <value>#1</value>
147893                </enumeratedValue>
147894              </enumeratedValues>
147895            </field>
147896            <field>
147897              <name>RX_DATA_IM</name>
147898              <description>Receive Data Interrupt Mask</description>
147899              <bitOffset>14</bitOffset>
147900              <bitWidth>1</bitWidth>
147901              <access>read-write</access>
147902              <enumeratedValues>
147903                <enumeratedValue>
147904                  <name>0</name>
147905                  <description>RX_DATA interrupt enabled</description>
147906                  <value>#0</value>
147907                </enumeratedValue>
147908                <enumeratedValue>
147909                  <name>1</name>
147910                  <description>RX_DATA interrupt masked (default)</description>
147911                  <value>#1</value>
147912                </enumeratedValue>
147913              </enumeratedValues>
147914            </field>
147915            <field>
147916              <name>PEF_IM</name>
147917              <description>Parity Error Interrupt Mask</description>
147918              <bitOffset>15</bitOffset>
147919              <bitWidth>1</bitWidth>
147920              <access>read-write</access>
147921              <enumeratedValues>
147922                <enumeratedValue>
147923                  <name>0</name>
147924                  <description>PEF interrupt enabled</description>
147925                  <value>#0</value>
147926                </enumeratedValue>
147927                <enumeratedValue>
147928                  <name>1</name>
147929                  <description>PEF interrupt masked (default)</description>
147930                  <value>#1</value>
147931                </enumeratedValue>
147932              </enumeratedValues>
147933            </field>
147934          </fields>
147935        </register>
147936        <register>
147937          <name>RX_THD</name>
147938          <description>Receiver Threshold Register</description>
147939          <addressOffset>0x18</addressOffset>
147940          <size>32</size>
147941          <access>read-write</access>
147942          <resetValue>0x1</resetValue>
147943          <resetMask>0xFFFFFFFF</resetMask>
147944          <fields>
147945            <field>
147946              <name>RDT</name>
147947              <description>Receiver Data Threshold Value</description>
147948              <bitOffset>0</bitOffset>
147949              <bitWidth>4</bitWidth>
147950              <access>read-write</access>
147951            </field>
147952            <field>
147953              <name>RNCK_THD</name>
147954              <description>Receiver NACK Threshold Value</description>
147955              <bitOffset>8</bitOffset>
147956              <bitWidth>4</bitWidth>
147957              <access>read-write</access>
147958              <enumeratedValues>
147959                <enumeratedValue>
147960                  <name>0</name>
147961                  <description>Zero Threshold. RTE will not be set</description>
147962                  <value>#0000</value>
147963                </enumeratedValue>
147964              </enumeratedValues>
147965            </field>
147966          </fields>
147967        </register>
147968        <register>
147969          <name>TX_THD</name>
147970          <description>Transmitter Threshold Register</description>
147971          <addressOffset>0x1C</addressOffset>
147972          <size>32</size>
147973          <access>read-write</access>
147974          <resetValue>0xF</resetValue>
147975          <resetMask>0xFFFFFFFF</resetMask>
147976          <fields>
147977            <field>
147978              <name>TDT</name>
147979              <description>Transmitter Data Threshold Value</description>
147980              <bitOffset>0</bitOffset>
147981              <bitWidth>4</bitWidth>
147982              <access>read-write</access>
147983            </field>
147984            <field>
147985              <name>TNCK_THD</name>
147986              <description>Transmitter NACK Threshold Value</description>
147987              <bitOffset>8</bitOffset>
147988              <bitWidth>4</bitWidth>
147989              <access>read-write</access>
147990              <enumeratedValues>
147991                <enumeratedValue>
147992                  <name>0</name>
147993                  <description>TNTE will never be set; retransmission after NACK reception is disabled.</description>
147994                  <value>#0000</value>
147995                </enumeratedValue>
147996                <enumeratedValue>
147997                  <name>1</name>
147998                  <description>TNTE will be set after 1 nack is received; 0 retransmissions occurs.</description>
147999                  <value>#0001</value>
148000                </enumeratedValue>
148001                <enumeratedValue>
148002                  <name>10</name>
148003                  <description>TNTE will be set after 2 nacks are received; at most 1 retransmission occurs.</description>
148004                  <value>#0010</value>
148005                </enumeratedValue>
148006                <enumeratedValue>
148007                  <name>11</name>
148008                  <description>TNTE will be set after 3 nacks are received; at most 2 retransmissions occurs.</description>
148009                  <value>#0011</value>
148010                </enumeratedValue>
148011                <enumeratedValue>
148012                  <name>1111</name>
148013                  <description>TNTE will be set after 15 nacks are received; at most 14 retransmissions occurs.</description>
148014                  <value>#1111</value>
148015                </enumeratedValue>
148016              </enumeratedValues>
148017            </field>
148018          </fields>
148019        </register>
148020        <register>
148021          <name>RX_STATUS</name>
148022          <description>Receive Status Register</description>
148023          <addressOffset>0x20</addressOffset>
148024          <size>32</size>
148025          <access>read-write</access>
148026          <resetValue>0</resetValue>
148027          <resetMask>0xFFFFFFFF</resetMask>
148028          <fields>
148029            <field>
148030              <name>RFO</name>
148031              <description>Receive FIFO Overflow Flag</description>
148032              <bitOffset>0</bitOffset>
148033              <bitWidth>1</bitWidth>
148034              <access>read-write</access>
148035              <enumeratedValues>
148036                <enumeratedValue>
148037                  <name>0</name>
148038                  <description>No overrun error has occurred (default)</description>
148039                  <value>#0</value>
148040                </enumeratedValue>
148041                <enumeratedValue>
148042                  <name>1</name>
148043                  <description>A byte was received when the received FIFO was already full</description>
148044                  <value>#1</value>
148045                </enumeratedValue>
148046              </enumeratedValues>
148047            </field>
148048            <field>
148049              <name>RX_DATA</name>
148050              <description>Receive Data Interrupt Flag</description>
148051              <bitOffset>4</bitOffset>
148052              <bitWidth>1</bitWidth>
148053              <access>read-write</access>
148054              <enumeratedValues>
148055                <enumeratedValue>
148056                  <name>0</name>
148057                  <description>No new byte is received</description>
148058                  <value>#0</value>
148059                </enumeratedValue>
148060                <enumeratedValue>
148061                  <name>1</name>
148062                  <description>New byte is received ans stored in Receive FIFO</description>
148063                  <value>#1</value>
148064                </enumeratedValue>
148065              </enumeratedValues>
148066            </field>
148067            <field>
148068              <name>RDTF</name>
148069              <description>Receive Data Threshold Interrupt Flag</description>
148070              <bitOffset>5</bitOffset>
148071              <bitWidth>1</bitWidth>
148072              <access>read-only</access>
148073              <enumeratedValues>
148074                <enumeratedValue>
148075                  <name>0</name>
148076                  <description>Number of unread bytes in receive FIFO less than the value set by RDT[3:0] (default).</description>
148077                  <value>#0</value>
148078                </enumeratedValue>
148079                <enumeratedValue>
148080                  <name>1</name>
148081                  <description>Number of unread bytes in receive FIFO greater or than equal to value set by RDT[3:0].</description>
148082                  <value>#1</value>
148083                </enumeratedValue>
148084              </enumeratedValues>
148085            </field>
148086            <field>
148087              <name>LRC_OK</name>
148088              <description>LRC Check OK Flag</description>
148089              <bitOffset>6</bitOffset>
148090              <bitWidth>1</bitWidth>
148091              <access>read-only</access>
148092              <enumeratedValues>
148093                <enumeratedValue>
148094                  <name>0</name>
148095                  <description>Current LRC value does not match remainder.</description>
148096                  <value>#0</value>
148097                </enumeratedValue>
148098                <enumeratedValue>
148099                  <name>1</name>
148100                  <description>Current calculated LRC value matches the expected result (i.e. zero).</description>
148101                  <value>#1</value>
148102                </enumeratedValue>
148103              </enumeratedValues>
148104            </field>
148105            <field>
148106              <name>CRC_OK</name>
148107              <description>CRC Check OK Flag</description>
148108              <bitOffset>7</bitOffset>
148109              <bitWidth>1</bitWidth>
148110              <access>read-only</access>
148111              <enumeratedValues>
148112                <enumeratedValue>
148113                  <name>0</name>
148114                  <description>Current CRC value does not match remainder.</description>
148115                  <value>#0</value>
148116                </enumeratedValue>
148117                <enumeratedValue>
148118                  <name>1</name>
148119                  <description>Current calculated CRC value matches the expected result.</description>
148120                  <value>#1</value>
148121                </enumeratedValue>
148122              </enumeratedValues>
148123            </field>
148124            <field>
148125              <name>CWT_ERR</name>
148126              <description>Character Wait Time Error Flag</description>
148127              <bitOffset>8</bitOffset>
148128              <bitWidth>1</bitWidth>
148129              <access>read-write</access>
148130              <enumeratedValues>
148131                <enumeratedValue>
148132                  <name>0</name>
148133                  <description>No CWT violation has occurred (default).</description>
148134                  <value>#0</value>
148135                </enumeratedValue>
148136                <enumeratedValue>
148137                  <name>1</name>
148138                  <description>Time between two consecutive characters has exceeded the value in CHAR_WAIT.</description>
148139                  <value>#1</value>
148140                </enumeratedValue>
148141              </enumeratedValues>
148142            </field>
148143            <field>
148144              <name>RTE</name>
148145              <description>Received NACK Threshold Error Flag</description>
148146              <bitOffset>9</bitOffset>
148147              <bitWidth>1</bitWidth>
148148              <access>read-write</access>
148149              <enumeratedValues>
148150                <enumeratedValue>
148151                  <name>0</name>
148152                  <description>Number of NACKs generated by the receiver is less than the value programmed in RTH[3:0]</description>
148153                  <value>#0</value>
148154                </enumeratedValue>
148155                <enumeratedValue>
148156                  <name>1</name>
148157                  <description>Number of NACKs generated by the receiver is equal to the value programmed in RTH[3:0]</description>
148158                  <value>#1</value>
148159                </enumeratedValue>
148160              </enumeratedValues>
148161            </field>
148162            <field>
148163              <name>BWT_ERR</name>
148164              <description>Block Wait Time Error Flag</description>
148165              <bitOffset>10</bitOffset>
148166              <bitWidth>1</bitWidth>
148167              <access>read-write</access>
148168              <enumeratedValues>
148169                <enumeratedValue>
148170                  <name>0</name>
148171                  <description>Block wait time not exceeded</description>
148172                  <value>#0</value>
148173                </enumeratedValue>
148174                <enumeratedValue>
148175                  <name>1</name>
148176                  <description>Block wait time was exceeded</description>
148177                  <value>#1</value>
148178                </enumeratedValue>
148179              </enumeratedValues>
148180            </field>
148181            <field>
148182              <name>BGT_ERR</name>
148183              <description>Block Guard Time Error Flag</description>
148184              <bitOffset>11</bitOffset>
148185              <bitWidth>1</bitWidth>
148186              <access>read-write</access>
148187              <enumeratedValues>
148188                <enumeratedValue>
148189                  <name>0</name>
148190                  <description>Block guard time was sufficient</description>
148191                  <value>#0</value>
148192                </enumeratedValue>
148193                <enumeratedValue>
148194                  <name>1</name>
148195                  <description>Block guard time was too small</description>
148196                  <value>#1</value>
148197                </enumeratedValue>
148198              </enumeratedValues>
148199            </field>
148200            <field>
148201              <name>PEF</name>
148202              <description>Parity Error Flag</description>
148203              <bitOffset>12</bitOffset>
148204              <bitWidth>1</bitWidth>
148205              <access>read-write</access>
148206              <enumeratedValues>
148207                <enumeratedValue>
148208                  <name>0</name>
148209                  <description>No parity error detected</description>
148210                  <value>#0</value>
148211                </enumeratedValue>
148212                <enumeratedValue>
148213                  <name>1</name>
148214                  <description>Parity error detected</description>
148215                  <value>#1</value>
148216                </enumeratedValue>
148217              </enumeratedValues>
148218            </field>
148219            <field>
148220              <name>FEF</name>
148221              <description>Frame Error Flag</description>
148222              <bitOffset>13</bitOffset>
148223              <bitWidth>1</bitWidth>
148224              <access>read-write</access>
148225              <enumeratedValues>
148226                <enumeratedValue>
148227                  <name>0</name>
148228                  <description>No frame error detected</description>
148229                  <value>#0</value>
148230                </enumeratedValue>
148231                <enumeratedValue>
148232                  <name>1</name>
148233                  <description>Frame error detected</description>
148234                  <value>#1</value>
148235                </enumeratedValue>
148236              </enumeratedValues>
148237            </field>
148238            <field>
148239              <name>RX_WPTR</name>
148240              <description>Receive FIFO Write Pointer Value</description>
148241              <bitOffset>16</bitOffset>
148242              <bitWidth>4</bitWidth>
148243              <access>read-only</access>
148244            </field>
148245            <field>
148246              <name>RX_CNT</name>
148247              <description>Receive FIFO Byte Count</description>
148248              <bitOffset>24</bitOffset>
148249              <bitWidth>5</bitWidth>
148250              <access>read-only</access>
148251              <enumeratedValues>
148252                <enumeratedValue>
148253                  <name>0</name>
148254                  <description>FIFO is emtpy</description>
148255                  <value>#00000</value>
148256                </enumeratedValue>
148257              </enumeratedValues>
148258            </field>
148259          </fields>
148260        </register>
148261        <register>
148262          <name>TX_STATUS</name>
148263          <description>Transmitter Status Register</description>
148264          <addressOffset>0x24</addressOffset>
148265          <size>32</size>
148266          <access>read-write</access>
148267          <resetValue>0xB8</resetValue>
148268          <resetMask>0xFFFFFFFF</resetMask>
148269          <fields>
148270            <field>
148271              <name>TNTE</name>
148272              <description>Transmit NACK Threshold Error Flag</description>
148273              <bitOffset>0</bitOffset>
148274              <bitWidth>1</bitWidth>
148275              <access>read-write</access>
148276              <enumeratedValues>
148277                <enumeratedValue>
148278                  <name>0</name>
148279                  <description>Transmit NACK threshold has not been reached (default)</description>
148280                  <value>#0</value>
148281                </enumeratedValue>
148282                <enumeratedValue>
148283                  <name>1</name>
148284                  <description>Transmit NACK threshold reached; transmitter frozen</description>
148285                  <value>#1</value>
148286                </enumeratedValue>
148287              </enumeratedValues>
148288            </field>
148289            <field>
148290              <name>TFE</name>
148291              <description>Transmit FIFO Empty Flag</description>
148292              <bitOffset>3</bitOffset>
148293              <bitWidth>1</bitWidth>
148294              <access>read-write</access>
148295              <enumeratedValues>
148296                <enumeratedValue>
148297                  <name>0</name>
148298                  <description>Transmit FIFO is not empty</description>
148299                  <value>#0</value>
148300                </enumeratedValue>
148301                <enumeratedValue>
148302                  <name>1</name>
148303                  <description>Transmit FIFO is empty (default)</description>
148304                  <value>#1</value>
148305                </enumeratedValue>
148306              </enumeratedValues>
148307            </field>
148308            <field>
148309              <name>ETCF</name>
148310              <description>Early Transmit Complete Flag</description>
148311              <bitOffset>4</bitOffset>
148312              <bitWidth>1</bitWidth>
148313              <access>read-write</access>
148314              <enumeratedValues>
148315                <enumeratedValue>
148316                  <name>0</name>
148317                  <description>Transmit pending or in progress</description>
148318                  <value>#0</value>
148319                </enumeratedValue>
148320                <enumeratedValue>
148321                  <name>1</name>
148322                  <description>Transmit complete (default)</description>
148323                  <value>#1</value>
148324                </enumeratedValue>
148325              </enumeratedValues>
148326            </field>
148327            <field>
148328              <name>TCF</name>
148329              <description>Transmit Complete Flag</description>
148330              <bitOffset>5</bitOffset>
148331              <bitWidth>1</bitWidth>
148332              <access>read-write</access>
148333              <enumeratedValues>
148334                <enumeratedValue>
148335                  <name>0</name>
148336                  <description>Transmit pending or in progress</description>
148337                  <value>#0</value>
148338                </enumeratedValue>
148339                <enumeratedValue>
148340                  <name>1</name>
148341                  <description>Transmit complete (default)</description>
148342                  <value>#1</value>
148343                </enumeratedValue>
148344              </enumeratedValues>
148345            </field>
148346            <field>
148347              <name>TFF</name>
148348              <description>Transmit FIFO Full Flag</description>
148349              <bitOffset>6</bitOffset>
148350              <bitWidth>1</bitWidth>
148351              <access>read-write</access>
148352              <enumeratedValues>
148353                <enumeratedValue>
148354                  <name>0</name>
148355                  <description>Transmit FIFO Full condition has not occurred (default)</description>
148356                  <value>#0</value>
148357                </enumeratedValue>
148358                <enumeratedValue>
148359                  <name>1</name>
148360                  <description>A Transmit FIFO Full condition has occurred</description>
148361                  <value>#1</value>
148362                </enumeratedValue>
148363              </enumeratedValues>
148364            </field>
148365            <field>
148366              <name>TDTF</name>
148367              <description>Transmit Data Threshold Flag</description>
148368              <bitOffset>7</bitOffset>
148369              <bitWidth>1</bitWidth>
148370              <access>read-only</access>
148371              <enumeratedValues>
148372                <enumeratedValue>
148373                  <name>0</name>
148374                  <description>Number of bytes in FIFO is greater than TDT[3:0], or bit has been cleared</description>
148375                  <value>#0</value>
148376                </enumeratedValue>
148377                <enumeratedValue>
148378                  <name>1</name>
148379                  <description>Number of bytes in FIFO is less than or equal to TDT[3:0] (default)</description>
148380                  <value>#1</value>
148381                </enumeratedValue>
148382              </enumeratedValues>
148383            </field>
148384            <field>
148385              <name>GPCNT0_TO</name>
148386              <description>General Purpose Counter 0 Timeout Flag</description>
148387              <bitOffset>8</bitOffset>
148388              <bitWidth>1</bitWidth>
148389              <access>read-write</access>
148390              <enumeratedValues>
148391                <enumeratedValue>
148392                  <name>0</name>
148393                  <description>GPCNT0_VAL time not reached, or bit has been cleared. (default)</description>
148394                  <value>#0</value>
148395                </enumeratedValue>
148396                <enumeratedValue>
148397                  <name>1</name>
148398                  <description>General Purpose counter has reached the GPCNT0_VAL value</description>
148399                  <value>#1</value>
148400                </enumeratedValue>
148401              </enumeratedValues>
148402            </field>
148403            <field>
148404              <name>GPCNT1_TO</name>
148405              <description>General Purpose Counter 1 Timeout Flag</description>
148406              <bitOffset>9</bitOffset>
148407              <bitWidth>1</bitWidth>
148408              <access>read-write</access>
148409              <enumeratedValues>
148410                <enumeratedValue>
148411                  <name>0</name>
148412                  <description>GPCNT1_VAL time not reached, or bit has been cleared. (default)</description>
148413                  <value>#0</value>
148414                </enumeratedValue>
148415                <enumeratedValue>
148416                  <name>1</name>
148417                  <description>General Purpose counter has reached the GPCNT1_VAL value</description>
148418                  <value>#1</value>
148419                </enumeratedValue>
148420              </enumeratedValues>
148421            </field>
148422            <field>
148423              <name>TX_RPTR</name>
148424              <description>Transmit FIFO Read Pointer</description>
148425              <bitOffset>16</bitOffset>
148426              <bitWidth>4</bitWidth>
148427              <access>read-only</access>
148428            </field>
148429            <field>
148430              <name>TX_CNT</name>
148431              <description>Transmit FIFO Byte Count</description>
148432              <bitOffset>24</bitOffset>
148433              <bitWidth>5</bitWidth>
148434              <access>read-only</access>
148435              <enumeratedValues>
148436                <enumeratedValue>
148437                  <name>0</name>
148438                  <description>FIFO is emtpy</description>
148439                  <value>#00000</value>
148440                </enumeratedValue>
148441              </enumeratedValues>
148442            </field>
148443          </fields>
148444        </register>
148445        <register>
148446          <name>PCSR</name>
148447          <description>Port Control and Status Register</description>
148448          <addressOffset>0x28</addressOffset>
148449          <size>32</size>
148450          <access>read-write</access>
148451          <resetValue>0x1000000</resetValue>
148452          <resetMask>0xFFFFFFFF</resetMask>
148453          <fields>
148454            <field>
148455              <name>SAPD</name>
148456              <description>Auto Power Down Enable</description>
148457              <bitOffset>0</bitOffset>
148458              <bitWidth>1</bitWidth>
148459              <access>read-write</access>
148460              <enumeratedValues>
148461                <enumeratedValue>
148462                  <name>0</name>
148463                  <description>Auto power down disabled (default)</description>
148464                  <value>#0</value>
148465                </enumeratedValue>
148466                <enumeratedValue>
148467                  <name>1</name>
148468                  <description>Auto power down enabled</description>
148469                  <value>#1</value>
148470                </enumeratedValue>
148471              </enumeratedValues>
148472            </field>
148473            <field>
148474              <name>SVCC_EN</name>
148475              <description>Vcc Enable for Smart Card</description>
148476              <bitOffset>1</bitOffset>
148477              <bitWidth>1</bitWidth>
148478              <access>read-write</access>
148479              <enumeratedValues>
148480                <enumeratedValue>
148481                  <name>0</name>
148482                  <description>Smart Card Voltage disabled (default)</description>
148483                  <value>#0</value>
148484                </enumeratedValue>
148485                <enumeratedValue>
148486                  <name>1</name>
148487                  <description>Smart Card Voltage enabled</description>
148488                  <value>#1</value>
148489                </enumeratedValue>
148490              </enumeratedValues>
148491            </field>
148492            <field>
148493              <name>VCCENP</name>
148494              <description>VCC Enable Polarity Control</description>
148495              <bitOffset>2</bitOffset>
148496              <bitWidth>1</bitWidth>
148497              <access>read-write</access>
148498              <enumeratedValues>
148499                <enumeratedValue>
148500                  <name>0</name>
148501                  <description>VCC_EN is active high. Polarity of SVCC_EN is unchanged.</description>
148502                  <value>#0</value>
148503                </enumeratedValue>
148504                <enumeratedValue>
148505                  <name>1</name>
148506                  <description>VCC_EN is active low. Polarity of SVCC_EN is inverted.</description>
148507                  <value>#1</value>
148508                </enumeratedValue>
148509              </enumeratedValues>
148510            </field>
148511            <field>
148512              <name>SRST</name>
148513              <description>Reset to Smart Card</description>
148514              <bitOffset>3</bitOffset>
148515              <bitWidth>1</bitWidth>
148516              <access>read-write</access>
148517              <enumeratedValues>
148518                <enumeratedValue>
148519                  <name>0</name>
148520                  <description>Smart Card Reset is asserted (default)</description>
148521                  <value>#0</value>
148522                </enumeratedValue>
148523                <enumeratedValue>
148524                  <name>1</name>
148525                  <description>Smart Card Reset is de-asserted</description>
148526                  <value>#1</value>
148527                </enumeratedValue>
148528              </enumeratedValues>
148529            </field>
148530            <field>
148531              <name>SCEN</name>
148532              <description>Clock Enable for Smart Card</description>
148533              <bitOffset>4</bitOffset>
148534              <bitWidth>1</bitWidth>
148535              <access>read-write</access>
148536              <enumeratedValues>
148537                <enumeratedValue>
148538                  <name>0</name>
148539                  <description>Smart Card Clock Disabled</description>
148540                  <value>#0</value>
148541                </enumeratedValue>
148542                <enumeratedValue>
148543                  <name>1</name>
148544                  <description>Smart Card Clock Enabled</description>
148545                  <value>#1</value>
148546                </enumeratedValue>
148547              </enumeratedValues>
148548            </field>
148549            <field>
148550              <name>SCSP</name>
148551              <description>Smart Card Clock Stop Polarity</description>
148552              <bitOffset>5</bitOffset>
148553              <bitWidth>1</bitWidth>
148554              <access>read-write</access>
148555              <enumeratedValues>
148556                <enumeratedValue>
148557                  <name>0</name>
148558                  <description>Clock is logic 0 when stopped by SCEN</description>
148559                  <value>#0</value>
148560                </enumeratedValue>
148561                <enumeratedValue>
148562                  <name>1</name>
148563                  <description>Clock is logic 1 when stopped by SCEN</description>
148564                  <value>#1</value>
148565                </enumeratedValue>
148566              </enumeratedValues>
148567            </field>
148568            <field>
148569              <name>SPD</name>
148570              <description>Auto Power Down Control</description>
148571              <bitOffset>7</bitOffset>
148572              <bitWidth>1</bitWidth>
148573              <access>read-write</access>
148574              <enumeratedValues>
148575                <enumeratedValue>
148576                  <name>0</name>
148577                  <description>No effect (default)</description>
148578                  <value>#0</value>
148579                </enumeratedValue>
148580                <enumeratedValue>
148581                  <name>1</name>
148582                  <description>Start Auto Powerdown or Power Down is in progress</description>
148583                  <value>#1</value>
148584                </enumeratedValue>
148585              </enumeratedValues>
148586            </field>
148587            <field>
148588              <name>SPDIM</name>
148589              <description>Smart Card Presence Detect Interrupt Mask</description>
148590              <bitOffset>24</bitOffset>
148591              <bitWidth>1</bitWidth>
148592              <access>read-write</access>
148593              <enumeratedValues>
148594                <enumeratedValue>
148595                  <name>0</name>
148596                  <description>SIM presence detect interrupt is enabled</description>
148597                  <value>#0</value>
148598                </enumeratedValue>
148599                <enumeratedValue>
148600                  <name>1</name>
148601                  <description>SIM presence detect interrupt is masked (default)</description>
148602                  <value>#1</value>
148603                </enumeratedValue>
148604              </enumeratedValues>
148605            </field>
148606            <field>
148607              <name>SPDIF</name>
148608              <description>Smart Card Presence Detect Interrupt Flag</description>
148609              <bitOffset>25</bitOffset>
148610              <bitWidth>1</bitWidth>
148611              <access>read-write</access>
148612              <enumeratedValues>
148613                <enumeratedValue>
148614                  <name>0</name>
148615                  <description>No insertion or removal of Smart Card detected on Port (default)</description>
148616                  <value>#0</value>
148617                </enumeratedValue>
148618                <enumeratedValue>
148619                  <name>1</name>
148620                  <description>Insertion or removal of Smart Card detected on Port</description>
148621                  <value>#1</value>
148622                </enumeratedValue>
148623              </enumeratedValues>
148624            </field>
148625            <field>
148626              <name>SPDP</name>
148627              <description>Smart Card Presence Detect Pin Status</description>
148628              <bitOffset>26</bitOffset>
148629              <bitWidth>1</bitWidth>
148630              <access>read-only</access>
148631              <enumeratedValues>
148632                <enumeratedValue>
148633                  <name>0</name>
148634                  <description>SIM Presence Detect pin is logic low</description>
148635                  <value>#0</value>
148636                </enumeratedValue>
148637                <enumeratedValue>
148638                  <name>1</name>
148639                  <description>SIM Presence Detectpin is logic high</description>
148640                  <value>#1</value>
148641                </enumeratedValue>
148642              </enumeratedValues>
148643            </field>
148644            <field>
148645              <name>SPDES</name>
148646              <description>SIM Presence Detect Edge Select</description>
148647              <bitOffset>27</bitOffset>
148648              <bitWidth>1</bitWidth>
148649              <access>read-write</access>
148650              <enumeratedValues>
148651                <enumeratedValue>
148652                  <name>0</name>
148653                  <description>Falling edge on the pin (default)</description>
148654                  <value>#0</value>
148655                </enumeratedValue>
148656                <enumeratedValue>
148657                  <name>1</name>
148658                  <description>Rising edge on the pin</description>
148659                  <value>#1</value>
148660                </enumeratedValue>
148661              </enumeratedValues>
148662            </field>
148663          </fields>
148664        </register>
148665        <register>
148666          <name>RX_BUF</name>
148667          <description>Receive Data Read Buffer</description>
148668          <addressOffset>0x2C</addressOffset>
148669          <size>32</size>
148670          <access>read-only</access>
148671          <resetValue>0</resetValue>
148672          <resetMask>0xFFFFFFFF</resetMask>
148673          <fields>
148674            <field>
148675              <name>RX_BYTE</name>
148676              <description>Receive Data Byte Read</description>
148677              <bitOffset>0</bitOffset>
148678              <bitWidth>8</bitWidth>
148679              <access>read-only</access>
148680            </field>
148681          </fields>
148682        </register>
148683        <register>
148684          <name>TX_BUF</name>
148685          <description>Transmit Data Buffer</description>
148686          <addressOffset>0x30</addressOffset>
148687          <size>32</size>
148688          <access>read-write</access>
148689          <resetValue>0</resetValue>
148690          <resetMask>0xFFFFFFFF</resetMask>
148691          <fields>
148692            <field>
148693              <name>TX_BYTE</name>
148694              <description>Transmit Data Byte</description>
148695              <bitOffset>0</bitOffset>
148696              <bitWidth>8</bitWidth>
148697              <access>write-only</access>
148698            </field>
148699          </fields>
148700        </register>
148701        <register>
148702          <name>TX_GETU</name>
148703          <description>Transmitter Guard ETU Value Register</description>
148704          <addressOffset>0x34</addressOffset>
148705          <size>32</size>
148706          <access>read-write</access>
148707          <resetValue>0</resetValue>
148708          <resetMask>0xFFFFFFFF</resetMask>
148709          <fields>
148710            <field>
148711              <name>GETU</name>
148712              <description>Transmitter Guard Time Value in ETU</description>
148713              <bitOffset>0</bitOffset>
148714              <bitWidth>8</bitWidth>
148715              <access>read-write</access>
148716              <enumeratedValues>
148717                <enumeratedValue>
148718                  <name>0</name>
148719                  <description>no additional ETUs inserted (default)</description>
148720                  <value>#0</value>
148721                </enumeratedValue>
148722                <enumeratedValue>
148723                  <name>1</name>
148724                  <description>1 additional ETU inserted</description>
148725                  <value>#1</value>
148726                </enumeratedValue>
148727                <enumeratedValue>
148728                  <name>11111110</name>
148729                  <description>254 additional ETUs inserted</description>
148730                  <value>#11111110</value>
148731                </enumeratedValue>
148732                <enumeratedValue>
148733                  <name>11111111</name>
148734                  <description>Subtracts one ETU by reducing the number of STOP bits from two to one</description>
148735                  <value>#11111111</value>
148736                </enumeratedValue>
148737              </enumeratedValues>
148738            </field>
148739          </fields>
148740        </register>
148741        <register>
148742          <name>CWT_VAL</name>
148743          <description>Character Wait Time Value Register</description>
148744          <addressOffset>0x38</addressOffset>
148745          <size>32</size>
148746          <access>read-write</access>
148747          <resetValue>0xFFFF</resetValue>
148748          <resetMask>0xFFFFFFFF</resetMask>
148749          <fields>
148750            <field>
148751              <name>CWT</name>
148752              <description>Character Wait Time Value</description>
148753              <bitOffset>0</bitOffset>
148754              <bitWidth>16</bitWidth>
148755              <access>read-write</access>
148756            </field>
148757          </fields>
148758        </register>
148759        <register>
148760          <name>BWT_VAL</name>
148761          <description>Block Wait Time Value Register</description>
148762          <addressOffset>0x3C</addressOffset>
148763          <size>32</size>
148764          <access>read-write</access>
148765          <resetValue>0xFFFFFFFF</resetValue>
148766          <resetMask>0xFFFFFFFF</resetMask>
148767          <fields>
148768            <field>
148769              <name>BWT</name>
148770              <description>Block Wait Time Value</description>
148771              <bitOffset>0</bitOffset>
148772              <bitWidth>32</bitWidth>
148773              <access>read-write</access>
148774            </field>
148775          </fields>
148776        </register>
148777        <register>
148778          <name>BGT_VAL</name>
148779          <description>Block Guard Time Value Register</description>
148780          <addressOffset>0x40</addressOffset>
148781          <size>32</size>
148782          <access>read-write</access>
148783          <resetValue>0</resetValue>
148784          <resetMask>0xFFFFFFFF</resetMask>
148785          <fields>
148786            <field>
148787              <name>BGT</name>
148788              <description>Block Guard Time Value</description>
148789              <bitOffset>0</bitOffset>
148790              <bitWidth>16</bitWidth>
148791              <access>read-write</access>
148792            </field>
148793          </fields>
148794        </register>
148795        <register>
148796          <name>GPCNT0_VAL</name>
148797          <description>General Purpose Counter 0 Timeout Value Register</description>
148798          <addressOffset>0x44</addressOffset>
148799          <size>32</size>
148800          <access>read-write</access>
148801          <resetValue>0xFFFF</resetValue>
148802          <resetMask>0xFFFFFFFF</resetMask>
148803          <fields>
148804            <field>
148805              <name>GPCNT0</name>
148806              <description>General Purpose Counter 0 Timeout Value</description>
148807              <bitOffset>0</bitOffset>
148808              <bitWidth>16</bitWidth>
148809              <access>read-write</access>
148810            </field>
148811          </fields>
148812        </register>
148813        <register>
148814          <name>GPCNT1_VAL</name>
148815          <description>General Purpose Counter 1 Timeout Value</description>
148816          <addressOffset>0x48</addressOffset>
148817          <size>32</size>
148818          <access>read-write</access>
148819          <resetValue>0xFFFF</resetValue>
148820          <resetMask>0xFFFFFFFF</resetMask>
148821          <fields>
148822            <field>
148823              <name>GPCNT1</name>
148824              <description>General Purpose Counter 1 Timeout Value</description>
148825              <bitOffset>0</bitOffset>
148826              <bitWidth>16</bitWidth>
148827              <access>read-write</access>
148828            </field>
148829          </fields>
148830        </register>
148831      </registers>
148832    </peripheral>
148833    <peripheral>
148834      <name>QuadSPI0</name>
148835      <description>QuadSPI</description>
148836      <prependToName>QuadSPI0_</prependToName>
148837      <baseAddress>0x400DA000</baseAddress>
148838      <addressBlock>
148839        <offset>0</offset>
148840        <size>0x410</size>
148841        <usage>registers</usage>
148842      </addressBlock>
148843      <interrupt>
148844        <name>QuadSPI0</name>
148845        <value>100</value>
148846      </interrupt>
148847      <registers>
148848        <register>
148849          <name>MCR</name>
148850          <description>Module Configuration Register</description>
148851          <addressOffset>0</addressOffset>
148852          <size>32</size>
148853          <access>read-write</access>
148854          <resetValue>0xF400C</resetValue>
148855          <resetMask>0xFFFFFFFF</resetMask>
148856          <fields>
148857            <field>
148858              <name>SWRSTSD</name>
148859              <description>Software reset for Serial Flash domain</description>
148860              <bitOffset>0</bitOffset>
148861              <bitWidth>1</bitWidth>
148862              <access>read-write</access>
148863              <enumeratedValues>
148864                <enumeratedValue>
148865                  <name>0</name>
148866                  <description>No action</description>
148867                  <value>#0</value>
148868                </enumeratedValue>
148869                <enumeratedValue>
148870                  <name>1</name>
148871                  <description>Serial Flash domain flops are reset. Does not reset configuration registers. It is advisable to reset both the serial flash domain and AHB domain at the same time. Resetting only one domain might lead to side effects. The software resets need the clock to be running to propagate to the design. The MCR[MDIS] should therefore be set to 0 when the software reset bits are asserted. Also, before they can be deasserted again (by setting MCR[SWRSTSD] to 0), it is recommended to set the MCR[MDIS] bit to 1. Once the software resets have been deasserted, the normal operation can be started by setting the MCR[MDIS] bit to 0.</description>
148872                  <value>#1</value>
148873                </enumeratedValue>
148874              </enumeratedValues>
148875            </field>
148876            <field>
148877              <name>SWRSTHD</name>
148878              <description>Software reset for AHB domain</description>
148879              <bitOffset>1</bitOffset>
148880              <bitWidth>1</bitWidth>
148881              <access>read-write</access>
148882              <enumeratedValues>
148883                <enumeratedValue>
148884                  <name>0</name>
148885                  <description>No action</description>
148886                  <value>#0</value>
148887                </enumeratedValue>
148888                <enumeratedValue>
148889                  <name>1</name>
148890                  <description>AHB domain flops are reset. Does not reset configuration registers. It is advisable to reset both the serial flash domain and AHB domain at the same time. Resetting only one domain might lead to side effects. The software resets need the clock to be running to propagate to the design. The MCR[MDIS] should therefore be set to 0 when the software reset bits are asserted. Also, before they can be deasserted again (by setting MCR[SWRSTHD] to 0), it is recommended to set the MCR[MDIS] bit to 1. Once the software resets have been deasserted, the normal operation can be started by setting the MCR[MDIS] bit to 0.</description>
148891                  <value>#1</value>
148892                </enumeratedValue>
148893              </enumeratedValues>
148894            </field>
148895            <field>
148896              <name>END_CFG</name>
148897              <description>Defines the endianness of the QSPI module.For more details refer to Byte Ordering Endianess</description>
148898              <bitOffset>2</bitOffset>
148899              <bitWidth>2</bitWidth>
148900              <access>read-write</access>
148901            </field>
148902            <field>
148903              <name>DQS_LAT_EN</name>
148904              <description>DQS Latency Enable: This field is valid when latency is included in between read access from FLash in case when QSPI_MCR[DQS_EN] is 1</description>
148905              <bitOffset>5</bitOffset>
148906              <bitWidth>1</bitWidth>
148907              <access>read-write</access>
148908              <enumeratedValues>
148909                <enumeratedValue>
148910                  <name>0</name>
148911                  <description>DQS Latency disabled</description>
148912                  <value>#0</value>
148913                </enumeratedValue>
148914                <enumeratedValue>
148915                  <name>1</name>
148916                  <description>DQS feature with latency included enabled</description>
148917                  <value>#1</value>
148918                </enumeratedValue>
148919              </enumeratedValues>
148920            </field>
148921            <field>
148922              <name>DQS_EN</name>
148923              <description>DQS enable: This field is valid for both SDR and DDR mode</description>
148924              <bitOffset>6</bitOffset>
148925              <bitWidth>1</bitWidth>
148926              <access>read-write</access>
148927              <enumeratedValues>
148928                <enumeratedValue>
148929                  <name>0</name>
148930                  <description>DQS disabled.</description>
148931                  <value>#0</value>
148932                </enumeratedValue>
148933                <enumeratedValue>
148934                  <name>1</name>
148935                  <description>DQS enabled- When enabled, the incoming data is sampled on both the edges of DQS input when QSPI_MCR[DDR_EN] is set, else, on only one edge when QSPI_MCR[DDR_EN] is 0. The QSPI_SMPR[DDR_SMP] values are ignored.</description>
148936                  <value>#1</value>
148937                </enumeratedValue>
148938              </enumeratedValues>
148939            </field>
148940            <field>
148941              <name>DDR_EN</name>
148942              <description>DDR mode enable:</description>
148943              <bitOffset>7</bitOffset>
148944              <bitWidth>1</bitWidth>
148945              <access>read-write</access>
148946              <enumeratedValues>
148947                <enumeratedValue>
148948                  <name>0</name>
148949                  <description>2x and 4x clocks are disabled for SDR instructions only</description>
148950                  <value>#0</value>
148951                </enumeratedValue>
148952                <enumeratedValue>
148953                  <name>1</name>
148954                  <description>2x and 4x clocks are enabled supports both SDR and DDR instruction.</description>
148955                  <value>#1</value>
148956                </enumeratedValue>
148957              </enumeratedValues>
148958            </field>
148959            <field>
148960              <name>CLR_RXF</name>
148961              <description>Clear RX FIFO. Invalidate the RX Buffer. This is a self-clearing field.</description>
148962              <bitOffset>10</bitOffset>
148963              <bitWidth>1</bitWidth>
148964              <access>write-only</access>
148965              <enumeratedValues>
148966                <enumeratedValue>
148967                  <name>0</name>
148968                  <description>No action.</description>
148969                  <value>#0</value>
148970                </enumeratedValue>
148971                <enumeratedValue>
148972                  <name>1</name>
148973                  <description>Read and write pointers of the RX Buffer are reset to 0. QSPI_RBSR[RDBFL] is reset to 0.</description>
148974                  <value>#1</value>
148975                </enumeratedValue>
148976              </enumeratedValues>
148977            </field>
148978            <field>
148979              <name>CLR_TXF</name>
148980              <description>Clear TX FIFO/Buffer. Invalidate the TX Buffer content. This is a self-clearing field.</description>
148981              <bitOffset>11</bitOffset>
148982              <bitWidth>1</bitWidth>
148983              <access>write-only</access>
148984              <enumeratedValues>
148985                <enumeratedValue>
148986                  <name>0</name>
148987                  <description>No action.</description>
148988                  <value>#0</value>
148989                </enumeratedValue>
148990                <enumeratedValue>
148991                  <name>1</name>
148992                  <description>Read and write pointers of the TX Buffer are reset to 0. QSPI_TBSR[TRCTR] is reset to 0.</description>
148993                  <value>#1</value>
148994                </enumeratedValue>
148995              </enumeratedValues>
148996            </field>
148997            <field>
148998              <name>MDIS</name>
148999              <description>Module Disable</description>
149000              <bitOffset>14</bitOffset>
149001              <bitWidth>1</bitWidth>
149002              <access>read-write</access>
149003              <enumeratedValues>
149004                <enumeratedValue>
149005                  <name>0</name>
149006                  <description>Enable QuadSPI clocks.</description>
149007                  <value>#0</value>
149008                </enumeratedValue>
149009                <enumeratedValue>
149010                  <name>1</name>
149011                  <description>Allow external logic to disable QuadSPI clocks.</description>
149012                  <value>#1</value>
149013                </enumeratedValue>
149014              </enumeratedValues>
149015            </field>
149016            <field>
149017              <name>SCLKCFG</name>
149018              <description>Serial Clock Configuration</description>
149019              <bitOffset>24</bitOffset>
149020              <bitWidth>8</bitWidth>
149021              <access>read-write</access>
149022            </field>
149023          </fields>
149024        </register>
149025        <register>
149026          <name>IPCR</name>
149027          <description>IP Configuration Register</description>
149028          <addressOffset>0x8</addressOffset>
149029          <size>32</size>
149030          <access>read-write</access>
149031          <resetValue>0</resetValue>
149032          <resetMask>0xFFFFFFFF</resetMask>
149033          <fields>
149034            <field>
149035              <name>IDATSZ</name>
149036              <description>IP data transfer size: Defines the data transfer size in bytes of the IP command.</description>
149037              <bitOffset>0</bitOffset>
149038              <bitWidth>16</bitWidth>
149039              <access>read-write</access>
149040            </field>
149041            <field>
149042              <name>PAR_EN</name>
149043              <description>When set, a transaction to two serial flash devices is triggered in parallel mode</description>
149044              <bitOffset>16</bitOffset>
149045              <bitWidth>1</bitWidth>
149046              <access>read-write</access>
149047            </field>
149048            <field>
149049              <name>SEQID</name>
149050              <description>Points to a sequence in the Look-up-table</description>
149051              <bitOffset>24</bitOffset>
149052              <bitWidth>4</bitWidth>
149053              <access>read-write</access>
149054            </field>
149055          </fields>
149056        </register>
149057        <register>
149058          <name>FLSHCR</name>
149059          <description>Flash Configuration Register</description>
149060          <addressOffset>0xC</addressOffset>
149061          <size>32</size>
149062          <access>read-write</access>
149063          <resetValue>0x303</resetValue>
149064          <resetMask>0xFFFFFFFF</resetMask>
149065          <fields>
149066            <field>
149067              <name>TCSS</name>
149068              <description>Serial flash CS setup time in terms of serial flash clock cycles</description>
149069              <bitOffset>0</bitOffset>
149070              <bitWidth>4</bitWidth>
149071              <access>read-write</access>
149072            </field>
149073            <field>
149074              <name>TCSH</name>
149075              <description>Serial flash CS hold time in terms of serial flash clock cycles</description>
149076              <bitOffset>8</bitOffset>
149077              <bitWidth>4</bitWidth>
149078              <access>read-write</access>
149079            </field>
149080            <field>
149081              <name>TDH</name>
149082              <description>Serial flash Data In hold time: This helps in meeting the Data In Hold time requirement of a Flash</description>
149083              <bitOffset>16</bitOffset>
149084              <bitWidth>2</bitWidth>
149085              <access>read-write</access>
149086              <enumeratedValues>
149087                <enumeratedValue>
149088                  <name>00</name>
149089                  <description>Data aligned with the posedge of Internal reference clock of QuadSPI</description>
149090                  <value>#00</value>
149091                </enumeratedValue>
149092                <enumeratedValue>
149093                  <name>01</name>
149094                  <description>Data aligned with 2x serial flash half clock</description>
149095                  <value>#01</value>
149096                </enumeratedValue>
149097                <enumeratedValue>
149098                  <name>10</name>
149099                  <description>Data aligned with 4x serial flash half clock</description>
149100                  <value>#10</value>
149101                </enumeratedValue>
149102              </enumeratedValues>
149103            </field>
149104          </fields>
149105        </register>
149106        <register>
149107          <name>BUF0CR</name>
149108          <description>Buffer0 Configuration Register</description>
149109          <addressOffset>0x10</addressOffset>
149110          <size>32</size>
149111          <access>read-write</access>
149112          <resetValue>0x2</resetValue>
149113          <resetMask>0xFFFFFFFF</resetMask>
149114          <fields>
149115            <field>
149116              <name>MSTRID</name>
149117              <description>Master ID: The ID of the AHB master associated with BUFFER0</description>
149118              <bitOffset>0</bitOffset>
149119              <bitWidth>4</bitWidth>
149120              <access>read-write</access>
149121            </field>
149122            <field>
149123              <name>ADATSZ</name>
149124              <description>AHB data transfer size</description>
149125              <bitOffset>8</bitOffset>
149126              <bitWidth>7</bitWidth>
149127              <access>read-write</access>
149128            </field>
149129            <field>
149130              <name>HP_EN</name>
149131              <description>High Priority Enable: When set, the master associated with this buffer is assigned a priority higher than the rest of the masters</description>
149132              <bitOffset>31</bitOffset>
149133              <bitWidth>1</bitWidth>
149134              <access>read-write</access>
149135            </field>
149136          </fields>
149137        </register>
149138        <register>
149139          <name>BUF1CR</name>
149140          <description>Buffer1 Configuration Register</description>
149141          <addressOffset>0x14</addressOffset>
149142          <size>32</size>
149143          <access>read-write</access>
149144          <resetValue>0x3</resetValue>
149145          <resetMask>0xFFFFFFFF</resetMask>
149146          <fields>
149147            <field>
149148              <name>MSTRID</name>
149149              <description>Master ID: The ID of the AHB master associated with BUFFER1</description>
149150              <bitOffset>0</bitOffset>
149151              <bitWidth>4</bitWidth>
149152              <access>read-write</access>
149153            </field>
149154            <field>
149155              <name>ADATSZ</name>
149156              <description>AHB data transfer size</description>
149157              <bitOffset>8</bitOffset>
149158              <bitWidth>7</bitWidth>
149159              <access>read-write</access>
149160            </field>
149161          </fields>
149162        </register>
149163        <register>
149164          <name>BUF2CR</name>
149165          <description>Buffer2 Configuration Register</description>
149166          <addressOffset>0x18</addressOffset>
149167          <size>32</size>
149168          <access>read-write</access>
149169          <resetValue>0x4</resetValue>
149170          <resetMask>0xFFFFFFFF</resetMask>
149171          <fields>
149172            <field>
149173              <name>MSTRID</name>
149174              <description>Master ID: The ID of the AHB master associated with BUFFER2</description>
149175              <bitOffset>0</bitOffset>
149176              <bitWidth>4</bitWidth>
149177              <access>read-write</access>
149178            </field>
149179            <field>
149180              <name>ADATSZ</name>
149181              <description>AHB data transfer size</description>
149182              <bitOffset>8</bitOffset>
149183              <bitWidth>7</bitWidth>
149184              <access>read-write</access>
149185            </field>
149186          </fields>
149187        </register>
149188        <register>
149189          <name>BUF3CR</name>
149190          <description>Buffer3 Configuration Register</description>
149191          <addressOffset>0x1C</addressOffset>
149192          <size>32</size>
149193          <access>read-write</access>
149194          <resetValue>0x80000000</resetValue>
149195          <resetMask>0xFFFFFFFF</resetMask>
149196          <fields>
149197            <field>
149198              <name>MSTRID</name>
149199              <description>Master ID: The ID of the AHB master associated with BUFFER3</description>
149200              <bitOffset>0</bitOffset>
149201              <bitWidth>4</bitWidth>
149202              <access>read-write</access>
149203            </field>
149204            <field>
149205              <name>ADATSZ</name>
149206              <description>AHB data transfer size</description>
149207              <bitOffset>8</bitOffset>
149208              <bitWidth>7</bitWidth>
149209              <access>read-write</access>
149210            </field>
149211            <field>
149212              <name>ALLMST</name>
149213              <description>All master enable: When set, buffer3 acts as an all-master buffer</description>
149214              <bitOffset>31</bitOffset>
149215              <bitWidth>1</bitWidth>
149216              <access>read-write</access>
149217            </field>
149218          </fields>
149219        </register>
149220        <register>
149221          <name>BFGENCR</name>
149222          <description>Buffer Generic Configuration Register</description>
149223          <addressOffset>0x20</addressOffset>
149224          <size>32</size>
149225          <access>read-write</access>
149226          <resetValue>0</resetValue>
149227          <resetMask>0xFFFFFFFF</resetMask>
149228          <fields>
149229            <field>
149230              <name>SEQID</name>
149231              <description>Points to a sequence in the Look-up-table</description>
149232              <bitOffset>12</bitOffset>
149233              <bitWidth>4</bitWidth>
149234              <access>read-write</access>
149235            </field>
149236            <field>
149237              <name>PAR_EN</name>
149238              <description>When set, a transaction to two serial flash devices is triggered in parallel mode</description>
149239              <bitOffset>16</bitOffset>
149240              <bitWidth>1</bitWidth>
149241              <access>read-write</access>
149242            </field>
149243          </fields>
149244        </register>
149245        <register>
149246          <name>SOCCR</name>
149247          <description>SOC Configuration Register</description>
149248          <addressOffset>0x24</addressOffset>
149249          <size>32</size>
149250          <access>read-write</access>
149251          <resetValue>0</resetValue>
149252          <resetMask>0xFFFFFFFF</resetMask>
149253          <fields>
149254            <field>
149255              <name>QSPISRC</name>
149256              <description>QSPI clock source select</description>
149257              <bitOffset>0</bitOffset>
149258              <bitWidth>3</bitWidth>
149259              <access>read-write</access>
149260              <enumeratedValues>
149261                <enumeratedValue>
149262                  <name>000</name>
149263                  <description>Core/system clock</description>
149264                  <value>#000</value>
149265                </enumeratedValue>
149266                <enumeratedValue>
149267                  <name>001</name>
149268                  <description>MCGFLL clock</description>
149269                  <value>#001</value>
149270                </enumeratedValue>
149271                <enumeratedValue>
149272                  <name>010</name>
149273                  <description>MCGPLL clock</description>
149274                  <value>#010</value>
149275                </enumeratedValue>
149276                <enumeratedValue>
149277                  <name>011</name>
149278                  <description>MCGPLL 2x clock (DDR mode specific)</description>
149279                  <value>#011</value>
149280                </enumeratedValue>
149281                <enumeratedValue>
149282                  <name>100</name>
149283                  <description>IRC48M clock</description>
149284                  <value>#100</value>
149285                </enumeratedValue>
149286                <enumeratedValue>
149287                  <name>101</name>
149288                  <description>OSCERCLK clock</description>
149289                  <value>#101</value>
149290                </enumeratedValue>
149291                <enumeratedValue>
149292                  <name>110</name>
149293                  <description>MCGIRCLK clock</description>
149294                  <value>#110</value>
149295                </enumeratedValue>
149296              </enumeratedValues>
149297            </field>
149298            <field>
149299              <name>DQSLPEN</name>
149300              <description>When this bit is set the internal generated DQS is selected and looped back to QuadSPI, without going to DQS pad. DQSPADLPEN should be cleared when this bit is set.</description>
149301              <bitOffset>8</bitOffset>
149302              <bitWidth>1</bitWidth>
149303              <access>read-write</access>
149304              <enumeratedValues>
149305                <enumeratedValue>
149306                  <name>0</name>
149307                  <description>DQS loop back is disabled</description>
149308                  <value>#0</value>
149309                </enumeratedValue>
149310                <enumeratedValue>
149311                  <name>1</name>
149312                  <description>DQS loop back is enabled</description>
149313                  <value>#1</value>
149314                </enumeratedValue>
149315              </enumeratedValues>
149316            </field>
149317            <field>
149318              <name>DQSPADLPEN</name>
149319              <description>When this bit is set the internal generated DQS will be sent to the DQS pad first and then looped back to QuadSPI. DQSLPEN should be cleared when this bit is set.</description>
149320              <bitOffset>9</bitOffset>
149321              <bitWidth>1</bitWidth>
149322              <access>read-write</access>
149323              <enumeratedValues>
149324                <enumeratedValue>
149325                  <name>0</name>
149326                  <description>DQS loop back from DQS pad is disabled</description>
149327                  <value>#0</value>
149328                </enumeratedValue>
149329                <enumeratedValue>
149330                  <name>1</name>
149331                  <description>DQS loop back from DQS pad is enabled</description>
149332                  <value>#1</value>
149333                </enumeratedValue>
149334              </enumeratedValues>
149335            </field>
149336            <field>
149337              <name>DQSPHASEL</name>
149338              <description>Select phase shift for internal DQS generation. These bits are always zero in SDR mode.</description>
149339              <bitOffset>10</bitOffset>
149340              <bitWidth>2</bitWidth>
149341              <access>read-write</access>
149342              <enumeratedValues>
149343                <enumeratedValue>
149344                  <name>00</name>
149345                  <description>No phase shift</description>
149346                  <value>#00</value>
149347                </enumeratedValue>
149348                <enumeratedValue>
149349                  <name>01</name>
149350                  <description>Select 45 degree phase shift</description>
149351                  <value>#01</value>
149352                </enumeratedValue>
149353                <enumeratedValue>
149354                  <name>10</name>
149355                  <description>Select 90 degree phase shift</description>
149356                  <value>#10</value>
149357                </enumeratedValue>
149358                <enumeratedValue>
149359                  <name>11</name>
149360                  <description>Select 135 degree phase shift</description>
149361                  <value>#11</value>
149362                </enumeratedValue>
149363              </enumeratedValues>
149364            </field>
149365            <field>
149366              <name>DQSINVSEL</name>
149367              <description>Select clock source for internal DQS generation</description>
149368              <bitOffset>12</bitOffset>
149369              <bitWidth>1</bitWidth>
149370              <access>read-write</access>
149371              <enumeratedValues>
149372                <enumeratedValue>
149373                  <name>0</name>
149374                  <description>Use 1x internal reference clock for the DQS generation</description>
149375                  <value>#0</value>
149376                </enumeratedValue>
149377                <enumeratedValue>
149378                  <name>1</name>
149379                  <description>Use inverse 1x internal reference clock for the DQS generation</description>
149380                  <value>#1</value>
149381                </enumeratedValue>
149382              </enumeratedValues>
149383            </field>
149384            <field>
149385              <name>CK2EN</name>
149386              <description>Flash CK2 clock pin enable</description>
149387              <bitOffset>13</bitOffset>
149388              <bitWidth>1</bitWidth>
149389              <access>read-write</access>
149390              <enumeratedValues>
149391                <enumeratedValue>
149392                  <name>0</name>
149393                  <description>CK2 flash clock is disabled</description>
149394                  <value>#0</value>
149395                </enumeratedValue>
149396                <enumeratedValue>
149397                  <name>1</name>
149398                  <description>CK2 flash clock is enabled</description>
149399                  <value>#1</value>
149400                </enumeratedValue>
149401              </enumeratedValues>
149402            </field>
149403            <field>
149404              <name>DIFFCKEN</name>
149405              <description>Differential flash clock pins enable</description>
149406              <bitOffset>14</bitOffset>
149407              <bitWidth>1</bitWidth>
149408              <access>read-write</access>
149409              <enumeratedValues>
149410                <enumeratedValue>
149411                  <name>0</name>
149412                  <description>Differential flash clock is disabled</description>
149413                  <value>#0</value>
149414                </enumeratedValue>
149415                <enumeratedValue>
149416                  <name>1</name>
149417                  <description>Differential flash clock is enabled</description>
149418                  <value>#1</value>
149419                </enumeratedValue>
149420              </enumeratedValues>
149421            </field>
149422            <field>
149423              <name>OCTEN</name>
149424              <description>Octal data pins enable</description>
149425              <bitOffset>15</bitOffset>
149426              <bitWidth>1</bitWidth>
149427              <access>read-write</access>
149428              <enumeratedValues>
149429                <enumeratedValue>
149430                  <name>0</name>
149431                  <description>QSPI0B_DATAx pins are assigned to QSPI Port B</description>
149432                  <value>#0</value>
149433                </enumeratedValue>
149434                <enumeratedValue>
149435                  <name>1</name>
149436                  <description>QSPI0B_DATAx pins are assigned to QSPI Port A</description>
149437                  <value>#1</value>
149438                </enumeratedValue>
149439              </enumeratedValues>
149440            </field>
149441            <field>
149442              <name>DLYTAPSELA</name>
149443              <description>Delay chain tap number selection for QSPI Port A DQS</description>
149444              <bitOffset>16</bitOffset>
149445              <bitWidth>6</bitWidth>
149446              <access>read-write</access>
149447              <enumeratedValues>
149448                <enumeratedValue>
149449                  <name>000000</name>
149450                  <description>Select 1 delay chain tap</description>
149451                  <value>#0</value>
149452                </enumeratedValue>
149453                <enumeratedValue>
149454                  <name>000001</name>
149455                  <description>Select 2 delay chain tap</description>
149456                  <value>#1</value>
149457                </enumeratedValue>
149458                <enumeratedValue>
149459                  <name>0000010</name>
149460                  <description>Select 3 delay chain tap</description>
149461                  <value>#10</value>
149462                </enumeratedValue>
149463                <enumeratedValue>
149464                  <name>0000011</name>
149465                  <description>Select 4 delay chain tap</description>
149466                  <value>#11</value>
149467                </enumeratedValue>
149468                <enumeratedValue>
149469                  <name>00000100</name>
149470                  <description>Select 5 delay chain tap</description>
149471                  <value>#100</value>
149472                </enumeratedValue>
149473                <enumeratedValue>
149474                  <name>00000101</name>
149475                  <description>Select 6 delay chain tap</description>
149476                  <value>#101</value>
149477                </enumeratedValue>
149478                <enumeratedValue>
149479                  <name>00000110</name>
149480                  <description>Select 7 delay chain tap</description>
149481                  <value>#110</value>
149482                </enumeratedValue>
149483                <enumeratedValue>
149484                  <name>00000111</name>
149485                  <description>Select 8 delay chain tap</description>
149486                  <value>#111</value>
149487                </enumeratedValue>
149488                <enumeratedValue>
149489                  <name>000001000</name>
149490                  <description>Select 9 delay chain tap</description>
149491                  <value>#1000</value>
149492                </enumeratedValue>
149493                <enumeratedValue>
149494                  <name>000001001</name>
149495                  <description>Select 10 delay chain tap</description>
149496                  <value>#1001</value>
149497                </enumeratedValue>
149498                <enumeratedValue>
149499                  <name>000001010</name>
149500                  <description>Select 11 delay chain tap</description>
149501                  <value>#1010</value>
149502                </enumeratedValue>
149503                <enumeratedValue>
149504                  <name>000001011</name>
149505                  <description>Select 12 delay chain tap</description>
149506                  <value>#1011</value>
149507                </enumeratedValue>
149508                <enumeratedValue>
149509                  <name>000001100</name>
149510                  <description>Select 13 delay chain tap</description>
149511                  <value>#1100</value>
149512                </enumeratedValue>
149513                <enumeratedValue>
149514                  <name>000001101</name>
149515                  <description>Select 14 delay chain tap</description>
149516                  <value>#1101</value>
149517                </enumeratedValue>
149518                <enumeratedValue>
149519                  <name>000001110</name>
149520                  <description>Select 15 delay chain tap</description>
149521                  <value>#1110</value>
149522                </enumeratedValue>
149523                <enumeratedValue>
149524                  <name>000001111</name>
149525                  <description>Select 16 delay chain tap</description>
149526                  <value>#1111</value>
149527                </enumeratedValue>
149528                <enumeratedValue>
149529                  <name>0000010000</name>
149530                  <description>Select 17 delay chain tap</description>
149531                  <value>#10000</value>
149532                </enumeratedValue>
149533                <enumeratedValue>
149534                  <name>0000010001</name>
149535                  <description>Select 18 delay chain tap</description>
149536                  <value>#10001</value>
149537                </enumeratedValue>
149538                <enumeratedValue>
149539                  <name>0000010010</name>
149540                  <description>Select 19 delay chain tap</description>
149541                  <value>#10010</value>
149542                </enumeratedValue>
149543                <enumeratedValue>
149544                  <name>0000010011</name>
149545                  <description>Select 20 delay chain tap</description>
149546                  <value>#10011</value>
149547                </enumeratedValue>
149548                <enumeratedValue>
149549                  <name>0000010100</name>
149550                  <description>Select 21 delay chain tap</description>
149551                  <value>#10100</value>
149552                </enumeratedValue>
149553                <enumeratedValue>
149554                  <name>0000010101</name>
149555                  <description>Select 22 delay chain tap</description>
149556                  <value>#10101</value>
149557                </enumeratedValue>
149558                <enumeratedValue>
149559                  <name>0000010110</name>
149560                  <description>Select 23 delay chain tap</description>
149561                  <value>#10110</value>
149562                </enumeratedValue>
149563                <enumeratedValue>
149564                  <name>0000010111</name>
149565                  <description>Select 24 delay chain tap</description>
149566                  <value>#10111</value>
149567                </enumeratedValue>
149568                <enumeratedValue>
149569                  <name>0000011000</name>
149570                  <description>Select 25 delay chain tap</description>
149571                  <value>#11000</value>
149572                </enumeratedValue>
149573                <enumeratedValue>
149574                  <name>0000011001</name>
149575                  <description>Select 26 delay chain tap</description>
149576                  <value>#11001</value>
149577                </enumeratedValue>
149578                <enumeratedValue>
149579                  <name>0000011010</name>
149580                  <description>Select 27 delay chain tap</description>
149581                  <value>#11010</value>
149582                </enumeratedValue>
149583                <enumeratedValue>
149584                  <name>0000011011</name>
149585                  <description>Select 28 delay chain tap</description>
149586                  <value>#11011</value>
149587                </enumeratedValue>
149588                <enumeratedValue>
149589                  <name>0000011100</name>
149590                  <description>Select 29 delay chain tap</description>
149591                  <value>#11100</value>
149592                </enumeratedValue>
149593                <enumeratedValue>
149594                  <name>0000011101</name>
149595                  <description>Select 30 delay chain tap</description>
149596                  <value>#11101</value>
149597                </enumeratedValue>
149598                <enumeratedValue>
149599                  <name>0000011110</name>
149600                  <description>Select 31 delay chain tap</description>
149601                  <value>#11110</value>
149602                </enumeratedValue>
149603                <enumeratedValue>
149604                  <name>0000011111</name>
149605                  <description>Select 32 delay chain tap</description>
149606                  <value>#11111</value>
149607                </enumeratedValue>
149608                <enumeratedValue>
149609                  <name>00000100000</name>
149610                  <description>Select 33 delay chain tap</description>
149611                  <value>#100000</value>
149612                </enumeratedValue>
149613                <enumeratedValue>
149614                  <name>00000100001</name>
149615                  <description>Select 34 delay chain tap</description>
149616                  <value>#100001</value>
149617                </enumeratedValue>
149618                <enumeratedValue>
149619                  <name>00000100010</name>
149620                  <description>Select 35 delay chain tap</description>
149621                  <value>#100010</value>
149622                </enumeratedValue>
149623                <enumeratedValue>
149624                  <name>00000100011</name>
149625                  <description>Select 36 delay chain tap</description>
149626                  <value>#100011</value>
149627                </enumeratedValue>
149628                <enumeratedValue>
149629                  <name>00000100100</name>
149630                  <description>Select 37 delay chain tap</description>
149631                  <value>#100100</value>
149632                </enumeratedValue>
149633                <enumeratedValue>
149634                  <name>00000100101</name>
149635                  <description>Select 38 delay chain tap</description>
149636                  <value>#100101</value>
149637                </enumeratedValue>
149638                <enumeratedValue>
149639                  <name>00000100110</name>
149640                  <description>Select 39 delay chain tap</description>
149641                  <value>#100110</value>
149642                </enumeratedValue>
149643                <enumeratedValue>
149644                  <name>00000100111</name>
149645                  <description>Select 40 delay chain tap</description>
149646                  <value>#100111</value>
149647                </enumeratedValue>
149648                <enumeratedValue>
149649                  <name>00000101000</name>
149650                  <description>Select 41 delay chain tap</description>
149651                  <value>#101000</value>
149652                </enumeratedValue>
149653                <enumeratedValue>
149654                  <name>00000101001</name>
149655                  <description>Select 42 delay chain tap</description>
149656                  <value>#101001</value>
149657                </enumeratedValue>
149658                <enumeratedValue>
149659                  <name>00000101010</name>
149660                  <description>Select 43 delay chain tap</description>
149661                  <value>#101010</value>
149662                </enumeratedValue>
149663                <enumeratedValue>
149664                  <name>00000101011</name>
149665                  <description>Select 44 delay chain tap</description>
149666                  <value>#101011</value>
149667                </enumeratedValue>
149668                <enumeratedValue>
149669                  <name>00000101100</name>
149670                  <description>Select 45 delay chain tap</description>
149671                  <value>#101100</value>
149672                </enumeratedValue>
149673                <enumeratedValue>
149674                  <name>00000101101</name>
149675                  <description>Select 46 delay chain tap</description>
149676                  <value>#101101</value>
149677                </enumeratedValue>
149678                <enumeratedValue>
149679                  <name>00000101110</name>
149680                  <description>Select 47 delay chain tap</description>
149681                  <value>#101110</value>
149682                </enumeratedValue>
149683                <enumeratedValue>
149684                  <name>00000101111</name>
149685                  <description>Select 48 delay chain tap</description>
149686                  <value>#101111</value>
149687                </enumeratedValue>
149688                <enumeratedValue>
149689                  <name>00000110000</name>
149690                  <description>Select 49 delay chain tap</description>
149691                  <value>#110000</value>
149692                </enumeratedValue>
149693                <enumeratedValue>
149694                  <name>00000110001</name>
149695                  <description>Select 50 delay chain tap</description>
149696                  <value>#110001</value>
149697                </enumeratedValue>
149698                <enumeratedValue>
149699                  <name>00000110010</name>
149700                  <description>Select 51 delay chain tap</description>
149701                  <value>#110010</value>
149702                </enumeratedValue>
149703                <enumeratedValue>
149704                  <name>00000110011</name>
149705                  <description>Select 52 delay chain tap</description>
149706                  <value>#110011</value>
149707                </enumeratedValue>
149708                <enumeratedValue>
149709                  <name>00000110100</name>
149710                  <description>Select 53 delay chain tap</description>
149711                  <value>#110100</value>
149712                </enumeratedValue>
149713                <enumeratedValue>
149714                  <name>00000110101</name>
149715                  <description>Select 54 delay chain tap</description>
149716                  <value>#110101</value>
149717                </enumeratedValue>
149718                <enumeratedValue>
149719                  <name>00000110110</name>
149720                  <description>Select 55 delay chain tap</description>
149721                  <value>#110110</value>
149722                </enumeratedValue>
149723                <enumeratedValue>
149724                  <name>00000110111</name>
149725                  <description>Select 56 delay chain tap</description>
149726                  <value>#110111</value>
149727                </enumeratedValue>
149728                <enumeratedValue>
149729                  <name>00000111000</name>
149730                  <description>Select 57 delay chain tap</description>
149731                  <value>#111000</value>
149732                </enumeratedValue>
149733                <enumeratedValue>
149734                  <name>00000111001</name>
149735                  <description>Select 58 delay chain tap</description>
149736                  <value>#111001</value>
149737                </enumeratedValue>
149738                <enumeratedValue>
149739                  <name>00000111010</name>
149740                  <description>Select 59 delay chain tap</description>
149741                  <value>#111010</value>
149742                </enumeratedValue>
149743                <enumeratedValue>
149744                  <name>00000111011</name>
149745                  <description>Select 60 delay chain tap</description>
149746                  <value>#111011</value>
149747                </enumeratedValue>
149748                <enumeratedValue>
149749                  <name>00000111100</name>
149750                  <description>Select 61 delay chain tap</description>
149751                  <value>#111100</value>
149752                </enumeratedValue>
149753                <enumeratedValue>
149754                  <name>00000111101</name>
149755                  <description>Select 62 delay chain tap</description>
149756                  <value>#111101</value>
149757                </enumeratedValue>
149758                <enumeratedValue>
149759                  <name>00000111110</name>
149760                  <description>Select 63 delay chain tap</description>
149761                  <value>#111110</value>
149762                </enumeratedValue>
149763                <enumeratedValue>
149764                  <name>00000111111</name>
149765                  <description>Select 64 delay chain tap</description>
149766                  <value>#111111</value>
149767                </enumeratedValue>
149768              </enumeratedValues>
149769            </field>
149770            <field>
149771              <name>DLYTAPSELB</name>
149772              <description>Delay chain tap number selection for QSPI Port B DQS</description>
149773              <bitOffset>24</bitOffset>
149774              <bitWidth>6</bitWidth>
149775              <access>read-write</access>
149776              <enumeratedValues>
149777                <enumeratedValue>
149778                  <name>000000</name>
149779                  <description>Select 1 delay chain tap</description>
149780                  <value>#0</value>
149781                </enumeratedValue>
149782                <enumeratedValue>
149783                  <name>000001</name>
149784                  <description>Select 2 delay chain tap</description>
149785                  <value>#1</value>
149786                </enumeratedValue>
149787                <enumeratedValue>
149788                  <name>0000010</name>
149789                  <description>Select 3 delay chain tap</description>
149790                  <value>#10</value>
149791                </enumeratedValue>
149792                <enumeratedValue>
149793                  <name>0000011</name>
149794                  <description>Select 4 delay chain tap</description>
149795                  <value>#11</value>
149796                </enumeratedValue>
149797                <enumeratedValue>
149798                  <name>00000100</name>
149799                  <description>Select 5 delay chain tap</description>
149800                  <value>#100</value>
149801                </enumeratedValue>
149802                <enumeratedValue>
149803                  <name>00000101</name>
149804                  <description>Select 6 delay chain tap</description>
149805                  <value>#101</value>
149806                </enumeratedValue>
149807                <enumeratedValue>
149808                  <name>00000110</name>
149809                  <description>Select 7 delay chain tap</description>
149810                  <value>#110</value>
149811                </enumeratedValue>
149812                <enumeratedValue>
149813                  <name>00000111</name>
149814                  <description>Select 8 delay chain tap</description>
149815                  <value>#111</value>
149816                </enumeratedValue>
149817                <enumeratedValue>
149818                  <name>000001000</name>
149819                  <description>Select 9 delay chain tap</description>
149820                  <value>#1000</value>
149821                </enumeratedValue>
149822                <enumeratedValue>
149823                  <name>000001001</name>
149824                  <description>Select 10 delay chain tap</description>
149825                  <value>#1001</value>
149826                </enumeratedValue>
149827                <enumeratedValue>
149828                  <name>000001010</name>
149829                  <description>Select 11 delay chain tap</description>
149830                  <value>#1010</value>
149831                </enumeratedValue>
149832                <enumeratedValue>
149833                  <name>000001011</name>
149834                  <description>Select 12 delay chain tap</description>
149835                  <value>#1011</value>
149836                </enumeratedValue>
149837                <enumeratedValue>
149838                  <name>000001100</name>
149839                  <description>Select 13 delay chain tap</description>
149840                  <value>#1100</value>
149841                </enumeratedValue>
149842                <enumeratedValue>
149843                  <name>000001101</name>
149844                  <description>Select 14 delay chain tap</description>
149845                  <value>#1101</value>
149846                </enumeratedValue>
149847                <enumeratedValue>
149848                  <name>000001110</name>
149849                  <description>Select 15 delay chain tap</description>
149850                  <value>#1110</value>
149851                </enumeratedValue>
149852                <enumeratedValue>
149853                  <name>000001111</name>
149854                  <description>Select 16 delay chain tap</description>
149855                  <value>#1111</value>
149856                </enumeratedValue>
149857                <enumeratedValue>
149858                  <name>0000010000</name>
149859                  <description>Select 17 delay chain tap</description>
149860                  <value>#10000</value>
149861                </enumeratedValue>
149862                <enumeratedValue>
149863                  <name>0000010001</name>
149864                  <description>Select 18 delay chain tap</description>
149865                  <value>#10001</value>
149866                </enumeratedValue>
149867                <enumeratedValue>
149868                  <name>0000010010</name>
149869                  <description>Select 19 delay chain tap</description>
149870                  <value>#10010</value>
149871                </enumeratedValue>
149872                <enumeratedValue>
149873                  <name>0000010011</name>
149874                  <description>Select 20 delay chain tap</description>
149875                  <value>#10011</value>
149876                </enumeratedValue>
149877                <enumeratedValue>
149878                  <name>0000010100</name>
149879                  <description>Select 21 delay chain tap</description>
149880                  <value>#10100</value>
149881                </enumeratedValue>
149882                <enumeratedValue>
149883                  <name>0000010101</name>
149884                  <description>Select 22 delay chain tap</description>
149885                  <value>#10101</value>
149886                </enumeratedValue>
149887                <enumeratedValue>
149888                  <name>0000010110</name>
149889                  <description>Select 23 delay chain tap</description>
149890                  <value>#10110</value>
149891                </enumeratedValue>
149892                <enumeratedValue>
149893                  <name>0000010111</name>
149894                  <description>Select 24 delay chain tap</description>
149895                  <value>#10111</value>
149896                </enumeratedValue>
149897                <enumeratedValue>
149898                  <name>0000011000</name>
149899                  <description>Select 25 delay chain tap</description>
149900                  <value>#11000</value>
149901                </enumeratedValue>
149902                <enumeratedValue>
149903                  <name>0000011001</name>
149904                  <description>Select 26 delay chain tap</description>
149905                  <value>#11001</value>
149906                </enumeratedValue>
149907                <enumeratedValue>
149908                  <name>0000011010</name>
149909                  <description>Select 27 delay chain tap</description>
149910                  <value>#11010</value>
149911                </enumeratedValue>
149912                <enumeratedValue>
149913                  <name>0000011011</name>
149914                  <description>Select 28 delay chain tap</description>
149915                  <value>#11011</value>
149916                </enumeratedValue>
149917                <enumeratedValue>
149918                  <name>0000011100</name>
149919                  <description>Select 29 delay chain tap</description>
149920                  <value>#11100</value>
149921                </enumeratedValue>
149922                <enumeratedValue>
149923                  <name>0000011101</name>
149924                  <description>Select 30 delay chain tap</description>
149925                  <value>#11101</value>
149926                </enumeratedValue>
149927                <enumeratedValue>
149928                  <name>0000011110</name>
149929                  <description>Select 31 delay chain tap</description>
149930                  <value>#11110</value>
149931                </enumeratedValue>
149932                <enumeratedValue>
149933                  <name>0000011111</name>
149934                  <description>Select 32 delay chain tap</description>
149935                  <value>#11111</value>
149936                </enumeratedValue>
149937                <enumeratedValue>
149938                  <name>00000100000</name>
149939                  <description>Select 33 delay chain tap</description>
149940                  <value>#100000</value>
149941                </enumeratedValue>
149942                <enumeratedValue>
149943                  <name>00000100001</name>
149944                  <description>Select 34 delay chain tap</description>
149945                  <value>#100001</value>
149946                </enumeratedValue>
149947                <enumeratedValue>
149948                  <name>00000100010</name>
149949                  <description>Select 35 delay chain tap</description>
149950                  <value>#100010</value>
149951                </enumeratedValue>
149952                <enumeratedValue>
149953                  <name>00000100011</name>
149954                  <description>Select 36 delay chain tap</description>
149955                  <value>#100011</value>
149956                </enumeratedValue>
149957                <enumeratedValue>
149958                  <name>00000100100</name>
149959                  <description>Select 37 delay chain tap</description>
149960                  <value>#100100</value>
149961                </enumeratedValue>
149962                <enumeratedValue>
149963                  <name>00000100101</name>
149964                  <description>Select 38 delay chain tap</description>
149965                  <value>#100101</value>
149966                </enumeratedValue>
149967                <enumeratedValue>
149968                  <name>00000100110</name>
149969                  <description>Select 39 delay chain tap</description>
149970                  <value>#100110</value>
149971                </enumeratedValue>
149972                <enumeratedValue>
149973                  <name>00000100111</name>
149974                  <description>Select 40 delay chain tap</description>
149975                  <value>#100111</value>
149976                </enumeratedValue>
149977                <enumeratedValue>
149978                  <name>00000101000</name>
149979                  <description>Select 41 delay chain tap</description>
149980                  <value>#101000</value>
149981                </enumeratedValue>
149982                <enumeratedValue>
149983                  <name>00000101001</name>
149984                  <description>Select 42 delay chain tap</description>
149985                  <value>#101001</value>
149986                </enumeratedValue>
149987                <enumeratedValue>
149988                  <name>00000101010</name>
149989                  <description>Select 43 delay chain tap</description>
149990                  <value>#101010</value>
149991                </enumeratedValue>
149992                <enumeratedValue>
149993                  <name>00000101011</name>
149994                  <description>Select 44 delay chain tap</description>
149995                  <value>#101011</value>
149996                </enumeratedValue>
149997                <enumeratedValue>
149998                  <name>00000101100</name>
149999                  <description>Select 45 delay chain tap</description>
150000                  <value>#101100</value>
150001                </enumeratedValue>
150002                <enumeratedValue>
150003                  <name>00000101101</name>
150004                  <description>Select 46 delay chain tap</description>
150005                  <value>#101101</value>
150006                </enumeratedValue>
150007                <enumeratedValue>
150008                  <name>00000101110</name>
150009                  <description>Select 47 delay chain tap</description>
150010                  <value>#101110</value>
150011                </enumeratedValue>
150012                <enumeratedValue>
150013                  <name>00000101111</name>
150014                  <description>Select 48 delay chain tap</description>
150015                  <value>#101111</value>
150016                </enumeratedValue>
150017                <enumeratedValue>
150018                  <name>00000110000</name>
150019                  <description>Select 49 delay chain tap</description>
150020                  <value>#110000</value>
150021                </enumeratedValue>
150022                <enumeratedValue>
150023                  <name>00000110001</name>
150024                  <description>Select 50 delay chain tap</description>
150025                  <value>#110001</value>
150026                </enumeratedValue>
150027                <enumeratedValue>
150028                  <name>00000110010</name>
150029                  <description>Select 51 delay chain tap</description>
150030                  <value>#110010</value>
150031                </enumeratedValue>
150032                <enumeratedValue>
150033                  <name>00000110011</name>
150034                  <description>Select 52 delay chain tap</description>
150035                  <value>#110011</value>
150036                </enumeratedValue>
150037                <enumeratedValue>
150038                  <name>00000110100</name>
150039                  <description>Select 53 delay chain tap</description>
150040                  <value>#110100</value>
150041                </enumeratedValue>
150042                <enumeratedValue>
150043                  <name>00000110101</name>
150044                  <description>Select 54 delay chain tap</description>
150045                  <value>#110101</value>
150046                </enumeratedValue>
150047                <enumeratedValue>
150048                  <name>00000110110</name>
150049                  <description>Select 55 delay chain tap</description>
150050                  <value>#110110</value>
150051                </enumeratedValue>
150052                <enumeratedValue>
150053                  <name>00000110111</name>
150054                  <description>Select 56 delay chain tap</description>
150055                  <value>#110111</value>
150056                </enumeratedValue>
150057                <enumeratedValue>
150058                  <name>00000111000</name>
150059                  <description>Select 57 delay chain tap</description>
150060                  <value>#111000</value>
150061                </enumeratedValue>
150062                <enumeratedValue>
150063                  <name>00000111001</name>
150064                  <description>Select 58 delay chain tap</description>
150065                  <value>#111001</value>
150066                </enumeratedValue>
150067                <enumeratedValue>
150068                  <name>00000111010</name>
150069                  <description>Select 59 delay chain tap</description>
150070                  <value>#111010</value>
150071                </enumeratedValue>
150072                <enumeratedValue>
150073                  <name>00000111011</name>
150074                  <description>Select 60 delay chain tap</description>
150075                  <value>#111011</value>
150076                </enumeratedValue>
150077                <enumeratedValue>
150078                  <name>00000111100</name>
150079                  <description>Select 61 delay chain tap</description>
150080                  <value>#111100</value>
150081                </enumeratedValue>
150082                <enumeratedValue>
150083                  <name>00000111101</name>
150084                  <description>Select 62 delay chain tap</description>
150085                  <value>#111101</value>
150086                </enumeratedValue>
150087                <enumeratedValue>
150088                  <name>00000111110</name>
150089                  <description>Select 63 delay chain tap</description>
150090                  <value>#111110</value>
150091                </enumeratedValue>
150092                <enumeratedValue>
150093                  <name>00000111111</name>
150094                  <description>Select 64 delay chain tap</description>
150095                  <value>#111111</value>
150096                </enumeratedValue>
150097              </enumeratedValues>
150098            </field>
150099          </fields>
150100        </register>
150101        <register>
150102          <name>BUF0IND</name>
150103          <description>Buffer0 Top Index Register</description>
150104          <addressOffset>0x30</addressOffset>
150105          <size>32</size>
150106          <access>read-write</access>
150107          <resetValue>0</resetValue>
150108          <resetMask>0xFFFFFFFF</resetMask>
150109          <fields>
150110            <field>
150111              <name>TPINDX0</name>
150112              <description>Top index of buffer 0.</description>
150113              <bitOffset>3</bitOffset>
150114              <bitWidth>29</bitWidth>
150115              <access>read-write</access>
150116            </field>
150117          </fields>
150118        </register>
150119        <register>
150120          <name>BUF1IND</name>
150121          <description>Buffer1 Top Index Register</description>
150122          <addressOffset>0x34</addressOffset>
150123          <size>32</size>
150124          <access>read-write</access>
150125          <resetValue>0</resetValue>
150126          <resetMask>0xFFFFFFFF</resetMask>
150127          <fields>
150128            <field>
150129              <name>TPINDX1</name>
150130              <description>Top index of buffer 1.</description>
150131              <bitOffset>3</bitOffset>
150132              <bitWidth>29</bitWidth>
150133              <access>read-write</access>
150134            </field>
150135          </fields>
150136        </register>
150137        <register>
150138          <name>BUF2IND</name>
150139          <description>Buffer2 Top Index Register</description>
150140          <addressOffset>0x38</addressOffset>
150141          <size>32</size>
150142          <access>read-write</access>
150143          <resetValue>0</resetValue>
150144          <resetMask>0xFFFFFFFF</resetMask>
150145          <fields>
150146            <field>
150147              <name>TPINDX2</name>
150148              <description>Top index of buffer 2.</description>
150149              <bitOffset>3</bitOffset>
150150              <bitWidth>29</bitWidth>
150151              <access>read-write</access>
150152            </field>
150153          </fields>
150154        </register>
150155        <register>
150156          <name>SFAR</name>
150157          <description>Serial Flash Address Register</description>
150158          <addressOffset>0x100</addressOffset>
150159          <size>32</size>
150160          <access>read-write</access>
150161          <resetValue>0</resetValue>
150162          <resetMask>0xFFFFFFFF</resetMask>
150163          <fields>
150164            <field>
150165              <name>SFADR</name>
150166              <description>Serial Flash Address. The register content is used as byte address for all following IP Commands.</description>
150167              <bitOffset>0</bitOffset>
150168              <bitWidth>32</bitWidth>
150169              <access>read-write</access>
150170            </field>
150171          </fields>
150172        </register>
150173        <register>
150174          <name>SFACR</name>
150175          <description>Serial Flash Address Configuration Register</description>
150176          <addressOffset>0x104</addressOffset>
150177          <size>32</size>
150178          <access>read-write</access>
150179          <resetValue>0</resetValue>
150180          <resetMask>0xFFFFFFFF</resetMask>
150181          <fields>
150182            <field>
150183              <name>CAS</name>
150184              <description>Column Address Space</description>
150185              <bitOffset>0</bitOffset>
150186              <bitWidth>4</bitWidth>
150187              <access>read-write</access>
150188            </field>
150189            <field>
150190              <name>WA</name>
150191              <description>Word Addressable</description>
150192              <bitOffset>16</bitOffset>
150193              <bitWidth>1</bitWidth>
150194              <access>read-write</access>
150195              <enumeratedValues>
150196                <enumeratedValue>
150197                  <name>0</name>
150198                  <description>Byte addressable serial flash mode.</description>
150199                  <value>#0</value>
150200                </enumeratedValue>
150201                <enumeratedValue>
150202                  <name>1</name>
150203                  <description>Word (2 byte) addressable serial flash mode.</description>
150204                  <value>#1</value>
150205                </enumeratedValue>
150206              </enumeratedValues>
150207            </field>
150208          </fields>
150209        </register>
150210        <register>
150211          <name>SMPR</name>
150212          <description>Sampling Register</description>
150213          <addressOffset>0x108</addressOffset>
150214          <size>32</size>
150215          <access>read-write</access>
150216          <resetValue>0</resetValue>
150217          <resetMask>0xFFFFFFFF</resetMask>
150218          <fields>
150219            <field>
150220              <name>HSENA</name>
150221              <description>Half Speed serial flash clock Enable</description>
150222              <bitOffset>0</bitOffset>
150223              <bitWidth>1</bitWidth>
150224              <access>read-write</access>
150225              <enumeratedValues>
150226                <enumeratedValue>
150227                  <name>0</name>
150228                  <description>Disable divide by 2 of serial flash clock for half speed commands</description>
150229                  <value>#0</value>
150230                </enumeratedValue>
150231                <enumeratedValue>
150232                  <name>1</name>
150233                  <description>Enable divide by 2 of serial flash clock for half speed commands</description>
150234                  <value>#1</value>
150235                </enumeratedValue>
150236              </enumeratedValues>
150237            </field>
150238            <field>
150239              <name>HSPHS</name>
150240              <description>Half Speed Phase selection for SDR instructions.</description>
150241              <bitOffset>1</bitOffset>
150242              <bitWidth>1</bitWidth>
150243              <access>read-write</access>
150244              <enumeratedValues>
150245                <enumeratedValue>
150246                  <name>0</name>
150247                  <description>Select sampling at non-inverted clock</description>
150248                  <value>#0</value>
150249                </enumeratedValue>
150250                <enumeratedValue>
150251                  <name>1</name>
150252                  <description>Select sampling at inverted clock</description>
150253                  <value>#1</value>
150254                </enumeratedValue>
150255              </enumeratedValues>
150256            </field>
150257            <field>
150258              <name>HSDLY</name>
150259              <description>Half Speed Delay selection for SDR instructions.</description>
150260              <bitOffset>2</bitOffset>
150261              <bitWidth>1</bitWidth>
150262              <access>read-write</access>
150263              <enumeratedValues>
150264                <enumeratedValue>
150265                  <name>0</name>
150266                  <description>One clock cycle delay</description>
150267                  <value>#0</value>
150268                </enumeratedValue>
150269                <enumeratedValue>
150270                  <name>1</name>
150271                  <description>Two clock cycle delay</description>
150272                  <value>#1</value>
150273                </enumeratedValue>
150274              </enumeratedValues>
150275            </field>
150276            <field>
150277              <name>FSPHS</name>
150278              <description>Full Speed Phase selection for SDR instructions.</description>
150279              <bitOffset>5</bitOffset>
150280              <bitWidth>1</bitWidth>
150281              <access>read-write</access>
150282              <enumeratedValues>
150283                <enumeratedValue>
150284                  <name>0</name>
150285                  <description>Select sampling at non-inverted clock</description>
150286                  <value>#0</value>
150287                </enumeratedValue>
150288                <enumeratedValue>
150289                  <name>1</name>
150290                  <description>Select sampling at inverted clock. This bit is also used in DQS mode and ignored when using non-DQS DDR instructions.</description>
150291                  <value>#1</value>
150292                </enumeratedValue>
150293              </enumeratedValues>
150294            </field>
150295            <field>
150296              <name>FSDLY</name>
150297              <description>Full Speed Delay selection for SDR instructions. Select the delay with respect to the reference edge for the sample point valid for full speed commands:</description>
150298              <bitOffset>6</bitOffset>
150299              <bitWidth>1</bitWidth>
150300              <access>read-write</access>
150301              <enumeratedValues>
150302                <enumeratedValue>
150303                  <name>0</name>
150304                  <description>One clock cycle delay</description>
150305                  <value>#0</value>
150306                </enumeratedValue>
150307                <enumeratedValue>
150308                  <name>1</name>
150309                  <description>Two clock cycles delay. This bit is also used in DQS mode and ignored when using non-DQS DDR instructions.</description>
150310                  <value>#1</value>
150311                </enumeratedValue>
150312              </enumeratedValues>
150313            </field>
150314            <field>
150315              <name>DDRSMP</name>
150316              <description>DDR Sampling point</description>
150317              <bitOffset>16</bitOffset>
150318              <bitWidth>3</bitWidth>
150319              <access>read-write</access>
150320            </field>
150321          </fields>
150322        </register>
150323        <register>
150324          <name>RBSR</name>
150325          <description>RX Buffer Status Register</description>
150326          <addressOffset>0x10C</addressOffset>
150327          <size>32</size>
150328          <access>read-only</access>
150329          <resetValue>0</resetValue>
150330          <resetMask>0xFFFFFFFF</resetMask>
150331          <fields>
150332            <field>
150333              <name>RDBFL</name>
150334              <description>RX Buffer Fill Level, indicates how many entries of 4 bytes are still available in the RX Buffer</description>
150335              <bitOffset>8</bitOffset>
150336              <bitWidth>5</bitWidth>
150337              <access>read-only</access>
150338            </field>
150339            <field>
150340              <name>RDCTR</name>
150341              <description>Read Counter, indicates how many entries of 4 bytes have been removed from the RX Buffer</description>
150342              <bitOffset>16</bitOffset>
150343              <bitWidth>16</bitWidth>
150344              <access>read-only</access>
150345            </field>
150346          </fields>
150347        </register>
150348        <register>
150349          <name>RBCT</name>
150350          <description>RX Buffer Control Register</description>
150351          <addressOffset>0x110</addressOffset>
150352          <size>32</size>
150353          <access>read-write</access>
150354          <resetValue>0</resetValue>
150355          <resetMask>0xFFFFFFFF</resetMask>
150356          <fields>
150357            <field>
150358              <name>WMRK</name>
150359              <description>RX Buffer Watermark: This field determines when the readout action of the RX Buffer is triggered</description>
150360              <bitOffset>0</bitOffset>
150361              <bitWidth>4</bitWidth>
150362              <access>read-write</access>
150363            </field>
150364            <field>
150365              <name>RXBRD</name>
150366              <description>RX Buffer Readout: This bit specifies the access scheme for the RX Buffer readout.</description>
150367              <bitOffset>8</bitOffset>
150368              <bitWidth>1</bitWidth>
150369              <access>read-write</access>
150370              <enumeratedValues>
150371                <enumeratedValue>
150372                  <name>0</name>
150373                  <description>RX Buffer content is read using the AHB Bus registers QSPI_ARDB0 to QSPI_ARDB15. For details, refer to Exclusive Access to Serial Flash for AHB Commands.</description>
150374                  <value>#0</value>
150375                </enumeratedValue>
150376                <enumeratedValue>
150377                  <name>1</name>
150378                  <description>RX Buffer content is read using the IP Bus registers QSPI_RBDR0 to QSPI_RBDR15.</description>
150379                  <value>#1</value>
150380                </enumeratedValue>
150381              </enumeratedValues>
150382            </field>
150383          </fields>
150384        </register>
150385        <register>
150386          <name>TBSR</name>
150387          <description>TX Buffer Status Register</description>
150388          <addressOffset>0x150</addressOffset>
150389          <size>32</size>
150390          <access>read-only</access>
150391          <resetValue>0</resetValue>
150392          <resetMask>0xFFFFFFFF</resetMask>
150393          <fields>
150394            <field>
150395              <name>TRBFL</name>
150396              <description>TX Buffer Fill Level</description>
150397              <bitOffset>8</bitOffset>
150398              <bitWidth>5</bitWidth>
150399              <access>read-only</access>
150400            </field>
150401            <field>
150402              <name>TRCTR</name>
150403              <description>Transmit Counter</description>
150404              <bitOffset>16</bitOffset>
150405              <bitWidth>16</bitWidth>
150406              <access>read-only</access>
150407            </field>
150408          </fields>
150409        </register>
150410        <register>
150411          <name>TBDR</name>
150412          <description>TX Buffer Data Register</description>
150413          <addressOffset>0x154</addressOffset>
150414          <size>32</size>
150415          <access>read-write</access>
150416          <resetValue>0</resetValue>
150417          <resetMask>0xFFFFFFFF</resetMask>
150418          <fields>
150419            <field>
150420              <name>TXDATA</name>
150421              <description>TX Data On write access the data is written into the next available entry of the TX Buffer and the QPSI_TBSR[TRBFL] field is updated accordingly</description>
150422              <bitOffset>0</bitOffset>
150423              <bitWidth>32</bitWidth>
150424              <access>read-write</access>
150425            </field>
150426          </fields>
150427        </register>
150428        <register>
150429          <name>TBCT</name>
150430          <description>Tx Buffer Control Register</description>
150431          <addressOffset>0x158</addressOffset>
150432          <size>32</size>
150433          <access>read-write</access>
150434          <resetValue>0</resetValue>
150435          <resetMask>0xFFFFFFFF</resetMask>
150436          <fields>
150437            <field>
150438              <name>WMRK</name>
150439              <description>Determines the watermark for the TX Buffer</description>
150440              <bitOffset>0</bitOffset>
150441              <bitWidth>4</bitWidth>
150442              <access>read-write</access>
150443            </field>
150444          </fields>
150445        </register>
150446        <register>
150447          <name>SR</name>
150448          <description>Status Register</description>
150449          <addressOffset>0x15C</addressOffset>
150450          <size>32</size>
150451          <access>read-only</access>
150452          <resetValue>0x2003800</resetValue>
150453          <resetMask>0xFFFFFFFF</resetMask>
150454          <fields>
150455            <field>
150456              <name>BUSY</name>
150457              <description>Module Busy: Asserted when module is currently busy handling a transaction to an external flash device</description>
150458              <bitOffset>0</bitOffset>
150459              <bitWidth>1</bitWidth>
150460              <access>read-only</access>
150461            </field>
150462            <field>
150463              <name>IP_ACC</name>
150464              <description>IP Access: Asserted when transaction currently executed was initiated by IP bus.</description>
150465              <bitOffset>1</bitOffset>
150466              <bitWidth>1</bitWidth>
150467              <access>read-only</access>
150468            </field>
150469            <field>
150470              <name>AHB_ACC</name>
150471              <description>AHB Access: Asserted when the transaction currently executed was initiated by AHB bus.</description>
150472              <bitOffset>2</bitOffset>
150473              <bitWidth>1</bitWidth>
150474              <access>read-only</access>
150475            </field>
150476            <field>
150477              <name>AHBGNT</name>
150478              <description>AHB Command priority Granted: Asserted when another module has been granted priority of AHB Commands against IP Commands</description>
150479              <bitOffset>5</bitOffset>
150480              <bitWidth>1</bitWidth>
150481              <access>read-only</access>
150482            </field>
150483            <field>
150484              <name>AHBTRN</name>
150485              <description>AHB Access Transaction pending: Asserted when there is a pending request on the AHB interface</description>
150486              <bitOffset>6</bitOffset>
150487              <bitWidth>1</bitWidth>
150488              <access>read-only</access>
150489            </field>
150490            <field>
150491              <name>AHB0NE</name>
150492              <description>AHB 0 Buffer Not Empty: Asserted when AHB 0 buffer contains data.</description>
150493              <bitOffset>7</bitOffset>
150494              <bitWidth>1</bitWidth>
150495              <access>read-only</access>
150496            </field>
150497            <field>
150498              <name>AHB1NE</name>
150499              <description>AHB 1 Buffer Not Empty: Asserted when AHB 1 buffer contains data.</description>
150500              <bitOffset>8</bitOffset>
150501              <bitWidth>1</bitWidth>
150502              <access>read-only</access>
150503            </field>
150504            <field>
150505              <name>AHB2NE</name>
150506              <description>AHB 2 Buffer Not Empty: Asserted when AHB 2 buffer contains data.</description>
150507              <bitOffset>9</bitOffset>
150508              <bitWidth>1</bitWidth>
150509              <access>read-only</access>
150510            </field>
150511            <field>
150512              <name>AHB3NE</name>
150513              <description>AHB 3 Buffer Not Empty: Asserted when AHB 3 buffer contains data.</description>
150514              <bitOffset>10</bitOffset>
150515              <bitWidth>1</bitWidth>
150516              <access>read-only</access>
150517            </field>
150518            <field>
150519              <name>AHB0FUL</name>
150520              <description>AHB 0 Buffer Full: Asserted when AHB 0 buffer is full.</description>
150521              <bitOffset>11</bitOffset>
150522              <bitWidth>1</bitWidth>
150523              <access>read-only</access>
150524            </field>
150525            <field>
150526              <name>AHB1FUL</name>
150527              <description>AHB 1 Buffer Full: Asserted when AHB 1 buffer is full.</description>
150528              <bitOffset>12</bitOffset>
150529              <bitWidth>1</bitWidth>
150530              <access>read-only</access>
150531            </field>
150532            <field>
150533              <name>AHB2FUL</name>
150534              <description>AHB 2 Buffer Full: Asserted when AHB 2 buffer is full.</description>
150535              <bitOffset>13</bitOffset>
150536              <bitWidth>1</bitWidth>
150537              <access>read-only</access>
150538            </field>
150539            <field>
150540              <name>AHB3FUL</name>
150541              <description>AHB 3 Buffer Full: Asserted when AHB 3 buffer is full.</description>
150542              <bitOffset>14</bitOffset>
150543              <bitWidth>1</bitWidth>
150544              <access>read-only</access>
150545            </field>
150546            <field>
150547              <name>RXWE</name>
150548              <description>RX Buffer Watermark Exceeded: Asserted when the number of valid entries in the RX Buffer exceeds the number given in the QSPI_RBCT[WMRK] field</description>
150549              <bitOffset>16</bitOffset>
150550              <bitWidth>1</bitWidth>
150551              <access>read-only</access>
150552            </field>
150553            <field>
150554              <name>RXFULL</name>
150555              <description>RX Buffer Full: Asserted when the RX Buffer is full, i</description>
150556              <bitOffset>19</bitOffset>
150557              <bitWidth>1</bitWidth>
150558              <access>read-only</access>
150559            </field>
150560            <field>
150561              <name>RXDMA</name>
150562              <description>RX Buffer DMA: Asserted when RX Buffer read out via DMA is active i.e DMA is requested or running.</description>
150563              <bitOffset>23</bitOffset>
150564              <bitWidth>1</bitWidth>
150565              <access>read-only</access>
150566            </field>
150567            <field>
150568              <name>TXEDA</name>
150569              <description>Tx Buffer Enough Data Available</description>
150570              <bitOffset>24</bitOffset>
150571              <bitWidth>1</bitWidth>
150572              <access>read-only</access>
150573            </field>
150574            <field>
150575              <name>TXWA</name>
150576              <description>TX Buffer watermark Available</description>
150577              <bitOffset>25</bitOffset>
150578              <bitWidth>1</bitWidth>
150579              <access>read-only</access>
150580            </field>
150581            <field>
150582              <name>TXDMA</name>
150583              <description>TXDMA</description>
150584              <bitOffset>26</bitOffset>
150585              <bitWidth>1</bitWidth>
150586              <access>read-only</access>
150587            </field>
150588            <field>
150589              <name>TXFULL</name>
150590              <description>TX Buffer Full: Asserted when no more data can be stored.</description>
150591              <bitOffset>27</bitOffset>
150592              <bitWidth>1</bitWidth>
150593              <access>read-only</access>
150594            </field>
150595            <field>
150596              <name>DLPSMP</name>
150597              <description>Data learning pattern sampling point: The sampling point found by the controller with the data learning pattern</description>
150598              <bitOffset>29</bitOffset>
150599              <bitWidth>3</bitWidth>
150600              <access>read-only</access>
150601            </field>
150602          </fields>
150603        </register>
150604        <register>
150605          <name>FR</name>
150606          <description>Flag Register</description>
150607          <addressOffset>0x160</addressOffset>
150608          <size>32</size>
150609          <access>read-write</access>
150610          <resetValue>0x8000000</resetValue>
150611          <resetMask>0xFFFFFFFF</resetMask>
150612          <fields>
150613            <field>
150614              <name>TFF</name>
150615              <description>IP Command Transaction Finished Flag: Set when the QuadSPI module has finished a running IP Command</description>
150616              <bitOffset>0</bitOffset>
150617              <bitWidth>1</bitWidth>
150618              <access>read-write</access>
150619            </field>
150620            <field>
150621              <name>IPGEF</name>
150622              <description>IP Command Trigger during AHB Grant Error Flag: Set when the following condition occurs: A write access occurs to the QSPI_IPCR[SEQID] field and the QSPI_SR[AHBGNT] bit is set</description>
150623              <bitOffset>4</bitOffset>
150624              <bitWidth>1</bitWidth>
150625              <access>read-write</access>
150626            </field>
150627            <field>
150628              <name>IPIEF</name>
150629              <description>IP Command Trigger could not be executed Error Flag</description>
150630              <bitOffset>6</bitOffset>
150631              <bitWidth>1</bitWidth>
150632              <access>read-write</access>
150633            </field>
150634            <field>
150635              <name>IPAEF</name>
150636              <description>IP Command Trigger during AHB Access Error Flag</description>
150637              <bitOffset>7</bitOffset>
150638              <bitWidth>1</bitWidth>
150639              <access>read-write</access>
150640            </field>
150641            <field>
150642              <name>IUEF</name>
150643              <description>IP Command Usage Error Flag: Set when in parallel flash mode the execution of an IP Command is started with more than one pad enabled and the sequence pointed to by the sequence ID contains a WRITE or a WRITE_DDR command</description>
150644              <bitOffset>11</bitOffset>
150645              <bitWidth>1</bitWidth>
150646              <access>read-write</access>
150647            </field>
150648            <field>
150649              <name>ABOF</name>
150650              <description>AHB Buffer Overflow Flag: Set when the size of the AHB access exceeds the size of the AHB buffer</description>
150651              <bitOffset>12</bitOffset>
150652              <bitWidth>1</bitWidth>
150653              <access>read-write</access>
150654            </field>
150655            <field>
150656              <name>AIBSEF</name>
150657              <description>AHB Illegal Burst Size Error Flag: Set whenever the total burst size(size x beat) of an AHB transaction is greater than the prefetch data size</description>
150658              <bitOffset>13</bitOffset>
150659              <bitWidth>1</bitWidth>
150660              <access>read-write</access>
150661            </field>
150662            <field>
150663              <name>AITEF</name>
150664              <description>AHB Illegal transaction error flag</description>
150665              <bitOffset>14</bitOffset>
150666              <bitWidth>1</bitWidth>
150667              <access>read-write</access>
150668            </field>
150669            <field>
150670              <name>ABSEF</name>
150671              <description>AHB Sequence Error Flag: Set when the execution of an AHB Command is started with a WRITE or WRITE_DDR Command in the sequence pointed to by the QSPI_BUFxCR register</description>
150672              <bitOffset>15</bitOffset>
150673              <bitWidth>1</bitWidth>
150674              <access>read-write</access>
150675            </field>
150676            <field>
150677              <name>RBDF</name>
150678              <description>RX Buffer Drain Flag: Will be set if the QuadSPI_SR[RXWE] status bit is asserted</description>
150679              <bitOffset>16</bitOffset>
150680              <bitWidth>1</bitWidth>
150681              <access>read-write</access>
150682            </field>
150683            <field>
150684              <name>RBOF</name>
150685              <description>RX Buffer Overflow Flag: Set when not all the data read from the serial flash device could be pushed into the RX Buffer</description>
150686              <bitOffset>17</bitOffset>
150687              <bitWidth>1</bitWidth>
150688              <access>read-write</access>
150689            </field>
150690            <field>
150691              <name>ILLINE</name>
150692              <description>Illegal Instruction Error Flag: Set when an illegal instruction is encountered by the controller in any of the sequences</description>
150693              <bitOffset>23</bitOffset>
150694              <bitWidth>1</bitWidth>
150695              <access>read-write</access>
150696            </field>
150697            <field>
150698              <name>TBUF</name>
150699              <description>TX Buffer Underrun Flag: Set when the module tried to pull data although TX Buffer was emptyor the buffer contains less than 128bits of data</description>
150700              <bitOffset>26</bitOffset>
150701              <bitWidth>1</bitWidth>
150702              <access>read-write</access>
150703            </field>
150704            <field>
150705              <name>TBFF</name>
150706              <description>TX Buffer Fill Flag: Before writing to the TX buffer, this bit should be cleared</description>
150707              <bitOffset>27</bitOffset>
150708              <bitWidth>1</bitWidth>
150709              <access>read-write</access>
150710            </field>
150711            <field>
150712              <name>DLPFF</name>
150713              <description>Data Learning Pattern Failure Flag: Set when DATA_LEARN instruction was encountered in a sequence but no sampling point was found for the data learning patternin case only 8 bit data learning is requested for non DQS mode</description>
150714              <bitOffset>31</bitOffset>
150715              <bitWidth>1</bitWidth>
150716              <access>read-write</access>
150717            </field>
150718          </fields>
150719        </register>
150720        <register>
150721          <name>RSER</name>
150722          <description>Interrupt and DMA Request Select and Enable Register</description>
150723          <addressOffset>0x164</addressOffset>
150724          <size>32</size>
150725          <access>read-write</access>
150726          <resetValue>0</resetValue>
150727          <resetMask>0xFFFFFFFF</resetMask>
150728          <fields>
150729            <field>
150730              <name>TFIE</name>
150731              <description>Transaction Finished Interrupt Enable</description>
150732              <bitOffset>0</bitOffset>
150733              <bitWidth>1</bitWidth>
150734              <access>read-write</access>
150735              <enumeratedValues>
150736                <enumeratedValue>
150737                  <name>0</name>
150738                  <description>No TFF interrupt will be generated</description>
150739                  <value>#0</value>
150740                </enumeratedValue>
150741                <enumeratedValue>
150742                  <name>1</name>
150743                  <description>TFF interrupt will be generated</description>
150744                  <value>#1</value>
150745                </enumeratedValue>
150746              </enumeratedValues>
150747            </field>
150748            <field>
150749              <name>IPGEIE</name>
150750              <description>IP Command Trigger during AHB Grant Error Interrupt Enable</description>
150751              <bitOffset>4</bitOffset>
150752              <bitWidth>1</bitWidth>
150753              <access>read-write</access>
150754              <enumeratedValues>
150755                <enumeratedValue>
150756                  <name>0</name>
150757                  <description>No IPGEF interrupt will be generated</description>
150758                  <value>#0</value>
150759                </enumeratedValue>
150760                <enumeratedValue>
150761                  <name>1</name>
150762                  <description>IPGEF interrupt will be generated</description>
150763                  <value>#1</value>
150764                </enumeratedValue>
150765              </enumeratedValues>
150766            </field>
150767            <field>
150768              <name>IPIEIE</name>
150769              <description>IP Command Trigger during IP Access Error Interrupt Enable</description>
150770              <bitOffset>6</bitOffset>
150771              <bitWidth>1</bitWidth>
150772              <access>read-write</access>
150773              <enumeratedValues>
150774                <enumeratedValue>
150775                  <name>0</name>
150776                  <description>No IPIEF interrupt will be generated</description>
150777                  <value>#0</value>
150778                </enumeratedValue>
150779                <enumeratedValue>
150780                  <name>1</name>
150781                  <description>IPIEF interrupt will be generated</description>
150782                  <value>#1</value>
150783                </enumeratedValue>
150784              </enumeratedValues>
150785            </field>
150786            <field>
150787              <name>IPAEIE</name>
150788              <description>IP Command Trigger during AHB Access Error Interrupt Enable</description>
150789              <bitOffset>7</bitOffset>
150790              <bitWidth>1</bitWidth>
150791              <access>read-write</access>
150792              <enumeratedValues>
150793                <enumeratedValue>
150794                  <name>0</name>
150795                  <description>No IPAEF interrupt will be generated</description>
150796                  <value>#0</value>
150797                </enumeratedValue>
150798                <enumeratedValue>
150799                  <name>1</name>
150800                  <description>IPAEF interrupt will be generated</description>
150801                  <value>#1</value>
150802                </enumeratedValue>
150803              </enumeratedValues>
150804            </field>
150805            <field>
150806              <name>IUEIE</name>
150807              <description>IP Command Usage Error Interrupt Enable</description>
150808              <bitOffset>11</bitOffset>
150809              <bitWidth>1</bitWidth>
150810              <access>read-write</access>
150811              <enumeratedValues>
150812                <enumeratedValue>
150813                  <name>0</name>
150814                  <description>No IUEF interrupt will be generated</description>
150815                  <value>#0</value>
150816                </enumeratedValue>
150817                <enumeratedValue>
150818                  <name>1</name>
150819                  <description>IUEF interrupt will be generated</description>
150820                  <value>#1</value>
150821                </enumeratedValue>
150822              </enumeratedValues>
150823            </field>
150824            <field>
150825              <name>ABOIE</name>
150826              <description>AHB Buffer Overflow Interrupt Enable</description>
150827              <bitOffset>12</bitOffset>
150828              <bitWidth>1</bitWidth>
150829              <access>read-write</access>
150830              <enumeratedValues>
150831                <enumeratedValue>
150832                  <name>0</name>
150833                  <description>No ABOF interrupt will be generated</description>
150834                  <value>#0</value>
150835                </enumeratedValue>
150836                <enumeratedValue>
150837                  <name>1</name>
150838                  <description>ABOF interrupt will be generated</description>
150839                  <value>#1</value>
150840                </enumeratedValue>
150841              </enumeratedValues>
150842            </field>
150843            <field>
150844              <name>AIBSIE</name>
150845              <description>AHB Illegal Burst Size Interrupt Enable</description>
150846              <bitOffset>13</bitOffset>
150847              <bitWidth>1</bitWidth>
150848              <access>read-write</access>
150849              <enumeratedValues>
150850                <enumeratedValue>
150851                  <name>0</name>
150852                  <description>No AIBSEF interrupt will be generated</description>
150853                  <value>#0</value>
150854                </enumeratedValue>
150855                <enumeratedValue>
150856                  <name>1</name>
150857                  <description>AIBSEF interrupt will be generated</description>
150858                  <value>#1</value>
150859                </enumeratedValue>
150860              </enumeratedValues>
150861            </field>
150862            <field>
150863              <name>AITIE</name>
150864              <description>AHB Illegal transaction interrupt enable.</description>
150865              <bitOffset>14</bitOffset>
150866              <bitWidth>1</bitWidth>
150867              <access>read-write</access>
150868              <enumeratedValues>
150869                <enumeratedValue>
150870                  <name>0</name>
150871                  <description>No AITEF interrupt will be generated</description>
150872                  <value>#0</value>
150873                </enumeratedValue>
150874                <enumeratedValue>
150875                  <name>1</name>
150876                  <description>AITEF interrupt will be generated</description>
150877                  <value>#1</value>
150878                </enumeratedValue>
150879              </enumeratedValues>
150880            </field>
150881            <field>
150882              <name>ABSEIE</name>
150883              <description>AHB Sequence Error Interrupt Enable: Triggered by ABSEF flags of QSPI_FR</description>
150884              <bitOffset>15</bitOffset>
150885              <bitWidth>1</bitWidth>
150886              <access>read-write</access>
150887              <enumeratedValues>
150888                <enumeratedValue>
150889                  <name>0</name>
150890                  <description>No ABSEF interrupt will be generated</description>
150891                  <value>#0</value>
150892                </enumeratedValue>
150893                <enumeratedValue>
150894                  <name>1</name>
150895                  <description>ABSEF interrupt will be generated</description>
150896                  <value>#1</value>
150897                </enumeratedValue>
150898              </enumeratedValues>
150899            </field>
150900            <field>
150901              <name>RBDIE</name>
150902              <description>RX Buffer Drain Interrupt Enable: Enables generation of IRQ requests for RX Buffer Drain</description>
150903              <bitOffset>16</bitOffset>
150904              <bitWidth>1</bitWidth>
150905              <access>read-write</access>
150906              <enumeratedValues>
150907                <enumeratedValue>
150908                  <name>0</name>
150909                  <description>No RBDF interrupt will be generated</description>
150910                  <value>#0</value>
150911                </enumeratedValue>
150912                <enumeratedValue>
150913                  <name>1</name>
150914                  <description>RBDF Interrupt will be generated</description>
150915                  <value>#1</value>
150916                </enumeratedValue>
150917              </enumeratedValues>
150918            </field>
150919            <field>
150920              <name>RBOIE</name>
150921              <description>RX Buffer Overflow Interrupt Enable</description>
150922              <bitOffset>17</bitOffset>
150923              <bitWidth>1</bitWidth>
150924              <access>read-write</access>
150925              <enumeratedValues>
150926                <enumeratedValue>
150927                  <name>0</name>
150928                  <description>No RBOF interrupt will be generated</description>
150929                  <value>#0</value>
150930                </enumeratedValue>
150931                <enumeratedValue>
150932                  <name>1</name>
150933                  <description>RBOF interrupt will be generated</description>
150934                  <value>#1</value>
150935                </enumeratedValue>
150936              </enumeratedValues>
150937            </field>
150938            <field>
150939              <name>RBDDE</name>
150940              <description>RX Buffer Drain DMA Enable: Enables generation of DMA requests for RX Buffer Drain</description>
150941              <bitOffset>21</bitOffset>
150942              <bitWidth>1</bitWidth>
150943              <access>read-write</access>
150944              <enumeratedValues>
150945                <enumeratedValue>
150946                  <name>0</name>
150947                  <description>No DMA request will be generated</description>
150948                  <value>#0</value>
150949                </enumeratedValue>
150950                <enumeratedValue>
150951                  <name>1</name>
150952                  <description>DMA request will be generated</description>
150953                  <value>#1</value>
150954                </enumeratedValue>
150955              </enumeratedValues>
150956            </field>
150957            <field>
150958              <name>ILLINIE</name>
150959              <description>Illegal Instruction Error Interrupt Enable. Triggered by ILLINE flag in QSPI_FR</description>
150960              <bitOffset>23</bitOffset>
150961              <bitWidth>1</bitWidth>
150962              <access>read-write</access>
150963              <enumeratedValues>
150964                <enumeratedValue>
150965                  <name>0</name>
150966                  <description>No ILLINE interrupt will be generated</description>
150967                  <value>#0</value>
150968                </enumeratedValue>
150969                <enumeratedValue>
150970                  <name>1</name>
150971                  <description>ILLINE interrupt will be generated</description>
150972                  <value>#1</value>
150973                </enumeratedValue>
150974              </enumeratedValues>
150975            </field>
150976            <field>
150977              <name>TBFDE</name>
150978              <description>TX Buffer Fill DMA Enable</description>
150979              <bitOffset>25</bitOffset>
150980              <bitWidth>1</bitWidth>
150981              <access>read-write</access>
150982              <enumeratedValues>
150983                <enumeratedValue>
150984                  <name>0</name>
150985                  <description>No DMA request will be generated</description>
150986                  <value>#0</value>
150987                </enumeratedValue>
150988                <enumeratedValue>
150989                  <name>1</name>
150990                  <description>DMA request will be generated</description>
150991                  <value>#1</value>
150992                </enumeratedValue>
150993              </enumeratedValues>
150994            </field>
150995            <field>
150996              <name>TBUIE</name>
150997              <description>TX Buffer Underrun Interrupt Enable</description>
150998              <bitOffset>26</bitOffset>
150999              <bitWidth>1</bitWidth>
151000              <access>read-write</access>
151001              <enumeratedValues>
151002                <enumeratedValue>
151003                  <name>0</name>
151004                  <description>No TBUF interrupt will be generated</description>
151005                  <value>#0</value>
151006                </enumeratedValue>
151007                <enumeratedValue>
151008                  <name>1</name>
151009                  <description>TBUF interrupt will be generated</description>
151010                  <value>#1</value>
151011                </enumeratedValue>
151012              </enumeratedValues>
151013            </field>
151014            <field>
151015              <name>TBFIE</name>
151016              <description>TX Buffer Fill Interrupt Enable</description>
151017              <bitOffset>27</bitOffset>
151018              <bitWidth>1</bitWidth>
151019              <access>read-write</access>
151020              <enumeratedValues>
151021                <enumeratedValue>
151022                  <name>0</name>
151023                  <description>No TBFF interrupt will be generated</description>
151024                  <value>#0</value>
151025                </enumeratedValue>
151026                <enumeratedValue>
151027                  <name>1</name>
151028                  <description>TBFF interrupt will be generated</description>
151029                  <value>#1</value>
151030                </enumeratedValue>
151031              </enumeratedValues>
151032            </field>
151033            <field>
151034              <name>DLPFIE</name>
151035              <description>Data Learning Pattern Failure Interrupt enable . Triggered by DLPFF flag in QSPI_FR register</description>
151036              <bitOffset>31</bitOffset>
151037              <bitWidth>1</bitWidth>
151038              <access>read-write</access>
151039              <enumeratedValues>
151040                <enumeratedValue>
151041                  <name>0</name>
151042                  <description>No DLPFF interrupt will be generated</description>
151043                  <value>#0</value>
151044                </enumeratedValue>
151045                <enumeratedValue>
151046                  <name>1</name>
151047                  <description>DLPFF interrupt will be generated</description>
151048                  <value>#1</value>
151049                </enumeratedValue>
151050              </enumeratedValues>
151051            </field>
151052          </fields>
151053        </register>
151054        <register>
151055          <name>SPNDST</name>
151056          <description>Sequence Suspend Status Register</description>
151057          <addressOffset>0x168</addressOffset>
151058          <size>32</size>
151059          <access>read-only</access>
151060          <resetValue>0</resetValue>
151061          <resetMask>0xFFFFFFFF</resetMask>
151062          <fields>
151063            <field>
151064              <name>SUSPND</name>
151065              <description>When set, it signifies that a sequence is in suspended state</description>
151066              <bitOffset>0</bitOffset>
151067              <bitWidth>1</bitWidth>
151068              <access>read-only</access>
151069            </field>
151070            <field>
151071              <name>SPDBUF</name>
151072              <description>Suspended Buffer: Provides the suspended buffer number. Valid only when SUSPND is set to 1&apos;b1</description>
151073              <bitOffset>6</bitOffset>
151074              <bitWidth>2</bitWidth>
151075              <access>read-only</access>
151076            </field>
151077            <field>
151078              <name>DATLFT</name>
151079              <description>Data left: Provides information about the amount of data left to be read in the suspended sequence</description>
151080              <bitOffset>9</bitOffset>
151081              <bitWidth>6</bitWidth>
151082              <access>read-only</access>
151083            </field>
151084          </fields>
151085        </register>
151086        <register>
151087          <name>SPTRCLR</name>
151088          <description>Sequence Pointer Clear Register</description>
151089          <addressOffset>0x16C</addressOffset>
151090          <size>32</size>
151091          <access>read-write</access>
151092          <resetValue>0</resetValue>
151093          <resetMask>0xFFFFFFFF</resetMask>
151094          <fields>
151095            <field>
151096              <name>BFPTRC</name>
151097              <description>Buffer Pointer Clear: 1: Clears the sequence pointer for AHB accesses as defined in QuadSPI_BFGENCR</description>
151098              <bitOffset>0</bitOffset>
151099              <bitWidth>1</bitWidth>
151100              <access>write-only</access>
151101            </field>
151102            <field>
151103              <name>IPPTRC</name>
151104              <description>IP Pointer Clear: 1: Clears the sequence pointer for IP accesses as defined in QuadSPI_IPCR This is a self-clearing field</description>
151105              <bitOffset>8</bitOffset>
151106              <bitWidth>1</bitWidth>
151107              <access>write-only</access>
151108            </field>
151109          </fields>
151110        </register>
151111        <register>
151112          <name>SFA1AD</name>
151113          <description>Serial Flash A1 Top Address</description>
151114          <addressOffset>0x180</addressOffset>
151115          <size>32</size>
151116          <access>read-write</access>
151117          <resetValue>0x6FFFFC00</resetValue>
151118          <resetMask>0xFFFFFFFF</resetMask>
151119          <fields>
151120            <field>
151121              <name>TPADA1</name>
151122              <description>Top address for Serial Flash A1. In effect, TPADxx is the first location of the next memory.</description>
151123              <bitOffset>10</bitOffset>
151124              <bitWidth>22</bitWidth>
151125              <access>read-write</access>
151126            </field>
151127          </fields>
151128        </register>
151129        <register>
151130          <name>SFA2AD</name>
151131          <description>Serial Flash A2 Top Address</description>
151132          <addressOffset>0x184</addressOffset>
151133          <size>32</size>
151134          <access>read-write</access>
151135          <resetValue>0x6FFFFC00</resetValue>
151136          <resetMask>0xFFFFFFFF</resetMask>
151137          <fields>
151138            <field>
151139              <name>TPADA2</name>
151140              <description>Top address for Serial Flash A2. In effect, TPxxAD is the first location of the next memory.</description>
151141              <bitOffset>10</bitOffset>
151142              <bitWidth>22</bitWidth>
151143              <access>read-write</access>
151144            </field>
151145          </fields>
151146        </register>
151147        <register>
151148          <name>SFB1AD</name>
151149          <description>Serial Flash B1Top Address</description>
151150          <addressOffset>0x188</addressOffset>
151151          <size>32</size>
151152          <access>read-write</access>
151153          <resetValue>0x6FFFFC00</resetValue>
151154          <resetMask>0xFFFFFFFF</resetMask>
151155          <fields>
151156            <field>
151157              <name>TPADB1</name>
151158              <description>Top address for Serial Flash B1.In effect, TPxxAD is the first location of the next memory.</description>
151159              <bitOffset>10</bitOffset>
151160              <bitWidth>22</bitWidth>
151161              <access>read-write</access>
151162            </field>
151163          </fields>
151164        </register>
151165        <register>
151166          <name>SFB2AD</name>
151167          <description>Serial Flash B2Top Address</description>
151168          <addressOffset>0x18C</addressOffset>
151169          <size>32</size>
151170          <access>read-write</access>
151171          <resetValue>0x6FFFFC00</resetValue>
151172          <resetMask>0xFFFFFFFF</resetMask>
151173          <fields>
151174            <field>
151175              <name>TPADB2</name>
151176              <description>Top address for Serial Flash B2. In effect, TPxxAD is the first location of the next memory.</description>
151177              <bitOffset>10</bitOffset>
151178              <bitWidth>22</bitWidth>
151179              <access>read-write</access>
151180            </field>
151181          </fields>
151182        </register>
151183        <register>
151184          <name>DLPR</name>
151185          <description>Data Learn Pattern Register</description>
151186          <addressOffset>0x190</addressOffset>
151187          <size>32</size>
151188          <access>read-write</access>
151189          <resetValue>0xAA553443</resetValue>
151190          <resetMask>0xFFFFFFFF</resetMask>
151191          <fields>
151192            <field>
151193              <name>DLPV</name>
151194              <description>Data Learning Pattern Value: This value is used for data learning in DDR and DQS mode</description>
151195              <bitOffset>0</bitOffset>
151196              <bitWidth>32</bitWidth>
151197              <access>read-write</access>
151198            </field>
151199          </fields>
151200        </register>
151201        <register>
151202          <dim>16</dim>
151203          <dimIncrement>0x4</dimIncrement>
151204          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15</dimIndex>
151205          <name>RBDR%s</name>
151206          <description>RX Buffer Data Register</description>
151207          <addressOffset>0x200</addressOffset>
151208          <size>32</size>
151209          <access>read-only</access>
151210          <resetValue>0</resetValue>
151211          <resetMask>0xFFFFFFFF</resetMask>
151212          <fields>
151213            <field>
151214              <name>RXDATA</name>
151215              <description>RX Data</description>
151216              <bitOffset>0</bitOffset>
151217              <bitWidth>32</bitWidth>
151218              <access>read-only</access>
151219            </field>
151220          </fields>
151221        </register>
151222        <register>
151223          <name>LUTKEY</name>
151224          <description>LUT Key Register</description>
151225          <addressOffset>0x300</addressOffset>
151226          <size>32</size>
151227          <access>read-write</access>
151228          <resetValue>0x5AF05AF0</resetValue>
151229          <resetMask>0xFFFFFFFF</resetMask>
151230          <fields>
151231            <field>
151232              <name>KEY</name>
151233              <description>The key to lock or unlock the LUT. The KEY is 0x5AF05AF0. The read value is always 0x5AF05AF0</description>
151234              <bitOffset>0</bitOffset>
151235              <bitWidth>32</bitWidth>
151236              <access>read-write</access>
151237            </field>
151238          </fields>
151239        </register>
151240        <register>
151241          <name>LCKCR</name>
151242          <description>LUT Lock Configuration Register</description>
151243          <addressOffset>0x304</addressOffset>
151244          <size>32</size>
151245          <access>read-write</access>
151246          <resetValue>0x2</resetValue>
151247          <resetMask>0xFFFFFFFF</resetMask>
151248          <fields>
151249            <field>
151250              <name>LOCK</name>
151251              <description>Locks the LUT when the following condition is met: This register is written just after the LUTKEYLUT Key Register The LUT key register was written with 0x5AF05AF0 key</description>
151252              <bitOffset>0</bitOffset>
151253              <bitWidth>1</bitWidth>
151254              <access>read-write</access>
151255            </field>
151256            <field>
151257              <name>UNLOCK</name>
151258              <description>Unlocks the LUT when the following two conditions are met: 1</description>
151259              <bitOffset>1</bitOffset>
151260              <bitWidth>1</bitWidth>
151261              <access>read-write</access>
151262            </field>
151263          </fields>
151264        </register>
151265        <register>
151266          <dim>64</dim>
151267          <dimIncrement>0x4</dimIncrement>
151268          <dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63</dimIndex>
151269          <name>LUT%s</name>
151270          <description>Look-up Table register</description>
151271          <addressOffset>0x310</addressOffset>
151272          <size>32</size>
151273          <access>read-write</access>
151274          <resetValue>0</resetValue>
151275          <resetMask>0xFFFFFFFF</resetMask>
151276          <fields>
151277            <field>
151278              <name>OPRND0</name>
151279              <description>Operand for INSTR0.</description>
151280              <bitOffset>0</bitOffset>
151281              <bitWidth>8</bitWidth>
151282              <access>read-write</access>
151283            </field>
151284            <field>
151285              <name>PAD0</name>
151286              <description>Pad information for INSTR0.</description>
151287              <bitOffset>8</bitOffset>
151288              <bitWidth>2</bitWidth>
151289              <access>read-write</access>
151290              <enumeratedValues>
151291                <enumeratedValue>
151292                  <name>00</name>
151293                  <description>1 Pad</description>
151294                  <value>#00</value>
151295                </enumeratedValue>
151296                <enumeratedValue>
151297                  <name>01</name>
151298                  <description>2 Pads</description>
151299                  <value>#01</value>
151300                </enumeratedValue>
151301                <enumeratedValue>
151302                  <name>10</name>
151303                  <description>4 Pads</description>
151304                  <value>#10</value>
151305                </enumeratedValue>
151306                <enumeratedValue>
151307                  <name>11</name>
151308                  <description>8 Pads</description>
151309                  <value>#11</value>
151310                </enumeratedValue>
151311              </enumeratedValues>
151312            </field>
151313            <field>
151314              <name>INSTR0</name>
151315              <description>Instruction 0</description>
151316              <bitOffset>10</bitOffset>
151317              <bitWidth>6</bitWidth>
151318              <access>read-write</access>
151319            </field>
151320            <field>
151321              <name>OPRND1</name>
151322              <description>Operand for INSTR1.</description>
151323              <bitOffset>16</bitOffset>
151324              <bitWidth>8</bitWidth>
151325              <access>read-write</access>
151326            </field>
151327            <field>
151328              <name>PAD1</name>
151329              <description>Pad information for INSTR1.</description>
151330              <bitOffset>24</bitOffset>
151331              <bitWidth>2</bitWidth>
151332              <access>read-write</access>
151333              <enumeratedValues>
151334                <enumeratedValue>
151335                  <name>00</name>
151336                  <description>1 Pad</description>
151337                  <value>#00</value>
151338                </enumeratedValue>
151339                <enumeratedValue>
151340                  <name>01</name>
151341                  <description>2 Pads</description>
151342                  <value>#01</value>
151343                </enumeratedValue>
151344                <enumeratedValue>
151345                  <name>10</name>
151346                  <description>4 Pads</description>
151347                  <value>#10</value>
151348                </enumeratedValue>
151349                <enumeratedValue>
151350                  <name>11</name>
151351                  <description>8 Pads</description>
151352                  <value>#11</value>
151353                </enumeratedValue>
151354              </enumeratedValues>
151355            </field>
151356            <field>
151357              <name>INSTR1</name>
151358              <description>Instruction 1</description>
151359              <bitOffset>26</bitOffset>
151360              <bitWidth>6</bitWidth>
151361              <access>read-write</access>
151362            </field>
151363          </fields>
151364        </register>
151365      </registers>
151366    </peripheral>
151367    <peripheral>
151368      <name>OTFAD</name>
151369      <description>OTFAD</description>
151370      <prependToName>OTFAD_</prependToName>
151371      <baseAddress>0x400DAC00</baseAddress>
151372      <addressBlock>
151373        <offset>0</offset>
151374        <size>0x1E0</size>
151375        <usage>registers</usage>
151376      </addressBlock>
151377      <registers>
151378        <register>
151379          <name>CR</name>
151380          <description>Control Register</description>
151381          <addressOffset>0</addressOffset>
151382          <size>32</size>
151383          <access>read-write</access>
151384          <resetValue>0</resetValue>
151385          <resetMask>0xFFFFFFFF</resetMask>
151386          <fields>
151387            <field>
151388              <name>FSVM</name>
151389              <description>Force Security Violation Mode</description>
151390              <bitOffset>2</bitOffset>
151391              <bitWidth>1</bitWidth>
151392              <access>read-write</access>
151393              <enumeratedValues>
151394                <enumeratedValue>
151395                  <name>0</name>
151396                  <description>No effect on the operating mode.</description>
151397                  <value>#0</value>
151398                </enumeratedValue>
151399                <enumeratedValue>
151400                  <name>1</name>
151401                  <description>Force entry into SVM after a write with this data bit set and the data bit associated with FLDM cleared. SR[MODE] signals the operating mode.</description>
151402                  <value>#1</value>
151403                </enumeratedValue>
151404              </enumeratedValues>
151405            </field>
151406            <field>
151407              <name>FLDM</name>
151408              <description>Force Logically Disabled Mode</description>
151409              <bitOffset>3</bitOffset>
151410              <bitWidth>1</bitWidth>
151411              <access>read-write</access>
151412              <enumeratedValues>
151413                <enumeratedValue>
151414                  <name>0</name>
151415                  <description>No effect on the operating mode.</description>
151416                  <value>#0</value>
151417                </enumeratedValue>
151418                <enumeratedValue>
151419                  <name>1</name>
151420                  <description>Force entry into LDM after a write with this data bit set. SR[MODE] signals the operating mode.</description>
151421                  <value>#1</value>
151422                </enumeratedValue>
151423              </enumeratedValues>
151424            </field>
151425            <field>
151426              <name>RRAE</name>
151427              <description>Restricted Register Access Enable</description>
151428              <bitOffset>7</bitOffset>
151429              <bitWidth>1</bitWidth>
151430              <access>read-write</access>
151431              <enumeratedValues>
151432                <enumeratedValue>
151433                  <name>0</name>
151434                  <description>Register access is fully enabled. The OTFAD programming model registers can be accessed &quot;normally&quot;.</description>
151435                  <value>#0</value>
151436                </enumeratedValue>
151437                <enumeratedValue>
151438                  <name>1</name>
151439                  <description>Register access is restricted and only the CR, SR and CRC can be accessed; others are treated as RAZ/WI.</description>
151440                  <value>#1</value>
151441                </enumeratedValue>
151442              </enumeratedValues>
151443            </field>
151444            <field>
151445              <name>CCTX</name>
151446              <description>CRC Context</description>
151447              <bitOffset>16</bitOffset>
151448              <bitWidth>2</bitWidth>
151449              <access>read-write</access>
151450              <enumeratedValues>
151451                <enumeratedValue>
151452                  <name>00</name>
151453                  <description>Enable CTX0 CRC check.</description>
151454                  <value>#00</value>
151455                </enumeratedValue>
151456                <enumeratedValue>
151457                  <name>01</name>
151458                  <description>Enable CTX1 CRC check.</description>
151459                  <value>#01</value>
151460                </enumeratedValue>
151461                <enumeratedValue>
151462                  <name>10</name>
151463                  <description>Enable CTX2 CRC check.</description>
151464                  <value>#10</value>
151465                </enumeratedValue>
151466                <enumeratedValue>
151467                  <name>11</name>
151468                  <description>Enable CTX3 CRC check.</description>
151469                  <value>#11</value>
151470                </enumeratedValue>
151471              </enumeratedValues>
151472            </field>
151473            <field>
151474              <name>CRCE</name>
151475              <description>CRC Enable</description>
151476              <bitOffset>20</bitOffset>
151477              <bitWidth>1</bitWidth>
151478              <access>read-write</access>
151479              <enumeratedValues>
151480                <enumeratedValue>
151481                  <name>0</name>
151482                  <description>CRC-32 is disabled.</description>
151483                  <value>#0</value>
151484                </enumeratedValue>
151485                <enumeratedValue>
151486                  <name>1</name>
151487                  <description>CRC-32 for the context defined by CR[CCTRX] is enabled.</description>
151488                  <value>#1</value>
151489                </enumeratedValue>
151490              </enumeratedValues>
151491            </field>
151492            <field>
151493              <name>CRCI</name>
151494              <description>CRC Initialization</description>
151495              <bitOffset>21</bitOffset>
151496              <bitWidth>1</bitWidth>
151497              <access>write-only</access>
151498              <enumeratedValues>
151499                <enumeratedValue>
151500                  <name>0</name>
151501                  <description>CRC data register is unaffected.</description>
151502                  <value>#0</value>
151503                </enumeratedValue>
151504                <enumeratedValue>
151505                  <name>1</name>
151506                  <description>CRC data register is immediately initialized after a write with this data bit set.</description>
151507                  <value>#1</value>
151508                </enumeratedValue>
151509              </enumeratedValues>
151510            </field>
151511            <field>
151512              <name>GE</name>
151513              <description>Global OTFAD Enable</description>
151514              <bitOffset>31</bitOffset>
151515              <bitWidth>1</bitWidth>
151516              <access>read-write</access>
151517              <enumeratedValues>
151518                <enumeratedValue>
151519                  <name>0</name>
151520                  <description>OTFAD has decryption disabled, and bypasses all data fetched by the QuadSPI.</description>
151521                  <value>#0</value>
151522                </enumeratedValue>
151523                <enumeratedValue>
151524                  <name>1</name>
151525                  <description>OTFAD has decryption enabled, and processes fetched data as defined by the hardware configuration.</description>
151526                  <value>#1</value>
151527                </enumeratedValue>
151528              </enumeratedValues>
151529            </field>
151530          </fields>
151531        </register>
151532        <register>
151533          <name>SR</name>
151534          <description>Status Register</description>
151535          <addressOffset>0x4</addressOffset>
151536          <size>32</size>
151537          <access>read-only</access>
151538          <resetValue>0x40</resetValue>
151539          <resetMask>0xFFFFFFFF</resetMask>
151540          <fields>
151541            <field>
151542              <name>MDPCP</name>
151543              <description>MDPC Present</description>
151544              <bitOffset>1</bitOffset>
151545              <bitWidth>1</bitWidth>
151546              <access>read-only</access>
151547            </field>
151548            <field>
151549              <name>MODE</name>
151550              <description>Operating Mode</description>
151551              <bitOffset>2</bitOffset>
151552              <bitWidth>2</bitWidth>
151553              <access>read-only</access>
151554              <enumeratedValues>
151555                <enumeratedValue>
151556                  <name>00</name>
151557                  <description>Operating in Normal mode (NRM)</description>
151558                  <value>#00</value>
151559                </enumeratedValue>
151560                <enumeratedValue>
151561                  <name>01</name>
151562                  <description>Unused (reserved)</description>
151563                  <value>#01</value>
151564                </enumeratedValue>
151565                <enumeratedValue>
151566                  <name>10</name>
151567                  <description>Operating in Security Violation Mode (SVM)</description>
151568                  <value>#10</value>
151569                </enumeratedValue>
151570                <enumeratedValue>
151571                  <name>11</name>
151572                  <description>Operating in Logically Disabled Mode (LDM)</description>
151573                  <value>#11</value>
151574                </enumeratedValue>
151575              </enumeratedValues>
151576            </field>
151577            <field>
151578              <name>NCTX</name>
151579              <description>Number of Contexts</description>
151580              <bitOffset>4</bitOffset>
151581              <bitWidth>4</bitWidth>
151582              <access>read-only</access>
151583            </field>
151584            <field>
151585              <name>HRL</name>
151586              <description>Hardware Revision Level</description>
151587              <bitOffset>24</bitOffset>
151588              <bitWidth>4</bitWidth>
151589              <access>read-only</access>
151590            </field>
151591            <field>
151592              <name>RRAM</name>
151593              <description>Restricted Register Access Mode</description>
151594              <bitOffset>28</bitOffset>
151595              <bitWidth>1</bitWidth>
151596              <access>read-only</access>
151597              <enumeratedValues>
151598                <enumeratedValue>
151599                  <name>0</name>
151600                  <description>Register access is fully enabled. The OTFAD programming model registers can be accessed &quot;normally&quot;.</description>
151601                  <value>#0</value>
151602                </enumeratedValue>
151603                <enumeratedValue>
151604                  <name>1</name>
151605                  <description>Register access is restricted and only the CR, SR and CRC can be accessed; others are treated as RAZ/WI.</description>
151606                  <value>#1</value>
151607                </enumeratedValue>
151608              </enumeratedValues>
151609            </field>
151610            <field>
151611              <name>GEM</name>
151612              <description>Global Enable Mode</description>
151613              <bitOffset>29</bitOffset>
151614              <bitWidth>1</bitWidth>
151615              <access>read-only</access>
151616              <enumeratedValues>
151617                <enumeratedValue>
151618                  <name>0</name>
151619                  <description>OTFAD is disabled, and bypasses all data fetched by the QuadSPI.</description>
151620                  <value>#0</value>
151621                </enumeratedValue>
151622                <enumeratedValue>
151623                  <name>1</name>
151624                  <description>OTFAD is enabled, and processes data fetched by the QuadSPI as defined by the hardware configuration.</description>
151625                  <value>#1</value>
151626                </enumeratedValue>
151627              </enumeratedValues>
151628            </field>
151629          </fields>
151630        </register>
151631        <register>
151632          <name>CRC</name>
151633          <description>Cyclic Redundancy Check Register</description>
151634          <addressOffset>0x8</addressOffset>
151635          <size>32</size>
151636          <access>read-write</access>
151637          <resetValue>0</resetValue>
151638          <resetMask>0xFFFFFFFF</resetMask>
151639          <fields>
151640            <field>
151641              <name>CRCD</name>
151642              <description>CRC Data.</description>
151643              <bitOffset>0</bitOffset>
151644              <bitWidth>32</bitWidth>
151645              <access>read-write</access>
151646            </field>
151647          </fields>
151648        </register>
151649        <register>
151650          <dim>4</dim>
151651          <dimIncrement>0x40</dimIncrement>
151652          <dimIndex>0,1,2,3</dimIndex>
151653          <name>CTX%s_KEY_W0</name>
151654          <description>AES Key Word0</description>
151655          <addressOffset>0x100</addressOffset>
151656          <size>32</size>
151657          <access>read-write</access>
151658          <resetValue>0</resetValue>
151659          <resetMask>0xFFFFFFFF</resetMask>
151660          <fields>
151661            <field>
151662              <name>W0KEY</name>
151663              <description>AES Key</description>
151664              <bitOffset>0</bitOffset>
151665              <bitWidth>32</bitWidth>
151666              <access>read-write</access>
151667            </field>
151668          </fields>
151669        </register>
151670        <register>
151671          <dim>4</dim>
151672          <dimIncrement>0x40</dimIncrement>
151673          <dimIndex>0,1,2,3</dimIndex>
151674          <name>CTX%s_KEY_W1</name>
151675          <description>AES Key Word1</description>
151676          <addressOffset>0x104</addressOffset>
151677          <size>32</size>
151678          <access>read-write</access>
151679          <resetValue>0</resetValue>
151680          <resetMask>0xFFFFFFFF</resetMask>
151681          <fields>
151682            <field>
151683              <name>W1KEY</name>
151684              <description>AES Key</description>
151685              <bitOffset>0</bitOffset>
151686              <bitWidth>32</bitWidth>
151687              <access>read-write</access>
151688            </field>
151689          </fields>
151690        </register>
151691        <register>
151692          <dim>4</dim>
151693          <dimIncrement>0x40</dimIncrement>
151694          <dimIndex>0,1,2,3</dimIndex>
151695          <name>CTX%s_KEY_W2</name>
151696          <description>AES Key Word2</description>
151697          <addressOffset>0x108</addressOffset>
151698          <size>32</size>
151699          <access>read-write</access>
151700          <resetValue>0</resetValue>
151701          <resetMask>0xFFFFFFFF</resetMask>
151702          <fields>
151703            <field>
151704              <name>W2KEY</name>
151705              <description>AES Key</description>
151706              <bitOffset>0</bitOffset>
151707              <bitWidth>32</bitWidth>
151708              <access>read-write</access>
151709            </field>
151710          </fields>
151711        </register>
151712        <register>
151713          <dim>4</dim>
151714          <dimIncrement>0x40</dimIncrement>
151715          <dimIndex>0,1,2,3</dimIndex>
151716          <name>CTX%s_KEY_W3</name>
151717          <description>AES Key Word3</description>
151718          <addressOffset>0x10C</addressOffset>
151719          <size>32</size>
151720          <access>read-write</access>
151721          <resetValue>0</resetValue>
151722          <resetMask>0xFFFFFFFF</resetMask>
151723          <fields>
151724            <field>
151725              <name>W3KEY</name>
151726              <description>AES Key</description>
151727              <bitOffset>0</bitOffset>
151728              <bitWidth>32</bitWidth>
151729              <access>read-write</access>
151730            </field>
151731          </fields>
151732        </register>
151733        <register>
151734          <dim>4</dim>
151735          <dimIncrement>0x40</dimIncrement>
151736          <dimIndex>0,1,2,3</dimIndex>
151737          <name>CTX%s_CTR_W0</name>
151738          <description>AES Counter Word0</description>
151739          <addressOffset>0x110</addressOffset>
151740          <size>32</size>
151741          <access>read-write</access>
151742          <resetValue>0</resetValue>
151743          <resetMask>0xFFFFFFFF</resetMask>
151744          <fields>
151745            <field>
151746              <name>W0CTR</name>
151747              <description>AES Counter</description>
151748              <bitOffset>0</bitOffset>
151749              <bitWidth>32</bitWidth>
151750              <access>read-write</access>
151751            </field>
151752          </fields>
151753        </register>
151754        <register>
151755          <dim>4</dim>
151756          <dimIncrement>0x40</dimIncrement>
151757          <dimIndex>0,1,2,3</dimIndex>
151758          <name>CTX%s_CTR_W1</name>
151759          <description>AES Counter Word1</description>
151760          <addressOffset>0x114</addressOffset>
151761          <size>32</size>
151762          <access>read-write</access>
151763          <resetValue>0</resetValue>
151764          <resetMask>0xFFFFFFFF</resetMask>
151765          <fields>
151766            <field>
151767              <name>W1CTR</name>
151768              <description>AES Counter</description>
151769              <bitOffset>0</bitOffset>
151770              <bitWidth>32</bitWidth>
151771              <access>read-write</access>
151772            </field>
151773          </fields>
151774        </register>
151775        <register>
151776          <dim>4</dim>
151777          <dimIncrement>0x40</dimIncrement>
151778          <dimIndex>0,1,2,3</dimIndex>
151779          <name>CTX%s_RGD_W0</name>
151780          <description>AES Region Descriptor Word0</description>
151781          <addressOffset>0x118</addressOffset>
151782          <size>32</size>
151783          <access>read-write</access>
151784          <resetValue>0</resetValue>
151785          <resetMask>0xFFFFFFFF</resetMask>
151786          <fields>
151787            <field>
151788              <name>SRTADDR</name>
151789              <description>Start Address</description>
151790              <bitOffset>10</bitOffset>
151791              <bitWidth>22</bitWidth>
151792              <access>read-write</access>
151793            </field>
151794          </fields>
151795        </register>
151796        <register>
151797          <dim>4</dim>
151798          <dimIncrement>0x40</dimIncrement>
151799          <dimIndex>0,1,2,3</dimIndex>
151800          <name>CTX%s_RGD_W1</name>
151801          <description>AES Region Descriptor Word1</description>
151802          <addressOffset>0x11C</addressOffset>
151803          <size>32</size>
151804          <access>read-write</access>
151805          <resetValue>0x3F8</resetValue>
151806          <resetMask>0xFFFFFFFF</resetMask>
151807          <fields>
151808            <field>
151809              <name>VLD</name>
151810              <description>Valid</description>
151811              <bitOffset>0</bitOffset>
151812              <bitWidth>1</bitWidth>
151813              <access>read-write</access>
151814              <enumeratedValues>
151815                <enumeratedValue>
151816                  <name>0</name>
151817                  <description>Context is invalid.</description>
151818                  <value>#0</value>
151819                </enumeratedValue>
151820                <enumeratedValue>
151821                  <name>1</name>
151822                  <description>Context is valid.</description>
151823                  <value>#1</value>
151824                </enumeratedValue>
151825              </enumeratedValues>
151826            </field>
151827            <field>
151828              <name>ADE</name>
151829              <description>Aes Decryption Enable.</description>
151830              <bitOffset>1</bitOffset>
151831              <bitWidth>1</bitWidth>
151832              <access>read-write</access>
151833              <enumeratedValues>
151834                <enumeratedValue>
151835                  <name>0</name>
151836                  <description>Bypass the fetched data.</description>
151837                  <value>#0</value>
151838                </enumeratedValue>
151839                <enumeratedValue>
151840                  <name>1</name>
151841                  <description>Perform the CTR-AES128 mode decryption on the fetched data.</description>
151842                  <value>#1</value>
151843                </enumeratedValue>
151844              </enumeratedValues>
151845            </field>
151846            <field>
151847              <name>RO</name>
151848              <description>Read-Only</description>
151849              <bitOffset>2</bitOffset>
151850              <bitWidth>1</bitWidth>
151851              <access>read-write</access>
151852              <enumeratedValues>
151853                <enumeratedValue>
151854                  <name>0</name>
151855                  <description>The context registers can be accessed normally (as defined by SR[RRAM]).</description>
151856                  <value>#0</value>
151857                </enumeratedValue>
151858                <enumeratedValue>
151859                  <name>1</name>
151860                  <description>The context registers are read-only and accesses may be further restricted based on SR[RRAM].</description>
151861                  <value>#1</value>
151862                </enumeratedValue>
151863              </enumeratedValues>
151864            </field>
151865            <field>
151866              <name>ENDADDR</name>
151867              <description>End Address</description>
151868              <bitOffset>10</bitOffset>
151869              <bitWidth>22</bitWidth>
151870              <access>read-write</access>
151871            </field>
151872          </fields>
151873        </register>
151874      </registers>
151875    </peripheral>
151876    <peripheral>
151877      <name>FLEXIO0</name>
151878      <description>The FLEXIO Memory Map/Register Definition can be found here.</description>
151879      <prependToName>FLEXIO0_</prependToName>
151880      <baseAddress>0x400DF000</baseAddress>
151881      <addressBlock>
151882        <offset>0</offset>
151883        <size>0x7A0</size>
151884        <usage>registers</usage>
151885      </addressBlock>
151886      <interrupt>
151887        <name>FLEXIO0</name>
151888        <value>70</value>
151889      </interrupt>
151890      <registers>
151891        <register>
151892          <name>VERID</name>
151893          <description>Version ID Register</description>
151894          <addressOffset>0</addressOffset>
151895          <size>32</size>
151896          <access>read-only</access>
151897          <resetValue>0x1010001</resetValue>
151898          <resetMask>0xFFFFFFFF</resetMask>
151899          <fields>
151900            <field>
151901              <name>FEATURE</name>
151902              <description>Feature Specification Number</description>
151903              <bitOffset>0</bitOffset>
151904              <bitWidth>16</bitWidth>
151905              <access>read-only</access>
151906              <enumeratedValues>
151907                <enumeratedValue>
151908                  <name>0</name>
151909                  <description>Standard features implemented.</description>
151910                  <value>#0</value>
151911                </enumeratedValue>
151912                <enumeratedValue>
151913                  <name>1</name>
151914                  <description>Supports state, logic and parallel modes.</description>
151915                  <value>#1</value>
151916                </enumeratedValue>
151917              </enumeratedValues>
151918            </field>
151919            <field>
151920              <name>MINOR</name>
151921              <description>Minor Version Number</description>
151922              <bitOffset>16</bitOffset>
151923              <bitWidth>8</bitWidth>
151924              <access>read-only</access>
151925            </field>
151926            <field>
151927              <name>MAJOR</name>
151928              <description>Major Version Number</description>
151929              <bitOffset>24</bitOffset>
151930              <bitWidth>8</bitWidth>
151931              <access>read-only</access>
151932            </field>
151933          </fields>
151934        </register>
151935        <register>
151936          <name>PARAM</name>
151937          <description>Parameter Register</description>
151938          <addressOffset>0x4</addressOffset>
151939          <size>32</size>
151940          <access>read-only</access>
151941          <resetValue>0x10200808</resetValue>
151942          <resetMask>0xFFFFFFFF</resetMask>
151943          <fields>
151944            <field>
151945              <name>SHIFTER</name>
151946              <description>Shifter Number</description>
151947              <bitOffset>0</bitOffset>
151948              <bitWidth>8</bitWidth>
151949              <access>read-only</access>
151950            </field>
151951            <field>
151952              <name>TIMER</name>
151953              <description>Timer Number</description>
151954              <bitOffset>8</bitOffset>
151955              <bitWidth>8</bitWidth>
151956              <access>read-only</access>
151957            </field>
151958            <field>
151959              <name>PIN</name>
151960              <description>Pin Number</description>
151961              <bitOffset>16</bitOffset>
151962              <bitWidth>8</bitWidth>
151963              <access>read-only</access>
151964            </field>
151965            <field>
151966              <name>TRIGGER</name>
151967              <description>Trigger Number</description>
151968              <bitOffset>24</bitOffset>
151969              <bitWidth>8</bitWidth>
151970              <access>read-only</access>
151971            </field>
151972          </fields>
151973        </register>
151974        <register>
151975          <name>CTRL</name>
151976          <description>FlexIO Control Register</description>
151977          <addressOffset>0x8</addressOffset>
151978          <size>32</size>
151979          <access>read-write</access>
151980          <resetValue>0</resetValue>
151981          <resetMask>0xFFFFFFFF</resetMask>
151982          <fields>
151983            <field>
151984              <name>FLEXEN</name>
151985              <description>FlexIO Enable</description>
151986              <bitOffset>0</bitOffset>
151987              <bitWidth>1</bitWidth>
151988              <access>read-write</access>
151989              <enumeratedValues>
151990                <enumeratedValue>
151991                  <name>0</name>
151992                  <description>FlexIO module is disabled.</description>
151993                  <value>#0</value>
151994                </enumeratedValue>
151995                <enumeratedValue>
151996                  <name>1</name>
151997                  <description>FlexIO module is enabled.</description>
151998                  <value>#1</value>
151999                </enumeratedValue>
152000              </enumeratedValues>
152001            </field>
152002            <field>
152003              <name>SWRST</name>
152004              <description>Software Reset</description>
152005              <bitOffset>1</bitOffset>
152006              <bitWidth>1</bitWidth>
152007              <access>read-write</access>
152008              <enumeratedValues>
152009                <enumeratedValue>
152010                  <name>0</name>
152011                  <description>Software reset is disabled</description>
152012                  <value>#0</value>
152013                </enumeratedValue>
152014                <enumeratedValue>
152015                  <name>1</name>
152016                  <description>Software reset is enabled, all FlexIO registers except the Control Register are reset.</description>
152017                  <value>#1</value>
152018                </enumeratedValue>
152019              </enumeratedValues>
152020            </field>
152021            <field>
152022              <name>FASTACC</name>
152023              <description>Fast Access</description>
152024              <bitOffset>2</bitOffset>
152025              <bitWidth>1</bitWidth>
152026              <access>read-write</access>
152027              <enumeratedValues>
152028                <enumeratedValue>
152029                  <name>0</name>
152030                  <description>Configures for normal register accesses to FlexIO</description>
152031                  <value>#0</value>
152032                </enumeratedValue>
152033                <enumeratedValue>
152034                  <name>1</name>
152035                  <description>Configures for fast register accesses to FlexIO</description>
152036                  <value>#1</value>
152037                </enumeratedValue>
152038              </enumeratedValues>
152039            </field>
152040            <field>
152041              <name>DBGE</name>
152042              <description>Debug Enable</description>
152043              <bitOffset>30</bitOffset>
152044              <bitWidth>1</bitWidth>
152045              <access>read-write</access>
152046              <enumeratedValues>
152047                <enumeratedValue>
152048                  <name>0</name>
152049                  <description>FlexIO is disabled in debug modes.</description>
152050                  <value>#0</value>
152051                </enumeratedValue>
152052                <enumeratedValue>
152053                  <name>1</name>
152054                  <description>FlexIO is enabled in debug modes</description>
152055                  <value>#1</value>
152056                </enumeratedValue>
152057              </enumeratedValues>
152058            </field>
152059            <field>
152060              <name>DOZEN</name>
152061              <description>Doze Enable</description>
152062              <bitOffset>31</bitOffset>
152063              <bitWidth>1</bitWidth>
152064              <access>read-write</access>
152065              <enumeratedValues>
152066                <enumeratedValue>
152067                  <name>0</name>
152068                  <description>FlexIO enabled in Doze modes.</description>
152069                  <value>#0</value>
152070                </enumeratedValue>
152071                <enumeratedValue>
152072                  <name>1</name>
152073                  <description>FlexIO disabled in Doze modes.</description>
152074                  <value>#1</value>
152075                </enumeratedValue>
152076              </enumeratedValues>
152077            </field>
152078          </fields>
152079        </register>
152080        <register>
152081          <name>PIN</name>
152082          <description>Pin State Register</description>
152083          <addressOffset>0xC</addressOffset>
152084          <size>32</size>
152085          <access>read-only</access>
152086          <resetValue>0</resetValue>
152087          <resetMask>0xFFFFFFFF</resetMask>
152088          <fields>
152089            <field>
152090              <name>PDI</name>
152091              <description>Pin Data Input</description>
152092              <bitOffset>0</bitOffset>
152093              <bitWidth>32</bitWidth>
152094              <access>read-only</access>
152095            </field>
152096          </fields>
152097        </register>
152098        <register>
152099          <name>SHIFTSTAT</name>
152100          <description>Shifter Status Register</description>
152101          <addressOffset>0x10</addressOffset>
152102          <size>32</size>
152103          <access>read-write</access>
152104          <resetValue>0</resetValue>
152105          <resetMask>0xFFFFFFFF</resetMask>
152106          <fields>
152107            <field>
152108              <name>SSF</name>
152109              <description>Shifter Status Flag</description>
152110              <bitOffset>0</bitOffset>
152111              <bitWidth>8</bitWidth>
152112              <access>read-write</access>
152113              <enumeratedValues>
152114                <enumeratedValue>
152115                  <name>0</name>
152116                  <description>Status flag is clear</description>
152117                  <value>#0</value>
152118                </enumeratedValue>
152119                <enumeratedValue>
152120                  <name>1</name>
152121                  <description>Status flag is set</description>
152122                  <value>#1</value>
152123                </enumeratedValue>
152124              </enumeratedValues>
152125            </field>
152126          </fields>
152127        </register>
152128        <register>
152129          <name>SHIFTERR</name>
152130          <description>Shifter Error Register</description>
152131          <addressOffset>0x14</addressOffset>
152132          <size>32</size>
152133          <access>read-write</access>
152134          <resetValue>0</resetValue>
152135          <resetMask>0xFFFFFFFF</resetMask>
152136          <fields>
152137            <field>
152138              <name>SEF</name>
152139              <description>Shifter Error Flags</description>
152140              <bitOffset>0</bitOffset>
152141              <bitWidth>8</bitWidth>
152142              <access>read-write</access>
152143              <enumeratedValues>
152144                <enumeratedValue>
152145                  <name>0</name>
152146                  <description>Shifter Error Flag is clear</description>
152147                  <value>#0</value>
152148                </enumeratedValue>
152149                <enumeratedValue>
152150                  <name>1</name>
152151                  <description>Shifter Error Flag is set</description>
152152                  <value>#1</value>
152153                </enumeratedValue>
152154              </enumeratedValues>
152155            </field>
152156          </fields>
152157        </register>
152158        <register>
152159          <name>TIMSTAT</name>
152160          <description>Timer Status Register</description>
152161          <addressOffset>0x18</addressOffset>
152162          <size>32</size>
152163          <access>read-write</access>
152164          <resetValue>0</resetValue>
152165          <resetMask>0xFFFFFFFF</resetMask>
152166          <fields>
152167            <field>
152168              <name>TSF</name>
152169              <description>Timer Status Flags</description>
152170              <bitOffset>0</bitOffset>
152171              <bitWidth>8</bitWidth>
152172              <access>read-write</access>
152173              <enumeratedValues>
152174                <enumeratedValue>
152175                  <name>0</name>
152176                  <description>Timer Status Flag is clear</description>
152177                  <value>#0</value>
152178                </enumeratedValue>
152179                <enumeratedValue>
152180                  <name>1</name>
152181                  <description>Timer Status Flag is set</description>
152182                  <value>#1</value>
152183                </enumeratedValue>
152184              </enumeratedValues>
152185            </field>
152186          </fields>
152187        </register>
152188        <register>
152189          <name>SHIFTSIEN</name>
152190          <description>Shifter Status Interrupt Enable</description>
152191          <addressOffset>0x20</addressOffset>
152192          <size>32</size>
152193          <access>read-write</access>
152194          <resetValue>0</resetValue>
152195          <resetMask>0xFFFFFFFF</resetMask>
152196          <fields>
152197            <field>
152198              <name>SSIE</name>
152199              <description>Shifter Status Interrupt Enable</description>
152200              <bitOffset>0</bitOffset>
152201              <bitWidth>8</bitWidth>
152202              <access>read-write</access>
152203              <enumeratedValues>
152204                <enumeratedValue>
152205                  <name>0</name>
152206                  <description>Shifter Status Flag interrupt disabled</description>
152207                  <value>#0</value>
152208                </enumeratedValue>
152209                <enumeratedValue>
152210                  <name>1</name>
152211                  <description>Shifter Status Flag interrupt enabled</description>
152212                  <value>#1</value>
152213                </enumeratedValue>
152214              </enumeratedValues>
152215            </field>
152216          </fields>
152217        </register>
152218        <register>
152219          <name>SHIFTEIEN</name>
152220          <description>Shifter Error Interrupt Enable</description>
152221          <addressOffset>0x24</addressOffset>
152222          <size>32</size>
152223          <access>read-write</access>
152224          <resetValue>0</resetValue>
152225          <resetMask>0xFFFFFFFF</resetMask>
152226          <fields>
152227            <field>
152228              <name>SEIE</name>
152229              <description>Shifter Error Interrupt Enable</description>
152230              <bitOffset>0</bitOffset>
152231              <bitWidth>8</bitWidth>
152232              <access>read-write</access>
152233              <enumeratedValues>
152234                <enumeratedValue>
152235                  <name>0</name>
152236                  <description>Shifter Error Flag interrupt disabled</description>
152237                  <value>#0</value>
152238                </enumeratedValue>
152239                <enumeratedValue>
152240                  <name>1</name>
152241                  <description>Shifter Error Flag interrupt enabled</description>
152242                  <value>#1</value>
152243                </enumeratedValue>
152244              </enumeratedValues>
152245            </field>
152246          </fields>
152247        </register>
152248        <register>
152249          <name>TIMIEN</name>
152250          <description>Timer Interrupt Enable Register</description>
152251          <addressOffset>0x28</addressOffset>
152252          <size>32</size>
152253          <access>read-write</access>
152254          <resetValue>0</resetValue>
152255          <resetMask>0xFFFFFFFF</resetMask>
152256          <fields>
152257            <field>
152258              <name>TEIE</name>
152259              <description>Timer Status Interrupt Enable</description>
152260              <bitOffset>0</bitOffset>
152261              <bitWidth>8</bitWidth>
152262              <access>read-write</access>
152263              <enumeratedValues>
152264                <enumeratedValue>
152265                  <name>0</name>
152266                  <description>Timer Status Flag interrupt is disabled</description>
152267                  <value>#0</value>
152268                </enumeratedValue>
152269                <enumeratedValue>
152270                  <name>1</name>
152271                  <description>Timer Status Flag interrupt is enabled</description>
152272                  <value>#1</value>
152273                </enumeratedValue>
152274              </enumeratedValues>
152275            </field>
152276          </fields>
152277        </register>
152278        <register>
152279          <name>SHIFTSDEN</name>
152280          <description>Shifter Status DMA Enable</description>
152281          <addressOffset>0x30</addressOffset>
152282          <size>32</size>
152283          <access>read-write</access>
152284          <resetValue>0</resetValue>
152285          <resetMask>0xFFFFFFFF</resetMask>
152286          <fields>
152287            <field>
152288              <name>SSDE</name>
152289              <description>Shifter Status DMA Enable</description>
152290              <bitOffset>0</bitOffset>
152291              <bitWidth>8</bitWidth>
152292              <access>read-write</access>
152293              <enumeratedValues>
152294                <enumeratedValue>
152295                  <name>0</name>
152296                  <description>Shifter Status Flag DMA request is disabled</description>
152297                  <value>#0</value>
152298                </enumeratedValue>
152299                <enumeratedValue>
152300                  <name>1</name>
152301                  <description>Shifter Status Flag DMA request is enabled</description>
152302                  <value>#1</value>
152303                </enumeratedValue>
152304              </enumeratedValues>
152305            </field>
152306          </fields>
152307        </register>
152308        <register>
152309          <name>SHIFTSTATE</name>
152310          <description>Shifter State Register</description>
152311          <addressOffset>0x40</addressOffset>
152312          <size>32</size>
152313          <access>read-write</access>
152314          <resetValue>0</resetValue>
152315          <resetMask>0xFFFFFFFF</resetMask>
152316          <fields>
152317            <field>
152318              <name>STATE</name>
152319              <description>Current State Pointer</description>
152320              <bitOffset>0</bitOffset>
152321              <bitWidth>3</bitWidth>
152322              <access>read-write</access>
152323            </field>
152324          </fields>
152325        </register>
152326        <register>
152327          <dim>8</dim>
152328          <dimIncrement>0x4</dimIncrement>
152329          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
152330          <name>SHIFTCTL%s</name>
152331          <description>Shifter Control N Register</description>
152332          <addressOffset>0x80</addressOffset>
152333          <size>32</size>
152334          <access>read-write</access>
152335          <resetValue>0</resetValue>
152336          <resetMask>0xFFFFFFFF</resetMask>
152337          <fields>
152338            <field>
152339              <name>SMOD</name>
152340              <description>Shifter Mode</description>
152341              <bitOffset>0</bitOffset>
152342              <bitWidth>3</bitWidth>
152343              <access>read-write</access>
152344              <enumeratedValues>
152345                <enumeratedValue>
152346                  <name>000</name>
152347                  <description>Disabled.</description>
152348                  <value>#000</value>
152349                </enumeratedValue>
152350                <enumeratedValue>
152351                  <name>001</name>
152352                  <description>Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer.</description>
152353                  <value>#001</value>
152354                </enumeratedValue>
152355                <enumeratedValue>
152356                  <name>010</name>
152357                  <description>Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer.</description>
152358                  <value>#010</value>
152359                </enumeratedValue>
152360                <enumeratedValue>
152361                  <name>100</name>
152362                  <description>Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer.</description>
152363                  <value>#100</value>
152364                </enumeratedValue>
152365                <enumeratedValue>
152366                  <name>101</name>
152367                  <description>Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents.</description>
152368                  <value>#101</value>
152369                </enumeratedValue>
152370                <enumeratedValue>
152371                  <name>110</name>
152372                  <description>State mode. SHIFTBUF contents are used for storing programmable state attributes.</description>
152373                  <value>#110</value>
152374                </enumeratedValue>
152375                <enumeratedValue>
152376                  <name>111</name>
152377                  <description>Logic mode. SHIFTBUF contents are used for implementing programmable logic look up table.</description>
152378                  <value>#111</value>
152379                </enumeratedValue>
152380              </enumeratedValues>
152381            </field>
152382            <field>
152383              <name>PINPOL</name>
152384              <description>Shifter Pin Polarity</description>
152385              <bitOffset>7</bitOffset>
152386              <bitWidth>1</bitWidth>
152387              <access>read-write</access>
152388              <enumeratedValues>
152389                <enumeratedValue>
152390                  <name>0</name>
152391                  <description>Pin is active high</description>
152392                  <value>#0</value>
152393                </enumeratedValue>
152394                <enumeratedValue>
152395                  <name>1</name>
152396                  <description>Pin is active low</description>
152397                  <value>#1</value>
152398                </enumeratedValue>
152399              </enumeratedValues>
152400            </field>
152401            <field>
152402              <name>PINSEL</name>
152403              <description>Shifter Pin Select</description>
152404              <bitOffset>8</bitOffset>
152405              <bitWidth>5</bitWidth>
152406              <access>read-write</access>
152407            </field>
152408            <field>
152409              <name>PINCFG</name>
152410              <description>Shifter Pin Configuration</description>
152411              <bitOffset>16</bitOffset>
152412              <bitWidth>2</bitWidth>
152413              <access>read-write</access>
152414              <enumeratedValues>
152415                <enumeratedValue>
152416                  <name>00</name>
152417                  <description>Shifter pin output disabled</description>
152418                  <value>#00</value>
152419                </enumeratedValue>
152420                <enumeratedValue>
152421                  <name>01</name>
152422                  <description>Shifter pin open drain or bidirectional output enable</description>
152423                  <value>#01</value>
152424                </enumeratedValue>
152425                <enumeratedValue>
152426                  <name>10</name>
152427                  <description>Shifter pin bidirectional output data</description>
152428                  <value>#10</value>
152429                </enumeratedValue>
152430                <enumeratedValue>
152431                  <name>11</name>
152432                  <description>Shifter pin output</description>
152433                  <value>#11</value>
152434                </enumeratedValue>
152435              </enumeratedValues>
152436            </field>
152437            <field>
152438              <name>TIMPOL</name>
152439              <description>Timer Polarity</description>
152440              <bitOffset>23</bitOffset>
152441              <bitWidth>1</bitWidth>
152442              <access>read-write</access>
152443              <enumeratedValues>
152444                <enumeratedValue>
152445                  <name>0</name>
152446                  <description>Shift on posedge of Shift clock</description>
152447                  <value>#0</value>
152448                </enumeratedValue>
152449                <enumeratedValue>
152450                  <name>1</name>
152451                  <description>Shift on negedge of Shift clock</description>
152452                  <value>#1</value>
152453                </enumeratedValue>
152454              </enumeratedValues>
152455            </field>
152456            <field>
152457              <name>TIMSEL</name>
152458              <description>Timer Select</description>
152459              <bitOffset>24</bitOffset>
152460              <bitWidth>3</bitWidth>
152461              <access>read-write</access>
152462            </field>
152463          </fields>
152464        </register>
152465        <register>
152466          <dim>8</dim>
152467          <dimIncrement>0x4</dimIncrement>
152468          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
152469          <name>SHIFTCFG%s</name>
152470          <description>Shifter Configuration N Register</description>
152471          <addressOffset>0x100</addressOffset>
152472          <size>32</size>
152473          <access>read-write</access>
152474          <resetValue>0</resetValue>
152475          <resetMask>0xFFFFFFFF</resetMask>
152476          <fields>
152477            <field>
152478              <name>SSTART</name>
152479              <description>Shifter Start bit</description>
152480              <bitOffset>0</bitOffset>
152481              <bitWidth>2</bitWidth>
152482              <access>read-write</access>
152483              <enumeratedValues>
152484                <enumeratedValue>
152485                  <name>00</name>
152486                  <description>Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable</description>
152487                  <value>#00</value>
152488                </enumeratedValue>
152489                <enumeratedValue>
152490                  <name>01</name>
152491                  <description>Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift</description>
152492                  <value>#01</value>
152493                </enumeratedValue>
152494                <enumeratedValue>
152495                  <name>10</name>
152496                  <description>Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0</description>
152497                  <value>#10</value>
152498                </enumeratedValue>
152499                <enumeratedValue>
152500                  <name>11</name>
152501                  <description>Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1</description>
152502                  <value>#11</value>
152503                </enumeratedValue>
152504              </enumeratedValues>
152505            </field>
152506            <field>
152507              <name>SSTOP</name>
152508              <description>Shifter Stop bit</description>
152509              <bitOffset>4</bitOffset>
152510              <bitWidth>2</bitWidth>
152511              <access>read-write</access>
152512              <enumeratedValues>
152513                <enumeratedValue>
152514                  <name>00</name>
152515                  <description>Stop bit disabled for transmitter/receiver/match store</description>
152516                  <value>#00</value>
152517                </enumeratedValue>
152518                <enumeratedValue>
152519                  <name>01</name>
152520                  <description>Reserved for transmitter/receiver/match store</description>
152521                  <value>#01</value>
152522                </enumeratedValue>
152523                <enumeratedValue>
152524                  <name>10</name>
152525                  <description>Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0</description>
152526                  <value>#10</value>
152527                </enumeratedValue>
152528                <enumeratedValue>
152529                  <name>11</name>
152530                  <description>Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1</description>
152531                  <value>#11</value>
152532                </enumeratedValue>
152533              </enumeratedValues>
152534            </field>
152535            <field>
152536              <name>INSRC</name>
152537              <description>Input Source</description>
152538              <bitOffset>8</bitOffset>
152539              <bitWidth>1</bitWidth>
152540              <access>read-write</access>
152541              <enumeratedValues>
152542                <enumeratedValue>
152543                  <name>0</name>
152544                  <description>Pin</description>
152545                  <value>#0</value>
152546                </enumeratedValue>
152547                <enumeratedValue>
152548                  <name>1</name>
152549                  <description>Shifter N+1 Output</description>
152550                  <value>#1</value>
152551                </enumeratedValue>
152552              </enumeratedValues>
152553            </field>
152554            <field>
152555              <name>PWIDTH</name>
152556              <description>Parallel Width</description>
152557              <bitOffset>16</bitOffset>
152558              <bitWidth>5</bitWidth>
152559              <access>read-write</access>
152560            </field>
152561          </fields>
152562        </register>
152563        <register>
152564          <dim>8</dim>
152565          <dimIncrement>0x4</dimIncrement>
152566          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
152567          <name>SHIFTBUF%s</name>
152568          <description>Shifter Buffer N Register</description>
152569          <addressOffset>0x200</addressOffset>
152570          <size>32</size>
152571          <access>read-write</access>
152572          <resetValue>0</resetValue>
152573          <resetMask>0xFFFFFFFF</resetMask>
152574          <fields>
152575            <field>
152576              <name>SHIFTBUF</name>
152577              <description>Shift Buffer</description>
152578              <bitOffset>0</bitOffset>
152579              <bitWidth>32</bitWidth>
152580              <access>read-write</access>
152581            </field>
152582          </fields>
152583        </register>
152584        <register>
152585          <dim>8</dim>
152586          <dimIncrement>0x4</dimIncrement>
152587          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
152588          <name>SHIFTBUFBIS%s</name>
152589          <description>Shifter Buffer N Bit Swapped Register</description>
152590          <addressOffset>0x280</addressOffset>
152591          <size>32</size>
152592          <access>read-write</access>
152593          <resetValue>0</resetValue>
152594          <resetMask>0xFFFFFFFF</resetMask>
152595          <fields>
152596            <field>
152597              <name>SHIFTBUFBIS</name>
152598              <description>Shift Buffer</description>
152599              <bitOffset>0</bitOffset>
152600              <bitWidth>32</bitWidth>
152601              <access>read-write</access>
152602            </field>
152603          </fields>
152604        </register>
152605        <register>
152606          <dim>8</dim>
152607          <dimIncrement>0x4</dimIncrement>
152608          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
152609          <name>SHIFTBUFBYS%s</name>
152610          <description>Shifter Buffer N Byte Swapped Register</description>
152611          <addressOffset>0x300</addressOffset>
152612          <size>32</size>
152613          <access>read-write</access>
152614          <resetValue>0</resetValue>
152615          <resetMask>0xFFFFFFFF</resetMask>
152616          <fields>
152617            <field>
152618              <name>SHIFTBUFBYS</name>
152619              <description>Shift Buffer</description>
152620              <bitOffset>0</bitOffset>
152621              <bitWidth>32</bitWidth>
152622              <access>read-write</access>
152623            </field>
152624          </fields>
152625        </register>
152626        <register>
152627          <dim>8</dim>
152628          <dimIncrement>0x4</dimIncrement>
152629          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
152630          <name>SHIFTBUFBBS%s</name>
152631          <description>Shifter Buffer N Bit Byte Swapped Register</description>
152632          <addressOffset>0x380</addressOffset>
152633          <size>32</size>
152634          <access>read-write</access>
152635          <resetValue>0</resetValue>
152636          <resetMask>0xFFFFFFFF</resetMask>
152637          <fields>
152638            <field>
152639              <name>SHIFTBUFBBS</name>
152640              <description>Shift Buffer</description>
152641              <bitOffset>0</bitOffset>
152642              <bitWidth>32</bitWidth>
152643              <access>read-write</access>
152644            </field>
152645          </fields>
152646        </register>
152647        <register>
152648          <dim>8</dim>
152649          <dimIncrement>0x4</dimIncrement>
152650          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
152651          <name>TIMCTL%s</name>
152652          <description>Timer Control N Register</description>
152653          <addressOffset>0x400</addressOffset>
152654          <size>32</size>
152655          <access>read-write</access>
152656          <resetValue>0</resetValue>
152657          <resetMask>0xFFFFFFFF</resetMask>
152658          <fields>
152659            <field>
152660              <name>TIMOD</name>
152661              <description>Timer Mode</description>
152662              <bitOffset>0</bitOffset>
152663              <bitWidth>2</bitWidth>
152664              <access>read-write</access>
152665              <enumeratedValues>
152666                <enumeratedValue>
152667                  <name>00</name>
152668                  <description>Timer Disabled.</description>
152669                  <value>#00</value>
152670                </enumeratedValue>
152671                <enumeratedValue>
152672                  <name>01</name>
152673                  <description>Dual 8-bit counters baud/bit mode.</description>
152674                  <value>#01</value>
152675                </enumeratedValue>
152676                <enumeratedValue>
152677                  <name>10</name>
152678                  <description>Dual 8-bit counters PWM mode.</description>
152679                  <value>#10</value>
152680                </enumeratedValue>
152681                <enumeratedValue>
152682                  <name>11</name>
152683                  <description>Single 16-bit counter mode.</description>
152684                  <value>#11</value>
152685                </enumeratedValue>
152686              </enumeratedValues>
152687            </field>
152688            <field>
152689              <name>PINPOL</name>
152690              <description>Timer Pin Polarity</description>
152691              <bitOffset>7</bitOffset>
152692              <bitWidth>1</bitWidth>
152693              <access>read-write</access>
152694              <enumeratedValues>
152695                <enumeratedValue>
152696                  <name>0</name>
152697                  <description>Pin is active high</description>
152698                  <value>#0</value>
152699                </enumeratedValue>
152700                <enumeratedValue>
152701                  <name>1</name>
152702                  <description>Pin is active low</description>
152703                  <value>#1</value>
152704                </enumeratedValue>
152705              </enumeratedValues>
152706            </field>
152707            <field>
152708              <name>PINSEL</name>
152709              <description>Timer Pin Select</description>
152710              <bitOffset>8</bitOffset>
152711              <bitWidth>5</bitWidth>
152712              <access>read-write</access>
152713            </field>
152714            <field>
152715              <name>PINCFG</name>
152716              <description>Timer Pin Configuration</description>
152717              <bitOffset>16</bitOffset>
152718              <bitWidth>2</bitWidth>
152719              <access>read-write</access>
152720              <enumeratedValues>
152721                <enumeratedValue>
152722                  <name>00</name>
152723                  <description>Timer pin output disabled</description>
152724                  <value>#00</value>
152725                </enumeratedValue>
152726                <enumeratedValue>
152727                  <name>01</name>
152728                  <description>Timer pin open drain or bidirectional output enable</description>
152729                  <value>#01</value>
152730                </enumeratedValue>
152731                <enumeratedValue>
152732                  <name>10</name>
152733                  <description>Timer pin bidirectional output data</description>
152734                  <value>#10</value>
152735                </enumeratedValue>
152736                <enumeratedValue>
152737                  <name>11</name>
152738                  <description>Timer pin output</description>
152739                  <value>#11</value>
152740                </enumeratedValue>
152741              </enumeratedValues>
152742            </field>
152743            <field>
152744              <name>TRGSRC</name>
152745              <description>Trigger Source</description>
152746              <bitOffset>22</bitOffset>
152747              <bitWidth>1</bitWidth>
152748              <access>read-write</access>
152749              <enumeratedValues>
152750                <enumeratedValue>
152751                  <name>0</name>
152752                  <description>External trigger selected</description>
152753                  <value>#0</value>
152754                </enumeratedValue>
152755                <enumeratedValue>
152756                  <name>1</name>
152757                  <description>Internal trigger selected</description>
152758                  <value>#1</value>
152759                </enumeratedValue>
152760              </enumeratedValues>
152761            </field>
152762            <field>
152763              <name>TRGPOL</name>
152764              <description>Trigger Polarity</description>
152765              <bitOffset>23</bitOffset>
152766              <bitWidth>1</bitWidth>
152767              <access>read-write</access>
152768              <enumeratedValues>
152769                <enumeratedValue>
152770                  <name>0</name>
152771                  <description>Trigger active high</description>
152772                  <value>#0</value>
152773                </enumeratedValue>
152774                <enumeratedValue>
152775                  <name>1</name>
152776                  <description>Trigger active low</description>
152777                  <value>#1</value>
152778                </enumeratedValue>
152779              </enumeratedValues>
152780            </field>
152781            <field>
152782              <name>TRGSEL</name>
152783              <description>Trigger Select</description>
152784              <bitOffset>24</bitOffset>
152785              <bitWidth>6</bitWidth>
152786              <access>read-write</access>
152787            </field>
152788          </fields>
152789        </register>
152790        <register>
152791          <dim>8</dim>
152792          <dimIncrement>0x4</dimIncrement>
152793          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
152794          <name>TIMCFG%s</name>
152795          <description>Timer Configuration N Register</description>
152796          <addressOffset>0x480</addressOffset>
152797          <size>32</size>
152798          <access>read-write</access>
152799          <resetValue>0</resetValue>
152800          <resetMask>0xFFFFFFFF</resetMask>
152801          <fields>
152802            <field>
152803              <name>TSTART</name>
152804              <description>Timer Start Bit</description>
152805              <bitOffset>1</bitOffset>
152806              <bitWidth>1</bitWidth>
152807              <access>read-write</access>
152808              <enumeratedValues>
152809                <enumeratedValue>
152810                  <name>0</name>
152811                  <description>Start bit disabled</description>
152812                  <value>#0</value>
152813                </enumeratedValue>
152814                <enumeratedValue>
152815                  <name>1</name>
152816                  <description>Start bit enabled</description>
152817                  <value>#1</value>
152818                </enumeratedValue>
152819              </enumeratedValues>
152820            </field>
152821            <field>
152822              <name>TSTOP</name>
152823              <description>Timer Stop Bit</description>
152824              <bitOffset>4</bitOffset>
152825              <bitWidth>2</bitWidth>
152826              <access>read-write</access>
152827              <enumeratedValues>
152828                <enumeratedValue>
152829                  <name>00</name>
152830                  <description>Stop bit disabled</description>
152831                  <value>#00</value>
152832                </enumeratedValue>
152833                <enumeratedValue>
152834                  <name>01</name>
152835                  <description>Stop bit is enabled on timer compare</description>
152836                  <value>#01</value>
152837                </enumeratedValue>
152838                <enumeratedValue>
152839                  <name>10</name>
152840                  <description>Stop bit is enabled on timer disable</description>
152841                  <value>#10</value>
152842                </enumeratedValue>
152843                <enumeratedValue>
152844                  <name>11</name>
152845                  <description>Stop bit is enabled on timer compare and timer disable</description>
152846                  <value>#11</value>
152847                </enumeratedValue>
152848              </enumeratedValues>
152849            </field>
152850            <field>
152851              <name>TIMENA</name>
152852              <description>Timer Enable</description>
152853              <bitOffset>8</bitOffset>
152854              <bitWidth>3</bitWidth>
152855              <access>read-write</access>
152856              <enumeratedValues>
152857                <enumeratedValue>
152858                  <name>000</name>
152859                  <description>Timer always enabled</description>
152860                  <value>#000</value>
152861                </enumeratedValue>
152862                <enumeratedValue>
152863                  <name>001</name>
152864                  <description>Timer enabled on Timer N-1 enable</description>
152865                  <value>#001</value>
152866                </enumeratedValue>
152867                <enumeratedValue>
152868                  <name>010</name>
152869                  <description>Timer enabled on Trigger high</description>
152870                  <value>#010</value>
152871                </enumeratedValue>
152872                <enumeratedValue>
152873                  <name>011</name>
152874                  <description>Timer enabled on Trigger high and Pin high</description>
152875                  <value>#011</value>
152876                </enumeratedValue>
152877                <enumeratedValue>
152878                  <name>100</name>
152879                  <description>Timer enabled on Pin rising edge</description>
152880                  <value>#100</value>
152881                </enumeratedValue>
152882                <enumeratedValue>
152883                  <name>101</name>
152884                  <description>Timer enabled on Pin rising edge and Trigger high</description>
152885                  <value>#101</value>
152886                </enumeratedValue>
152887                <enumeratedValue>
152888                  <name>110</name>
152889                  <description>Timer enabled on Trigger rising edge</description>
152890                  <value>#110</value>
152891                </enumeratedValue>
152892                <enumeratedValue>
152893                  <name>111</name>
152894                  <description>Timer enabled on Trigger rising or falling edge</description>
152895                  <value>#111</value>
152896                </enumeratedValue>
152897              </enumeratedValues>
152898            </field>
152899            <field>
152900              <name>TIMDIS</name>
152901              <description>Timer Disable</description>
152902              <bitOffset>12</bitOffset>
152903              <bitWidth>3</bitWidth>
152904              <access>read-write</access>
152905              <enumeratedValues>
152906                <enumeratedValue>
152907                  <name>000</name>
152908                  <description>Timer never disabled</description>
152909                  <value>#000</value>
152910                </enumeratedValue>
152911                <enumeratedValue>
152912                  <name>001</name>
152913                  <description>Timer disabled on Timer N-1 disable</description>
152914                  <value>#001</value>
152915                </enumeratedValue>
152916                <enumeratedValue>
152917                  <name>010</name>
152918                  <description>Timer disabled on Timer compare</description>
152919                  <value>#010</value>
152920                </enumeratedValue>
152921                <enumeratedValue>
152922                  <name>011</name>
152923                  <description>Timer disabled on Timer compare and Trigger Low</description>
152924                  <value>#011</value>
152925                </enumeratedValue>
152926                <enumeratedValue>
152927                  <name>100</name>
152928                  <description>Timer disabled on Pin rising or falling edge</description>
152929                  <value>#100</value>
152930                </enumeratedValue>
152931                <enumeratedValue>
152932                  <name>101</name>
152933                  <description>Timer disabled on Pin rising or falling edge provided Trigger is high</description>
152934                  <value>#101</value>
152935                </enumeratedValue>
152936                <enumeratedValue>
152937                  <name>110</name>
152938                  <description>Timer disabled on Trigger falling edge</description>
152939                  <value>#110</value>
152940                </enumeratedValue>
152941              </enumeratedValues>
152942            </field>
152943            <field>
152944              <name>TIMRST</name>
152945              <description>Timer Reset</description>
152946              <bitOffset>16</bitOffset>
152947              <bitWidth>3</bitWidth>
152948              <access>read-write</access>
152949              <enumeratedValues>
152950                <enumeratedValue>
152951                  <name>000</name>
152952                  <description>Timer never reset</description>
152953                  <value>#000</value>
152954                </enumeratedValue>
152955                <enumeratedValue>
152956                  <name>010</name>
152957                  <description>Timer reset on Timer Pin equal to Timer Output</description>
152958                  <value>#010</value>
152959                </enumeratedValue>
152960                <enumeratedValue>
152961                  <name>011</name>
152962                  <description>Timer reset on Timer Trigger equal to Timer Output</description>
152963                  <value>#011</value>
152964                </enumeratedValue>
152965                <enumeratedValue>
152966                  <name>100</name>
152967                  <description>Timer reset on Timer Pin rising edge</description>
152968                  <value>#100</value>
152969                </enumeratedValue>
152970                <enumeratedValue>
152971                  <name>110</name>
152972                  <description>Timer reset on Trigger rising edge</description>
152973                  <value>#110</value>
152974                </enumeratedValue>
152975                <enumeratedValue>
152976                  <name>111</name>
152977                  <description>Timer reset on Trigger rising or falling edge</description>
152978                  <value>#111</value>
152979                </enumeratedValue>
152980              </enumeratedValues>
152981            </field>
152982            <field>
152983              <name>TIMDEC</name>
152984              <description>Timer Decrement</description>
152985              <bitOffset>20</bitOffset>
152986              <bitWidth>2</bitWidth>
152987              <access>read-write</access>
152988              <enumeratedValues>
152989                <enumeratedValue>
152990                  <name>00</name>
152991                  <description>Decrement counter on FlexIO clock, Shift clock equals Timer output.</description>
152992                  <value>#00</value>
152993                </enumeratedValue>
152994                <enumeratedValue>
152995                  <name>01</name>
152996                  <description>Decrement counter on Trigger input (both edges), Shift clock equals Timer output.</description>
152997                  <value>#01</value>
152998                </enumeratedValue>
152999                <enumeratedValue>
153000                  <name>10</name>
153001                  <description>Decrement counter on Pin input (both edges), Shift clock equals Pin input.</description>
153002                  <value>#10</value>
153003                </enumeratedValue>
153004                <enumeratedValue>
153005                  <name>11</name>
153006                  <description>Decrement counter on Trigger input (both edges), Shift clock equals Trigger input.</description>
153007                  <value>#11</value>
153008                </enumeratedValue>
153009              </enumeratedValues>
153010            </field>
153011            <field>
153012              <name>TIMOUT</name>
153013              <description>Timer Output</description>
153014              <bitOffset>24</bitOffset>
153015              <bitWidth>2</bitWidth>
153016              <access>read-write</access>
153017              <enumeratedValues>
153018                <enumeratedValue>
153019                  <name>00</name>
153020                  <description>Timer output is logic one when enabled and is not affected by timer reset</description>
153021                  <value>#00</value>
153022                </enumeratedValue>
153023                <enumeratedValue>
153024                  <name>01</name>
153025                  <description>Timer output is logic zero when enabled and is not affected by timer reset</description>
153026                  <value>#01</value>
153027                </enumeratedValue>
153028                <enumeratedValue>
153029                  <name>10</name>
153030                  <description>Timer output is logic one when enabled and on timer reset</description>
153031                  <value>#10</value>
153032                </enumeratedValue>
153033                <enumeratedValue>
153034                  <name>11</name>
153035                  <description>Timer output is logic zero when enabled and on timer reset</description>
153036                  <value>#11</value>
153037                </enumeratedValue>
153038              </enumeratedValues>
153039            </field>
153040          </fields>
153041        </register>
153042        <register>
153043          <dim>8</dim>
153044          <dimIncrement>0x4</dimIncrement>
153045          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
153046          <name>TIMCMP%s</name>
153047          <description>Timer Compare N Register</description>
153048          <addressOffset>0x500</addressOffset>
153049          <size>32</size>
153050          <access>read-write</access>
153051          <resetValue>0</resetValue>
153052          <resetMask>0xFFFFFFFF</resetMask>
153053          <fields>
153054            <field>
153055              <name>CMP</name>
153056              <description>Timer Compare Value</description>
153057              <bitOffset>0</bitOffset>
153058              <bitWidth>16</bitWidth>
153059              <access>read-write</access>
153060            </field>
153061          </fields>
153062        </register>
153063        <register>
153064          <dim>8</dim>
153065          <dimIncrement>0x4</dimIncrement>
153066          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
153067          <name>SHIFTBUFNBS%s</name>
153068          <description>Shifter Buffer N Nibble Byte Swapped Register</description>
153069          <addressOffset>0x680</addressOffset>
153070          <size>32</size>
153071          <access>read-write</access>
153072          <resetValue>0</resetValue>
153073          <resetMask>0xFFFFFFFF</resetMask>
153074          <fields>
153075            <field>
153076              <name>SHIFTBUFNBS</name>
153077              <description>Shift Buffer</description>
153078              <bitOffset>0</bitOffset>
153079              <bitWidth>32</bitWidth>
153080              <access>read-write</access>
153081            </field>
153082          </fields>
153083        </register>
153084        <register>
153085          <dim>8</dim>
153086          <dimIncrement>0x4</dimIncrement>
153087          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
153088          <name>SHIFTBUFHWS%s</name>
153089          <description>Shifter Buffer N Half Word Swapped Register</description>
153090          <addressOffset>0x700</addressOffset>
153091          <size>32</size>
153092          <access>read-write</access>
153093          <resetValue>0</resetValue>
153094          <resetMask>0xFFFFFFFF</resetMask>
153095          <fields>
153096            <field>
153097              <name>SHIFTBUFHWS</name>
153098              <description>Shift Buffer</description>
153099              <bitOffset>0</bitOffset>
153100              <bitWidth>32</bitWidth>
153101              <access>read-write</access>
153102            </field>
153103          </fields>
153104        </register>
153105        <register>
153106          <dim>8</dim>
153107          <dimIncrement>0x4</dimIncrement>
153108          <dimIndex>0,1,2,3,4,5,6,7</dimIndex>
153109          <name>SHIFTBUFNIS%s</name>
153110          <description>Shifter Buffer N Nibble Swapped Register</description>
153111          <addressOffset>0x780</addressOffset>
153112          <size>32</size>
153113          <access>read-write</access>
153114          <resetValue>0</resetValue>
153115          <resetMask>0xFFFFFFFF</resetMask>
153116          <fields>
153117            <field>
153118              <name>SHIFTBUFNIS</name>
153119              <description>Shift Buffer</description>
153120              <bitOffset>0</bitOffset>
153121              <bitWidth>32</bitWidth>
153122              <access>read-write</access>
153123            </field>
153124          </fields>
153125        </register>
153126      </registers>
153127    </peripheral>
153128    <peripheral>
153129      <name>GPIOA</name>
153130      <description>General Purpose Input/Output</description>
153131      <groupName>GPIO</groupName>
153132      <prependToName>GPIOA_</prependToName>
153133      <baseAddress>0x400FF000</baseAddress>
153134      <addressBlock>
153135        <offset>0</offset>
153136        <size>0x18</size>
153137        <usage>registers</usage>
153138      </addressBlock>
153139      <interrupt>
153140        <name>PORTA</name>
153141        <value>59</value>
153142      </interrupt>
153143      <registers>
153144        <register>
153145          <name>PDOR</name>
153146          <description>Port Data Output Register</description>
153147          <addressOffset>0</addressOffset>
153148          <size>32</size>
153149          <access>read-write</access>
153150          <resetValue>0</resetValue>
153151          <resetMask>0xFFFFFFFF</resetMask>
153152          <fields>
153153            <field>
153154              <name>PDO0</name>
153155              <description>Port Data Output</description>
153156              <bitOffset>0</bitOffset>
153157              <bitWidth>1</bitWidth>
153158              <access>read-write</access>
153159              <enumeratedValues>
153160                <enumeratedValue>
153161                  <name>0</name>
153162                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153163                  <value>#0</value>
153164                </enumeratedValue>
153165                <enumeratedValue>
153166                  <name>1</name>
153167                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153168                  <value>#1</value>
153169                </enumeratedValue>
153170              </enumeratedValues>
153171            </field>
153172            <field>
153173              <name>PDO1</name>
153174              <description>Port Data Output</description>
153175              <bitOffset>1</bitOffset>
153176              <bitWidth>1</bitWidth>
153177              <access>read-write</access>
153178              <enumeratedValues>
153179                <enumeratedValue>
153180                  <name>0</name>
153181                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153182                  <value>#0</value>
153183                </enumeratedValue>
153184                <enumeratedValue>
153185                  <name>1</name>
153186                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153187                  <value>#1</value>
153188                </enumeratedValue>
153189              </enumeratedValues>
153190            </field>
153191            <field>
153192              <name>PDO2</name>
153193              <description>Port Data Output</description>
153194              <bitOffset>2</bitOffset>
153195              <bitWidth>1</bitWidth>
153196              <access>read-write</access>
153197              <enumeratedValues>
153198                <enumeratedValue>
153199                  <name>0</name>
153200                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153201                  <value>#0</value>
153202                </enumeratedValue>
153203                <enumeratedValue>
153204                  <name>1</name>
153205                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153206                  <value>#1</value>
153207                </enumeratedValue>
153208              </enumeratedValues>
153209            </field>
153210            <field>
153211              <name>PDO3</name>
153212              <description>Port Data Output</description>
153213              <bitOffset>3</bitOffset>
153214              <bitWidth>1</bitWidth>
153215              <access>read-write</access>
153216              <enumeratedValues>
153217                <enumeratedValue>
153218                  <name>0</name>
153219                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153220                  <value>#0</value>
153221                </enumeratedValue>
153222                <enumeratedValue>
153223                  <name>1</name>
153224                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153225                  <value>#1</value>
153226                </enumeratedValue>
153227              </enumeratedValues>
153228            </field>
153229            <field>
153230              <name>PDO4</name>
153231              <description>Port Data Output</description>
153232              <bitOffset>4</bitOffset>
153233              <bitWidth>1</bitWidth>
153234              <access>read-write</access>
153235              <enumeratedValues>
153236                <enumeratedValue>
153237                  <name>0</name>
153238                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153239                  <value>#0</value>
153240                </enumeratedValue>
153241                <enumeratedValue>
153242                  <name>1</name>
153243                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153244                  <value>#1</value>
153245                </enumeratedValue>
153246              </enumeratedValues>
153247            </field>
153248            <field>
153249              <name>PDO5</name>
153250              <description>Port Data Output</description>
153251              <bitOffset>5</bitOffset>
153252              <bitWidth>1</bitWidth>
153253              <access>read-write</access>
153254              <enumeratedValues>
153255                <enumeratedValue>
153256                  <name>0</name>
153257                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153258                  <value>#0</value>
153259                </enumeratedValue>
153260                <enumeratedValue>
153261                  <name>1</name>
153262                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153263                  <value>#1</value>
153264                </enumeratedValue>
153265              </enumeratedValues>
153266            </field>
153267            <field>
153268              <name>PDO6</name>
153269              <description>Port Data Output</description>
153270              <bitOffset>6</bitOffset>
153271              <bitWidth>1</bitWidth>
153272              <access>read-write</access>
153273              <enumeratedValues>
153274                <enumeratedValue>
153275                  <name>0</name>
153276                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153277                  <value>#0</value>
153278                </enumeratedValue>
153279                <enumeratedValue>
153280                  <name>1</name>
153281                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153282                  <value>#1</value>
153283                </enumeratedValue>
153284              </enumeratedValues>
153285            </field>
153286            <field>
153287              <name>PDO7</name>
153288              <description>Port Data Output</description>
153289              <bitOffset>7</bitOffset>
153290              <bitWidth>1</bitWidth>
153291              <access>read-write</access>
153292              <enumeratedValues>
153293                <enumeratedValue>
153294                  <name>0</name>
153295                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153296                  <value>#0</value>
153297                </enumeratedValue>
153298                <enumeratedValue>
153299                  <name>1</name>
153300                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153301                  <value>#1</value>
153302                </enumeratedValue>
153303              </enumeratedValues>
153304            </field>
153305            <field>
153306              <name>PDO8</name>
153307              <description>Port Data Output</description>
153308              <bitOffset>8</bitOffset>
153309              <bitWidth>1</bitWidth>
153310              <access>read-write</access>
153311              <enumeratedValues>
153312                <enumeratedValue>
153313                  <name>0</name>
153314                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153315                  <value>#0</value>
153316                </enumeratedValue>
153317                <enumeratedValue>
153318                  <name>1</name>
153319                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153320                  <value>#1</value>
153321                </enumeratedValue>
153322              </enumeratedValues>
153323            </field>
153324            <field>
153325              <name>PDO9</name>
153326              <description>Port Data Output</description>
153327              <bitOffset>9</bitOffset>
153328              <bitWidth>1</bitWidth>
153329              <access>read-write</access>
153330              <enumeratedValues>
153331                <enumeratedValue>
153332                  <name>0</name>
153333                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153334                  <value>#0</value>
153335                </enumeratedValue>
153336                <enumeratedValue>
153337                  <name>1</name>
153338                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153339                  <value>#1</value>
153340                </enumeratedValue>
153341              </enumeratedValues>
153342            </field>
153343            <field>
153344              <name>PDO10</name>
153345              <description>Port Data Output</description>
153346              <bitOffset>10</bitOffset>
153347              <bitWidth>1</bitWidth>
153348              <access>read-write</access>
153349              <enumeratedValues>
153350                <enumeratedValue>
153351                  <name>0</name>
153352                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153353                  <value>#0</value>
153354                </enumeratedValue>
153355                <enumeratedValue>
153356                  <name>1</name>
153357                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153358                  <value>#1</value>
153359                </enumeratedValue>
153360              </enumeratedValues>
153361            </field>
153362            <field>
153363              <name>PDO11</name>
153364              <description>Port Data Output</description>
153365              <bitOffset>11</bitOffset>
153366              <bitWidth>1</bitWidth>
153367              <access>read-write</access>
153368              <enumeratedValues>
153369                <enumeratedValue>
153370                  <name>0</name>
153371                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153372                  <value>#0</value>
153373                </enumeratedValue>
153374                <enumeratedValue>
153375                  <name>1</name>
153376                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153377                  <value>#1</value>
153378                </enumeratedValue>
153379              </enumeratedValues>
153380            </field>
153381            <field>
153382              <name>PDO12</name>
153383              <description>Port Data Output</description>
153384              <bitOffset>12</bitOffset>
153385              <bitWidth>1</bitWidth>
153386              <access>read-write</access>
153387              <enumeratedValues>
153388                <enumeratedValue>
153389                  <name>0</name>
153390                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153391                  <value>#0</value>
153392                </enumeratedValue>
153393                <enumeratedValue>
153394                  <name>1</name>
153395                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153396                  <value>#1</value>
153397                </enumeratedValue>
153398              </enumeratedValues>
153399            </field>
153400            <field>
153401              <name>PDO13</name>
153402              <description>Port Data Output</description>
153403              <bitOffset>13</bitOffset>
153404              <bitWidth>1</bitWidth>
153405              <access>read-write</access>
153406              <enumeratedValues>
153407                <enumeratedValue>
153408                  <name>0</name>
153409                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153410                  <value>#0</value>
153411                </enumeratedValue>
153412                <enumeratedValue>
153413                  <name>1</name>
153414                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153415                  <value>#1</value>
153416                </enumeratedValue>
153417              </enumeratedValues>
153418            </field>
153419            <field>
153420              <name>PDO14</name>
153421              <description>Port Data Output</description>
153422              <bitOffset>14</bitOffset>
153423              <bitWidth>1</bitWidth>
153424              <access>read-write</access>
153425              <enumeratedValues>
153426                <enumeratedValue>
153427                  <name>0</name>
153428                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153429                  <value>#0</value>
153430                </enumeratedValue>
153431                <enumeratedValue>
153432                  <name>1</name>
153433                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153434                  <value>#1</value>
153435                </enumeratedValue>
153436              </enumeratedValues>
153437            </field>
153438            <field>
153439              <name>PDO15</name>
153440              <description>Port Data Output</description>
153441              <bitOffset>15</bitOffset>
153442              <bitWidth>1</bitWidth>
153443              <access>read-write</access>
153444              <enumeratedValues>
153445                <enumeratedValue>
153446                  <name>0</name>
153447                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153448                  <value>#0</value>
153449                </enumeratedValue>
153450                <enumeratedValue>
153451                  <name>1</name>
153452                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153453                  <value>#1</value>
153454                </enumeratedValue>
153455              </enumeratedValues>
153456            </field>
153457            <field>
153458              <name>PDO16</name>
153459              <description>Port Data Output</description>
153460              <bitOffset>16</bitOffset>
153461              <bitWidth>1</bitWidth>
153462              <access>read-write</access>
153463              <enumeratedValues>
153464                <enumeratedValue>
153465                  <name>0</name>
153466                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153467                  <value>#0</value>
153468                </enumeratedValue>
153469                <enumeratedValue>
153470                  <name>1</name>
153471                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153472                  <value>#1</value>
153473                </enumeratedValue>
153474              </enumeratedValues>
153475            </field>
153476            <field>
153477              <name>PDO17</name>
153478              <description>Port Data Output</description>
153479              <bitOffset>17</bitOffset>
153480              <bitWidth>1</bitWidth>
153481              <access>read-write</access>
153482              <enumeratedValues>
153483                <enumeratedValue>
153484                  <name>0</name>
153485                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153486                  <value>#0</value>
153487                </enumeratedValue>
153488                <enumeratedValue>
153489                  <name>1</name>
153490                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153491                  <value>#1</value>
153492                </enumeratedValue>
153493              </enumeratedValues>
153494            </field>
153495            <field>
153496              <name>PDO18</name>
153497              <description>Port Data Output</description>
153498              <bitOffset>18</bitOffset>
153499              <bitWidth>1</bitWidth>
153500              <access>read-write</access>
153501              <enumeratedValues>
153502                <enumeratedValue>
153503                  <name>0</name>
153504                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153505                  <value>#0</value>
153506                </enumeratedValue>
153507                <enumeratedValue>
153508                  <name>1</name>
153509                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153510                  <value>#1</value>
153511                </enumeratedValue>
153512              </enumeratedValues>
153513            </field>
153514            <field>
153515              <name>PDO19</name>
153516              <description>Port Data Output</description>
153517              <bitOffset>19</bitOffset>
153518              <bitWidth>1</bitWidth>
153519              <access>read-write</access>
153520              <enumeratedValues>
153521                <enumeratedValue>
153522                  <name>0</name>
153523                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153524                  <value>#0</value>
153525                </enumeratedValue>
153526                <enumeratedValue>
153527                  <name>1</name>
153528                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153529                  <value>#1</value>
153530                </enumeratedValue>
153531              </enumeratedValues>
153532            </field>
153533            <field>
153534              <name>PDO20</name>
153535              <description>Port Data Output</description>
153536              <bitOffset>20</bitOffset>
153537              <bitWidth>1</bitWidth>
153538              <access>read-write</access>
153539              <enumeratedValues>
153540                <enumeratedValue>
153541                  <name>0</name>
153542                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153543                  <value>#0</value>
153544                </enumeratedValue>
153545                <enumeratedValue>
153546                  <name>1</name>
153547                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153548                  <value>#1</value>
153549                </enumeratedValue>
153550              </enumeratedValues>
153551            </field>
153552            <field>
153553              <name>PDO21</name>
153554              <description>Port Data Output</description>
153555              <bitOffset>21</bitOffset>
153556              <bitWidth>1</bitWidth>
153557              <access>read-write</access>
153558              <enumeratedValues>
153559                <enumeratedValue>
153560                  <name>0</name>
153561                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153562                  <value>#0</value>
153563                </enumeratedValue>
153564                <enumeratedValue>
153565                  <name>1</name>
153566                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153567                  <value>#1</value>
153568                </enumeratedValue>
153569              </enumeratedValues>
153570            </field>
153571            <field>
153572              <name>PDO22</name>
153573              <description>Port Data Output</description>
153574              <bitOffset>22</bitOffset>
153575              <bitWidth>1</bitWidth>
153576              <access>read-write</access>
153577              <enumeratedValues>
153578                <enumeratedValue>
153579                  <name>0</name>
153580                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153581                  <value>#0</value>
153582                </enumeratedValue>
153583                <enumeratedValue>
153584                  <name>1</name>
153585                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153586                  <value>#1</value>
153587                </enumeratedValue>
153588              </enumeratedValues>
153589            </field>
153590            <field>
153591              <name>PDO23</name>
153592              <description>Port Data Output</description>
153593              <bitOffset>23</bitOffset>
153594              <bitWidth>1</bitWidth>
153595              <access>read-write</access>
153596              <enumeratedValues>
153597                <enumeratedValue>
153598                  <name>0</name>
153599                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153600                  <value>#0</value>
153601                </enumeratedValue>
153602                <enumeratedValue>
153603                  <name>1</name>
153604                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153605                  <value>#1</value>
153606                </enumeratedValue>
153607              </enumeratedValues>
153608            </field>
153609            <field>
153610              <name>PDO24</name>
153611              <description>Port Data Output</description>
153612              <bitOffset>24</bitOffset>
153613              <bitWidth>1</bitWidth>
153614              <access>read-write</access>
153615              <enumeratedValues>
153616                <enumeratedValue>
153617                  <name>0</name>
153618                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153619                  <value>#0</value>
153620                </enumeratedValue>
153621                <enumeratedValue>
153622                  <name>1</name>
153623                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153624                  <value>#1</value>
153625                </enumeratedValue>
153626              </enumeratedValues>
153627            </field>
153628            <field>
153629              <name>PDO25</name>
153630              <description>Port Data Output</description>
153631              <bitOffset>25</bitOffset>
153632              <bitWidth>1</bitWidth>
153633              <access>read-write</access>
153634              <enumeratedValues>
153635                <enumeratedValue>
153636                  <name>0</name>
153637                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153638                  <value>#0</value>
153639                </enumeratedValue>
153640                <enumeratedValue>
153641                  <name>1</name>
153642                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153643                  <value>#1</value>
153644                </enumeratedValue>
153645              </enumeratedValues>
153646            </field>
153647            <field>
153648              <name>PDO26</name>
153649              <description>Port Data Output</description>
153650              <bitOffset>26</bitOffset>
153651              <bitWidth>1</bitWidth>
153652              <access>read-write</access>
153653              <enumeratedValues>
153654                <enumeratedValue>
153655                  <name>0</name>
153656                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153657                  <value>#0</value>
153658                </enumeratedValue>
153659                <enumeratedValue>
153660                  <name>1</name>
153661                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153662                  <value>#1</value>
153663                </enumeratedValue>
153664              </enumeratedValues>
153665            </field>
153666            <field>
153667              <name>PDO27</name>
153668              <description>Port Data Output</description>
153669              <bitOffset>27</bitOffset>
153670              <bitWidth>1</bitWidth>
153671              <access>read-write</access>
153672              <enumeratedValues>
153673                <enumeratedValue>
153674                  <name>0</name>
153675                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153676                  <value>#0</value>
153677                </enumeratedValue>
153678                <enumeratedValue>
153679                  <name>1</name>
153680                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153681                  <value>#1</value>
153682                </enumeratedValue>
153683              </enumeratedValues>
153684            </field>
153685            <field>
153686              <name>PDO28</name>
153687              <description>Port Data Output</description>
153688              <bitOffset>28</bitOffset>
153689              <bitWidth>1</bitWidth>
153690              <access>read-write</access>
153691              <enumeratedValues>
153692                <enumeratedValue>
153693                  <name>0</name>
153694                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153695                  <value>#0</value>
153696                </enumeratedValue>
153697                <enumeratedValue>
153698                  <name>1</name>
153699                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153700                  <value>#1</value>
153701                </enumeratedValue>
153702              </enumeratedValues>
153703            </field>
153704            <field>
153705              <name>PDO29</name>
153706              <description>Port Data Output</description>
153707              <bitOffset>29</bitOffset>
153708              <bitWidth>1</bitWidth>
153709              <access>read-write</access>
153710              <enumeratedValues>
153711                <enumeratedValue>
153712                  <name>0</name>
153713                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153714                  <value>#0</value>
153715                </enumeratedValue>
153716                <enumeratedValue>
153717                  <name>1</name>
153718                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153719                  <value>#1</value>
153720                </enumeratedValue>
153721              </enumeratedValues>
153722            </field>
153723            <field>
153724              <name>PDO30</name>
153725              <description>Port Data Output</description>
153726              <bitOffset>30</bitOffset>
153727              <bitWidth>1</bitWidth>
153728              <access>read-write</access>
153729              <enumeratedValues>
153730                <enumeratedValue>
153731                  <name>0</name>
153732                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153733                  <value>#0</value>
153734                </enumeratedValue>
153735                <enumeratedValue>
153736                  <name>1</name>
153737                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153738                  <value>#1</value>
153739                </enumeratedValue>
153740              </enumeratedValues>
153741            </field>
153742            <field>
153743              <name>PDO31</name>
153744              <description>Port Data Output</description>
153745              <bitOffset>31</bitOffset>
153746              <bitWidth>1</bitWidth>
153747              <access>read-write</access>
153748              <enumeratedValues>
153749                <enumeratedValue>
153750                  <name>0</name>
153751                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
153752                  <value>#0</value>
153753                </enumeratedValue>
153754                <enumeratedValue>
153755                  <name>1</name>
153756                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
153757                  <value>#1</value>
153758                </enumeratedValue>
153759              </enumeratedValues>
153760            </field>
153761          </fields>
153762        </register>
153763        <register>
153764          <name>PSOR</name>
153765          <description>Port Set Output Register</description>
153766          <addressOffset>0x4</addressOffset>
153767          <size>32</size>
153768          <access>write-only</access>
153769          <resetValue>0</resetValue>
153770          <resetMask>0xFFFFFFFF</resetMask>
153771          <fields>
153772            <field>
153773              <name>PTSO0</name>
153774              <description>Port Set Output</description>
153775              <bitOffset>0</bitOffset>
153776              <bitWidth>1</bitWidth>
153777              <access>write-only</access>
153778              <enumeratedValues>
153779                <enumeratedValue>
153780                  <name>0</name>
153781                  <description>Corresponding bit in PDORn does not change.</description>
153782                  <value>#0</value>
153783                </enumeratedValue>
153784                <enumeratedValue>
153785                  <name>1</name>
153786                  <description>Corresponding bit in PDORn is set to logic 1.</description>
153787                  <value>#1</value>
153788                </enumeratedValue>
153789              </enumeratedValues>
153790            </field>
153791            <field>
153792              <name>PTSO1</name>
153793              <description>Port Set Output</description>
153794              <bitOffset>1</bitOffset>
153795              <bitWidth>1</bitWidth>
153796              <access>write-only</access>
153797              <enumeratedValues>
153798                <enumeratedValue>
153799                  <name>0</name>
153800                  <description>Corresponding bit in PDORn does not change.</description>
153801                  <value>#0</value>
153802                </enumeratedValue>
153803                <enumeratedValue>
153804                  <name>1</name>
153805                  <description>Corresponding bit in PDORn is set to logic 1.</description>
153806                  <value>#1</value>
153807                </enumeratedValue>
153808              </enumeratedValues>
153809            </field>
153810            <field>
153811              <name>PTSO2</name>
153812              <description>Port Set Output</description>
153813              <bitOffset>2</bitOffset>
153814              <bitWidth>1</bitWidth>
153815              <access>write-only</access>
153816              <enumeratedValues>
153817                <enumeratedValue>
153818                  <name>0</name>
153819                  <description>Corresponding bit in PDORn does not change.</description>
153820                  <value>#0</value>
153821                </enumeratedValue>
153822                <enumeratedValue>
153823                  <name>1</name>
153824                  <description>Corresponding bit in PDORn is set to logic 1.</description>
153825                  <value>#1</value>
153826                </enumeratedValue>
153827              </enumeratedValues>
153828            </field>
153829            <field>
153830              <name>PTSO3</name>
153831              <description>Port Set Output</description>
153832              <bitOffset>3</bitOffset>
153833              <bitWidth>1</bitWidth>
153834              <access>write-only</access>
153835              <enumeratedValues>
153836                <enumeratedValue>
153837                  <name>0</name>
153838                  <description>Corresponding bit in PDORn does not change.</description>
153839                  <value>#0</value>
153840                </enumeratedValue>
153841                <enumeratedValue>
153842                  <name>1</name>
153843                  <description>Corresponding bit in PDORn is set to logic 1.</description>
153844                  <value>#1</value>
153845                </enumeratedValue>
153846              </enumeratedValues>
153847            </field>
153848            <field>
153849              <name>PTSO4</name>
153850              <description>Port Set Output</description>
153851              <bitOffset>4</bitOffset>
153852              <bitWidth>1</bitWidth>
153853              <access>write-only</access>
153854              <enumeratedValues>
153855                <enumeratedValue>
153856                  <name>0</name>
153857                  <description>Corresponding bit in PDORn does not change.</description>
153858                  <value>#0</value>
153859                </enumeratedValue>
153860                <enumeratedValue>
153861                  <name>1</name>
153862                  <description>Corresponding bit in PDORn is set to logic 1.</description>
153863                  <value>#1</value>
153864                </enumeratedValue>
153865              </enumeratedValues>
153866            </field>
153867            <field>
153868              <name>PTSO5</name>
153869              <description>Port Set Output</description>
153870              <bitOffset>5</bitOffset>
153871              <bitWidth>1</bitWidth>
153872              <access>write-only</access>
153873              <enumeratedValues>
153874                <enumeratedValue>
153875                  <name>0</name>
153876                  <description>Corresponding bit in PDORn does not change.</description>
153877                  <value>#0</value>
153878                </enumeratedValue>
153879                <enumeratedValue>
153880                  <name>1</name>
153881                  <description>Corresponding bit in PDORn is set to logic 1.</description>
153882                  <value>#1</value>
153883                </enumeratedValue>
153884              </enumeratedValues>
153885            </field>
153886            <field>
153887              <name>PTSO6</name>
153888              <description>Port Set Output</description>
153889              <bitOffset>6</bitOffset>
153890              <bitWidth>1</bitWidth>
153891              <access>write-only</access>
153892              <enumeratedValues>
153893                <enumeratedValue>
153894                  <name>0</name>
153895                  <description>Corresponding bit in PDORn does not change.</description>
153896                  <value>#0</value>
153897                </enumeratedValue>
153898                <enumeratedValue>
153899                  <name>1</name>
153900                  <description>Corresponding bit in PDORn is set to logic 1.</description>
153901                  <value>#1</value>
153902                </enumeratedValue>
153903              </enumeratedValues>
153904            </field>
153905            <field>
153906              <name>PTSO7</name>
153907              <description>Port Set Output</description>
153908              <bitOffset>7</bitOffset>
153909              <bitWidth>1</bitWidth>
153910              <access>write-only</access>
153911              <enumeratedValues>
153912                <enumeratedValue>
153913                  <name>0</name>
153914                  <description>Corresponding bit in PDORn does not change.</description>
153915                  <value>#0</value>
153916                </enumeratedValue>
153917                <enumeratedValue>
153918                  <name>1</name>
153919                  <description>Corresponding bit in PDORn is set to logic 1.</description>
153920                  <value>#1</value>
153921                </enumeratedValue>
153922              </enumeratedValues>
153923            </field>
153924            <field>
153925              <name>PTSO8</name>
153926              <description>Port Set Output</description>
153927              <bitOffset>8</bitOffset>
153928              <bitWidth>1</bitWidth>
153929              <access>write-only</access>
153930              <enumeratedValues>
153931                <enumeratedValue>
153932                  <name>0</name>
153933                  <description>Corresponding bit in PDORn does not change.</description>
153934                  <value>#0</value>
153935                </enumeratedValue>
153936                <enumeratedValue>
153937                  <name>1</name>
153938                  <description>Corresponding bit in PDORn is set to logic 1.</description>
153939                  <value>#1</value>
153940                </enumeratedValue>
153941              </enumeratedValues>
153942            </field>
153943            <field>
153944              <name>PTSO9</name>
153945              <description>Port Set Output</description>
153946              <bitOffset>9</bitOffset>
153947              <bitWidth>1</bitWidth>
153948              <access>write-only</access>
153949              <enumeratedValues>
153950                <enumeratedValue>
153951                  <name>0</name>
153952                  <description>Corresponding bit in PDORn does not change.</description>
153953                  <value>#0</value>
153954                </enumeratedValue>
153955                <enumeratedValue>
153956                  <name>1</name>
153957                  <description>Corresponding bit in PDORn is set to logic 1.</description>
153958                  <value>#1</value>
153959                </enumeratedValue>
153960              </enumeratedValues>
153961            </field>
153962            <field>
153963              <name>PTSO10</name>
153964              <description>Port Set Output</description>
153965              <bitOffset>10</bitOffset>
153966              <bitWidth>1</bitWidth>
153967              <access>write-only</access>
153968              <enumeratedValues>
153969                <enumeratedValue>
153970                  <name>0</name>
153971                  <description>Corresponding bit in PDORn does not change.</description>
153972                  <value>#0</value>
153973                </enumeratedValue>
153974                <enumeratedValue>
153975                  <name>1</name>
153976                  <description>Corresponding bit in PDORn is set to logic 1.</description>
153977                  <value>#1</value>
153978                </enumeratedValue>
153979              </enumeratedValues>
153980            </field>
153981            <field>
153982              <name>PTSO11</name>
153983              <description>Port Set Output</description>
153984              <bitOffset>11</bitOffset>
153985              <bitWidth>1</bitWidth>
153986              <access>write-only</access>
153987              <enumeratedValues>
153988                <enumeratedValue>
153989                  <name>0</name>
153990                  <description>Corresponding bit in PDORn does not change.</description>
153991                  <value>#0</value>
153992                </enumeratedValue>
153993                <enumeratedValue>
153994                  <name>1</name>
153995                  <description>Corresponding bit in PDORn is set to logic 1.</description>
153996                  <value>#1</value>
153997                </enumeratedValue>
153998              </enumeratedValues>
153999            </field>
154000            <field>
154001              <name>PTSO12</name>
154002              <description>Port Set Output</description>
154003              <bitOffset>12</bitOffset>
154004              <bitWidth>1</bitWidth>
154005              <access>write-only</access>
154006              <enumeratedValues>
154007                <enumeratedValue>
154008                  <name>0</name>
154009                  <description>Corresponding bit in PDORn does not change.</description>
154010                  <value>#0</value>
154011                </enumeratedValue>
154012                <enumeratedValue>
154013                  <name>1</name>
154014                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154015                  <value>#1</value>
154016                </enumeratedValue>
154017              </enumeratedValues>
154018            </field>
154019            <field>
154020              <name>PTSO13</name>
154021              <description>Port Set Output</description>
154022              <bitOffset>13</bitOffset>
154023              <bitWidth>1</bitWidth>
154024              <access>write-only</access>
154025              <enumeratedValues>
154026                <enumeratedValue>
154027                  <name>0</name>
154028                  <description>Corresponding bit in PDORn does not change.</description>
154029                  <value>#0</value>
154030                </enumeratedValue>
154031                <enumeratedValue>
154032                  <name>1</name>
154033                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154034                  <value>#1</value>
154035                </enumeratedValue>
154036              </enumeratedValues>
154037            </field>
154038            <field>
154039              <name>PTSO14</name>
154040              <description>Port Set Output</description>
154041              <bitOffset>14</bitOffset>
154042              <bitWidth>1</bitWidth>
154043              <access>write-only</access>
154044              <enumeratedValues>
154045                <enumeratedValue>
154046                  <name>0</name>
154047                  <description>Corresponding bit in PDORn does not change.</description>
154048                  <value>#0</value>
154049                </enumeratedValue>
154050                <enumeratedValue>
154051                  <name>1</name>
154052                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154053                  <value>#1</value>
154054                </enumeratedValue>
154055              </enumeratedValues>
154056            </field>
154057            <field>
154058              <name>PTSO15</name>
154059              <description>Port Set Output</description>
154060              <bitOffset>15</bitOffset>
154061              <bitWidth>1</bitWidth>
154062              <access>write-only</access>
154063              <enumeratedValues>
154064                <enumeratedValue>
154065                  <name>0</name>
154066                  <description>Corresponding bit in PDORn does not change.</description>
154067                  <value>#0</value>
154068                </enumeratedValue>
154069                <enumeratedValue>
154070                  <name>1</name>
154071                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154072                  <value>#1</value>
154073                </enumeratedValue>
154074              </enumeratedValues>
154075            </field>
154076            <field>
154077              <name>PTSO16</name>
154078              <description>Port Set Output</description>
154079              <bitOffset>16</bitOffset>
154080              <bitWidth>1</bitWidth>
154081              <access>write-only</access>
154082              <enumeratedValues>
154083                <enumeratedValue>
154084                  <name>0</name>
154085                  <description>Corresponding bit in PDORn does not change.</description>
154086                  <value>#0</value>
154087                </enumeratedValue>
154088                <enumeratedValue>
154089                  <name>1</name>
154090                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154091                  <value>#1</value>
154092                </enumeratedValue>
154093              </enumeratedValues>
154094            </field>
154095            <field>
154096              <name>PTSO17</name>
154097              <description>Port Set Output</description>
154098              <bitOffset>17</bitOffset>
154099              <bitWidth>1</bitWidth>
154100              <access>write-only</access>
154101              <enumeratedValues>
154102                <enumeratedValue>
154103                  <name>0</name>
154104                  <description>Corresponding bit in PDORn does not change.</description>
154105                  <value>#0</value>
154106                </enumeratedValue>
154107                <enumeratedValue>
154108                  <name>1</name>
154109                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154110                  <value>#1</value>
154111                </enumeratedValue>
154112              </enumeratedValues>
154113            </field>
154114            <field>
154115              <name>PTSO18</name>
154116              <description>Port Set Output</description>
154117              <bitOffset>18</bitOffset>
154118              <bitWidth>1</bitWidth>
154119              <access>write-only</access>
154120              <enumeratedValues>
154121                <enumeratedValue>
154122                  <name>0</name>
154123                  <description>Corresponding bit in PDORn does not change.</description>
154124                  <value>#0</value>
154125                </enumeratedValue>
154126                <enumeratedValue>
154127                  <name>1</name>
154128                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154129                  <value>#1</value>
154130                </enumeratedValue>
154131              </enumeratedValues>
154132            </field>
154133            <field>
154134              <name>PTSO19</name>
154135              <description>Port Set Output</description>
154136              <bitOffset>19</bitOffset>
154137              <bitWidth>1</bitWidth>
154138              <access>write-only</access>
154139              <enumeratedValues>
154140                <enumeratedValue>
154141                  <name>0</name>
154142                  <description>Corresponding bit in PDORn does not change.</description>
154143                  <value>#0</value>
154144                </enumeratedValue>
154145                <enumeratedValue>
154146                  <name>1</name>
154147                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154148                  <value>#1</value>
154149                </enumeratedValue>
154150              </enumeratedValues>
154151            </field>
154152            <field>
154153              <name>PTSO20</name>
154154              <description>Port Set Output</description>
154155              <bitOffset>20</bitOffset>
154156              <bitWidth>1</bitWidth>
154157              <access>write-only</access>
154158              <enumeratedValues>
154159                <enumeratedValue>
154160                  <name>0</name>
154161                  <description>Corresponding bit in PDORn does not change.</description>
154162                  <value>#0</value>
154163                </enumeratedValue>
154164                <enumeratedValue>
154165                  <name>1</name>
154166                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154167                  <value>#1</value>
154168                </enumeratedValue>
154169              </enumeratedValues>
154170            </field>
154171            <field>
154172              <name>PTSO21</name>
154173              <description>Port Set Output</description>
154174              <bitOffset>21</bitOffset>
154175              <bitWidth>1</bitWidth>
154176              <access>write-only</access>
154177              <enumeratedValues>
154178                <enumeratedValue>
154179                  <name>0</name>
154180                  <description>Corresponding bit in PDORn does not change.</description>
154181                  <value>#0</value>
154182                </enumeratedValue>
154183                <enumeratedValue>
154184                  <name>1</name>
154185                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154186                  <value>#1</value>
154187                </enumeratedValue>
154188              </enumeratedValues>
154189            </field>
154190            <field>
154191              <name>PTSO22</name>
154192              <description>Port Set Output</description>
154193              <bitOffset>22</bitOffset>
154194              <bitWidth>1</bitWidth>
154195              <access>write-only</access>
154196              <enumeratedValues>
154197                <enumeratedValue>
154198                  <name>0</name>
154199                  <description>Corresponding bit in PDORn does not change.</description>
154200                  <value>#0</value>
154201                </enumeratedValue>
154202                <enumeratedValue>
154203                  <name>1</name>
154204                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154205                  <value>#1</value>
154206                </enumeratedValue>
154207              </enumeratedValues>
154208            </field>
154209            <field>
154210              <name>PTSO23</name>
154211              <description>Port Set Output</description>
154212              <bitOffset>23</bitOffset>
154213              <bitWidth>1</bitWidth>
154214              <access>write-only</access>
154215              <enumeratedValues>
154216                <enumeratedValue>
154217                  <name>0</name>
154218                  <description>Corresponding bit in PDORn does not change.</description>
154219                  <value>#0</value>
154220                </enumeratedValue>
154221                <enumeratedValue>
154222                  <name>1</name>
154223                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154224                  <value>#1</value>
154225                </enumeratedValue>
154226              </enumeratedValues>
154227            </field>
154228            <field>
154229              <name>PTSO24</name>
154230              <description>Port Set Output</description>
154231              <bitOffset>24</bitOffset>
154232              <bitWidth>1</bitWidth>
154233              <access>write-only</access>
154234              <enumeratedValues>
154235                <enumeratedValue>
154236                  <name>0</name>
154237                  <description>Corresponding bit in PDORn does not change.</description>
154238                  <value>#0</value>
154239                </enumeratedValue>
154240                <enumeratedValue>
154241                  <name>1</name>
154242                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154243                  <value>#1</value>
154244                </enumeratedValue>
154245              </enumeratedValues>
154246            </field>
154247            <field>
154248              <name>PTSO25</name>
154249              <description>Port Set Output</description>
154250              <bitOffset>25</bitOffset>
154251              <bitWidth>1</bitWidth>
154252              <access>write-only</access>
154253              <enumeratedValues>
154254                <enumeratedValue>
154255                  <name>0</name>
154256                  <description>Corresponding bit in PDORn does not change.</description>
154257                  <value>#0</value>
154258                </enumeratedValue>
154259                <enumeratedValue>
154260                  <name>1</name>
154261                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154262                  <value>#1</value>
154263                </enumeratedValue>
154264              </enumeratedValues>
154265            </field>
154266            <field>
154267              <name>PTSO26</name>
154268              <description>Port Set Output</description>
154269              <bitOffset>26</bitOffset>
154270              <bitWidth>1</bitWidth>
154271              <access>write-only</access>
154272              <enumeratedValues>
154273                <enumeratedValue>
154274                  <name>0</name>
154275                  <description>Corresponding bit in PDORn does not change.</description>
154276                  <value>#0</value>
154277                </enumeratedValue>
154278                <enumeratedValue>
154279                  <name>1</name>
154280                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154281                  <value>#1</value>
154282                </enumeratedValue>
154283              </enumeratedValues>
154284            </field>
154285            <field>
154286              <name>PTSO27</name>
154287              <description>Port Set Output</description>
154288              <bitOffset>27</bitOffset>
154289              <bitWidth>1</bitWidth>
154290              <access>write-only</access>
154291              <enumeratedValues>
154292                <enumeratedValue>
154293                  <name>0</name>
154294                  <description>Corresponding bit in PDORn does not change.</description>
154295                  <value>#0</value>
154296                </enumeratedValue>
154297                <enumeratedValue>
154298                  <name>1</name>
154299                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154300                  <value>#1</value>
154301                </enumeratedValue>
154302              </enumeratedValues>
154303            </field>
154304            <field>
154305              <name>PTSO28</name>
154306              <description>Port Set Output</description>
154307              <bitOffset>28</bitOffset>
154308              <bitWidth>1</bitWidth>
154309              <access>write-only</access>
154310              <enumeratedValues>
154311                <enumeratedValue>
154312                  <name>0</name>
154313                  <description>Corresponding bit in PDORn does not change.</description>
154314                  <value>#0</value>
154315                </enumeratedValue>
154316                <enumeratedValue>
154317                  <name>1</name>
154318                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154319                  <value>#1</value>
154320                </enumeratedValue>
154321              </enumeratedValues>
154322            </field>
154323            <field>
154324              <name>PTSO29</name>
154325              <description>Port Set Output</description>
154326              <bitOffset>29</bitOffset>
154327              <bitWidth>1</bitWidth>
154328              <access>write-only</access>
154329              <enumeratedValues>
154330                <enumeratedValue>
154331                  <name>0</name>
154332                  <description>Corresponding bit in PDORn does not change.</description>
154333                  <value>#0</value>
154334                </enumeratedValue>
154335                <enumeratedValue>
154336                  <name>1</name>
154337                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154338                  <value>#1</value>
154339                </enumeratedValue>
154340              </enumeratedValues>
154341            </field>
154342            <field>
154343              <name>PTSO30</name>
154344              <description>Port Set Output</description>
154345              <bitOffset>30</bitOffset>
154346              <bitWidth>1</bitWidth>
154347              <access>write-only</access>
154348              <enumeratedValues>
154349                <enumeratedValue>
154350                  <name>0</name>
154351                  <description>Corresponding bit in PDORn does not change.</description>
154352                  <value>#0</value>
154353                </enumeratedValue>
154354                <enumeratedValue>
154355                  <name>1</name>
154356                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154357                  <value>#1</value>
154358                </enumeratedValue>
154359              </enumeratedValues>
154360            </field>
154361            <field>
154362              <name>PTSO31</name>
154363              <description>Port Set Output</description>
154364              <bitOffset>31</bitOffset>
154365              <bitWidth>1</bitWidth>
154366              <access>write-only</access>
154367              <enumeratedValues>
154368                <enumeratedValue>
154369                  <name>0</name>
154370                  <description>Corresponding bit in PDORn does not change.</description>
154371                  <value>#0</value>
154372                </enumeratedValue>
154373                <enumeratedValue>
154374                  <name>1</name>
154375                  <description>Corresponding bit in PDORn is set to logic 1.</description>
154376                  <value>#1</value>
154377                </enumeratedValue>
154378              </enumeratedValues>
154379            </field>
154380          </fields>
154381        </register>
154382        <register>
154383          <name>PCOR</name>
154384          <description>Port Clear Output Register</description>
154385          <addressOffset>0x8</addressOffset>
154386          <size>32</size>
154387          <access>write-only</access>
154388          <resetValue>0</resetValue>
154389          <resetMask>0xFFFFFFFF</resetMask>
154390          <fields>
154391            <field>
154392              <name>PTCO0</name>
154393              <description>Port Clear Output</description>
154394              <bitOffset>0</bitOffset>
154395              <bitWidth>1</bitWidth>
154396              <access>write-only</access>
154397              <enumeratedValues>
154398                <enumeratedValue>
154399                  <name>0</name>
154400                  <description>Corresponding bit in PDORn does not change.</description>
154401                  <value>#0</value>
154402                </enumeratedValue>
154403                <enumeratedValue>
154404                  <name>1</name>
154405                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154406                  <value>#1</value>
154407                </enumeratedValue>
154408              </enumeratedValues>
154409            </field>
154410            <field>
154411              <name>PTCO1</name>
154412              <description>Port Clear Output</description>
154413              <bitOffset>1</bitOffset>
154414              <bitWidth>1</bitWidth>
154415              <access>write-only</access>
154416              <enumeratedValues>
154417                <enumeratedValue>
154418                  <name>0</name>
154419                  <description>Corresponding bit in PDORn does not change.</description>
154420                  <value>#0</value>
154421                </enumeratedValue>
154422                <enumeratedValue>
154423                  <name>1</name>
154424                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154425                  <value>#1</value>
154426                </enumeratedValue>
154427              </enumeratedValues>
154428            </field>
154429            <field>
154430              <name>PTCO2</name>
154431              <description>Port Clear Output</description>
154432              <bitOffset>2</bitOffset>
154433              <bitWidth>1</bitWidth>
154434              <access>write-only</access>
154435              <enumeratedValues>
154436                <enumeratedValue>
154437                  <name>0</name>
154438                  <description>Corresponding bit in PDORn does not change.</description>
154439                  <value>#0</value>
154440                </enumeratedValue>
154441                <enumeratedValue>
154442                  <name>1</name>
154443                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154444                  <value>#1</value>
154445                </enumeratedValue>
154446              </enumeratedValues>
154447            </field>
154448            <field>
154449              <name>PTCO3</name>
154450              <description>Port Clear Output</description>
154451              <bitOffset>3</bitOffset>
154452              <bitWidth>1</bitWidth>
154453              <access>write-only</access>
154454              <enumeratedValues>
154455                <enumeratedValue>
154456                  <name>0</name>
154457                  <description>Corresponding bit in PDORn does not change.</description>
154458                  <value>#0</value>
154459                </enumeratedValue>
154460                <enumeratedValue>
154461                  <name>1</name>
154462                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154463                  <value>#1</value>
154464                </enumeratedValue>
154465              </enumeratedValues>
154466            </field>
154467            <field>
154468              <name>PTCO4</name>
154469              <description>Port Clear Output</description>
154470              <bitOffset>4</bitOffset>
154471              <bitWidth>1</bitWidth>
154472              <access>write-only</access>
154473              <enumeratedValues>
154474                <enumeratedValue>
154475                  <name>0</name>
154476                  <description>Corresponding bit in PDORn does not change.</description>
154477                  <value>#0</value>
154478                </enumeratedValue>
154479                <enumeratedValue>
154480                  <name>1</name>
154481                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154482                  <value>#1</value>
154483                </enumeratedValue>
154484              </enumeratedValues>
154485            </field>
154486            <field>
154487              <name>PTCO5</name>
154488              <description>Port Clear Output</description>
154489              <bitOffset>5</bitOffset>
154490              <bitWidth>1</bitWidth>
154491              <access>write-only</access>
154492              <enumeratedValues>
154493                <enumeratedValue>
154494                  <name>0</name>
154495                  <description>Corresponding bit in PDORn does not change.</description>
154496                  <value>#0</value>
154497                </enumeratedValue>
154498                <enumeratedValue>
154499                  <name>1</name>
154500                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154501                  <value>#1</value>
154502                </enumeratedValue>
154503              </enumeratedValues>
154504            </field>
154505            <field>
154506              <name>PTCO6</name>
154507              <description>Port Clear Output</description>
154508              <bitOffset>6</bitOffset>
154509              <bitWidth>1</bitWidth>
154510              <access>write-only</access>
154511              <enumeratedValues>
154512                <enumeratedValue>
154513                  <name>0</name>
154514                  <description>Corresponding bit in PDORn does not change.</description>
154515                  <value>#0</value>
154516                </enumeratedValue>
154517                <enumeratedValue>
154518                  <name>1</name>
154519                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154520                  <value>#1</value>
154521                </enumeratedValue>
154522              </enumeratedValues>
154523            </field>
154524            <field>
154525              <name>PTCO7</name>
154526              <description>Port Clear Output</description>
154527              <bitOffset>7</bitOffset>
154528              <bitWidth>1</bitWidth>
154529              <access>write-only</access>
154530              <enumeratedValues>
154531                <enumeratedValue>
154532                  <name>0</name>
154533                  <description>Corresponding bit in PDORn does not change.</description>
154534                  <value>#0</value>
154535                </enumeratedValue>
154536                <enumeratedValue>
154537                  <name>1</name>
154538                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154539                  <value>#1</value>
154540                </enumeratedValue>
154541              </enumeratedValues>
154542            </field>
154543            <field>
154544              <name>PTCO8</name>
154545              <description>Port Clear Output</description>
154546              <bitOffset>8</bitOffset>
154547              <bitWidth>1</bitWidth>
154548              <access>write-only</access>
154549              <enumeratedValues>
154550                <enumeratedValue>
154551                  <name>0</name>
154552                  <description>Corresponding bit in PDORn does not change.</description>
154553                  <value>#0</value>
154554                </enumeratedValue>
154555                <enumeratedValue>
154556                  <name>1</name>
154557                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154558                  <value>#1</value>
154559                </enumeratedValue>
154560              </enumeratedValues>
154561            </field>
154562            <field>
154563              <name>PTCO9</name>
154564              <description>Port Clear Output</description>
154565              <bitOffset>9</bitOffset>
154566              <bitWidth>1</bitWidth>
154567              <access>write-only</access>
154568              <enumeratedValues>
154569                <enumeratedValue>
154570                  <name>0</name>
154571                  <description>Corresponding bit in PDORn does not change.</description>
154572                  <value>#0</value>
154573                </enumeratedValue>
154574                <enumeratedValue>
154575                  <name>1</name>
154576                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154577                  <value>#1</value>
154578                </enumeratedValue>
154579              </enumeratedValues>
154580            </field>
154581            <field>
154582              <name>PTCO10</name>
154583              <description>Port Clear Output</description>
154584              <bitOffset>10</bitOffset>
154585              <bitWidth>1</bitWidth>
154586              <access>write-only</access>
154587              <enumeratedValues>
154588                <enumeratedValue>
154589                  <name>0</name>
154590                  <description>Corresponding bit in PDORn does not change.</description>
154591                  <value>#0</value>
154592                </enumeratedValue>
154593                <enumeratedValue>
154594                  <name>1</name>
154595                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154596                  <value>#1</value>
154597                </enumeratedValue>
154598              </enumeratedValues>
154599            </field>
154600            <field>
154601              <name>PTCO11</name>
154602              <description>Port Clear Output</description>
154603              <bitOffset>11</bitOffset>
154604              <bitWidth>1</bitWidth>
154605              <access>write-only</access>
154606              <enumeratedValues>
154607                <enumeratedValue>
154608                  <name>0</name>
154609                  <description>Corresponding bit in PDORn does not change.</description>
154610                  <value>#0</value>
154611                </enumeratedValue>
154612                <enumeratedValue>
154613                  <name>1</name>
154614                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154615                  <value>#1</value>
154616                </enumeratedValue>
154617              </enumeratedValues>
154618            </field>
154619            <field>
154620              <name>PTCO12</name>
154621              <description>Port Clear Output</description>
154622              <bitOffset>12</bitOffset>
154623              <bitWidth>1</bitWidth>
154624              <access>write-only</access>
154625              <enumeratedValues>
154626                <enumeratedValue>
154627                  <name>0</name>
154628                  <description>Corresponding bit in PDORn does not change.</description>
154629                  <value>#0</value>
154630                </enumeratedValue>
154631                <enumeratedValue>
154632                  <name>1</name>
154633                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154634                  <value>#1</value>
154635                </enumeratedValue>
154636              </enumeratedValues>
154637            </field>
154638            <field>
154639              <name>PTCO13</name>
154640              <description>Port Clear Output</description>
154641              <bitOffset>13</bitOffset>
154642              <bitWidth>1</bitWidth>
154643              <access>write-only</access>
154644              <enumeratedValues>
154645                <enumeratedValue>
154646                  <name>0</name>
154647                  <description>Corresponding bit in PDORn does not change.</description>
154648                  <value>#0</value>
154649                </enumeratedValue>
154650                <enumeratedValue>
154651                  <name>1</name>
154652                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154653                  <value>#1</value>
154654                </enumeratedValue>
154655              </enumeratedValues>
154656            </field>
154657            <field>
154658              <name>PTCO14</name>
154659              <description>Port Clear Output</description>
154660              <bitOffset>14</bitOffset>
154661              <bitWidth>1</bitWidth>
154662              <access>write-only</access>
154663              <enumeratedValues>
154664                <enumeratedValue>
154665                  <name>0</name>
154666                  <description>Corresponding bit in PDORn does not change.</description>
154667                  <value>#0</value>
154668                </enumeratedValue>
154669                <enumeratedValue>
154670                  <name>1</name>
154671                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154672                  <value>#1</value>
154673                </enumeratedValue>
154674              </enumeratedValues>
154675            </field>
154676            <field>
154677              <name>PTCO15</name>
154678              <description>Port Clear Output</description>
154679              <bitOffset>15</bitOffset>
154680              <bitWidth>1</bitWidth>
154681              <access>write-only</access>
154682              <enumeratedValues>
154683                <enumeratedValue>
154684                  <name>0</name>
154685                  <description>Corresponding bit in PDORn does not change.</description>
154686                  <value>#0</value>
154687                </enumeratedValue>
154688                <enumeratedValue>
154689                  <name>1</name>
154690                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154691                  <value>#1</value>
154692                </enumeratedValue>
154693              </enumeratedValues>
154694            </field>
154695            <field>
154696              <name>PTCO16</name>
154697              <description>Port Clear Output</description>
154698              <bitOffset>16</bitOffset>
154699              <bitWidth>1</bitWidth>
154700              <access>write-only</access>
154701              <enumeratedValues>
154702                <enumeratedValue>
154703                  <name>0</name>
154704                  <description>Corresponding bit in PDORn does not change.</description>
154705                  <value>#0</value>
154706                </enumeratedValue>
154707                <enumeratedValue>
154708                  <name>1</name>
154709                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154710                  <value>#1</value>
154711                </enumeratedValue>
154712              </enumeratedValues>
154713            </field>
154714            <field>
154715              <name>PTCO17</name>
154716              <description>Port Clear Output</description>
154717              <bitOffset>17</bitOffset>
154718              <bitWidth>1</bitWidth>
154719              <access>write-only</access>
154720              <enumeratedValues>
154721                <enumeratedValue>
154722                  <name>0</name>
154723                  <description>Corresponding bit in PDORn does not change.</description>
154724                  <value>#0</value>
154725                </enumeratedValue>
154726                <enumeratedValue>
154727                  <name>1</name>
154728                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154729                  <value>#1</value>
154730                </enumeratedValue>
154731              </enumeratedValues>
154732            </field>
154733            <field>
154734              <name>PTCO18</name>
154735              <description>Port Clear Output</description>
154736              <bitOffset>18</bitOffset>
154737              <bitWidth>1</bitWidth>
154738              <access>write-only</access>
154739              <enumeratedValues>
154740                <enumeratedValue>
154741                  <name>0</name>
154742                  <description>Corresponding bit in PDORn does not change.</description>
154743                  <value>#0</value>
154744                </enumeratedValue>
154745                <enumeratedValue>
154746                  <name>1</name>
154747                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154748                  <value>#1</value>
154749                </enumeratedValue>
154750              </enumeratedValues>
154751            </field>
154752            <field>
154753              <name>PTCO19</name>
154754              <description>Port Clear Output</description>
154755              <bitOffset>19</bitOffset>
154756              <bitWidth>1</bitWidth>
154757              <access>write-only</access>
154758              <enumeratedValues>
154759                <enumeratedValue>
154760                  <name>0</name>
154761                  <description>Corresponding bit in PDORn does not change.</description>
154762                  <value>#0</value>
154763                </enumeratedValue>
154764                <enumeratedValue>
154765                  <name>1</name>
154766                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154767                  <value>#1</value>
154768                </enumeratedValue>
154769              </enumeratedValues>
154770            </field>
154771            <field>
154772              <name>PTCO20</name>
154773              <description>Port Clear Output</description>
154774              <bitOffset>20</bitOffset>
154775              <bitWidth>1</bitWidth>
154776              <access>write-only</access>
154777              <enumeratedValues>
154778                <enumeratedValue>
154779                  <name>0</name>
154780                  <description>Corresponding bit in PDORn does not change.</description>
154781                  <value>#0</value>
154782                </enumeratedValue>
154783                <enumeratedValue>
154784                  <name>1</name>
154785                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154786                  <value>#1</value>
154787                </enumeratedValue>
154788              </enumeratedValues>
154789            </field>
154790            <field>
154791              <name>PTCO21</name>
154792              <description>Port Clear Output</description>
154793              <bitOffset>21</bitOffset>
154794              <bitWidth>1</bitWidth>
154795              <access>write-only</access>
154796              <enumeratedValues>
154797                <enumeratedValue>
154798                  <name>0</name>
154799                  <description>Corresponding bit in PDORn does not change.</description>
154800                  <value>#0</value>
154801                </enumeratedValue>
154802                <enumeratedValue>
154803                  <name>1</name>
154804                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154805                  <value>#1</value>
154806                </enumeratedValue>
154807              </enumeratedValues>
154808            </field>
154809            <field>
154810              <name>PTCO22</name>
154811              <description>Port Clear Output</description>
154812              <bitOffset>22</bitOffset>
154813              <bitWidth>1</bitWidth>
154814              <access>write-only</access>
154815              <enumeratedValues>
154816                <enumeratedValue>
154817                  <name>0</name>
154818                  <description>Corresponding bit in PDORn does not change.</description>
154819                  <value>#0</value>
154820                </enumeratedValue>
154821                <enumeratedValue>
154822                  <name>1</name>
154823                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154824                  <value>#1</value>
154825                </enumeratedValue>
154826              </enumeratedValues>
154827            </field>
154828            <field>
154829              <name>PTCO23</name>
154830              <description>Port Clear Output</description>
154831              <bitOffset>23</bitOffset>
154832              <bitWidth>1</bitWidth>
154833              <access>write-only</access>
154834              <enumeratedValues>
154835                <enumeratedValue>
154836                  <name>0</name>
154837                  <description>Corresponding bit in PDORn does not change.</description>
154838                  <value>#0</value>
154839                </enumeratedValue>
154840                <enumeratedValue>
154841                  <name>1</name>
154842                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154843                  <value>#1</value>
154844                </enumeratedValue>
154845              </enumeratedValues>
154846            </field>
154847            <field>
154848              <name>PTCO24</name>
154849              <description>Port Clear Output</description>
154850              <bitOffset>24</bitOffset>
154851              <bitWidth>1</bitWidth>
154852              <access>write-only</access>
154853              <enumeratedValues>
154854                <enumeratedValue>
154855                  <name>0</name>
154856                  <description>Corresponding bit in PDORn does not change.</description>
154857                  <value>#0</value>
154858                </enumeratedValue>
154859                <enumeratedValue>
154860                  <name>1</name>
154861                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154862                  <value>#1</value>
154863                </enumeratedValue>
154864              </enumeratedValues>
154865            </field>
154866            <field>
154867              <name>PTCO25</name>
154868              <description>Port Clear Output</description>
154869              <bitOffset>25</bitOffset>
154870              <bitWidth>1</bitWidth>
154871              <access>write-only</access>
154872              <enumeratedValues>
154873                <enumeratedValue>
154874                  <name>0</name>
154875                  <description>Corresponding bit in PDORn does not change.</description>
154876                  <value>#0</value>
154877                </enumeratedValue>
154878                <enumeratedValue>
154879                  <name>1</name>
154880                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154881                  <value>#1</value>
154882                </enumeratedValue>
154883              </enumeratedValues>
154884            </field>
154885            <field>
154886              <name>PTCO26</name>
154887              <description>Port Clear Output</description>
154888              <bitOffset>26</bitOffset>
154889              <bitWidth>1</bitWidth>
154890              <access>write-only</access>
154891              <enumeratedValues>
154892                <enumeratedValue>
154893                  <name>0</name>
154894                  <description>Corresponding bit in PDORn does not change.</description>
154895                  <value>#0</value>
154896                </enumeratedValue>
154897                <enumeratedValue>
154898                  <name>1</name>
154899                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154900                  <value>#1</value>
154901                </enumeratedValue>
154902              </enumeratedValues>
154903            </field>
154904            <field>
154905              <name>PTCO27</name>
154906              <description>Port Clear Output</description>
154907              <bitOffset>27</bitOffset>
154908              <bitWidth>1</bitWidth>
154909              <access>write-only</access>
154910              <enumeratedValues>
154911                <enumeratedValue>
154912                  <name>0</name>
154913                  <description>Corresponding bit in PDORn does not change.</description>
154914                  <value>#0</value>
154915                </enumeratedValue>
154916                <enumeratedValue>
154917                  <name>1</name>
154918                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154919                  <value>#1</value>
154920                </enumeratedValue>
154921              </enumeratedValues>
154922            </field>
154923            <field>
154924              <name>PTCO28</name>
154925              <description>Port Clear Output</description>
154926              <bitOffset>28</bitOffset>
154927              <bitWidth>1</bitWidth>
154928              <access>write-only</access>
154929              <enumeratedValues>
154930                <enumeratedValue>
154931                  <name>0</name>
154932                  <description>Corresponding bit in PDORn does not change.</description>
154933                  <value>#0</value>
154934                </enumeratedValue>
154935                <enumeratedValue>
154936                  <name>1</name>
154937                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154938                  <value>#1</value>
154939                </enumeratedValue>
154940              </enumeratedValues>
154941            </field>
154942            <field>
154943              <name>PTCO29</name>
154944              <description>Port Clear Output</description>
154945              <bitOffset>29</bitOffset>
154946              <bitWidth>1</bitWidth>
154947              <access>write-only</access>
154948              <enumeratedValues>
154949                <enumeratedValue>
154950                  <name>0</name>
154951                  <description>Corresponding bit in PDORn does not change.</description>
154952                  <value>#0</value>
154953                </enumeratedValue>
154954                <enumeratedValue>
154955                  <name>1</name>
154956                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154957                  <value>#1</value>
154958                </enumeratedValue>
154959              </enumeratedValues>
154960            </field>
154961            <field>
154962              <name>PTCO30</name>
154963              <description>Port Clear Output</description>
154964              <bitOffset>30</bitOffset>
154965              <bitWidth>1</bitWidth>
154966              <access>write-only</access>
154967              <enumeratedValues>
154968                <enumeratedValue>
154969                  <name>0</name>
154970                  <description>Corresponding bit in PDORn does not change.</description>
154971                  <value>#0</value>
154972                </enumeratedValue>
154973                <enumeratedValue>
154974                  <name>1</name>
154975                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154976                  <value>#1</value>
154977                </enumeratedValue>
154978              </enumeratedValues>
154979            </field>
154980            <field>
154981              <name>PTCO31</name>
154982              <description>Port Clear Output</description>
154983              <bitOffset>31</bitOffset>
154984              <bitWidth>1</bitWidth>
154985              <access>write-only</access>
154986              <enumeratedValues>
154987                <enumeratedValue>
154988                  <name>0</name>
154989                  <description>Corresponding bit in PDORn does not change.</description>
154990                  <value>#0</value>
154991                </enumeratedValue>
154992                <enumeratedValue>
154993                  <name>1</name>
154994                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
154995                  <value>#1</value>
154996                </enumeratedValue>
154997              </enumeratedValues>
154998            </field>
154999          </fields>
155000        </register>
155001        <register>
155002          <name>PTOR</name>
155003          <description>Port Toggle Output Register</description>
155004          <addressOffset>0xC</addressOffset>
155005          <size>32</size>
155006          <access>write-only</access>
155007          <resetValue>0</resetValue>
155008          <resetMask>0xFFFFFFFF</resetMask>
155009          <fields>
155010            <field>
155011              <name>PTTO0</name>
155012              <description>Port Toggle Output</description>
155013              <bitOffset>0</bitOffset>
155014              <bitWidth>1</bitWidth>
155015              <access>write-only</access>
155016              <enumeratedValues>
155017                <enumeratedValue>
155018                  <name>0</name>
155019                  <description>Corresponding bit in PDORn does not change.</description>
155020                  <value>#0</value>
155021                </enumeratedValue>
155022                <enumeratedValue>
155023                  <name>1</name>
155024                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155025                  <value>#1</value>
155026                </enumeratedValue>
155027              </enumeratedValues>
155028            </field>
155029            <field>
155030              <name>PTTO1</name>
155031              <description>Port Toggle Output</description>
155032              <bitOffset>1</bitOffset>
155033              <bitWidth>1</bitWidth>
155034              <access>write-only</access>
155035              <enumeratedValues>
155036                <enumeratedValue>
155037                  <name>0</name>
155038                  <description>Corresponding bit in PDORn does not change.</description>
155039                  <value>#0</value>
155040                </enumeratedValue>
155041                <enumeratedValue>
155042                  <name>1</name>
155043                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155044                  <value>#1</value>
155045                </enumeratedValue>
155046              </enumeratedValues>
155047            </field>
155048            <field>
155049              <name>PTTO2</name>
155050              <description>Port Toggle Output</description>
155051              <bitOffset>2</bitOffset>
155052              <bitWidth>1</bitWidth>
155053              <access>write-only</access>
155054              <enumeratedValues>
155055                <enumeratedValue>
155056                  <name>0</name>
155057                  <description>Corresponding bit in PDORn does not change.</description>
155058                  <value>#0</value>
155059                </enumeratedValue>
155060                <enumeratedValue>
155061                  <name>1</name>
155062                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155063                  <value>#1</value>
155064                </enumeratedValue>
155065              </enumeratedValues>
155066            </field>
155067            <field>
155068              <name>PTTO3</name>
155069              <description>Port Toggle Output</description>
155070              <bitOffset>3</bitOffset>
155071              <bitWidth>1</bitWidth>
155072              <access>write-only</access>
155073              <enumeratedValues>
155074                <enumeratedValue>
155075                  <name>0</name>
155076                  <description>Corresponding bit in PDORn does not change.</description>
155077                  <value>#0</value>
155078                </enumeratedValue>
155079                <enumeratedValue>
155080                  <name>1</name>
155081                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155082                  <value>#1</value>
155083                </enumeratedValue>
155084              </enumeratedValues>
155085            </field>
155086            <field>
155087              <name>PTTO4</name>
155088              <description>Port Toggle Output</description>
155089              <bitOffset>4</bitOffset>
155090              <bitWidth>1</bitWidth>
155091              <access>write-only</access>
155092              <enumeratedValues>
155093                <enumeratedValue>
155094                  <name>0</name>
155095                  <description>Corresponding bit in PDORn does not change.</description>
155096                  <value>#0</value>
155097                </enumeratedValue>
155098                <enumeratedValue>
155099                  <name>1</name>
155100                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155101                  <value>#1</value>
155102                </enumeratedValue>
155103              </enumeratedValues>
155104            </field>
155105            <field>
155106              <name>PTTO5</name>
155107              <description>Port Toggle Output</description>
155108              <bitOffset>5</bitOffset>
155109              <bitWidth>1</bitWidth>
155110              <access>write-only</access>
155111              <enumeratedValues>
155112                <enumeratedValue>
155113                  <name>0</name>
155114                  <description>Corresponding bit in PDORn does not change.</description>
155115                  <value>#0</value>
155116                </enumeratedValue>
155117                <enumeratedValue>
155118                  <name>1</name>
155119                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155120                  <value>#1</value>
155121                </enumeratedValue>
155122              </enumeratedValues>
155123            </field>
155124            <field>
155125              <name>PTTO6</name>
155126              <description>Port Toggle Output</description>
155127              <bitOffset>6</bitOffset>
155128              <bitWidth>1</bitWidth>
155129              <access>write-only</access>
155130              <enumeratedValues>
155131                <enumeratedValue>
155132                  <name>0</name>
155133                  <description>Corresponding bit in PDORn does not change.</description>
155134                  <value>#0</value>
155135                </enumeratedValue>
155136                <enumeratedValue>
155137                  <name>1</name>
155138                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155139                  <value>#1</value>
155140                </enumeratedValue>
155141              </enumeratedValues>
155142            </field>
155143            <field>
155144              <name>PTTO7</name>
155145              <description>Port Toggle Output</description>
155146              <bitOffset>7</bitOffset>
155147              <bitWidth>1</bitWidth>
155148              <access>write-only</access>
155149              <enumeratedValues>
155150                <enumeratedValue>
155151                  <name>0</name>
155152                  <description>Corresponding bit in PDORn does not change.</description>
155153                  <value>#0</value>
155154                </enumeratedValue>
155155                <enumeratedValue>
155156                  <name>1</name>
155157                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155158                  <value>#1</value>
155159                </enumeratedValue>
155160              </enumeratedValues>
155161            </field>
155162            <field>
155163              <name>PTTO8</name>
155164              <description>Port Toggle Output</description>
155165              <bitOffset>8</bitOffset>
155166              <bitWidth>1</bitWidth>
155167              <access>write-only</access>
155168              <enumeratedValues>
155169                <enumeratedValue>
155170                  <name>0</name>
155171                  <description>Corresponding bit in PDORn does not change.</description>
155172                  <value>#0</value>
155173                </enumeratedValue>
155174                <enumeratedValue>
155175                  <name>1</name>
155176                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155177                  <value>#1</value>
155178                </enumeratedValue>
155179              </enumeratedValues>
155180            </field>
155181            <field>
155182              <name>PTTO9</name>
155183              <description>Port Toggle Output</description>
155184              <bitOffset>9</bitOffset>
155185              <bitWidth>1</bitWidth>
155186              <access>write-only</access>
155187              <enumeratedValues>
155188                <enumeratedValue>
155189                  <name>0</name>
155190                  <description>Corresponding bit in PDORn does not change.</description>
155191                  <value>#0</value>
155192                </enumeratedValue>
155193                <enumeratedValue>
155194                  <name>1</name>
155195                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155196                  <value>#1</value>
155197                </enumeratedValue>
155198              </enumeratedValues>
155199            </field>
155200            <field>
155201              <name>PTTO10</name>
155202              <description>Port Toggle Output</description>
155203              <bitOffset>10</bitOffset>
155204              <bitWidth>1</bitWidth>
155205              <access>write-only</access>
155206              <enumeratedValues>
155207                <enumeratedValue>
155208                  <name>0</name>
155209                  <description>Corresponding bit in PDORn does not change.</description>
155210                  <value>#0</value>
155211                </enumeratedValue>
155212                <enumeratedValue>
155213                  <name>1</name>
155214                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155215                  <value>#1</value>
155216                </enumeratedValue>
155217              </enumeratedValues>
155218            </field>
155219            <field>
155220              <name>PTTO11</name>
155221              <description>Port Toggle Output</description>
155222              <bitOffset>11</bitOffset>
155223              <bitWidth>1</bitWidth>
155224              <access>write-only</access>
155225              <enumeratedValues>
155226                <enumeratedValue>
155227                  <name>0</name>
155228                  <description>Corresponding bit in PDORn does not change.</description>
155229                  <value>#0</value>
155230                </enumeratedValue>
155231                <enumeratedValue>
155232                  <name>1</name>
155233                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155234                  <value>#1</value>
155235                </enumeratedValue>
155236              </enumeratedValues>
155237            </field>
155238            <field>
155239              <name>PTTO12</name>
155240              <description>Port Toggle Output</description>
155241              <bitOffset>12</bitOffset>
155242              <bitWidth>1</bitWidth>
155243              <access>write-only</access>
155244              <enumeratedValues>
155245                <enumeratedValue>
155246                  <name>0</name>
155247                  <description>Corresponding bit in PDORn does not change.</description>
155248                  <value>#0</value>
155249                </enumeratedValue>
155250                <enumeratedValue>
155251                  <name>1</name>
155252                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155253                  <value>#1</value>
155254                </enumeratedValue>
155255              </enumeratedValues>
155256            </field>
155257            <field>
155258              <name>PTTO13</name>
155259              <description>Port Toggle Output</description>
155260              <bitOffset>13</bitOffset>
155261              <bitWidth>1</bitWidth>
155262              <access>write-only</access>
155263              <enumeratedValues>
155264                <enumeratedValue>
155265                  <name>0</name>
155266                  <description>Corresponding bit in PDORn does not change.</description>
155267                  <value>#0</value>
155268                </enumeratedValue>
155269                <enumeratedValue>
155270                  <name>1</name>
155271                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155272                  <value>#1</value>
155273                </enumeratedValue>
155274              </enumeratedValues>
155275            </field>
155276            <field>
155277              <name>PTTO14</name>
155278              <description>Port Toggle Output</description>
155279              <bitOffset>14</bitOffset>
155280              <bitWidth>1</bitWidth>
155281              <access>write-only</access>
155282              <enumeratedValues>
155283                <enumeratedValue>
155284                  <name>0</name>
155285                  <description>Corresponding bit in PDORn does not change.</description>
155286                  <value>#0</value>
155287                </enumeratedValue>
155288                <enumeratedValue>
155289                  <name>1</name>
155290                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155291                  <value>#1</value>
155292                </enumeratedValue>
155293              </enumeratedValues>
155294            </field>
155295            <field>
155296              <name>PTTO15</name>
155297              <description>Port Toggle Output</description>
155298              <bitOffset>15</bitOffset>
155299              <bitWidth>1</bitWidth>
155300              <access>write-only</access>
155301              <enumeratedValues>
155302                <enumeratedValue>
155303                  <name>0</name>
155304                  <description>Corresponding bit in PDORn does not change.</description>
155305                  <value>#0</value>
155306                </enumeratedValue>
155307                <enumeratedValue>
155308                  <name>1</name>
155309                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155310                  <value>#1</value>
155311                </enumeratedValue>
155312              </enumeratedValues>
155313            </field>
155314            <field>
155315              <name>PTTO16</name>
155316              <description>Port Toggle Output</description>
155317              <bitOffset>16</bitOffset>
155318              <bitWidth>1</bitWidth>
155319              <access>write-only</access>
155320              <enumeratedValues>
155321                <enumeratedValue>
155322                  <name>0</name>
155323                  <description>Corresponding bit in PDORn does not change.</description>
155324                  <value>#0</value>
155325                </enumeratedValue>
155326                <enumeratedValue>
155327                  <name>1</name>
155328                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155329                  <value>#1</value>
155330                </enumeratedValue>
155331              </enumeratedValues>
155332            </field>
155333            <field>
155334              <name>PTTO17</name>
155335              <description>Port Toggle Output</description>
155336              <bitOffset>17</bitOffset>
155337              <bitWidth>1</bitWidth>
155338              <access>write-only</access>
155339              <enumeratedValues>
155340                <enumeratedValue>
155341                  <name>0</name>
155342                  <description>Corresponding bit in PDORn does not change.</description>
155343                  <value>#0</value>
155344                </enumeratedValue>
155345                <enumeratedValue>
155346                  <name>1</name>
155347                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155348                  <value>#1</value>
155349                </enumeratedValue>
155350              </enumeratedValues>
155351            </field>
155352            <field>
155353              <name>PTTO18</name>
155354              <description>Port Toggle Output</description>
155355              <bitOffset>18</bitOffset>
155356              <bitWidth>1</bitWidth>
155357              <access>write-only</access>
155358              <enumeratedValues>
155359                <enumeratedValue>
155360                  <name>0</name>
155361                  <description>Corresponding bit in PDORn does not change.</description>
155362                  <value>#0</value>
155363                </enumeratedValue>
155364                <enumeratedValue>
155365                  <name>1</name>
155366                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155367                  <value>#1</value>
155368                </enumeratedValue>
155369              </enumeratedValues>
155370            </field>
155371            <field>
155372              <name>PTTO19</name>
155373              <description>Port Toggle Output</description>
155374              <bitOffset>19</bitOffset>
155375              <bitWidth>1</bitWidth>
155376              <access>write-only</access>
155377              <enumeratedValues>
155378                <enumeratedValue>
155379                  <name>0</name>
155380                  <description>Corresponding bit in PDORn does not change.</description>
155381                  <value>#0</value>
155382                </enumeratedValue>
155383                <enumeratedValue>
155384                  <name>1</name>
155385                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155386                  <value>#1</value>
155387                </enumeratedValue>
155388              </enumeratedValues>
155389            </field>
155390            <field>
155391              <name>PTTO20</name>
155392              <description>Port Toggle Output</description>
155393              <bitOffset>20</bitOffset>
155394              <bitWidth>1</bitWidth>
155395              <access>write-only</access>
155396              <enumeratedValues>
155397                <enumeratedValue>
155398                  <name>0</name>
155399                  <description>Corresponding bit in PDORn does not change.</description>
155400                  <value>#0</value>
155401                </enumeratedValue>
155402                <enumeratedValue>
155403                  <name>1</name>
155404                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155405                  <value>#1</value>
155406                </enumeratedValue>
155407              </enumeratedValues>
155408            </field>
155409            <field>
155410              <name>PTTO21</name>
155411              <description>Port Toggle Output</description>
155412              <bitOffset>21</bitOffset>
155413              <bitWidth>1</bitWidth>
155414              <access>write-only</access>
155415              <enumeratedValues>
155416                <enumeratedValue>
155417                  <name>0</name>
155418                  <description>Corresponding bit in PDORn does not change.</description>
155419                  <value>#0</value>
155420                </enumeratedValue>
155421                <enumeratedValue>
155422                  <name>1</name>
155423                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155424                  <value>#1</value>
155425                </enumeratedValue>
155426              </enumeratedValues>
155427            </field>
155428            <field>
155429              <name>PTTO22</name>
155430              <description>Port Toggle Output</description>
155431              <bitOffset>22</bitOffset>
155432              <bitWidth>1</bitWidth>
155433              <access>write-only</access>
155434              <enumeratedValues>
155435                <enumeratedValue>
155436                  <name>0</name>
155437                  <description>Corresponding bit in PDORn does not change.</description>
155438                  <value>#0</value>
155439                </enumeratedValue>
155440                <enumeratedValue>
155441                  <name>1</name>
155442                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155443                  <value>#1</value>
155444                </enumeratedValue>
155445              </enumeratedValues>
155446            </field>
155447            <field>
155448              <name>PTTO23</name>
155449              <description>Port Toggle Output</description>
155450              <bitOffset>23</bitOffset>
155451              <bitWidth>1</bitWidth>
155452              <access>write-only</access>
155453              <enumeratedValues>
155454                <enumeratedValue>
155455                  <name>0</name>
155456                  <description>Corresponding bit in PDORn does not change.</description>
155457                  <value>#0</value>
155458                </enumeratedValue>
155459                <enumeratedValue>
155460                  <name>1</name>
155461                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155462                  <value>#1</value>
155463                </enumeratedValue>
155464              </enumeratedValues>
155465            </field>
155466            <field>
155467              <name>PTTO24</name>
155468              <description>Port Toggle Output</description>
155469              <bitOffset>24</bitOffset>
155470              <bitWidth>1</bitWidth>
155471              <access>write-only</access>
155472              <enumeratedValues>
155473                <enumeratedValue>
155474                  <name>0</name>
155475                  <description>Corresponding bit in PDORn does not change.</description>
155476                  <value>#0</value>
155477                </enumeratedValue>
155478                <enumeratedValue>
155479                  <name>1</name>
155480                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155481                  <value>#1</value>
155482                </enumeratedValue>
155483              </enumeratedValues>
155484            </field>
155485            <field>
155486              <name>PTTO25</name>
155487              <description>Port Toggle Output</description>
155488              <bitOffset>25</bitOffset>
155489              <bitWidth>1</bitWidth>
155490              <access>write-only</access>
155491              <enumeratedValues>
155492                <enumeratedValue>
155493                  <name>0</name>
155494                  <description>Corresponding bit in PDORn does not change.</description>
155495                  <value>#0</value>
155496                </enumeratedValue>
155497                <enumeratedValue>
155498                  <name>1</name>
155499                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155500                  <value>#1</value>
155501                </enumeratedValue>
155502              </enumeratedValues>
155503            </field>
155504            <field>
155505              <name>PTTO26</name>
155506              <description>Port Toggle Output</description>
155507              <bitOffset>26</bitOffset>
155508              <bitWidth>1</bitWidth>
155509              <access>write-only</access>
155510              <enumeratedValues>
155511                <enumeratedValue>
155512                  <name>0</name>
155513                  <description>Corresponding bit in PDORn does not change.</description>
155514                  <value>#0</value>
155515                </enumeratedValue>
155516                <enumeratedValue>
155517                  <name>1</name>
155518                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155519                  <value>#1</value>
155520                </enumeratedValue>
155521              </enumeratedValues>
155522            </field>
155523            <field>
155524              <name>PTTO27</name>
155525              <description>Port Toggle Output</description>
155526              <bitOffset>27</bitOffset>
155527              <bitWidth>1</bitWidth>
155528              <access>write-only</access>
155529              <enumeratedValues>
155530                <enumeratedValue>
155531                  <name>0</name>
155532                  <description>Corresponding bit in PDORn does not change.</description>
155533                  <value>#0</value>
155534                </enumeratedValue>
155535                <enumeratedValue>
155536                  <name>1</name>
155537                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155538                  <value>#1</value>
155539                </enumeratedValue>
155540              </enumeratedValues>
155541            </field>
155542            <field>
155543              <name>PTTO28</name>
155544              <description>Port Toggle Output</description>
155545              <bitOffset>28</bitOffset>
155546              <bitWidth>1</bitWidth>
155547              <access>write-only</access>
155548              <enumeratedValues>
155549                <enumeratedValue>
155550                  <name>0</name>
155551                  <description>Corresponding bit in PDORn does not change.</description>
155552                  <value>#0</value>
155553                </enumeratedValue>
155554                <enumeratedValue>
155555                  <name>1</name>
155556                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155557                  <value>#1</value>
155558                </enumeratedValue>
155559              </enumeratedValues>
155560            </field>
155561            <field>
155562              <name>PTTO29</name>
155563              <description>Port Toggle Output</description>
155564              <bitOffset>29</bitOffset>
155565              <bitWidth>1</bitWidth>
155566              <access>write-only</access>
155567              <enumeratedValues>
155568                <enumeratedValue>
155569                  <name>0</name>
155570                  <description>Corresponding bit in PDORn does not change.</description>
155571                  <value>#0</value>
155572                </enumeratedValue>
155573                <enumeratedValue>
155574                  <name>1</name>
155575                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155576                  <value>#1</value>
155577                </enumeratedValue>
155578              </enumeratedValues>
155579            </field>
155580            <field>
155581              <name>PTTO30</name>
155582              <description>Port Toggle Output</description>
155583              <bitOffset>30</bitOffset>
155584              <bitWidth>1</bitWidth>
155585              <access>write-only</access>
155586              <enumeratedValues>
155587                <enumeratedValue>
155588                  <name>0</name>
155589                  <description>Corresponding bit in PDORn does not change.</description>
155590                  <value>#0</value>
155591                </enumeratedValue>
155592                <enumeratedValue>
155593                  <name>1</name>
155594                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155595                  <value>#1</value>
155596                </enumeratedValue>
155597              </enumeratedValues>
155598            </field>
155599            <field>
155600              <name>PTTO31</name>
155601              <description>Port Toggle Output</description>
155602              <bitOffset>31</bitOffset>
155603              <bitWidth>1</bitWidth>
155604              <access>write-only</access>
155605              <enumeratedValues>
155606                <enumeratedValue>
155607                  <name>0</name>
155608                  <description>Corresponding bit in PDORn does not change.</description>
155609                  <value>#0</value>
155610                </enumeratedValue>
155611                <enumeratedValue>
155612                  <name>1</name>
155613                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
155614                  <value>#1</value>
155615                </enumeratedValue>
155616              </enumeratedValues>
155617            </field>
155618          </fields>
155619        </register>
155620        <register>
155621          <name>PDIR</name>
155622          <description>Port Data Input Register</description>
155623          <addressOffset>0x10</addressOffset>
155624          <size>32</size>
155625          <access>read-only</access>
155626          <resetValue>0</resetValue>
155627          <resetMask>0xFFFFFFFF</resetMask>
155628          <fields>
155629            <field>
155630              <name>PDI0</name>
155631              <description>Port Data Input</description>
155632              <bitOffset>0</bitOffset>
155633              <bitWidth>1</bitWidth>
155634              <access>read-only</access>
155635              <enumeratedValues>
155636                <enumeratedValue>
155637                  <name>0</name>
155638                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155639                  <value>#0</value>
155640                </enumeratedValue>
155641                <enumeratedValue>
155642                  <name>1</name>
155643                  <description>Pin logic level is logic 1.</description>
155644                  <value>#1</value>
155645                </enumeratedValue>
155646              </enumeratedValues>
155647            </field>
155648            <field>
155649              <name>PDI1</name>
155650              <description>Port Data Input</description>
155651              <bitOffset>1</bitOffset>
155652              <bitWidth>1</bitWidth>
155653              <access>read-only</access>
155654              <enumeratedValues>
155655                <enumeratedValue>
155656                  <name>0</name>
155657                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155658                  <value>#0</value>
155659                </enumeratedValue>
155660                <enumeratedValue>
155661                  <name>1</name>
155662                  <description>Pin logic level is logic 1.</description>
155663                  <value>#1</value>
155664                </enumeratedValue>
155665              </enumeratedValues>
155666            </field>
155667            <field>
155668              <name>PDI2</name>
155669              <description>Port Data Input</description>
155670              <bitOffset>2</bitOffset>
155671              <bitWidth>1</bitWidth>
155672              <access>read-only</access>
155673              <enumeratedValues>
155674                <enumeratedValue>
155675                  <name>0</name>
155676                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155677                  <value>#0</value>
155678                </enumeratedValue>
155679                <enumeratedValue>
155680                  <name>1</name>
155681                  <description>Pin logic level is logic 1.</description>
155682                  <value>#1</value>
155683                </enumeratedValue>
155684              </enumeratedValues>
155685            </field>
155686            <field>
155687              <name>PDI3</name>
155688              <description>Port Data Input</description>
155689              <bitOffset>3</bitOffset>
155690              <bitWidth>1</bitWidth>
155691              <access>read-only</access>
155692              <enumeratedValues>
155693                <enumeratedValue>
155694                  <name>0</name>
155695                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155696                  <value>#0</value>
155697                </enumeratedValue>
155698                <enumeratedValue>
155699                  <name>1</name>
155700                  <description>Pin logic level is logic 1.</description>
155701                  <value>#1</value>
155702                </enumeratedValue>
155703              </enumeratedValues>
155704            </field>
155705            <field>
155706              <name>PDI4</name>
155707              <description>Port Data Input</description>
155708              <bitOffset>4</bitOffset>
155709              <bitWidth>1</bitWidth>
155710              <access>read-only</access>
155711              <enumeratedValues>
155712                <enumeratedValue>
155713                  <name>0</name>
155714                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155715                  <value>#0</value>
155716                </enumeratedValue>
155717                <enumeratedValue>
155718                  <name>1</name>
155719                  <description>Pin logic level is logic 1.</description>
155720                  <value>#1</value>
155721                </enumeratedValue>
155722              </enumeratedValues>
155723            </field>
155724            <field>
155725              <name>PDI5</name>
155726              <description>Port Data Input</description>
155727              <bitOffset>5</bitOffset>
155728              <bitWidth>1</bitWidth>
155729              <access>read-only</access>
155730              <enumeratedValues>
155731                <enumeratedValue>
155732                  <name>0</name>
155733                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155734                  <value>#0</value>
155735                </enumeratedValue>
155736                <enumeratedValue>
155737                  <name>1</name>
155738                  <description>Pin logic level is logic 1.</description>
155739                  <value>#1</value>
155740                </enumeratedValue>
155741              </enumeratedValues>
155742            </field>
155743            <field>
155744              <name>PDI6</name>
155745              <description>Port Data Input</description>
155746              <bitOffset>6</bitOffset>
155747              <bitWidth>1</bitWidth>
155748              <access>read-only</access>
155749              <enumeratedValues>
155750                <enumeratedValue>
155751                  <name>0</name>
155752                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155753                  <value>#0</value>
155754                </enumeratedValue>
155755                <enumeratedValue>
155756                  <name>1</name>
155757                  <description>Pin logic level is logic 1.</description>
155758                  <value>#1</value>
155759                </enumeratedValue>
155760              </enumeratedValues>
155761            </field>
155762            <field>
155763              <name>PDI7</name>
155764              <description>Port Data Input</description>
155765              <bitOffset>7</bitOffset>
155766              <bitWidth>1</bitWidth>
155767              <access>read-only</access>
155768              <enumeratedValues>
155769                <enumeratedValue>
155770                  <name>0</name>
155771                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155772                  <value>#0</value>
155773                </enumeratedValue>
155774                <enumeratedValue>
155775                  <name>1</name>
155776                  <description>Pin logic level is logic 1.</description>
155777                  <value>#1</value>
155778                </enumeratedValue>
155779              </enumeratedValues>
155780            </field>
155781            <field>
155782              <name>PDI8</name>
155783              <description>Port Data Input</description>
155784              <bitOffset>8</bitOffset>
155785              <bitWidth>1</bitWidth>
155786              <access>read-only</access>
155787              <enumeratedValues>
155788                <enumeratedValue>
155789                  <name>0</name>
155790                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155791                  <value>#0</value>
155792                </enumeratedValue>
155793                <enumeratedValue>
155794                  <name>1</name>
155795                  <description>Pin logic level is logic 1.</description>
155796                  <value>#1</value>
155797                </enumeratedValue>
155798              </enumeratedValues>
155799            </field>
155800            <field>
155801              <name>PDI9</name>
155802              <description>Port Data Input</description>
155803              <bitOffset>9</bitOffset>
155804              <bitWidth>1</bitWidth>
155805              <access>read-only</access>
155806              <enumeratedValues>
155807                <enumeratedValue>
155808                  <name>0</name>
155809                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155810                  <value>#0</value>
155811                </enumeratedValue>
155812                <enumeratedValue>
155813                  <name>1</name>
155814                  <description>Pin logic level is logic 1.</description>
155815                  <value>#1</value>
155816                </enumeratedValue>
155817              </enumeratedValues>
155818            </field>
155819            <field>
155820              <name>PDI10</name>
155821              <description>Port Data Input</description>
155822              <bitOffset>10</bitOffset>
155823              <bitWidth>1</bitWidth>
155824              <access>read-only</access>
155825              <enumeratedValues>
155826                <enumeratedValue>
155827                  <name>0</name>
155828                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155829                  <value>#0</value>
155830                </enumeratedValue>
155831                <enumeratedValue>
155832                  <name>1</name>
155833                  <description>Pin logic level is logic 1.</description>
155834                  <value>#1</value>
155835                </enumeratedValue>
155836              </enumeratedValues>
155837            </field>
155838            <field>
155839              <name>PDI11</name>
155840              <description>Port Data Input</description>
155841              <bitOffset>11</bitOffset>
155842              <bitWidth>1</bitWidth>
155843              <access>read-only</access>
155844              <enumeratedValues>
155845                <enumeratedValue>
155846                  <name>0</name>
155847                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155848                  <value>#0</value>
155849                </enumeratedValue>
155850                <enumeratedValue>
155851                  <name>1</name>
155852                  <description>Pin logic level is logic 1.</description>
155853                  <value>#1</value>
155854                </enumeratedValue>
155855              </enumeratedValues>
155856            </field>
155857            <field>
155858              <name>PDI12</name>
155859              <description>Port Data Input</description>
155860              <bitOffset>12</bitOffset>
155861              <bitWidth>1</bitWidth>
155862              <access>read-only</access>
155863              <enumeratedValues>
155864                <enumeratedValue>
155865                  <name>0</name>
155866                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155867                  <value>#0</value>
155868                </enumeratedValue>
155869                <enumeratedValue>
155870                  <name>1</name>
155871                  <description>Pin logic level is logic 1.</description>
155872                  <value>#1</value>
155873                </enumeratedValue>
155874              </enumeratedValues>
155875            </field>
155876            <field>
155877              <name>PDI13</name>
155878              <description>Port Data Input</description>
155879              <bitOffset>13</bitOffset>
155880              <bitWidth>1</bitWidth>
155881              <access>read-only</access>
155882              <enumeratedValues>
155883                <enumeratedValue>
155884                  <name>0</name>
155885                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155886                  <value>#0</value>
155887                </enumeratedValue>
155888                <enumeratedValue>
155889                  <name>1</name>
155890                  <description>Pin logic level is logic 1.</description>
155891                  <value>#1</value>
155892                </enumeratedValue>
155893              </enumeratedValues>
155894            </field>
155895            <field>
155896              <name>PDI14</name>
155897              <description>Port Data Input</description>
155898              <bitOffset>14</bitOffset>
155899              <bitWidth>1</bitWidth>
155900              <access>read-only</access>
155901              <enumeratedValues>
155902                <enumeratedValue>
155903                  <name>0</name>
155904                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155905                  <value>#0</value>
155906                </enumeratedValue>
155907                <enumeratedValue>
155908                  <name>1</name>
155909                  <description>Pin logic level is logic 1.</description>
155910                  <value>#1</value>
155911                </enumeratedValue>
155912              </enumeratedValues>
155913            </field>
155914            <field>
155915              <name>PDI15</name>
155916              <description>Port Data Input</description>
155917              <bitOffset>15</bitOffset>
155918              <bitWidth>1</bitWidth>
155919              <access>read-only</access>
155920              <enumeratedValues>
155921                <enumeratedValue>
155922                  <name>0</name>
155923                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155924                  <value>#0</value>
155925                </enumeratedValue>
155926                <enumeratedValue>
155927                  <name>1</name>
155928                  <description>Pin logic level is logic 1.</description>
155929                  <value>#1</value>
155930                </enumeratedValue>
155931              </enumeratedValues>
155932            </field>
155933            <field>
155934              <name>PDI16</name>
155935              <description>Port Data Input</description>
155936              <bitOffset>16</bitOffset>
155937              <bitWidth>1</bitWidth>
155938              <access>read-only</access>
155939              <enumeratedValues>
155940                <enumeratedValue>
155941                  <name>0</name>
155942                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155943                  <value>#0</value>
155944                </enumeratedValue>
155945                <enumeratedValue>
155946                  <name>1</name>
155947                  <description>Pin logic level is logic 1.</description>
155948                  <value>#1</value>
155949                </enumeratedValue>
155950              </enumeratedValues>
155951            </field>
155952            <field>
155953              <name>PDI17</name>
155954              <description>Port Data Input</description>
155955              <bitOffset>17</bitOffset>
155956              <bitWidth>1</bitWidth>
155957              <access>read-only</access>
155958              <enumeratedValues>
155959                <enumeratedValue>
155960                  <name>0</name>
155961                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155962                  <value>#0</value>
155963                </enumeratedValue>
155964                <enumeratedValue>
155965                  <name>1</name>
155966                  <description>Pin logic level is logic 1.</description>
155967                  <value>#1</value>
155968                </enumeratedValue>
155969              </enumeratedValues>
155970            </field>
155971            <field>
155972              <name>PDI18</name>
155973              <description>Port Data Input</description>
155974              <bitOffset>18</bitOffset>
155975              <bitWidth>1</bitWidth>
155976              <access>read-only</access>
155977              <enumeratedValues>
155978                <enumeratedValue>
155979                  <name>0</name>
155980                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
155981                  <value>#0</value>
155982                </enumeratedValue>
155983                <enumeratedValue>
155984                  <name>1</name>
155985                  <description>Pin logic level is logic 1.</description>
155986                  <value>#1</value>
155987                </enumeratedValue>
155988              </enumeratedValues>
155989            </field>
155990            <field>
155991              <name>PDI19</name>
155992              <description>Port Data Input</description>
155993              <bitOffset>19</bitOffset>
155994              <bitWidth>1</bitWidth>
155995              <access>read-only</access>
155996              <enumeratedValues>
155997                <enumeratedValue>
155998                  <name>0</name>
155999                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156000                  <value>#0</value>
156001                </enumeratedValue>
156002                <enumeratedValue>
156003                  <name>1</name>
156004                  <description>Pin logic level is logic 1.</description>
156005                  <value>#1</value>
156006                </enumeratedValue>
156007              </enumeratedValues>
156008            </field>
156009            <field>
156010              <name>PDI20</name>
156011              <description>Port Data Input</description>
156012              <bitOffset>20</bitOffset>
156013              <bitWidth>1</bitWidth>
156014              <access>read-only</access>
156015              <enumeratedValues>
156016                <enumeratedValue>
156017                  <name>0</name>
156018                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156019                  <value>#0</value>
156020                </enumeratedValue>
156021                <enumeratedValue>
156022                  <name>1</name>
156023                  <description>Pin logic level is logic 1.</description>
156024                  <value>#1</value>
156025                </enumeratedValue>
156026              </enumeratedValues>
156027            </field>
156028            <field>
156029              <name>PDI21</name>
156030              <description>Port Data Input</description>
156031              <bitOffset>21</bitOffset>
156032              <bitWidth>1</bitWidth>
156033              <access>read-only</access>
156034              <enumeratedValues>
156035                <enumeratedValue>
156036                  <name>0</name>
156037                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156038                  <value>#0</value>
156039                </enumeratedValue>
156040                <enumeratedValue>
156041                  <name>1</name>
156042                  <description>Pin logic level is logic 1.</description>
156043                  <value>#1</value>
156044                </enumeratedValue>
156045              </enumeratedValues>
156046            </field>
156047            <field>
156048              <name>PDI22</name>
156049              <description>Port Data Input</description>
156050              <bitOffset>22</bitOffset>
156051              <bitWidth>1</bitWidth>
156052              <access>read-only</access>
156053              <enumeratedValues>
156054                <enumeratedValue>
156055                  <name>0</name>
156056                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156057                  <value>#0</value>
156058                </enumeratedValue>
156059                <enumeratedValue>
156060                  <name>1</name>
156061                  <description>Pin logic level is logic 1.</description>
156062                  <value>#1</value>
156063                </enumeratedValue>
156064              </enumeratedValues>
156065            </field>
156066            <field>
156067              <name>PDI23</name>
156068              <description>Port Data Input</description>
156069              <bitOffset>23</bitOffset>
156070              <bitWidth>1</bitWidth>
156071              <access>read-only</access>
156072              <enumeratedValues>
156073                <enumeratedValue>
156074                  <name>0</name>
156075                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156076                  <value>#0</value>
156077                </enumeratedValue>
156078                <enumeratedValue>
156079                  <name>1</name>
156080                  <description>Pin logic level is logic 1.</description>
156081                  <value>#1</value>
156082                </enumeratedValue>
156083              </enumeratedValues>
156084            </field>
156085            <field>
156086              <name>PDI24</name>
156087              <description>Port Data Input</description>
156088              <bitOffset>24</bitOffset>
156089              <bitWidth>1</bitWidth>
156090              <access>read-only</access>
156091              <enumeratedValues>
156092                <enumeratedValue>
156093                  <name>0</name>
156094                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156095                  <value>#0</value>
156096                </enumeratedValue>
156097                <enumeratedValue>
156098                  <name>1</name>
156099                  <description>Pin logic level is logic 1.</description>
156100                  <value>#1</value>
156101                </enumeratedValue>
156102              </enumeratedValues>
156103            </field>
156104            <field>
156105              <name>PDI25</name>
156106              <description>Port Data Input</description>
156107              <bitOffset>25</bitOffset>
156108              <bitWidth>1</bitWidth>
156109              <access>read-only</access>
156110              <enumeratedValues>
156111                <enumeratedValue>
156112                  <name>0</name>
156113                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156114                  <value>#0</value>
156115                </enumeratedValue>
156116                <enumeratedValue>
156117                  <name>1</name>
156118                  <description>Pin logic level is logic 1.</description>
156119                  <value>#1</value>
156120                </enumeratedValue>
156121              </enumeratedValues>
156122            </field>
156123            <field>
156124              <name>PDI26</name>
156125              <description>Port Data Input</description>
156126              <bitOffset>26</bitOffset>
156127              <bitWidth>1</bitWidth>
156128              <access>read-only</access>
156129              <enumeratedValues>
156130                <enumeratedValue>
156131                  <name>0</name>
156132                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156133                  <value>#0</value>
156134                </enumeratedValue>
156135                <enumeratedValue>
156136                  <name>1</name>
156137                  <description>Pin logic level is logic 1.</description>
156138                  <value>#1</value>
156139                </enumeratedValue>
156140              </enumeratedValues>
156141            </field>
156142            <field>
156143              <name>PDI27</name>
156144              <description>Port Data Input</description>
156145              <bitOffset>27</bitOffset>
156146              <bitWidth>1</bitWidth>
156147              <access>read-only</access>
156148              <enumeratedValues>
156149                <enumeratedValue>
156150                  <name>0</name>
156151                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156152                  <value>#0</value>
156153                </enumeratedValue>
156154                <enumeratedValue>
156155                  <name>1</name>
156156                  <description>Pin logic level is logic 1.</description>
156157                  <value>#1</value>
156158                </enumeratedValue>
156159              </enumeratedValues>
156160            </field>
156161            <field>
156162              <name>PDI28</name>
156163              <description>Port Data Input</description>
156164              <bitOffset>28</bitOffset>
156165              <bitWidth>1</bitWidth>
156166              <access>read-only</access>
156167              <enumeratedValues>
156168                <enumeratedValue>
156169                  <name>0</name>
156170                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156171                  <value>#0</value>
156172                </enumeratedValue>
156173                <enumeratedValue>
156174                  <name>1</name>
156175                  <description>Pin logic level is logic 1.</description>
156176                  <value>#1</value>
156177                </enumeratedValue>
156178              </enumeratedValues>
156179            </field>
156180            <field>
156181              <name>PDI29</name>
156182              <description>Port Data Input</description>
156183              <bitOffset>29</bitOffset>
156184              <bitWidth>1</bitWidth>
156185              <access>read-only</access>
156186              <enumeratedValues>
156187                <enumeratedValue>
156188                  <name>0</name>
156189                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156190                  <value>#0</value>
156191                </enumeratedValue>
156192                <enumeratedValue>
156193                  <name>1</name>
156194                  <description>Pin logic level is logic 1.</description>
156195                  <value>#1</value>
156196                </enumeratedValue>
156197              </enumeratedValues>
156198            </field>
156199            <field>
156200              <name>PDI30</name>
156201              <description>Port Data Input</description>
156202              <bitOffset>30</bitOffset>
156203              <bitWidth>1</bitWidth>
156204              <access>read-only</access>
156205              <enumeratedValues>
156206                <enumeratedValue>
156207                  <name>0</name>
156208                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156209                  <value>#0</value>
156210                </enumeratedValue>
156211                <enumeratedValue>
156212                  <name>1</name>
156213                  <description>Pin logic level is logic 1.</description>
156214                  <value>#1</value>
156215                </enumeratedValue>
156216              </enumeratedValues>
156217            </field>
156218            <field>
156219              <name>PDI31</name>
156220              <description>Port Data Input</description>
156221              <bitOffset>31</bitOffset>
156222              <bitWidth>1</bitWidth>
156223              <access>read-only</access>
156224              <enumeratedValues>
156225                <enumeratedValue>
156226                  <name>0</name>
156227                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
156228                  <value>#0</value>
156229                </enumeratedValue>
156230                <enumeratedValue>
156231                  <name>1</name>
156232                  <description>Pin logic level is logic 1.</description>
156233                  <value>#1</value>
156234                </enumeratedValue>
156235              </enumeratedValues>
156236            </field>
156237          </fields>
156238        </register>
156239        <register>
156240          <name>PDDR</name>
156241          <description>Port Data Direction Register</description>
156242          <addressOffset>0x14</addressOffset>
156243          <size>32</size>
156244          <access>read-write</access>
156245          <resetValue>0</resetValue>
156246          <resetMask>0xFFFFFFFF</resetMask>
156247          <fields>
156248            <field>
156249              <name>PDD0</name>
156250              <description>Port Data Direction</description>
156251              <bitOffset>0</bitOffset>
156252              <bitWidth>1</bitWidth>
156253              <access>read-write</access>
156254              <enumeratedValues>
156255                <enumeratedValue>
156256                  <name>0</name>
156257                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156258                  <value>#0</value>
156259                </enumeratedValue>
156260                <enumeratedValue>
156261                  <name>1</name>
156262                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156263                  <value>#1</value>
156264                </enumeratedValue>
156265              </enumeratedValues>
156266            </field>
156267            <field>
156268              <name>PDD1</name>
156269              <description>Port Data Direction</description>
156270              <bitOffset>1</bitOffset>
156271              <bitWidth>1</bitWidth>
156272              <access>read-write</access>
156273              <enumeratedValues>
156274                <enumeratedValue>
156275                  <name>0</name>
156276                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156277                  <value>#0</value>
156278                </enumeratedValue>
156279                <enumeratedValue>
156280                  <name>1</name>
156281                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156282                  <value>#1</value>
156283                </enumeratedValue>
156284              </enumeratedValues>
156285            </field>
156286            <field>
156287              <name>PDD2</name>
156288              <description>Port Data Direction</description>
156289              <bitOffset>2</bitOffset>
156290              <bitWidth>1</bitWidth>
156291              <access>read-write</access>
156292              <enumeratedValues>
156293                <enumeratedValue>
156294                  <name>0</name>
156295                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156296                  <value>#0</value>
156297                </enumeratedValue>
156298                <enumeratedValue>
156299                  <name>1</name>
156300                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156301                  <value>#1</value>
156302                </enumeratedValue>
156303              </enumeratedValues>
156304            </field>
156305            <field>
156306              <name>PDD3</name>
156307              <description>Port Data Direction</description>
156308              <bitOffset>3</bitOffset>
156309              <bitWidth>1</bitWidth>
156310              <access>read-write</access>
156311              <enumeratedValues>
156312                <enumeratedValue>
156313                  <name>0</name>
156314                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156315                  <value>#0</value>
156316                </enumeratedValue>
156317                <enumeratedValue>
156318                  <name>1</name>
156319                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156320                  <value>#1</value>
156321                </enumeratedValue>
156322              </enumeratedValues>
156323            </field>
156324            <field>
156325              <name>PDD4</name>
156326              <description>Port Data Direction</description>
156327              <bitOffset>4</bitOffset>
156328              <bitWidth>1</bitWidth>
156329              <access>read-write</access>
156330              <enumeratedValues>
156331                <enumeratedValue>
156332                  <name>0</name>
156333                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156334                  <value>#0</value>
156335                </enumeratedValue>
156336                <enumeratedValue>
156337                  <name>1</name>
156338                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156339                  <value>#1</value>
156340                </enumeratedValue>
156341              </enumeratedValues>
156342            </field>
156343            <field>
156344              <name>PDD5</name>
156345              <description>Port Data Direction</description>
156346              <bitOffset>5</bitOffset>
156347              <bitWidth>1</bitWidth>
156348              <access>read-write</access>
156349              <enumeratedValues>
156350                <enumeratedValue>
156351                  <name>0</name>
156352                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156353                  <value>#0</value>
156354                </enumeratedValue>
156355                <enumeratedValue>
156356                  <name>1</name>
156357                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156358                  <value>#1</value>
156359                </enumeratedValue>
156360              </enumeratedValues>
156361            </field>
156362            <field>
156363              <name>PDD6</name>
156364              <description>Port Data Direction</description>
156365              <bitOffset>6</bitOffset>
156366              <bitWidth>1</bitWidth>
156367              <access>read-write</access>
156368              <enumeratedValues>
156369                <enumeratedValue>
156370                  <name>0</name>
156371                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156372                  <value>#0</value>
156373                </enumeratedValue>
156374                <enumeratedValue>
156375                  <name>1</name>
156376                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156377                  <value>#1</value>
156378                </enumeratedValue>
156379              </enumeratedValues>
156380            </field>
156381            <field>
156382              <name>PDD7</name>
156383              <description>Port Data Direction</description>
156384              <bitOffset>7</bitOffset>
156385              <bitWidth>1</bitWidth>
156386              <access>read-write</access>
156387              <enumeratedValues>
156388                <enumeratedValue>
156389                  <name>0</name>
156390                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156391                  <value>#0</value>
156392                </enumeratedValue>
156393                <enumeratedValue>
156394                  <name>1</name>
156395                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156396                  <value>#1</value>
156397                </enumeratedValue>
156398              </enumeratedValues>
156399            </field>
156400            <field>
156401              <name>PDD8</name>
156402              <description>Port Data Direction</description>
156403              <bitOffset>8</bitOffset>
156404              <bitWidth>1</bitWidth>
156405              <access>read-write</access>
156406              <enumeratedValues>
156407                <enumeratedValue>
156408                  <name>0</name>
156409                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156410                  <value>#0</value>
156411                </enumeratedValue>
156412                <enumeratedValue>
156413                  <name>1</name>
156414                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156415                  <value>#1</value>
156416                </enumeratedValue>
156417              </enumeratedValues>
156418            </field>
156419            <field>
156420              <name>PDD9</name>
156421              <description>Port Data Direction</description>
156422              <bitOffset>9</bitOffset>
156423              <bitWidth>1</bitWidth>
156424              <access>read-write</access>
156425              <enumeratedValues>
156426                <enumeratedValue>
156427                  <name>0</name>
156428                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156429                  <value>#0</value>
156430                </enumeratedValue>
156431                <enumeratedValue>
156432                  <name>1</name>
156433                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156434                  <value>#1</value>
156435                </enumeratedValue>
156436              </enumeratedValues>
156437            </field>
156438            <field>
156439              <name>PDD10</name>
156440              <description>Port Data Direction</description>
156441              <bitOffset>10</bitOffset>
156442              <bitWidth>1</bitWidth>
156443              <access>read-write</access>
156444              <enumeratedValues>
156445                <enumeratedValue>
156446                  <name>0</name>
156447                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156448                  <value>#0</value>
156449                </enumeratedValue>
156450                <enumeratedValue>
156451                  <name>1</name>
156452                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156453                  <value>#1</value>
156454                </enumeratedValue>
156455              </enumeratedValues>
156456            </field>
156457            <field>
156458              <name>PDD11</name>
156459              <description>Port Data Direction</description>
156460              <bitOffset>11</bitOffset>
156461              <bitWidth>1</bitWidth>
156462              <access>read-write</access>
156463              <enumeratedValues>
156464                <enumeratedValue>
156465                  <name>0</name>
156466                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156467                  <value>#0</value>
156468                </enumeratedValue>
156469                <enumeratedValue>
156470                  <name>1</name>
156471                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156472                  <value>#1</value>
156473                </enumeratedValue>
156474              </enumeratedValues>
156475            </field>
156476            <field>
156477              <name>PDD12</name>
156478              <description>Port Data Direction</description>
156479              <bitOffset>12</bitOffset>
156480              <bitWidth>1</bitWidth>
156481              <access>read-write</access>
156482              <enumeratedValues>
156483                <enumeratedValue>
156484                  <name>0</name>
156485                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156486                  <value>#0</value>
156487                </enumeratedValue>
156488                <enumeratedValue>
156489                  <name>1</name>
156490                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156491                  <value>#1</value>
156492                </enumeratedValue>
156493              </enumeratedValues>
156494            </field>
156495            <field>
156496              <name>PDD13</name>
156497              <description>Port Data Direction</description>
156498              <bitOffset>13</bitOffset>
156499              <bitWidth>1</bitWidth>
156500              <access>read-write</access>
156501              <enumeratedValues>
156502                <enumeratedValue>
156503                  <name>0</name>
156504                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156505                  <value>#0</value>
156506                </enumeratedValue>
156507                <enumeratedValue>
156508                  <name>1</name>
156509                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156510                  <value>#1</value>
156511                </enumeratedValue>
156512              </enumeratedValues>
156513            </field>
156514            <field>
156515              <name>PDD14</name>
156516              <description>Port Data Direction</description>
156517              <bitOffset>14</bitOffset>
156518              <bitWidth>1</bitWidth>
156519              <access>read-write</access>
156520              <enumeratedValues>
156521                <enumeratedValue>
156522                  <name>0</name>
156523                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156524                  <value>#0</value>
156525                </enumeratedValue>
156526                <enumeratedValue>
156527                  <name>1</name>
156528                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156529                  <value>#1</value>
156530                </enumeratedValue>
156531              </enumeratedValues>
156532            </field>
156533            <field>
156534              <name>PDD15</name>
156535              <description>Port Data Direction</description>
156536              <bitOffset>15</bitOffset>
156537              <bitWidth>1</bitWidth>
156538              <access>read-write</access>
156539              <enumeratedValues>
156540                <enumeratedValue>
156541                  <name>0</name>
156542                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156543                  <value>#0</value>
156544                </enumeratedValue>
156545                <enumeratedValue>
156546                  <name>1</name>
156547                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156548                  <value>#1</value>
156549                </enumeratedValue>
156550              </enumeratedValues>
156551            </field>
156552            <field>
156553              <name>PDD16</name>
156554              <description>Port Data Direction</description>
156555              <bitOffset>16</bitOffset>
156556              <bitWidth>1</bitWidth>
156557              <access>read-write</access>
156558              <enumeratedValues>
156559                <enumeratedValue>
156560                  <name>0</name>
156561                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156562                  <value>#0</value>
156563                </enumeratedValue>
156564                <enumeratedValue>
156565                  <name>1</name>
156566                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156567                  <value>#1</value>
156568                </enumeratedValue>
156569              </enumeratedValues>
156570            </field>
156571            <field>
156572              <name>PDD17</name>
156573              <description>Port Data Direction</description>
156574              <bitOffset>17</bitOffset>
156575              <bitWidth>1</bitWidth>
156576              <access>read-write</access>
156577              <enumeratedValues>
156578                <enumeratedValue>
156579                  <name>0</name>
156580                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156581                  <value>#0</value>
156582                </enumeratedValue>
156583                <enumeratedValue>
156584                  <name>1</name>
156585                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156586                  <value>#1</value>
156587                </enumeratedValue>
156588              </enumeratedValues>
156589            </field>
156590            <field>
156591              <name>PDD18</name>
156592              <description>Port Data Direction</description>
156593              <bitOffset>18</bitOffset>
156594              <bitWidth>1</bitWidth>
156595              <access>read-write</access>
156596              <enumeratedValues>
156597                <enumeratedValue>
156598                  <name>0</name>
156599                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156600                  <value>#0</value>
156601                </enumeratedValue>
156602                <enumeratedValue>
156603                  <name>1</name>
156604                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156605                  <value>#1</value>
156606                </enumeratedValue>
156607              </enumeratedValues>
156608            </field>
156609            <field>
156610              <name>PDD19</name>
156611              <description>Port Data Direction</description>
156612              <bitOffset>19</bitOffset>
156613              <bitWidth>1</bitWidth>
156614              <access>read-write</access>
156615              <enumeratedValues>
156616                <enumeratedValue>
156617                  <name>0</name>
156618                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156619                  <value>#0</value>
156620                </enumeratedValue>
156621                <enumeratedValue>
156622                  <name>1</name>
156623                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156624                  <value>#1</value>
156625                </enumeratedValue>
156626              </enumeratedValues>
156627            </field>
156628            <field>
156629              <name>PDD20</name>
156630              <description>Port Data Direction</description>
156631              <bitOffset>20</bitOffset>
156632              <bitWidth>1</bitWidth>
156633              <access>read-write</access>
156634              <enumeratedValues>
156635                <enumeratedValue>
156636                  <name>0</name>
156637                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156638                  <value>#0</value>
156639                </enumeratedValue>
156640                <enumeratedValue>
156641                  <name>1</name>
156642                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156643                  <value>#1</value>
156644                </enumeratedValue>
156645              </enumeratedValues>
156646            </field>
156647            <field>
156648              <name>PDD21</name>
156649              <description>Port Data Direction</description>
156650              <bitOffset>21</bitOffset>
156651              <bitWidth>1</bitWidth>
156652              <access>read-write</access>
156653              <enumeratedValues>
156654                <enumeratedValue>
156655                  <name>0</name>
156656                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156657                  <value>#0</value>
156658                </enumeratedValue>
156659                <enumeratedValue>
156660                  <name>1</name>
156661                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156662                  <value>#1</value>
156663                </enumeratedValue>
156664              </enumeratedValues>
156665            </field>
156666            <field>
156667              <name>PDD22</name>
156668              <description>Port Data Direction</description>
156669              <bitOffset>22</bitOffset>
156670              <bitWidth>1</bitWidth>
156671              <access>read-write</access>
156672              <enumeratedValues>
156673                <enumeratedValue>
156674                  <name>0</name>
156675                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156676                  <value>#0</value>
156677                </enumeratedValue>
156678                <enumeratedValue>
156679                  <name>1</name>
156680                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156681                  <value>#1</value>
156682                </enumeratedValue>
156683              </enumeratedValues>
156684            </field>
156685            <field>
156686              <name>PDD23</name>
156687              <description>Port Data Direction</description>
156688              <bitOffset>23</bitOffset>
156689              <bitWidth>1</bitWidth>
156690              <access>read-write</access>
156691              <enumeratedValues>
156692                <enumeratedValue>
156693                  <name>0</name>
156694                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156695                  <value>#0</value>
156696                </enumeratedValue>
156697                <enumeratedValue>
156698                  <name>1</name>
156699                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156700                  <value>#1</value>
156701                </enumeratedValue>
156702              </enumeratedValues>
156703            </field>
156704            <field>
156705              <name>PDD24</name>
156706              <description>Port Data Direction</description>
156707              <bitOffset>24</bitOffset>
156708              <bitWidth>1</bitWidth>
156709              <access>read-write</access>
156710              <enumeratedValues>
156711                <enumeratedValue>
156712                  <name>0</name>
156713                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156714                  <value>#0</value>
156715                </enumeratedValue>
156716                <enumeratedValue>
156717                  <name>1</name>
156718                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156719                  <value>#1</value>
156720                </enumeratedValue>
156721              </enumeratedValues>
156722            </field>
156723            <field>
156724              <name>PDD25</name>
156725              <description>Port Data Direction</description>
156726              <bitOffset>25</bitOffset>
156727              <bitWidth>1</bitWidth>
156728              <access>read-write</access>
156729              <enumeratedValues>
156730                <enumeratedValue>
156731                  <name>0</name>
156732                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156733                  <value>#0</value>
156734                </enumeratedValue>
156735                <enumeratedValue>
156736                  <name>1</name>
156737                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156738                  <value>#1</value>
156739                </enumeratedValue>
156740              </enumeratedValues>
156741            </field>
156742            <field>
156743              <name>PDD26</name>
156744              <description>Port Data Direction</description>
156745              <bitOffset>26</bitOffset>
156746              <bitWidth>1</bitWidth>
156747              <access>read-write</access>
156748              <enumeratedValues>
156749                <enumeratedValue>
156750                  <name>0</name>
156751                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156752                  <value>#0</value>
156753                </enumeratedValue>
156754                <enumeratedValue>
156755                  <name>1</name>
156756                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156757                  <value>#1</value>
156758                </enumeratedValue>
156759              </enumeratedValues>
156760            </field>
156761            <field>
156762              <name>PDD27</name>
156763              <description>Port Data Direction</description>
156764              <bitOffset>27</bitOffset>
156765              <bitWidth>1</bitWidth>
156766              <access>read-write</access>
156767              <enumeratedValues>
156768                <enumeratedValue>
156769                  <name>0</name>
156770                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156771                  <value>#0</value>
156772                </enumeratedValue>
156773                <enumeratedValue>
156774                  <name>1</name>
156775                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156776                  <value>#1</value>
156777                </enumeratedValue>
156778              </enumeratedValues>
156779            </field>
156780            <field>
156781              <name>PDD28</name>
156782              <description>Port Data Direction</description>
156783              <bitOffset>28</bitOffset>
156784              <bitWidth>1</bitWidth>
156785              <access>read-write</access>
156786              <enumeratedValues>
156787                <enumeratedValue>
156788                  <name>0</name>
156789                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156790                  <value>#0</value>
156791                </enumeratedValue>
156792                <enumeratedValue>
156793                  <name>1</name>
156794                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156795                  <value>#1</value>
156796                </enumeratedValue>
156797              </enumeratedValues>
156798            </field>
156799            <field>
156800              <name>PDD29</name>
156801              <description>Port Data Direction</description>
156802              <bitOffset>29</bitOffset>
156803              <bitWidth>1</bitWidth>
156804              <access>read-write</access>
156805              <enumeratedValues>
156806                <enumeratedValue>
156807                  <name>0</name>
156808                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156809                  <value>#0</value>
156810                </enumeratedValue>
156811                <enumeratedValue>
156812                  <name>1</name>
156813                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156814                  <value>#1</value>
156815                </enumeratedValue>
156816              </enumeratedValues>
156817            </field>
156818            <field>
156819              <name>PDD30</name>
156820              <description>Port Data Direction</description>
156821              <bitOffset>30</bitOffset>
156822              <bitWidth>1</bitWidth>
156823              <access>read-write</access>
156824              <enumeratedValues>
156825                <enumeratedValue>
156826                  <name>0</name>
156827                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156828                  <value>#0</value>
156829                </enumeratedValue>
156830                <enumeratedValue>
156831                  <name>1</name>
156832                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156833                  <value>#1</value>
156834                </enumeratedValue>
156835              </enumeratedValues>
156836            </field>
156837            <field>
156838              <name>PDD31</name>
156839              <description>Port Data Direction</description>
156840              <bitOffset>31</bitOffset>
156841              <bitWidth>1</bitWidth>
156842              <access>read-write</access>
156843              <enumeratedValues>
156844                <enumeratedValue>
156845                  <name>0</name>
156846                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
156847                  <value>#0</value>
156848                </enumeratedValue>
156849                <enumeratedValue>
156850                  <name>1</name>
156851                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
156852                  <value>#1</value>
156853                </enumeratedValue>
156854              </enumeratedValues>
156855            </field>
156856          </fields>
156857        </register>
156858      </registers>
156859    </peripheral>
156860    <peripheral>
156861      <name>GPIOB</name>
156862      <description>General Purpose Input/Output</description>
156863      <groupName>GPIO</groupName>
156864      <prependToName>GPIOB_</prependToName>
156865      <baseAddress>0x400FF040</baseAddress>
156866      <addressBlock>
156867        <offset>0</offset>
156868        <size>0x18</size>
156869        <usage>registers</usage>
156870      </addressBlock>
156871      <interrupt>
156872        <name>PORTB</name>
156873        <value>60</value>
156874      </interrupt>
156875      <registers>
156876        <register>
156877          <name>PDOR</name>
156878          <description>Port Data Output Register</description>
156879          <addressOffset>0</addressOffset>
156880          <size>32</size>
156881          <access>read-write</access>
156882          <resetValue>0</resetValue>
156883          <resetMask>0xFFFFFFFF</resetMask>
156884          <fields>
156885            <field>
156886              <name>PDO0</name>
156887              <description>Port Data Output</description>
156888              <bitOffset>0</bitOffset>
156889              <bitWidth>1</bitWidth>
156890              <access>read-write</access>
156891              <enumeratedValues>
156892                <enumeratedValue>
156893                  <name>0</name>
156894                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
156895                  <value>#0</value>
156896                </enumeratedValue>
156897                <enumeratedValue>
156898                  <name>1</name>
156899                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
156900                  <value>#1</value>
156901                </enumeratedValue>
156902              </enumeratedValues>
156903            </field>
156904            <field>
156905              <name>PDO1</name>
156906              <description>Port Data Output</description>
156907              <bitOffset>1</bitOffset>
156908              <bitWidth>1</bitWidth>
156909              <access>read-write</access>
156910              <enumeratedValues>
156911                <enumeratedValue>
156912                  <name>0</name>
156913                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
156914                  <value>#0</value>
156915                </enumeratedValue>
156916                <enumeratedValue>
156917                  <name>1</name>
156918                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
156919                  <value>#1</value>
156920                </enumeratedValue>
156921              </enumeratedValues>
156922            </field>
156923            <field>
156924              <name>PDO2</name>
156925              <description>Port Data Output</description>
156926              <bitOffset>2</bitOffset>
156927              <bitWidth>1</bitWidth>
156928              <access>read-write</access>
156929              <enumeratedValues>
156930                <enumeratedValue>
156931                  <name>0</name>
156932                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
156933                  <value>#0</value>
156934                </enumeratedValue>
156935                <enumeratedValue>
156936                  <name>1</name>
156937                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
156938                  <value>#1</value>
156939                </enumeratedValue>
156940              </enumeratedValues>
156941            </field>
156942            <field>
156943              <name>PDO3</name>
156944              <description>Port Data Output</description>
156945              <bitOffset>3</bitOffset>
156946              <bitWidth>1</bitWidth>
156947              <access>read-write</access>
156948              <enumeratedValues>
156949                <enumeratedValue>
156950                  <name>0</name>
156951                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
156952                  <value>#0</value>
156953                </enumeratedValue>
156954                <enumeratedValue>
156955                  <name>1</name>
156956                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
156957                  <value>#1</value>
156958                </enumeratedValue>
156959              </enumeratedValues>
156960            </field>
156961            <field>
156962              <name>PDO4</name>
156963              <description>Port Data Output</description>
156964              <bitOffset>4</bitOffset>
156965              <bitWidth>1</bitWidth>
156966              <access>read-write</access>
156967              <enumeratedValues>
156968                <enumeratedValue>
156969                  <name>0</name>
156970                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
156971                  <value>#0</value>
156972                </enumeratedValue>
156973                <enumeratedValue>
156974                  <name>1</name>
156975                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
156976                  <value>#1</value>
156977                </enumeratedValue>
156978              </enumeratedValues>
156979            </field>
156980            <field>
156981              <name>PDO5</name>
156982              <description>Port Data Output</description>
156983              <bitOffset>5</bitOffset>
156984              <bitWidth>1</bitWidth>
156985              <access>read-write</access>
156986              <enumeratedValues>
156987                <enumeratedValue>
156988                  <name>0</name>
156989                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
156990                  <value>#0</value>
156991                </enumeratedValue>
156992                <enumeratedValue>
156993                  <name>1</name>
156994                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
156995                  <value>#1</value>
156996                </enumeratedValue>
156997              </enumeratedValues>
156998            </field>
156999            <field>
157000              <name>PDO6</name>
157001              <description>Port Data Output</description>
157002              <bitOffset>6</bitOffset>
157003              <bitWidth>1</bitWidth>
157004              <access>read-write</access>
157005              <enumeratedValues>
157006                <enumeratedValue>
157007                  <name>0</name>
157008                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157009                  <value>#0</value>
157010                </enumeratedValue>
157011                <enumeratedValue>
157012                  <name>1</name>
157013                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157014                  <value>#1</value>
157015                </enumeratedValue>
157016              </enumeratedValues>
157017            </field>
157018            <field>
157019              <name>PDO7</name>
157020              <description>Port Data Output</description>
157021              <bitOffset>7</bitOffset>
157022              <bitWidth>1</bitWidth>
157023              <access>read-write</access>
157024              <enumeratedValues>
157025                <enumeratedValue>
157026                  <name>0</name>
157027                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157028                  <value>#0</value>
157029                </enumeratedValue>
157030                <enumeratedValue>
157031                  <name>1</name>
157032                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157033                  <value>#1</value>
157034                </enumeratedValue>
157035              </enumeratedValues>
157036            </field>
157037            <field>
157038              <name>PDO8</name>
157039              <description>Port Data Output</description>
157040              <bitOffset>8</bitOffset>
157041              <bitWidth>1</bitWidth>
157042              <access>read-write</access>
157043              <enumeratedValues>
157044                <enumeratedValue>
157045                  <name>0</name>
157046                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157047                  <value>#0</value>
157048                </enumeratedValue>
157049                <enumeratedValue>
157050                  <name>1</name>
157051                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157052                  <value>#1</value>
157053                </enumeratedValue>
157054              </enumeratedValues>
157055            </field>
157056            <field>
157057              <name>PDO9</name>
157058              <description>Port Data Output</description>
157059              <bitOffset>9</bitOffset>
157060              <bitWidth>1</bitWidth>
157061              <access>read-write</access>
157062              <enumeratedValues>
157063                <enumeratedValue>
157064                  <name>0</name>
157065                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157066                  <value>#0</value>
157067                </enumeratedValue>
157068                <enumeratedValue>
157069                  <name>1</name>
157070                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157071                  <value>#1</value>
157072                </enumeratedValue>
157073              </enumeratedValues>
157074            </field>
157075            <field>
157076              <name>PDO10</name>
157077              <description>Port Data Output</description>
157078              <bitOffset>10</bitOffset>
157079              <bitWidth>1</bitWidth>
157080              <access>read-write</access>
157081              <enumeratedValues>
157082                <enumeratedValue>
157083                  <name>0</name>
157084                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157085                  <value>#0</value>
157086                </enumeratedValue>
157087                <enumeratedValue>
157088                  <name>1</name>
157089                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157090                  <value>#1</value>
157091                </enumeratedValue>
157092              </enumeratedValues>
157093            </field>
157094            <field>
157095              <name>PDO11</name>
157096              <description>Port Data Output</description>
157097              <bitOffset>11</bitOffset>
157098              <bitWidth>1</bitWidth>
157099              <access>read-write</access>
157100              <enumeratedValues>
157101                <enumeratedValue>
157102                  <name>0</name>
157103                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157104                  <value>#0</value>
157105                </enumeratedValue>
157106                <enumeratedValue>
157107                  <name>1</name>
157108                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157109                  <value>#1</value>
157110                </enumeratedValue>
157111              </enumeratedValues>
157112            </field>
157113            <field>
157114              <name>PDO12</name>
157115              <description>Port Data Output</description>
157116              <bitOffset>12</bitOffset>
157117              <bitWidth>1</bitWidth>
157118              <access>read-write</access>
157119              <enumeratedValues>
157120                <enumeratedValue>
157121                  <name>0</name>
157122                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157123                  <value>#0</value>
157124                </enumeratedValue>
157125                <enumeratedValue>
157126                  <name>1</name>
157127                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157128                  <value>#1</value>
157129                </enumeratedValue>
157130              </enumeratedValues>
157131            </field>
157132            <field>
157133              <name>PDO13</name>
157134              <description>Port Data Output</description>
157135              <bitOffset>13</bitOffset>
157136              <bitWidth>1</bitWidth>
157137              <access>read-write</access>
157138              <enumeratedValues>
157139                <enumeratedValue>
157140                  <name>0</name>
157141                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157142                  <value>#0</value>
157143                </enumeratedValue>
157144                <enumeratedValue>
157145                  <name>1</name>
157146                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157147                  <value>#1</value>
157148                </enumeratedValue>
157149              </enumeratedValues>
157150            </field>
157151            <field>
157152              <name>PDO14</name>
157153              <description>Port Data Output</description>
157154              <bitOffset>14</bitOffset>
157155              <bitWidth>1</bitWidth>
157156              <access>read-write</access>
157157              <enumeratedValues>
157158                <enumeratedValue>
157159                  <name>0</name>
157160                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157161                  <value>#0</value>
157162                </enumeratedValue>
157163                <enumeratedValue>
157164                  <name>1</name>
157165                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157166                  <value>#1</value>
157167                </enumeratedValue>
157168              </enumeratedValues>
157169            </field>
157170            <field>
157171              <name>PDO15</name>
157172              <description>Port Data Output</description>
157173              <bitOffset>15</bitOffset>
157174              <bitWidth>1</bitWidth>
157175              <access>read-write</access>
157176              <enumeratedValues>
157177                <enumeratedValue>
157178                  <name>0</name>
157179                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157180                  <value>#0</value>
157181                </enumeratedValue>
157182                <enumeratedValue>
157183                  <name>1</name>
157184                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157185                  <value>#1</value>
157186                </enumeratedValue>
157187              </enumeratedValues>
157188            </field>
157189            <field>
157190              <name>PDO16</name>
157191              <description>Port Data Output</description>
157192              <bitOffset>16</bitOffset>
157193              <bitWidth>1</bitWidth>
157194              <access>read-write</access>
157195              <enumeratedValues>
157196                <enumeratedValue>
157197                  <name>0</name>
157198                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157199                  <value>#0</value>
157200                </enumeratedValue>
157201                <enumeratedValue>
157202                  <name>1</name>
157203                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157204                  <value>#1</value>
157205                </enumeratedValue>
157206              </enumeratedValues>
157207            </field>
157208            <field>
157209              <name>PDO17</name>
157210              <description>Port Data Output</description>
157211              <bitOffset>17</bitOffset>
157212              <bitWidth>1</bitWidth>
157213              <access>read-write</access>
157214              <enumeratedValues>
157215                <enumeratedValue>
157216                  <name>0</name>
157217                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157218                  <value>#0</value>
157219                </enumeratedValue>
157220                <enumeratedValue>
157221                  <name>1</name>
157222                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157223                  <value>#1</value>
157224                </enumeratedValue>
157225              </enumeratedValues>
157226            </field>
157227            <field>
157228              <name>PDO18</name>
157229              <description>Port Data Output</description>
157230              <bitOffset>18</bitOffset>
157231              <bitWidth>1</bitWidth>
157232              <access>read-write</access>
157233              <enumeratedValues>
157234                <enumeratedValue>
157235                  <name>0</name>
157236                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157237                  <value>#0</value>
157238                </enumeratedValue>
157239                <enumeratedValue>
157240                  <name>1</name>
157241                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157242                  <value>#1</value>
157243                </enumeratedValue>
157244              </enumeratedValues>
157245            </field>
157246            <field>
157247              <name>PDO19</name>
157248              <description>Port Data Output</description>
157249              <bitOffset>19</bitOffset>
157250              <bitWidth>1</bitWidth>
157251              <access>read-write</access>
157252              <enumeratedValues>
157253                <enumeratedValue>
157254                  <name>0</name>
157255                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157256                  <value>#0</value>
157257                </enumeratedValue>
157258                <enumeratedValue>
157259                  <name>1</name>
157260                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157261                  <value>#1</value>
157262                </enumeratedValue>
157263              </enumeratedValues>
157264            </field>
157265            <field>
157266              <name>PDO20</name>
157267              <description>Port Data Output</description>
157268              <bitOffset>20</bitOffset>
157269              <bitWidth>1</bitWidth>
157270              <access>read-write</access>
157271              <enumeratedValues>
157272                <enumeratedValue>
157273                  <name>0</name>
157274                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157275                  <value>#0</value>
157276                </enumeratedValue>
157277                <enumeratedValue>
157278                  <name>1</name>
157279                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157280                  <value>#1</value>
157281                </enumeratedValue>
157282              </enumeratedValues>
157283            </field>
157284            <field>
157285              <name>PDO21</name>
157286              <description>Port Data Output</description>
157287              <bitOffset>21</bitOffset>
157288              <bitWidth>1</bitWidth>
157289              <access>read-write</access>
157290              <enumeratedValues>
157291                <enumeratedValue>
157292                  <name>0</name>
157293                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157294                  <value>#0</value>
157295                </enumeratedValue>
157296                <enumeratedValue>
157297                  <name>1</name>
157298                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157299                  <value>#1</value>
157300                </enumeratedValue>
157301              </enumeratedValues>
157302            </field>
157303            <field>
157304              <name>PDO22</name>
157305              <description>Port Data Output</description>
157306              <bitOffset>22</bitOffset>
157307              <bitWidth>1</bitWidth>
157308              <access>read-write</access>
157309              <enumeratedValues>
157310                <enumeratedValue>
157311                  <name>0</name>
157312                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157313                  <value>#0</value>
157314                </enumeratedValue>
157315                <enumeratedValue>
157316                  <name>1</name>
157317                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157318                  <value>#1</value>
157319                </enumeratedValue>
157320              </enumeratedValues>
157321            </field>
157322            <field>
157323              <name>PDO23</name>
157324              <description>Port Data Output</description>
157325              <bitOffset>23</bitOffset>
157326              <bitWidth>1</bitWidth>
157327              <access>read-write</access>
157328              <enumeratedValues>
157329                <enumeratedValue>
157330                  <name>0</name>
157331                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157332                  <value>#0</value>
157333                </enumeratedValue>
157334                <enumeratedValue>
157335                  <name>1</name>
157336                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157337                  <value>#1</value>
157338                </enumeratedValue>
157339              </enumeratedValues>
157340            </field>
157341            <field>
157342              <name>PDO24</name>
157343              <description>Port Data Output</description>
157344              <bitOffset>24</bitOffset>
157345              <bitWidth>1</bitWidth>
157346              <access>read-write</access>
157347              <enumeratedValues>
157348                <enumeratedValue>
157349                  <name>0</name>
157350                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157351                  <value>#0</value>
157352                </enumeratedValue>
157353                <enumeratedValue>
157354                  <name>1</name>
157355                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157356                  <value>#1</value>
157357                </enumeratedValue>
157358              </enumeratedValues>
157359            </field>
157360            <field>
157361              <name>PDO25</name>
157362              <description>Port Data Output</description>
157363              <bitOffset>25</bitOffset>
157364              <bitWidth>1</bitWidth>
157365              <access>read-write</access>
157366              <enumeratedValues>
157367                <enumeratedValue>
157368                  <name>0</name>
157369                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157370                  <value>#0</value>
157371                </enumeratedValue>
157372                <enumeratedValue>
157373                  <name>1</name>
157374                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157375                  <value>#1</value>
157376                </enumeratedValue>
157377              </enumeratedValues>
157378            </field>
157379            <field>
157380              <name>PDO26</name>
157381              <description>Port Data Output</description>
157382              <bitOffset>26</bitOffset>
157383              <bitWidth>1</bitWidth>
157384              <access>read-write</access>
157385              <enumeratedValues>
157386                <enumeratedValue>
157387                  <name>0</name>
157388                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157389                  <value>#0</value>
157390                </enumeratedValue>
157391                <enumeratedValue>
157392                  <name>1</name>
157393                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157394                  <value>#1</value>
157395                </enumeratedValue>
157396              </enumeratedValues>
157397            </field>
157398            <field>
157399              <name>PDO27</name>
157400              <description>Port Data Output</description>
157401              <bitOffset>27</bitOffset>
157402              <bitWidth>1</bitWidth>
157403              <access>read-write</access>
157404              <enumeratedValues>
157405                <enumeratedValue>
157406                  <name>0</name>
157407                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157408                  <value>#0</value>
157409                </enumeratedValue>
157410                <enumeratedValue>
157411                  <name>1</name>
157412                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157413                  <value>#1</value>
157414                </enumeratedValue>
157415              </enumeratedValues>
157416            </field>
157417            <field>
157418              <name>PDO28</name>
157419              <description>Port Data Output</description>
157420              <bitOffset>28</bitOffset>
157421              <bitWidth>1</bitWidth>
157422              <access>read-write</access>
157423              <enumeratedValues>
157424                <enumeratedValue>
157425                  <name>0</name>
157426                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157427                  <value>#0</value>
157428                </enumeratedValue>
157429                <enumeratedValue>
157430                  <name>1</name>
157431                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157432                  <value>#1</value>
157433                </enumeratedValue>
157434              </enumeratedValues>
157435            </field>
157436            <field>
157437              <name>PDO29</name>
157438              <description>Port Data Output</description>
157439              <bitOffset>29</bitOffset>
157440              <bitWidth>1</bitWidth>
157441              <access>read-write</access>
157442              <enumeratedValues>
157443                <enumeratedValue>
157444                  <name>0</name>
157445                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157446                  <value>#0</value>
157447                </enumeratedValue>
157448                <enumeratedValue>
157449                  <name>1</name>
157450                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157451                  <value>#1</value>
157452                </enumeratedValue>
157453              </enumeratedValues>
157454            </field>
157455            <field>
157456              <name>PDO30</name>
157457              <description>Port Data Output</description>
157458              <bitOffset>30</bitOffset>
157459              <bitWidth>1</bitWidth>
157460              <access>read-write</access>
157461              <enumeratedValues>
157462                <enumeratedValue>
157463                  <name>0</name>
157464                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157465                  <value>#0</value>
157466                </enumeratedValue>
157467                <enumeratedValue>
157468                  <name>1</name>
157469                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157470                  <value>#1</value>
157471                </enumeratedValue>
157472              </enumeratedValues>
157473            </field>
157474            <field>
157475              <name>PDO31</name>
157476              <description>Port Data Output</description>
157477              <bitOffset>31</bitOffset>
157478              <bitWidth>1</bitWidth>
157479              <access>read-write</access>
157480              <enumeratedValues>
157481                <enumeratedValue>
157482                  <name>0</name>
157483                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
157484                  <value>#0</value>
157485                </enumeratedValue>
157486                <enumeratedValue>
157487                  <name>1</name>
157488                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
157489                  <value>#1</value>
157490                </enumeratedValue>
157491              </enumeratedValues>
157492            </field>
157493          </fields>
157494        </register>
157495        <register>
157496          <name>PSOR</name>
157497          <description>Port Set Output Register</description>
157498          <addressOffset>0x4</addressOffset>
157499          <size>32</size>
157500          <access>write-only</access>
157501          <resetValue>0</resetValue>
157502          <resetMask>0xFFFFFFFF</resetMask>
157503          <fields>
157504            <field>
157505              <name>PTSO0</name>
157506              <description>Port Set Output</description>
157507              <bitOffset>0</bitOffset>
157508              <bitWidth>1</bitWidth>
157509              <access>write-only</access>
157510              <enumeratedValues>
157511                <enumeratedValue>
157512                  <name>0</name>
157513                  <description>Corresponding bit in PDORn does not change.</description>
157514                  <value>#0</value>
157515                </enumeratedValue>
157516                <enumeratedValue>
157517                  <name>1</name>
157518                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157519                  <value>#1</value>
157520                </enumeratedValue>
157521              </enumeratedValues>
157522            </field>
157523            <field>
157524              <name>PTSO1</name>
157525              <description>Port Set Output</description>
157526              <bitOffset>1</bitOffset>
157527              <bitWidth>1</bitWidth>
157528              <access>write-only</access>
157529              <enumeratedValues>
157530                <enumeratedValue>
157531                  <name>0</name>
157532                  <description>Corresponding bit in PDORn does not change.</description>
157533                  <value>#0</value>
157534                </enumeratedValue>
157535                <enumeratedValue>
157536                  <name>1</name>
157537                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157538                  <value>#1</value>
157539                </enumeratedValue>
157540              </enumeratedValues>
157541            </field>
157542            <field>
157543              <name>PTSO2</name>
157544              <description>Port Set Output</description>
157545              <bitOffset>2</bitOffset>
157546              <bitWidth>1</bitWidth>
157547              <access>write-only</access>
157548              <enumeratedValues>
157549                <enumeratedValue>
157550                  <name>0</name>
157551                  <description>Corresponding bit in PDORn does not change.</description>
157552                  <value>#0</value>
157553                </enumeratedValue>
157554                <enumeratedValue>
157555                  <name>1</name>
157556                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157557                  <value>#1</value>
157558                </enumeratedValue>
157559              </enumeratedValues>
157560            </field>
157561            <field>
157562              <name>PTSO3</name>
157563              <description>Port Set Output</description>
157564              <bitOffset>3</bitOffset>
157565              <bitWidth>1</bitWidth>
157566              <access>write-only</access>
157567              <enumeratedValues>
157568                <enumeratedValue>
157569                  <name>0</name>
157570                  <description>Corresponding bit in PDORn does not change.</description>
157571                  <value>#0</value>
157572                </enumeratedValue>
157573                <enumeratedValue>
157574                  <name>1</name>
157575                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157576                  <value>#1</value>
157577                </enumeratedValue>
157578              </enumeratedValues>
157579            </field>
157580            <field>
157581              <name>PTSO4</name>
157582              <description>Port Set Output</description>
157583              <bitOffset>4</bitOffset>
157584              <bitWidth>1</bitWidth>
157585              <access>write-only</access>
157586              <enumeratedValues>
157587                <enumeratedValue>
157588                  <name>0</name>
157589                  <description>Corresponding bit in PDORn does not change.</description>
157590                  <value>#0</value>
157591                </enumeratedValue>
157592                <enumeratedValue>
157593                  <name>1</name>
157594                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157595                  <value>#1</value>
157596                </enumeratedValue>
157597              </enumeratedValues>
157598            </field>
157599            <field>
157600              <name>PTSO5</name>
157601              <description>Port Set Output</description>
157602              <bitOffset>5</bitOffset>
157603              <bitWidth>1</bitWidth>
157604              <access>write-only</access>
157605              <enumeratedValues>
157606                <enumeratedValue>
157607                  <name>0</name>
157608                  <description>Corresponding bit in PDORn does not change.</description>
157609                  <value>#0</value>
157610                </enumeratedValue>
157611                <enumeratedValue>
157612                  <name>1</name>
157613                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157614                  <value>#1</value>
157615                </enumeratedValue>
157616              </enumeratedValues>
157617            </field>
157618            <field>
157619              <name>PTSO6</name>
157620              <description>Port Set Output</description>
157621              <bitOffset>6</bitOffset>
157622              <bitWidth>1</bitWidth>
157623              <access>write-only</access>
157624              <enumeratedValues>
157625                <enumeratedValue>
157626                  <name>0</name>
157627                  <description>Corresponding bit in PDORn does not change.</description>
157628                  <value>#0</value>
157629                </enumeratedValue>
157630                <enumeratedValue>
157631                  <name>1</name>
157632                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157633                  <value>#1</value>
157634                </enumeratedValue>
157635              </enumeratedValues>
157636            </field>
157637            <field>
157638              <name>PTSO7</name>
157639              <description>Port Set Output</description>
157640              <bitOffset>7</bitOffset>
157641              <bitWidth>1</bitWidth>
157642              <access>write-only</access>
157643              <enumeratedValues>
157644                <enumeratedValue>
157645                  <name>0</name>
157646                  <description>Corresponding bit in PDORn does not change.</description>
157647                  <value>#0</value>
157648                </enumeratedValue>
157649                <enumeratedValue>
157650                  <name>1</name>
157651                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157652                  <value>#1</value>
157653                </enumeratedValue>
157654              </enumeratedValues>
157655            </field>
157656            <field>
157657              <name>PTSO8</name>
157658              <description>Port Set Output</description>
157659              <bitOffset>8</bitOffset>
157660              <bitWidth>1</bitWidth>
157661              <access>write-only</access>
157662              <enumeratedValues>
157663                <enumeratedValue>
157664                  <name>0</name>
157665                  <description>Corresponding bit in PDORn does not change.</description>
157666                  <value>#0</value>
157667                </enumeratedValue>
157668                <enumeratedValue>
157669                  <name>1</name>
157670                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157671                  <value>#1</value>
157672                </enumeratedValue>
157673              </enumeratedValues>
157674            </field>
157675            <field>
157676              <name>PTSO9</name>
157677              <description>Port Set Output</description>
157678              <bitOffset>9</bitOffset>
157679              <bitWidth>1</bitWidth>
157680              <access>write-only</access>
157681              <enumeratedValues>
157682                <enumeratedValue>
157683                  <name>0</name>
157684                  <description>Corresponding bit in PDORn does not change.</description>
157685                  <value>#0</value>
157686                </enumeratedValue>
157687                <enumeratedValue>
157688                  <name>1</name>
157689                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157690                  <value>#1</value>
157691                </enumeratedValue>
157692              </enumeratedValues>
157693            </field>
157694            <field>
157695              <name>PTSO10</name>
157696              <description>Port Set Output</description>
157697              <bitOffset>10</bitOffset>
157698              <bitWidth>1</bitWidth>
157699              <access>write-only</access>
157700              <enumeratedValues>
157701                <enumeratedValue>
157702                  <name>0</name>
157703                  <description>Corresponding bit in PDORn does not change.</description>
157704                  <value>#0</value>
157705                </enumeratedValue>
157706                <enumeratedValue>
157707                  <name>1</name>
157708                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157709                  <value>#1</value>
157710                </enumeratedValue>
157711              </enumeratedValues>
157712            </field>
157713            <field>
157714              <name>PTSO11</name>
157715              <description>Port Set Output</description>
157716              <bitOffset>11</bitOffset>
157717              <bitWidth>1</bitWidth>
157718              <access>write-only</access>
157719              <enumeratedValues>
157720                <enumeratedValue>
157721                  <name>0</name>
157722                  <description>Corresponding bit in PDORn does not change.</description>
157723                  <value>#0</value>
157724                </enumeratedValue>
157725                <enumeratedValue>
157726                  <name>1</name>
157727                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157728                  <value>#1</value>
157729                </enumeratedValue>
157730              </enumeratedValues>
157731            </field>
157732            <field>
157733              <name>PTSO12</name>
157734              <description>Port Set Output</description>
157735              <bitOffset>12</bitOffset>
157736              <bitWidth>1</bitWidth>
157737              <access>write-only</access>
157738              <enumeratedValues>
157739                <enumeratedValue>
157740                  <name>0</name>
157741                  <description>Corresponding bit in PDORn does not change.</description>
157742                  <value>#0</value>
157743                </enumeratedValue>
157744                <enumeratedValue>
157745                  <name>1</name>
157746                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157747                  <value>#1</value>
157748                </enumeratedValue>
157749              </enumeratedValues>
157750            </field>
157751            <field>
157752              <name>PTSO13</name>
157753              <description>Port Set Output</description>
157754              <bitOffset>13</bitOffset>
157755              <bitWidth>1</bitWidth>
157756              <access>write-only</access>
157757              <enumeratedValues>
157758                <enumeratedValue>
157759                  <name>0</name>
157760                  <description>Corresponding bit in PDORn does not change.</description>
157761                  <value>#0</value>
157762                </enumeratedValue>
157763                <enumeratedValue>
157764                  <name>1</name>
157765                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157766                  <value>#1</value>
157767                </enumeratedValue>
157768              </enumeratedValues>
157769            </field>
157770            <field>
157771              <name>PTSO14</name>
157772              <description>Port Set Output</description>
157773              <bitOffset>14</bitOffset>
157774              <bitWidth>1</bitWidth>
157775              <access>write-only</access>
157776              <enumeratedValues>
157777                <enumeratedValue>
157778                  <name>0</name>
157779                  <description>Corresponding bit in PDORn does not change.</description>
157780                  <value>#0</value>
157781                </enumeratedValue>
157782                <enumeratedValue>
157783                  <name>1</name>
157784                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157785                  <value>#1</value>
157786                </enumeratedValue>
157787              </enumeratedValues>
157788            </field>
157789            <field>
157790              <name>PTSO15</name>
157791              <description>Port Set Output</description>
157792              <bitOffset>15</bitOffset>
157793              <bitWidth>1</bitWidth>
157794              <access>write-only</access>
157795              <enumeratedValues>
157796                <enumeratedValue>
157797                  <name>0</name>
157798                  <description>Corresponding bit in PDORn does not change.</description>
157799                  <value>#0</value>
157800                </enumeratedValue>
157801                <enumeratedValue>
157802                  <name>1</name>
157803                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157804                  <value>#1</value>
157805                </enumeratedValue>
157806              </enumeratedValues>
157807            </field>
157808            <field>
157809              <name>PTSO16</name>
157810              <description>Port Set Output</description>
157811              <bitOffset>16</bitOffset>
157812              <bitWidth>1</bitWidth>
157813              <access>write-only</access>
157814              <enumeratedValues>
157815                <enumeratedValue>
157816                  <name>0</name>
157817                  <description>Corresponding bit in PDORn does not change.</description>
157818                  <value>#0</value>
157819                </enumeratedValue>
157820                <enumeratedValue>
157821                  <name>1</name>
157822                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157823                  <value>#1</value>
157824                </enumeratedValue>
157825              </enumeratedValues>
157826            </field>
157827            <field>
157828              <name>PTSO17</name>
157829              <description>Port Set Output</description>
157830              <bitOffset>17</bitOffset>
157831              <bitWidth>1</bitWidth>
157832              <access>write-only</access>
157833              <enumeratedValues>
157834                <enumeratedValue>
157835                  <name>0</name>
157836                  <description>Corresponding bit in PDORn does not change.</description>
157837                  <value>#0</value>
157838                </enumeratedValue>
157839                <enumeratedValue>
157840                  <name>1</name>
157841                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157842                  <value>#1</value>
157843                </enumeratedValue>
157844              </enumeratedValues>
157845            </field>
157846            <field>
157847              <name>PTSO18</name>
157848              <description>Port Set Output</description>
157849              <bitOffset>18</bitOffset>
157850              <bitWidth>1</bitWidth>
157851              <access>write-only</access>
157852              <enumeratedValues>
157853                <enumeratedValue>
157854                  <name>0</name>
157855                  <description>Corresponding bit in PDORn does not change.</description>
157856                  <value>#0</value>
157857                </enumeratedValue>
157858                <enumeratedValue>
157859                  <name>1</name>
157860                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157861                  <value>#1</value>
157862                </enumeratedValue>
157863              </enumeratedValues>
157864            </field>
157865            <field>
157866              <name>PTSO19</name>
157867              <description>Port Set Output</description>
157868              <bitOffset>19</bitOffset>
157869              <bitWidth>1</bitWidth>
157870              <access>write-only</access>
157871              <enumeratedValues>
157872                <enumeratedValue>
157873                  <name>0</name>
157874                  <description>Corresponding bit in PDORn does not change.</description>
157875                  <value>#0</value>
157876                </enumeratedValue>
157877                <enumeratedValue>
157878                  <name>1</name>
157879                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157880                  <value>#1</value>
157881                </enumeratedValue>
157882              </enumeratedValues>
157883            </field>
157884            <field>
157885              <name>PTSO20</name>
157886              <description>Port Set Output</description>
157887              <bitOffset>20</bitOffset>
157888              <bitWidth>1</bitWidth>
157889              <access>write-only</access>
157890              <enumeratedValues>
157891                <enumeratedValue>
157892                  <name>0</name>
157893                  <description>Corresponding bit in PDORn does not change.</description>
157894                  <value>#0</value>
157895                </enumeratedValue>
157896                <enumeratedValue>
157897                  <name>1</name>
157898                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157899                  <value>#1</value>
157900                </enumeratedValue>
157901              </enumeratedValues>
157902            </field>
157903            <field>
157904              <name>PTSO21</name>
157905              <description>Port Set Output</description>
157906              <bitOffset>21</bitOffset>
157907              <bitWidth>1</bitWidth>
157908              <access>write-only</access>
157909              <enumeratedValues>
157910                <enumeratedValue>
157911                  <name>0</name>
157912                  <description>Corresponding bit in PDORn does not change.</description>
157913                  <value>#0</value>
157914                </enumeratedValue>
157915                <enumeratedValue>
157916                  <name>1</name>
157917                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157918                  <value>#1</value>
157919                </enumeratedValue>
157920              </enumeratedValues>
157921            </field>
157922            <field>
157923              <name>PTSO22</name>
157924              <description>Port Set Output</description>
157925              <bitOffset>22</bitOffset>
157926              <bitWidth>1</bitWidth>
157927              <access>write-only</access>
157928              <enumeratedValues>
157929                <enumeratedValue>
157930                  <name>0</name>
157931                  <description>Corresponding bit in PDORn does not change.</description>
157932                  <value>#0</value>
157933                </enumeratedValue>
157934                <enumeratedValue>
157935                  <name>1</name>
157936                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157937                  <value>#1</value>
157938                </enumeratedValue>
157939              </enumeratedValues>
157940            </field>
157941            <field>
157942              <name>PTSO23</name>
157943              <description>Port Set Output</description>
157944              <bitOffset>23</bitOffset>
157945              <bitWidth>1</bitWidth>
157946              <access>write-only</access>
157947              <enumeratedValues>
157948                <enumeratedValue>
157949                  <name>0</name>
157950                  <description>Corresponding bit in PDORn does not change.</description>
157951                  <value>#0</value>
157952                </enumeratedValue>
157953                <enumeratedValue>
157954                  <name>1</name>
157955                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157956                  <value>#1</value>
157957                </enumeratedValue>
157958              </enumeratedValues>
157959            </field>
157960            <field>
157961              <name>PTSO24</name>
157962              <description>Port Set Output</description>
157963              <bitOffset>24</bitOffset>
157964              <bitWidth>1</bitWidth>
157965              <access>write-only</access>
157966              <enumeratedValues>
157967                <enumeratedValue>
157968                  <name>0</name>
157969                  <description>Corresponding bit in PDORn does not change.</description>
157970                  <value>#0</value>
157971                </enumeratedValue>
157972                <enumeratedValue>
157973                  <name>1</name>
157974                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157975                  <value>#1</value>
157976                </enumeratedValue>
157977              </enumeratedValues>
157978            </field>
157979            <field>
157980              <name>PTSO25</name>
157981              <description>Port Set Output</description>
157982              <bitOffset>25</bitOffset>
157983              <bitWidth>1</bitWidth>
157984              <access>write-only</access>
157985              <enumeratedValues>
157986                <enumeratedValue>
157987                  <name>0</name>
157988                  <description>Corresponding bit in PDORn does not change.</description>
157989                  <value>#0</value>
157990                </enumeratedValue>
157991                <enumeratedValue>
157992                  <name>1</name>
157993                  <description>Corresponding bit in PDORn is set to logic 1.</description>
157994                  <value>#1</value>
157995                </enumeratedValue>
157996              </enumeratedValues>
157997            </field>
157998            <field>
157999              <name>PTSO26</name>
158000              <description>Port Set Output</description>
158001              <bitOffset>26</bitOffset>
158002              <bitWidth>1</bitWidth>
158003              <access>write-only</access>
158004              <enumeratedValues>
158005                <enumeratedValue>
158006                  <name>0</name>
158007                  <description>Corresponding bit in PDORn does not change.</description>
158008                  <value>#0</value>
158009                </enumeratedValue>
158010                <enumeratedValue>
158011                  <name>1</name>
158012                  <description>Corresponding bit in PDORn is set to logic 1.</description>
158013                  <value>#1</value>
158014                </enumeratedValue>
158015              </enumeratedValues>
158016            </field>
158017            <field>
158018              <name>PTSO27</name>
158019              <description>Port Set Output</description>
158020              <bitOffset>27</bitOffset>
158021              <bitWidth>1</bitWidth>
158022              <access>write-only</access>
158023              <enumeratedValues>
158024                <enumeratedValue>
158025                  <name>0</name>
158026                  <description>Corresponding bit in PDORn does not change.</description>
158027                  <value>#0</value>
158028                </enumeratedValue>
158029                <enumeratedValue>
158030                  <name>1</name>
158031                  <description>Corresponding bit in PDORn is set to logic 1.</description>
158032                  <value>#1</value>
158033                </enumeratedValue>
158034              </enumeratedValues>
158035            </field>
158036            <field>
158037              <name>PTSO28</name>
158038              <description>Port Set Output</description>
158039              <bitOffset>28</bitOffset>
158040              <bitWidth>1</bitWidth>
158041              <access>write-only</access>
158042              <enumeratedValues>
158043                <enumeratedValue>
158044                  <name>0</name>
158045                  <description>Corresponding bit in PDORn does not change.</description>
158046                  <value>#0</value>
158047                </enumeratedValue>
158048                <enumeratedValue>
158049                  <name>1</name>
158050                  <description>Corresponding bit in PDORn is set to logic 1.</description>
158051                  <value>#1</value>
158052                </enumeratedValue>
158053              </enumeratedValues>
158054            </field>
158055            <field>
158056              <name>PTSO29</name>
158057              <description>Port Set Output</description>
158058              <bitOffset>29</bitOffset>
158059              <bitWidth>1</bitWidth>
158060              <access>write-only</access>
158061              <enumeratedValues>
158062                <enumeratedValue>
158063                  <name>0</name>
158064                  <description>Corresponding bit in PDORn does not change.</description>
158065                  <value>#0</value>
158066                </enumeratedValue>
158067                <enumeratedValue>
158068                  <name>1</name>
158069                  <description>Corresponding bit in PDORn is set to logic 1.</description>
158070                  <value>#1</value>
158071                </enumeratedValue>
158072              </enumeratedValues>
158073            </field>
158074            <field>
158075              <name>PTSO30</name>
158076              <description>Port Set Output</description>
158077              <bitOffset>30</bitOffset>
158078              <bitWidth>1</bitWidth>
158079              <access>write-only</access>
158080              <enumeratedValues>
158081                <enumeratedValue>
158082                  <name>0</name>
158083                  <description>Corresponding bit in PDORn does not change.</description>
158084                  <value>#0</value>
158085                </enumeratedValue>
158086                <enumeratedValue>
158087                  <name>1</name>
158088                  <description>Corresponding bit in PDORn is set to logic 1.</description>
158089                  <value>#1</value>
158090                </enumeratedValue>
158091              </enumeratedValues>
158092            </field>
158093            <field>
158094              <name>PTSO31</name>
158095              <description>Port Set Output</description>
158096              <bitOffset>31</bitOffset>
158097              <bitWidth>1</bitWidth>
158098              <access>write-only</access>
158099              <enumeratedValues>
158100                <enumeratedValue>
158101                  <name>0</name>
158102                  <description>Corresponding bit in PDORn does not change.</description>
158103                  <value>#0</value>
158104                </enumeratedValue>
158105                <enumeratedValue>
158106                  <name>1</name>
158107                  <description>Corresponding bit in PDORn is set to logic 1.</description>
158108                  <value>#1</value>
158109                </enumeratedValue>
158110              </enumeratedValues>
158111            </field>
158112          </fields>
158113        </register>
158114        <register>
158115          <name>PCOR</name>
158116          <description>Port Clear Output Register</description>
158117          <addressOffset>0x8</addressOffset>
158118          <size>32</size>
158119          <access>write-only</access>
158120          <resetValue>0</resetValue>
158121          <resetMask>0xFFFFFFFF</resetMask>
158122          <fields>
158123            <field>
158124              <name>PTCO0</name>
158125              <description>Port Clear Output</description>
158126              <bitOffset>0</bitOffset>
158127              <bitWidth>1</bitWidth>
158128              <access>write-only</access>
158129              <enumeratedValues>
158130                <enumeratedValue>
158131                  <name>0</name>
158132                  <description>Corresponding bit in PDORn does not change.</description>
158133                  <value>#0</value>
158134                </enumeratedValue>
158135                <enumeratedValue>
158136                  <name>1</name>
158137                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158138                  <value>#1</value>
158139                </enumeratedValue>
158140              </enumeratedValues>
158141            </field>
158142            <field>
158143              <name>PTCO1</name>
158144              <description>Port Clear Output</description>
158145              <bitOffset>1</bitOffset>
158146              <bitWidth>1</bitWidth>
158147              <access>write-only</access>
158148              <enumeratedValues>
158149                <enumeratedValue>
158150                  <name>0</name>
158151                  <description>Corresponding bit in PDORn does not change.</description>
158152                  <value>#0</value>
158153                </enumeratedValue>
158154                <enumeratedValue>
158155                  <name>1</name>
158156                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158157                  <value>#1</value>
158158                </enumeratedValue>
158159              </enumeratedValues>
158160            </field>
158161            <field>
158162              <name>PTCO2</name>
158163              <description>Port Clear Output</description>
158164              <bitOffset>2</bitOffset>
158165              <bitWidth>1</bitWidth>
158166              <access>write-only</access>
158167              <enumeratedValues>
158168                <enumeratedValue>
158169                  <name>0</name>
158170                  <description>Corresponding bit in PDORn does not change.</description>
158171                  <value>#0</value>
158172                </enumeratedValue>
158173                <enumeratedValue>
158174                  <name>1</name>
158175                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158176                  <value>#1</value>
158177                </enumeratedValue>
158178              </enumeratedValues>
158179            </field>
158180            <field>
158181              <name>PTCO3</name>
158182              <description>Port Clear Output</description>
158183              <bitOffset>3</bitOffset>
158184              <bitWidth>1</bitWidth>
158185              <access>write-only</access>
158186              <enumeratedValues>
158187                <enumeratedValue>
158188                  <name>0</name>
158189                  <description>Corresponding bit in PDORn does not change.</description>
158190                  <value>#0</value>
158191                </enumeratedValue>
158192                <enumeratedValue>
158193                  <name>1</name>
158194                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158195                  <value>#1</value>
158196                </enumeratedValue>
158197              </enumeratedValues>
158198            </field>
158199            <field>
158200              <name>PTCO4</name>
158201              <description>Port Clear Output</description>
158202              <bitOffset>4</bitOffset>
158203              <bitWidth>1</bitWidth>
158204              <access>write-only</access>
158205              <enumeratedValues>
158206                <enumeratedValue>
158207                  <name>0</name>
158208                  <description>Corresponding bit in PDORn does not change.</description>
158209                  <value>#0</value>
158210                </enumeratedValue>
158211                <enumeratedValue>
158212                  <name>1</name>
158213                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158214                  <value>#1</value>
158215                </enumeratedValue>
158216              </enumeratedValues>
158217            </field>
158218            <field>
158219              <name>PTCO5</name>
158220              <description>Port Clear Output</description>
158221              <bitOffset>5</bitOffset>
158222              <bitWidth>1</bitWidth>
158223              <access>write-only</access>
158224              <enumeratedValues>
158225                <enumeratedValue>
158226                  <name>0</name>
158227                  <description>Corresponding bit in PDORn does not change.</description>
158228                  <value>#0</value>
158229                </enumeratedValue>
158230                <enumeratedValue>
158231                  <name>1</name>
158232                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158233                  <value>#1</value>
158234                </enumeratedValue>
158235              </enumeratedValues>
158236            </field>
158237            <field>
158238              <name>PTCO6</name>
158239              <description>Port Clear Output</description>
158240              <bitOffset>6</bitOffset>
158241              <bitWidth>1</bitWidth>
158242              <access>write-only</access>
158243              <enumeratedValues>
158244                <enumeratedValue>
158245                  <name>0</name>
158246                  <description>Corresponding bit in PDORn does not change.</description>
158247                  <value>#0</value>
158248                </enumeratedValue>
158249                <enumeratedValue>
158250                  <name>1</name>
158251                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158252                  <value>#1</value>
158253                </enumeratedValue>
158254              </enumeratedValues>
158255            </field>
158256            <field>
158257              <name>PTCO7</name>
158258              <description>Port Clear Output</description>
158259              <bitOffset>7</bitOffset>
158260              <bitWidth>1</bitWidth>
158261              <access>write-only</access>
158262              <enumeratedValues>
158263                <enumeratedValue>
158264                  <name>0</name>
158265                  <description>Corresponding bit in PDORn does not change.</description>
158266                  <value>#0</value>
158267                </enumeratedValue>
158268                <enumeratedValue>
158269                  <name>1</name>
158270                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158271                  <value>#1</value>
158272                </enumeratedValue>
158273              </enumeratedValues>
158274            </field>
158275            <field>
158276              <name>PTCO8</name>
158277              <description>Port Clear Output</description>
158278              <bitOffset>8</bitOffset>
158279              <bitWidth>1</bitWidth>
158280              <access>write-only</access>
158281              <enumeratedValues>
158282                <enumeratedValue>
158283                  <name>0</name>
158284                  <description>Corresponding bit in PDORn does not change.</description>
158285                  <value>#0</value>
158286                </enumeratedValue>
158287                <enumeratedValue>
158288                  <name>1</name>
158289                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158290                  <value>#1</value>
158291                </enumeratedValue>
158292              </enumeratedValues>
158293            </field>
158294            <field>
158295              <name>PTCO9</name>
158296              <description>Port Clear Output</description>
158297              <bitOffset>9</bitOffset>
158298              <bitWidth>1</bitWidth>
158299              <access>write-only</access>
158300              <enumeratedValues>
158301                <enumeratedValue>
158302                  <name>0</name>
158303                  <description>Corresponding bit in PDORn does not change.</description>
158304                  <value>#0</value>
158305                </enumeratedValue>
158306                <enumeratedValue>
158307                  <name>1</name>
158308                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158309                  <value>#1</value>
158310                </enumeratedValue>
158311              </enumeratedValues>
158312            </field>
158313            <field>
158314              <name>PTCO10</name>
158315              <description>Port Clear Output</description>
158316              <bitOffset>10</bitOffset>
158317              <bitWidth>1</bitWidth>
158318              <access>write-only</access>
158319              <enumeratedValues>
158320                <enumeratedValue>
158321                  <name>0</name>
158322                  <description>Corresponding bit in PDORn does not change.</description>
158323                  <value>#0</value>
158324                </enumeratedValue>
158325                <enumeratedValue>
158326                  <name>1</name>
158327                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158328                  <value>#1</value>
158329                </enumeratedValue>
158330              </enumeratedValues>
158331            </field>
158332            <field>
158333              <name>PTCO11</name>
158334              <description>Port Clear Output</description>
158335              <bitOffset>11</bitOffset>
158336              <bitWidth>1</bitWidth>
158337              <access>write-only</access>
158338              <enumeratedValues>
158339                <enumeratedValue>
158340                  <name>0</name>
158341                  <description>Corresponding bit in PDORn does not change.</description>
158342                  <value>#0</value>
158343                </enumeratedValue>
158344                <enumeratedValue>
158345                  <name>1</name>
158346                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158347                  <value>#1</value>
158348                </enumeratedValue>
158349              </enumeratedValues>
158350            </field>
158351            <field>
158352              <name>PTCO12</name>
158353              <description>Port Clear Output</description>
158354              <bitOffset>12</bitOffset>
158355              <bitWidth>1</bitWidth>
158356              <access>write-only</access>
158357              <enumeratedValues>
158358                <enumeratedValue>
158359                  <name>0</name>
158360                  <description>Corresponding bit in PDORn does not change.</description>
158361                  <value>#0</value>
158362                </enumeratedValue>
158363                <enumeratedValue>
158364                  <name>1</name>
158365                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158366                  <value>#1</value>
158367                </enumeratedValue>
158368              </enumeratedValues>
158369            </field>
158370            <field>
158371              <name>PTCO13</name>
158372              <description>Port Clear Output</description>
158373              <bitOffset>13</bitOffset>
158374              <bitWidth>1</bitWidth>
158375              <access>write-only</access>
158376              <enumeratedValues>
158377                <enumeratedValue>
158378                  <name>0</name>
158379                  <description>Corresponding bit in PDORn does not change.</description>
158380                  <value>#0</value>
158381                </enumeratedValue>
158382                <enumeratedValue>
158383                  <name>1</name>
158384                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158385                  <value>#1</value>
158386                </enumeratedValue>
158387              </enumeratedValues>
158388            </field>
158389            <field>
158390              <name>PTCO14</name>
158391              <description>Port Clear Output</description>
158392              <bitOffset>14</bitOffset>
158393              <bitWidth>1</bitWidth>
158394              <access>write-only</access>
158395              <enumeratedValues>
158396                <enumeratedValue>
158397                  <name>0</name>
158398                  <description>Corresponding bit in PDORn does not change.</description>
158399                  <value>#0</value>
158400                </enumeratedValue>
158401                <enumeratedValue>
158402                  <name>1</name>
158403                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158404                  <value>#1</value>
158405                </enumeratedValue>
158406              </enumeratedValues>
158407            </field>
158408            <field>
158409              <name>PTCO15</name>
158410              <description>Port Clear Output</description>
158411              <bitOffset>15</bitOffset>
158412              <bitWidth>1</bitWidth>
158413              <access>write-only</access>
158414              <enumeratedValues>
158415                <enumeratedValue>
158416                  <name>0</name>
158417                  <description>Corresponding bit in PDORn does not change.</description>
158418                  <value>#0</value>
158419                </enumeratedValue>
158420                <enumeratedValue>
158421                  <name>1</name>
158422                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158423                  <value>#1</value>
158424                </enumeratedValue>
158425              </enumeratedValues>
158426            </field>
158427            <field>
158428              <name>PTCO16</name>
158429              <description>Port Clear Output</description>
158430              <bitOffset>16</bitOffset>
158431              <bitWidth>1</bitWidth>
158432              <access>write-only</access>
158433              <enumeratedValues>
158434                <enumeratedValue>
158435                  <name>0</name>
158436                  <description>Corresponding bit in PDORn does not change.</description>
158437                  <value>#0</value>
158438                </enumeratedValue>
158439                <enumeratedValue>
158440                  <name>1</name>
158441                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158442                  <value>#1</value>
158443                </enumeratedValue>
158444              </enumeratedValues>
158445            </field>
158446            <field>
158447              <name>PTCO17</name>
158448              <description>Port Clear Output</description>
158449              <bitOffset>17</bitOffset>
158450              <bitWidth>1</bitWidth>
158451              <access>write-only</access>
158452              <enumeratedValues>
158453                <enumeratedValue>
158454                  <name>0</name>
158455                  <description>Corresponding bit in PDORn does not change.</description>
158456                  <value>#0</value>
158457                </enumeratedValue>
158458                <enumeratedValue>
158459                  <name>1</name>
158460                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158461                  <value>#1</value>
158462                </enumeratedValue>
158463              </enumeratedValues>
158464            </field>
158465            <field>
158466              <name>PTCO18</name>
158467              <description>Port Clear Output</description>
158468              <bitOffset>18</bitOffset>
158469              <bitWidth>1</bitWidth>
158470              <access>write-only</access>
158471              <enumeratedValues>
158472                <enumeratedValue>
158473                  <name>0</name>
158474                  <description>Corresponding bit in PDORn does not change.</description>
158475                  <value>#0</value>
158476                </enumeratedValue>
158477                <enumeratedValue>
158478                  <name>1</name>
158479                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158480                  <value>#1</value>
158481                </enumeratedValue>
158482              </enumeratedValues>
158483            </field>
158484            <field>
158485              <name>PTCO19</name>
158486              <description>Port Clear Output</description>
158487              <bitOffset>19</bitOffset>
158488              <bitWidth>1</bitWidth>
158489              <access>write-only</access>
158490              <enumeratedValues>
158491                <enumeratedValue>
158492                  <name>0</name>
158493                  <description>Corresponding bit in PDORn does not change.</description>
158494                  <value>#0</value>
158495                </enumeratedValue>
158496                <enumeratedValue>
158497                  <name>1</name>
158498                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158499                  <value>#1</value>
158500                </enumeratedValue>
158501              </enumeratedValues>
158502            </field>
158503            <field>
158504              <name>PTCO20</name>
158505              <description>Port Clear Output</description>
158506              <bitOffset>20</bitOffset>
158507              <bitWidth>1</bitWidth>
158508              <access>write-only</access>
158509              <enumeratedValues>
158510                <enumeratedValue>
158511                  <name>0</name>
158512                  <description>Corresponding bit in PDORn does not change.</description>
158513                  <value>#0</value>
158514                </enumeratedValue>
158515                <enumeratedValue>
158516                  <name>1</name>
158517                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158518                  <value>#1</value>
158519                </enumeratedValue>
158520              </enumeratedValues>
158521            </field>
158522            <field>
158523              <name>PTCO21</name>
158524              <description>Port Clear Output</description>
158525              <bitOffset>21</bitOffset>
158526              <bitWidth>1</bitWidth>
158527              <access>write-only</access>
158528              <enumeratedValues>
158529                <enumeratedValue>
158530                  <name>0</name>
158531                  <description>Corresponding bit in PDORn does not change.</description>
158532                  <value>#0</value>
158533                </enumeratedValue>
158534                <enumeratedValue>
158535                  <name>1</name>
158536                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158537                  <value>#1</value>
158538                </enumeratedValue>
158539              </enumeratedValues>
158540            </field>
158541            <field>
158542              <name>PTCO22</name>
158543              <description>Port Clear Output</description>
158544              <bitOffset>22</bitOffset>
158545              <bitWidth>1</bitWidth>
158546              <access>write-only</access>
158547              <enumeratedValues>
158548                <enumeratedValue>
158549                  <name>0</name>
158550                  <description>Corresponding bit in PDORn does not change.</description>
158551                  <value>#0</value>
158552                </enumeratedValue>
158553                <enumeratedValue>
158554                  <name>1</name>
158555                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158556                  <value>#1</value>
158557                </enumeratedValue>
158558              </enumeratedValues>
158559            </field>
158560            <field>
158561              <name>PTCO23</name>
158562              <description>Port Clear Output</description>
158563              <bitOffset>23</bitOffset>
158564              <bitWidth>1</bitWidth>
158565              <access>write-only</access>
158566              <enumeratedValues>
158567                <enumeratedValue>
158568                  <name>0</name>
158569                  <description>Corresponding bit in PDORn does not change.</description>
158570                  <value>#0</value>
158571                </enumeratedValue>
158572                <enumeratedValue>
158573                  <name>1</name>
158574                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158575                  <value>#1</value>
158576                </enumeratedValue>
158577              </enumeratedValues>
158578            </field>
158579            <field>
158580              <name>PTCO24</name>
158581              <description>Port Clear Output</description>
158582              <bitOffset>24</bitOffset>
158583              <bitWidth>1</bitWidth>
158584              <access>write-only</access>
158585              <enumeratedValues>
158586                <enumeratedValue>
158587                  <name>0</name>
158588                  <description>Corresponding bit in PDORn does not change.</description>
158589                  <value>#0</value>
158590                </enumeratedValue>
158591                <enumeratedValue>
158592                  <name>1</name>
158593                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158594                  <value>#1</value>
158595                </enumeratedValue>
158596              </enumeratedValues>
158597            </field>
158598            <field>
158599              <name>PTCO25</name>
158600              <description>Port Clear Output</description>
158601              <bitOffset>25</bitOffset>
158602              <bitWidth>1</bitWidth>
158603              <access>write-only</access>
158604              <enumeratedValues>
158605                <enumeratedValue>
158606                  <name>0</name>
158607                  <description>Corresponding bit in PDORn does not change.</description>
158608                  <value>#0</value>
158609                </enumeratedValue>
158610                <enumeratedValue>
158611                  <name>1</name>
158612                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158613                  <value>#1</value>
158614                </enumeratedValue>
158615              </enumeratedValues>
158616            </field>
158617            <field>
158618              <name>PTCO26</name>
158619              <description>Port Clear Output</description>
158620              <bitOffset>26</bitOffset>
158621              <bitWidth>1</bitWidth>
158622              <access>write-only</access>
158623              <enumeratedValues>
158624                <enumeratedValue>
158625                  <name>0</name>
158626                  <description>Corresponding bit in PDORn does not change.</description>
158627                  <value>#0</value>
158628                </enumeratedValue>
158629                <enumeratedValue>
158630                  <name>1</name>
158631                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158632                  <value>#1</value>
158633                </enumeratedValue>
158634              </enumeratedValues>
158635            </field>
158636            <field>
158637              <name>PTCO27</name>
158638              <description>Port Clear Output</description>
158639              <bitOffset>27</bitOffset>
158640              <bitWidth>1</bitWidth>
158641              <access>write-only</access>
158642              <enumeratedValues>
158643                <enumeratedValue>
158644                  <name>0</name>
158645                  <description>Corresponding bit in PDORn does not change.</description>
158646                  <value>#0</value>
158647                </enumeratedValue>
158648                <enumeratedValue>
158649                  <name>1</name>
158650                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158651                  <value>#1</value>
158652                </enumeratedValue>
158653              </enumeratedValues>
158654            </field>
158655            <field>
158656              <name>PTCO28</name>
158657              <description>Port Clear Output</description>
158658              <bitOffset>28</bitOffset>
158659              <bitWidth>1</bitWidth>
158660              <access>write-only</access>
158661              <enumeratedValues>
158662                <enumeratedValue>
158663                  <name>0</name>
158664                  <description>Corresponding bit in PDORn does not change.</description>
158665                  <value>#0</value>
158666                </enumeratedValue>
158667                <enumeratedValue>
158668                  <name>1</name>
158669                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158670                  <value>#1</value>
158671                </enumeratedValue>
158672              </enumeratedValues>
158673            </field>
158674            <field>
158675              <name>PTCO29</name>
158676              <description>Port Clear Output</description>
158677              <bitOffset>29</bitOffset>
158678              <bitWidth>1</bitWidth>
158679              <access>write-only</access>
158680              <enumeratedValues>
158681                <enumeratedValue>
158682                  <name>0</name>
158683                  <description>Corresponding bit in PDORn does not change.</description>
158684                  <value>#0</value>
158685                </enumeratedValue>
158686                <enumeratedValue>
158687                  <name>1</name>
158688                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158689                  <value>#1</value>
158690                </enumeratedValue>
158691              </enumeratedValues>
158692            </field>
158693            <field>
158694              <name>PTCO30</name>
158695              <description>Port Clear Output</description>
158696              <bitOffset>30</bitOffset>
158697              <bitWidth>1</bitWidth>
158698              <access>write-only</access>
158699              <enumeratedValues>
158700                <enumeratedValue>
158701                  <name>0</name>
158702                  <description>Corresponding bit in PDORn does not change.</description>
158703                  <value>#0</value>
158704                </enumeratedValue>
158705                <enumeratedValue>
158706                  <name>1</name>
158707                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158708                  <value>#1</value>
158709                </enumeratedValue>
158710              </enumeratedValues>
158711            </field>
158712            <field>
158713              <name>PTCO31</name>
158714              <description>Port Clear Output</description>
158715              <bitOffset>31</bitOffset>
158716              <bitWidth>1</bitWidth>
158717              <access>write-only</access>
158718              <enumeratedValues>
158719                <enumeratedValue>
158720                  <name>0</name>
158721                  <description>Corresponding bit in PDORn does not change.</description>
158722                  <value>#0</value>
158723                </enumeratedValue>
158724                <enumeratedValue>
158725                  <name>1</name>
158726                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
158727                  <value>#1</value>
158728                </enumeratedValue>
158729              </enumeratedValues>
158730            </field>
158731          </fields>
158732        </register>
158733        <register>
158734          <name>PTOR</name>
158735          <description>Port Toggle Output Register</description>
158736          <addressOffset>0xC</addressOffset>
158737          <size>32</size>
158738          <access>write-only</access>
158739          <resetValue>0</resetValue>
158740          <resetMask>0xFFFFFFFF</resetMask>
158741          <fields>
158742            <field>
158743              <name>PTTO0</name>
158744              <description>Port Toggle Output</description>
158745              <bitOffset>0</bitOffset>
158746              <bitWidth>1</bitWidth>
158747              <access>write-only</access>
158748              <enumeratedValues>
158749                <enumeratedValue>
158750                  <name>0</name>
158751                  <description>Corresponding bit in PDORn does not change.</description>
158752                  <value>#0</value>
158753                </enumeratedValue>
158754                <enumeratedValue>
158755                  <name>1</name>
158756                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158757                  <value>#1</value>
158758                </enumeratedValue>
158759              </enumeratedValues>
158760            </field>
158761            <field>
158762              <name>PTTO1</name>
158763              <description>Port Toggle Output</description>
158764              <bitOffset>1</bitOffset>
158765              <bitWidth>1</bitWidth>
158766              <access>write-only</access>
158767              <enumeratedValues>
158768                <enumeratedValue>
158769                  <name>0</name>
158770                  <description>Corresponding bit in PDORn does not change.</description>
158771                  <value>#0</value>
158772                </enumeratedValue>
158773                <enumeratedValue>
158774                  <name>1</name>
158775                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158776                  <value>#1</value>
158777                </enumeratedValue>
158778              </enumeratedValues>
158779            </field>
158780            <field>
158781              <name>PTTO2</name>
158782              <description>Port Toggle Output</description>
158783              <bitOffset>2</bitOffset>
158784              <bitWidth>1</bitWidth>
158785              <access>write-only</access>
158786              <enumeratedValues>
158787                <enumeratedValue>
158788                  <name>0</name>
158789                  <description>Corresponding bit in PDORn does not change.</description>
158790                  <value>#0</value>
158791                </enumeratedValue>
158792                <enumeratedValue>
158793                  <name>1</name>
158794                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158795                  <value>#1</value>
158796                </enumeratedValue>
158797              </enumeratedValues>
158798            </field>
158799            <field>
158800              <name>PTTO3</name>
158801              <description>Port Toggle Output</description>
158802              <bitOffset>3</bitOffset>
158803              <bitWidth>1</bitWidth>
158804              <access>write-only</access>
158805              <enumeratedValues>
158806                <enumeratedValue>
158807                  <name>0</name>
158808                  <description>Corresponding bit in PDORn does not change.</description>
158809                  <value>#0</value>
158810                </enumeratedValue>
158811                <enumeratedValue>
158812                  <name>1</name>
158813                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158814                  <value>#1</value>
158815                </enumeratedValue>
158816              </enumeratedValues>
158817            </field>
158818            <field>
158819              <name>PTTO4</name>
158820              <description>Port Toggle Output</description>
158821              <bitOffset>4</bitOffset>
158822              <bitWidth>1</bitWidth>
158823              <access>write-only</access>
158824              <enumeratedValues>
158825                <enumeratedValue>
158826                  <name>0</name>
158827                  <description>Corresponding bit in PDORn does not change.</description>
158828                  <value>#0</value>
158829                </enumeratedValue>
158830                <enumeratedValue>
158831                  <name>1</name>
158832                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158833                  <value>#1</value>
158834                </enumeratedValue>
158835              </enumeratedValues>
158836            </field>
158837            <field>
158838              <name>PTTO5</name>
158839              <description>Port Toggle Output</description>
158840              <bitOffset>5</bitOffset>
158841              <bitWidth>1</bitWidth>
158842              <access>write-only</access>
158843              <enumeratedValues>
158844                <enumeratedValue>
158845                  <name>0</name>
158846                  <description>Corresponding bit in PDORn does not change.</description>
158847                  <value>#0</value>
158848                </enumeratedValue>
158849                <enumeratedValue>
158850                  <name>1</name>
158851                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158852                  <value>#1</value>
158853                </enumeratedValue>
158854              </enumeratedValues>
158855            </field>
158856            <field>
158857              <name>PTTO6</name>
158858              <description>Port Toggle Output</description>
158859              <bitOffset>6</bitOffset>
158860              <bitWidth>1</bitWidth>
158861              <access>write-only</access>
158862              <enumeratedValues>
158863                <enumeratedValue>
158864                  <name>0</name>
158865                  <description>Corresponding bit in PDORn does not change.</description>
158866                  <value>#0</value>
158867                </enumeratedValue>
158868                <enumeratedValue>
158869                  <name>1</name>
158870                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158871                  <value>#1</value>
158872                </enumeratedValue>
158873              </enumeratedValues>
158874            </field>
158875            <field>
158876              <name>PTTO7</name>
158877              <description>Port Toggle Output</description>
158878              <bitOffset>7</bitOffset>
158879              <bitWidth>1</bitWidth>
158880              <access>write-only</access>
158881              <enumeratedValues>
158882                <enumeratedValue>
158883                  <name>0</name>
158884                  <description>Corresponding bit in PDORn does not change.</description>
158885                  <value>#0</value>
158886                </enumeratedValue>
158887                <enumeratedValue>
158888                  <name>1</name>
158889                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158890                  <value>#1</value>
158891                </enumeratedValue>
158892              </enumeratedValues>
158893            </field>
158894            <field>
158895              <name>PTTO8</name>
158896              <description>Port Toggle Output</description>
158897              <bitOffset>8</bitOffset>
158898              <bitWidth>1</bitWidth>
158899              <access>write-only</access>
158900              <enumeratedValues>
158901                <enumeratedValue>
158902                  <name>0</name>
158903                  <description>Corresponding bit in PDORn does not change.</description>
158904                  <value>#0</value>
158905                </enumeratedValue>
158906                <enumeratedValue>
158907                  <name>1</name>
158908                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158909                  <value>#1</value>
158910                </enumeratedValue>
158911              </enumeratedValues>
158912            </field>
158913            <field>
158914              <name>PTTO9</name>
158915              <description>Port Toggle Output</description>
158916              <bitOffset>9</bitOffset>
158917              <bitWidth>1</bitWidth>
158918              <access>write-only</access>
158919              <enumeratedValues>
158920                <enumeratedValue>
158921                  <name>0</name>
158922                  <description>Corresponding bit in PDORn does not change.</description>
158923                  <value>#0</value>
158924                </enumeratedValue>
158925                <enumeratedValue>
158926                  <name>1</name>
158927                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158928                  <value>#1</value>
158929                </enumeratedValue>
158930              </enumeratedValues>
158931            </field>
158932            <field>
158933              <name>PTTO10</name>
158934              <description>Port Toggle Output</description>
158935              <bitOffset>10</bitOffset>
158936              <bitWidth>1</bitWidth>
158937              <access>write-only</access>
158938              <enumeratedValues>
158939                <enumeratedValue>
158940                  <name>0</name>
158941                  <description>Corresponding bit in PDORn does not change.</description>
158942                  <value>#0</value>
158943                </enumeratedValue>
158944                <enumeratedValue>
158945                  <name>1</name>
158946                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158947                  <value>#1</value>
158948                </enumeratedValue>
158949              </enumeratedValues>
158950            </field>
158951            <field>
158952              <name>PTTO11</name>
158953              <description>Port Toggle Output</description>
158954              <bitOffset>11</bitOffset>
158955              <bitWidth>1</bitWidth>
158956              <access>write-only</access>
158957              <enumeratedValues>
158958                <enumeratedValue>
158959                  <name>0</name>
158960                  <description>Corresponding bit in PDORn does not change.</description>
158961                  <value>#0</value>
158962                </enumeratedValue>
158963                <enumeratedValue>
158964                  <name>1</name>
158965                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158966                  <value>#1</value>
158967                </enumeratedValue>
158968              </enumeratedValues>
158969            </field>
158970            <field>
158971              <name>PTTO12</name>
158972              <description>Port Toggle Output</description>
158973              <bitOffset>12</bitOffset>
158974              <bitWidth>1</bitWidth>
158975              <access>write-only</access>
158976              <enumeratedValues>
158977                <enumeratedValue>
158978                  <name>0</name>
158979                  <description>Corresponding bit in PDORn does not change.</description>
158980                  <value>#0</value>
158981                </enumeratedValue>
158982                <enumeratedValue>
158983                  <name>1</name>
158984                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
158985                  <value>#1</value>
158986                </enumeratedValue>
158987              </enumeratedValues>
158988            </field>
158989            <field>
158990              <name>PTTO13</name>
158991              <description>Port Toggle Output</description>
158992              <bitOffset>13</bitOffset>
158993              <bitWidth>1</bitWidth>
158994              <access>write-only</access>
158995              <enumeratedValues>
158996                <enumeratedValue>
158997                  <name>0</name>
158998                  <description>Corresponding bit in PDORn does not change.</description>
158999                  <value>#0</value>
159000                </enumeratedValue>
159001                <enumeratedValue>
159002                  <name>1</name>
159003                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159004                  <value>#1</value>
159005                </enumeratedValue>
159006              </enumeratedValues>
159007            </field>
159008            <field>
159009              <name>PTTO14</name>
159010              <description>Port Toggle Output</description>
159011              <bitOffset>14</bitOffset>
159012              <bitWidth>1</bitWidth>
159013              <access>write-only</access>
159014              <enumeratedValues>
159015                <enumeratedValue>
159016                  <name>0</name>
159017                  <description>Corresponding bit in PDORn does not change.</description>
159018                  <value>#0</value>
159019                </enumeratedValue>
159020                <enumeratedValue>
159021                  <name>1</name>
159022                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159023                  <value>#1</value>
159024                </enumeratedValue>
159025              </enumeratedValues>
159026            </field>
159027            <field>
159028              <name>PTTO15</name>
159029              <description>Port Toggle Output</description>
159030              <bitOffset>15</bitOffset>
159031              <bitWidth>1</bitWidth>
159032              <access>write-only</access>
159033              <enumeratedValues>
159034                <enumeratedValue>
159035                  <name>0</name>
159036                  <description>Corresponding bit in PDORn does not change.</description>
159037                  <value>#0</value>
159038                </enumeratedValue>
159039                <enumeratedValue>
159040                  <name>1</name>
159041                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159042                  <value>#1</value>
159043                </enumeratedValue>
159044              </enumeratedValues>
159045            </field>
159046            <field>
159047              <name>PTTO16</name>
159048              <description>Port Toggle Output</description>
159049              <bitOffset>16</bitOffset>
159050              <bitWidth>1</bitWidth>
159051              <access>write-only</access>
159052              <enumeratedValues>
159053                <enumeratedValue>
159054                  <name>0</name>
159055                  <description>Corresponding bit in PDORn does not change.</description>
159056                  <value>#0</value>
159057                </enumeratedValue>
159058                <enumeratedValue>
159059                  <name>1</name>
159060                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159061                  <value>#1</value>
159062                </enumeratedValue>
159063              </enumeratedValues>
159064            </field>
159065            <field>
159066              <name>PTTO17</name>
159067              <description>Port Toggle Output</description>
159068              <bitOffset>17</bitOffset>
159069              <bitWidth>1</bitWidth>
159070              <access>write-only</access>
159071              <enumeratedValues>
159072                <enumeratedValue>
159073                  <name>0</name>
159074                  <description>Corresponding bit in PDORn does not change.</description>
159075                  <value>#0</value>
159076                </enumeratedValue>
159077                <enumeratedValue>
159078                  <name>1</name>
159079                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159080                  <value>#1</value>
159081                </enumeratedValue>
159082              </enumeratedValues>
159083            </field>
159084            <field>
159085              <name>PTTO18</name>
159086              <description>Port Toggle Output</description>
159087              <bitOffset>18</bitOffset>
159088              <bitWidth>1</bitWidth>
159089              <access>write-only</access>
159090              <enumeratedValues>
159091                <enumeratedValue>
159092                  <name>0</name>
159093                  <description>Corresponding bit in PDORn does not change.</description>
159094                  <value>#0</value>
159095                </enumeratedValue>
159096                <enumeratedValue>
159097                  <name>1</name>
159098                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159099                  <value>#1</value>
159100                </enumeratedValue>
159101              </enumeratedValues>
159102            </field>
159103            <field>
159104              <name>PTTO19</name>
159105              <description>Port Toggle Output</description>
159106              <bitOffset>19</bitOffset>
159107              <bitWidth>1</bitWidth>
159108              <access>write-only</access>
159109              <enumeratedValues>
159110                <enumeratedValue>
159111                  <name>0</name>
159112                  <description>Corresponding bit in PDORn does not change.</description>
159113                  <value>#0</value>
159114                </enumeratedValue>
159115                <enumeratedValue>
159116                  <name>1</name>
159117                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159118                  <value>#1</value>
159119                </enumeratedValue>
159120              </enumeratedValues>
159121            </field>
159122            <field>
159123              <name>PTTO20</name>
159124              <description>Port Toggle Output</description>
159125              <bitOffset>20</bitOffset>
159126              <bitWidth>1</bitWidth>
159127              <access>write-only</access>
159128              <enumeratedValues>
159129                <enumeratedValue>
159130                  <name>0</name>
159131                  <description>Corresponding bit in PDORn does not change.</description>
159132                  <value>#0</value>
159133                </enumeratedValue>
159134                <enumeratedValue>
159135                  <name>1</name>
159136                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159137                  <value>#1</value>
159138                </enumeratedValue>
159139              </enumeratedValues>
159140            </field>
159141            <field>
159142              <name>PTTO21</name>
159143              <description>Port Toggle Output</description>
159144              <bitOffset>21</bitOffset>
159145              <bitWidth>1</bitWidth>
159146              <access>write-only</access>
159147              <enumeratedValues>
159148                <enumeratedValue>
159149                  <name>0</name>
159150                  <description>Corresponding bit in PDORn does not change.</description>
159151                  <value>#0</value>
159152                </enumeratedValue>
159153                <enumeratedValue>
159154                  <name>1</name>
159155                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159156                  <value>#1</value>
159157                </enumeratedValue>
159158              </enumeratedValues>
159159            </field>
159160            <field>
159161              <name>PTTO22</name>
159162              <description>Port Toggle Output</description>
159163              <bitOffset>22</bitOffset>
159164              <bitWidth>1</bitWidth>
159165              <access>write-only</access>
159166              <enumeratedValues>
159167                <enumeratedValue>
159168                  <name>0</name>
159169                  <description>Corresponding bit in PDORn does not change.</description>
159170                  <value>#0</value>
159171                </enumeratedValue>
159172                <enumeratedValue>
159173                  <name>1</name>
159174                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159175                  <value>#1</value>
159176                </enumeratedValue>
159177              </enumeratedValues>
159178            </field>
159179            <field>
159180              <name>PTTO23</name>
159181              <description>Port Toggle Output</description>
159182              <bitOffset>23</bitOffset>
159183              <bitWidth>1</bitWidth>
159184              <access>write-only</access>
159185              <enumeratedValues>
159186                <enumeratedValue>
159187                  <name>0</name>
159188                  <description>Corresponding bit in PDORn does not change.</description>
159189                  <value>#0</value>
159190                </enumeratedValue>
159191                <enumeratedValue>
159192                  <name>1</name>
159193                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159194                  <value>#1</value>
159195                </enumeratedValue>
159196              </enumeratedValues>
159197            </field>
159198            <field>
159199              <name>PTTO24</name>
159200              <description>Port Toggle Output</description>
159201              <bitOffset>24</bitOffset>
159202              <bitWidth>1</bitWidth>
159203              <access>write-only</access>
159204              <enumeratedValues>
159205                <enumeratedValue>
159206                  <name>0</name>
159207                  <description>Corresponding bit in PDORn does not change.</description>
159208                  <value>#0</value>
159209                </enumeratedValue>
159210                <enumeratedValue>
159211                  <name>1</name>
159212                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159213                  <value>#1</value>
159214                </enumeratedValue>
159215              </enumeratedValues>
159216            </field>
159217            <field>
159218              <name>PTTO25</name>
159219              <description>Port Toggle Output</description>
159220              <bitOffset>25</bitOffset>
159221              <bitWidth>1</bitWidth>
159222              <access>write-only</access>
159223              <enumeratedValues>
159224                <enumeratedValue>
159225                  <name>0</name>
159226                  <description>Corresponding bit in PDORn does not change.</description>
159227                  <value>#0</value>
159228                </enumeratedValue>
159229                <enumeratedValue>
159230                  <name>1</name>
159231                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159232                  <value>#1</value>
159233                </enumeratedValue>
159234              </enumeratedValues>
159235            </field>
159236            <field>
159237              <name>PTTO26</name>
159238              <description>Port Toggle Output</description>
159239              <bitOffset>26</bitOffset>
159240              <bitWidth>1</bitWidth>
159241              <access>write-only</access>
159242              <enumeratedValues>
159243                <enumeratedValue>
159244                  <name>0</name>
159245                  <description>Corresponding bit in PDORn does not change.</description>
159246                  <value>#0</value>
159247                </enumeratedValue>
159248                <enumeratedValue>
159249                  <name>1</name>
159250                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159251                  <value>#1</value>
159252                </enumeratedValue>
159253              </enumeratedValues>
159254            </field>
159255            <field>
159256              <name>PTTO27</name>
159257              <description>Port Toggle Output</description>
159258              <bitOffset>27</bitOffset>
159259              <bitWidth>1</bitWidth>
159260              <access>write-only</access>
159261              <enumeratedValues>
159262                <enumeratedValue>
159263                  <name>0</name>
159264                  <description>Corresponding bit in PDORn does not change.</description>
159265                  <value>#0</value>
159266                </enumeratedValue>
159267                <enumeratedValue>
159268                  <name>1</name>
159269                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159270                  <value>#1</value>
159271                </enumeratedValue>
159272              </enumeratedValues>
159273            </field>
159274            <field>
159275              <name>PTTO28</name>
159276              <description>Port Toggle Output</description>
159277              <bitOffset>28</bitOffset>
159278              <bitWidth>1</bitWidth>
159279              <access>write-only</access>
159280              <enumeratedValues>
159281                <enumeratedValue>
159282                  <name>0</name>
159283                  <description>Corresponding bit in PDORn does not change.</description>
159284                  <value>#0</value>
159285                </enumeratedValue>
159286                <enumeratedValue>
159287                  <name>1</name>
159288                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159289                  <value>#1</value>
159290                </enumeratedValue>
159291              </enumeratedValues>
159292            </field>
159293            <field>
159294              <name>PTTO29</name>
159295              <description>Port Toggle Output</description>
159296              <bitOffset>29</bitOffset>
159297              <bitWidth>1</bitWidth>
159298              <access>write-only</access>
159299              <enumeratedValues>
159300                <enumeratedValue>
159301                  <name>0</name>
159302                  <description>Corresponding bit in PDORn does not change.</description>
159303                  <value>#0</value>
159304                </enumeratedValue>
159305                <enumeratedValue>
159306                  <name>1</name>
159307                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159308                  <value>#1</value>
159309                </enumeratedValue>
159310              </enumeratedValues>
159311            </field>
159312            <field>
159313              <name>PTTO30</name>
159314              <description>Port Toggle Output</description>
159315              <bitOffset>30</bitOffset>
159316              <bitWidth>1</bitWidth>
159317              <access>write-only</access>
159318              <enumeratedValues>
159319                <enumeratedValue>
159320                  <name>0</name>
159321                  <description>Corresponding bit in PDORn does not change.</description>
159322                  <value>#0</value>
159323                </enumeratedValue>
159324                <enumeratedValue>
159325                  <name>1</name>
159326                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159327                  <value>#1</value>
159328                </enumeratedValue>
159329              </enumeratedValues>
159330            </field>
159331            <field>
159332              <name>PTTO31</name>
159333              <description>Port Toggle Output</description>
159334              <bitOffset>31</bitOffset>
159335              <bitWidth>1</bitWidth>
159336              <access>write-only</access>
159337              <enumeratedValues>
159338                <enumeratedValue>
159339                  <name>0</name>
159340                  <description>Corresponding bit in PDORn does not change.</description>
159341                  <value>#0</value>
159342                </enumeratedValue>
159343                <enumeratedValue>
159344                  <name>1</name>
159345                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
159346                  <value>#1</value>
159347                </enumeratedValue>
159348              </enumeratedValues>
159349            </field>
159350          </fields>
159351        </register>
159352        <register>
159353          <name>PDIR</name>
159354          <description>Port Data Input Register</description>
159355          <addressOffset>0x10</addressOffset>
159356          <size>32</size>
159357          <access>read-only</access>
159358          <resetValue>0</resetValue>
159359          <resetMask>0xFFFFFFFF</resetMask>
159360          <fields>
159361            <field>
159362              <name>PDI0</name>
159363              <description>Port Data Input</description>
159364              <bitOffset>0</bitOffset>
159365              <bitWidth>1</bitWidth>
159366              <access>read-only</access>
159367              <enumeratedValues>
159368                <enumeratedValue>
159369                  <name>0</name>
159370                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159371                  <value>#0</value>
159372                </enumeratedValue>
159373                <enumeratedValue>
159374                  <name>1</name>
159375                  <description>Pin logic level is logic 1.</description>
159376                  <value>#1</value>
159377                </enumeratedValue>
159378              </enumeratedValues>
159379            </field>
159380            <field>
159381              <name>PDI1</name>
159382              <description>Port Data Input</description>
159383              <bitOffset>1</bitOffset>
159384              <bitWidth>1</bitWidth>
159385              <access>read-only</access>
159386              <enumeratedValues>
159387                <enumeratedValue>
159388                  <name>0</name>
159389                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159390                  <value>#0</value>
159391                </enumeratedValue>
159392                <enumeratedValue>
159393                  <name>1</name>
159394                  <description>Pin logic level is logic 1.</description>
159395                  <value>#1</value>
159396                </enumeratedValue>
159397              </enumeratedValues>
159398            </field>
159399            <field>
159400              <name>PDI2</name>
159401              <description>Port Data Input</description>
159402              <bitOffset>2</bitOffset>
159403              <bitWidth>1</bitWidth>
159404              <access>read-only</access>
159405              <enumeratedValues>
159406                <enumeratedValue>
159407                  <name>0</name>
159408                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159409                  <value>#0</value>
159410                </enumeratedValue>
159411                <enumeratedValue>
159412                  <name>1</name>
159413                  <description>Pin logic level is logic 1.</description>
159414                  <value>#1</value>
159415                </enumeratedValue>
159416              </enumeratedValues>
159417            </field>
159418            <field>
159419              <name>PDI3</name>
159420              <description>Port Data Input</description>
159421              <bitOffset>3</bitOffset>
159422              <bitWidth>1</bitWidth>
159423              <access>read-only</access>
159424              <enumeratedValues>
159425                <enumeratedValue>
159426                  <name>0</name>
159427                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159428                  <value>#0</value>
159429                </enumeratedValue>
159430                <enumeratedValue>
159431                  <name>1</name>
159432                  <description>Pin logic level is logic 1.</description>
159433                  <value>#1</value>
159434                </enumeratedValue>
159435              </enumeratedValues>
159436            </field>
159437            <field>
159438              <name>PDI4</name>
159439              <description>Port Data Input</description>
159440              <bitOffset>4</bitOffset>
159441              <bitWidth>1</bitWidth>
159442              <access>read-only</access>
159443              <enumeratedValues>
159444                <enumeratedValue>
159445                  <name>0</name>
159446                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159447                  <value>#0</value>
159448                </enumeratedValue>
159449                <enumeratedValue>
159450                  <name>1</name>
159451                  <description>Pin logic level is logic 1.</description>
159452                  <value>#1</value>
159453                </enumeratedValue>
159454              </enumeratedValues>
159455            </field>
159456            <field>
159457              <name>PDI5</name>
159458              <description>Port Data Input</description>
159459              <bitOffset>5</bitOffset>
159460              <bitWidth>1</bitWidth>
159461              <access>read-only</access>
159462              <enumeratedValues>
159463                <enumeratedValue>
159464                  <name>0</name>
159465                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159466                  <value>#0</value>
159467                </enumeratedValue>
159468                <enumeratedValue>
159469                  <name>1</name>
159470                  <description>Pin logic level is logic 1.</description>
159471                  <value>#1</value>
159472                </enumeratedValue>
159473              </enumeratedValues>
159474            </field>
159475            <field>
159476              <name>PDI6</name>
159477              <description>Port Data Input</description>
159478              <bitOffset>6</bitOffset>
159479              <bitWidth>1</bitWidth>
159480              <access>read-only</access>
159481              <enumeratedValues>
159482                <enumeratedValue>
159483                  <name>0</name>
159484                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159485                  <value>#0</value>
159486                </enumeratedValue>
159487                <enumeratedValue>
159488                  <name>1</name>
159489                  <description>Pin logic level is logic 1.</description>
159490                  <value>#1</value>
159491                </enumeratedValue>
159492              </enumeratedValues>
159493            </field>
159494            <field>
159495              <name>PDI7</name>
159496              <description>Port Data Input</description>
159497              <bitOffset>7</bitOffset>
159498              <bitWidth>1</bitWidth>
159499              <access>read-only</access>
159500              <enumeratedValues>
159501                <enumeratedValue>
159502                  <name>0</name>
159503                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159504                  <value>#0</value>
159505                </enumeratedValue>
159506                <enumeratedValue>
159507                  <name>1</name>
159508                  <description>Pin logic level is logic 1.</description>
159509                  <value>#1</value>
159510                </enumeratedValue>
159511              </enumeratedValues>
159512            </field>
159513            <field>
159514              <name>PDI8</name>
159515              <description>Port Data Input</description>
159516              <bitOffset>8</bitOffset>
159517              <bitWidth>1</bitWidth>
159518              <access>read-only</access>
159519              <enumeratedValues>
159520                <enumeratedValue>
159521                  <name>0</name>
159522                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159523                  <value>#0</value>
159524                </enumeratedValue>
159525                <enumeratedValue>
159526                  <name>1</name>
159527                  <description>Pin logic level is logic 1.</description>
159528                  <value>#1</value>
159529                </enumeratedValue>
159530              </enumeratedValues>
159531            </field>
159532            <field>
159533              <name>PDI9</name>
159534              <description>Port Data Input</description>
159535              <bitOffset>9</bitOffset>
159536              <bitWidth>1</bitWidth>
159537              <access>read-only</access>
159538              <enumeratedValues>
159539                <enumeratedValue>
159540                  <name>0</name>
159541                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159542                  <value>#0</value>
159543                </enumeratedValue>
159544                <enumeratedValue>
159545                  <name>1</name>
159546                  <description>Pin logic level is logic 1.</description>
159547                  <value>#1</value>
159548                </enumeratedValue>
159549              </enumeratedValues>
159550            </field>
159551            <field>
159552              <name>PDI10</name>
159553              <description>Port Data Input</description>
159554              <bitOffset>10</bitOffset>
159555              <bitWidth>1</bitWidth>
159556              <access>read-only</access>
159557              <enumeratedValues>
159558                <enumeratedValue>
159559                  <name>0</name>
159560                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159561                  <value>#0</value>
159562                </enumeratedValue>
159563                <enumeratedValue>
159564                  <name>1</name>
159565                  <description>Pin logic level is logic 1.</description>
159566                  <value>#1</value>
159567                </enumeratedValue>
159568              </enumeratedValues>
159569            </field>
159570            <field>
159571              <name>PDI11</name>
159572              <description>Port Data Input</description>
159573              <bitOffset>11</bitOffset>
159574              <bitWidth>1</bitWidth>
159575              <access>read-only</access>
159576              <enumeratedValues>
159577                <enumeratedValue>
159578                  <name>0</name>
159579                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159580                  <value>#0</value>
159581                </enumeratedValue>
159582                <enumeratedValue>
159583                  <name>1</name>
159584                  <description>Pin logic level is logic 1.</description>
159585                  <value>#1</value>
159586                </enumeratedValue>
159587              </enumeratedValues>
159588            </field>
159589            <field>
159590              <name>PDI12</name>
159591              <description>Port Data Input</description>
159592              <bitOffset>12</bitOffset>
159593              <bitWidth>1</bitWidth>
159594              <access>read-only</access>
159595              <enumeratedValues>
159596                <enumeratedValue>
159597                  <name>0</name>
159598                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159599                  <value>#0</value>
159600                </enumeratedValue>
159601                <enumeratedValue>
159602                  <name>1</name>
159603                  <description>Pin logic level is logic 1.</description>
159604                  <value>#1</value>
159605                </enumeratedValue>
159606              </enumeratedValues>
159607            </field>
159608            <field>
159609              <name>PDI13</name>
159610              <description>Port Data Input</description>
159611              <bitOffset>13</bitOffset>
159612              <bitWidth>1</bitWidth>
159613              <access>read-only</access>
159614              <enumeratedValues>
159615                <enumeratedValue>
159616                  <name>0</name>
159617                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159618                  <value>#0</value>
159619                </enumeratedValue>
159620                <enumeratedValue>
159621                  <name>1</name>
159622                  <description>Pin logic level is logic 1.</description>
159623                  <value>#1</value>
159624                </enumeratedValue>
159625              </enumeratedValues>
159626            </field>
159627            <field>
159628              <name>PDI14</name>
159629              <description>Port Data Input</description>
159630              <bitOffset>14</bitOffset>
159631              <bitWidth>1</bitWidth>
159632              <access>read-only</access>
159633              <enumeratedValues>
159634                <enumeratedValue>
159635                  <name>0</name>
159636                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159637                  <value>#0</value>
159638                </enumeratedValue>
159639                <enumeratedValue>
159640                  <name>1</name>
159641                  <description>Pin logic level is logic 1.</description>
159642                  <value>#1</value>
159643                </enumeratedValue>
159644              </enumeratedValues>
159645            </field>
159646            <field>
159647              <name>PDI15</name>
159648              <description>Port Data Input</description>
159649              <bitOffset>15</bitOffset>
159650              <bitWidth>1</bitWidth>
159651              <access>read-only</access>
159652              <enumeratedValues>
159653                <enumeratedValue>
159654                  <name>0</name>
159655                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159656                  <value>#0</value>
159657                </enumeratedValue>
159658                <enumeratedValue>
159659                  <name>1</name>
159660                  <description>Pin logic level is logic 1.</description>
159661                  <value>#1</value>
159662                </enumeratedValue>
159663              </enumeratedValues>
159664            </field>
159665            <field>
159666              <name>PDI16</name>
159667              <description>Port Data Input</description>
159668              <bitOffset>16</bitOffset>
159669              <bitWidth>1</bitWidth>
159670              <access>read-only</access>
159671              <enumeratedValues>
159672                <enumeratedValue>
159673                  <name>0</name>
159674                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159675                  <value>#0</value>
159676                </enumeratedValue>
159677                <enumeratedValue>
159678                  <name>1</name>
159679                  <description>Pin logic level is logic 1.</description>
159680                  <value>#1</value>
159681                </enumeratedValue>
159682              </enumeratedValues>
159683            </field>
159684            <field>
159685              <name>PDI17</name>
159686              <description>Port Data Input</description>
159687              <bitOffset>17</bitOffset>
159688              <bitWidth>1</bitWidth>
159689              <access>read-only</access>
159690              <enumeratedValues>
159691                <enumeratedValue>
159692                  <name>0</name>
159693                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159694                  <value>#0</value>
159695                </enumeratedValue>
159696                <enumeratedValue>
159697                  <name>1</name>
159698                  <description>Pin logic level is logic 1.</description>
159699                  <value>#1</value>
159700                </enumeratedValue>
159701              </enumeratedValues>
159702            </field>
159703            <field>
159704              <name>PDI18</name>
159705              <description>Port Data Input</description>
159706              <bitOffset>18</bitOffset>
159707              <bitWidth>1</bitWidth>
159708              <access>read-only</access>
159709              <enumeratedValues>
159710                <enumeratedValue>
159711                  <name>0</name>
159712                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159713                  <value>#0</value>
159714                </enumeratedValue>
159715                <enumeratedValue>
159716                  <name>1</name>
159717                  <description>Pin logic level is logic 1.</description>
159718                  <value>#1</value>
159719                </enumeratedValue>
159720              </enumeratedValues>
159721            </field>
159722            <field>
159723              <name>PDI19</name>
159724              <description>Port Data Input</description>
159725              <bitOffset>19</bitOffset>
159726              <bitWidth>1</bitWidth>
159727              <access>read-only</access>
159728              <enumeratedValues>
159729                <enumeratedValue>
159730                  <name>0</name>
159731                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159732                  <value>#0</value>
159733                </enumeratedValue>
159734                <enumeratedValue>
159735                  <name>1</name>
159736                  <description>Pin logic level is logic 1.</description>
159737                  <value>#1</value>
159738                </enumeratedValue>
159739              </enumeratedValues>
159740            </field>
159741            <field>
159742              <name>PDI20</name>
159743              <description>Port Data Input</description>
159744              <bitOffset>20</bitOffset>
159745              <bitWidth>1</bitWidth>
159746              <access>read-only</access>
159747              <enumeratedValues>
159748                <enumeratedValue>
159749                  <name>0</name>
159750                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159751                  <value>#0</value>
159752                </enumeratedValue>
159753                <enumeratedValue>
159754                  <name>1</name>
159755                  <description>Pin logic level is logic 1.</description>
159756                  <value>#1</value>
159757                </enumeratedValue>
159758              </enumeratedValues>
159759            </field>
159760            <field>
159761              <name>PDI21</name>
159762              <description>Port Data Input</description>
159763              <bitOffset>21</bitOffset>
159764              <bitWidth>1</bitWidth>
159765              <access>read-only</access>
159766              <enumeratedValues>
159767                <enumeratedValue>
159768                  <name>0</name>
159769                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159770                  <value>#0</value>
159771                </enumeratedValue>
159772                <enumeratedValue>
159773                  <name>1</name>
159774                  <description>Pin logic level is logic 1.</description>
159775                  <value>#1</value>
159776                </enumeratedValue>
159777              </enumeratedValues>
159778            </field>
159779            <field>
159780              <name>PDI22</name>
159781              <description>Port Data Input</description>
159782              <bitOffset>22</bitOffset>
159783              <bitWidth>1</bitWidth>
159784              <access>read-only</access>
159785              <enumeratedValues>
159786                <enumeratedValue>
159787                  <name>0</name>
159788                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159789                  <value>#0</value>
159790                </enumeratedValue>
159791                <enumeratedValue>
159792                  <name>1</name>
159793                  <description>Pin logic level is logic 1.</description>
159794                  <value>#1</value>
159795                </enumeratedValue>
159796              </enumeratedValues>
159797            </field>
159798            <field>
159799              <name>PDI23</name>
159800              <description>Port Data Input</description>
159801              <bitOffset>23</bitOffset>
159802              <bitWidth>1</bitWidth>
159803              <access>read-only</access>
159804              <enumeratedValues>
159805                <enumeratedValue>
159806                  <name>0</name>
159807                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159808                  <value>#0</value>
159809                </enumeratedValue>
159810                <enumeratedValue>
159811                  <name>1</name>
159812                  <description>Pin logic level is logic 1.</description>
159813                  <value>#1</value>
159814                </enumeratedValue>
159815              </enumeratedValues>
159816            </field>
159817            <field>
159818              <name>PDI24</name>
159819              <description>Port Data Input</description>
159820              <bitOffset>24</bitOffset>
159821              <bitWidth>1</bitWidth>
159822              <access>read-only</access>
159823              <enumeratedValues>
159824                <enumeratedValue>
159825                  <name>0</name>
159826                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159827                  <value>#0</value>
159828                </enumeratedValue>
159829                <enumeratedValue>
159830                  <name>1</name>
159831                  <description>Pin logic level is logic 1.</description>
159832                  <value>#1</value>
159833                </enumeratedValue>
159834              </enumeratedValues>
159835            </field>
159836            <field>
159837              <name>PDI25</name>
159838              <description>Port Data Input</description>
159839              <bitOffset>25</bitOffset>
159840              <bitWidth>1</bitWidth>
159841              <access>read-only</access>
159842              <enumeratedValues>
159843                <enumeratedValue>
159844                  <name>0</name>
159845                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159846                  <value>#0</value>
159847                </enumeratedValue>
159848                <enumeratedValue>
159849                  <name>1</name>
159850                  <description>Pin logic level is logic 1.</description>
159851                  <value>#1</value>
159852                </enumeratedValue>
159853              </enumeratedValues>
159854            </field>
159855            <field>
159856              <name>PDI26</name>
159857              <description>Port Data Input</description>
159858              <bitOffset>26</bitOffset>
159859              <bitWidth>1</bitWidth>
159860              <access>read-only</access>
159861              <enumeratedValues>
159862                <enumeratedValue>
159863                  <name>0</name>
159864                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159865                  <value>#0</value>
159866                </enumeratedValue>
159867                <enumeratedValue>
159868                  <name>1</name>
159869                  <description>Pin logic level is logic 1.</description>
159870                  <value>#1</value>
159871                </enumeratedValue>
159872              </enumeratedValues>
159873            </field>
159874            <field>
159875              <name>PDI27</name>
159876              <description>Port Data Input</description>
159877              <bitOffset>27</bitOffset>
159878              <bitWidth>1</bitWidth>
159879              <access>read-only</access>
159880              <enumeratedValues>
159881                <enumeratedValue>
159882                  <name>0</name>
159883                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159884                  <value>#0</value>
159885                </enumeratedValue>
159886                <enumeratedValue>
159887                  <name>1</name>
159888                  <description>Pin logic level is logic 1.</description>
159889                  <value>#1</value>
159890                </enumeratedValue>
159891              </enumeratedValues>
159892            </field>
159893            <field>
159894              <name>PDI28</name>
159895              <description>Port Data Input</description>
159896              <bitOffset>28</bitOffset>
159897              <bitWidth>1</bitWidth>
159898              <access>read-only</access>
159899              <enumeratedValues>
159900                <enumeratedValue>
159901                  <name>0</name>
159902                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159903                  <value>#0</value>
159904                </enumeratedValue>
159905                <enumeratedValue>
159906                  <name>1</name>
159907                  <description>Pin logic level is logic 1.</description>
159908                  <value>#1</value>
159909                </enumeratedValue>
159910              </enumeratedValues>
159911            </field>
159912            <field>
159913              <name>PDI29</name>
159914              <description>Port Data Input</description>
159915              <bitOffset>29</bitOffset>
159916              <bitWidth>1</bitWidth>
159917              <access>read-only</access>
159918              <enumeratedValues>
159919                <enumeratedValue>
159920                  <name>0</name>
159921                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159922                  <value>#0</value>
159923                </enumeratedValue>
159924                <enumeratedValue>
159925                  <name>1</name>
159926                  <description>Pin logic level is logic 1.</description>
159927                  <value>#1</value>
159928                </enumeratedValue>
159929              </enumeratedValues>
159930            </field>
159931            <field>
159932              <name>PDI30</name>
159933              <description>Port Data Input</description>
159934              <bitOffset>30</bitOffset>
159935              <bitWidth>1</bitWidth>
159936              <access>read-only</access>
159937              <enumeratedValues>
159938                <enumeratedValue>
159939                  <name>0</name>
159940                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159941                  <value>#0</value>
159942                </enumeratedValue>
159943                <enumeratedValue>
159944                  <name>1</name>
159945                  <description>Pin logic level is logic 1.</description>
159946                  <value>#1</value>
159947                </enumeratedValue>
159948              </enumeratedValues>
159949            </field>
159950            <field>
159951              <name>PDI31</name>
159952              <description>Port Data Input</description>
159953              <bitOffset>31</bitOffset>
159954              <bitWidth>1</bitWidth>
159955              <access>read-only</access>
159956              <enumeratedValues>
159957                <enumeratedValue>
159958                  <name>0</name>
159959                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
159960                  <value>#0</value>
159961                </enumeratedValue>
159962                <enumeratedValue>
159963                  <name>1</name>
159964                  <description>Pin logic level is logic 1.</description>
159965                  <value>#1</value>
159966                </enumeratedValue>
159967              </enumeratedValues>
159968            </field>
159969          </fields>
159970        </register>
159971        <register>
159972          <name>PDDR</name>
159973          <description>Port Data Direction Register</description>
159974          <addressOffset>0x14</addressOffset>
159975          <size>32</size>
159976          <access>read-write</access>
159977          <resetValue>0</resetValue>
159978          <resetMask>0xFFFFFFFF</resetMask>
159979          <fields>
159980            <field>
159981              <name>PDD0</name>
159982              <description>Port Data Direction</description>
159983              <bitOffset>0</bitOffset>
159984              <bitWidth>1</bitWidth>
159985              <access>read-write</access>
159986              <enumeratedValues>
159987                <enumeratedValue>
159988                  <name>0</name>
159989                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
159990                  <value>#0</value>
159991                </enumeratedValue>
159992                <enumeratedValue>
159993                  <name>1</name>
159994                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
159995                  <value>#1</value>
159996                </enumeratedValue>
159997              </enumeratedValues>
159998            </field>
159999            <field>
160000              <name>PDD1</name>
160001              <description>Port Data Direction</description>
160002              <bitOffset>1</bitOffset>
160003              <bitWidth>1</bitWidth>
160004              <access>read-write</access>
160005              <enumeratedValues>
160006                <enumeratedValue>
160007                  <name>0</name>
160008                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160009                  <value>#0</value>
160010                </enumeratedValue>
160011                <enumeratedValue>
160012                  <name>1</name>
160013                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160014                  <value>#1</value>
160015                </enumeratedValue>
160016              </enumeratedValues>
160017            </field>
160018            <field>
160019              <name>PDD2</name>
160020              <description>Port Data Direction</description>
160021              <bitOffset>2</bitOffset>
160022              <bitWidth>1</bitWidth>
160023              <access>read-write</access>
160024              <enumeratedValues>
160025                <enumeratedValue>
160026                  <name>0</name>
160027                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160028                  <value>#0</value>
160029                </enumeratedValue>
160030                <enumeratedValue>
160031                  <name>1</name>
160032                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160033                  <value>#1</value>
160034                </enumeratedValue>
160035              </enumeratedValues>
160036            </field>
160037            <field>
160038              <name>PDD3</name>
160039              <description>Port Data Direction</description>
160040              <bitOffset>3</bitOffset>
160041              <bitWidth>1</bitWidth>
160042              <access>read-write</access>
160043              <enumeratedValues>
160044                <enumeratedValue>
160045                  <name>0</name>
160046                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160047                  <value>#0</value>
160048                </enumeratedValue>
160049                <enumeratedValue>
160050                  <name>1</name>
160051                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160052                  <value>#1</value>
160053                </enumeratedValue>
160054              </enumeratedValues>
160055            </field>
160056            <field>
160057              <name>PDD4</name>
160058              <description>Port Data Direction</description>
160059              <bitOffset>4</bitOffset>
160060              <bitWidth>1</bitWidth>
160061              <access>read-write</access>
160062              <enumeratedValues>
160063                <enumeratedValue>
160064                  <name>0</name>
160065                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160066                  <value>#0</value>
160067                </enumeratedValue>
160068                <enumeratedValue>
160069                  <name>1</name>
160070                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160071                  <value>#1</value>
160072                </enumeratedValue>
160073              </enumeratedValues>
160074            </field>
160075            <field>
160076              <name>PDD5</name>
160077              <description>Port Data Direction</description>
160078              <bitOffset>5</bitOffset>
160079              <bitWidth>1</bitWidth>
160080              <access>read-write</access>
160081              <enumeratedValues>
160082                <enumeratedValue>
160083                  <name>0</name>
160084                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160085                  <value>#0</value>
160086                </enumeratedValue>
160087                <enumeratedValue>
160088                  <name>1</name>
160089                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160090                  <value>#1</value>
160091                </enumeratedValue>
160092              </enumeratedValues>
160093            </field>
160094            <field>
160095              <name>PDD6</name>
160096              <description>Port Data Direction</description>
160097              <bitOffset>6</bitOffset>
160098              <bitWidth>1</bitWidth>
160099              <access>read-write</access>
160100              <enumeratedValues>
160101                <enumeratedValue>
160102                  <name>0</name>
160103                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160104                  <value>#0</value>
160105                </enumeratedValue>
160106                <enumeratedValue>
160107                  <name>1</name>
160108                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160109                  <value>#1</value>
160110                </enumeratedValue>
160111              </enumeratedValues>
160112            </field>
160113            <field>
160114              <name>PDD7</name>
160115              <description>Port Data Direction</description>
160116              <bitOffset>7</bitOffset>
160117              <bitWidth>1</bitWidth>
160118              <access>read-write</access>
160119              <enumeratedValues>
160120                <enumeratedValue>
160121                  <name>0</name>
160122                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160123                  <value>#0</value>
160124                </enumeratedValue>
160125                <enumeratedValue>
160126                  <name>1</name>
160127                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160128                  <value>#1</value>
160129                </enumeratedValue>
160130              </enumeratedValues>
160131            </field>
160132            <field>
160133              <name>PDD8</name>
160134              <description>Port Data Direction</description>
160135              <bitOffset>8</bitOffset>
160136              <bitWidth>1</bitWidth>
160137              <access>read-write</access>
160138              <enumeratedValues>
160139                <enumeratedValue>
160140                  <name>0</name>
160141                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160142                  <value>#0</value>
160143                </enumeratedValue>
160144                <enumeratedValue>
160145                  <name>1</name>
160146                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160147                  <value>#1</value>
160148                </enumeratedValue>
160149              </enumeratedValues>
160150            </field>
160151            <field>
160152              <name>PDD9</name>
160153              <description>Port Data Direction</description>
160154              <bitOffset>9</bitOffset>
160155              <bitWidth>1</bitWidth>
160156              <access>read-write</access>
160157              <enumeratedValues>
160158                <enumeratedValue>
160159                  <name>0</name>
160160                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160161                  <value>#0</value>
160162                </enumeratedValue>
160163                <enumeratedValue>
160164                  <name>1</name>
160165                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160166                  <value>#1</value>
160167                </enumeratedValue>
160168              </enumeratedValues>
160169            </field>
160170            <field>
160171              <name>PDD10</name>
160172              <description>Port Data Direction</description>
160173              <bitOffset>10</bitOffset>
160174              <bitWidth>1</bitWidth>
160175              <access>read-write</access>
160176              <enumeratedValues>
160177                <enumeratedValue>
160178                  <name>0</name>
160179                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160180                  <value>#0</value>
160181                </enumeratedValue>
160182                <enumeratedValue>
160183                  <name>1</name>
160184                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160185                  <value>#1</value>
160186                </enumeratedValue>
160187              </enumeratedValues>
160188            </field>
160189            <field>
160190              <name>PDD11</name>
160191              <description>Port Data Direction</description>
160192              <bitOffset>11</bitOffset>
160193              <bitWidth>1</bitWidth>
160194              <access>read-write</access>
160195              <enumeratedValues>
160196                <enumeratedValue>
160197                  <name>0</name>
160198                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160199                  <value>#0</value>
160200                </enumeratedValue>
160201                <enumeratedValue>
160202                  <name>1</name>
160203                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160204                  <value>#1</value>
160205                </enumeratedValue>
160206              </enumeratedValues>
160207            </field>
160208            <field>
160209              <name>PDD12</name>
160210              <description>Port Data Direction</description>
160211              <bitOffset>12</bitOffset>
160212              <bitWidth>1</bitWidth>
160213              <access>read-write</access>
160214              <enumeratedValues>
160215                <enumeratedValue>
160216                  <name>0</name>
160217                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160218                  <value>#0</value>
160219                </enumeratedValue>
160220                <enumeratedValue>
160221                  <name>1</name>
160222                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160223                  <value>#1</value>
160224                </enumeratedValue>
160225              </enumeratedValues>
160226            </field>
160227            <field>
160228              <name>PDD13</name>
160229              <description>Port Data Direction</description>
160230              <bitOffset>13</bitOffset>
160231              <bitWidth>1</bitWidth>
160232              <access>read-write</access>
160233              <enumeratedValues>
160234                <enumeratedValue>
160235                  <name>0</name>
160236                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160237                  <value>#0</value>
160238                </enumeratedValue>
160239                <enumeratedValue>
160240                  <name>1</name>
160241                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160242                  <value>#1</value>
160243                </enumeratedValue>
160244              </enumeratedValues>
160245            </field>
160246            <field>
160247              <name>PDD14</name>
160248              <description>Port Data Direction</description>
160249              <bitOffset>14</bitOffset>
160250              <bitWidth>1</bitWidth>
160251              <access>read-write</access>
160252              <enumeratedValues>
160253                <enumeratedValue>
160254                  <name>0</name>
160255                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160256                  <value>#0</value>
160257                </enumeratedValue>
160258                <enumeratedValue>
160259                  <name>1</name>
160260                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160261                  <value>#1</value>
160262                </enumeratedValue>
160263              </enumeratedValues>
160264            </field>
160265            <field>
160266              <name>PDD15</name>
160267              <description>Port Data Direction</description>
160268              <bitOffset>15</bitOffset>
160269              <bitWidth>1</bitWidth>
160270              <access>read-write</access>
160271              <enumeratedValues>
160272                <enumeratedValue>
160273                  <name>0</name>
160274                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160275                  <value>#0</value>
160276                </enumeratedValue>
160277                <enumeratedValue>
160278                  <name>1</name>
160279                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160280                  <value>#1</value>
160281                </enumeratedValue>
160282              </enumeratedValues>
160283            </field>
160284            <field>
160285              <name>PDD16</name>
160286              <description>Port Data Direction</description>
160287              <bitOffset>16</bitOffset>
160288              <bitWidth>1</bitWidth>
160289              <access>read-write</access>
160290              <enumeratedValues>
160291                <enumeratedValue>
160292                  <name>0</name>
160293                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160294                  <value>#0</value>
160295                </enumeratedValue>
160296                <enumeratedValue>
160297                  <name>1</name>
160298                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160299                  <value>#1</value>
160300                </enumeratedValue>
160301              </enumeratedValues>
160302            </field>
160303            <field>
160304              <name>PDD17</name>
160305              <description>Port Data Direction</description>
160306              <bitOffset>17</bitOffset>
160307              <bitWidth>1</bitWidth>
160308              <access>read-write</access>
160309              <enumeratedValues>
160310                <enumeratedValue>
160311                  <name>0</name>
160312                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160313                  <value>#0</value>
160314                </enumeratedValue>
160315                <enumeratedValue>
160316                  <name>1</name>
160317                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160318                  <value>#1</value>
160319                </enumeratedValue>
160320              </enumeratedValues>
160321            </field>
160322            <field>
160323              <name>PDD18</name>
160324              <description>Port Data Direction</description>
160325              <bitOffset>18</bitOffset>
160326              <bitWidth>1</bitWidth>
160327              <access>read-write</access>
160328              <enumeratedValues>
160329                <enumeratedValue>
160330                  <name>0</name>
160331                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160332                  <value>#0</value>
160333                </enumeratedValue>
160334                <enumeratedValue>
160335                  <name>1</name>
160336                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160337                  <value>#1</value>
160338                </enumeratedValue>
160339              </enumeratedValues>
160340            </field>
160341            <field>
160342              <name>PDD19</name>
160343              <description>Port Data Direction</description>
160344              <bitOffset>19</bitOffset>
160345              <bitWidth>1</bitWidth>
160346              <access>read-write</access>
160347              <enumeratedValues>
160348                <enumeratedValue>
160349                  <name>0</name>
160350                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160351                  <value>#0</value>
160352                </enumeratedValue>
160353                <enumeratedValue>
160354                  <name>1</name>
160355                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160356                  <value>#1</value>
160357                </enumeratedValue>
160358              </enumeratedValues>
160359            </field>
160360            <field>
160361              <name>PDD20</name>
160362              <description>Port Data Direction</description>
160363              <bitOffset>20</bitOffset>
160364              <bitWidth>1</bitWidth>
160365              <access>read-write</access>
160366              <enumeratedValues>
160367                <enumeratedValue>
160368                  <name>0</name>
160369                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160370                  <value>#0</value>
160371                </enumeratedValue>
160372                <enumeratedValue>
160373                  <name>1</name>
160374                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160375                  <value>#1</value>
160376                </enumeratedValue>
160377              </enumeratedValues>
160378            </field>
160379            <field>
160380              <name>PDD21</name>
160381              <description>Port Data Direction</description>
160382              <bitOffset>21</bitOffset>
160383              <bitWidth>1</bitWidth>
160384              <access>read-write</access>
160385              <enumeratedValues>
160386                <enumeratedValue>
160387                  <name>0</name>
160388                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160389                  <value>#0</value>
160390                </enumeratedValue>
160391                <enumeratedValue>
160392                  <name>1</name>
160393                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160394                  <value>#1</value>
160395                </enumeratedValue>
160396              </enumeratedValues>
160397            </field>
160398            <field>
160399              <name>PDD22</name>
160400              <description>Port Data Direction</description>
160401              <bitOffset>22</bitOffset>
160402              <bitWidth>1</bitWidth>
160403              <access>read-write</access>
160404              <enumeratedValues>
160405                <enumeratedValue>
160406                  <name>0</name>
160407                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160408                  <value>#0</value>
160409                </enumeratedValue>
160410                <enumeratedValue>
160411                  <name>1</name>
160412                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160413                  <value>#1</value>
160414                </enumeratedValue>
160415              </enumeratedValues>
160416            </field>
160417            <field>
160418              <name>PDD23</name>
160419              <description>Port Data Direction</description>
160420              <bitOffset>23</bitOffset>
160421              <bitWidth>1</bitWidth>
160422              <access>read-write</access>
160423              <enumeratedValues>
160424                <enumeratedValue>
160425                  <name>0</name>
160426                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160427                  <value>#0</value>
160428                </enumeratedValue>
160429                <enumeratedValue>
160430                  <name>1</name>
160431                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160432                  <value>#1</value>
160433                </enumeratedValue>
160434              </enumeratedValues>
160435            </field>
160436            <field>
160437              <name>PDD24</name>
160438              <description>Port Data Direction</description>
160439              <bitOffset>24</bitOffset>
160440              <bitWidth>1</bitWidth>
160441              <access>read-write</access>
160442              <enumeratedValues>
160443                <enumeratedValue>
160444                  <name>0</name>
160445                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160446                  <value>#0</value>
160447                </enumeratedValue>
160448                <enumeratedValue>
160449                  <name>1</name>
160450                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160451                  <value>#1</value>
160452                </enumeratedValue>
160453              </enumeratedValues>
160454            </field>
160455            <field>
160456              <name>PDD25</name>
160457              <description>Port Data Direction</description>
160458              <bitOffset>25</bitOffset>
160459              <bitWidth>1</bitWidth>
160460              <access>read-write</access>
160461              <enumeratedValues>
160462                <enumeratedValue>
160463                  <name>0</name>
160464                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160465                  <value>#0</value>
160466                </enumeratedValue>
160467                <enumeratedValue>
160468                  <name>1</name>
160469                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160470                  <value>#1</value>
160471                </enumeratedValue>
160472              </enumeratedValues>
160473            </field>
160474            <field>
160475              <name>PDD26</name>
160476              <description>Port Data Direction</description>
160477              <bitOffset>26</bitOffset>
160478              <bitWidth>1</bitWidth>
160479              <access>read-write</access>
160480              <enumeratedValues>
160481                <enumeratedValue>
160482                  <name>0</name>
160483                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160484                  <value>#0</value>
160485                </enumeratedValue>
160486                <enumeratedValue>
160487                  <name>1</name>
160488                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160489                  <value>#1</value>
160490                </enumeratedValue>
160491              </enumeratedValues>
160492            </field>
160493            <field>
160494              <name>PDD27</name>
160495              <description>Port Data Direction</description>
160496              <bitOffset>27</bitOffset>
160497              <bitWidth>1</bitWidth>
160498              <access>read-write</access>
160499              <enumeratedValues>
160500                <enumeratedValue>
160501                  <name>0</name>
160502                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160503                  <value>#0</value>
160504                </enumeratedValue>
160505                <enumeratedValue>
160506                  <name>1</name>
160507                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160508                  <value>#1</value>
160509                </enumeratedValue>
160510              </enumeratedValues>
160511            </field>
160512            <field>
160513              <name>PDD28</name>
160514              <description>Port Data Direction</description>
160515              <bitOffset>28</bitOffset>
160516              <bitWidth>1</bitWidth>
160517              <access>read-write</access>
160518              <enumeratedValues>
160519                <enumeratedValue>
160520                  <name>0</name>
160521                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160522                  <value>#0</value>
160523                </enumeratedValue>
160524                <enumeratedValue>
160525                  <name>1</name>
160526                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160527                  <value>#1</value>
160528                </enumeratedValue>
160529              </enumeratedValues>
160530            </field>
160531            <field>
160532              <name>PDD29</name>
160533              <description>Port Data Direction</description>
160534              <bitOffset>29</bitOffset>
160535              <bitWidth>1</bitWidth>
160536              <access>read-write</access>
160537              <enumeratedValues>
160538                <enumeratedValue>
160539                  <name>0</name>
160540                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160541                  <value>#0</value>
160542                </enumeratedValue>
160543                <enumeratedValue>
160544                  <name>1</name>
160545                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160546                  <value>#1</value>
160547                </enumeratedValue>
160548              </enumeratedValues>
160549            </field>
160550            <field>
160551              <name>PDD30</name>
160552              <description>Port Data Direction</description>
160553              <bitOffset>30</bitOffset>
160554              <bitWidth>1</bitWidth>
160555              <access>read-write</access>
160556              <enumeratedValues>
160557                <enumeratedValue>
160558                  <name>0</name>
160559                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160560                  <value>#0</value>
160561                </enumeratedValue>
160562                <enumeratedValue>
160563                  <name>1</name>
160564                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160565                  <value>#1</value>
160566                </enumeratedValue>
160567              </enumeratedValues>
160568            </field>
160569            <field>
160570              <name>PDD31</name>
160571              <description>Port Data Direction</description>
160572              <bitOffset>31</bitOffset>
160573              <bitWidth>1</bitWidth>
160574              <access>read-write</access>
160575              <enumeratedValues>
160576                <enumeratedValue>
160577                  <name>0</name>
160578                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
160579                  <value>#0</value>
160580                </enumeratedValue>
160581                <enumeratedValue>
160582                  <name>1</name>
160583                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
160584                  <value>#1</value>
160585                </enumeratedValue>
160586              </enumeratedValues>
160587            </field>
160588          </fields>
160589        </register>
160590      </registers>
160591    </peripheral>
160592    <peripheral>
160593      <name>GPIOC</name>
160594      <description>General Purpose Input/Output</description>
160595      <groupName>GPIO</groupName>
160596      <prependToName>GPIOC_</prependToName>
160597      <baseAddress>0x400FF080</baseAddress>
160598      <addressBlock>
160599        <offset>0</offset>
160600        <size>0x18</size>
160601        <usage>registers</usage>
160602      </addressBlock>
160603      <interrupt>
160604        <name>PORTC</name>
160605        <value>61</value>
160606      </interrupt>
160607      <registers>
160608        <register>
160609          <name>PDOR</name>
160610          <description>Port Data Output Register</description>
160611          <addressOffset>0</addressOffset>
160612          <size>32</size>
160613          <access>read-write</access>
160614          <resetValue>0</resetValue>
160615          <resetMask>0xFFFFFFFF</resetMask>
160616          <fields>
160617            <field>
160618              <name>PDO0</name>
160619              <description>Port Data Output</description>
160620              <bitOffset>0</bitOffset>
160621              <bitWidth>1</bitWidth>
160622              <access>read-write</access>
160623              <enumeratedValues>
160624                <enumeratedValue>
160625                  <name>0</name>
160626                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160627                  <value>#0</value>
160628                </enumeratedValue>
160629                <enumeratedValue>
160630                  <name>1</name>
160631                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160632                  <value>#1</value>
160633                </enumeratedValue>
160634              </enumeratedValues>
160635            </field>
160636            <field>
160637              <name>PDO1</name>
160638              <description>Port Data Output</description>
160639              <bitOffset>1</bitOffset>
160640              <bitWidth>1</bitWidth>
160641              <access>read-write</access>
160642              <enumeratedValues>
160643                <enumeratedValue>
160644                  <name>0</name>
160645                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160646                  <value>#0</value>
160647                </enumeratedValue>
160648                <enumeratedValue>
160649                  <name>1</name>
160650                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160651                  <value>#1</value>
160652                </enumeratedValue>
160653              </enumeratedValues>
160654            </field>
160655            <field>
160656              <name>PDO2</name>
160657              <description>Port Data Output</description>
160658              <bitOffset>2</bitOffset>
160659              <bitWidth>1</bitWidth>
160660              <access>read-write</access>
160661              <enumeratedValues>
160662                <enumeratedValue>
160663                  <name>0</name>
160664                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160665                  <value>#0</value>
160666                </enumeratedValue>
160667                <enumeratedValue>
160668                  <name>1</name>
160669                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160670                  <value>#1</value>
160671                </enumeratedValue>
160672              </enumeratedValues>
160673            </field>
160674            <field>
160675              <name>PDO3</name>
160676              <description>Port Data Output</description>
160677              <bitOffset>3</bitOffset>
160678              <bitWidth>1</bitWidth>
160679              <access>read-write</access>
160680              <enumeratedValues>
160681                <enumeratedValue>
160682                  <name>0</name>
160683                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160684                  <value>#0</value>
160685                </enumeratedValue>
160686                <enumeratedValue>
160687                  <name>1</name>
160688                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160689                  <value>#1</value>
160690                </enumeratedValue>
160691              </enumeratedValues>
160692            </field>
160693            <field>
160694              <name>PDO4</name>
160695              <description>Port Data Output</description>
160696              <bitOffset>4</bitOffset>
160697              <bitWidth>1</bitWidth>
160698              <access>read-write</access>
160699              <enumeratedValues>
160700                <enumeratedValue>
160701                  <name>0</name>
160702                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160703                  <value>#0</value>
160704                </enumeratedValue>
160705                <enumeratedValue>
160706                  <name>1</name>
160707                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160708                  <value>#1</value>
160709                </enumeratedValue>
160710              </enumeratedValues>
160711            </field>
160712            <field>
160713              <name>PDO5</name>
160714              <description>Port Data Output</description>
160715              <bitOffset>5</bitOffset>
160716              <bitWidth>1</bitWidth>
160717              <access>read-write</access>
160718              <enumeratedValues>
160719                <enumeratedValue>
160720                  <name>0</name>
160721                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160722                  <value>#0</value>
160723                </enumeratedValue>
160724                <enumeratedValue>
160725                  <name>1</name>
160726                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160727                  <value>#1</value>
160728                </enumeratedValue>
160729              </enumeratedValues>
160730            </field>
160731            <field>
160732              <name>PDO6</name>
160733              <description>Port Data Output</description>
160734              <bitOffset>6</bitOffset>
160735              <bitWidth>1</bitWidth>
160736              <access>read-write</access>
160737              <enumeratedValues>
160738                <enumeratedValue>
160739                  <name>0</name>
160740                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160741                  <value>#0</value>
160742                </enumeratedValue>
160743                <enumeratedValue>
160744                  <name>1</name>
160745                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160746                  <value>#1</value>
160747                </enumeratedValue>
160748              </enumeratedValues>
160749            </field>
160750            <field>
160751              <name>PDO7</name>
160752              <description>Port Data Output</description>
160753              <bitOffset>7</bitOffset>
160754              <bitWidth>1</bitWidth>
160755              <access>read-write</access>
160756              <enumeratedValues>
160757                <enumeratedValue>
160758                  <name>0</name>
160759                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160760                  <value>#0</value>
160761                </enumeratedValue>
160762                <enumeratedValue>
160763                  <name>1</name>
160764                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160765                  <value>#1</value>
160766                </enumeratedValue>
160767              </enumeratedValues>
160768            </field>
160769            <field>
160770              <name>PDO8</name>
160771              <description>Port Data Output</description>
160772              <bitOffset>8</bitOffset>
160773              <bitWidth>1</bitWidth>
160774              <access>read-write</access>
160775              <enumeratedValues>
160776                <enumeratedValue>
160777                  <name>0</name>
160778                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160779                  <value>#0</value>
160780                </enumeratedValue>
160781                <enumeratedValue>
160782                  <name>1</name>
160783                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160784                  <value>#1</value>
160785                </enumeratedValue>
160786              </enumeratedValues>
160787            </field>
160788            <field>
160789              <name>PDO9</name>
160790              <description>Port Data Output</description>
160791              <bitOffset>9</bitOffset>
160792              <bitWidth>1</bitWidth>
160793              <access>read-write</access>
160794              <enumeratedValues>
160795                <enumeratedValue>
160796                  <name>0</name>
160797                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160798                  <value>#0</value>
160799                </enumeratedValue>
160800                <enumeratedValue>
160801                  <name>1</name>
160802                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160803                  <value>#1</value>
160804                </enumeratedValue>
160805              </enumeratedValues>
160806            </field>
160807            <field>
160808              <name>PDO10</name>
160809              <description>Port Data Output</description>
160810              <bitOffset>10</bitOffset>
160811              <bitWidth>1</bitWidth>
160812              <access>read-write</access>
160813              <enumeratedValues>
160814                <enumeratedValue>
160815                  <name>0</name>
160816                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160817                  <value>#0</value>
160818                </enumeratedValue>
160819                <enumeratedValue>
160820                  <name>1</name>
160821                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160822                  <value>#1</value>
160823                </enumeratedValue>
160824              </enumeratedValues>
160825            </field>
160826            <field>
160827              <name>PDO11</name>
160828              <description>Port Data Output</description>
160829              <bitOffset>11</bitOffset>
160830              <bitWidth>1</bitWidth>
160831              <access>read-write</access>
160832              <enumeratedValues>
160833                <enumeratedValue>
160834                  <name>0</name>
160835                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160836                  <value>#0</value>
160837                </enumeratedValue>
160838                <enumeratedValue>
160839                  <name>1</name>
160840                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160841                  <value>#1</value>
160842                </enumeratedValue>
160843              </enumeratedValues>
160844            </field>
160845            <field>
160846              <name>PDO12</name>
160847              <description>Port Data Output</description>
160848              <bitOffset>12</bitOffset>
160849              <bitWidth>1</bitWidth>
160850              <access>read-write</access>
160851              <enumeratedValues>
160852                <enumeratedValue>
160853                  <name>0</name>
160854                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160855                  <value>#0</value>
160856                </enumeratedValue>
160857                <enumeratedValue>
160858                  <name>1</name>
160859                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160860                  <value>#1</value>
160861                </enumeratedValue>
160862              </enumeratedValues>
160863            </field>
160864            <field>
160865              <name>PDO13</name>
160866              <description>Port Data Output</description>
160867              <bitOffset>13</bitOffset>
160868              <bitWidth>1</bitWidth>
160869              <access>read-write</access>
160870              <enumeratedValues>
160871                <enumeratedValue>
160872                  <name>0</name>
160873                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160874                  <value>#0</value>
160875                </enumeratedValue>
160876                <enumeratedValue>
160877                  <name>1</name>
160878                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160879                  <value>#1</value>
160880                </enumeratedValue>
160881              </enumeratedValues>
160882            </field>
160883            <field>
160884              <name>PDO14</name>
160885              <description>Port Data Output</description>
160886              <bitOffset>14</bitOffset>
160887              <bitWidth>1</bitWidth>
160888              <access>read-write</access>
160889              <enumeratedValues>
160890                <enumeratedValue>
160891                  <name>0</name>
160892                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160893                  <value>#0</value>
160894                </enumeratedValue>
160895                <enumeratedValue>
160896                  <name>1</name>
160897                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160898                  <value>#1</value>
160899                </enumeratedValue>
160900              </enumeratedValues>
160901            </field>
160902            <field>
160903              <name>PDO15</name>
160904              <description>Port Data Output</description>
160905              <bitOffset>15</bitOffset>
160906              <bitWidth>1</bitWidth>
160907              <access>read-write</access>
160908              <enumeratedValues>
160909                <enumeratedValue>
160910                  <name>0</name>
160911                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160912                  <value>#0</value>
160913                </enumeratedValue>
160914                <enumeratedValue>
160915                  <name>1</name>
160916                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160917                  <value>#1</value>
160918                </enumeratedValue>
160919              </enumeratedValues>
160920            </field>
160921            <field>
160922              <name>PDO16</name>
160923              <description>Port Data Output</description>
160924              <bitOffset>16</bitOffset>
160925              <bitWidth>1</bitWidth>
160926              <access>read-write</access>
160927              <enumeratedValues>
160928                <enumeratedValue>
160929                  <name>0</name>
160930                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160931                  <value>#0</value>
160932                </enumeratedValue>
160933                <enumeratedValue>
160934                  <name>1</name>
160935                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160936                  <value>#1</value>
160937                </enumeratedValue>
160938              </enumeratedValues>
160939            </field>
160940            <field>
160941              <name>PDO17</name>
160942              <description>Port Data Output</description>
160943              <bitOffset>17</bitOffset>
160944              <bitWidth>1</bitWidth>
160945              <access>read-write</access>
160946              <enumeratedValues>
160947                <enumeratedValue>
160948                  <name>0</name>
160949                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160950                  <value>#0</value>
160951                </enumeratedValue>
160952                <enumeratedValue>
160953                  <name>1</name>
160954                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160955                  <value>#1</value>
160956                </enumeratedValue>
160957              </enumeratedValues>
160958            </field>
160959            <field>
160960              <name>PDO18</name>
160961              <description>Port Data Output</description>
160962              <bitOffset>18</bitOffset>
160963              <bitWidth>1</bitWidth>
160964              <access>read-write</access>
160965              <enumeratedValues>
160966                <enumeratedValue>
160967                  <name>0</name>
160968                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160969                  <value>#0</value>
160970                </enumeratedValue>
160971                <enumeratedValue>
160972                  <name>1</name>
160973                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160974                  <value>#1</value>
160975                </enumeratedValue>
160976              </enumeratedValues>
160977            </field>
160978            <field>
160979              <name>PDO19</name>
160980              <description>Port Data Output</description>
160981              <bitOffset>19</bitOffset>
160982              <bitWidth>1</bitWidth>
160983              <access>read-write</access>
160984              <enumeratedValues>
160985                <enumeratedValue>
160986                  <name>0</name>
160987                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
160988                  <value>#0</value>
160989                </enumeratedValue>
160990                <enumeratedValue>
160991                  <name>1</name>
160992                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
160993                  <value>#1</value>
160994                </enumeratedValue>
160995              </enumeratedValues>
160996            </field>
160997            <field>
160998              <name>PDO20</name>
160999              <description>Port Data Output</description>
161000              <bitOffset>20</bitOffset>
161001              <bitWidth>1</bitWidth>
161002              <access>read-write</access>
161003              <enumeratedValues>
161004                <enumeratedValue>
161005                  <name>0</name>
161006                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
161007                  <value>#0</value>
161008                </enumeratedValue>
161009                <enumeratedValue>
161010                  <name>1</name>
161011                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
161012                  <value>#1</value>
161013                </enumeratedValue>
161014              </enumeratedValues>
161015            </field>
161016            <field>
161017              <name>PDO21</name>
161018              <description>Port Data Output</description>
161019              <bitOffset>21</bitOffset>
161020              <bitWidth>1</bitWidth>
161021              <access>read-write</access>
161022              <enumeratedValues>
161023                <enumeratedValue>
161024                  <name>0</name>
161025                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
161026                  <value>#0</value>
161027                </enumeratedValue>
161028                <enumeratedValue>
161029                  <name>1</name>
161030                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
161031                  <value>#1</value>
161032                </enumeratedValue>
161033              </enumeratedValues>
161034            </field>
161035            <field>
161036              <name>PDO22</name>
161037              <description>Port Data Output</description>
161038              <bitOffset>22</bitOffset>
161039              <bitWidth>1</bitWidth>
161040              <access>read-write</access>
161041              <enumeratedValues>
161042                <enumeratedValue>
161043                  <name>0</name>
161044                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
161045                  <value>#0</value>
161046                </enumeratedValue>
161047                <enumeratedValue>
161048                  <name>1</name>
161049                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
161050                  <value>#1</value>
161051                </enumeratedValue>
161052              </enumeratedValues>
161053            </field>
161054            <field>
161055              <name>PDO23</name>
161056              <description>Port Data Output</description>
161057              <bitOffset>23</bitOffset>
161058              <bitWidth>1</bitWidth>
161059              <access>read-write</access>
161060              <enumeratedValues>
161061                <enumeratedValue>
161062                  <name>0</name>
161063                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
161064                  <value>#0</value>
161065                </enumeratedValue>
161066                <enumeratedValue>
161067                  <name>1</name>
161068                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
161069                  <value>#1</value>
161070                </enumeratedValue>
161071              </enumeratedValues>
161072            </field>
161073            <field>
161074              <name>PDO24</name>
161075              <description>Port Data Output</description>
161076              <bitOffset>24</bitOffset>
161077              <bitWidth>1</bitWidth>
161078              <access>read-write</access>
161079              <enumeratedValues>
161080                <enumeratedValue>
161081                  <name>0</name>
161082                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
161083                  <value>#0</value>
161084                </enumeratedValue>
161085                <enumeratedValue>
161086                  <name>1</name>
161087                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
161088                  <value>#1</value>
161089                </enumeratedValue>
161090              </enumeratedValues>
161091            </field>
161092            <field>
161093              <name>PDO25</name>
161094              <description>Port Data Output</description>
161095              <bitOffset>25</bitOffset>
161096              <bitWidth>1</bitWidth>
161097              <access>read-write</access>
161098              <enumeratedValues>
161099                <enumeratedValue>
161100                  <name>0</name>
161101                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
161102                  <value>#0</value>
161103                </enumeratedValue>
161104                <enumeratedValue>
161105                  <name>1</name>
161106                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
161107                  <value>#1</value>
161108                </enumeratedValue>
161109              </enumeratedValues>
161110            </field>
161111            <field>
161112              <name>PDO26</name>
161113              <description>Port Data Output</description>
161114              <bitOffset>26</bitOffset>
161115              <bitWidth>1</bitWidth>
161116              <access>read-write</access>
161117              <enumeratedValues>
161118                <enumeratedValue>
161119                  <name>0</name>
161120                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
161121                  <value>#0</value>
161122                </enumeratedValue>
161123                <enumeratedValue>
161124                  <name>1</name>
161125                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
161126                  <value>#1</value>
161127                </enumeratedValue>
161128              </enumeratedValues>
161129            </field>
161130            <field>
161131              <name>PDO27</name>
161132              <description>Port Data Output</description>
161133              <bitOffset>27</bitOffset>
161134              <bitWidth>1</bitWidth>
161135              <access>read-write</access>
161136              <enumeratedValues>
161137                <enumeratedValue>
161138                  <name>0</name>
161139                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
161140                  <value>#0</value>
161141                </enumeratedValue>
161142                <enumeratedValue>
161143                  <name>1</name>
161144                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
161145                  <value>#1</value>
161146                </enumeratedValue>
161147              </enumeratedValues>
161148            </field>
161149            <field>
161150              <name>PDO28</name>
161151              <description>Port Data Output</description>
161152              <bitOffset>28</bitOffset>
161153              <bitWidth>1</bitWidth>
161154              <access>read-write</access>
161155              <enumeratedValues>
161156                <enumeratedValue>
161157                  <name>0</name>
161158                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
161159                  <value>#0</value>
161160                </enumeratedValue>
161161                <enumeratedValue>
161162                  <name>1</name>
161163                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
161164                  <value>#1</value>
161165                </enumeratedValue>
161166              </enumeratedValues>
161167            </field>
161168            <field>
161169              <name>PDO29</name>
161170              <description>Port Data Output</description>
161171              <bitOffset>29</bitOffset>
161172              <bitWidth>1</bitWidth>
161173              <access>read-write</access>
161174              <enumeratedValues>
161175                <enumeratedValue>
161176                  <name>0</name>
161177                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
161178                  <value>#0</value>
161179                </enumeratedValue>
161180                <enumeratedValue>
161181                  <name>1</name>
161182                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
161183                  <value>#1</value>
161184                </enumeratedValue>
161185              </enumeratedValues>
161186            </field>
161187            <field>
161188              <name>PDO30</name>
161189              <description>Port Data Output</description>
161190              <bitOffset>30</bitOffset>
161191              <bitWidth>1</bitWidth>
161192              <access>read-write</access>
161193              <enumeratedValues>
161194                <enumeratedValue>
161195                  <name>0</name>
161196                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
161197                  <value>#0</value>
161198                </enumeratedValue>
161199                <enumeratedValue>
161200                  <name>1</name>
161201                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
161202                  <value>#1</value>
161203                </enumeratedValue>
161204              </enumeratedValues>
161205            </field>
161206            <field>
161207              <name>PDO31</name>
161208              <description>Port Data Output</description>
161209              <bitOffset>31</bitOffset>
161210              <bitWidth>1</bitWidth>
161211              <access>read-write</access>
161212              <enumeratedValues>
161213                <enumeratedValue>
161214                  <name>0</name>
161215                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
161216                  <value>#0</value>
161217                </enumeratedValue>
161218                <enumeratedValue>
161219                  <name>1</name>
161220                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
161221                  <value>#1</value>
161222                </enumeratedValue>
161223              </enumeratedValues>
161224            </field>
161225          </fields>
161226        </register>
161227        <register>
161228          <name>PSOR</name>
161229          <description>Port Set Output Register</description>
161230          <addressOffset>0x4</addressOffset>
161231          <size>32</size>
161232          <access>write-only</access>
161233          <resetValue>0</resetValue>
161234          <resetMask>0xFFFFFFFF</resetMask>
161235          <fields>
161236            <field>
161237              <name>PTSO0</name>
161238              <description>Port Set Output</description>
161239              <bitOffset>0</bitOffset>
161240              <bitWidth>1</bitWidth>
161241              <access>write-only</access>
161242              <enumeratedValues>
161243                <enumeratedValue>
161244                  <name>0</name>
161245                  <description>Corresponding bit in PDORn does not change.</description>
161246                  <value>#0</value>
161247                </enumeratedValue>
161248                <enumeratedValue>
161249                  <name>1</name>
161250                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161251                  <value>#1</value>
161252                </enumeratedValue>
161253              </enumeratedValues>
161254            </field>
161255            <field>
161256              <name>PTSO1</name>
161257              <description>Port Set Output</description>
161258              <bitOffset>1</bitOffset>
161259              <bitWidth>1</bitWidth>
161260              <access>write-only</access>
161261              <enumeratedValues>
161262                <enumeratedValue>
161263                  <name>0</name>
161264                  <description>Corresponding bit in PDORn does not change.</description>
161265                  <value>#0</value>
161266                </enumeratedValue>
161267                <enumeratedValue>
161268                  <name>1</name>
161269                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161270                  <value>#1</value>
161271                </enumeratedValue>
161272              </enumeratedValues>
161273            </field>
161274            <field>
161275              <name>PTSO2</name>
161276              <description>Port Set Output</description>
161277              <bitOffset>2</bitOffset>
161278              <bitWidth>1</bitWidth>
161279              <access>write-only</access>
161280              <enumeratedValues>
161281                <enumeratedValue>
161282                  <name>0</name>
161283                  <description>Corresponding bit in PDORn does not change.</description>
161284                  <value>#0</value>
161285                </enumeratedValue>
161286                <enumeratedValue>
161287                  <name>1</name>
161288                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161289                  <value>#1</value>
161290                </enumeratedValue>
161291              </enumeratedValues>
161292            </field>
161293            <field>
161294              <name>PTSO3</name>
161295              <description>Port Set Output</description>
161296              <bitOffset>3</bitOffset>
161297              <bitWidth>1</bitWidth>
161298              <access>write-only</access>
161299              <enumeratedValues>
161300                <enumeratedValue>
161301                  <name>0</name>
161302                  <description>Corresponding bit in PDORn does not change.</description>
161303                  <value>#0</value>
161304                </enumeratedValue>
161305                <enumeratedValue>
161306                  <name>1</name>
161307                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161308                  <value>#1</value>
161309                </enumeratedValue>
161310              </enumeratedValues>
161311            </field>
161312            <field>
161313              <name>PTSO4</name>
161314              <description>Port Set Output</description>
161315              <bitOffset>4</bitOffset>
161316              <bitWidth>1</bitWidth>
161317              <access>write-only</access>
161318              <enumeratedValues>
161319                <enumeratedValue>
161320                  <name>0</name>
161321                  <description>Corresponding bit in PDORn does not change.</description>
161322                  <value>#0</value>
161323                </enumeratedValue>
161324                <enumeratedValue>
161325                  <name>1</name>
161326                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161327                  <value>#1</value>
161328                </enumeratedValue>
161329              </enumeratedValues>
161330            </field>
161331            <field>
161332              <name>PTSO5</name>
161333              <description>Port Set Output</description>
161334              <bitOffset>5</bitOffset>
161335              <bitWidth>1</bitWidth>
161336              <access>write-only</access>
161337              <enumeratedValues>
161338                <enumeratedValue>
161339                  <name>0</name>
161340                  <description>Corresponding bit in PDORn does not change.</description>
161341                  <value>#0</value>
161342                </enumeratedValue>
161343                <enumeratedValue>
161344                  <name>1</name>
161345                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161346                  <value>#1</value>
161347                </enumeratedValue>
161348              </enumeratedValues>
161349            </field>
161350            <field>
161351              <name>PTSO6</name>
161352              <description>Port Set Output</description>
161353              <bitOffset>6</bitOffset>
161354              <bitWidth>1</bitWidth>
161355              <access>write-only</access>
161356              <enumeratedValues>
161357                <enumeratedValue>
161358                  <name>0</name>
161359                  <description>Corresponding bit in PDORn does not change.</description>
161360                  <value>#0</value>
161361                </enumeratedValue>
161362                <enumeratedValue>
161363                  <name>1</name>
161364                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161365                  <value>#1</value>
161366                </enumeratedValue>
161367              </enumeratedValues>
161368            </field>
161369            <field>
161370              <name>PTSO7</name>
161371              <description>Port Set Output</description>
161372              <bitOffset>7</bitOffset>
161373              <bitWidth>1</bitWidth>
161374              <access>write-only</access>
161375              <enumeratedValues>
161376                <enumeratedValue>
161377                  <name>0</name>
161378                  <description>Corresponding bit in PDORn does not change.</description>
161379                  <value>#0</value>
161380                </enumeratedValue>
161381                <enumeratedValue>
161382                  <name>1</name>
161383                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161384                  <value>#1</value>
161385                </enumeratedValue>
161386              </enumeratedValues>
161387            </field>
161388            <field>
161389              <name>PTSO8</name>
161390              <description>Port Set Output</description>
161391              <bitOffset>8</bitOffset>
161392              <bitWidth>1</bitWidth>
161393              <access>write-only</access>
161394              <enumeratedValues>
161395                <enumeratedValue>
161396                  <name>0</name>
161397                  <description>Corresponding bit in PDORn does not change.</description>
161398                  <value>#0</value>
161399                </enumeratedValue>
161400                <enumeratedValue>
161401                  <name>1</name>
161402                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161403                  <value>#1</value>
161404                </enumeratedValue>
161405              </enumeratedValues>
161406            </field>
161407            <field>
161408              <name>PTSO9</name>
161409              <description>Port Set Output</description>
161410              <bitOffset>9</bitOffset>
161411              <bitWidth>1</bitWidth>
161412              <access>write-only</access>
161413              <enumeratedValues>
161414                <enumeratedValue>
161415                  <name>0</name>
161416                  <description>Corresponding bit in PDORn does not change.</description>
161417                  <value>#0</value>
161418                </enumeratedValue>
161419                <enumeratedValue>
161420                  <name>1</name>
161421                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161422                  <value>#1</value>
161423                </enumeratedValue>
161424              </enumeratedValues>
161425            </field>
161426            <field>
161427              <name>PTSO10</name>
161428              <description>Port Set Output</description>
161429              <bitOffset>10</bitOffset>
161430              <bitWidth>1</bitWidth>
161431              <access>write-only</access>
161432              <enumeratedValues>
161433                <enumeratedValue>
161434                  <name>0</name>
161435                  <description>Corresponding bit in PDORn does not change.</description>
161436                  <value>#0</value>
161437                </enumeratedValue>
161438                <enumeratedValue>
161439                  <name>1</name>
161440                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161441                  <value>#1</value>
161442                </enumeratedValue>
161443              </enumeratedValues>
161444            </field>
161445            <field>
161446              <name>PTSO11</name>
161447              <description>Port Set Output</description>
161448              <bitOffset>11</bitOffset>
161449              <bitWidth>1</bitWidth>
161450              <access>write-only</access>
161451              <enumeratedValues>
161452                <enumeratedValue>
161453                  <name>0</name>
161454                  <description>Corresponding bit in PDORn does not change.</description>
161455                  <value>#0</value>
161456                </enumeratedValue>
161457                <enumeratedValue>
161458                  <name>1</name>
161459                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161460                  <value>#1</value>
161461                </enumeratedValue>
161462              </enumeratedValues>
161463            </field>
161464            <field>
161465              <name>PTSO12</name>
161466              <description>Port Set Output</description>
161467              <bitOffset>12</bitOffset>
161468              <bitWidth>1</bitWidth>
161469              <access>write-only</access>
161470              <enumeratedValues>
161471                <enumeratedValue>
161472                  <name>0</name>
161473                  <description>Corresponding bit in PDORn does not change.</description>
161474                  <value>#0</value>
161475                </enumeratedValue>
161476                <enumeratedValue>
161477                  <name>1</name>
161478                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161479                  <value>#1</value>
161480                </enumeratedValue>
161481              </enumeratedValues>
161482            </field>
161483            <field>
161484              <name>PTSO13</name>
161485              <description>Port Set Output</description>
161486              <bitOffset>13</bitOffset>
161487              <bitWidth>1</bitWidth>
161488              <access>write-only</access>
161489              <enumeratedValues>
161490                <enumeratedValue>
161491                  <name>0</name>
161492                  <description>Corresponding bit in PDORn does not change.</description>
161493                  <value>#0</value>
161494                </enumeratedValue>
161495                <enumeratedValue>
161496                  <name>1</name>
161497                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161498                  <value>#1</value>
161499                </enumeratedValue>
161500              </enumeratedValues>
161501            </field>
161502            <field>
161503              <name>PTSO14</name>
161504              <description>Port Set Output</description>
161505              <bitOffset>14</bitOffset>
161506              <bitWidth>1</bitWidth>
161507              <access>write-only</access>
161508              <enumeratedValues>
161509                <enumeratedValue>
161510                  <name>0</name>
161511                  <description>Corresponding bit in PDORn does not change.</description>
161512                  <value>#0</value>
161513                </enumeratedValue>
161514                <enumeratedValue>
161515                  <name>1</name>
161516                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161517                  <value>#1</value>
161518                </enumeratedValue>
161519              </enumeratedValues>
161520            </field>
161521            <field>
161522              <name>PTSO15</name>
161523              <description>Port Set Output</description>
161524              <bitOffset>15</bitOffset>
161525              <bitWidth>1</bitWidth>
161526              <access>write-only</access>
161527              <enumeratedValues>
161528                <enumeratedValue>
161529                  <name>0</name>
161530                  <description>Corresponding bit in PDORn does not change.</description>
161531                  <value>#0</value>
161532                </enumeratedValue>
161533                <enumeratedValue>
161534                  <name>1</name>
161535                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161536                  <value>#1</value>
161537                </enumeratedValue>
161538              </enumeratedValues>
161539            </field>
161540            <field>
161541              <name>PTSO16</name>
161542              <description>Port Set Output</description>
161543              <bitOffset>16</bitOffset>
161544              <bitWidth>1</bitWidth>
161545              <access>write-only</access>
161546              <enumeratedValues>
161547                <enumeratedValue>
161548                  <name>0</name>
161549                  <description>Corresponding bit in PDORn does not change.</description>
161550                  <value>#0</value>
161551                </enumeratedValue>
161552                <enumeratedValue>
161553                  <name>1</name>
161554                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161555                  <value>#1</value>
161556                </enumeratedValue>
161557              </enumeratedValues>
161558            </field>
161559            <field>
161560              <name>PTSO17</name>
161561              <description>Port Set Output</description>
161562              <bitOffset>17</bitOffset>
161563              <bitWidth>1</bitWidth>
161564              <access>write-only</access>
161565              <enumeratedValues>
161566                <enumeratedValue>
161567                  <name>0</name>
161568                  <description>Corresponding bit in PDORn does not change.</description>
161569                  <value>#0</value>
161570                </enumeratedValue>
161571                <enumeratedValue>
161572                  <name>1</name>
161573                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161574                  <value>#1</value>
161575                </enumeratedValue>
161576              </enumeratedValues>
161577            </field>
161578            <field>
161579              <name>PTSO18</name>
161580              <description>Port Set Output</description>
161581              <bitOffset>18</bitOffset>
161582              <bitWidth>1</bitWidth>
161583              <access>write-only</access>
161584              <enumeratedValues>
161585                <enumeratedValue>
161586                  <name>0</name>
161587                  <description>Corresponding bit in PDORn does not change.</description>
161588                  <value>#0</value>
161589                </enumeratedValue>
161590                <enumeratedValue>
161591                  <name>1</name>
161592                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161593                  <value>#1</value>
161594                </enumeratedValue>
161595              </enumeratedValues>
161596            </field>
161597            <field>
161598              <name>PTSO19</name>
161599              <description>Port Set Output</description>
161600              <bitOffset>19</bitOffset>
161601              <bitWidth>1</bitWidth>
161602              <access>write-only</access>
161603              <enumeratedValues>
161604                <enumeratedValue>
161605                  <name>0</name>
161606                  <description>Corresponding bit in PDORn does not change.</description>
161607                  <value>#0</value>
161608                </enumeratedValue>
161609                <enumeratedValue>
161610                  <name>1</name>
161611                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161612                  <value>#1</value>
161613                </enumeratedValue>
161614              </enumeratedValues>
161615            </field>
161616            <field>
161617              <name>PTSO20</name>
161618              <description>Port Set Output</description>
161619              <bitOffset>20</bitOffset>
161620              <bitWidth>1</bitWidth>
161621              <access>write-only</access>
161622              <enumeratedValues>
161623                <enumeratedValue>
161624                  <name>0</name>
161625                  <description>Corresponding bit in PDORn does not change.</description>
161626                  <value>#0</value>
161627                </enumeratedValue>
161628                <enumeratedValue>
161629                  <name>1</name>
161630                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161631                  <value>#1</value>
161632                </enumeratedValue>
161633              </enumeratedValues>
161634            </field>
161635            <field>
161636              <name>PTSO21</name>
161637              <description>Port Set Output</description>
161638              <bitOffset>21</bitOffset>
161639              <bitWidth>1</bitWidth>
161640              <access>write-only</access>
161641              <enumeratedValues>
161642                <enumeratedValue>
161643                  <name>0</name>
161644                  <description>Corresponding bit in PDORn does not change.</description>
161645                  <value>#0</value>
161646                </enumeratedValue>
161647                <enumeratedValue>
161648                  <name>1</name>
161649                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161650                  <value>#1</value>
161651                </enumeratedValue>
161652              </enumeratedValues>
161653            </field>
161654            <field>
161655              <name>PTSO22</name>
161656              <description>Port Set Output</description>
161657              <bitOffset>22</bitOffset>
161658              <bitWidth>1</bitWidth>
161659              <access>write-only</access>
161660              <enumeratedValues>
161661                <enumeratedValue>
161662                  <name>0</name>
161663                  <description>Corresponding bit in PDORn does not change.</description>
161664                  <value>#0</value>
161665                </enumeratedValue>
161666                <enumeratedValue>
161667                  <name>1</name>
161668                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161669                  <value>#1</value>
161670                </enumeratedValue>
161671              </enumeratedValues>
161672            </field>
161673            <field>
161674              <name>PTSO23</name>
161675              <description>Port Set Output</description>
161676              <bitOffset>23</bitOffset>
161677              <bitWidth>1</bitWidth>
161678              <access>write-only</access>
161679              <enumeratedValues>
161680                <enumeratedValue>
161681                  <name>0</name>
161682                  <description>Corresponding bit in PDORn does not change.</description>
161683                  <value>#0</value>
161684                </enumeratedValue>
161685                <enumeratedValue>
161686                  <name>1</name>
161687                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161688                  <value>#1</value>
161689                </enumeratedValue>
161690              </enumeratedValues>
161691            </field>
161692            <field>
161693              <name>PTSO24</name>
161694              <description>Port Set Output</description>
161695              <bitOffset>24</bitOffset>
161696              <bitWidth>1</bitWidth>
161697              <access>write-only</access>
161698              <enumeratedValues>
161699                <enumeratedValue>
161700                  <name>0</name>
161701                  <description>Corresponding bit in PDORn does not change.</description>
161702                  <value>#0</value>
161703                </enumeratedValue>
161704                <enumeratedValue>
161705                  <name>1</name>
161706                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161707                  <value>#1</value>
161708                </enumeratedValue>
161709              </enumeratedValues>
161710            </field>
161711            <field>
161712              <name>PTSO25</name>
161713              <description>Port Set Output</description>
161714              <bitOffset>25</bitOffset>
161715              <bitWidth>1</bitWidth>
161716              <access>write-only</access>
161717              <enumeratedValues>
161718                <enumeratedValue>
161719                  <name>0</name>
161720                  <description>Corresponding bit in PDORn does not change.</description>
161721                  <value>#0</value>
161722                </enumeratedValue>
161723                <enumeratedValue>
161724                  <name>1</name>
161725                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161726                  <value>#1</value>
161727                </enumeratedValue>
161728              </enumeratedValues>
161729            </field>
161730            <field>
161731              <name>PTSO26</name>
161732              <description>Port Set Output</description>
161733              <bitOffset>26</bitOffset>
161734              <bitWidth>1</bitWidth>
161735              <access>write-only</access>
161736              <enumeratedValues>
161737                <enumeratedValue>
161738                  <name>0</name>
161739                  <description>Corresponding bit in PDORn does not change.</description>
161740                  <value>#0</value>
161741                </enumeratedValue>
161742                <enumeratedValue>
161743                  <name>1</name>
161744                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161745                  <value>#1</value>
161746                </enumeratedValue>
161747              </enumeratedValues>
161748            </field>
161749            <field>
161750              <name>PTSO27</name>
161751              <description>Port Set Output</description>
161752              <bitOffset>27</bitOffset>
161753              <bitWidth>1</bitWidth>
161754              <access>write-only</access>
161755              <enumeratedValues>
161756                <enumeratedValue>
161757                  <name>0</name>
161758                  <description>Corresponding bit in PDORn does not change.</description>
161759                  <value>#0</value>
161760                </enumeratedValue>
161761                <enumeratedValue>
161762                  <name>1</name>
161763                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161764                  <value>#1</value>
161765                </enumeratedValue>
161766              </enumeratedValues>
161767            </field>
161768            <field>
161769              <name>PTSO28</name>
161770              <description>Port Set Output</description>
161771              <bitOffset>28</bitOffset>
161772              <bitWidth>1</bitWidth>
161773              <access>write-only</access>
161774              <enumeratedValues>
161775                <enumeratedValue>
161776                  <name>0</name>
161777                  <description>Corresponding bit in PDORn does not change.</description>
161778                  <value>#0</value>
161779                </enumeratedValue>
161780                <enumeratedValue>
161781                  <name>1</name>
161782                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161783                  <value>#1</value>
161784                </enumeratedValue>
161785              </enumeratedValues>
161786            </field>
161787            <field>
161788              <name>PTSO29</name>
161789              <description>Port Set Output</description>
161790              <bitOffset>29</bitOffset>
161791              <bitWidth>1</bitWidth>
161792              <access>write-only</access>
161793              <enumeratedValues>
161794                <enumeratedValue>
161795                  <name>0</name>
161796                  <description>Corresponding bit in PDORn does not change.</description>
161797                  <value>#0</value>
161798                </enumeratedValue>
161799                <enumeratedValue>
161800                  <name>1</name>
161801                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161802                  <value>#1</value>
161803                </enumeratedValue>
161804              </enumeratedValues>
161805            </field>
161806            <field>
161807              <name>PTSO30</name>
161808              <description>Port Set Output</description>
161809              <bitOffset>30</bitOffset>
161810              <bitWidth>1</bitWidth>
161811              <access>write-only</access>
161812              <enumeratedValues>
161813                <enumeratedValue>
161814                  <name>0</name>
161815                  <description>Corresponding bit in PDORn does not change.</description>
161816                  <value>#0</value>
161817                </enumeratedValue>
161818                <enumeratedValue>
161819                  <name>1</name>
161820                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161821                  <value>#1</value>
161822                </enumeratedValue>
161823              </enumeratedValues>
161824            </field>
161825            <field>
161826              <name>PTSO31</name>
161827              <description>Port Set Output</description>
161828              <bitOffset>31</bitOffset>
161829              <bitWidth>1</bitWidth>
161830              <access>write-only</access>
161831              <enumeratedValues>
161832                <enumeratedValue>
161833                  <name>0</name>
161834                  <description>Corresponding bit in PDORn does not change.</description>
161835                  <value>#0</value>
161836                </enumeratedValue>
161837                <enumeratedValue>
161838                  <name>1</name>
161839                  <description>Corresponding bit in PDORn is set to logic 1.</description>
161840                  <value>#1</value>
161841                </enumeratedValue>
161842              </enumeratedValues>
161843            </field>
161844          </fields>
161845        </register>
161846        <register>
161847          <name>PCOR</name>
161848          <description>Port Clear Output Register</description>
161849          <addressOffset>0x8</addressOffset>
161850          <size>32</size>
161851          <access>write-only</access>
161852          <resetValue>0</resetValue>
161853          <resetMask>0xFFFFFFFF</resetMask>
161854          <fields>
161855            <field>
161856              <name>PTCO0</name>
161857              <description>Port Clear Output</description>
161858              <bitOffset>0</bitOffset>
161859              <bitWidth>1</bitWidth>
161860              <access>write-only</access>
161861              <enumeratedValues>
161862                <enumeratedValue>
161863                  <name>0</name>
161864                  <description>Corresponding bit in PDORn does not change.</description>
161865                  <value>#0</value>
161866                </enumeratedValue>
161867                <enumeratedValue>
161868                  <name>1</name>
161869                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
161870                  <value>#1</value>
161871                </enumeratedValue>
161872              </enumeratedValues>
161873            </field>
161874            <field>
161875              <name>PTCO1</name>
161876              <description>Port Clear Output</description>
161877              <bitOffset>1</bitOffset>
161878              <bitWidth>1</bitWidth>
161879              <access>write-only</access>
161880              <enumeratedValues>
161881                <enumeratedValue>
161882                  <name>0</name>
161883                  <description>Corresponding bit in PDORn does not change.</description>
161884                  <value>#0</value>
161885                </enumeratedValue>
161886                <enumeratedValue>
161887                  <name>1</name>
161888                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
161889                  <value>#1</value>
161890                </enumeratedValue>
161891              </enumeratedValues>
161892            </field>
161893            <field>
161894              <name>PTCO2</name>
161895              <description>Port Clear Output</description>
161896              <bitOffset>2</bitOffset>
161897              <bitWidth>1</bitWidth>
161898              <access>write-only</access>
161899              <enumeratedValues>
161900                <enumeratedValue>
161901                  <name>0</name>
161902                  <description>Corresponding bit in PDORn does not change.</description>
161903                  <value>#0</value>
161904                </enumeratedValue>
161905                <enumeratedValue>
161906                  <name>1</name>
161907                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
161908                  <value>#1</value>
161909                </enumeratedValue>
161910              </enumeratedValues>
161911            </field>
161912            <field>
161913              <name>PTCO3</name>
161914              <description>Port Clear Output</description>
161915              <bitOffset>3</bitOffset>
161916              <bitWidth>1</bitWidth>
161917              <access>write-only</access>
161918              <enumeratedValues>
161919                <enumeratedValue>
161920                  <name>0</name>
161921                  <description>Corresponding bit in PDORn does not change.</description>
161922                  <value>#0</value>
161923                </enumeratedValue>
161924                <enumeratedValue>
161925                  <name>1</name>
161926                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
161927                  <value>#1</value>
161928                </enumeratedValue>
161929              </enumeratedValues>
161930            </field>
161931            <field>
161932              <name>PTCO4</name>
161933              <description>Port Clear Output</description>
161934              <bitOffset>4</bitOffset>
161935              <bitWidth>1</bitWidth>
161936              <access>write-only</access>
161937              <enumeratedValues>
161938                <enumeratedValue>
161939                  <name>0</name>
161940                  <description>Corresponding bit in PDORn does not change.</description>
161941                  <value>#0</value>
161942                </enumeratedValue>
161943                <enumeratedValue>
161944                  <name>1</name>
161945                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
161946                  <value>#1</value>
161947                </enumeratedValue>
161948              </enumeratedValues>
161949            </field>
161950            <field>
161951              <name>PTCO5</name>
161952              <description>Port Clear Output</description>
161953              <bitOffset>5</bitOffset>
161954              <bitWidth>1</bitWidth>
161955              <access>write-only</access>
161956              <enumeratedValues>
161957                <enumeratedValue>
161958                  <name>0</name>
161959                  <description>Corresponding bit in PDORn does not change.</description>
161960                  <value>#0</value>
161961                </enumeratedValue>
161962                <enumeratedValue>
161963                  <name>1</name>
161964                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
161965                  <value>#1</value>
161966                </enumeratedValue>
161967              </enumeratedValues>
161968            </field>
161969            <field>
161970              <name>PTCO6</name>
161971              <description>Port Clear Output</description>
161972              <bitOffset>6</bitOffset>
161973              <bitWidth>1</bitWidth>
161974              <access>write-only</access>
161975              <enumeratedValues>
161976                <enumeratedValue>
161977                  <name>0</name>
161978                  <description>Corresponding bit in PDORn does not change.</description>
161979                  <value>#0</value>
161980                </enumeratedValue>
161981                <enumeratedValue>
161982                  <name>1</name>
161983                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
161984                  <value>#1</value>
161985                </enumeratedValue>
161986              </enumeratedValues>
161987            </field>
161988            <field>
161989              <name>PTCO7</name>
161990              <description>Port Clear Output</description>
161991              <bitOffset>7</bitOffset>
161992              <bitWidth>1</bitWidth>
161993              <access>write-only</access>
161994              <enumeratedValues>
161995                <enumeratedValue>
161996                  <name>0</name>
161997                  <description>Corresponding bit in PDORn does not change.</description>
161998                  <value>#0</value>
161999                </enumeratedValue>
162000                <enumeratedValue>
162001                  <name>1</name>
162002                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162003                  <value>#1</value>
162004                </enumeratedValue>
162005              </enumeratedValues>
162006            </field>
162007            <field>
162008              <name>PTCO8</name>
162009              <description>Port Clear Output</description>
162010              <bitOffset>8</bitOffset>
162011              <bitWidth>1</bitWidth>
162012              <access>write-only</access>
162013              <enumeratedValues>
162014                <enumeratedValue>
162015                  <name>0</name>
162016                  <description>Corresponding bit in PDORn does not change.</description>
162017                  <value>#0</value>
162018                </enumeratedValue>
162019                <enumeratedValue>
162020                  <name>1</name>
162021                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162022                  <value>#1</value>
162023                </enumeratedValue>
162024              </enumeratedValues>
162025            </field>
162026            <field>
162027              <name>PTCO9</name>
162028              <description>Port Clear Output</description>
162029              <bitOffset>9</bitOffset>
162030              <bitWidth>1</bitWidth>
162031              <access>write-only</access>
162032              <enumeratedValues>
162033                <enumeratedValue>
162034                  <name>0</name>
162035                  <description>Corresponding bit in PDORn does not change.</description>
162036                  <value>#0</value>
162037                </enumeratedValue>
162038                <enumeratedValue>
162039                  <name>1</name>
162040                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162041                  <value>#1</value>
162042                </enumeratedValue>
162043              </enumeratedValues>
162044            </field>
162045            <field>
162046              <name>PTCO10</name>
162047              <description>Port Clear Output</description>
162048              <bitOffset>10</bitOffset>
162049              <bitWidth>1</bitWidth>
162050              <access>write-only</access>
162051              <enumeratedValues>
162052                <enumeratedValue>
162053                  <name>0</name>
162054                  <description>Corresponding bit in PDORn does not change.</description>
162055                  <value>#0</value>
162056                </enumeratedValue>
162057                <enumeratedValue>
162058                  <name>1</name>
162059                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162060                  <value>#1</value>
162061                </enumeratedValue>
162062              </enumeratedValues>
162063            </field>
162064            <field>
162065              <name>PTCO11</name>
162066              <description>Port Clear Output</description>
162067              <bitOffset>11</bitOffset>
162068              <bitWidth>1</bitWidth>
162069              <access>write-only</access>
162070              <enumeratedValues>
162071                <enumeratedValue>
162072                  <name>0</name>
162073                  <description>Corresponding bit in PDORn does not change.</description>
162074                  <value>#0</value>
162075                </enumeratedValue>
162076                <enumeratedValue>
162077                  <name>1</name>
162078                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162079                  <value>#1</value>
162080                </enumeratedValue>
162081              </enumeratedValues>
162082            </field>
162083            <field>
162084              <name>PTCO12</name>
162085              <description>Port Clear Output</description>
162086              <bitOffset>12</bitOffset>
162087              <bitWidth>1</bitWidth>
162088              <access>write-only</access>
162089              <enumeratedValues>
162090                <enumeratedValue>
162091                  <name>0</name>
162092                  <description>Corresponding bit in PDORn does not change.</description>
162093                  <value>#0</value>
162094                </enumeratedValue>
162095                <enumeratedValue>
162096                  <name>1</name>
162097                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162098                  <value>#1</value>
162099                </enumeratedValue>
162100              </enumeratedValues>
162101            </field>
162102            <field>
162103              <name>PTCO13</name>
162104              <description>Port Clear Output</description>
162105              <bitOffset>13</bitOffset>
162106              <bitWidth>1</bitWidth>
162107              <access>write-only</access>
162108              <enumeratedValues>
162109                <enumeratedValue>
162110                  <name>0</name>
162111                  <description>Corresponding bit in PDORn does not change.</description>
162112                  <value>#0</value>
162113                </enumeratedValue>
162114                <enumeratedValue>
162115                  <name>1</name>
162116                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162117                  <value>#1</value>
162118                </enumeratedValue>
162119              </enumeratedValues>
162120            </field>
162121            <field>
162122              <name>PTCO14</name>
162123              <description>Port Clear Output</description>
162124              <bitOffset>14</bitOffset>
162125              <bitWidth>1</bitWidth>
162126              <access>write-only</access>
162127              <enumeratedValues>
162128                <enumeratedValue>
162129                  <name>0</name>
162130                  <description>Corresponding bit in PDORn does not change.</description>
162131                  <value>#0</value>
162132                </enumeratedValue>
162133                <enumeratedValue>
162134                  <name>1</name>
162135                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162136                  <value>#1</value>
162137                </enumeratedValue>
162138              </enumeratedValues>
162139            </field>
162140            <field>
162141              <name>PTCO15</name>
162142              <description>Port Clear Output</description>
162143              <bitOffset>15</bitOffset>
162144              <bitWidth>1</bitWidth>
162145              <access>write-only</access>
162146              <enumeratedValues>
162147                <enumeratedValue>
162148                  <name>0</name>
162149                  <description>Corresponding bit in PDORn does not change.</description>
162150                  <value>#0</value>
162151                </enumeratedValue>
162152                <enumeratedValue>
162153                  <name>1</name>
162154                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162155                  <value>#1</value>
162156                </enumeratedValue>
162157              </enumeratedValues>
162158            </field>
162159            <field>
162160              <name>PTCO16</name>
162161              <description>Port Clear Output</description>
162162              <bitOffset>16</bitOffset>
162163              <bitWidth>1</bitWidth>
162164              <access>write-only</access>
162165              <enumeratedValues>
162166                <enumeratedValue>
162167                  <name>0</name>
162168                  <description>Corresponding bit in PDORn does not change.</description>
162169                  <value>#0</value>
162170                </enumeratedValue>
162171                <enumeratedValue>
162172                  <name>1</name>
162173                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162174                  <value>#1</value>
162175                </enumeratedValue>
162176              </enumeratedValues>
162177            </field>
162178            <field>
162179              <name>PTCO17</name>
162180              <description>Port Clear Output</description>
162181              <bitOffset>17</bitOffset>
162182              <bitWidth>1</bitWidth>
162183              <access>write-only</access>
162184              <enumeratedValues>
162185                <enumeratedValue>
162186                  <name>0</name>
162187                  <description>Corresponding bit in PDORn does not change.</description>
162188                  <value>#0</value>
162189                </enumeratedValue>
162190                <enumeratedValue>
162191                  <name>1</name>
162192                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162193                  <value>#1</value>
162194                </enumeratedValue>
162195              </enumeratedValues>
162196            </field>
162197            <field>
162198              <name>PTCO18</name>
162199              <description>Port Clear Output</description>
162200              <bitOffset>18</bitOffset>
162201              <bitWidth>1</bitWidth>
162202              <access>write-only</access>
162203              <enumeratedValues>
162204                <enumeratedValue>
162205                  <name>0</name>
162206                  <description>Corresponding bit in PDORn does not change.</description>
162207                  <value>#0</value>
162208                </enumeratedValue>
162209                <enumeratedValue>
162210                  <name>1</name>
162211                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162212                  <value>#1</value>
162213                </enumeratedValue>
162214              </enumeratedValues>
162215            </field>
162216            <field>
162217              <name>PTCO19</name>
162218              <description>Port Clear Output</description>
162219              <bitOffset>19</bitOffset>
162220              <bitWidth>1</bitWidth>
162221              <access>write-only</access>
162222              <enumeratedValues>
162223                <enumeratedValue>
162224                  <name>0</name>
162225                  <description>Corresponding bit in PDORn does not change.</description>
162226                  <value>#0</value>
162227                </enumeratedValue>
162228                <enumeratedValue>
162229                  <name>1</name>
162230                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162231                  <value>#1</value>
162232                </enumeratedValue>
162233              </enumeratedValues>
162234            </field>
162235            <field>
162236              <name>PTCO20</name>
162237              <description>Port Clear Output</description>
162238              <bitOffset>20</bitOffset>
162239              <bitWidth>1</bitWidth>
162240              <access>write-only</access>
162241              <enumeratedValues>
162242                <enumeratedValue>
162243                  <name>0</name>
162244                  <description>Corresponding bit in PDORn does not change.</description>
162245                  <value>#0</value>
162246                </enumeratedValue>
162247                <enumeratedValue>
162248                  <name>1</name>
162249                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162250                  <value>#1</value>
162251                </enumeratedValue>
162252              </enumeratedValues>
162253            </field>
162254            <field>
162255              <name>PTCO21</name>
162256              <description>Port Clear Output</description>
162257              <bitOffset>21</bitOffset>
162258              <bitWidth>1</bitWidth>
162259              <access>write-only</access>
162260              <enumeratedValues>
162261                <enumeratedValue>
162262                  <name>0</name>
162263                  <description>Corresponding bit in PDORn does not change.</description>
162264                  <value>#0</value>
162265                </enumeratedValue>
162266                <enumeratedValue>
162267                  <name>1</name>
162268                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162269                  <value>#1</value>
162270                </enumeratedValue>
162271              </enumeratedValues>
162272            </field>
162273            <field>
162274              <name>PTCO22</name>
162275              <description>Port Clear Output</description>
162276              <bitOffset>22</bitOffset>
162277              <bitWidth>1</bitWidth>
162278              <access>write-only</access>
162279              <enumeratedValues>
162280                <enumeratedValue>
162281                  <name>0</name>
162282                  <description>Corresponding bit in PDORn does not change.</description>
162283                  <value>#0</value>
162284                </enumeratedValue>
162285                <enumeratedValue>
162286                  <name>1</name>
162287                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162288                  <value>#1</value>
162289                </enumeratedValue>
162290              </enumeratedValues>
162291            </field>
162292            <field>
162293              <name>PTCO23</name>
162294              <description>Port Clear Output</description>
162295              <bitOffset>23</bitOffset>
162296              <bitWidth>1</bitWidth>
162297              <access>write-only</access>
162298              <enumeratedValues>
162299                <enumeratedValue>
162300                  <name>0</name>
162301                  <description>Corresponding bit in PDORn does not change.</description>
162302                  <value>#0</value>
162303                </enumeratedValue>
162304                <enumeratedValue>
162305                  <name>1</name>
162306                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162307                  <value>#1</value>
162308                </enumeratedValue>
162309              </enumeratedValues>
162310            </field>
162311            <field>
162312              <name>PTCO24</name>
162313              <description>Port Clear Output</description>
162314              <bitOffset>24</bitOffset>
162315              <bitWidth>1</bitWidth>
162316              <access>write-only</access>
162317              <enumeratedValues>
162318                <enumeratedValue>
162319                  <name>0</name>
162320                  <description>Corresponding bit in PDORn does not change.</description>
162321                  <value>#0</value>
162322                </enumeratedValue>
162323                <enumeratedValue>
162324                  <name>1</name>
162325                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162326                  <value>#1</value>
162327                </enumeratedValue>
162328              </enumeratedValues>
162329            </field>
162330            <field>
162331              <name>PTCO25</name>
162332              <description>Port Clear Output</description>
162333              <bitOffset>25</bitOffset>
162334              <bitWidth>1</bitWidth>
162335              <access>write-only</access>
162336              <enumeratedValues>
162337                <enumeratedValue>
162338                  <name>0</name>
162339                  <description>Corresponding bit in PDORn does not change.</description>
162340                  <value>#0</value>
162341                </enumeratedValue>
162342                <enumeratedValue>
162343                  <name>1</name>
162344                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162345                  <value>#1</value>
162346                </enumeratedValue>
162347              </enumeratedValues>
162348            </field>
162349            <field>
162350              <name>PTCO26</name>
162351              <description>Port Clear Output</description>
162352              <bitOffset>26</bitOffset>
162353              <bitWidth>1</bitWidth>
162354              <access>write-only</access>
162355              <enumeratedValues>
162356                <enumeratedValue>
162357                  <name>0</name>
162358                  <description>Corresponding bit in PDORn does not change.</description>
162359                  <value>#0</value>
162360                </enumeratedValue>
162361                <enumeratedValue>
162362                  <name>1</name>
162363                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162364                  <value>#1</value>
162365                </enumeratedValue>
162366              </enumeratedValues>
162367            </field>
162368            <field>
162369              <name>PTCO27</name>
162370              <description>Port Clear Output</description>
162371              <bitOffset>27</bitOffset>
162372              <bitWidth>1</bitWidth>
162373              <access>write-only</access>
162374              <enumeratedValues>
162375                <enumeratedValue>
162376                  <name>0</name>
162377                  <description>Corresponding bit in PDORn does not change.</description>
162378                  <value>#0</value>
162379                </enumeratedValue>
162380                <enumeratedValue>
162381                  <name>1</name>
162382                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162383                  <value>#1</value>
162384                </enumeratedValue>
162385              </enumeratedValues>
162386            </field>
162387            <field>
162388              <name>PTCO28</name>
162389              <description>Port Clear Output</description>
162390              <bitOffset>28</bitOffset>
162391              <bitWidth>1</bitWidth>
162392              <access>write-only</access>
162393              <enumeratedValues>
162394                <enumeratedValue>
162395                  <name>0</name>
162396                  <description>Corresponding bit in PDORn does not change.</description>
162397                  <value>#0</value>
162398                </enumeratedValue>
162399                <enumeratedValue>
162400                  <name>1</name>
162401                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162402                  <value>#1</value>
162403                </enumeratedValue>
162404              </enumeratedValues>
162405            </field>
162406            <field>
162407              <name>PTCO29</name>
162408              <description>Port Clear Output</description>
162409              <bitOffset>29</bitOffset>
162410              <bitWidth>1</bitWidth>
162411              <access>write-only</access>
162412              <enumeratedValues>
162413                <enumeratedValue>
162414                  <name>0</name>
162415                  <description>Corresponding bit in PDORn does not change.</description>
162416                  <value>#0</value>
162417                </enumeratedValue>
162418                <enumeratedValue>
162419                  <name>1</name>
162420                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162421                  <value>#1</value>
162422                </enumeratedValue>
162423              </enumeratedValues>
162424            </field>
162425            <field>
162426              <name>PTCO30</name>
162427              <description>Port Clear Output</description>
162428              <bitOffset>30</bitOffset>
162429              <bitWidth>1</bitWidth>
162430              <access>write-only</access>
162431              <enumeratedValues>
162432                <enumeratedValue>
162433                  <name>0</name>
162434                  <description>Corresponding bit in PDORn does not change.</description>
162435                  <value>#0</value>
162436                </enumeratedValue>
162437                <enumeratedValue>
162438                  <name>1</name>
162439                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162440                  <value>#1</value>
162441                </enumeratedValue>
162442              </enumeratedValues>
162443            </field>
162444            <field>
162445              <name>PTCO31</name>
162446              <description>Port Clear Output</description>
162447              <bitOffset>31</bitOffset>
162448              <bitWidth>1</bitWidth>
162449              <access>write-only</access>
162450              <enumeratedValues>
162451                <enumeratedValue>
162452                  <name>0</name>
162453                  <description>Corresponding bit in PDORn does not change.</description>
162454                  <value>#0</value>
162455                </enumeratedValue>
162456                <enumeratedValue>
162457                  <name>1</name>
162458                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
162459                  <value>#1</value>
162460                </enumeratedValue>
162461              </enumeratedValues>
162462            </field>
162463          </fields>
162464        </register>
162465        <register>
162466          <name>PTOR</name>
162467          <description>Port Toggle Output Register</description>
162468          <addressOffset>0xC</addressOffset>
162469          <size>32</size>
162470          <access>write-only</access>
162471          <resetValue>0</resetValue>
162472          <resetMask>0xFFFFFFFF</resetMask>
162473          <fields>
162474            <field>
162475              <name>PTTO0</name>
162476              <description>Port Toggle Output</description>
162477              <bitOffset>0</bitOffset>
162478              <bitWidth>1</bitWidth>
162479              <access>write-only</access>
162480              <enumeratedValues>
162481                <enumeratedValue>
162482                  <name>0</name>
162483                  <description>Corresponding bit in PDORn does not change.</description>
162484                  <value>#0</value>
162485                </enumeratedValue>
162486                <enumeratedValue>
162487                  <name>1</name>
162488                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162489                  <value>#1</value>
162490                </enumeratedValue>
162491              </enumeratedValues>
162492            </field>
162493            <field>
162494              <name>PTTO1</name>
162495              <description>Port Toggle Output</description>
162496              <bitOffset>1</bitOffset>
162497              <bitWidth>1</bitWidth>
162498              <access>write-only</access>
162499              <enumeratedValues>
162500                <enumeratedValue>
162501                  <name>0</name>
162502                  <description>Corresponding bit in PDORn does not change.</description>
162503                  <value>#0</value>
162504                </enumeratedValue>
162505                <enumeratedValue>
162506                  <name>1</name>
162507                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162508                  <value>#1</value>
162509                </enumeratedValue>
162510              </enumeratedValues>
162511            </field>
162512            <field>
162513              <name>PTTO2</name>
162514              <description>Port Toggle Output</description>
162515              <bitOffset>2</bitOffset>
162516              <bitWidth>1</bitWidth>
162517              <access>write-only</access>
162518              <enumeratedValues>
162519                <enumeratedValue>
162520                  <name>0</name>
162521                  <description>Corresponding bit in PDORn does not change.</description>
162522                  <value>#0</value>
162523                </enumeratedValue>
162524                <enumeratedValue>
162525                  <name>1</name>
162526                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162527                  <value>#1</value>
162528                </enumeratedValue>
162529              </enumeratedValues>
162530            </field>
162531            <field>
162532              <name>PTTO3</name>
162533              <description>Port Toggle Output</description>
162534              <bitOffset>3</bitOffset>
162535              <bitWidth>1</bitWidth>
162536              <access>write-only</access>
162537              <enumeratedValues>
162538                <enumeratedValue>
162539                  <name>0</name>
162540                  <description>Corresponding bit in PDORn does not change.</description>
162541                  <value>#0</value>
162542                </enumeratedValue>
162543                <enumeratedValue>
162544                  <name>1</name>
162545                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162546                  <value>#1</value>
162547                </enumeratedValue>
162548              </enumeratedValues>
162549            </field>
162550            <field>
162551              <name>PTTO4</name>
162552              <description>Port Toggle Output</description>
162553              <bitOffset>4</bitOffset>
162554              <bitWidth>1</bitWidth>
162555              <access>write-only</access>
162556              <enumeratedValues>
162557                <enumeratedValue>
162558                  <name>0</name>
162559                  <description>Corresponding bit in PDORn does not change.</description>
162560                  <value>#0</value>
162561                </enumeratedValue>
162562                <enumeratedValue>
162563                  <name>1</name>
162564                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162565                  <value>#1</value>
162566                </enumeratedValue>
162567              </enumeratedValues>
162568            </field>
162569            <field>
162570              <name>PTTO5</name>
162571              <description>Port Toggle Output</description>
162572              <bitOffset>5</bitOffset>
162573              <bitWidth>1</bitWidth>
162574              <access>write-only</access>
162575              <enumeratedValues>
162576                <enumeratedValue>
162577                  <name>0</name>
162578                  <description>Corresponding bit in PDORn does not change.</description>
162579                  <value>#0</value>
162580                </enumeratedValue>
162581                <enumeratedValue>
162582                  <name>1</name>
162583                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162584                  <value>#1</value>
162585                </enumeratedValue>
162586              </enumeratedValues>
162587            </field>
162588            <field>
162589              <name>PTTO6</name>
162590              <description>Port Toggle Output</description>
162591              <bitOffset>6</bitOffset>
162592              <bitWidth>1</bitWidth>
162593              <access>write-only</access>
162594              <enumeratedValues>
162595                <enumeratedValue>
162596                  <name>0</name>
162597                  <description>Corresponding bit in PDORn does not change.</description>
162598                  <value>#0</value>
162599                </enumeratedValue>
162600                <enumeratedValue>
162601                  <name>1</name>
162602                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162603                  <value>#1</value>
162604                </enumeratedValue>
162605              </enumeratedValues>
162606            </field>
162607            <field>
162608              <name>PTTO7</name>
162609              <description>Port Toggle Output</description>
162610              <bitOffset>7</bitOffset>
162611              <bitWidth>1</bitWidth>
162612              <access>write-only</access>
162613              <enumeratedValues>
162614                <enumeratedValue>
162615                  <name>0</name>
162616                  <description>Corresponding bit in PDORn does not change.</description>
162617                  <value>#0</value>
162618                </enumeratedValue>
162619                <enumeratedValue>
162620                  <name>1</name>
162621                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162622                  <value>#1</value>
162623                </enumeratedValue>
162624              </enumeratedValues>
162625            </field>
162626            <field>
162627              <name>PTTO8</name>
162628              <description>Port Toggle Output</description>
162629              <bitOffset>8</bitOffset>
162630              <bitWidth>1</bitWidth>
162631              <access>write-only</access>
162632              <enumeratedValues>
162633                <enumeratedValue>
162634                  <name>0</name>
162635                  <description>Corresponding bit in PDORn does not change.</description>
162636                  <value>#0</value>
162637                </enumeratedValue>
162638                <enumeratedValue>
162639                  <name>1</name>
162640                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162641                  <value>#1</value>
162642                </enumeratedValue>
162643              </enumeratedValues>
162644            </field>
162645            <field>
162646              <name>PTTO9</name>
162647              <description>Port Toggle Output</description>
162648              <bitOffset>9</bitOffset>
162649              <bitWidth>1</bitWidth>
162650              <access>write-only</access>
162651              <enumeratedValues>
162652                <enumeratedValue>
162653                  <name>0</name>
162654                  <description>Corresponding bit in PDORn does not change.</description>
162655                  <value>#0</value>
162656                </enumeratedValue>
162657                <enumeratedValue>
162658                  <name>1</name>
162659                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162660                  <value>#1</value>
162661                </enumeratedValue>
162662              </enumeratedValues>
162663            </field>
162664            <field>
162665              <name>PTTO10</name>
162666              <description>Port Toggle Output</description>
162667              <bitOffset>10</bitOffset>
162668              <bitWidth>1</bitWidth>
162669              <access>write-only</access>
162670              <enumeratedValues>
162671                <enumeratedValue>
162672                  <name>0</name>
162673                  <description>Corresponding bit in PDORn does not change.</description>
162674                  <value>#0</value>
162675                </enumeratedValue>
162676                <enumeratedValue>
162677                  <name>1</name>
162678                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162679                  <value>#1</value>
162680                </enumeratedValue>
162681              </enumeratedValues>
162682            </field>
162683            <field>
162684              <name>PTTO11</name>
162685              <description>Port Toggle Output</description>
162686              <bitOffset>11</bitOffset>
162687              <bitWidth>1</bitWidth>
162688              <access>write-only</access>
162689              <enumeratedValues>
162690                <enumeratedValue>
162691                  <name>0</name>
162692                  <description>Corresponding bit in PDORn does not change.</description>
162693                  <value>#0</value>
162694                </enumeratedValue>
162695                <enumeratedValue>
162696                  <name>1</name>
162697                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162698                  <value>#1</value>
162699                </enumeratedValue>
162700              </enumeratedValues>
162701            </field>
162702            <field>
162703              <name>PTTO12</name>
162704              <description>Port Toggle Output</description>
162705              <bitOffset>12</bitOffset>
162706              <bitWidth>1</bitWidth>
162707              <access>write-only</access>
162708              <enumeratedValues>
162709                <enumeratedValue>
162710                  <name>0</name>
162711                  <description>Corresponding bit in PDORn does not change.</description>
162712                  <value>#0</value>
162713                </enumeratedValue>
162714                <enumeratedValue>
162715                  <name>1</name>
162716                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162717                  <value>#1</value>
162718                </enumeratedValue>
162719              </enumeratedValues>
162720            </field>
162721            <field>
162722              <name>PTTO13</name>
162723              <description>Port Toggle Output</description>
162724              <bitOffset>13</bitOffset>
162725              <bitWidth>1</bitWidth>
162726              <access>write-only</access>
162727              <enumeratedValues>
162728                <enumeratedValue>
162729                  <name>0</name>
162730                  <description>Corresponding bit in PDORn does not change.</description>
162731                  <value>#0</value>
162732                </enumeratedValue>
162733                <enumeratedValue>
162734                  <name>1</name>
162735                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162736                  <value>#1</value>
162737                </enumeratedValue>
162738              </enumeratedValues>
162739            </field>
162740            <field>
162741              <name>PTTO14</name>
162742              <description>Port Toggle Output</description>
162743              <bitOffset>14</bitOffset>
162744              <bitWidth>1</bitWidth>
162745              <access>write-only</access>
162746              <enumeratedValues>
162747                <enumeratedValue>
162748                  <name>0</name>
162749                  <description>Corresponding bit in PDORn does not change.</description>
162750                  <value>#0</value>
162751                </enumeratedValue>
162752                <enumeratedValue>
162753                  <name>1</name>
162754                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162755                  <value>#1</value>
162756                </enumeratedValue>
162757              </enumeratedValues>
162758            </field>
162759            <field>
162760              <name>PTTO15</name>
162761              <description>Port Toggle Output</description>
162762              <bitOffset>15</bitOffset>
162763              <bitWidth>1</bitWidth>
162764              <access>write-only</access>
162765              <enumeratedValues>
162766                <enumeratedValue>
162767                  <name>0</name>
162768                  <description>Corresponding bit in PDORn does not change.</description>
162769                  <value>#0</value>
162770                </enumeratedValue>
162771                <enumeratedValue>
162772                  <name>1</name>
162773                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162774                  <value>#1</value>
162775                </enumeratedValue>
162776              </enumeratedValues>
162777            </field>
162778            <field>
162779              <name>PTTO16</name>
162780              <description>Port Toggle Output</description>
162781              <bitOffset>16</bitOffset>
162782              <bitWidth>1</bitWidth>
162783              <access>write-only</access>
162784              <enumeratedValues>
162785                <enumeratedValue>
162786                  <name>0</name>
162787                  <description>Corresponding bit in PDORn does not change.</description>
162788                  <value>#0</value>
162789                </enumeratedValue>
162790                <enumeratedValue>
162791                  <name>1</name>
162792                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162793                  <value>#1</value>
162794                </enumeratedValue>
162795              </enumeratedValues>
162796            </field>
162797            <field>
162798              <name>PTTO17</name>
162799              <description>Port Toggle Output</description>
162800              <bitOffset>17</bitOffset>
162801              <bitWidth>1</bitWidth>
162802              <access>write-only</access>
162803              <enumeratedValues>
162804                <enumeratedValue>
162805                  <name>0</name>
162806                  <description>Corresponding bit in PDORn does not change.</description>
162807                  <value>#0</value>
162808                </enumeratedValue>
162809                <enumeratedValue>
162810                  <name>1</name>
162811                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162812                  <value>#1</value>
162813                </enumeratedValue>
162814              </enumeratedValues>
162815            </field>
162816            <field>
162817              <name>PTTO18</name>
162818              <description>Port Toggle Output</description>
162819              <bitOffset>18</bitOffset>
162820              <bitWidth>1</bitWidth>
162821              <access>write-only</access>
162822              <enumeratedValues>
162823                <enumeratedValue>
162824                  <name>0</name>
162825                  <description>Corresponding bit in PDORn does not change.</description>
162826                  <value>#0</value>
162827                </enumeratedValue>
162828                <enumeratedValue>
162829                  <name>1</name>
162830                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162831                  <value>#1</value>
162832                </enumeratedValue>
162833              </enumeratedValues>
162834            </field>
162835            <field>
162836              <name>PTTO19</name>
162837              <description>Port Toggle Output</description>
162838              <bitOffset>19</bitOffset>
162839              <bitWidth>1</bitWidth>
162840              <access>write-only</access>
162841              <enumeratedValues>
162842                <enumeratedValue>
162843                  <name>0</name>
162844                  <description>Corresponding bit in PDORn does not change.</description>
162845                  <value>#0</value>
162846                </enumeratedValue>
162847                <enumeratedValue>
162848                  <name>1</name>
162849                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162850                  <value>#1</value>
162851                </enumeratedValue>
162852              </enumeratedValues>
162853            </field>
162854            <field>
162855              <name>PTTO20</name>
162856              <description>Port Toggle Output</description>
162857              <bitOffset>20</bitOffset>
162858              <bitWidth>1</bitWidth>
162859              <access>write-only</access>
162860              <enumeratedValues>
162861                <enumeratedValue>
162862                  <name>0</name>
162863                  <description>Corresponding bit in PDORn does not change.</description>
162864                  <value>#0</value>
162865                </enumeratedValue>
162866                <enumeratedValue>
162867                  <name>1</name>
162868                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162869                  <value>#1</value>
162870                </enumeratedValue>
162871              </enumeratedValues>
162872            </field>
162873            <field>
162874              <name>PTTO21</name>
162875              <description>Port Toggle Output</description>
162876              <bitOffset>21</bitOffset>
162877              <bitWidth>1</bitWidth>
162878              <access>write-only</access>
162879              <enumeratedValues>
162880                <enumeratedValue>
162881                  <name>0</name>
162882                  <description>Corresponding bit in PDORn does not change.</description>
162883                  <value>#0</value>
162884                </enumeratedValue>
162885                <enumeratedValue>
162886                  <name>1</name>
162887                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162888                  <value>#1</value>
162889                </enumeratedValue>
162890              </enumeratedValues>
162891            </field>
162892            <field>
162893              <name>PTTO22</name>
162894              <description>Port Toggle Output</description>
162895              <bitOffset>22</bitOffset>
162896              <bitWidth>1</bitWidth>
162897              <access>write-only</access>
162898              <enumeratedValues>
162899                <enumeratedValue>
162900                  <name>0</name>
162901                  <description>Corresponding bit in PDORn does not change.</description>
162902                  <value>#0</value>
162903                </enumeratedValue>
162904                <enumeratedValue>
162905                  <name>1</name>
162906                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162907                  <value>#1</value>
162908                </enumeratedValue>
162909              </enumeratedValues>
162910            </field>
162911            <field>
162912              <name>PTTO23</name>
162913              <description>Port Toggle Output</description>
162914              <bitOffset>23</bitOffset>
162915              <bitWidth>1</bitWidth>
162916              <access>write-only</access>
162917              <enumeratedValues>
162918                <enumeratedValue>
162919                  <name>0</name>
162920                  <description>Corresponding bit in PDORn does not change.</description>
162921                  <value>#0</value>
162922                </enumeratedValue>
162923                <enumeratedValue>
162924                  <name>1</name>
162925                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162926                  <value>#1</value>
162927                </enumeratedValue>
162928              </enumeratedValues>
162929            </field>
162930            <field>
162931              <name>PTTO24</name>
162932              <description>Port Toggle Output</description>
162933              <bitOffset>24</bitOffset>
162934              <bitWidth>1</bitWidth>
162935              <access>write-only</access>
162936              <enumeratedValues>
162937                <enumeratedValue>
162938                  <name>0</name>
162939                  <description>Corresponding bit in PDORn does not change.</description>
162940                  <value>#0</value>
162941                </enumeratedValue>
162942                <enumeratedValue>
162943                  <name>1</name>
162944                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162945                  <value>#1</value>
162946                </enumeratedValue>
162947              </enumeratedValues>
162948            </field>
162949            <field>
162950              <name>PTTO25</name>
162951              <description>Port Toggle Output</description>
162952              <bitOffset>25</bitOffset>
162953              <bitWidth>1</bitWidth>
162954              <access>write-only</access>
162955              <enumeratedValues>
162956                <enumeratedValue>
162957                  <name>0</name>
162958                  <description>Corresponding bit in PDORn does not change.</description>
162959                  <value>#0</value>
162960                </enumeratedValue>
162961                <enumeratedValue>
162962                  <name>1</name>
162963                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162964                  <value>#1</value>
162965                </enumeratedValue>
162966              </enumeratedValues>
162967            </field>
162968            <field>
162969              <name>PTTO26</name>
162970              <description>Port Toggle Output</description>
162971              <bitOffset>26</bitOffset>
162972              <bitWidth>1</bitWidth>
162973              <access>write-only</access>
162974              <enumeratedValues>
162975                <enumeratedValue>
162976                  <name>0</name>
162977                  <description>Corresponding bit in PDORn does not change.</description>
162978                  <value>#0</value>
162979                </enumeratedValue>
162980                <enumeratedValue>
162981                  <name>1</name>
162982                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
162983                  <value>#1</value>
162984                </enumeratedValue>
162985              </enumeratedValues>
162986            </field>
162987            <field>
162988              <name>PTTO27</name>
162989              <description>Port Toggle Output</description>
162990              <bitOffset>27</bitOffset>
162991              <bitWidth>1</bitWidth>
162992              <access>write-only</access>
162993              <enumeratedValues>
162994                <enumeratedValue>
162995                  <name>0</name>
162996                  <description>Corresponding bit in PDORn does not change.</description>
162997                  <value>#0</value>
162998                </enumeratedValue>
162999                <enumeratedValue>
163000                  <name>1</name>
163001                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
163002                  <value>#1</value>
163003                </enumeratedValue>
163004              </enumeratedValues>
163005            </field>
163006            <field>
163007              <name>PTTO28</name>
163008              <description>Port Toggle Output</description>
163009              <bitOffset>28</bitOffset>
163010              <bitWidth>1</bitWidth>
163011              <access>write-only</access>
163012              <enumeratedValues>
163013                <enumeratedValue>
163014                  <name>0</name>
163015                  <description>Corresponding bit in PDORn does not change.</description>
163016                  <value>#0</value>
163017                </enumeratedValue>
163018                <enumeratedValue>
163019                  <name>1</name>
163020                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
163021                  <value>#1</value>
163022                </enumeratedValue>
163023              </enumeratedValues>
163024            </field>
163025            <field>
163026              <name>PTTO29</name>
163027              <description>Port Toggle Output</description>
163028              <bitOffset>29</bitOffset>
163029              <bitWidth>1</bitWidth>
163030              <access>write-only</access>
163031              <enumeratedValues>
163032                <enumeratedValue>
163033                  <name>0</name>
163034                  <description>Corresponding bit in PDORn does not change.</description>
163035                  <value>#0</value>
163036                </enumeratedValue>
163037                <enumeratedValue>
163038                  <name>1</name>
163039                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
163040                  <value>#1</value>
163041                </enumeratedValue>
163042              </enumeratedValues>
163043            </field>
163044            <field>
163045              <name>PTTO30</name>
163046              <description>Port Toggle Output</description>
163047              <bitOffset>30</bitOffset>
163048              <bitWidth>1</bitWidth>
163049              <access>write-only</access>
163050              <enumeratedValues>
163051                <enumeratedValue>
163052                  <name>0</name>
163053                  <description>Corresponding bit in PDORn does not change.</description>
163054                  <value>#0</value>
163055                </enumeratedValue>
163056                <enumeratedValue>
163057                  <name>1</name>
163058                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
163059                  <value>#1</value>
163060                </enumeratedValue>
163061              </enumeratedValues>
163062            </field>
163063            <field>
163064              <name>PTTO31</name>
163065              <description>Port Toggle Output</description>
163066              <bitOffset>31</bitOffset>
163067              <bitWidth>1</bitWidth>
163068              <access>write-only</access>
163069              <enumeratedValues>
163070                <enumeratedValue>
163071                  <name>0</name>
163072                  <description>Corresponding bit in PDORn does not change.</description>
163073                  <value>#0</value>
163074                </enumeratedValue>
163075                <enumeratedValue>
163076                  <name>1</name>
163077                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
163078                  <value>#1</value>
163079                </enumeratedValue>
163080              </enumeratedValues>
163081            </field>
163082          </fields>
163083        </register>
163084        <register>
163085          <name>PDIR</name>
163086          <description>Port Data Input Register</description>
163087          <addressOffset>0x10</addressOffset>
163088          <size>32</size>
163089          <access>read-only</access>
163090          <resetValue>0</resetValue>
163091          <resetMask>0xFFFFFFFF</resetMask>
163092          <fields>
163093            <field>
163094              <name>PDI0</name>
163095              <description>Port Data Input</description>
163096              <bitOffset>0</bitOffset>
163097              <bitWidth>1</bitWidth>
163098              <access>read-only</access>
163099              <enumeratedValues>
163100                <enumeratedValue>
163101                  <name>0</name>
163102                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163103                  <value>#0</value>
163104                </enumeratedValue>
163105                <enumeratedValue>
163106                  <name>1</name>
163107                  <description>Pin logic level is logic 1.</description>
163108                  <value>#1</value>
163109                </enumeratedValue>
163110              </enumeratedValues>
163111            </field>
163112            <field>
163113              <name>PDI1</name>
163114              <description>Port Data Input</description>
163115              <bitOffset>1</bitOffset>
163116              <bitWidth>1</bitWidth>
163117              <access>read-only</access>
163118              <enumeratedValues>
163119                <enumeratedValue>
163120                  <name>0</name>
163121                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163122                  <value>#0</value>
163123                </enumeratedValue>
163124                <enumeratedValue>
163125                  <name>1</name>
163126                  <description>Pin logic level is logic 1.</description>
163127                  <value>#1</value>
163128                </enumeratedValue>
163129              </enumeratedValues>
163130            </field>
163131            <field>
163132              <name>PDI2</name>
163133              <description>Port Data Input</description>
163134              <bitOffset>2</bitOffset>
163135              <bitWidth>1</bitWidth>
163136              <access>read-only</access>
163137              <enumeratedValues>
163138                <enumeratedValue>
163139                  <name>0</name>
163140                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163141                  <value>#0</value>
163142                </enumeratedValue>
163143                <enumeratedValue>
163144                  <name>1</name>
163145                  <description>Pin logic level is logic 1.</description>
163146                  <value>#1</value>
163147                </enumeratedValue>
163148              </enumeratedValues>
163149            </field>
163150            <field>
163151              <name>PDI3</name>
163152              <description>Port Data Input</description>
163153              <bitOffset>3</bitOffset>
163154              <bitWidth>1</bitWidth>
163155              <access>read-only</access>
163156              <enumeratedValues>
163157                <enumeratedValue>
163158                  <name>0</name>
163159                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163160                  <value>#0</value>
163161                </enumeratedValue>
163162                <enumeratedValue>
163163                  <name>1</name>
163164                  <description>Pin logic level is logic 1.</description>
163165                  <value>#1</value>
163166                </enumeratedValue>
163167              </enumeratedValues>
163168            </field>
163169            <field>
163170              <name>PDI4</name>
163171              <description>Port Data Input</description>
163172              <bitOffset>4</bitOffset>
163173              <bitWidth>1</bitWidth>
163174              <access>read-only</access>
163175              <enumeratedValues>
163176                <enumeratedValue>
163177                  <name>0</name>
163178                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163179                  <value>#0</value>
163180                </enumeratedValue>
163181                <enumeratedValue>
163182                  <name>1</name>
163183                  <description>Pin logic level is logic 1.</description>
163184                  <value>#1</value>
163185                </enumeratedValue>
163186              </enumeratedValues>
163187            </field>
163188            <field>
163189              <name>PDI5</name>
163190              <description>Port Data Input</description>
163191              <bitOffset>5</bitOffset>
163192              <bitWidth>1</bitWidth>
163193              <access>read-only</access>
163194              <enumeratedValues>
163195                <enumeratedValue>
163196                  <name>0</name>
163197                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163198                  <value>#0</value>
163199                </enumeratedValue>
163200                <enumeratedValue>
163201                  <name>1</name>
163202                  <description>Pin logic level is logic 1.</description>
163203                  <value>#1</value>
163204                </enumeratedValue>
163205              </enumeratedValues>
163206            </field>
163207            <field>
163208              <name>PDI6</name>
163209              <description>Port Data Input</description>
163210              <bitOffset>6</bitOffset>
163211              <bitWidth>1</bitWidth>
163212              <access>read-only</access>
163213              <enumeratedValues>
163214                <enumeratedValue>
163215                  <name>0</name>
163216                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163217                  <value>#0</value>
163218                </enumeratedValue>
163219                <enumeratedValue>
163220                  <name>1</name>
163221                  <description>Pin logic level is logic 1.</description>
163222                  <value>#1</value>
163223                </enumeratedValue>
163224              </enumeratedValues>
163225            </field>
163226            <field>
163227              <name>PDI7</name>
163228              <description>Port Data Input</description>
163229              <bitOffset>7</bitOffset>
163230              <bitWidth>1</bitWidth>
163231              <access>read-only</access>
163232              <enumeratedValues>
163233                <enumeratedValue>
163234                  <name>0</name>
163235                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163236                  <value>#0</value>
163237                </enumeratedValue>
163238                <enumeratedValue>
163239                  <name>1</name>
163240                  <description>Pin logic level is logic 1.</description>
163241                  <value>#1</value>
163242                </enumeratedValue>
163243              </enumeratedValues>
163244            </field>
163245            <field>
163246              <name>PDI8</name>
163247              <description>Port Data Input</description>
163248              <bitOffset>8</bitOffset>
163249              <bitWidth>1</bitWidth>
163250              <access>read-only</access>
163251              <enumeratedValues>
163252                <enumeratedValue>
163253                  <name>0</name>
163254                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163255                  <value>#0</value>
163256                </enumeratedValue>
163257                <enumeratedValue>
163258                  <name>1</name>
163259                  <description>Pin logic level is logic 1.</description>
163260                  <value>#1</value>
163261                </enumeratedValue>
163262              </enumeratedValues>
163263            </field>
163264            <field>
163265              <name>PDI9</name>
163266              <description>Port Data Input</description>
163267              <bitOffset>9</bitOffset>
163268              <bitWidth>1</bitWidth>
163269              <access>read-only</access>
163270              <enumeratedValues>
163271                <enumeratedValue>
163272                  <name>0</name>
163273                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163274                  <value>#0</value>
163275                </enumeratedValue>
163276                <enumeratedValue>
163277                  <name>1</name>
163278                  <description>Pin logic level is logic 1.</description>
163279                  <value>#1</value>
163280                </enumeratedValue>
163281              </enumeratedValues>
163282            </field>
163283            <field>
163284              <name>PDI10</name>
163285              <description>Port Data Input</description>
163286              <bitOffset>10</bitOffset>
163287              <bitWidth>1</bitWidth>
163288              <access>read-only</access>
163289              <enumeratedValues>
163290                <enumeratedValue>
163291                  <name>0</name>
163292                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163293                  <value>#0</value>
163294                </enumeratedValue>
163295                <enumeratedValue>
163296                  <name>1</name>
163297                  <description>Pin logic level is logic 1.</description>
163298                  <value>#1</value>
163299                </enumeratedValue>
163300              </enumeratedValues>
163301            </field>
163302            <field>
163303              <name>PDI11</name>
163304              <description>Port Data Input</description>
163305              <bitOffset>11</bitOffset>
163306              <bitWidth>1</bitWidth>
163307              <access>read-only</access>
163308              <enumeratedValues>
163309                <enumeratedValue>
163310                  <name>0</name>
163311                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163312                  <value>#0</value>
163313                </enumeratedValue>
163314                <enumeratedValue>
163315                  <name>1</name>
163316                  <description>Pin logic level is logic 1.</description>
163317                  <value>#1</value>
163318                </enumeratedValue>
163319              </enumeratedValues>
163320            </field>
163321            <field>
163322              <name>PDI12</name>
163323              <description>Port Data Input</description>
163324              <bitOffset>12</bitOffset>
163325              <bitWidth>1</bitWidth>
163326              <access>read-only</access>
163327              <enumeratedValues>
163328                <enumeratedValue>
163329                  <name>0</name>
163330                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163331                  <value>#0</value>
163332                </enumeratedValue>
163333                <enumeratedValue>
163334                  <name>1</name>
163335                  <description>Pin logic level is logic 1.</description>
163336                  <value>#1</value>
163337                </enumeratedValue>
163338              </enumeratedValues>
163339            </field>
163340            <field>
163341              <name>PDI13</name>
163342              <description>Port Data Input</description>
163343              <bitOffset>13</bitOffset>
163344              <bitWidth>1</bitWidth>
163345              <access>read-only</access>
163346              <enumeratedValues>
163347                <enumeratedValue>
163348                  <name>0</name>
163349                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163350                  <value>#0</value>
163351                </enumeratedValue>
163352                <enumeratedValue>
163353                  <name>1</name>
163354                  <description>Pin logic level is logic 1.</description>
163355                  <value>#1</value>
163356                </enumeratedValue>
163357              </enumeratedValues>
163358            </field>
163359            <field>
163360              <name>PDI14</name>
163361              <description>Port Data Input</description>
163362              <bitOffset>14</bitOffset>
163363              <bitWidth>1</bitWidth>
163364              <access>read-only</access>
163365              <enumeratedValues>
163366                <enumeratedValue>
163367                  <name>0</name>
163368                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163369                  <value>#0</value>
163370                </enumeratedValue>
163371                <enumeratedValue>
163372                  <name>1</name>
163373                  <description>Pin logic level is logic 1.</description>
163374                  <value>#1</value>
163375                </enumeratedValue>
163376              </enumeratedValues>
163377            </field>
163378            <field>
163379              <name>PDI15</name>
163380              <description>Port Data Input</description>
163381              <bitOffset>15</bitOffset>
163382              <bitWidth>1</bitWidth>
163383              <access>read-only</access>
163384              <enumeratedValues>
163385                <enumeratedValue>
163386                  <name>0</name>
163387                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163388                  <value>#0</value>
163389                </enumeratedValue>
163390                <enumeratedValue>
163391                  <name>1</name>
163392                  <description>Pin logic level is logic 1.</description>
163393                  <value>#1</value>
163394                </enumeratedValue>
163395              </enumeratedValues>
163396            </field>
163397            <field>
163398              <name>PDI16</name>
163399              <description>Port Data Input</description>
163400              <bitOffset>16</bitOffset>
163401              <bitWidth>1</bitWidth>
163402              <access>read-only</access>
163403              <enumeratedValues>
163404                <enumeratedValue>
163405                  <name>0</name>
163406                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163407                  <value>#0</value>
163408                </enumeratedValue>
163409                <enumeratedValue>
163410                  <name>1</name>
163411                  <description>Pin logic level is logic 1.</description>
163412                  <value>#1</value>
163413                </enumeratedValue>
163414              </enumeratedValues>
163415            </field>
163416            <field>
163417              <name>PDI17</name>
163418              <description>Port Data Input</description>
163419              <bitOffset>17</bitOffset>
163420              <bitWidth>1</bitWidth>
163421              <access>read-only</access>
163422              <enumeratedValues>
163423                <enumeratedValue>
163424                  <name>0</name>
163425                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163426                  <value>#0</value>
163427                </enumeratedValue>
163428                <enumeratedValue>
163429                  <name>1</name>
163430                  <description>Pin logic level is logic 1.</description>
163431                  <value>#1</value>
163432                </enumeratedValue>
163433              </enumeratedValues>
163434            </field>
163435            <field>
163436              <name>PDI18</name>
163437              <description>Port Data Input</description>
163438              <bitOffset>18</bitOffset>
163439              <bitWidth>1</bitWidth>
163440              <access>read-only</access>
163441              <enumeratedValues>
163442                <enumeratedValue>
163443                  <name>0</name>
163444                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163445                  <value>#0</value>
163446                </enumeratedValue>
163447                <enumeratedValue>
163448                  <name>1</name>
163449                  <description>Pin logic level is logic 1.</description>
163450                  <value>#1</value>
163451                </enumeratedValue>
163452              </enumeratedValues>
163453            </field>
163454            <field>
163455              <name>PDI19</name>
163456              <description>Port Data Input</description>
163457              <bitOffset>19</bitOffset>
163458              <bitWidth>1</bitWidth>
163459              <access>read-only</access>
163460              <enumeratedValues>
163461                <enumeratedValue>
163462                  <name>0</name>
163463                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163464                  <value>#0</value>
163465                </enumeratedValue>
163466                <enumeratedValue>
163467                  <name>1</name>
163468                  <description>Pin logic level is logic 1.</description>
163469                  <value>#1</value>
163470                </enumeratedValue>
163471              </enumeratedValues>
163472            </field>
163473            <field>
163474              <name>PDI20</name>
163475              <description>Port Data Input</description>
163476              <bitOffset>20</bitOffset>
163477              <bitWidth>1</bitWidth>
163478              <access>read-only</access>
163479              <enumeratedValues>
163480                <enumeratedValue>
163481                  <name>0</name>
163482                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163483                  <value>#0</value>
163484                </enumeratedValue>
163485                <enumeratedValue>
163486                  <name>1</name>
163487                  <description>Pin logic level is logic 1.</description>
163488                  <value>#1</value>
163489                </enumeratedValue>
163490              </enumeratedValues>
163491            </field>
163492            <field>
163493              <name>PDI21</name>
163494              <description>Port Data Input</description>
163495              <bitOffset>21</bitOffset>
163496              <bitWidth>1</bitWidth>
163497              <access>read-only</access>
163498              <enumeratedValues>
163499                <enumeratedValue>
163500                  <name>0</name>
163501                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163502                  <value>#0</value>
163503                </enumeratedValue>
163504                <enumeratedValue>
163505                  <name>1</name>
163506                  <description>Pin logic level is logic 1.</description>
163507                  <value>#1</value>
163508                </enumeratedValue>
163509              </enumeratedValues>
163510            </field>
163511            <field>
163512              <name>PDI22</name>
163513              <description>Port Data Input</description>
163514              <bitOffset>22</bitOffset>
163515              <bitWidth>1</bitWidth>
163516              <access>read-only</access>
163517              <enumeratedValues>
163518                <enumeratedValue>
163519                  <name>0</name>
163520                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163521                  <value>#0</value>
163522                </enumeratedValue>
163523                <enumeratedValue>
163524                  <name>1</name>
163525                  <description>Pin logic level is logic 1.</description>
163526                  <value>#1</value>
163527                </enumeratedValue>
163528              </enumeratedValues>
163529            </field>
163530            <field>
163531              <name>PDI23</name>
163532              <description>Port Data Input</description>
163533              <bitOffset>23</bitOffset>
163534              <bitWidth>1</bitWidth>
163535              <access>read-only</access>
163536              <enumeratedValues>
163537                <enumeratedValue>
163538                  <name>0</name>
163539                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163540                  <value>#0</value>
163541                </enumeratedValue>
163542                <enumeratedValue>
163543                  <name>1</name>
163544                  <description>Pin logic level is logic 1.</description>
163545                  <value>#1</value>
163546                </enumeratedValue>
163547              </enumeratedValues>
163548            </field>
163549            <field>
163550              <name>PDI24</name>
163551              <description>Port Data Input</description>
163552              <bitOffset>24</bitOffset>
163553              <bitWidth>1</bitWidth>
163554              <access>read-only</access>
163555              <enumeratedValues>
163556                <enumeratedValue>
163557                  <name>0</name>
163558                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163559                  <value>#0</value>
163560                </enumeratedValue>
163561                <enumeratedValue>
163562                  <name>1</name>
163563                  <description>Pin logic level is logic 1.</description>
163564                  <value>#1</value>
163565                </enumeratedValue>
163566              </enumeratedValues>
163567            </field>
163568            <field>
163569              <name>PDI25</name>
163570              <description>Port Data Input</description>
163571              <bitOffset>25</bitOffset>
163572              <bitWidth>1</bitWidth>
163573              <access>read-only</access>
163574              <enumeratedValues>
163575                <enumeratedValue>
163576                  <name>0</name>
163577                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163578                  <value>#0</value>
163579                </enumeratedValue>
163580                <enumeratedValue>
163581                  <name>1</name>
163582                  <description>Pin logic level is logic 1.</description>
163583                  <value>#1</value>
163584                </enumeratedValue>
163585              </enumeratedValues>
163586            </field>
163587            <field>
163588              <name>PDI26</name>
163589              <description>Port Data Input</description>
163590              <bitOffset>26</bitOffset>
163591              <bitWidth>1</bitWidth>
163592              <access>read-only</access>
163593              <enumeratedValues>
163594                <enumeratedValue>
163595                  <name>0</name>
163596                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163597                  <value>#0</value>
163598                </enumeratedValue>
163599                <enumeratedValue>
163600                  <name>1</name>
163601                  <description>Pin logic level is logic 1.</description>
163602                  <value>#1</value>
163603                </enumeratedValue>
163604              </enumeratedValues>
163605            </field>
163606            <field>
163607              <name>PDI27</name>
163608              <description>Port Data Input</description>
163609              <bitOffset>27</bitOffset>
163610              <bitWidth>1</bitWidth>
163611              <access>read-only</access>
163612              <enumeratedValues>
163613                <enumeratedValue>
163614                  <name>0</name>
163615                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163616                  <value>#0</value>
163617                </enumeratedValue>
163618                <enumeratedValue>
163619                  <name>1</name>
163620                  <description>Pin logic level is logic 1.</description>
163621                  <value>#1</value>
163622                </enumeratedValue>
163623              </enumeratedValues>
163624            </field>
163625            <field>
163626              <name>PDI28</name>
163627              <description>Port Data Input</description>
163628              <bitOffset>28</bitOffset>
163629              <bitWidth>1</bitWidth>
163630              <access>read-only</access>
163631              <enumeratedValues>
163632                <enumeratedValue>
163633                  <name>0</name>
163634                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163635                  <value>#0</value>
163636                </enumeratedValue>
163637                <enumeratedValue>
163638                  <name>1</name>
163639                  <description>Pin logic level is logic 1.</description>
163640                  <value>#1</value>
163641                </enumeratedValue>
163642              </enumeratedValues>
163643            </field>
163644            <field>
163645              <name>PDI29</name>
163646              <description>Port Data Input</description>
163647              <bitOffset>29</bitOffset>
163648              <bitWidth>1</bitWidth>
163649              <access>read-only</access>
163650              <enumeratedValues>
163651                <enumeratedValue>
163652                  <name>0</name>
163653                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163654                  <value>#0</value>
163655                </enumeratedValue>
163656                <enumeratedValue>
163657                  <name>1</name>
163658                  <description>Pin logic level is logic 1.</description>
163659                  <value>#1</value>
163660                </enumeratedValue>
163661              </enumeratedValues>
163662            </field>
163663            <field>
163664              <name>PDI30</name>
163665              <description>Port Data Input</description>
163666              <bitOffset>30</bitOffset>
163667              <bitWidth>1</bitWidth>
163668              <access>read-only</access>
163669              <enumeratedValues>
163670                <enumeratedValue>
163671                  <name>0</name>
163672                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163673                  <value>#0</value>
163674                </enumeratedValue>
163675                <enumeratedValue>
163676                  <name>1</name>
163677                  <description>Pin logic level is logic 1.</description>
163678                  <value>#1</value>
163679                </enumeratedValue>
163680              </enumeratedValues>
163681            </field>
163682            <field>
163683              <name>PDI31</name>
163684              <description>Port Data Input</description>
163685              <bitOffset>31</bitOffset>
163686              <bitWidth>1</bitWidth>
163687              <access>read-only</access>
163688              <enumeratedValues>
163689                <enumeratedValue>
163690                  <name>0</name>
163691                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
163692                  <value>#0</value>
163693                </enumeratedValue>
163694                <enumeratedValue>
163695                  <name>1</name>
163696                  <description>Pin logic level is logic 1.</description>
163697                  <value>#1</value>
163698                </enumeratedValue>
163699              </enumeratedValues>
163700            </field>
163701          </fields>
163702        </register>
163703        <register>
163704          <name>PDDR</name>
163705          <description>Port Data Direction Register</description>
163706          <addressOffset>0x14</addressOffset>
163707          <size>32</size>
163708          <access>read-write</access>
163709          <resetValue>0</resetValue>
163710          <resetMask>0xFFFFFFFF</resetMask>
163711          <fields>
163712            <field>
163713              <name>PDD0</name>
163714              <description>Port Data Direction</description>
163715              <bitOffset>0</bitOffset>
163716              <bitWidth>1</bitWidth>
163717              <access>read-write</access>
163718              <enumeratedValues>
163719                <enumeratedValue>
163720                  <name>0</name>
163721                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163722                  <value>#0</value>
163723                </enumeratedValue>
163724                <enumeratedValue>
163725                  <name>1</name>
163726                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163727                  <value>#1</value>
163728                </enumeratedValue>
163729              </enumeratedValues>
163730            </field>
163731            <field>
163732              <name>PDD1</name>
163733              <description>Port Data Direction</description>
163734              <bitOffset>1</bitOffset>
163735              <bitWidth>1</bitWidth>
163736              <access>read-write</access>
163737              <enumeratedValues>
163738                <enumeratedValue>
163739                  <name>0</name>
163740                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163741                  <value>#0</value>
163742                </enumeratedValue>
163743                <enumeratedValue>
163744                  <name>1</name>
163745                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163746                  <value>#1</value>
163747                </enumeratedValue>
163748              </enumeratedValues>
163749            </field>
163750            <field>
163751              <name>PDD2</name>
163752              <description>Port Data Direction</description>
163753              <bitOffset>2</bitOffset>
163754              <bitWidth>1</bitWidth>
163755              <access>read-write</access>
163756              <enumeratedValues>
163757                <enumeratedValue>
163758                  <name>0</name>
163759                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163760                  <value>#0</value>
163761                </enumeratedValue>
163762                <enumeratedValue>
163763                  <name>1</name>
163764                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163765                  <value>#1</value>
163766                </enumeratedValue>
163767              </enumeratedValues>
163768            </field>
163769            <field>
163770              <name>PDD3</name>
163771              <description>Port Data Direction</description>
163772              <bitOffset>3</bitOffset>
163773              <bitWidth>1</bitWidth>
163774              <access>read-write</access>
163775              <enumeratedValues>
163776                <enumeratedValue>
163777                  <name>0</name>
163778                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163779                  <value>#0</value>
163780                </enumeratedValue>
163781                <enumeratedValue>
163782                  <name>1</name>
163783                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163784                  <value>#1</value>
163785                </enumeratedValue>
163786              </enumeratedValues>
163787            </field>
163788            <field>
163789              <name>PDD4</name>
163790              <description>Port Data Direction</description>
163791              <bitOffset>4</bitOffset>
163792              <bitWidth>1</bitWidth>
163793              <access>read-write</access>
163794              <enumeratedValues>
163795                <enumeratedValue>
163796                  <name>0</name>
163797                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163798                  <value>#0</value>
163799                </enumeratedValue>
163800                <enumeratedValue>
163801                  <name>1</name>
163802                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163803                  <value>#1</value>
163804                </enumeratedValue>
163805              </enumeratedValues>
163806            </field>
163807            <field>
163808              <name>PDD5</name>
163809              <description>Port Data Direction</description>
163810              <bitOffset>5</bitOffset>
163811              <bitWidth>1</bitWidth>
163812              <access>read-write</access>
163813              <enumeratedValues>
163814                <enumeratedValue>
163815                  <name>0</name>
163816                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163817                  <value>#0</value>
163818                </enumeratedValue>
163819                <enumeratedValue>
163820                  <name>1</name>
163821                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163822                  <value>#1</value>
163823                </enumeratedValue>
163824              </enumeratedValues>
163825            </field>
163826            <field>
163827              <name>PDD6</name>
163828              <description>Port Data Direction</description>
163829              <bitOffset>6</bitOffset>
163830              <bitWidth>1</bitWidth>
163831              <access>read-write</access>
163832              <enumeratedValues>
163833                <enumeratedValue>
163834                  <name>0</name>
163835                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163836                  <value>#0</value>
163837                </enumeratedValue>
163838                <enumeratedValue>
163839                  <name>1</name>
163840                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163841                  <value>#1</value>
163842                </enumeratedValue>
163843              </enumeratedValues>
163844            </field>
163845            <field>
163846              <name>PDD7</name>
163847              <description>Port Data Direction</description>
163848              <bitOffset>7</bitOffset>
163849              <bitWidth>1</bitWidth>
163850              <access>read-write</access>
163851              <enumeratedValues>
163852                <enumeratedValue>
163853                  <name>0</name>
163854                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163855                  <value>#0</value>
163856                </enumeratedValue>
163857                <enumeratedValue>
163858                  <name>1</name>
163859                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163860                  <value>#1</value>
163861                </enumeratedValue>
163862              </enumeratedValues>
163863            </field>
163864            <field>
163865              <name>PDD8</name>
163866              <description>Port Data Direction</description>
163867              <bitOffset>8</bitOffset>
163868              <bitWidth>1</bitWidth>
163869              <access>read-write</access>
163870              <enumeratedValues>
163871                <enumeratedValue>
163872                  <name>0</name>
163873                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163874                  <value>#0</value>
163875                </enumeratedValue>
163876                <enumeratedValue>
163877                  <name>1</name>
163878                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163879                  <value>#1</value>
163880                </enumeratedValue>
163881              </enumeratedValues>
163882            </field>
163883            <field>
163884              <name>PDD9</name>
163885              <description>Port Data Direction</description>
163886              <bitOffset>9</bitOffset>
163887              <bitWidth>1</bitWidth>
163888              <access>read-write</access>
163889              <enumeratedValues>
163890                <enumeratedValue>
163891                  <name>0</name>
163892                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163893                  <value>#0</value>
163894                </enumeratedValue>
163895                <enumeratedValue>
163896                  <name>1</name>
163897                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163898                  <value>#1</value>
163899                </enumeratedValue>
163900              </enumeratedValues>
163901            </field>
163902            <field>
163903              <name>PDD10</name>
163904              <description>Port Data Direction</description>
163905              <bitOffset>10</bitOffset>
163906              <bitWidth>1</bitWidth>
163907              <access>read-write</access>
163908              <enumeratedValues>
163909                <enumeratedValue>
163910                  <name>0</name>
163911                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163912                  <value>#0</value>
163913                </enumeratedValue>
163914                <enumeratedValue>
163915                  <name>1</name>
163916                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163917                  <value>#1</value>
163918                </enumeratedValue>
163919              </enumeratedValues>
163920            </field>
163921            <field>
163922              <name>PDD11</name>
163923              <description>Port Data Direction</description>
163924              <bitOffset>11</bitOffset>
163925              <bitWidth>1</bitWidth>
163926              <access>read-write</access>
163927              <enumeratedValues>
163928                <enumeratedValue>
163929                  <name>0</name>
163930                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163931                  <value>#0</value>
163932                </enumeratedValue>
163933                <enumeratedValue>
163934                  <name>1</name>
163935                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163936                  <value>#1</value>
163937                </enumeratedValue>
163938              </enumeratedValues>
163939            </field>
163940            <field>
163941              <name>PDD12</name>
163942              <description>Port Data Direction</description>
163943              <bitOffset>12</bitOffset>
163944              <bitWidth>1</bitWidth>
163945              <access>read-write</access>
163946              <enumeratedValues>
163947                <enumeratedValue>
163948                  <name>0</name>
163949                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163950                  <value>#0</value>
163951                </enumeratedValue>
163952                <enumeratedValue>
163953                  <name>1</name>
163954                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163955                  <value>#1</value>
163956                </enumeratedValue>
163957              </enumeratedValues>
163958            </field>
163959            <field>
163960              <name>PDD13</name>
163961              <description>Port Data Direction</description>
163962              <bitOffset>13</bitOffset>
163963              <bitWidth>1</bitWidth>
163964              <access>read-write</access>
163965              <enumeratedValues>
163966                <enumeratedValue>
163967                  <name>0</name>
163968                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163969                  <value>#0</value>
163970                </enumeratedValue>
163971                <enumeratedValue>
163972                  <name>1</name>
163973                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163974                  <value>#1</value>
163975                </enumeratedValue>
163976              </enumeratedValues>
163977            </field>
163978            <field>
163979              <name>PDD14</name>
163980              <description>Port Data Direction</description>
163981              <bitOffset>14</bitOffset>
163982              <bitWidth>1</bitWidth>
163983              <access>read-write</access>
163984              <enumeratedValues>
163985                <enumeratedValue>
163986                  <name>0</name>
163987                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
163988                  <value>#0</value>
163989                </enumeratedValue>
163990                <enumeratedValue>
163991                  <name>1</name>
163992                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
163993                  <value>#1</value>
163994                </enumeratedValue>
163995              </enumeratedValues>
163996            </field>
163997            <field>
163998              <name>PDD15</name>
163999              <description>Port Data Direction</description>
164000              <bitOffset>15</bitOffset>
164001              <bitWidth>1</bitWidth>
164002              <access>read-write</access>
164003              <enumeratedValues>
164004                <enumeratedValue>
164005                  <name>0</name>
164006                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164007                  <value>#0</value>
164008                </enumeratedValue>
164009                <enumeratedValue>
164010                  <name>1</name>
164011                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164012                  <value>#1</value>
164013                </enumeratedValue>
164014              </enumeratedValues>
164015            </field>
164016            <field>
164017              <name>PDD16</name>
164018              <description>Port Data Direction</description>
164019              <bitOffset>16</bitOffset>
164020              <bitWidth>1</bitWidth>
164021              <access>read-write</access>
164022              <enumeratedValues>
164023                <enumeratedValue>
164024                  <name>0</name>
164025                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164026                  <value>#0</value>
164027                </enumeratedValue>
164028                <enumeratedValue>
164029                  <name>1</name>
164030                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164031                  <value>#1</value>
164032                </enumeratedValue>
164033              </enumeratedValues>
164034            </field>
164035            <field>
164036              <name>PDD17</name>
164037              <description>Port Data Direction</description>
164038              <bitOffset>17</bitOffset>
164039              <bitWidth>1</bitWidth>
164040              <access>read-write</access>
164041              <enumeratedValues>
164042                <enumeratedValue>
164043                  <name>0</name>
164044                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164045                  <value>#0</value>
164046                </enumeratedValue>
164047                <enumeratedValue>
164048                  <name>1</name>
164049                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164050                  <value>#1</value>
164051                </enumeratedValue>
164052              </enumeratedValues>
164053            </field>
164054            <field>
164055              <name>PDD18</name>
164056              <description>Port Data Direction</description>
164057              <bitOffset>18</bitOffset>
164058              <bitWidth>1</bitWidth>
164059              <access>read-write</access>
164060              <enumeratedValues>
164061                <enumeratedValue>
164062                  <name>0</name>
164063                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164064                  <value>#0</value>
164065                </enumeratedValue>
164066                <enumeratedValue>
164067                  <name>1</name>
164068                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164069                  <value>#1</value>
164070                </enumeratedValue>
164071              </enumeratedValues>
164072            </field>
164073            <field>
164074              <name>PDD19</name>
164075              <description>Port Data Direction</description>
164076              <bitOffset>19</bitOffset>
164077              <bitWidth>1</bitWidth>
164078              <access>read-write</access>
164079              <enumeratedValues>
164080                <enumeratedValue>
164081                  <name>0</name>
164082                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164083                  <value>#0</value>
164084                </enumeratedValue>
164085                <enumeratedValue>
164086                  <name>1</name>
164087                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164088                  <value>#1</value>
164089                </enumeratedValue>
164090              </enumeratedValues>
164091            </field>
164092            <field>
164093              <name>PDD20</name>
164094              <description>Port Data Direction</description>
164095              <bitOffset>20</bitOffset>
164096              <bitWidth>1</bitWidth>
164097              <access>read-write</access>
164098              <enumeratedValues>
164099                <enumeratedValue>
164100                  <name>0</name>
164101                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164102                  <value>#0</value>
164103                </enumeratedValue>
164104                <enumeratedValue>
164105                  <name>1</name>
164106                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164107                  <value>#1</value>
164108                </enumeratedValue>
164109              </enumeratedValues>
164110            </field>
164111            <field>
164112              <name>PDD21</name>
164113              <description>Port Data Direction</description>
164114              <bitOffset>21</bitOffset>
164115              <bitWidth>1</bitWidth>
164116              <access>read-write</access>
164117              <enumeratedValues>
164118                <enumeratedValue>
164119                  <name>0</name>
164120                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164121                  <value>#0</value>
164122                </enumeratedValue>
164123                <enumeratedValue>
164124                  <name>1</name>
164125                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164126                  <value>#1</value>
164127                </enumeratedValue>
164128              </enumeratedValues>
164129            </field>
164130            <field>
164131              <name>PDD22</name>
164132              <description>Port Data Direction</description>
164133              <bitOffset>22</bitOffset>
164134              <bitWidth>1</bitWidth>
164135              <access>read-write</access>
164136              <enumeratedValues>
164137                <enumeratedValue>
164138                  <name>0</name>
164139                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164140                  <value>#0</value>
164141                </enumeratedValue>
164142                <enumeratedValue>
164143                  <name>1</name>
164144                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164145                  <value>#1</value>
164146                </enumeratedValue>
164147              </enumeratedValues>
164148            </field>
164149            <field>
164150              <name>PDD23</name>
164151              <description>Port Data Direction</description>
164152              <bitOffset>23</bitOffset>
164153              <bitWidth>1</bitWidth>
164154              <access>read-write</access>
164155              <enumeratedValues>
164156                <enumeratedValue>
164157                  <name>0</name>
164158                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164159                  <value>#0</value>
164160                </enumeratedValue>
164161                <enumeratedValue>
164162                  <name>1</name>
164163                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164164                  <value>#1</value>
164165                </enumeratedValue>
164166              </enumeratedValues>
164167            </field>
164168            <field>
164169              <name>PDD24</name>
164170              <description>Port Data Direction</description>
164171              <bitOffset>24</bitOffset>
164172              <bitWidth>1</bitWidth>
164173              <access>read-write</access>
164174              <enumeratedValues>
164175                <enumeratedValue>
164176                  <name>0</name>
164177                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164178                  <value>#0</value>
164179                </enumeratedValue>
164180                <enumeratedValue>
164181                  <name>1</name>
164182                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164183                  <value>#1</value>
164184                </enumeratedValue>
164185              </enumeratedValues>
164186            </field>
164187            <field>
164188              <name>PDD25</name>
164189              <description>Port Data Direction</description>
164190              <bitOffset>25</bitOffset>
164191              <bitWidth>1</bitWidth>
164192              <access>read-write</access>
164193              <enumeratedValues>
164194                <enumeratedValue>
164195                  <name>0</name>
164196                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164197                  <value>#0</value>
164198                </enumeratedValue>
164199                <enumeratedValue>
164200                  <name>1</name>
164201                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164202                  <value>#1</value>
164203                </enumeratedValue>
164204              </enumeratedValues>
164205            </field>
164206            <field>
164207              <name>PDD26</name>
164208              <description>Port Data Direction</description>
164209              <bitOffset>26</bitOffset>
164210              <bitWidth>1</bitWidth>
164211              <access>read-write</access>
164212              <enumeratedValues>
164213                <enumeratedValue>
164214                  <name>0</name>
164215                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164216                  <value>#0</value>
164217                </enumeratedValue>
164218                <enumeratedValue>
164219                  <name>1</name>
164220                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164221                  <value>#1</value>
164222                </enumeratedValue>
164223              </enumeratedValues>
164224            </field>
164225            <field>
164226              <name>PDD27</name>
164227              <description>Port Data Direction</description>
164228              <bitOffset>27</bitOffset>
164229              <bitWidth>1</bitWidth>
164230              <access>read-write</access>
164231              <enumeratedValues>
164232                <enumeratedValue>
164233                  <name>0</name>
164234                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164235                  <value>#0</value>
164236                </enumeratedValue>
164237                <enumeratedValue>
164238                  <name>1</name>
164239                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164240                  <value>#1</value>
164241                </enumeratedValue>
164242              </enumeratedValues>
164243            </field>
164244            <field>
164245              <name>PDD28</name>
164246              <description>Port Data Direction</description>
164247              <bitOffset>28</bitOffset>
164248              <bitWidth>1</bitWidth>
164249              <access>read-write</access>
164250              <enumeratedValues>
164251                <enumeratedValue>
164252                  <name>0</name>
164253                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164254                  <value>#0</value>
164255                </enumeratedValue>
164256                <enumeratedValue>
164257                  <name>1</name>
164258                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164259                  <value>#1</value>
164260                </enumeratedValue>
164261              </enumeratedValues>
164262            </field>
164263            <field>
164264              <name>PDD29</name>
164265              <description>Port Data Direction</description>
164266              <bitOffset>29</bitOffset>
164267              <bitWidth>1</bitWidth>
164268              <access>read-write</access>
164269              <enumeratedValues>
164270                <enumeratedValue>
164271                  <name>0</name>
164272                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164273                  <value>#0</value>
164274                </enumeratedValue>
164275                <enumeratedValue>
164276                  <name>1</name>
164277                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164278                  <value>#1</value>
164279                </enumeratedValue>
164280              </enumeratedValues>
164281            </field>
164282            <field>
164283              <name>PDD30</name>
164284              <description>Port Data Direction</description>
164285              <bitOffset>30</bitOffset>
164286              <bitWidth>1</bitWidth>
164287              <access>read-write</access>
164288              <enumeratedValues>
164289                <enumeratedValue>
164290                  <name>0</name>
164291                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164292                  <value>#0</value>
164293                </enumeratedValue>
164294                <enumeratedValue>
164295                  <name>1</name>
164296                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164297                  <value>#1</value>
164298                </enumeratedValue>
164299              </enumeratedValues>
164300            </field>
164301            <field>
164302              <name>PDD31</name>
164303              <description>Port Data Direction</description>
164304              <bitOffset>31</bitOffset>
164305              <bitWidth>1</bitWidth>
164306              <access>read-write</access>
164307              <enumeratedValues>
164308                <enumeratedValue>
164309                  <name>0</name>
164310                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
164311                  <value>#0</value>
164312                </enumeratedValue>
164313                <enumeratedValue>
164314                  <name>1</name>
164315                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
164316                  <value>#1</value>
164317                </enumeratedValue>
164318              </enumeratedValues>
164319            </field>
164320          </fields>
164321        </register>
164322      </registers>
164323    </peripheral>
164324    <peripheral>
164325      <name>GPIOD</name>
164326      <description>General Purpose Input/Output</description>
164327      <groupName>GPIO</groupName>
164328      <prependToName>GPIOD_</prependToName>
164329      <baseAddress>0x400FF0C0</baseAddress>
164330      <addressBlock>
164331        <offset>0</offset>
164332        <size>0x18</size>
164333        <usage>registers</usage>
164334      </addressBlock>
164335      <interrupt>
164336        <name>PORTD</name>
164337        <value>62</value>
164338      </interrupt>
164339      <registers>
164340        <register>
164341          <name>PDOR</name>
164342          <description>Port Data Output Register</description>
164343          <addressOffset>0</addressOffset>
164344          <size>32</size>
164345          <access>read-write</access>
164346          <resetValue>0</resetValue>
164347          <resetMask>0xFFFFFFFF</resetMask>
164348          <fields>
164349            <field>
164350              <name>PDO0</name>
164351              <description>Port Data Output</description>
164352              <bitOffset>0</bitOffset>
164353              <bitWidth>1</bitWidth>
164354              <access>read-write</access>
164355              <enumeratedValues>
164356                <enumeratedValue>
164357                  <name>0</name>
164358                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164359                  <value>#0</value>
164360                </enumeratedValue>
164361                <enumeratedValue>
164362                  <name>1</name>
164363                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164364                  <value>#1</value>
164365                </enumeratedValue>
164366              </enumeratedValues>
164367            </field>
164368            <field>
164369              <name>PDO1</name>
164370              <description>Port Data Output</description>
164371              <bitOffset>1</bitOffset>
164372              <bitWidth>1</bitWidth>
164373              <access>read-write</access>
164374              <enumeratedValues>
164375                <enumeratedValue>
164376                  <name>0</name>
164377                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164378                  <value>#0</value>
164379                </enumeratedValue>
164380                <enumeratedValue>
164381                  <name>1</name>
164382                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164383                  <value>#1</value>
164384                </enumeratedValue>
164385              </enumeratedValues>
164386            </field>
164387            <field>
164388              <name>PDO2</name>
164389              <description>Port Data Output</description>
164390              <bitOffset>2</bitOffset>
164391              <bitWidth>1</bitWidth>
164392              <access>read-write</access>
164393              <enumeratedValues>
164394                <enumeratedValue>
164395                  <name>0</name>
164396                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164397                  <value>#0</value>
164398                </enumeratedValue>
164399                <enumeratedValue>
164400                  <name>1</name>
164401                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164402                  <value>#1</value>
164403                </enumeratedValue>
164404              </enumeratedValues>
164405            </field>
164406            <field>
164407              <name>PDO3</name>
164408              <description>Port Data Output</description>
164409              <bitOffset>3</bitOffset>
164410              <bitWidth>1</bitWidth>
164411              <access>read-write</access>
164412              <enumeratedValues>
164413                <enumeratedValue>
164414                  <name>0</name>
164415                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164416                  <value>#0</value>
164417                </enumeratedValue>
164418                <enumeratedValue>
164419                  <name>1</name>
164420                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164421                  <value>#1</value>
164422                </enumeratedValue>
164423              </enumeratedValues>
164424            </field>
164425            <field>
164426              <name>PDO4</name>
164427              <description>Port Data Output</description>
164428              <bitOffset>4</bitOffset>
164429              <bitWidth>1</bitWidth>
164430              <access>read-write</access>
164431              <enumeratedValues>
164432                <enumeratedValue>
164433                  <name>0</name>
164434                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164435                  <value>#0</value>
164436                </enumeratedValue>
164437                <enumeratedValue>
164438                  <name>1</name>
164439                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164440                  <value>#1</value>
164441                </enumeratedValue>
164442              </enumeratedValues>
164443            </field>
164444            <field>
164445              <name>PDO5</name>
164446              <description>Port Data Output</description>
164447              <bitOffset>5</bitOffset>
164448              <bitWidth>1</bitWidth>
164449              <access>read-write</access>
164450              <enumeratedValues>
164451                <enumeratedValue>
164452                  <name>0</name>
164453                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164454                  <value>#0</value>
164455                </enumeratedValue>
164456                <enumeratedValue>
164457                  <name>1</name>
164458                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164459                  <value>#1</value>
164460                </enumeratedValue>
164461              </enumeratedValues>
164462            </field>
164463            <field>
164464              <name>PDO6</name>
164465              <description>Port Data Output</description>
164466              <bitOffset>6</bitOffset>
164467              <bitWidth>1</bitWidth>
164468              <access>read-write</access>
164469              <enumeratedValues>
164470                <enumeratedValue>
164471                  <name>0</name>
164472                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164473                  <value>#0</value>
164474                </enumeratedValue>
164475                <enumeratedValue>
164476                  <name>1</name>
164477                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164478                  <value>#1</value>
164479                </enumeratedValue>
164480              </enumeratedValues>
164481            </field>
164482            <field>
164483              <name>PDO7</name>
164484              <description>Port Data Output</description>
164485              <bitOffset>7</bitOffset>
164486              <bitWidth>1</bitWidth>
164487              <access>read-write</access>
164488              <enumeratedValues>
164489                <enumeratedValue>
164490                  <name>0</name>
164491                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164492                  <value>#0</value>
164493                </enumeratedValue>
164494                <enumeratedValue>
164495                  <name>1</name>
164496                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164497                  <value>#1</value>
164498                </enumeratedValue>
164499              </enumeratedValues>
164500            </field>
164501            <field>
164502              <name>PDO8</name>
164503              <description>Port Data Output</description>
164504              <bitOffset>8</bitOffset>
164505              <bitWidth>1</bitWidth>
164506              <access>read-write</access>
164507              <enumeratedValues>
164508                <enumeratedValue>
164509                  <name>0</name>
164510                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164511                  <value>#0</value>
164512                </enumeratedValue>
164513                <enumeratedValue>
164514                  <name>1</name>
164515                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164516                  <value>#1</value>
164517                </enumeratedValue>
164518              </enumeratedValues>
164519            </field>
164520            <field>
164521              <name>PDO9</name>
164522              <description>Port Data Output</description>
164523              <bitOffset>9</bitOffset>
164524              <bitWidth>1</bitWidth>
164525              <access>read-write</access>
164526              <enumeratedValues>
164527                <enumeratedValue>
164528                  <name>0</name>
164529                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164530                  <value>#0</value>
164531                </enumeratedValue>
164532                <enumeratedValue>
164533                  <name>1</name>
164534                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164535                  <value>#1</value>
164536                </enumeratedValue>
164537              </enumeratedValues>
164538            </field>
164539            <field>
164540              <name>PDO10</name>
164541              <description>Port Data Output</description>
164542              <bitOffset>10</bitOffset>
164543              <bitWidth>1</bitWidth>
164544              <access>read-write</access>
164545              <enumeratedValues>
164546                <enumeratedValue>
164547                  <name>0</name>
164548                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164549                  <value>#0</value>
164550                </enumeratedValue>
164551                <enumeratedValue>
164552                  <name>1</name>
164553                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164554                  <value>#1</value>
164555                </enumeratedValue>
164556              </enumeratedValues>
164557            </field>
164558            <field>
164559              <name>PDO11</name>
164560              <description>Port Data Output</description>
164561              <bitOffset>11</bitOffset>
164562              <bitWidth>1</bitWidth>
164563              <access>read-write</access>
164564              <enumeratedValues>
164565                <enumeratedValue>
164566                  <name>0</name>
164567                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164568                  <value>#0</value>
164569                </enumeratedValue>
164570                <enumeratedValue>
164571                  <name>1</name>
164572                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164573                  <value>#1</value>
164574                </enumeratedValue>
164575              </enumeratedValues>
164576            </field>
164577            <field>
164578              <name>PDO12</name>
164579              <description>Port Data Output</description>
164580              <bitOffset>12</bitOffset>
164581              <bitWidth>1</bitWidth>
164582              <access>read-write</access>
164583              <enumeratedValues>
164584                <enumeratedValue>
164585                  <name>0</name>
164586                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164587                  <value>#0</value>
164588                </enumeratedValue>
164589                <enumeratedValue>
164590                  <name>1</name>
164591                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164592                  <value>#1</value>
164593                </enumeratedValue>
164594              </enumeratedValues>
164595            </field>
164596            <field>
164597              <name>PDO13</name>
164598              <description>Port Data Output</description>
164599              <bitOffset>13</bitOffset>
164600              <bitWidth>1</bitWidth>
164601              <access>read-write</access>
164602              <enumeratedValues>
164603                <enumeratedValue>
164604                  <name>0</name>
164605                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164606                  <value>#0</value>
164607                </enumeratedValue>
164608                <enumeratedValue>
164609                  <name>1</name>
164610                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164611                  <value>#1</value>
164612                </enumeratedValue>
164613              </enumeratedValues>
164614            </field>
164615            <field>
164616              <name>PDO14</name>
164617              <description>Port Data Output</description>
164618              <bitOffset>14</bitOffset>
164619              <bitWidth>1</bitWidth>
164620              <access>read-write</access>
164621              <enumeratedValues>
164622                <enumeratedValue>
164623                  <name>0</name>
164624                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164625                  <value>#0</value>
164626                </enumeratedValue>
164627                <enumeratedValue>
164628                  <name>1</name>
164629                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164630                  <value>#1</value>
164631                </enumeratedValue>
164632              </enumeratedValues>
164633            </field>
164634            <field>
164635              <name>PDO15</name>
164636              <description>Port Data Output</description>
164637              <bitOffset>15</bitOffset>
164638              <bitWidth>1</bitWidth>
164639              <access>read-write</access>
164640              <enumeratedValues>
164641                <enumeratedValue>
164642                  <name>0</name>
164643                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164644                  <value>#0</value>
164645                </enumeratedValue>
164646                <enumeratedValue>
164647                  <name>1</name>
164648                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164649                  <value>#1</value>
164650                </enumeratedValue>
164651              </enumeratedValues>
164652            </field>
164653            <field>
164654              <name>PDO16</name>
164655              <description>Port Data Output</description>
164656              <bitOffset>16</bitOffset>
164657              <bitWidth>1</bitWidth>
164658              <access>read-write</access>
164659              <enumeratedValues>
164660                <enumeratedValue>
164661                  <name>0</name>
164662                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164663                  <value>#0</value>
164664                </enumeratedValue>
164665                <enumeratedValue>
164666                  <name>1</name>
164667                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164668                  <value>#1</value>
164669                </enumeratedValue>
164670              </enumeratedValues>
164671            </field>
164672            <field>
164673              <name>PDO17</name>
164674              <description>Port Data Output</description>
164675              <bitOffset>17</bitOffset>
164676              <bitWidth>1</bitWidth>
164677              <access>read-write</access>
164678              <enumeratedValues>
164679                <enumeratedValue>
164680                  <name>0</name>
164681                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164682                  <value>#0</value>
164683                </enumeratedValue>
164684                <enumeratedValue>
164685                  <name>1</name>
164686                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164687                  <value>#1</value>
164688                </enumeratedValue>
164689              </enumeratedValues>
164690            </field>
164691            <field>
164692              <name>PDO18</name>
164693              <description>Port Data Output</description>
164694              <bitOffset>18</bitOffset>
164695              <bitWidth>1</bitWidth>
164696              <access>read-write</access>
164697              <enumeratedValues>
164698                <enumeratedValue>
164699                  <name>0</name>
164700                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164701                  <value>#0</value>
164702                </enumeratedValue>
164703                <enumeratedValue>
164704                  <name>1</name>
164705                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164706                  <value>#1</value>
164707                </enumeratedValue>
164708              </enumeratedValues>
164709            </field>
164710            <field>
164711              <name>PDO19</name>
164712              <description>Port Data Output</description>
164713              <bitOffset>19</bitOffset>
164714              <bitWidth>1</bitWidth>
164715              <access>read-write</access>
164716              <enumeratedValues>
164717                <enumeratedValue>
164718                  <name>0</name>
164719                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164720                  <value>#0</value>
164721                </enumeratedValue>
164722                <enumeratedValue>
164723                  <name>1</name>
164724                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164725                  <value>#1</value>
164726                </enumeratedValue>
164727              </enumeratedValues>
164728            </field>
164729            <field>
164730              <name>PDO20</name>
164731              <description>Port Data Output</description>
164732              <bitOffset>20</bitOffset>
164733              <bitWidth>1</bitWidth>
164734              <access>read-write</access>
164735              <enumeratedValues>
164736                <enumeratedValue>
164737                  <name>0</name>
164738                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164739                  <value>#0</value>
164740                </enumeratedValue>
164741                <enumeratedValue>
164742                  <name>1</name>
164743                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164744                  <value>#1</value>
164745                </enumeratedValue>
164746              </enumeratedValues>
164747            </field>
164748            <field>
164749              <name>PDO21</name>
164750              <description>Port Data Output</description>
164751              <bitOffset>21</bitOffset>
164752              <bitWidth>1</bitWidth>
164753              <access>read-write</access>
164754              <enumeratedValues>
164755                <enumeratedValue>
164756                  <name>0</name>
164757                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164758                  <value>#0</value>
164759                </enumeratedValue>
164760                <enumeratedValue>
164761                  <name>1</name>
164762                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164763                  <value>#1</value>
164764                </enumeratedValue>
164765              </enumeratedValues>
164766            </field>
164767            <field>
164768              <name>PDO22</name>
164769              <description>Port Data Output</description>
164770              <bitOffset>22</bitOffset>
164771              <bitWidth>1</bitWidth>
164772              <access>read-write</access>
164773              <enumeratedValues>
164774                <enumeratedValue>
164775                  <name>0</name>
164776                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164777                  <value>#0</value>
164778                </enumeratedValue>
164779                <enumeratedValue>
164780                  <name>1</name>
164781                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164782                  <value>#1</value>
164783                </enumeratedValue>
164784              </enumeratedValues>
164785            </field>
164786            <field>
164787              <name>PDO23</name>
164788              <description>Port Data Output</description>
164789              <bitOffset>23</bitOffset>
164790              <bitWidth>1</bitWidth>
164791              <access>read-write</access>
164792              <enumeratedValues>
164793                <enumeratedValue>
164794                  <name>0</name>
164795                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164796                  <value>#0</value>
164797                </enumeratedValue>
164798                <enumeratedValue>
164799                  <name>1</name>
164800                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164801                  <value>#1</value>
164802                </enumeratedValue>
164803              </enumeratedValues>
164804            </field>
164805            <field>
164806              <name>PDO24</name>
164807              <description>Port Data Output</description>
164808              <bitOffset>24</bitOffset>
164809              <bitWidth>1</bitWidth>
164810              <access>read-write</access>
164811              <enumeratedValues>
164812                <enumeratedValue>
164813                  <name>0</name>
164814                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164815                  <value>#0</value>
164816                </enumeratedValue>
164817                <enumeratedValue>
164818                  <name>1</name>
164819                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164820                  <value>#1</value>
164821                </enumeratedValue>
164822              </enumeratedValues>
164823            </field>
164824            <field>
164825              <name>PDO25</name>
164826              <description>Port Data Output</description>
164827              <bitOffset>25</bitOffset>
164828              <bitWidth>1</bitWidth>
164829              <access>read-write</access>
164830              <enumeratedValues>
164831                <enumeratedValue>
164832                  <name>0</name>
164833                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164834                  <value>#0</value>
164835                </enumeratedValue>
164836                <enumeratedValue>
164837                  <name>1</name>
164838                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164839                  <value>#1</value>
164840                </enumeratedValue>
164841              </enumeratedValues>
164842            </field>
164843            <field>
164844              <name>PDO26</name>
164845              <description>Port Data Output</description>
164846              <bitOffset>26</bitOffset>
164847              <bitWidth>1</bitWidth>
164848              <access>read-write</access>
164849              <enumeratedValues>
164850                <enumeratedValue>
164851                  <name>0</name>
164852                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164853                  <value>#0</value>
164854                </enumeratedValue>
164855                <enumeratedValue>
164856                  <name>1</name>
164857                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164858                  <value>#1</value>
164859                </enumeratedValue>
164860              </enumeratedValues>
164861            </field>
164862            <field>
164863              <name>PDO27</name>
164864              <description>Port Data Output</description>
164865              <bitOffset>27</bitOffset>
164866              <bitWidth>1</bitWidth>
164867              <access>read-write</access>
164868              <enumeratedValues>
164869                <enumeratedValue>
164870                  <name>0</name>
164871                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164872                  <value>#0</value>
164873                </enumeratedValue>
164874                <enumeratedValue>
164875                  <name>1</name>
164876                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164877                  <value>#1</value>
164878                </enumeratedValue>
164879              </enumeratedValues>
164880            </field>
164881            <field>
164882              <name>PDO28</name>
164883              <description>Port Data Output</description>
164884              <bitOffset>28</bitOffset>
164885              <bitWidth>1</bitWidth>
164886              <access>read-write</access>
164887              <enumeratedValues>
164888                <enumeratedValue>
164889                  <name>0</name>
164890                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164891                  <value>#0</value>
164892                </enumeratedValue>
164893                <enumeratedValue>
164894                  <name>1</name>
164895                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164896                  <value>#1</value>
164897                </enumeratedValue>
164898              </enumeratedValues>
164899            </field>
164900            <field>
164901              <name>PDO29</name>
164902              <description>Port Data Output</description>
164903              <bitOffset>29</bitOffset>
164904              <bitWidth>1</bitWidth>
164905              <access>read-write</access>
164906              <enumeratedValues>
164907                <enumeratedValue>
164908                  <name>0</name>
164909                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164910                  <value>#0</value>
164911                </enumeratedValue>
164912                <enumeratedValue>
164913                  <name>1</name>
164914                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164915                  <value>#1</value>
164916                </enumeratedValue>
164917              </enumeratedValues>
164918            </field>
164919            <field>
164920              <name>PDO30</name>
164921              <description>Port Data Output</description>
164922              <bitOffset>30</bitOffset>
164923              <bitWidth>1</bitWidth>
164924              <access>read-write</access>
164925              <enumeratedValues>
164926                <enumeratedValue>
164927                  <name>0</name>
164928                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164929                  <value>#0</value>
164930                </enumeratedValue>
164931                <enumeratedValue>
164932                  <name>1</name>
164933                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164934                  <value>#1</value>
164935                </enumeratedValue>
164936              </enumeratedValues>
164937            </field>
164938            <field>
164939              <name>PDO31</name>
164940              <description>Port Data Output</description>
164941              <bitOffset>31</bitOffset>
164942              <bitWidth>1</bitWidth>
164943              <access>read-write</access>
164944              <enumeratedValues>
164945                <enumeratedValue>
164946                  <name>0</name>
164947                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
164948                  <value>#0</value>
164949                </enumeratedValue>
164950                <enumeratedValue>
164951                  <name>1</name>
164952                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
164953                  <value>#1</value>
164954                </enumeratedValue>
164955              </enumeratedValues>
164956            </field>
164957          </fields>
164958        </register>
164959        <register>
164960          <name>PSOR</name>
164961          <description>Port Set Output Register</description>
164962          <addressOffset>0x4</addressOffset>
164963          <size>32</size>
164964          <access>write-only</access>
164965          <resetValue>0</resetValue>
164966          <resetMask>0xFFFFFFFF</resetMask>
164967          <fields>
164968            <field>
164969              <name>PTSO0</name>
164970              <description>Port Set Output</description>
164971              <bitOffset>0</bitOffset>
164972              <bitWidth>1</bitWidth>
164973              <access>write-only</access>
164974              <enumeratedValues>
164975                <enumeratedValue>
164976                  <name>0</name>
164977                  <description>Corresponding bit in PDORn does not change.</description>
164978                  <value>#0</value>
164979                </enumeratedValue>
164980                <enumeratedValue>
164981                  <name>1</name>
164982                  <description>Corresponding bit in PDORn is set to logic 1.</description>
164983                  <value>#1</value>
164984                </enumeratedValue>
164985              </enumeratedValues>
164986            </field>
164987            <field>
164988              <name>PTSO1</name>
164989              <description>Port Set Output</description>
164990              <bitOffset>1</bitOffset>
164991              <bitWidth>1</bitWidth>
164992              <access>write-only</access>
164993              <enumeratedValues>
164994                <enumeratedValue>
164995                  <name>0</name>
164996                  <description>Corresponding bit in PDORn does not change.</description>
164997                  <value>#0</value>
164998                </enumeratedValue>
164999                <enumeratedValue>
165000                  <name>1</name>
165001                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165002                  <value>#1</value>
165003                </enumeratedValue>
165004              </enumeratedValues>
165005            </field>
165006            <field>
165007              <name>PTSO2</name>
165008              <description>Port Set Output</description>
165009              <bitOffset>2</bitOffset>
165010              <bitWidth>1</bitWidth>
165011              <access>write-only</access>
165012              <enumeratedValues>
165013                <enumeratedValue>
165014                  <name>0</name>
165015                  <description>Corresponding bit in PDORn does not change.</description>
165016                  <value>#0</value>
165017                </enumeratedValue>
165018                <enumeratedValue>
165019                  <name>1</name>
165020                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165021                  <value>#1</value>
165022                </enumeratedValue>
165023              </enumeratedValues>
165024            </field>
165025            <field>
165026              <name>PTSO3</name>
165027              <description>Port Set Output</description>
165028              <bitOffset>3</bitOffset>
165029              <bitWidth>1</bitWidth>
165030              <access>write-only</access>
165031              <enumeratedValues>
165032                <enumeratedValue>
165033                  <name>0</name>
165034                  <description>Corresponding bit in PDORn does not change.</description>
165035                  <value>#0</value>
165036                </enumeratedValue>
165037                <enumeratedValue>
165038                  <name>1</name>
165039                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165040                  <value>#1</value>
165041                </enumeratedValue>
165042              </enumeratedValues>
165043            </field>
165044            <field>
165045              <name>PTSO4</name>
165046              <description>Port Set Output</description>
165047              <bitOffset>4</bitOffset>
165048              <bitWidth>1</bitWidth>
165049              <access>write-only</access>
165050              <enumeratedValues>
165051                <enumeratedValue>
165052                  <name>0</name>
165053                  <description>Corresponding bit in PDORn does not change.</description>
165054                  <value>#0</value>
165055                </enumeratedValue>
165056                <enumeratedValue>
165057                  <name>1</name>
165058                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165059                  <value>#1</value>
165060                </enumeratedValue>
165061              </enumeratedValues>
165062            </field>
165063            <field>
165064              <name>PTSO5</name>
165065              <description>Port Set Output</description>
165066              <bitOffset>5</bitOffset>
165067              <bitWidth>1</bitWidth>
165068              <access>write-only</access>
165069              <enumeratedValues>
165070                <enumeratedValue>
165071                  <name>0</name>
165072                  <description>Corresponding bit in PDORn does not change.</description>
165073                  <value>#0</value>
165074                </enumeratedValue>
165075                <enumeratedValue>
165076                  <name>1</name>
165077                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165078                  <value>#1</value>
165079                </enumeratedValue>
165080              </enumeratedValues>
165081            </field>
165082            <field>
165083              <name>PTSO6</name>
165084              <description>Port Set Output</description>
165085              <bitOffset>6</bitOffset>
165086              <bitWidth>1</bitWidth>
165087              <access>write-only</access>
165088              <enumeratedValues>
165089                <enumeratedValue>
165090                  <name>0</name>
165091                  <description>Corresponding bit in PDORn does not change.</description>
165092                  <value>#0</value>
165093                </enumeratedValue>
165094                <enumeratedValue>
165095                  <name>1</name>
165096                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165097                  <value>#1</value>
165098                </enumeratedValue>
165099              </enumeratedValues>
165100            </field>
165101            <field>
165102              <name>PTSO7</name>
165103              <description>Port Set Output</description>
165104              <bitOffset>7</bitOffset>
165105              <bitWidth>1</bitWidth>
165106              <access>write-only</access>
165107              <enumeratedValues>
165108                <enumeratedValue>
165109                  <name>0</name>
165110                  <description>Corresponding bit in PDORn does not change.</description>
165111                  <value>#0</value>
165112                </enumeratedValue>
165113                <enumeratedValue>
165114                  <name>1</name>
165115                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165116                  <value>#1</value>
165117                </enumeratedValue>
165118              </enumeratedValues>
165119            </field>
165120            <field>
165121              <name>PTSO8</name>
165122              <description>Port Set Output</description>
165123              <bitOffset>8</bitOffset>
165124              <bitWidth>1</bitWidth>
165125              <access>write-only</access>
165126              <enumeratedValues>
165127                <enumeratedValue>
165128                  <name>0</name>
165129                  <description>Corresponding bit in PDORn does not change.</description>
165130                  <value>#0</value>
165131                </enumeratedValue>
165132                <enumeratedValue>
165133                  <name>1</name>
165134                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165135                  <value>#1</value>
165136                </enumeratedValue>
165137              </enumeratedValues>
165138            </field>
165139            <field>
165140              <name>PTSO9</name>
165141              <description>Port Set Output</description>
165142              <bitOffset>9</bitOffset>
165143              <bitWidth>1</bitWidth>
165144              <access>write-only</access>
165145              <enumeratedValues>
165146                <enumeratedValue>
165147                  <name>0</name>
165148                  <description>Corresponding bit in PDORn does not change.</description>
165149                  <value>#0</value>
165150                </enumeratedValue>
165151                <enumeratedValue>
165152                  <name>1</name>
165153                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165154                  <value>#1</value>
165155                </enumeratedValue>
165156              </enumeratedValues>
165157            </field>
165158            <field>
165159              <name>PTSO10</name>
165160              <description>Port Set Output</description>
165161              <bitOffset>10</bitOffset>
165162              <bitWidth>1</bitWidth>
165163              <access>write-only</access>
165164              <enumeratedValues>
165165                <enumeratedValue>
165166                  <name>0</name>
165167                  <description>Corresponding bit in PDORn does not change.</description>
165168                  <value>#0</value>
165169                </enumeratedValue>
165170                <enumeratedValue>
165171                  <name>1</name>
165172                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165173                  <value>#1</value>
165174                </enumeratedValue>
165175              </enumeratedValues>
165176            </field>
165177            <field>
165178              <name>PTSO11</name>
165179              <description>Port Set Output</description>
165180              <bitOffset>11</bitOffset>
165181              <bitWidth>1</bitWidth>
165182              <access>write-only</access>
165183              <enumeratedValues>
165184                <enumeratedValue>
165185                  <name>0</name>
165186                  <description>Corresponding bit in PDORn does not change.</description>
165187                  <value>#0</value>
165188                </enumeratedValue>
165189                <enumeratedValue>
165190                  <name>1</name>
165191                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165192                  <value>#1</value>
165193                </enumeratedValue>
165194              </enumeratedValues>
165195            </field>
165196            <field>
165197              <name>PTSO12</name>
165198              <description>Port Set Output</description>
165199              <bitOffset>12</bitOffset>
165200              <bitWidth>1</bitWidth>
165201              <access>write-only</access>
165202              <enumeratedValues>
165203                <enumeratedValue>
165204                  <name>0</name>
165205                  <description>Corresponding bit in PDORn does not change.</description>
165206                  <value>#0</value>
165207                </enumeratedValue>
165208                <enumeratedValue>
165209                  <name>1</name>
165210                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165211                  <value>#1</value>
165212                </enumeratedValue>
165213              </enumeratedValues>
165214            </field>
165215            <field>
165216              <name>PTSO13</name>
165217              <description>Port Set Output</description>
165218              <bitOffset>13</bitOffset>
165219              <bitWidth>1</bitWidth>
165220              <access>write-only</access>
165221              <enumeratedValues>
165222                <enumeratedValue>
165223                  <name>0</name>
165224                  <description>Corresponding bit in PDORn does not change.</description>
165225                  <value>#0</value>
165226                </enumeratedValue>
165227                <enumeratedValue>
165228                  <name>1</name>
165229                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165230                  <value>#1</value>
165231                </enumeratedValue>
165232              </enumeratedValues>
165233            </field>
165234            <field>
165235              <name>PTSO14</name>
165236              <description>Port Set Output</description>
165237              <bitOffset>14</bitOffset>
165238              <bitWidth>1</bitWidth>
165239              <access>write-only</access>
165240              <enumeratedValues>
165241                <enumeratedValue>
165242                  <name>0</name>
165243                  <description>Corresponding bit in PDORn does not change.</description>
165244                  <value>#0</value>
165245                </enumeratedValue>
165246                <enumeratedValue>
165247                  <name>1</name>
165248                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165249                  <value>#1</value>
165250                </enumeratedValue>
165251              </enumeratedValues>
165252            </field>
165253            <field>
165254              <name>PTSO15</name>
165255              <description>Port Set Output</description>
165256              <bitOffset>15</bitOffset>
165257              <bitWidth>1</bitWidth>
165258              <access>write-only</access>
165259              <enumeratedValues>
165260                <enumeratedValue>
165261                  <name>0</name>
165262                  <description>Corresponding bit in PDORn does not change.</description>
165263                  <value>#0</value>
165264                </enumeratedValue>
165265                <enumeratedValue>
165266                  <name>1</name>
165267                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165268                  <value>#1</value>
165269                </enumeratedValue>
165270              </enumeratedValues>
165271            </field>
165272            <field>
165273              <name>PTSO16</name>
165274              <description>Port Set Output</description>
165275              <bitOffset>16</bitOffset>
165276              <bitWidth>1</bitWidth>
165277              <access>write-only</access>
165278              <enumeratedValues>
165279                <enumeratedValue>
165280                  <name>0</name>
165281                  <description>Corresponding bit in PDORn does not change.</description>
165282                  <value>#0</value>
165283                </enumeratedValue>
165284                <enumeratedValue>
165285                  <name>1</name>
165286                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165287                  <value>#1</value>
165288                </enumeratedValue>
165289              </enumeratedValues>
165290            </field>
165291            <field>
165292              <name>PTSO17</name>
165293              <description>Port Set Output</description>
165294              <bitOffset>17</bitOffset>
165295              <bitWidth>1</bitWidth>
165296              <access>write-only</access>
165297              <enumeratedValues>
165298                <enumeratedValue>
165299                  <name>0</name>
165300                  <description>Corresponding bit in PDORn does not change.</description>
165301                  <value>#0</value>
165302                </enumeratedValue>
165303                <enumeratedValue>
165304                  <name>1</name>
165305                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165306                  <value>#1</value>
165307                </enumeratedValue>
165308              </enumeratedValues>
165309            </field>
165310            <field>
165311              <name>PTSO18</name>
165312              <description>Port Set Output</description>
165313              <bitOffset>18</bitOffset>
165314              <bitWidth>1</bitWidth>
165315              <access>write-only</access>
165316              <enumeratedValues>
165317                <enumeratedValue>
165318                  <name>0</name>
165319                  <description>Corresponding bit in PDORn does not change.</description>
165320                  <value>#0</value>
165321                </enumeratedValue>
165322                <enumeratedValue>
165323                  <name>1</name>
165324                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165325                  <value>#1</value>
165326                </enumeratedValue>
165327              </enumeratedValues>
165328            </field>
165329            <field>
165330              <name>PTSO19</name>
165331              <description>Port Set Output</description>
165332              <bitOffset>19</bitOffset>
165333              <bitWidth>1</bitWidth>
165334              <access>write-only</access>
165335              <enumeratedValues>
165336                <enumeratedValue>
165337                  <name>0</name>
165338                  <description>Corresponding bit in PDORn does not change.</description>
165339                  <value>#0</value>
165340                </enumeratedValue>
165341                <enumeratedValue>
165342                  <name>1</name>
165343                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165344                  <value>#1</value>
165345                </enumeratedValue>
165346              </enumeratedValues>
165347            </field>
165348            <field>
165349              <name>PTSO20</name>
165350              <description>Port Set Output</description>
165351              <bitOffset>20</bitOffset>
165352              <bitWidth>1</bitWidth>
165353              <access>write-only</access>
165354              <enumeratedValues>
165355                <enumeratedValue>
165356                  <name>0</name>
165357                  <description>Corresponding bit in PDORn does not change.</description>
165358                  <value>#0</value>
165359                </enumeratedValue>
165360                <enumeratedValue>
165361                  <name>1</name>
165362                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165363                  <value>#1</value>
165364                </enumeratedValue>
165365              </enumeratedValues>
165366            </field>
165367            <field>
165368              <name>PTSO21</name>
165369              <description>Port Set Output</description>
165370              <bitOffset>21</bitOffset>
165371              <bitWidth>1</bitWidth>
165372              <access>write-only</access>
165373              <enumeratedValues>
165374                <enumeratedValue>
165375                  <name>0</name>
165376                  <description>Corresponding bit in PDORn does not change.</description>
165377                  <value>#0</value>
165378                </enumeratedValue>
165379                <enumeratedValue>
165380                  <name>1</name>
165381                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165382                  <value>#1</value>
165383                </enumeratedValue>
165384              </enumeratedValues>
165385            </field>
165386            <field>
165387              <name>PTSO22</name>
165388              <description>Port Set Output</description>
165389              <bitOffset>22</bitOffset>
165390              <bitWidth>1</bitWidth>
165391              <access>write-only</access>
165392              <enumeratedValues>
165393                <enumeratedValue>
165394                  <name>0</name>
165395                  <description>Corresponding bit in PDORn does not change.</description>
165396                  <value>#0</value>
165397                </enumeratedValue>
165398                <enumeratedValue>
165399                  <name>1</name>
165400                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165401                  <value>#1</value>
165402                </enumeratedValue>
165403              </enumeratedValues>
165404            </field>
165405            <field>
165406              <name>PTSO23</name>
165407              <description>Port Set Output</description>
165408              <bitOffset>23</bitOffset>
165409              <bitWidth>1</bitWidth>
165410              <access>write-only</access>
165411              <enumeratedValues>
165412                <enumeratedValue>
165413                  <name>0</name>
165414                  <description>Corresponding bit in PDORn does not change.</description>
165415                  <value>#0</value>
165416                </enumeratedValue>
165417                <enumeratedValue>
165418                  <name>1</name>
165419                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165420                  <value>#1</value>
165421                </enumeratedValue>
165422              </enumeratedValues>
165423            </field>
165424            <field>
165425              <name>PTSO24</name>
165426              <description>Port Set Output</description>
165427              <bitOffset>24</bitOffset>
165428              <bitWidth>1</bitWidth>
165429              <access>write-only</access>
165430              <enumeratedValues>
165431                <enumeratedValue>
165432                  <name>0</name>
165433                  <description>Corresponding bit in PDORn does not change.</description>
165434                  <value>#0</value>
165435                </enumeratedValue>
165436                <enumeratedValue>
165437                  <name>1</name>
165438                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165439                  <value>#1</value>
165440                </enumeratedValue>
165441              </enumeratedValues>
165442            </field>
165443            <field>
165444              <name>PTSO25</name>
165445              <description>Port Set Output</description>
165446              <bitOffset>25</bitOffset>
165447              <bitWidth>1</bitWidth>
165448              <access>write-only</access>
165449              <enumeratedValues>
165450                <enumeratedValue>
165451                  <name>0</name>
165452                  <description>Corresponding bit in PDORn does not change.</description>
165453                  <value>#0</value>
165454                </enumeratedValue>
165455                <enumeratedValue>
165456                  <name>1</name>
165457                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165458                  <value>#1</value>
165459                </enumeratedValue>
165460              </enumeratedValues>
165461            </field>
165462            <field>
165463              <name>PTSO26</name>
165464              <description>Port Set Output</description>
165465              <bitOffset>26</bitOffset>
165466              <bitWidth>1</bitWidth>
165467              <access>write-only</access>
165468              <enumeratedValues>
165469                <enumeratedValue>
165470                  <name>0</name>
165471                  <description>Corresponding bit in PDORn does not change.</description>
165472                  <value>#0</value>
165473                </enumeratedValue>
165474                <enumeratedValue>
165475                  <name>1</name>
165476                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165477                  <value>#1</value>
165478                </enumeratedValue>
165479              </enumeratedValues>
165480            </field>
165481            <field>
165482              <name>PTSO27</name>
165483              <description>Port Set Output</description>
165484              <bitOffset>27</bitOffset>
165485              <bitWidth>1</bitWidth>
165486              <access>write-only</access>
165487              <enumeratedValues>
165488                <enumeratedValue>
165489                  <name>0</name>
165490                  <description>Corresponding bit in PDORn does not change.</description>
165491                  <value>#0</value>
165492                </enumeratedValue>
165493                <enumeratedValue>
165494                  <name>1</name>
165495                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165496                  <value>#1</value>
165497                </enumeratedValue>
165498              </enumeratedValues>
165499            </field>
165500            <field>
165501              <name>PTSO28</name>
165502              <description>Port Set Output</description>
165503              <bitOffset>28</bitOffset>
165504              <bitWidth>1</bitWidth>
165505              <access>write-only</access>
165506              <enumeratedValues>
165507                <enumeratedValue>
165508                  <name>0</name>
165509                  <description>Corresponding bit in PDORn does not change.</description>
165510                  <value>#0</value>
165511                </enumeratedValue>
165512                <enumeratedValue>
165513                  <name>1</name>
165514                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165515                  <value>#1</value>
165516                </enumeratedValue>
165517              </enumeratedValues>
165518            </field>
165519            <field>
165520              <name>PTSO29</name>
165521              <description>Port Set Output</description>
165522              <bitOffset>29</bitOffset>
165523              <bitWidth>1</bitWidth>
165524              <access>write-only</access>
165525              <enumeratedValues>
165526                <enumeratedValue>
165527                  <name>0</name>
165528                  <description>Corresponding bit in PDORn does not change.</description>
165529                  <value>#0</value>
165530                </enumeratedValue>
165531                <enumeratedValue>
165532                  <name>1</name>
165533                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165534                  <value>#1</value>
165535                </enumeratedValue>
165536              </enumeratedValues>
165537            </field>
165538            <field>
165539              <name>PTSO30</name>
165540              <description>Port Set Output</description>
165541              <bitOffset>30</bitOffset>
165542              <bitWidth>1</bitWidth>
165543              <access>write-only</access>
165544              <enumeratedValues>
165545                <enumeratedValue>
165546                  <name>0</name>
165547                  <description>Corresponding bit in PDORn does not change.</description>
165548                  <value>#0</value>
165549                </enumeratedValue>
165550                <enumeratedValue>
165551                  <name>1</name>
165552                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165553                  <value>#1</value>
165554                </enumeratedValue>
165555              </enumeratedValues>
165556            </field>
165557            <field>
165558              <name>PTSO31</name>
165559              <description>Port Set Output</description>
165560              <bitOffset>31</bitOffset>
165561              <bitWidth>1</bitWidth>
165562              <access>write-only</access>
165563              <enumeratedValues>
165564                <enumeratedValue>
165565                  <name>0</name>
165566                  <description>Corresponding bit in PDORn does not change.</description>
165567                  <value>#0</value>
165568                </enumeratedValue>
165569                <enumeratedValue>
165570                  <name>1</name>
165571                  <description>Corresponding bit in PDORn is set to logic 1.</description>
165572                  <value>#1</value>
165573                </enumeratedValue>
165574              </enumeratedValues>
165575            </field>
165576          </fields>
165577        </register>
165578        <register>
165579          <name>PCOR</name>
165580          <description>Port Clear Output Register</description>
165581          <addressOffset>0x8</addressOffset>
165582          <size>32</size>
165583          <access>write-only</access>
165584          <resetValue>0</resetValue>
165585          <resetMask>0xFFFFFFFF</resetMask>
165586          <fields>
165587            <field>
165588              <name>PTCO0</name>
165589              <description>Port Clear Output</description>
165590              <bitOffset>0</bitOffset>
165591              <bitWidth>1</bitWidth>
165592              <access>write-only</access>
165593              <enumeratedValues>
165594                <enumeratedValue>
165595                  <name>0</name>
165596                  <description>Corresponding bit in PDORn does not change.</description>
165597                  <value>#0</value>
165598                </enumeratedValue>
165599                <enumeratedValue>
165600                  <name>1</name>
165601                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165602                  <value>#1</value>
165603                </enumeratedValue>
165604              </enumeratedValues>
165605            </field>
165606            <field>
165607              <name>PTCO1</name>
165608              <description>Port Clear Output</description>
165609              <bitOffset>1</bitOffset>
165610              <bitWidth>1</bitWidth>
165611              <access>write-only</access>
165612              <enumeratedValues>
165613                <enumeratedValue>
165614                  <name>0</name>
165615                  <description>Corresponding bit in PDORn does not change.</description>
165616                  <value>#0</value>
165617                </enumeratedValue>
165618                <enumeratedValue>
165619                  <name>1</name>
165620                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165621                  <value>#1</value>
165622                </enumeratedValue>
165623              </enumeratedValues>
165624            </field>
165625            <field>
165626              <name>PTCO2</name>
165627              <description>Port Clear Output</description>
165628              <bitOffset>2</bitOffset>
165629              <bitWidth>1</bitWidth>
165630              <access>write-only</access>
165631              <enumeratedValues>
165632                <enumeratedValue>
165633                  <name>0</name>
165634                  <description>Corresponding bit in PDORn does not change.</description>
165635                  <value>#0</value>
165636                </enumeratedValue>
165637                <enumeratedValue>
165638                  <name>1</name>
165639                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165640                  <value>#1</value>
165641                </enumeratedValue>
165642              </enumeratedValues>
165643            </field>
165644            <field>
165645              <name>PTCO3</name>
165646              <description>Port Clear Output</description>
165647              <bitOffset>3</bitOffset>
165648              <bitWidth>1</bitWidth>
165649              <access>write-only</access>
165650              <enumeratedValues>
165651                <enumeratedValue>
165652                  <name>0</name>
165653                  <description>Corresponding bit in PDORn does not change.</description>
165654                  <value>#0</value>
165655                </enumeratedValue>
165656                <enumeratedValue>
165657                  <name>1</name>
165658                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165659                  <value>#1</value>
165660                </enumeratedValue>
165661              </enumeratedValues>
165662            </field>
165663            <field>
165664              <name>PTCO4</name>
165665              <description>Port Clear Output</description>
165666              <bitOffset>4</bitOffset>
165667              <bitWidth>1</bitWidth>
165668              <access>write-only</access>
165669              <enumeratedValues>
165670                <enumeratedValue>
165671                  <name>0</name>
165672                  <description>Corresponding bit in PDORn does not change.</description>
165673                  <value>#0</value>
165674                </enumeratedValue>
165675                <enumeratedValue>
165676                  <name>1</name>
165677                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165678                  <value>#1</value>
165679                </enumeratedValue>
165680              </enumeratedValues>
165681            </field>
165682            <field>
165683              <name>PTCO5</name>
165684              <description>Port Clear Output</description>
165685              <bitOffset>5</bitOffset>
165686              <bitWidth>1</bitWidth>
165687              <access>write-only</access>
165688              <enumeratedValues>
165689                <enumeratedValue>
165690                  <name>0</name>
165691                  <description>Corresponding bit in PDORn does not change.</description>
165692                  <value>#0</value>
165693                </enumeratedValue>
165694                <enumeratedValue>
165695                  <name>1</name>
165696                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165697                  <value>#1</value>
165698                </enumeratedValue>
165699              </enumeratedValues>
165700            </field>
165701            <field>
165702              <name>PTCO6</name>
165703              <description>Port Clear Output</description>
165704              <bitOffset>6</bitOffset>
165705              <bitWidth>1</bitWidth>
165706              <access>write-only</access>
165707              <enumeratedValues>
165708                <enumeratedValue>
165709                  <name>0</name>
165710                  <description>Corresponding bit in PDORn does not change.</description>
165711                  <value>#0</value>
165712                </enumeratedValue>
165713                <enumeratedValue>
165714                  <name>1</name>
165715                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165716                  <value>#1</value>
165717                </enumeratedValue>
165718              </enumeratedValues>
165719            </field>
165720            <field>
165721              <name>PTCO7</name>
165722              <description>Port Clear Output</description>
165723              <bitOffset>7</bitOffset>
165724              <bitWidth>1</bitWidth>
165725              <access>write-only</access>
165726              <enumeratedValues>
165727                <enumeratedValue>
165728                  <name>0</name>
165729                  <description>Corresponding bit in PDORn does not change.</description>
165730                  <value>#0</value>
165731                </enumeratedValue>
165732                <enumeratedValue>
165733                  <name>1</name>
165734                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165735                  <value>#1</value>
165736                </enumeratedValue>
165737              </enumeratedValues>
165738            </field>
165739            <field>
165740              <name>PTCO8</name>
165741              <description>Port Clear Output</description>
165742              <bitOffset>8</bitOffset>
165743              <bitWidth>1</bitWidth>
165744              <access>write-only</access>
165745              <enumeratedValues>
165746                <enumeratedValue>
165747                  <name>0</name>
165748                  <description>Corresponding bit in PDORn does not change.</description>
165749                  <value>#0</value>
165750                </enumeratedValue>
165751                <enumeratedValue>
165752                  <name>1</name>
165753                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165754                  <value>#1</value>
165755                </enumeratedValue>
165756              </enumeratedValues>
165757            </field>
165758            <field>
165759              <name>PTCO9</name>
165760              <description>Port Clear Output</description>
165761              <bitOffset>9</bitOffset>
165762              <bitWidth>1</bitWidth>
165763              <access>write-only</access>
165764              <enumeratedValues>
165765                <enumeratedValue>
165766                  <name>0</name>
165767                  <description>Corresponding bit in PDORn does not change.</description>
165768                  <value>#0</value>
165769                </enumeratedValue>
165770                <enumeratedValue>
165771                  <name>1</name>
165772                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165773                  <value>#1</value>
165774                </enumeratedValue>
165775              </enumeratedValues>
165776            </field>
165777            <field>
165778              <name>PTCO10</name>
165779              <description>Port Clear Output</description>
165780              <bitOffset>10</bitOffset>
165781              <bitWidth>1</bitWidth>
165782              <access>write-only</access>
165783              <enumeratedValues>
165784                <enumeratedValue>
165785                  <name>0</name>
165786                  <description>Corresponding bit in PDORn does not change.</description>
165787                  <value>#0</value>
165788                </enumeratedValue>
165789                <enumeratedValue>
165790                  <name>1</name>
165791                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165792                  <value>#1</value>
165793                </enumeratedValue>
165794              </enumeratedValues>
165795            </field>
165796            <field>
165797              <name>PTCO11</name>
165798              <description>Port Clear Output</description>
165799              <bitOffset>11</bitOffset>
165800              <bitWidth>1</bitWidth>
165801              <access>write-only</access>
165802              <enumeratedValues>
165803                <enumeratedValue>
165804                  <name>0</name>
165805                  <description>Corresponding bit in PDORn does not change.</description>
165806                  <value>#0</value>
165807                </enumeratedValue>
165808                <enumeratedValue>
165809                  <name>1</name>
165810                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165811                  <value>#1</value>
165812                </enumeratedValue>
165813              </enumeratedValues>
165814            </field>
165815            <field>
165816              <name>PTCO12</name>
165817              <description>Port Clear Output</description>
165818              <bitOffset>12</bitOffset>
165819              <bitWidth>1</bitWidth>
165820              <access>write-only</access>
165821              <enumeratedValues>
165822                <enumeratedValue>
165823                  <name>0</name>
165824                  <description>Corresponding bit in PDORn does not change.</description>
165825                  <value>#0</value>
165826                </enumeratedValue>
165827                <enumeratedValue>
165828                  <name>1</name>
165829                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165830                  <value>#1</value>
165831                </enumeratedValue>
165832              </enumeratedValues>
165833            </field>
165834            <field>
165835              <name>PTCO13</name>
165836              <description>Port Clear Output</description>
165837              <bitOffset>13</bitOffset>
165838              <bitWidth>1</bitWidth>
165839              <access>write-only</access>
165840              <enumeratedValues>
165841                <enumeratedValue>
165842                  <name>0</name>
165843                  <description>Corresponding bit in PDORn does not change.</description>
165844                  <value>#0</value>
165845                </enumeratedValue>
165846                <enumeratedValue>
165847                  <name>1</name>
165848                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165849                  <value>#1</value>
165850                </enumeratedValue>
165851              </enumeratedValues>
165852            </field>
165853            <field>
165854              <name>PTCO14</name>
165855              <description>Port Clear Output</description>
165856              <bitOffset>14</bitOffset>
165857              <bitWidth>1</bitWidth>
165858              <access>write-only</access>
165859              <enumeratedValues>
165860                <enumeratedValue>
165861                  <name>0</name>
165862                  <description>Corresponding bit in PDORn does not change.</description>
165863                  <value>#0</value>
165864                </enumeratedValue>
165865                <enumeratedValue>
165866                  <name>1</name>
165867                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165868                  <value>#1</value>
165869                </enumeratedValue>
165870              </enumeratedValues>
165871            </field>
165872            <field>
165873              <name>PTCO15</name>
165874              <description>Port Clear Output</description>
165875              <bitOffset>15</bitOffset>
165876              <bitWidth>1</bitWidth>
165877              <access>write-only</access>
165878              <enumeratedValues>
165879                <enumeratedValue>
165880                  <name>0</name>
165881                  <description>Corresponding bit in PDORn does not change.</description>
165882                  <value>#0</value>
165883                </enumeratedValue>
165884                <enumeratedValue>
165885                  <name>1</name>
165886                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165887                  <value>#1</value>
165888                </enumeratedValue>
165889              </enumeratedValues>
165890            </field>
165891            <field>
165892              <name>PTCO16</name>
165893              <description>Port Clear Output</description>
165894              <bitOffset>16</bitOffset>
165895              <bitWidth>1</bitWidth>
165896              <access>write-only</access>
165897              <enumeratedValues>
165898                <enumeratedValue>
165899                  <name>0</name>
165900                  <description>Corresponding bit in PDORn does not change.</description>
165901                  <value>#0</value>
165902                </enumeratedValue>
165903                <enumeratedValue>
165904                  <name>1</name>
165905                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165906                  <value>#1</value>
165907                </enumeratedValue>
165908              </enumeratedValues>
165909            </field>
165910            <field>
165911              <name>PTCO17</name>
165912              <description>Port Clear Output</description>
165913              <bitOffset>17</bitOffset>
165914              <bitWidth>1</bitWidth>
165915              <access>write-only</access>
165916              <enumeratedValues>
165917                <enumeratedValue>
165918                  <name>0</name>
165919                  <description>Corresponding bit in PDORn does not change.</description>
165920                  <value>#0</value>
165921                </enumeratedValue>
165922                <enumeratedValue>
165923                  <name>1</name>
165924                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165925                  <value>#1</value>
165926                </enumeratedValue>
165927              </enumeratedValues>
165928            </field>
165929            <field>
165930              <name>PTCO18</name>
165931              <description>Port Clear Output</description>
165932              <bitOffset>18</bitOffset>
165933              <bitWidth>1</bitWidth>
165934              <access>write-only</access>
165935              <enumeratedValues>
165936                <enumeratedValue>
165937                  <name>0</name>
165938                  <description>Corresponding bit in PDORn does not change.</description>
165939                  <value>#0</value>
165940                </enumeratedValue>
165941                <enumeratedValue>
165942                  <name>1</name>
165943                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165944                  <value>#1</value>
165945                </enumeratedValue>
165946              </enumeratedValues>
165947            </field>
165948            <field>
165949              <name>PTCO19</name>
165950              <description>Port Clear Output</description>
165951              <bitOffset>19</bitOffset>
165952              <bitWidth>1</bitWidth>
165953              <access>write-only</access>
165954              <enumeratedValues>
165955                <enumeratedValue>
165956                  <name>0</name>
165957                  <description>Corresponding bit in PDORn does not change.</description>
165958                  <value>#0</value>
165959                </enumeratedValue>
165960                <enumeratedValue>
165961                  <name>1</name>
165962                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165963                  <value>#1</value>
165964                </enumeratedValue>
165965              </enumeratedValues>
165966            </field>
165967            <field>
165968              <name>PTCO20</name>
165969              <description>Port Clear Output</description>
165970              <bitOffset>20</bitOffset>
165971              <bitWidth>1</bitWidth>
165972              <access>write-only</access>
165973              <enumeratedValues>
165974                <enumeratedValue>
165975                  <name>0</name>
165976                  <description>Corresponding bit in PDORn does not change.</description>
165977                  <value>#0</value>
165978                </enumeratedValue>
165979                <enumeratedValue>
165980                  <name>1</name>
165981                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
165982                  <value>#1</value>
165983                </enumeratedValue>
165984              </enumeratedValues>
165985            </field>
165986            <field>
165987              <name>PTCO21</name>
165988              <description>Port Clear Output</description>
165989              <bitOffset>21</bitOffset>
165990              <bitWidth>1</bitWidth>
165991              <access>write-only</access>
165992              <enumeratedValues>
165993                <enumeratedValue>
165994                  <name>0</name>
165995                  <description>Corresponding bit in PDORn does not change.</description>
165996                  <value>#0</value>
165997                </enumeratedValue>
165998                <enumeratedValue>
165999                  <name>1</name>
166000                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
166001                  <value>#1</value>
166002                </enumeratedValue>
166003              </enumeratedValues>
166004            </field>
166005            <field>
166006              <name>PTCO22</name>
166007              <description>Port Clear Output</description>
166008              <bitOffset>22</bitOffset>
166009              <bitWidth>1</bitWidth>
166010              <access>write-only</access>
166011              <enumeratedValues>
166012                <enumeratedValue>
166013                  <name>0</name>
166014                  <description>Corresponding bit in PDORn does not change.</description>
166015                  <value>#0</value>
166016                </enumeratedValue>
166017                <enumeratedValue>
166018                  <name>1</name>
166019                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
166020                  <value>#1</value>
166021                </enumeratedValue>
166022              </enumeratedValues>
166023            </field>
166024            <field>
166025              <name>PTCO23</name>
166026              <description>Port Clear Output</description>
166027              <bitOffset>23</bitOffset>
166028              <bitWidth>1</bitWidth>
166029              <access>write-only</access>
166030              <enumeratedValues>
166031                <enumeratedValue>
166032                  <name>0</name>
166033                  <description>Corresponding bit in PDORn does not change.</description>
166034                  <value>#0</value>
166035                </enumeratedValue>
166036                <enumeratedValue>
166037                  <name>1</name>
166038                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
166039                  <value>#1</value>
166040                </enumeratedValue>
166041              </enumeratedValues>
166042            </field>
166043            <field>
166044              <name>PTCO24</name>
166045              <description>Port Clear Output</description>
166046              <bitOffset>24</bitOffset>
166047              <bitWidth>1</bitWidth>
166048              <access>write-only</access>
166049              <enumeratedValues>
166050                <enumeratedValue>
166051                  <name>0</name>
166052                  <description>Corresponding bit in PDORn does not change.</description>
166053                  <value>#0</value>
166054                </enumeratedValue>
166055                <enumeratedValue>
166056                  <name>1</name>
166057                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
166058                  <value>#1</value>
166059                </enumeratedValue>
166060              </enumeratedValues>
166061            </field>
166062            <field>
166063              <name>PTCO25</name>
166064              <description>Port Clear Output</description>
166065              <bitOffset>25</bitOffset>
166066              <bitWidth>1</bitWidth>
166067              <access>write-only</access>
166068              <enumeratedValues>
166069                <enumeratedValue>
166070                  <name>0</name>
166071                  <description>Corresponding bit in PDORn does not change.</description>
166072                  <value>#0</value>
166073                </enumeratedValue>
166074                <enumeratedValue>
166075                  <name>1</name>
166076                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
166077                  <value>#1</value>
166078                </enumeratedValue>
166079              </enumeratedValues>
166080            </field>
166081            <field>
166082              <name>PTCO26</name>
166083              <description>Port Clear Output</description>
166084              <bitOffset>26</bitOffset>
166085              <bitWidth>1</bitWidth>
166086              <access>write-only</access>
166087              <enumeratedValues>
166088                <enumeratedValue>
166089                  <name>0</name>
166090                  <description>Corresponding bit in PDORn does not change.</description>
166091                  <value>#0</value>
166092                </enumeratedValue>
166093                <enumeratedValue>
166094                  <name>1</name>
166095                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
166096                  <value>#1</value>
166097                </enumeratedValue>
166098              </enumeratedValues>
166099            </field>
166100            <field>
166101              <name>PTCO27</name>
166102              <description>Port Clear Output</description>
166103              <bitOffset>27</bitOffset>
166104              <bitWidth>1</bitWidth>
166105              <access>write-only</access>
166106              <enumeratedValues>
166107                <enumeratedValue>
166108                  <name>0</name>
166109                  <description>Corresponding bit in PDORn does not change.</description>
166110                  <value>#0</value>
166111                </enumeratedValue>
166112                <enumeratedValue>
166113                  <name>1</name>
166114                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
166115                  <value>#1</value>
166116                </enumeratedValue>
166117              </enumeratedValues>
166118            </field>
166119            <field>
166120              <name>PTCO28</name>
166121              <description>Port Clear Output</description>
166122              <bitOffset>28</bitOffset>
166123              <bitWidth>1</bitWidth>
166124              <access>write-only</access>
166125              <enumeratedValues>
166126                <enumeratedValue>
166127                  <name>0</name>
166128                  <description>Corresponding bit in PDORn does not change.</description>
166129                  <value>#0</value>
166130                </enumeratedValue>
166131                <enumeratedValue>
166132                  <name>1</name>
166133                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
166134                  <value>#1</value>
166135                </enumeratedValue>
166136              </enumeratedValues>
166137            </field>
166138            <field>
166139              <name>PTCO29</name>
166140              <description>Port Clear Output</description>
166141              <bitOffset>29</bitOffset>
166142              <bitWidth>1</bitWidth>
166143              <access>write-only</access>
166144              <enumeratedValues>
166145                <enumeratedValue>
166146                  <name>0</name>
166147                  <description>Corresponding bit in PDORn does not change.</description>
166148                  <value>#0</value>
166149                </enumeratedValue>
166150                <enumeratedValue>
166151                  <name>1</name>
166152                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
166153                  <value>#1</value>
166154                </enumeratedValue>
166155              </enumeratedValues>
166156            </field>
166157            <field>
166158              <name>PTCO30</name>
166159              <description>Port Clear Output</description>
166160              <bitOffset>30</bitOffset>
166161              <bitWidth>1</bitWidth>
166162              <access>write-only</access>
166163              <enumeratedValues>
166164                <enumeratedValue>
166165                  <name>0</name>
166166                  <description>Corresponding bit in PDORn does not change.</description>
166167                  <value>#0</value>
166168                </enumeratedValue>
166169                <enumeratedValue>
166170                  <name>1</name>
166171                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
166172                  <value>#1</value>
166173                </enumeratedValue>
166174              </enumeratedValues>
166175            </field>
166176            <field>
166177              <name>PTCO31</name>
166178              <description>Port Clear Output</description>
166179              <bitOffset>31</bitOffset>
166180              <bitWidth>1</bitWidth>
166181              <access>write-only</access>
166182              <enumeratedValues>
166183                <enumeratedValue>
166184                  <name>0</name>
166185                  <description>Corresponding bit in PDORn does not change.</description>
166186                  <value>#0</value>
166187                </enumeratedValue>
166188                <enumeratedValue>
166189                  <name>1</name>
166190                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
166191                  <value>#1</value>
166192                </enumeratedValue>
166193              </enumeratedValues>
166194            </field>
166195          </fields>
166196        </register>
166197        <register>
166198          <name>PTOR</name>
166199          <description>Port Toggle Output Register</description>
166200          <addressOffset>0xC</addressOffset>
166201          <size>32</size>
166202          <access>write-only</access>
166203          <resetValue>0</resetValue>
166204          <resetMask>0xFFFFFFFF</resetMask>
166205          <fields>
166206            <field>
166207              <name>PTTO0</name>
166208              <description>Port Toggle Output</description>
166209              <bitOffset>0</bitOffset>
166210              <bitWidth>1</bitWidth>
166211              <access>write-only</access>
166212              <enumeratedValues>
166213                <enumeratedValue>
166214                  <name>0</name>
166215                  <description>Corresponding bit in PDORn does not change.</description>
166216                  <value>#0</value>
166217                </enumeratedValue>
166218                <enumeratedValue>
166219                  <name>1</name>
166220                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166221                  <value>#1</value>
166222                </enumeratedValue>
166223              </enumeratedValues>
166224            </field>
166225            <field>
166226              <name>PTTO1</name>
166227              <description>Port Toggle Output</description>
166228              <bitOffset>1</bitOffset>
166229              <bitWidth>1</bitWidth>
166230              <access>write-only</access>
166231              <enumeratedValues>
166232                <enumeratedValue>
166233                  <name>0</name>
166234                  <description>Corresponding bit in PDORn does not change.</description>
166235                  <value>#0</value>
166236                </enumeratedValue>
166237                <enumeratedValue>
166238                  <name>1</name>
166239                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166240                  <value>#1</value>
166241                </enumeratedValue>
166242              </enumeratedValues>
166243            </field>
166244            <field>
166245              <name>PTTO2</name>
166246              <description>Port Toggle Output</description>
166247              <bitOffset>2</bitOffset>
166248              <bitWidth>1</bitWidth>
166249              <access>write-only</access>
166250              <enumeratedValues>
166251                <enumeratedValue>
166252                  <name>0</name>
166253                  <description>Corresponding bit in PDORn does not change.</description>
166254                  <value>#0</value>
166255                </enumeratedValue>
166256                <enumeratedValue>
166257                  <name>1</name>
166258                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166259                  <value>#1</value>
166260                </enumeratedValue>
166261              </enumeratedValues>
166262            </field>
166263            <field>
166264              <name>PTTO3</name>
166265              <description>Port Toggle Output</description>
166266              <bitOffset>3</bitOffset>
166267              <bitWidth>1</bitWidth>
166268              <access>write-only</access>
166269              <enumeratedValues>
166270                <enumeratedValue>
166271                  <name>0</name>
166272                  <description>Corresponding bit in PDORn does not change.</description>
166273                  <value>#0</value>
166274                </enumeratedValue>
166275                <enumeratedValue>
166276                  <name>1</name>
166277                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166278                  <value>#1</value>
166279                </enumeratedValue>
166280              </enumeratedValues>
166281            </field>
166282            <field>
166283              <name>PTTO4</name>
166284              <description>Port Toggle Output</description>
166285              <bitOffset>4</bitOffset>
166286              <bitWidth>1</bitWidth>
166287              <access>write-only</access>
166288              <enumeratedValues>
166289                <enumeratedValue>
166290                  <name>0</name>
166291                  <description>Corresponding bit in PDORn does not change.</description>
166292                  <value>#0</value>
166293                </enumeratedValue>
166294                <enumeratedValue>
166295                  <name>1</name>
166296                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166297                  <value>#1</value>
166298                </enumeratedValue>
166299              </enumeratedValues>
166300            </field>
166301            <field>
166302              <name>PTTO5</name>
166303              <description>Port Toggle Output</description>
166304              <bitOffset>5</bitOffset>
166305              <bitWidth>1</bitWidth>
166306              <access>write-only</access>
166307              <enumeratedValues>
166308                <enumeratedValue>
166309                  <name>0</name>
166310                  <description>Corresponding bit in PDORn does not change.</description>
166311                  <value>#0</value>
166312                </enumeratedValue>
166313                <enumeratedValue>
166314                  <name>1</name>
166315                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166316                  <value>#1</value>
166317                </enumeratedValue>
166318              </enumeratedValues>
166319            </field>
166320            <field>
166321              <name>PTTO6</name>
166322              <description>Port Toggle Output</description>
166323              <bitOffset>6</bitOffset>
166324              <bitWidth>1</bitWidth>
166325              <access>write-only</access>
166326              <enumeratedValues>
166327                <enumeratedValue>
166328                  <name>0</name>
166329                  <description>Corresponding bit in PDORn does not change.</description>
166330                  <value>#0</value>
166331                </enumeratedValue>
166332                <enumeratedValue>
166333                  <name>1</name>
166334                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166335                  <value>#1</value>
166336                </enumeratedValue>
166337              </enumeratedValues>
166338            </field>
166339            <field>
166340              <name>PTTO7</name>
166341              <description>Port Toggle Output</description>
166342              <bitOffset>7</bitOffset>
166343              <bitWidth>1</bitWidth>
166344              <access>write-only</access>
166345              <enumeratedValues>
166346                <enumeratedValue>
166347                  <name>0</name>
166348                  <description>Corresponding bit in PDORn does not change.</description>
166349                  <value>#0</value>
166350                </enumeratedValue>
166351                <enumeratedValue>
166352                  <name>1</name>
166353                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166354                  <value>#1</value>
166355                </enumeratedValue>
166356              </enumeratedValues>
166357            </field>
166358            <field>
166359              <name>PTTO8</name>
166360              <description>Port Toggle Output</description>
166361              <bitOffset>8</bitOffset>
166362              <bitWidth>1</bitWidth>
166363              <access>write-only</access>
166364              <enumeratedValues>
166365                <enumeratedValue>
166366                  <name>0</name>
166367                  <description>Corresponding bit in PDORn does not change.</description>
166368                  <value>#0</value>
166369                </enumeratedValue>
166370                <enumeratedValue>
166371                  <name>1</name>
166372                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166373                  <value>#1</value>
166374                </enumeratedValue>
166375              </enumeratedValues>
166376            </field>
166377            <field>
166378              <name>PTTO9</name>
166379              <description>Port Toggle Output</description>
166380              <bitOffset>9</bitOffset>
166381              <bitWidth>1</bitWidth>
166382              <access>write-only</access>
166383              <enumeratedValues>
166384                <enumeratedValue>
166385                  <name>0</name>
166386                  <description>Corresponding bit in PDORn does not change.</description>
166387                  <value>#0</value>
166388                </enumeratedValue>
166389                <enumeratedValue>
166390                  <name>1</name>
166391                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166392                  <value>#1</value>
166393                </enumeratedValue>
166394              </enumeratedValues>
166395            </field>
166396            <field>
166397              <name>PTTO10</name>
166398              <description>Port Toggle Output</description>
166399              <bitOffset>10</bitOffset>
166400              <bitWidth>1</bitWidth>
166401              <access>write-only</access>
166402              <enumeratedValues>
166403                <enumeratedValue>
166404                  <name>0</name>
166405                  <description>Corresponding bit in PDORn does not change.</description>
166406                  <value>#0</value>
166407                </enumeratedValue>
166408                <enumeratedValue>
166409                  <name>1</name>
166410                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166411                  <value>#1</value>
166412                </enumeratedValue>
166413              </enumeratedValues>
166414            </field>
166415            <field>
166416              <name>PTTO11</name>
166417              <description>Port Toggle Output</description>
166418              <bitOffset>11</bitOffset>
166419              <bitWidth>1</bitWidth>
166420              <access>write-only</access>
166421              <enumeratedValues>
166422                <enumeratedValue>
166423                  <name>0</name>
166424                  <description>Corresponding bit in PDORn does not change.</description>
166425                  <value>#0</value>
166426                </enumeratedValue>
166427                <enumeratedValue>
166428                  <name>1</name>
166429                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166430                  <value>#1</value>
166431                </enumeratedValue>
166432              </enumeratedValues>
166433            </field>
166434            <field>
166435              <name>PTTO12</name>
166436              <description>Port Toggle Output</description>
166437              <bitOffset>12</bitOffset>
166438              <bitWidth>1</bitWidth>
166439              <access>write-only</access>
166440              <enumeratedValues>
166441                <enumeratedValue>
166442                  <name>0</name>
166443                  <description>Corresponding bit in PDORn does not change.</description>
166444                  <value>#0</value>
166445                </enumeratedValue>
166446                <enumeratedValue>
166447                  <name>1</name>
166448                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166449                  <value>#1</value>
166450                </enumeratedValue>
166451              </enumeratedValues>
166452            </field>
166453            <field>
166454              <name>PTTO13</name>
166455              <description>Port Toggle Output</description>
166456              <bitOffset>13</bitOffset>
166457              <bitWidth>1</bitWidth>
166458              <access>write-only</access>
166459              <enumeratedValues>
166460                <enumeratedValue>
166461                  <name>0</name>
166462                  <description>Corresponding bit in PDORn does not change.</description>
166463                  <value>#0</value>
166464                </enumeratedValue>
166465                <enumeratedValue>
166466                  <name>1</name>
166467                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166468                  <value>#1</value>
166469                </enumeratedValue>
166470              </enumeratedValues>
166471            </field>
166472            <field>
166473              <name>PTTO14</name>
166474              <description>Port Toggle Output</description>
166475              <bitOffset>14</bitOffset>
166476              <bitWidth>1</bitWidth>
166477              <access>write-only</access>
166478              <enumeratedValues>
166479                <enumeratedValue>
166480                  <name>0</name>
166481                  <description>Corresponding bit in PDORn does not change.</description>
166482                  <value>#0</value>
166483                </enumeratedValue>
166484                <enumeratedValue>
166485                  <name>1</name>
166486                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166487                  <value>#1</value>
166488                </enumeratedValue>
166489              </enumeratedValues>
166490            </field>
166491            <field>
166492              <name>PTTO15</name>
166493              <description>Port Toggle Output</description>
166494              <bitOffset>15</bitOffset>
166495              <bitWidth>1</bitWidth>
166496              <access>write-only</access>
166497              <enumeratedValues>
166498                <enumeratedValue>
166499                  <name>0</name>
166500                  <description>Corresponding bit in PDORn does not change.</description>
166501                  <value>#0</value>
166502                </enumeratedValue>
166503                <enumeratedValue>
166504                  <name>1</name>
166505                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166506                  <value>#1</value>
166507                </enumeratedValue>
166508              </enumeratedValues>
166509            </field>
166510            <field>
166511              <name>PTTO16</name>
166512              <description>Port Toggle Output</description>
166513              <bitOffset>16</bitOffset>
166514              <bitWidth>1</bitWidth>
166515              <access>write-only</access>
166516              <enumeratedValues>
166517                <enumeratedValue>
166518                  <name>0</name>
166519                  <description>Corresponding bit in PDORn does not change.</description>
166520                  <value>#0</value>
166521                </enumeratedValue>
166522                <enumeratedValue>
166523                  <name>1</name>
166524                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166525                  <value>#1</value>
166526                </enumeratedValue>
166527              </enumeratedValues>
166528            </field>
166529            <field>
166530              <name>PTTO17</name>
166531              <description>Port Toggle Output</description>
166532              <bitOffset>17</bitOffset>
166533              <bitWidth>1</bitWidth>
166534              <access>write-only</access>
166535              <enumeratedValues>
166536                <enumeratedValue>
166537                  <name>0</name>
166538                  <description>Corresponding bit in PDORn does not change.</description>
166539                  <value>#0</value>
166540                </enumeratedValue>
166541                <enumeratedValue>
166542                  <name>1</name>
166543                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166544                  <value>#1</value>
166545                </enumeratedValue>
166546              </enumeratedValues>
166547            </field>
166548            <field>
166549              <name>PTTO18</name>
166550              <description>Port Toggle Output</description>
166551              <bitOffset>18</bitOffset>
166552              <bitWidth>1</bitWidth>
166553              <access>write-only</access>
166554              <enumeratedValues>
166555                <enumeratedValue>
166556                  <name>0</name>
166557                  <description>Corresponding bit in PDORn does not change.</description>
166558                  <value>#0</value>
166559                </enumeratedValue>
166560                <enumeratedValue>
166561                  <name>1</name>
166562                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166563                  <value>#1</value>
166564                </enumeratedValue>
166565              </enumeratedValues>
166566            </field>
166567            <field>
166568              <name>PTTO19</name>
166569              <description>Port Toggle Output</description>
166570              <bitOffset>19</bitOffset>
166571              <bitWidth>1</bitWidth>
166572              <access>write-only</access>
166573              <enumeratedValues>
166574                <enumeratedValue>
166575                  <name>0</name>
166576                  <description>Corresponding bit in PDORn does not change.</description>
166577                  <value>#0</value>
166578                </enumeratedValue>
166579                <enumeratedValue>
166580                  <name>1</name>
166581                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166582                  <value>#1</value>
166583                </enumeratedValue>
166584              </enumeratedValues>
166585            </field>
166586            <field>
166587              <name>PTTO20</name>
166588              <description>Port Toggle Output</description>
166589              <bitOffset>20</bitOffset>
166590              <bitWidth>1</bitWidth>
166591              <access>write-only</access>
166592              <enumeratedValues>
166593                <enumeratedValue>
166594                  <name>0</name>
166595                  <description>Corresponding bit in PDORn does not change.</description>
166596                  <value>#0</value>
166597                </enumeratedValue>
166598                <enumeratedValue>
166599                  <name>1</name>
166600                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166601                  <value>#1</value>
166602                </enumeratedValue>
166603              </enumeratedValues>
166604            </field>
166605            <field>
166606              <name>PTTO21</name>
166607              <description>Port Toggle Output</description>
166608              <bitOffset>21</bitOffset>
166609              <bitWidth>1</bitWidth>
166610              <access>write-only</access>
166611              <enumeratedValues>
166612                <enumeratedValue>
166613                  <name>0</name>
166614                  <description>Corresponding bit in PDORn does not change.</description>
166615                  <value>#0</value>
166616                </enumeratedValue>
166617                <enumeratedValue>
166618                  <name>1</name>
166619                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166620                  <value>#1</value>
166621                </enumeratedValue>
166622              </enumeratedValues>
166623            </field>
166624            <field>
166625              <name>PTTO22</name>
166626              <description>Port Toggle Output</description>
166627              <bitOffset>22</bitOffset>
166628              <bitWidth>1</bitWidth>
166629              <access>write-only</access>
166630              <enumeratedValues>
166631                <enumeratedValue>
166632                  <name>0</name>
166633                  <description>Corresponding bit in PDORn does not change.</description>
166634                  <value>#0</value>
166635                </enumeratedValue>
166636                <enumeratedValue>
166637                  <name>1</name>
166638                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166639                  <value>#1</value>
166640                </enumeratedValue>
166641              </enumeratedValues>
166642            </field>
166643            <field>
166644              <name>PTTO23</name>
166645              <description>Port Toggle Output</description>
166646              <bitOffset>23</bitOffset>
166647              <bitWidth>1</bitWidth>
166648              <access>write-only</access>
166649              <enumeratedValues>
166650                <enumeratedValue>
166651                  <name>0</name>
166652                  <description>Corresponding bit in PDORn does not change.</description>
166653                  <value>#0</value>
166654                </enumeratedValue>
166655                <enumeratedValue>
166656                  <name>1</name>
166657                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166658                  <value>#1</value>
166659                </enumeratedValue>
166660              </enumeratedValues>
166661            </field>
166662            <field>
166663              <name>PTTO24</name>
166664              <description>Port Toggle Output</description>
166665              <bitOffset>24</bitOffset>
166666              <bitWidth>1</bitWidth>
166667              <access>write-only</access>
166668              <enumeratedValues>
166669                <enumeratedValue>
166670                  <name>0</name>
166671                  <description>Corresponding bit in PDORn does not change.</description>
166672                  <value>#0</value>
166673                </enumeratedValue>
166674                <enumeratedValue>
166675                  <name>1</name>
166676                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166677                  <value>#1</value>
166678                </enumeratedValue>
166679              </enumeratedValues>
166680            </field>
166681            <field>
166682              <name>PTTO25</name>
166683              <description>Port Toggle Output</description>
166684              <bitOffset>25</bitOffset>
166685              <bitWidth>1</bitWidth>
166686              <access>write-only</access>
166687              <enumeratedValues>
166688                <enumeratedValue>
166689                  <name>0</name>
166690                  <description>Corresponding bit in PDORn does not change.</description>
166691                  <value>#0</value>
166692                </enumeratedValue>
166693                <enumeratedValue>
166694                  <name>1</name>
166695                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166696                  <value>#1</value>
166697                </enumeratedValue>
166698              </enumeratedValues>
166699            </field>
166700            <field>
166701              <name>PTTO26</name>
166702              <description>Port Toggle Output</description>
166703              <bitOffset>26</bitOffset>
166704              <bitWidth>1</bitWidth>
166705              <access>write-only</access>
166706              <enumeratedValues>
166707                <enumeratedValue>
166708                  <name>0</name>
166709                  <description>Corresponding bit in PDORn does not change.</description>
166710                  <value>#0</value>
166711                </enumeratedValue>
166712                <enumeratedValue>
166713                  <name>1</name>
166714                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166715                  <value>#1</value>
166716                </enumeratedValue>
166717              </enumeratedValues>
166718            </field>
166719            <field>
166720              <name>PTTO27</name>
166721              <description>Port Toggle Output</description>
166722              <bitOffset>27</bitOffset>
166723              <bitWidth>1</bitWidth>
166724              <access>write-only</access>
166725              <enumeratedValues>
166726                <enumeratedValue>
166727                  <name>0</name>
166728                  <description>Corresponding bit in PDORn does not change.</description>
166729                  <value>#0</value>
166730                </enumeratedValue>
166731                <enumeratedValue>
166732                  <name>1</name>
166733                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166734                  <value>#1</value>
166735                </enumeratedValue>
166736              </enumeratedValues>
166737            </field>
166738            <field>
166739              <name>PTTO28</name>
166740              <description>Port Toggle Output</description>
166741              <bitOffset>28</bitOffset>
166742              <bitWidth>1</bitWidth>
166743              <access>write-only</access>
166744              <enumeratedValues>
166745                <enumeratedValue>
166746                  <name>0</name>
166747                  <description>Corresponding bit in PDORn does not change.</description>
166748                  <value>#0</value>
166749                </enumeratedValue>
166750                <enumeratedValue>
166751                  <name>1</name>
166752                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166753                  <value>#1</value>
166754                </enumeratedValue>
166755              </enumeratedValues>
166756            </field>
166757            <field>
166758              <name>PTTO29</name>
166759              <description>Port Toggle Output</description>
166760              <bitOffset>29</bitOffset>
166761              <bitWidth>1</bitWidth>
166762              <access>write-only</access>
166763              <enumeratedValues>
166764                <enumeratedValue>
166765                  <name>0</name>
166766                  <description>Corresponding bit in PDORn does not change.</description>
166767                  <value>#0</value>
166768                </enumeratedValue>
166769                <enumeratedValue>
166770                  <name>1</name>
166771                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166772                  <value>#1</value>
166773                </enumeratedValue>
166774              </enumeratedValues>
166775            </field>
166776            <field>
166777              <name>PTTO30</name>
166778              <description>Port Toggle Output</description>
166779              <bitOffset>30</bitOffset>
166780              <bitWidth>1</bitWidth>
166781              <access>write-only</access>
166782              <enumeratedValues>
166783                <enumeratedValue>
166784                  <name>0</name>
166785                  <description>Corresponding bit in PDORn does not change.</description>
166786                  <value>#0</value>
166787                </enumeratedValue>
166788                <enumeratedValue>
166789                  <name>1</name>
166790                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166791                  <value>#1</value>
166792                </enumeratedValue>
166793              </enumeratedValues>
166794            </field>
166795            <field>
166796              <name>PTTO31</name>
166797              <description>Port Toggle Output</description>
166798              <bitOffset>31</bitOffset>
166799              <bitWidth>1</bitWidth>
166800              <access>write-only</access>
166801              <enumeratedValues>
166802                <enumeratedValue>
166803                  <name>0</name>
166804                  <description>Corresponding bit in PDORn does not change.</description>
166805                  <value>#0</value>
166806                </enumeratedValue>
166807                <enumeratedValue>
166808                  <name>1</name>
166809                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
166810                  <value>#1</value>
166811                </enumeratedValue>
166812              </enumeratedValues>
166813            </field>
166814          </fields>
166815        </register>
166816        <register>
166817          <name>PDIR</name>
166818          <description>Port Data Input Register</description>
166819          <addressOffset>0x10</addressOffset>
166820          <size>32</size>
166821          <access>read-only</access>
166822          <resetValue>0</resetValue>
166823          <resetMask>0xFFFFFFFF</resetMask>
166824          <fields>
166825            <field>
166826              <name>PDI0</name>
166827              <description>Port Data Input</description>
166828              <bitOffset>0</bitOffset>
166829              <bitWidth>1</bitWidth>
166830              <access>read-only</access>
166831              <enumeratedValues>
166832                <enumeratedValue>
166833                  <name>0</name>
166834                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
166835                  <value>#0</value>
166836                </enumeratedValue>
166837                <enumeratedValue>
166838                  <name>1</name>
166839                  <description>Pin logic level is logic 1.</description>
166840                  <value>#1</value>
166841                </enumeratedValue>
166842              </enumeratedValues>
166843            </field>
166844            <field>
166845              <name>PDI1</name>
166846              <description>Port Data Input</description>
166847              <bitOffset>1</bitOffset>
166848              <bitWidth>1</bitWidth>
166849              <access>read-only</access>
166850              <enumeratedValues>
166851                <enumeratedValue>
166852                  <name>0</name>
166853                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
166854                  <value>#0</value>
166855                </enumeratedValue>
166856                <enumeratedValue>
166857                  <name>1</name>
166858                  <description>Pin logic level is logic 1.</description>
166859                  <value>#1</value>
166860                </enumeratedValue>
166861              </enumeratedValues>
166862            </field>
166863            <field>
166864              <name>PDI2</name>
166865              <description>Port Data Input</description>
166866              <bitOffset>2</bitOffset>
166867              <bitWidth>1</bitWidth>
166868              <access>read-only</access>
166869              <enumeratedValues>
166870                <enumeratedValue>
166871                  <name>0</name>
166872                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
166873                  <value>#0</value>
166874                </enumeratedValue>
166875                <enumeratedValue>
166876                  <name>1</name>
166877                  <description>Pin logic level is logic 1.</description>
166878                  <value>#1</value>
166879                </enumeratedValue>
166880              </enumeratedValues>
166881            </field>
166882            <field>
166883              <name>PDI3</name>
166884              <description>Port Data Input</description>
166885              <bitOffset>3</bitOffset>
166886              <bitWidth>1</bitWidth>
166887              <access>read-only</access>
166888              <enumeratedValues>
166889                <enumeratedValue>
166890                  <name>0</name>
166891                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
166892                  <value>#0</value>
166893                </enumeratedValue>
166894                <enumeratedValue>
166895                  <name>1</name>
166896                  <description>Pin logic level is logic 1.</description>
166897                  <value>#1</value>
166898                </enumeratedValue>
166899              </enumeratedValues>
166900            </field>
166901            <field>
166902              <name>PDI4</name>
166903              <description>Port Data Input</description>
166904              <bitOffset>4</bitOffset>
166905              <bitWidth>1</bitWidth>
166906              <access>read-only</access>
166907              <enumeratedValues>
166908                <enumeratedValue>
166909                  <name>0</name>
166910                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
166911                  <value>#0</value>
166912                </enumeratedValue>
166913                <enumeratedValue>
166914                  <name>1</name>
166915                  <description>Pin logic level is logic 1.</description>
166916                  <value>#1</value>
166917                </enumeratedValue>
166918              </enumeratedValues>
166919            </field>
166920            <field>
166921              <name>PDI5</name>
166922              <description>Port Data Input</description>
166923              <bitOffset>5</bitOffset>
166924              <bitWidth>1</bitWidth>
166925              <access>read-only</access>
166926              <enumeratedValues>
166927                <enumeratedValue>
166928                  <name>0</name>
166929                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
166930                  <value>#0</value>
166931                </enumeratedValue>
166932                <enumeratedValue>
166933                  <name>1</name>
166934                  <description>Pin logic level is logic 1.</description>
166935                  <value>#1</value>
166936                </enumeratedValue>
166937              </enumeratedValues>
166938            </field>
166939            <field>
166940              <name>PDI6</name>
166941              <description>Port Data Input</description>
166942              <bitOffset>6</bitOffset>
166943              <bitWidth>1</bitWidth>
166944              <access>read-only</access>
166945              <enumeratedValues>
166946                <enumeratedValue>
166947                  <name>0</name>
166948                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
166949                  <value>#0</value>
166950                </enumeratedValue>
166951                <enumeratedValue>
166952                  <name>1</name>
166953                  <description>Pin logic level is logic 1.</description>
166954                  <value>#1</value>
166955                </enumeratedValue>
166956              </enumeratedValues>
166957            </field>
166958            <field>
166959              <name>PDI7</name>
166960              <description>Port Data Input</description>
166961              <bitOffset>7</bitOffset>
166962              <bitWidth>1</bitWidth>
166963              <access>read-only</access>
166964              <enumeratedValues>
166965                <enumeratedValue>
166966                  <name>0</name>
166967                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
166968                  <value>#0</value>
166969                </enumeratedValue>
166970                <enumeratedValue>
166971                  <name>1</name>
166972                  <description>Pin logic level is logic 1.</description>
166973                  <value>#1</value>
166974                </enumeratedValue>
166975              </enumeratedValues>
166976            </field>
166977            <field>
166978              <name>PDI8</name>
166979              <description>Port Data Input</description>
166980              <bitOffset>8</bitOffset>
166981              <bitWidth>1</bitWidth>
166982              <access>read-only</access>
166983              <enumeratedValues>
166984                <enumeratedValue>
166985                  <name>0</name>
166986                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
166987                  <value>#0</value>
166988                </enumeratedValue>
166989                <enumeratedValue>
166990                  <name>1</name>
166991                  <description>Pin logic level is logic 1.</description>
166992                  <value>#1</value>
166993                </enumeratedValue>
166994              </enumeratedValues>
166995            </field>
166996            <field>
166997              <name>PDI9</name>
166998              <description>Port Data Input</description>
166999              <bitOffset>9</bitOffset>
167000              <bitWidth>1</bitWidth>
167001              <access>read-only</access>
167002              <enumeratedValues>
167003                <enumeratedValue>
167004                  <name>0</name>
167005                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167006                  <value>#0</value>
167007                </enumeratedValue>
167008                <enumeratedValue>
167009                  <name>1</name>
167010                  <description>Pin logic level is logic 1.</description>
167011                  <value>#1</value>
167012                </enumeratedValue>
167013              </enumeratedValues>
167014            </field>
167015            <field>
167016              <name>PDI10</name>
167017              <description>Port Data Input</description>
167018              <bitOffset>10</bitOffset>
167019              <bitWidth>1</bitWidth>
167020              <access>read-only</access>
167021              <enumeratedValues>
167022                <enumeratedValue>
167023                  <name>0</name>
167024                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167025                  <value>#0</value>
167026                </enumeratedValue>
167027                <enumeratedValue>
167028                  <name>1</name>
167029                  <description>Pin logic level is logic 1.</description>
167030                  <value>#1</value>
167031                </enumeratedValue>
167032              </enumeratedValues>
167033            </field>
167034            <field>
167035              <name>PDI11</name>
167036              <description>Port Data Input</description>
167037              <bitOffset>11</bitOffset>
167038              <bitWidth>1</bitWidth>
167039              <access>read-only</access>
167040              <enumeratedValues>
167041                <enumeratedValue>
167042                  <name>0</name>
167043                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167044                  <value>#0</value>
167045                </enumeratedValue>
167046                <enumeratedValue>
167047                  <name>1</name>
167048                  <description>Pin logic level is logic 1.</description>
167049                  <value>#1</value>
167050                </enumeratedValue>
167051              </enumeratedValues>
167052            </field>
167053            <field>
167054              <name>PDI12</name>
167055              <description>Port Data Input</description>
167056              <bitOffset>12</bitOffset>
167057              <bitWidth>1</bitWidth>
167058              <access>read-only</access>
167059              <enumeratedValues>
167060                <enumeratedValue>
167061                  <name>0</name>
167062                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167063                  <value>#0</value>
167064                </enumeratedValue>
167065                <enumeratedValue>
167066                  <name>1</name>
167067                  <description>Pin logic level is logic 1.</description>
167068                  <value>#1</value>
167069                </enumeratedValue>
167070              </enumeratedValues>
167071            </field>
167072            <field>
167073              <name>PDI13</name>
167074              <description>Port Data Input</description>
167075              <bitOffset>13</bitOffset>
167076              <bitWidth>1</bitWidth>
167077              <access>read-only</access>
167078              <enumeratedValues>
167079                <enumeratedValue>
167080                  <name>0</name>
167081                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167082                  <value>#0</value>
167083                </enumeratedValue>
167084                <enumeratedValue>
167085                  <name>1</name>
167086                  <description>Pin logic level is logic 1.</description>
167087                  <value>#1</value>
167088                </enumeratedValue>
167089              </enumeratedValues>
167090            </field>
167091            <field>
167092              <name>PDI14</name>
167093              <description>Port Data Input</description>
167094              <bitOffset>14</bitOffset>
167095              <bitWidth>1</bitWidth>
167096              <access>read-only</access>
167097              <enumeratedValues>
167098                <enumeratedValue>
167099                  <name>0</name>
167100                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167101                  <value>#0</value>
167102                </enumeratedValue>
167103                <enumeratedValue>
167104                  <name>1</name>
167105                  <description>Pin logic level is logic 1.</description>
167106                  <value>#1</value>
167107                </enumeratedValue>
167108              </enumeratedValues>
167109            </field>
167110            <field>
167111              <name>PDI15</name>
167112              <description>Port Data Input</description>
167113              <bitOffset>15</bitOffset>
167114              <bitWidth>1</bitWidth>
167115              <access>read-only</access>
167116              <enumeratedValues>
167117                <enumeratedValue>
167118                  <name>0</name>
167119                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167120                  <value>#0</value>
167121                </enumeratedValue>
167122                <enumeratedValue>
167123                  <name>1</name>
167124                  <description>Pin logic level is logic 1.</description>
167125                  <value>#1</value>
167126                </enumeratedValue>
167127              </enumeratedValues>
167128            </field>
167129            <field>
167130              <name>PDI16</name>
167131              <description>Port Data Input</description>
167132              <bitOffset>16</bitOffset>
167133              <bitWidth>1</bitWidth>
167134              <access>read-only</access>
167135              <enumeratedValues>
167136                <enumeratedValue>
167137                  <name>0</name>
167138                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167139                  <value>#0</value>
167140                </enumeratedValue>
167141                <enumeratedValue>
167142                  <name>1</name>
167143                  <description>Pin logic level is logic 1.</description>
167144                  <value>#1</value>
167145                </enumeratedValue>
167146              </enumeratedValues>
167147            </field>
167148            <field>
167149              <name>PDI17</name>
167150              <description>Port Data Input</description>
167151              <bitOffset>17</bitOffset>
167152              <bitWidth>1</bitWidth>
167153              <access>read-only</access>
167154              <enumeratedValues>
167155                <enumeratedValue>
167156                  <name>0</name>
167157                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167158                  <value>#0</value>
167159                </enumeratedValue>
167160                <enumeratedValue>
167161                  <name>1</name>
167162                  <description>Pin logic level is logic 1.</description>
167163                  <value>#1</value>
167164                </enumeratedValue>
167165              </enumeratedValues>
167166            </field>
167167            <field>
167168              <name>PDI18</name>
167169              <description>Port Data Input</description>
167170              <bitOffset>18</bitOffset>
167171              <bitWidth>1</bitWidth>
167172              <access>read-only</access>
167173              <enumeratedValues>
167174                <enumeratedValue>
167175                  <name>0</name>
167176                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167177                  <value>#0</value>
167178                </enumeratedValue>
167179                <enumeratedValue>
167180                  <name>1</name>
167181                  <description>Pin logic level is logic 1.</description>
167182                  <value>#1</value>
167183                </enumeratedValue>
167184              </enumeratedValues>
167185            </field>
167186            <field>
167187              <name>PDI19</name>
167188              <description>Port Data Input</description>
167189              <bitOffset>19</bitOffset>
167190              <bitWidth>1</bitWidth>
167191              <access>read-only</access>
167192              <enumeratedValues>
167193                <enumeratedValue>
167194                  <name>0</name>
167195                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167196                  <value>#0</value>
167197                </enumeratedValue>
167198                <enumeratedValue>
167199                  <name>1</name>
167200                  <description>Pin logic level is logic 1.</description>
167201                  <value>#1</value>
167202                </enumeratedValue>
167203              </enumeratedValues>
167204            </field>
167205            <field>
167206              <name>PDI20</name>
167207              <description>Port Data Input</description>
167208              <bitOffset>20</bitOffset>
167209              <bitWidth>1</bitWidth>
167210              <access>read-only</access>
167211              <enumeratedValues>
167212                <enumeratedValue>
167213                  <name>0</name>
167214                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167215                  <value>#0</value>
167216                </enumeratedValue>
167217                <enumeratedValue>
167218                  <name>1</name>
167219                  <description>Pin logic level is logic 1.</description>
167220                  <value>#1</value>
167221                </enumeratedValue>
167222              </enumeratedValues>
167223            </field>
167224            <field>
167225              <name>PDI21</name>
167226              <description>Port Data Input</description>
167227              <bitOffset>21</bitOffset>
167228              <bitWidth>1</bitWidth>
167229              <access>read-only</access>
167230              <enumeratedValues>
167231                <enumeratedValue>
167232                  <name>0</name>
167233                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167234                  <value>#0</value>
167235                </enumeratedValue>
167236                <enumeratedValue>
167237                  <name>1</name>
167238                  <description>Pin logic level is logic 1.</description>
167239                  <value>#1</value>
167240                </enumeratedValue>
167241              </enumeratedValues>
167242            </field>
167243            <field>
167244              <name>PDI22</name>
167245              <description>Port Data Input</description>
167246              <bitOffset>22</bitOffset>
167247              <bitWidth>1</bitWidth>
167248              <access>read-only</access>
167249              <enumeratedValues>
167250                <enumeratedValue>
167251                  <name>0</name>
167252                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167253                  <value>#0</value>
167254                </enumeratedValue>
167255                <enumeratedValue>
167256                  <name>1</name>
167257                  <description>Pin logic level is logic 1.</description>
167258                  <value>#1</value>
167259                </enumeratedValue>
167260              </enumeratedValues>
167261            </field>
167262            <field>
167263              <name>PDI23</name>
167264              <description>Port Data Input</description>
167265              <bitOffset>23</bitOffset>
167266              <bitWidth>1</bitWidth>
167267              <access>read-only</access>
167268              <enumeratedValues>
167269                <enumeratedValue>
167270                  <name>0</name>
167271                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167272                  <value>#0</value>
167273                </enumeratedValue>
167274                <enumeratedValue>
167275                  <name>1</name>
167276                  <description>Pin logic level is logic 1.</description>
167277                  <value>#1</value>
167278                </enumeratedValue>
167279              </enumeratedValues>
167280            </field>
167281            <field>
167282              <name>PDI24</name>
167283              <description>Port Data Input</description>
167284              <bitOffset>24</bitOffset>
167285              <bitWidth>1</bitWidth>
167286              <access>read-only</access>
167287              <enumeratedValues>
167288                <enumeratedValue>
167289                  <name>0</name>
167290                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167291                  <value>#0</value>
167292                </enumeratedValue>
167293                <enumeratedValue>
167294                  <name>1</name>
167295                  <description>Pin logic level is logic 1.</description>
167296                  <value>#1</value>
167297                </enumeratedValue>
167298              </enumeratedValues>
167299            </field>
167300            <field>
167301              <name>PDI25</name>
167302              <description>Port Data Input</description>
167303              <bitOffset>25</bitOffset>
167304              <bitWidth>1</bitWidth>
167305              <access>read-only</access>
167306              <enumeratedValues>
167307                <enumeratedValue>
167308                  <name>0</name>
167309                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167310                  <value>#0</value>
167311                </enumeratedValue>
167312                <enumeratedValue>
167313                  <name>1</name>
167314                  <description>Pin logic level is logic 1.</description>
167315                  <value>#1</value>
167316                </enumeratedValue>
167317              </enumeratedValues>
167318            </field>
167319            <field>
167320              <name>PDI26</name>
167321              <description>Port Data Input</description>
167322              <bitOffset>26</bitOffset>
167323              <bitWidth>1</bitWidth>
167324              <access>read-only</access>
167325              <enumeratedValues>
167326                <enumeratedValue>
167327                  <name>0</name>
167328                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167329                  <value>#0</value>
167330                </enumeratedValue>
167331                <enumeratedValue>
167332                  <name>1</name>
167333                  <description>Pin logic level is logic 1.</description>
167334                  <value>#1</value>
167335                </enumeratedValue>
167336              </enumeratedValues>
167337            </field>
167338            <field>
167339              <name>PDI27</name>
167340              <description>Port Data Input</description>
167341              <bitOffset>27</bitOffset>
167342              <bitWidth>1</bitWidth>
167343              <access>read-only</access>
167344              <enumeratedValues>
167345                <enumeratedValue>
167346                  <name>0</name>
167347                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167348                  <value>#0</value>
167349                </enumeratedValue>
167350                <enumeratedValue>
167351                  <name>1</name>
167352                  <description>Pin logic level is logic 1.</description>
167353                  <value>#1</value>
167354                </enumeratedValue>
167355              </enumeratedValues>
167356            </field>
167357            <field>
167358              <name>PDI28</name>
167359              <description>Port Data Input</description>
167360              <bitOffset>28</bitOffset>
167361              <bitWidth>1</bitWidth>
167362              <access>read-only</access>
167363              <enumeratedValues>
167364                <enumeratedValue>
167365                  <name>0</name>
167366                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167367                  <value>#0</value>
167368                </enumeratedValue>
167369                <enumeratedValue>
167370                  <name>1</name>
167371                  <description>Pin logic level is logic 1.</description>
167372                  <value>#1</value>
167373                </enumeratedValue>
167374              </enumeratedValues>
167375            </field>
167376            <field>
167377              <name>PDI29</name>
167378              <description>Port Data Input</description>
167379              <bitOffset>29</bitOffset>
167380              <bitWidth>1</bitWidth>
167381              <access>read-only</access>
167382              <enumeratedValues>
167383                <enumeratedValue>
167384                  <name>0</name>
167385                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167386                  <value>#0</value>
167387                </enumeratedValue>
167388                <enumeratedValue>
167389                  <name>1</name>
167390                  <description>Pin logic level is logic 1.</description>
167391                  <value>#1</value>
167392                </enumeratedValue>
167393              </enumeratedValues>
167394            </field>
167395            <field>
167396              <name>PDI30</name>
167397              <description>Port Data Input</description>
167398              <bitOffset>30</bitOffset>
167399              <bitWidth>1</bitWidth>
167400              <access>read-only</access>
167401              <enumeratedValues>
167402                <enumeratedValue>
167403                  <name>0</name>
167404                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167405                  <value>#0</value>
167406                </enumeratedValue>
167407                <enumeratedValue>
167408                  <name>1</name>
167409                  <description>Pin logic level is logic 1.</description>
167410                  <value>#1</value>
167411                </enumeratedValue>
167412              </enumeratedValues>
167413            </field>
167414            <field>
167415              <name>PDI31</name>
167416              <description>Port Data Input</description>
167417              <bitOffset>31</bitOffset>
167418              <bitWidth>1</bitWidth>
167419              <access>read-only</access>
167420              <enumeratedValues>
167421                <enumeratedValue>
167422                  <name>0</name>
167423                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
167424                  <value>#0</value>
167425                </enumeratedValue>
167426                <enumeratedValue>
167427                  <name>1</name>
167428                  <description>Pin logic level is logic 1.</description>
167429                  <value>#1</value>
167430                </enumeratedValue>
167431              </enumeratedValues>
167432            </field>
167433          </fields>
167434        </register>
167435        <register>
167436          <name>PDDR</name>
167437          <description>Port Data Direction Register</description>
167438          <addressOffset>0x14</addressOffset>
167439          <size>32</size>
167440          <access>read-write</access>
167441          <resetValue>0</resetValue>
167442          <resetMask>0xFFFFFFFF</resetMask>
167443          <fields>
167444            <field>
167445              <name>PDD0</name>
167446              <description>Port Data Direction</description>
167447              <bitOffset>0</bitOffset>
167448              <bitWidth>1</bitWidth>
167449              <access>read-write</access>
167450              <enumeratedValues>
167451                <enumeratedValue>
167452                  <name>0</name>
167453                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167454                  <value>#0</value>
167455                </enumeratedValue>
167456                <enumeratedValue>
167457                  <name>1</name>
167458                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167459                  <value>#1</value>
167460                </enumeratedValue>
167461              </enumeratedValues>
167462            </field>
167463            <field>
167464              <name>PDD1</name>
167465              <description>Port Data Direction</description>
167466              <bitOffset>1</bitOffset>
167467              <bitWidth>1</bitWidth>
167468              <access>read-write</access>
167469              <enumeratedValues>
167470                <enumeratedValue>
167471                  <name>0</name>
167472                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167473                  <value>#0</value>
167474                </enumeratedValue>
167475                <enumeratedValue>
167476                  <name>1</name>
167477                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167478                  <value>#1</value>
167479                </enumeratedValue>
167480              </enumeratedValues>
167481            </field>
167482            <field>
167483              <name>PDD2</name>
167484              <description>Port Data Direction</description>
167485              <bitOffset>2</bitOffset>
167486              <bitWidth>1</bitWidth>
167487              <access>read-write</access>
167488              <enumeratedValues>
167489                <enumeratedValue>
167490                  <name>0</name>
167491                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167492                  <value>#0</value>
167493                </enumeratedValue>
167494                <enumeratedValue>
167495                  <name>1</name>
167496                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167497                  <value>#1</value>
167498                </enumeratedValue>
167499              </enumeratedValues>
167500            </field>
167501            <field>
167502              <name>PDD3</name>
167503              <description>Port Data Direction</description>
167504              <bitOffset>3</bitOffset>
167505              <bitWidth>1</bitWidth>
167506              <access>read-write</access>
167507              <enumeratedValues>
167508                <enumeratedValue>
167509                  <name>0</name>
167510                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167511                  <value>#0</value>
167512                </enumeratedValue>
167513                <enumeratedValue>
167514                  <name>1</name>
167515                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167516                  <value>#1</value>
167517                </enumeratedValue>
167518              </enumeratedValues>
167519            </field>
167520            <field>
167521              <name>PDD4</name>
167522              <description>Port Data Direction</description>
167523              <bitOffset>4</bitOffset>
167524              <bitWidth>1</bitWidth>
167525              <access>read-write</access>
167526              <enumeratedValues>
167527                <enumeratedValue>
167528                  <name>0</name>
167529                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167530                  <value>#0</value>
167531                </enumeratedValue>
167532                <enumeratedValue>
167533                  <name>1</name>
167534                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167535                  <value>#1</value>
167536                </enumeratedValue>
167537              </enumeratedValues>
167538            </field>
167539            <field>
167540              <name>PDD5</name>
167541              <description>Port Data Direction</description>
167542              <bitOffset>5</bitOffset>
167543              <bitWidth>1</bitWidth>
167544              <access>read-write</access>
167545              <enumeratedValues>
167546                <enumeratedValue>
167547                  <name>0</name>
167548                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167549                  <value>#0</value>
167550                </enumeratedValue>
167551                <enumeratedValue>
167552                  <name>1</name>
167553                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167554                  <value>#1</value>
167555                </enumeratedValue>
167556              </enumeratedValues>
167557            </field>
167558            <field>
167559              <name>PDD6</name>
167560              <description>Port Data Direction</description>
167561              <bitOffset>6</bitOffset>
167562              <bitWidth>1</bitWidth>
167563              <access>read-write</access>
167564              <enumeratedValues>
167565                <enumeratedValue>
167566                  <name>0</name>
167567                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167568                  <value>#0</value>
167569                </enumeratedValue>
167570                <enumeratedValue>
167571                  <name>1</name>
167572                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167573                  <value>#1</value>
167574                </enumeratedValue>
167575              </enumeratedValues>
167576            </field>
167577            <field>
167578              <name>PDD7</name>
167579              <description>Port Data Direction</description>
167580              <bitOffset>7</bitOffset>
167581              <bitWidth>1</bitWidth>
167582              <access>read-write</access>
167583              <enumeratedValues>
167584                <enumeratedValue>
167585                  <name>0</name>
167586                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167587                  <value>#0</value>
167588                </enumeratedValue>
167589                <enumeratedValue>
167590                  <name>1</name>
167591                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167592                  <value>#1</value>
167593                </enumeratedValue>
167594              </enumeratedValues>
167595            </field>
167596            <field>
167597              <name>PDD8</name>
167598              <description>Port Data Direction</description>
167599              <bitOffset>8</bitOffset>
167600              <bitWidth>1</bitWidth>
167601              <access>read-write</access>
167602              <enumeratedValues>
167603                <enumeratedValue>
167604                  <name>0</name>
167605                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167606                  <value>#0</value>
167607                </enumeratedValue>
167608                <enumeratedValue>
167609                  <name>1</name>
167610                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167611                  <value>#1</value>
167612                </enumeratedValue>
167613              </enumeratedValues>
167614            </field>
167615            <field>
167616              <name>PDD9</name>
167617              <description>Port Data Direction</description>
167618              <bitOffset>9</bitOffset>
167619              <bitWidth>1</bitWidth>
167620              <access>read-write</access>
167621              <enumeratedValues>
167622                <enumeratedValue>
167623                  <name>0</name>
167624                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167625                  <value>#0</value>
167626                </enumeratedValue>
167627                <enumeratedValue>
167628                  <name>1</name>
167629                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167630                  <value>#1</value>
167631                </enumeratedValue>
167632              </enumeratedValues>
167633            </field>
167634            <field>
167635              <name>PDD10</name>
167636              <description>Port Data Direction</description>
167637              <bitOffset>10</bitOffset>
167638              <bitWidth>1</bitWidth>
167639              <access>read-write</access>
167640              <enumeratedValues>
167641                <enumeratedValue>
167642                  <name>0</name>
167643                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167644                  <value>#0</value>
167645                </enumeratedValue>
167646                <enumeratedValue>
167647                  <name>1</name>
167648                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167649                  <value>#1</value>
167650                </enumeratedValue>
167651              </enumeratedValues>
167652            </field>
167653            <field>
167654              <name>PDD11</name>
167655              <description>Port Data Direction</description>
167656              <bitOffset>11</bitOffset>
167657              <bitWidth>1</bitWidth>
167658              <access>read-write</access>
167659              <enumeratedValues>
167660                <enumeratedValue>
167661                  <name>0</name>
167662                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167663                  <value>#0</value>
167664                </enumeratedValue>
167665                <enumeratedValue>
167666                  <name>1</name>
167667                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167668                  <value>#1</value>
167669                </enumeratedValue>
167670              </enumeratedValues>
167671            </field>
167672            <field>
167673              <name>PDD12</name>
167674              <description>Port Data Direction</description>
167675              <bitOffset>12</bitOffset>
167676              <bitWidth>1</bitWidth>
167677              <access>read-write</access>
167678              <enumeratedValues>
167679                <enumeratedValue>
167680                  <name>0</name>
167681                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167682                  <value>#0</value>
167683                </enumeratedValue>
167684                <enumeratedValue>
167685                  <name>1</name>
167686                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167687                  <value>#1</value>
167688                </enumeratedValue>
167689              </enumeratedValues>
167690            </field>
167691            <field>
167692              <name>PDD13</name>
167693              <description>Port Data Direction</description>
167694              <bitOffset>13</bitOffset>
167695              <bitWidth>1</bitWidth>
167696              <access>read-write</access>
167697              <enumeratedValues>
167698                <enumeratedValue>
167699                  <name>0</name>
167700                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167701                  <value>#0</value>
167702                </enumeratedValue>
167703                <enumeratedValue>
167704                  <name>1</name>
167705                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167706                  <value>#1</value>
167707                </enumeratedValue>
167708              </enumeratedValues>
167709            </field>
167710            <field>
167711              <name>PDD14</name>
167712              <description>Port Data Direction</description>
167713              <bitOffset>14</bitOffset>
167714              <bitWidth>1</bitWidth>
167715              <access>read-write</access>
167716              <enumeratedValues>
167717                <enumeratedValue>
167718                  <name>0</name>
167719                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167720                  <value>#0</value>
167721                </enumeratedValue>
167722                <enumeratedValue>
167723                  <name>1</name>
167724                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167725                  <value>#1</value>
167726                </enumeratedValue>
167727              </enumeratedValues>
167728            </field>
167729            <field>
167730              <name>PDD15</name>
167731              <description>Port Data Direction</description>
167732              <bitOffset>15</bitOffset>
167733              <bitWidth>1</bitWidth>
167734              <access>read-write</access>
167735              <enumeratedValues>
167736                <enumeratedValue>
167737                  <name>0</name>
167738                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167739                  <value>#0</value>
167740                </enumeratedValue>
167741                <enumeratedValue>
167742                  <name>1</name>
167743                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167744                  <value>#1</value>
167745                </enumeratedValue>
167746              </enumeratedValues>
167747            </field>
167748            <field>
167749              <name>PDD16</name>
167750              <description>Port Data Direction</description>
167751              <bitOffset>16</bitOffset>
167752              <bitWidth>1</bitWidth>
167753              <access>read-write</access>
167754              <enumeratedValues>
167755                <enumeratedValue>
167756                  <name>0</name>
167757                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167758                  <value>#0</value>
167759                </enumeratedValue>
167760                <enumeratedValue>
167761                  <name>1</name>
167762                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167763                  <value>#1</value>
167764                </enumeratedValue>
167765              </enumeratedValues>
167766            </field>
167767            <field>
167768              <name>PDD17</name>
167769              <description>Port Data Direction</description>
167770              <bitOffset>17</bitOffset>
167771              <bitWidth>1</bitWidth>
167772              <access>read-write</access>
167773              <enumeratedValues>
167774                <enumeratedValue>
167775                  <name>0</name>
167776                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167777                  <value>#0</value>
167778                </enumeratedValue>
167779                <enumeratedValue>
167780                  <name>1</name>
167781                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167782                  <value>#1</value>
167783                </enumeratedValue>
167784              </enumeratedValues>
167785            </field>
167786            <field>
167787              <name>PDD18</name>
167788              <description>Port Data Direction</description>
167789              <bitOffset>18</bitOffset>
167790              <bitWidth>1</bitWidth>
167791              <access>read-write</access>
167792              <enumeratedValues>
167793                <enumeratedValue>
167794                  <name>0</name>
167795                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167796                  <value>#0</value>
167797                </enumeratedValue>
167798                <enumeratedValue>
167799                  <name>1</name>
167800                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167801                  <value>#1</value>
167802                </enumeratedValue>
167803              </enumeratedValues>
167804            </field>
167805            <field>
167806              <name>PDD19</name>
167807              <description>Port Data Direction</description>
167808              <bitOffset>19</bitOffset>
167809              <bitWidth>1</bitWidth>
167810              <access>read-write</access>
167811              <enumeratedValues>
167812                <enumeratedValue>
167813                  <name>0</name>
167814                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167815                  <value>#0</value>
167816                </enumeratedValue>
167817                <enumeratedValue>
167818                  <name>1</name>
167819                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167820                  <value>#1</value>
167821                </enumeratedValue>
167822              </enumeratedValues>
167823            </field>
167824            <field>
167825              <name>PDD20</name>
167826              <description>Port Data Direction</description>
167827              <bitOffset>20</bitOffset>
167828              <bitWidth>1</bitWidth>
167829              <access>read-write</access>
167830              <enumeratedValues>
167831                <enumeratedValue>
167832                  <name>0</name>
167833                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167834                  <value>#0</value>
167835                </enumeratedValue>
167836                <enumeratedValue>
167837                  <name>1</name>
167838                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167839                  <value>#1</value>
167840                </enumeratedValue>
167841              </enumeratedValues>
167842            </field>
167843            <field>
167844              <name>PDD21</name>
167845              <description>Port Data Direction</description>
167846              <bitOffset>21</bitOffset>
167847              <bitWidth>1</bitWidth>
167848              <access>read-write</access>
167849              <enumeratedValues>
167850                <enumeratedValue>
167851                  <name>0</name>
167852                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167853                  <value>#0</value>
167854                </enumeratedValue>
167855                <enumeratedValue>
167856                  <name>1</name>
167857                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167858                  <value>#1</value>
167859                </enumeratedValue>
167860              </enumeratedValues>
167861            </field>
167862            <field>
167863              <name>PDD22</name>
167864              <description>Port Data Direction</description>
167865              <bitOffset>22</bitOffset>
167866              <bitWidth>1</bitWidth>
167867              <access>read-write</access>
167868              <enumeratedValues>
167869                <enumeratedValue>
167870                  <name>0</name>
167871                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167872                  <value>#0</value>
167873                </enumeratedValue>
167874                <enumeratedValue>
167875                  <name>1</name>
167876                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167877                  <value>#1</value>
167878                </enumeratedValue>
167879              </enumeratedValues>
167880            </field>
167881            <field>
167882              <name>PDD23</name>
167883              <description>Port Data Direction</description>
167884              <bitOffset>23</bitOffset>
167885              <bitWidth>1</bitWidth>
167886              <access>read-write</access>
167887              <enumeratedValues>
167888                <enumeratedValue>
167889                  <name>0</name>
167890                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167891                  <value>#0</value>
167892                </enumeratedValue>
167893                <enumeratedValue>
167894                  <name>1</name>
167895                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167896                  <value>#1</value>
167897                </enumeratedValue>
167898              </enumeratedValues>
167899            </field>
167900            <field>
167901              <name>PDD24</name>
167902              <description>Port Data Direction</description>
167903              <bitOffset>24</bitOffset>
167904              <bitWidth>1</bitWidth>
167905              <access>read-write</access>
167906              <enumeratedValues>
167907                <enumeratedValue>
167908                  <name>0</name>
167909                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167910                  <value>#0</value>
167911                </enumeratedValue>
167912                <enumeratedValue>
167913                  <name>1</name>
167914                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167915                  <value>#1</value>
167916                </enumeratedValue>
167917              </enumeratedValues>
167918            </field>
167919            <field>
167920              <name>PDD25</name>
167921              <description>Port Data Direction</description>
167922              <bitOffset>25</bitOffset>
167923              <bitWidth>1</bitWidth>
167924              <access>read-write</access>
167925              <enumeratedValues>
167926                <enumeratedValue>
167927                  <name>0</name>
167928                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167929                  <value>#0</value>
167930                </enumeratedValue>
167931                <enumeratedValue>
167932                  <name>1</name>
167933                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167934                  <value>#1</value>
167935                </enumeratedValue>
167936              </enumeratedValues>
167937            </field>
167938            <field>
167939              <name>PDD26</name>
167940              <description>Port Data Direction</description>
167941              <bitOffset>26</bitOffset>
167942              <bitWidth>1</bitWidth>
167943              <access>read-write</access>
167944              <enumeratedValues>
167945                <enumeratedValue>
167946                  <name>0</name>
167947                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167948                  <value>#0</value>
167949                </enumeratedValue>
167950                <enumeratedValue>
167951                  <name>1</name>
167952                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167953                  <value>#1</value>
167954                </enumeratedValue>
167955              </enumeratedValues>
167956            </field>
167957            <field>
167958              <name>PDD27</name>
167959              <description>Port Data Direction</description>
167960              <bitOffset>27</bitOffset>
167961              <bitWidth>1</bitWidth>
167962              <access>read-write</access>
167963              <enumeratedValues>
167964                <enumeratedValue>
167965                  <name>0</name>
167966                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167967                  <value>#0</value>
167968                </enumeratedValue>
167969                <enumeratedValue>
167970                  <name>1</name>
167971                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167972                  <value>#1</value>
167973                </enumeratedValue>
167974              </enumeratedValues>
167975            </field>
167976            <field>
167977              <name>PDD28</name>
167978              <description>Port Data Direction</description>
167979              <bitOffset>28</bitOffset>
167980              <bitWidth>1</bitWidth>
167981              <access>read-write</access>
167982              <enumeratedValues>
167983                <enumeratedValue>
167984                  <name>0</name>
167985                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
167986                  <value>#0</value>
167987                </enumeratedValue>
167988                <enumeratedValue>
167989                  <name>1</name>
167990                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
167991                  <value>#1</value>
167992                </enumeratedValue>
167993              </enumeratedValues>
167994            </field>
167995            <field>
167996              <name>PDD29</name>
167997              <description>Port Data Direction</description>
167998              <bitOffset>29</bitOffset>
167999              <bitWidth>1</bitWidth>
168000              <access>read-write</access>
168001              <enumeratedValues>
168002                <enumeratedValue>
168003                  <name>0</name>
168004                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
168005                  <value>#0</value>
168006                </enumeratedValue>
168007                <enumeratedValue>
168008                  <name>1</name>
168009                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
168010                  <value>#1</value>
168011                </enumeratedValue>
168012              </enumeratedValues>
168013            </field>
168014            <field>
168015              <name>PDD30</name>
168016              <description>Port Data Direction</description>
168017              <bitOffset>30</bitOffset>
168018              <bitWidth>1</bitWidth>
168019              <access>read-write</access>
168020              <enumeratedValues>
168021                <enumeratedValue>
168022                  <name>0</name>
168023                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
168024                  <value>#0</value>
168025                </enumeratedValue>
168026                <enumeratedValue>
168027                  <name>1</name>
168028                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
168029                  <value>#1</value>
168030                </enumeratedValue>
168031              </enumeratedValues>
168032            </field>
168033            <field>
168034              <name>PDD31</name>
168035              <description>Port Data Direction</description>
168036              <bitOffset>31</bitOffset>
168037              <bitWidth>1</bitWidth>
168038              <access>read-write</access>
168039              <enumeratedValues>
168040                <enumeratedValue>
168041                  <name>0</name>
168042                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
168043                  <value>#0</value>
168044                </enumeratedValue>
168045                <enumeratedValue>
168046                  <name>1</name>
168047                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
168048                  <value>#1</value>
168049                </enumeratedValue>
168050              </enumeratedValues>
168051            </field>
168052          </fields>
168053        </register>
168054      </registers>
168055    </peripheral>
168056    <peripheral>
168057      <name>GPIOE</name>
168058      <description>General Purpose Input/Output</description>
168059      <groupName>GPIO</groupName>
168060      <prependToName>GPIOE_</prependToName>
168061      <baseAddress>0x400FF100</baseAddress>
168062      <addressBlock>
168063        <offset>0</offset>
168064        <size>0x18</size>
168065        <usage>registers</usage>
168066      </addressBlock>
168067      <interrupt>
168068        <name>PORTE</name>
168069        <value>63</value>
168070      </interrupt>
168071      <registers>
168072        <register>
168073          <name>PDOR</name>
168074          <description>Port Data Output Register</description>
168075          <addressOffset>0</addressOffset>
168076          <size>32</size>
168077          <access>read-write</access>
168078          <resetValue>0</resetValue>
168079          <resetMask>0xFFFFFFFF</resetMask>
168080          <fields>
168081            <field>
168082              <name>PDO0</name>
168083              <description>Port Data Output</description>
168084              <bitOffset>0</bitOffset>
168085              <bitWidth>1</bitWidth>
168086              <access>read-write</access>
168087              <enumeratedValues>
168088                <enumeratedValue>
168089                  <name>0</name>
168090                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168091                  <value>#0</value>
168092                </enumeratedValue>
168093                <enumeratedValue>
168094                  <name>1</name>
168095                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168096                  <value>#1</value>
168097                </enumeratedValue>
168098              </enumeratedValues>
168099            </field>
168100            <field>
168101              <name>PDO1</name>
168102              <description>Port Data Output</description>
168103              <bitOffset>1</bitOffset>
168104              <bitWidth>1</bitWidth>
168105              <access>read-write</access>
168106              <enumeratedValues>
168107                <enumeratedValue>
168108                  <name>0</name>
168109                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168110                  <value>#0</value>
168111                </enumeratedValue>
168112                <enumeratedValue>
168113                  <name>1</name>
168114                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168115                  <value>#1</value>
168116                </enumeratedValue>
168117              </enumeratedValues>
168118            </field>
168119            <field>
168120              <name>PDO2</name>
168121              <description>Port Data Output</description>
168122              <bitOffset>2</bitOffset>
168123              <bitWidth>1</bitWidth>
168124              <access>read-write</access>
168125              <enumeratedValues>
168126                <enumeratedValue>
168127                  <name>0</name>
168128                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168129                  <value>#0</value>
168130                </enumeratedValue>
168131                <enumeratedValue>
168132                  <name>1</name>
168133                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168134                  <value>#1</value>
168135                </enumeratedValue>
168136              </enumeratedValues>
168137            </field>
168138            <field>
168139              <name>PDO3</name>
168140              <description>Port Data Output</description>
168141              <bitOffset>3</bitOffset>
168142              <bitWidth>1</bitWidth>
168143              <access>read-write</access>
168144              <enumeratedValues>
168145                <enumeratedValue>
168146                  <name>0</name>
168147                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168148                  <value>#0</value>
168149                </enumeratedValue>
168150                <enumeratedValue>
168151                  <name>1</name>
168152                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168153                  <value>#1</value>
168154                </enumeratedValue>
168155              </enumeratedValues>
168156            </field>
168157            <field>
168158              <name>PDO4</name>
168159              <description>Port Data Output</description>
168160              <bitOffset>4</bitOffset>
168161              <bitWidth>1</bitWidth>
168162              <access>read-write</access>
168163              <enumeratedValues>
168164                <enumeratedValue>
168165                  <name>0</name>
168166                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168167                  <value>#0</value>
168168                </enumeratedValue>
168169                <enumeratedValue>
168170                  <name>1</name>
168171                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168172                  <value>#1</value>
168173                </enumeratedValue>
168174              </enumeratedValues>
168175            </field>
168176            <field>
168177              <name>PDO5</name>
168178              <description>Port Data Output</description>
168179              <bitOffset>5</bitOffset>
168180              <bitWidth>1</bitWidth>
168181              <access>read-write</access>
168182              <enumeratedValues>
168183                <enumeratedValue>
168184                  <name>0</name>
168185                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168186                  <value>#0</value>
168187                </enumeratedValue>
168188                <enumeratedValue>
168189                  <name>1</name>
168190                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168191                  <value>#1</value>
168192                </enumeratedValue>
168193              </enumeratedValues>
168194            </field>
168195            <field>
168196              <name>PDO6</name>
168197              <description>Port Data Output</description>
168198              <bitOffset>6</bitOffset>
168199              <bitWidth>1</bitWidth>
168200              <access>read-write</access>
168201              <enumeratedValues>
168202                <enumeratedValue>
168203                  <name>0</name>
168204                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168205                  <value>#0</value>
168206                </enumeratedValue>
168207                <enumeratedValue>
168208                  <name>1</name>
168209                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168210                  <value>#1</value>
168211                </enumeratedValue>
168212              </enumeratedValues>
168213            </field>
168214            <field>
168215              <name>PDO7</name>
168216              <description>Port Data Output</description>
168217              <bitOffset>7</bitOffset>
168218              <bitWidth>1</bitWidth>
168219              <access>read-write</access>
168220              <enumeratedValues>
168221                <enumeratedValue>
168222                  <name>0</name>
168223                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168224                  <value>#0</value>
168225                </enumeratedValue>
168226                <enumeratedValue>
168227                  <name>1</name>
168228                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168229                  <value>#1</value>
168230                </enumeratedValue>
168231              </enumeratedValues>
168232            </field>
168233            <field>
168234              <name>PDO8</name>
168235              <description>Port Data Output</description>
168236              <bitOffset>8</bitOffset>
168237              <bitWidth>1</bitWidth>
168238              <access>read-write</access>
168239              <enumeratedValues>
168240                <enumeratedValue>
168241                  <name>0</name>
168242                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168243                  <value>#0</value>
168244                </enumeratedValue>
168245                <enumeratedValue>
168246                  <name>1</name>
168247                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168248                  <value>#1</value>
168249                </enumeratedValue>
168250              </enumeratedValues>
168251            </field>
168252            <field>
168253              <name>PDO9</name>
168254              <description>Port Data Output</description>
168255              <bitOffset>9</bitOffset>
168256              <bitWidth>1</bitWidth>
168257              <access>read-write</access>
168258              <enumeratedValues>
168259                <enumeratedValue>
168260                  <name>0</name>
168261                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168262                  <value>#0</value>
168263                </enumeratedValue>
168264                <enumeratedValue>
168265                  <name>1</name>
168266                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168267                  <value>#1</value>
168268                </enumeratedValue>
168269              </enumeratedValues>
168270            </field>
168271            <field>
168272              <name>PDO10</name>
168273              <description>Port Data Output</description>
168274              <bitOffset>10</bitOffset>
168275              <bitWidth>1</bitWidth>
168276              <access>read-write</access>
168277              <enumeratedValues>
168278                <enumeratedValue>
168279                  <name>0</name>
168280                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168281                  <value>#0</value>
168282                </enumeratedValue>
168283                <enumeratedValue>
168284                  <name>1</name>
168285                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168286                  <value>#1</value>
168287                </enumeratedValue>
168288              </enumeratedValues>
168289            </field>
168290            <field>
168291              <name>PDO11</name>
168292              <description>Port Data Output</description>
168293              <bitOffset>11</bitOffset>
168294              <bitWidth>1</bitWidth>
168295              <access>read-write</access>
168296              <enumeratedValues>
168297                <enumeratedValue>
168298                  <name>0</name>
168299                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168300                  <value>#0</value>
168301                </enumeratedValue>
168302                <enumeratedValue>
168303                  <name>1</name>
168304                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168305                  <value>#1</value>
168306                </enumeratedValue>
168307              </enumeratedValues>
168308            </field>
168309            <field>
168310              <name>PDO12</name>
168311              <description>Port Data Output</description>
168312              <bitOffset>12</bitOffset>
168313              <bitWidth>1</bitWidth>
168314              <access>read-write</access>
168315              <enumeratedValues>
168316                <enumeratedValue>
168317                  <name>0</name>
168318                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168319                  <value>#0</value>
168320                </enumeratedValue>
168321                <enumeratedValue>
168322                  <name>1</name>
168323                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168324                  <value>#1</value>
168325                </enumeratedValue>
168326              </enumeratedValues>
168327            </field>
168328            <field>
168329              <name>PDO13</name>
168330              <description>Port Data Output</description>
168331              <bitOffset>13</bitOffset>
168332              <bitWidth>1</bitWidth>
168333              <access>read-write</access>
168334              <enumeratedValues>
168335                <enumeratedValue>
168336                  <name>0</name>
168337                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168338                  <value>#0</value>
168339                </enumeratedValue>
168340                <enumeratedValue>
168341                  <name>1</name>
168342                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168343                  <value>#1</value>
168344                </enumeratedValue>
168345              </enumeratedValues>
168346            </field>
168347            <field>
168348              <name>PDO14</name>
168349              <description>Port Data Output</description>
168350              <bitOffset>14</bitOffset>
168351              <bitWidth>1</bitWidth>
168352              <access>read-write</access>
168353              <enumeratedValues>
168354                <enumeratedValue>
168355                  <name>0</name>
168356                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168357                  <value>#0</value>
168358                </enumeratedValue>
168359                <enumeratedValue>
168360                  <name>1</name>
168361                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168362                  <value>#1</value>
168363                </enumeratedValue>
168364              </enumeratedValues>
168365            </field>
168366            <field>
168367              <name>PDO15</name>
168368              <description>Port Data Output</description>
168369              <bitOffset>15</bitOffset>
168370              <bitWidth>1</bitWidth>
168371              <access>read-write</access>
168372              <enumeratedValues>
168373                <enumeratedValue>
168374                  <name>0</name>
168375                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168376                  <value>#0</value>
168377                </enumeratedValue>
168378                <enumeratedValue>
168379                  <name>1</name>
168380                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168381                  <value>#1</value>
168382                </enumeratedValue>
168383              </enumeratedValues>
168384            </field>
168385            <field>
168386              <name>PDO16</name>
168387              <description>Port Data Output</description>
168388              <bitOffset>16</bitOffset>
168389              <bitWidth>1</bitWidth>
168390              <access>read-write</access>
168391              <enumeratedValues>
168392                <enumeratedValue>
168393                  <name>0</name>
168394                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168395                  <value>#0</value>
168396                </enumeratedValue>
168397                <enumeratedValue>
168398                  <name>1</name>
168399                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168400                  <value>#1</value>
168401                </enumeratedValue>
168402              </enumeratedValues>
168403            </field>
168404            <field>
168405              <name>PDO17</name>
168406              <description>Port Data Output</description>
168407              <bitOffset>17</bitOffset>
168408              <bitWidth>1</bitWidth>
168409              <access>read-write</access>
168410              <enumeratedValues>
168411                <enumeratedValue>
168412                  <name>0</name>
168413                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168414                  <value>#0</value>
168415                </enumeratedValue>
168416                <enumeratedValue>
168417                  <name>1</name>
168418                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168419                  <value>#1</value>
168420                </enumeratedValue>
168421              </enumeratedValues>
168422            </field>
168423            <field>
168424              <name>PDO18</name>
168425              <description>Port Data Output</description>
168426              <bitOffset>18</bitOffset>
168427              <bitWidth>1</bitWidth>
168428              <access>read-write</access>
168429              <enumeratedValues>
168430                <enumeratedValue>
168431                  <name>0</name>
168432                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168433                  <value>#0</value>
168434                </enumeratedValue>
168435                <enumeratedValue>
168436                  <name>1</name>
168437                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168438                  <value>#1</value>
168439                </enumeratedValue>
168440              </enumeratedValues>
168441            </field>
168442            <field>
168443              <name>PDO19</name>
168444              <description>Port Data Output</description>
168445              <bitOffset>19</bitOffset>
168446              <bitWidth>1</bitWidth>
168447              <access>read-write</access>
168448              <enumeratedValues>
168449                <enumeratedValue>
168450                  <name>0</name>
168451                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168452                  <value>#0</value>
168453                </enumeratedValue>
168454                <enumeratedValue>
168455                  <name>1</name>
168456                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168457                  <value>#1</value>
168458                </enumeratedValue>
168459              </enumeratedValues>
168460            </field>
168461            <field>
168462              <name>PDO20</name>
168463              <description>Port Data Output</description>
168464              <bitOffset>20</bitOffset>
168465              <bitWidth>1</bitWidth>
168466              <access>read-write</access>
168467              <enumeratedValues>
168468                <enumeratedValue>
168469                  <name>0</name>
168470                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168471                  <value>#0</value>
168472                </enumeratedValue>
168473                <enumeratedValue>
168474                  <name>1</name>
168475                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168476                  <value>#1</value>
168477                </enumeratedValue>
168478              </enumeratedValues>
168479            </field>
168480            <field>
168481              <name>PDO21</name>
168482              <description>Port Data Output</description>
168483              <bitOffset>21</bitOffset>
168484              <bitWidth>1</bitWidth>
168485              <access>read-write</access>
168486              <enumeratedValues>
168487                <enumeratedValue>
168488                  <name>0</name>
168489                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168490                  <value>#0</value>
168491                </enumeratedValue>
168492                <enumeratedValue>
168493                  <name>1</name>
168494                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168495                  <value>#1</value>
168496                </enumeratedValue>
168497              </enumeratedValues>
168498            </field>
168499            <field>
168500              <name>PDO22</name>
168501              <description>Port Data Output</description>
168502              <bitOffset>22</bitOffset>
168503              <bitWidth>1</bitWidth>
168504              <access>read-write</access>
168505              <enumeratedValues>
168506                <enumeratedValue>
168507                  <name>0</name>
168508                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168509                  <value>#0</value>
168510                </enumeratedValue>
168511                <enumeratedValue>
168512                  <name>1</name>
168513                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168514                  <value>#1</value>
168515                </enumeratedValue>
168516              </enumeratedValues>
168517            </field>
168518            <field>
168519              <name>PDO23</name>
168520              <description>Port Data Output</description>
168521              <bitOffset>23</bitOffset>
168522              <bitWidth>1</bitWidth>
168523              <access>read-write</access>
168524              <enumeratedValues>
168525                <enumeratedValue>
168526                  <name>0</name>
168527                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168528                  <value>#0</value>
168529                </enumeratedValue>
168530                <enumeratedValue>
168531                  <name>1</name>
168532                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168533                  <value>#1</value>
168534                </enumeratedValue>
168535              </enumeratedValues>
168536            </field>
168537            <field>
168538              <name>PDO24</name>
168539              <description>Port Data Output</description>
168540              <bitOffset>24</bitOffset>
168541              <bitWidth>1</bitWidth>
168542              <access>read-write</access>
168543              <enumeratedValues>
168544                <enumeratedValue>
168545                  <name>0</name>
168546                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168547                  <value>#0</value>
168548                </enumeratedValue>
168549                <enumeratedValue>
168550                  <name>1</name>
168551                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168552                  <value>#1</value>
168553                </enumeratedValue>
168554              </enumeratedValues>
168555            </field>
168556            <field>
168557              <name>PDO25</name>
168558              <description>Port Data Output</description>
168559              <bitOffset>25</bitOffset>
168560              <bitWidth>1</bitWidth>
168561              <access>read-write</access>
168562              <enumeratedValues>
168563                <enumeratedValue>
168564                  <name>0</name>
168565                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168566                  <value>#0</value>
168567                </enumeratedValue>
168568                <enumeratedValue>
168569                  <name>1</name>
168570                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168571                  <value>#1</value>
168572                </enumeratedValue>
168573              </enumeratedValues>
168574            </field>
168575            <field>
168576              <name>PDO26</name>
168577              <description>Port Data Output</description>
168578              <bitOffset>26</bitOffset>
168579              <bitWidth>1</bitWidth>
168580              <access>read-write</access>
168581              <enumeratedValues>
168582                <enumeratedValue>
168583                  <name>0</name>
168584                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168585                  <value>#0</value>
168586                </enumeratedValue>
168587                <enumeratedValue>
168588                  <name>1</name>
168589                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168590                  <value>#1</value>
168591                </enumeratedValue>
168592              </enumeratedValues>
168593            </field>
168594            <field>
168595              <name>PDO27</name>
168596              <description>Port Data Output</description>
168597              <bitOffset>27</bitOffset>
168598              <bitWidth>1</bitWidth>
168599              <access>read-write</access>
168600              <enumeratedValues>
168601                <enumeratedValue>
168602                  <name>0</name>
168603                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168604                  <value>#0</value>
168605                </enumeratedValue>
168606                <enumeratedValue>
168607                  <name>1</name>
168608                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168609                  <value>#1</value>
168610                </enumeratedValue>
168611              </enumeratedValues>
168612            </field>
168613            <field>
168614              <name>PDO28</name>
168615              <description>Port Data Output</description>
168616              <bitOffset>28</bitOffset>
168617              <bitWidth>1</bitWidth>
168618              <access>read-write</access>
168619              <enumeratedValues>
168620                <enumeratedValue>
168621                  <name>0</name>
168622                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168623                  <value>#0</value>
168624                </enumeratedValue>
168625                <enumeratedValue>
168626                  <name>1</name>
168627                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168628                  <value>#1</value>
168629                </enumeratedValue>
168630              </enumeratedValues>
168631            </field>
168632            <field>
168633              <name>PDO29</name>
168634              <description>Port Data Output</description>
168635              <bitOffset>29</bitOffset>
168636              <bitWidth>1</bitWidth>
168637              <access>read-write</access>
168638              <enumeratedValues>
168639                <enumeratedValue>
168640                  <name>0</name>
168641                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168642                  <value>#0</value>
168643                </enumeratedValue>
168644                <enumeratedValue>
168645                  <name>1</name>
168646                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168647                  <value>#1</value>
168648                </enumeratedValue>
168649              </enumeratedValues>
168650            </field>
168651            <field>
168652              <name>PDO30</name>
168653              <description>Port Data Output</description>
168654              <bitOffset>30</bitOffset>
168655              <bitWidth>1</bitWidth>
168656              <access>read-write</access>
168657              <enumeratedValues>
168658                <enumeratedValue>
168659                  <name>0</name>
168660                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168661                  <value>#0</value>
168662                </enumeratedValue>
168663                <enumeratedValue>
168664                  <name>1</name>
168665                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168666                  <value>#1</value>
168667                </enumeratedValue>
168668              </enumeratedValues>
168669            </field>
168670            <field>
168671              <name>PDO31</name>
168672              <description>Port Data Output</description>
168673              <bitOffset>31</bitOffset>
168674              <bitWidth>1</bitWidth>
168675              <access>read-write</access>
168676              <enumeratedValues>
168677                <enumeratedValue>
168678                  <name>0</name>
168679                  <description>Logic level 0 is driven on pin, provided pin is configured for general-purpose output.</description>
168680                  <value>#0</value>
168681                </enumeratedValue>
168682                <enumeratedValue>
168683                  <name>1</name>
168684                  <description>Logic level 1 is driven on pin, provided pin is configured for general-purpose output.</description>
168685                  <value>#1</value>
168686                </enumeratedValue>
168687              </enumeratedValues>
168688            </field>
168689          </fields>
168690        </register>
168691        <register>
168692          <name>PSOR</name>
168693          <description>Port Set Output Register</description>
168694          <addressOffset>0x4</addressOffset>
168695          <size>32</size>
168696          <access>write-only</access>
168697          <resetValue>0</resetValue>
168698          <resetMask>0xFFFFFFFF</resetMask>
168699          <fields>
168700            <field>
168701              <name>PTSO0</name>
168702              <description>Port Set Output</description>
168703              <bitOffset>0</bitOffset>
168704              <bitWidth>1</bitWidth>
168705              <access>write-only</access>
168706              <enumeratedValues>
168707                <enumeratedValue>
168708                  <name>0</name>
168709                  <description>Corresponding bit in PDORn does not change.</description>
168710                  <value>#0</value>
168711                </enumeratedValue>
168712                <enumeratedValue>
168713                  <name>1</name>
168714                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168715                  <value>#1</value>
168716                </enumeratedValue>
168717              </enumeratedValues>
168718            </field>
168719            <field>
168720              <name>PTSO1</name>
168721              <description>Port Set Output</description>
168722              <bitOffset>1</bitOffset>
168723              <bitWidth>1</bitWidth>
168724              <access>write-only</access>
168725              <enumeratedValues>
168726                <enumeratedValue>
168727                  <name>0</name>
168728                  <description>Corresponding bit in PDORn does not change.</description>
168729                  <value>#0</value>
168730                </enumeratedValue>
168731                <enumeratedValue>
168732                  <name>1</name>
168733                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168734                  <value>#1</value>
168735                </enumeratedValue>
168736              </enumeratedValues>
168737            </field>
168738            <field>
168739              <name>PTSO2</name>
168740              <description>Port Set Output</description>
168741              <bitOffset>2</bitOffset>
168742              <bitWidth>1</bitWidth>
168743              <access>write-only</access>
168744              <enumeratedValues>
168745                <enumeratedValue>
168746                  <name>0</name>
168747                  <description>Corresponding bit in PDORn does not change.</description>
168748                  <value>#0</value>
168749                </enumeratedValue>
168750                <enumeratedValue>
168751                  <name>1</name>
168752                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168753                  <value>#1</value>
168754                </enumeratedValue>
168755              </enumeratedValues>
168756            </field>
168757            <field>
168758              <name>PTSO3</name>
168759              <description>Port Set Output</description>
168760              <bitOffset>3</bitOffset>
168761              <bitWidth>1</bitWidth>
168762              <access>write-only</access>
168763              <enumeratedValues>
168764                <enumeratedValue>
168765                  <name>0</name>
168766                  <description>Corresponding bit in PDORn does not change.</description>
168767                  <value>#0</value>
168768                </enumeratedValue>
168769                <enumeratedValue>
168770                  <name>1</name>
168771                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168772                  <value>#1</value>
168773                </enumeratedValue>
168774              </enumeratedValues>
168775            </field>
168776            <field>
168777              <name>PTSO4</name>
168778              <description>Port Set Output</description>
168779              <bitOffset>4</bitOffset>
168780              <bitWidth>1</bitWidth>
168781              <access>write-only</access>
168782              <enumeratedValues>
168783                <enumeratedValue>
168784                  <name>0</name>
168785                  <description>Corresponding bit in PDORn does not change.</description>
168786                  <value>#0</value>
168787                </enumeratedValue>
168788                <enumeratedValue>
168789                  <name>1</name>
168790                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168791                  <value>#1</value>
168792                </enumeratedValue>
168793              </enumeratedValues>
168794            </field>
168795            <field>
168796              <name>PTSO5</name>
168797              <description>Port Set Output</description>
168798              <bitOffset>5</bitOffset>
168799              <bitWidth>1</bitWidth>
168800              <access>write-only</access>
168801              <enumeratedValues>
168802                <enumeratedValue>
168803                  <name>0</name>
168804                  <description>Corresponding bit in PDORn does not change.</description>
168805                  <value>#0</value>
168806                </enumeratedValue>
168807                <enumeratedValue>
168808                  <name>1</name>
168809                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168810                  <value>#1</value>
168811                </enumeratedValue>
168812              </enumeratedValues>
168813            </field>
168814            <field>
168815              <name>PTSO6</name>
168816              <description>Port Set Output</description>
168817              <bitOffset>6</bitOffset>
168818              <bitWidth>1</bitWidth>
168819              <access>write-only</access>
168820              <enumeratedValues>
168821                <enumeratedValue>
168822                  <name>0</name>
168823                  <description>Corresponding bit in PDORn does not change.</description>
168824                  <value>#0</value>
168825                </enumeratedValue>
168826                <enumeratedValue>
168827                  <name>1</name>
168828                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168829                  <value>#1</value>
168830                </enumeratedValue>
168831              </enumeratedValues>
168832            </field>
168833            <field>
168834              <name>PTSO7</name>
168835              <description>Port Set Output</description>
168836              <bitOffset>7</bitOffset>
168837              <bitWidth>1</bitWidth>
168838              <access>write-only</access>
168839              <enumeratedValues>
168840                <enumeratedValue>
168841                  <name>0</name>
168842                  <description>Corresponding bit in PDORn does not change.</description>
168843                  <value>#0</value>
168844                </enumeratedValue>
168845                <enumeratedValue>
168846                  <name>1</name>
168847                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168848                  <value>#1</value>
168849                </enumeratedValue>
168850              </enumeratedValues>
168851            </field>
168852            <field>
168853              <name>PTSO8</name>
168854              <description>Port Set Output</description>
168855              <bitOffset>8</bitOffset>
168856              <bitWidth>1</bitWidth>
168857              <access>write-only</access>
168858              <enumeratedValues>
168859                <enumeratedValue>
168860                  <name>0</name>
168861                  <description>Corresponding bit in PDORn does not change.</description>
168862                  <value>#0</value>
168863                </enumeratedValue>
168864                <enumeratedValue>
168865                  <name>1</name>
168866                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168867                  <value>#1</value>
168868                </enumeratedValue>
168869              </enumeratedValues>
168870            </field>
168871            <field>
168872              <name>PTSO9</name>
168873              <description>Port Set Output</description>
168874              <bitOffset>9</bitOffset>
168875              <bitWidth>1</bitWidth>
168876              <access>write-only</access>
168877              <enumeratedValues>
168878                <enumeratedValue>
168879                  <name>0</name>
168880                  <description>Corresponding bit in PDORn does not change.</description>
168881                  <value>#0</value>
168882                </enumeratedValue>
168883                <enumeratedValue>
168884                  <name>1</name>
168885                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168886                  <value>#1</value>
168887                </enumeratedValue>
168888              </enumeratedValues>
168889            </field>
168890            <field>
168891              <name>PTSO10</name>
168892              <description>Port Set Output</description>
168893              <bitOffset>10</bitOffset>
168894              <bitWidth>1</bitWidth>
168895              <access>write-only</access>
168896              <enumeratedValues>
168897                <enumeratedValue>
168898                  <name>0</name>
168899                  <description>Corresponding bit in PDORn does not change.</description>
168900                  <value>#0</value>
168901                </enumeratedValue>
168902                <enumeratedValue>
168903                  <name>1</name>
168904                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168905                  <value>#1</value>
168906                </enumeratedValue>
168907              </enumeratedValues>
168908            </field>
168909            <field>
168910              <name>PTSO11</name>
168911              <description>Port Set Output</description>
168912              <bitOffset>11</bitOffset>
168913              <bitWidth>1</bitWidth>
168914              <access>write-only</access>
168915              <enumeratedValues>
168916                <enumeratedValue>
168917                  <name>0</name>
168918                  <description>Corresponding bit in PDORn does not change.</description>
168919                  <value>#0</value>
168920                </enumeratedValue>
168921                <enumeratedValue>
168922                  <name>1</name>
168923                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168924                  <value>#1</value>
168925                </enumeratedValue>
168926              </enumeratedValues>
168927            </field>
168928            <field>
168929              <name>PTSO12</name>
168930              <description>Port Set Output</description>
168931              <bitOffset>12</bitOffset>
168932              <bitWidth>1</bitWidth>
168933              <access>write-only</access>
168934              <enumeratedValues>
168935                <enumeratedValue>
168936                  <name>0</name>
168937                  <description>Corresponding bit in PDORn does not change.</description>
168938                  <value>#0</value>
168939                </enumeratedValue>
168940                <enumeratedValue>
168941                  <name>1</name>
168942                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168943                  <value>#1</value>
168944                </enumeratedValue>
168945              </enumeratedValues>
168946            </field>
168947            <field>
168948              <name>PTSO13</name>
168949              <description>Port Set Output</description>
168950              <bitOffset>13</bitOffset>
168951              <bitWidth>1</bitWidth>
168952              <access>write-only</access>
168953              <enumeratedValues>
168954                <enumeratedValue>
168955                  <name>0</name>
168956                  <description>Corresponding bit in PDORn does not change.</description>
168957                  <value>#0</value>
168958                </enumeratedValue>
168959                <enumeratedValue>
168960                  <name>1</name>
168961                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168962                  <value>#1</value>
168963                </enumeratedValue>
168964              </enumeratedValues>
168965            </field>
168966            <field>
168967              <name>PTSO14</name>
168968              <description>Port Set Output</description>
168969              <bitOffset>14</bitOffset>
168970              <bitWidth>1</bitWidth>
168971              <access>write-only</access>
168972              <enumeratedValues>
168973                <enumeratedValue>
168974                  <name>0</name>
168975                  <description>Corresponding bit in PDORn does not change.</description>
168976                  <value>#0</value>
168977                </enumeratedValue>
168978                <enumeratedValue>
168979                  <name>1</name>
168980                  <description>Corresponding bit in PDORn is set to logic 1.</description>
168981                  <value>#1</value>
168982                </enumeratedValue>
168983              </enumeratedValues>
168984            </field>
168985            <field>
168986              <name>PTSO15</name>
168987              <description>Port Set Output</description>
168988              <bitOffset>15</bitOffset>
168989              <bitWidth>1</bitWidth>
168990              <access>write-only</access>
168991              <enumeratedValues>
168992                <enumeratedValue>
168993                  <name>0</name>
168994                  <description>Corresponding bit in PDORn does not change.</description>
168995                  <value>#0</value>
168996                </enumeratedValue>
168997                <enumeratedValue>
168998                  <name>1</name>
168999                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169000                  <value>#1</value>
169001                </enumeratedValue>
169002              </enumeratedValues>
169003            </field>
169004            <field>
169005              <name>PTSO16</name>
169006              <description>Port Set Output</description>
169007              <bitOffset>16</bitOffset>
169008              <bitWidth>1</bitWidth>
169009              <access>write-only</access>
169010              <enumeratedValues>
169011                <enumeratedValue>
169012                  <name>0</name>
169013                  <description>Corresponding bit in PDORn does not change.</description>
169014                  <value>#0</value>
169015                </enumeratedValue>
169016                <enumeratedValue>
169017                  <name>1</name>
169018                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169019                  <value>#1</value>
169020                </enumeratedValue>
169021              </enumeratedValues>
169022            </field>
169023            <field>
169024              <name>PTSO17</name>
169025              <description>Port Set Output</description>
169026              <bitOffset>17</bitOffset>
169027              <bitWidth>1</bitWidth>
169028              <access>write-only</access>
169029              <enumeratedValues>
169030                <enumeratedValue>
169031                  <name>0</name>
169032                  <description>Corresponding bit in PDORn does not change.</description>
169033                  <value>#0</value>
169034                </enumeratedValue>
169035                <enumeratedValue>
169036                  <name>1</name>
169037                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169038                  <value>#1</value>
169039                </enumeratedValue>
169040              </enumeratedValues>
169041            </field>
169042            <field>
169043              <name>PTSO18</name>
169044              <description>Port Set Output</description>
169045              <bitOffset>18</bitOffset>
169046              <bitWidth>1</bitWidth>
169047              <access>write-only</access>
169048              <enumeratedValues>
169049                <enumeratedValue>
169050                  <name>0</name>
169051                  <description>Corresponding bit in PDORn does not change.</description>
169052                  <value>#0</value>
169053                </enumeratedValue>
169054                <enumeratedValue>
169055                  <name>1</name>
169056                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169057                  <value>#1</value>
169058                </enumeratedValue>
169059              </enumeratedValues>
169060            </field>
169061            <field>
169062              <name>PTSO19</name>
169063              <description>Port Set Output</description>
169064              <bitOffset>19</bitOffset>
169065              <bitWidth>1</bitWidth>
169066              <access>write-only</access>
169067              <enumeratedValues>
169068                <enumeratedValue>
169069                  <name>0</name>
169070                  <description>Corresponding bit in PDORn does not change.</description>
169071                  <value>#0</value>
169072                </enumeratedValue>
169073                <enumeratedValue>
169074                  <name>1</name>
169075                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169076                  <value>#1</value>
169077                </enumeratedValue>
169078              </enumeratedValues>
169079            </field>
169080            <field>
169081              <name>PTSO20</name>
169082              <description>Port Set Output</description>
169083              <bitOffset>20</bitOffset>
169084              <bitWidth>1</bitWidth>
169085              <access>write-only</access>
169086              <enumeratedValues>
169087                <enumeratedValue>
169088                  <name>0</name>
169089                  <description>Corresponding bit in PDORn does not change.</description>
169090                  <value>#0</value>
169091                </enumeratedValue>
169092                <enumeratedValue>
169093                  <name>1</name>
169094                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169095                  <value>#1</value>
169096                </enumeratedValue>
169097              </enumeratedValues>
169098            </field>
169099            <field>
169100              <name>PTSO21</name>
169101              <description>Port Set Output</description>
169102              <bitOffset>21</bitOffset>
169103              <bitWidth>1</bitWidth>
169104              <access>write-only</access>
169105              <enumeratedValues>
169106                <enumeratedValue>
169107                  <name>0</name>
169108                  <description>Corresponding bit in PDORn does not change.</description>
169109                  <value>#0</value>
169110                </enumeratedValue>
169111                <enumeratedValue>
169112                  <name>1</name>
169113                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169114                  <value>#1</value>
169115                </enumeratedValue>
169116              </enumeratedValues>
169117            </field>
169118            <field>
169119              <name>PTSO22</name>
169120              <description>Port Set Output</description>
169121              <bitOffset>22</bitOffset>
169122              <bitWidth>1</bitWidth>
169123              <access>write-only</access>
169124              <enumeratedValues>
169125                <enumeratedValue>
169126                  <name>0</name>
169127                  <description>Corresponding bit in PDORn does not change.</description>
169128                  <value>#0</value>
169129                </enumeratedValue>
169130                <enumeratedValue>
169131                  <name>1</name>
169132                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169133                  <value>#1</value>
169134                </enumeratedValue>
169135              </enumeratedValues>
169136            </field>
169137            <field>
169138              <name>PTSO23</name>
169139              <description>Port Set Output</description>
169140              <bitOffset>23</bitOffset>
169141              <bitWidth>1</bitWidth>
169142              <access>write-only</access>
169143              <enumeratedValues>
169144                <enumeratedValue>
169145                  <name>0</name>
169146                  <description>Corresponding bit in PDORn does not change.</description>
169147                  <value>#0</value>
169148                </enumeratedValue>
169149                <enumeratedValue>
169150                  <name>1</name>
169151                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169152                  <value>#1</value>
169153                </enumeratedValue>
169154              </enumeratedValues>
169155            </field>
169156            <field>
169157              <name>PTSO24</name>
169158              <description>Port Set Output</description>
169159              <bitOffset>24</bitOffset>
169160              <bitWidth>1</bitWidth>
169161              <access>write-only</access>
169162              <enumeratedValues>
169163                <enumeratedValue>
169164                  <name>0</name>
169165                  <description>Corresponding bit in PDORn does not change.</description>
169166                  <value>#0</value>
169167                </enumeratedValue>
169168                <enumeratedValue>
169169                  <name>1</name>
169170                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169171                  <value>#1</value>
169172                </enumeratedValue>
169173              </enumeratedValues>
169174            </field>
169175            <field>
169176              <name>PTSO25</name>
169177              <description>Port Set Output</description>
169178              <bitOffset>25</bitOffset>
169179              <bitWidth>1</bitWidth>
169180              <access>write-only</access>
169181              <enumeratedValues>
169182                <enumeratedValue>
169183                  <name>0</name>
169184                  <description>Corresponding bit in PDORn does not change.</description>
169185                  <value>#0</value>
169186                </enumeratedValue>
169187                <enumeratedValue>
169188                  <name>1</name>
169189                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169190                  <value>#1</value>
169191                </enumeratedValue>
169192              </enumeratedValues>
169193            </field>
169194            <field>
169195              <name>PTSO26</name>
169196              <description>Port Set Output</description>
169197              <bitOffset>26</bitOffset>
169198              <bitWidth>1</bitWidth>
169199              <access>write-only</access>
169200              <enumeratedValues>
169201                <enumeratedValue>
169202                  <name>0</name>
169203                  <description>Corresponding bit in PDORn does not change.</description>
169204                  <value>#0</value>
169205                </enumeratedValue>
169206                <enumeratedValue>
169207                  <name>1</name>
169208                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169209                  <value>#1</value>
169210                </enumeratedValue>
169211              </enumeratedValues>
169212            </field>
169213            <field>
169214              <name>PTSO27</name>
169215              <description>Port Set Output</description>
169216              <bitOffset>27</bitOffset>
169217              <bitWidth>1</bitWidth>
169218              <access>write-only</access>
169219              <enumeratedValues>
169220                <enumeratedValue>
169221                  <name>0</name>
169222                  <description>Corresponding bit in PDORn does not change.</description>
169223                  <value>#0</value>
169224                </enumeratedValue>
169225                <enumeratedValue>
169226                  <name>1</name>
169227                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169228                  <value>#1</value>
169229                </enumeratedValue>
169230              </enumeratedValues>
169231            </field>
169232            <field>
169233              <name>PTSO28</name>
169234              <description>Port Set Output</description>
169235              <bitOffset>28</bitOffset>
169236              <bitWidth>1</bitWidth>
169237              <access>write-only</access>
169238              <enumeratedValues>
169239                <enumeratedValue>
169240                  <name>0</name>
169241                  <description>Corresponding bit in PDORn does not change.</description>
169242                  <value>#0</value>
169243                </enumeratedValue>
169244                <enumeratedValue>
169245                  <name>1</name>
169246                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169247                  <value>#1</value>
169248                </enumeratedValue>
169249              </enumeratedValues>
169250            </field>
169251            <field>
169252              <name>PTSO29</name>
169253              <description>Port Set Output</description>
169254              <bitOffset>29</bitOffset>
169255              <bitWidth>1</bitWidth>
169256              <access>write-only</access>
169257              <enumeratedValues>
169258                <enumeratedValue>
169259                  <name>0</name>
169260                  <description>Corresponding bit in PDORn does not change.</description>
169261                  <value>#0</value>
169262                </enumeratedValue>
169263                <enumeratedValue>
169264                  <name>1</name>
169265                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169266                  <value>#1</value>
169267                </enumeratedValue>
169268              </enumeratedValues>
169269            </field>
169270            <field>
169271              <name>PTSO30</name>
169272              <description>Port Set Output</description>
169273              <bitOffset>30</bitOffset>
169274              <bitWidth>1</bitWidth>
169275              <access>write-only</access>
169276              <enumeratedValues>
169277                <enumeratedValue>
169278                  <name>0</name>
169279                  <description>Corresponding bit in PDORn does not change.</description>
169280                  <value>#0</value>
169281                </enumeratedValue>
169282                <enumeratedValue>
169283                  <name>1</name>
169284                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169285                  <value>#1</value>
169286                </enumeratedValue>
169287              </enumeratedValues>
169288            </field>
169289            <field>
169290              <name>PTSO31</name>
169291              <description>Port Set Output</description>
169292              <bitOffset>31</bitOffset>
169293              <bitWidth>1</bitWidth>
169294              <access>write-only</access>
169295              <enumeratedValues>
169296                <enumeratedValue>
169297                  <name>0</name>
169298                  <description>Corresponding bit in PDORn does not change.</description>
169299                  <value>#0</value>
169300                </enumeratedValue>
169301                <enumeratedValue>
169302                  <name>1</name>
169303                  <description>Corresponding bit in PDORn is set to logic 1.</description>
169304                  <value>#1</value>
169305                </enumeratedValue>
169306              </enumeratedValues>
169307            </field>
169308          </fields>
169309        </register>
169310        <register>
169311          <name>PCOR</name>
169312          <description>Port Clear Output Register</description>
169313          <addressOffset>0x8</addressOffset>
169314          <size>32</size>
169315          <access>write-only</access>
169316          <resetValue>0</resetValue>
169317          <resetMask>0xFFFFFFFF</resetMask>
169318          <fields>
169319            <field>
169320              <name>PTCO0</name>
169321              <description>Port Clear Output</description>
169322              <bitOffset>0</bitOffset>
169323              <bitWidth>1</bitWidth>
169324              <access>write-only</access>
169325              <enumeratedValues>
169326                <enumeratedValue>
169327                  <name>0</name>
169328                  <description>Corresponding bit in PDORn does not change.</description>
169329                  <value>#0</value>
169330                </enumeratedValue>
169331                <enumeratedValue>
169332                  <name>1</name>
169333                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169334                  <value>#1</value>
169335                </enumeratedValue>
169336              </enumeratedValues>
169337            </field>
169338            <field>
169339              <name>PTCO1</name>
169340              <description>Port Clear Output</description>
169341              <bitOffset>1</bitOffset>
169342              <bitWidth>1</bitWidth>
169343              <access>write-only</access>
169344              <enumeratedValues>
169345                <enumeratedValue>
169346                  <name>0</name>
169347                  <description>Corresponding bit in PDORn does not change.</description>
169348                  <value>#0</value>
169349                </enumeratedValue>
169350                <enumeratedValue>
169351                  <name>1</name>
169352                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169353                  <value>#1</value>
169354                </enumeratedValue>
169355              </enumeratedValues>
169356            </field>
169357            <field>
169358              <name>PTCO2</name>
169359              <description>Port Clear Output</description>
169360              <bitOffset>2</bitOffset>
169361              <bitWidth>1</bitWidth>
169362              <access>write-only</access>
169363              <enumeratedValues>
169364                <enumeratedValue>
169365                  <name>0</name>
169366                  <description>Corresponding bit in PDORn does not change.</description>
169367                  <value>#0</value>
169368                </enumeratedValue>
169369                <enumeratedValue>
169370                  <name>1</name>
169371                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169372                  <value>#1</value>
169373                </enumeratedValue>
169374              </enumeratedValues>
169375            </field>
169376            <field>
169377              <name>PTCO3</name>
169378              <description>Port Clear Output</description>
169379              <bitOffset>3</bitOffset>
169380              <bitWidth>1</bitWidth>
169381              <access>write-only</access>
169382              <enumeratedValues>
169383                <enumeratedValue>
169384                  <name>0</name>
169385                  <description>Corresponding bit in PDORn does not change.</description>
169386                  <value>#0</value>
169387                </enumeratedValue>
169388                <enumeratedValue>
169389                  <name>1</name>
169390                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169391                  <value>#1</value>
169392                </enumeratedValue>
169393              </enumeratedValues>
169394            </field>
169395            <field>
169396              <name>PTCO4</name>
169397              <description>Port Clear Output</description>
169398              <bitOffset>4</bitOffset>
169399              <bitWidth>1</bitWidth>
169400              <access>write-only</access>
169401              <enumeratedValues>
169402                <enumeratedValue>
169403                  <name>0</name>
169404                  <description>Corresponding bit in PDORn does not change.</description>
169405                  <value>#0</value>
169406                </enumeratedValue>
169407                <enumeratedValue>
169408                  <name>1</name>
169409                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169410                  <value>#1</value>
169411                </enumeratedValue>
169412              </enumeratedValues>
169413            </field>
169414            <field>
169415              <name>PTCO5</name>
169416              <description>Port Clear Output</description>
169417              <bitOffset>5</bitOffset>
169418              <bitWidth>1</bitWidth>
169419              <access>write-only</access>
169420              <enumeratedValues>
169421                <enumeratedValue>
169422                  <name>0</name>
169423                  <description>Corresponding bit in PDORn does not change.</description>
169424                  <value>#0</value>
169425                </enumeratedValue>
169426                <enumeratedValue>
169427                  <name>1</name>
169428                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169429                  <value>#1</value>
169430                </enumeratedValue>
169431              </enumeratedValues>
169432            </field>
169433            <field>
169434              <name>PTCO6</name>
169435              <description>Port Clear Output</description>
169436              <bitOffset>6</bitOffset>
169437              <bitWidth>1</bitWidth>
169438              <access>write-only</access>
169439              <enumeratedValues>
169440                <enumeratedValue>
169441                  <name>0</name>
169442                  <description>Corresponding bit in PDORn does not change.</description>
169443                  <value>#0</value>
169444                </enumeratedValue>
169445                <enumeratedValue>
169446                  <name>1</name>
169447                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169448                  <value>#1</value>
169449                </enumeratedValue>
169450              </enumeratedValues>
169451            </field>
169452            <field>
169453              <name>PTCO7</name>
169454              <description>Port Clear Output</description>
169455              <bitOffset>7</bitOffset>
169456              <bitWidth>1</bitWidth>
169457              <access>write-only</access>
169458              <enumeratedValues>
169459                <enumeratedValue>
169460                  <name>0</name>
169461                  <description>Corresponding bit in PDORn does not change.</description>
169462                  <value>#0</value>
169463                </enumeratedValue>
169464                <enumeratedValue>
169465                  <name>1</name>
169466                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169467                  <value>#1</value>
169468                </enumeratedValue>
169469              </enumeratedValues>
169470            </field>
169471            <field>
169472              <name>PTCO8</name>
169473              <description>Port Clear Output</description>
169474              <bitOffset>8</bitOffset>
169475              <bitWidth>1</bitWidth>
169476              <access>write-only</access>
169477              <enumeratedValues>
169478                <enumeratedValue>
169479                  <name>0</name>
169480                  <description>Corresponding bit in PDORn does not change.</description>
169481                  <value>#0</value>
169482                </enumeratedValue>
169483                <enumeratedValue>
169484                  <name>1</name>
169485                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169486                  <value>#1</value>
169487                </enumeratedValue>
169488              </enumeratedValues>
169489            </field>
169490            <field>
169491              <name>PTCO9</name>
169492              <description>Port Clear Output</description>
169493              <bitOffset>9</bitOffset>
169494              <bitWidth>1</bitWidth>
169495              <access>write-only</access>
169496              <enumeratedValues>
169497                <enumeratedValue>
169498                  <name>0</name>
169499                  <description>Corresponding bit in PDORn does not change.</description>
169500                  <value>#0</value>
169501                </enumeratedValue>
169502                <enumeratedValue>
169503                  <name>1</name>
169504                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169505                  <value>#1</value>
169506                </enumeratedValue>
169507              </enumeratedValues>
169508            </field>
169509            <field>
169510              <name>PTCO10</name>
169511              <description>Port Clear Output</description>
169512              <bitOffset>10</bitOffset>
169513              <bitWidth>1</bitWidth>
169514              <access>write-only</access>
169515              <enumeratedValues>
169516                <enumeratedValue>
169517                  <name>0</name>
169518                  <description>Corresponding bit in PDORn does not change.</description>
169519                  <value>#0</value>
169520                </enumeratedValue>
169521                <enumeratedValue>
169522                  <name>1</name>
169523                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169524                  <value>#1</value>
169525                </enumeratedValue>
169526              </enumeratedValues>
169527            </field>
169528            <field>
169529              <name>PTCO11</name>
169530              <description>Port Clear Output</description>
169531              <bitOffset>11</bitOffset>
169532              <bitWidth>1</bitWidth>
169533              <access>write-only</access>
169534              <enumeratedValues>
169535                <enumeratedValue>
169536                  <name>0</name>
169537                  <description>Corresponding bit in PDORn does not change.</description>
169538                  <value>#0</value>
169539                </enumeratedValue>
169540                <enumeratedValue>
169541                  <name>1</name>
169542                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169543                  <value>#1</value>
169544                </enumeratedValue>
169545              </enumeratedValues>
169546            </field>
169547            <field>
169548              <name>PTCO12</name>
169549              <description>Port Clear Output</description>
169550              <bitOffset>12</bitOffset>
169551              <bitWidth>1</bitWidth>
169552              <access>write-only</access>
169553              <enumeratedValues>
169554                <enumeratedValue>
169555                  <name>0</name>
169556                  <description>Corresponding bit in PDORn does not change.</description>
169557                  <value>#0</value>
169558                </enumeratedValue>
169559                <enumeratedValue>
169560                  <name>1</name>
169561                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169562                  <value>#1</value>
169563                </enumeratedValue>
169564              </enumeratedValues>
169565            </field>
169566            <field>
169567              <name>PTCO13</name>
169568              <description>Port Clear Output</description>
169569              <bitOffset>13</bitOffset>
169570              <bitWidth>1</bitWidth>
169571              <access>write-only</access>
169572              <enumeratedValues>
169573                <enumeratedValue>
169574                  <name>0</name>
169575                  <description>Corresponding bit in PDORn does not change.</description>
169576                  <value>#0</value>
169577                </enumeratedValue>
169578                <enumeratedValue>
169579                  <name>1</name>
169580                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169581                  <value>#1</value>
169582                </enumeratedValue>
169583              </enumeratedValues>
169584            </field>
169585            <field>
169586              <name>PTCO14</name>
169587              <description>Port Clear Output</description>
169588              <bitOffset>14</bitOffset>
169589              <bitWidth>1</bitWidth>
169590              <access>write-only</access>
169591              <enumeratedValues>
169592                <enumeratedValue>
169593                  <name>0</name>
169594                  <description>Corresponding bit in PDORn does not change.</description>
169595                  <value>#0</value>
169596                </enumeratedValue>
169597                <enumeratedValue>
169598                  <name>1</name>
169599                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169600                  <value>#1</value>
169601                </enumeratedValue>
169602              </enumeratedValues>
169603            </field>
169604            <field>
169605              <name>PTCO15</name>
169606              <description>Port Clear Output</description>
169607              <bitOffset>15</bitOffset>
169608              <bitWidth>1</bitWidth>
169609              <access>write-only</access>
169610              <enumeratedValues>
169611                <enumeratedValue>
169612                  <name>0</name>
169613                  <description>Corresponding bit in PDORn does not change.</description>
169614                  <value>#0</value>
169615                </enumeratedValue>
169616                <enumeratedValue>
169617                  <name>1</name>
169618                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169619                  <value>#1</value>
169620                </enumeratedValue>
169621              </enumeratedValues>
169622            </field>
169623            <field>
169624              <name>PTCO16</name>
169625              <description>Port Clear Output</description>
169626              <bitOffset>16</bitOffset>
169627              <bitWidth>1</bitWidth>
169628              <access>write-only</access>
169629              <enumeratedValues>
169630                <enumeratedValue>
169631                  <name>0</name>
169632                  <description>Corresponding bit in PDORn does not change.</description>
169633                  <value>#0</value>
169634                </enumeratedValue>
169635                <enumeratedValue>
169636                  <name>1</name>
169637                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169638                  <value>#1</value>
169639                </enumeratedValue>
169640              </enumeratedValues>
169641            </field>
169642            <field>
169643              <name>PTCO17</name>
169644              <description>Port Clear Output</description>
169645              <bitOffset>17</bitOffset>
169646              <bitWidth>1</bitWidth>
169647              <access>write-only</access>
169648              <enumeratedValues>
169649                <enumeratedValue>
169650                  <name>0</name>
169651                  <description>Corresponding bit in PDORn does not change.</description>
169652                  <value>#0</value>
169653                </enumeratedValue>
169654                <enumeratedValue>
169655                  <name>1</name>
169656                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169657                  <value>#1</value>
169658                </enumeratedValue>
169659              </enumeratedValues>
169660            </field>
169661            <field>
169662              <name>PTCO18</name>
169663              <description>Port Clear Output</description>
169664              <bitOffset>18</bitOffset>
169665              <bitWidth>1</bitWidth>
169666              <access>write-only</access>
169667              <enumeratedValues>
169668                <enumeratedValue>
169669                  <name>0</name>
169670                  <description>Corresponding bit in PDORn does not change.</description>
169671                  <value>#0</value>
169672                </enumeratedValue>
169673                <enumeratedValue>
169674                  <name>1</name>
169675                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169676                  <value>#1</value>
169677                </enumeratedValue>
169678              </enumeratedValues>
169679            </field>
169680            <field>
169681              <name>PTCO19</name>
169682              <description>Port Clear Output</description>
169683              <bitOffset>19</bitOffset>
169684              <bitWidth>1</bitWidth>
169685              <access>write-only</access>
169686              <enumeratedValues>
169687                <enumeratedValue>
169688                  <name>0</name>
169689                  <description>Corresponding bit in PDORn does not change.</description>
169690                  <value>#0</value>
169691                </enumeratedValue>
169692                <enumeratedValue>
169693                  <name>1</name>
169694                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169695                  <value>#1</value>
169696                </enumeratedValue>
169697              </enumeratedValues>
169698            </field>
169699            <field>
169700              <name>PTCO20</name>
169701              <description>Port Clear Output</description>
169702              <bitOffset>20</bitOffset>
169703              <bitWidth>1</bitWidth>
169704              <access>write-only</access>
169705              <enumeratedValues>
169706                <enumeratedValue>
169707                  <name>0</name>
169708                  <description>Corresponding bit in PDORn does not change.</description>
169709                  <value>#0</value>
169710                </enumeratedValue>
169711                <enumeratedValue>
169712                  <name>1</name>
169713                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169714                  <value>#1</value>
169715                </enumeratedValue>
169716              </enumeratedValues>
169717            </field>
169718            <field>
169719              <name>PTCO21</name>
169720              <description>Port Clear Output</description>
169721              <bitOffset>21</bitOffset>
169722              <bitWidth>1</bitWidth>
169723              <access>write-only</access>
169724              <enumeratedValues>
169725                <enumeratedValue>
169726                  <name>0</name>
169727                  <description>Corresponding bit in PDORn does not change.</description>
169728                  <value>#0</value>
169729                </enumeratedValue>
169730                <enumeratedValue>
169731                  <name>1</name>
169732                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169733                  <value>#1</value>
169734                </enumeratedValue>
169735              </enumeratedValues>
169736            </field>
169737            <field>
169738              <name>PTCO22</name>
169739              <description>Port Clear Output</description>
169740              <bitOffset>22</bitOffset>
169741              <bitWidth>1</bitWidth>
169742              <access>write-only</access>
169743              <enumeratedValues>
169744                <enumeratedValue>
169745                  <name>0</name>
169746                  <description>Corresponding bit in PDORn does not change.</description>
169747                  <value>#0</value>
169748                </enumeratedValue>
169749                <enumeratedValue>
169750                  <name>1</name>
169751                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169752                  <value>#1</value>
169753                </enumeratedValue>
169754              </enumeratedValues>
169755            </field>
169756            <field>
169757              <name>PTCO23</name>
169758              <description>Port Clear Output</description>
169759              <bitOffset>23</bitOffset>
169760              <bitWidth>1</bitWidth>
169761              <access>write-only</access>
169762              <enumeratedValues>
169763                <enumeratedValue>
169764                  <name>0</name>
169765                  <description>Corresponding bit in PDORn does not change.</description>
169766                  <value>#0</value>
169767                </enumeratedValue>
169768                <enumeratedValue>
169769                  <name>1</name>
169770                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169771                  <value>#1</value>
169772                </enumeratedValue>
169773              </enumeratedValues>
169774            </field>
169775            <field>
169776              <name>PTCO24</name>
169777              <description>Port Clear Output</description>
169778              <bitOffset>24</bitOffset>
169779              <bitWidth>1</bitWidth>
169780              <access>write-only</access>
169781              <enumeratedValues>
169782                <enumeratedValue>
169783                  <name>0</name>
169784                  <description>Corresponding bit in PDORn does not change.</description>
169785                  <value>#0</value>
169786                </enumeratedValue>
169787                <enumeratedValue>
169788                  <name>1</name>
169789                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169790                  <value>#1</value>
169791                </enumeratedValue>
169792              </enumeratedValues>
169793            </field>
169794            <field>
169795              <name>PTCO25</name>
169796              <description>Port Clear Output</description>
169797              <bitOffset>25</bitOffset>
169798              <bitWidth>1</bitWidth>
169799              <access>write-only</access>
169800              <enumeratedValues>
169801                <enumeratedValue>
169802                  <name>0</name>
169803                  <description>Corresponding bit in PDORn does not change.</description>
169804                  <value>#0</value>
169805                </enumeratedValue>
169806                <enumeratedValue>
169807                  <name>1</name>
169808                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169809                  <value>#1</value>
169810                </enumeratedValue>
169811              </enumeratedValues>
169812            </field>
169813            <field>
169814              <name>PTCO26</name>
169815              <description>Port Clear Output</description>
169816              <bitOffset>26</bitOffset>
169817              <bitWidth>1</bitWidth>
169818              <access>write-only</access>
169819              <enumeratedValues>
169820                <enumeratedValue>
169821                  <name>0</name>
169822                  <description>Corresponding bit in PDORn does not change.</description>
169823                  <value>#0</value>
169824                </enumeratedValue>
169825                <enumeratedValue>
169826                  <name>1</name>
169827                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169828                  <value>#1</value>
169829                </enumeratedValue>
169830              </enumeratedValues>
169831            </field>
169832            <field>
169833              <name>PTCO27</name>
169834              <description>Port Clear Output</description>
169835              <bitOffset>27</bitOffset>
169836              <bitWidth>1</bitWidth>
169837              <access>write-only</access>
169838              <enumeratedValues>
169839                <enumeratedValue>
169840                  <name>0</name>
169841                  <description>Corresponding bit in PDORn does not change.</description>
169842                  <value>#0</value>
169843                </enumeratedValue>
169844                <enumeratedValue>
169845                  <name>1</name>
169846                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169847                  <value>#1</value>
169848                </enumeratedValue>
169849              </enumeratedValues>
169850            </field>
169851            <field>
169852              <name>PTCO28</name>
169853              <description>Port Clear Output</description>
169854              <bitOffset>28</bitOffset>
169855              <bitWidth>1</bitWidth>
169856              <access>write-only</access>
169857              <enumeratedValues>
169858                <enumeratedValue>
169859                  <name>0</name>
169860                  <description>Corresponding bit in PDORn does not change.</description>
169861                  <value>#0</value>
169862                </enumeratedValue>
169863                <enumeratedValue>
169864                  <name>1</name>
169865                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169866                  <value>#1</value>
169867                </enumeratedValue>
169868              </enumeratedValues>
169869            </field>
169870            <field>
169871              <name>PTCO29</name>
169872              <description>Port Clear Output</description>
169873              <bitOffset>29</bitOffset>
169874              <bitWidth>1</bitWidth>
169875              <access>write-only</access>
169876              <enumeratedValues>
169877                <enumeratedValue>
169878                  <name>0</name>
169879                  <description>Corresponding bit in PDORn does not change.</description>
169880                  <value>#0</value>
169881                </enumeratedValue>
169882                <enumeratedValue>
169883                  <name>1</name>
169884                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169885                  <value>#1</value>
169886                </enumeratedValue>
169887              </enumeratedValues>
169888            </field>
169889            <field>
169890              <name>PTCO30</name>
169891              <description>Port Clear Output</description>
169892              <bitOffset>30</bitOffset>
169893              <bitWidth>1</bitWidth>
169894              <access>write-only</access>
169895              <enumeratedValues>
169896                <enumeratedValue>
169897                  <name>0</name>
169898                  <description>Corresponding bit in PDORn does not change.</description>
169899                  <value>#0</value>
169900                </enumeratedValue>
169901                <enumeratedValue>
169902                  <name>1</name>
169903                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169904                  <value>#1</value>
169905                </enumeratedValue>
169906              </enumeratedValues>
169907            </field>
169908            <field>
169909              <name>PTCO31</name>
169910              <description>Port Clear Output</description>
169911              <bitOffset>31</bitOffset>
169912              <bitWidth>1</bitWidth>
169913              <access>write-only</access>
169914              <enumeratedValues>
169915                <enumeratedValue>
169916                  <name>0</name>
169917                  <description>Corresponding bit in PDORn does not change.</description>
169918                  <value>#0</value>
169919                </enumeratedValue>
169920                <enumeratedValue>
169921                  <name>1</name>
169922                  <description>Corresponding bit in PDORn is cleared to logic 0.</description>
169923                  <value>#1</value>
169924                </enumeratedValue>
169925              </enumeratedValues>
169926            </field>
169927          </fields>
169928        </register>
169929        <register>
169930          <name>PTOR</name>
169931          <description>Port Toggle Output Register</description>
169932          <addressOffset>0xC</addressOffset>
169933          <size>32</size>
169934          <access>write-only</access>
169935          <resetValue>0</resetValue>
169936          <resetMask>0xFFFFFFFF</resetMask>
169937          <fields>
169938            <field>
169939              <name>PTTO0</name>
169940              <description>Port Toggle Output</description>
169941              <bitOffset>0</bitOffset>
169942              <bitWidth>1</bitWidth>
169943              <access>write-only</access>
169944              <enumeratedValues>
169945                <enumeratedValue>
169946                  <name>0</name>
169947                  <description>Corresponding bit in PDORn does not change.</description>
169948                  <value>#0</value>
169949                </enumeratedValue>
169950                <enumeratedValue>
169951                  <name>1</name>
169952                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
169953                  <value>#1</value>
169954                </enumeratedValue>
169955              </enumeratedValues>
169956            </field>
169957            <field>
169958              <name>PTTO1</name>
169959              <description>Port Toggle Output</description>
169960              <bitOffset>1</bitOffset>
169961              <bitWidth>1</bitWidth>
169962              <access>write-only</access>
169963              <enumeratedValues>
169964                <enumeratedValue>
169965                  <name>0</name>
169966                  <description>Corresponding bit in PDORn does not change.</description>
169967                  <value>#0</value>
169968                </enumeratedValue>
169969                <enumeratedValue>
169970                  <name>1</name>
169971                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
169972                  <value>#1</value>
169973                </enumeratedValue>
169974              </enumeratedValues>
169975            </field>
169976            <field>
169977              <name>PTTO2</name>
169978              <description>Port Toggle Output</description>
169979              <bitOffset>2</bitOffset>
169980              <bitWidth>1</bitWidth>
169981              <access>write-only</access>
169982              <enumeratedValues>
169983                <enumeratedValue>
169984                  <name>0</name>
169985                  <description>Corresponding bit in PDORn does not change.</description>
169986                  <value>#0</value>
169987                </enumeratedValue>
169988                <enumeratedValue>
169989                  <name>1</name>
169990                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
169991                  <value>#1</value>
169992                </enumeratedValue>
169993              </enumeratedValues>
169994            </field>
169995            <field>
169996              <name>PTTO3</name>
169997              <description>Port Toggle Output</description>
169998              <bitOffset>3</bitOffset>
169999              <bitWidth>1</bitWidth>
170000              <access>write-only</access>
170001              <enumeratedValues>
170002                <enumeratedValue>
170003                  <name>0</name>
170004                  <description>Corresponding bit in PDORn does not change.</description>
170005                  <value>#0</value>
170006                </enumeratedValue>
170007                <enumeratedValue>
170008                  <name>1</name>
170009                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170010                  <value>#1</value>
170011                </enumeratedValue>
170012              </enumeratedValues>
170013            </field>
170014            <field>
170015              <name>PTTO4</name>
170016              <description>Port Toggle Output</description>
170017              <bitOffset>4</bitOffset>
170018              <bitWidth>1</bitWidth>
170019              <access>write-only</access>
170020              <enumeratedValues>
170021                <enumeratedValue>
170022                  <name>0</name>
170023                  <description>Corresponding bit in PDORn does not change.</description>
170024                  <value>#0</value>
170025                </enumeratedValue>
170026                <enumeratedValue>
170027                  <name>1</name>
170028                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170029                  <value>#1</value>
170030                </enumeratedValue>
170031              </enumeratedValues>
170032            </field>
170033            <field>
170034              <name>PTTO5</name>
170035              <description>Port Toggle Output</description>
170036              <bitOffset>5</bitOffset>
170037              <bitWidth>1</bitWidth>
170038              <access>write-only</access>
170039              <enumeratedValues>
170040                <enumeratedValue>
170041                  <name>0</name>
170042                  <description>Corresponding bit in PDORn does not change.</description>
170043                  <value>#0</value>
170044                </enumeratedValue>
170045                <enumeratedValue>
170046                  <name>1</name>
170047                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170048                  <value>#1</value>
170049                </enumeratedValue>
170050              </enumeratedValues>
170051            </field>
170052            <field>
170053              <name>PTTO6</name>
170054              <description>Port Toggle Output</description>
170055              <bitOffset>6</bitOffset>
170056              <bitWidth>1</bitWidth>
170057              <access>write-only</access>
170058              <enumeratedValues>
170059                <enumeratedValue>
170060                  <name>0</name>
170061                  <description>Corresponding bit in PDORn does not change.</description>
170062                  <value>#0</value>
170063                </enumeratedValue>
170064                <enumeratedValue>
170065                  <name>1</name>
170066                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170067                  <value>#1</value>
170068                </enumeratedValue>
170069              </enumeratedValues>
170070            </field>
170071            <field>
170072              <name>PTTO7</name>
170073              <description>Port Toggle Output</description>
170074              <bitOffset>7</bitOffset>
170075              <bitWidth>1</bitWidth>
170076              <access>write-only</access>
170077              <enumeratedValues>
170078                <enumeratedValue>
170079                  <name>0</name>
170080                  <description>Corresponding bit in PDORn does not change.</description>
170081                  <value>#0</value>
170082                </enumeratedValue>
170083                <enumeratedValue>
170084                  <name>1</name>
170085                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170086                  <value>#1</value>
170087                </enumeratedValue>
170088              </enumeratedValues>
170089            </field>
170090            <field>
170091              <name>PTTO8</name>
170092              <description>Port Toggle Output</description>
170093              <bitOffset>8</bitOffset>
170094              <bitWidth>1</bitWidth>
170095              <access>write-only</access>
170096              <enumeratedValues>
170097                <enumeratedValue>
170098                  <name>0</name>
170099                  <description>Corresponding bit in PDORn does not change.</description>
170100                  <value>#0</value>
170101                </enumeratedValue>
170102                <enumeratedValue>
170103                  <name>1</name>
170104                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170105                  <value>#1</value>
170106                </enumeratedValue>
170107              </enumeratedValues>
170108            </field>
170109            <field>
170110              <name>PTTO9</name>
170111              <description>Port Toggle Output</description>
170112              <bitOffset>9</bitOffset>
170113              <bitWidth>1</bitWidth>
170114              <access>write-only</access>
170115              <enumeratedValues>
170116                <enumeratedValue>
170117                  <name>0</name>
170118                  <description>Corresponding bit in PDORn does not change.</description>
170119                  <value>#0</value>
170120                </enumeratedValue>
170121                <enumeratedValue>
170122                  <name>1</name>
170123                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170124                  <value>#1</value>
170125                </enumeratedValue>
170126              </enumeratedValues>
170127            </field>
170128            <field>
170129              <name>PTTO10</name>
170130              <description>Port Toggle Output</description>
170131              <bitOffset>10</bitOffset>
170132              <bitWidth>1</bitWidth>
170133              <access>write-only</access>
170134              <enumeratedValues>
170135                <enumeratedValue>
170136                  <name>0</name>
170137                  <description>Corresponding bit in PDORn does not change.</description>
170138                  <value>#0</value>
170139                </enumeratedValue>
170140                <enumeratedValue>
170141                  <name>1</name>
170142                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170143                  <value>#1</value>
170144                </enumeratedValue>
170145              </enumeratedValues>
170146            </field>
170147            <field>
170148              <name>PTTO11</name>
170149              <description>Port Toggle Output</description>
170150              <bitOffset>11</bitOffset>
170151              <bitWidth>1</bitWidth>
170152              <access>write-only</access>
170153              <enumeratedValues>
170154                <enumeratedValue>
170155                  <name>0</name>
170156                  <description>Corresponding bit in PDORn does not change.</description>
170157                  <value>#0</value>
170158                </enumeratedValue>
170159                <enumeratedValue>
170160                  <name>1</name>
170161                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170162                  <value>#1</value>
170163                </enumeratedValue>
170164              </enumeratedValues>
170165            </field>
170166            <field>
170167              <name>PTTO12</name>
170168              <description>Port Toggle Output</description>
170169              <bitOffset>12</bitOffset>
170170              <bitWidth>1</bitWidth>
170171              <access>write-only</access>
170172              <enumeratedValues>
170173                <enumeratedValue>
170174                  <name>0</name>
170175                  <description>Corresponding bit in PDORn does not change.</description>
170176                  <value>#0</value>
170177                </enumeratedValue>
170178                <enumeratedValue>
170179                  <name>1</name>
170180                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170181                  <value>#1</value>
170182                </enumeratedValue>
170183              </enumeratedValues>
170184            </field>
170185            <field>
170186              <name>PTTO13</name>
170187              <description>Port Toggle Output</description>
170188              <bitOffset>13</bitOffset>
170189              <bitWidth>1</bitWidth>
170190              <access>write-only</access>
170191              <enumeratedValues>
170192                <enumeratedValue>
170193                  <name>0</name>
170194                  <description>Corresponding bit in PDORn does not change.</description>
170195                  <value>#0</value>
170196                </enumeratedValue>
170197                <enumeratedValue>
170198                  <name>1</name>
170199                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170200                  <value>#1</value>
170201                </enumeratedValue>
170202              </enumeratedValues>
170203            </field>
170204            <field>
170205              <name>PTTO14</name>
170206              <description>Port Toggle Output</description>
170207              <bitOffset>14</bitOffset>
170208              <bitWidth>1</bitWidth>
170209              <access>write-only</access>
170210              <enumeratedValues>
170211                <enumeratedValue>
170212                  <name>0</name>
170213                  <description>Corresponding bit in PDORn does not change.</description>
170214                  <value>#0</value>
170215                </enumeratedValue>
170216                <enumeratedValue>
170217                  <name>1</name>
170218                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170219                  <value>#1</value>
170220                </enumeratedValue>
170221              </enumeratedValues>
170222            </field>
170223            <field>
170224              <name>PTTO15</name>
170225              <description>Port Toggle Output</description>
170226              <bitOffset>15</bitOffset>
170227              <bitWidth>1</bitWidth>
170228              <access>write-only</access>
170229              <enumeratedValues>
170230                <enumeratedValue>
170231                  <name>0</name>
170232                  <description>Corresponding bit in PDORn does not change.</description>
170233                  <value>#0</value>
170234                </enumeratedValue>
170235                <enumeratedValue>
170236                  <name>1</name>
170237                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170238                  <value>#1</value>
170239                </enumeratedValue>
170240              </enumeratedValues>
170241            </field>
170242            <field>
170243              <name>PTTO16</name>
170244              <description>Port Toggle Output</description>
170245              <bitOffset>16</bitOffset>
170246              <bitWidth>1</bitWidth>
170247              <access>write-only</access>
170248              <enumeratedValues>
170249                <enumeratedValue>
170250                  <name>0</name>
170251                  <description>Corresponding bit in PDORn does not change.</description>
170252                  <value>#0</value>
170253                </enumeratedValue>
170254                <enumeratedValue>
170255                  <name>1</name>
170256                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170257                  <value>#1</value>
170258                </enumeratedValue>
170259              </enumeratedValues>
170260            </field>
170261            <field>
170262              <name>PTTO17</name>
170263              <description>Port Toggle Output</description>
170264              <bitOffset>17</bitOffset>
170265              <bitWidth>1</bitWidth>
170266              <access>write-only</access>
170267              <enumeratedValues>
170268                <enumeratedValue>
170269                  <name>0</name>
170270                  <description>Corresponding bit in PDORn does not change.</description>
170271                  <value>#0</value>
170272                </enumeratedValue>
170273                <enumeratedValue>
170274                  <name>1</name>
170275                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170276                  <value>#1</value>
170277                </enumeratedValue>
170278              </enumeratedValues>
170279            </field>
170280            <field>
170281              <name>PTTO18</name>
170282              <description>Port Toggle Output</description>
170283              <bitOffset>18</bitOffset>
170284              <bitWidth>1</bitWidth>
170285              <access>write-only</access>
170286              <enumeratedValues>
170287                <enumeratedValue>
170288                  <name>0</name>
170289                  <description>Corresponding bit in PDORn does not change.</description>
170290                  <value>#0</value>
170291                </enumeratedValue>
170292                <enumeratedValue>
170293                  <name>1</name>
170294                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170295                  <value>#1</value>
170296                </enumeratedValue>
170297              </enumeratedValues>
170298            </field>
170299            <field>
170300              <name>PTTO19</name>
170301              <description>Port Toggle Output</description>
170302              <bitOffset>19</bitOffset>
170303              <bitWidth>1</bitWidth>
170304              <access>write-only</access>
170305              <enumeratedValues>
170306                <enumeratedValue>
170307                  <name>0</name>
170308                  <description>Corresponding bit in PDORn does not change.</description>
170309                  <value>#0</value>
170310                </enumeratedValue>
170311                <enumeratedValue>
170312                  <name>1</name>
170313                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170314                  <value>#1</value>
170315                </enumeratedValue>
170316              </enumeratedValues>
170317            </field>
170318            <field>
170319              <name>PTTO20</name>
170320              <description>Port Toggle Output</description>
170321              <bitOffset>20</bitOffset>
170322              <bitWidth>1</bitWidth>
170323              <access>write-only</access>
170324              <enumeratedValues>
170325                <enumeratedValue>
170326                  <name>0</name>
170327                  <description>Corresponding bit in PDORn does not change.</description>
170328                  <value>#0</value>
170329                </enumeratedValue>
170330                <enumeratedValue>
170331                  <name>1</name>
170332                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170333                  <value>#1</value>
170334                </enumeratedValue>
170335              </enumeratedValues>
170336            </field>
170337            <field>
170338              <name>PTTO21</name>
170339              <description>Port Toggle Output</description>
170340              <bitOffset>21</bitOffset>
170341              <bitWidth>1</bitWidth>
170342              <access>write-only</access>
170343              <enumeratedValues>
170344                <enumeratedValue>
170345                  <name>0</name>
170346                  <description>Corresponding bit in PDORn does not change.</description>
170347                  <value>#0</value>
170348                </enumeratedValue>
170349                <enumeratedValue>
170350                  <name>1</name>
170351                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170352                  <value>#1</value>
170353                </enumeratedValue>
170354              </enumeratedValues>
170355            </field>
170356            <field>
170357              <name>PTTO22</name>
170358              <description>Port Toggle Output</description>
170359              <bitOffset>22</bitOffset>
170360              <bitWidth>1</bitWidth>
170361              <access>write-only</access>
170362              <enumeratedValues>
170363                <enumeratedValue>
170364                  <name>0</name>
170365                  <description>Corresponding bit in PDORn does not change.</description>
170366                  <value>#0</value>
170367                </enumeratedValue>
170368                <enumeratedValue>
170369                  <name>1</name>
170370                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170371                  <value>#1</value>
170372                </enumeratedValue>
170373              </enumeratedValues>
170374            </field>
170375            <field>
170376              <name>PTTO23</name>
170377              <description>Port Toggle Output</description>
170378              <bitOffset>23</bitOffset>
170379              <bitWidth>1</bitWidth>
170380              <access>write-only</access>
170381              <enumeratedValues>
170382                <enumeratedValue>
170383                  <name>0</name>
170384                  <description>Corresponding bit in PDORn does not change.</description>
170385                  <value>#0</value>
170386                </enumeratedValue>
170387                <enumeratedValue>
170388                  <name>1</name>
170389                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170390                  <value>#1</value>
170391                </enumeratedValue>
170392              </enumeratedValues>
170393            </field>
170394            <field>
170395              <name>PTTO24</name>
170396              <description>Port Toggle Output</description>
170397              <bitOffset>24</bitOffset>
170398              <bitWidth>1</bitWidth>
170399              <access>write-only</access>
170400              <enumeratedValues>
170401                <enumeratedValue>
170402                  <name>0</name>
170403                  <description>Corresponding bit in PDORn does not change.</description>
170404                  <value>#0</value>
170405                </enumeratedValue>
170406                <enumeratedValue>
170407                  <name>1</name>
170408                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170409                  <value>#1</value>
170410                </enumeratedValue>
170411              </enumeratedValues>
170412            </field>
170413            <field>
170414              <name>PTTO25</name>
170415              <description>Port Toggle Output</description>
170416              <bitOffset>25</bitOffset>
170417              <bitWidth>1</bitWidth>
170418              <access>write-only</access>
170419              <enumeratedValues>
170420                <enumeratedValue>
170421                  <name>0</name>
170422                  <description>Corresponding bit in PDORn does not change.</description>
170423                  <value>#0</value>
170424                </enumeratedValue>
170425                <enumeratedValue>
170426                  <name>1</name>
170427                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170428                  <value>#1</value>
170429                </enumeratedValue>
170430              </enumeratedValues>
170431            </field>
170432            <field>
170433              <name>PTTO26</name>
170434              <description>Port Toggle Output</description>
170435              <bitOffset>26</bitOffset>
170436              <bitWidth>1</bitWidth>
170437              <access>write-only</access>
170438              <enumeratedValues>
170439                <enumeratedValue>
170440                  <name>0</name>
170441                  <description>Corresponding bit in PDORn does not change.</description>
170442                  <value>#0</value>
170443                </enumeratedValue>
170444                <enumeratedValue>
170445                  <name>1</name>
170446                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170447                  <value>#1</value>
170448                </enumeratedValue>
170449              </enumeratedValues>
170450            </field>
170451            <field>
170452              <name>PTTO27</name>
170453              <description>Port Toggle Output</description>
170454              <bitOffset>27</bitOffset>
170455              <bitWidth>1</bitWidth>
170456              <access>write-only</access>
170457              <enumeratedValues>
170458                <enumeratedValue>
170459                  <name>0</name>
170460                  <description>Corresponding bit in PDORn does not change.</description>
170461                  <value>#0</value>
170462                </enumeratedValue>
170463                <enumeratedValue>
170464                  <name>1</name>
170465                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170466                  <value>#1</value>
170467                </enumeratedValue>
170468              </enumeratedValues>
170469            </field>
170470            <field>
170471              <name>PTTO28</name>
170472              <description>Port Toggle Output</description>
170473              <bitOffset>28</bitOffset>
170474              <bitWidth>1</bitWidth>
170475              <access>write-only</access>
170476              <enumeratedValues>
170477                <enumeratedValue>
170478                  <name>0</name>
170479                  <description>Corresponding bit in PDORn does not change.</description>
170480                  <value>#0</value>
170481                </enumeratedValue>
170482                <enumeratedValue>
170483                  <name>1</name>
170484                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170485                  <value>#1</value>
170486                </enumeratedValue>
170487              </enumeratedValues>
170488            </field>
170489            <field>
170490              <name>PTTO29</name>
170491              <description>Port Toggle Output</description>
170492              <bitOffset>29</bitOffset>
170493              <bitWidth>1</bitWidth>
170494              <access>write-only</access>
170495              <enumeratedValues>
170496                <enumeratedValue>
170497                  <name>0</name>
170498                  <description>Corresponding bit in PDORn does not change.</description>
170499                  <value>#0</value>
170500                </enumeratedValue>
170501                <enumeratedValue>
170502                  <name>1</name>
170503                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170504                  <value>#1</value>
170505                </enumeratedValue>
170506              </enumeratedValues>
170507            </field>
170508            <field>
170509              <name>PTTO30</name>
170510              <description>Port Toggle Output</description>
170511              <bitOffset>30</bitOffset>
170512              <bitWidth>1</bitWidth>
170513              <access>write-only</access>
170514              <enumeratedValues>
170515                <enumeratedValue>
170516                  <name>0</name>
170517                  <description>Corresponding bit in PDORn does not change.</description>
170518                  <value>#0</value>
170519                </enumeratedValue>
170520                <enumeratedValue>
170521                  <name>1</name>
170522                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170523                  <value>#1</value>
170524                </enumeratedValue>
170525              </enumeratedValues>
170526            </field>
170527            <field>
170528              <name>PTTO31</name>
170529              <description>Port Toggle Output</description>
170530              <bitOffset>31</bitOffset>
170531              <bitWidth>1</bitWidth>
170532              <access>write-only</access>
170533              <enumeratedValues>
170534                <enumeratedValue>
170535                  <name>0</name>
170536                  <description>Corresponding bit in PDORn does not change.</description>
170537                  <value>#0</value>
170538                </enumeratedValue>
170539                <enumeratedValue>
170540                  <name>1</name>
170541                  <description>Corresponding bit in PDORn is set to the inverse of its existing logic state.</description>
170542                  <value>#1</value>
170543                </enumeratedValue>
170544              </enumeratedValues>
170545            </field>
170546          </fields>
170547        </register>
170548        <register>
170549          <name>PDIR</name>
170550          <description>Port Data Input Register</description>
170551          <addressOffset>0x10</addressOffset>
170552          <size>32</size>
170553          <access>read-only</access>
170554          <resetValue>0</resetValue>
170555          <resetMask>0xFFFFFFFF</resetMask>
170556          <fields>
170557            <field>
170558              <name>PDI0</name>
170559              <description>Port Data Input</description>
170560              <bitOffset>0</bitOffset>
170561              <bitWidth>1</bitWidth>
170562              <access>read-only</access>
170563              <enumeratedValues>
170564                <enumeratedValue>
170565                  <name>0</name>
170566                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170567                  <value>#0</value>
170568                </enumeratedValue>
170569                <enumeratedValue>
170570                  <name>1</name>
170571                  <description>Pin logic level is logic 1.</description>
170572                  <value>#1</value>
170573                </enumeratedValue>
170574              </enumeratedValues>
170575            </field>
170576            <field>
170577              <name>PDI1</name>
170578              <description>Port Data Input</description>
170579              <bitOffset>1</bitOffset>
170580              <bitWidth>1</bitWidth>
170581              <access>read-only</access>
170582              <enumeratedValues>
170583                <enumeratedValue>
170584                  <name>0</name>
170585                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170586                  <value>#0</value>
170587                </enumeratedValue>
170588                <enumeratedValue>
170589                  <name>1</name>
170590                  <description>Pin logic level is logic 1.</description>
170591                  <value>#1</value>
170592                </enumeratedValue>
170593              </enumeratedValues>
170594            </field>
170595            <field>
170596              <name>PDI2</name>
170597              <description>Port Data Input</description>
170598              <bitOffset>2</bitOffset>
170599              <bitWidth>1</bitWidth>
170600              <access>read-only</access>
170601              <enumeratedValues>
170602                <enumeratedValue>
170603                  <name>0</name>
170604                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170605                  <value>#0</value>
170606                </enumeratedValue>
170607                <enumeratedValue>
170608                  <name>1</name>
170609                  <description>Pin logic level is logic 1.</description>
170610                  <value>#1</value>
170611                </enumeratedValue>
170612              </enumeratedValues>
170613            </field>
170614            <field>
170615              <name>PDI3</name>
170616              <description>Port Data Input</description>
170617              <bitOffset>3</bitOffset>
170618              <bitWidth>1</bitWidth>
170619              <access>read-only</access>
170620              <enumeratedValues>
170621                <enumeratedValue>
170622                  <name>0</name>
170623                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170624                  <value>#0</value>
170625                </enumeratedValue>
170626                <enumeratedValue>
170627                  <name>1</name>
170628                  <description>Pin logic level is logic 1.</description>
170629                  <value>#1</value>
170630                </enumeratedValue>
170631              </enumeratedValues>
170632            </field>
170633            <field>
170634              <name>PDI4</name>
170635              <description>Port Data Input</description>
170636              <bitOffset>4</bitOffset>
170637              <bitWidth>1</bitWidth>
170638              <access>read-only</access>
170639              <enumeratedValues>
170640                <enumeratedValue>
170641                  <name>0</name>
170642                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170643                  <value>#0</value>
170644                </enumeratedValue>
170645                <enumeratedValue>
170646                  <name>1</name>
170647                  <description>Pin logic level is logic 1.</description>
170648                  <value>#1</value>
170649                </enumeratedValue>
170650              </enumeratedValues>
170651            </field>
170652            <field>
170653              <name>PDI5</name>
170654              <description>Port Data Input</description>
170655              <bitOffset>5</bitOffset>
170656              <bitWidth>1</bitWidth>
170657              <access>read-only</access>
170658              <enumeratedValues>
170659                <enumeratedValue>
170660                  <name>0</name>
170661                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170662                  <value>#0</value>
170663                </enumeratedValue>
170664                <enumeratedValue>
170665                  <name>1</name>
170666                  <description>Pin logic level is logic 1.</description>
170667                  <value>#1</value>
170668                </enumeratedValue>
170669              </enumeratedValues>
170670            </field>
170671            <field>
170672              <name>PDI6</name>
170673              <description>Port Data Input</description>
170674              <bitOffset>6</bitOffset>
170675              <bitWidth>1</bitWidth>
170676              <access>read-only</access>
170677              <enumeratedValues>
170678                <enumeratedValue>
170679                  <name>0</name>
170680                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170681                  <value>#0</value>
170682                </enumeratedValue>
170683                <enumeratedValue>
170684                  <name>1</name>
170685                  <description>Pin logic level is logic 1.</description>
170686                  <value>#1</value>
170687                </enumeratedValue>
170688              </enumeratedValues>
170689            </field>
170690            <field>
170691              <name>PDI7</name>
170692              <description>Port Data Input</description>
170693              <bitOffset>7</bitOffset>
170694              <bitWidth>1</bitWidth>
170695              <access>read-only</access>
170696              <enumeratedValues>
170697                <enumeratedValue>
170698                  <name>0</name>
170699                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170700                  <value>#0</value>
170701                </enumeratedValue>
170702                <enumeratedValue>
170703                  <name>1</name>
170704                  <description>Pin logic level is logic 1.</description>
170705                  <value>#1</value>
170706                </enumeratedValue>
170707              </enumeratedValues>
170708            </field>
170709            <field>
170710              <name>PDI8</name>
170711              <description>Port Data Input</description>
170712              <bitOffset>8</bitOffset>
170713              <bitWidth>1</bitWidth>
170714              <access>read-only</access>
170715              <enumeratedValues>
170716                <enumeratedValue>
170717                  <name>0</name>
170718                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170719                  <value>#0</value>
170720                </enumeratedValue>
170721                <enumeratedValue>
170722                  <name>1</name>
170723                  <description>Pin logic level is logic 1.</description>
170724                  <value>#1</value>
170725                </enumeratedValue>
170726              </enumeratedValues>
170727            </field>
170728            <field>
170729              <name>PDI9</name>
170730              <description>Port Data Input</description>
170731              <bitOffset>9</bitOffset>
170732              <bitWidth>1</bitWidth>
170733              <access>read-only</access>
170734              <enumeratedValues>
170735                <enumeratedValue>
170736                  <name>0</name>
170737                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170738                  <value>#0</value>
170739                </enumeratedValue>
170740                <enumeratedValue>
170741                  <name>1</name>
170742                  <description>Pin logic level is logic 1.</description>
170743                  <value>#1</value>
170744                </enumeratedValue>
170745              </enumeratedValues>
170746            </field>
170747            <field>
170748              <name>PDI10</name>
170749              <description>Port Data Input</description>
170750              <bitOffset>10</bitOffset>
170751              <bitWidth>1</bitWidth>
170752              <access>read-only</access>
170753              <enumeratedValues>
170754                <enumeratedValue>
170755                  <name>0</name>
170756                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170757                  <value>#0</value>
170758                </enumeratedValue>
170759                <enumeratedValue>
170760                  <name>1</name>
170761                  <description>Pin logic level is logic 1.</description>
170762                  <value>#1</value>
170763                </enumeratedValue>
170764              </enumeratedValues>
170765            </field>
170766            <field>
170767              <name>PDI11</name>
170768              <description>Port Data Input</description>
170769              <bitOffset>11</bitOffset>
170770              <bitWidth>1</bitWidth>
170771              <access>read-only</access>
170772              <enumeratedValues>
170773                <enumeratedValue>
170774                  <name>0</name>
170775                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170776                  <value>#0</value>
170777                </enumeratedValue>
170778                <enumeratedValue>
170779                  <name>1</name>
170780                  <description>Pin logic level is logic 1.</description>
170781                  <value>#1</value>
170782                </enumeratedValue>
170783              </enumeratedValues>
170784            </field>
170785            <field>
170786              <name>PDI12</name>
170787              <description>Port Data Input</description>
170788              <bitOffset>12</bitOffset>
170789              <bitWidth>1</bitWidth>
170790              <access>read-only</access>
170791              <enumeratedValues>
170792                <enumeratedValue>
170793                  <name>0</name>
170794                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170795                  <value>#0</value>
170796                </enumeratedValue>
170797                <enumeratedValue>
170798                  <name>1</name>
170799                  <description>Pin logic level is logic 1.</description>
170800                  <value>#1</value>
170801                </enumeratedValue>
170802              </enumeratedValues>
170803            </field>
170804            <field>
170805              <name>PDI13</name>
170806              <description>Port Data Input</description>
170807              <bitOffset>13</bitOffset>
170808              <bitWidth>1</bitWidth>
170809              <access>read-only</access>
170810              <enumeratedValues>
170811                <enumeratedValue>
170812                  <name>0</name>
170813                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170814                  <value>#0</value>
170815                </enumeratedValue>
170816                <enumeratedValue>
170817                  <name>1</name>
170818                  <description>Pin logic level is logic 1.</description>
170819                  <value>#1</value>
170820                </enumeratedValue>
170821              </enumeratedValues>
170822            </field>
170823            <field>
170824              <name>PDI14</name>
170825              <description>Port Data Input</description>
170826              <bitOffset>14</bitOffset>
170827              <bitWidth>1</bitWidth>
170828              <access>read-only</access>
170829              <enumeratedValues>
170830                <enumeratedValue>
170831                  <name>0</name>
170832                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170833                  <value>#0</value>
170834                </enumeratedValue>
170835                <enumeratedValue>
170836                  <name>1</name>
170837                  <description>Pin logic level is logic 1.</description>
170838                  <value>#1</value>
170839                </enumeratedValue>
170840              </enumeratedValues>
170841            </field>
170842            <field>
170843              <name>PDI15</name>
170844              <description>Port Data Input</description>
170845              <bitOffset>15</bitOffset>
170846              <bitWidth>1</bitWidth>
170847              <access>read-only</access>
170848              <enumeratedValues>
170849                <enumeratedValue>
170850                  <name>0</name>
170851                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170852                  <value>#0</value>
170853                </enumeratedValue>
170854                <enumeratedValue>
170855                  <name>1</name>
170856                  <description>Pin logic level is logic 1.</description>
170857                  <value>#1</value>
170858                </enumeratedValue>
170859              </enumeratedValues>
170860            </field>
170861            <field>
170862              <name>PDI16</name>
170863              <description>Port Data Input</description>
170864              <bitOffset>16</bitOffset>
170865              <bitWidth>1</bitWidth>
170866              <access>read-only</access>
170867              <enumeratedValues>
170868                <enumeratedValue>
170869                  <name>0</name>
170870                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170871                  <value>#0</value>
170872                </enumeratedValue>
170873                <enumeratedValue>
170874                  <name>1</name>
170875                  <description>Pin logic level is logic 1.</description>
170876                  <value>#1</value>
170877                </enumeratedValue>
170878              </enumeratedValues>
170879            </field>
170880            <field>
170881              <name>PDI17</name>
170882              <description>Port Data Input</description>
170883              <bitOffset>17</bitOffset>
170884              <bitWidth>1</bitWidth>
170885              <access>read-only</access>
170886              <enumeratedValues>
170887                <enumeratedValue>
170888                  <name>0</name>
170889                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170890                  <value>#0</value>
170891                </enumeratedValue>
170892                <enumeratedValue>
170893                  <name>1</name>
170894                  <description>Pin logic level is logic 1.</description>
170895                  <value>#1</value>
170896                </enumeratedValue>
170897              </enumeratedValues>
170898            </field>
170899            <field>
170900              <name>PDI18</name>
170901              <description>Port Data Input</description>
170902              <bitOffset>18</bitOffset>
170903              <bitWidth>1</bitWidth>
170904              <access>read-only</access>
170905              <enumeratedValues>
170906                <enumeratedValue>
170907                  <name>0</name>
170908                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170909                  <value>#0</value>
170910                </enumeratedValue>
170911                <enumeratedValue>
170912                  <name>1</name>
170913                  <description>Pin logic level is logic 1.</description>
170914                  <value>#1</value>
170915                </enumeratedValue>
170916              </enumeratedValues>
170917            </field>
170918            <field>
170919              <name>PDI19</name>
170920              <description>Port Data Input</description>
170921              <bitOffset>19</bitOffset>
170922              <bitWidth>1</bitWidth>
170923              <access>read-only</access>
170924              <enumeratedValues>
170925                <enumeratedValue>
170926                  <name>0</name>
170927                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170928                  <value>#0</value>
170929                </enumeratedValue>
170930                <enumeratedValue>
170931                  <name>1</name>
170932                  <description>Pin logic level is logic 1.</description>
170933                  <value>#1</value>
170934                </enumeratedValue>
170935              </enumeratedValues>
170936            </field>
170937            <field>
170938              <name>PDI20</name>
170939              <description>Port Data Input</description>
170940              <bitOffset>20</bitOffset>
170941              <bitWidth>1</bitWidth>
170942              <access>read-only</access>
170943              <enumeratedValues>
170944                <enumeratedValue>
170945                  <name>0</name>
170946                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170947                  <value>#0</value>
170948                </enumeratedValue>
170949                <enumeratedValue>
170950                  <name>1</name>
170951                  <description>Pin logic level is logic 1.</description>
170952                  <value>#1</value>
170953                </enumeratedValue>
170954              </enumeratedValues>
170955            </field>
170956            <field>
170957              <name>PDI21</name>
170958              <description>Port Data Input</description>
170959              <bitOffset>21</bitOffset>
170960              <bitWidth>1</bitWidth>
170961              <access>read-only</access>
170962              <enumeratedValues>
170963                <enumeratedValue>
170964                  <name>0</name>
170965                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170966                  <value>#0</value>
170967                </enumeratedValue>
170968                <enumeratedValue>
170969                  <name>1</name>
170970                  <description>Pin logic level is logic 1.</description>
170971                  <value>#1</value>
170972                </enumeratedValue>
170973              </enumeratedValues>
170974            </field>
170975            <field>
170976              <name>PDI22</name>
170977              <description>Port Data Input</description>
170978              <bitOffset>22</bitOffset>
170979              <bitWidth>1</bitWidth>
170980              <access>read-only</access>
170981              <enumeratedValues>
170982                <enumeratedValue>
170983                  <name>0</name>
170984                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
170985                  <value>#0</value>
170986                </enumeratedValue>
170987                <enumeratedValue>
170988                  <name>1</name>
170989                  <description>Pin logic level is logic 1.</description>
170990                  <value>#1</value>
170991                </enumeratedValue>
170992              </enumeratedValues>
170993            </field>
170994            <field>
170995              <name>PDI23</name>
170996              <description>Port Data Input</description>
170997              <bitOffset>23</bitOffset>
170998              <bitWidth>1</bitWidth>
170999              <access>read-only</access>
171000              <enumeratedValues>
171001                <enumeratedValue>
171002                  <name>0</name>
171003                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
171004                  <value>#0</value>
171005                </enumeratedValue>
171006                <enumeratedValue>
171007                  <name>1</name>
171008                  <description>Pin logic level is logic 1.</description>
171009                  <value>#1</value>
171010                </enumeratedValue>
171011              </enumeratedValues>
171012            </field>
171013            <field>
171014              <name>PDI24</name>
171015              <description>Port Data Input</description>
171016              <bitOffset>24</bitOffset>
171017              <bitWidth>1</bitWidth>
171018              <access>read-only</access>
171019              <enumeratedValues>
171020                <enumeratedValue>
171021                  <name>0</name>
171022                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
171023                  <value>#0</value>
171024                </enumeratedValue>
171025                <enumeratedValue>
171026                  <name>1</name>
171027                  <description>Pin logic level is logic 1.</description>
171028                  <value>#1</value>
171029                </enumeratedValue>
171030              </enumeratedValues>
171031            </field>
171032            <field>
171033              <name>PDI25</name>
171034              <description>Port Data Input</description>
171035              <bitOffset>25</bitOffset>
171036              <bitWidth>1</bitWidth>
171037              <access>read-only</access>
171038              <enumeratedValues>
171039                <enumeratedValue>
171040                  <name>0</name>
171041                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
171042                  <value>#0</value>
171043                </enumeratedValue>
171044                <enumeratedValue>
171045                  <name>1</name>
171046                  <description>Pin logic level is logic 1.</description>
171047                  <value>#1</value>
171048                </enumeratedValue>
171049              </enumeratedValues>
171050            </field>
171051            <field>
171052              <name>PDI26</name>
171053              <description>Port Data Input</description>
171054              <bitOffset>26</bitOffset>
171055              <bitWidth>1</bitWidth>
171056              <access>read-only</access>
171057              <enumeratedValues>
171058                <enumeratedValue>
171059                  <name>0</name>
171060                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
171061                  <value>#0</value>
171062                </enumeratedValue>
171063                <enumeratedValue>
171064                  <name>1</name>
171065                  <description>Pin logic level is logic 1.</description>
171066                  <value>#1</value>
171067                </enumeratedValue>
171068              </enumeratedValues>
171069            </field>
171070            <field>
171071              <name>PDI27</name>
171072              <description>Port Data Input</description>
171073              <bitOffset>27</bitOffset>
171074              <bitWidth>1</bitWidth>
171075              <access>read-only</access>
171076              <enumeratedValues>
171077                <enumeratedValue>
171078                  <name>0</name>
171079                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
171080                  <value>#0</value>
171081                </enumeratedValue>
171082                <enumeratedValue>
171083                  <name>1</name>
171084                  <description>Pin logic level is logic 1.</description>
171085                  <value>#1</value>
171086                </enumeratedValue>
171087              </enumeratedValues>
171088            </field>
171089            <field>
171090              <name>PDI28</name>
171091              <description>Port Data Input</description>
171092              <bitOffset>28</bitOffset>
171093              <bitWidth>1</bitWidth>
171094              <access>read-only</access>
171095              <enumeratedValues>
171096                <enumeratedValue>
171097                  <name>0</name>
171098                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
171099                  <value>#0</value>
171100                </enumeratedValue>
171101                <enumeratedValue>
171102                  <name>1</name>
171103                  <description>Pin logic level is logic 1.</description>
171104                  <value>#1</value>
171105                </enumeratedValue>
171106              </enumeratedValues>
171107            </field>
171108            <field>
171109              <name>PDI29</name>
171110              <description>Port Data Input</description>
171111              <bitOffset>29</bitOffset>
171112              <bitWidth>1</bitWidth>
171113              <access>read-only</access>
171114              <enumeratedValues>
171115                <enumeratedValue>
171116                  <name>0</name>
171117                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
171118                  <value>#0</value>
171119                </enumeratedValue>
171120                <enumeratedValue>
171121                  <name>1</name>
171122                  <description>Pin logic level is logic 1.</description>
171123                  <value>#1</value>
171124                </enumeratedValue>
171125              </enumeratedValues>
171126            </field>
171127            <field>
171128              <name>PDI30</name>
171129              <description>Port Data Input</description>
171130              <bitOffset>30</bitOffset>
171131              <bitWidth>1</bitWidth>
171132              <access>read-only</access>
171133              <enumeratedValues>
171134                <enumeratedValue>
171135                  <name>0</name>
171136                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
171137                  <value>#0</value>
171138                </enumeratedValue>
171139                <enumeratedValue>
171140                  <name>1</name>
171141                  <description>Pin logic level is logic 1.</description>
171142                  <value>#1</value>
171143                </enumeratedValue>
171144              </enumeratedValues>
171145            </field>
171146            <field>
171147              <name>PDI31</name>
171148              <description>Port Data Input</description>
171149              <bitOffset>31</bitOffset>
171150              <bitWidth>1</bitWidth>
171151              <access>read-only</access>
171152              <enumeratedValues>
171153                <enumeratedValue>
171154                  <name>0</name>
171155                  <description>Pin logic level is logic 0, or is not configured for use by digital function.</description>
171156                  <value>#0</value>
171157                </enumeratedValue>
171158                <enumeratedValue>
171159                  <name>1</name>
171160                  <description>Pin logic level is logic 1.</description>
171161                  <value>#1</value>
171162                </enumeratedValue>
171163              </enumeratedValues>
171164            </field>
171165          </fields>
171166        </register>
171167        <register>
171168          <name>PDDR</name>
171169          <description>Port Data Direction Register</description>
171170          <addressOffset>0x14</addressOffset>
171171          <size>32</size>
171172          <access>read-write</access>
171173          <resetValue>0</resetValue>
171174          <resetMask>0xFFFFFFFF</resetMask>
171175          <fields>
171176            <field>
171177              <name>PDD0</name>
171178              <description>Port Data Direction</description>
171179              <bitOffset>0</bitOffset>
171180              <bitWidth>1</bitWidth>
171181              <access>read-write</access>
171182              <enumeratedValues>
171183                <enumeratedValue>
171184                  <name>0</name>
171185                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171186                  <value>#0</value>
171187                </enumeratedValue>
171188                <enumeratedValue>
171189                  <name>1</name>
171190                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171191                  <value>#1</value>
171192                </enumeratedValue>
171193              </enumeratedValues>
171194            </field>
171195            <field>
171196              <name>PDD1</name>
171197              <description>Port Data Direction</description>
171198              <bitOffset>1</bitOffset>
171199              <bitWidth>1</bitWidth>
171200              <access>read-write</access>
171201              <enumeratedValues>
171202                <enumeratedValue>
171203                  <name>0</name>
171204                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171205                  <value>#0</value>
171206                </enumeratedValue>
171207                <enumeratedValue>
171208                  <name>1</name>
171209                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171210                  <value>#1</value>
171211                </enumeratedValue>
171212              </enumeratedValues>
171213            </field>
171214            <field>
171215              <name>PDD2</name>
171216              <description>Port Data Direction</description>
171217              <bitOffset>2</bitOffset>
171218              <bitWidth>1</bitWidth>
171219              <access>read-write</access>
171220              <enumeratedValues>
171221                <enumeratedValue>
171222                  <name>0</name>
171223                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171224                  <value>#0</value>
171225                </enumeratedValue>
171226                <enumeratedValue>
171227                  <name>1</name>
171228                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171229                  <value>#1</value>
171230                </enumeratedValue>
171231              </enumeratedValues>
171232            </field>
171233            <field>
171234              <name>PDD3</name>
171235              <description>Port Data Direction</description>
171236              <bitOffset>3</bitOffset>
171237              <bitWidth>1</bitWidth>
171238              <access>read-write</access>
171239              <enumeratedValues>
171240                <enumeratedValue>
171241                  <name>0</name>
171242                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171243                  <value>#0</value>
171244                </enumeratedValue>
171245                <enumeratedValue>
171246                  <name>1</name>
171247                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171248                  <value>#1</value>
171249                </enumeratedValue>
171250              </enumeratedValues>
171251            </field>
171252            <field>
171253              <name>PDD4</name>
171254              <description>Port Data Direction</description>
171255              <bitOffset>4</bitOffset>
171256              <bitWidth>1</bitWidth>
171257              <access>read-write</access>
171258              <enumeratedValues>
171259                <enumeratedValue>
171260                  <name>0</name>
171261                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171262                  <value>#0</value>
171263                </enumeratedValue>
171264                <enumeratedValue>
171265                  <name>1</name>
171266                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171267                  <value>#1</value>
171268                </enumeratedValue>
171269              </enumeratedValues>
171270            </field>
171271            <field>
171272              <name>PDD5</name>
171273              <description>Port Data Direction</description>
171274              <bitOffset>5</bitOffset>
171275              <bitWidth>1</bitWidth>
171276              <access>read-write</access>
171277              <enumeratedValues>
171278                <enumeratedValue>
171279                  <name>0</name>
171280                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171281                  <value>#0</value>
171282                </enumeratedValue>
171283                <enumeratedValue>
171284                  <name>1</name>
171285                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171286                  <value>#1</value>
171287                </enumeratedValue>
171288              </enumeratedValues>
171289            </field>
171290            <field>
171291              <name>PDD6</name>
171292              <description>Port Data Direction</description>
171293              <bitOffset>6</bitOffset>
171294              <bitWidth>1</bitWidth>
171295              <access>read-write</access>
171296              <enumeratedValues>
171297                <enumeratedValue>
171298                  <name>0</name>
171299                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171300                  <value>#0</value>
171301                </enumeratedValue>
171302                <enumeratedValue>
171303                  <name>1</name>
171304                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171305                  <value>#1</value>
171306                </enumeratedValue>
171307              </enumeratedValues>
171308            </field>
171309            <field>
171310              <name>PDD7</name>
171311              <description>Port Data Direction</description>
171312              <bitOffset>7</bitOffset>
171313              <bitWidth>1</bitWidth>
171314              <access>read-write</access>
171315              <enumeratedValues>
171316                <enumeratedValue>
171317                  <name>0</name>
171318                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171319                  <value>#0</value>
171320                </enumeratedValue>
171321                <enumeratedValue>
171322                  <name>1</name>
171323                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171324                  <value>#1</value>
171325                </enumeratedValue>
171326              </enumeratedValues>
171327            </field>
171328            <field>
171329              <name>PDD8</name>
171330              <description>Port Data Direction</description>
171331              <bitOffset>8</bitOffset>
171332              <bitWidth>1</bitWidth>
171333              <access>read-write</access>
171334              <enumeratedValues>
171335                <enumeratedValue>
171336                  <name>0</name>
171337                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171338                  <value>#0</value>
171339                </enumeratedValue>
171340                <enumeratedValue>
171341                  <name>1</name>
171342                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171343                  <value>#1</value>
171344                </enumeratedValue>
171345              </enumeratedValues>
171346            </field>
171347            <field>
171348              <name>PDD9</name>
171349              <description>Port Data Direction</description>
171350              <bitOffset>9</bitOffset>
171351              <bitWidth>1</bitWidth>
171352              <access>read-write</access>
171353              <enumeratedValues>
171354                <enumeratedValue>
171355                  <name>0</name>
171356                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171357                  <value>#0</value>
171358                </enumeratedValue>
171359                <enumeratedValue>
171360                  <name>1</name>
171361                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171362                  <value>#1</value>
171363                </enumeratedValue>
171364              </enumeratedValues>
171365            </field>
171366            <field>
171367              <name>PDD10</name>
171368              <description>Port Data Direction</description>
171369              <bitOffset>10</bitOffset>
171370              <bitWidth>1</bitWidth>
171371              <access>read-write</access>
171372              <enumeratedValues>
171373                <enumeratedValue>
171374                  <name>0</name>
171375                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171376                  <value>#0</value>
171377                </enumeratedValue>
171378                <enumeratedValue>
171379                  <name>1</name>
171380                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171381                  <value>#1</value>
171382                </enumeratedValue>
171383              </enumeratedValues>
171384            </field>
171385            <field>
171386              <name>PDD11</name>
171387              <description>Port Data Direction</description>
171388              <bitOffset>11</bitOffset>
171389              <bitWidth>1</bitWidth>
171390              <access>read-write</access>
171391              <enumeratedValues>
171392                <enumeratedValue>
171393                  <name>0</name>
171394                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171395                  <value>#0</value>
171396                </enumeratedValue>
171397                <enumeratedValue>
171398                  <name>1</name>
171399                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171400                  <value>#1</value>
171401                </enumeratedValue>
171402              </enumeratedValues>
171403            </field>
171404            <field>
171405              <name>PDD12</name>
171406              <description>Port Data Direction</description>
171407              <bitOffset>12</bitOffset>
171408              <bitWidth>1</bitWidth>
171409              <access>read-write</access>
171410              <enumeratedValues>
171411                <enumeratedValue>
171412                  <name>0</name>
171413                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171414                  <value>#0</value>
171415                </enumeratedValue>
171416                <enumeratedValue>
171417                  <name>1</name>
171418                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171419                  <value>#1</value>
171420                </enumeratedValue>
171421              </enumeratedValues>
171422            </field>
171423            <field>
171424              <name>PDD13</name>
171425              <description>Port Data Direction</description>
171426              <bitOffset>13</bitOffset>
171427              <bitWidth>1</bitWidth>
171428              <access>read-write</access>
171429              <enumeratedValues>
171430                <enumeratedValue>
171431                  <name>0</name>
171432                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171433                  <value>#0</value>
171434                </enumeratedValue>
171435                <enumeratedValue>
171436                  <name>1</name>
171437                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171438                  <value>#1</value>
171439                </enumeratedValue>
171440              </enumeratedValues>
171441            </field>
171442            <field>
171443              <name>PDD14</name>
171444              <description>Port Data Direction</description>
171445              <bitOffset>14</bitOffset>
171446              <bitWidth>1</bitWidth>
171447              <access>read-write</access>
171448              <enumeratedValues>
171449                <enumeratedValue>
171450                  <name>0</name>
171451                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171452                  <value>#0</value>
171453                </enumeratedValue>
171454                <enumeratedValue>
171455                  <name>1</name>
171456                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171457                  <value>#1</value>
171458                </enumeratedValue>
171459              </enumeratedValues>
171460            </field>
171461            <field>
171462              <name>PDD15</name>
171463              <description>Port Data Direction</description>
171464              <bitOffset>15</bitOffset>
171465              <bitWidth>1</bitWidth>
171466              <access>read-write</access>
171467              <enumeratedValues>
171468                <enumeratedValue>
171469                  <name>0</name>
171470                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171471                  <value>#0</value>
171472                </enumeratedValue>
171473                <enumeratedValue>
171474                  <name>1</name>
171475                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171476                  <value>#1</value>
171477                </enumeratedValue>
171478              </enumeratedValues>
171479            </field>
171480            <field>
171481              <name>PDD16</name>
171482              <description>Port Data Direction</description>
171483              <bitOffset>16</bitOffset>
171484              <bitWidth>1</bitWidth>
171485              <access>read-write</access>
171486              <enumeratedValues>
171487                <enumeratedValue>
171488                  <name>0</name>
171489                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171490                  <value>#0</value>
171491                </enumeratedValue>
171492                <enumeratedValue>
171493                  <name>1</name>
171494                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171495                  <value>#1</value>
171496                </enumeratedValue>
171497              </enumeratedValues>
171498            </field>
171499            <field>
171500              <name>PDD17</name>
171501              <description>Port Data Direction</description>
171502              <bitOffset>17</bitOffset>
171503              <bitWidth>1</bitWidth>
171504              <access>read-write</access>
171505              <enumeratedValues>
171506                <enumeratedValue>
171507                  <name>0</name>
171508                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171509                  <value>#0</value>
171510                </enumeratedValue>
171511                <enumeratedValue>
171512                  <name>1</name>
171513                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171514                  <value>#1</value>
171515                </enumeratedValue>
171516              </enumeratedValues>
171517            </field>
171518            <field>
171519              <name>PDD18</name>
171520              <description>Port Data Direction</description>
171521              <bitOffset>18</bitOffset>
171522              <bitWidth>1</bitWidth>
171523              <access>read-write</access>
171524              <enumeratedValues>
171525                <enumeratedValue>
171526                  <name>0</name>
171527                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171528                  <value>#0</value>
171529                </enumeratedValue>
171530                <enumeratedValue>
171531                  <name>1</name>
171532                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171533                  <value>#1</value>
171534                </enumeratedValue>
171535              </enumeratedValues>
171536            </field>
171537            <field>
171538              <name>PDD19</name>
171539              <description>Port Data Direction</description>
171540              <bitOffset>19</bitOffset>
171541              <bitWidth>1</bitWidth>
171542              <access>read-write</access>
171543              <enumeratedValues>
171544                <enumeratedValue>
171545                  <name>0</name>
171546                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171547                  <value>#0</value>
171548                </enumeratedValue>
171549                <enumeratedValue>
171550                  <name>1</name>
171551                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171552                  <value>#1</value>
171553                </enumeratedValue>
171554              </enumeratedValues>
171555            </field>
171556            <field>
171557              <name>PDD20</name>
171558              <description>Port Data Direction</description>
171559              <bitOffset>20</bitOffset>
171560              <bitWidth>1</bitWidth>
171561              <access>read-write</access>
171562              <enumeratedValues>
171563                <enumeratedValue>
171564                  <name>0</name>
171565                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171566                  <value>#0</value>
171567                </enumeratedValue>
171568                <enumeratedValue>
171569                  <name>1</name>
171570                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171571                  <value>#1</value>
171572                </enumeratedValue>
171573              </enumeratedValues>
171574            </field>
171575            <field>
171576              <name>PDD21</name>
171577              <description>Port Data Direction</description>
171578              <bitOffset>21</bitOffset>
171579              <bitWidth>1</bitWidth>
171580              <access>read-write</access>
171581              <enumeratedValues>
171582                <enumeratedValue>
171583                  <name>0</name>
171584                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171585                  <value>#0</value>
171586                </enumeratedValue>
171587                <enumeratedValue>
171588                  <name>1</name>
171589                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171590                  <value>#1</value>
171591                </enumeratedValue>
171592              </enumeratedValues>
171593            </field>
171594            <field>
171595              <name>PDD22</name>
171596              <description>Port Data Direction</description>
171597              <bitOffset>22</bitOffset>
171598              <bitWidth>1</bitWidth>
171599              <access>read-write</access>
171600              <enumeratedValues>
171601                <enumeratedValue>
171602                  <name>0</name>
171603                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171604                  <value>#0</value>
171605                </enumeratedValue>
171606                <enumeratedValue>
171607                  <name>1</name>
171608                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171609                  <value>#1</value>
171610                </enumeratedValue>
171611              </enumeratedValues>
171612            </field>
171613            <field>
171614              <name>PDD23</name>
171615              <description>Port Data Direction</description>
171616              <bitOffset>23</bitOffset>
171617              <bitWidth>1</bitWidth>
171618              <access>read-write</access>
171619              <enumeratedValues>
171620                <enumeratedValue>
171621                  <name>0</name>
171622                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171623                  <value>#0</value>
171624                </enumeratedValue>
171625                <enumeratedValue>
171626                  <name>1</name>
171627                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171628                  <value>#1</value>
171629                </enumeratedValue>
171630              </enumeratedValues>
171631            </field>
171632            <field>
171633              <name>PDD24</name>
171634              <description>Port Data Direction</description>
171635              <bitOffset>24</bitOffset>
171636              <bitWidth>1</bitWidth>
171637              <access>read-write</access>
171638              <enumeratedValues>
171639                <enumeratedValue>
171640                  <name>0</name>
171641                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171642                  <value>#0</value>
171643                </enumeratedValue>
171644                <enumeratedValue>
171645                  <name>1</name>
171646                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171647                  <value>#1</value>
171648                </enumeratedValue>
171649              </enumeratedValues>
171650            </field>
171651            <field>
171652              <name>PDD25</name>
171653              <description>Port Data Direction</description>
171654              <bitOffset>25</bitOffset>
171655              <bitWidth>1</bitWidth>
171656              <access>read-write</access>
171657              <enumeratedValues>
171658                <enumeratedValue>
171659                  <name>0</name>
171660                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171661                  <value>#0</value>
171662                </enumeratedValue>
171663                <enumeratedValue>
171664                  <name>1</name>
171665                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171666                  <value>#1</value>
171667                </enumeratedValue>
171668              </enumeratedValues>
171669            </field>
171670            <field>
171671              <name>PDD26</name>
171672              <description>Port Data Direction</description>
171673              <bitOffset>26</bitOffset>
171674              <bitWidth>1</bitWidth>
171675              <access>read-write</access>
171676              <enumeratedValues>
171677                <enumeratedValue>
171678                  <name>0</name>
171679                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171680                  <value>#0</value>
171681                </enumeratedValue>
171682                <enumeratedValue>
171683                  <name>1</name>
171684                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171685                  <value>#1</value>
171686                </enumeratedValue>
171687              </enumeratedValues>
171688            </field>
171689            <field>
171690              <name>PDD27</name>
171691              <description>Port Data Direction</description>
171692              <bitOffset>27</bitOffset>
171693              <bitWidth>1</bitWidth>
171694              <access>read-write</access>
171695              <enumeratedValues>
171696                <enumeratedValue>
171697                  <name>0</name>
171698                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171699                  <value>#0</value>
171700                </enumeratedValue>
171701                <enumeratedValue>
171702                  <name>1</name>
171703                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171704                  <value>#1</value>
171705                </enumeratedValue>
171706              </enumeratedValues>
171707            </field>
171708            <field>
171709              <name>PDD28</name>
171710              <description>Port Data Direction</description>
171711              <bitOffset>28</bitOffset>
171712              <bitWidth>1</bitWidth>
171713              <access>read-write</access>
171714              <enumeratedValues>
171715                <enumeratedValue>
171716                  <name>0</name>
171717                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171718                  <value>#0</value>
171719                </enumeratedValue>
171720                <enumeratedValue>
171721                  <name>1</name>
171722                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171723                  <value>#1</value>
171724                </enumeratedValue>
171725              </enumeratedValues>
171726            </field>
171727            <field>
171728              <name>PDD29</name>
171729              <description>Port Data Direction</description>
171730              <bitOffset>29</bitOffset>
171731              <bitWidth>1</bitWidth>
171732              <access>read-write</access>
171733              <enumeratedValues>
171734                <enumeratedValue>
171735                  <name>0</name>
171736                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171737                  <value>#0</value>
171738                </enumeratedValue>
171739                <enumeratedValue>
171740                  <name>1</name>
171741                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171742                  <value>#1</value>
171743                </enumeratedValue>
171744              </enumeratedValues>
171745            </field>
171746            <field>
171747              <name>PDD30</name>
171748              <description>Port Data Direction</description>
171749              <bitOffset>30</bitOffset>
171750              <bitWidth>1</bitWidth>
171751              <access>read-write</access>
171752              <enumeratedValues>
171753                <enumeratedValue>
171754                  <name>0</name>
171755                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171756                  <value>#0</value>
171757                </enumeratedValue>
171758                <enumeratedValue>
171759                  <name>1</name>
171760                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171761                  <value>#1</value>
171762                </enumeratedValue>
171763              </enumeratedValues>
171764            </field>
171765            <field>
171766              <name>PDD31</name>
171767              <description>Port Data Direction</description>
171768              <bitOffset>31</bitOffset>
171769              <bitWidth>1</bitWidth>
171770              <access>read-write</access>
171771              <enumeratedValues>
171772                <enumeratedValue>
171773                  <name>0</name>
171774                  <description>Pin is configured as general-purpose input, for the GPIO function.</description>
171775                  <value>#0</value>
171776                </enumeratedValue>
171777                <enumeratedValue>
171778                  <name>1</name>
171779                  <description>Pin is configured as general-purpose output, for the GPIO function.</description>
171780                  <value>#1</value>
171781                </enumeratedValue>
171782              </enumeratedValues>
171783            </field>
171784          </fields>
171785        </register>
171786      </registers>
171787    </peripheral>
171788    <peripheral>
171789      <name>SystemControl</name>
171790      <description>System Control Block</description>
171791      <prependToName>SCB_</prependToName>
171792      <baseAddress>0xE000E000</baseAddress>
171793      <addressBlock>
171794        <offset>0x8</offset>
171795        <size>0xF38</size>
171796        <usage>registers</usage>
171797      </addressBlock>
171798      <registers>
171799        <register>
171800          <name>ACTLR</name>
171801          <description>Auxiliary Control Register,</description>
171802          <addressOffset>0x8</addressOffset>
171803          <size>32</size>
171804          <access>read-write</access>
171805          <resetValue>0</resetValue>
171806          <resetMask>0xFFFFFFFF</resetMask>
171807          <fields>
171808            <field>
171809              <name>DISMCYCINT</name>
171810              <description>Disables interruption of multi-cycle instructions.</description>
171811              <bitOffset>0</bitOffset>
171812              <bitWidth>1</bitWidth>
171813              <access>read-write</access>
171814            </field>
171815            <field>
171816              <name>DISDEFWBUF</name>
171817              <description>Disables write buffer use during default memory map accesses.</description>
171818              <bitOffset>1</bitOffset>
171819              <bitWidth>1</bitWidth>
171820              <access>read-write</access>
171821            </field>
171822            <field>
171823              <name>DISFOLD</name>
171824              <description>Disables folding of IT instructions.</description>
171825              <bitOffset>2</bitOffset>
171826              <bitWidth>1</bitWidth>
171827              <access>read-write</access>
171828            </field>
171829          </fields>
171830        </register>
171831        <register>
171832          <name>CPUID</name>
171833          <description>CPUID Base Register</description>
171834          <addressOffset>0xD00</addressOffset>
171835          <size>32</size>
171836          <access>read-only</access>
171837          <resetValue>0x410FC240</resetValue>
171838          <resetMask>0xFFFFFFFF</resetMask>
171839          <fields>
171840            <field>
171841              <name>REVISION</name>
171842              <description>Indicates patch release: 0x0 = Patch 0</description>
171843              <bitOffset>0</bitOffset>
171844              <bitWidth>4</bitWidth>
171845              <access>read-only</access>
171846            </field>
171847            <field>
171848              <name>PARTNO</name>
171849              <description>Indicates part number</description>
171850              <bitOffset>4</bitOffset>
171851              <bitWidth>12</bitWidth>
171852              <access>read-only</access>
171853            </field>
171854            <field>
171855              <name>VARIANT</name>
171856              <description>Indicates processor revision: 0x2 = Revision 2</description>
171857              <bitOffset>20</bitOffset>
171858              <bitWidth>4</bitWidth>
171859              <access>read-only</access>
171860            </field>
171861            <field>
171862              <name>IMPLEMENTER</name>
171863              <description>Implementer code</description>
171864              <bitOffset>24</bitOffset>
171865              <bitWidth>8</bitWidth>
171866              <access>read-only</access>
171867            </field>
171868          </fields>
171869        </register>
171870        <register>
171871          <name>ICSR</name>
171872          <description>Interrupt Control and State Register</description>
171873          <addressOffset>0xD04</addressOffset>
171874          <size>32</size>
171875          <access>read-write</access>
171876          <resetValue>0</resetValue>
171877          <resetMask>0xFFFFFFFF</resetMask>
171878          <fields>
171879            <field>
171880              <name>VECTACTIVE</name>
171881              <description>Active exception number</description>
171882              <bitOffset>0</bitOffset>
171883              <bitWidth>9</bitWidth>
171884              <access>read-only</access>
171885            </field>
171886            <field>
171887              <name>RETTOBASE</name>
171888              <description>no description available</description>
171889              <bitOffset>11</bitOffset>
171890              <bitWidth>1</bitWidth>
171891              <access>read-only</access>
171892              <enumeratedValues>
171893                <enumeratedValue>
171894                  <name>0</name>
171895                  <description>there are preempted active exceptions to execute</description>
171896                  <value>#0</value>
171897                </enumeratedValue>
171898                <enumeratedValue>
171899                  <name>1</name>
171900                  <description>there are no active exceptions, or the currently-executing exception is the only active exception</description>
171901                  <value>#1</value>
171902                </enumeratedValue>
171903              </enumeratedValues>
171904            </field>
171905            <field>
171906              <name>VECTPENDING</name>
171907              <description>Exception number of the highest priority pending enabled exception</description>
171908              <bitOffset>12</bitOffset>
171909              <bitWidth>6</bitWidth>
171910              <access>read-only</access>
171911            </field>
171912            <field>
171913              <name>ISRPENDING</name>
171914              <description>no description available</description>
171915              <bitOffset>22</bitOffset>
171916              <bitWidth>1</bitWidth>
171917              <access>read-only</access>
171918            </field>
171919            <field>
171920              <name>ISRPREEMPT</name>
171921              <description>no description available</description>
171922              <bitOffset>23</bitOffset>
171923              <bitWidth>1</bitWidth>
171924              <access>read-only</access>
171925              <enumeratedValues>
171926                <enumeratedValue>
171927                  <name>0</name>
171928                  <description>Will not service</description>
171929                  <value>#0</value>
171930                </enumeratedValue>
171931                <enumeratedValue>
171932                  <name>1</name>
171933                  <description>Will service a pending exception</description>
171934                  <value>#1</value>
171935                </enumeratedValue>
171936              </enumeratedValues>
171937            </field>
171938            <field>
171939              <name>PENDSTCLR</name>
171940              <description>no description available</description>
171941              <bitOffset>25</bitOffset>
171942              <bitWidth>1</bitWidth>
171943              <access>write-only</access>
171944              <enumeratedValues>
171945                <enumeratedValue>
171946                  <name>0</name>
171947                  <description>no effect</description>
171948                  <value>#0</value>
171949                </enumeratedValue>
171950                <enumeratedValue>
171951                  <name>1</name>
171952                  <description>removes the pending state from the SysTick exception</description>
171953                  <value>#1</value>
171954                </enumeratedValue>
171955              </enumeratedValues>
171956            </field>
171957            <field>
171958              <name>PENDSTSET</name>
171959              <description>no description available</description>
171960              <bitOffset>26</bitOffset>
171961              <bitWidth>1</bitWidth>
171962              <access>read-write</access>
171963              <enumeratedValues>
171964                <enumeratedValue>
171965                  <name>0</name>
171966                  <description>write: no effect; read: SysTick exception is not pending</description>
171967                  <value>#0</value>
171968                </enumeratedValue>
171969                <enumeratedValue>
171970                  <name>1</name>
171971                  <description>write: changes SysTick exception state to pending; read: SysTick exception is pending</description>
171972                  <value>#1</value>
171973                </enumeratedValue>
171974              </enumeratedValues>
171975            </field>
171976            <field>
171977              <name>PENDSVCLR</name>
171978              <description>no description available</description>
171979              <bitOffset>27</bitOffset>
171980              <bitWidth>1</bitWidth>
171981              <access>write-only</access>
171982              <enumeratedValues>
171983                <enumeratedValue>
171984                  <name>0</name>
171985                  <description>no effect</description>
171986                  <value>#0</value>
171987                </enumeratedValue>
171988                <enumeratedValue>
171989                  <name>1</name>
171990                  <description>removes the pending state from the PendSV exception</description>
171991                  <value>#1</value>
171992                </enumeratedValue>
171993              </enumeratedValues>
171994            </field>
171995            <field>
171996              <name>PENDSVSET</name>
171997              <description>no description available</description>
171998              <bitOffset>28</bitOffset>
171999              <bitWidth>1</bitWidth>
172000              <access>read-write</access>
172001              <enumeratedValues>
172002                <enumeratedValue>
172003                  <name>0</name>
172004                  <description>write: no effect; read: PendSV exception is not pending</description>
172005                  <value>#0</value>
172006                </enumeratedValue>
172007                <enumeratedValue>
172008                  <name>1</name>
172009                  <description>write: changes PendSV exception state to pending; read: PendSV exception is pending</description>
172010                  <value>#1</value>
172011                </enumeratedValue>
172012              </enumeratedValues>
172013            </field>
172014            <field>
172015              <name>NMIPENDSET</name>
172016              <description>no description available</description>
172017              <bitOffset>31</bitOffset>
172018              <bitWidth>1</bitWidth>
172019              <access>read-write</access>
172020              <enumeratedValues>
172021                <enumeratedValue>
172022                  <name>0</name>
172023                  <description>write: no effect; read: NMI exception is not pending</description>
172024                  <value>#0</value>
172025                </enumeratedValue>
172026                <enumeratedValue>
172027                  <name>1</name>
172028                  <description>write: changes NMI exception state to pending; read: NMI exception is pending</description>
172029                  <value>#1</value>
172030                </enumeratedValue>
172031              </enumeratedValues>
172032            </field>
172033          </fields>
172034        </register>
172035        <register>
172036          <name>VTOR</name>
172037          <description>Vector Table Offset Register</description>
172038          <addressOffset>0xD08</addressOffset>
172039          <size>32</size>
172040          <access>read-write</access>
172041          <resetValue>0</resetValue>
172042          <resetMask>0xFFFFFFFF</resetMask>
172043          <fields>
172044            <field>
172045              <name>TBLOFF</name>
172046              <description>Vector table base offset</description>
172047              <bitOffset>7</bitOffset>
172048              <bitWidth>25</bitWidth>
172049              <access>read-write</access>
172050            </field>
172051          </fields>
172052        </register>
172053        <register>
172054          <name>AIRCR</name>
172055          <description>Application Interrupt and Reset Control Register</description>
172056          <addressOffset>0xD0C</addressOffset>
172057          <size>32</size>
172058          <access>read-write</access>
172059          <resetValue>0xFA050000</resetValue>
172060          <resetMask>0xFFFFFFFF</resetMask>
172061          <fields>
172062            <field>
172063              <name>VECTRESET</name>
172064              <description>no description available</description>
172065              <bitOffset>0</bitOffset>
172066              <bitWidth>1</bitWidth>
172067              <access>write-only</access>
172068            </field>
172069            <field>
172070              <name>VECTCLRACTIVE</name>
172071              <description>no description available</description>
172072              <bitOffset>1</bitOffset>
172073              <bitWidth>1</bitWidth>
172074              <access>write-only</access>
172075            </field>
172076            <field>
172077              <name>SYSRESETREQ</name>
172078              <description>no description available</description>
172079              <bitOffset>2</bitOffset>
172080              <bitWidth>1</bitWidth>
172081              <access>write-only</access>
172082              <enumeratedValues>
172083                <enumeratedValue>
172084                  <name>0</name>
172085                  <description>no system reset request</description>
172086                  <value>#0</value>
172087                </enumeratedValue>
172088                <enumeratedValue>
172089                  <name>1</name>
172090                  <description>asserts a signal to the outer system that requests a reset</description>
172091                  <value>#1</value>
172092                </enumeratedValue>
172093              </enumeratedValues>
172094            </field>
172095            <field>
172096              <name>PRIGROUP</name>
172097              <description>Interrupt priority grouping field. This field determines the split of group priority from subpriority.</description>
172098              <bitOffset>8</bitOffset>
172099              <bitWidth>3</bitWidth>
172100              <access>read-write</access>
172101            </field>
172102            <field>
172103              <name>ENDIANNESS</name>
172104              <description>no description available</description>
172105              <bitOffset>15</bitOffset>
172106              <bitWidth>1</bitWidth>
172107              <access>read-only</access>
172108              <enumeratedValues>
172109                <enumeratedValue>
172110                  <name>0</name>
172111                  <description>Little-endian</description>
172112                  <value>#0</value>
172113                </enumeratedValue>
172114                <enumeratedValue>
172115                  <name>1</name>
172116                  <description>Big-endian</description>
172117                  <value>#1</value>
172118                </enumeratedValue>
172119              </enumeratedValues>
172120            </field>
172121            <field>
172122              <name>VECTKEY</name>
172123              <description>Register key</description>
172124              <bitOffset>16</bitOffset>
172125              <bitWidth>16</bitWidth>
172126              <access>read-write</access>
172127            </field>
172128          </fields>
172129        </register>
172130        <register>
172131          <name>SCR</name>
172132          <description>System Control Register</description>
172133          <addressOffset>0xD10</addressOffset>
172134          <size>32</size>
172135          <access>read-write</access>
172136          <resetValue>0</resetValue>
172137          <resetMask>0xFFFFFFFF</resetMask>
172138          <fields>
172139            <field>
172140              <name>SLEEPONEXIT</name>
172141              <description>no description available</description>
172142              <bitOffset>1</bitOffset>
172143              <bitWidth>1</bitWidth>
172144              <access>read-write</access>
172145              <enumeratedValues>
172146                <enumeratedValue>
172147                  <name>0</name>
172148                  <description>o not sleep when returning to Thread mode</description>
172149                  <value>#0</value>
172150                </enumeratedValue>
172151                <enumeratedValue>
172152                  <name>1</name>
172153                  <description>enter sleep, or deep sleep, on return from an ISR</description>
172154                  <value>#1</value>
172155                </enumeratedValue>
172156              </enumeratedValues>
172157            </field>
172158            <field>
172159              <name>SLEEPDEEP</name>
172160              <description>no description available</description>
172161              <bitOffset>2</bitOffset>
172162              <bitWidth>1</bitWidth>
172163              <access>read-write</access>
172164              <enumeratedValues>
172165                <enumeratedValue>
172166                  <name>0</name>
172167                  <description>sleep</description>
172168                  <value>#0</value>
172169                </enumeratedValue>
172170                <enumeratedValue>
172171                  <name>1</name>
172172                  <description>deep sleep</description>
172173                  <value>#1</value>
172174                </enumeratedValue>
172175              </enumeratedValues>
172176            </field>
172177            <field>
172178              <name>SEVONPEND</name>
172179              <description>no description available</description>
172180              <bitOffset>4</bitOffset>
172181              <bitWidth>1</bitWidth>
172182              <access>read-write</access>
172183              <enumeratedValues>
172184                <enumeratedValue>
172185                  <name>0</name>
172186                  <description>only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded</description>
172187                  <value>#0</value>
172188                </enumeratedValue>
172189                <enumeratedValue>
172190                  <name>1</name>
172191                  <description>enabled events and all interrupts, including disabled interrupts, can wakeup the processor</description>
172192                  <value>#1</value>
172193                </enumeratedValue>
172194              </enumeratedValues>
172195            </field>
172196          </fields>
172197        </register>
172198        <register>
172199          <name>CCR</name>
172200          <description>Configuration and Control Register</description>
172201          <addressOffset>0xD14</addressOffset>
172202          <size>32</size>
172203          <access>read-write</access>
172204          <resetValue>0</resetValue>
172205          <resetMask>0xFFFFFFFF</resetMask>
172206          <fields>
172207            <field>
172208              <name>NONBASETHRDENA</name>
172209              <description>no description available</description>
172210              <bitOffset>0</bitOffset>
172211              <bitWidth>1</bitWidth>
172212              <access>read-write</access>
172213              <enumeratedValues>
172214                <enumeratedValue>
172215                  <name>0</name>
172216                  <description>processor can enter Thread mode only when no exception is active</description>
172217                  <value>#0</value>
172218                </enumeratedValue>
172219                <enumeratedValue>
172220                  <name>1</name>
172221                  <description>processor can enter Thread mode from any level under the control of an EXC_RETURN value</description>
172222                  <value>#1</value>
172223                </enumeratedValue>
172224              </enumeratedValues>
172225            </field>
172226            <field>
172227              <name>USERSETMPEND</name>
172228              <description>Enables unprivileged software access to the STIR</description>
172229              <bitOffset>1</bitOffset>
172230              <bitWidth>1</bitWidth>
172231              <access>read-write</access>
172232              <enumeratedValues>
172233                <enumeratedValue>
172234                  <name>0</name>
172235                  <description>disable</description>
172236                  <value>#0</value>
172237                </enumeratedValue>
172238                <enumeratedValue>
172239                  <name>1</name>
172240                  <description>enable</description>
172241                  <value>#1</value>
172242                </enumeratedValue>
172243              </enumeratedValues>
172244            </field>
172245            <field>
172246              <name>UNALIGN_TRP</name>
172247              <description>Enables unaligned access traps</description>
172248              <bitOffset>3</bitOffset>
172249              <bitWidth>1</bitWidth>
172250              <access>read-write</access>
172251              <enumeratedValues>
172252                <enumeratedValue>
172253                  <name>0</name>
172254                  <description>do not trap unaligned halfword and word accesses</description>
172255                  <value>#0</value>
172256                </enumeratedValue>
172257                <enumeratedValue>
172258                  <name>1</name>
172259                  <description>trap unaligned halfword and word accesses</description>
172260                  <value>#1</value>
172261                </enumeratedValue>
172262              </enumeratedValues>
172263            </field>
172264            <field>
172265              <name>DIV_0_TRP</name>
172266              <description>Enables faulting or halting when the processor executes an SDIV or UDIV instruction with a divisor of 0</description>
172267              <bitOffset>4</bitOffset>
172268              <bitWidth>1</bitWidth>
172269              <access>read-write</access>
172270              <enumeratedValues>
172271                <enumeratedValue>
172272                  <name>0</name>
172273                  <description>do not trap divide by 0</description>
172274                  <value>#0</value>
172275                </enumeratedValue>
172276                <enumeratedValue>
172277                  <name>1</name>
172278                  <description>trap divide by 0</description>
172279                  <value>#1</value>
172280                </enumeratedValue>
172281              </enumeratedValues>
172282            </field>
172283            <field>
172284              <name>BFHFNMIGN</name>
172285              <description>Enables handlers with priority -1 or -2 to ignore data BusFaults caused by load and store instructions.</description>
172286              <bitOffset>8</bitOffset>
172287              <bitWidth>1</bitWidth>
172288              <access>read-write</access>
172289              <enumeratedValues>
172290                <enumeratedValue>
172291                  <name>0</name>
172292                  <description>data bus faults caused by load and store instructions cause a lock-up</description>
172293                  <value>#0</value>
172294                </enumeratedValue>
172295                <enumeratedValue>
172296                  <name>1</name>
172297                  <description>handlers running at priority -1 and -2 ignore data bus faults caused by load and store instructions</description>
172298                  <value>#1</value>
172299                </enumeratedValue>
172300              </enumeratedValues>
172301            </field>
172302            <field>
172303              <name>STKALIGN</name>
172304              <description>Indicates stack alignment on exception entry</description>
172305              <bitOffset>9</bitOffset>
172306              <bitWidth>1</bitWidth>
172307              <access>read-write</access>
172308              <enumeratedValues>
172309                <enumeratedValue>
172310                  <name>0</name>
172311                  <description>4-byte aligned</description>
172312                  <value>#0</value>
172313                </enumeratedValue>
172314                <enumeratedValue>
172315                  <name>1</name>
172316                  <description>8-byte aligned</description>
172317                  <value>#1</value>
172318                </enumeratedValue>
172319              </enumeratedValues>
172320            </field>
172321          </fields>
172322        </register>
172323        <register>
172324          <name>SHPR1</name>
172325          <description>System Handler Priority Register 1</description>
172326          <addressOffset>0xD18</addressOffset>
172327          <size>32</size>
172328          <access>read-write</access>
172329          <resetValue>0</resetValue>
172330          <resetMask>0xFFFFFFFF</resetMask>
172331          <fields>
172332            <field>
172333              <name>PRI_4</name>
172334              <description>Priority of system handler 4, MemManage</description>
172335              <bitOffset>0</bitOffset>
172336              <bitWidth>8</bitWidth>
172337              <access>read-write</access>
172338            </field>
172339            <field>
172340              <name>PRI_5</name>
172341              <description>Priority of system handler 5, BusFault</description>
172342              <bitOffset>8</bitOffset>
172343              <bitWidth>8</bitWidth>
172344              <access>read-write</access>
172345            </field>
172346            <field>
172347              <name>PRI_6</name>
172348              <description>Priority of system handler 6, UsageFault</description>
172349              <bitOffset>16</bitOffset>
172350              <bitWidth>8</bitWidth>
172351              <access>read-write</access>
172352            </field>
172353          </fields>
172354        </register>
172355        <register>
172356          <name>SHPR2</name>
172357          <description>System Handler Priority Register 2</description>
172358          <addressOffset>0xD1C</addressOffset>
172359          <size>32</size>
172360          <access>read-write</access>
172361          <resetValue>0</resetValue>
172362          <resetMask>0xFFFFFFFF</resetMask>
172363          <fields>
172364            <field>
172365              <name>PRI_11</name>
172366              <description>Priority of system handler 11, SVCall</description>
172367              <bitOffset>24</bitOffset>
172368              <bitWidth>8</bitWidth>
172369              <access>read-write</access>
172370            </field>
172371          </fields>
172372        </register>
172373        <register>
172374          <name>SHPR3</name>
172375          <description>System Handler Priority Register 3</description>
172376          <addressOffset>0xD20</addressOffset>
172377          <size>32</size>
172378          <access>read-write</access>
172379          <resetValue>0</resetValue>
172380          <resetMask>0xFFFFFFFF</resetMask>
172381          <fields>
172382            <field>
172383              <name>PRI_14</name>
172384              <description>Priority of system handler 14, PendSV</description>
172385              <bitOffset>16</bitOffset>
172386              <bitWidth>8</bitWidth>
172387              <access>read-write</access>
172388            </field>
172389            <field>
172390              <name>PRI_15</name>
172391              <description>Priority of system handler 15, SysTick exception</description>
172392              <bitOffset>24</bitOffset>
172393              <bitWidth>8</bitWidth>
172394              <access>read-write</access>
172395            </field>
172396          </fields>
172397        </register>
172398        <register>
172399          <name>SHCSR</name>
172400          <description>System Handler Control and State Register</description>
172401          <addressOffset>0xD24</addressOffset>
172402          <size>32</size>
172403          <access>read-write</access>
172404          <resetValue>0</resetValue>
172405          <resetMask>0xFFFFFFFF</resetMask>
172406          <fields>
172407            <field>
172408              <name>MEMFAULTACT</name>
172409              <description>no description available</description>
172410              <bitOffset>0</bitOffset>
172411              <bitWidth>1</bitWidth>
172412              <access>read-write</access>
172413              <enumeratedValues>
172414                <enumeratedValue>
172415                  <name>0</name>
172416                  <description>exception is not active</description>
172417                  <value>#0</value>
172418                </enumeratedValue>
172419                <enumeratedValue>
172420                  <name>1</name>
172421                  <description>exception is active</description>
172422                  <value>#1</value>
172423                </enumeratedValue>
172424              </enumeratedValues>
172425            </field>
172426            <field>
172427              <name>BUSFAULTACT</name>
172428              <description>no description available</description>
172429              <bitOffset>1</bitOffset>
172430              <bitWidth>1</bitWidth>
172431              <access>read-write</access>
172432              <enumeratedValues>
172433                <enumeratedValue>
172434                  <name>0</name>
172435                  <description>exception is not active</description>
172436                  <value>#0</value>
172437                </enumeratedValue>
172438                <enumeratedValue>
172439                  <name>1</name>
172440                  <description>exception is active</description>
172441                  <value>#1</value>
172442                </enumeratedValue>
172443              </enumeratedValues>
172444            </field>
172445            <field>
172446              <name>USGFAULTACT</name>
172447              <description>no description available</description>
172448              <bitOffset>3</bitOffset>
172449              <bitWidth>1</bitWidth>
172450              <access>read-write</access>
172451              <enumeratedValues>
172452                <enumeratedValue>
172453                  <name>0</name>
172454                  <description>exception is not active</description>
172455                  <value>#0</value>
172456                </enumeratedValue>
172457                <enumeratedValue>
172458                  <name>1</name>
172459                  <description>exception is active</description>
172460                  <value>#1</value>
172461                </enumeratedValue>
172462              </enumeratedValues>
172463            </field>
172464            <field>
172465              <name>SVCALLACT</name>
172466              <description>no description available</description>
172467              <bitOffset>7</bitOffset>
172468              <bitWidth>1</bitWidth>
172469              <access>read-write</access>
172470              <enumeratedValues>
172471                <enumeratedValue>
172472                  <name>0</name>
172473                  <description>exception is not active</description>
172474                  <value>#0</value>
172475                </enumeratedValue>
172476                <enumeratedValue>
172477                  <name>1</name>
172478                  <description>exception is active</description>
172479                  <value>#1</value>
172480                </enumeratedValue>
172481              </enumeratedValues>
172482            </field>
172483            <field>
172484              <name>MONITORACT</name>
172485              <description>no description available</description>
172486              <bitOffset>8</bitOffset>
172487              <bitWidth>1</bitWidth>
172488              <access>read-write</access>
172489              <enumeratedValues>
172490                <enumeratedValue>
172491                  <name>0</name>
172492                  <description>exception is not active</description>
172493                  <value>#0</value>
172494                </enumeratedValue>
172495                <enumeratedValue>
172496                  <name>1</name>
172497                  <description>exception is active</description>
172498                  <value>#1</value>
172499                </enumeratedValue>
172500              </enumeratedValues>
172501            </field>
172502            <field>
172503              <name>PENDSVACT</name>
172504              <description>no description available</description>
172505              <bitOffset>10</bitOffset>
172506              <bitWidth>1</bitWidth>
172507              <access>read-write</access>
172508              <enumeratedValues>
172509                <enumeratedValue>
172510                  <name>0</name>
172511                  <description>exception is not active</description>
172512                  <value>#0</value>
172513                </enumeratedValue>
172514                <enumeratedValue>
172515                  <name>1</name>
172516                  <description>exception is active</description>
172517                  <value>#1</value>
172518                </enumeratedValue>
172519              </enumeratedValues>
172520            </field>
172521            <field>
172522              <name>SYSTICKACT</name>
172523              <description>no description available</description>
172524              <bitOffset>11</bitOffset>
172525              <bitWidth>1</bitWidth>
172526              <access>read-write</access>
172527              <enumeratedValues>
172528                <enumeratedValue>
172529                  <name>0</name>
172530                  <description>exception is not active</description>
172531                  <value>#0</value>
172532                </enumeratedValue>
172533                <enumeratedValue>
172534                  <name>1</name>
172535                  <description>exception is active</description>
172536                  <value>#1</value>
172537                </enumeratedValue>
172538              </enumeratedValues>
172539            </field>
172540            <field>
172541              <name>USGFAULTPENDED</name>
172542              <description>no description available</description>
172543              <bitOffset>12</bitOffset>
172544              <bitWidth>1</bitWidth>
172545              <access>read-write</access>
172546              <enumeratedValues>
172547                <enumeratedValue>
172548                  <name>0</name>
172549                  <description>exception is not pending</description>
172550                  <value>#0</value>
172551                </enumeratedValue>
172552                <enumeratedValue>
172553                  <name>1</name>
172554                  <description>exception is pending</description>
172555                  <value>#1</value>
172556                </enumeratedValue>
172557              </enumeratedValues>
172558            </field>
172559            <field>
172560              <name>MEMFAULTPENDED</name>
172561              <description>no description available</description>
172562              <bitOffset>13</bitOffset>
172563              <bitWidth>1</bitWidth>
172564              <access>read-write</access>
172565              <enumeratedValues>
172566                <enumeratedValue>
172567                  <name>0</name>
172568                  <description>exception is not pending</description>
172569                  <value>#0</value>
172570                </enumeratedValue>
172571                <enumeratedValue>
172572                  <name>1</name>
172573                  <description>exception is pending</description>
172574                  <value>#1</value>
172575                </enumeratedValue>
172576              </enumeratedValues>
172577            </field>
172578            <field>
172579              <name>BUSFAULTPENDED</name>
172580              <description>no description available</description>
172581              <bitOffset>14</bitOffset>
172582              <bitWidth>1</bitWidth>
172583              <access>read-write</access>
172584              <enumeratedValues>
172585                <enumeratedValue>
172586                  <name>0</name>
172587                  <description>exception is not pending</description>
172588                  <value>#0</value>
172589                </enumeratedValue>
172590                <enumeratedValue>
172591                  <name>1</name>
172592                  <description>exception is pending</description>
172593                  <value>#1</value>
172594                </enumeratedValue>
172595              </enumeratedValues>
172596            </field>
172597            <field>
172598              <name>SVCALLPENDED</name>
172599              <description>no description available</description>
172600              <bitOffset>15</bitOffset>
172601              <bitWidth>1</bitWidth>
172602              <access>read-write</access>
172603              <enumeratedValues>
172604                <enumeratedValue>
172605                  <name>0</name>
172606                  <description>exception is not pending</description>
172607                  <value>#0</value>
172608                </enumeratedValue>
172609                <enumeratedValue>
172610                  <name>1</name>
172611                  <description>exception is pending</description>
172612                  <value>#1</value>
172613                </enumeratedValue>
172614              </enumeratedValues>
172615            </field>
172616            <field>
172617              <name>MEMFAULTENA</name>
172618              <description>no description available</description>
172619              <bitOffset>16</bitOffset>
172620              <bitWidth>1</bitWidth>
172621              <access>read-write</access>
172622              <enumeratedValues>
172623                <enumeratedValue>
172624                  <name>0</name>
172625                  <description>disable the exception</description>
172626                  <value>#0</value>
172627                </enumeratedValue>
172628                <enumeratedValue>
172629                  <name>1</name>
172630                  <description>enable the exception</description>
172631                  <value>#1</value>
172632                </enumeratedValue>
172633              </enumeratedValues>
172634            </field>
172635            <field>
172636              <name>BUSFAULTENA</name>
172637              <description>no description available</description>
172638              <bitOffset>17</bitOffset>
172639              <bitWidth>1</bitWidth>
172640              <access>read-write</access>
172641              <enumeratedValues>
172642                <enumeratedValue>
172643                  <name>0</name>
172644                  <description>disable the exception</description>
172645                  <value>#0</value>
172646                </enumeratedValue>
172647                <enumeratedValue>
172648                  <name>1</name>
172649                  <description>enable the exception</description>
172650                  <value>#1</value>
172651                </enumeratedValue>
172652              </enumeratedValues>
172653            </field>
172654            <field>
172655              <name>USGFAULTENA</name>
172656              <description>no description available</description>
172657              <bitOffset>18</bitOffset>
172658              <bitWidth>1</bitWidth>
172659              <access>read-write</access>
172660              <enumeratedValues>
172661                <enumeratedValue>
172662                  <name>0</name>
172663                  <description>disable the exception</description>
172664                  <value>#0</value>
172665                </enumeratedValue>
172666                <enumeratedValue>
172667                  <name>1</name>
172668                  <description>enable the exception</description>
172669                  <value>#1</value>
172670                </enumeratedValue>
172671              </enumeratedValues>
172672            </field>
172673          </fields>
172674        </register>
172675        <register>
172676          <name>CFSR</name>
172677          <description>Configurable Fault Status Registers</description>
172678          <addressOffset>0xD28</addressOffset>
172679          <size>32</size>
172680          <access>read-write</access>
172681          <resetValue>0</resetValue>
172682          <resetMask>0xFFFFFFFF</resetMask>
172683          <fields>
172684            <field>
172685              <name>IACCVIOL</name>
172686              <description>no description available</description>
172687              <bitOffset>0</bitOffset>
172688              <bitWidth>1</bitWidth>
172689              <access>read-write</access>
172690              <enumeratedValues>
172691                <enumeratedValue>
172692                  <name>0</name>
172693                  <description>no instruction access violation fault</description>
172694                  <value>#0</value>
172695                </enumeratedValue>
172696                <enumeratedValue>
172697                  <name>1</name>
172698                  <description>the processor attempted an instruction fetch from a location that does not permit execution</description>
172699                  <value>#1</value>
172700                </enumeratedValue>
172701              </enumeratedValues>
172702            </field>
172703            <field>
172704              <name>DACCVIOL</name>
172705              <description>no description available</description>
172706              <bitOffset>1</bitOffset>
172707              <bitWidth>1</bitWidth>
172708              <access>read-write</access>
172709              <enumeratedValues>
172710                <enumeratedValue>
172711                  <name>0</name>
172712                  <description>no data access violation fault</description>
172713                  <value>#0</value>
172714                </enumeratedValue>
172715                <enumeratedValue>
172716                  <name>1</name>
172717                  <description>the processor attempted a load or store at a location that does not permit the operation</description>
172718                  <value>#1</value>
172719                </enumeratedValue>
172720              </enumeratedValues>
172721            </field>
172722            <field>
172723              <name>MUNSTKERR</name>
172724              <description>no description available</description>
172725              <bitOffset>3</bitOffset>
172726              <bitWidth>1</bitWidth>
172727              <access>read-write</access>
172728              <enumeratedValues>
172729                <enumeratedValue>
172730                  <name>0</name>
172731                  <description>no unstacking fault</description>
172732                  <value>#0</value>
172733                </enumeratedValue>
172734                <enumeratedValue>
172735                  <name>1</name>
172736                  <description>unstack for an exception return has caused one or more access violations</description>
172737                  <value>#1</value>
172738                </enumeratedValue>
172739              </enumeratedValues>
172740            </field>
172741            <field>
172742              <name>MSTKERR</name>
172743              <description>no description available</description>
172744              <bitOffset>4</bitOffset>
172745              <bitWidth>1</bitWidth>
172746              <access>read-write</access>
172747              <enumeratedValues>
172748                <enumeratedValue>
172749                  <name>0</name>
172750                  <description>no stacking fault</description>
172751                  <value>#0</value>
172752                </enumeratedValue>
172753                <enumeratedValue>
172754                  <name>1</name>
172755                  <description>stacking for an exception entry has caused one or more access violations</description>
172756                  <value>#1</value>
172757                </enumeratedValue>
172758              </enumeratedValues>
172759            </field>
172760            <field>
172761              <name>MLSPERR</name>
172762              <description>no description available</description>
172763              <bitOffset>5</bitOffset>
172764              <bitWidth>1</bitWidth>
172765              <access>read-write</access>
172766              <enumeratedValues>
172767                <enumeratedValue>
172768                  <name>0</name>
172769                  <description>No MemManage fault occurred during floating-point lazy state preservation</description>
172770                  <value>#0</value>
172771                </enumeratedValue>
172772                <enumeratedValue>
172773                  <name>1</name>
172774                  <description>A MemManage fault occurred during floating-point lazy state preservation</description>
172775                  <value>#1</value>
172776                </enumeratedValue>
172777              </enumeratedValues>
172778            </field>
172779            <field>
172780              <name>MMARVALID</name>
172781              <description>no description available</description>
172782              <bitOffset>7</bitOffset>
172783              <bitWidth>1</bitWidth>
172784              <access>read-write</access>
172785              <enumeratedValues>
172786                <enumeratedValue>
172787                  <name>0</name>
172788                  <description>value in MMAR is not a valid fault address</description>
172789                  <value>#0</value>
172790                </enumeratedValue>
172791                <enumeratedValue>
172792                  <name>1</name>
172793                  <description>MMAR holds a valid fault address</description>
172794                  <value>#1</value>
172795                </enumeratedValue>
172796              </enumeratedValues>
172797            </field>
172798            <field>
172799              <name>IBUSERR</name>
172800              <description>no description available</description>
172801              <bitOffset>8</bitOffset>
172802              <bitWidth>1</bitWidth>
172803              <access>read-write</access>
172804              <enumeratedValues>
172805                <enumeratedValue>
172806                  <name>0</name>
172807                  <description>no instruction bus error</description>
172808                  <value>#0</value>
172809                </enumeratedValue>
172810                <enumeratedValue>
172811                  <name>1</name>
172812                  <description>instruction bus error</description>
172813                  <value>#1</value>
172814                </enumeratedValue>
172815              </enumeratedValues>
172816            </field>
172817            <field>
172818              <name>PRECISERR</name>
172819              <description>no description available</description>
172820              <bitOffset>9</bitOffset>
172821              <bitWidth>1</bitWidth>
172822              <access>read-write</access>
172823              <enumeratedValues>
172824                <enumeratedValue>
172825                  <name>0</name>
172826                  <description>no precise data bus error</description>
172827                  <value>#0</value>
172828                </enumeratedValue>
172829                <enumeratedValue>
172830                  <name>1</name>
172831                  <description>a data bus error has occurred, and the PC value stacked for the exception return points to the instruction that caused the fault</description>
172832                  <value>#1</value>
172833                </enumeratedValue>
172834              </enumeratedValues>
172835            </field>
172836            <field>
172837              <name>IMPRECISERR</name>
172838              <description>no description available</description>
172839              <bitOffset>10</bitOffset>
172840              <bitWidth>1</bitWidth>
172841              <access>read-write</access>
172842              <enumeratedValues>
172843                <enumeratedValue>
172844                  <name>0</name>
172845                  <description>no imprecise data bus error</description>
172846                  <value>#0</value>
172847                </enumeratedValue>
172848                <enumeratedValue>
172849                  <name>1</name>
172850                  <description>a data bus error has occurred, but the return address in the stack frame is not related to the instruction that caused the error</description>
172851                  <value>#1</value>
172852                </enumeratedValue>
172853              </enumeratedValues>
172854            </field>
172855            <field>
172856              <name>UNSTKERR</name>
172857              <description>no description available</description>
172858              <bitOffset>11</bitOffset>
172859              <bitWidth>1</bitWidth>
172860              <access>read-write</access>
172861              <enumeratedValues>
172862                <enumeratedValue>
172863                  <name>0</name>
172864                  <description>no unstacking fault</description>
172865                  <value>#0</value>
172866                </enumeratedValue>
172867                <enumeratedValue>
172868                  <name>1</name>
172869                  <description>unstack for an exception return has caused one or more BusFaults</description>
172870                  <value>#1</value>
172871                </enumeratedValue>
172872              </enumeratedValues>
172873            </field>
172874            <field>
172875              <name>STKERR</name>
172876              <description>no description available</description>
172877              <bitOffset>12</bitOffset>
172878              <bitWidth>1</bitWidth>
172879              <access>read-write</access>
172880              <enumeratedValues>
172881                <enumeratedValue>
172882                  <name>0</name>
172883                  <description>no stacking fault</description>
172884                  <value>#0</value>
172885                </enumeratedValue>
172886                <enumeratedValue>
172887                  <name>1</name>
172888                  <description>stacking for an exception entry has caused one or more BusFaults</description>
172889                  <value>#1</value>
172890                </enumeratedValue>
172891              </enumeratedValues>
172892            </field>
172893            <field>
172894              <name>LSPERR</name>
172895              <description>no description available</description>
172896              <bitOffset>13</bitOffset>
172897              <bitWidth>1</bitWidth>
172898              <access>read-write</access>
172899              <enumeratedValues>
172900                <enumeratedValue>
172901                  <name>0</name>
172902                  <description>No bus fault occurred during floating-point lazy state preservation</description>
172903                  <value>#0</value>
172904                </enumeratedValue>
172905                <enumeratedValue>
172906                  <name>1</name>
172907                  <description>A bus fault occurred during floating-point lazy state preservation</description>
172908                  <value>#1</value>
172909                </enumeratedValue>
172910              </enumeratedValues>
172911            </field>
172912            <field>
172913              <name>BFARVALID</name>
172914              <description>no description available</description>
172915              <bitOffset>15</bitOffset>
172916              <bitWidth>1</bitWidth>
172917              <access>read-write</access>
172918              <enumeratedValues>
172919                <enumeratedValue>
172920                  <name>0</name>
172921                  <description>value in BFAR is not a valid fault address</description>
172922                  <value>#0</value>
172923                </enumeratedValue>
172924                <enumeratedValue>
172925                  <name>1</name>
172926                  <description>BFAR holds a valid fault address</description>
172927                  <value>#1</value>
172928                </enumeratedValue>
172929              </enumeratedValues>
172930            </field>
172931            <field>
172932              <name>UNDEFINSTR</name>
172933              <description>no description available</description>
172934              <bitOffset>16</bitOffset>
172935              <bitWidth>1</bitWidth>
172936              <access>read-write</access>
172937              <enumeratedValues>
172938                <enumeratedValue>
172939                  <name>0</name>
172940                  <description>no undefined instruction UsageFault</description>
172941                  <value>#0</value>
172942                </enumeratedValue>
172943                <enumeratedValue>
172944                  <name>1</name>
172945                  <description>the processor has attempted to execute an undefined instruction</description>
172946                  <value>#1</value>
172947                </enumeratedValue>
172948              </enumeratedValues>
172949            </field>
172950            <field>
172951              <name>INVSTATE</name>
172952              <description>no description available</description>
172953              <bitOffset>17</bitOffset>
172954              <bitWidth>1</bitWidth>
172955              <access>read-write</access>
172956              <enumeratedValues>
172957                <enumeratedValue>
172958                  <name>0</name>
172959                  <description>no invalid state UsageFault</description>
172960                  <value>#0</value>
172961                </enumeratedValue>
172962                <enumeratedValue>
172963                  <name>1</name>
172964                  <description>the processor has attempted to execute an instruction that makes illegal use of the EPSR</description>
172965                  <value>#1</value>
172966                </enumeratedValue>
172967              </enumeratedValues>
172968            </field>
172969            <field>
172970              <name>INVPC</name>
172971              <description>no description available</description>
172972              <bitOffset>18</bitOffset>
172973              <bitWidth>1</bitWidth>
172974              <access>read-write</access>
172975              <enumeratedValues>
172976                <enumeratedValue>
172977                  <name>0</name>
172978                  <description>no invalid PC load UsageFault</description>
172979                  <value>#0</value>
172980                </enumeratedValue>
172981                <enumeratedValue>
172982                  <name>1</name>
172983                  <description>the processor has attempted an illegal load of EXC_RETURN to the PC</description>
172984                  <value>#1</value>
172985                </enumeratedValue>
172986              </enumeratedValues>
172987            </field>
172988            <field>
172989              <name>NOCP</name>
172990              <description>no description available</description>
172991              <bitOffset>19</bitOffset>
172992              <bitWidth>1</bitWidth>
172993              <access>read-write</access>
172994              <enumeratedValues>
172995                <enumeratedValue>
172996                  <name>0</name>
172997                  <description>no UsageFault caused by attempting to access a coprocessor</description>
172998                  <value>#0</value>
172999                </enumeratedValue>
173000                <enumeratedValue>
173001                  <name>1</name>
173002                  <description>the processor has attempted to access a coprocessor</description>
173003                  <value>#1</value>
173004                </enumeratedValue>
173005              </enumeratedValues>
173006            </field>
173007            <field>
173008              <name>UNALIGNED</name>
173009              <description>no description available</description>
173010              <bitOffset>24</bitOffset>
173011              <bitWidth>1</bitWidth>
173012              <access>read-write</access>
173013              <enumeratedValues>
173014                <enumeratedValue>
173015                  <name>0</name>
173016                  <description>no unaligned access fault, or unaligned access trapping not enabled</description>
173017                  <value>#0</value>
173018                </enumeratedValue>
173019                <enumeratedValue>
173020                  <name>1</name>
173021                  <description>the processor has made an unaligned memory access</description>
173022                  <value>#1</value>
173023                </enumeratedValue>
173024              </enumeratedValues>
173025            </field>
173026            <field>
173027              <name>DIVBYZERO</name>
173028              <description>no description available</description>
173029              <bitOffset>25</bitOffset>
173030              <bitWidth>1</bitWidth>
173031              <access>read-write</access>
173032              <enumeratedValues>
173033                <enumeratedValue>
173034                  <name>0</name>
173035                  <description>no divide by zero fault, or divide by zero trapping not enabled</description>
173036                  <value>#0</value>
173037                </enumeratedValue>
173038                <enumeratedValue>
173039                  <name>1</name>
173040                  <description>the processor has executed an SDIV or UDIV instruction with a divisor of 0</description>
173041                  <value>#1</value>
173042                </enumeratedValue>
173043              </enumeratedValues>
173044            </field>
173045          </fields>
173046        </register>
173047        <register>
173048          <name>HFSR</name>
173049          <description>HardFault Status register</description>
173050          <addressOffset>0xD2C</addressOffset>
173051          <size>32</size>
173052          <access>read-write</access>
173053          <resetValue>0</resetValue>
173054          <resetMask>0xFFFFFFFF</resetMask>
173055          <fields>
173056            <field>
173057              <name>VECTTBL</name>
173058              <description>no description available</description>
173059              <bitOffset>1</bitOffset>
173060              <bitWidth>1</bitWidth>
173061              <access>read-write</access>
173062              <enumeratedValues>
173063                <enumeratedValue>
173064                  <name>0</name>
173065                  <description>no BusFault on vector table read</description>
173066                  <value>#0</value>
173067                </enumeratedValue>
173068                <enumeratedValue>
173069                  <name>1</name>
173070                  <description>BusFault on vector table read</description>
173071                  <value>#1</value>
173072                </enumeratedValue>
173073              </enumeratedValues>
173074            </field>
173075            <field>
173076              <name>FORCED</name>
173077              <description>no description available</description>
173078              <bitOffset>30</bitOffset>
173079              <bitWidth>1</bitWidth>
173080              <access>read-write</access>
173081              <enumeratedValues>
173082                <enumeratedValue>
173083                  <name>0</name>
173084                  <description>no forced HardFault</description>
173085                  <value>#0</value>
173086                </enumeratedValue>
173087                <enumeratedValue>
173088                  <name>1</name>
173089                  <description>forced HardFault</description>
173090                  <value>#1</value>
173091                </enumeratedValue>
173092              </enumeratedValues>
173093            </field>
173094            <field>
173095              <name>DEBUGEVT</name>
173096              <description>no description available</description>
173097              <bitOffset>31</bitOffset>
173098              <bitWidth>1</bitWidth>
173099              <access>read-write</access>
173100            </field>
173101          </fields>
173102        </register>
173103        <register>
173104          <name>DFSR</name>
173105          <description>Debug Fault Status Register</description>
173106          <addressOffset>0xD30</addressOffset>
173107          <size>32</size>
173108          <access>read-write</access>
173109          <resetValue>0</resetValue>
173110          <resetMask>0xFFFFFFFF</resetMask>
173111          <fields>
173112            <field>
173113              <name>HALTED</name>
173114              <description>no description available</description>
173115              <bitOffset>0</bitOffset>
173116              <bitWidth>1</bitWidth>
173117              <access>read-write</access>
173118              <enumeratedValues>
173119                <enumeratedValue>
173120                  <name>0</name>
173121                  <description>No active halt request debug event</description>
173122                  <value>#0</value>
173123                </enumeratedValue>
173124                <enumeratedValue>
173125                  <name>1</name>
173126                  <description>Halt request debug event active</description>
173127                  <value>#1</value>
173128                </enumeratedValue>
173129              </enumeratedValues>
173130            </field>
173131            <field>
173132              <name>BKPT</name>
173133              <description>no description available</description>
173134              <bitOffset>1</bitOffset>
173135              <bitWidth>1</bitWidth>
173136              <access>read-write</access>
173137              <enumeratedValues>
173138                <enumeratedValue>
173139                  <name>0</name>
173140                  <description>No current breakpoint debug event</description>
173141                  <value>#0</value>
173142                </enumeratedValue>
173143                <enumeratedValue>
173144                  <name>1</name>
173145                  <description>At least one current breakpoint debug event</description>
173146                  <value>#1</value>
173147                </enumeratedValue>
173148              </enumeratedValues>
173149            </field>
173150            <field>
173151              <name>DWTTRAP</name>
173152              <description>no description available</description>
173153              <bitOffset>2</bitOffset>
173154              <bitWidth>1</bitWidth>
173155              <access>read-write</access>
173156              <enumeratedValues>
173157                <enumeratedValue>
173158                  <name>0</name>
173159                  <description>No current debug events generated by the DWT</description>
173160                  <value>#0</value>
173161                </enumeratedValue>
173162                <enumeratedValue>
173163                  <name>1</name>
173164                  <description>At least one current debug event generated by the DWT</description>
173165                  <value>#1</value>
173166                </enumeratedValue>
173167              </enumeratedValues>
173168            </field>
173169            <field>
173170              <name>VCATCH</name>
173171              <description>no description available</description>
173172              <bitOffset>3</bitOffset>
173173              <bitWidth>1</bitWidth>
173174              <access>read-write</access>
173175              <enumeratedValues>
173176                <enumeratedValue>
173177                  <name>0</name>
173178                  <description>No Vector catch triggered</description>
173179                  <value>#0</value>
173180                </enumeratedValue>
173181                <enumeratedValue>
173182                  <name>1</name>
173183                  <description>Vector catch triggered</description>
173184                  <value>#1</value>
173185                </enumeratedValue>
173186              </enumeratedValues>
173187            </field>
173188            <field>
173189              <name>EXTERNAL</name>
173190              <description>no description available</description>
173191              <bitOffset>4</bitOffset>
173192              <bitWidth>1</bitWidth>
173193              <access>read-write</access>
173194              <enumeratedValues>
173195                <enumeratedValue>
173196                  <name>0</name>
173197                  <description>No EDBGRQ debug event</description>
173198                  <value>#0</value>
173199                </enumeratedValue>
173200                <enumeratedValue>
173201                  <name>1</name>
173202                  <description>EDBGRQ debug event</description>
173203                  <value>#1</value>
173204                </enumeratedValue>
173205              </enumeratedValues>
173206            </field>
173207          </fields>
173208        </register>
173209        <register>
173210          <name>MMFAR</name>
173211          <description>MemManage Address Register</description>
173212          <addressOffset>0xD34</addressOffset>
173213          <size>32</size>
173214          <access>read-write</access>
173215          <resetValue>0</resetValue>
173216          <resetMask>0xFFFFFFFF</resetMask>
173217          <fields>
173218            <field>
173219              <name>ADDRESS</name>
173220              <description>Address of MemManage fault location</description>
173221              <bitOffset>0</bitOffset>
173222              <bitWidth>32</bitWidth>
173223              <access>read-write</access>
173224            </field>
173225          </fields>
173226        </register>
173227        <register>
173228          <name>BFAR</name>
173229          <description>BusFault Address Register</description>
173230          <addressOffset>0xD38</addressOffset>
173231          <size>32</size>
173232          <access>read-write</access>
173233          <resetValue>0</resetValue>
173234          <resetMask>0xFFFFFFFF</resetMask>
173235          <fields>
173236            <field>
173237              <name>ADDRESS</name>
173238              <description>Address of the BusFault location</description>
173239              <bitOffset>0</bitOffset>
173240              <bitWidth>32</bitWidth>
173241              <access>read-write</access>
173242            </field>
173243          </fields>
173244        </register>
173245        <register>
173246          <name>AFSR</name>
173247          <description>Auxiliary Fault Status Register</description>
173248          <addressOffset>0xD3C</addressOffset>
173249          <size>32</size>
173250          <access>read-write</access>
173251          <resetValue>0</resetValue>
173252          <resetMask>0xFFFFFFFF</resetMask>
173253          <fields>
173254            <field>
173255              <name>AUXFAULT</name>
173256              <description>Latched version of the AUXFAULT inputs</description>
173257              <bitOffset>0</bitOffset>
173258              <bitWidth>32</bitWidth>
173259              <access>read-write</access>
173260            </field>
173261          </fields>
173262        </register>
173263        <register>
173264          <name>CPACR</name>
173265          <description>Coprocessor Access Control Register</description>
173266          <addressOffset>0xD88</addressOffset>
173267          <size>32</size>
173268          <access>read-write</access>
173269          <resetValue>0</resetValue>
173270          <resetMask>0xFFFFFFFF</resetMask>
173271          <fields>
173272            <field>
173273              <name>CP10</name>
173274              <description>Access privileges for coprocessor 10.</description>
173275              <bitOffset>20</bitOffset>
173276              <bitWidth>2</bitWidth>
173277              <access>read-write</access>
173278              <enumeratedValues>
173279                <enumeratedValue>
173280                  <name>00</name>
173281                  <description>Access denied. Any attempted access generates a NOCP UsageFault</description>
173282                  <value>#00</value>
173283                </enumeratedValue>
173284                <enumeratedValue>
173285                  <name>01</name>
173286                  <description>Privileged access only. An unprivileged access generates a NOCP fault.</description>
173287                  <value>#01</value>
173288                </enumeratedValue>
173289                <enumeratedValue>
173290                  <name>10</name>
173291                  <description>Reserved. The result of any access is UNPREDICTABLE.</description>
173292                  <value>#10</value>
173293                </enumeratedValue>
173294                <enumeratedValue>
173295                  <name>11</name>
173296                  <description>Full access.</description>
173297                  <value>#11</value>
173298                </enumeratedValue>
173299              </enumeratedValues>
173300            </field>
173301            <field>
173302              <name>CP11</name>
173303              <description>Access privileges for coprocessor 11.</description>
173304              <bitOffset>22</bitOffset>
173305              <bitWidth>2</bitWidth>
173306              <access>read-write</access>
173307              <enumeratedValues>
173308                <enumeratedValue>
173309                  <name>00</name>
173310                  <description>Access denied. Any attempted access generates a NOCP UsageFault</description>
173311                  <value>#00</value>
173312                </enumeratedValue>
173313                <enumeratedValue>
173314                  <name>01</name>
173315                  <description>Privileged access only. An unprivileged access generates a NOCP fault.</description>
173316                  <value>#01</value>
173317                </enumeratedValue>
173318                <enumeratedValue>
173319                  <name>10</name>
173320                  <description>Reserved. The result of any access is UNPREDICTABLE.</description>
173321                  <value>#10</value>
173322                </enumeratedValue>
173323                <enumeratedValue>
173324                  <name>11</name>
173325                  <description>Full access.</description>
173326                  <value>#11</value>
173327                </enumeratedValue>
173328              </enumeratedValues>
173329            </field>
173330          </fields>
173331        </register>
173332        <register>
173333          <name>FPCCR</name>
173334          <description>Floating-point Context Control Register</description>
173335          <addressOffset>0xF34</addressOffset>
173336          <size>32</size>
173337          <access>read-write</access>
173338          <resetValue>0xC0000000</resetValue>
173339          <resetMask>0xFFFFFFFF</resetMask>
173340          <fields>
173341            <field>
173342              <name>LSPACT</name>
173343              <description>Lazy state preservation.</description>
173344              <bitOffset>0</bitOffset>
173345              <bitWidth>1</bitWidth>
173346              <access>read-write</access>
173347              <enumeratedValues>
173348                <enumeratedValue>
173349                  <name>0</name>
173350                  <description>Lazy state preservation is not active.</description>
173351                  <value>#0</value>
173352                </enumeratedValue>
173353                <enumeratedValue>
173354                  <name>1</name>
173355                  <description>Lazy state preservation is active. floating-point stack frame has been allocated but saving state to it has been deferred.</description>
173356                  <value>#1</value>
173357                </enumeratedValue>
173358              </enumeratedValues>
173359            </field>
173360            <field>
173361              <name>USER</name>
173362              <description>Privilege level when the floating-point stack frame was allocated.</description>
173363              <bitOffset>1</bitOffset>
173364              <bitWidth>1</bitWidth>
173365              <access>read-write</access>
173366              <enumeratedValues>
173367                <enumeratedValue>
173368                  <name>0</name>
173369                  <description>Privilege level was not user when the floating-point stack frame was allocated.</description>
173370                  <value>#0</value>
173371                </enumeratedValue>
173372                <enumeratedValue>
173373                  <name>1</name>
173374                  <description>Privilege level was user when the floating-point stack frame was allocated.</description>
173375                  <value>#1</value>
173376                </enumeratedValue>
173377              </enumeratedValues>
173378            </field>
173379            <field>
173380              <name>THREAD</name>
173381              <description>Mode when the floating-point stack frame was allocated.</description>
173382              <bitOffset>3</bitOffset>
173383              <bitWidth>1</bitWidth>
173384              <access>read-write</access>
173385              <enumeratedValues>
173386                <enumeratedValue>
173387                  <name>0</name>
173388                  <description>Mode was not Thread Mode when the floating-point stack frame was allocated.</description>
173389                  <value>#0</value>
173390                </enumeratedValue>
173391                <enumeratedValue>
173392                  <name>1</name>
173393                  <description>Mode was Thread Mode when the floating-point stack frame was allocated.</description>
173394                  <value>#1</value>
173395                </enumeratedValue>
173396              </enumeratedValues>
173397            </field>
173398            <field>
173399              <name>HFRDY</name>
173400              <description>Permission to set the HardFault handler to the pending state when the floating-point stack frame was allocated.</description>
173401              <bitOffset>4</bitOffset>
173402              <bitWidth>1</bitWidth>
173403              <access>read-write</access>
173404              <enumeratedValues>
173405                <enumeratedValue>
173406                  <name>0</name>
173407                  <description>Priority did not permit setting the HardFault handler to the pending state when the floating-point stack frame was allocated.</description>
173408                  <value>#0</value>
173409                </enumeratedValue>
173410                <enumeratedValue>
173411                  <name>1</name>
173412                  <description>Priority permitted setting the HardFault handler to the pending state when the floating-point stack frame was allocated.</description>
173413                  <value>#1</value>
173414                </enumeratedValue>
173415              </enumeratedValues>
173416            </field>
173417            <field>
173418              <name>MMRDY</name>
173419              <description>Permission to set the MemManage handler to the pending state when the floating-point stack frame was allocated.</description>
173420              <bitOffset>5</bitOffset>
173421              <bitWidth>1</bitWidth>
173422              <access>read-write</access>
173423              <enumeratedValues>
173424                <enumeratedValue>
173425                  <name>0</name>
173426                  <description>MemManage is disabled or priority did not permit setting the MemManage handler to the pending state when the floating-point stack frame was allocated.</description>
173427                  <value>#0</value>
173428                </enumeratedValue>
173429                <enumeratedValue>
173430                  <name>1</name>
173431                  <description>MemManage is enabled and priority permitted setting the MemManage handler to the pending state when the floating-point stack frame was allocated.</description>
173432                  <value>#1</value>
173433                </enumeratedValue>
173434              </enumeratedValues>
173435            </field>
173436            <field>
173437              <name>BFRDY</name>
173438              <description>Permission to set the BusFault handler to the pending state when the floating-point stack frame was allocated.</description>
173439              <bitOffset>6</bitOffset>
173440              <bitWidth>1</bitWidth>
173441              <access>read-write</access>
173442              <enumeratedValues>
173443                <enumeratedValue>
173444                  <name>0</name>
173445                  <description>BusFault is disabled or priority did not permit setting the BusFault handler to the pending state when the floating-point stack frame was allocated.</description>
173446                  <value>#0</value>
173447                </enumeratedValue>
173448                <enumeratedValue>
173449                  <name>1</name>
173450                  <description>BusFault is disabled or priority did not permit setting the BusFault handler to the pending state when the floating-point stack frame was allocated.</description>
173451                  <value>#1</value>
173452                </enumeratedValue>
173453              </enumeratedValues>
173454            </field>
173455            <field>
173456              <name>MONRDY</name>
173457              <description>Permission to set the MON_PEND when the floating-point stack frame was allocated.</description>
173458              <bitOffset>8</bitOffset>
173459              <bitWidth>1</bitWidth>
173460              <access>read-write</access>
173461              <enumeratedValues>
173462                <enumeratedValue>
173463                  <name>0</name>
173464                  <description>DebugMonitor is disabled or priority did not permit setting MON_PEND when the floating-point stack frame was allocated.</description>
173465                  <value>#0</value>
173466                </enumeratedValue>
173467                <enumeratedValue>
173468                  <name>1</name>
173469                  <description>DebugMonitor is enabled and priority permits setting MON_PEND when the floating-point stack frame was allocated.</description>
173470                  <value>#1</value>
173471                </enumeratedValue>
173472              </enumeratedValues>
173473            </field>
173474            <field>
173475              <name>LSPEN</name>
173476              <description>Lazy state preservation for floating-point context.</description>
173477              <bitOffset>30</bitOffset>
173478              <bitWidth>1</bitWidth>
173479              <access>read-write</access>
173480              <enumeratedValues>
173481                <enumeratedValue>
173482                  <name>0</name>
173483                  <description>Disable automatic lazy state preservation for floating-point context.</description>
173484                  <value>#0</value>
173485                </enumeratedValue>
173486                <enumeratedValue>
173487                  <name>1</name>
173488                  <description>Enable automatic lazy state preservation for floating-point context.</description>
173489                  <value>#1</value>
173490                </enumeratedValue>
173491              </enumeratedValues>
173492            </field>
173493            <field>
173494              <name>ASPEN</name>
173495              <description>Enables CONTROL2 setting on execution of a floating-point instruction. This results in automatic hardware state preservation and restoration, for floating-point context, on exception entry and exit.</description>
173496              <bitOffset>31</bitOffset>
173497              <bitWidth>1</bitWidth>
173498              <access>read-write</access>
173499              <enumeratedValues>
173500                <enumeratedValue>
173501                  <name>0</name>
173502                  <description>Disable CONTROL2 setting on execution of a floating-point instruction.</description>
173503                  <value>#0</value>
173504                </enumeratedValue>
173505                <enumeratedValue>
173506                  <name>1</name>
173507                  <description>Enable CONTROL2 setting on execution of a floating-point instruction.</description>
173508                  <value>#1</value>
173509                </enumeratedValue>
173510              </enumeratedValues>
173511            </field>
173512          </fields>
173513        </register>
173514        <register>
173515          <name>FPCAR</name>
173516          <description>Floating-point Context Address Register</description>
173517          <addressOffset>0xF38</addressOffset>
173518          <size>32</size>
173519          <access>read-write</access>
173520          <resetValue>0</resetValue>
173521          <resetMask>0</resetMask>
173522          <fields>
173523            <field>
173524              <name>ADDRESS</name>
173525              <description>The location of the unpopulated floating-point register space allocated on an exception stack frame.</description>
173526              <bitOffset>3</bitOffset>
173527              <bitWidth>29</bitWidth>
173528              <access>read-write</access>
173529            </field>
173530          </fields>
173531        </register>
173532        <register>
173533          <name>FPDSCR</name>
173534          <description>Floating-point Default Status Control Register</description>
173535          <addressOffset>0xF3C</addressOffset>
173536          <size>32</size>
173537          <access>read-write</access>
173538          <resetValue>0</resetValue>
173539          <resetMask>0xFFFFFFFF</resetMask>
173540          <fields>
173541            <field>
173542              <name>RMode</name>
173543              <description>Default value for FPSCR.RMode (Rounding Mode control field).</description>
173544              <bitOffset>22</bitOffset>
173545              <bitWidth>2</bitWidth>
173546              <access>read-write</access>
173547              <enumeratedValues>
173548                <enumeratedValue>
173549                  <name>00</name>
173550                  <description>Round to Nearest (RN) mode</description>
173551                  <value>#00</value>
173552                </enumeratedValue>
173553                <enumeratedValue>
173554                  <name>01</name>
173555                  <description>Round towards Plus Infinity (RP) mode.</description>
173556                  <value>#01</value>
173557                </enumeratedValue>
173558                <enumeratedValue>
173559                  <name>10</name>
173560                  <description>Round towards Minus Infinity (RM) mode.</description>
173561                  <value>#10</value>
173562                </enumeratedValue>
173563                <enumeratedValue>
173564                  <name>11</name>
173565                  <description>Round towards Zero (RZ) mode.</description>
173566                  <value>#11</value>
173567                </enumeratedValue>
173568              </enumeratedValues>
173569            </field>
173570            <field>
173571              <name>FZ</name>
173572              <description>Default value for FPSCR.FZ (Flush-to-zero mode control bit).</description>
173573              <bitOffset>24</bitOffset>
173574              <bitWidth>1</bitWidth>
173575              <access>read-write</access>
173576              <enumeratedValues>
173577                <enumeratedValue>
173578                  <name>0</name>
173579                  <description>Flush-to-zero mode disabled. Behavior of the floating-point system is fully compliant with the IEEE 754 standard.</description>
173580                  <value>#0</value>
173581                </enumeratedValue>
173582                <enumeratedValue>
173583                  <name>1</name>
173584                  <description>Flush-to-zero mode enabled.</description>
173585                  <value>#1</value>
173586                </enumeratedValue>
173587              </enumeratedValues>
173588            </field>
173589            <field>
173590              <name>DN</name>
173591              <description>Default value for FPSCR.DN (Default NaN mode control bit).</description>
173592              <bitOffset>25</bitOffset>
173593              <bitWidth>1</bitWidth>
173594              <access>read-write</access>
173595              <enumeratedValues>
173596                <enumeratedValue>
173597                  <name>0</name>
173598                  <description>NaN operands propagate through to the output of a floating-point operation.</description>
173599                  <value>#0</value>
173600                </enumeratedValue>
173601                <enumeratedValue>
173602                  <name>1</name>
173603                  <description>Any operation involving one or more NaNs returns the Default NaN.</description>
173604                  <value>#1</value>
173605                </enumeratedValue>
173606              </enumeratedValues>
173607            </field>
173608            <field>
173609              <name>AHP</name>
173610              <description>Default value for FPSCR.AHP (Alternative half-precision control bit).</description>
173611              <bitOffset>26</bitOffset>
173612              <bitWidth>1</bitWidth>
173613              <access>read-write</access>
173614              <enumeratedValues>
173615                <enumeratedValue>
173616                  <name>0</name>
173617                  <description>IEEE half-precision format selected.</description>
173618                  <value>#0</value>
173619                </enumeratedValue>
173620                <enumeratedValue>
173621                  <name>1</name>
173622                  <description>Alternative half-precision format selected.</description>
173623                  <value>#1</value>
173624                </enumeratedValue>
173625              </enumeratedValues>
173626            </field>
173627          </fields>
173628        </register>
173629      </registers>
173630    </peripheral>
173631    <peripheral>
173632      <name>SysTick</name>
173633      <description>System timer</description>
173634      <prependToName>SYST_</prependToName>
173635      <baseAddress>0xE000E010</baseAddress>
173636      <addressBlock>
173637        <offset>0</offset>
173638        <size>0x10</size>
173639        <usage>registers</usage>
173640      </addressBlock>
173641      <registers>
173642        <register>
173643          <name>CSR</name>
173644          <description>SysTick Control and Status Register</description>
173645          <addressOffset>0</addressOffset>
173646          <size>32</size>
173647          <access>read-write</access>
173648          <resetValue>0x4</resetValue>
173649          <resetMask>0xFFFFFFFF</resetMask>
173650          <fields>
173651            <field>
173652              <name>ENABLE</name>
173653              <description>no description available</description>
173654              <bitOffset>0</bitOffset>
173655              <bitWidth>1</bitWidth>
173656              <access>read-write</access>
173657              <enumeratedValues>
173658                <enumeratedValue>
173659                  <name>0</name>
173660                  <description>counter disabled</description>
173661                  <value>#0</value>
173662                </enumeratedValue>
173663                <enumeratedValue>
173664                  <name>1</name>
173665                  <description>counter enabled</description>
173666                  <value>#1</value>
173667                </enumeratedValue>
173668              </enumeratedValues>
173669            </field>
173670            <field>
173671              <name>TICKINT</name>
173672              <description>no description available</description>
173673              <bitOffset>1</bitOffset>
173674              <bitWidth>1</bitWidth>
173675              <access>read-write</access>
173676              <enumeratedValues>
173677                <enumeratedValue>
173678                  <name>0</name>
173679                  <description>counting down to 0 does not assert the SysTick exception request</description>
173680                  <value>#0</value>
173681                </enumeratedValue>
173682                <enumeratedValue>
173683                  <name>1</name>
173684                  <description>counting down to 0 asserts the SysTick exception request</description>
173685                  <value>#1</value>
173686                </enumeratedValue>
173687              </enumeratedValues>
173688            </field>
173689            <field>
173690              <name>CLKSOURCE</name>
173691              <description>no description available</description>
173692              <bitOffset>2</bitOffset>
173693              <bitWidth>1</bitWidth>
173694              <access>read-write</access>
173695              <enumeratedValues>
173696                <enumeratedValue>
173697                  <name>0</name>
173698                  <description>external clock</description>
173699                  <value>#0</value>
173700                </enumeratedValue>
173701                <enumeratedValue>
173702                  <name>1</name>
173703                  <description>processor clock</description>
173704                  <value>#1</value>
173705                </enumeratedValue>
173706              </enumeratedValues>
173707            </field>
173708            <field>
173709              <name>COUNTFLAG</name>
173710              <description>no description available</description>
173711              <bitOffset>16</bitOffset>
173712              <bitWidth>1</bitWidth>
173713              <access>read-write</access>
173714            </field>
173715          </fields>
173716        </register>
173717        <register>
173718          <name>RVR</name>
173719          <description>SysTick Reload Value Register</description>
173720          <addressOffset>0x4</addressOffset>
173721          <size>32</size>
173722          <access>read-write</access>
173723          <resetValue>0</resetValue>
173724          <resetMask>0xFFFFFFFF</resetMask>
173725          <fields>
173726            <field>
173727              <name>RELOAD</name>
173728              <description>Value to load into the SysTick Current Value Register when the counter reaches 0</description>
173729              <bitOffset>0</bitOffset>
173730              <bitWidth>24</bitWidth>
173731              <access>read-write</access>
173732            </field>
173733          </fields>
173734        </register>
173735        <register>
173736          <name>CVR</name>
173737          <description>SysTick Current Value Register</description>
173738          <addressOffset>0x8</addressOffset>
173739          <size>32</size>
173740          <access>read-write</access>
173741          <resetValue>0</resetValue>
173742          <resetMask>0xFFFFFFFF</resetMask>
173743          <fields>
173744            <field>
173745              <name>CURRENT</name>
173746              <description>Current value at the time the register is accessed</description>
173747              <bitOffset>0</bitOffset>
173748              <bitWidth>24</bitWidth>
173749              <access>read-write</access>
173750            </field>
173751          </fields>
173752        </register>
173753        <register>
173754          <name>CALIB</name>
173755          <description>SysTick Calibration Value Register</description>
173756          <addressOffset>0xC</addressOffset>
173757          <size>32</size>
173758          <access>read-only</access>
173759          <resetValue>0x80000000</resetValue>
173760          <resetMask>0xFFFFFFFF</resetMask>
173761          <fields>
173762            <field>
173763              <name>TENMS</name>
173764              <description>Reload value to use for 10ms timing</description>
173765              <bitOffset>0</bitOffset>
173766              <bitWidth>24</bitWidth>
173767              <access>read-only</access>
173768            </field>
173769            <field>
173770              <name>SKEW</name>
173771              <description>no description available</description>
173772              <bitOffset>30</bitOffset>
173773              <bitWidth>1</bitWidth>
173774              <access>read-only</access>
173775              <enumeratedValues>
173776                <enumeratedValue>
173777                  <name>0</name>
173778                  <description>10ms calibration value is exact</description>
173779                  <value>#0</value>
173780                </enumeratedValue>
173781                <enumeratedValue>
173782                  <name>1</name>
173783                  <description>10ms calibration value is inexact, because of the clock frequency</description>
173784                  <value>#1</value>
173785                </enumeratedValue>
173786              </enumeratedValues>
173787            </field>
173788            <field>
173789              <name>NOREF</name>
173790              <description>no description available</description>
173791              <bitOffset>31</bitOffset>
173792              <bitWidth>1</bitWidth>
173793              <access>read-only</access>
173794              <enumeratedValues>
173795                <enumeratedValue>
173796                  <name>0</name>
173797                  <description>The reference clock is provided</description>
173798                  <value>#0</value>
173799                </enumeratedValue>
173800                <enumeratedValue>
173801                  <name>1</name>
173802                  <description>The reference clock is not provided</description>
173803                  <value>#1</value>
173804                </enumeratedValue>
173805              </enumeratedValues>
173806            </field>
173807          </fields>
173808        </register>
173809      </registers>
173810    </peripheral>
173811    <peripheral>
173812      <name>NVIC</name>
173813      <description>Nested Vectored Interrupt Controller</description>
173814      <baseAddress>0xE000E100</baseAddress>
173815      <addressBlock>
173816        <offset>0</offset>
173817        <size>0xE04</size>
173818        <usage>registers</usage>
173819      </addressBlock>
173820      <registers>
173821        <register>
173822          <name>NVICISER0</name>
173823          <description>Interrupt Set Enable Register n</description>
173824          <addressOffset>0</addressOffset>
173825          <size>32</size>
173826          <access>read-write</access>
173827          <resetValue>0</resetValue>
173828          <resetMask>0xFFFFFFFF</resetMask>
173829          <fields>
173830            <field>
173831              <name>SETENA</name>
173832              <description>Interrupt set enable bits</description>
173833              <bitOffset>0</bitOffset>
173834              <bitWidth>32</bitWidth>
173835              <access>read-write</access>
173836            </field>
173837          </fields>
173838        </register>
173839        <register>
173840          <name>NVICISER1</name>
173841          <description>Interrupt Set Enable Register n</description>
173842          <addressOffset>0x4</addressOffset>
173843          <size>32</size>
173844          <access>read-write</access>
173845          <resetValue>0</resetValue>
173846          <resetMask>0xFFFFFFFF</resetMask>
173847          <fields>
173848            <field>
173849              <name>SETENA</name>
173850              <description>Interrupt set enable bits</description>
173851              <bitOffset>0</bitOffset>
173852              <bitWidth>32</bitWidth>
173853              <access>read-write</access>
173854            </field>
173855          </fields>
173856        </register>
173857        <register>
173858          <name>NVICISER2</name>
173859          <description>Interrupt Set Enable Register n</description>
173860          <addressOffset>0x8</addressOffset>
173861          <size>32</size>
173862          <access>read-write</access>
173863          <resetValue>0</resetValue>
173864          <resetMask>0xFFFFFFFF</resetMask>
173865          <fields>
173866            <field>
173867              <name>SETENA</name>
173868              <description>Interrupt set enable bits</description>
173869              <bitOffset>0</bitOffset>
173870              <bitWidth>32</bitWidth>
173871              <access>read-write</access>
173872            </field>
173873          </fields>
173874        </register>
173875        <register>
173876          <name>NVICISER3</name>
173877          <description>Interrupt Set Enable Register n</description>
173878          <addressOffset>0xC</addressOffset>
173879          <size>32</size>
173880          <access>read-write</access>
173881          <resetValue>0</resetValue>
173882          <resetMask>0xFFFFFFFF</resetMask>
173883          <fields>
173884            <field>
173885              <name>SETENA</name>
173886              <description>Interrupt set enable bits</description>
173887              <bitOffset>0</bitOffset>
173888              <bitWidth>32</bitWidth>
173889              <access>read-write</access>
173890            </field>
173891          </fields>
173892        </register>
173893        <register>
173894          <name>NVICICER0</name>
173895          <description>Interrupt Clear Enable Register n</description>
173896          <addressOffset>0x80</addressOffset>
173897          <size>32</size>
173898          <access>read-write</access>
173899          <resetValue>0</resetValue>
173900          <resetMask>0xFFFFFFFF</resetMask>
173901          <fields>
173902            <field>
173903              <name>CLRENA</name>
173904              <description>Interrupt clear-enable bits</description>
173905              <bitOffset>0</bitOffset>
173906              <bitWidth>32</bitWidth>
173907              <access>read-write</access>
173908            </field>
173909          </fields>
173910        </register>
173911        <register>
173912          <name>NVICICER1</name>
173913          <description>Interrupt Clear Enable Register n</description>
173914          <addressOffset>0x84</addressOffset>
173915          <size>32</size>
173916          <access>read-write</access>
173917          <resetValue>0</resetValue>
173918          <resetMask>0xFFFFFFFF</resetMask>
173919          <fields>
173920            <field>
173921              <name>CLRENA</name>
173922              <description>Interrupt clear-enable bits</description>
173923              <bitOffset>0</bitOffset>
173924              <bitWidth>32</bitWidth>
173925              <access>read-write</access>
173926            </field>
173927          </fields>
173928        </register>
173929        <register>
173930          <name>NVICICER2</name>
173931          <description>Interrupt Clear Enable Register n</description>
173932          <addressOffset>0x88</addressOffset>
173933          <size>32</size>
173934          <access>read-write</access>
173935          <resetValue>0</resetValue>
173936          <resetMask>0xFFFFFFFF</resetMask>
173937          <fields>
173938            <field>
173939              <name>CLRENA</name>
173940              <description>Interrupt clear-enable bits</description>
173941              <bitOffset>0</bitOffset>
173942              <bitWidth>32</bitWidth>
173943              <access>read-write</access>
173944            </field>
173945          </fields>
173946        </register>
173947        <register>
173948          <name>NVICICER3</name>
173949          <description>Interrupt Clear Enable Register n</description>
173950          <addressOffset>0x8C</addressOffset>
173951          <size>32</size>
173952          <access>read-write</access>
173953          <resetValue>0</resetValue>
173954          <resetMask>0xFFFFFFFF</resetMask>
173955          <fields>
173956            <field>
173957              <name>CLRENA</name>
173958              <description>Interrupt clear-enable bits</description>
173959              <bitOffset>0</bitOffset>
173960              <bitWidth>32</bitWidth>
173961              <access>read-write</access>
173962            </field>
173963          </fields>
173964        </register>
173965        <register>
173966          <name>NVICISPR0</name>
173967          <description>Interrupt Set Pending Register n</description>
173968          <addressOffset>0x100</addressOffset>
173969          <size>32</size>
173970          <access>read-write</access>
173971          <resetValue>0</resetValue>
173972          <resetMask>0xFFFFFFFF</resetMask>
173973          <fields>
173974            <field>
173975              <name>SETPEND</name>
173976              <description>Interrupt set-pending bits</description>
173977              <bitOffset>0</bitOffset>
173978              <bitWidth>32</bitWidth>
173979              <access>read-write</access>
173980            </field>
173981          </fields>
173982        </register>
173983        <register>
173984          <name>NVICISPR1</name>
173985          <description>Interrupt Set Pending Register n</description>
173986          <addressOffset>0x104</addressOffset>
173987          <size>32</size>
173988          <access>read-write</access>
173989          <resetValue>0</resetValue>
173990          <resetMask>0xFFFFFFFF</resetMask>
173991          <fields>
173992            <field>
173993              <name>SETPEND</name>
173994              <description>Interrupt set-pending bits</description>
173995              <bitOffset>0</bitOffset>
173996              <bitWidth>32</bitWidth>
173997              <access>read-write</access>
173998            </field>
173999          </fields>
174000        </register>
174001        <register>
174002          <name>NVICISPR2</name>
174003          <description>Interrupt Set Pending Register n</description>
174004          <addressOffset>0x108</addressOffset>
174005          <size>32</size>
174006          <access>read-write</access>
174007          <resetValue>0</resetValue>
174008          <resetMask>0xFFFFFFFF</resetMask>
174009          <fields>
174010            <field>
174011              <name>SETPEND</name>
174012              <description>Interrupt set-pending bits</description>
174013              <bitOffset>0</bitOffset>
174014              <bitWidth>32</bitWidth>
174015              <access>read-write</access>
174016            </field>
174017          </fields>
174018        </register>
174019        <register>
174020          <name>NVICISPR3</name>
174021          <description>Interrupt Set Pending Register n</description>
174022          <addressOffset>0x10C</addressOffset>
174023          <size>32</size>
174024          <access>read-write</access>
174025          <resetValue>0</resetValue>
174026          <resetMask>0xFFFFFFFF</resetMask>
174027          <fields>
174028            <field>
174029              <name>SETPEND</name>
174030              <description>Interrupt set-pending bits</description>
174031              <bitOffset>0</bitOffset>
174032              <bitWidth>32</bitWidth>
174033              <access>read-write</access>
174034            </field>
174035          </fields>
174036        </register>
174037        <register>
174038          <name>NVICICPR0</name>
174039          <description>Interrupt Clear Pending Register n</description>
174040          <addressOffset>0x180</addressOffset>
174041          <size>32</size>
174042          <access>read-write</access>
174043          <resetValue>0</resetValue>
174044          <resetMask>0xFFFFFFFF</resetMask>
174045          <fields>
174046            <field>
174047              <name>CLRPEND</name>
174048              <description>Interrupt clear-pending bits</description>
174049              <bitOffset>0</bitOffset>
174050              <bitWidth>32</bitWidth>
174051              <access>read-write</access>
174052            </field>
174053          </fields>
174054        </register>
174055        <register>
174056          <name>NVICICPR1</name>
174057          <description>Interrupt Clear Pending Register n</description>
174058          <addressOffset>0x184</addressOffset>
174059          <size>32</size>
174060          <access>read-write</access>
174061          <resetValue>0</resetValue>
174062          <resetMask>0xFFFFFFFF</resetMask>
174063          <fields>
174064            <field>
174065              <name>CLRPEND</name>
174066              <description>Interrupt clear-pending bits</description>
174067              <bitOffset>0</bitOffset>
174068              <bitWidth>32</bitWidth>
174069              <access>read-write</access>
174070            </field>
174071          </fields>
174072        </register>
174073        <register>
174074          <name>NVICICPR2</name>
174075          <description>Interrupt Clear Pending Register n</description>
174076          <addressOffset>0x188</addressOffset>
174077          <size>32</size>
174078          <access>read-write</access>
174079          <resetValue>0</resetValue>
174080          <resetMask>0xFFFFFFFF</resetMask>
174081          <fields>
174082            <field>
174083              <name>CLRPEND</name>
174084              <description>Interrupt clear-pending bits</description>
174085              <bitOffset>0</bitOffset>
174086              <bitWidth>32</bitWidth>
174087              <access>read-write</access>
174088            </field>
174089          </fields>
174090        </register>
174091        <register>
174092          <name>NVICICPR3</name>
174093          <description>Interrupt Clear Pending Register n</description>
174094          <addressOffset>0x18C</addressOffset>
174095          <size>32</size>
174096          <access>read-write</access>
174097          <resetValue>0</resetValue>
174098          <resetMask>0xFFFFFFFF</resetMask>
174099          <fields>
174100            <field>
174101              <name>CLRPEND</name>
174102              <description>Interrupt clear-pending bits</description>
174103              <bitOffset>0</bitOffset>
174104              <bitWidth>32</bitWidth>
174105              <access>read-write</access>
174106            </field>
174107          </fields>
174108        </register>
174109        <register>
174110          <name>NVICIABR0</name>
174111          <description>Interrupt Active bit Register n</description>
174112          <addressOffset>0x200</addressOffset>
174113          <size>32</size>
174114          <access>read-write</access>
174115          <resetValue>0</resetValue>
174116          <resetMask>0xFFFFFFFF</resetMask>
174117          <fields>
174118            <field>
174119              <name>ACTIVE</name>
174120              <description>Interrupt active flags</description>
174121              <bitOffset>0</bitOffset>
174122              <bitWidth>32</bitWidth>
174123              <access>read-write</access>
174124            </field>
174125          </fields>
174126        </register>
174127        <register>
174128          <name>NVICIABR1</name>
174129          <description>Interrupt Active bit Register n</description>
174130          <addressOffset>0x204</addressOffset>
174131          <size>32</size>
174132          <access>read-write</access>
174133          <resetValue>0</resetValue>
174134          <resetMask>0xFFFFFFFF</resetMask>
174135          <fields>
174136            <field>
174137              <name>ACTIVE</name>
174138              <description>Interrupt active flags</description>
174139              <bitOffset>0</bitOffset>
174140              <bitWidth>32</bitWidth>
174141              <access>read-write</access>
174142            </field>
174143          </fields>
174144        </register>
174145        <register>
174146          <name>NVICIABR2</name>
174147          <description>Interrupt Active bit Register n</description>
174148          <addressOffset>0x208</addressOffset>
174149          <size>32</size>
174150          <access>read-write</access>
174151          <resetValue>0</resetValue>
174152          <resetMask>0xFFFFFFFF</resetMask>
174153          <fields>
174154            <field>
174155              <name>ACTIVE</name>
174156              <description>Interrupt active flags</description>
174157              <bitOffset>0</bitOffset>
174158              <bitWidth>32</bitWidth>
174159              <access>read-write</access>
174160            </field>
174161          </fields>
174162        </register>
174163        <register>
174164          <name>NVICIABR3</name>
174165          <description>Interrupt Active bit Register n</description>
174166          <addressOffset>0x20C</addressOffset>
174167          <size>32</size>
174168          <access>read-write</access>
174169          <resetValue>0</resetValue>
174170          <resetMask>0xFFFFFFFF</resetMask>
174171          <fields>
174172            <field>
174173              <name>ACTIVE</name>
174174              <description>Interrupt active flags</description>
174175              <bitOffset>0</bitOffset>
174176              <bitWidth>32</bitWidth>
174177              <access>read-write</access>
174178            </field>
174179          </fields>
174180        </register>
174181        <register>
174182          <name>NVICIP0</name>
174183          <description>Interrupt Priority Register n</description>
174184          <addressOffset>0x300</addressOffset>
174185          <size>8</size>
174186          <access>read-write</access>
174187          <resetValue>0</resetValue>
174188          <resetMask>0xFF</resetMask>
174189          <fields>
174190            <field>
174191              <name>PRI0</name>
174192              <description>Priority of interrupt 0</description>
174193              <bitOffset>0</bitOffset>
174194              <bitWidth>8</bitWidth>
174195              <access>read-write</access>
174196            </field>
174197          </fields>
174198        </register>
174199        <register>
174200          <name>NVICIP1</name>
174201          <description>Interrupt Priority Register n</description>
174202          <addressOffset>0x301</addressOffset>
174203          <size>8</size>
174204          <access>read-write</access>
174205          <resetValue>0</resetValue>
174206          <resetMask>0xFF</resetMask>
174207          <fields>
174208            <field>
174209              <name>PRI1</name>
174210              <description>Priority of interrupt 1</description>
174211              <bitOffset>0</bitOffset>
174212              <bitWidth>8</bitWidth>
174213              <access>read-write</access>
174214            </field>
174215          </fields>
174216        </register>
174217        <register>
174218          <name>NVICIP2</name>
174219          <description>Interrupt Priority Register n</description>
174220          <addressOffset>0x302</addressOffset>
174221          <size>8</size>
174222          <access>read-write</access>
174223          <resetValue>0</resetValue>
174224          <resetMask>0xFF</resetMask>
174225          <fields>
174226            <field>
174227              <name>PRI2</name>
174228              <description>Priority of interrupt 2</description>
174229              <bitOffset>0</bitOffset>
174230              <bitWidth>8</bitWidth>
174231              <access>read-write</access>
174232            </field>
174233          </fields>
174234        </register>
174235        <register>
174236          <name>NVICIP3</name>
174237          <description>Interrupt Priority Register n</description>
174238          <addressOffset>0x303</addressOffset>
174239          <size>8</size>
174240          <access>read-write</access>
174241          <resetValue>0</resetValue>
174242          <resetMask>0xFF</resetMask>
174243          <fields>
174244            <field>
174245              <name>PRI3</name>
174246              <description>Priority of interrupt 3</description>
174247              <bitOffset>0</bitOffset>
174248              <bitWidth>8</bitWidth>
174249              <access>read-write</access>
174250            </field>
174251          </fields>
174252        </register>
174253        <register>
174254          <name>NVICIP4</name>
174255          <description>Interrupt Priority Register n</description>
174256          <addressOffset>0x304</addressOffset>
174257          <size>8</size>
174258          <access>read-write</access>
174259          <resetValue>0</resetValue>
174260          <resetMask>0xFF</resetMask>
174261          <fields>
174262            <field>
174263              <name>PRI4</name>
174264              <description>Priority of interrupt 4</description>
174265              <bitOffset>0</bitOffset>
174266              <bitWidth>8</bitWidth>
174267              <access>read-write</access>
174268            </field>
174269          </fields>
174270        </register>
174271        <register>
174272          <name>NVICIP5</name>
174273          <description>Interrupt Priority Register n</description>
174274          <addressOffset>0x305</addressOffset>
174275          <size>8</size>
174276          <access>read-write</access>
174277          <resetValue>0</resetValue>
174278          <resetMask>0xFF</resetMask>
174279          <fields>
174280            <field>
174281              <name>PRI5</name>
174282              <description>Priority of interrupt 5</description>
174283              <bitOffset>0</bitOffset>
174284              <bitWidth>8</bitWidth>
174285              <access>read-write</access>
174286            </field>
174287          </fields>
174288        </register>
174289        <register>
174290          <name>NVICIP6</name>
174291          <description>Interrupt Priority Register n</description>
174292          <addressOffset>0x306</addressOffset>
174293          <size>8</size>
174294          <access>read-write</access>
174295          <resetValue>0</resetValue>
174296          <resetMask>0xFF</resetMask>
174297          <fields>
174298            <field>
174299              <name>PRI6</name>
174300              <description>Priority of interrupt 6</description>
174301              <bitOffset>0</bitOffset>
174302              <bitWidth>8</bitWidth>
174303              <access>read-write</access>
174304            </field>
174305          </fields>
174306        </register>
174307        <register>
174308          <name>NVICIP7</name>
174309          <description>Interrupt Priority Register n</description>
174310          <addressOffset>0x307</addressOffset>
174311          <size>8</size>
174312          <access>read-write</access>
174313          <resetValue>0</resetValue>
174314          <resetMask>0xFF</resetMask>
174315          <fields>
174316            <field>
174317              <name>PRI7</name>
174318              <description>Priority of interrupt 7</description>
174319              <bitOffset>0</bitOffset>
174320              <bitWidth>8</bitWidth>
174321              <access>read-write</access>
174322            </field>
174323          </fields>
174324        </register>
174325        <register>
174326          <name>NVICIP8</name>
174327          <description>Interrupt Priority Register n</description>
174328          <addressOffset>0x308</addressOffset>
174329          <size>8</size>
174330          <access>read-write</access>
174331          <resetValue>0</resetValue>
174332          <resetMask>0xFF</resetMask>
174333          <fields>
174334            <field>
174335              <name>PRI8</name>
174336              <description>Priority of interrupt 8</description>
174337              <bitOffset>0</bitOffset>
174338              <bitWidth>8</bitWidth>
174339              <access>read-write</access>
174340            </field>
174341          </fields>
174342        </register>
174343        <register>
174344          <name>NVICIP9</name>
174345          <description>Interrupt Priority Register n</description>
174346          <addressOffset>0x309</addressOffset>
174347          <size>8</size>
174348          <access>read-write</access>
174349          <resetValue>0</resetValue>
174350          <resetMask>0xFF</resetMask>
174351          <fields>
174352            <field>
174353              <name>PRI9</name>
174354              <description>Priority of interrupt 9</description>
174355              <bitOffset>0</bitOffset>
174356              <bitWidth>8</bitWidth>
174357              <access>read-write</access>
174358            </field>
174359          </fields>
174360        </register>
174361        <register>
174362          <name>NVICIP10</name>
174363          <description>Interrupt Priority Register n</description>
174364          <addressOffset>0x30A</addressOffset>
174365          <size>8</size>
174366          <access>read-write</access>
174367          <resetValue>0</resetValue>
174368          <resetMask>0xFF</resetMask>
174369          <fields>
174370            <field>
174371              <name>PRI10</name>
174372              <description>Priority of interrupt 10</description>
174373              <bitOffset>0</bitOffset>
174374              <bitWidth>8</bitWidth>
174375              <access>read-write</access>
174376            </field>
174377          </fields>
174378        </register>
174379        <register>
174380          <name>NVICIP11</name>
174381          <description>Interrupt Priority Register n</description>
174382          <addressOffset>0x30B</addressOffset>
174383          <size>8</size>
174384          <access>read-write</access>
174385          <resetValue>0</resetValue>
174386          <resetMask>0xFF</resetMask>
174387          <fields>
174388            <field>
174389              <name>PRI11</name>
174390              <description>Priority of interrupt 11</description>
174391              <bitOffset>0</bitOffset>
174392              <bitWidth>8</bitWidth>
174393              <access>read-write</access>
174394            </field>
174395          </fields>
174396        </register>
174397        <register>
174398          <name>NVICIP12</name>
174399          <description>Interrupt Priority Register n</description>
174400          <addressOffset>0x30C</addressOffset>
174401          <size>8</size>
174402          <access>read-write</access>
174403          <resetValue>0</resetValue>
174404          <resetMask>0xFF</resetMask>
174405          <fields>
174406            <field>
174407              <name>PRI12</name>
174408              <description>Priority of interrupt 12</description>
174409              <bitOffset>0</bitOffset>
174410              <bitWidth>8</bitWidth>
174411              <access>read-write</access>
174412            </field>
174413          </fields>
174414        </register>
174415        <register>
174416          <name>NVICIP13</name>
174417          <description>Interrupt Priority Register n</description>
174418          <addressOffset>0x30D</addressOffset>
174419          <size>8</size>
174420          <access>read-write</access>
174421          <resetValue>0</resetValue>
174422          <resetMask>0xFF</resetMask>
174423          <fields>
174424            <field>
174425              <name>PRI13</name>
174426              <description>Priority of interrupt 13</description>
174427              <bitOffset>0</bitOffset>
174428              <bitWidth>8</bitWidth>
174429              <access>read-write</access>
174430            </field>
174431          </fields>
174432        </register>
174433        <register>
174434          <name>NVICIP14</name>
174435          <description>Interrupt Priority Register n</description>
174436          <addressOffset>0x30E</addressOffset>
174437          <size>8</size>
174438          <access>read-write</access>
174439          <resetValue>0</resetValue>
174440          <resetMask>0xFF</resetMask>
174441          <fields>
174442            <field>
174443              <name>PRI14</name>
174444              <description>Priority of interrupt 14</description>
174445              <bitOffset>0</bitOffset>
174446              <bitWidth>8</bitWidth>
174447              <access>read-write</access>
174448            </field>
174449          </fields>
174450        </register>
174451        <register>
174452          <name>NVICIP15</name>
174453          <description>Interrupt Priority Register n</description>
174454          <addressOffset>0x30F</addressOffset>
174455          <size>8</size>
174456          <access>read-write</access>
174457          <resetValue>0</resetValue>
174458          <resetMask>0xFF</resetMask>
174459          <fields>
174460            <field>
174461              <name>PRI15</name>
174462              <description>Priority of interrupt 15</description>
174463              <bitOffset>0</bitOffset>
174464              <bitWidth>8</bitWidth>
174465              <access>read-write</access>
174466            </field>
174467          </fields>
174468        </register>
174469        <register>
174470          <name>NVICIP16</name>
174471          <description>Interrupt Priority Register n</description>
174472          <addressOffset>0x310</addressOffset>
174473          <size>8</size>
174474          <access>read-write</access>
174475          <resetValue>0</resetValue>
174476          <resetMask>0xFF</resetMask>
174477          <fields>
174478            <field>
174479              <name>PRI16</name>
174480              <description>Priority of interrupt 16</description>
174481              <bitOffset>0</bitOffset>
174482              <bitWidth>8</bitWidth>
174483              <access>read-write</access>
174484            </field>
174485          </fields>
174486        </register>
174487        <register>
174488          <name>NVICIP17</name>
174489          <description>Interrupt Priority Register n</description>
174490          <addressOffset>0x311</addressOffset>
174491          <size>8</size>
174492          <access>read-write</access>
174493          <resetValue>0</resetValue>
174494          <resetMask>0xFF</resetMask>
174495          <fields>
174496            <field>
174497              <name>PRI17</name>
174498              <description>Priority of interrupt 17</description>
174499              <bitOffset>0</bitOffset>
174500              <bitWidth>8</bitWidth>
174501              <access>read-write</access>
174502            </field>
174503          </fields>
174504        </register>
174505        <register>
174506          <name>NVICIP18</name>
174507          <description>Interrupt Priority Register n</description>
174508          <addressOffset>0x312</addressOffset>
174509          <size>8</size>
174510          <access>read-write</access>
174511          <resetValue>0</resetValue>
174512          <resetMask>0xFF</resetMask>
174513          <fields>
174514            <field>
174515              <name>PRI18</name>
174516              <description>Priority of interrupt 18</description>
174517              <bitOffset>0</bitOffset>
174518              <bitWidth>8</bitWidth>
174519              <access>read-write</access>
174520            </field>
174521          </fields>
174522        </register>
174523        <register>
174524          <name>NVICIP19</name>
174525          <description>Interrupt Priority Register n</description>
174526          <addressOffset>0x313</addressOffset>
174527          <size>8</size>
174528          <access>read-write</access>
174529          <resetValue>0</resetValue>
174530          <resetMask>0xFF</resetMask>
174531          <fields>
174532            <field>
174533              <name>PRI19</name>
174534              <description>Priority of interrupt 19</description>
174535              <bitOffset>0</bitOffset>
174536              <bitWidth>8</bitWidth>
174537              <access>read-write</access>
174538            </field>
174539          </fields>
174540        </register>
174541        <register>
174542          <name>NVICIP20</name>
174543          <description>Interrupt Priority Register n</description>
174544          <addressOffset>0x314</addressOffset>
174545          <size>8</size>
174546          <access>read-write</access>
174547          <resetValue>0</resetValue>
174548          <resetMask>0xFF</resetMask>
174549          <fields>
174550            <field>
174551              <name>PRI20</name>
174552              <description>Priority of interrupt 20</description>
174553              <bitOffset>0</bitOffset>
174554              <bitWidth>8</bitWidth>
174555              <access>read-write</access>
174556            </field>
174557          </fields>
174558        </register>
174559        <register>
174560          <name>NVICIP21</name>
174561          <description>Interrupt Priority Register n</description>
174562          <addressOffset>0x315</addressOffset>
174563          <size>8</size>
174564          <access>read-write</access>
174565          <resetValue>0</resetValue>
174566          <resetMask>0xFF</resetMask>
174567          <fields>
174568            <field>
174569              <name>PRI21</name>
174570              <description>Priority of interrupt 21</description>
174571              <bitOffset>0</bitOffset>
174572              <bitWidth>8</bitWidth>
174573              <access>read-write</access>
174574            </field>
174575          </fields>
174576        </register>
174577        <register>
174578          <name>NVICIP22</name>
174579          <description>Interrupt Priority Register n</description>
174580          <addressOffset>0x316</addressOffset>
174581          <size>8</size>
174582          <access>read-write</access>
174583          <resetValue>0</resetValue>
174584          <resetMask>0xFF</resetMask>
174585          <fields>
174586            <field>
174587              <name>PRI22</name>
174588              <description>Priority of interrupt 22</description>
174589              <bitOffset>0</bitOffset>
174590              <bitWidth>8</bitWidth>
174591              <access>read-write</access>
174592            </field>
174593          </fields>
174594        </register>
174595        <register>
174596          <name>NVICIP23</name>
174597          <description>Interrupt Priority Register n</description>
174598          <addressOffset>0x317</addressOffset>
174599          <size>8</size>
174600          <access>read-write</access>
174601          <resetValue>0</resetValue>
174602          <resetMask>0xFF</resetMask>
174603          <fields>
174604            <field>
174605              <name>PRI23</name>
174606              <description>Priority of interrupt 23</description>
174607              <bitOffset>0</bitOffset>
174608              <bitWidth>8</bitWidth>
174609              <access>read-write</access>
174610            </field>
174611          </fields>
174612        </register>
174613        <register>
174614          <name>NVICIP24</name>
174615          <description>Interrupt Priority Register n</description>
174616          <addressOffset>0x318</addressOffset>
174617          <size>8</size>
174618          <access>read-write</access>
174619          <resetValue>0</resetValue>
174620          <resetMask>0xFF</resetMask>
174621          <fields>
174622            <field>
174623              <name>PRI24</name>
174624              <description>Priority of interrupt 24</description>
174625              <bitOffset>0</bitOffset>
174626              <bitWidth>8</bitWidth>
174627              <access>read-write</access>
174628            </field>
174629          </fields>
174630        </register>
174631        <register>
174632          <name>NVICIP25</name>
174633          <description>Interrupt Priority Register n</description>
174634          <addressOffset>0x319</addressOffset>
174635          <size>8</size>
174636          <access>read-write</access>
174637          <resetValue>0</resetValue>
174638          <resetMask>0xFF</resetMask>
174639          <fields>
174640            <field>
174641              <name>PRI25</name>
174642              <description>Priority of interrupt 25</description>
174643              <bitOffset>0</bitOffset>
174644              <bitWidth>8</bitWidth>
174645              <access>read-write</access>
174646            </field>
174647          </fields>
174648        </register>
174649        <register>
174650          <name>NVICIP26</name>
174651          <description>Interrupt Priority Register n</description>
174652          <addressOffset>0x31A</addressOffset>
174653          <size>8</size>
174654          <access>read-write</access>
174655          <resetValue>0</resetValue>
174656          <resetMask>0xFF</resetMask>
174657          <fields>
174658            <field>
174659              <name>PRI26</name>
174660              <description>Priority of interrupt 26</description>
174661              <bitOffset>0</bitOffset>
174662              <bitWidth>8</bitWidth>
174663              <access>read-write</access>
174664            </field>
174665          </fields>
174666        </register>
174667        <register>
174668          <name>NVICIP27</name>
174669          <description>Interrupt Priority Register n</description>
174670          <addressOffset>0x31B</addressOffset>
174671          <size>8</size>
174672          <access>read-write</access>
174673          <resetValue>0</resetValue>
174674          <resetMask>0xFF</resetMask>
174675          <fields>
174676            <field>
174677              <name>PRI27</name>
174678              <description>Priority of interrupt 27</description>
174679              <bitOffset>0</bitOffset>
174680              <bitWidth>8</bitWidth>
174681              <access>read-write</access>
174682            </field>
174683          </fields>
174684        </register>
174685        <register>
174686          <name>NVICIP28</name>
174687          <description>Interrupt Priority Register n</description>
174688          <addressOffset>0x31C</addressOffset>
174689          <size>8</size>
174690          <access>read-write</access>
174691          <resetValue>0</resetValue>
174692          <resetMask>0xFF</resetMask>
174693          <fields>
174694            <field>
174695              <name>PRI28</name>
174696              <description>Priority of interrupt 28</description>
174697              <bitOffset>0</bitOffset>
174698              <bitWidth>8</bitWidth>
174699              <access>read-write</access>
174700            </field>
174701          </fields>
174702        </register>
174703        <register>
174704          <name>NVICIP29</name>
174705          <description>Interrupt Priority Register n</description>
174706          <addressOffset>0x31D</addressOffset>
174707          <size>8</size>
174708          <access>read-write</access>
174709          <resetValue>0</resetValue>
174710          <resetMask>0xFF</resetMask>
174711          <fields>
174712            <field>
174713              <name>PRI29</name>
174714              <description>Priority of interrupt 29</description>
174715              <bitOffset>0</bitOffset>
174716              <bitWidth>8</bitWidth>
174717              <access>read-write</access>
174718            </field>
174719          </fields>
174720        </register>
174721        <register>
174722          <name>NVICIP30</name>
174723          <description>Interrupt Priority Register n</description>
174724          <addressOffset>0x31E</addressOffset>
174725          <size>8</size>
174726          <access>read-write</access>
174727          <resetValue>0</resetValue>
174728          <resetMask>0xFF</resetMask>
174729          <fields>
174730            <field>
174731              <name>PRI30</name>
174732              <description>Priority of interrupt 30</description>
174733              <bitOffset>0</bitOffset>
174734              <bitWidth>8</bitWidth>
174735              <access>read-write</access>
174736            </field>
174737          </fields>
174738        </register>
174739        <register>
174740          <name>NVICIP31</name>
174741          <description>Interrupt Priority Register n</description>
174742          <addressOffset>0x31F</addressOffset>
174743          <size>8</size>
174744          <access>read-write</access>
174745          <resetValue>0</resetValue>
174746          <resetMask>0xFF</resetMask>
174747          <fields>
174748            <field>
174749              <name>PRI31</name>
174750              <description>Priority of interrupt 31</description>
174751              <bitOffset>0</bitOffset>
174752              <bitWidth>8</bitWidth>
174753              <access>read-write</access>
174754            </field>
174755          </fields>
174756        </register>
174757        <register>
174758          <name>NVICIP32</name>
174759          <description>Interrupt Priority Register n</description>
174760          <addressOffset>0x320</addressOffset>
174761          <size>8</size>
174762          <access>read-write</access>
174763          <resetValue>0</resetValue>
174764          <resetMask>0xFF</resetMask>
174765          <fields>
174766            <field>
174767              <name>PRI32</name>
174768              <description>Priority of interrupt 32</description>
174769              <bitOffset>0</bitOffset>
174770              <bitWidth>8</bitWidth>
174771              <access>read-write</access>
174772            </field>
174773          </fields>
174774        </register>
174775        <register>
174776          <name>NVICIP33</name>
174777          <description>Interrupt Priority Register n</description>
174778          <addressOffset>0x321</addressOffset>
174779          <size>8</size>
174780          <access>read-write</access>
174781          <resetValue>0</resetValue>
174782          <resetMask>0xFF</resetMask>
174783          <fields>
174784            <field>
174785              <name>PRI33</name>
174786              <description>Priority of interrupt 33</description>
174787              <bitOffset>0</bitOffset>
174788              <bitWidth>8</bitWidth>
174789              <access>read-write</access>
174790            </field>
174791          </fields>
174792        </register>
174793        <register>
174794          <name>NVICIP34</name>
174795          <description>Interrupt Priority Register n</description>
174796          <addressOffset>0x322</addressOffset>
174797          <size>8</size>
174798          <access>read-write</access>
174799          <resetValue>0</resetValue>
174800          <resetMask>0xFF</resetMask>
174801          <fields>
174802            <field>
174803              <name>PRI34</name>
174804              <description>Priority of interrupt 34</description>
174805              <bitOffset>0</bitOffset>
174806              <bitWidth>8</bitWidth>
174807              <access>read-write</access>
174808            </field>
174809          </fields>
174810        </register>
174811        <register>
174812          <name>NVICIP35</name>
174813          <description>Interrupt Priority Register n</description>
174814          <addressOffset>0x323</addressOffset>
174815          <size>8</size>
174816          <access>read-write</access>
174817          <resetValue>0</resetValue>
174818          <resetMask>0xFF</resetMask>
174819          <fields>
174820            <field>
174821              <name>PRI35</name>
174822              <description>Priority of interrupt 35</description>
174823              <bitOffset>0</bitOffset>
174824              <bitWidth>8</bitWidth>
174825              <access>read-write</access>
174826            </field>
174827          </fields>
174828        </register>
174829        <register>
174830          <name>NVICIP36</name>
174831          <description>Interrupt Priority Register n</description>
174832          <addressOffset>0x324</addressOffset>
174833          <size>8</size>
174834          <access>read-write</access>
174835          <resetValue>0</resetValue>
174836          <resetMask>0xFF</resetMask>
174837          <fields>
174838            <field>
174839              <name>PRI36</name>
174840              <description>Priority of interrupt 36</description>
174841              <bitOffset>0</bitOffset>
174842              <bitWidth>8</bitWidth>
174843              <access>read-write</access>
174844            </field>
174845          </fields>
174846        </register>
174847        <register>
174848          <name>NVICIP37</name>
174849          <description>Interrupt Priority Register n</description>
174850          <addressOffset>0x325</addressOffset>
174851          <size>8</size>
174852          <access>read-write</access>
174853          <resetValue>0</resetValue>
174854          <resetMask>0xFF</resetMask>
174855          <fields>
174856            <field>
174857              <name>PRI37</name>
174858              <description>Priority of interrupt 37</description>
174859              <bitOffset>0</bitOffset>
174860              <bitWidth>8</bitWidth>
174861              <access>read-write</access>
174862            </field>
174863          </fields>
174864        </register>
174865        <register>
174866          <name>NVICIP38</name>
174867          <description>Interrupt Priority Register n</description>
174868          <addressOffset>0x326</addressOffset>
174869          <size>8</size>
174870          <access>read-write</access>
174871          <resetValue>0</resetValue>
174872          <resetMask>0xFF</resetMask>
174873          <fields>
174874            <field>
174875              <name>PRI38</name>
174876              <description>Priority of interrupt 38</description>
174877              <bitOffset>0</bitOffset>
174878              <bitWidth>8</bitWidth>
174879              <access>read-write</access>
174880            </field>
174881          </fields>
174882        </register>
174883        <register>
174884          <name>NVICIP39</name>
174885          <description>Interrupt Priority Register n</description>
174886          <addressOffset>0x327</addressOffset>
174887          <size>8</size>
174888          <access>read-write</access>
174889          <resetValue>0</resetValue>
174890          <resetMask>0xFF</resetMask>
174891          <fields>
174892            <field>
174893              <name>PRI39</name>
174894              <description>Priority of interrupt 39</description>
174895              <bitOffset>0</bitOffset>
174896              <bitWidth>8</bitWidth>
174897              <access>read-write</access>
174898            </field>
174899          </fields>
174900        </register>
174901        <register>
174902          <name>NVICIP40</name>
174903          <description>Interrupt Priority Register n</description>
174904          <addressOffset>0x328</addressOffset>
174905          <size>8</size>
174906          <access>read-write</access>
174907          <resetValue>0</resetValue>
174908          <resetMask>0xFF</resetMask>
174909          <fields>
174910            <field>
174911              <name>PRI40</name>
174912              <description>Priority of interrupt 40</description>
174913              <bitOffset>0</bitOffset>
174914              <bitWidth>8</bitWidth>
174915              <access>read-write</access>
174916            </field>
174917          </fields>
174918        </register>
174919        <register>
174920          <name>NVICIP41</name>
174921          <description>Interrupt Priority Register n</description>
174922          <addressOffset>0x329</addressOffset>
174923          <size>8</size>
174924          <access>read-write</access>
174925          <resetValue>0</resetValue>
174926          <resetMask>0xFF</resetMask>
174927          <fields>
174928            <field>
174929              <name>PRI41</name>
174930              <description>Priority of interrupt 41</description>
174931              <bitOffset>0</bitOffset>
174932              <bitWidth>8</bitWidth>
174933              <access>read-write</access>
174934            </field>
174935          </fields>
174936        </register>
174937        <register>
174938          <name>NVICIP42</name>
174939          <description>Interrupt Priority Register n</description>
174940          <addressOffset>0x32A</addressOffset>
174941          <size>8</size>
174942          <access>read-write</access>
174943          <resetValue>0</resetValue>
174944          <resetMask>0xFF</resetMask>
174945          <fields>
174946            <field>
174947              <name>PRI42</name>
174948              <description>Priority of interrupt 42</description>
174949              <bitOffset>0</bitOffset>
174950              <bitWidth>8</bitWidth>
174951              <access>read-write</access>
174952            </field>
174953          </fields>
174954        </register>
174955        <register>
174956          <name>NVICIP43</name>
174957          <description>Interrupt Priority Register n</description>
174958          <addressOffset>0x32B</addressOffset>
174959          <size>8</size>
174960          <access>read-write</access>
174961          <resetValue>0</resetValue>
174962          <resetMask>0xFF</resetMask>
174963          <fields>
174964            <field>
174965              <name>PRI43</name>
174966              <description>Priority of interrupt 43</description>
174967              <bitOffset>0</bitOffset>
174968              <bitWidth>8</bitWidth>
174969              <access>read-write</access>
174970            </field>
174971          </fields>
174972        </register>
174973        <register>
174974          <name>NVICIP44</name>
174975          <description>Interrupt Priority Register n</description>
174976          <addressOffset>0x32C</addressOffset>
174977          <size>8</size>
174978          <access>read-write</access>
174979          <resetValue>0</resetValue>
174980          <resetMask>0xFF</resetMask>
174981          <fields>
174982            <field>
174983              <name>PRI44</name>
174984              <description>Priority of interrupt 44</description>
174985              <bitOffset>0</bitOffset>
174986              <bitWidth>8</bitWidth>
174987              <access>read-write</access>
174988            </field>
174989          </fields>
174990        </register>
174991        <register>
174992          <name>NVICIP45</name>
174993          <description>Interrupt Priority Register n</description>
174994          <addressOffset>0x32D</addressOffset>
174995          <size>8</size>
174996          <access>read-write</access>
174997          <resetValue>0</resetValue>
174998          <resetMask>0xFF</resetMask>
174999          <fields>
175000            <field>
175001              <name>PRI45</name>
175002              <description>Priority of interrupt 45</description>
175003              <bitOffset>0</bitOffset>
175004              <bitWidth>8</bitWidth>
175005              <access>read-write</access>
175006            </field>
175007          </fields>
175008        </register>
175009        <register>
175010          <name>NVICIP46</name>
175011          <description>Interrupt Priority Register n</description>
175012          <addressOffset>0x32E</addressOffset>
175013          <size>8</size>
175014          <access>read-write</access>
175015          <resetValue>0</resetValue>
175016          <resetMask>0xFF</resetMask>
175017          <fields>
175018            <field>
175019              <name>PRI46</name>
175020              <description>Priority of interrupt 46</description>
175021              <bitOffset>0</bitOffset>
175022              <bitWidth>8</bitWidth>
175023              <access>read-write</access>
175024            </field>
175025          </fields>
175026        </register>
175027        <register>
175028          <name>NVICIP47</name>
175029          <description>Interrupt Priority Register n</description>
175030          <addressOffset>0x32F</addressOffset>
175031          <size>8</size>
175032          <access>read-write</access>
175033          <resetValue>0</resetValue>
175034          <resetMask>0xFF</resetMask>
175035          <fields>
175036            <field>
175037              <name>PRI47</name>
175038              <description>Priority of interrupt 47</description>
175039              <bitOffset>0</bitOffset>
175040              <bitWidth>8</bitWidth>
175041              <access>read-write</access>
175042            </field>
175043          </fields>
175044        </register>
175045        <register>
175046          <name>NVICIP48</name>
175047          <description>Interrupt Priority Register n</description>
175048          <addressOffset>0x330</addressOffset>
175049          <size>8</size>
175050          <access>read-write</access>
175051          <resetValue>0</resetValue>
175052          <resetMask>0xFF</resetMask>
175053          <fields>
175054            <field>
175055              <name>PRI48</name>
175056              <description>Priority of interrupt 48</description>
175057              <bitOffset>0</bitOffset>
175058              <bitWidth>8</bitWidth>
175059              <access>read-write</access>
175060            </field>
175061          </fields>
175062        </register>
175063        <register>
175064          <name>NVICIP49</name>
175065          <description>Interrupt Priority Register n</description>
175066          <addressOffset>0x331</addressOffset>
175067          <size>8</size>
175068          <access>read-write</access>
175069          <resetValue>0</resetValue>
175070          <resetMask>0xFF</resetMask>
175071          <fields>
175072            <field>
175073              <name>PRI49</name>
175074              <description>Priority of interrupt 49</description>
175075              <bitOffset>0</bitOffset>
175076              <bitWidth>8</bitWidth>
175077              <access>read-write</access>
175078            </field>
175079          </fields>
175080        </register>
175081        <register>
175082          <name>NVICIP50</name>
175083          <description>Interrupt Priority Register n</description>
175084          <addressOffset>0x332</addressOffset>
175085          <size>8</size>
175086          <access>read-write</access>
175087          <resetValue>0</resetValue>
175088          <resetMask>0xFF</resetMask>
175089          <fields>
175090            <field>
175091              <name>PRI50</name>
175092              <description>Priority of interrupt 50</description>
175093              <bitOffset>0</bitOffset>
175094              <bitWidth>8</bitWidth>
175095              <access>read-write</access>
175096            </field>
175097          </fields>
175098        </register>
175099        <register>
175100          <name>NVICIP51</name>
175101          <description>Interrupt Priority Register n</description>
175102          <addressOffset>0x333</addressOffset>
175103          <size>8</size>
175104          <access>read-write</access>
175105          <resetValue>0</resetValue>
175106          <resetMask>0xFF</resetMask>
175107          <fields>
175108            <field>
175109              <name>PRI51</name>
175110              <description>Priority of interrupt 51</description>
175111              <bitOffset>0</bitOffset>
175112              <bitWidth>8</bitWidth>
175113              <access>read-write</access>
175114            </field>
175115          </fields>
175116        </register>
175117        <register>
175118          <name>NVICIP52</name>
175119          <description>Interrupt Priority Register n</description>
175120          <addressOffset>0x334</addressOffset>
175121          <size>8</size>
175122          <access>read-write</access>
175123          <resetValue>0</resetValue>
175124          <resetMask>0xFF</resetMask>
175125          <fields>
175126            <field>
175127              <name>PRI52</name>
175128              <description>Priority of interrupt 52</description>
175129              <bitOffset>0</bitOffset>
175130              <bitWidth>8</bitWidth>
175131              <access>read-write</access>
175132            </field>
175133          </fields>
175134        </register>
175135        <register>
175136          <name>NVICIP53</name>
175137          <description>Interrupt Priority Register n</description>
175138          <addressOffset>0x335</addressOffset>
175139          <size>8</size>
175140          <access>read-write</access>
175141          <resetValue>0</resetValue>
175142          <resetMask>0xFF</resetMask>
175143          <fields>
175144            <field>
175145              <name>PRI53</name>
175146              <description>Priority of interrupt 53</description>
175147              <bitOffset>0</bitOffset>
175148              <bitWidth>8</bitWidth>
175149              <access>read-write</access>
175150            </field>
175151          </fields>
175152        </register>
175153        <register>
175154          <name>NVICIP54</name>
175155          <description>Interrupt Priority Register n</description>
175156          <addressOffset>0x336</addressOffset>
175157          <size>8</size>
175158          <access>read-write</access>
175159          <resetValue>0</resetValue>
175160          <resetMask>0xFF</resetMask>
175161          <fields>
175162            <field>
175163              <name>PRI54</name>
175164              <description>Priority of interrupt 54</description>
175165              <bitOffset>0</bitOffset>
175166              <bitWidth>8</bitWidth>
175167              <access>read-write</access>
175168            </field>
175169          </fields>
175170        </register>
175171        <register>
175172          <name>NVICIP55</name>
175173          <description>Interrupt Priority Register n</description>
175174          <addressOffset>0x337</addressOffset>
175175          <size>8</size>
175176          <access>read-write</access>
175177          <resetValue>0</resetValue>
175178          <resetMask>0xFF</resetMask>
175179          <fields>
175180            <field>
175181              <name>PRI55</name>
175182              <description>Priority of interrupt 55</description>
175183              <bitOffset>0</bitOffset>
175184              <bitWidth>8</bitWidth>
175185              <access>read-write</access>
175186            </field>
175187          </fields>
175188        </register>
175189        <register>
175190          <name>NVICIP56</name>
175191          <description>Interrupt Priority Register n</description>
175192          <addressOffset>0x338</addressOffset>
175193          <size>8</size>
175194          <access>read-write</access>
175195          <resetValue>0</resetValue>
175196          <resetMask>0xFF</resetMask>
175197          <fields>
175198            <field>
175199              <name>PRI56</name>
175200              <description>Priority of interrupt 56</description>
175201              <bitOffset>0</bitOffset>
175202              <bitWidth>8</bitWidth>
175203              <access>read-write</access>
175204            </field>
175205          </fields>
175206        </register>
175207        <register>
175208          <name>NVICIP57</name>
175209          <description>Interrupt Priority Register n</description>
175210          <addressOffset>0x339</addressOffset>
175211          <size>8</size>
175212          <access>read-write</access>
175213          <resetValue>0</resetValue>
175214          <resetMask>0xFF</resetMask>
175215          <fields>
175216            <field>
175217              <name>PRI57</name>
175218              <description>Priority of interrupt 57</description>
175219              <bitOffset>0</bitOffset>
175220              <bitWidth>8</bitWidth>
175221              <access>read-write</access>
175222            </field>
175223          </fields>
175224        </register>
175225        <register>
175226          <name>NVICIP58</name>
175227          <description>Interrupt Priority Register n</description>
175228          <addressOffset>0x33A</addressOffset>
175229          <size>8</size>
175230          <access>read-write</access>
175231          <resetValue>0</resetValue>
175232          <resetMask>0xFF</resetMask>
175233          <fields>
175234            <field>
175235              <name>PRI58</name>
175236              <description>Priority of interrupt 58</description>
175237              <bitOffset>0</bitOffset>
175238              <bitWidth>8</bitWidth>
175239              <access>read-write</access>
175240            </field>
175241          </fields>
175242        </register>
175243        <register>
175244          <name>NVICIP59</name>
175245          <description>Interrupt Priority Register n</description>
175246          <addressOffset>0x33B</addressOffset>
175247          <size>8</size>
175248          <access>read-write</access>
175249          <resetValue>0</resetValue>
175250          <resetMask>0xFF</resetMask>
175251          <fields>
175252            <field>
175253              <name>PRI59</name>
175254              <description>Priority of interrupt 59</description>
175255              <bitOffset>0</bitOffset>
175256              <bitWidth>8</bitWidth>
175257              <access>read-write</access>
175258            </field>
175259          </fields>
175260        </register>
175261        <register>
175262          <name>NVICIP60</name>
175263          <description>Interrupt Priority Register n</description>
175264          <addressOffset>0x33C</addressOffset>
175265          <size>8</size>
175266          <access>read-write</access>
175267          <resetValue>0</resetValue>
175268          <resetMask>0xFF</resetMask>
175269          <fields>
175270            <field>
175271              <name>PRI60</name>
175272              <description>Priority of interrupt 60</description>
175273              <bitOffset>0</bitOffset>
175274              <bitWidth>8</bitWidth>
175275              <access>read-write</access>
175276            </field>
175277          </fields>
175278        </register>
175279        <register>
175280          <name>NVICIP61</name>
175281          <description>Interrupt Priority Register n</description>
175282          <addressOffset>0x33D</addressOffset>
175283          <size>8</size>
175284          <access>read-write</access>
175285          <resetValue>0</resetValue>
175286          <resetMask>0xFF</resetMask>
175287          <fields>
175288            <field>
175289              <name>PRI61</name>
175290              <description>Priority of interrupt 61</description>
175291              <bitOffset>0</bitOffset>
175292              <bitWidth>8</bitWidth>
175293              <access>read-write</access>
175294            </field>
175295          </fields>
175296        </register>
175297        <register>
175298          <name>NVICIP62</name>
175299          <description>Interrupt Priority Register n</description>
175300          <addressOffset>0x33E</addressOffset>
175301          <size>8</size>
175302          <access>read-write</access>
175303          <resetValue>0</resetValue>
175304          <resetMask>0xFF</resetMask>
175305          <fields>
175306            <field>
175307              <name>PRI62</name>
175308              <description>Priority of interrupt 62</description>
175309              <bitOffset>0</bitOffset>
175310              <bitWidth>8</bitWidth>
175311              <access>read-write</access>
175312            </field>
175313          </fields>
175314        </register>
175315        <register>
175316          <name>NVICIP63</name>
175317          <description>Interrupt Priority Register n</description>
175318          <addressOffset>0x33F</addressOffset>
175319          <size>8</size>
175320          <access>read-write</access>
175321          <resetValue>0</resetValue>
175322          <resetMask>0xFF</resetMask>
175323          <fields>
175324            <field>
175325              <name>PRI63</name>
175326              <description>Priority of interrupt 63</description>
175327              <bitOffset>0</bitOffset>
175328              <bitWidth>8</bitWidth>
175329              <access>read-write</access>
175330            </field>
175331          </fields>
175332        </register>
175333        <register>
175334          <name>NVICIP64</name>
175335          <description>Interrupt Priority Register n</description>
175336          <addressOffset>0x340</addressOffset>
175337          <size>8</size>
175338          <access>read-write</access>
175339          <resetValue>0</resetValue>
175340          <resetMask>0xFF</resetMask>
175341          <fields>
175342            <field>
175343              <name>PRI64</name>
175344              <description>Priority of interrupt 64</description>
175345              <bitOffset>0</bitOffset>
175346              <bitWidth>8</bitWidth>
175347              <access>read-write</access>
175348            </field>
175349          </fields>
175350        </register>
175351        <register>
175352          <name>NVICIP65</name>
175353          <description>Interrupt Priority Register n</description>
175354          <addressOffset>0x341</addressOffset>
175355          <size>8</size>
175356          <access>read-write</access>
175357          <resetValue>0</resetValue>
175358          <resetMask>0xFF</resetMask>
175359          <fields>
175360            <field>
175361              <name>PRI65</name>
175362              <description>Priority of interrupt 65</description>
175363              <bitOffset>0</bitOffset>
175364              <bitWidth>8</bitWidth>
175365              <access>read-write</access>
175366            </field>
175367          </fields>
175368        </register>
175369        <register>
175370          <name>NVICIP66</name>
175371          <description>Interrupt Priority Register n</description>
175372          <addressOffset>0x342</addressOffset>
175373          <size>8</size>
175374          <access>read-write</access>
175375          <resetValue>0</resetValue>
175376          <resetMask>0xFF</resetMask>
175377          <fields>
175378            <field>
175379              <name>PRI66</name>
175380              <description>Priority of interrupt 66</description>
175381              <bitOffset>0</bitOffset>
175382              <bitWidth>8</bitWidth>
175383              <access>read-write</access>
175384            </field>
175385          </fields>
175386        </register>
175387        <register>
175388          <name>NVICIP67</name>
175389          <description>Interrupt Priority Register n</description>
175390          <addressOffset>0x343</addressOffset>
175391          <size>8</size>
175392          <access>read-write</access>
175393          <resetValue>0</resetValue>
175394          <resetMask>0xFF</resetMask>
175395          <fields>
175396            <field>
175397              <name>PRI67</name>
175398              <description>Priority of interrupt 67</description>
175399              <bitOffset>0</bitOffset>
175400              <bitWidth>8</bitWidth>
175401              <access>read-write</access>
175402            </field>
175403          </fields>
175404        </register>
175405        <register>
175406          <name>NVICIP68</name>
175407          <description>Interrupt Priority Register n</description>
175408          <addressOffset>0x344</addressOffset>
175409          <size>8</size>
175410          <access>read-write</access>
175411          <resetValue>0</resetValue>
175412          <resetMask>0xFF</resetMask>
175413          <fields>
175414            <field>
175415              <name>PRI68</name>
175416              <description>Priority of interrupt 68</description>
175417              <bitOffset>0</bitOffset>
175418              <bitWidth>8</bitWidth>
175419              <access>read-write</access>
175420            </field>
175421          </fields>
175422        </register>
175423        <register>
175424          <name>NVICIP69</name>
175425          <description>Interrupt Priority Register n</description>
175426          <addressOffset>0x345</addressOffset>
175427          <size>8</size>
175428          <access>read-write</access>
175429          <resetValue>0</resetValue>
175430          <resetMask>0xFF</resetMask>
175431          <fields>
175432            <field>
175433              <name>PRI69</name>
175434              <description>Priority of interrupt 69</description>
175435              <bitOffset>0</bitOffset>
175436              <bitWidth>8</bitWidth>
175437              <access>read-write</access>
175438            </field>
175439          </fields>
175440        </register>
175441        <register>
175442          <name>NVICIP70</name>
175443          <description>Interrupt Priority Register n</description>
175444          <addressOffset>0x346</addressOffset>
175445          <size>8</size>
175446          <access>read-write</access>
175447          <resetValue>0</resetValue>
175448          <resetMask>0xFF</resetMask>
175449          <fields>
175450            <field>
175451              <name>PRI70</name>
175452              <description>Priority of interrupt 70</description>
175453              <bitOffset>0</bitOffset>
175454              <bitWidth>8</bitWidth>
175455              <access>read-write</access>
175456            </field>
175457          </fields>
175458        </register>
175459        <register>
175460          <name>NVICIP71</name>
175461          <description>Interrupt Priority Register n</description>
175462          <addressOffset>0x347</addressOffset>
175463          <size>8</size>
175464          <access>read-write</access>
175465          <resetValue>0</resetValue>
175466          <resetMask>0xFF</resetMask>
175467          <fields>
175468            <field>
175469              <name>PRI71</name>
175470              <description>Priority of interrupt 71</description>
175471              <bitOffset>0</bitOffset>
175472              <bitWidth>8</bitWidth>
175473              <access>read-write</access>
175474            </field>
175475          </fields>
175476        </register>
175477        <register>
175478          <name>NVICIP72</name>
175479          <description>Interrupt Priority Register n</description>
175480          <addressOffset>0x348</addressOffset>
175481          <size>8</size>
175482          <access>read-write</access>
175483          <resetValue>0</resetValue>
175484          <resetMask>0xFF</resetMask>
175485          <fields>
175486            <field>
175487              <name>PRI72</name>
175488              <description>Priority of interrupt 72</description>
175489              <bitOffset>0</bitOffset>
175490              <bitWidth>8</bitWidth>
175491              <access>read-write</access>
175492            </field>
175493          </fields>
175494        </register>
175495        <register>
175496          <name>NVICIP73</name>
175497          <description>Interrupt Priority Register n</description>
175498          <addressOffset>0x349</addressOffset>
175499          <size>8</size>
175500          <access>read-write</access>
175501          <resetValue>0</resetValue>
175502          <resetMask>0xFF</resetMask>
175503          <fields>
175504            <field>
175505              <name>PRI73</name>
175506              <description>Priority of interrupt 73</description>
175507              <bitOffset>0</bitOffset>
175508              <bitWidth>8</bitWidth>
175509              <access>read-write</access>
175510            </field>
175511          </fields>
175512        </register>
175513        <register>
175514          <name>NVICIP74</name>
175515          <description>Interrupt Priority Register n</description>
175516          <addressOffset>0x34A</addressOffset>
175517          <size>8</size>
175518          <access>read-write</access>
175519          <resetValue>0</resetValue>
175520          <resetMask>0xFF</resetMask>
175521          <fields>
175522            <field>
175523              <name>PRI74</name>
175524              <description>Priority of interrupt 74</description>
175525              <bitOffset>0</bitOffset>
175526              <bitWidth>8</bitWidth>
175527              <access>read-write</access>
175528            </field>
175529          </fields>
175530        </register>
175531        <register>
175532          <name>NVICIP75</name>
175533          <description>Interrupt Priority Register n</description>
175534          <addressOffset>0x34B</addressOffset>
175535          <size>8</size>
175536          <access>read-write</access>
175537          <resetValue>0</resetValue>
175538          <resetMask>0xFF</resetMask>
175539          <fields>
175540            <field>
175541              <name>PRI75</name>
175542              <description>Priority of interrupt 75</description>
175543              <bitOffset>0</bitOffset>
175544              <bitWidth>8</bitWidth>
175545              <access>read-write</access>
175546            </field>
175547          </fields>
175548        </register>
175549        <register>
175550          <name>NVICIP76</name>
175551          <description>Interrupt Priority Register n</description>
175552          <addressOffset>0x34C</addressOffset>
175553          <size>8</size>
175554          <access>read-write</access>
175555          <resetValue>0</resetValue>
175556          <resetMask>0xFF</resetMask>
175557          <fields>
175558            <field>
175559              <name>PRI76</name>
175560              <description>Priority of interrupt 76</description>
175561              <bitOffset>0</bitOffset>
175562              <bitWidth>8</bitWidth>
175563              <access>read-write</access>
175564            </field>
175565          </fields>
175566        </register>
175567        <register>
175568          <name>NVICIP77</name>
175569          <description>Interrupt Priority Register n</description>
175570          <addressOffset>0x34D</addressOffset>
175571          <size>8</size>
175572          <access>read-write</access>
175573          <resetValue>0</resetValue>
175574          <resetMask>0xFF</resetMask>
175575          <fields>
175576            <field>
175577              <name>PRI77</name>
175578              <description>Priority of interrupt 77</description>
175579              <bitOffset>0</bitOffset>
175580              <bitWidth>8</bitWidth>
175581              <access>read-write</access>
175582            </field>
175583          </fields>
175584        </register>
175585        <register>
175586          <name>NVICIP78</name>
175587          <description>Interrupt Priority Register n</description>
175588          <addressOffset>0x34E</addressOffset>
175589          <size>8</size>
175590          <access>read-write</access>
175591          <resetValue>0</resetValue>
175592          <resetMask>0xFF</resetMask>
175593          <fields>
175594            <field>
175595              <name>PRI78</name>
175596              <description>Priority of interrupt 78</description>
175597              <bitOffset>0</bitOffset>
175598              <bitWidth>8</bitWidth>
175599              <access>read-write</access>
175600            </field>
175601          </fields>
175602        </register>
175603        <register>
175604          <name>NVICIP79</name>
175605          <description>Interrupt Priority Register n</description>
175606          <addressOffset>0x34F</addressOffset>
175607          <size>8</size>
175608          <access>read-write</access>
175609          <resetValue>0</resetValue>
175610          <resetMask>0xFF</resetMask>
175611          <fields>
175612            <field>
175613              <name>PRI79</name>
175614              <description>Priority of interrupt 79</description>
175615              <bitOffset>0</bitOffset>
175616              <bitWidth>8</bitWidth>
175617              <access>read-write</access>
175618            </field>
175619          </fields>
175620        </register>
175621        <register>
175622          <name>NVICIP80</name>
175623          <description>Interrupt Priority Register n</description>
175624          <addressOffset>0x350</addressOffset>
175625          <size>8</size>
175626          <access>read-write</access>
175627          <resetValue>0</resetValue>
175628          <resetMask>0xFF</resetMask>
175629          <fields>
175630            <field>
175631              <name>PRI80</name>
175632              <description>Priority of interrupt 80</description>
175633              <bitOffset>0</bitOffset>
175634              <bitWidth>8</bitWidth>
175635              <access>read-write</access>
175636            </field>
175637          </fields>
175638        </register>
175639        <register>
175640          <name>NVICIP81</name>
175641          <description>Interrupt Priority Register n</description>
175642          <addressOffset>0x351</addressOffset>
175643          <size>8</size>
175644          <access>read-write</access>
175645          <resetValue>0</resetValue>
175646          <resetMask>0xFF</resetMask>
175647          <fields>
175648            <field>
175649              <name>PRI81</name>
175650              <description>Priority of interrupt 81</description>
175651              <bitOffset>0</bitOffset>
175652              <bitWidth>8</bitWidth>
175653              <access>read-write</access>
175654            </field>
175655          </fields>
175656        </register>
175657        <register>
175658          <name>NVICIP82</name>
175659          <description>Interrupt Priority Register n</description>
175660          <addressOffset>0x352</addressOffset>
175661          <size>8</size>
175662          <access>read-write</access>
175663          <resetValue>0</resetValue>
175664          <resetMask>0xFF</resetMask>
175665          <fields>
175666            <field>
175667              <name>PRI82</name>
175668              <description>Priority of interrupt 82</description>
175669              <bitOffset>0</bitOffset>
175670              <bitWidth>8</bitWidth>
175671              <access>read-write</access>
175672            </field>
175673          </fields>
175674        </register>
175675        <register>
175676          <name>NVICIP83</name>
175677          <description>Interrupt Priority Register n</description>
175678          <addressOffset>0x353</addressOffset>
175679          <size>8</size>
175680          <access>read-write</access>
175681          <resetValue>0</resetValue>
175682          <resetMask>0xFF</resetMask>
175683          <fields>
175684            <field>
175685              <name>PRI83</name>
175686              <description>Priority of interrupt 83</description>
175687              <bitOffset>0</bitOffset>
175688              <bitWidth>8</bitWidth>
175689              <access>read-write</access>
175690            </field>
175691          </fields>
175692        </register>
175693        <register>
175694          <name>NVICIP84</name>
175695          <description>Interrupt Priority Register n</description>
175696          <addressOffset>0x354</addressOffset>
175697          <size>8</size>
175698          <access>read-write</access>
175699          <resetValue>0</resetValue>
175700          <resetMask>0xFF</resetMask>
175701          <fields>
175702            <field>
175703              <name>PRI84</name>
175704              <description>Priority of interrupt 84</description>
175705              <bitOffset>0</bitOffset>
175706              <bitWidth>8</bitWidth>
175707              <access>read-write</access>
175708            </field>
175709          </fields>
175710        </register>
175711        <register>
175712          <name>NVICIP85</name>
175713          <description>Interrupt Priority Register n</description>
175714          <addressOffset>0x355</addressOffset>
175715          <size>8</size>
175716          <access>read-write</access>
175717          <resetValue>0</resetValue>
175718          <resetMask>0xFF</resetMask>
175719          <fields>
175720            <field>
175721              <name>PRI85</name>
175722              <description>Priority of interrupt 85</description>
175723              <bitOffset>0</bitOffset>
175724              <bitWidth>8</bitWidth>
175725              <access>read-write</access>
175726            </field>
175727          </fields>
175728        </register>
175729        <register>
175730          <name>NVICIP86</name>
175731          <description>Interrupt Priority Register n</description>
175732          <addressOffset>0x356</addressOffset>
175733          <size>8</size>
175734          <access>read-write</access>
175735          <resetValue>0</resetValue>
175736          <resetMask>0xFF</resetMask>
175737          <fields>
175738            <field>
175739              <name>PRI86</name>
175740              <description>Priority of interrupt 86</description>
175741              <bitOffset>0</bitOffset>
175742              <bitWidth>8</bitWidth>
175743              <access>read-write</access>
175744            </field>
175745          </fields>
175746        </register>
175747        <register>
175748          <name>NVICIP87</name>
175749          <description>Interrupt Priority Register n</description>
175750          <addressOffset>0x357</addressOffset>
175751          <size>8</size>
175752          <access>read-write</access>
175753          <resetValue>0</resetValue>
175754          <resetMask>0xFF</resetMask>
175755          <fields>
175756            <field>
175757              <name>PRI87</name>
175758              <description>Priority of interrupt 87</description>
175759              <bitOffset>0</bitOffset>
175760              <bitWidth>8</bitWidth>
175761              <access>read-write</access>
175762            </field>
175763          </fields>
175764        </register>
175765        <register>
175766          <name>NVICIP88</name>
175767          <description>Interrupt Priority Register n</description>
175768          <addressOffset>0x358</addressOffset>
175769          <size>8</size>
175770          <access>read-write</access>
175771          <resetValue>0</resetValue>
175772          <resetMask>0xFF</resetMask>
175773          <fields>
175774            <field>
175775              <name>PRI88</name>
175776              <description>Priority of interrupt 88</description>
175777              <bitOffset>0</bitOffset>
175778              <bitWidth>8</bitWidth>
175779              <access>read-write</access>
175780            </field>
175781          </fields>
175782        </register>
175783        <register>
175784          <name>NVICIP89</name>
175785          <description>Interrupt Priority Register n</description>
175786          <addressOffset>0x359</addressOffset>
175787          <size>8</size>
175788          <access>read-write</access>
175789          <resetValue>0</resetValue>
175790          <resetMask>0xFF</resetMask>
175791          <fields>
175792            <field>
175793              <name>PRI89</name>
175794              <description>Priority of interrupt 89</description>
175795              <bitOffset>0</bitOffset>
175796              <bitWidth>8</bitWidth>
175797              <access>read-write</access>
175798            </field>
175799          </fields>
175800        </register>
175801        <register>
175802          <name>NVICIP90</name>
175803          <description>Interrupt Priority Register n</description>
175804          <addressOffset>0x35A</addressOffset>
175805          <size>8</size>
175806          <access>read-write</access>
175807          <resetValue>0</resetValue>
175808          <resetMask>0xFF</resetMask>
175809          <fields>
175810            <field>
175811              <name>PRI90</name>
175812              <description>Priority of interrupt 90</description>
175813              <bitOffset>0</bitOffset>
175814              <bitWidth>8</bitWidth>
175815              <access>read-write</access>
175816            </field>
175817          </fields>
175818        </register>
175819        <register>
175820          <name>NVICIP91</name>
175821          <description>Interrupt Priority Register n</description>
175822          <addressOffset>0x35B</addressOffset>
175823          <size>8</size>
175824          <access>read-write</access>
175825          <resetValue>0</resetValue>
175826          <resetMask>0xFF</resetMask>
175827          <fields>
175828            <field>
175829              <name>PRI91</name>
175830              <description>Priority of interrupt 91</description>
175831              <bitOffset>0</bitOffset>
175832              <bitWidth>8</bitWidth>
175833              <access>read-write</access>
175834            </field>
175835          </fields>
175836        </register>
175837        <register>
175838          <name>NVICIP92</name>
175839          <description>Interrupt Priority Register n</description>
175840          <addressOffset>0x35C</addressOffset>
175841          <size>8</size>
175842          <access>read-write</access>
175843          <resetValue>0</resetValue>
175844          <resetMask>0xFF</resetMask>
175845          <fields>
175846            <field>
175847              <name>PRI92</name>
175848              <description>Priority of interrupt 92</description>
175849              <bitOffset>0</bitOffset>
175850              <bitWidth>8</bitWidth>
175851              <access>read-write</access>
175852            </field>
175853          </fields>
175854        </register>
175855        <register>
175856          <name>NVICIP93</name>
175857          <description>Interrupt Priority Register n</description>
175858          <addressOffset>0x35D</addressOffset>
175859          <size>8</size>
175860          <access>read-write</access>
175861          <resetValue>0</resetValue>
175862          <resetMask>0xFF</resetMask>
175863          <fields>
175864            <field>
175865              <name>PRI93</name>
175866              <description>Priority of interrupt 93</description>
175867              <bitOffset>0</bitOffset>
175868              <bitWidth>8</bitWidth>
175869              <access>read-write</access>
175870            </field>
175871          </fields>
175872        </register>
175873        <register>
175874          <name>NVICIP94</name>
175875          <description>Interrupt Priority Register n</description>
175876          <addressOffset>0x35E</addressOffset>
175877          <size>8</size>
175878          <access>read-write</access>
175879          <resetValue>0</resetValue>
175880          <resetMask>0xFF</resetMask>
175881          <fields>
175882            <field>
175883              <name>PRI94</name>
175884              <description>Priority of interrupt 94</description>
175885              <bitOffset>0</bitOffset>
175886              <bitWidth>8</bitWidth>
175887              <access>read-write</access>
175888            </field>
175889          </fields>
175890        </register>
175891        <register>
175892          <name>NVICIP95</name>
175893          <description>Interrupt Priority Register n</description>
175894          <addressOffset>0x35F</addressOffset>
175895          <size>8</size>
175896          <access>read-write</access>
175897          <resetValue>0</resetValue>
175898          <resetMask>0xFF</resetMask>
175899          <fields>
175900            <field>
175901              <name>PRI95</name>
175902              <description>Priority of interrupt 95</description>
175903              <bitOffset>0</bitOffset>
175904              <bitWidth>8</bitWidth>
175905              <access>read-write</access>
175906            </field>
175907          </fields>
175908        </register>
175909        <register>
175910          <name>NVICIP96</name>
175911          <description>Interrupt Priority Register n</description>
175912          <addressOffset>0x360</addressOffset>
175913          <size>8</size>
175914          <access>read-write</access>
175915          <resetValue>0</resetValue>
175916          <resetMask>0xFF</resetMask>
175917          <fields>
175918            <field>
175919              <name>PRI96</name>
175920              <description>Priority of interrupt 96</description>
175921              <bitOffset>0</bitOffset>
175922              <bitWidth>8</bitWidth>
175923              <access>read-write</access>
175924            </field>
175925          </fields>
175926        </register>
175927        <register>
175928          <name>NVICIP97</name>
175929          <description>Interrupt Priority Register n</description>
175930          <addressOffset>0x361</addressOffset>
175931          <size>8</size>
175932          <access>read-write</access>
175933          <resetValue>0</resetValue>
175934          <resetMask>0xFF</resetMask>
175935          <fields>
175936            <field>
175937              <name>PRI97</name>
175938              <description>Priority of interrupt 97</description>
175939              <bitOffset>0</bitOffset>
175940              <bitWidth>8</bitWidth>
175941              <access>read-write</access>
175942            </field>
175943          </fields>
175944        </register>
175945        <register>
175946          <name>NVICIP98</name>
175947          <description>Interrupt Priority Register n</description>
175948          <addressOffset>0x362</addressOffset>
175949          <size>8</size>
175950          <access>read-write</access>
175951          <resetValue>0</resetValue>
175952          <resetMask>0xFF</resetMask>
175953          <fields>
175954            <field>
175955              <name>PRI98</name>
175956              <description>Priority of interrupt 98</description>
175957              <bitOffset>0</bitOffset>
175958              <bitWidth>8</bitWidth>
175959              <access>read-write</access>
175960            </field>
175961          </fields>
175962        </register>
175963        <register>
175964          <name>NVICIP99</name>
175965          <description>Interrupt Priority Register n</description>
175966          <addressOffset>0x363</addressOffset>
175967          <size>8</size>
175968          <access>read-write</access>
175969          <resetValue>0</resetValue>
175970          <resetMask>0xFF</resetMask>
175971          <fields>
175972            <field>
175973              <name>PRI99</name>
175974              <description>Priority of interrupt 99</description>
175975              <bitOffset>0</bitOffset>
175976              <bitWidth>8</bitWidth>
175977              <access>read-write</access>
175978            </field>
175979          </fields>
175980        </register>
175981        <register>
175982          <name>NVICIP100</name>
175983          <description>Interrupt Priority Register n</description>
175984          <addressOffset>0x364</addressOffset>
175985          <size>8</size>
175986          <access>read-write</access>
175987          <resetValue>0</resetValue>
175988          <resetMask>0xFF</resetMask>
175989          <fields>
175990            <field>
175991              <name>PRI100</name>
175992              <description>Priority of interrupt 100</description>
175993              <bitOffset>0</bitOffset>
175994              <bitWidth>8</bitWidth>
175995              <access>read-write</access>
175996            </field>
175997          </fields>
175998        </register>
175999        <register>
176000          <name>NVICIP101</name>
176001          <description>Interrupt Priority Register n</description>
176002          <addressOffset>0x365</addressOffset>
176003          <size>8</size>
176004          <access>read-write</access>
176005          <resetValue>0</resetValue>
176006          <resetMask>0xFF</resetMask>
176007          <fields>
176008            <field>
176009              <name>PRI101</name>
176010              <description>Priority of interrupt 101</description>
176011              <bitOffset>0</bitOffset>
176012              <bitWidth>8</bitWidth>
176013              <access>read-write</access>
176014            </field>
176015          </fields>
176016        </register>
176017        <register>
176018          <name>NVICIP102</name>
176019          <description>Interrupt Priority Register n</description>
176020          <addressOffset>0x366</addressOffset>
176021          <size>8</size>
176022          <access>read-write</access>
176023          <resetValue>0</resetValue>
176024          <resetMask>0xFF</resetMask>
176025          <fields>
176026            <field>
176027              <name>PRI102</name>
176028              <description>Priority of interrupt 102</description>
176029              <bitOffset>0</bitOffset>
176030              <bitWidth>8</bitWidth>
176031              <access>read-write</access>
176032            </field>
176033          </fields>
176034        </register>
176035        <register>
176036          <name>NVICIP103</name>
176037          <description>Interrupt Priority Register n</description>
176038          <addressOffset>0x367</addressOffset>
176039          <size>8</size>
176040          <access>read-write</access>
176041          <resetValue>0</resetValue>
176042          <resetMask>0xFF</resetMask>
176043          <fields>
176044            <field>
176045              <name>PRI103</name>
176046              <description>Priority of interrupt 103</description>
176047              <bitOffset>0</bitOffset>
176048              <bitWidth>8</bitWidth>
176049              <access>read-write</access>
176050            </field>
176051          </fields>
176052        </register>
176053        <register>
176054          <name>NVICIP104</name>
176055          <description>Interrupt Priority Register n</description>
176056          <addressOffset>0x368</addressOffset>
176057          <size>8</size>
176058          <access>read-write</access>
176059          <resetValue>0</resetValue>
176060          <resetMask>0xFF</resetMask>
176061          <fields>
176062            <field>
176063              <name>PRI104</name>
176064              <description>Priority of interrupt 104</description>
176065              <bitOffset>0</bitOffset>
176066              <bitWidth>8</bitWidth>
176067              <access>read-write</access>
176068            </field>
176069          </fields>
176070        </register>
176071        <register>
176072          <name>NVICIP105</name>
176073          <description>Interrupt Priority Register n</description>
176074          <addressOffset>0x369</addressOffset>
176075          <size>8</size>
176076          <access>read-write</access>
176077          <resetValue>0</resetValue>
176078          <resetMask>0xFF</resetMask>
176079          <fields>
176080            <field>
176081              <name>PRI105</name>
176082              <description>Priority of interrupt 105</description>
176083              <bitOffset>0</bitOffset>
176084              <bitWidth>8</bitWidth>
176085              <access>read-write</access>
176086            </field>
176087          </fields>
176088        </register>
176089        <register>
176090          <name>NVICSTIR</name>
176091          <description>Software Trigger Interrupt Register</description>
176092          <addressOffset>0xE00</addressOffset>
176093          <size>32</size>
176094          <access>read-write</access>
176095          <resetValue>0</resetValue>
176096          <resetMask>0xFFFFFFFF</resetMask>
176097          <fields>
176098            <field>
176099              <name>INTID</name>
176100              <description>Interrupt ID of the interrupt to trigger, in the range 0-239. For example, a value of 0x03 specifies interrupt IRQ3.</description>
176101              <bitOffset>0</bitOffset>
176102              <bitWidth>9</bitWidth>
176103              <access>read-write</access>
176104            </field>
176105          </fields>
176106        </register>
176107      </registers>
176108    </peripheral>
176109    <peripheral>
176110      <name>MCM</name>
176111      <description>Core Platform Miscellaneous Control Module</description>
176112      <prependToName>MCM_</prependToName>
176113      <baseAddress>0xE0080000</baseAddress>
176114      <addressBlock>
176115        <offset>0x8</offset>
176116        <size>0x3C</size>
176117        <usage>registers</usage>
176118      </addressBlock>
176119      <interrupt>
176120        <name>MCM</name>
176121        <value>17</value>
176122      </interrupt>
176123      <registers>
176124        <register>
176125          <name>PLASC</name>
176126          <description>Crossbar Switch (AXBS) Slave Configuration</description>
176127          <addressOffset>0x8</addressOffset>
176128          <size>16</size>
176129          <access>read-only</access>
176130          <resetValue>0x3F</resetValue>
176131          <resetMask>0xFFFF</resetMask>
176132          <fields>
176133            <field>
176134              <name>ASC</name>
176135              <description>Each bit in the ASC field indicates whether there is a corresponding connection to the crossbar switch&apos;s slave input port.</description>
176136              <bitOffset>0</bitOffset>
176137              <bitWidth>8</bitWidth>
176138              <access>read-only</access>
176139              <enumeratedValues>
176140                <enumeratedValue>
176141                  <name>0</name>
176142                  <description>A bus slave connection to AXBS input port n is absent</description>
176143                  <value>#0</value>
176144                </enumeratedValue>
176145                <enumeratedValue>
176146                  <name>1</name>
176147                  <description>A bus slave connection to AXBS input port n is present</description>
176148                  <value>#1</value>
176149                </enumeratedValue>
176150              </enumeratedValues>
176151            </field>
176152          </fields>
176153        </register>
176154        <register>
176155          <name>PLAMC</name>
176156          <description>Crossbar Switch (AXBS) Master Configuration</description>
176157          <addressOffset>0xA</addressOffset>
176158          <size>16</size>
176159          <access>read-only</access>
176160          <resetValue>0x1F</resetValue>
176161          <resetMask>0xFFFF</resetMask>
176162          <fields>
176163            <field>
176164              <name>AMC</name>
176165              <description>Each bit in the AMC field indicates whether there is a corresponding connection to the AXBS master input port.</description>
176166              <bitOffset>0</bitOffset>
176167              <bitWidth>8</bitWidth>
176168              <access>read-only</access>
176169              <enumeratedValues>
176170                <enumeratedValue>
176171                  <name>0</name>
176172                  <description>A bus master connection to AXBS input port n is absent</description>
176173                  <value>#0</value>
176174                </enumeratedValue>
176175                <enumeratedValue>
176176                  <name>1</name>
176177                  <description>A bus master connection to AXBS input port n is present</description>
176178                  <value>#1</value>
176179                </enumeratedValue>
176180              </enumeratedValues>
176181            </field>
176182          </fields>
176183        </register>
176184        <register>
176185          <name>CR</name>
176186          <description>Control Register</description>
176187          <addressOffset>0xC</addressOffset>
176188          <size>32</size>
176189          <access>read-write</access>
176190          <resetValue>0</resetValue>
176191          <resetMask>0xFFFFFFFF</resetMask>
176192          <fields>
176193            <field>
176194              <name>SRAMUAP</name>
176195              <description>SRAM_U arbitration priority</description>
176196              <bitOffset>24</bitOffset>
176197              <bitWidth>2</bitWidth>
176198              <access>read-write</access>
176199              <enumeratedValues>
176200                <enumeratedValue>
176201                  <name>00</name>
176202                  <description>Round robin</description>
176203                  <value>#00</value>
176204                </enumeratedValue>
176205                <enumeratedValue>
176206                  <name>01</name>
176207                  <description>Special round robin (favors SRAM backoor accesses over the processor)</description>
176208                  <value>#01</value>
176209                </enumeratedValue>
176210                <enumeratedValue>
176211                  <name>10</name>
176212                  <description>Fixed priority. Processor has highest, backdoor has lowest</description>
176213                  <value>#10</value>
176214                </enumeratedValue>
176215                <enumeratedValue>
176216                  <name>11</name>
176217                  <description>Fixed priority. Backdoor has highest, processor has lowest</description>
176218                  <value>#11</value>
176219                </enumeratedValue>
176220              </enumeratedValues>
176221            </field>
176222            <field>
176223              <name>SRAMUWP</name>
176224              <description>SRAM_U write protect</description>
176225              <bitOffset>26</bitOffset>
176226              <bitWidth>1</bitWidth>
176227              <access>read-write</access>
176228            </field>
176229            <field>
176230              <name>SRAMLAP</name>
176231              <description>SRAM_L arbitration priority</description>
176232              <bitOffset>28</bitOffset>
176233              <bitWidth>2</bitWidth>
176234              <access>read-write</access>
176235              <enumeratedValues>
176236                <enumeratedValue>
176237                  <name>00</name>
176238                  <description>Round robin</description>
176239                  <value>#00</value>
176240                </enumeratedValue>
176241                <enumeratedValue>
176242                  <name>01</name>
176243                  <description>Special round robin (favors SRAM backoor accesses over the processor)</description>
176244                  <value>#01</value>
176245                </enumeratedValue>
176246                <enumeratedValue>
176247                  <name>10</name>
176248                  <description>Fixed priority. Processor has highest, backdoor has lowest</description>
176249                  <value>#10</value>
176250                </enumeratedValue>
176251                <enumeratedValue>
176252                  <name>11</name>
176253                  <description>Fixed priority. Backdoor has highest, processor has lowest</description>
176254                  <value>#11</value>
176255                </enumeratedValue>
176256              </enumeratedValues>
176257            </field>
176258            <field>
176259              <name>SRAMLWP</name>
176260              <description>SRAM_L Write Protect</description>
176261              <bitOffset>30</bitOffset>
176262              <bitWidth>1</bitWidth>
176263              <access>read-write</access>
176264            </field>
176265          </fields>
176266        </register>
176267        <register>
176268          <name>ISCR</name>
176269          <description>Interrupt Status Register</description>
176270          <addressOffset>0x10</addressOffset>
176271          <size>32</size>
176272          <access>read-write</access>
176273          <resetValue>0</resetValue>
176274          <resetMask>0xFFFFFFFF</resetMask>
176275          <fields>
176276            <field>
176277              <name>FIOC</name>
176278              <description>FPU invalid operation interrupt status</description>
176279              <bitOffset>8</bitOffset>
176280              <bitWidth>1</bitWidth>
176281              <access>read-only</access>
176282              <enumeratedValues>
176283                <enumeratedValue>
176284                  <name>0</name>
176285                  <description>No interrupt</description>
176286                  <value>#0</value>
176287                </enumeratedValue>
176288                <enumeratedValue>
176289                  <name>1</name>
176290                  <description>Interrupt occurred</description>
176291                  <value>#1</value>
176292                </enumeratedValue>
176293              </enumeratedValues>
176294            </field>
176295            <field>
176296              <name>FDZC</name>
176297              <description>FPU divide-by-zero interrupt status</description>
176298              <bitOffset>9</bitOffset>
176299              <bitWidth>1</bitWidth>
176300              <access>read-only</access>
176301              <enumeratedValues>
176302                <enumeratedValue>
176303                  <name>0</name>
176304                  <description>No interrupt</description>
176305                  <value>#0</value>
176306                </enumeratedValue>
176307                <enumeratedValue>
176308                  <name>1</name>
176309                  <description>Interrupt occurred</description>
176310                  <value>#1</value>
176311                </enumeratedValue>
176312              </enumeratedValues>
176313            </field>
176314            <field>
176315              <name>FOFC</name>
176316              <description>FPU overflow interrupt status</description>
176317              <bitOffset>10</bitOffset>
176318              <bitWidth>1</bitWidth>
176319              <access>read-only</access>
176320              <enumeratedValues>
176321                <enumeratedValue>
176322                  <name>0</name>
176323                  <description>No interrupt</description>
176324                  <value>#0</value>
176325                </enumeratedValue>
176326                <enumeratedValue>
176327                  <name>1</name>
176328                  <description>Interrupt occurred</description>
176329                  <value>#1</value>
176330                </enumeratedValue>
176331              </enumeratedValues>
176332            </field>
176333            <field>
176334              <name>FUFC</name>
176335              <description>FPU underflow interrupt status</description>
176336              <bitOffset>11</bitOffset>
176337              <bitWidth>1</bitWidth>
176338              <access>read-only</access>
176339              <enumeratedValues>
176340                <enumeratedValue>
176341                  <name>0</name>
176342                  <description>No interrupt</description>
176343                  <value>#0</value>
176344                </enumeratedValue>
176345                <enumeratedValue>
176346                  <name>1</name>
176347                  <description>Interrupt occurred</description>
176348                  <value>#1</value>
176349                </enumeratedValue>
176350              </enumeratedValues>
176351            </field>
176352            <field>
176353              <name>FIXC</name>
176354              <description>FPU inexact interrupt status</description>
176355              <bitOffset>12</bitOffset>
176356              <bitWidth>1</bitWidth>
176357              <access>read-only</access>
176358              <enumeratedValues>
176359                <enumeratedValue>
176360                  <name>0</name>
176361                  <description>No interrupt</description>
176362                  <value>#0</value>
176363                </enumeratedValue>
176364                <enumeratedValue>
176365                  <name>1</name>
176366                  <description>Interrupt occurred</description>
176367                  <value>#1</value>
176368                </enumeratedValue>
176369              </enumeratedValues>
176370            </field>
176371            <field>
176372              <name>FIDC</name>
176373              <description>FPU input denormal interrupt status</description>
176374              <bitOffset>15</bitOffset>
176375              <bitWidth>1</bitWidth>
176376              <access>read-only</access>
176377              <enumeratedValues>
176378                <enumeratedValue>
176379                  <name>0</name>
176380                  <description>No interrupt</description>
176381                  <value>#0</value>
176382                </enumeratedValue>
176383                <enumeratedValue>
176384                  <name>1</name>
176385                  <description>Interrupt occurred</description>
176386                  <value>#1</value>
176387                </enumeratedValue>
176388              </enumeratedValues>
176389            </field>
176390            <field>
176391              <name>FIOCE</name>
176392              <description>FPU invalid operation interrupt enable</description>
176393              <bitOffset>24</bitOffset>
176394              <bitWidth>1</bitWidth>
176395              <access>read-write</access>
176396              <enumeratedValues>
176397                <enumeratedValue>
176398                  <name>0</name>
176399                  <description>Disable interrupt</description>
176400                  <value>#0</value>
176401                </enumeratedValue>
176402                <enumeratedValue>
176403                  <name>1</name>
176404                  <description>Enable interrupt</description>
176405                  <value>#1</value>
176406                </enumeratedValue>
176407              </enumeratedValues>
176408            </field>
176409            <field>
176410              <name>FDZCE</name>
176411              <description>FPU divide-by-zero interrupt enable</description>
176412              <bitOffset>25</bitOffset>
176413              <bitWidth>1</bitWidth>
176414              <access>read-write</access>
176415              <enumeratedValues>
176416                <enumeratedValue>
176417                  <name>0</name>
176418                  <description>Disable interrupt</description>
176419                  <value>#0</value>
176420                </enumeratedValue>
176421                <enumeratedValue>
176422                  <name>1</name>
176423                  <description>Enable interrupt</description>
176424                  <value>#1</value>
176425                </enumeratedValue>
176426              </enumeratedValues>
176427            </field>
176428            <field>
176429              <name>FOFCE</name>
176430              <description>FPU overflow interrupt enable</description>
176431              <bitOffset>26</bitOffset>
176432              <bitWidth>1</bitWidth>
176433              <access>read-write</access>
176434              <enumeratedValues>
176435                <enumeratedValue>
176436                  <name>0</name>
176437                  <description>Disable interrupt</description>
176438                  <value>#0</value>
176439                </enumeratedValue>
176440                <enumeratedValue>
176441                  <name>1</name>
176442                  <description>Enable interrupt</description>
176443                  <value>#1</value>
176444                </enumeratedValue>
176445              </enumeratedValues>
176446            </field>
176447            <field>
176448              <name>FUFCE</name>
176449              <description>FPU underflow interrupt enable</description>
176450              <bitOffset>27</bitOffset>
176451              <bitWidth>1</bitWidth>
176452              <access>read-write</access>
176453              <enumeratedValues>
176454                <enumeratedValue>
176455                  <name>0</name>
176456                  <description>Disable interrupt</description>
176457                  <value>#0</value>
176458                </enumeratedValue>
176459                <enumeratedValue>
176460                  <name>1</name>
176461                  <description>Enable interrupt</description>
176462                  <value>#1</value>
176463                </enumeratedValue>
176464              </enumeratedValues>
176465            </field>
176466            <field>
176467              <name>FIXCE</name>
176468              <description>FPU inexact interrupt enable</description>
176469              <bitOffset>28</bitOffset>
176470              <bitWidth>1</bitWidth>
176471              <access>read-write</access>
176472              <enumeratedValues>
176473                <enumeratedValue>
176474                  <name>0</name>
176475                  <description>Disable interrupt</description>
176476                  <value>#0</value>
176477                </enumeratedValue>
176478                <enumeratedValue>
176479                  <name>1</name>
176480                  <description>Enable interrupt</description>
176481                  <value>#1</value>
176482                </enumeratedValue>
176483              </enumeratedValues>
176484            </field>
176485            <field>
176486              <name>FIDCE</name>
176487              <description>FPU input denormal interrupt enable</description>
176488              <bitOffset>31</bitOffset>
176489              <bitWidth>1</bitWidth>
176490              <access>read-write</access>
176491              <enumeratedValues>
176492                <enumeratedValue>
176493                  <name>0</name>
176494                  <description>Disable interrupt</description>
176495                  <value>#0</value>
176496                </enumeratedValue>
176497                <enumeratedValue>
176498                  <name>1</name>
176499                  <description>Enable interrupt</description>
176500                  <value>#1</value>
176501                </enumeratedValue>
176502              </enumeratedValues>
176503            </field>
176504          </fields>
176505        </register>
176506        <register>
176507          <name>FADR</name>
176508          <description>Fault address register</description>
176509          <addressOffset>0x20</addressOffset>
176510          <size>32</size>
176511          <access>read-only</access>
176512          <resetValue>0</resetValue>
176513          <resetMask>0</resetMask>
176514          <fields>
176515            <field>
176516              <name>ADDRESS</name>
176517              <description>Fault address</description>
176518              <bitOffset>0</bitOffset>
176519              <bitWidth>32</bitWidth>
176520              <access>read-only</access>
176521            </field>
176522          </fields>
176523        </register>
176524        <register>
176525          <name>FATR</name>
176526          <description>Fault attributes register</description>
176527          <addressOffset>0x24</addressOffset>
176528          <size>32</size>
176529          <access>read-only</access>
176530          <resetValue>0</resetValue>
176531          <resetMask>0</resetMask>
176532          <fields>
176533            <field>
176534              <name>BEDA</name>
176535              <description>Bus error access type</description>
176536              <bitOffset>0</bitOffset>
176537              <bitWidth>1</bitWidth>
176538              <access>read-only</access>
176539              <enumeratedValues>
176540                <enumeratedValue>
176541                  <name>0</name>
176542                  <description>Instruction</description>
176543                  <value>#0</value>
176544                </enumeratedValue>
176545                <enumeratedValue>
176546                  <name>1</name>
176547                  <description>Data</description>
176548                  <value>#1</value>
176549                </enumeratedValue>
176550              </enumeratedValues>
176551            </field>
176552            <field>
176553              <name>BEMD</name>
176554              <description>Bus error privilege level</description>
176555              <bitOffset>1</bitOffset>
176556              <bitWidth>1</bitWidth>
176557              <access>read-only</access>
176558              <enumeratedValues>
176559                <enumeratedValue>
176560                  <name>0</name>
176561                  <description>User mode</description>
176562                  <value>#0</value>
176563                </enumeratedValue>
176564                <enumeratedValue>
176565                  <name>1</name>
176566                  <description>Supervisor/privileged mode</description>
176567                  <value>#1</value>
176568                </enumeratedValue>
176569              </enumeratedValues>
176570            </field>
176571            <field>
176572              <name>BESZ</name>
176573              <description>Bus error size</description>
176574              <bitOffset>4</bitOffset>
176575              <bitWidth>2</bitWidth>
176576              <access>read-only</access>
176577              <enumeratedValues>
176578                <enumeratedValue>
176579                  <name>00</name>
176580                  <description>8-bit access</description>
176581                  <value>#00</value>
176582                </enumeratedValue>
176583                <enumeratedValue>
176584                  <name>01</name>
176585                  <description>16-bit access</description>
176586                  <value>#01</value>
176587                </enumeratedValue>
176588                <enumeratedValue>
176589                  <name>10</name>
176590                  <description>32-bit access</description>
176591                  <value>#10</value>
176592                </enumeratedValue>
176593              </enumeratedValues>
176594            </field>
176595            <field>
176596              <name>BEWT</name>
176597              <description>Bus error write</description>
176598              <bitOffset>7</bitOffset>
176599              <bitWidth>1</bitWidth>
176600              <access>read-only</access>
176601              <enumeratedValues>
176602                <enumeratedValue>
176603                  <name>0</name>
176604                  <description>Read access</description>
176605                  <value>#0</value>
176606                </enumeratedValue>
176607                <enumeratedValue>
176608                  <name>1</name>
176609                  <description>Write access</description>
176610                  <value>#1</value>
176611                </enumeratedValue>
176612              </enumeratedValues>
176613            </field>
176614            <field>
176615              <name>BEMN</name>
176616              <description>Bus error master number</description>
176617              <bitOffset>8</bitOffset>
176618              <bitWidth>4</bitWidth>
176619              <access>read-only</access>
176620            </field>
176621            <field>
176622              <name>BEOVR</name>
176623              <description>Bus error overrun</description>
176624              <bitOffset>31</bitOffset>
176625              <bitWidth>1</bitWidth>
176626              <access>read-only</access>
176627              <enumeratedValues>
176628                <enumeratedValue>
176629                  <name>0</name>
176630                  <description>No bus error overrun</description>
176631                  <value>#0</value>
176632                </enumeratedValue>
176633                <enumeratedValue>
176634                  <name>1</name>
176635                  <description>Bus error overrun occurred. The FADR and FDR registers and the other FATR bits are not updated to reflect this new bus error.</description>
176636                  <value>#1</value>
176637                </enumeratedValue>
176638              </enumeratedValues>
176639            </field>
176640          </fields>
176641        </register>
176642        <register>
176643          <name>FDR</name>
176644          <description>Fault data register</description>
176645          <addressOffset>0x28</addressOffset>
176646          <size>32</size>
176647          <access>read-only</access>
176648          <resetValue>0</resetValue>
176649          <resetMask>0</resetMask>
176650          <fields>
176651            <field>
176652              <name>DATA</name>
176653              <description>Fault data</description>
176654              <bitOffset>0</bitOffset>
176655              <bitWidth>32</bitWidth>
176656              <access>read-only</access>
176657            </field>
176658          </fields>
176659        </register>
176660        <register>
176661          <name>PID</name>
176662          <description>Process ID register</description>
176663          <addressOffset>0x30</addressOffset>
176664          <size>32</size>
176665          <access>read-write</access>
176666          <resetValue>0</resetValue>
176667          <resetMask>0xFFFFFFFF</resetMask>
176668          <fields>
176669            <field>
176670              <name>PID</name>
176671              <description>M0_PID And M1_PID For MPU</description>
176672              <bitOffset>0</bitOffset>
176673              <bitWidth>8</bitWidth>
176674              <access>read-write</access>
176675            </field>
176676          </fields>
176677        </register>
176678        <register>
176679          <name>CPO</name>
176680          <description>Compute Operation Control Register</description>
176681          <addressOffset>0x40</addressOffset>
176682          <size>32</size>
176683          <access>read-write</access>
176684          <resetValue>0</resetValue>
176685          <resetMask>0xFFFFFFFF</resetMask>
176686          <fields>
176687            <field>
176688              <name>CPOREQ</name>
176689              <description>Compute Operation request</description>
176690              <bitOffset>0</bitOffset>
176691              <bitWidth>1</bitWidth>
176692              <access>read-write</access>
176693              <enumeratedValues>
176694                <enumeratedValue>
176695                  <name>0</name>
176696                  <description>Request is cleared.</description>
176697                  <value>#0</value>
176698                </enumeratedValue>
176699                <enumeratedValue>
176700                  <name>1</name>
176701                  <description>Request Compute Operation.</description>
176702                  <value>#1</value>
176703                </enumeratedValue>
176704              </enumeratedValues>
176705            </field>
176706            <field>
176707              <name>CPOACK</name>
176708              <description>Compute Operation acknowledge</description>
176709              <bitOffset>1</bitOffset>
176710              <bitWidth>1</bitWidth>
176711              <access>read-only</access>
176712              <enumeratedValues>
176713                <enumeratedValue>
176714                  <name>0</name>
176715                  <description>Compute operation entry has not completed or compute operation exit has completed.</description>
176716                  <value>#0</value>
176717                </enumeratedValue>
176718                <enumeratedValue>
176719                  <name>1</name>
176720                  <description>Compute operation entry has completed or compute operation exit has not completed.</description>
176721                  <value>#1</value>
176722                </enumeratedValue>
176723              </enumeratedValues>
176724            </field>
176725            <field>
176726              <name>CPOWOI</name>
176727              <description>Compute Operation wakeup on interrupt</description>
176728              <bitOffset>2</bitOffset>
176729              <bitWidth>1</bitWidth>
176730              <access>read-write</access>
176731              <enumeratedValues>
176732                <enumeratedValue>
176733                  <name>0</name>
176734                  <description>No effect.</description>
176735                  <value>#0</value>
176736                </enumeratedValue>
176737                <enumeratedValue>
176738                  <name>1</name>
176739                  <description>When set, the CPOREQ is cleared on any interrupt or exception vector fetch.</description>
176740                  <value>#1</value>
176741                </enumeratedValue>
176742              </enumeratedValues>
176743            </field>
176744          </fields>
176745        </register>
176746      </registers>
176747    </peripheral>
176748    <peripheral>
176749      <name>CAU</name>
176750      <description>Memory Mapped Cryptographic Acceleration Unit (MMCAU)</description>
176751      <baseAddress>0xE0081000</baseAddress>
176752      <addressBlock>
176753        <offset>0</offset>
176754        <size>0xB6C</size>
176755        <usage>registers</usage>
176756      </addressBlock>
176757      <registers>
176758        <register>
176759          <name>CAU_DIRECT0</name>
176760          <description>Direct access register 0</description>
176761          <addressOffset>0</addressOffset>
176762          <size>32</size>
176763          <access>write-only</access>
176764          <resetValue>0</resetValue>
176765          <resetMask>0xFFFFFFFF</resetMask>
176766          <fields>
176767            <field>
176768              <name>CAU_DIRECT0</name>
176769              <description>Direct register 0</description>
176770              <bitOffset>0</bitOffset>
176771              <bitWidth>32</bitWidth>
176772              <access>write-only</access>
176773            </field>
176774          </fields>
176775        </register>
176776        <register>
176777          <name>CAU_DIRECT1</name>
176778          <description>Direct access register 1</description>
176779          <addressOffset>0x4</addressOffset>
176780          <size>32</size>
176781          <access>write-only</access>
176782          <resetValue>0</resetValue>
176783          <resetMask>0xFFFFFFFF</resetMask>
176784          <fields>
176785            <field>
176786              <name>CAU_DIRECT1</name>
176787              <description>Direct register 1</description>
176788              <bitOffset>0</bitOffset>
176789              <bitWidth>32</bitWidth>
176790              <access>write-only</access>
176791            </field>
176792          </fields>
176793        </register>
176794        <register>
176795          <name>CAU_DIRECT2</name>
176796          <description>Direct access register 2</description>
176797          <addressOffset>0x8</addressOffset>
176798          <size>32</size>
176799          <access>write-only</access>
176800          <resetValue>0</resetValue>
176801          <resetMask>0xFFFFFFFF</resetMask>
176802          <fields>
176803            <field>
176804              <name>CAU_DIRECT2</name>
176805              <description>Direct register 2</description>
176806              <bitOffset>0</bitOffset>
176807              <bitWidth>32</bitWidth>
176808              <access>write-only</access>
176809            </field>
176810          </fields>
176811        </register>
176812        <register>
176813          <name>CAU_DIRECT3</name>
176814          <description>Direct access register 3</description>
176815          <addressOffset>0xC</addressOffset>
176816          <size>32</size>
176817          <access>write-only</access>
176818          <resetValue>0</resetValue>
176819          <resetMask>0xFFFFFFFF</resetMask>
176820          <fields>
176821            <field>
176822              <name>CAU_DIRECT3</name>
176823              <description>Direct register 3</description>
176824              <bitOffset>0</bitOffset>
176825              <bitWidth>32</bitWidth>
176826              <access>write-only</access>
176827            </field>
176828          </fields>
176829        </register>
176830        <register>
176831          <name>CAU_DIRECT4</name>
176832          <description>Direct access register 4</description>
176833          <addressOffset>0x10</addressOffset>
176834          <size>32</size>
176835          <access>write-only</access>
176836          <resetValue>0</resetValue>
176837          <resetMask>0xFFFFFFFF</resetMask>
176838          <fields>
176839            <field>
176840              <name>CAU_DIRECT4</name>
176841              <description>Direct register 4</description>
176842              <bitOffset>0</bitOffset>
176843              <bitWidth>32</bitWidth>
176844              <access>write-only</access>
176845            </field>
176846          </fields>
176847        </register>
176848        <register>
176849          <name>CAU_DIRECT5</name>
176850          <description>Direct access register 5</description>
176851          <addressOffset>0x14</addressOffset>
176852          <size>32</size>
176853          <access>write-only</access>
176854          <resetValue>0</resetValue>
176855          <resetMask>0xFFFFFFFF</resetMask>
176856          <fields>
176857            <field>
176858              <name>CAU_DIRECT5</name>
176859              <description>Direct register 5</description>
176860              <bitOffset>0</bitOffset>
176861              <bitWidth>32</bitWidth>
176862              <access>write-only</access>
176863            </field>
176864          </fields>
176865        </register>
176866        <register>
176867          <name>CAU_DIRECT6</name>
176868          <description>Direct access register 6</description>
176869          <addressOffset>0x18</addressOffset>
176870          <size>32</size>
176871          <access>write-only</access>
176872          <resetValue>0</resetValue>
176873          <resetMask>0xFFFFFFFF</resetMask>
176874          <fields>
176875            <field>
176876              <name>CAU_DIRECT6</name>
176877              <description>Direct register 6</description>
176878              <bitOffset>0</bitOffset>
176879              <bitWidth>32</bitWidth>
176880              <access>write-only</access>
176881            </field>
176882          </fields>
176883        </register>
176884        <register>
176885          <name>CAU_DIRECT7</name>
176886          <description>Direct access register 7</description>
176887          <addressOffset>0x1C</addressOffset>
176888          <size>32</size>
176889          <access>write-only</access>
176890          <resetValue>0</resetValue>
176891          <resetMask>0xFFFFFFFF</resetMask>
176892          <fields>
176893            <field>
176894              <name>CAU_DIRECT7</name>
176895              <description>Direct register 7</description>
176896              <bitOffset>0</bitOffset>
176897              <bitWidth>32</bitWidth>
176898              <access>write-only</access>
176899            </field>
176900          </fields>
176901        </register>
176902        <register>
176903          <name>CAU_DIRECT8</name>
176904          <description>Direct access register 8</description>
176905          <addressOffset>0x20</addressOffset>
176906          <size>32</size>
176907          <access>write-only</access>
176908          <resetValue>0</resetValue>
176909          <resetMask>0xFFFFFFFF</resetMask>
176910          <fields>
176911            <field>
176912              <name>CAU_DIRECT8</name>
176913              <description>Direct register 8</description>
176914              <bitOffset>0</bitOffset>
176915              <bitWidth>32</bitWidth>
176916              <access>write-only</access>
176917            </field>
176918          </fields>
176919        </register>
176920        <register>
176921          <name>CAU_DIRECT9</name>
176922          <description>Direct access register 9</description>
176923          <addressOffset>0x24</addressOffset>
176924          <size>32</size>
176925          <access>write-only</access>
176926          <resetValue>0</resetValue>
176927          <resetMask>0xFFFFFFFF</resetMask>
176928          <fields>
176929            <field>
176930              <name>CAU_DIRECT9</name>
176931              <description>Direct register 9</description>
176932              <bitOffset>0</bitOffset>
176933              <bitWidth>32</bitWidth>
176934              <access>write-only</access>
176935            </field>
176936          </fields>
176937        </register>
176938        <register>
176939          <name>CAU_DIRECT10</name>
176940          <description>Direct access register 10</description>
176941          <addressOffset>0x28</addressOffset>
176942          <size>32</size>
176943          <access>write-only</access>
176944          <resetValue>0</resetValue>
176945          <resetMask>0xFFFFFFFF</resetMask>
176946          <fields>
176947            <field>
176948              <name>CAU_DIRECT10</name>
176949              <description>Direct register 10</description>
176950              <bitOffset>0</bitOffset>
176951              <bitWidth>32</bitWidth>
176952              <access>write-only</access>
176953            </field>
176954          </fields>
176955        </register>
176956        <register>
176957          <name>CAU_DIRECT11</name>
176958          <description>Direct access register 11</description>
176959          <addressOffset>0x2C</addressOffset>
176960          <size>32</size>
176961          <access>write-only</access>
176962          <resetValue>0</resetValue>
176963          <resetMask>0xFFFFFFFF</resetMask>
176964          <fields>
176965            <field>
176966              <name>CAU_DIRECT11</name>
176967              <description>Direct register 11</description>
176968              <bitOffset>0</bitOffset>
176969              <bitWidth>32</bitWidth>
176970              <access>write-only</access>
176971            </field>
176972          </fields>
176973        </register>
176974        <register>
176975          <name>CAU_DIRECT12</name>
176976          <description>Direct access register 12</description>
176977          <addressOffset>0x30</addressOffset>
176978          <size>32</size>
176979          <access>write-only</access>
176980          <resetValue>0</resetValue>
176981          <resetMask>0xFFFFFFFF</resetMask>
176982          <fields>
176983            <field>
176984              <name>CAU_DIRECT12</name>
176985              <description>Direct register 12</description>
176986              <bitOffset>0</bitOffset>
176987              <bitWidth>32</bitWidth>
176988              <access>write-only</access>
176989            </field>
176990          </fields>
176991        </register>
176992        <register>
176993          <name>CAU_DIRECT13</name>
176994          <description>Direct access register 13</description>
176995          <addressOffset>0x34</addressOffset>
176996          <size>32</size>
176997          <access>write-only</access>
176998          <resetValue>0</resetValue>
176999          <resetMask>0xFFFFFFFF</resetMask>
177000          <fields>
177001            <field>
177002              <name>CAU_DIRECT13</name>
177003              <description>Direct register 13</description>
177004              <bitOffset>0</bitOffset>
177005              <bitWidth>32</bitWidth>
177006              <access>write-only</access>
177007            </field>
177008          </fields>
177009        </register>
177010        <register>
177011          <name>CAU_DIRECT14</name>
177012          <description>Direct access register 14</description>
177013          <addressOffset>0x38</addressOffset>
177014          <size>32</size>
177015          <access>write-only</access>
177016          <resetValue>0</resetValue>
177017          <resetMask>0xFFFFFFFF</resetMask>
177018          <fields>
177019            <field>
177020              <name>CAU_DIRECT14</name>
177021              <description>Direct register 14</description>
177022              <bitOffset>0</bitOffset>
177023              <bitWidth>32</bitWidth>
177024              <access>write-only</access>
177025            </field>
177026          </fields>
177027        </register>
177028        <register>
177029          <name>CAU_DIRECT15</name>
177030          <description>Direct access register 15</description>
177031          <addressOffset>0x3C</addressOffset>
177032          <size>32</size>
177033          <access>write-only</access>
177034          <resetValue>0</resetValue>
177035          <resetMask>0xFFFFFFFF</resetMask>
177036          <fields>
177037            <field>
177038              <name>CAU_DIRECT15</name>
177039              <description>Direct register 15</description>
177040              <bitOffset>0</bitOffset>
177041              <bitWidth>32</bitWidth>
177042              <access>write-only</access>
177043            </field>
177044          </fields>
177045        </register>
177046        <register>
177047          <name>CAU_LDR_CASR</name>
177048          <description>Status register - Load Register command</description>
177049          <addressOffset>0x840</addressOffset>
177050          <size>32</size>
177051          <access>write-only</access>
177052          <resetValue>0x20000000</resetValue>
177053          <resetMask>0xFFFFFFFF</resetMask>
177054          <fields>
177055            <field>
177056              <name>IC</name>
177057              <description>no description available</description>
177058              <bitOffset>0</bitOffset>
177059              <bitWidth>1</bitWidth>
177060              <access>write-only</access>
177061              <enumeratedValues>
177062                <enumeratedValue>
177063                  <name>0</name>
177064                  <description>No illegal commands issued</description>
177065                  <value>#0</value>
177066                </enumeratedValue>
177067                <enumeratedValue>
177068                  <name>1</name>
177069                  <description>Illegal command issued</description>
177070                  <value>#1</value>
177071                </enumeratedValue>
177072              </enumeratedValues>
177073            </field>
177074            <field>
177075              <name>DPE</name>
177076              <description>no description available</description>
177077              <bitOffset>1</bitOffset>
177078              <bitWidth>1</bitWidth>
177079              <access>write-only</access>
177080              <enumeratedValues>
177081                <enumeratedValue>
177082                  <name>0</name>
177083                  <description>No error detected</description>
177084                  <value>#0</value>
177085                </enumeratedValue>
177086                <enumeratedValue>
177087                  <name>1</name>
177088                  <description>DES key parity error detected</description>
177089                  <value>#1</value>
177090                </enumeratedValue>
177091              </enumeratedValues>
177092            </field>
177093            <field>
177094              <name>VER</name>
177095              <description>CAU version</description>
177096              <bitOffset>28</bitOffset>
177097              <bitWidth>4</bitWidth>
177098              <access>write-only</access>
177099              <enumeratedValues>
177100                <enumeratedValue>
177101                  <name>0001</name>
177102                  <description>Initial CAU version</description>
177103                  <value>#0001</value>
177104                </enumeratedValue>
177105                <enumeratedValue>
177106                  <name>0010</name>
177107                  <description>Second version, added support for SHA-256 algorithm.(This is the value on this device)</description>
177108                  <value>#0010</value>
177109                </enumeratedValue>
177110              </enumeratedValues>
177111            </field>
177112          </fields>
177113        </register>
177114        <register>
177115          <name>CAU_LDR_CAA</name>
177116          <description>Accumulator register - Load Register command</description>
177117          <addressOffset>0x844</addressOffset>
177118          <size>32</size>
177119          <access>write-only</access>
177120          <resetValue>0</resetValue>
177121          <resetMask>0xFFFFFFFF</resetMask>
177122          <fields>
177123            <field>
177124              <name>ACC</name>
177125              <description>ACC</description>
177126              <bitOffset>0</bitOffset>
177127              <bitWidth>32</bitWidth>
177128              <access>write-only</access>
177129            </field>
177130          </fields>
177131        </register>
177132        <register>
177133          <name>CAU_LDR_CA0</name>
177134          <description>General Purpose Register 0 - Load Register command</description>
177135          <addressOffset>0x848</addressOffset>
177136          <size>32</size>
177137          <access>write-only</access>
177138          <resetValue>0</resetValue>
177139          <resetMask>0xFFFFFFFF</resetMask>
177140          <fields>
177141            <field>
177142              <name>CA0</name>
177143              <description>CA0</description>
177144              <bitOffset>0</bitOffset>
177145              <bitWidth>32</bitWidth>
177146              <access>write-only</access>
177147            </field>
177148          </fields>
177149        </register>
177150        <register>
177151          <name>CAU_LDR_CA1</name>
177152          <description>General Purpose Register 1 - Load Register command</description>
177153          <addressOffset>0x84C</addressOffset>
177154          <size>32</size>
177155          <access>write-only</access>
177156          <resetValue>0</resetValue>
177157          <resetMask>0xFFFFFFFF</resetMask>
177158          <fields>
177159            <field>
177160              <name>CA1</name>
177161              <description>CA1</description>
177162              <bitOffset>0</bitOffset>
177163              <bitWidth>32</bitWidth>
177164              <access>write-only</access>
177165            </field>
177166          </fields>
177167        </register>
177168        <register>
177169          <name>CAU_LDR_CA2</name>
177170          <description>General Purpose Register 2 - Load Register command</description>
177171          <addressOffset>0x850</addressOffset>
177172          <size>32</size>
177173          <access>write-only</access>
177174          <resetValue>0</resetValue>
177175          <resetMask>0xFFFFFFFF</resetMask>
177176          <fields>
177177            <field>
177178              <name>CA2</name>
177179              <description>CA2</description>
177180              <bitOffset>0</bitOffset>
177181              <bitWidth>32</bitWidth>
177182              <access>write-only</access>
177183            </field>
177184          </fields>
177185        </register>
177186        <register>
177187          <name>CAU_LDR_CA3</name>
177188          <description>General Purpose Register 3 - Load Register command</description>
177189          <addressOffset>0x854</addressOffset>
177190          <size>32</size>
177191          <access>write-only</access>
177192          <resetValue>0</resetValue>
177193          <resetMask>0xFFFFFFFF</resetMask>
177194          <fields>
177195            <field>
177196              <name>CA3</name>
177197              <description>CA3</description>
177198              <bitOffset>0</bitOffset>
177199              <bitWidth>32</bitWidth>
177200              <access>write-only</access>
177201            </field>
177202          </fields>
177203        </register>
177204        <register>
177205          <name>CAU_LDR_CA4</name>
177206          <description>General Purpose Register 4 - Load Register command</description>
177207          <addressOffset>0x858</addressOffset>
177208          <size>32</size>
177209          <access>write-only</access>
177210          <resetValue>0</resetValue>
177211          <resetMask>0xFFFFFFFF</resetMask>
177212          <fields>
177213            <field>
177214              <name>CA4</name>
177215              <description>CA4</description>
177216              <bitOffset>0</bitOffset>
177217              <bitWidth>32</bitWidth>
177218              <access>write-only</access>
177219            </field>
177220          </fields>
177221        </register>
177222        <register>
177223          <name>CAU_LDR_CA5</name>
177224          <description>General Purpose Register 5 - Load Register command</description>
177225          <addressOffset>0x85C</addressOffset>
177226          <size>32</size>
177227          <access>write-only</access>
177228          <resetValue>0</resetValue>
177229          <resetMask>0xFFFFFFFF</resetMask>
177230          <fields>
177231            <field>
177232              <name>CA5</name>
177233              <description>CA5</description>
177234              <bitOffset>0</bitOffset>
177235              <bitWidth>32</bitWidth>
177236              <access>write-only</access>
177237            </field>
177238          </fields>
177239        </register>
177240        <register>
177241          <name>CAU_LDR_CA6</name>
177242          <description>General Purpose Register 6 - Load Register command</description>
177243          <addressOffset>0x860</addressOffset>
177244          <size>32</size>
177245          <access>write-only</access>
177246          <resetValue>0</resetValue>
177247          <resetMask>0xFFFFFFFF</resetMask>
177248          <fields>
177249            <field>
177250              <name>CA6</name>
177251              <description>CA6</description>
177252              <bitOffset>0</bitOffset>
177253              <bitWidth>32</bitWidth>
177254              <access>write-only</access>
177255            </field>
177256          </fields>
177257        </register>
177258        <register>
177259          <name>CAU_LDR_CA7</name>
177260          <description>General Purpose Register 7 - Load Register command</description>
177261          <addressOffset>0x864</addressOffset>
177262          <size>32</size>
177263          <access>write-only</access>
177264          <resetValue>0</resetValue>
177265          <resetMask>0xFFFFFFFF</resetMask>
177266          <fields>
177267            <field>
177268              <name>CA7</name>
177269              <description>CA7</description>
177270              <bitOffset>0</bitOffset>
177271              <bitWidth>32</bitWidth>
177272              <access>write-only</access>
177273            </field>
177274          </fields>
177275        </register>
177276        <register>
177277          <name>CAU_LDR_CA8</name>
177278          <description>General Purpose Register 8 - Load Register command</description>
177279          <addressOffset>0x868</addressOffset>
177280          <size>32</size>
177281          <access>write-only</access>
177282          <resetValue>0</resetValue>
177283          <resetMask>0xFFFFFFFF</resetMask>
177284          <fields>
177285            <field>
177286              <name>CA8</name>
177287              <description>CA8</description>
177288              <bitOffset>0</bitOffset>
177289              <bitWidth>32</bitWidth>
177290              <access>write-only</access>
177291            </field>
177292          </fields>
177293        </register>
177294        <register>
177295          <name>CAU_STR_CASR</name>
177296          <description>Status register - Store Register command</description>
177297          <addressOffset>0x880</addressOffset>
177298          <size>32</size>
177299          <access>read-only</access>
177300          <resetValue>0x20000000</resetValue>
177301          <resetMask>0xFFFFFFFF</resetMask>
177302          <fields>
177303            <field>
177304              <name>IC</name>
177305              <description>no description available</description>
177306              <bitOffset>0</bitOffset>
177307              <bitWidth>1</bitWidth>
177308              <access>read-only</access>
177309              <enumeratedValues>
177310                <enumeratedValue>
177311                  <name>0</name>
177312                  <description>No illegal commands issued</description>
177313                  <value>#0</value>
177314                </enumeratedValue>
177315                <enumeratedValue>
177316                  <name>1</name>
177317                  <description>Illegal command issued</description>
177318                  <value>#1</value>
177319                </enumeratedValue>
177320              </enumeratedValues>
177321            </field>
177322            <field>
177323              <name>DPE</name>
177324              <description>no description available</description>
177325              <bitOffset>1</bitOffset>
177326              <bitWidth>1</bitWidth>
177327              <access>read-only</access>
177328              <enumeratedValues>
177329                <enumeratedValue>
177330                  <name>0</name>
177331                  <description>No error detected</description>
177332                  <value>#0</value>
177333                </enumeratedValue>
177334                <enumeratedValue>
177335                  <name>1</name>
177336                  <description>DES key parity error detected</description>
177337                  <value>#1</value>
177338                </enumeratedValue>
177339              </enumeratedValues>
177340            </field>
177341            <field>
177342              <name>VER</name>
177343              <description>CAU version</description>
177344              <bitOffset>28</bitOffset>
177345              <bitWidth>4</bitWidth>
177346              <access>read-only</access>
177347              <enumeratedValues>
177348                <enumeratedValue>
177349                  <name>0001</name>
177350                  <description>Initial CAU version</description>
177351                  <value>#0001</value>
177352                </enumeratedValue>
177353                <enumeratedValue>
177354                  <name>0010</name>
177355                  <description>Second version, added support for SHA-256 algorithm.(This is the value on this device)</description>
177356                  <value>#0010</value>
177357                </enumeratedValue>
177358              </enumeratedValues>
177359            </field>
177360          </fields>
177361        </register>
177362        <register>
177363          <name>CAU_STR_CAA</name>
177364          <description>Accumulator register - Store Register command</description>
177365          <addressOffset>0x884</addressOffset>
177366          <size>32</size>
177367          <access>read-only</access>
177368          <resetValue>0</resetValue>
177369          <resetMask>0xFFFFFFFF</resetMask>
177370          <fields>
177371            <field>
177372              <name>ACC</name>
177373              <description>ACC</description>
177374              <bitOffset>0</bitOffset>
177375              <bitWidth>32</bitWidth>
177376              <access>read-only</access>
177377            </field>
177378          </fields>
177379        </register>
177380        <register>
177381          <name>CAU_STR_CA0</name>
177382          <description>General Purpose Register 0 - Store Register command</description>
177383          <addressOffset>0x888</addressOffset>
177384          <size>32</size>
177385          <access>read-only</access>
177386          <resetValue>0</resetValue>
177387          <resetMask>0xFFFFFFFF</resetMask>
177388          <fields>
177389            <field>
177390              <name>CA0</name>
177391              <description>CA0</description>
177392              <bitOffset>0</bitOffset>
177393              <bitWidth>32</bitWidth>
177394              <access>read-only</access>
177395            </field>
177396          </fields>
177397        </register>
177398        <register>
177399          <name>CAU_STR_CA1</name>
177400          <description>General Purpose Register 1 - Store Register command</description>
177401          <addressOffset>0x88C</addressOffset>
177402          <size>32</size>
177403          <access>read-only</access>
177404          <resetValue>0</resetValue>
177405          <resetMask>0xFFFFFFFF</resetMask>
177406          <fields>
177407            <field>
177408              <name>CA1</name>
177409              <description>CA1</description>
177410              <bitOffset>0</bitOffset>
177411              <bitWidth>32</bitWidth>
177412              <access>read-only</access>
177413            </field>
177414          </fields>
177415        </register>
177416        <register>
177417          <name>CAU_STR_CA2</name>
177418          <description>General Purpose Register 2 - Store Register command</description>
177419          <addressOffset>0x890</addressOffset>
177420          <size>32</size>
177421          <access>read-only</access>
177422          <resetValue>0</resetValue>
177423          <resetMask>0xFFFFFFFF</resetMask>
177424          <fields>
177425            <field>
177426              <name>CA2</name>
177427              <description>CA2</description>
177428              <bitOffset>0</bitOffset>
177429              <bitWidth>32</bitWidth>
177430              <access>read-only</access>
177431            </field>
177432          </fields>
177433        </register>
177434        <register>
177435          <name>CAU_STR_CA3</name>
177436          <description>General Purpose Register 3 - Store Register command</description>
177437          <addressOffset>0x894</addressOffset>
177438          <size>32</size>
177439          <access>read-only</access>
177440          <resetValue>0</resetValue>
177441          <resetMask>0xFFFFFFFF</resetMask>
177442          <fields>
177443            <field>
177444              <name>CA3</name>
177445              <description>CA3</description>
177446              <bitOffset>0</bitOffset>
177447              <bitWidth>32</bitWidth>
177448              <access>read-only</access>
177449            </field>
177450          </fields>
177451        </register>
177452        <register>
177453          <name>CAU_STR_CA4</name>
177454          <description>General Purpose Register 4 - Store Register command</description>
177455          <addressOffset>0x898</addressOffset>
177456          <size>32</size>
177457          <access>read-only</access>
177458          <resetValue>0</resetValue>
177459          <resetMask>0xFFFFFFFF</resetMask>
177460          <fields>
177461            <field>
177462              <name>CA4</name>
177463              <description>CA4</description>
177464              <bitOffset>0</bitOffset>
177465              <bitWidth>32</bitWidth>
177466              <access>read-only</access>
177467            </field>
177468          </fields>
177469        </register>
177470        <register>
177471          <name>CAU_STR_CA5</name>
177472          <description>General Purpose Register 5 - Store Register command</description>
177473          <addressOffset>0x89C</addressOffset>
177474          <size>32</size>
177475          <access>read-only</access>
177476          <resetValue>0</resetValue>
177477          <resetMask>0xFFFFFFFF</resetMask>
177478          <fields>
177479            <field>
177480              <name>CA5</name>
177481              <description>CA5</description>
177482              <bitOffset>0</bitOffset>
177483              <bitWidth>32</bitWidth>
177484              <access>read-only</access>
177485            </field>
177486          </fields>
177487        </register>
177488        <register>
177489          <name>CAU_STR_CA6</name>
177490          <description>General Purpose Register 6 - Store Register command</description>
177491          <addressOffset>0x8A0</addressOffset>
177492          <size>32</size>
177493          <access>read-only</access>
177494          <resetValue>0</resetValue>
177495          <resetMask>0xFFFFFFFF</resetMask>
177496          <fields>
177497            <field>
177498              <name>CA6</name>
177499              <description>CA6</description>
177500              <bitOffset>0</bitOffset>
177501              <bitWidth>32</bitWidth>
177502              <access>read-only</access>
177503            </field>
177504          </fields>
177505        </register>
177506        <register>
177507          <name>CAU_STR_CA7</name>
177508          <description>General Purpose Register 7 - Store Register command</description>
177509          <addressOffset>0x8A4</addressOffset>
177510          <size>32</size>
177511          <access>read-only</access>
177512          <resetValue>0</resetValue>
177513          <resetMask>0xFFFFFFFF</resetMask>
177514          <fields>
177515            <field>
177516              <name>CA7</name>
177517              <description>CA7</description>
177518              <bitOffset>0</bitOffset>
177519              <bitWidth>32</bitWidth>
177520              <access>read-only</access>
177521            </field>
177522          </fields>
177523        </register>
177524        <register>
177525          <name>CAU_STR_CA8</name>
177526          <description>General Purpose Register 8 - Store Register command</description>
177527          <addressOffset>0x8A8</addressOffset>
177528          <size>32</size>
177529          <access>read-only</access>
177530          <resetValue>0</resetValue>
177531          <resetMask>0xFFFFFFFF</resetMask>
177532          <fields>
177533            <field>
177534              <name>CA8</name>
177535              <description>CA8</description>
177536              <bitOffset>0</bitOffset>
177537              <bitWidth>32</bitWidth>
177538              <access>read-only</access>
177539            </field>
177540          </fields>
177541        </register>
177542        <register>
177543          <name>CAU_ADR_CASR</name>
177544          <description>Status register - Add Register command</description>
177545          <addressOffset>0x8C0</addressOffset>
177546          <size>32</size>
177547          <access>write-only</access>
177548          <resetValue>0x20000000</resetValue>
177549          <resetMask>0xFFFFFFFF</resetMask>
177550          <fields>
177551            <field>
177552              <name>IC</name>
177553              <description>no description available</description>
177554              <bitOffset>0</bitOffset>
177555              <bitWidth>1</bitWidth>
177556              <access>write-only</access>
177557              <enumeratedValues>
177558                <enumeratedValue>
177559                  <name>0</name>
177560                  <description>No illegal commands issued</description>
177561                  <value>#0</value>
177562                </enumeratedValue>
177563                <enumeratedValue>
177564                  <name>1</name>
177565                  <description>Illegal command issued</description>
177566                  <value>#1</value>
177567                </enumeratedValue>
177568              </enumeratedValues>
177569            </field>
177570            <field>
177571              <name>DPE</name>
177572              <description>no description available</description>
177573              <bitOffset>1</bitOffset>
177574              <bitWidth>1</bitWidth>
177575              <access>write-only</access>
177576              <enumeratedValues>
177577                <enumeratedValue>
177578                  <name>0</name>
177579                  <description>No error detected</description>
177580                  <value>#0</value>
177581                </enumeratedValue>
177582                <enumeratedValue>
177583                  <name>1</name>
177584                  <description>DES key parity error detected</description>
177585                  <value>#1</value>
177586                </enumeratedValue>
177587              </enumeratedValues>
177588            </field>
177589            <field>
177590              <name>VER</name>
177591              <description>CAU version</description>
177592              <bitOffset>28</bitOffset>
177593              <bitWidth>4</bitWidth>
177594              <access>write-only</access>
177595              <enumeratedValues>
177596                <enumeratedValue>
177597                  <name>0001</name>
177598                  <description>Initial CAU version</description>
177599                  <value>#0001</value>
177600                </enumeratedValue>
177601                <enumeratedValue>
177602                  <name>0010</name>
177603                  <description>Second version, added support for SHA-256 algorithm.(This is the value on this device)</description>
177604                  <value>#0010</value>
177605                </enumeratedValue>
177606              </enumeratedValues>
177607            </field>
177608          </fields>
177609        </register>
177610        <register>
177611          <name>CAU_ADR_CAA</name>
177612          <description>Accumulator register - Add to register command</description>
177613          <addressOffset>0x8C4</addressOffset>
177614          <size>32</size>
177615          <access>write-only</access>
177616          <resetValue>0</resetValue>
177617          <resetMask>0xFFFFFFFF</resetMask>
177618          <fields>
177619            <field>
177620              <name>ACC</name>
177621              <description>ACC</description>
177622              <bitOffset>0</bitOffset>
177623              <bitWidth>32</bitWidth>
177624              <access>write-only</access>
177625            </field>
177626          </fields>
177627        </register>
177628        <register>
177629          <name>CAU_ADR_CA0</name>
177630          <description>General Purpose Register 0 - Add to register command</description>
177631          <addressOffset>0x8C8</addressOffset>
177632          <size>32</size>
177633          <access>write-only</access>
177634          <resetValue>0</resetValue>
177635          <resetMask>0xFFFFFFFF</resetMask>
177636          <fields>
177637            <field>
177638              <name>CA0</name>
177639              <description>CA0</description>
177640              <bitOffset>0</bitOffset>
177641              <bitWidth>32</bitWidth>
177642              <access>write-only</access>
177643            </field>
177644          </fields>
177645        </register>
177646        <register>
177647          <name>CAU_ADR_CA1</name>
177648          <description>General Purpose Register 1 - Add to register command</description>
177649          <addressOffset>0x8CC</addressOffset>
177650          <size>32</size>
177651          <access>write-only</access>
177652          <resetValue>0</resetValue>
177653          <resetMask>0xFFFFFFFF</resetMask>
177654          <fields>
177655            <field>
177656              <name>CA1</name>
177657              <description>CA1</description>
177658              <bitOffset>0</bitOffset>
177659              <bitWidth>32</bitWidth>
177660              <access>write-only</access>
177661            </field>
177662          </fields>
177663        </register>
177664        <register>
177665          <name>CAU_ADR_CA2</name>
177666          <description>General Purpose Register 2 - Add to register command</description>
177667          <addressOffset>0x8D0</addressOffset>
177668          <size>32</size>
177669          <access>write-only</access>
177670          <resetValue>0</resetValue>
177671          <resetMask>0xFFFFFFFF</resetMask>
177672          <fields>
177673            <field>
177674              <name>CA2</name>
177675              <description>CA2</description>
177676              <bitOffset>0</bitOffset>
177677              <bitWidth>32</bitWidth>
177678              <access>write-only</access>
177679            </field>
177680          </fields>
177681        </register>
177682        <register>
177683          <name>CAU_ADR_CA3</name>
177684          <description>General Purpose Register 3 - Add to register command</description>
177685          <addressOffset>0x8D4</addressOffset>
177686          <size>32</size>
177687          <access>write-only</access>
177688          <resetValue>0</resetValue>
177689          <resetMask>0xFFFFFFFF</resetMask>
177690          <fields>
177691            <field>
177692              <name>CA3</name>
177693              <description>CA3</description>
177694              <bitOffset>0</bitOffset>
177695              <bitWidth>32</bitWidth>
177696              <access>write-only</access>
177697            </field>
177698          </fields>
177699        </register>
177700        <register>
177701          <name>CAU_ADR_CA4</name>
177702          <description>General Purpose Register 4 - Add to register command</description>
177703          <addressOffset>0x8D8</addressOffset>
177704          <size>32</size>
177705          <access>write-only</access>
177706          <resetValue>0</resetValue>
177707          <resetMask>0xFFFFFFFF</resetMask>
177708          <fields>
177709            <field>
177710              <name>CA4</name>
177711              <description>CA4</description>
177712              <bitOffset>0</bitOffset>
177713              <bitWidth>32</bitWidth>
177714              <access>write-only</access>
177715            </field>
177716          </fields>
177717        </register>
177718        <register>
177719          <name>CAU_ADR_CA5</name>
177720          <description>General Purpose Register 5 - Add to register command</description>
177721          <addressOffset>0x8DC</addressOffset>
177722          <size>32</size>
177723          <access>write-only</access>
177724          <resetValue>0</resetValue>
177725          <resetMask>0xFFFFFFFF</resetMask>
177726          <fields>
177727            <field>
177728              <name>CA5</name>
177729              <description>CA5</description>
177730              <bitOffset>0</bitOffset>
177731              <bitWidth>32</bitWidth>
177732              <access>write-only</access>
177733            </field>
177734          </fields>
177735        </register>
177736        <register>
177737          <name>CAU_ADR_CA6</name>
177738          <description>General Purpose Register 6 - Add to register command</description>
177739          <addressOffset>0x8E0</addressOffset>
177740          <size>32</size>
177741          <access>write-only</access>
177742          <resetValue>0</resetValue>
177743          <resetMask>0xFFFFFFFF</resetMask>
177744          <fields>
177745            <field>
177746              <name>CA6</name>
177747              <description>CA6</description>
177748              <bitOffset>0</bitOffset>
177749              <bitWidth>32</bitWidth>
177750              <access>write-only</access>
177751            </field>
177752          </fields>
177753        </register>
177754        <register>
177755          <name>CAU_ADR_CA7</name>
177756          <description>General Purpose Register 7 - Add to register command</description>
177757          <addressOffset>0x8E4</addressOffset>
177758          <size>32</size>
177759          <access>write-only</access>
177760          <resetValue>0</resetValue>
177761          <resetMask>0xFFFFFFFF</resetMask>
177762          <fields>
177763            <field>
177764              <name>CA7</name>
177765              <description>CA7</description>
177766              <bitOffset>0</bitOffset>
177767              <bitWidth>32</bitWidth>
177768              <access>write-only</access>
177769            </field>
177770          </fields>
177771        </register>
177772        <register>
177773          <name>CAU_ADR_CA8</name>
177774          <description>General Purpose Register 8 - Add to register command</description>
177775          <addressOffset>0x8E8</addressOffset>
177776          <size>32</size>
177777          <access>write-only</access>
177778          <resetValue>0</resetValue>
177779          <resetMask>0xFFFFFFFF</resetMask>
177780          <fields>
177781            <field>
177782              <name>CA8</name>
177783              <description>CA8</description>
177784              <bitOffset>0</bitOffset>
177785              <bitWidth>32</bitWidth>
177786              <access>write-only</access>
177787            </field>
177788          </fields>
177789        </register>
177790        <register>
177791          <name>CAU_RADR_CASR</name>
177792          <description>Status register - Reverse and Add to Register command</description>
177793          <addressOffset>0x900</addressOffset>
177794          <size>32</size>
177795          <access>write-only</access>
177796          <resetValue>0x20000000</resetValue>
177797          <resetMask>0xFFFFFFFF</resetMask>
177798          <fields>
177799            <field>
177800              <name>IC</name>
177801              <description>no description available</description>
177802              <bitOffset>0</bitOffset>
177803              <bitWidth>1</bitWidth>
177804              <access>write-only</access>
177805              <enumeratedValues>
177806                <enumeratedValue>
177807                  <name>0</name>
177808                  <description>No illegal commands issued</description>
177809                  <value>#0</value>
177810                </enumeratedValue>
177811                <enumeratedValue>
177812                  <name>1</name>
177813                  <description>Illegal command issued</description>
177814                  <value>#1</value>
177815                </enumeratedValue>
177816              </enumeratedValues>
177817            </field>
177818            <field>
177819              <name>DPE</name>
177820              <description>no description available</description>
177821              <bitOffset>1</bitOffset>
177822              <bitWidth>1</bitWidth>
177823              <access>write-only</access>
177824              <enumeratedValues>
177825                <enumeratedValue>
177826                  <name>0</name>
177827                  <description>No error detected</description>
177828                  <value>#0</value>
177829                </enumeratedValue>
177830                <enumeratedValue>
177831                  <name>1</name>
177832                  <description>DES key parity error detected</description>
177833                  <value>#1</value>
177834                </enumeratedValue>
177835              </enumeratedValues>
177836            </field>
177837            <field>
177838              <name>VER</name>
177839              <description>CAU version</description>
177840              <bitOffset>28</bitOffset>
177841              <bitWidth>4</bitWidth>
177842              <access>write-only</access>
177843              <enumeratedValues>
177844                <enumeratedValue>
177845                  <name>0001</name>
177846                  <description>Initial CAU version</description>
177847                  <value>#0001</value>
177848                </enumeratedValue>
177849                <enumeratedValue>
177850                  <name>0010</name>
177851                  <description>Second version, added support for SHA-256 algorithm.(This is the value on this device)</description>
177852                  <value>#0010</value>
177853                </enumeratedValue>
177854              </enumeratedValues>
177855            </field>
177856          </fields>
177857        </register>
177858        <register>
177859          <name>CAU_RADR_CAA</name>
177860          <description>Accumulator register - Reverse and Add to Register command</description>
177861          <addressOffset>0x904</addressOffset>
177862          <size>32</size>
177863          <access>write-only</access>
177864          <resetValue>0</resetValue>
177865          <resetMask>0xFFFFFFFF</resetMask>
177866          <fields>
177867            <field>
177868              <name>ACC</name>
177869              <description>ACC</description>
177870              <bitOffset>0</bitOffset>
177871              <bitWidth>32</bitWidth>
177872              <access>write-only</access>
177873            </field>
177874          </fields>
177875        </register>
177876        <register>
177877          <name>CAU_RADR_CA0</name>
177878          <description>General Purpose Register 0 - Reverse and Add to Register command</description>
177879          <addressOffset>0x908</addressOffset>
177880          <size>32</size>
177881          <access>write-only</access>
177882          <resetValue>0</resetValue>
177883          <resetMask>0xFFFFFFFF</resetMask>
177884          <fields>
177885            <field>
177886              <name>CA0</name>
177887              <description>CA0</description>
177888              <bitOffset>0</bitOffset>
177889              <bitWidth>32</bitWidth>
177890              <access>write-only</access>
177891            </field>
177892          </fields>
177893        </register>
177894        <register>
177895          <name>CAU_RADR_CA1</name>
177896          <description>General Purpose Register 1 - Reverse and Add to Register command</description>
177897          <addressOffset>0x90C</addressOffset>
177898          <size>32</size>
177899          <access>write-only</access>
177900          <resetValue>0</resetValue>
177901          <resetMask>0xFFFFFFFF</resetMask>
177902          <fields>
177903            <field>
177904              <name>CA1</name>
177905              <description>CA1</description>
177906              <bitOffset>0</bitOffset>
177907              <bitWidth>32</bitWidth>
177908              <access>write-only</access>
177909            </field>
177910          </fields>
177911        </register>
177912        <register>
177913          <name>CAU_RADR_CA2</name>
177914          <description>General Purpose Register 2 - Reverse and Add to Register command</description>
177915          <addressOffset>0x910</addressOffset>
177916          <size>32</size>
177917          <access>write-only</access>
177918          <resetValue>0</resetValue>
177919          <resetMask>0xFFFFFFFF</resetMask>
177920          <fields>
177921            <field>
177922              <name>CA2</name>
177923              <description>CA2</description>
177924              <bitOffset>0</bitOffset>
177925              <bitWidth>32</bitWidth>
177926              <access>write-only</access>
177927            </field>
177928          </fields>
177929        </register>
177930        <register>
177931          <name>CAU_RADR_CA3</name>
177932          <description>General Purpose Register 3 - Reverse and Add to Register command</description>
177933          <addressOffset>0x914</addressOffset>
177934          <size>32</size>
177935          <access>write-only</access>
177936          <resetValue>0</resetValue>
177937          <resetMask>0xFFFFFFFF</resetMask>
177938          <fields>
177939            <field>
177940              <name>CA3</name>
177941              <description>CA3</description>
177942              <bitOffset>0</bitOffset>
177943              <bitWidth>32</bitWidth>
177944              <access>write-only</access>
177945            </field>
177946          </fields>
177947        </register>
177948        <register>
177949          <name>CAU_RADR_CA4</name>
177950          <description>General Purpose Register 4 - Reverse and Add to Register command</description>
177951          <addressOffset>0x918</addressOffset>
177952          <size>32</size>
177953          <access>write-only</access>
177954          <resetValue>0</resetValue>
177955          <resetMask>0xFFFFFFFF</resetMask>
177956          <fields>
177957            <field>
177958              <name>CA4</name>
177959              <description>CA4</description>
177960              <bitOffset>0</bitOffset>
177961              <bitWidth>32</bitWidth>
177962              <access>write-only</access>
177963            </field>
177964          </fields>
177965        </register>
177966        <register>
177967          <name>CAU_RADR_CA5</name>
177968          <description>General Purpose Register 5 - Reverse and Add to Register command</description>
177969          <addressOffset>0x91C</addressOffset>
177970          <size>32</size>
177971          <access>write-only</access>
177972          <resetValue>0</resetValue>
177973          <resetMask>0xFFFFFFFF</resetMask>
177974          <fields>
177975            <field>
177976              <name>CA5</name>
177977              <description>CA5</description>
177978              <bitOffset>0</bitOffset>
177979              <bitWidth>32</bitWidth>
177980              <access>write-only</access>
177981            </field>
177982          </fields>
177983        </register>
177984        <register>
177985          <name>CAU_RADR_CA6</name>
177986          <description>General Purpose Register 6 - Reverse and Add to Register command</description>
177987          <addressOffset>0x920</addressOffset>
177988          <size>32</size>
177989          <access>write-only</access>
177990          <resetValue>0</resetValue>
177991          <resetMask>0xFFFFFFFF</resetMask>
177992          <fields>
177993            <field>
177994              <name>CA6</name>
177995              <description>CA6</description>
177996              <bitOffset>0</bitOffset>
177997              <bitWidth>32</bitWidth>
177998              <access>write-only</access>
177999            </field>
178000          </fields>
178001        </register>
178002        <register>
178003          <name>CAU_RADR_CA7</name>
178004          <description>General Purpose Register 7 - Reverse and Add to Register command</description>
178005          <addressOffset>0x924</addressOffset>
178006          <size>32</size>
178007          <access>write-only</access>
178008          <resetValue>0</resetValue>
178009          <resetMask>0xFFFFFFFF</resetMask>
178010          <fields>
178011            <field>
178012              <name>CA7</name>
178013              <description>CA7</description>
178014              <bitOffset>0</bitOffset>
178015              <bitWidth>32</bitWidth>
178016              <access>write-only</access>
178017            </field>
178018          </fields>
178019        </register>
178020        <register>
178021          <name>CAU_RADR_CA8</name>
178022          <description>General Purpose Register 8 - Reverse and Add to Register command</description>
178023          <addressOffset>0x928</addressOffset>
178024          <size>32</size>
178025          <access>write-only</access>
178026          <resetValue>0</resetValue>
178027          <resetMask>0xFFFFFFFF</resetMask>
178028          <fields>
178029            <field>
178030              <name>CA8</name>
178031              <description>CA8</description>
178032              <bitOffset>0</bitOffset>
178033              <bitWidth>32</bitWidth>
178034              <access>write-only</access>
178035            </field>
178036          </fields>
178037        </register>
178038        <register>
178039          <name>CAU_XOR_CASR</name>
178040          <description>Status register - Exclusive Or command</description>
178041          <addressOffset>0x980</addressOffset>
178042          <size>32</size>
178043          <access>write-only</access>
178044          <resetValue>0x20000000</resetValue>
178045          <resetMask>0xFFFFFFFF</resetMask>
178046          <fields>
178047            <field>
178048              <name>IC</name>
178049              <description>no description available</description>
178050              <bitOffset>0</bitOffset>
178051              <bitWidth>1</bitWidth>
178052              <access>write-only</access>
178053              <enumeratedValues>
178054                <enumeratedValue>
178055                  <name>0</name>
178056                  <description>No illegal commands issued</description>
178057                  <value>#0</value>
178058                </enumeratedValue>
178059                <enumeratedValue>
178060                  <name>1</name>
178061                  <description>Illegal command issued</description>
178062                  <value>#1</value>
178063                </enumeratedValue>
178064              </enumeratedValues>
178065            </field>
178066            <field>
178067              <name>DPE</name>
178068              <description>no description available</description>
178069              <bitOffset>1</bitOffset>
178070              <bitWidth>1</bitWidth>
178071              <access>write-only</access>
178072              <enumeratedValues>
178073                <enumeratedValue>
178074                  <name>0</name>
178075                  <description>No error detected</description>
178076                  <value>#0</value>
178077                </enumeratedValue>
178078                <enumeratedValue>
178079                  <name>1</name>
178080                  <description>DES key parity error detected</description>
178081                  <value>#1</value>
178082                </enumeratedValue>
178083              </enumeratedValues>
178084            </field>
178085            <field>
178086              <name>VER</name>
178087              <description>CAU version</description>
178088              <bitOffset>28</bitOffset>
178089              <bitWidth>4</bitWidth>
178090              <access>write-only</access>
178091              <enumeratedValues>
178092                <enumeratedValue>
178093                  <name>0001</name>
178094                  <description>Initial CAU version</description>
178095                  <value>#0001</value>
178096                </enumeratedValue>
178097                <enumeratedValue>
178098                  <name>0010</name>
178099                  <description>Second version, added support for SHA-256 algorithm.(This is the value on this device)</description>
178100                  <value>#0010</value>
178101                </enumeratedValue>
178102              </enumeratedValues>
178103            </field>
178104          </fields>
178105        </register>
178106        <register>
178107          <name>CAU_XOR_CAA</name>
178108          <description>Accumulator register - Exclusive Or command</description>
178109          <addressOffset>0x984</addressOffset>
178110          <size>32</size>
178111          <access>write-only</access>
178112          <resetValue>0</resetValue>
178113          <resetMask>0xFFFFFFFF</resetMask>
178114          <fields>
178115            <field>
178116              <name>ACC</name>
178117              <description>ACC</description>
178118              <bitOffset>0</bitOffset>
178119              <bitWidth>32</bitWidth>
178120              <access>write-only</access>
178121            </field>
178122          </fields>
178123        </register>
178124        <register>
178125          <name>CAU_XOR_CA0</name>
178126          <description>General Purpose Register 0 - Exclusive Or command</description>
178127          <addressOffset>0x988</addressOffset>
178128          <size>32</size>
178129          <access>write-only</access>
178130          <resetValue>0</resetValue>
178131          <resetMask>0xFFFFFFFF</resetMask>
178132          <fields>
178133            <field>
178134              <name>CA0</name>
178135              <description>CA0</description>
178136              <bitOffset>0</bitOffset>
178137              <bitWidth>32</bitWidth>
178138              <access>write-only</access>
178139            </field>
178140          </fields>
178141        </register>
178142        <register>
178143          <name>CAU_XOR_CA1</name>
178144          <description>General Purpose Register 1 - Exclusive Or command</description>
178145          <addressOffset>0x98C</addressOffset>
178146          <size>32</size>
178147          <access>write-only</access>
178148          <resetValue>0</resetValue>
178149          <resetMask>0xFFFFFFFF</resetMask>
178150          <fields>
178151            <field>
178152              <name>CA1</name>
178153              <description>CA1</description>
178154              <bitOffset>0</bitOffset>
178155              <bitWidth>32</bitWidth>
178156              <access>write-only</access>
178157            </field>
178158          </fields>
178159        </register>
178160        <register>
178161          <name>CAU_XOR_CA2</name>
178162          <description>General Purpose Register 2 - Exclusive Or command</description>
178163          <addressOffset>0x990</addressOffset>
178164          <size>32</size>
178165          <access>write-only</access>
178166          <resetValue>0</resetValue>
178167          <resetMask>0xFFFFFFFF</resetMask>
178168          <fields>
178169            <field>
178170              <name>CA2</name>
178171              <description>CA2</description>
178172              <bitOffset>0</bitOffset>
178173              <bitWidth>32</bitWidth>
178174              <access>write-only</access>
178175            </field>
178176          </fields>
178177        </register>
178178        <register>
178179          <name>CAU_XOR_CA3</name>
178180          <description>General Purpose Register 3 - Exclusive Or command</description>
178181          <addressOffset>0x994</addressOffset>
178182          <size>32</size>
178183          <access>write-only</access>
178184          <resetValue>0</resetValue>
178185          <resetMask>0xFFFFFFFF</resetMask>
178186          <fields>
178187            <field>
178188              <name>CA3</name>
178189              <description>CA3</description>
178190              <bitOffset>0</bitOffset>
178191              <bitWidth>32</bitWidth>
178192              <access>write-only</access>
178193            </field>
178194          </fields>
178195        </register>
178196        <register>
178197          <name>CAU_XOR_CA4</name>
178198          <description>General Purpose Register 4 - Exclusive Or command</description>
178199          <addressOffset>0x998</addressOffset>
178200          <size>32</size>
178201          <access>write-only</access>
178202          <resetValue>0</resetValue>
178203          <resetMask>0xFFFFFFFF</resetMask>
178204          <fields>
178205            <field>
178206              <name>CA4</name>
178207              <description>CA4</description>
178208              <bitOffset>0</bitOffset>
178209              <bitWidth>32</bitWidth>
178210              <access>write-only</access>
178211            </field>
178212          </fields>
178213        </register>
178214        <register>
178215          <name>CAU_XOR_CA5</name>
178216          <description>General Purpose Register 5 - Exclusive Or command</description>
178217          <addressOffset>0x99C</addressOffset>
178218          <size>32</size>
178219          <access>write-only</access>
178220          <resetValue>0</resetValue>
178221          <resetMask>0xFFFFFFFF</resetMask>
178222          <fields>
178223            <field>
178224              <name>CA5</name>
178225              <description>CA5</description>
178226              <bitOffset>0</bitOffset>
178227              <bitWidth>32</bitWidth>
178228              <access>write-only</access>
178229            </field>
178230          </fields>
178231        </register>
178232        <register>
178233          <name>CAU_XOR_CA6</name>
178234          <description>General Purpose Register 6 - Exclusive Or command</description>
178235          <addressOffset>0x9A0</addressOffset>
178236          <size>32</size>
178237          <access>write-only</access>
178238          <resetValue>0</resetValue>
178239          <resetMask>0xFFFFFFFF</resetMask>
178240          <fields>
178241            <field>
178242              <name>CA6</name>
178243              <description>CA6</description>
178244              <bitOffset>0</bitOffset>
178245              <bitWidth>32</bitWidth>
178246              <access>write-only</access>
178247            </field>
178248          </fields>
178249        </register>
178250        <register>
178251          <name>CAU_XOR_CA7</name>
178252          <description>General Purpose Register 7 - Exclusive Or command</description>
178253          <addressOffset>0x9A4</addressOffset>
178254          <size>32</size>
178255          <access>write-only</access>
178256          <resetValue>0</resetValue>
178257          <resetMask>0xFFFFFFFF</resetMask>
178258          <fields>
178259            <field>
178260              <name>CA7</name>
178261              <description>CA7</description>
178262              <bitOffset>0</bitOffset>
178263              <bitWidth>32</bitWidth>
178264              <access>write-only</access>
178265            </field>
178266          </fields>
178267        </register>
178268        <register>
178269          <name>CAU_XOR_CA8</name>
178270          <description>General Purpose Register 8 - Exclusive Or command</description>
178271          <addressOffset>0x9A8</addressOffset>
178272          <size>32</size>
178273          <access>write-only</access>
178274          <resetValue>0</resetValue>
178275          <resetMask>0xFFFFFFFF</resetMask>
178276          <fields>
178277            <field>
178278              <name>CA8</name>
178279              <description>CA8</description>
178280              <bitOffset>0</bitOffset>
178281              <bitWidth>32</bitWidth>
178282              <access>write-only</access>
178283            </field>
178284          </fields>
178285        </register>
178286        <register>
178287          <name>CAU_ROTL_CASR</name>
178288          <description>Status register - Rotate Left command</description>
178289          <addressOffset>0x9C0</addressOffset>
178290          <size>32</size>
178291          <access>write-only</access>
178292          <resetValue>0x20000000</resetValue>
178293          <resetMask>0xFFFFFFFF</resetMask>
178294          <fields>
178295            <field>
178296              <name>IC</name>
178297              <description>no description available</description>
178298              <bitOffset>0</bitOffset>
178299              <bitWidth>1</bitWidth>
178300              <access>write-only</access>
178301              <enumeratedValues>
178302                <enumeratedValue>
178303                  <name>0</name>
178304                  <description>No illegal commands issued</description>
178305                  <value>#0</value>
178306                </enumeratedValue>
178307                <enumeratedValue>
178308                  <name>1</name>
178309                  <description>Illegal command issued</description>
178310                  <value>#1</value>
178311                </enumeratedValue>
178312              </enumeratedValues>
178313            </field>
178314            <field>
178315              <name>DPE</name>
178316              <description>no description available</description>
178317              <bitOffset>1</bitOffset>
178318              <bitWidth>1</bitWidth>
178319              <access>write-only</access>
178320              <enumeratedValues>
178321                <enumeratedValue>
178322                  <name>0</name>
178323                  <description>No error detected</description>
178324                  <value>#0</value>
178325                </enumeratedValue>
178326                <enumeratedValue>
178327                  <name>1</name>
178328                  <description>DES key parity error detected</description>
178329                  <value>#1</value>
178330                </enumeratedValue>
178331              </enumeratedValues>
178332            </field>
178333            <field>
178334              <name>VER</name>
178335              <description>CAU version</description>
178336              <bitOffset>28</bitOffset>
178337              <bitWidth>4</bitWidth>
178338              <access>write-only</access>
178339              <enumeratedValues>
178340                <enumeratedValue>
178341                  <name>0001</name>
178342                  <description>Initial CAU version</description>
178343                  <value>#0001</value>
178344                </enumeratedValue>
178345                <enumeratedValue>
178346                  <name>0010</name>
178347                  <description>Second version, added support for SHA-256 algorithm.(This is the value on this device)</description>
178348                  <value>#0010</value>
178349                </enumeratedValue>
178350              </enumeratedValues>
178351            </field>
178352          </fields>
178353        </register>
178354        <register>
178355          <name>CAU_ROTL_CAA</name>
178356          <description>Accumulator register - Rotate Left command</description>
178357          <addressOffset>0x9C4</addressOffset>
178358          <size>32</size>
178359          <access>write-only</access>
178360          <resetValue>0</resetValue>
178361          <resetMask>0xFFFFFFFF</resetMask>
178362          <fields>
178363            <field>
178364              <name>ACC</name>
178365              <description>ACC</description>
178366              <bitOffset>0</bitOffset>
178367              <bitWidth>32</bitWidth>
178368              <access>write-only</access>
178369            </field>
178370          </fields>
178371        </register>
178372        <register>
178373          <name>CAU_ROTL_CA0</name>
178374          <description>General Purpose Register 0 - Rotate Left command</description>
178375          <addressOffset>0x9C8</addressOffset>
178376          <size>32</size>
178377          <access>write-only</access>
178378          <resetValue>0</resetValue>
178379          <resetMask>0xFFFFFFFF</resetMask>
178380          <fields>
178381            <field>
178382              <name>CA0</name>
178383              <description>CA0</description>
178384              <bitOffset>0</bitOffset>
178385              <bitWidth>32</bitWidth>
178386              <access>write-only</access>
178387            </field>
178388          </fields>
178389        </register>
178390        <register>
178391          <name>CAU_ROTL_CA1</name>
178392          <description>General Purpose Register 1 - Rotate Left command</description>
178393          <addressOffset>0x9CC</addressOffset>
178394          <size>32</size>
178395          <access>write-only</access>
178396          <resetValue>0</resetValue>
178397          <resetMask>0xFFFFFFFF</resetMask>
178398          <fields>
178399            <field>
178400              <name>CA1</name>
178401              <description>CA1</description>
178402              <bitOffset>0</bitOffset>
178403              <bitWidth>32</bitWidth>
178404              <access>write-only</access>
178405            </field>
178406          </fields>
178407        </register>
178408        <register>
178409          <name>CAU_ROTL_CA2</name>
178410          <description>General Purpose Register 2 - Rotate Left command</description>
178411          <addressOffset>0x9D0</addressOffset>
178412          <size>32</size>
178413          <access>write-only</access>
178414          <resetValue>0</resetValue>
178415          <resetMask>0xFFFFFFFF</resetMask>
178416          <fields>
178417            <field>
178418              <name>CA2</name>
178419              <description>CA2</description>
178420              <bitOffset>0</bitOffset>
178421              <bitWidth>32</bitWidth>
178422              <access>write-only</access>
178423            </field>
178424          </fields>
178425        </register>
178426        <register>
178427          <name>CAU_ROTL_CA3</name>
178428          <description>General Purpose Register 3 - Rotate Left command</description>
178429          <addressOffset>0x9D4</addressOffset>
178430          <size>32</size>
178431          <access>write-only</access>
178432          <resetValue>0</resetValue>
178433          <resetMask>0xFFFFFFFF</resetMask>
178434          <fields>
178435            <field>
178436              <name>CA3</name>
178437              <description>CA3</description>
178438              <bitOffset>0</bitOffset>
178439              <bitWidth>32</bitWidth>
178440              <access>write-only</access>
178441            </field>
178442          </fields>
178443        </register>
178444        <register>
178445          <name>CAU_ROTL_CA4</name>
178446          <description>General Purpose Register 4 - Rotate Left command</description>
178447          <addressOffset>0x9D8</addressOffset>
178448          <size>32</size>
178449          <access>write-only</access>
178450          <resetValue>0</resetValue>
178451          <resetMask>0xFFFFFFFF</resetMask>
178452          <fields>
178453            <field>
178454              <name>CA4</name>
178455              <description>CA4</description>
178456              <bitOffset>0</bitOffset>
178457              <bitWidth>32</bitWidth>
178458              <access>write-only</access>
178459            </field>
178460          </fields>
178461        </register>
178462        <register>
178463          <name>CAU_ROTL_CA5</name>
178464          <description>General Purpose Register 5 - Rotate Left command</description>
178465          <addressOffset>0x9DC</addressOffset>
178466          <size>32</size>
178467          <access>write-only</access>
178468          <resetValue>0</resetValue>
178469          <resetMask>0xFFFFFFFF</resetMask>
178470          <fields>
178471            <field>
178472              <name>CA5</name>
178473              <description>CA5</description>
178474              <bitOffset>0</bitOffset>
178475              <bitWidth>32</bitWidth>
178476              <access>write-only</access>
178477            </field>
178478          </fields>
178479        </register>
178480        <register>
178481          <name>CAU_ROTL_CA6</name>
178482          <description>General Purpose Register 6 - Rotate Left command</description>
178483          <addressOffset>0x9E0</addressOffset>
178484          <size>32</size>
178485          <access>write-only</access>
178486          <resetValue>0</resetValue>
178487          <resetMask>0xFFFFFFFF</resetMask>
178488          <fields>
178489            <field>
178490              <name>CA6</name>
178491              <description>CA6</description>
178492              <bitOffset>0</bitOffset>
178493              <bitWidth>32</bitWidth>
178494              <access>write-only</access>
178495            </field>
178496          </fields>
178497        </register>
178498        <register>
178499          <name>CAU_ROTL_CA7</name>
178500          <description>General Purpose Register 7 - Rotate Left command</description>
178501          <addressOffset>0x9E4</addressOffset>
178502          <size>32</size>
178503          <access>write-only</access>
178504          <resetValue>0</resetValue>
178505          <resetMask>0xFFFFFFFF</resetMask>
178506          <fields>
178507            <field>
178508              <name>CA7</name>
178509              <description>CA7</description>
178510              <bitOffset>0</bitOffset>
178511              <bitWidth>32</bitWidth>
178512              <access>write-only</access>
178513            </field>
178514          </fields>
178515        </register>
178516        <register>
178517          <name>CAU_ROTL_CA8</name>
178518          <description>General Purpose Register 8 - Rotate Left command</description>
178519          <addressOffset>0x9E8</addressOffset>
178520          <size>32</size>
178521          <access>write-only</access>
178522          <resetValue>0</resetValue>
178523          <resetMask>0xFFFFFFFF</resetMask>
178524          <fields>
178525            <field>
178526              <name>CA8</name>
178527              <description>CA8</description>
178528              <bitOffset>0</bitOffset>
178529              <bitWidth>32</bitWidth>
178530              <access>write-only</access>
178531            </field>
178532          </fields>
178533        </register>
178534        <register>
178535          <name>CAU_AESC_CASR</name>
178536          <description>Status register - AES Column Operation command</description>
178537          <addressOffset>0xB00</addressOffset>
178538          <size>32</size>
178539          <access>write-only</access>
178540          <resetValue>0x20000000</resetValue>
178541          <resetMask>0xFFFFFFFF</resetMask>
178542          <fields>
178543            <field>
178544              <name>IC</name>
178545              <description>no description available</description>
178546              <bitOffset>0</bitOffset>
178547              <bitWidth>1</bitWidth>
178548              <access>write-only</access>
178549              <enumeratedValues>
178550                <enumeratedValue>
178551                  <name>0</name>
178552                  <description>No illegal commands issued</description>
178553                  <value>#0</value>
178554                </enumeratedValue>
178555                <enumeratedValue>
178556                  <name>1</name>
178557                  <description>Illegal command issued</description>
178558                  <value>#1</value>
178559                </enumeratedValue>
178560              </enumeratedValues>
178561            </field>
178562            <field>
178563              <name>DPE</name>
178564              <description>no description available</description>
178565              <bitOffset>1</bitOffset>
178566              <bitWidth>1</bitWidth>
178567              <access>write-only</access>
178568              <enumeratedValues>
178569                <enumeratedValue>
178570                  <name>0</name>
178571                  <description>No error detected</description>
178572                  <value>#0</value>
178573                </enumeratedValue>
178574                <enumeratedValue>
178575                  <name>1</name>
178576                  <description>DES key parity error detected</description>
178577                  <value>#1</value>
178578                </enumeratedValue>
178579              </enumeratedValues>
178580            </field>
178581            <field>
178582              <name>VER</name>
178583              <description>CAU version</description>
178584              <bitOffset>28</bitOffset>
178585              <bitWidth>4</bitWidth>
178586              <access>write-only</access>
178587              <enumeratedValues>
178588                <enumeratedValue>
178589                  <name>0001</name>
178590                  <description>Initial CAU version</description>
178591                  <value>#0001</value>
178592                </enumeratedValue>
178593                <enumeratedValue>
178594                  <name>0010</name>
178595                  <description>Second version, added support for SHA-256 algorithm.(This is the value on this device)</description>
178596                  <value>#0010</value>
178597                </enumeratedValue>
178598              </enumeratedValues>
178599            </field>
178600          </fields>
178601        </register>
178602        <register>
178603          <name>CAU_AESC_CAA</name>
178604          <description>Accumulator register - AES Column Operation command</description>
178605          <addressOffset>0xB04</addressOffset>
178606          <size>32</size>
178607          <access>write-only</access>
178608          <resetValue>0</resetValue>
178609          <resetMask>0xFFFFFFFF</resetMask>
178610          <fields>
178611            <field>
178612              <name>ACC</name>
178613              <description>ACC</description>
178614              <bitOffset>0</bitOffset>
178615              <bitWidth>32</bitWidth>
178616              <access>write-only</access>
178617            </field>
178618          </fields>
178619        </register>
178620        <register>
178621          <name>CAU_AESC_CA0</name>
178622          <description>General Purpose Register 0 - AES Column Operation command</description>
178623          <addressOffset>0xB08</addressOffset>
178624          <size>32</size>
178625          <access>write-only</access>
178626          <resetValue>0</resetValue>
178627          <resetMask>0xFFFFFFFF</resetMask>
178628          <fields>
178629            <field>
178630              <name>CA0</name>
178631              <description>CA0</description>
178632              <bitOffset>0</bitOffset>
178633              <bitWidth>32</bitWidth>
178634              <access>write-only</access>
178635            </field>
178636          </fields>
178637        </register>
178638        <register>
178639          <name>CAU_AESC_CA1</name>
178640          <description>General Purpose Register 1 - AES Column Operation command</description>
178641          <addressOffset>0xB0C</addressOffset>
178642          <size>32</size>
178643          <access>write-only</access>
178644          <resetValue>0</resetValue>
178645          <resetMask>0xFFFFFFFF</resetMask>
178646          <fields>
178647            <field>
178648              <name>CA1</name>
178649              <description>CA1</description>
178650              <bitOffset>0</bitOffset>
178651              <bitWidth>32</bitWidth>
178652              <access>write-only</access>
178653            </field>
178654          </fields>
178655        </register>
178656        <register>
178657          <name>CAU_AESC_CA2</name>
178658          <description>General Purpose Register 2 - AES Column Operation command</description>
178659          <addressOffset>0xB10</addressOffset>
178660          <size>32</size>
178661          <access>write-only</access>
178662          <resetValue>0</resetValue>
178663          <resetMask>0xFFFFFFFF</resetMask>
178664          <fields>
178665            <field>
178666              <name>CA2</name>
178667              <description>CA2</description>
178668              <bitOffset>0</bitOffset>
178669              <bitWidth>32</bitWidth>
178670              <access>write-only</access>
178671            </field>
178672          </fields>
178673        </register>
178674        <register>
178675          <name>CAU_AESC_CA3</name>
178676          <description>General Purpose Register 3 - AES Column Operation command</description>
178677          <addressOffset>0xB14</addressOffset>
178678          <size>32</size>
178679          <access>write-only</access>
178680          <resetValue>0</resetValue>
178681          <resetMask>0xFFFFFFFF</resetMask>
178682          <fields>
178683            <field>
178684              <name>CA3</name>
178685              <description>CA3</description>
178686              <bitOffset>0</bitOffset>
178687              <bitWidth>32</bitWidth>
178688              <access>write-only</access>
178689            </field>
178690          </fields>
178691        </register>
178692        <register>
178693          <name>CAU_AESC_CA4</name>
178694          <description>General Purpose Register 4 - AES Column Operation command</description>
178695          <addressOffset>0xB18</addressOffset>
178696          <size>32</size>
178697          <access>write-only</access>
178698          <resetValue>0</resetValue>
178699          <resetMask>0xFFFFFFFF</resetMask>
178700          <fields>
178701            <field>
178702              <name>CA4</name>
178703              <description>CA4</description>
178704              <bitOffset>0</bitOffset>
178705              <bitWidth>32</bitWidth>
178706              <access>write-only</access>
178707            </field>
178708          </fields>
178709        </register>
178710        <register>
178711          <name>CAU_AESC_CA5</name>
178712          <description>General Purpose Register 5 - AES Column Operation command</description>
178713          <addressOffset>0xB1C</addressOffset>
178714          <size>32</size>
178715          <access>write-only</access>
178716          <resetValue>0</resetValue>
178717          <resetMask>0xFFFFFFFF</resetMask>
178718          <fields>
178719            <field>
178720              <name>CA5</name>
178721              <description>CA5</description>
178722              <bitOffset>0</bitOffset>
178723              <bitWidth>32</bitWidth>
178724              <access>write-only</access>
178725            </field>
178726          </fields>
178727        </register>
178728        <register>
178729          <name>CAU_AESC_CA6</name>
178730          <description>General Purpose Register 6 - AES Column Operation command</description>
178731          <addressOffset>0xB20</addressOffset>
178732          <size>32</size>
178733          <access>write-only</access>
178734          <resetValue>0</resetValue>
178735          <resetMask>0xFFFFFFFF</resetMask>
178736          <fields>
178737            <field>
178738              <name>CA6</name>
178739              <description>CA6</description>
178740              <bitOffset>0</bitOffset>
178741              <bitWidth>32</bitWidth>
178742              <access>write-only</access>
178743            </field>
178744          </fields>
178745        </register>
178746        <register>
178747          <name>CAU_AESC_CA7</name>
178748          <description>General Purpose Register 7 - AES Column Operation command</description>
178749          <addressOffset>0xB24</addressOffset>
178750          <size>32</size>
178751          <access>write-only</access>
178752          <resetValue>0</resetValue>
178753          <resetMask>0xFFFFFFFF</resetMask>
178754          <fields>
178755            <field>
178756              <name>CA7</name>
178757              <description>CA7</description>
178758              <bitOffset>0</bitOffset>
178759              <bitWidth>32</bitWidth>
178760              <access>write-only</access>
178761            </field>
178762          </fields>
178763        </register>
178764        <register>
178765          <name>CAU_AESC_CA8</name>
178766          <description>General Purpose Register 8 - AES Column Operation command</description>
178767          <addressOffset>0xB28</addressOffset>
178768          <size>32</size>
178769          <access>write-only</access>
178770          <resetValue>0</resetValue>
178771          <resetMask>0xFFFFFFFF</resetMask>
178772          <fields>
178773            <field>
178774              <name>CA8</name>
178775              <description>CA8</description>
178776              <bitOffset>0</bitOffset>
178777              <bitWidth>32</bitWidth>
178778              <access>write-only</access>
178779            </field>
178780          </fields>
178781        </register>
178782        <register>
178783          <name>CAU_AESIC_CASR</name>
178784          <description>Status register - AES Inverse Column Operation command</description>
178785          <addressOffset>0xB40</addressOffset>
178786          <size>32</size>
178787          <access>write-only</access>
178788          <resetValue>0x20000000</resetValue>
178789          <resetMask>0xFFFFFFFF</resetMask>
178790          <fields>
178791            <field>
178792              <name>IC</name>
178793              <description>no description available</description>
178794              <bitOffset>0</bitOffset>
178795              <bitWidth>1</bitWidth>
178796              <access>write-only</access>
178797              <enumeratedValues>
178798                <enumeratedValue>
178799                  <name>0</name>
178800                  <description>No illegal commands issued</description>
178801                  <value>#0</value>
178802                </enumeratedValue>
178803                <enumeratedValue>
178804                  <name>1</name>
178805                  <description>Illegal command issued</description>
178806                  <value>#1</value>
178807                </enumeratedValue>
178808              </enumeratedValues>
178809            </field>
178810            <field>
178811              <name>DPE</name>
178812              <description>no description available</description>
178813              <bitOffset>1</bitOffset>
178814              <bitWidth>1</bitWidth>
178815              <access>write-only</access>
178816              <enumeratedValues>
178817                <enumeratedValue>
178818                  <name>0</name>
178819                  <description>No error detected</description>
178820                  <value>#0</value>
178821                </enumeratedValue>
178822                <enumeratedValue>
178823                  <name>1</name>
178824                  <description>DES key parity error detected</description>
178825                  <value>#1</value>
178826                </enumeratedValue>
178827              </enumeratedValues>
178828            </field>
178829            <field>
178830              <name>VER</name>
178831              <description>CAU version</description>
178832              <bitOffset>28</bitOffset>
178833              <bitWidth>4</bitWidth>
178834              <access>write-only</access>
178835              <enumeratedValues>
178836                <enumeratedValue>
178837                  <name>0001</name>
178838                  <description>Initial CAU version</description>
178839                  <value>#0001</value>
178840                </enumeratedValue>
178841                <enumeratedValue>
178842                  <name>0010</name>
178843                  <description>Second version, added support for SHA-256 algorithm.(This is the value on this device)</description>
178844                  <value>#0010</value>
178845                </enumeratedValue>
178846              </enumeratedValues>
178847            </field>
178848          </fields>
178849        </register>
178850        <register>
178851          <name>CAU_AESIC_CAA</name>
178852          <description>Accumulator register - AES Inverse Column Operation command</description>
178853          <addressOffset>0xB44</addressOffset>
178854          <size>32</size>
178855          <access>write-only</access>
178856          <resetValue>0</resetValue>
178857          <resetMask>0xFFFFFFFF</resetMask>
178858          <fields>
178859            <field>
178860              <name>ACC</name>
178861              <description>ACC</description>
178862              <bitOffset>0</bitOffset>
178863              <bitWidth>32</bitWidth>
178864              <access>write-only</access>
178865            </field>
178866          </fields>
178867        </register>
178868        <register>
178869          <name>CAU_AESIC_CA0</name>
178870          <description>General Purpose Register 0 - AES Inverse Column Operation command</description>
178871          <addressOffset>0xB48</addressOffset>
178872          <size>32</size>
178873          <access>write-only</access>
178874          <resetValue>0</resetValue>
178875          <resetMask>0xFFFFFFFF</resetMask>
178876          <fields>
178877            <field>
178878              <name>CA0</name>
178879              <description>CA0</description>
178880              <bitOffset>0</bitOffset>
178881              <bitWidth>32</bitWidth>
178882              <access>write-only</access>
178883            </field>
178884          </fields>
178885        </register>
178886        <register>
178887          <name>CAU_AESIC_CA1</name>
178888          <description>General Purpose Register 1 - AES Inverse Column Operation command</description>
178889          <addressOffset>0xB4C</addressOffset>
178890          <size>32</size>
178891          <access>write-only</access>
178892          <resetValue>0</resetValue>
178893          <resetMask>0xFFFFFFFF</resetMask>
178894          <fields>
178895            <field>
178896              <name>CA1</name>
178897              <description>CA1</description>
178898              <bitOffset>0</bitOffset>
178899              <bitWidth>32</bitWidth>
178900              <access>write-only</access>
178901            </field>
178902          </fields>
178903        </register>
178904        <register>
178905          <name>CAU_AESIC_CA2</name>
178906          <description>General Purpose Register 2 - AES Inverse Column Operation command</description>
178907          <addressOffset>0xB50</addressOffset>
178908          <size>32</size>
178909          <access>write-only</access>
178910          <resetValue>0</resetValue>
178911          <resetMask>0xFFFFFFFF</resetMask>
178912          <fields>
178913            <field>
178914              <name>CA2</name>
178915              <description>CA2</description>
178916              <bitOffset>0</bitOffset>
178917              <bitWidth>32</bitWidth>
178918              <access>write-only</access>
178919            </field>
178920          </fields>
178921        </register>
178922        <register>
178923          <name>CAU_AESIC_CA3</name>
178924          <description>General Purpose Register 3 - AES Inverse Column Operation command</description>
178925          <addressOffset>0xB54</addressOffset>
178926          <size>32</size>
178927          <access>write-only</access>
178928          <resetValue>0</resetValue>
178929          <resetMask>0xFFFFFFFF</resetMask>
178930          <fields>
178931            <field>
178932              <name>CA3</name>
178933              <description>CA3</description>
178934              <bitOffset>0</bitOffset>
178935              <bitWidth>32</bitWidth>
178936              <access>write-only</access>
178937            </field>
178938          </fields>
178939        </register>
178940        <register>
178941          <name>CAU_AESIC_CA4</name>
178942          <description>General Purpose Register 4 - AES Inverse Column Operation command</description>
178943          <addressOffset>0xB58</addressOffset>
178944          <size>32</size>
178945          <access>write-only</access>
178946          <resetValue>0</resetValue>
178947          <resetMask>0xFFFFFFFF</resetMask>
178948          <fields>
178949            <field>
178950              <name>CA4</name>
178951              <description>CA4</description>
178952              <bitOffset>0</bitOffset>
178953              <bitWidth>32</bitWidth>
178954              <access>write-only</access>
178955            </field>
178956          </fields>
178957        </register>
178958        <register>
178959          <name>CAU_AESIC_CA5</name>
178960          <description>General Purpose Register 5 - AES Inverse Column Operation command</description>
178961          <addressOffset>0xB5C</addressOffset>
178962          <size>32</size>
178963          <access>write-only</access>
178964          <resetValue>0</resetValue>
178965          <resetMask>0xFFFFFFFF</resetMask>
178966          <fields>
178967            <field>
178968              <name>CA5</name>
178969              <description>CA5</description>
178970              <bitOffset>0</bitOffset>
178971              <bitWidth>32</bitWidth>
178972              <access>write-only</access>
178973            </field>
178974          </fields>
178975        </register>
178976        <register>
178977          <name>CAU_AESIC_CA6</name>
178978          <description>General Purpose Register 6 - AES Inverse Column Operation command</description>
178979          <addressOffset>0xB60</addressOffset>
178980          <size>32</size>
178981          <access>write-only</access>
178982          <resetValue>0</resetValue>
178983          <resetMask>0xFFFFFFFF</resetMask>
178984          <fields>
178985            <field>
178986              <name>CA6</name>
178987              <description>CA6</description>
178988              <bitOffset>0</bitOffset>
178989              <bitWidth>32</bitWidth>
178990              <access>write-only</access>
178991            </field>
178992          </fields>
178993        </register>
178994        <register>
178995          <name>CAU_AESIC_CA7</name>
178996          <description>General Purpose Register 7 - AES Inverse Column Operation command</description>
178997          <addressOffset>0xB64</addressOffset>
178998          <size>32</size>
178999          <access>write-only</access>
179000          <resetValue>0</resetValue>
179001          <resetMask>0xFFFFFFFF</resetMask>
179002          <fields>
179003            <field>
179004              <name>CA7</name>
179005              <description>CA7</description>
179006              <bitOffset>0</bitOffset>
179007              <bitWidth>32</bitWidth>
179008              <access>write-only</access>
179009            </field>
179010          </fields>
179011        </register>
179012        <register>
179013          <name>CAU_AESIC_CA8</name>
179014          <description>General Purpose Register 8 - AES Inverse Column Operation command</description>
179015          <addressOffset>0xB68</addressOffset>
179016          <size>32</size>
179017          <access>write-only</access>
179018          <resetValue>0</resetValue>
179019          <resetMask>0xFFFFFFFF</resetMask>
179020          <fields>
179021            <field>
179022              <name>CA8</name>
179023              <description>CA8</description>
179024              <bitOffset>0</bitOffset>
179025              <bitWidth>32</bitWidth>
179026              <access>write-only</access>
179027            </field>
179028          </fields>
179029        </register>
179030      </registers>
179031    </peripheral>
179032    <peripheral>
179033      <name>LMEM</name>
179034      <description>Local Memory Controller</description>
179035      <prependToName>LMEM_</prependToName>
179036      <baseAddress>0xE0082000</baseAddress>
179037      <addressBlock>
179038        <offset>0</offset>
179039        <size>0x824</size>
179040        <usage>registers</usage>
179041      </addressBlock>
179042      <registers>
179043        <register>
179044          <name>PCCCR</name>
179045          <description>Cache control register</description>
179046          <addressOffset>0</addressOffset>
179047          <size>32</size>
179048          <access>read-write</access>
179049          <resetValue>0</resetValue>
179050          <resetMask>0xFFFFFFFF</resetMask>
179051          <fields>
179052            <field>
179053              <name>ENCACHE</name>
179054              <description>Cache enable</description>
179055              <bitOffset>0</bitOffset>
179056              <bitWidth>1</bitWidth>
179057              <access>read-write</access>
179058              <enumeratedValues>
179059                <enumeratedValue>
179060                  <name>0</name>
179061                  <description>Cache disabled</description>
179062                  <value>#0</value>
179063                </enumeratedValue>
179064                <enumeratedValue>
179065                  <name>1</name>
179066                  <description>Cache enabled</description>
179067                  <value>#1</value>
179068                </enumeratedValue>
179069              </enumeratedValues>
179070            </field>
179071            <field>
179072              <name>ENWRBUF</name>
179073              <description>Enable Write Buffer</description>
179074              <bitOffset>1</bitOffset>
179075              <bitWidth>1</bitWidth>
179076              <access>read-write</access>
179077              <enumeratedValues>
179078                <enumeratedValue>
179079                  <name>0</name>
179080                  <description>Write buffer disabled</description>
179081                  <value>#0</value>
179082                </enumeratedValue>
179083                <enumeratedValue>
179084                  <name>1</name>
179085                  <description>Write buffer enabled</description>
179086                  <value>#1</value>
179087                </enumeratedValue>
179088              </enumeratedValues>
179089            </field>
179090            <field>
179091              <name>PCCR2</name>
179092              <description>Forces all cacheable spaces to write through</description>
179093              <bitOffset>2</bitOffset>
179094              <bitWidth>1</bitWidth>
179095              <access>read-write</access>
179096            </field>
179097            <field>
179098              <name>PCCR3</name>
179099              <description>Forces no allocation on cache misses (must also have PCCR2 asserted)</description>
179100              <bitOffset>3</bitOffset>
179101              <bitWidth>1</bitWidth>
179102              <access>read-write</access>
179103            </field>
179104            <field>
179105              <name>INVW0</name>
179106              <description>Invalidate Way 0</description>
179107              <bitOffset>24</bitOffset>
179108              <bitWidth>1</bitWidth>
179109              <access>read-write</access>
179110              <enumeratedValues>
179111                <enumeratedValue>
179112                  <name>0</name>
179113                  <description>No operation</description>
179114                  <value>#0</value>
179115                </enumeratedValue>
179116                <enumeratedValue>
179117                  <name>1</name>
179118                  <description>When setting the GO bit, invalidate all lines in way 0.</description>
179119                  <value>#1</value>
179120                </enumeratedValue>
179121              </enumeratedValues>
179122            </field>
179123            <field>
179124              <name>PUSHW0</name>
179125              <description>Push Way 0</description>
179126              <bitOffset>25</bitOffset>
179127              <bitWidth>1</bitWidth>
179128              <access>read-write</access>
179129              <enumeratedValues>
179130                <enumeratedValue>
179131                  <name>0</name>
179132                  <description>No operation</description>
179133                  <value>#0</value>
179134                </enumeratedValue>
179135                <enumeratedValue>
179136                  <name>1</name>
179137                  <description>When setting the GO bit, push all modified lines in way 0</description>
179138                  <value>#1</value>
179139                </enumeratedValue>
179140              </enumeratedValues>
179141            </field>
179142            <field>
179143              <name>INVW1</name>
179144              <description>Invalidate Way 1</description>
179145              <bitOffset>26</bitOffset>
179146              <bitWidth>1</bitWidth>
179147              <access>read-write</access>
179148              <enumeratedValues>
179149                <enumeratedValue>
179150                  <name>0</name>
179151                  <description>No operation</description>
179152                  <value>#0</value>
179153                </enumeratedValue>
179154                <enumeratedValue>
179155                  <name>1</name>
179156                  <description>When setting the GO bit, invalidate all lines in way 1</description>
179157                  <value>#1</value>
179158                </enumeratedValue>
179159              </enumeratedValues>
179160            </field>
179161            <field>
179162              <name>PUSHW1</name>
179163              <description>Push Way 1</description>
179164              <bitOffset>27</bitOffset>
179165              <bitWidth>1</bitWidth>
179166              <access>read-write</access>
179167              <enumeratedValues>
179168                <enumeratedValue>
179169                  <name>0</name>
179170                  <description>No operation</description>
179171                  <value>#0</value>
179172                </enumeratedValue>
179173                <enumeratedValue>
179174                  <name>1</name>
179175                  <description>When setting the GO bit, push all modified lines in way 1</description>
179176                  <value>#1</value>
179177                </enumeratedValue>
179178              </enumeratedValues>
179179            </field>
179180            <field>
179181              <name>GO</name>
179182              <description>Initiate Cache Command</description>
179183              <bitOffset>31</bitOffset>
179184              <bitWidth>1</bitWidth>
179185              <access>read-write</access>
179186              <enumeratedValues>
179187                <enumeratedValue>
179188                  <name>0</name>
179189                  <description>Write: no effect. Read: no cache command active.</description>
179190                  <value>#0</value>
179191                </enumeratedValue>
179192                <enumeratedValue>
179193                  <name>1</name>
179194                  <description>Write: initiate command indicated by bits 27-24. Read: cache command active.</description>
179195                  <value>#1</value>
179196                </enumeratedValue>
179197              </enumeratedValues>
179198            </field>
179199          </fields>
179200        </register>
179201        <register>
179202          <name>PCCLCR</name>
179203          <description>Cache line control register</description>
179204          <addressOffset>0x4</addressOffset>
179205          <size>32</size>
179206          <access>read-write</access>
179207          <resetValue>0</resetValue>
179208          <resetMask>0xFFFFFFFF</resetMask>
179209          <fields>
179210            <field>
179211              <name>LGO</name>
179212              <description>Initiate Cache Line Command</description>
179213              <bitOffset>0</bitOffset>
179214              <bitWidth>1</bitWidth>
179215              <access>read-write</access>
179216              <enumeratedValues>
179217                <enumeratedValue>
179218                  <name>0</name>
179219                  <description>Write: no effect. Read: no line command active.</description>
179220                  <value>#0</value>
179221                </enumeratedValue>
179222                <enumeratedValue>
179223                  <name>1</name>
179224                  <description>Write: initiate line command indicated by bits 27-24. Read: line command active.</description>
179225                  <value>#1</value>
179226                </enumeratedValue>
179227              </enumeratedValues>
179228            </field>
179229            <field>
179230              <name>CACHEADDR</name>
179231              <description>Cache address</description>
179232              <bitOffset>2</bitOffset>
179233              <bitWidth>10</bitWidth>
179234              <access>read-write</access>
179235            </field>
179236            <field>
179237              <name>WSEL</name>
179238              <description>Way select</description>
179239              <bitOffset>14</bitOffset>
179240              <bitWidth>1</bitWidth>
179241              <access>read-write</access>
179242              <enumeratedValues>
179243                <enumeratedValue>
179244                  <name>0</name>
179245                  <description>Way 0</description>
179246                  <value>#0</value>
179247                </enumeratedValue>
179248                <enumeratedValue>
179249                  <name>1</name>
179250                  <description>Way 1</description>
179251                  <value>#1</value>
179252                </enumeratedValue>
179253              </enumeratedValues>
179254            </field>
179255            <field>
179256              <name>TDSEL</name>
179257              <description>Tag/Data Select</description>
179258              <bitOffset>16</bitOffset>
179259              <bitWidth>1</bitWidth>
179260              <access>read-write</access>
179261              <enumeratedValues>
179262                <enumeratedValue>
179263                  <name>0</name>
179264                  <description>Data</description>
179265                  <value>#0</value>
179266                </enumeratedValue>
179267                <enumeratedValue>
179268                  <name>1</name>
179269                  <description>Tag</description>
179270                  <value>#1</value>
179271                </enumeratedValue>
179272              </enumeratedValues>
179273            </field>
179274            <field>
179275              <name>LCIVB</name>
179276              <description>Line Command Initial Valid Bit</description>
179277              <bitOffset>20</bitOffset>
179278              <bitWidth>1</bitWidth>
179279              <access>read-only</access>
179280            </field>
179281            <field>
179282              <name>LCIMB</name>
179283              <description>Line Command Initial Modified Bit</description>
179284              <bitOffset>21</bitOffset>
179285              <bitWidth>1</bitWidth>
179286              <access>read-only</access>
179287            </field>
179288            <field>
179289              <name>LCWAY</name>
179290              <description>Line Command Way</description>
179291              <bitOffset>22</bitOffset>
179292              <bitWidth>1</bitWidth>
179293              <access>read-only</access>
179294            </field>
179295            <field>
179296              <name>LCMD</name>
179297              <description>Line Command</description>
179298              <bitOffset>24</bitOffset>
179299              <bitWidth>2</bitWidth>
179300              <access>read-write</access>
179301              <enumeratedValues>
179302                <enumeratedValue>
179303                  <name>00</name>
179304                  <description>Search and read or write</description>
179305                  <value>#00</value>
179306                </enumeratedValue>
179307                <enumeratedValue>
179308                  <name>01</name>
179309                  <description>Invalidate</description>
179310                  <value>#01</value>
179311                </enumeratedValue>
179312                <enumeratedValue>
179313                  <name>10</name>
179314                  <description>Push</description>
179315                  <value>#10</value>
179316                </enumeratedValue>
179317                <enumeratedValue>
179318                  <name>11</name>
179319                  <description>Clear</description>
179320                  <value>#11</value>
179321                </enumeratedValue>
179322              </enumeratedValues>
179323            </field>
179324            <field>
179325              <name>LADSEL</name>
179326              <description>Line Address Select</description>
179327              <bitOffset>26</bitOffset>
179328              <bitWidth>1</bitWidth>
179329              <access>read-write</access>
179330              <enumeratedValues>
179331                <enumeratedValue>
179332                  <name>0</name>
179333                  <description>Cache address</description>
179334                  <value>#0</value>
179335                </enumeratedValue>
179336                <enumeratedValue>
179337                  <name>1</name>
179338                  <description>Physical address</description>
179339                  <value>#1</value>
179340                </enumeratedValue>
179341              </enumeratedValues>
179342            </field>
179343            <field>
179344              <name>LACC</name>
179345              <description>Line access type</description>
179346              <bitOffset>27</bitOffset>
179347              <bitWidth>1</bitWidth>
179348              <access>read-write</access>
179349              <enumeratedValues>
179350                <enumeratedValue>
179351                  <name>0</name>
179352                  <description>Read</description>
179353                  <value>#0</value>
179354                </enumeratedValue>
179355                <enumeratedValue>
179356                  <name>1</name>
179357                  <description>Write</description>
179358                  <value>#1</value>
179359                </enumeratedValue>
179360              </enumeratedValues>
179361            </field>
179362          </fields>
179363        </register>
179364        <register>
179365          <name>PCCSAR</name>
179366          <description>Cache search address register</description>
179367          <addressOffset>0x8</addressOffset>
179368          <size>32</size>
179369          <access>read-write</access>
179370          <resetValue>0</resetValue>
179371          <resetMask>0xFFFFFFFF</resetMask>
179372          <fields>
179373            <field>
179374              <name>LGO</name>
179375              <description>Initiate Cache Line Command</description>
179376              <bitOffset>0</bitOffset>
179377              <bitWidth>1</bitWidth>
179378              <access>read-write</access>
179379              <enumeratedValues>
179380                <enumeratedValue>
179381                  <name>0</name>
179382                  <description>Write: no effect. Read: no line command active.</description>
179383                  <value>#0</value>
179384                </enumeratedValue>
179385                <enumeratedValue>
179386                  <name>1</name>
179387                  <description>Write: initiate line command indicated by bits CLCR[27:24]. Read: line command active.</description>
179388                  <value>#1</value>
179389                </enumeratedValue>
179390              </enumeratedValues>
179391            </field>
179392            <field>
179393              <name>PHYADDR</name>
179394              <description>Physical Address</description>
179395              <bitOffset>2</bitOffset>
179396              <bitWidth>30</bitWidth>
179397              <access>read-write</access>
179398            </field>
179399          </fields>
179400        </register>
179401        <register>
179402          <name>PCCCVR</name>
179403          <description>Cache read/write value register</description>
179404          <addressOffset>0xC</addressOffset>
179405          <size>32</size>
179406          <access>read-write</access>
179407          <resetValue>0</resetValue>
179408          <resetMask>0xFFFFFFFF</resetMask>
179409          <fields>
179410            <field>
179411              <name>DATA</name>
179412              <description>Cache read/write Data</description>
179413              <bitOffset>0</bitOffset>
179414              <bitWidth>32</bitWidth>
179415              <access>read-write</access>
179416            </field>
179417          </fields>
179418        </register>
179419        <register>
179420          <name>PCCRMR</name>
179421          <description>Cache regions mode register</description>
179422          <addressOffset>0x20</addressOffset>
179423          <size>32</size>
179424          <access>read-write</access>
179425          <resetValue>0xAA0FA000</resetValue>
179426          <resetMask>0xFFFFFFFF</resetMask>
179427          <fields>
179428            <field>
179429              <name>R15</name>
179430              <description>Region 15 mode</description>
179431              <bitOffset>0</bitOffset>
179432              <bitWidth>2</bitWidth>
179433              <access>read-write</access>
179434              <enumeratedValues>
179435                <enumeratedValue>
179436                  <name>00</name>
179437                  <description>Non-cacheable</description>
179438                  <value>#00</value>
179439                </enumeratedValue>
179440                <enumeratedValue>
179441                  <name>01</name>
179442                  <description>Non-cacheable</description>
179443                  <value>#01</value>
179444                </enumeratedValue>
179445                <enumeratedValue>
179446                  <name>10</name>
179447                  <description>Write-through</description>
179448                  <value>#10</value>
179449                </enumeratedValue>
179450                <enumeratedValue>
179451                  <name>11</name>
179452                  <description>Write-back</description>
179453                  <value>#11</value>
179454                </enumeratedValue>
179455              </enumeratedValues>
179456            </field>
179457            <field>
179458              <name>R14</name>
179459              <description>Region 14 mode</description>
179460              <bitOffset>2</bitOffset>
179461              <bitWidth>2</bitWidth>
179462              <access>read-write</access>
179463              <enumeratedValues>
179464                <enumeratedValue>
179465                  <name>00</name>
179466                  <description>Non-cacheable</description>
179467                  <value>#00</value>
179468                </enumeratedValue>
179469                <enumeratedValue>
179470                  <name>01</name>
179471                  <description>Non-cacheable</description>
179472                  <value>#01</value>
179473                </enumeratedValue>
179474                <enumeratedValue>
179475                  <name>10</name>
179476                  <description>Write-through</description>
179477                  <value>#10</value>
179478                </enumeratedValue>
179479                <enumeratedValue>
179480                  <name>11</name>
179481                  <description>Write-back</description>
179482                  <value>#11</value>
179483                </enumeratedValue>
179484              </enumeratedValues>
179485            </field>
179486            <field>
179487              <name>R13</name>
179488              <description>Region 13 mode</description>
179489              <bitOffset>4</bitOffset>
179490              <bitWidth>2</bitWidth>
179491              <access>read-write</access>
179492              <enumeratedValues>
179493                <enumeratedValue>
179494                  <name>00</name>
179495                  <description>Non-cacheable</description>
179496                  <value>#00</value>
179497                </enumeratedValue>
179498                <enumeratedValue>
179499                  <name>01</name>
179500                  <description>Non-cacheable</description>
179501                  <value>#01</value>
179502                </enumeratedValue>
179503                <enumeratedValue>
179504                  <name>10</name>
179505                  <description>Write-through</description>
179506                  <value>#10</value>
179507                </enumeratedValue>
179508                <enumeratedValue>
179509                  <name>11</name>
179510                  <description>Write-back</description>
179511                  <value>#11</value>
179512                </enumeratedValue>
179513              </enumeratedValues>
179514            </field>
179515            <field>
179516              <name>R12</name>
179517              <description>Region 12 mode</description>
179518              <bitOffset>6</bitOffset>
179519              <bitWidth>2</bitWidth>
179520              <access>read-write</access>
179521              <enumeratedValues>
179522                <enumeratedValue>
179523                  <name>00</name>
179524                  <description>Non-cacheable</description>
179525                  <value>#00</value>
179526                </enumeratedValue>
179527                <enumeratedValue>
179528                  <name>01</name>
179529                  <description>Non-cacheable</description>
179530                  <value>#01</value>
179531                </enumeratedValue>
179532                <enumeratedValue>
179533                  <name>10</name>
179534                  <description>Write-through</description>
179535                  <value>#10</value>
179536                </enumeratedValue>
179537                <enumeratedValue>
179538                  <name>11</name>
179539                  <description>Write-back</description>
179540                  <value>#11</value>
179541                </enumeratedValue>
179542              </enumeratedValues>
179543            </field>
179544            <field>
179545              <name>R11</name>
179546              <description>Region 11 mode</description>
179547              <bitOffset>8</bitOffset>
179548              <bitWidth>2</bitWidth>
179549              <access>read-write</access>
179550              <enumeratedValues>
179551                <enumeratedValue>
179552                  <name>00</name>
179553                  <description>Non-cacheable</description>
179554                  <value>#00</value>
179555                </enumeratedValue>
179556                <enumeratedValue>
179557                  <name>01</name>
179558                  <description>Non-cacheable</description>
179559                  <value>#01</value>
179560                </enumeratedValue>
179561                <enumeratedValue>
179562                  <name>10</name>
179563                  <description>Write-through</description>
179564                  <value>#10</value>
179565                </enumeratedValue>
179566                <enumeratedValue>
179567                  <name>11</name>
179568                  <description>Write-back</description>
179569                  <value>#11</value>
179570                </enumeratedValue>
179571              </enumeratedValues>
179572            </field>
179573            <field>
179574              <name>R10</name>
179575              <description>Region 10 mode</description>
179576              <bitOffset>10</bitOffset>
179577              <bitWidth>2</bitWidth>
179578              <access>read-write</access>
179579              <enumeratedValues>
179580                <enumeratedValue>
179581                  <name>00</name>
179582                  <description>Non-cacheable</description>
179583                  <value>#00</value>
179584                </enumeratedValue>
179585                <enumeratedValue>
179586                  <name>01</name>
179587                  <description>Non-cacheable</description>
179588                  <value>#01</value>
179589                </enumeratedValue>
179590                <enumeratedValue>
179591                  <name>10</name>
179592                  <description>Write-through</description>
179593                  <value>#10</value>
179594                </enumeratedValue>
179595                <enumeratedValue>
179596                  <name>11</name>
179597                  <description>Write-back</description>
179598                  <value>#11</value>
179599                </enumeratedValue>
179600              </enumeratedValues>
179601            </field>
179602            <field>
179603              <name>R9</name>
179604              <description>Region 9 mode</description>
179605              <bitOffset>12</bitOffset>
179606              <bitWidth>2</bitWidth>
179607              <access>read-write</access>
179608              <enumeratedValues>
179609                <enumeratedValue>
179610                  <name>00</name>
179611                  <description>Non-cacheable</description>
179612                  <value>#00</value>
179613                </enumeratedValue>
179614                <enumeratedValue>
179615                  <name>01</name>
179616                  <description>Non-cacheable</description>
179617                  <value>#01</value>
179618                </enumeratedValue>
179619                <enumeratedValue>
179620                  <name>10</name>
179621                  <description>Write-through</description>
179622                  <value>#10</value>
179623                </enumeratedValue>
179624                <enumeratedValue>
179625                  <name>11</name>
179626                  <description>Write-back</description>
179627                  <value>#11</value>
179628                </enumeratedValue>
179629              </enumeratedValues>
179630            </field>
179631            <field>
179632              <name>R8</name>
179633              <description>Region 8 mode</description>
179634              <bitOffset>14</bitOffset>
179635              <bitWidth>2</bitWidth>
179636              <access>read-write</access>
179637              <enumeratedValues>
179638                <enumeratedValue>
179639                  <name>00</name>
179640                  <description>Non-cacheable</description>
179641                  <value>#00</value>
179642                </enumeratedValue>
179643                <enumeratedValue>
179644                  <name>01</name>
179645                  <description>Non-cacheable</description>
179646                  <value>#01</value>
179647                </enumeratedValue>
179648                <enumeratedValue>
179649                  <name>10</name>
179650                  <description>Write-through</description>
179651                  <value>#10</value>
179652                </enumeratedValue>
179653                <enumeratedValue>
179654                  <name>11</name>
179655                  <description>Write-back</description>
179656                  <value>#11</value>
179657                </enumeratedValue>
179658              </enumeratedValues>
179659            </field>
179660            <field>
179661              <name>R7</name>
179662              <description>Region 7 mode</description>
179663              <bitOffset>16</bitOffset>
179664              <bitWidth>2</bitWidth>
179665              <access>read-write</access>
179666              <enumeratedValues>
179667                <enumeratedValue>
179668                  <name>00</name>
179669                  <description>Non-cacheable</description>
179670                  <value>#00</value>
179671                </enumeratedValue>
179672                <enumeratedValue>
179673                  <name>01</name>
179674                  <description>Non-cacheable</description>
179675                  <value>#01</value>
179676                </enumeratedValue>
179677                <enumeratedValue>
179678                  <name>10</name>
179679                  <description>Write-through</description>
179680                  <value>#10</value>
179681                </enumeratedValue>
179682                <enumeratedValue>
179683                  <name>11</name>
179684                  <description>Write-back</description>
179685                  <value>#11</value>
179686                </enumeratedValue>
179687              </enumeratedValues>
179688            </field>
179689            <field>
179690              <name>R6</name>
179691              <description>Region 6 mode</description>
179692              <bitOffset>18</bitOffset>
179693              <bitWidth>2</bitWidth>
179694              <access>read-write</access>
179695              <enumeratedValues>
179696                <enumeratedValue>
179697                  <name>00</name>
179698                  <description>Non-cacheable</description>
179699                  <value>#00</value>
179700                </enumeratedValue>
179701                <enumeratedValue>
179702                  <name>01</name>
179703                  <description>Non-cacheable</description>
179704                  <value>#01</value>
179705                </enumeratedValue>
179706                <enumeratedValue>
179707                  <name>10</name>
179708                  <description>Write-through</description>
179709                  <value>#10</value>
179710                </enumeratedValue>
179711                <enumeratedValue>
179712                  <name>11</name>
179713                  <description>Write-back</description>
179714                  <value>#11</value>
179715                </enumeratedValue>
179716              </enumeratedValues>
179717            </field>
179718            <field>
179719              <name>R5</name>
179720              <description>Region 5 mode</description>
179721              <bitOffset>20</bitOffset>
179722              <bitWidth>2</bitWidth>
179723              <access>read-write</access>
179724              <enumeratedValues>
179725                <enumeratedValue>
179726                  <name>00</name>
179727                  <description>Non-cacheable</description>
179728                  <value>#00</value>
179729                </enumeratedValue>
179730                <enumeratedValue>
179731                  <name>01</name>
179732                  <description>Non-cacheable</description>
179733                  <value>#01</value>
179734                </enumeratedValue>
179735                <enumeratedValue>
179736                  <name>10</name>
179737                  <description>Write-through</description>
179738                  <value>#10</value>
179739                </enumeratedValue>
179740                <enumeratedValue>
179741                  <name>11</name>
179742                  <description>Write-back</description>
179743                  <value>#11</value>
179744                </enumeratedValue>
179745              </enumeratedValues>
179746            </field>
179747            <field>
179748              <name>R4</name>
179749              <description>Region 4 mode</description>
179750              <bitOffset>22</bitOffset>
179751              <bitWidth>2</bitWidth>
179752              <access>read-write</access>
179753              <enumeratedValues>
179754                <enumeratedValue>
179755                  <name>00</name>
179756                  <description>Non-cacheable</description>
179757                  <value>#00</value>
179758                </enumeratedValue>
179759                <enumeratedValue>
179760                  <name>01</name>
179761                  <description>Non-cacheable</description>
179762                  <value>#01</value>
179763                </enumeratedValue>
179764                <enumeratedValue>
179765                  <name>10</name>
179766                  <description>Write-through</description>
179767                  <value>#10</value>
179768                </enumeratedValue>
179769                <enumeratedValue>
179770                  <name>11</name>
179771                  <description>Write-back</description>
179772                  <value>#11</value>
179773                </enumeratedValue>
179774              </enumeratedValues>
179775            </field>
179776            <field>
179777              <name>R3</name>
179778              <description>Region 3 mode</description>
179779              <bitOffset>24</bitOffset>
179780              <bitWidth>2</bitWidth>
179781              <access>read-write</access>
179782              <enumeratedValues>
179783                <enumeratedValue>
179784                  <name>00</name>
179785                  <description>Non-cacheable</description>
179786                  <value>#00</value>
179787                </enumeratedValue>
179788                <enumeratedValue>
179789                  <name>01</name>
179790                  <description>Non-cacheable</description>
179791                  <value>#01</value>
179792                </enumeratedValue>
179793                <enumeratedValue>
179794                  <name>10</name>
179795                  <description>Write-through</description>
179796                  <value>#10</value>
179797                </enumeratedValue>
179798                <enumeratedValue>
179799                  <name>11</name>
179800                  <description>Write-back</description>
179801                  <value>#11</value>
179802                </enumeratedValue>
179803              </enumeratedValues>
179804            </field>
179805            <field>
179806              <name>R2</name>
179807              <description>Region 2 mode</description>
179808              <bitOffset>26</bitOffset>
179809              <bitWidth>2</bitWidth>
179810              <access>read-write</access>
179811              <enumeratedValues>
179812                <enumeratedValue>
179813                  <name>00</name>
179814                  <description>Non-cacheable</description>
179815                  <value>#00</value>
179816                </enumeratedValue>
179817                <enumeratedValue>
179818                  <name>01</name>
179819                  <description>Non-cacheable</description>
179820                  <value>#01</value>
179821                </enumeratedValue>
179822                <enumeratedValue>
179823                  <name>10</name>
179824                  <description>Write-through</description>
179825                  <value>#10</value>
179826                </enumeratedValue>
179827                <enumeratedValue>
179828                  <name>11</name>
179829                  <description>Write-back</description>
179830                  <value>#11</value>
179831                </enumeratedValue>
179832              </enumeratedValues>
179833            </field>
179834            <field>
179835              <name>R1</name>
179836              <description>Region 1 mode</description>
179837              <bitOffset>28</bitOffset>
179838              <bitWidth>2</bitWidth>
179839              <access>read-write</access>
179840              <enumeratedValues>
179841                <enumeratedValue>
179842                  <name>00</name>
179843                  <description>Non-cacheable</description>
179844                  <value>#00</value>
179845                </enumeratedValue>
179846                <enumeratedValue>
179847                  <name>01</name>
179848                  <description>Non-cacheable</description>
179849                  <value>#01</value>
179850                </enumeratedValue>
179851                <enumeratedValue>
179852                  <name>10</name>
179853                  <description>Write-through</description>
179854                  <value>#10</value>
179855                </enumeratedValue>
179856                <enumeratedValue>
179857                  <name>11</name>
179858                  <description>Write-back</description>
179859                  <value>#11</value>
179860                </enumeratedValue>
179861              </enumeratedValues>
179862            </field>
179863            <field>
179864              <name>R0</name>
179865              <description>Region 0 mode</description>
179866              <bitOffset>30</bitOffset>
179867              <bitWidth>2</bitWidth>
179868              <access>read-write</access>
179869              <enumeratedValues>
179870                <enumeratedValue>
179871                  <name>00</name>
179872                  <description>Non-cacheable</description>
179873                  <value>#00</value>
179874                </enumeratedValue>
179875                <enumeratedValue>
179876                  <name>01</name>
179877                  <description>Non-cacheable</description>
179878                  <value>#01</value>
179879                </enumeratedValue>
179880                <enumeratedValue>
179881                  <name>10</name>
179882                  <description>Write-through</description>
179883                  <value>#10</value>
179884                </enumeratedValue>
179885                <enumeratedValue>
179886                  <name>11</name>
179887                  <description>Write-back</description>
179888                  <value>#11</value>
179889                </enumeratedValue>
179890              </enumeratedValues>
179891            </field>
179892          </fields>
179893        </register>
179894        <register>
179895          <name>PSCCR</name>
179896          <description>Cache control register</description>
179897          <addressOffset>0x800</addressOffset>
179898          <size>32</size>
179899          <access>read-write</access>
179900          <resetValue>0</resetValue>
179901          <resetMask>0xFFFFFFFF</resetMask>
179902          <fields>
179903            <field>
179904              <name>ENCACHE</name>
179905              <description>Cache enable</description>
179906              <bitOffset>0</bitOffset>
179907              <bitWidth>1</bitWidth>
179908              <access>read-write</access>
179909              <enumeratedValues>
179910                <enumeratedValue>
179911                  <name>0</name>
179912                  <description>Cache disabled</description>
179913                  <value>#0</value>
179914                </enumeratedValue>
179915                <enumeratedValue>
179916                  <name>1</name>
179917                  <description>Cache enabled</description>
179918                  <value>#1</value>
179919                </enumeratedValue>
179920              </enumeratedValues>
179921            </field>
179922            <field>
179923              <name>ENWRBUF</name>
179924              <description>Enable Write Buffer</description>
179925              <bitOffset>1</bitOffset>
179926              <bitWidth>1</bitWidth>
179927              <access>read-write</access>
179928              <enumeratedValues>
179929                <enumeratedValue>
179930                  <name>0</name>
179931                  <description>Write buffer disabled</description>
179932                  <value>#0</value>
179933                </enumeratedValue>
179934                <enumeratedValue>
179935                  <name>1</name>
179936                  <description>Write buffer enabled</description>
179937                  <value>#1</value>
179938                </enumeratedValue>
179939              </enumeratedValues>
179940            </field>
179941            <field>
179942              <name>INVW0</name>
179943              <description>Invalidate Way 0</description>
179944              <bitOffset>24</bitOffset>
179945              <bitWidth>1</bitWidth>
179946              <access>read-write</access>
179947              <enumeratedValues>
179948                <enumeratedValue>
179949                  <name>0</name>
179950                  <description>No operation</description>
179951                  <value>#0</value>
179952                </enumeratedValue>
179953                <enumeratedValue>
179954                  <name>1</name>
179955                  <description>When setting the GO bit, invalidate all lines in way 0.</description>
179956                  <value>#1</value>
179957                </enumeratedValue>
179958              </enumeratedValues>
179959            </field>
179960            <field>
179961              <name>PUSHW0</name>
179962              <description>Push Way 0</description>
179963              <bitOffset>25</bitOffset>
179964              <bitWidth>1</bitWidth>
179965              <access>read-write</access>
179966              <enumeratedValues>
179967                <enumeratedValue>
179968                  <name>0</name>
179969                  <description>No operation</description>
179970                  <value>#0</value>
179971                </enumeratedValue>
179972                <enumeratedValue>
179973                  <name>1</name>
179974                  <description>When setting the GO bit, push all modified lines in way 0</description>
179975                  <value>#1</value>
179976                </enumeratedValue>
179977              </enumeratedValues>
179978            </field>
179979            <field>
179980              <name>INVW1</name>
179981              <description>Invalidate Way 1</description>
179982              <bitOffset>26</bitOffset>
179983              <bitWidth>1</bitWidth>
179984              <access>read-write</access>
179985              <enumeratedValues>
179986                <enumeratedValue>
179987                  <name>0</name>
179988                  <description>No operation</description>
179989                  <value>#0</value>
179990                </enumeratedValue>
179991                <enumeratedValue>
179992                  <name>1</name>
179993                  <description>When setting the GO bit, invalidate all lines in way 1</description>
179994                  <value>#1</value>
179995                </enumeratedValue>
179996              </enumeratedValues>
179997            </field>
179998            <field>
179999              <name>PUSHW1</name>
180000              <description>Push Way 1</description>
180001              <bitOffset>27</bitOffset>
180002              <bitWidth>1</bitWidth>
180003              <access>read-write</access>
180004              <enumeratedValues>
180005                <enumeratedValue>
180006                  <name>0</name>
180007                  <description>No operation</description>
180008                  <value>#0</value>
180009                </enumeratedValue>
180010                <enumeratedValue>
180011                  <name>1</name>
180012                  <description>When setting the GO bit, push all modified lines in way 1</description>
180013                  <value>#1</value>
180014                </enumeratedValue>
180015              </enumeratedValues>
180016            </field>
180017            <field>
180018              <name>GO</name>
180019              <description>Initiate Cache Command</description>
180020              <bitOffset>31</bitOffset>
180021              <bitWidth>1</bitWidth>
180022              <access>read-write</access>
180023              <enumeratedValues>
180024                <enumeratedValue>
180025                  <name>0</name>
180026                  <description>Write: no effect. Read: no cache command active.</description>
180027                  <value>#0</value>
180028                </enumeratedValue>
180029                <enumeratedValue>
180030                  <name>1</name>
180031                  <description>Write: initiate command indicated by bits 27-24. Read: cache command active.</description>
180032                  <value>#1</value>
180033                </enumeratedValue>
180034              </enumeratedValues>
180035            </field>
180036          </fields>
180037        </register>
180038        <register>
180039          <name>PSCLCR</name>
180040          <description>Cache line control register</description>
180041          <addressOffset>0x804</addressOffset>
180042          <size>32</size>
180043          <access>read-write</access>
180044          <resetValue>0</resetValue>
180045          <resetMask>0xFFFFFFFF</resetMask>
180046          <fields>
180047            <field>
180048              <name>LGO</name>
180049              <description>Initiate Cache Line Command</description>
180050              <bitOffset>0</bitOffset>
180051              <bitWidth>1</bitWidth>
180052              <access>read-write</access>
180053              <enumeratedValues>
180054                <enumeratedValue>
180055                  <name>0</name>
180056                  <description>Write: no effect. Read: no line command active.</description>
180057                  <value>#0</value>
180058                </enumeratedValue>
180059                <enumeratedValue>
180060                  <name>1</name>
180061                  <description>Write: initiate line command indicated by bits 27-24. Read: line command active.</description>
180062                  <value>#1</value>
180063                </enumeratedValue>
180064              </enumeratedValues>
180065            </field>
180066            <field>
180067              <name>CACHEADDR</name>
180068              <description>Cache address</description>
180069              <bitOffset>2</bitOffset>
180070              <bitWidth>10</bitWidth>
180071              <access>read-write</access>
180072            </field>
180073            <field>
180074              <name>WSEL</name>
180075              <description>Way select</description>
180076              <bitOffset>14</bitOffset>
180077              <bitWidth>1</bitWidth>
180078              <access>read-write</access>
180079              <enumeratedValues>
180080                <enumeratedValue>
180081                  <name>0</name>
180082                  <description>Way 0</description>
180083                  <value>#0</value>
180084                </enumeratedValue>
180085                <enumeratedValue>
180086                  <name>1</name>
180087                  <description>Way 1</description>
180088                  <value>#1</value>
180089                </enumeratedValue>
180090              </enumeratedValues>
180091            </field>
180092            <field>
180093              <name>TDSEL</name>
180094              <description>Tag/Data Select</description>
180095              <bitOffset>16</bitOffset>
180096              <bitWidth>1</bitWidth>
180097              <access>read-write</access>
180098              <enumeratedValues>
180099                <enumeratedValue>
180100                  <name>0</name>
180101                  <description>Data</description>
180102                  <value>#0</value>
180103                </enumeratedValue>
180104                <enumeratedValue>
180105                  <name>1</name>
180106                  <description>Tag</description>
180107                  <value>#1</value>
180108                </enumeratedValue>
180109              </enumeratedValues>
180110            </field>
180111            <field>
180112              <name>LCIVB</name>
180113              <description>Line Command Initial Valid Bit</description>
180114              <bitOffset>20</bitOffset>
180115              <bitWidth>1</bitWidth>
180116              <access>read-only</access>
180117            </field>
180118            <field>
180119              <name>LCIMB</name>
180120              <description>Line Command Initial Modified Bit</description>
180121              <bitOffset>21</bitOffset>
180122              <bitWidth>1</bitWidth>
180123              <access>read-only</access>
180124            </field>
180125            <field>
180126              <name>LCWAY</name>
180127              <description>Line Command Way</description>
180128              <bitOffset>22</bitOffset>
180129              <bitWidth>1</bitWidth>
180130              <access>read-only</access>
180131            </field>
180132            <field>
180133              <name>LCMD</name>
180134              <description>Line Command</description>
180135              <bitOffset>24</bitOffset>
180136              <bitWidth>2</bitWidth>
180137              <access>read-write</access>
180138              <enumeratedValues>
180139                <enumeratedValue>
180140                  <name>00</name>
180141                  <description>Search and read or write</description>
180142                  <value>#00</value>
180143                </enumeratedValue>
180144                <enumeratedValue>
180145                  <name>01</name>
180146                  <description>Invalidate</description>
180147                  <value>#01</value>
180148                </enumeratedValue>
180149                <enumeratedValue>
180150                  <name>10</name>
180151                  <description>Push</description>
180152                  <value>#10</value>
180153                </enumeratedValue>
180154                <enumeratedValue>
180155                  <name>11</name>
180156                  <description>Clear</description>
180157                  <value>#11</value>
180158                </enumeratedValue>
180159              </enumeratedValues>
180160            </field>
180161            <field>
180162              <name>LADSEL</name>
180163              <description>Line Address Select</description>
180164              <bitOffset>26</bitOffset>
180165              <bitWidth>1</bitWidth>
180166              <access>read-write</access>
180167              <enumeratedValues>
180168                <enumeratedValue>
180169                  <name>0</name>
180170                  <description>Cache address</description>
180171                  <value>#0</value>
180172                </enumeratedValue>
180173                <enumeratedValue>
180174                  <name>1</name>
180175                  <description>Physical address</description>
180176                  <value>#1</value>
180177                </enumeratedValue>
180178              </enumeratedValues>
180179            </field>
180180            <field>
180181              <name>LACC</name>
180182              <description>Line access type</description>
180183              <bitOffset>27</bitOffset>
180184              <bitWidth>1</bitWidth>
180185              <access>read-write</access>
180186              <enumeratedValues>
180187                <enumeratedValue>
180188                  <name>0</name>
180189                  <description>Read</description>
180190                  <value>#0</value>
180191                </enumeratedValue>
180192                <enumeratedValue>
180193                  <name>1</name>
180194                  <description>Write</description>
180195                  <value>#1</value>
180196                </enumeratedValue>
180197              </enumeratedValues>
180198            </field>
180199          </fields>
180200        </register>
180201        <register>
180202          <name>PSCSAR</name>
180203          <description>Cache search address register</description>
180204          <addressOffset>0x808</addressOffset>
180205          <size>32</size>
180206          <access>read-write</access>
180207          <resetValue>0</resetValue>
180208          <resetMask>0xFFFFFFFF</resetMask>
180209          <fields>
180210            <field>
180211              <name>LGO</name>
180212              <description>Initiate Cache Line Command</description>
180213              <bitOffset>0</bitOffset>
180214              <bitWidth>1</bitWidth>
180215              <access>read-write</access>
180216              <enumeratedValues>
180217                <enumeratedValue>
180218                  <name>0</name>
180219                  <description>Write: no effect. Read: no line command active.</description>
180220                  <value>#0</value>
180221                </enumeratedValue>
180222                <enumeratedValue>
180223                  <name>1</name>
180224                  <description>Write: initiate line command indicated by bits CLCR[27:24]. Read: line command active.</description>
180225                  <value>#1</value>
180226                </enumeratedValue>
180227              </enumeratedValues>
180228            </field>
180229            <field>
180230              <name>PHYADDR</name>
180231              <description>Physical Address</description>
180232              <bitOffset>2</bitOffset>
180233              <bitWidth>30</bitWidth>
180234              <access>read-write</access>
180235            </field>
180236          </fields>
180237        </register>
180238        <register>
180239          <name>PSCCVR</name>
180240          <description>Cache read/write value register</description>
180241          <addressOffset>0x80C</addressOffset>
180242          <size>32</size>
180243          <access>read-write</access>
180244          <resetValue>0</resetValue>
180245          <resetMask>0xFFFFFFFF</resetMask>
180246          <fields>
180247            <field>
180248              <name>DATA</name>
180249              <description>Cache read/write Data</description>
180250              <bitOffset>0</bitOffset>
180251              <bitWidth>32</bitWidth>
180252              <access>read-write</access>
180253            </field>
180254          </fields>
180255        </register>
180256        <register>
180257          <name>PSCRMR</name>
180258          <description>Cache regions mode register</description>
180259          <addressOffset>0x820</addressOffset>
180260          <size>32</size>
180261          <access>read-write</access>
180262          <resetValue>0xAA0FA000</resetValue>
180263          <resetMask>0xFFFFFFFF</resetMask>
180264          <fields>
180265            <field>
180266              <name>R15</name>
180267              <description>Region 15 mode</description>
180268              <bitOffset>0</bitOffset>
180269              <bitWidth>2</bitWidth>
180270              <access>read-write</access>
180271              <enumeratedValues>
180272                <enumeratedValue>
180273                  <name>00</name>
180274                  <description>Non-cacheable</description>
180275                  <value>#00</value>
180276                </enumeratedValue>
180277                <enumeratedValue>
180278                  <name>01</name>
180279                  <description>Non-cacheable</description>
180280                  <value>#01</value>
180281                </enumeratedValue>
180282                <enumeratedValue>
180283                  <name>10</name>
180284                  <description>Write-through</description>
180285                  <value>#10</value>
180286                </enumeratedValue>
180287                <enumeratedValue>
180288                  <name>11</name>
180289                  <description>Write-back</description>
180290                  <value>#11</value>
180291                </enumeratedValue>
180292              </enumeratedValues>
180293            </field>
180294            <field>
180295              <name>R14</name>
180296              <description>Region 14 mode</description>
180297              <bitOffset>2</bitOffset>
180298              <bitWidth>2</bitWidth>
180299              <access>read-write</access>
180300              <enumeratedValues>
180301                <enumeratedValue>
180302                  <name>00</name>
180303                  <description>Non-cacheable</description>
180304                  <value>#00</value>
180305                </enumeratedValue>
180306                <enumeratedValue>
180307                  <name>01</name>
180308                  <description>Non-cacheable</description>
180309                  <value>#01</value>
180310                </enumeratedValue>
180311                <enumeratedValue>
180312                  <name>10</name>
180313                  <description>Write-through</description>
180314                  <value>#10</value>
180315                </enumeratedValue>
180316                <enumeratedValue>
180317                  <name>11</name>
180318                  <description>Write-back</description>
180319                  <value>#11</value>
180320                </enumeratedValue>
180321              </enumeratedValues>
180322            </field>
180323            <field>
180324              <name>R13</name>
180325              <description>Region 13 mode</description>
180326              <bitOffset>4</bitOffset>
180327              <bitWidth>2</bitWidth>
180328              <access>read-write</access>
180329              <enumeratedValues>
180330                <enumeratedValue>
180331                  <name>00</name>
180332                  <description>Non-cacheable</description>
180333                  <value>#00</value>
180334                </enumeratedValue>
180335                <enumeratedValue>
180336                  <name>01</name>
180337                  <description>Non-cacheable</description>
180338                  <value>#01</value>
180339                </enumeratedValue>
180340                <enumeratedValue>
180341                  <name>10</name>
180342                  <description>Write-through</description>
180343                  <value>#10</value>
180344                </enumeratedValue>
180345                <enumeratedValue>
180346                  <name>11</name>
180347                  <description>Write-back</description>
180348                  <value>#11</value>
180349                </enumeratedValue>
180350              </enumeratedValues>
180351            </field>
180352            <field>
180353              <name>R12</name>
180354              <description>Region 12 mode</description>
180355              <bitOffset>6</bitOffset>
180356              <bitWidth>2</bitWidth>
180357              <access>read-write</access>
180358              <enumeratedValues>
180359                <enumeratedValue>
180360                  <name>00</name>
180361                  <description>Non-cacheable</description>
180362                  <value>#00</value>
180363                </enumeratedValue>
180364                <enumeratedValue>
180365                  <name>01</name>
180366                  <description>Non-cacheable</description>
180367                  <value>#01</value>
180368                </enumeratedValue>
180369                <enumeratedValue>
180370                  <name>10</name>
180371                  <description>Write-through</description>
180372                  <value>#10</value>
180373                </enumeratedValue>
180374                <enumeratedValue>
180375                  <name>11</name>
180376                  <description>Write-back</description>
180377                  <value>#11</value>
180378                </enumeratedValue>
180379              </enumeratedValues>
180380            </field>
180381            <field>
180382              <name>R11</name>
180383              <description>Region 11 mode</description>
180384              <bitOffset>8</bitOffset>
180385              <bitWidth>2</bitWidth>
180386              <access>read-write</access>
180387              <enumeratedValues>
180388                <enumeratedValue>
180389                  <name>00</name>
180390                  <description>Non-cacheable</description>
180391                  <value>#00</value>
180392                </enumeratedValue>
180393                <enumeratedValue>
180394                  <name>01</name>
180395                  <description>Non-cacheable</description>
180396                  <value>#01</value>
180397                </enumeratedValue>
180398                <enumeratedValue>
180399                  <name>10</name>
180400                  <description>Write-through</description>
180401                  <value>#10</value>
180402                </enumeratedValue>
180403                <enumeratedValue>
180404                  <name>11</name>
180405                  <description>Write-back</description>
180406                  <value>#11</value>
180407                </enumeratedValue>
180408              </enumeratedValues>
180409            </field>
180410            <field>
180411              <name>R10</name>
180412              <description>Region 10 mode</description>
180413              <bitOffset>10</bitOffset>
180414              <bitWidth>2</bitWidth>
180415              <access>read-write</access>
180416              <enumeratedValues>
180417                <enumeratedValue>
180418                  <name>00</name>
180419                  <description>Non-cacheable</description>
180420                  <value>#00</value>
180421                </enumeratedValue>
180422                <enumeratedValue>
180423                  <name>01</name>
180424                  <description>Non-cacheable</description>
180425                  <value>#01</value>
180426                </enumeratedValue>
180427                <enumeratedValue>
180428                  <name>10</name>
180429                  <description>Write-through</description>
180430                  <value>#10</value>
180431                </enumeratedValue>
180432                <enumeratedValue>
180433                  <name>11</name>
180434                  <description>Write-back</description>
180435                  <value>#11</value>
180436                </enumeratedValue>
180437              </enumeratedValues>
180438            </field>
180439            <field>
180440              <name>R9</name>
180441              <description>Region 9 mode</description>
180442              <bitOffset>12</bitOffset>
180443              <bitWidth>2</bitWidth>
180444              <access>read-write</access>
180445              <enumeratedValues>
180446                <enumeratedValue>
180447                  <name>00</name>
180448                  <description>Non-cacheable</description>
180449                  <value>#00</value>
180450                </enumeratedValue>
180451                <enumeratedValue>
180452                  <name>01</name>
180453                  <description>Non-cacheable</description>
180454                  <value>#01</value>
180455                </enumeratedValue>
180456                <enumeratedValue>
180457                  <name>10</name>
180458                  <description>Write-through</description>
180459                  <value>#10</value>
180460                </enumeratedValue>
180461                <enumeratedValue>
180462                  <name>11</name>
180463                  <description>Write-back</description>
180464                  <value>#11</value>
180465                </enumeratedValue>
180466              </enumeratedValues>
180467            </field>
180468            <field>
180469              <name>R8</name>
180470              <description>Region 8 mode</description>
180471              <bitOffset>14</bitOffset>
180472              <bitWidth>2</bitWidth>
180473              <access>read-write</access>
180474              <enumeratedValues>
180475                <enumeratedValue>
180476                  <name>00</name>
180477                  <description>Non-cacheable</description>
180478                  <value>#00</value>
180479                </enumeratedValue>
180480                <enumeratedValue>
180481                  <name>01</name>
180482                  <description>Non-cacheable</description>
180483                  <value>#01</value>
180484                </enumeratedValue>
180485                <enumeratedValue>
180486                  <name>10</name>
180487                  <description>Write-through</description>
180488                  <value>#10</value>
180489                </enumeratedValue>
180490                <enumeratedValue>
180491                  <name>11</name>
180492                  <description>Write-back</description>
180493                  <value>#11</value>
180494                </enumeratedValue>
180495              </enumeratedValues>
180496            </field>
180497            <field>
180498              <name>R7</name>
180499              <description>Region 7 mode</description>
180500              <bitOffset>16</bitOffset>
180501              <bitWidth>2</bitWidth>
180502              <access>read-write</access>
180503              <enumeratedValues>
180504                <enumeratedValue>
180505                  <name>00</name>
180506                  <description>Non-cacheable</description>
180507                  <value>#00</value>
180508                </enumeratedValue>
180509                <enumeratedValue>
180510                  <name>01</name>
180511                  <description>Non-cacheable</description>
180512                  <value>#01</value>
180513                </enumeratedValue>
180514                <enumeratedValue>
180515                  <name>10</name>
180516                  <description>Write-through</description>
180517                  <value>#10</value>
180518                </enumeratedValue>
180519                <enumeratedValue>
180520                  <name>11</name>
180521                  <description>Write-back</description>
180522                  <value>#11</value>
180523                </enumeratedValue>
180524              </enumeratedValues>
180525            </field>
180526            <field>
180527              <name>R6</name>
180528              <description>Region 6 mode</description>
180529              <bitOffset>18</bitOffset>
180530              <bitWidth>2</bitWidth>
180531              <access>read-write</access>
180532              <enumeratedValues>
180533                <enumeratedValue>
180534                  <name>00</name>
180535                  <description>Non-cacheable</description>
180536                  <value>#00</value>
180537                </enumeratedValue>
180538                <enumeratedValue>
180539                  <name>01</name>
180540                  <description>Non-cacheable</description>
180541                  <value>#01</value>
180542                </enumeratedValue>
180543                <enumeratedValue>
180544                  <name>10</name>
180545                  <description>Write-through</description>
180546                  <value>#10</value>
180547                </enumeratedValue>
180548                <enumeratedValue>
180549                  <name>11</name>
180550                  <description>Write-back</description>
180551                  <value>#11</value>
180552                </enumeratedValue>
180553              </enumeratedValues>
180554            </field>
180555            <field>
180556              <name>R5</name>
180557              <description>Region 5 mode</description>
180558              <bitOffset>20</bitOffset>
180559              <bitWidth>2</bitWidth>
180560              <access>read-write</access>
180561              <enumeratedValues>
180562                <enumeratedValue>
180563                  <name>00</name>
180564                  <description>Non-cacheable</description>
180565                  <value>#00</value>
180566                </enumeratedValue>
180567                <enumeratedValue>
180568                  <name>01</name>
180569                  <description>Non-cacheable</description>
180570                  <value>#01</value>
180571                </enumeratedValue>
180572                <enumeratedValue>
180573                  <name>10</name>
180574                  <description>Write-through</description>
180575                  <value>#10</value>
180576                </enumeratedValue>
180577                <enumeratedValue>
180578                  <name>11</name>
180579                  <description>Write-back</description>
180580                  <value>#11</value>
180581                </enumeratedValue>
180582              </enumeratedValues>
180583            </field>
180584            <field>
180585              <name>R4</name>
180586              <description>Region 4 mode</description>
180587              <bitOffset>22</bitOffset>
180588              <bitWidth>2</bitWidth>
180589              <access>read-write</access>
180590              <enumeratedValues>
180591                <enumeratedValue>
180592                  <name>00</name>
180593                  <description>Non-cacheable</description>
180594                  <value>#00</value>
180595                </enumeratedValue>
180596                <enumeratedValue>
180597                  <name>01</name>
180598                  <description>Non-cacheable</description>
180599                  <value>#01</value>
180600                </enumeratedValue>
180601                <enumeratedValue>
180602                  <name>10</name>
180603                  <description>Write-through</description>
180604                  <value>#10</value>
180605                </enumeratedValue>
180606                <enumeratedValue>
180607                  <name>11</name>
180608                  <description>Write-back</description>
180609                  <value>#11</value>
180610                </enumeratedValue>
180611              </enumeratedValues>
180612            </field>
180613            <field>
180614              <name>R3</name>
180615              <description>Region 3 mode</description>
180616              <bitOffset>24</bitOffset>
180617              <bitWidth>2</bitWidth>
180618              <access>read-write</access>
180619              <enumeratedValues>
180620                <enumeratedValue>
180621                  <name>00</name>
180622                  <description>Non-cacheable</description>
180623                  <value>#00</value>
180624                </enumeratedValue>
180625                <enumeratedValue>
180626                  <name>01</name>
180627                  <description>Non-cacheable</description>
180628                  <value>#01</value>
180629                </enumeratedValue>
180630                <enumeratedValue>
180631                  <name>10</name>
180632                  <description>Write-through</description>
180633                  <value>#10</value>
180634                </enumeratedValue>
180635                <enumeratedValue>
180636                  <name>11</name>
180637                  <description>Write-back</description>
180638                  <value>#11</value>
180639                </enumeratedValue>
180640              </enumeratedValues>
180641            </field>
180642            <field>
180643              <name>R2</name>
180644              <description>Region 2 mode</description>
180645              <bitOffset>26</bitOffset>
180646              <bitWidth>2</bitWidth>
180647              <access>read-write</access>
180648              <enumeratedValues>
180649                <enumeratedValue>
180650                  <name>00</name>
180651                  <description>Non-cacheable</description>
180652                  <value>#00</value>
180653                </enumeratedValue>
180654                <enumeratedValue>
180655                  <name>01</name>
180656                  <description>Non-cacheable</description>
180657                  <value>#01</value>
180658                </enumeratedValue>
180659                <enumeratedValue>
180660                  <name>10</name>
180661                  <description>Write-through</description>
180662                  <value>#10</value>
180663                </enumeratedValue>
180664                <enumeratedValue>
180665                  <name>11</name>
180666                  <description>Write-back</description>
180667                  <value>#11</value>
180668                </enumeratedValue>
180669              </enumeratedValues>
180670            </field>
180671            <field>
180672              <name>R1</name>
180673              <description>Region 1 mode</description>
180674              <bitOffset>28</bitOffset>
180675              <bitWidth>2</bitWidth>
180676              <access>read-write</access>
180677              <enumeratedValues>
180678                <enumeratedValue>
180679                  <name>00</name>
180680                  <description>Non-cacheable</description>
180681                  <value>#00</value>
180682                </enumeratedValue>
180683                <enumeratedValue>
180684                  <name>01</name>
180685                  <description>Non-cacheable</description>
180686                  <value>#01</value>
180687                </enumeratedValue>
180688                <enumeratedValue>
180689                  <name>10</name>
180690                  <description>Write-through</description>
180691                  <value>#10</value>
180692                </enumeratedValue>
180693                <enumeratedValue>
180694                  <name>11</name>
180695                  <description>Write-back</description>
180696                  <value>#11</value>
180697                </enumeratedValue>
180698              </enumeratedValues>
180699            </field>
180700            <field>
180701              <name>R0</name>
180702              <description>Region 0 mode</description>
180703              <bitOffset>30</bitOffset>
180704              <bitWidth>2</bitWidth>
180705              <access>read-write</access>
180706              <enumeratedValues>
180707                <enumeratedValue>
180708                  <name>00</name>
180709                  <description>Non-cacheable</description>
180710                  <value>#00</value>
180711                </enumeratedValue>
180712                <enumeratedValue>
180713                  <name>01</name>
180714                  <description>Non-cacheable</description>
180715                  <value>#01</value>
180716                </enumeratedValue>
180717                <enumeratedValue>
180718                  <name>10</name>
180719                  <description>Write-through</description>
180720                  <value>#10</value>
180721                </enumeratedValue>
180722                <enumeratedValue>
180723                  <name>11</name>
180724                  <description>Write-back</description>
180725                  <value>#11</value>
180726                </enumeratedValue>
180727              </enumeratedValues>
180728            </field>
180729          </fields>
180730        </register>
180731      </registers>
180732    </peripheral>
180733  </peripherals>
180734</device>
180735