1 /*
2  * Copyright 2017-2020 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "evkbimxrt1050_flexspi_nor_config.h"
9 
10 /* Component ID definition, used by tools. */
11 #ifndef FSL_COMPONENT_ID
12 #define FSL_COMPONENT_ID "platform.drivers.xip_board"
13 #endif
14 
15 /*******************************************************************************
16  * Code
17  ******************************************************************************/
18 #if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
19 #if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
20 __attribute__((section(".boot_hdr.conf"), used))
21 #elif defined(__ICCARM__)
22 #pragma location = ".boot_hdr.conf"
23 #endif
24 
25 const flexspi_nor_config_t hyperflash_config = {
26     .memConfig =
27         {
28             .tag                = FLEXSPI_CFG_BLK_TAG,
29             .version            = FLEXSPI_CFG_BLK_VERSION,
30             .readSampleClkSrc   = kFlexSPIReadSampleClk_ExternalInputFromDqsPad,
31             .csHoldTime         = 3u,
32             .csSetupTime        = 3u,
33             .columnAddressWidth = 3u,
34             // Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
35             .controllerMiscOption =
36                 (1u << kFlexSpiMiscOffset_DdrModeEnable) | (1u << kFlexSpiMiscOffset_WordAddressableEnable) |
37                 (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable) | (1u << kFlexSpiMiscOffset_DiffClkEnable),
38             .sflashPadType = kSerialFlash_8Pads,
39             .serialClkFreq = kFlexSpiSerialClk_133MHz,
40             .sflashA1Size  = 64u * 1024u * 1024u,
41             .dataValidTime = {16u, 16u},
42             .lookupTable =
43                 {
44                     // Read LUTs
45                     FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
46                     FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06),
47                     FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
48                 },
49         },
50     .pageSize           = 512u,
51     .sectorSize         = 256u * 1024u,
52     .blockSize          = 256u * 1024u,
53     .isUniformBlockSize = true,
54 };
55 #endif /* XIP_BOOT_HEADER_ENABLE */
56