1 /**************************************************************************//**
2 * @file sc.h
3 * @version V1.00
4 * @brief M480 Smartcard (SC) driver header file
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 * @copyright (C) 2016-2020 Nuvoton Technology Corp. All rights reserved.
8 *****************************************************************************/
9 #ifndef __SC_H__
10 #define __SC_H__
11
12 #ifdef __cplusplus
13 extern "C"
14 {
15 #endif
16
17
18 /** @addtogroup Standard_Driver Standard Driver
19 @{
20 */
21
22 /** @addtogroup SC_Driver SC Driver
23 @{
24 */
25
26 /** @addtogroup SC_EXPORTED_CONSTANTS SC Exported Constants
27 @{
28 */
29 #define SC_INTERFACE_NUM 3 /*!< Smartcard interface numbers \hideinitializer */
30 #define SC_PIN_STATE_HIGH 1 /*!< Smartcard pin status high \hideinitializer */
31 #define SC_PIN_STATE_LOW 0 /*!< Smartcard pin status low \hideinitializer */
32 #define SC_PIN_STATE_IGNORE 0xFFFFFFFF /*!< Ignore pin status \hideinitializer */
33 #define SC_CLK_ON 1 /*!< Smartcard clock on \hideinitializer */
34 #define SC_CLK_OFF 0 /*!< Smartcard clock off \hideinitializer */
35
36 #define SC_TMR_MODE_0 (0ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 0, down count \hideinitializer */
37 #define SC_TMR_MODE_1 (1ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 1, down count, start after detect start bit \hideinitializer */
38 #define SC_TMR_MODE_2 (2ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 2, down count, start after receive start bit \hideinitializer */
39 #define SC_TMR_MODE_3 (3ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 3, down count, use for activation, only timer 0 support this mode \hideinitializer */
40 #define SC_TMR_MODE_4 (4ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 4, down count with reload after timeout \hideinitializer */
41 #define SC_TMR_MODE_5 (5ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 5, down count, start after detect start bit, reload after timeout \hideinitializer */
42 #define SC_TMR_MODE_6 (6ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 6, down count, start after receive start bit, reload after timeout \hideinitializer */
43 #define SC_TMR_MODE_7 (7ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 7, down count, start and reload after detect start bit \hideinitializer */
44 #define SC_TMR_MODE_8 (8ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 8, up count \hideinitializer */
45 #define SC_TMR_MODE_F (0xF << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 15, down count, reload after detect start bit \hideinitializer */
46
47
48 /*@}*/ /* end of group SC_EXPORTED_CONSTANTS */
49
50
51 /** @addtogroup SC_EXPORTED_FUNCTIONS SC Exported Functions
52 @{
53 */
54
55 /**
56 * @brief This macro enable smartcard interrupt
57 * @param[in] sc Base address of smartcard module
58 * @param[in] u32Mask Interrupt mask to be enabled. A combination of
59 * - \ref SC_INTEN_ACERRIEN_Msk
60 * - \ref SC_INTEN_RXTOIEN_Msk
61 * - \ref SC_INTEN_INITIEN_Msk
62 * - \ref SC_INTEN_CDIEN_Msk
63 * - \ref SC_INTEN_BGTIEN_Msk
64 * - \ref SC_INTEN_TMR2IEN_Msk
65 * - \ref SC_INTEN_TMR1IEN_Msk
66 * - \ref SC_INTEN_TMR0IEN_Msk
67 * - \ref SC_INTEN_TERRIEN_Msk
68 * - \ref SC_INTEN_TBEIEN_Msk
69 * - \ref SC_INTEN_RDAIEN_Msk
70 * @return None
71 * \hideinitializer
72 */
73 #define SC_ENABLE_INT(sc, u32Mask) ((sc)->INTEN |= (u32Mask))
74
75 /**
76 * @brief This macro disable smartcard interrupt
77 * @param[in] sc Base address of smartcard module
78 * @param[in] u32Mask Interrupt mask to be disabled. A combination of
79 * - \ref SC_INTEN_ACERRIEN_Msk
80 * - \ref SC_INTEN_RXTOIEN_Msk
81 * - \ref SC_INTEN_INITIEN_Msk
82 * - \ref SC_INTEN_CDIEN_Msk
83 * - \ref SC_INTEN_BGTIEN_Msk
84 * - \ref SC_INTEN_TMR2IEN_Msk
85 * - \ref SC_INTEN_TMR1IEN_Msk
86 * - \ref SC_INTEN_TMR0IEN_Msk
87 * - \ref SC_INTEN_TERRIEN_Msk
88 * - \ref SC_INTEN_TBEIEN_Msk
89 * - \ref SC_INTEN_RDAIEN_Msk
90 * @return None
91 * \hideinitializer
92 */
93 #define SC_DISABLE_INT(sc, u32Mask) ((sc)->INTEN &= ~(u32Mask))
94
95 /**
96 * @brief This macro set VCC pin state of smartcard interface
97 * @param[in] sc Base address of smartcard module
98 * @param[in] u32State Pin state of VCC pin, valid parameters are \ref SC_PIN_STATE_HIGH and \ref SC_PIN_STATE_LOW
99 * @return None
100 * \hideinitializer
101 */
102 #define SC_SET_VCC_PIN(sc, u32State) \
103 do {\
104 while((sc)->PINCTL & SC_PINCTL_SYNC_Msk);\
105 if(u32State)\
106 (sc)->PINCTL |= SC_PINCTL_PWREN_Msk;\
107 else\
108 (sc)->PINCTL &= ~SC_PINCTL_PWREN_Msk;\
109 }while(0)
110
111
112 /**
113 * @brief This macro turns CLK output on or off
114 * @param[in] sc Base address of smartcard module
115 * @param[in] u32OnOff Clock on or off for selected smartcard module, valid values are \ref SC_CLK_ON and \ref SC_CLK_OFF
116 * @return None
117 * \hideinitializer
118 */
119 #define SC_SET_CLK_PIN(sc, u32OnOff)\
120 do {\
121 while((sc)->PINCTL & SC_PINCTL_SYNC_Msk);\
122 if(u32OnOff)\
123 (sc)->PINCTL |= SC_PINCTL_CLKKEEP_Msk;\
124 else\
125 (sc)->PINCTL &= ~(SC_PINCTL_CLKKEEP_Msk);\
126 }while(0)
127
128 /**
129 * @brief This macro set I/O pin state of smartcard interface
130 * @param[in] sc Base address of smartcard module
131 * @param[in] u32State Pin state of I/O pin, valid parameters are \ref SC_PIN_STATE_HIGH and \ref SC_PIN_STATE_LOW
132 * @return None
133 * \hideinitializer
134 */
135 #define SC_SET_IO_PIN(sc, u32State)\
136 do {\
137 while((sc)->PINCTL & SC_PINCTL_SYNC_Msk);\
138 if(u32State)\
139 (sc)->PINCTL |= SC_PINCTL_SCDATA_Msk;\
140 else\
141 (sc)->PINCTL &= ~SC_PINCTL_SCDATA_Msk;\
142 }while(0)
143
144 /**
145 * @brief This macro set RST pin state of smartcard interface
146 * @param[in] sc Base address of smartcard module
147 * @param[in] u32State Pin state of RST pin, valid parameters are \ref SC_PIN_STATE_HIGH and \ref SC_PIN_STATE_LOW
148 * @return None
149 * \hideinitializer
150 */
151 #define SC_SET_RST_PIN(sc, u32State)\
152 do {\
153 while((sc)->PINCTL & SC_PINCTL_SYNC_Msk);\
154 if(u32State)\
155 (sc)->PINCTL |= SC_PINCTL_RSTEN_Msk;\
156 else\
157 (sc)->PINCTL &= ~SC_PINCTL_RSTEN_Msk;\
158 }while(0)
159
160 /**
161 * @brief This macro read one byte from smartcard module receive FIFO
162 * @param[in] sc Base address of smartcard module
163 * @return One byte read from receive FIFO
164 * \hideinitializer
165 */
166 #define SC_READ(sc) ((char)((sc)->DAT))
167
168 /**
169 * @brief This macro write one byte to smartcard module transmit FIFO
170 * @param[in] sc Base address of smartcard module
171 * @param[in] u8Data Data to write to transmit FIFO
172 * @return None
173 * \hideinitializer
174 */
175 #define SC_WRITE(sc, u8Data) ((sc)->DAT = (u8Data))
176
177 /**
178 * @brief This macro set smartcard stop bit length
179 * @param[in] sc Base address of smartcard module
180 * @param[in] u32Len Stop bit length, ether 1 or 2.
181 * @return None
182 * @details Stop bit length must be 1 for T = 1 protocol and 2 for T = 0 protocol.
183 * \hideinitializer
184 */
185 #define SC_SET_STOP_BIT_LEN(sc, u32Len) ((sc)->CTL = ((sc)->CTL & ~SC_CTL_NSB_Msk) | ((u32Len) == 1 ? SC_CTL_NSB_Msk : 0))
186
187 /* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
188 __STATIC_INLINE void SC_SetTxRetry(SC_T *sc, uint32_t u32Count);
189 __STATIC_INLINE void SC_SetRxRetry(SC_T *sc, uint32_t u32Count);
190
191 /**
192 * @brief Enable/Disable Tx error retry, and set Tx error retry count
193 * @param[in] sc Base address of smartcard module
194 * @param[in] u32Count The number of times of Tx error retry count, between 0~8. 0 means disable Tx error retry
195 * @return None
196 */
SC_SetTxRetry(SC_T * sc,uint32_t u32Count)197 __STATIC_INLINE void SC_SetTxRetry(SC_T *sc, uint32_t u32Count)
198 {
199 while((sc)->CTL & SC_CTL_SYNC_Msk)
200 {
201 ;
202 }
203 /* Retry count must set while enable bit disabled, so disable it first */
204 (sc)->CTL &= ~(SC_CTL_TXRTY_Msk | SC_CTL_TXRTYEN_Msk);
205
206 if((u32Count) != 0UL)
207 {
208 while((sc)->CTL & SC_CTL_SYNC_Msk)
209 {
210 ;
211 }
212 (sc)->CTL |= (((u32Count) - 1UL) << SC_CTL_TXRTY_Pos) | SC_CTL_TXRTYEN_Msk;
213 }
214 }
215
216 /**
217 * @brief Enable/Disable Rx error retry, and set Rx error retry count
218 * @param[in] sc Base address of smartcard module
219 * @param[in] u32Count The number of times of Rx error retry count, between 0~8. 0 means disable Rx error retry
220 * @return None
221 */
SC_SetRxRetry(SC_T * sc,uint32_t u32Count)222 __STATIC_INLINE void SC_SetRxRetry(SC_T *sc, uint32_t u32Count)
223 {
224 while((sc)->CTL & SC_CTL_SYNC_Msk)
225 {
226 ;
227 }
228 /* Retry count must set while enable bit disabled, so disable it first */
229 (sc)->CTL &= ~(SC_CTL_RXRTY_Msk | SC_CTL_RXRTYEN_Msk);
230
231 if((u32Count) != 0UL)
232 {
233 while((sc)->CTL & SC_CTL_SYNC_Msk)
234 {
235 ;
236 }
237 (sc)->CTL |= (((u32Count) - 1UL) << SC_CTL_RXRTY_Pos) | SC_CTL_RXRTYEN_Msk;
238 }
239
240 }
241
242
243 uint32_t SC_IsCardInserted(SC_T *sc);
244 void SC_ClearFIFO(SC_T *sc);
245 void SC_Close(SC_T *sc);
246 void SC_Open(SC_T *sc, uint32_t u32CardDet, uint32_t u32PWR);
247 void SC_ResetReader(SC_T *sc);
248 void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT);
249 void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT);
250 void SC_StopAllTimer(SC_T *sc);
251 void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount);
252 void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum);
253 uint32_t SC_GetInterfaceClock(SC_T *sc);
254
255
256 /*@}*/ /* end of group SC_EXPORTED_FUNCTIONS */
257
258 /*@}*/ /* end of group SC_Driver */
259
260 /*@}*/ /* end of group Standard_Driver */
261
262 #ifdef __cplusplus
263 }
264 #endif
265
266 #endif /* __SC_H__ */
267
268 /*** (C) COPYRIGHT 2017 Nuvoton Technology Corp. ***/
269
