1 /**************************************************************************//** 2 * @file pdma.h 3 * @version V1.00 4 * @brief M480 series PDMA driver header file 5 * 6 * SPDX-License-Identifier: Apache-2.0 7 * @copyright (C) 2016-2020 Nuvoton Technology Corp. All rights reserved. 8 *****************************************************************************/ 9 #ifndef __PDMA_H__ 10 #define __PDMA_H__ 11 12 #ifdef __cplusplus 13 extern "C" 14 { 15 #endif 16 17 18 /** @addtogroup Standard_Driver Standard Driver 19 @{ 20 */ 21 22 /** @addtogroup PDMA_Driver PDMA Driver 23 @{ 24 */ 25 26 /** @addtogroup PDMA_EXPORTED_CONSTANTS PDMA Exported Constants 27 @{ 28 */ 29 #define PDMA_CH_MAX 16UL /*!< Specify Maximum Channels of PDMA \hideinitializer */ 30 31 /*---------------------------------------------------------------------------------------------------------*/ 32 /* Operation Mode Constant Definitions */ 33 /*---------------------------------------------------------------------------------------------------------*/ 34 #define PDMA_OP_STOP 0x00000000UL /*!<DMA Stop Mode \hideinitializer */ 35 #define PDMA_OP_BASIC 0x00000001UL /*!<DMA Basic Mode \hideinitializer */ 36 #define PDMA_OP_SCATTER 0x00000002UL /*!<DMA Scatter-gather Mode \hideinitializer */ 37 38 /*---------------------------------------------------------------------------------------------------------*/ 39 /* Data Width Constant Definitions */ 40 /*---------------------------------------------------------------------------------------------------------*/ 41 #define PDMA_WIDTH_8 0x00000000UL /*!<DMA Transfer Width 8-bit \hideinitializer */ 42 #define PDMA_WIDTH_16 0x00001000UL /*!<DMA Transfer Width 16-bit \hideinitializer */ 43 #define PDMA_WIDTH_32 0x00002000UL /*!<DMA Transfer Width 32-bit \hideinitializer */ 44 45 /*---------------------------------------------------------------------------------------------------------*/ 46 /* Address Attribute Constant Definitions */ 47 /*---------------------------------------------------------------------------------------------------------*/ 48 #define PDMA_SAR_INC 0x00000000UL /*!<DMA SAR increment \hideinitializer */ 49 #define PDMA_SAR_FIX 0x00000300UL /*!<DMA SAR fix address \hideinitializer */ 50 #define PDMA_DAR_INC 0x00000000UL /*!<DMA DAR increment \hideinitializer */ 51 #define PDMA_DAR_FIX 0x00000C00UL /*!<DMA DAR fix address \hideinitializer */ 52 53 /*---------------------------------------------------------------------------------------------------------*/ 54 /* Burst Mode Constant Definitions */ 55 /*---------------------------------------------------------------------------------------------------------*/ 56 #define PDMA_REQ_SINGLE 0x00000004UL /*!<DMA Single Request \hideinitializer */ 57 #define PDMA_REQ_BURST 0x00000000UL /*!<DMA Burst Request \hideinitializer */ 58 59 #define PDMA_BURST_128 0x00000000UL /*!<DMA Burst 128 Transfers \hideinitializer */ 60 #define PDMA_BURST_64 0x00000010UL /*!<DMA Burst 64 Transfers \hideinitializer */ 61 #define PDMA_BURST_32 0x00000020UL /*!<DMA Burst 32 Transfers \hideinitializer */ 62 #define PDMA_BURST_16 0x00000030UL /*!<DMA Burst 16 Transfers \hideinitializer */ 63 #define PDMA_BURST_8 0x00000040UL /*!<DMA Burst 8 Transfers \hideinitializer */ 64 #define PDMA_BURST_4 0x00000050UL /*!<DMA Burst 4 Transfers \hideinitializer */ 65 #define PDMA_BURST_2 0x00000060UL /*!<DMA Burst 2 Transfers \hideinitializer */ 66 #define PDMA_BURST_1 0x00000070UL /*!<DMA Burst 1 Transfers \hideinitializer */ 67 68 /*---------------------------------------------------------------------------------------------------------*/ 69 /* Table Interrupt Disable Constant Definitions */ 70 /*---------------------------------------------------------------------------------------------------------*/ 71 #define PDMA_TBINTDIS_ENABLE (0x0UL<<PDMA_DSCT_CTL_TBINTDIS_Pos) /*!<DMA Table Interrupt Enabled \hideinitializer */ 72 #define PDMA_TBINTDIS_DISABLE (0x1UL<<PDMA_DSCT_CTL_TBINTDIS_Pos) /*!<DMA Table Interrupt Disabled \hideinitializer */ 73 74 /*---------------------------------------------------------------------------------------------------------*/ 75 /* Peripheral Transfer Mode Constant Definitions */ 76 /*---------------------------------------------------------------------------------------------------------*/ 77 #define PDMA_MEM 0UL /*!<DMA Connect to Memory \hideinitializer */ 78 #define PDMA_USB_TX 2UL /*!<DMA Connect to USB_TX \hideinitializer */ 79 #define PDMA_USB_RX 3UL /*!<DMA Connect to USB_RX \hideinitializer */ 80 #define PDMA_UART0_TX 4UL /*!<DMA Connect to UART0_TX \hideinitializer */ 81 #define PDMA_UART0_RX 5UL /*!<DMA Connect to UART0_RX \hideinitializer */ 82 #define PDMA_UART1_TX 6UL /*!<DMA Connect to UART1_TX \hideinitializer */ 83 #define PDMA_UART1_RX 7UL /*!<DMA Connect to UART1_RX \hideinitializer */ 84 #define PDMA_UART2_TX 8UL /*!<DMA Connect to UART2_TX \hideinitializer */ 85 #define PDMA_UART2_RX 9UL /*!<DMA Connect to UART2_RX \hideinitializer */ 86 #define PDMA_UART3_TX 10UL /*!<DMA Connect to UART3_TX \hideinitializer */ 87 #define PDMA_UART3_RX 11UL /*!<DMA Connect to UART3_RX \hideinitializer */ 88 #define PDMA_UART4_TX 12UL /*!<DMA Connect to UART4_TX \hideinitializer */ 89 #define PDMA_UART4_RX 13UL /*!<DMA Connect to UART4_RX \hideinitializer */ 90 #define PDMA_UART5_TX 14UL /*!<DMA Connect to UART5_TX \hideinitializer */ 91 #define PDMA_UART5_RX 15UL /*!<DMA Connect to UART5_RX \hideinitializer */ 92 #define PDMA_USCI0_TX 16UL /*!<DMA Connect to USCI0_TX \hideinitializer */ 93 #define PDMA_USCI0_RX 17UL /*!<DMA Connect to USCI0_RX \hideinitializer */ 94 #define PDMA_USCI1_TX 18UL /*!<DMA Connect to USCI1_TX \hideinitializer */ 95 #define PDMA_USCI1_RX 19UL /*!<DMA Connect to USCI1_RX \hideinitializer */ 96 #define PDMA_QSPI0_TX 20UL /*!<DMA Connect to QSPI0_TX \hideinitializer */ 97 #define PDMA_QSPI0_RX 21UL /*!<DMA Connect to QSPI0_RX \hideinitializer */ 98 #define PDMA_SPI0_TX 22UL /*!<DMA Connect to SPI0_TX \hideinitializer */ 99 #define PDMA_SPI0_RX 23UL /*!<DMA Connect to SPI0_RX \hideinitializer */ 100 #define PDMA_SPI1_TX 24UL /*!<DMA Connect to SPI1_TX \hideinitializer */ 101 #define PDMA_SPI1_RX 25UL /*!<DMA Connect to SPI1_RX \hideinitializer */ 102 #define PDMA_SPI2_TX 26UL /*!<DMA Connect to SPI2_TX \hideinitializer */ 103 #define PDMA_SPI2_RX 27UL /*!<DMA Connect to SPI2_RX \hideinitializer */ 104 #define PDMA_SPI3_TX 28UL /*!<DMA Connect to SPI3_TX \hideinitializer */ 105 #define PDMA_SPI3_RX 29UL /*!<DMA Connect to SPI3_RX \hideinitializer */ 106 #define PDMA_QSPI1_TX 30UL /*!<DMA Connect to QSPI1_TX \hideinitializer */ 107 #define PDMA_QSPI1_RX 31UL /*!<DMA Connect to QSPI1_RX \hideinitializer */ 108 #define PDMA_EPWM0_P1_RX 32UL /*!<DMA Connect to EPWM0_P1 \hideinitializer */ 109 #define PDMA_EPWM0_P2_RX 33UL /*!<DMA Connect to EPWM0_P2 \hideinitializer */ 110 #define PDMA_EPWM0_P3_RX 34UL /*!<DMA Connect to EPWM0_P3 \hideinitializer */ 111 #define PDMA_EPWM1_P1_RX 35UL /*!<DMA Connect to EPWM1_P1 \hideinitializer */ 112 #define PDMA_EPWM1_P2_RX 36UL /*!<DMA Connect to EPWM1_P2 \hideinitializer */ 113 #define PDMA_EPWM1_P3_RX 37UL /*!<DMA Connect to PWM1_P3 \hideinitializer */ 114 #define PDMA_I2C0_TX 38UL /*!<DMA Connect to I2C0_TX \hideinitializer */ 115 #define PDMA_I2C0_RX 39UL /*!<DMA Connect to I2C0_RX \hideinitializer */ 116 #define PDMA_I2C1_TX 40UL /*!<DMA Connect to I2C1_TX \hideinitializer */ 117 #define PDMA_I2C1_RX 41UL /*!<DMA Connect to I2C1_RX \hideinitializer */ 118 #define PDMA_I2C2_TX 42UL /*!<DMA Connect to I2C2_TX \hideinitializer */ 119 #define PDMA_I2C2_RX 43UL /*!<DMA Connect to I2C2_RX \hideinitializer */ 120 #define PDMA_I2S0_TX 44UL /*!<DMA Connect to I2S0_TX \hideinitializer */ 121 #define PDMA_I2S0_RX 45UL /*!<DMA Connect to I2S0_RX \hideinitializer */ 122 #define PDMA_TMR0 46UL /*!<DMA Connect to TMR0 \hideinitializer */ 123 #define PDMA_TMR1 47UL /*!<DMA Connect to TMR1 \hideinitializer */ 124 #define PDMA_TMR2 48UL /*!<DMA Connect to TMR2 \hideinitializer */ 125 #define PDMA_TMR3 49UL /*!<DMA Connect to TMR3 \hideinitializer */ 126 #define PDMA_EADC0_RX 50UL /*!<DMA Connect to EADC0_RX \hideinitializer */ 127 #define PDMA_DAC0_TX 51UL /*!<DMA Connect to DAC0_TX \hideinitializer */ 128 #define PDMA_DAC1_TX 52UL /*!<DMA Connect to DAC1_TX \hideinitializer */ 129 #define PDMA_EPWM0_CH0_TX 53UL /*!<DMA Connect to EPWM0_CH0_TX \hideinitializer */ 130 #define PDMA_EPWM0_CH1_TX 54UL /*!<DMA Connect to EPWM0_CH1_TX \hideinitializer */ 131 #define PDMA_EPWM0_CH2_TX 55UL /*!<DMA Connect to EPWM0_CH2_TX \hideinitializer */ 132 #define PDMA_EPWM0_CH3_TX 56UL /*!<DMA Connect to EPWM0_CH3_TX \hideinitializer */ 133 #define PDMA_EPWM0_CH4_TX 57UL /*!<DMA Connect to EPWM0_CH4_TX \hideinitializer */ 134 #define PDMA_EPWM0_CH5_TX 58UL /*!<DMA Connect to EPWM0_CH5_TX \hideinitializer */ 135 #define PDMA_EPWM1_CH0_TX 59UL /*!<DMA Connect to EPWM1_CH0_TX \hideinitializer */ 136 #define PDMA_EPWM1_CH1_TX 60UL /*!<DMA Connect to EPWM1_CH1_TX \hideinitializer */ 137 #define PDMA_EPWM1_CH2_TX 61UL /*!<DMA Connect to EPWM1_CH2_TX \hideinitializer */ 138 #define PDMA_EPWM1_CH3_TX 62UL /*!<DMA Connect to EPWM1_CH3_TX \hideinitializer */ 139 #define PDMA_EPWM1_CH4_TX 63UL /*!<DMA Connect to EPWM1_CH4_TX \hideinitializer */ 140 #define PDMA_EPWM1_CH5_TX 64UL /*!<DMA Connect to EPWM1_CH5_TX \hideinitializer */ 141 #define PDMA_UART6_TX 66UL /*!<DMA Connect to UART6_TX \hideinitializer */ 142 #define PDMA_UART6_RX 67UL /*!<DMA Connect to UART6_RX \hideinitializer */ 143 #define PDMA_UART7_TX 68UL /*!<DMA Connect to UART7_TX \hideinitializer */ 144 #define PDMA_UART7_RX 69UL /*!<DMA Connect to UART7_RX \hideinitializer */ 145 #define PDMA_EADC1_RX 70UL /*!<DMA Connect to EADC1_RX \hideinitializer */ 146 /*---------------------------------------------------------------------------------------------------------*/ 147 /* Interrupt Type Constant Definitions */ 148 /*---------------------------------------------------------------------------------------------------------*/ 149 #define PDMA_INT_TRANS_DONE 0x00000000UL /*!<Transfer Done Interrupt \hideinitializer */ 150 #define PDMA_INT_TEMPTY 0x00000001UL /*!<Table Empty Interrupt \hideinitializer */ 151 #define PDMA_INT_TIMEOUT 0x00000002UL /*!<Timeout Interrupt \hideinitializer */ 152 153 154 /*@}*/ /* end of group PDMA_EXPORTED_CONSTANTS */ 155 156 /** @addtogroup PDMA_EXPORTED_FUNCTIONS PDMA Exported Functions 157 @{ 158 */ 159 160 /** 161 * @brief Get PDMA Interrupt Status 162 * 163 * @param[in] pdma The pointer of the specified PDMA module 164 * 165 * @return None 166 * 167 * @details This macro gets the interrupt status. 168 * \hideinitializer 169 */ 170 #define PDMA_GET_INT_STATUS(pdma) ((uint32_t)(pdma->INTSTS)) 171 172 /** 173 * @brief Get Transfer Done Interrupt Status 174 * 175 * @param[in] pdma The pointer of the specified PDMA module 176 * 177 * @return None 178 * 179 * @details Get the transfer done Interrupt status. 180 * \hideinitializer 181 */ 182 #define PDMA_GET_TD_STS(pdma) ((uint32_t)(pdma->TDSTS)) 183 184 /** 185 * @brief Clear Transfer Done Interrupt Status 186 * 187 * @param[in] pdma The pointer of the specified PDMA module 188 * 189 * @param[in] u32Mask The channel mask 190 * 191 * @return None 192 * 193 * @details Clear the transfer done Interrupt status. 194 * \hideinitializer 195 */ 196 #define PDMA_CLR_TD_FLAG(pdma,u32Mask) ((uint32_t)(pdma->TDSTS = (u32Mask))) 197 198 /** 199 * @brief Get Target Abort Interrupt Status 200 * 201 * @param[in] pdma The pointer of the specified PDMA module 202 * 203 * @return None 204 * 205 * @details Get the target abort Interrupt status. 206 * \hideinitializer 207 */ 208 #define PDMA_GET_ABORT_STS(pdma) ((uint32_t)(pdma->ABTSTS)) 209 210 /** 211 * @brief Clear Target Abort Interrupt Status 212 * 213 * @param[in] pdma The pointer of the specified PDMA module 214 * 215 * @param[in] u32Mask The channel mask 216 * 217 * @return None 218 * 219 * @details Clear the target abort Interrupt status. 220 * \hideinitializer 221 */ 222 #define PDMA_CLR_ABORT_FLAG(pdma,u32Mask) ((uint32_t)(pdma->ABTSTS = (u32Mask))) 223 224 /** 225 * @brief Get Alignment Interrupt Status 226 * 227 * @param[in] pdma The pointer of the specified PDMA module 228 * 229 * @return None 230 * 231 * @details Get Alignment Interrupt status. 232 * \hideinitializer 233 */ 234 #define PDMA_GET_ALIGN_STS(pdma) ((uint32_t)(PDMA->ALIGN)) 235 236 /** 237 * @brief Clear Alignment Interrupt Status 238 * 239 * @param[in] pdma The pointer of the specified PDMA module 240 * @param[in] u32Mask The channel mask 241 * 242 * @return None 243 * 244 * @details Clear the Alignment Interrupt status. 245 * \hideinitializer 246 */ 247 #define PDMA_CLR_ALIGN_FLAG(pdma,u32Mask) ((uint32_t)(pdma->ALIGN = (u32Mask))) 248 249 /** 250 * @brief Clear Timeout Interrupt Status 251 * 252 * @param[in] pdma The pointer of the specified PDMA module 253 * @param[in] u32Ch The selected channel 254 * 255 * @return None 256 * 257 * @details Clear the selected channel timeout interrupt status. 258 * \hideinitializer 259 */ 260 #define PDMA_CLR_TMOUT_FLAG(pdma,u32Ch) ((uint32_t)(pdma->INTSTS = (1 << ((u32Ch) + 8)))) 261 262 /** 263 * @brief Check Channel Status 264 * 265 * @param[in] pdma The pointer of the specified PDMA module 266 * @param[in] u32Ch The selected channel 267 * 268 * @retval 0 Idle state 269 * @retval 1 Busy state 270 * 271 * @details Check the selected channel is busy or not. 272 * \hideinitializer 273 */ 274 #define PDMA_IS_CH_BUSY(pdma,u32Ch) ((uint32_t)(pdma->TRGSTS & (1 << (u32Ch)))? 1 : 0) 275 276 /** 277 * @brief Set Source Address 278 * 279 * @param[in] pdma The pointer of the specified PDMA module 280 * @param[in] u32Ch The selected channel 281 * @param[in] u32Addr The selected address 282 * 283 * @return None 284 * 285 * @details This macro set the selected channel source address. 286 * \hideinitializer 287 */ 288 #define PDMA_SET_SRC_ADDR(pdma,u32Ch, u32Addr) ((uint32_t)(pdma->DSCT[(u32Ch)].SA = (u32Addr))) 289 290 /** 291 * @brief Set Destination Address 292 * 293 * @param[in] pdma The pointer of the specified PDMA module 294 * @param[in] u32Ch The selected channel 295 * @param[in] u32Addr The selected address 296 * 297 * @return None 298 * 299 * @details This macro set the selected channel destination address. 300 * \hideinitializer 301 */ 302 #define PDMA_SET_DST_ADDR(pdma,u32Ch, u32Addr) ((uint32_t)(pdma->DSCT[(u32Ch)].DA = (u32Addr))) 303 304 /** 305 * @brief Set Transfer Count 306 * 307 * @param[in] pdma The pointer of the specified PDMA module 308 * @param[in] u32Ch The selected channel 309 * @param[in] u32TransCount Transfer Count 310 * 311 * @return None 312 * 313 * @details This macro set the selected channel transfer count. 314 * \hideinitializer 315 */ 316 #define PDMA_SET_TRANS_CNT(pdma,u32Ch, u32TransCount) ((uint32_t)(pdma->DSCT[(u32Ch)].CTL=(pdma->DSCT[(u32Ch)].CTL&~PDMA_DSCT_CTL_TXCNT_Msk)|(((u32TransCount)-1) << PDMA_DSCT_CTL_TXCNT_Pos))) 317 318 /** 319 * @brief Set Scatter-gather descriptor Address 320 * 321 * @param[in] pdma The pointer of the specified PDMA module 322 * @param[in] u32Ch The selected channel 323 * @param[in] u32Addr The descriptor address 324 * 325 * @return None 326 * 327 * @details This macro set the selected channel scatter-gather descriptor address. 328 * \hideinitializer 329 */ 330 #define PDMA_SET_SCATTER_DESC(pdma,u32Ch, u32Addr) ((uint32_t)(pdma->DSCT[(u32Ch)].NEXT = (u32Addr) - (pdma->SCATBA))) 331 332 /** 333 * @brief Stop the channel 334 * 335 * @param[in] pdma The pointer of the specified PDMA module 336 * 337 * @param[in] u32Ch The selected channel 338 * 339 * @return None 340 * 341 * @details This macro stop the selected channel. 342 * \hideinitializer 343 */ 344 #define PDMA_STOP(pdma,u32Ch) ((uint32_t)(pdma->PAUSE = (1 << (u32Ch)))) 345 346 /** 347 * @brief Pause the channel 348 * 349 * @param[in] pdma The pointer of the specified PDMA module 350 * 351 * @param[in] u32Ch The selected channel 352 * 353 * @return None 354 * 355 * @details This macro pause the selected channel. 356 * \hideinitializer 357 */ 358 #define PDMA_PAUSE(pdma,u32Ch) ((uint32_t)(pdma->PAUSE = (1 << (u32Ch)))) 359 360 /*---------------------------------------------------------------------------------------------------------*/ 361 /* Define PDMA functions prototype */ 362 /*---------------------------------------------------------------------------------------------------------*/ 363 void PDMA_Open(PDMA_T * pdma,uint32_t u32Mask); 364 void PDMA_Close(PDMA_T * pdma); 365 void PDMA_SetTransferCnt(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount); 366 void PDMA_SetTransferAddr(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl); 367 void PDMA_SetTransferMode(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr); 368 void PDMA_SetBurstType(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize); 369 void PDMA_EnableTimeout(PDMA_T * pdma,uint32_t u32Mask); 370 void PDMA_DisableTimeout(PDMA_T * pdma,uint32_t u32Mask); 371 void PDMA_SetTimeOut(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32OnOff, uint32_t u32TimeOutCnt); 372 void PDMA_Trigger(PDMA_T * pdma,uint32_t u32Ch); 373 void PDMA_EnableInt(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32Mask); 374 void PDMA_DisableInt(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32Mask); 375 void PDMA_SetStride(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32DestLen, uint32_t u32SrcLen, uint32_t u32TransCount); 376 void PDMA_SetRepeat(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32DestInterval, uint32_t u32SrcInterval, uint32_t u32RepeatCount); 377 378 379 /*@}*/ /* end of group PDMA_EXPORTED_FUNCTIONS */ 380 381 /*@}*/ /* end of group PDMA_Driver */ 382 383 /*@}*/ /* end of group Standard_Driver */ 384 385 #ifdef __cplusplus 386 } 387 #endif 388 389 #endif /* __PDMA_H__ */ 390 391 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/ 392
