1 /**************************************************************************//** 2 * @file timer_pwm.h 3 * @version V3.00 4 * @brief Timer PWM Controller(Timer PWM) driver header file 5 * 6 * @copyright SPDX-License-Identifier: Apache-2.0 7 * @copyright Copyright (C) 2021 Nuvoton Technology Corp. All rights reserved. 8 *****************************************************************************/ 9 #ifndef __TIMER_PWM_H__ 10 #define __TIMER_PWM_H__ 11 12 #ifdef __cplusplus 13 extern "C" 14 { 15 #endif 16 17 18 /** @addtogroup Standard_Driver Standard Driver 19 @{ 20 */ 21 /** @addtogroup TIMER_PWM_Driver TIMER PWM Driver 22 @{ 23 */ 24 25 /** @addtogroup TIMER_PWM_EXPORTED_CONSTANTS TIMER PWM Exported Constants 26 @{ 27 */ 28 /*---------------------------------------------------------------------------------------------------------*/ 29 /* Output Channel Constant Definitions */ 30 /*---------------------------------------------------------------------------------------------------------*/ 31 #define TPWM_CH0 (BIT0) /*!< Indicate PWMx_CH0 \hideinitializer */ 32 #define TPWM_CH1 (BIT1) /*!< Indicate PWMx_CH1 \hideinitializer */ 33 34 /*---------------------------------------------------------------------------------------------------------*/ 35 /* Counter Type Constant Definitions */ 36 /*---------------------------------------------------------------------------------------------------------*/ 37 #define TPWM_UP_COUNT (0UL << TIMER_PWMCTL_CNTTYPE_Pos) /*!< Up count type \hideinitializer */ 38 #define TPWM_DOWN_COUNT (1UL << TIMER_PWMCTL_CNTTYPE_Pos) /*!< Down count type \hideinitializer */ 39 #define TPWM_UP_DOWN_COUNT (2UL << TIMER_PWMCTL_CNTTYPE_Pos) /*!< Up-Down count type \hideinitializer */ 40 41 /*---------------------------------------------------------------------------------------------------------*/ 42 /* Counter Mode Constant Definitions */ 43 /*---------------------------------------------------------------------------------------------------------*/ 44 #define TPWM_AUTO_RELOAD_MODE (0UL) /*!< Auto-reload mode \hideinitializer */ 45 #define TPWM_ONE_SHOT_MODE (TIMER_PWMCTL_CNTMODE_Msk) /*!< One-shot mode \hideinitializer */ 46 47 /*---------------------------------------------------------------------------------------------------------*/ 48 /* Output Level Constant Definitions */ 49 /*---------------------------------------------------------------------------------------------------------*/ 50 #define TPWM_OUTPUT_TOGGLE (0UL) /*!< Timer PWM output toggle \hideinitializer */ 51 #define TPWM_OUTPUT_NOTHING (1UL) /*!< Timer PWM output nothing \hideinitializer */ 52 #define TPWM_OUTPUT_LOW (2UL) /*!< Timer PWM output low \hideinitializer */ 53 #define TPWM_OUTPUT_HIGH (3UL) /*!< Timer PWM output high \hideinitializer */ 54 55 /*---------------------------------------------------------------------------------------------------------*/ 56 /* Trigger EADC Source Select Constant Definitions */ 57 /*---------------------------------------------------------------------------------------------------------*/ 58 #define TPWM_TRIGGER_EADC_AT_ZERO_POINT (0UL << TIMER_PWMTRGCTL_TRGSEL_Pos) /*!< Timer PWM trigger EADC while counter zero point event occurred \hideinitializer */ 59 #define TPWM_TRIGGER_EADC_AT_PERIOD_POINT (1UL << TIMER_PWMTRGCTL_TRGSEL_Pos) /*!< Timer PWM trigger EADC while counter period point event occurred \hideinitializer */ 60 #define TPWM_TRIGGER_EADC_AT_ZERO_OR_PERIOD_POINT (2UL << TIMER_PWMTRGCTL_TRGSEL_Pos) /*!< Timer PWM trigger EADC while counter zero or period point event occurred \hideinitializer */ 61 #define TPWM_TRIGGER_EADC_AT_COMPARE_UP_COUNT_POINT (3UL << TIMER_PWMTRGCTL_TRGSEL_Pos) /*!< Timer PWM trigger EADC while counter up count compare point event occurred \hideinitializer */ 62 #define TPWM_TRIGGER_EADC_AT_COMPARE_DOWN_COUNT_POINT (4UL << TIMER_PWMTRGCTL_TRGSEL_Pos) /*!< Timer PWM trigger EADC while counter down count compare point event occurred \hideinitializer */ 63 64 /*---------------------------------------------------------------------------------------------------------*/ 65 /* Brake Control Constant Definitions */ 66 /*---------------------------------------------------------------------------------------------------------*/ 67 #define TPWM_BRAKE_SOURCE_EDGE_ACMP0 (TIMER_PWMBRKCTL_CPO0EBEN_Msk) /*!< Comparator 0 as edge-detect fault brake source \hideinitializer */ 68 #define TPWM_BRAKE_SOURCE_EDGE_ACMP1 (TIMER_PWMBRKCTL_CPO1EBEN_Msk) /*!< Comparator 1 as edge-detect fault brake source \hideinitializer */ 69 #define TPWM_BRAKE_SOURCE_EDGE_BKPIN (TIMER_PWMBRKCTL_BRKPEEN_Msk) /*!< Brake pin as edge-detect fault brake source \hideinitializer */ 70 #define TPWM_BRAKE_SOURCE_EDGE_SYS_CSS (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_CSSBRKEN_Msk << 16)) /*!< System fail condition: clock security system detection as edge-detect fault brake source \hideinitializer */ 71 #define TPWM_BRAKE_SOURCE_EDGE_SYS_BOD (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_BODBRKEN_Msk << 16)) /*!< System fail condition: brown-out detection as edge-detect fault brake source \hideinitializer */ 72 #define TPWM_BRAKE_SOURCE_EDGE_SYS_COR (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_CORBRKEN_Msk << 16)) /*!< System fail condition: core lockup detection as edge-detect fault brake source \hideinitializer */ 73 #define TPWM_BRAKE_SOURCE_EDGE_SYS_RAM (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_RAMBRKEN_Msk << 16)) /*!< System fail condition: SRAM parity error detection as edge-detect fault brake source \hideinitializer */ 74 75 76 #define TPWM_BRAKE_SOURCE_LEVEL_ACMP0 (TIMER_PWMBRKCTL_CPO0LBEN_Msk) /*!< Comparator 0 as level-detect fault brake source \hideinitializer */ 77 #define TPWM_BRAKE_SOURCE_LEVEL_ACMP1 (TIMER_PWMBRKCTL_CPO1LBEN_Msk) /*!< Comparator 1 as level-detect fault brake source \hideinitializer */ 78 #define TPWM_BRAKE_SOURCE_LEVEL_BKPIN (TIMER_PWMBRKCTL_BRKPLEN_Msk) /*!< Brake pin as level-detect fault brake source \hideinitializer */ 79 #define TPWM_BRAKE_SOURCE_LEVEL_SYS_CSS (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_CSSBRKEN_Msk << 16)) /*!< System fail condition: clock security system detection as level-detect fault brake source \hideinitializer */ 80 #define TPWM_BRAKE_SOURCE_LEVEL_SYS_BOD (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_BODBRKEN_Msk << 16)) /*!< System fail condition: brown-out detection as level-detect fault brake source \hideinitializer */ 81 #define TPWM_BRAKE_SOURCE_LEVEL_SYS_COR (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_CORBRKEN_Msk << 16)) /*!< System fail condition: core lockup detection as level-detect fault brake source \hideinitializer */ 82 #define TPWM_BRAKE_SOURCE_LEVEL_SYS_RAM (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_RAMBRKEN_Msk << 16)) /*!< System fail condition: SRAM parity error detection as level-detect fault brake source \hideinitializer */ 83 84 #define TPWM_BRAKE_EDGE (TIMER_PWMSWBRK_BRKETRG_Msk) /*!< Edge-detect fault brake \hideinitializer */ 85 #define TPWM_BRAKE_LEVEL (TIMER_PWMSWBRK_BRKLTRG_Msk) /*!< Level-detect fault brake \hideinitializer */ 86 87 /*---------------------------------------------------------------------------------------------------------*/ 88 /* Load Mode Constant Definitions */ 89 /*---------------------------------------------------------------------------------------------------------*/ 90 #define TPWM_LOAD_MODE_PERIOD (0UL) /*!< Timer PWM period load mode \hideinitializer */ 91 #define TPWM_LOAD_MODE_IMMEDIATE (TIMER_PWMCTL_IMMLDEN_Msk) /*!< Timer PWM immediately load mode \hideinitializer */ 92 #define TPWM_LOAD_MODE_CENTER (TIMER_PWMCTL_CTRLD_Msk) /*!< Timer PWM center load mode \hideinitializer */ 93 94 /*---------------------------------------------------------------------------------------------------------*/ 95 /* Brake Pin De-bounce Clock Source Select Constant Definitions */ 96 /*---------------------------------------------------------------------------------------------------------*/ 97 #define TPWM_BKP_DBCLK_PCLK_DIV_1 (0UL) /*!< De-bounce clock is PCLK divide by 1 \hideinitializer */ 98 #define TPWM_BKP_DBCLK_PCLK_DIV_2 (1UL) /*!< De-bounce clock is PCLK divide by 2 \hideinitializer */ 99 #define TPWM_BKP_DBCLK_PCLK_DIV_4 (2UL) /*!< De-bounce clock is PCLK divide by 4 \hideinitializer */ 100 #define TPWM_BKP_DBCLK_PCLK_DIV_8 (3UL) /*!< De-bounce clock is PCLK divide by 8 \hideinitializer */ 101 #define TPWM_BKP_DBCLK_PCLK_DIV_16 (4UL) /*!< De-bounce clock is PCLK divide by 16 \hideinitializer */ 102 #define TPWM_BKP_DBCLK_PCLK_DIV_32 (5UL) /*!< De-bounce clock is PCLK divide by 32 \hideinitializer */ 103 #define TPWM_BKP_DBCLK_PCLK_DIV_64 (6UL) /*!< De-bounce clock is PCLK divide by 64 \hideinitializer */ 104 #define TPWM_BKP_DBCLK_PCLK_DIV_128 (7UL) /*!< De-bounce clock is PCLK divide by 128 \hideinitializer */ 105 106 /*---------------------------------------------------------------------------------------------------------*/ 107 /* Brake Pin Source Select Constant Definitions */ 108 /*---------------------------------------------------------------------------------------------------------*/ 109 #define TPWM_TM_BRAKE0 (0UL) /*!< Brake pin source comes from TM_BRAKE0 \hideinitializer */ 110 #define TPWM_TM_BRAKE1 (1UL) /*!< Brake pin source comes from TM_BRAKE1 \hideinitializer */ 111 #define TPWM_TM_BRAKE2 (2UL) /*!< Brake pin source comes from TM_BRAKE2 \hideinitializer */ 112 #define TPWM_TM_BRAKE3 (3UL) /*!< Brake pin source comes from TM_BRAKE3 \hideinitializer */ 113 114 /*---------------------------------------------------------------------------------------------------------*/ 115 /* Counter Clock Source Select Constant Definitions */ 116 /*---------------------------------------------------------------------------------------------------------*/ 117 #define TPWM_CNTR_CLKSRC_TMR_CLK (0UL) /*!< Timer PWM Clock source selects to TMR_CLK \hideinitializer */ 118 #define TPWM_CNTR_CLKSRC_TIMER0_INT (1UL) /*!< Timer PWM Clock source selects to TIMER0 interrupt event \hideinitializer */ 119 #define TPWM_CNTR_CLKSRC_TIMER1_INT (2UL) /*!< Timer PWM Clock source selects to TIMER1 interrupt event \hideinitializer */ 120 #define TPWM_CNTR_CLKSRC_TIMER2_INT (3UL) /*!< Timer PWM Clock source selects to TIMER2 interrupt event \hideinitializer */ 121 #define TPWM_CNTR_CLKSRC_TIMER3_INT (4UL) /*!< Timer PWM Clock source selects to TIMER3 interrupt event \hideinitializer */ 122 123 /*---------------------------------------------------------------------------------------------------------*/ 124 /* Counter Synchronous Mode Constant Definitions */ 125 /*---------------------------------------------------------------------------------------------------------*/ 126 #define TPWM_CNTR_SYNC_DISABLE (0UL) /*!< Disable TIMER PWM synchronous function \hideinitializer */ 127 #define TPWM_CNTR_SYNC_START_BY_TIMER0 ((0<<TIMER_PWMSCTL_SYNCSRC_Pos) | (1<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous start by TIMER0 PWM \hideinitializer */ 128 #define TPWM_CNTR_SYNC_CLEAR_BY_TIMER0 ((0<<TIMER_PWMSCTL_SYNCSRC_Pos) | (3<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous clear by TIMER0 PWM \hideinitializer */ 129 #define TPWM_CNTR_SYNC_START_BY_TIMER2 ((1<<TIMER_PWMSCTL_SYNCSRC_Pos) | (1<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous start by TIMER2 PWM \hideinitializer */ 130 #define TPWM_CNTR_SYNC_CLEAR_BY_TIMER2 ((1<<TIMER_PWMSCTL_SYNCSRC_Pos) | (3<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous clear by TIMER2 PWM \hideinitializer */ 131 132 /*---------------------------------------------------------------------------------------------------------*/ 133 /* Interrupt Flag Accumulator Constant Definitions */ 134 /*---------------------------------------------------------------------------------------------------------*/ 135 #define TPWM_IFA_ZERO_POINT (0U) /*!< Timer PWM counter equal to zero \hideinitializer */ 136 #define TPWM_IFA_PERIOD_POINT (1U) /*!< Timer PWM counter equal to period \hideinitializer */ 137 #define TPWM_IFA_COMPARE_UP_COUNT_POINT (2U) /*!< Timer PWM counter up count to comparator value \hideinitializer */ 138 #define TPWM_IFA_COMPARE_DOWN_COUNT_POINT (3U) /*!< Timer PWM counter down count to comparator value \hideinitializer */ 139 140 /*---------------------------------------------------------------------------------------------------------*/ 141 /* External Event Trigger Pin Constant Definitions */ 142 /*---------------------------------------------------------------------------------------------------------*/ 143 #define TPWM_EXT_TGR_PIN_INT0 (0U) /*!< Timer PWM external event trigger source form INT0 pin \hideinitializer */ 144 #define TPWM_EXT_TGR_PIN_INT1 (1U) /*!< Timer PWM external event trigger source form INT1 pin \hideinitializer */ 145 #define TPWM_EXT_TGR_PIN_INT2 (2U) /*!< Timer PWM external event trigger source form INT2 pin \hideinitializer */ 146 #define TPWM_EXT_TGR_PIN_INT3 (3U) /*!< Timer PWM external event trigger source form INT3 pin \hideinitializer */ 147 #define TPWM_EXT_TGR_PIN_INT4 (4U) /*!< Timer PWM external event trigger source form INT4 pin \hideinitializer */ 148 #define TPWM_EXT_TGR_PIN_INT5 (5U) /*!< Timer PWM external event trigger source form INT5 pin \hideinitializer */ 149 #define TPWM_EXT_TGR_PIN_INT6 (6U) /*!< Timer PWM external event trigger source form INT6 pin \hideinitializer */ 150 #define TPWM_EXT_TGR_PIN_INT7 (7U) /*!< Timer PWM external event trigger source form INT7 pin \hideinitializer */ 151 152 /*---------------------------------------------------------------------------------------------------------*/ 153 /* External Event Trigger Counter Action Constant Definitions */ 154 /*---------------------------------------------------------------------------------------------------------*/ 155 #define TPWM_EXT_TGR_COUNTER_RESET (0U) /*!< Timer PWM external event trigger counter reset \hideinitializer */ 156 #define TPWM_EXT_TGR_COUNTER_START (1U) /*!< Timer PWM external event trigger counter start \hideinitializer */ 157 #define TPWM_EXT_TGR_COUNTER_RESET_AND_START (2U) /*!< Timer PWM external event trigger counter reset and start \hideinitializer */ 158 159 /*@}*/ /* end of group TIMER_PWM_EXPORTED_CONSTANTS */ 160 161 162 /** @addtogroup TIMER_PWM_EXPORTED_FUNCTIONS TIMER PWM Exported Functions 163 @{ 164 */ 165 166 /** 167 * @brief Enable PWM Counter Mode 168 * 169 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 170 * 171 * @return None 172 * 173 * @details This macro is used to enable specified Timer channel as PWM counter mode, then timer counter mode is invalid. 174 * @note All registers about time counter function will be cleared to 0 and timer clock source will be changed to PCLKx automatically after executing this macro. 175 * \hideinitializer 176 */ 177 #define TPWM_ENABLE_PWM_MODE(timer) ((timer)->ALTCTL = (1 << TIMER_ALTCTL_FUNCSEL_Pos)) 178 179 /** 180 * @brief Disable PWM Counter Mode 181 * 182 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 183 * 184 * @return None 185 * 186 * @details This macro is used to disable specified Timer channel as PWM counter mode, then timer counter mode is available. 187 * @note All registers about PWM counter function will be cleared to 0 after executing this macro. 188 * \hideinitializer 189 */ 190 #define TPWM_DISABLE_PWM_MODE(timer) ((timer)->ALTCTL = (0 << TIMER_ALTCTL_FUNCSEL_Pos)) 191 192 /** 193 * @brief Enable Independent Mode 194 * 195 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 196 * 197 * @return None 198 * 199 * @details This macro is used to enable independent mode of TIMER PWM module and complementary mode will be disabled. 200 * \hideinitializer 201 */ 202 #define TPWM_ENABLE_INDEPENDENT_MODE(timer) ((timer)->PWMCTL &= ~(1 << TIMER_PWMCTL_OUTMODE_Pos)) 203 204 /** 205 * @brief Enable Complementary Mode 206 * 207 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 208 * 209 * @return None 210 * 211 * @details This macro is used to enable complementary mode of Timer PWM module and independent mode will be disabled. 212 * \hideinitializer 213 */ 214 #define TPWM_ENABLE_COMPLEMENTARY_MODE(timer) ((timer)->PWMCTL |= (1 << TIMER_PWMCTL_OUTMODE_Pos)) 215 216 /** 217 * @brief Set Counter Type 218 * 219 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 220 * @param[in] type Timer PWM count type, could be one of the following type 221 * - \ref TPWM_UP_COUNT 222 * - \ref TPWM_DOWN_COUNT 223 * - \ref TPWM_UP_DOWN_COUNT 224 * 225 * @return None 226 * 227 * @details This macro is used to set Timer PWM counter type. 228 * \hideinitializer 229 */ 230 #define TPWM_SET_COUNTER_TYPE(timer, type) ((timer)->PWMCTL = ((timer)->PWMCTL & ~TIMER_PWMCTL_CNTTYPE_Msk) | (type)) 231 232 /** 233 * @brief Start PWM Counter 234 * 235 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 236 * 237 * @return None 238 * 239 * @details This macro is used to enable PWM generator and start counter counting. 240 * \hideinitializer 241 */ 242 #define TPWM_START_COUNTER(timer) ((timer)->PWMCTL |= TIMER_PWMCTL_CNTEN_Msk) 243 244 /** 245 * @brief Stop PWM Counter 246 * 247 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 248 * 249 * @return None 250 * 251 * @details This macro is used to stop PWM counter after current period is completed. 252 * \hideinitializer 253 */ 254 #define TPWM_STOP_COUNTER(timer) ((timer)->PWMPERIOD = 0x0) 255 256 /** 257 * @brief Set Counter Clock Prescaler 258 * 259 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 260 * 261 * @param[in] prescaler Clock prescaler of specified channel. Valid values are between 0x0~0xFFF. 262 * 263 * @return None 264 * 265 * @details This macro is used to set the prescaler of specified TIMER PWM. 266 * @note If prescaler is 0, then there is no scaling in counter clock source. 267 * \hideinitializer 268 */ 269 #define TPWM_SET_PRESCALER(timer, prescaler) ((timer)->PWMCLKPSC = (prescaler)) 270 271 /** 272 * @brief Get Counter Clock Prescaler 273 * 274 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 275 * 276 * @return Target prescaler setting, CLKPSC (TIMERx_PWMCLKPSC[11:0]) 277 * 278 * @details Get the prescaler setting, the target counter clock divider is (CLKPSC + 1). 279 * \hideinitializer 280 */ 281 #define TPWM_GET_PRESCALER(timer) ((timer)->PWMCLKPSC) 282 283 /** 284 * @brief Set Counter Period 285 * 286 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 287 * 288 * @param[in] period Period of specified channel. Valid values are between 0x0~0xFFFF. 289 * 290 * @return None 291 * 292 * @details This macro is used to set the period of specified TIMER PWM. 293 * \hideinitializer 294 */ 295 #define TPWM_SET_PERIOD(timer, period) ((timer)->PWMPERIOD = (period)) 296 297 /** 298 * @brief Get Counter Period 299 * 300 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 301 * 302 * @return Target period setting, PERIOD (TIMERx_PWMPERIOD[15:0]) 303 * 304 * @details This macro is used to get the period of specified TIMER PWM. 305 * \hideinitializer 306 */ 307 #define TPWM_GET_PERIOD(timer) ((timer)->PWMPERIOD) 308 309 /** 310 * @brief Set Comparator Value 311 * 312 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 313 * 314 * @param[in] cmp Comparator of specified channel. Valid values are between 0x0~0xFFFF. 315 * 316 * @return None 317 * 318 * @details This macro is used to set the comparator value of specified TIMER PWM. 319 * \hideinitializer 320 */ 321 #define TPWM_SET_CMPDAT(timer, cmp) ((timer)->PWMCMPDAT = (cmp)) 322 323 /** 324 * @brief Get Comparator Value 325 * 326 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 327 * 328 * @return Target comparator setting, CMPDAT (TIMERx_PWMCMPDAT[15:0]) 329 * 330 * @details This macro is used to get the comparator value of specified TIMER PWM. 331 * \hideinitializer 332 */ 333 #define TPWM_GET_CMPDAT(timer) ((timer)->PWMCMPDAT) 334 335 /** 336 * @brief Clear Counter 337 * 338 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 339 * 340 * @return None 341 * 342 * @details This macro is used to clear counter of specified TIMER PWM. 343 * \hideinitializer 344 */ 345 #define TPWM_CLEAR_COUNTER(timer) ((timer)->PWMCNTCLR = TIMER_PWMCNTCLR_CNTCLR_Msk) 346 347 /** 348 * @brief Software Trigger Brake Event 349 * 350 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 351 * 352 * @param[in] type Type of brake trigger. Valid values are: 353 * - \ref TPWM_BRAKE_EDGE 354 * - \ref TPWM_BRAKE_LEVEL 355 * 356 * @return None 357 * 358 * @details This macro is used to trigger brake event by writing PWMSWBRK register. 359 * \hideinitializer 360 */ 361 #define TPWM_SW_TRIGGER_BRAKE(timer, type) ((timer)->PWMSWBRK = (type)) 362 363 /** 364 * @brief Enable Output Function 365 * 366 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 367 * 368 * @param[in] ch Enable specified channel output function. Valid values are the combination of: 369 * - \ref TPWM_CH0 370 * - \ref TPWM_CH1 371 * 372 * @return None 373 * 374 * @details This macro is used to enable output function of specified output pins. 375 * @note If the corresponding bit in ch parameter is 0, then output function will be disabled in this channel. 376 * \hideinitializer 377 */ 378 #define TPWM_ENABLE_OUTPUT(timer, ch) ((timer)->PWMPOEN = (ch)) 379 380 /** 381 * @brief Set Output Inverse 382 * 383 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 384 * 385 * @param[in] ch Set specified channel output is inversed or not. Valid values are the combination of: 386 * - \ref TPWM_CH0 387 * - \ref TPWM_CH1 388 * 389 * @return None 390 * 391 * @details This macro is used to enable output inverse of specified output pins. 392 * @note If ch parameter is 0, then output inverse function will be disabled. 393 * \hideinitializer 394 */ 395 #define TPWM_SET_OUTPUT_INVERSE(timer, ch) ((timer)->PWMPOLCTL = (ch)) 396 397 /** 398 * @brief Enable Output Function 399 * 400 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 401 * 402 * @param[in] ch Enable specified channel output mask function. Valid values are the combination of: 403 * - \ref TPWM_CH0 404 * - \ref TPWM_CH1 405 * 406 * @param[in] level Output to high or low on specified mask channel. 407 * 408 * @return None 409 * 410 * @details This macro is used to enable output function of specified output pins. 411 * @note If ch parameter is 0, then output mask function will be disabled. 412 * \hideinitializer 413 */ 414 #define TPWM_SET_MASK_OUTPUT(timer, ch, level) do {(timer)->PWMMSKEN = (ch); (timer)->PWMMSK = (level); }while(0) 415 416 /** 417 * @brief Set Counter Synchronous Mode 418 * 419 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 420 * 421 * @param[in] mode Synchronous mode. Possible options are: 422 * - \ref TPWM_CNTR_SYNC_DISABLE 423 * - \ref TPWM_CNTR_SYNC_START_BY_TIMER0 424 * - \ref TPWM_CNTR_SYNC_CLEAR_BY_TIMER0 425 * - \ref TPWM_CNTR_SYNC_START_BY_TIMER2 426 * - \ref TPWM_CNTR_SYNC_CLEAR_BY_TIMER2 427 * 428 * @return None 429 * 430 * @details This macro is used to set counter synchronous mode of specified Timer PWM module. 431 * @note Only support all PWM counters are synchronous by TIMER0 PWM or TIMER0~1 PWM counter synchronous by TIMER0 PWM and 432 * TIMER2~3 PWM counter synchronous by TIMER2 PWM. 433 * \hideinitializer 434 */ 435 #define TPWM_SET_COUNTER_SYNC_MODE(timer, mode) ((timer)->PWMSCTL = (mode)) 436 437 /** 438 * @brief Trigger Counter Synchronous 439 * 440 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 441 * 442 * @return None 443 * 444 * @details This macro is used to trigger synchronous event by specified TIMER PWM. 445 * @note 1. This macro is only available for TIMER0 PWM and TIMER2 PWM. \n 446 * 2. STRGEN (PWMSTRG[0]) is write only and always read as 0. 447 * \hideinitializer 448 */ 449 #define TPWM_TRIGGER_COUNTER_SYNC(timer) ((timer)->PWMSTRG = TIMER_PWMSTRG_STRGEN_Msk) 450 451 /** 452 * @brief Enable Zero Event Interrupt 453 * 454 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 455 * 456 * @return None 457 * 458 * @details This macro is used to enable the zero event interrupt function. 459 * \hideinitializer 460 */ 461 #define TPWM_ENABLE_ZERO_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_ZIEN_Msk) 462 463 /** 464 * @brief Disable Zero Event Interrupt 465 * 466 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 467 * 468 * @return None 469 * 470 * @details This macro is used to disable the zero event interrupt function. 471 * \hideinitializer 472 */ 473 #define TPWM_DISABLE_ZERO_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_ZIEN_Msk) 474 475 /** 476 * @brief Get Zero Event Interrupt Flag 477 * 478 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 479 * 480 * @retval 0 Zero event interrupt did not occur 481 * @retval 1 Zero event interrupt occurred 482 * 483 * @details This macro indicates zero event occurred or not. 484 * \hideinitializer 485 */ 486 #define TPWM_GET_ZERO_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_ZIF_Msk)? 1 : 0) 487 488 /** 489 * @brief Clear Zero Event Interrupt Flag 490 * 491 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 492 * 493 * @return None 494 * 495 * @details This macro clears zero event interrupt flag. 496 * \hideinitializer 497 */ 498 #define TPWM_CLEAR_ZERO_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_ZIF_Msk) 499 500 /** 501 * @brief Enable Period Event Interrupt 502 * 503 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 504 * 505 * @return None 506 * 507 * @details This macro is used to enable the period event interrupt function. 508 * \hideinitializer 509 */ 510 #define TPWM_ENABLE_PERIOD_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_PIEN_Msk) 511 512 /** 513 * @brief Disable Period Event Interrupt 514 * 515 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 516 * 517 * @return None 518 * 519 * @details This macro is used to disable the period event interrupt function. 520 * \hideinitializer 521 */ 522 #define TPWM_DISABLE_PERIOD_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_PIEN_Msk) 523 524 /** 525 * @brief Get Period Event Interrupt Flag 526 * 527 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 528 * 529 * @retval 0 Period event interrupt did not occur 530 * @retval 1 Period event interrupt occurred 531 * 532 * @details This macro indicates period event occurred or not. 533 * \hideinitializer 534 */ 535 #define TPWM_GET_PERIOD_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_PIF_Msk)? 1 : 0) 536 537 /** 538 * @brief Clear Period Event Interrupt Flag 539 * 540 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 541 * 542 * @return None 543 * 544 * @details This macro clears period event interrupt flag. 545 * \hideinitializer 546 */ 547 #define TPWM_CLEAR_PERIOD_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_PIF_Msk) 548 549 /** 550 * @brief Enable Compare Up Event Interrupt 551 * 552 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 553 * 554 * @return None 555 * 556 * @details This macro is used to enable the compare up event interrupt function. 557 * \hideinitializer 558 */ 559 #define TPWM_ENABLE_CMP_UP_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_CMPUIEN_Msk) 560 561 /** 562 * @brief Disable Compare Up Event Interrupt 563 * 564 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 565 * 566 * @return None 567 * 568 * @details This macro is used to disable the compare up event interrupt function. 569 * \hideinitializer 570 */ 571 #define TPWM_DISABLE_CMP_UP_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_CMPUIEN_Msk) 572 573 /** 574 * @brief Get Compare Up Event Interrupt Flag 575 * 576 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 577 * 578 * @retval 0 Compare up event interrupt did not occur 579 * @retval 1 Compare up event interrupt occurred 580 * 581 * @details This macro indicates compare up event occurred or not. 582 * \hideinitializer 583 */ 584 #define TPWM_GET_CMP_UP_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_CMPUIF_Msk)? 1 : 0) 585 586 /** 587 * @brief Clear Compare Up Event Interrupt Flag 588 * 589 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 590 * 591 * @return None 592 * 593 * @details This macro clears compare up event interrupt flag. 594 * \hideinitializer 595 */ 596 #define TPWM_CLEAR_CMP_UP_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_CMPUIF_Msk) 597 598 /** 599 * @brief Enable Compare Down Event Interrupt 600 * 601 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 602 * 603 * @return None 604 * 605 * @details This macro is used to enable the compare down event interrupt function. 606 * \hideinitializer 607 */ 608 #define TPWM_ENABLE_CMP_DOWN_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_CMPDIEN_Msk) 609 610 /** 611 * @brief Disable Compare Down Event Interrupt 612 * 613 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 614 * 615 * @return None 616 * 617 * @details This macro is used to disable the compare down event interrupt function. 618 * \hideinitializer 619 */ 620 #define TPWM_DISABLE_CMP_DOWN_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_CMPDIEN_Msk) 621 622 /** 623 * @brief Get Compare Down Event Interrupt Flag 624 * 625 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 626 * 627 * @retval 0 Compare down event interrupt did not occur 628 * @retval 1 Compare down event interrupt occurred 629 * 630 * @details This macro indicates compare down event occurred or not. 631 * \hideinitializer 632 */ 633 #define TPWM_GET_CMP_DOWN_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_CMPDIF_Msk)? 1 : 0) 634 635 /** 636 * @brief Clear Compare Down Event Interrupt Flag 637 * 638 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 639 * 640 * @return None 641 * 642 * @details This macro clears compare down event interrupt flag. 643 * \hideinitializer 644 */ 645 #define TPWM_CLEAR_CMP_DOWN_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_CMPDIF_Msk) 646 647 /** 648 * @brief Get Counter Reach Maximum Count Status 649 * 650 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 651 * 652 * @retval 0 Timer PWM counter never counts to maximum value 653 * @retval 1 Timer PWM counter counts to maximum value, 0xFFFF 654 * 655 * @details This macro indicates Timer PWM counter has count to 0xFFFF or not. 656 * \hideinitializer 657 */ 658 #define TPWM_GET_REACH_MAX_CNT_STATUS(timer) (((timer)->PWMSTATUS & TIMER_PWMSTATUS_CNTMAXF_Msk)? 1 : 0) 659 660 /** 661 * @brief Clear Counter Reach Maximum Count Status 662 * 663 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 664 * 665 * @return None 666 * 667 * @details This macro clears reach maximum count status. 668 * \hideinitializer 669 */ 670 #define TPWM_CLEAR_REACH_MAX_CNT_STATUS(timer) ((timer)->PWMSTATUS = TIMER_PWMSTATUS_CNTMAXF_Msk) 671 672 /** 673 * @brief Get Trigger ADC Status 674 * 675 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 676 * 677 * @retval 0 Trigger ADC start conversion is not occur 678 * @retval 1 Specified counter compare event has trigger ADC start conversion 679 * 680 * @details This macro is used to indicate PWM counter compare event has triggered ADC start conversion. 681 * \hideinitializer 682 */ 683 #define TPWM_GET_TRG_ADC_STATUS(timer) (((timer)->PWMSTATUS & TIMER_PWMSTATUS_EADCTRGF_Msk)? 1 : 0) 684 685 /** 686 * @brief Clear Trigger ADC Status 687 * 688 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 689 * 690 * @return None 691 * 692 * @details This macro is used to clear PWM counter compare event trigger ADC status. 693 * \hideinitializer 694 */ 695 #define TPWM_CLEAR_TRG_ADC_STATUS(timer) ((timer)->PWMSTATUS = TIMER_PWMSTATUS_EADCTRGF_Msk) 696 697 /** 698 * @brief Set Brake Event at Brake Pin High or Low-to-High 699 * 700 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 701 * 702 * @return None 703 * 704 * @details This macro is used to set detect brake event when external brake pin at high level or transfer from low to high. 705 * @note The default brake pin detection is high level or from low to high. 706 * \hideinitializer 707 */ 708 #define TPWM_SET_BRAKE_PIN_HIGH_DETECT(timer) ((timer)->PWMBNF &= ~TIMER_PWMBNF_BRKPINV_Msk) 709 710 /** 711 * @brief Set Brake Event at Brake Pin Low or High-to-Low 712 * 713 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 714 * 715 * @return None 716 * 717 * @details This macro is used to set detect brake event when external brake pin at low level or transfer from high to low. 718 * \hideinitializer 719 */ 720 #define TPWM_SET_BRAKE_PIN_LOW_DETECT(timer) ((timer)->PWMBNF |= TIMER_PWMBNF_BRKPINV_Msk) 721 722 /** 723 * @brief Set External Brake Pin Source 724 * 725 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 726 * @param[in] pin The external brake pin source, could be one of following source 727 * - \ref TPWM_TM_BRAKE0 728 * - \ref TPWM_TM_BRAKE1 729 * - \ref TPWM_TM_BRAKE2 730 * - \ref TPWM_TM_BRAKE3 731 * 732 * @return None 733 * 734 * @details This macro is used to set detect brake event when external brake pin at high level or transfer from low to high. 735 * \hideinitializer 736 */ 737 #define TPWM_SET_BRAKE_PIN_SOURCE(timer, pin) ((timer)->PWMBNF = ((timer)->PWMBNF & ~TIMER_PWMBNF_BKPINSRC_Msk) | ((pin)<<TIMER_PWMBNF_BKPINSRC_Pos)) 738 739 740 void TPWM_SetCounterClockSource(TIMER_T *timer, uint32_t u32CntClkSrc); 741 uint32_t TPWM_ConfigOutputFreqAndDuty(TIMER_T *timer, uint32_t u32Frequency, uint32_t u32DutyCycle); 742 void TPWM_EnableDeadTime(TIMER_T *timer, uint32_t u32DTCount); 743 void TPWM_EnableDeadTimeWithPrescale(TIMER_T *timer, uint32_t u32DTCount); 744 void TPWM_DisableDeadTime(TIMER_T *timer); 745 void TPWM_EnableCounter(TIMER_T *timer); 746 void TPWM_DisableCounter(TIMER_T *timer); 747 void TPWM_EnableTriggerADC(TIMER_T *timer, uint32_t u32Condition); 748 void TPWM_DisableTriggerADC(TIMER_T *timer); 749 void TPWM_EnableFaultBrake(TIMER_T *timer, uint32_t u32CH0Level, uint32_t u32CH1Level, uint32_t u32BrakeSource); 750 void TPWM_EnableFaultBrakeInt(TIMER_T *timer, uint32_t u32IntSource); 751 void TPWM_DisableFaultBrakeInt(TIMER_T *timer, uint32_t u32IntSource); 752 uint32_t TPWM_GetFaultBrakeIntFlag(TIMER_T *timer, uint32_t u32IntSource); 753 void TPWM_ClearFaultBrakeIntFlag(TIMER_T *timer, uint32_t u32IntSource); 754 void TPWM_SetLoadMode(TIMER_T *timer, uint32_t u32LoadMode); 755 void TPWM_EnableBrakePinDebounce(TIMER_T *timer, uint32_t u32BrakePinSrc, uint32_t u32DebounceCnt, uint32_t u32ClkSrcSel); 756 void TPWM_DisableBrakePinDebounce(TIMER_T *timer); 757 void TPWM_EnableBrakePinInverse(TIMER_T *timer); 758 void TPWM_DisableBrakePinInverse(TIMER_T *timer); 759 void TPWM_SetBrakePinSource(TIMER_T *timer, uint32_t u32BrakePinNum); 760 void TPWM_EnableAcc(TIMER_T *timer, uint32_t u32IntFlagCnt, uint32_t u32IntAccSrc); 761 void TPWM_DisableAcc(TIMER_T *timer); 762 void TPWM_EnableAccInt(TIMER_T *timer); 763 void TPWM_DisableAccInt(TIMER_T *timer); 764 void TPWM_ClearAccInt(TIMER_T *timer); 765 uint32_t TPWM_GetAccInt(TIMER_T *timer); 766 void TPWM_EnableAccPDMA(TIMER_T *timer); 767 void TPWM_DisableAccPDMA(TIMER_T *timer); 768 void TPWM_EnableAccStopMode(TIMER_T *timer); 769 void TPWM_DisableAccStopMode(TIMER_T *timer); 770 void TPWM_EnableExtEventTrigger(TIMER_T *timer, uint32_t u32ExtEventSrc, uint32_t u32CounterAction); 771 void TPWM_DisableExtEventTrigger(TIMER_T *timer); 772 773 /*@}*/ /* end of group TIMER_PWM_EXPORTED_FUNCTIONS */ 774 775 /*@}*/ /* end of group TIMER_PWM_Driver */ 776 777 /*@}*/ /* end of group Standard_Driver */ 778 779 #ifdef __cplusplus 780 } 781 #endif 782 783 #endif /* __TIMER_PWM_H__ */ 784
