1 /**************************************************************************//**
2  * @file     sys.h
3  * @version  V1.0
4  * @brief    M2L31 series SYS driver header file
5  *
6  * SPDX-License-Identifier: Apache-2.0
7  * @copyright (C) 2023 Nuvoton Technology Corp. All rights reserved.
8  ******************************************************************************/
9 #ifndef __SYS_H__
10 #define __SYS_H__
11 
12 #ifdef __cplusplus
13 extern "C"
14 {
15 #endif
16 
17 
18 /** @addtogroup Standard_Driver Standard Driver
19   @{
20 */
21 
22 /** @addtogroup SYS_Driver SYS Driver
23   @{
24 */
25 
26 /** @addtogroup SYS_EXPORTED_CONSTANTS SYS Exported Constants
27   @{
28 */
29 
30 
31 /*---------------------------------------------------------------------------------------------------------*/
32 /*  Module Reset Control Resister constant definitions.                                                    */
33 /*---------------------------------------------------------------------------------------------------------*/
34 #define CHIP_RST        ((0UL<<24) | SYS_IPRST0_CHIPRST_Pos)        /*!< Reset CHIP \hideinitializer    */
35 #define CPU_RST         ((0UL<<24) | SYS_IPRST0_CPURST_Pos)         /*!< Reset CPU \hideinitializer     */
36 #define PDMA0_RST       ((0UL<<24) | SYS_IPRST0_PDMA0RST_Pos)       /*!< Reset PDMA0 \hideinitializer   */
37 #define EBI_RST         ((0UL<<24) | SYS_IPRST0_EBIRST_Pos)         /*!< Reset EBI \hideinitializer     */
38 #define USBH_RST        ((0UL<<24) | SYS_IPRST0_USBHRST_Pos)        /*!< Reset USBH \hideinitializer    */
39 #define CRC_RST         ((0UL<<24) | SYS_IPRST0_CRCRST_Pos)         /*!< Reset CRC \hideinitializer     */
40 #define CRPT_RST        ((0UL<<24) | SYS_IPRST0_CRPTRST_Pos)        /*!< Reset CRPT \hideinitializer    */
41 #define CANFD0_RST      ((0UL<<24) | SYS_IPRST0_CANFD0RST_Pos)      /*!< Reset CANFD0 \hideinitializer  */
42 #define CANFD1_RST      ((0UL<<24) | SYS_IPRST0_CANFD1RST_Pos)      /*!< Reset CANFD1 \hideinitializer  */
43 
44 #define GPIO_RST        ((4UL<<24) | SYS_IPRST1_GPIORST_Pos)        /*!< Reset GPIO \hideinitializer    */
45 #define TMR0_RST        ((4UL<<24) | SYS_IPRST1_TMR0RST_Pos)        /*!< Reset TMR0 \hideinitializer    */
46 #define TMR1_RST        ((4UL<<24) | SYS_IPRST1_TMR1RST_Pos)        /*!< Reset TMR1 \hideinitializer    */
47 #define TMR2_RST        ((4UL<<24) | SYS_IPRST1_TMR2RST_Pos)        /*!< Reset TMR2 \hideinitializer    */
48 #define TMR3_RST        ((4UL<<24) | SYS_IPRST1_TMR3RST_Pos)        /*!< Reset TMR3 \hideinitializer    */
49 #define ACMP01_RST      ((4UL<<24) | SYS_IPRST1_ACMP01RST_Pos)      /*!< Reset ACMP01 \hideinitializer  */
50 #define I2C0_RST        ((4UL<<24) | SYS_IPRST1_I2C0RST_Pos)        /*!< Reset I2C0 \hideinitializer    */
51 #define I2C1_RST        ((4UL<<24) | SYS_IPRST1_I2C1RST_Pos)        /*!< Reset I2C1 \hideinitializer    */
52 #define I2C2_RST        ((4UL<<24) | SYS_IPRST1_I2C2RST_Pos)        /*!< Reset I2C2 \hideinitializer    */
53 #define I2C3_RST        ((4UL<<24) | SYS_IPRST1_I2C3RST_Pos)        /*!< Reset I2C3 \hideinitializer    */
54 #define QSPI0_RST       ((4UL<<24) | SYS_IPRST1_QSPI0RST_Pos)       /*!< Reset QSPI0 \hideinitializer   */
55 #define SPI0_RST        ((4UL<<24) | SYS_IPRST1_SPI0RST_Pos)        /*!< Reset SPI0 \hideinitializer    */
56 #define SPI1_RST        ((4UL<<24) | SYS_IPRST1_SPI1RST_Pos)        /*!< Reset SPI1 \hideinitializer    */
57 #define SPI2_RST        ((4UL<<24) | SYS_IPRST1_SPI2RST_Pos)        /*!< Reset SPI2 \hideinitializer    */
58 #define UART0_RST       ((4UL<<24) | SYS_IPRST1_UART0RST_Pos)       /*!< Reset UART0 \hideinitializer   */
59 #define UART1_RST       ((4UL<<24) | SYS_IPRST1_UART1RST_Pos)       /*!< Reset UART1 \hideinitializer   */
60 #define UART2_RST       ((4UL<<24) | SYS_IPRST1_UART2RST_Pos)       /*!< Reset UART2 \hideinitializer   */
61 #define UART3_RST       ((4UL<<24) | SYS_IPRST1_UART3RST_Pos)       /*!< Reset UART3 \hideinitializer   */
62 #define UART4_RST       ((4UL<<24) | SYS_IPRST1_UART4RST_Pos)       /*!< Reset UART4 \hideinitializer   */
63 #define UART5_RST       ((4UL<<24) | SYS_IPRST1_UART5RST_Pos)       /*!< Reset UART5 \hideinitializer   */
64 #define UART6_RST       ((4UL<<24) | SYS_IPRST1_UART6RST_Pos)       /*!< Reset UART6 \hideinitializer   */
65 #define UART7_RST       ((4UL<<24) | SYS_IPRST1_UART7RST_Pos)       /*!< Reset UART7 \hideinitializer   */
66 #define OTG_RST         ((4UL<<24) | SYS_IPRST1_OTGRST_Pos)         /*!< Reset OTG \hideinitializer     */
67 #define USBD_RST        ((4UL<<24) | SYS_IPRST1_USBDRST_Pos)        /*!< Reset USBD \hideinitializer    */
68 #define EADC0_RST       ((4UL<<24) | SYS_IPRST1_EADC0RST_Pos)       /*!< Reset EADC0 \hideinitializer   */
69 #define TRNG_RST        ((4UL<<24) | SYS_IPRST1_TRNGRST_Pos)        /*!< Reset TRNG \hideinitializer    */
70 
71 #define SPI3_RST        ((8UL<<24) | SYS_IPRST2_SPI3RST_Pos)        /*!< Reset SPI3 \hideinitializer    */
72 #define USCI0_RST       ((8UL<<24) | SYS_IPRST2_USCI0RST_Pos)       /*!< Reset USCI0 \hideinitializer   */
73 #define USCI1_RST       ((8UL<<24) | SYS_IPRST2_USCI1RST_Pos)       /*!< Reset USCI1 \hideinitializer   */
74 #define WWDT_RST        ((8UL<<24) | SYS_IPRST2_WWDTRST_Pos)        /*!< Reset WWDT \hideinitializer    */
75 #define DAC_RST         ((8UL<<24) | SYS_IPRST2_DACRST_Pos)         /*!< Reset DAC \hideinitializer     */
76 #define EPWM0_RST       ((8UL<<24) | SYS_IPRST2_EPWM0RST_Pos)       /*!< Reset EPWM0 \hideinitializer   */
77 #define EPWM1_RST       ((8UL<<24) | SYS_IPRST2_EPWM1RST_Pos)       /*!< Reset EPWM1 \hideinitializer   */
78 #define EQEI0_RST       ((8UL<<24) | SYS_IPRST2_EQEI0RST_Pos)       /*!< Reset EQEI0 \hideinitializer   */
79 #define EQEI1_RST       ((8UL<<24) | SYS_IPRST2_EQEI1RST_Pos)       /*!< Reset EQEI1 \hideinitializer   */
80 #define TK_RST          ((8UL<<24) | SYS_IPRST2_TKRST_Pos)          /*!< Reset TK \hideinitializer      */
81 #define ECAP0_RST       ((8UL<<24) | SYS_IPRST2_ECAP0RST_Pos)       /*!< Reset ECAP0 \hideinitializer   */
82 #define ECAP1_RST       ((8UL<<24) | SYS_IPRST2_ECAP1RST_Pos)       /*!< Reset ECAP1 \hideinitializer   */
83 
84 #define ACMP2_RST       ((0x18UL<<24) | SYS_IPRST3_ACMP2RST_Pos)    /*!< Reset ACMP2 \hideinitializer   */
85 #define PWM0_RST        ((0x18UL<<24) | SYS_IPRST3_PWM0RST_Pos)     /*!< Reset PWM0 \hideinitializer    */
86 #define PWM1_RST        ((0x18UL<<24) | SYS_IPRST3_PWM1RST_Pos)     /*!< Reset PWM1 \hideinitializer    */
87 #define UTCPD0_RST      ((0x18UL<<24) | SYS_IPRST3_UTCPD0RST_Pos)   /*!< Reset UTCPD0 \hideinitializer  */
88 
89 #define LPPDMA0_RST     ((0x80UL<<24) | LPSCC_IPRST0_LPPDMA0RST_Pos) /*!< Reset LPPDMA0 \hideinitializer */
90 #define LPGPIO_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPGPIORST_Pos) /*!< Reset LPGPIO \hideinitializer  */
91 #define LPSRAM_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPSRAMRST_Pos) /*!< Reset LPSRAM \hideinitializer  */
92 #define WDT_RST         ((0x80UL<<24) | LPSCC_IPRST0_WDTRST_Pos)    /*!< Reset WDT \hideinitializer     */
93 #define LPSPI0_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPSPI0RST_Pos) /*!< Reset LPSPI0 \hideinitializer  */
94 #define LPI2C0_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPI2C0RST_Pos) /*!< Reset LPI2C0 \hideinitializer  */
95 #define LPUART0_RST     ((0x80UL<<24) | LPSCC_IPRST0_LPUART0RST_Pos) /*!< Reset LPUART0 \hideinitializer */
96 #define LPTMR0_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPTMR0RST_Pos) /*!< Reset LPTMR0 \hideinitializer  */
97 #define LPTMR1_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPTMR1RST_Pos) /*!< Reset LPTMR1 \hideinitializer  */
98 #define TTMR0_RST       ((0x80UL<<24) | LPSCC_IPRST0_TTMR0RST_Pos)  /*!< Reset TTMR0 \hideinitializer   */
99 #define TTMR1_RST       ((0x80UL<<24) | LPSCC_IPRST0_TTMR1RST_Pos)  /*!< Reset TTMR1 \hideinitializer   */
100 #define LPADC0_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPADC0RST_Pos) /*!< Reset LPADC0 \hideinitializer  */
101 #define OPA_RST         ((0x80UL<<24) | LPSCC_IPRST0_OPARST_Pos)    /*!< Reset OPA \hideinitializer     */
102 
103 
104 /*---------------------------------------------------------------------------------------------------------*/
105 /*  Brown Out Detector Threshold Voltage Selection constant definitions.                                   */
106 /*---------------------------------------------------------------------------------------------------------*/
107 #define SYS_BODCTL_BOD_RST_EN           (1UL << SYS_BODCTL_BODRSTEN_Pos)    /*!< Brown-out Reset Enable \hideinitializer */
108 #define SYS_BODCTL_BOD_INTERRUPT_EN     (0UL << SYS_BODCTL_BODRSTEN_Pos)    /*!< Brown-out Interrupt Enable \hideinitializer */
109 #define SYS_BODCTL_BODVL_3_0V           (15UL << SYS_BODCTL_BODVL_Pos)      /*!< Setting Brown Out Detector Threshold Voltage as 3.0V \hideinitializer */
110 #define SYS_BODCTL_BODVL_2_8V           (14UL << SYS_BODCTL_BODVL_Pos)      /*!< Setting Brown Out Detector Threshold Voltage as 2.8V \hideinitializer */
111 #define SYS_BODCTL_BODVL_2_6V           (13UL << SYS_BODCTL_BODVL_Pos)      /*!< Setting Brown Out Detector Threshold Voltage as 2.6V \hideinitializer */
112 #define SYS_BODCTL_BODVL_2_4V           (12UL << SYS_BODCTL_BODVL_Pos)      /*!< Setting Brown Out Detector Threshold Voltage as 2.4V \hideinitializer */
113 #define SYS_BODCTL_BODVL_2_2V           (11UL << SYS_BODCTL_BODVL_Pos)      /*!< Setting Brown Out Detector Threshold Voltage as 2.2V \hideinitializer */
114 #define SYS_BODCTL_BODVL_2_0V           (10UL << SYS_BODCTL_BODVL_Pos)      /*!< Setting Brown Out Detector Threshold Voltage as 2.0V \hideinitializer */
115 #define SYS_BODCTL_BODVL_1_8V           (9UL << SYS_BODCTL_BODVL_Pos)       /*!< Setting Brown Out Detector Threshold Voltage as 1.8V \hideinitializer */
116 #define SYS_BODCTL_BODVL_1_6V           (8UL << SYS_BODCTL_BODVL_Pos)       /*!< Setting Brown Out Detector Threshold Voltage as 1.6V \hideinitializer */
117 #define SYS_BODCTL_BODVL_1_5V           (0UL << SYS_BODCTL_BODVL_Pos)       /*!< Setting Brown Out Detector Threshold Voltage as 1.5V \hideinitializer */
118 
119 #define SYS_BODCTL_LVRDGSEL_0HCLK       (0x0UL<<SYS_BODCTL_LVRDGSEL_Pos)    /*!< LVR Output De-glitch Time Without de-glitch function.  \hideinitializer */
120 #define SYS_BODCTL_LVRDGSEL_4HCLK       (0x1UL<<SYS_BODCTL_LVRDGSEL_Pos)    /*!< LVR Output De-glitch Time is selected 4HCLK            \hideinitializer */
121 #define SYS_BODCTL_LVRDGSEL_8HCLK       (0x2UL<<SYS_BODCTL_LVRDGSEL_Pos)    /*!< LVR Output De-glitch Time is selected 8HCLK            \hideinitializer */
122 #define SYS_BODCTL_LVRDGSEL_16HCLK      (0x3UL<<SYS_BODCTL_LVRDGSEL_Pos)    /*!< LVR Output De-glitch Time is selected 16HCLK           \hideinitializer */
123 #define SYS_BODCTL_LVRDGSEL_32HCLK      (0x4UL<<SYS_BODCTL_LVRDGSEL_Pos)    /*!< LVR Output De-glitch Time is selected 32HCLK           \hideinitializer */
124 #define SYS_BODCTL_LVRDGSEL_64HCLK      (0x5UL<<SYS_BODCTL_LVRDGSEL_Pos)    /*!< LVR Output De-glitch Time is selected 64HCLK           \hideinitializer */
125 #define SYS_BODCTL_LVRDGSEL_128HCLK     (0x6UL<<SYS_BODCTL_LVRDGSEL_Pos)    /*!< LVR Output De-glitch Time is selected 128HCLK          \hideinitializer */
126 #define SYS_BODCTL_LVRDGSEL_256HCLK     (0x7UL<<SYS_BODCTL_LVRDGSEL_Pos)    /*!< LVR Output De-glitch Time is selected 256HCLK          \hideinitializer */
127 
128 #define SYS_BODCTL_BODDGSEL_0HCLK       (0x0UL<<SYS_BODCTL_BODDGSEL_Pos)    /*!< BOD Output De-glitch Time is sampled by RC10K clock.   \hideinitializer */
129 #define SYS_BODCTL_BODDGSEL_4HCLK       (0x1UL<<SYS_BODCTL_BODDGSEL_Pos)    /*!< BOD Output De-glitch Time is selected 4HCLK            \hideinitializer */
130 #define SYS_BODCTL_BODDGSEL_8HCLK       (0x2UL<<SYS_BODCTL_BODDGSEL_Pos)    /*!< BOD Output De-glitch Time is selected 8HCLK            \hideinitializer */
131 #define SYS_BODCTL_BODDGSEL_16HCLK      (0x3UL<<SYS_BODCTL_BODDGSEL_Pos)    /*!< BOD Output De-glitch Time is selected 16HCLK           \hideinitializer */
132 #define SYS_BODCTL_BODDGSEL_32HCLK      (0x4UL<<SYS_BODCTL_BODDGSEL_Pos)    /*!< BOD Output De-glitch Time is selected 32HCLK           \hideinitializer */
133 #define SYS_BODCTL_BODDGSEL_64HCLK      (0x5UL<<SYS_BODCTL_BODDGSEL_Pos)    /*!< BOD Output De-glitch Time is selected 64HCLK           \hideinitializer */
134 #define SYS_BODCTL_BODDGSEL_128HCLK     (0x6UL<<SYS_BODCTL_BODDGSEL_Pos)    /*!< BOD Output De-glitch Time is selected 128HCLK          \hideinitializer */
135 #define SYS_BODCTL_BODDGSEL_256HCLK     (0x7UL<<SYS_BODCTL_BODDGSEL_Pos)    /*!< BOD Output De-glitch Time is selected 256HCLK          \hideinitializer */
136 
137 
138 /*---------------------------------------------------------------------------------------------------------*/
139 /*  Internal Voltage Source Control constant definitions.                                                  */
140 /*---------------------------------------------------------------------------------------------------------*/
141 #define SYS_IVSCTL_ADCCSEL_EADC     (0x0UL << SYS_IVSCTL_ADCCSEL_Pos)   /*!< IVSCTL ADC Control Select is EADC \hideinitializer */
142 #define SYS_IVSCTL_ADCCSEL_LPADC    (0x1UL << SYS_IVSCTL_ADCCSEL_Pos)   /*!< IVSCTL ADC Control Select is LPADC \hideinitializer */
143 
144 
145 /*---------------------------------------------------------------------------------------------------------*/
146 /*  VREFCTL constant definitions. (Write-Protection Register)                                              */
147 /*---------------------------------------------------------------------------------------------------------*/
148 #define SYS_VREFCTL_VREF_PIN        (0x0UL << SYS_VREFCTL_VREFCTL_Pos)    /*!< Vref = Vref pin \hideinitializer */
149 #define SYS_VREFCTL_VREF_1_6V       (0x3UL << SYS_VREFCTL_VREFCTL_Pos)    /*!< Vref = 1.6V \hideinitializer */
150 #define SYS_VREFCTL_VREF_2_0V       (0x7UL << SYS_VREFCTL_VREFCTL_Pos)    /*!< Vref = 2.0V \hideinitializer */
151 #define SYS_VREFCTL_VREF_2_5V       (0xBUL << SYS_VREFCTL_VREFCTL_Pos)    /*!< Vref = 2.5V \hideinitializer */
152 #define SYS_VREFCTL_VREF_3_0V       (0xFUL << SYS_VREFCTL_VREFCTL_Pos)    /*!< Vref = 3.0V \hideinitializer */
153 
154 
155 /*---------------------------------------------------------------------------------------------------------*/
156 /*  USBPHY constant definitions. (Write-Protection Register)                                               */
157 /*---------------------------------------------------------------------------------------------------------*/
158 #define SYS_USBPHY_USBROLE_STD_USBD     (0x0UL << SYS_USBPHY_USBROLE_Pos)   /*!<  Standard USB device \hideinitializer */
159 #define SYS_USBPHY_USBROLE_STD_USBH     (0x1UL << SYS_USBPHY_USBROLE_Pos)   /*!<  Standard USB host \hideinitializer */
160 #define SYS_USBPHY_USBROLE_ID_DEPH      (0x2UL << SYS_USBPHY_USBROLE_Pos)   /*!<  ID dependent device \hideinitializer */
161 #define SYS_USBPHY_USBROLE_ON_THE_GO    (0x3UL << SYS_USBPHY_USBROLE_Pos)   /*!<  On-The-Go device \hideinitializer */
162 
163 
164 /*---------------------------------------------------------------------------------------------------------*/
165 /*  PLCTL constant definitions. (Write-Protection Register)                                                */
166 /*---------------------------------------------------------------------------------------------------------*/
167 #define SYS_PLCTL_PLSEL_PL1     (0x1UL<<SYS_PLCTL_PLSEL_Pos)    /*!< Set power level to power level 1 */
168 #define SYS_PLCTL_PLSEL_PL2     (0x2UL<<SYS_PLCTL_PLSEL_Pos)    /*!< Set power level to power level 2 */
169 
170 #define SYS_PLSTS_PLSTATUS_PL1  (0x1UL<<SYS_PLSTS_PLSTATUS_Pos)
171 #define SYS_PLSTS_PLSTATUS_PL2  (0x2UL<<SYS_PLSTS_PLSTATUS_Pos)
172 
173 
174 /*---------------------------------------------------------------------------------------------------------*/
175 /*  SRAMP0 constant definitions. (Write-Protection Register)                                               */
176 /*---------------------------------------------------------------------------------------------------------*/
177 #define SYS_SRAMPC0_SRAM_NORMAL         (0x0UL) /*!< Select system SRAM power mode to normal mode */
178 #define SYS_SRAMPC0_SRAM_RETENTION      (0x2UL) /*!< Select system SRAM power mode to retention mode */
179 #define SYS_SRAMPC0_SRAM_SHUT_DOWN      (0x3UL) /*!< Select system SRAM power mode to shut down mode */
180 
181 
182 /*---------------------------------------------------------------------------------------------------------*/
183 /*  LPSCC_CLKDIV0 constant definitions.                                                                          */
184 /*---------------------------------------------------------------------------------------------------------*/
185 #define LPSCC_CLKDIV0_HCLK1(x)          (((x) - 1UL) << LPSCC_CLKDIV0_HCLK1DIV_Pos)     /*!< CLKDIV0 Setting for HCLK1 clock divider. It could be 1~16 \hideinitializer */
186 #define LPSCC_CLKDIV0_LPUART0(x)        (((x) - 1UL) << LPSCC_CLKDIV0_LPUART0DIV_Pos)   /*!< CLKDIV0 Setting for LPUART0 clock divider. It could be 1~16 \hideinitializer */
187 #define LPSCC_CLKDIV0_LPADC0(x)         (((x) - 1UL) << LPSCC_CLKDIV0_LPADC0DIV_Pos)    /*!< CLKDIV0 Setting for LPADC0 clock divider. It could be 1~16 \hideinitializer */
188 
189 #define LPSCC_CLKDIV0_PCLK2DIV1         (0x0UL << LPSCC_CLKDIV0_APB2DIV_Pos)  /*!< CLKDIV0 Setting for PCLK2 = HCLK1 \hideinitializer */
190 #define LPSCC_CLKDIV0_PCLK2DIV2         (0x1UL << LPSCC_CLKDIV0_APB2DIV_Pos)  /*!< CLKDIV0 Setting for PCLK2 = 1/2 HCLK1 \hideinitializer */
191 #define LPSCC_CLKDIV0_PCLK2DIV4         (0x2UL << LPSCC_CLKDIV0_APB2DIV_Pos)  /*!< CLKDIV0 Setting for PCLK2 = 1/4 HCLK1 \hideinitializer */
192 #define LPSCC_CLKDIV0_PCLK2DIV8         (0x3UL << LPSCC_CLKDIV0_APB2DIV_Pos)  /*!< CLKDIV0 Setting for PCLK2 = 1/8 HCLK1 \hideinitializer */
193 #define LPSCC_CLKDIV0_PCLK2DIV16        (0x4UL << LPSCC_CLKDIV0_APB2DIV_Pos)  /*!< CLKDIV0 Setting for PCLK2 = 1/16 HCLK1 \hideinitializer */
194 
195 #define LPSCC_CLKDIV0_APB2DIV_DIV1      (0x0UL << LPSCC_CLKDIV0_APB2DIV_Pos)  /*!< CLKDIV0 Setting for PCLK2 = HCLK1 \hideinitializer */
196 #define LPSCC_CLKDIV0_APB2DIV_DIV2      (0x1UL << LPSCC_CLKDIV0_APB2DIV_Pos)  /*!< CLKDIV0 Setting for PCLK2 = 1/2 HCLK1 \hideinitializer */
197 #define LPSCC_CLKDIV0_APB2DIV_DIV4      (0x2UL << LPSCC_CLKDIV0_APB2DIV_Pos)  /*!< CLKDIV0 Setting for PCLK2 = 1/4 HCLK1 \hideinitializer */
198 #define LPSCC_CLKDIV0_APB2DIV_DIV8      (0x3UL << LPSCC_CLKDIV0_APB2DIV_Pos)  /*!< CLKDIV0 Setting for PCLK2 = 1/8 HCLK1 \hideinitializer */
199 #define LPSCC_CLKDIV0_APB2DIV_DIV16     (0x4UL << LPSCC_CLKDIV0_APB2DIV_Pos)  /*!< CLKDIV0 Setting for PCLK2 = 1/16 HCLK1 \hideinitializer */
200 
201 /*----------------------------------------------------------------------------------------------------------*/
202 /*  LPSCC_CLKSEL0 constant definitions.  (Write-protection)                                                 */
203 /*----------------------------------------------------------------------------------------------------------*/
204 #define LPSCC_CLKSEL0_LPUART0SEL_HIRC   (0x0UL << LPSCC_CLKSEL0_LPUART0SEL_Pos)
205 #define LPSCC_CLKSEL0_LPUART0SEL_MIRC   (0x1UL << LPSCC_CLKSEL0_LPUART0SEL_Pos)
206 #define LPSCC_CLKSEL0_LPUART0SEL_LXT    (0x2UL << LPSCC_CLKSEL0_LPUART0SEL_Pos)
207 
208 #define LPSCC_CLKSEL0_LPSPI0SEL_HIRC    (0x0UL << LPSCC_CLKSEL0_LPSPI0SEL_Pos)
209 #define LPSCC_CLKSEL0_LPSPI0SEL_MIRC    (0x1UL << LPSCC_CLKSEL0_LPSPI0SEL_Pos)
210 
211 #define LPSCC_CLKSEL0_TTMR0SEL_HIRC     (0x0UL << LPSCC_CLKSEL0_TTMR0SEL_Pos)
212 #define LPSCC_CLKSEL0_TTMR0SEL_MIRC     (0x1UL << LPSCC_CLKSEL0_TTMR0SEL_Pos)
213 #define LPSCC_CLKSEL0_TTMR0SEL_LXT      (0x2UL << LPSCC_CLKSEL0_TTMR0SEL_Pos)
214 #define LPSCC_CLKSEL0_TTMR0SEL_LIRC     (0x3UL << LPSCC_CLKSEL0_TTMR0SEL_Pos)
215 
216 #define LPSCC_CLKSEL0_TTMR1SEL_HIRC     (0x0UL << LPSCC_CLKSEL0_TTMR1SEL_Pos)
217 #define LPSCC_CLKSEL0_TTMR1SEL_MIRC     (0x1UL << LPSCC_CLKSEL0_TTMR1SEL_Pos)
218 #define LPSCC_CLKSEL0_TTMR1SEL_LXT      (0x2UL << LPSCC_CLKSEL0_TTMR1SEL_Pos)
219 #define LPSCC_CLKSEL0_TTMR1SEL_LIRC     (0x3UL << LPSCC_CLKSEL0_TTMR1SEL_Pos)
220 
221 #define LPSCC_CLKSEL0_LPTMR0SEL_HIRC    (0x0UL << LPSCC_CLKSEL0_LPTMR0SEL_Pos)
222 #define LPSCC_CLKSEL0_LPTMR0SEL_MIRC    (0x1UL << LPSCC_CLKSEL0_LPTMR0SEL_Pos)
223 #define LPSCC_CLKSEL0_LPTMR0SEL_LXT     (0x2UL << LPSCC_CLKSEL0_LPTMR0SEL_Pos)
224 #define LPSCC_CLKSEL0_LPTMR0SEL_LIRC    (0x3UL << LPSCC_CLKSEL0_LPTMR0SEL_Pos)
225 #define LPSCC_CLKSEL0_LPTMR0SEL_EXT     (0x4UL << LPSCC_CLKSEL0_LPTMR0SEL_Pos)
226 
227 #define LPSCC_CLKSEL0_LPTMR1SEL_HIRC    (0x0UL << LPSCC_CLKSEL0_LPTMR1SEL_Pos)
228 #define LPSCC_CLKSEL0_LPTMR1SEL_MIRC    (0x1UL << LPSCC_CLKSEL0_LPTMR1SEL_Pos)
229 #define LPSCC_CLKSEL0_LPTMR1SEL_LXT     (0x2UL << LPSCC_CLKSEL0_LPTMR1SEL_Pos)
230 #define LPSCC_CLKSEL0_LPTMR1SEL_LIRC    (0x3UL << LPSCC_CLKSEL0_LPTMR1SEL_Pos)
231 #define LPSCC_CLKSEL0_LPTMR1SEL_EXT     (0x4UL << LPSCC_CLKSEL0_LPTMR1SEL_Pos)
232 
233 #define LPSCC_CLKSEL0_LPADC0SEL_HIRC    (0x0UL << LPSCC_CLKSEL0_LPADC0SEL_Pos)
234 #define LPSCC_CLKSEL0_LPADC0SEL_MIRC    (0x1UL << LPSCC_CLKSEL0_LPADC0SEL_Pos)
235 #define LPSCC_CLKSEL0_LPADC0SEL_LXT     (0x2UL << LPSCC_CLKSEL0_LPADC0SEL_Pos)
236 #define LPSCC_CLKSEL0_LPADC0SEL_PCLK2   (0x3UL << LPSCC_CLKSEL0_LPADC0SEL_Pos)
237 
238 #define LPSCC_CLKSEL0_WDTSEL_LIRC           (0x0UL << LPSCC_CLKSEL0_WDTSEL_Pos)
239 #define LPSCC_CLKSEL0_WDTSEL_LXT            (0x1UL << LPSCC_CLKSEL0_WDTSEL_Pos)
240 #define LPSCC_CLKSEL0_WDTSEL_HCLK1_DIV2048  (0x2UL << LPSCC_CLKSEL0_WDTSEL_Pos)
241 
242 /*----------------------------------------------------------------------------------------------------------*/
243 /*  LPSCC_CLKMCTL constant definitions.  (Write-protection)                                                 */
244 /*----------------------------------------------------------------------------------------------------------*/
245 #define LPSCC_CLKMCTL_CLKM0SEL_HCLK1    (0x0UL << LPSCC_CLKMCTL_CLKM0SEL_Pos)
246 #define LPSCC_CLKMCTL_CLKM0SEL_HIRC     (0x1UL << LPSCC_CLKMCTL_CLKM0SEL_Pos)
247 #define LPSCC_CLKMCTL_CLKM0SEL_MIRC     (0x2UL << LPSCC_CLKMCTL_CLKM0SEL_Pos)
248 
249 #define LPSCC_CLKMCTL_CLKM1SEL_HCLK1    (0x0UL << LPSCC_CLKMCTL_CLKM1SEL_Pos)
250 #define LPSCC_CLKMCTL_CLKM1SEL_HIRC     (0x1UL << LPSCC_CLKMCTL_CLKM1SEL_Pos)
251 #define LPSCC_CLKMCTL_CLKM1SEL_MIRC     (0x2UL << LPSCC_CLKMCTL_CLKM1SEL_Pos)
252 
253 
254 /*---------------------------------------------------------------------------------------------------------*/
255 /*  Multi-Function constant definitions.                                                                   */
256 /*---------------------------------------------------------------------------------------------------------*/
257 /* How to use below #define?
258 Example 1: If user want to set PA.0 as SC0_CLK in initial function,
259            user can issue following command to achieve it.
260 
261            SYS->GPA_MFPL  = (SYS->GPA_MFPL & (~SYS_GPA_MFPL_PA0MFP_Msk) ) | SYS_GPA_MFPL_PA0_MFP_SC0_CLK  ;
262 
263 */
264 /* PA.0 MFP */
265 #define SYS_GPA_MFP0_PA0MFP_GPIO            (0x0UL<<SYS_GPA_MFP0_PA0MFP_Pos)    /*!< GPA_MFP0 PA0 setting for GPIO              */
266 #define SYS_GPA_MFP0_PA0MFP_QSPI0_MOSI0     (0x3UL<<SYS_GPA_MFP0_PA0MFP_Pos)    /*!< GPA_MFP0 PA0 setting for QSPI0_MOSI0       */
267 #define SYS_GPA_MFP0_PA0MFP_SPI0_MOSI       (0x4UL<<SYS_GPA_MFP0_PA0MFP_Pos)    /*!< GPA_MFP0 PA0 setting for SPI0_MOSI         */
268 #define SYS_GPA_MFP0_PA0MFP_UART0_RXD       (0x7UL<<SYS_GPA_MFP0_PA0MFP_Pos)    /*!< GPA_MFP0 PA0 setting for UART0_RXD         */
269 #define SYS_GPA_MFP0_PA0MFP_UART1_nRTS      (0x8UL<<SYS_GPA_MFP0_PA0MFP_Pos)    /*!< GPA_MFP0 PA0 setting for UART1_nRTS        */
270 #define SYS_GPA_MFP0_PA0MFP_I2C2_SDA        (0x9UL<<SYS_GPA_MFP0_PA0MFP_Pos)    /*!< GPA_MFP0 PA0 setting for I2C2_SDA          */
271 #define SYS_GPA_MFP0_PA0MFP_CANFD1_RXD      (0xAUL<<SYS_GPA_MFP0_PA0MFP_Pos)    /*!< GPA_MFP0 PA0 setting for CANFD1_RXD        */
272 #define SYS_GPA_MFP0_PA0MFP_EPWM0_BRAKE0    (0xBUL<<SYS_GPA_MFP0_PA0MFP_Pos)    /*!< GPA_MFP0 PA0 setting for EPWM0_BRAKE0      */
273 #define SYS_GPA_MFP0_PA0MFP_PWM0_CH0        (0xCUL<<SYS_GPA_MFP0_PA0MFP_Pos)    /*!< GPA_MFP0 PA0 setting for PWM0_CH0          */
274 #define SYS_GPA_MFP0_PA0MFP_EPWM0_CH5       (0xDUL<<SYS_GPA_MFP0_PA0MFP_Pos)    /*!< GPA_MFP0 PA0 setting for EPWM0_CH5         */
275 #define SYS_GPA_MFP0_PA0MFP_ACMP2_WLAT      (0xEUL<<SYS_GPA_MFP0_PA0MFP_Pos)    /*!< GPA_MFP0 PA0 setting for ACMP2_WLAT        */
276 #define SYS_GPA_MFP0_PA0MFP_DAC0_ST         (0xFUL<<SYS_GPA_MFP0_PA0MFP_Pos)    /*!< GPA_MFP0 PA0 setting for DAC0_ST           */
277 #define SYS_GPA_MFP0_PA0MFP_TK_TK8          (0x10UL<<SYS_GPA_MFP0_PA0MFP_Pos)   /*!< GPA_MFP0 PA0 setting for TK_TK8            */
278 #define SYS_GPA_MFP0_PA0MFP_UTCPD0_VCNEN1   (0x11UL<<SYS_GPA_MFP0_PA0MFP_Pos)   /*!< GPA_MFP0 PA0 setting for UTCPD0_VCNEN1     */
279 #define SYS_GPA_MFP0_PA0MFP_LPSPI0_MOSI     (0x14UL<<SYS_GPA_MFP0_PA0MFP_Pos)   /*!< GPA_MFP0 PA0 setting for LPSPI0_MOSI       */
280 #define SYS_GPA_MFP0_PA0MFP_LPUART0_RXD     (0x15UL<<SYS_GPA_MFP0_PA0MFP_Pos)   /*!< GPA_MFP0 PA0 setting for LPUART0_RXD       */
281 #define SYS_GPA_MFP0_PA0MFP_LPIO0           (0x17UL<<SYS_GPA_MFP0_PA0MFP_Pos)   /*!< GPA_MFP0 PA0 setting for LPIO0             */
282 
283 /* PA.1 MFP */
284 #define SYS_GPA_MFP0_PA1MFP_GPIO            (0x0UL<<SYS_GPA_MFP0_PA1MFP_Pos)    /*!< GPA_MFP0 PA1 setting for GPIO              */
285 #define SYS_GPA_MFP0_PA1MFP_QSPI0_MISO0     (0x3UL<<SYS_GPA_MFP0_PA1MFP_Pos)    /*!< GPA_MFP0 PA1 setting for QSPI0_MISO0       */
286 #define SYS_GPA_MFP0_PA1MFP_SPI0_MISO       (0x4UL<<SYS_GPA_MFP0_PA1MFP_Pos)    /*!< GPA_MFP0 PA1 setting for SPI0_MISO         */
287 #define SYS_GPA_MFP0_PA1MFP_UART0_TXD       (0x7UL<<SYS_GPA_MFP0_PA1MFP_Pos)    /*!< GPA_MFP0 PA1 setting for UART0_TXD         */
288 #define SYS_GPA_MFP0_PA1MFP_UART1_nCTS      (0x8UL<<SYS_GPA_MFP0_PA1MFP_Pos)    /*!< GPA_MFP0 PA1 setting for UART1_nCTS        */
289 #define SYS_GPA_MFP0_PA1MFP_I2C2_SCL        (0x9UL<<SYS_GPA_MFP0_PA1MFP_Pos)    /*!< GPA_MFP0 PA1 setting for I2C2_SCL          */
290 #define SYS_GPA_MFP0_PA1MFP_CANFD1_TXD      (0xAUL<<SYS_GPA_MFP0_PA1MFP_Pos)    /*!< GPA_MFP0 PA1 setting for CANFD1_TXD        */
291 #define SYS_GPA_MFP0_PA1MFP_EQEI0_INDEX     (0xBUL<<SYS_GPA_MFP0_PA1MFP_Pos)    /*!< GPA_MFP0 PA1 setting for EQEI0_INDEX       */
292 #define SYS_GPA_MFP0_PA1MFP_PWM0_CH1        (0xCUL<<SYS_GPA_MFP0_PA1MFP_Pos)    /*!< GPA_MFP0 PA1 setting for PWM0_CH1          */
293 #define SYS_GPA_MFP0_PA1MFP_EPWM0_CH4       (0xDUL<<SYS_GPA_MFP0_PA1MFP_Pos)    /*!< GPA_MFP0 PA1 setting for EPWM0_CH4         */
294 #define SYS_GPA_MFP0_PA1MFP_ACMP2_O         (0xEUL<<SYS_GPA_MFP0_PA1MFP_Pos)    /*!< GPA_MFP0 PA1 setting for ACMP2_O           */
295 #define SYS_GPA_MFP0_PA1MFP_DAC1_ST         (0xFUL<<SYS_GPA_MFP0_PA1MFP_Pos)    /*!< GPA_MFP0 PA1 setting for DAC1_ST           */
296 #define SYS_GPA_MFP0_PA1MFP_TK_TK7          (0x10UL<<SYS_GPA_MFP0_PA1MFP_Pos)   /*!< GPA_MFP0 PA1 setting for TK_TK7            */
297 #define SYS_GPA_MFP0_PA1MFP_UTCPD0_FRSTX1   (0x11UL<<SYS_GPA_MFP0_PA1MFP_Pos)   /*!< GPA_MFP0 PA1 setting for UTCPD0_FRSTX1     */
298 #define SYS_GPA_MFP0_PA1MFP_UTCPD0_DISCHG   (0x12UL<<SYS_GPA_MFP0_PA1MFP_Pos)   /*!< GPA_MFP0 PA1 setting for UTCPD0_DISCHG     */
299 #define SYS_GPA_MFP0_PA1MFP_LPSPI0_MISO     (0x14UL<<SYS_GPA_MFP0_PA1MFP_Pos)   /*!< GPA_MFP0 PA1 setting for LPSPI0_MISO       */
300 #define SYS_GPA_MFP0_PA1MFP_LPUART0_TXD     (0x15UL<<SYS_GPA_MFP0_PA1MFP_Pos)   /*!< GPA_MFP0 PA1 setting for LPUART0_TXD       */
301 #define SYS_GPA_MFP0_PA1MFP_LPIO1           (0x17UL<<SYS_GPA_MFP0_PA1MFP_Pos)   /*!< GPA_MFP0 PA1 setting for LPIO1             */
302 
303 /* PA.2 MFP */
304 #define SYS_GPA_MFP0_PA2MFP_GPIO            (0x0UL<<SYS_GPA_MFP0_PA2MFP_Pos)    /*!< GPA_MFP0 PA2 setting for GPIO              */
305 #define SYS_GPA_MFP0_PA2MFP_QSPI0_CLK       (0x3UL<<SYS_GPA_MFP0_PA2MFP_Pos)    /*!< GPA_MFP0 PA2 setting for QSPI0_CLK         */
306 #define SYS_GPA_MFP0_PA2MFP_SPI0_CLK        (0x4UL<<SYS_GPA_MFP0_PA2MFP_Pos)    /*!< GPA_MFP0 PA2 setting for SPI0_CLK          */
307 #define SYS_GPA_MFP0_PA2MFP_UART4_RXD       (0x5UL<<SYS_GPA_MFP0_PA2MFP_Pos)    /*!< GPA_MFP0 PA2 setting for UART4_RXD         */
308 #define SYS_GPA_MFP0_PA2MFP_I2C0_SMBSUS     (0x7UL<<SYS_GPA_MFP0_PA2MFP_Pos)    /*!< GPA_MFP0 PA2 setting for I2C0_SMBSUS       */
309 #define SYS_GPA_MFP0_PA2MFP_UART1_RXD       (0x8UL<<SYS_GPA_MFP0_PA2MFP_Pos)    /*!< GPA_MFP0 PA2 setting for UART1_RXD         */
310 #define SYS_GPA_MFP0_PA2MFP_I2C1_SDA        (0x9UL<<SYS_GPA_MFP0_PA2MFP_Pos)    /*!< GPA_MFP0 PA2 setting for I2C1_SDA          */
311 #define SYS_GPA_MFP0_PA2MFP_EQEI0_A         (0xBUL<<SYS_GPA_MFP0_PA2MFP_Pos)    /*!< GPA_MFP0 PA2 setting for EQEI0_A           */
312 #define SYS_GPA_MFP0_PA2MFP_PWM0_CH2        (0xCUL<<SYS_GPA_MFP0_PA2MFP_Pos)    /*!< GPA_MFP0 PA2 setting for PWM0_CH2          */
313 #define SYS_GPA_MFP0_PA2MFP_EPWM0_CH3       (0xDUL<<SYS_GPA_MFP0_PA2MFP_Pos)    /*!< GPA_MFP0 PA2 setting for EPWM0_CH3         */
314 #define SYS_GPA_MFP0_PA2MFP_TK_TK6          (0x10UL<<SYS_GPA_MFP0_PA2MFP_Pos)   /*!< GPA_MFP0 PA2 setting for TK_TK6            */
315 #define SYS_GPA_MFP0_PA2MFP_UTCPD0_VBSRCEN  (0x11UL<<SYS_GPA_MFP0_PA2MFP_Pos)   /*!< GPA_MFP0 PA2 setting for UTCPD0_VBSRCEN    */
316 #define SYS_GPA_MFP0_PA2MFP_LPSPI0_CLK      (0x14UL<<SYS_GPA_MFP0_PA2MFP_Pos)   /*!< GPA_MFP0 PA2 setting for LPSPI0_CLK        */
317 
318 /* PA.3 MFP */
319 #define SYS_GPA_MFP0_PA3MFP_GPIO            (0x0UL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for GPIO              */
320 #define SYS_GPA_MFP0_PA3MFP_QSPI0_SS        (0x3UL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for QSPI0_SS          */
321 #define SYS_GPA_MFP0_PA3MFP_SPI0_SS         (0x4UL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for SPI0_SS           */
322 #define SYS_GPA_MFP0_PA3MFP_UART4_TXD       (0x5UL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for UART4_TXD         */
323 #define SYS_GPA_MFP0_PA3MFP_TK_SE           (0x6UL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for TK_SE             */
324 #define SYS_GPA_MFP0_PA3MFP_I2C0_SMBAL      (0x7UL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for I2C0_SMBAL        */
325 #define SYS_GPA_MFP0_PA3MFP_UART1_TXD       (0x8UL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for UART1_TXD         */
326 #define SYS_GPA_MFP0_PA3MFP_I2C1_SCL        (0x9UL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for I2C1_SCL          */
327 #define SYS_GPA_MFP0_PA3MFP_PWM1_BRAKE1     (0xAUL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for PWM1_BRAKE1       */
328 #define SYS_GPA_MFP0_PA3MFP_EQEI0_B         (0xBUL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for EQEI0_B           */
329 #define SYS_GPA_MFP0_PA3MFP_PWM0_CH3        (0xCUL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for PWM0_CH3          */
330 #define SYS_GPA_MFP0_PA3MFP_EPWM0_CH2       (0xDUL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for EPWM0_CH2         */
331 #define SYS_GPA_MFP0_PA3MFP_CLKO            (0xEUL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for CLKO              */
332 #define SYS_GPA_MFP0_PA3MFP_EPWM1_BRAKE1    (0xFUL<<SYS_GPA_MFP0_PA3MFP_Pos)    /*!< GPA_MFP0 PA3 setting for EPWM1_BRAKE1      */
333 #define SYS_GPA_MFP0_PA3MFP_TK_TK5          (0x10UL<<SYS_GPA_MFP0_PA3MFP_Pos)   /*!< GPA_MFP0 PA3 setting for TK_TK5            */
334 #define SYS_GPA_MFP0_PA3MFP_UTCPD0_VBSNKEN  (0x11UL<<SYS_GPA_MFP0_PA3MFP_Pos)   /*!< GPA_MFP0 PA3 setting for UTCPD0_VBSNKEN    */
335 #define SYS_GPA_MFP0_PA3MFP_LPSPI0_SS       (0x14UL<<SYS_GPA_MFP0_PA3MFP_Pos)   /*!< GPA_MFP0 PA3 setting for LPSPI0_SS         */
336 
337 /* PA.4 MFP */
338 #define SYS_GPA_MFP1_PA4MFP_GPIO            (0x0UL<<SYS_GPA_MFP1_PA4MFP_Pos)    /*!< GPA_MFP1 PA4 setting for GPIO              */
339 #define SYS_GPA_MFP1_PA4MFP_QSPI0_MOSI1     (0x3UL<<SYS_GPA_MFP1_PA4MFP_Pos)    /*!< GPA_MFP1 PA4 setting for QSPI0_MOSI1       */
340 #define SYS_GPA_MFP1_PA4MFP_SPI0_I2SMCLK    (0x4UL<<SYS_GPA_MFP1_PA4MFP_Pos)    /*!< GPA_MFP1 PA4 setting for SPI0_I2SMCLK      */
341 #define SYS_GPA_MFP1_PA4MFP_UART0_nRTS      (0x7UL<<SYS_GPA_MFP1_PA4MFP_Pos)    /*!< GPA_MFP1 PA4 setting for UART0_nRTS        */
342 #define SYS_GPA_MFP1_PA4MFP_UART0_RXD       (0x8UL<<SYS_GPA_MFP1_PA4MFP_Pos)    /*!< GPA_MFP1 PA4 setting for UART0_RXD         */
343 #define SYS_GPA_MFP1_PA4MFP_I2C0_SDA        (0x9UL<<SYS_GPA_MFP1_PA4MFP_Pos)    /*!< GPA_MFP1 PA4 setting for I2C0_SDA          */
344 #define SYS_GPA_MFP1_PA4MFP_CANFD0_RXD      (0xAUL<<SYS_GPA_MFP1_PA4MFP_Pos)    /*!< GPA_MFP1 PA4 setting for CANFD0_RXD        */
345 #define SYS_GPA_MFP1_PA4MFP_UART5_RXD       (0xBUL<<SYS_GPA_MFP1_PA4MFP_Pos)    /*!< GPA_MFP1 PA4 setting for UART5_RXD         */
346 #define SYS_GPA_MFP1_PA4MFP_PWM0_CH4        (0xCUL<<SYS_GPA_MFP1_PA4MFP_Pos)    /*!< GPA_MFP1 PA4 setting for PWM0_CH4          */
347 #define SYS_GPA_MFP1_PA4MFP_EPWM0_CH1       (0xDUL<<SYS_GPA_MFP1_PA4MFP_Pos)    /*!< GPA_MFP1 PA4 setting for EPWM0_CH1         */
348 #define SYS_GPA_MFP1_PA4MFP_EQEI0_A         (0xEUL<<SYS_GPA_MFP1_PA4MFP_Pos)    /*!< GPA_MFP1 PA4 setting for EQEI0_A           */
349 #define SYS_GPA_MFP1_PA4MFP_TK_TK4          (0x10UL<<SYS_GPA_MFP1_PA4MFP_Pos)   /*!< GPA_MFP1 PA4 setting for TK_TK4            */
350 #define SYS_GPA_MFP1_PA4MFP_UTCPD0_VBSRCEN  (0x11UL<<SYS_GPA_MFP1_PA4MFP_Pos)   /*!< GPA_MFP1 PA4 setting for UTCPD0_VBSRCEN    */
351 #define SYS_GPA_MFP1_PA4MFP_LPUART0_RXD     (0x14UL<<SYS_GPA_MFP1_PA4MFP_Pos)   /*!< GPA_MFP1 PA4 setting for LPUART0_RXD       */
352 #define SYS_GPA_MFP1_PA4MFP_LPUART0_nRTS    (0x15UL<<SYS_GPA_MFP1_PA4MFP_Pos)   /*!< GPA_MFP1 PA4 setting for LPUART0_nRTS      */
353 #define SYS_GPA_MFP1_PA4MFP_LPI2C0_SDA      (0x16UL<<SYS_GPA_MFP1_PA4MFP_Pos)   /*!< GPA_MFP1 PA4 setting for LPI2C0_SDA        */
354 
355 /* PA.5 MFP */
356 #define SYS_GPA_MFP1_PA5MFP_GPIO            (0x0UL<<SYS_GPA_MFP1_PA5MFP_Pos)    /*!< GPA_MFP1 PA5 setting for GPIO              */
357 #define SYS_GPA_MFP1_PA5MFP_QSPI0_MISO1     (0x3UL<<SYS_GPA_MFP1_PA5MFP_Pos)    /*!< GPA_MFP1 PA5 setting for QSPI0_MISO1       */
358 #define SYS_GPA_MFP1_PA5MFP_SPI1_I2SMCLK    (0x4UL<<SYS_GPA_MFP1_PA5MFP_Pos)    /*!< GPA_MFP1 PA5 setting for SPI1_I2SMCLK      */
359 #define SYS_GPA_MFP1_PA5MFP_UART0_nCTS      (0x7UL<<SYS_GPA_MFP1_PA5MFP_Pos)    /*!< GPA_MFP1 PA5 setting for UART0_nCTS        */
360 #define SYS_GPA_MFP1_PA5MFP_UART0_TXD       (0x8UL<<SYS_GPA_MFP1_PA5MFP_Pos)    /*!< GPA_MFP1 PA5 setting for UART0_TXD         */
361 #define SYS_GPA_MFP1_PA5MFP_I2C0_SCL        (0x9UL<<SYS_GPA_MFP1_PA5MFP_Pos)    /*!< GPA_MFP1 PA5 setting for I2C0_SCL          */
362 #define SYS_GPA_MFP1_PA5MFP_CANFD0_TXD      (0xAUL<<SYS_GPA_MFP1_PA5MFP_Pos)    /*!< GPA_MFP1 PA5 setting for CANFD0_TXD        */
363 #define SYS_GPA_MFP1_PA5MFP_UART5_TXD       (0xBUL<<SYS_GPA_MFP1_PA5MFP_Pos)    /*!< GPA_MFP1 PA5 setting for UART5_TXD         */
364 #define SYS_GPA_MFP1_PA5MFP_PWM0_CH5        (0xCUL<<SYS_GPA_MFP1_PA5MFP_Pos)    /*!< GPA_MFP1 PA5 setting for PWM0_CH5          */
365 #define SYS_GPA_MFP1_PA5MFP_EPWM0_CH0       (0xDUL<<SYS_GPA_MFP1_PA5MFP_Pos)    /*!< GPA_MFP1 PA5 setting for EPWM0_CH0         */
366 #define SYS_GPA_MFP1_PA5MFP_EQEI0_INDEX     (0xEUL<<SYS_GPA_MFP1_PA5MFP_Pos)    /*!< GPA_MFP1 PA5 setting for EQEI0_INDEX       */
367 #define SYS_GPA_MFP1_PA5MFP_TK_TK3          (0x10UL<<SYS_GPA_MFP1_PA5MFP_Pos)   /*!< GPA_MFP1 PA5 setting for TK_TK3            */
368 #define SYS_GPA_MFP1_PA5MFP_UTCPD0_VBSNKEN  (0x11UL<<SYS_GPA_MFP1_PA5MFP_Pos)   /*!< GPA_MFP1 PA5 setting for UTCPD0_VBSNKEN    */
369 #define SYS_GPA_MFP1_PA5MFP_LPUART0_TXD     (0x14UL<<SYS_GPA_MFP1_PA5MFP_Pos)   /*!< GPA_MFP1 PA5 setting for LPUART0_TXD       */
370 #define SYS_GPA_MFP1_PA5MFP_LPUART0_nCTS    (0x15UL<<SYS_GPA_MFP1_PA5MFP_Pos)   /*!< GPA_MFP1 PA5 setting for LPUART0_nCTS      */
371 #define SYS_GPA_MFP1_PA5MFP_LPI2C0_SCL      (0x16UL<<SYS_GPA_MFP1_PA5MFP_Pos)   /*!< GPA_MFP1 PA5 setting for LPI2C0_SCL        */
372 
373 /* PA.6 MFP */
374 #define SYS_GPA_MFP1_PA6MFP_GPIO            (0x0UL<<SYS_GPA_MFP1_PA6MFP_Pos)    /*!< GPA_MFP1 PA6 setting for GPIO              */
375 #define SYS_GPA_MFP1_PA6MFP_EBI_AD6         (0x2UL<<SYS_GPA_MFP1_PA6MFP_Pos)    /*!< GPA_MFP1 PA6 setting for EBI_AD6           */
376 #define SYS_GPA_MFP1_PA6MFP_SPI1_SS         (0x4UL<<SYS_GPA_MFP1_PA6MFP_Pos)    /*!< GPA_MFP1 PA6 setting for SPI1_SS           */
377 #define SYS_GPA_MFP1_PA6MFP_UART0_RXD       (0x7UL<<SYS_GPA_MFP1_PA6MFP_Pos)    /*!< GPA_MFP1 PA6 setting for UART0_RXD         */
378 #define SYS_GPA_MFP1_PA6MFP_I2C1_SDA        (0x8UL<<SYS_GPA_MFP1_PA6MFP_Pos)    /*!< GPA_MFP1 PA6 setting for I2C1_SDA          */
379 #define SYS_GPA_MFP1_PA6MFP_EPWM1_CH5       (0xBUL<<SYS_GPA_MFP1_PA6MFP_Pos)    /*!< GPA_MFP1 PA6 setting for EPWM1_CH5         */
380 #define SYS_GPA_MFP1_PA6MFP_PWM1_CH3        (0xCUL<<SYS_GPA_MFP1_PA6MFP_Pos)    /*!< GPA_MFP1 PA6 setting for PWM1_CH3          */
381 #define SYS_GPA_MFP1_PA6MFP_ACMP1_WLAT      (0xDUL<<SYS_GPA_MFP1_PA6MFP_Pos)    /*!< GPA_MFP1 PA6 setting for ACMP1_WLAT        */
382 #define SYS_GPA_MFP1_PA6MFP_TM3             (0xEUL<<SYS_GPA_MFP1_PA6MFP_Pos)    /*!< GPA_MFP1 PA6 setting for TM3               */
383 #define SYS_GPA_MFP1_PA6MFP_INT0            (0xFUL<<SYS_GPA_MFP1_PA6MFP_Pos)    /*!< GPA_MFP1 PA6 setting for INT0              */
384 #define SYS_GPA_MFP1_PA6MFP_TK_TK1          (0x10UL<<SYS_GPA_MFP1_PA6MFP_Pos)   /*!< GPA_MFP1 PA6 setting for TK_TK1            */
385 #define SYS_GPA_MFP1_PA6MFP_UTCPD0_VBSRCEN  (0x11UL<<SYS_GPA_MFP1_PA6MFP_Pos)   /*!< GPA_MFP1 PA6 setting for UTCPD0_VBSRCEN    */
386 #define SYS_GPA_MFP1_PA6MFP_LPUART0_RXD     (0x15UL<<SYS_GPA_MFP1_PA6MFP_Pos)   /*!< GPA_MFP1 PA6 setting for LPUART0_RXD       */
387 #define SYS_GPA_MFP1_PA6MFP_LPIO4           (0x17UL<<SYS_GPA_MFP1_PA6MFP_Pos)   /*!< GPA_MFP1 PA6 setting for LPIO4             */
388 
389 /* PA.7 MFP */
390 #define SYS_GPA_MFP1_PA7MFP_GPIO            (0x0UL<<SYS_GPA_MFP1_PA7MFP_Pos)    /*!< GPA_MFP1 PA7 setting for GPIO              */
391 #define SYS_GPA_MFP1_PA7MFP_EBI_AD7         (0x2UL<<SYS_GPA_MFP1_PA7MFP_Pos)    /*!< GPA_MFP1 PA7 setting for EBI_AD7           */
392 #define SYS_GPA_MFP1_PA7MFP_SPI1_CLK        (0x4UL<<SYS_GPA_MFP1_PA7MFP_Pos)    /*!< GPA_MFP1 PA7 setting for SPI1_CLK          */
393 #define SYS_GPA_MFP1_PA7MFP_UART0_TXD       (0x7UL<<SYS_GPA_MFP1_PA7MFP_Pos)    /*!< GPA_MFP1 PA7 setting for UART0_TXD         */
394 #define SYS_GPA_MFP1_PA7MFP_I2C1_SCL        (0x8UL<<SYS_GPA_MFP1_PA7MFP_Pos)    /*!< GPA_MFP1 PA7 setting for I2C1_SCL          */
395 #define SYS_GPA_MFP1_PA7MFP_EPWM1_CH4       (0xBUL<<SYS_GPA_MFP1_PA7MFP_Pos)    /*!< GPA_MFP1 PA7 setting for EPWM1_CH4         */
396 #define SYS_GPA_MFP1_PA7MFP_PWM1_CH2        (0xCUL<<SYS_GPA_MFP1_PA7MFP_Pos)    /*!< GPA_MFP1 PA7 setting for PWM1_CH2          */
397 #define SYS_GPA_MFP1_PA7MFP_ACMP0_WLAT      (0xDUL<<SYS_GPA_MFP1_PA7MFP_Pos)    /*!< GPA_MFP1 PA7 setting for ACMP0_WLAT        */
398 #define SYS_GPA_MFP1_PA7MFP_TM2             (0xEUL<<SYS_GPA_MFP1_PA7MFP_Pos)    /*!< GPA_MFP1 PA7 setting for TM2               */
399 #define SYS_GPA_MFP1_PA7MFP_INT1            (0xFUL<<SYS_GPA_MFP1_PA7MFP_Pos)    /*!< GPA_MFP1 PA7 setting for INT1              */
400 #define SYS_GPA_MFP1_PA7MFP_TK_TK0          (0x10UL<<SYS_GPA_MFP1_PA7MFP_Pos)   /*!< GPA_MFP1 PA7 setting for TK_TK0            */
401 #define SYS_GPA_MFP1_PA7MFP_UTCPD0_VBSNKEN  (0x11UL<<SYS_GPA_MFP1_PA7MFP_Pos)   /*!< GPA_MFP1 PA7 setting for UTCPD0_VBSNKEN    */
402 #define SYS_GPA_MFP1_PA7MFP_LPUART0_TXD     (0x15UL<<SYS_GPA_MFP1_PA7MFP_Pos)   /*!< GPA_MFP1 PA7 setting for LPUART0_TXD       */
403 #define SYS_GPA_MFP1_PA7MFP_LPIO5           (0x17UL<<SYS_GPA_MFP1_PA7MFP_Pos)   /*!< GPA_MFP1 PA7 setting for LPIO5             */
404 
405 /* PA.8 MFP */
406 #define SYS_GPA_MFP2_PA8MFP_GPIO            (0x0UL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for GPIO              */
407 #define SYS_GPA_MFP2_PA8MFP_EADC0_CH20      (0x1UL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for EADC0_CH20        */
408 #define SYS_GPA_MFP2_PA8MFP_LPADC0_CH20     (0x1UL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for LPADC0_CH20       */
409 #define SYS_GPA_MFP2_PA8MFP_OPA1_P0         (0x1UL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for OPA1_P0           */
410 #define SYS_GPA_MFP2_PA8MFP_EBI_ALE         (0x2UL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for EBI_ALE           */
411 #define SYS_GPA_MFP2_PA8MFP_SPI3_MOSI       (0x5UL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for SPI3_MOSI         */
412 #define SYS_GPA_MFP2_PA8MFP_USCI0_CTL1      (0x6UL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for USCI0_CTL1        */
413 #define SYS_GPA_MFP2_PA8MFP_UART1_RXD       (0x7UL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for UART1_RXD         */
414 #define SYS_GPA_MFP2_PA8MFP_UART7_RXD       (0x8UL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for UART7_RXD         */
415 #define SYS_GPA_MFP2_PA8MFP_PWM0_CH3        (0x9UL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for PWM0_CH3          */
416 #define SYS_GPA_MFP2_PA8MFP_EQEI1_B         (0xAUL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for EQEI1_B           */
417 #define SYS_GPA_MFP2_PA8MFP_ECAP0_IC2       (0xBUL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for ECAP0_IC2         */
418 #define SYS_GPA_MFP2_PA8MFP_TM3_EXT         (0xDUL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for TM3_EXT           */
419 #define SYS_GPA_MFP2_PA8MFP_I2C2_SMBSUS     (0xEUL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for I2C2_SMBSUS       */
420 #define SYS_GPA_MFP2_PA8MFP_INT4            (0xFUL<<SYS_GPA_MFP2_PA8MFP_Pos)    /*!< GPA_MFP2 PA8 setting for INT4              */
421 
422 /* PA.9 MFP */
423 #define SYS_GPA_MFP2_PA9MFP_GPIO            (0x0UL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for GPIO              */
424 #define SYS_GPA_MFP2_PA9MFP_EADC0_CH21      (0x1UL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for EADC0_CH21        */
425 #define SYS_GPA_MFP2_PA9MFP_LPADC0_CH21     (0x1UL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for LPADC0_CH21       */
426 #define SYS_GPA_MFP2_PA9MFP_ACMP2_P0        (0x1UL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for ACMP2_P0          */
427 #define SYS_GPA_MFP2_PA9MFP_OPA1_N0         (0x1UL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for OPA1_N0           */
428 #define SYS_GPA_MFP2_PA9MFP_EBI_MCLK        (0x2UL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for EBI_MCLK          */
429 #define SYS_GPA_MFP2_PA9MFP_SPI3_MISO       (0x5UL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for SPI3_MISO         */
430 #define SYS_GPA_MFP2_PA9MFP_USCI0_DAT1      (0x6UL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for USCI0_DAT1        */
431 #define SYS_GPA_MFP2_PA9MFP_UART1_TXD       (0x7UL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for UART1_TXD         */
432 #define SYS_GPA_MFP2_PA9MFP_UART7_TXD       (0x8UL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for UART7_TXD         */
433 #define SYS_GPA_MFP2_PA9MFP_PWM0_CH2        (0x9UL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for PWM0_CH2          */
434 #define SYS_GPA_MFP2_PA9MFP_EQEI1_A         (0xAUL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for EQEI1_A           */
435 #define SYS_GPA_MFP2_PA9MFP_ECAP0_IC1       (0xBUL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for ECAP0_IC1         */
436 #define SYS_GPA_MFP2_PA9MFP_TM2_EXT         (0xDUL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for TM2_EXT           */
437 #define SYS_GPA_MFP2_PA9MFP_I2C2_SMBAL      (0xEUL<<SYS_GPA_MFP2_PA9MFP_Pos)    /*!< GPA_MFP2 PA9 setting for I2C2_SMBAL        */
438 
439 /* PA.10 MFP */
440 #define SYS_GPA_MFP2_PA10MFP_GPIO           (0x0UL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for GPIO             */
441 #define SYS_GPA_MFP2_PA10MFP_EADC0_CH22     (0x1UL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for EADC0_CH22       */
442 #define SYS_GPA_MFP2_PA10MFP_LPADC0_CH22    (0x1UL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for LPADC0_CH22      */
443 #define SYS_GPA_MFP2_PA10MFP_ACMP1_P0       (0x1UL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for ACMP1_P0         */
444 #define SYS_GPA_MFP2_PA10MFP_OPA1_O         (0x1UL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for OPA1_O           */
445 #define SYS_GPA_MFP2_PA10MFP_EBI_nWR        (0x2UL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for EBI_nWR          */
446 #define SYS_GPA_MFP2_PA10MFP_SPI3_CLK       (0x5UL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for SPI3_CLK         */
447 #define SYS_GPA_MFP2_PA10MFP_USCI0_DAT0     (0x6UL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for USCI0_DAT0       */
448 #define SYS_GPA_MFP2_PA10MFP_I2C2_SDA       (0x7UL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for I2C2_SDA         */
449 #define SYS_GPA_MFP2_PA10MFP_UART6_RXD      (0x8UL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for UART6_RXD        */
450 #define SYS_GPA_MFP2_PA10MFP_PWM0_CH1       (0x9UL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for PWM0_CH1         */
451 #define SYS_GPA_MFP2_PA10MFP_EQEI1_INDEX    (0xAUL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for EQEI1_INDEX      */
452 #define SYS_GPA_MFP2_PA10MFP_ECAP0_IC0      (0xBUL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for ECAP0_IC0        */
453 #define SYS_GPA_MFP2_PA10MFP_TM1_EXT        (0xDUL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for TM1_EXT          */
454 #define SYS_GPA_MFP2_PA10MFP_DAC0_ST        (0xEUL<<SYS_GPA_MFP2_PA10MFP_Pos)   /*!< GPA_MFP2 PA10 setting for DAC0_ST          */
455 #define SYS_GPA_MFP2_PA10MFP_LPTM1_EXT      (0x17UL<<SYS_GPA_MFP2_PA10MFP_Pos)  /*!< GPA_MFP2 PA10 setting for LPTM1_EXT        */
456 
457 /* PA.11 MFP */
458 #define SYS_GPA_MFP2_PA11MFP_GPIO           (0x0UL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for GPIO             */
459 #define SYS_GPA_MFP2_PA11MFP_EADC0_CH23     (0x1UL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for EADC0_CH23       */
460 #define SYS_GPA_MFP2_PA11MFP_LPADC0_CH23    (0x1UL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for LPADC0_CH23      */
461 #define SYS_GPA_MFP2_PA11MFP_ACMP0_P0       (0x1UL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for ACMP0_P0         */
462 #define SYS_GPA_MFP2_PA11MFP_OPA2_O         (0x1UL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for OPA2_O           */
463 #define SYS_GPA_MFP2_PA11MFP_EBI_nRD        (0x2UL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for EBI_nRD          */
464 #define SYS_GPA_MFP2_PA11MFP_SPI3_SS        (0x5UL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for SPI3_SS          */
465 #define SYS_GPA_MFP2_PA11MFP_USCI0_CLK      (0x6UL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for USCI0_CLK        */
466 #define SYS_GPA_MFP2_PA11MFP_I2C2_SCL       (0x7UL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for I2C2_SCL         */
467 #define SYS_GPA_MFP2_PA11MFP_UART6_TXD      (0x8UL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for UART6_TXD        */
468 #define SYS_GPA_MFP2_PA11MFP_PWM0_CH0       (0x9UL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for PWM0_CH0         */
469 #define SYS_GPA_MFP2_PA11MFP_EPWM0_SYNC_OUT (0xAUL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for EPWM0_SYNC_OUT   */
470 #define SYS_GPA_MFP2_PA11MFP_TM0_EXT        (0xDUL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for TM0_EXT          */
471 #define SYS_GPA_MFP2_PA11MFP_DAC1_ST        (0xEUL<<SYS_GPA_MFP2_PA11MFP_Pos)   /*!< GPA_MFP2 PA11 setting for DAC1_ST          */
472 #define SYS_GPA_MFP2_PA11MFP_LPTM0_EXT      (0x17UL<<SYS_GPA_MFP2_PA11MFP_Pos)  /*!< GPA_MFP2 PA11 setting for LPTM0_EXT        */
473 
474 /* PA.12 MFP */
475 #define SYS_GPA_MFP3_PA12MFP_GPIO           (0x0UL<<SYS_GPA_MFP3_PA12MFP_Pos)   /*!< GPA_MFP3 PA12 setting for GPIO             */
476 #define SYS_GPA_MFP3_PA12MFP_UART4_TXD      (0x3UL<<SYS_GPA_MFP3_PA12MFP_Pos)   /*!< GPA_MFP3 PA12 setting for UART4_TXD        */
477 #define SYS_GPA_MFP3_PA12MFP_I2C1_SCL       (0x4UL<<SYS_GPA_MFP3_PA12MFP_Pos)   /*!< GPA_MFP3 PA12 setting for I2C1_SCL         */
478 #define SYS_GPA_MFP3_PA12MFP_SPI2_SS        (0x5UL<<SYS_GPA_MFP3_PA12MFP_Pos)   /*!< GPA_MFP3 PA12 setting for SPI2_SS          */
479 #define SYS_GPA_MFP3_PA12MFP_CANFD1_TXD     (0x6UL<<SYS_GPA_MFP3_PA12MFP_Pos)   /*!< GPA_MFP3 PA12 setting for CANFD1_TXD       */
480 #define SYS_GPA_MFP3_PA12MFP_SPI0_SS        (0x8UL<<SYS_GPA_MFP3_PA12MFP_Pos)   /*!< GPA_MFP3 PA12 setting for SPI0_SS          */
481 #define SYS_GPA_MFP3_PA12MFP_PWM1_CH2       (0xBUL<<SYS_GPA_MFP3_PA12MFP_Pos)   /*!< GPA_MFP3 PA12 setting for PWM1_CH2         */
482 #define SYS_GPA_MFP3_PA12MFP_EQEI1_INDEX    (0xCUL<<SYS_GPA_MFP3_PA12MFP_Pos)   /*!< GPA_MFP3 PA12 setting for EQEI1_INDEX      */
483 #define SYS_GPA_MFP3_PA12MFP_ECAP1_IC0      (0xDUL<<SYS_GPA_MFP3_PA12MFP_Pos)   /*!< GPA_MFP3 PA12 setting for ECAP1_IC0        */
484 #define SYS_GPA_MFP3_PA12MFP_USB_VBUS       (0xEUL<<SYS_GPA_MFP3_PA12MFP_Pos)   /*!< GPA_MFP3 PA12 setting for USB_VBUS         */
485 #define SYS_GPA_MFP3_PA12MFP_LPSPI0_SS      (0x14UL<<SYS_GPA_MFP3_PA12MFP_Pos)  /*!< GPA_MFP3 PA12 setting for LPSPI0_SS        */
486 
487 /* PA.13 MFP */
488 #define SYS_GPA_MFP3_PA13MFP_GPIO           (0x0UL<<SYS_GPA_MFP3_PA13MFP_Pos)   /*!< GPA_MFP3 PA13 setting for GPIO             */
489 #define SYS_GPA_MFP3_PA13MFP_UART4_RXD      (0x3UL<<SYS_GPA_MFP3_PA13MFP_Pos)   /*!< GPA_MFP3 PA13 setting for UART4_RXD        */
490 #define SYS_GPA_MFP3_PA13MFP_I2C1_SDA       (0x4UL<<SYS_GPA_MFP3_PA13MFP_Pos)   /*!< GPA_MFP3 PA13 setting for I2C1_SDA         */
491 #define SYS_GPA_MFP3_PA13MFP_SPI2_CLK       (0x5UL<<SYS_GPA_MFP3_PA13MFP_Pos)   /*!< GPA_MFP3 PA13 setting for SPI2_CLK         */
492 #define SYS_GPA_MFP3_PA13MFP_CANFD1_RXD     (0x6UL<<SYS_GPA_MFP3_PA13MFP_Pos)   /*!< GPA_MFP3 PA13 setting for CANFD1_RXD       */
493 #define SYS_GPA_MFP3_PA13MFP_SPI0_CLK       (0x8UL<<SYS_GPA_MFP3_PA13MFP_Pos)   /*!< GPA_MFP3 PA13 setting for SPI0_CLK         */
494 #define SYS_GPA_MFP3_PA13MFP_PWM1_CH3       (0xBUL<<SYS_GPA_MFP3_PA13MFP_Pos)   /*!< GPA_MFP3 PA13 setting for PWM1_CH3         */
495 #define SYS_GPA_MFP3_PA13MFP_EQEI1_A        (0xCUL<<SYS_GPA_MFP3_PA13MFP_Pos)   /*!< GPA_MFP3 PA13 setting for EQEI1_A          */
496 #define SYS_GPA_MFP3_PA13MFP_ECAP1_IC1      (0xDUL<<SYS_GPA_MFP3_PA13MFP_Pos)   /*!< GPA_MFP3 PA13 setting for ECAP1_IC1        */
497 #define SYS_GPA_MFP3_PA13MFP_USB_D_N        (0xEUL<<SYS_GPA_MFP3_PA13MFP_Pos)   /*!< GPA_MFP3 PA13 setting for USB_D-           */
498 #define SYS_GPA_MFP3_PA13MFP_LPSPI0_CLK     (0x14UL<<SYS_GPA_MFP3_PA13MFP_Pos)  /*!< GPA_MFP3 PA13 setting for LPSPI0_CLK       */
499 
500 /* PA.14 MFP */
501 #define SYS_GPA_MFP3_PA14MFP_GPIO           (0x0UL<<SYS_GPA_MFP3_PA14MFP_Pos)   /*!< GPA_MFP3 PA14 setting for GPIO             */
502 #define SYS_GPA_MFP3_PA14MFP_UART0_TXD      (0x3UL<<SYS_GPA_MFP3_PA14MFP_Pos)   /*!< GPA_MFP3 PA14 setting for UART0_TXD        */
503 #define SYS_GPA_MFP3_PA14MFP_EBI_AD5        (0x4UL<<SYS_GPA_MFP3_PA14MFP_Pos)   /*!< GPA_MFP3 PA14 setting for EBI_AD5          */
504 #define SYS_GPA_MFP3_PA14MFP_SPI2_MISO      (0x5UL<<SYS_GPA_MFP3_PA14MFP_Pos)   /*!< GPA_MFP3 PA14 setting for SPI2_MISO        */
505 #define SYS_GPA_MFP3_PA14MFP_I2C2_SCL       (0x6UL<<SYS_GPA_MFP3_PA14MFP_Pos)   /*!< GPA_MFP3 PA14 setting for I2C2_SCL         */
506 #define SYS_GPA_MFP3_PA14MFP_SPI0_MISO      (0x8UL<<SYS_GPA_MFP3_PA14MFP_Pos)   /*!< GPA_MFP3 PA14 setting for SPI0_MISO        */
507 #define SYS_GPA_MFP3_PA14MFP_PWM1_CH4       (0xBUL<<SYS_GPA_MFP3_PA14MFP_Pos)   /*!< GPA_MFP3 PA14 setting for PWM1_CH4         */
508 #define SYS_GPA_MFP3_PA14MFP_EQEI1_B        (0xCUL<<SYS_GPA_MFP3_PA14MFP_Pos)   /*!< GPA_MFP3 PA14 setting for EQEI1_B          */
509 #define SYS_GPA_MFP3_PA14MFP_ECAP1_IC2      (0xDUL<<SYS_GPA_MFP3_PA14MFP_Pos)   /*!< GPA_MFP3 PA14 setting for ECAP1_IC2        */
510 #define SYS_GPA_MFP3_PA14MFP_USB_D_P        (0xEUL<<SYS_GPA_MFP3_PA14MFP_Pos)   /*!< GPA_MFP3 PA14 setting for USB_D+           */
511 #define SYS_GPA_MFP3_PA14MFP_LPSPI0_MISO    (0x14UL<<SYS_GPA_MFP3_PA14MFP_Pos)  /*!< GPA_MFP3 PA14 setting for LPSPI0_MISO      */
512 
513 /* PA.15 MFP */
514 #define SYS_GPA_MFP3_PA15MFP_GPIO           (0x0UL<<SYS_GPA_MFP3_PA15MFP_Pos)   /*!< GPA_MFP3 PA15 setting for GPIO             */
515 #define SYS_GPA_MFP3_PA15MFP_UART0_RXD      (0x3UL<<SYS_GPA_MFP3_PA15MFP_Pos)   /*!< GPA_MFP3 PA15 setting for UART0_RXD        */
516 #define SYS_GPA_MFP3_PA15MFP_SPI2_MOSI      (0x5UL<<SYS_GPA_MFP3_PA15MFP_Pos)   /*!< GPA_MFP3 PA15 setting for SPI2_MOSI        */
517 #define SYS_GPA_MFP3_PA15MFP_I2C2_SDA       (0x6UL<<SYS_GPA_MFP3_PA15MFP_Pos)   /*!< GPA_MFP3 PA15 setting for I2C2_SDA         */
518 #define SYS_GPA_MFP3_PA15MFP_SPI0_MOSI      (0x8UL<<SYS_GPA_MFP3_PA15MFP_Pos)   /*!< GPA_MFP3 PA15 setting for SPI0_MOSI        */
519 #define SYS_GPA_MFP3_PA15MFP_PWM1_CH5       (0xBUL<<SYS_GPA_MFP3_PA15MFP_Pos)   /*!< GPA_MFP3 PA15 setting for PWM1_CH5         */
520 #define SYS_GPA_MFP3_PA15MFP_EPWM0_SYNC_IN  (0xCUL<<SYS_GPA_MFP3_PA15MFP_Pos)   /*!< GPA_MFP3 PA15 setting for EPWM0_SYNC_IN    */
521 #define SYS_GPA_MFP3_PA15MFP_USB_OTG_ID     (0xEUL<<SYS_GPA_MFP3_PA15MFP_Pos)   /*!< GPA_MFP3 PA15 setting for USB_OTG_ID       */
522 #define SYS_GPA_MFP3_PA15MFP_LPSPI0_MOSI    (0x14UL<<SYS_GPA_MFP3_PA15MFP_Pos)  /*!< GPA_MFP3 PA15 setting for LPSPI0_MOSI      */
523 
524 /* PB.0 MFP */
525 #define SYS_GPB_MFP0_PB0MFP_GPIO            (0x0UL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for GPIO              */
526 #define SYS_GPB_MFP0_PB0MFP_EADC0_CH0       (0x1UL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for EADC0_CH0         */
527 #define SYS_GPB_MFP0_PB0MFP_LPADC0_CH0      (0x1UL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for LPADC0_CH0        */
528 #define SYS_GPB_MFP0_PB0MFP_ACMP2_P1        (0x1UL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for ACMP2_P1          */
529 #define SYS_GPB_MFP0_PB0MFP_OPA0_P0         (0x1UL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for OPA0_P0           */
530 #define SYS_GPB_MFP0_PB0MFP_EBI_ADR9        (0x2UL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for EBI_ADR9          */
531 #define SYS_GPB_MFP0_PB0MFP_SPI3_I2SMCLK    (0x5UL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for SPI3_I2SMCLK      */
532 #define SYS_GPB_MFP0_PB0MFP_USCI0_CTL0      (0x6UL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for USCI0_CTL0        */
533 #define SYS_GPB_MFP0_PB0MFP_UART2_RXD       (0x7UL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for UART2_RXD         */
534 #define SYS_GPB_MFP0_PB0MFP_SPI0_I2SMCLK    (0x8UL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for SPI0_I2SMCLK      */
535 #define SYS_GPB_MFP0_PB0MFP_I2C1_SDA        (0x9UL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for I2C1_SDA          */
536 #define SYS_GPB_MFP0_PB0MFP_QSPI0_MOSI1     (0xAUL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for QSPI0_MOSI1       */
537 #define SYS_GPB_MFP0_PB0MFP_EPWM0_CH5       (0xBUL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for EPWM0_CH5         */
538 #define SYS_GPB_MFP0_PB0MFP_EPWM1_CH5       (0xCUL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for EPWM1_CH5         */
539 #define SYS_GPB_MFP0_PB0MFP_EPWM0_BRAKE1    (0xDUL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for EPWM0_BRAKE1      */
540 #define SYS_GPB_MFP0_PB0MFP_PWM0_BRAKE1     (0xEUL<<SYS_GPB_MFP0_PB0MFP_Pos)    /*!< GPB_MFP0 PB0 setting for PWM0_BRAKE1       */
541 #define SYS_GPB_MFP0_PB0MFP_UTCPD0_VCNEN2   (0x11UL<<SYS_GPB_MFP0_PB0MFP_Pos)   /*!< GPB_MFP0 PB0 setting for UTCPD0_VCNEN2     */
542 #define SYS_GPB_MFP0_PB0MFP_LPIO2           (0x17UL<<SYS_GPB_MFP0_PB0MFP_Pos)   /*!< GPB_MFP0 PB0 setting for LPIO2             */
543 
544 /* PB.1 MFP */
545 #define SYS_GPB_MFP0_PB1MFP_GPIO            (0x0UL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for GPIO              */
546 #define SYS_GPB_MFP0_PB1MFP_EADC0_CH1       (0x1UL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for EADC0_CH1         */
547 #define SYS_GPB_MFP0_PB1MFP_LPADC0_CH1      (0x1UL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for LPADC0_CH1        */
548 #define SYS_GPB_MFP0_PB1MFP_ACMP2_N         (0x1UL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for ACMP2_N           */
549 #define SYS_GPB_MFP0_PB1MFP_OPA0_N0         (0x1UL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for OPA0_N0           */
550 #define SYS_GPB_MFP0_PB1MFP_EBI_ADR8        (0x2UL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for EBI_ADR8          */
551 #define SYS_GPB_MFP0_PB1MFP_UART2_TXD       (0x7UL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for UART2_TXD         */
552 #define SYS_GPB_MFP0_PB1MFP_USCI1_CLK       (0x8UL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for USCI1_CLK         */
553 #define SYS_GPB_MFP0_PB1MFP_I2C1_SCL        (0x9UL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for I2C1_SCL          */
554 #define SYS_GPB_MFP0_PB1MFP_QSPI0_MISO1     (0xAUL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for QSPI0_MISO1       */
555 #define SYS_GPB_MFP0_PB1MFP_EPWM0_CH4       (0xBUL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for EPWM0_CH4         */
556 #define SYS_GPB_MFP0_PB1MFP_EPWM1_CH4       (0xCUL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for EPWM1_CH4         */
557 #define SYS_GPB_MFP0_PB1MFP_EPWM0_BRAKE0    (0xDUL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for EPWM0_BRAKE0      */
558 #define SYS_GPB_MFP0_PB1MFP_PWM0_BRAKE0     (0xEUL<<SYS_GPB_MFP0_PB1MFP_Pos)    /*!< GPB_MFP0 PB1 setting for PWM0_BRAKE0       */
559 #define SYS_GPB_MFP0_PB1MFP_UTCPD0_VBDCHG   (0x11UL<<SYS_GPB_MFP0_PB1MFP_Pos)   /*!< GPB_MFP0 PB1 setting for UTCPD0_VBDCHG     */
560 #define SYS_GPB_MFP0_PB1MFP_LPIO3           (0x17UL<<SYS_GPB_MFP0_PB1MFP_Pos)   /*!< GPB_MFP0 PB1 setting for LPIO3             */
561 
562 /* PB.2 MFP */
563 #define SYS_GPB_MFP0_PB2MFP_GPIO            (0x0UL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for GPIO              */
564 #define SYS_GPB_MFP0_PB2MFP_EADC0_CH2       (0x1UL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for EADC0_CH2         */
565 #define SYS_GPB_MFP0_PB2MFP_LPADC0_CH2      (0x1UL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for LPADC0_CH2        */
566 #define SYS_GPB_MFP0_PB2MFP_ACMP0_P1        (0x1UL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for ACMP0_P1          */
567 #define SYS_GPB_MFP0_PB2MFP_OPA0_O          (0x1UL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for OPA0_O            */
568 #define SYS_GPB_MFP0_PB2MFP_EBI_ADR3        (0x2UL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for EBI_ADR3          */
569 #define SYS_GPB_MFP0_PB2MFP_I2C1_SDA        (0x4UL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for I2C1_SDA          */
570 #define SYS_GPB_MFP0_PB2MFP_SPI1_SS         (0x5UL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for SPI1_SS           */
571 #define SYS_GPB_MFP0_PB2MFP_UART1_RXD       (0x6UL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for UART1_RXD         */
572 #define SYS_GPB_MFP0_PB2MFP_UART5_nCTS      (0x7UL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for UART5_nCTS        */
573 #define SYS_GPB_MFP0_PB2MFP_USCI1_DAT0      (0x8UL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for USCI1_DAT0        */
574 #define SYS_GPB_MFP0_PB2MFP_EPWM0_CH3       (0xBUL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for EPWM0_CH3         */
575 #define SYS_GPB_MFP0_PB2MFP_TM3             (0xEUL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for TM3               */
576 #define SYS_GPB_MFP0_PB2MFP_INT3            (0xFUL<<SYS_GPB_MFP0_PB2MFP_Pos)    /*!< GPB_MFP0 PB2 setting for INT3              */
577 #define SYS_GPB_MFP0_PB2MFP_LPIO6           (0x17UL<<SYS_GPB_MFP0_PB2MFP_Pos)   /*!< GPB_MFP0 PB2 setting for LPIO6             */
578 
579 /* PB.3 MFP */
580 #define SYS_GPB_MFP0_PB3MFP_GPIO            (0x0UL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for GPIO              */
581 #define SYS_GPB_MFP0_PB3MFP_EADC0_CH3       (0x1UL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for EADC0_CH3         */
582 #define SYS_GPB_MFP0_PB3MFP_LPADC0_CH3      (0x1UL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for LPADC0_CH3        */
583 #define SYS_GPB_MFP0_PB3MFP_ACMP0_N         (0x1UL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for ACMP0_N           */
584 #define SYS_GPB_MFP0_PB3MFP_OPA2_P0         (0x1UL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for OPA2_P0           */
585 #define SYS_GPB_MFP0_PB3MFP_EBI_ADR2        (0x2UL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for EBI_ADR2          */
586 #define SYS_GPB_MFP0_PB3MFP_I2C1_SCL        (0x4UL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for I2C1_SCL          */
587 #define SYS_GPB_MFP0_PB3MFP_SPI1_CLK        (0x5UL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for SPI1_CLK          */
588 #define SYS_GPB_MFP0_PB3MFP_UART1_TXD       (0x6UL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for UART1_TXD         */
589 #define SYS_GPB_MFP0_PB3MFP_UART5_nRTS      (0x7UL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for UART5_nRTS        */
590 #define SYS_GPB_MFP0_PB3MFP_USCI1_DAT1      (0x8UL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for USCI1_DAT1        */
591 #define SYS_GPB_MFP0_PB3MFP_EPWM0_CH2       (0xBUL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for EPWM0_CH2         */
592 #define SYS_GPB_MFP0_PB3MFP_PWM0_BRAKE0     (0xDUL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for PWM0_BRAKE0       */
593 #define SYS_GPB_MFP0_PB3MFP_TM2             (0xEUL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for TM2               */
594 #define SYS_GPB_MFP0_PB3MFP_INT2            (0xFUL<<SYS_GPB_MFP0_PB3MFP_Pos)    /*!< GPB_MFP0 PB3 setting for INT2              */
595 #define SYS_GPB_MFP0_PB3MFP_LPIO7           (0x17UL<<SYS_GPB_MFP0_PB3MFP_Pos)   /*!< GPB_MFP0 PB3 setting for LPIO7             */
596 
597 /* PB.4 MFP */
598 #define SYS_GPB_MFP1_PB4MFP_GPIO            (0x0UL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for GPIO              */
599 #define SYS_GPB_MFP1_PB4MFP_EADC0_CH4       (0x1UL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for EADC0_CH4         */
600 #define SYS_GPB_MFP1_PB4MFP_LPADC0_CH4      (0x1UL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for LPADC0_CH4        */
601 #define SYS_GPB_MFP1_PB4MFP_ACMP1_P1        (0x1UL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for ACMP1_P1          */
602 #define SYS_GPB_MFP1_PB4MFP_OPA2_N0         (0x1UL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for OPA2_N0           */
603 #define SYS_GPB_MFP1_PB4MFP_EBI_ADR1        (0x2UL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for EBI_ADR1          */
604 #define SYS_GPB_MFP1_PB4MFP_SPI1_MOSI       (0x5UL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for SPI1_MOSI         */
605 #define SYS_GPB_MFP1_PB4MFP_I2C0_SDA        (0x6UL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for I2C0_SDA          */
606 #define SYS_GPB_MFP1_PB4MFP_UART5_RXD       (0x7UL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for UART5_RXD         */
607 #define SYS_GPB_MFP1_PB4MFP_USCI1_CTL1      (0x8UL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for USCI1_CTL1        */
608 #define SYS_GPB_MFP1_PB4MFP_EPWM0_CH1       (0xBUL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for EPWM0_CH1         */
609 #define SYS_GPB_MFP1_PB4MFP_UART2_RXD       (0xDUL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for UART2_RXD         */
610 #define SYS_GPB_MFP1_PB4MFP_TM1             (0xEUL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for TM1               */
611 #define SYS_GPB_MFP1_PB4MFP_INT1            (0xFUL<<SYS_GPB_MFP1_PB4MFP_Pos)    /*!< GPB_MFP1 PB4 setting for INT1              */
612 #define SYS_GPB_MFP1_PB4MFP_LPI2C0_SDA      (0x16UL<<SYS_GPB_MFP1_PB4MFP_Pos)   /*!< GPB_MFP1 PB4 setting for LPI2C0_SDA        */
613 #define SYS_GPB_MFP1_PB4MFP_LPTM1           (0x17UL<<SYS_GPB_MFP1_PB4MFP_Pos)   /*!< GPB_MFP1 PB4 setting for LPTM1             */
614 
615 /* PB.5 MFP */
616 #define SYS_GPB_MFP1_PB5MFP_GPIO            (0x0UL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for GPIO              */
617 #define SYS_GPB_MFP1_PB5MFP_EADC0_CH5       (0x1UL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for EADC0_CH5         */
618 #define SYS_GPB_MFP1_PB5MFP_LPADC0_CH5      (0x1UL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for LPADC0_CH5        */
619 #define SYS_GPB_MFP1_PB5MFP_ACMP1_N         (0x1UL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for ACMP1_N           */
620 #define SYS_GPB_MFP1_PB5MFP_OPA1_P1         (0x1UL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for OPA1_P1           */
621 #define SYS_GPB_MFP1_PB5MFP_EBI_ADR0        (0x2UL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for EBI_ADR0          */
622 #define SYS_GPB_MFP1_PB5MFP_SPI1_MISO       (0x5UL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for SPI1_MISO         */
623 #define SYS_GPB_MFP1_PB5MFP_I2C0_SCL        (0x6UL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for I2C0_SCL          */
624 #define SYS_GPB_MFP1_PB5MFP_UART5_TXD       (0x7UL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for UART5_TXD         */
625 #define SYS_GPB_MFP1_PB5MFP_USCI1_CTL0      (0x8UL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for USCI1_CTL0        */
626 #define SYS_GPB_MFP1_PB5MFP_EPWM0_CH0       (0xBUL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for EPWM0_CH0         */
627 #define SYS_GPB_MFP1_PB5MFP_UART2_TXD       (0xDUL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for UART2_TXD         */
628 #define SYS_GPB_MFP1_PB5MFP_TM0             (0xEUL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for TM0               */
629 #define SYS_GPB_MFP1_PB5MFP_INT0            (0xFUL<<SYS_GPB_MFP1_PB5MFP_Pos)    /*!< GPB_MFP1 PB5 setting for INT0              */
630 #define SYS_GPB_MFP1_PB5MFP_LPI2C0_SCL      (0x16UL<<SYS_GPB_MFP1_PB5MFP_Pos)   /*!< GPB_MFP1 PB5 setting for LPI2C0_SCL        */
631 #define SYS_GPB_MFP1_PB5MFP_LPTM0           (0x17UL<<SYS_GPB_MFP1_PB5MFP_Pos)   /*!< GPB_MFP1 PB5 setting for LPTM0             */
632 
633 /* PB.6 MFP */
634 #define SYS_GPB_MFP1_PB6MFP_GPIO            (0x0UL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for GPIO              */
635 #define SYS_GPB_MFP1_PB6MFP_EADC0_CH6       (0x1UL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for EADC0_CH6         */
636 #define SYS_GPB_MFP1_PB6MFP_LPADC0_CH6      (0x1UL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for LPADC0_CH6        */
637 #define SYS_GPB_MFP1_PB6MFP_ACMP2_P2        (0x1UL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for ACMP2_P2          */
638 #define SYS_GPB_MFP1_PB6MFP_OPA2_P1         (0x1UL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for OPA2_P1           */
639 #define SYS_GPB_MFP1_PB6MFP_EBI_nWRH        (0x2UL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for EBI_nWRH          */
640 #define SYS_GPB_MFP1_PB6MFP_USCI1_DAT1      (0x4UL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for USCI1_DAT1        */
641 #define SYS_GPB_MFP1_PB6MFP_UART1_RXD       (0x6UL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for UART1_RXD         */
642 #define SYS_GPB_MFP1_PB6MFP_EBI_nCS1        (0x8UL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for EBI_nCS1          */
643 #define SYS_GPB_MFP1_PB6MFP_PWM1_CH5        (0xAUL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for PWM1_CH5          */
644 #define SYS_GPB_MFP1_PB6MFP_EPWM1_BRAKE1    (0xBUL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for EPWM1_BRAKE1      */
645 #define SYS_GPB_MFP1_PB6MFP_EPWM1_CH5       (0xCUL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for EPWM1_CH5         */
646 #define SYS_GPB_MFP1_PB6MFP_INT4            (0xDUL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for INT4              */
647 #define SYS_GPB_MFP1_PB6MFP_PWM1_BRAKE1     (0xEUL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for PWM1_BRAKE1       */
648 #define SYS_GPB_MFP1_PB6MFP_ACMP1_O         (0xFUL<<SYS_GPB_MFP1_PB6MFP_Pos)    /*!< GPB_MFP1 PB6 setting for ACMP1_O           */
649 
650 /* PB.7 MFP */
651 #define SYS_GPB_MFP1_PB7MFP_GPIO            (0x0UL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for GPIO              */
652 #define SYS_GPB_MFP1_PB7MFP_EADC0_CH7       (0x1UL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for EADC0_CH7         */
653 #define SYS_GPB_MFP1_PB7MFP_LPADC0_CH7      (0x1UL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for LPADC0_CH7        */
654 #define SYS_GPB_MFP1_PB7MFP_ACMP2_P3        (0x1UL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for ACMP2_P3          */
655 #define SYS_GPB_MFP1_PB7MFP_OPA2_N1         (0x1UL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for OPA2_N1           */
656 #define SYS_GPB_MFP1_PB7MFP_EBI_nWRL        (0x2UL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for EBI_nWRL          */
657 #define SYS_GPB_MFP1_PB7MFP_USCI1_DAT0      (0x4UL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for USCI1_DAT0        */
658 #define SYS_GPB_MFP1_PB7MFP_UART1_TXD       (0x6UL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for UART1_TXD         */
659 #define SYS_GPB_MFP1_PB7MFP_EBI_nCS0        (0x8UL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for EBI_nCS0          */
660 #define SYS_GPB_MFP1_PB7MFP_PWM1_CH4        (0xAUL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for PWM1_CH4          */
661 #define SYS_GPB_MFP1_PB7MFP_EPWM1_BRAKE0    (0xBUL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for EPWM1_BRAKE0      */
662 #define SYS_GPB_MFP1_PB7MFP_EPWM1_CH4       (0xCUL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for EPWM1_CH4         */
663 #define SYS_GPB_MFP1_PB7MFP_INT5            (0xDUL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for INT5              */
664 #define SYS_GPB_MFP1_PB7MFP_PWM1_BRAKE0     (0xEUL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for PWM1_BRAKE0       */
665 #define SYS_GPB_MFP1_PB7MFP_ACMP0_O         (0xFUL<<SYS_GPB_MFP1_PB7MFP_Pos)    /*!< GPB_MFP1 PB7 setting for ACMP0_O           */
666 
667 /* PB.8 MFP */
668 #define SYS_GPB_MFP2_PB8MFP_GPIO            (0x0UL<<SYS_GPB_MFP2_PB8MFP_Pos)    /*!< GPB_MFP2 PB8 setting for GPIO              */
669 #define SYS_GPB_MFP2_PB8MFP_EADC0_CH8       (0x1UL<<SYS_GPB_MFP2_PB8MFP_Pos)    /*!< GPB_MFP2 PB8 setting for EADC0_CH8         */
670 #define SYS_GPB_MFP2_PB8MFP_LPADC0_CH8      (0x1UL<<SYS_GPB_MFP2_PB8MFP_Pos)    /*!< GPB_MFP2 PB8 setting for LPADC0_CH8        */
671 #define SYS_GPB_MFP2_PB8MFP_EBI_ADR19       (0x2UL<<SYS_GPB_MFP2_PB8MFP_Pos)    /*!< GPB_MFP2 PB8 setting for EBI_ADR19         */
672 #define SYS_GPB_MFP2_PB8MFP_USCI1_CLK       (0x4UL<<SYS_GPB_MFP2_PB8MFP_Pos)    /*!< GPB_MFP2 PB8 setting for USCI1_CLK         */
673 #define SYS_GPB_MFP2_PB8MFP_UART0_RXD       (0x5UL<<SYS_GPB_MFP2_PB8MFP_Pos)    /*!< GPB_MFP2 PB8 setting for UART0_RXD         */
674 #define SYS_GPB_MFP2_PB8MFP_UART1_nRTS      (0x6UL<<SYS_GPB_MFP2_PB8MFP_Pos)    /*!< GPB_MFP2 PB8 setting for UART1_nRTS        */
675 #define SYS_GPB_MFP2_PB8MFP_UART7_RXD       (0x8UL<<SYS_GPB_MFP2_PB8MFP_Pos)    /*!< GPB_MFP2 PB8 setting for UART7_RXD         */
676 #define SYS_GPB_MFP2_PB8MFP_PWM1_CH3        (0xAUL<<SYS_GPB_MFP2_PB8MFP_Pos)    /*!< GPB_MFP2 PB8 setting for PWM1_CH3          */
677 #define SYS_GPB_MFP2_PB8MFP_LPUART0_RXD     (0x15UL<<SYS_GPB_MFP2_PB8MFP_Pos)   /*!< GPB_MFP2 PB8 setting for LPUART0_RXD       */
678 
679 /* PB.9 MFP */
680 #define SYS_GPB_MFP2_PB9MFP_GPIO            (0x0UL<<SYS_GPB_MFP2_PB9MFP_Pos)    /*!< GPB_MFP2 PB9 setting for GPIO              */
681 #define SYS_GPB_MFP2_PB9MFP_EADC0_CH9       (0x1UL<<SYS_GPB_MFP2_PB9MFP_Pos)    /*!< GPB_MFP2 PB9 setting for EADC0_CH9         */
682 #define SYS_GPB_MFP2_PB9MFP_LPADC0_CH9      (0x1UL<<SYS_GPB_MFP2_PB9MFP_Pos)    /*!< GPB_MFP2 PB9 setting for LPADC0_CH9        */
683 #define SYS_GPB_MFP2_PB9MFP_EBI_ADR18       (0x2UL<<SYS_GPB_MFP2_PB9MFP_Pos)    /*!< GPB_MFP2 PB9 setting for EBI_ADR18         */
684 #define SYS_GPB_MFP2_PB9MFP_USCI1_CTL1      (0x4UL<<SYS_GPB_MFP2_PB9MFP_Pos)    /*!< GPB_MFP2 PB9 setting for USCI1_CTL1        */
685 #define SYS_GPB_MFP2_PB9MFP_UART0_TXD       (0x5UL<<SYS_GPB_MFP2_PB9MFP_Pos)    /*!< GPB_MFP2 PB9 setting for UART0_TXD         */
686 #define SYS_GPB_MFP2_PB9MFP_UART1_nCTS      (0x6UL<<SYS_GPB_MFP2_PB9MFP_Pos)    /*!< GPB_MFP2 PB9 setting for UART1_nCTS        */
687 #define SYS_GPB_MFP2_PB9MFP_UART7_TXD       (0x8UL<<SYS_GPB_MFP2_PB9MFP_Pos)    /*!< GPB_MFP2 PB9 setting for UART7_TXD         */
688 #define SYS_GPB_MFP2_PB9MFP_PWM1_CH2        (0xAUL<<SYS_GPB_MFP2_PB9MFP_Pos)    /*!< GPB_MFP2 PB9 setting for PWM1_CH2          */
689 #define SYS_GPB_MFP2_PB9MFP_LPUART0_TXD     (0x15UL<<SYS_GPB_MFP2_PB9MFP_Pos)   /*!< GPB_MFP2 PB9 setting for LPUART0_TXD       */
690 
691 /* PB.10 MFP */
692 #define SYS_GPB_MFP2_PB10MFP_GPIO           (0x0UL<<SYS_GPB_MFP2_PB10MFP_Pos)   /*!< GPB_MFP2 PB10 setting for GPIO             */
693 #define SYS_GPB_MFP2_PB10MFP_EADC0_CH10     (0x1UL<<SYS_GPB_MFP2_PB10MFP_Pos)   /*!< GPB_MFP2 PB10 setting for EADC0_CH10       */
694 #define SYS_GPB_MFP2_PB10MFP_LPADC0_CH10    (0x1UL<<SYS_GPB_MFP2_PB10MFP_Pos)   /*!< GPB_MFP2 PB10 setting for LPADC0_CH10      */
695 #define SYS_GPB_MFP2_PB10MFP_EBI_ADR17      (0x2UL<<SYS_GPB_MFP2_PB10MFP_Pos)   /*!< GPB_MFP2 PB10 setting for EBI_ADR17        */
696 #define SYS_GPB_MFP2_PB10MFP_USCI1_CTL0     (0x4UL<<SYS_GPB_MFP2_PB10MFP_Pos)   /*!< GPB_MFP2 PB10 setting for USCI1_CTL0       */
697 #define SYS_GPB_MFP2_PB10MFP_UART0_nRTS     (0x5UL<<SYS_GPB_MFP2_PB10MFP_Pos)   /*!< GPB_MFP2 PB10 setting for UART0_nRTS       */
698 #define SYS_GPB_MFP2_PB10MFP_UART4_RXD      (0x6UL<<SYS_GPB_MFP2_PB10MFP_Pos)   /*!< GPB_MFP2 PB10 setting for UART4_RXD        */
699 #define SYS_GPB_MFP2_PB10MFP_I2C1_SDA       (0x7UL<<SYS_GPB_MFP2_PB10MFP_Pos)   /*!< GPB_MFP2 PB10 setting for I2C1_SDA         */
700 #define SYS_GPB_MFP2_PB10MFP_CANFD1_RXD     (0x8UL<<SYS_GPB_MFP2_PB10MFP_Pos)   /*!< GPB_MFP2 PB10 setting for CANFD1_RXD       */
701 #define SYS_GPB_MFP2_PB10MFP_PWM1_CH1       (0xAUL<<SYS_GPB_MFP2_PB10MFP_Pos)   /*!< GPB_MFP2 PB10 setting for PWM1_CH1         */
702 #define SYS_GPB_MFP2_PB10MFP_LPUART0_nRTS   (0x15UL<<SYS_GPB_MFP2_PB10MFP_Pos)  /*!< GPB_MFP2 PB10 setting for LPUART0_nRTS     */
703 
704 /* PB.11 MFP */
705 #define SYS_GPB_MFP2_PB11MFP_GPIO           (0x0UL<<SYS_GPB_MFP2_PB11MFP_Pos)   /*!< GPB_MFP2 PB11 setting for GPIO             */
706 #define SYS_GPB_MFP2_PB11MFP_EADC0_CH11     (0x1UL<<SYS_GPB_MFP2_PB11MFP_Pos)   /*!< GPB_MFP2 PB11 setting for EADC0_CH11       */
707 #define SYS_GPB_MFP2_PB11MFP_LPADC0_CH11    (0x1UL<<SYS_GPB_MFP2_PB11MFP_Pos)   /*!< GPB_MFP2 PB11 setting for LPADC0_CH11      */
708 #define SYS_GPB_MFP2_PB11MFP_EBI_ADR16      (0x2UL<<SYS_GPB_MFP2_PB11MFP_Pos)   /*!< GPB_MFP2 PB11 setting for EBI_ADR16        */
709 #define SYS_GPB_MFP2_PB11MFP_UART0_nCTS     (0x5UL<<SYS_GPB_MFP2_PB11MFP_Pos)   /*!< GPB_MFP2 PB11 setting for UART0_nCTS       */
710 #define SYS_GPB_MFP2_PB11MFP_UART4_TXD      (0x6UL<<SYS_GPB_MFP2_PB11MFP_Pos)   /*!< GPB_MFP2 PB11 setting for UART4_TXD        */
711 #define SYS_GPB_MFP2_PB11MFP_I2C1_SCL       (0x7UL<<SYS_GPB_MFP2_PB11MFP_Pos)   /*!< GPB_MFP2 PB11 setting for I2C1_SCL         */
712 #define SYS_GPB_MFP2_PB11MFP_CANFD1_TXD     (0x8UL<<SYS_GPB_MFP2_PB11MFP_Pos)   /*!< GPB_MFP2 PB11 setting for CANFD1_TXD       */
713 #define SYS_GPB_MFP2_PB11MFP_SPI0_I2SMCLK   (0x9UL<<SYS_GPB_MFP2_PB11MFP_Pos)   /*!< GPB_MFP2 PB11 setting for SPI0_I2SMCLK     */
714 #define SYS_GPB_MFP2_PB11MFP_PWM1_CH0       (0xAUL<<SYS_GPB_MFP2_PB11MFP_Pos)   /*!< GPB_MFP2 PB11 setting for PWM1_CH0         */
715 #define SYS_GPB_MFP2_PB11MFP_LPUART0_nCTS   (0x15UL<<SYS_GPB_MFP2_PB11MFP_Pos)  /*!< GPB_MFP2 PB11 setting for LPUART0_nCTS     */
716 
717 /* PB.12 MFP */
718 #define SYS_GPB_MFP3_PB12MFP_GPIO           (0x0UL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for GPIO             */
719 #define SYS_GPB_MFP3_PB12MFP_EADC0_CH12     (0x1UL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for EADC0_CH12       */
720 #define SYS_GPB_MFP3_PB12MFP_LPADC0_CH12    (0x1UL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for LPADC0_CH12      */
721 #define SYS_GPB_MFP3_PB12MFP_DAC0_OUT       (0x1UL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for DAC0_OUT         */
722 #define SYS_GPB_MFP3_PB12MFP_ACMP0_P2       (0x1UL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for ACMP0_P2         */
723 #define SYS_GPB_MFP3_PB12MFP_ACMP1_P2       (0x1UL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for ACMP1_P2         */
724 #define SYS_GPB_MFP3_PB12MFP_EBI_AD15       (0x2UL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for EBI_AD15         */
725 #define SYS_GPB_MFP3_PB12MFP_SPI0_MOSI      (0x4UL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for SPI0_MOSI        */
726 #define SYS_GPB_MFP3_PB12MFP_USCI0_CLK      (0x5UL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for USCI0_CLK        */
727 #define SYS_GPB_MFP3_PB12MFP_UART0_RXD      (0x6UL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for UART0_RXD        */
728 #define SYS_GPB_MFP3_PB12MFP_UART3_nCTS     (0x7UL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for UART3_nCTS       */
729 #define SYS_GPB_MFP3_PB12MFP_I2C2_SDA       (0x8UL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for I2C2_SDA         */
730 #define SYS_GPB_MFP3_PB12MFP_CANFD0_RXD     (0xAUL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for CANFD0_RXD       */
731 #define SYS_GPB_MFP3_PB12MFP_EPWM1_CH3      (0xBUL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for EPWM1_CH3        */
732 #define SYS_GPB_MFP3_PB12MFP_TM3_EXT        (0xDUL<<SYS_GPB_MFP3_PB12MFP_Pos)   /*!< GPB_MFP3 PB12 setting for TM3_EXT          */
733 #define SYS_GPB_MFP3_PB12MFP_LPSPI0_MOSI    (0x14UL<<SYS_GPB_MFP3_PB12MFP_Pos)  /*!< GPB_MFP3 PB12 setting for LPSPI0_MOSI      */
734 #define SYS_GPB_MFP3_PB12MFP_LPUART0_RXD    (0x15UL<<SYS_GPB_MFP3_PB12MFP_Pos)  /*!< GPB_MFP3 PB12 setting for LPUART0_RXD      */
735 
736 /* PB.13 MFP */
737 #define SYS_GPB_MFP3_PB13MFP_GPIO           (0x0UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for GPIO             */
738 #define SYS_GPB_MFP3_PB13MFP_EADC0_CH13     (0x1UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for EADC0_CH13       */
739 #define SYS_GPB_MFP3_PB13MFP_LPADC0_CH13    (0x1UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for LPADC0_CH13      */
740 #define SYS_GPB_MFP3_PB13MFP_DAC1_OUT       (0x1UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for DAC1_OUT         */
741 #define SYS_GPB_MFP3_PB13MFP_ACMP0_P3       (0x1UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for ACMP0_P3         */
742 #define SYS_GPB_MFP3_PB13MFP_ACMP1_P3       (0x1UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for ACMP1_P3         */
743 #define SYS_GPB_MFP3_PB13MFP_OPA1_N1        (0x1UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for OPA1_N1          */
744 #define SYS_GPB_MFP3_PB13MFP_EBI_AD14       (0x2UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for EBI_AD14         */
745 #define SYS_GPB_MFP3_PB13MFP_SPI0_MISO      (0x4UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for SPI0_MISO        */
746 #define SYS_GPB_MFP3_PB13MFP_USCI0_DAT0     (0x5UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for USCI0_DAT0       */
747 #define SYS_GPB_MFP3_PB13MFP_UART0_TXD      (0x6UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for UART0_TXD        */
748 #define SYS_GPB_MFP3_PB13MFP_UART3_nRTS     (0x7UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for UART3_nRTS       */
749 #define SYS_GPB_MFP3_PB13MFP_I2C2_SCL       (0x8UL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for I2C2_SCL         */
750 #define SYS_GPB_MFP3_PB13MFP_CANFD0_TXD     (0xAUL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for CANFD0_TXD       */
751 #define SYS_GPB_MFP3_PB13MFP_EPWM1_CH2      (0xBUL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for EPWM1_CH2        */
752 #define SYS_GPB_MFP3_PB13MFP_TM2_EXT        (0xDUL<<SYS_GPB_MFP3_PB13MFP_Pos)   /*!< GPB_MFP3 PB13 setting for TM2_EXT          */
753 #define SYS_GPB_MFP3_PB13MFP_LPSPI0_MISO    (0x14UL<<SYS_GPB_MFP3_PB13MFP_Pos)  /*!< GPB_MFP3 PB13 setting for LPSPI0_MISO      */
754 #define SYS_GPB_MFP3_PB13MFP_LPUART0_TXD    (0x15UL<<SYS_GPB_MFP3_PB13MFP_Pos)  /*!< GPB_MFP3 PB13 setting for LPUART0_TXD      */
755 
756 /* PB.14 MFP */
757 #define SYS_GPB_MFP3_PB14MFP_GPIO           (0x0UL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for GPIO             */
758 #define SYS_GPB_MFP3_PB14MFP_EADC0_CH14     (0x1UL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for EADC0_CH14       */
759 #define SYS_GPB_MFP3_PB14MFP_LPADC0_CH14    (0x1UL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for LPADC0_CH14      */
760 #define SYS_GPB_MFP3_PB14MFP_OPA0_N1        (0x1UL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for OPA0_N1          */
761 #define SYS_GPB_MFP3_PB14MFP_EBI_AD13       (0x2UL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for EBI_AD13         */
762 #define SYS_GPB_MFP3_PB14MFP_SPI0_CLK       (0x4UL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for SPI0_CLK         */
763 #define SYS_GPB_MFP3_PB14MFP_USCI0_DAT1     (0x5UL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for USCI0_DAT1       */
764 #define SYS_GPB_MFP3_PB14MFP_UART0_nRTS     (0x6UL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for UART0_nRTS       */
765 #define SYS_GPB_MFP3_PB14MFP_UART3_RXD      (0x7UL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for UART3_RXD        */
766 #define SYS_GPB_MFP3_PB14MFP_I2C2_SMBSUS    (0x8UL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for I2C2_SMBSUS      */
767 #define SYS_GPB_MFP3_PB14MFP_EQEI0_INDEX    (0xAUL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for EQEI0_INDEX      */
768 #define SYS_GPB_MFP3_PB14MFP_EPWM1_CH1      (0xBUL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for EPWM1_CH1        */
769 #define SYS_GPB_MFP3_PB14MFP_ECAP0_IC0      (0xCUL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for ECAP0_IC0        */
770 #define SYS_GPB_MFP3_PB14MFP_TM1_EXT        (0xDUL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for TM1_EXT          */
771 #define SYS_GPB_MFP3_PB14MFP_CLKO           (0xEUL<<SYS_GPB_MFP3_PB14MFP_Pos)   /*!< GPB_MFP3 PB14 setting for CLKO             */
772 #define SYS_GPB_MFP3_PB14MFP_TK_SE          (0x10UL<<SYS_GPB_MFP3_PB14MFP_Pos)  /*!< GPB_MFP3 PB14 setting for TK_SE            */
773 #define SYS_GPB_MFP3_PB14MFP_UTCPD0_VBSRCEN (0x11UL<<SYS_GPB_MFP3_PB14MFP_Pos)  /*!< GPB_MFP3 PB14 setting for UTCPD0_VBSRCEN   */
774 #define SYS_GPB_MFP3_PB14MFP_LPSPI0_CLK     (0x14UL<<SYS_GPB_MFP3_PB14MFP_Pos)  /*!< GPB_MFP3 PB14 setting for LPSPI0_CLK       */
775 #define SYS_GPB_MFP3_PB14MFP_LPUART0_nRTS   (0x15UL<<SYS_GPB_MFP3_PB14MFP_Pos)  /*!< GPB_MFP3 PB14 setting for LPUART0_nRTS     */
776 #define SYS_GPB_MFP3_PB14MFP_LPTM1_EXT      (0x17UL<<SYS_GPB_MFP3_PB14MFP_Pos)  /*!< GPB_MFP3 PB14 setting for LPTM1_EXT        */
777 
778 /* PB.15 MFP */
779 #define SYS_GPB_MFP3_PB15MFP_GPIO           (0x0UL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for GPIO             */
780 #define SYS_GPB_MFP3_PB15MFP_EADC0_CH15     (0x1UL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for EADC0_CH15       */
781 #define SYS_GPB_MFP3_PB15MFP_LPADC0_CH15    (0x1UL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for LPADC0_CH15      */
782 #define SYS_GPB_MFP3_PB15MFP_OPA0_P1        (0x1UL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for OPA0_P1          */
783 #define SYS_GPB_MFP3_PB15MFP_EBI_AD12       (0x2UL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for EBI_AD12         */
784 #define SYS_GPB_MFP3_PB15MFP_SPI0_SS        (0x4UL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for SPI0_SS          */
785 #define SYS_GPB_MFP3_PB15MFP_USCI0_CTL1     (0x5UL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for USCI0_CTL1       */
786 #define SYS_GPB_MFP3_PB15MFP_UART0_nCTS     (0x6UL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for UART0_nCTS       */
787 #define SYS_GPB_MFP3_PB15MFP_UART3_TXD      (0x7UL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for UART3_TXD        */
788 #define SYS_GPB_MFP3_PB15MFP_I2C2_SMBAL     (0x8UL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for I2C2_SMBAL       */
789 #define SYS_GPB_MFP3_PB15MFP_EPWM0_BRAKE1   (0xAUL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for EPWM0_BRAKE1     */
790 #define SYS_GPB_MFP3_PB15MFP_EPWM1_CH0      (0xBUL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for EPWM1_CH0        */
791 #define SYS_GPB_MFP3_PB15MFP_TM0_EXT        (0xDUL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for TM0_EXT          */
792 #define SYS_GPB_MFP3_PB15MFP_USB_VBUS_EN    (0xEUL<<SYS_GPB_MFP3_PB15MFP_Pos)   /*!< GPB_MFP3 PB15 setting for USB_VBUS_EN      */
793 #define SYS_GPB_MFP3_PB15MFP_UTCPD0_VBSNKEN (0x11UL<<SYS_GPB_MFP3_PB15MFP_Pos)  /*!< GPB_MFP3 PB15 setting for UTCPD0_VBSNKEN   */
794 #define SYS_GPB_MFP3_PB15MFP_LPSPI0_SS      (0x14UL<<SYS_GPB_MFP3_PB15MFP_Pos)  /*!< GPB_MFP3 PB15 setting for LPSPI0_SS        */
795 #define SYS_GPB_MFP3_PB15MFP_LPUART0_nCTS   (0x15UL<<SYS_GPB_MFP3_PB15MFP_Pos)  /*!< GPB_MFP3 PB15 setting for LPUART0_nCTS     */
796 #define SYS_GPB_MFP3_PB15MFP_LPTM0_EXT      (0x17UL<<SYS_GPB_MFP3_PB15MFP_Pos)  /*!< GPB_MFP3 PB15 setting for LPTM0_EXT        */
797 
798 /* PC.0 MFP */
799 #define SYS_GPC_MFP0_PC0MFP_GPIO            (0x0UL<<SYS_GPC_MFP0_PC0MFP_Pos)    /*!< GPC_MFP0 PC0 setting for GPIO              */
800 #define SYS_GPC_MFP0_PC0MFP_EBI_AD0         (0x2UL<<SYS_GPC_MFP0_PC0MFP_Pos)    /*!< GPC_MFP0 PC0 setting for EBI_AD0           */
801 #define SYS_GPC_MFP0_PC0MFP_QSPI0_MOSI0     (0x4UL<<SYS_GPC_MFP0_PC0MFP_Pos)    /*!< GPC_MFP0 PC0 setting for QSPI0_MOSI0       */
802 #define SYS_GPC_MFP0_PC0MFP_SPI1_SS         (0x7UL<<SYS_GPC_MFP0_PC0MFP_Pos)    /*!< GPC_MFP0 PC0 setting for SPI1_SS           */
803 #define SYS_GPC_MFP0_PC0MFP_UART2_RXD       (0x8UL<<SYS_GPC_MFP0_PC0MFP_Pos)    /*!< GPC_MFP0 PC0 setting for UART2_RXD         */
804 #define SYS_GPC_MFP0_PC0MFP_I2C0_SDA        (0x9UL<<SYS_GPC_MFP0_PC0MFP_Pos)    /*!< GPC_MFP0 PC0 setting for I2C0_SDA          */
805 #define SYS_GPC_MFP0_PC0MFP_EQEI0_B         (0xAUL<<SYS_GPC_MFP0_PC0MFP_Pos)    /*!< GPC_MFP0 PC0 setting for EQEI0_B           */
806 #define SYS_GPC_MFP0_PC0MFP_EPWM1_CH5       (0xCUL<<SYS_GPC_MFP0_PC0MFP_Pos)    /*!< GPC_MFP0 PC0 setting for EPWM1_CH5         */
807 #define SYS_GPC_MFP0_PC0MFP_ECAP0_IC2       (0xDUL<<SYS_GPC_MFP0_PC0MFP_Pos)    /*!< GPC_MFP0 PC0 setting for ECAP0_IC2         */
808 #define SYS_GPC_MFP0_PC0MFP_ACMP1_O         (0xEUL<<SYS_GPC_MFP0_PC0MFP_Pos)    /*!< GPC_MFP0 PC0 setting for ACMP1_O           */
809 #define SYS_GPC_MFP0_PC0MFP_UTCPD0_CC1      (0x11UL<<SYS_GPC_MFP0_PC0MFP_Pos)   /*!< GPC_MFP0 PC0 setting for UTCPD0_CC1        */
810 #define SYS_GPC_MFP0_PC0MFP_LPI2C0_SDA      (0x16UL<<SYS_GPC_MFP0_PC0MFP_Pos)   /*!< GPC_MFP0 PC0 setting for LPI2C0_SDA        */
811 #define SYS_GPC_MFP0_PC0MFP_LPIO4           (0x17UL<<SYS_GPC_MFP0_PC0MFP_Pos)   /*!< GPC_MFP0 PC0 setting for LPIO4             */
812 
813 /* PC.1 MFP */
814 #define SYS_GPC_MFP0_PC1MFP_GPIO            (0x0UL<<SYS_GPC_MFP0_PC1MFP_Pos)    /*!< GPC_MFP0 PC1 setting for GPIO              */
815 #define SYS_GPC_MFP0_PC1MFP_EBI_AD1         (0x2UL<<SYS_GPC_MFP0_PC1MFP_Pos)    /*!< GPC_MFP0 PC1 setting for EBI_AD1           */
816 #define SYS_GPC_MFP0_PC1MFP_QSPI0_MISO0     (0x4UL<<SYS_GPC_MFP0_PC1MFP_Pos)    /*!< GPC_MFP0 PC1 setting for QSPI0_MISO0       */
817 #define SYS_GPC_MFP0_PC1MFP_SPI1_CLK        (0x7UL<<SYS_GPC_MFP0_PC1MFP_Pos)    /*!< GPC_MFP0 PC1 setting for SPI1_CLK          */
818 #define SYS_GPC_MFP0_PC1MFP_UART2_TXD       (0x8UL<<SYS_GPC_MFP0_PC1MFP_Pos)    /*!< GPC_MFP0 PC1 setting for UART2_TXD         */
819 #define SYS_GPC_MFP0_PC1MFP_I2C0_SCL        (0x9UL<<SYS_GPC_MFP0_PC1MFP_Pos)    /*!< GPC_MFP0 PC1 setting for I2C0_SCL          */
820 #define SYS_GPC_MFP0_PC1MFP_EQEI0_A         (0xAUL<<SYS_GPC_MFP0_PC1MFP_Pos)    /*!< GPC_MFP0 PC1 setting for EQEI0_A           */
821 #define SYS_GPC_MFP0_PC1MFP_EPWM1_CH4       (0xCUL<<SYS_GPC_MFP0_PC1MFP_Pos)    /*!< GPC_MFP0 PC1 setting for EPWM1_CH4         */
822 #define SYS_GPC_MFP0_PC1MFP_ECAP0_IC1       (0xDUL<<SYS_GPC_MFP0_PC1MFP_Pos)    /*!< GPC_MFP0 PC1 setting for ECAP0_IC1         */
823 #define SYS_GPC_MFP0_PC1MFP_ACMP0_O         (0xEUL<<SYS_GPC_MFP0_PC1MFP_Pos)    /*!< GPC_MFP0 PC1 setting for ACMP0_O           */
824 #define SYS_GPC_MFP0_PC1MFP_EADC0_ST        (0xFUL<<SYS_GPC_MFP0_PC1MFP_Pos)    /*!< GPC_MFP0 PC1 setting for EADC0_ST          */
825 #define SYS_GPC_MFP0_PC1MFP_LPADC0_ST       (0xFUL<<SYS_GPC_MFP0_PC1MFP_Pos)    /*!< GPC_MFP0 PC1 setting for LPADC0_ST         */
826 #define SYS_GPC_MFP0_PC1MFP_UTCPD0_CC2      (0x11UL<<SYS_GPC_MFP0_PC1MFP_Pos)   /*!< GPC_MFP0 PC1 setting for UTCPD0_CC2        */
827 #define SYS_GPC_MFP0_PC1MFP_LPI2C0_SCL      (0x16UL<<SYS_GPC_MFP0_PC1MFP_Pos)   /*!< GPC_MFP0 PC1 setting for LPI2C0_SCL        */
828 #define SYS_GPC_MFP0_PC1MFP_LPIO5           (0x17UL<<SYS_GPC_MFP0_PC1MFP_Pos)   /*!< GPC_MFP0 PC1 setting for LPIO5             */
829 
830 /* PC.2 MFP */
831 #define SYS_GPC_MFP0_PC2MFP_GPIO            (0x0UL<<SYS_GPC_MFP0_PC2MFP_Pos)    /*!< GPC_MFP0 PC2 setting for GPIO              */
832 #define SYS_GPC_MFP0_PC2MFP_EBI_AD2         (0x2UL<<SYS_GPC_MFP0_PC2MFP_Pos)    /*!< GPC_MFP0 PC2 setting for EBI_AD2           */
833 #define SYS_GPC_MFP0_PC2MFP_QSPI0_CLK       (0x4UL<<SYS_GPC_MFP0_PC2MFP_Pos)    /*!< GPC_MFP0 PC2 setting for QSPI0_CLK         */
834 #define SYS_GPC_MFP0_PC2MFP_SPI3_MOSI       (0x6UL<<SYS_GPC_MFP0_PC2MFP_Pos)    /*!< GPC_MFP0 PC2 setting for SPI3_MOSI         */
835 #define SYS_GPC_MFP0_PC2MFP_SPI1_MOSI       (0x7UL<<SYS_GPC_MFP0_PC2MFP_Pos)    /*!< GPC_MFP0 PC2 setting for SPI1_MOSI         */
836 #define SYS_GPC_MFP0_PC2MFP_UART2_nCTS      (0x8UL<<SYS_GPC_MFP0_PC2MFP_Pos)    /*!< GPC_MFP0 PC2 setting for UART2_nCTS        */
837 #define SYS_GPC_MFP0_PC2MFP_I2C0_SMBSUS     (0x9UL<<SYS_GPC_MFP0_PC2MFP_Pos)    /*!< GPC_MFP0 PC2 setting for I2C0_SMBSUS       */
838 #define SYS_GPC_MFP0_PC2MFP_EQEI0_INDEX     (0xAUL<<SYS_GPC_MFP0_PC2MFP_Pos)    /*!< GPC_MFP0 PC2 setting for EQEI0_INDEX       */
839 #define SYS_GPC_MFP0_PC2MFP_UART3_RXD       (0xBUL<<SYS_GPC_MFP0_PC2MFP_Pos)    /*!< GPC_MFP0 PC2 setting for UART3_RXD         */
840 #define SYS_GPC_MFP0_PC2MFP_EPWM1_CH3       (0xCUL<<SYS_GPC_MFP0_PC2MFP_Pos)    /*!< GPC_MFP0 PC2 setting for EPWM1_CH3         */
841 #define SYS_GPC_MFP0_PC2MFP_ECAP0_IC0       (0xDUL<<SYS_GPC_MFP0_PC2MFP_Pos)    /*!< GPC_MFP0 PC2 setting for ECAP0_IC0         */
842 #define SYS_GPC_MFP0_PC2MFP_I2C3_SDA        (0xFUL<<SYS_GPC_MFP0_PC2MFP_Pos)    /*!< GPC_MFP0 PC2 setting for I2C3_SDA          */
843 #define SYS_GPC_MFP0_PC2MFP_TK_TK13         (0x10UL<<SYS_GPC_MFP0_PC2MFP_Pos)   /*!< GPC_MFP0 PC2 setting for TK_TK13           */
844 #define SYS_GPC_MFP0_PC2MFP_UTCPD0_CCDB1    (0x11UL<<SYS_GPC_MFP0_PC2MFP_Pos)   /*!< GPC_MFP0 PC2 setting for UTCPD0_CCDB1      */
845 
846 /* PC.3 MFP */
847 #define SYS_GPC_MFP0_PC3MFP_GPIO            (0x0UL<<SYS_GPC_MFP0_PC3MFP_Pos)    /*!< GPC_MFP0 PC3 setting for GPIO              */
848 #define SYS_GPC_MFP0_PC3MFP_EBI_AD3         (0x2UL<<SYS_GPC_MFP0_PC3MFP_Pos)    /*!< GPC_MFP0 PC3 setting for EBI_AD3           */
849 #define SYS_GPC_MFP0_PC3MFP_QSPI0_SS        (0x4UL<<SYS_GPC_MFP0_PC3MFP_Pos)    /*!< GPC_MFP0 PC3 setting for QSPI0_SS          */
850 #define SYS_GPC_MFP0_PC3MFP_SPI3_MISO       (0x6UL<<SYS_GPC_MFP0_PC3MFP_Pos)    /*!< GPC_MFP0 PC3 setting for SPI3_MISO         */
851 #define SYS_GPC_MFP0_PC3MFP_SPI1_MISO       (0x7UL<<SYS_GPC_MFP0_PC3MFP_Pos)    /*!< GPC_MFP0 PC3 setting for SPI1_MISO         */
852 #define SYS_GPC_MFP0_PC3MFP_UART2_nRTS      (0x8UL<<SYS_GPC_MFP0_PC3MFP_Pos)    /*!< GPC_MFP0 PC3 setting for UART2_nRTS        */
853 #define SYS_GPC_MFP0_PC3MFP_I2C0_SMBAL      (0x9UL<<SYS_GPC_MFP0_PC3MFP_Pos)    /*!< GPC_MFP0 PC3 setting for I2C0_SMBAL        */
854 #define SYS_GPC_MFP0_PC3MFP_UART3_TXD       (0xBUL<<SYS_GPC_MFP0_PC3MFP_Pos)    /*!< GPC_MFP0 PC3 setting for UART3_TXD         */
855 #define SYS_GPC_MFP0_PC3MFP_EPWM1_CH2       (0xCUL<<SYS_GPC_MFP0_PC3MFP_Pos)    /*!< GPC_MFP0 PC3 setting for EPWM1_CH2         */
856 #define SYS_GPC_MFP0_PC3MFP_I2C3_SCL        (0xFUL<<SYS_GPC_MFP0_PC3MFP_Pos)    /*!< GPC_MFP0 PC3 setting for I2C3_SCL          */
857 #define SYS_GPC_MFP0_PC3MFP_TK_TK12         (0x10UL<<SYS_GPC_MFP0_PC3MFP_Pos)   /*!< GPC_MFP0 PC3 setting for TK_TK12           */
858 #define SYS_GPC_MFP0_PC3MFP_UTCPD0_CCDB2    (0x11UL<<SYS_GPC_MFP0_PC3MFP_Pos)   /*!< GPC_MFP0 PC3 setting for UTCPD0_CCDB2      */
859 
860 /* PC.4 MFP */
861 #define SYS_GPC_MFP1_PC4MFP_GPIO            (0x0UL<<SYS_GPC_MFP1_PC4MFP_Pos)    /*!< GPC_MFP1 PC4 setting for GPIO              */
862 #define SYS_GPC_MFP1_PC4MFP_EBI_AD4         (0x2UL<<SYS_GPC_MFP1_PC4MFP_Pos)    /*!< GPC_MFP1 PC4 setting for EBI_AD4           */
863 #define SYS_GPC_MFP1_PC4MFP_QSPI0_MOSI1     (0x4UL<<SYS_GPC_MFP1_PC4MFP_Pos)    /*!< GPC_MFP1 PC4 setting for QSPI0_MOSI1       */
864 #define SYS_GPC_MFP1_PC4MFP_SPI3_CLK        (0x6UL<<SYS_GPC_MFP1_PC4MFP_Pos)    /*!< GPC_MFP1 PC4 setting for SPI3_CLK          */
865 #define SYS_GPC_MFP1_PC4MFP_SPI1_I2SMCLK    (0x7UL<<SYS_GPC_MFP1_PC4MFP_Pos)    /*!< GPC_MFP1 PC4 setting for SPI1_I2SMCLK      */
866 #define SYS_GPC_MFP1_PC4MFP_UART2_RXD       (0x8UL<<SYS_GPC_MFP1_PC4MFP_Pos)    /*!< GPC_MFP1 PC4 setting for UART2_RXD         */
867 #define SYS_GPC_MFP1_PC4MFP_I2C1_SDA        (0x9UL<<SYS_GPC_MFP1_PC4MFP_Pos)    /*!< GPC_MFP1 PC4 setting for I2C1_SDA          */
868 #define SYS_GPC_MFP1_PC4MFP_CANFD0_RXD      (0xAUL<<SYS_GPC_MFP1_PC4MFP_Pos)    /*!< GPC_MFP1 PC4 setting for CANFD0_RXD        */
869 #define SYS_GPC_MFP1_PC4MFP_UART4_RXD       (0xBUL<<SYS_GPC_MFP1_PC4MFP_Pos)    /*!< GPC_MFP1 PC4 setting for UART4_RXD         */
870 #define SYS_GPC_MFP1_PC4MFP_EPWM1_CH1       (0xCUL<<SYS_GPC_MFP1_PC4MFP_Pos)    /*!< GPC_MFP1 PC4 setting for EPWM1_CH1         */
871 #define SYS_GPC_MFP1_PC4MFP_I2C3_SMBSUS     (0xFUL<<SYS_GPC_MFP1_PC4MFP_Pos)    /*!< GPC_MFP1 PC4 setting for I2C3_SMBSUS       */
872 #define SYS_GPC_MFP1_PC4MFP_TK_TK11         (0x10UL<<SYS_GPC_MFP1_PC4MFP_Pos)   /*!< GPC_MFP1 PC4 setting for TK_TK11           */
873 #define SYS_GPC_MFP1_PC4MFP_UTCPD0_FRSTX1   (0x11UL<<SYS_GPC_MFP1_PC4MFP_Pos)   /*!< GPC_MFP1 PC4 setting for UTCPD0_FRSTX1     */
874 #define SYS_GPC_MFP1_PC4MFP_UTCPD0_DISCHG   (0x12UL<<SYS_GPC_MFP1_PC4MFP_Pos)   /*!< GPC_MFP1 PC4 setting for UTCPD0_DISCHG     */
875 
876 /* PC.5 MFP */
877 #define SYS_GPC_MFP1_PC5MFP_GPIO            (0x0UL<<SYS_GPC_MFP1_PC5MFP_Pos)    /*!< GPC_MFP1 PC5 setting for GPIO              */
878 #define SYS_GPC_MFP1_PC5MFP_EBI_AD5         (0x2UL<<SYS_GPC_MFP1_PC5MFP_Pos)    /*!< GPC_MFP1 PC5 setting for EBI_AD5           */
879 #define SYS_GPC_MFP1_PC5MFP_QSPI0_MISO1     (0x4UL<<SYS_GPC_MFP1_PC5MFP_Pos)    /*!< GPC_MFP1 PC5 setting for QSPI0_MISO1       */
880 #define SYS_GPC_MFP1_PC5MFP_SPI3_SS         (0x6UL<<SYS_GPC_MFP1_PC5MFP_Pos)    /*!< GPC_MFP1 PC5 setting for SPI3_SS           */
881 #define SYS_GPC_MFP1_PC5MFP_UART2_TXD       (0x8UL<<SYS_GPC_MFP1_PC5MFP_Pos)    /*!< GPC_MFP1 PC5 setting for UART2_TXD         */
882 #define SYS_GPC_MFP1_PC5MFP_I2C1_SCL        (0x9UL<<SYS_GPC_MFP1_PC5MFP_Pos)    /*!< GPC_MFP1 PC5 setting for I2C1_SCL          */
883 #define SYS_GPC_MFP1_PC5MFP_CANFD0_TXD      (0xAUL<<SYS_GPC_MFP1_PC5MFP_Pos)    /*!< GPC_MFP1 PC5 setting for CANFD0_TXD        */
884 #define SYS_GPC_MFP1_PC5MFP_UART4_TXD       (0xBUL<<SYS_GPC_MFP1_PC5MFP_Pos)    /*!< GPC_MFP1 PC5 setting for UART4_TXD         */
885 #define SYS_GPC_MFP1_PC5MFP_EPWM1_CH0       (0xCUL<<SYS_GPC_MFP1_PC5MFP_Pos)    /*!< GPC_MFP1 PC5 setting for EPWM1_CH0         */
886 #define SYS_GPC_MFP1_PC5MFP_I2C3_SMBAL      (0xFUL<<SYS_GPC_MFP1_PC5MFP_Pos)    /*!< GPC_MFP1 PC5 setting for I2C3_SMBAL        */
887 #define SYS_GPC_MFP1_PC5MFP_TK_TK10         (0x10UL<<SYS_GPC_MFP1_PC5MFP_Pos)   /*!< GPC_MFP1 PC5 setting for TK_TK10           */
888 #define SYS_GPC_MFP1_PC5MFP_UTCPD0_FRSTX2   (0x11UL<<SYS_GPC_MFP1_PC5MFP_Pos)   /*!< GPC_MFP1 PC5 setting for UTCPD0_FRSTX2     */
889 #define SYS_GPC_MFP1_PC5MFP_UTCPD0_DISCHG   (0x12UL<<SYS_GPC_MFP1_PC5MFP_Pos)   /*!< GPC_MFP1 PC5 setting for UTCPD0_DISCHG     */
890 
891 /* PC.6 MFP */
892 #define SYS_GPC_MFP1_PC6MFP_GPIO            (0x0UL<<SYS_GPC_MFP1_PC6MFP_Pos)    /*!< GPC_MFP1 PC6 setting for GPIO              */
893 #define SYS_GPC_MFP1_PC6MFP_EBI_AD8         (0x2UL<<SYS_GPC_MFP1_PC6MFP_Pos)    /*!< GPC_MFP1 PC6 setting for EBI_AD8           */
894 #define SYS_GPC_MFP1_PC6MFP_SPI1_MOSI       (0x4UL<<SYS_GPC_MFP1_PC6MFP_Pos)    /*!< GPC_MFP1 PC6 setting for SPI1_MOSI         */
895 #define SYS_GPC_MFP1_PC6MFP_UART4_RXD       (0x5UL<<SYS_GPC_MFP1_PC6MFP_Pos)    /*!< GPC_MFP1 PC6 setting for UART4_RXD         */
896 #define SYS_GPC_MFP1_PC6MFP_UART0_nRTS      (0x7UL<<SYS_GPC_MFP1_PC6MFP_Pos)    /*!< GPC_MFP1 PC6 setting for UART0_nRTS        */
897 #define SYS_GPC_MFP1_PC6MFP_UART6_RXD       (0x9UL<<SYS_GPC_MFP1_PC6MFP_Pos)    /*!< GPC_MFP1 PC6 setting for UART6_RXD         */
898 #define SYS_GPC_MFP1_PC6MFP_EPWM1_CH3       (0xBUL<<SYS_GPC_MFP1_PC6MFP_Pos)    /*!< GPC_MFP1 PC6 setting for EPWM1_CH3         */
899 #define SYS_GPC_MFP1_PC6MFP_PWM1_CH1        (0xCUL<<SYS_GPC_MFP1_PC6MFP_Pos)    /*!< GPC_MFP1 PC6 setting for PWM1_CH1          */
900 #define SYS_GPC_MFP1_PC6MFP_TM1             (0xEUL<<SYS_GPC_MFP1_PC6MFP_Pos)    /*!< GPC_MFP1 PC6 setting for TM1               */
901 #define SYS_GPC_MFP1_PC6MFP_INT2            (0xFUL<<SYS_GPC_MFP1_PC6MFP_Pos)    /*!< GPC_MFP1 PC6 setting for INT2              */
902 #define SYS_GPC_MFP1_PC6MFP_LPUART0_nRTS    (0x15UL<<SYS_GPC_MFP1_PC6MFP_Pos)   /*!< GPC_MFP1 PC6 setting for LPUART0_nRTS      */
903 #define SYS_GPC_MFP1_PC6MFP_LPTM1           (0x17UL<<SYS_GPC_MFP1_PC6MFP_Pos)   /*!< GPC_MFP1 PC6 setting for LPTM1             */
904 
905 /* PC.7 MFP */
906 #define SYS_GPC_MFP1_PC7MFP_GPIO            (0x0UL<<SYS_GPC_MFP1_PC7MFP_Pos)    /*!< GPC_MFP1 PC7 setting for GPIO              */
907 #define SYS_GPC_MFP1_PC7MFP_EBI_AD9         (0x2UL<<SYS_GPC_MFP1_PC7MFP_Pos)    /*!< GPC_MFP1 PC7 setting for EBI_AD9           */
908 #define SYS_GPC_MFP1_PC7MFP_SPI1_MISO       (0x4UL<<SYS_GPC_MFP1_PC7MFP_Pos)    /*!< GPC_MFP1 PC7 setting for SPI1_MISO         */
909 #define SYS_GPC_MFP1_PC7MFP_UART4_TXD       (0x5UL<<SYS_GPC_MFP1_PC7MFP_Pos)    /*!< GPC_MFP1 PC7 setting for UART4_TXD         */
910 #define SYS_GPC_MFP1_PC7MFP_UART0_nCTS      (0x7UL<<SYS_GPC_MFP1_PC7MFP_Pos)    /*!< GPC_MFP1 PC7 setting for UART0_nCTS        */
911 #define SYS_GPC_MFP1_PC7MFP_UART6_TXD       (0x9UL<<SYS_GPC_MFP1_PC7MFP_Pos)    /*!< GPC_MFP1 PC7 setting for UART6_TXD         */
912 #define SYS_GPC_MFP1_PC7MFP_EPWM1_CH2       (0xBUL<<SYS_GPC_MFP1_PC7MFP_Pos)    /*!< GPC_MFP1 PC7 setting for EPWM1_CH2         */
913 #define SYS_GPC_MFP1_PC7MFP_PWM1_CH0        (0xCUL<<SYS_GPC_MFP1_PC7MFP_Pos)    /*!< GPC_MFP1 PC7 setting for PWM1_CH0          */
914 #define SYS_GPC_MFP1_PC7MFP_TM0             (0xEUL<<SYS_GPC_MFP1_PC7MFP_Pos)    /*!< GPC_MFP1 PC7 setting for TM0               */
915 #define SYS_GPC_MFP1_PC7MFP_INT3            (0xFUL<<SYS_GPC_MFP1_PC7MFP_Pos)    /*!< GPC_MFP1 PC7 setting for INT3              */
916 #define SYS_GPC_MFP1_PC7MFP_LPUART0_nCTS    (0x15UL<<SYS_GPC_MFP1_PC7MFP_Pos)   /*!< GPC_MFP1 PC7 setting for LPUART0_nCTS      */
917 #define SYS_GPC_MFP1_PC7MFP_LPTM0           (0x17UL<<SYS_GPC_MFP1_PC7MFP_Pos)   /*!< GPC_MFP1 PC7 setting for LPTM0             */
918 
919 /* PC.8 MFP */
920 #define SYS_GPC_MFP2_PC8MFP_GPIO            (0x0UL<<SYS_GPC_MFP2_PC8MFP_Pos)    /*!< GPC_MFP2 PC8 setting for GPIO              */
921 #define SYS_GPC_MFP2_PC8MFP_EBI_ADR16       (0x2UL<<SYS_GPC_MFP2_PC8MFP_Pos)    /*!< GPC_MFP2 PC8 setting for EBI_ADR16         */
922 #define SYS_GPC_MFP2_PC8MFP_I2C0_SDA        (0x4UL<<SYS_GPC_MFP2_PC8MFP_Pos)    /*!< GPC_MFP2 PC8 setting for I2C0_SDA          */
923 #define SYS_GPC_MFP2_PC8MFP_UART4_nCTS      (0x5UL<<SYS_GPC_MFP2_PC8MFP_Pos)    /*!< GPC_MFP2 PC8 setting for UART4_nCTS        */
924 #define SYS_GPC_MFP2_PC8MFP_UART1_RXD       (0x8UL<<SYS_GPC_MFP2_PC8MFP_Pos)    /*!< GPC_MFP2 PC8 setting for UART1_RXD         */
925 #define SYS_GPC_MFP2_PC8MFP_EPWM1_CH1       (0xBUL<<SYS_GPC_MFP2_PC8MFP_Pos)    /*!< GPC_MFP2 PC8 setting for EPWM1_CH1         */
926 #define SYS_GPC_MFP2_PC8MFP_PWM1_CH4        (0xCUL<<SYS_GPC_MFP2_PC8MFP_Pos)    /*!< GPC_MFP2 PC8 setting for PWM1_CH4          */
927 #define SYS_GPC_MFP2_PC8MFP_LPI2C0_SDA      (0x16UL<<SYS_GPC_MFP2_PC8MFP_Pos)   /*!< GPC_MFP2 PC8 setting for LPI2C0_SDA        */
928 
929 /* PC.9 MFP */
930 #define SYS_GPC_MFP2_PC9MFP_GPIO            (0x0UL<<SYS_GPC_MFP2_PC9MFP_Pos)    /*!< GPC_MFP2 PC9 setting for GPIO              */
931 #define SYS_GPC_MFP2_PC9MFP_EBI_ADR7        (0x2UL<<SYS_GPC_MFP2_PC9MFP_Pos)    /*!< GPC_MFP2 PC9 setting for EBI_ADR7          */
932 #define SYS_GPC_MFP2_PC9MFP_UART6_nCTS      (0x5UL<<SYS_GPC_MFP2_PC9MFP_Pos)    /*!< GPC_MFP2 PC9 setting for UART6_nCTS        */
933 #define SYS_GPC_MFP2_PC9MFP_SPI3_SS         (0x6UL<<SYS_GPC_MFP2_PC9MFP_Pos)    /*!< GPC_MFP2 PC9 setting for SPI3_SS           */
934 #define SYS_GPC_MFP2_PC9MFP_UART3_RXD       (0x7UL<<SYS_GPC_MFP2_PC9MFP_Pos)    /*!< GPC_MFP2 PC9 setting for UART3_RXD         */
935 #define SYS_GPC_MFP2_PC9MFP_CANFD1_RXD      (0x9UL<<SYS_GPC_MFP2_PC9MFP_Pos)    /*!< GPC_MFP2 PC9 setting for CANFD1_RXD        */
936 #define SYS_GPC_MFP2_PC9MFP_EPWM1_CH3       (0xCUL<<SYS_GPC_MFP2_PC9MFP_Pos)    /*!< GPC_MFP2 PC9 setting for EPWM1_CH3         */
937 
938 /* PC.10 MFP */
939 #define SYS_GPC_MFP2_PC10MFP_GPIO           (0x0UL<<SYS_GPC_MFP2_PC10MFP_Pos)   /*!< GPC_MFP2 PC10 setting for GPIO             */
940 #define SYS_GPC_MFP2_PC10MFP_EBI_ADR6       (0x2UL<<SYS_GPC_MFP2_PC10MFP_Pos)   /*!< GPC_MFP2 PC10 setting for EBI_ADR6         */
941 #define SYS_GPC_MFP2_PC10MFP_UART6_nRTS     (0x5UL<<SYS_GPC_MFP2_PC10MFP_Pos)   /*!< GPC_MFP2 PC10 setting for UART6_nRTS       */
942 #define SYS_GPC_MFP2_PC10MFP_SPI3_CLK       (0x6UL<<SYS_GPC_MFP2_PC10MFP_Pos)   /*!< GPC_MFP2 PC10 setting for SPI3_CLK         */
943 #define SYS_GPC_MFP2_PC10MFP_UART3_TXD      (0x7UL<<SYS_GPC_MFP2_PC10MFP_Pos)   /*!< GPC_MFP2 PC10 setting for UART3_TXD        */
944 #define SYS_GPC_MFP2_PC10MFP_CANFD1_TXD     (0x9UL<<SYS_GPC_MFP2_PC10MFP_Pos)   /*!< GPC_MFP2 PC10 setting for CANFD1_TXD       */
945 #define SYS_GPC_MFP2_PC10MFP_ECAP1_IC0      (0xBUL<<SYS_GPC_MFP2_PC10MFP_Pos)   /*!< GPC_MFP2 PC10 setting for ECAP1_IC0        */
946 #define SYS_GPC_MFP2_PC10MFP_EPWM1_CH2      (0xCUL<<SYS_GPC_MFP2_PC10MFP_Pos)   /*!< GPC_MFP2 PC10 setting for EPWM1_CH2        */
947 
948 /* PC.11 MFP */
949 #define SYS_GPC_MFP2_PC11MFP_GPIO           (0x0UL<<SYS_GPC_MFP2_PC11MFP_Pos)   /*!< GPC_MFP2 PC11 setting for GPIO             */
950 #define SYS_GPC_MFP2_PC11MFP_EBI_ADR5       (0x2UL<<SYS_GPC_MFP2_PC11MFP_Pos)   /*!< GPC_MFP2 PC11 setting for EBI_ADR5         */
951 #define SYS_GPC_MFP2_PC11MFP_UART0_RXD      (0x3UL<<SYS_GPC_MFP2_PC11MFP_Pos)   /*!< GPC_MFP2 PC11 setting for UART0_RXD        */
952 #define SYS_GPC_MFP2_PC11MFP_I2C0_SDA       (0x4UL<<SYS_GPC_MFP2_PC11MFP_Pos)   /*!< GPC_MFP2 PC11 setting for I2C0_SDA         */
953 #define SYS_GPC_MFP2_PC11MFP_UART6_RXD      (0x5UL<<SYS_GPC_MFP2_PC11MFP_Pos)   /*!< GPC_MFP2 PC11 setting for UART6_RXD        */
954 #define SYS_GPC_MFP2_PC11MFP_SPI3_MOSI      (0x6UL<<SYS_GPC_MFP2_PC11MFP_Pos)   /*!< GPC_MFP2 PC11 setting for SPI3_MOSI        */
955 #define SYS_GPC_MFP2_PC11MFP_ECAP1_IC1      (0xBUL<<SYS_GPC_MFP2_PC11MFP_Pos)   /*!< GPC_MFP2 PC11 setting for ECAP1_IC1        */
956 #define SYS_GPC_MFP2_PC11MFP_EPWM1_CH1      (0xCUL<<SYS_GPC_MFP2_PC11MFP_Pos)   /*!< GPC_MFP2 PC11 setting for EPWM1_CH1        */
957 #define SYS_GPC_MFP2_PC11MFP_ACMP1_O        (0xEUL<<SYS_GPC_MFP2_PC11MFP_Pos)   /*!< GPC_MFP2 PC11 setting for ACMP1_O          */
958 #define SYS_GPC_MFP2_PC11MFP_LPUART0_RXD    (0x15UL<<SYS_GPC_MFP2_PC11MFP_Pos)  /*!< GPC_MFP2 PC11 setting for LPUART0_RXD      */
959 #define SYS_GPC_MFP2_PC11MFP_LPI2C0_SDA     (0x16UL<<SYS_GPC_MFP2_PC11MFP_Pos)  /*!< GPC_MFP2 PC11 setting for LPI2C0_SDA       */
960 
961 /* PC.12 MFP */
962 #define SYS_GPC_MFP3_PC12MFP_GPIO           (0x0UL<<SYS_GPC_MFP3_PC12MFP_Pos)   /*!< GPC_MFP3 PC12 setting for GPIO             */
963 #define SYS_GPC_MFP3_PC12MFP_EBI_ADR4       (0x2UL<<SYS_GPC_MFP3_PC12MFP_Pos)   /*!< GPC_MFP3 PC12 setting for EBI_ADR4         */
964 #define SYS_GPC_MFP3_PC12MFP_UART0_TXD      (0x3UL<<SYS_GPC_MFP3_PC12MFP_Pos)   /*!< GPC_MFP3 PC12 setting for UART0_TXD        */
965 #define SYS_GPC_MFP3_PC12MFP_I2C0_SCL       (0x4UL<<SYS_GPC_MFP3_PC12MFP_Pos)   /*!< GPC_MFP3 PC12 setting for I2C0_SCL         */
966 #define SYS_GPC_MFP3_PC12MFP_UART6_TXD      (0x5UL<<SYS_GPC_MFP3_PC12MFP_Pos)   /*!< GPC_MFP3 PC12 setting for UART6_TXD        */
967 #define SYS_GPC_MFP3_PC12MFP_SPI3_MISO      (0x6UL<<SYS_GPC_MFP3_PC12MFP_Pos)   /*!< GPC_MFP3 PC12 setting for SPI3_MISO        */
968 #define SYS_GPC_MFP3_PC12MFP_ECAP1_IC2      (0xBUL<<SYS_GPC_MFP3_PC12MFP_Pos)   /*!< GPC_MFP3 PC12 setting for ECAP1_IC2        */
969 #define SYS_GPC_MFP3_PC12MFP_EPWM1_CH0      (0xCUL<<SYS_GPC_MFP3_PC12MFP_Pos)   /*!< GPC_MFP3 PC12 setting for EPWM1_CH0        */
970 #define SYS_GPC_MFP3_PC12MFP_ACMP0_O        (0xEUL<<SYS_GPC_MFP3_PC12MFP_Pos)   /*!< GPC_MFP3 PC12 setting for ACMP0_O          */
971 #define SYS_GPC_MFP3_PC12MFP_LPUART0_TXD    (0x15UL<<SYS_GPC_MFP3_PC12MFP_Pos)  /*!< GPC_MFP3 PC12 setting for LPUART0_TXD      */
972 #define SYS_GPC_MFP3_PC12MFP_LPI2C0_SCL     (0x16UL<<SYS_GPC_MFP3_PC12MFP_Pos)  /*!< GPC_MFP3 PC12 setting for LPI2C0_SCL       */
973 
974 /* PC.13 MFP */
975 #define SYS_GPC_MFP3_PC13MFP_GPIO           (0x0UL<<SYS_GPC_MFP3_PC13MFP_Pos)   /*!< GPC_MFP3 PC13 setting for GPIO             */
976 #define SYS_GPC_MFP3_PC13MFP_EADC0_CH19     (0x1UL<<SYS_GPC_MFP3_PC13MFP_Pos)   /*!< GPC_MFP3 PC13 setting for EADC0_CH19       */
977 #define SYS_GPC_MFP3_PC13MFP_LPADC0_CH19    (0x1UL<<SYS_GPC_MFP3_PC13MFP_Pos)   /*!< GPC_MFP3 PC13 setting for LPADC0_CH19      */
978 #define SYS_GPC_MFP3_PC13MFP_EBI_ADR10      (0x2UL<<SYS_GPC_MFP3_PC13MFP_Pos)   /*!< GPC_MFP3 PC13 setting for EBI_ADR10        */
979 #define SYS_GPC_MFP3_PC13MFP_SPI2_I2SMCLK   (0x4UL<<SYS_GPC_MFP3_PC13MFP_Pos)   /*!< GPC_MFP3 PC13 setting for SPI2_I2SMCLK     */
980 #define SYS_GPC_MFP3_PC13MFP_CANFD1_TXD     (0x5UL<<SYS_GPC_MFP3_PC13MFP_Pos)   /*!< GPC_MFP3 PC13 setting for CANFD1_TXD       */
981 #define SYS_GPC_MFP3_PC13MFP_USCI0_CTL0     (0x6UL<<SYS_GPC_MFP3_PC13MFP_Pos)   /*!< GPC_MFP3 PC13 setting for USCI0_CTL0       */
982 #define SYS_GPC_MFP3_PC13MFP_UART2_TXD      (0x7UL<<SYS_GPC_MFP3_PC13MFP_Pos)   /*!< GPC_MFP3 PC13 setting for UART2_TXD        */
983 #define SYS_GPC_MFP3_PC13MFP_PWM0_CH4       (0x9UL<<SYS_GPC_MFP3_PC13MFP_Pos)   /*!< GPC_MFP3 PC13 setting for PWM0_CH4         */
984 #define SYS_GPC_MFP3_PC13MFP_CLKO           (0xDUL<<SYS_GPC_MFP3_PC13MFP_Pos)   /*!< GPC_MFP3 PC13 setting for CLKO             */
985 #define SYS_GPC_MFP3_PC13MFP_EADC0_ST       (0xEUL<<SYS_GPC_MFP3_PC13MFP_Pos)   /*!< GPC_MFP3 PC13 setting for EADC0_ST         */
986 #define SYS_GPC_MFP3_PC13MFP_LPADC0_ST      (0xEUL<<SYS_GPC_MFP3_PC13MFP_Pos)   /*!< GPC_MFP3 PC13 setting for LPADC0_ST        */
987 #define SYS_GPC_MFP3_PC13MFP_TK_SE          (0x10UL<<SYS_GPC_MFP3_PC13MFP_Pos)  /*!< GPC_MFP3 PC13 setting for TK_SE            */
988 
989 /* PC.14 MFP */
990 #define SYS_GPC_MFP3_PC14MFP_GPIO           (0x0UL<<SYS_GPC_MFP3_PC14MFP_Pos)   /*!< GPC_MFP3 PC14 setting for GPIO             */
991 #define SYS_GPC_MFP3_PC14MFP_EBI_AD11       (0x2UL<<SYS_GPC_MFP3_PC14MFP_Pos)   /*!< GPC_MFP3 PC14 setting for EBI_AD11         */
992 #define SYS_GPC_MFP3_PC14MFP_SPI0_I2SMCLK   (0x4UL<<SYS_GPC_MFP3_PC14MFP_Pos)   /*!< GPC_MFP3 PC14 setting for SPI0_I2SMCLK     */
993 #define SYS_GPC_MFP3_PC14MFP_USCI0_CTL0     (0x5UL<<SYS_GPC_MFP3_PC14MFP_Pos)   /*!< GPC_MFP3 PC14 setting for USCI0_CTL0       */
994 #define SYS_GPC_MFP3_PC14MFP_QSPI0_CLK      (0x6UL<<SYS_GPC_MFP3_PC14MFP_Pos)   /*!< GPC_MFP3 PC14 setting for QSPI0_CLK        */
995 #define SYS_GPC_MFP3_PC14MFP_EBI_nCS2       (0x8UL<<SYS_GPC_MFP3_PC14MFP_Pos)   /*!< GPC_MFP3 PC14 setting for EBI_nCS2         */
996 #define SYS_GPC_MFP3_PC14MFP_EPWM0_SYNC_IN  (0xBUL<<SYS_GPC_MFP3_PC14MFP_Pos)   /*!< GPC_MFP3 PC14 setting for EPWM0_SYNC_IN    */
997 #define SYS_GPC_MFP3_PC14MFP_TM1            (0xDUL<<SYS_GPC_MFP3_PC14MFP_Pos)   /*!< GPC_MFP3 PC14 setting for TM1              */
998 #define SYS_GPC_MFP3_PC14MFP_USB_VBUS_ST    (0xEUL<<SYS_GPC_MFP3_PC14MFP_Pos)   /*!< GPC_MFP3 PC14 setting for USB_VBUS_ST      */
999 #define SYS_GPC_MFP3_PC14MFP_ACMP2_O        (0xFUL<<SYS_GPC_MFP3_PC14MFP_Pos)   /*!< GPC_MFP3 PC14 setting for ACMP2_O          */
1000 #define SYS_GPC_MFP3_PC14MFP_LPTM1          (0x17UL<<SYS_GPC_MFP3_PC14MFP_Pos)  /*!< GPC_MFP3 PC14 setting for LPTM1            */
1001 
1002 /* PD.0 MFP */
1003 #define SYS_GPD_MFP0_PD0MFP_GPIO            (0x0UL<<SYS_GPD_MFP0_PD0MFP_Pos)    /*!< GPD_MFP0 PD0 setting for GPIO              */
1004 #define SYS_GPD_MFP0_PD0MFP_EBI_AD13        (0x2UL<<SYS_GPD_MFP0_PD0MFP_Pos)    /*!< GPD_MFP0 PD0 setting for EBI_AD13          */
1005 #define SYS_GPD_MFP0_PD0MFP_USCI0_CLK       (0x3UL<<SYS_GPD_MFP0_PD0MFP_Pos)    /*!< GPD_MFP0 PD0 setting for USCI0_CLK         */
1006 #define SYS_GPD_MFP0_PD0MFP_SPI0_MOSI       (0x4UL<<SYS_GPD_MFP0_PD0MFP_Pos)    /*!< GPD_MFP0 PD0 setting for SPI0_MOSI         */
1007 #define SYS_GPD_MFP0_PD0MFP_UART3_RXD       (0x5UL<<SYS_GPD_MFP0_PD0MFP_Pos)    /*!< GPD_MFP0 PD0 setting for UART3_RXD         */
1008 #define SYS_GPD_MFP0_PD0MFP_TM2             (0xEUL<<SYS_GPD_MFP0_PD0MFP_Pos)    /*!< GPD_MFP0 PD0 setting for TM2               */
1009 #define SYS_GPD_MFP0_PD0MFP_TK_TK17         (0x10UL<<SYS_GPD_MFP0_PD0MFP_Pos)   /*!< GPD_MFP0 PD0 setting for TK_TK17           */
1010 #define SYS_GPD_MFP0_PD0MFP_LPSPI0_MOSI     (0x14UL<<SYS_GPD_MFP0_PD0MFP_Pos)   /*!< GPD_MFP0 PD0 setting for LPSPI0_MOSI       */
1011 #define SYS_GPD_MFP0_PD0MFP_LPIO6           (0x17UL<<SYS_GPD_MFP0_PD0MFP_Pos)   /*!< GPD_MFP0 PD0 setting for LPIO6             */
1012 
1013 /* PD.1 MFP */
1014 #define SYS_GPD_MFP0_PD1MFP_GPIO            (0x0UL<<SYS_GPD_MFP0_PD1MFP_Pos)    /*!< GPD_MFP0 PD1 setting for GPIO              */
1015 #define SYS_GPD_MFP0_PD1MFP_EBI_AD12        (0x2UL<<SYS_GPD_MFP0_PD1MFP_Pos)    /*!< GPD_MFP0 PD1 setting for EBI_AD12          */
1016 #define SYS_GPD_MFP0_PD1MFP_USCI0_DAT0      (0x3UL<<SYS_GPD_MFP0_PD1MFP_Pos)    /*!< GPD_MFP0 PD1 setting for USCI0_DAT0        */
1017 #define SYS_GPD_MFP0_PD1MFP_SPI0_MISO       (0x4UL<<SYS_GPD_MFP0_PD1MFP_Pos)    /*!< GPD_MFP0 PD1 setting for SPI0_MISO         */
1018 #define SYS_GPD_MFP0_PD1MFP_UART3_TXD       (0x5UL<<SYS_GPD_MFP0_PD1MFP_Pos)    /*!< GPD_MFP0 PD1 setting for UART3_TXD         */
1019 #define SYS_GPD_MFP0_PD1MFP_TK_TK16         (0x10UL<<SYS_GPD_MFP0_PD1MFP_Pos)   /*!< GPD_MFP0 PD1 setting for TK_TK16           */
1020 #define SYS_GPD_MFP0_PD1MFP_LPSPI0_MISO     (0x14UL<<SYS_GPD_MFP0_PD1MFP_Pos)   /*!< GPD_MFP0 PD1 setting for LPSPI0_MISO       */
1021 #define SYS_GPD_MFP0_PD1MFP_LPIO7           (0x17UL<<SYS_GPD_MFP0_PD1MFP_Pos)   /*!< GPD_MFP0 PD1 setting for LPIO7             */
1022 
1023 /* PD.2 MFP */
1024 #define SYS_GPD_MFP0_PD2MFP_GPIO            (0x0UL<<SYS_GPD_MFP0_PD2MFP_Pos)    /*!< GPD_MFP0 PD2 setting for GPIO              */
1025 #define SYS_GPD_MFP0_PD2MFP_EBI_AD11        (0x2UL<<SYS_GPD_MFP0_PD2MFP_Pos)    /*!< GPD_MFP0 PD2 setting for EBI_AD11          */
1026 #define SYS_GPD_MFP0_PD2MFP_USCI0_DAT1      (0x3UL<<SYS_GPD_MFP0_PD2MFP_Pos)    /*!< GPD_MFP0 PD2 setting for USCI0_DAT1        */
1027 #define SYS_GPD_MFP0_PD2MFP_SPI0_CLK        (0x4UL<<SYS_GPD_MFP0_PD2MFP_Pos)    /*!< GPD_MFP0 PD2 setting for SPI0_CLK          */
1028 #define SYS_GPD_MFP0_PD2MFP_UART3_nCTS      (0x5UL<<SYS_GPD_MFP0_PD2MFP_Pos)    /*!< GPD_MFP0 PD2 setting for UART3_nCTS        */
1029 #define SYS_GPD_MFP0_PD2MFP_UART0_RXD       (0x9UL<<SYS_GPD_MFP0_PD2MFP_Pos)    /*!< GPD_MFP0 PD2 setting for UART0_RXD         */
1030 #define SYS_GPD_MFP0_PD2MFP_TK_TK15         (0x10UL<<SYS_GPD_MFP0_PD2MFP_Pos)   /*!< GPD_MFP0 PD2 setting for TK_TK15           */
1031 #define SYS_GPD_MFP0_PD2MFP_LPSPI0_CLK      (0x14UL<<SYS_GPD_MFP0_PD2MFP_Pos)   /*!< GPD_MFP0 PD2 setting for LPSPI0_CLK        */
1032 #define SYS_GPD_MFP0_PD2MFP_LPUART0_RXD     (0x15UL<<SYS_GPD_MFP0_PD2MFP_Pos)   /*!< GPD_MFP0 PD2 setting for LPUART0_RXD       */
1033 
1034 /* PD.3 MFP */
1035 #define SYS_GPD_MFP0_PD3MFP_GPIO            (0x0UL<<SYS_GPD_MFP0_PD3MFP_Pos)    /*!< GPD_MFP0 PD3 setting for GPIO              */
1036 #define SYS_GPD_MFP0_PD3MFP_EBI_AD10        (0x2UL<<SYS_GPD_MFP0_PD3MFP_Pos)    /*!< GPD_MFP0 PD3 setting for EBI_AD10          */
1037 #define SYS_GPD_MFP0_PD3MFP_USCI0_CTL1      (0x3UL<<SYS_GPD_MFP0_PD3MFP_Pos)    /*!< GPD_MFP0 PD3 setting for USCI0_CTL1        */
1038 #define SYS_GPD_MFP0_PD3MFP_SPI0_SS         (0x4UL<<SYS_GPD_MFP0_PD3MFP_Pos)    /*!< GPD_MFP0 PD3 setting for SPI0_SS           */
1039 #define SYS_GPD_MFP0_PD3MFP_UART3_nRTS      (0x5UL<<SYS_GPD_MFP0_PD3MFP_Pos)    /*!< GPD_MFP0 PD3 setting for UART3_nRTS        */
1040 #define SYS_GPD_MFP0_PD3MFP_USCI1_CTL0      (0x6UL<<SYS_GPD_MFP0_PD3MFP_Pos)    /*!< GPD_MFP0 PD3 setting for USCI1_CTL0        */
1041 #define SYS_GPD_MFP0_PD3MFP_UART0_TXD       (0x9UL<<SYS_GPD_MFP0_PD3MFP_Pos)    /*!< GPD_MFP0 PD3 setting for UART0_TXD         */
1042 #define SYS_GPD_MFP0_PD3MFP_TK_TK14         (0x10UL<<SYS_GPD_MFP0_PD3MFP_Pos)   /*!< GPD_MFP0 PD3 setting for TK_TK14           */
1043 #define SYS_GPD_MFP0_PD3MFP_LPSPI0_SS       (0x14UL<<SYS_GPD_MFP0_PD3MFP_Pos)   /*!< GPD_MFP0 PD3 setting for LPSPI0_SS         */
1044 #define SYS_GPD_MFP0_PD3MFP_LPUART0_TXD     (0x15UL<<SYS_GPD_MFP0_PD3MFP_Pos)   /*!< GPD_MFP0 PD3 setting for LPUART0_TXD       */
1045 
1046 /* PD.4 MFP */
1047 #define SYS_GPD_MFP1_PD4MFP_GPIO            (0x0UL<<SYS_GPD_MFP1_PD4MFP_Pos)    /*!< GPD_MFP1 PD4 setting for GPIO              */
1048 #define SYS_GPD_MFP1_PD4MFP_USCI0_CTL0      (0x3UL<<SYS_GPD_MFP1_PD4MFP_Pos)    /*!< GPD_MFP1 PD4 setting for USCI0_CTL0        */
1049 #define SYS_GPD_MFP1_PD4MFP_I2C1_SDA        (0x4UL<<SYS_GPD_MFP1_PD4MFP_Pos)    /*!< GPD_MFP1 PD4 setting for I2C1_SDA          */
1050 #define SYS_GPD_MFP1_PD4MFP_USCI1_CTL1      (0x6UL<<SYS_GPD_MFP1_PD4MFP_Pos)    /*!< GPD_MFP1 PD4 setting for USCI1_CTL1        */
1051 #define SYS_GPD_MFP1_PD4MFP_TK_TK17         (0x10UL<<SYS_GPD_MFP1_PD4MFP_Pos)   /*!< GPD_MFP1 PD4 setting for TK_TK17           */
1052 
1053 /* PD.5 MFP */
1054 #define SYS_GPD_MFP1_PD5MFP_GPIO            (0x0UL<<SYS_GPD_MFP1_PD5MFP_Pos)    /*!< GPD_MFP1 PD5 setting for GPIO              */
1055 #define SYS_GPD_MFP1_PD5MFP_I2C1_SCL        (0x4UL<<SYS_GPD_MFP1_PD5MFP_Pos)    /*!< GPD_MFP1 PD5 setting for I2C1_SCL          */
1056 #define SYS_GPD_MFP1_PD5MFP_USCI1_DAT0      (0x6UL<<SYS_GPD_MFP1_PD5MFP_Pos)    /*!< GPD_MFP1 PD5 setting for USCI1_DAT0        */
1057 #define SYS_GPD_MFP1_PD5MFP_TK_TK16         (0x10UL<<SYS_GPD_MFP1_PD5MFP_Pos)   /*!< GPD_MFP1 PD5 setting for TK_TK16           */
1058 
1059 /* PD.6 MFP */
1060 #define SYS_GPD_MFP1_PD6MFP_GPIO            (0x0UL<<SYS_GPD_MFP1_PD6MFP_Pos)    /*!< GPD_MFP1 PD6 setting for GPIO              */
1061 #define SYS_GPD_MFP1_PD6MFP_UART1_RXD       (0x3UL<<SYS_GPD_MFP1_PD6MFP_Pos)    /*!< GPD_MFP1 PD6 setting for UART1_RXD         */
1062 #define SYS_GPD_MFP1_PD6MFP_I2C0_SDA        (0x4UL<<SYS_GPD_MFP1_PD6MFP_Pos)    /*!< GPD_MFP1 PD6 setting for I2C0_SDA          */
1063 #define SYS_GPD_MFP1_PD6MFP_USCI1_DAT1      (0x6UL<<SYS_GPD_MFP1_PD6MFP_Pos)    /*!< GPD_MFP1 PD6 setting for USCI1_DAT1        */
1064 #define SYS_GPD_MFP1_PD6MFP_TK_TK15         (0x10UL<<SYS_GPD_MFP1_PD6MFP_Pos)   /*!< GPD_MFP1 PD6 setting for TK_TK15           */
1065 #define SYS_GPD_MFP1_PD6MFP_LPI2C0_SDA      (0x16UL<<SYS_GPD_MFP1_PD6MFP_Pos)   /*!< GPD_MFP1 PD6 setting for LPI2C0_SDA        */
1066 
1067 /* PD.7 MFP */
1068 #define SYS_GPD_MFP1_PD7MFP_GPIO            (0x0UL<<SYS_GPD_MFP1_PD7MFP_Pos)    /*!< GPD_MFP1 PD7 setting for GPIO              */
1069 #define SYS_GPD_MFP1_PD7MFP_UART1_TXD       (0x3UL<<SYS_GPD_MFP1_PD7MFP_Pos)    /*!< GPD_MFP1 PD7 setting for UART1_TXD         */
1070 #define SYS_GPD_MFP1_PD7MFP_I2C0_SCL        (0x4UL<<SYS_GPD_MFP1_PD7MFP_Pos)    /*!< GPD_MFP1 PD7 setting for I2C0_SCL          */
1071 #define SYS_GPD_MFP1_PD7MFP_USCI1_CLK       (0x6UL<<SYS_GPD_MFP1_PD7MFP_Pos)    /*!< GPD_MFP1 PD7 setting for USCI1_CLK         */
1072 #define SYS_GPD_MFP1_PD7MFP_TK_TK14         (0x10UL<<SYS_GPD_MFP1_PD7MFP_Pos)   /*!< GPD_MFP1 PD7 setting for TK_TK14           */
1073 #define SYS_GPD_MFP1_PD7MFP_LPI2C0_SCL      (0x16UL<<SYS_GPD_MFP1_PD7MFP_Pos)   /*!< GPD_MFP1 PD7 setting for LPI2C0_SCL        */
1074 
1075 /* PD.8 MFP */
1076 #define SYS_GPD_MFP2_PD8MFP_GPIO            (0x0UL<<SYS_GPD_MFP2_PD8MFP_Pos)    /*!< GPD_MFP2 PD8 setting for GPIO              */
1077 #define SYS_GPD_MFP2_PD8MFP_EBI_AD6         (0x2UL<<SYS_GPD_MFP2_PD8MFP_Pos)    /*!< GPD_MFP2 PD8 setting for EBI_AD6           */
1078 #define SYS_GPD_MFP2_PD8MFP_I2C2_SDA        (0x3UL<<SYS_GPD_MFP2_PD8MFP_Pos)    /*!< GPD_MFP2 PD8 setting for I2C2_SDA          */
1079 #define SYS_GPD_MFP2_PD8MFP_UART2_nRTS      (0x4UL<<SYS_GPD_MFP2_PD8MFP_Pos)    /*!< GPD_MFP2 PD8 setting for UART2_nRTS        */
1080 #define SYS_GPD_MFP2_PD8MFP_UART7_RXD       (0x5UL<<SYS_GPD_MFP2_PD8MFP_Pos)    /*!< GPD_MFP2 PD8 setting for UART7_RXD         */
1081 
1082 /* PD.9 MFP */
1083 #define SYS_GPD_MFP2_PD9MFP_GPIO            (0x0UL<<SYS_GPD_MFP2_PD9MFP_Pos)    /*!< GPD_MFP2 PD9 setting for GPIO              */
1084 #define SYS_GPD_MFP2_PD9MFP_EBI_AD7         (0x2UL<<SYS_GPD_MFP2_PD9MFP_Pos)    /*!< GPD_MFP2 PD9 setting for EBI_AD7           */
1085 #define SYS_GPD_MFP2_PD9MFP_I2C2_SCL        (0x3UL<<SYS_GPD_MFP2_PD9MFP_Pos)    /*!< GPD_MFP2 PD9 setting for I2C2_SCL          */
1086 #define SYS_GPD_MFP2_PD9MFP_UART2_nCTS      (0x4UL<<SYS_GPD_MFP2_PD9MFP_Pos)    /*!< GPD_MFP2 PD9 setting for UART2_nCTS        */
1087 #define SYS_GPD_MFP2_PD9MFP_UART7_TXD       (0x5UL<<SYS_GPD_MFP2_PD9MFP_Pos)    /*!< GPD_MFP2 PD9 setting for UART7_TXD         */
1088 
1089 /* PD.10 MFP */
1090 #define SYS_GPD_MFP2_PD10MFP_GPIO           (0x0UL<<SYS_GPD_MFP2_PD10MFP_Pos)   /*!< GPD_MFP2 PD10 setting for GPIO             */
1091 #define SYS_GPD_MFP2_PD10MFP_EADC0_CH16     (0x1UL<<SYS_GPD_MFP2_PD10MFP_Pos)   /*!< GPD_MFP2 PD10 setting for EADC0_CH16       */
1092 #define SYS_GPD_MFP2_PD10MFP_LPADC0_CH16    (0x1UL<<SYS_GPD_MFP2_PD10MFP_Pos)   /*!< GPD_MFP2 PD10 setting for LPADC0_CH16      */
1093 #define SYS_GPD_MFP2_PD10MFP_EBI_nCS2       (0x2UL<<SYS_GPD_MFP2_PD10MFP_Pos)   /*!< GPD_MFP2 PD10 setting for EBI_nCS2         */
1094 #define SYS_GPD_MFP2_PD10MFP_UART1_RXD      (0x3UL<<SYS_GPD_MFP2_PD10MFP_Pos)   /*!< GPD_MFP2 PD10 setting for UART1_RXD        */
1095 #define SYS_GPD_MFP2_PD10MFP_CANFD0_RXD     (0x4UL<<SYS_GPD_MFP2_PD10MFP_Pos)   /*!< GPD_MFP2 PD10 setting for CANFD0_RXD       */
1096 #define SYS_GPD_MFP2_PD10MFP_EQEI0_B        (0xAUL<<SYS_GPD_MFP2_PD10MFP_Pos)   /*!< GPD_MFP2 PD10 setting for EQEI0_B          */
1097 #define SYS_GPD_MFP2_PD10MFP_INT7           (0xFUL<<SYS_GPD_MFP2_PD10MFP_Pos)   /*!< GPD_MFP2 PD10 setting for INT7             */
1098 
1099 /* PD.11 MFP */
1100 #define SYS_GPD_MFP2_PD11MFP_GPIO           (0x0UL<<SYS_GPD_MFP2_PD11MFP_Pos)   /*!< GPD_MFP2 PD11 setting for GPIO             */
1101 #define SYS_GPD_MFP2_PD11MFP_EADC0_CH17     (0x1UL<<SYS_GPD_MFP2_PD11MFP_Pos)   /*!< GPD_MFP2 PD11 setting for EADC0_CH17       */
1102 #define SYS_GPD_MFP2_PD11MFP_LPADC0_CH17    (0x1UL<<SYS_GPD_MFP2_PD11MFP_Pos)   /*!< GPD_MFP2 PD11 setting for LPADC0_CH17      */
1103 #define SYS_GPD_MFP2_PD11MFP_EBI_nCS1       (0x2UL<<SYS_GPD_MFP2_PD11MFP_Pos)   /*!< GPD_MFP2 PD11 setting for EBI_nCS1         */
1104 #define SYS_GPD_MFP2_PD11MFP_UART1_TXD      (0x3UL<<SYS_GPD_MFP2_PD11MFP_Pos)   /*!< GPD_MFP2 PD11 setting for UART1_TXD        */
1105 #define SYS_GPD_MFP2_PD11MFP_CANFD0_TXD     (0x4UL<<SYS_GPD_MFP2_PD11MFP_Pos)   /*!< GPD_MFP2 PD11 setting for CANFD0_TXD       */
1106 #define SYS_GPD_MFP2_PD11MFP_EQEI0_A        (0xAUL<<SYS_GPD_MFP2_PD11MFP_Pos)   /*!< GPD_MFP2 PD11 setting for EQEI0_A          */
1107 #define SYS_GPD_MFP2_PD11MFP_INT6           (0xFUL<<SYS_GPD_MFP2_PD11MFP_Pos)   /*!< GPD_MFP2 PD11 setting for INT6             */
1108 
1109 /* PD.12 MFP */
1110 #define SYS_GPD_MFP3_PD12MFP_GPIO           (0x0UL<<SYS_GPD_MFP3_PD12MFP_Pos)   /*!< GPD_MFP3 PD12 setting for GPIO             */
1111 #define SYS_GPD_MFP3_PD12MFP_EADC0_CH18     (0x1UL<<SYS_GPD_MFP3_PD12MFP_Pos)   /*!< GPD_MFP3 PD12 setting for EADC0_CH18       */
1112 #define SYS_GPD_MFP3_PD12MFP_LPADC0_CH18    (0x1UL<<SYS_GPD_MFP3_PD12MFP_Pos)   /*!< GPD_MFP3 PD12 setting for LPADC0_CH18      */
1113 #define SYS_GPD_MFP3_PD12MFP_EBI_nCS0       (0x2UL<<SYS_GPD_MFP3_PD12MFP_Pos)   /*!< GPD_MFP3 PD12 setting for EBI_nCS0         */
1114 #define SYS_GPD_MFP3_PD12MFP_CANFD1_RXD     (0x5UL<<SYS_GPD_MFP3_PD12MFP_Pos)   /*!< GPD_MFP3 PD12 setting for CANFD1_RXD       */
1115 #define SYS_GPD_MFP3_PD12MFP_UART2_RXD      (0x7UL<<SYS_GPD_MFP3_PD12MFP_Pos)   /*!< GPD_MFP3 PD12 setting for UART2_RXD        */
1116 #define SYS_GPD_MFP3_PD12MFP_PWM0_CH5       (0x9UL<<SYS_GPD_MFP3_PD12MFP_Pos)   /*!< GPD_MFP3 PD12 setting for PWM0_CH5         */
1117 #define SYS_GPD_MFP3_PD12MFP_EQEI0_INDEX    (0xAUL<<SYS_GPD_MFP3_PD12MFP_Pos)   /*!< GPD_MFP3 PD12 setting for EQEI0_INDEX      */
1118 #define SYS_GPD_MFP3_PD12MFP_CLKO           (0xDUL<<SYS_GPD_MFP3_PD12MFP_Pos)   /*!< GPD_MFP3 PD12 setting for CLKO             */
1119 #define SYS_GPD_MFP3_PD12MFP_EADC0_ST       (0xEUL<<SYS_GPD_MFP3_PD12MFP_Pos)   /*!< GPD_MFP3 PD12 setting for EADC0_ST         */
1120 #define SYS_GPD_MFP3_PD12MFP_LPADC0_ST      (0xEUL<<SYS_GPD_MFP3_PD12MFP_Pos)   /*!< GPD_MFP3 PD12 setting for LPADC0_ST        */
1121 #define SYS_GPD_MFP3_PD12MFP_INT5           (0xFUL<<SYS_GPD_MFP3_PD12MFP_Pos)   /*!< GPD_MFP3 PD12 setting for INT5             */
1122 #define SYS_GPD_MFP3_PD12MFP_TK_SE          (0x10UL<<SYS_GPD_MFP3_PD12MFP_Pos)  /*!< GPD_MFP3 PD12 setting for TK_SE            */
1123 
1124 /* PD.13 MFP */
1125 #define SYS_GPD_MFP3_PD13MFP_GPIO           (0x0UL<<SYS_GPD_MFP3_PD13MFP_Pos)   /*!< GPD_MFP3 PD13 setting for GPIO             */
1126 #define SYS_GPD_MFP3_PD13MFP_EBI_AD10       (0x2UL<<SYS_GPD_MFP3_PD13MFP_Pos)   /*!< GPD_MFP3 PD13 setting for EBI_AD10         */
1127 #define SYS_GPD_MFP3_PD13MFP_SPI0_I2SMCLK   (0x4UL<<SYS_GPD_MFP3_PD13MFP_Pos)   /*!< GPD_MFP3 PD13 setting for SPI0_I2SMCLK     */
1128 #define SYS_GPD_MFP3_PD13MFP_SPI1_I2SMCLK   (0x5UL<<SYS_GPD_MFP3_PD13MFP_Pos)   /*!< GPD_MFP3 PD13 setting for SPI1_I2SMCLK     */
1129 #define SYS_GPD_MFP3_PD13MFP_PWM0_CH0       (0xBUL<<SYS_GPD_MFP3_PD13MFP_Pos)   /*!< GPD_MFP3 PD13 setting for PWM0_CH0         */
1130 #define SYS_GPD_MFP3_PD13MFP_CLKO           (0xEUL<<SYS_GPD_MFP3_PD13MFP_Pos)   /*!< GPD_MFP3 PD13 setting for CLKO             */
1131 #define SYS_GPD_MFP3_PD13MFP_EADC0_ST       (0xFUL<<SYS_GPD_MFP3_PD13MFP_Pos)   /*!< GPD_MFP3 PD13 setting for EADC0_ST         */
1132 #define SYS_GPD_MFP3_PD13MFP_LPADC0_ST      (0xFUL<<SYS_GPD_MFP3_PD13MFP_Pos)   /*!< GPD_MFP3 PD13 setting for LPADC0_ST        */
1133 #define SYS_GPD_MFP3_PD13MFP_TK_SE          (0x10UL<<SYS_GPD_MFP3_PD13MFP_Pos)  /*!< GPD_MFP3 PD13 setting for TK_SE            */
1134 
1135 /* PD.14 MFP */
1136 #define SYS_GPD_MFP3_PD14MFP_GPIO           (0x0UL<<SYS_GPD_MFP3_PD14MFP_Pos)   /*!< GPD_MFP3 PD14 setting for GPIO             */
1137 #define SYS_GPD_MFP3_PD14MFP_EBI_nCS0       (0x2UL<<SYS_GPD_MFP3_PD14MFP_Pos)   /*!< GPD_MFP3 PD14 setting for EBI_nCS0         */
1138 #define SYS_GPD_MFP3_PD14MFP_SPI3_I2SMCLK   (0x3UL<<SYS_GPD_MFP3_PD14MFP_Pos)   /*!< GPD_MFP3 PD14 setting for SPI3_I2SMCLK     */
1139 #define SYS_GPD_MFP3_PD14MFP_SPI0_I2SMCLK   (0x5UL<<SYS_GPD_MFP3_PD14MFP_Pos)   /*!< GPD_MFP3 PD14 setting for SPI0_I2SMCLK     */
1140 #define SYS_GPD_MFP3_PD14MFP_EPWM0_CH4      (0xBUL<<SYS_GPD_MFP3_PD14MFP_Pos)   /*!< GPD_MFP3 PD14 setting for EPWM0_CH4        */
1141 
1142 /* PD.15 MFP */
1143 #define SYS_GPD_MFP3_PD15MFP_GPIO           (0x0UL<<SYS_GPD_MFP3_PD15MFP_Pos)   /*!< GPD_MFP3 PD15 setting for GPIO             */
1144 #define SYS_GPD_MFP3_PD15MFP_EPWM0_CH5      (0xCUL<<SYS_GPD_MFP3_PD15MFP_Pos)   /*!< GPD_MFP3 PD15 setting for EPWM0_CH5        */
1145 #define SYS_GPD_MFP3_PD15MFP_ACMP2_WLAT     (0xDUL<<SYS_GPD_MFP3_PD15MFP_Pos)   /*!< GPD_MFP3 PD15 setting for ACMP2_WLAT       */
1146 #define SYS_GPD_MFP3_PD15MFP_TM3            (0xEUL<<SYS_GPD_MFP3_PD15MFP_Pos)   /*!< GPD_MFP3 PD15 setting for TM3              */
1147 #define SYS_GPD_MFP3_PD15MFP_INT1           (0xFUL<<SYS_GPD_MFP3_PD15MFP_Pos)   /*!< GPD_MFP3 PD15 setting for INT1             */
1148 #define SYS_GPD_MFP3_PD15MFP_TK_TK2         (0x10UL<<SYS_GPD_MFP3_PD15MFP_Pos)  /*!< GPD_MFP3 PD15 setting for TK_TK2           */
1149 #define SYS_GPD_MFP3_PD15MFP_UTCPD0_FRSTX2  (0x11UL<<SYS_GPD_MFP3_PD15MFP_Pos)  /*!< GPD_MFP3 PD15 setting for UTCPD0_FRSTX2    */
1150 #define SYS_GPD_MFP3_PD15MFP_UTCPD0_DISCHG  (0x12UL<<SYS_GPD_MFP3_PD15MFP_Pos)  /*!< GPD_MFP3 PD15 setting for UTCPD0_DISCHG    */
1151 
1152 /* PE.0 MFP */
1153 #define SYS_GPE_MFP0_PE0MFP_GPIO            (0x0UL<<SYS_GPE_MFP0_PE0MFP_Pos)    /*!< GPE_MFP0 PE0 setting for GPIO              */
1154 #define SYS_GPE_MFP0_PE0MFP_EBI_AD11        (0x2UL<<SYS_GPE_MFP0_PE0MFP_Pos)    /*!< GPE_MFP0 PE0 setting for EBI_AD11          */
1155 #define SYS_GPE_MFP0_PE0MFP_QSPI0_MOSI0     (0x3UL<<SYS_GPE_MFP0_PE0MFP_Pos)    /*!< GPE_MFP0 PE0 setting for QSPI0_MOSI0       */
1156 #define SYS_GPE_MFP0_PE0MFP_SPI1_MOSI       (0x6UL<<SYS_GPE_MFP0_PE0MFP_Pos)    /*!< GPE_MFP0 PE0 setting for SPI1_MOSI         */
1157 #define SYS_GPE_MFP0_PE0MFP_UART3_RXD       (0x7UL<<SYS_GPE_MFP0_PE0MFP_Pos)    /*!< GPE_MFP0 PE0 setting for UART3_RXD         */
1158 #define SYS_GPE_MFP0_PE0MFP_I2C1_SDA        (0x8UL<<SYS_GPE_MFP0_PE0MFP_Pos)    /*!< GPE_MFP0 PE0 setting for I2C1_SDA          */
1159 #define SYS_GPE_MFP0_PE0MFP_UART4_nRTS      (0x9UL<<SYS_GPE_MFP0_PE0MFP_Pos)    /*!< GPE_MFP0 PE0 setting for UART4_nRTS        */
1160 #define SYS_GPE_MFP0_PE0MFP_LPIO0           (0x17UL<<SYS_GPE_MFP0_PE0MFP_Pos)   /*!< GPE_MFP0 PE0 setting for LPIO0             */
1161 
1162 /* PE.1 MFP */
1163 #define SYS_GPE_MFP0_PE1MFP_GPIO            (0x0UL<<SYS_GPE_MFP0_PE1MFP_Pos)    /*!< GPE_MFP0 PE1 setting for GPIO              */
1164 #define SYS_GPE_MFP0_PE1MFP_EBI_AD10        (0x2UL<<SYS_GPE_MFP0_PE1MFP_Pos)    /*!< GPE_MFP0 PE1 setting for EBI_AD10          */
1165 #define SYS_GPE_MFP0_PE1MFP_QSPI0_MISO0     (0x3UL<<SYS_GPE_MFP0_PE1MFP_Pos)    /*!< GPE_MFP0 PE1 setting for QSPI0_MISO0       */
1166 #define SYS_GPE_MFP0_PE1MFP_SPI1_MISO       (0x6UL<<SYS_GPE_MFP0_PE1MFP_Pos)    /*!< GPE_MFP0 PE1 setting for SPI1_MISO         */
1167 #define SYS_GPE_MFP0_PE1MFP_UART3_TXD       (0x7UL<<SYS_GPE_MFP0_PE1MFP_Pos)    /*!< GPE_MFP0 PE1 setting for UART3_TXD         */
1168 #define SYS_GPE_MFP0_PE1MFP_I2C1_SCL        (0x8UL<<SYS_GPE_MFP0_PE1MFP_Pos)    /*!< GPE_MFP0 PE1 setting for I2C1_SCL          */
1169 #define SYS_GPE_MFP0_PE1MFP_UART4_nCTS      (0x9UL<<SYS_GPE_MFP0_PE1MFP_Pos)    /*!< GPE_MFP0 PE1 setting for UART4_nCTS        */
1170 #define SYS_GPE_MFP0_PE1MFP_LPIO1           (0x17UL<<SYS_GPE_MFP0_PE1MFP_Pos)   /*!< GPE_MFP0 PE1 setting for LPIO1             */
1171 
1172 /* PE.2 MFP */
1173 #define SYS_GPE_MFP0_PE2MFP_GPIO            (0x0UL<<SYS_GPE_MFP0_PE2MFP_Pos)    /*!< GPE_MFP0 PE2 setting for GPIO              */
1174 #define SYS_GPE_MFP0_PE2MFP_EBI_ALE         (0x2UL<<SYS_GPE_MFP0_PE2MFP_Pos)    /*!< GPE_MFP0 PE2 setting for EBI_ALE           */
1175 #define SYS_GPE_MFP0_PE2MFP_SPI3_MOSI       (0x5UL<<SYS_GPE_MFP0_PE2MFP_Pos)    /*!< GPE_MFP0 PE2 setting for SPI3_MOSI         */
1176 #define SYS_GPE_MFP0_PE2MFP_USCI0_CLK       (0x7UL<<SYS_GPE_MFP0_PE2MFP_Pos)    /*!< GPE_MFP0 PE2 setting for USCI0_CLK         */
1177 #define SYS_GPE_MFP0_PE2MFP_UART6_nCTS      (0x8UL<<SYS_GPE_MFP0_PE2MFP_Pos)    /*!< GPE_MFP0 PE2 setting for UART6_nCTS        */
1178 #define SYS_GPE_MFP0_PE2MFP_UART7_RXD       (0x9UL<<SYS_GPE_MFP0_PE2MFP_Pos)    /*!< GPE_MFP0 PE2 setting for UART7_RXD         */
1179 #define SYS_GPE_MFP0_PE2MFP_EQEI0_B         (0xBUL<<SYS_GPE_MFP0_PE2MFP_Pos)    /*!< GPE_MFP0 PE2 setting for EQEI0_B           */
1180 #define SYS_GPE_MFP0_PE2MFP_EPWM0_CH5       (0xCUL<<SYS_GPE_MFP0_PE2MFP_Pos)    /*!< GPE_MFP0 PE2 setting for EPWM0_CH5         */
1181 #define SYS_GPE_MFP0_PE2MFP_PWM0_CH0        (0xDUL<<SYS_GPE_MFP0_PE2MFP_Pos)    /*!< GPE_MFP0 PE2 setting for PWM0_CH0          */
1182 
1183 /* PE.3 MFP */
1184 #define SYS_GPE_MFP0_PE3MFP_GPIO            (0x0UL<<SYS_GPE_MFP0_PE3MFP_Pos)    /*!< GPE_MFP0 PE3 setting for GPIO              */
1185 #define SYS_GPE_MFP0_PE3MFP_EBI_MCLK        (0x2UL<<SYS_GPE_MFP0_PE3MFP_Pos)    /*!< GPE_MFP0 PE3 setting for EBI_MCLK          */
1186 #define SYS_GPE_MFP0_PE3MFP_SPI3_MISO       (0x5UL<<SYS_GPE_MFP0_PE3MFP_Pos)    /*!< GPE_MFP0 PE3 setting for SPI3_MISO         */
1187 #define SYS_GPE_MFP0_PE3MFP_USCI0_DAT0      (0x7UL<<SYS_GPE_MFP0_PE3MFP_Pos)    /*!< GPE_MFP0 PE3 setting for USCI0_DAT0        */
1188 #define SYS_GPE_MFP0_PE3MFP_UART6_nRTS      (0x8UL<<SYS_GPE_MFP0_PE3MFP_Pos)    /*!< GPE_MFP0 PE3 setting for UART6_nRTS        */
1189 #define SYS_GPE_MFP0_PE3MFP_UART7_TXD       (0x9UL<<SYS_GPE_MFP0_PE3MFP_Pos)    /*!< GPE_MFP0 PE3 setting for UART7_TXD         */
1190 #define SYS_GPE_MFP0_PE3MFP_EQEI0_A         (0xBUL<<SYS_GPE_MFP0_PE3MFP_Pos)    /*!< GPE_MFP0 PE3 setting for EQEI0_A           */
1191 #define SYS_GPE_MFP0_PE3MFP_EPWM0_CH4       (0xCUL<<SYS_GPE_MFP0_PE3MFP_Pos)    /*!< GPE_MFP0 PE3 setting for EPWM0_CH4         */
1192 #define SYS_GPE_MFP0_PE3MFP_PWM0_CH1        (0xDUL<<SYS_GPE_MFP0_PE3MFP_Pos)    /*!< GPE_MFP0 PE3 setting for PWM0_CH1          */
1193 
1194 /* PE.4 MFP */
1195 #define SYS_GPE_MFP1_PE4MFP_GPIO            (0x0UL<<SYS_GPE_MFP1_PE4MFP_Pos)    /*!< GPE_MFP1 PE4 setting for GPIO              */
1196 #define SYS_GPE_MFP1_PE4MFP_EBI_nWR         (0x2UL<<SYS_GPE_MFP1_PE4MFP_Pos)    /*!< GPE_MFP1 PE4 setting for EBI_nWR           */
1197 #define SYS_GPE_MFP1_PE4MFP_SPI3_CLK        (0x5UL<<SYS_GPE_MFP1_PE4MFP_Pos)    /*!< GPE_MFP1 PE4 setting for SPI3_CLK          */
1198 #define SYS_GPE_MFP1_PE4MFP_USCI0_DAT1      (0x7UL<<SYS_GPE_MFP1_PE4MFP_Pos)    /*!< GPE_MFP1 PE4 setting for USCI0_DAT1        */
1199 #define SYS_GPE_MFP1_PE4MFP_UART6_RXD       (0x8UL<<SYS_GPE_MFP1_PE4MFP_Pos)    /*!< GPE_MFP1 PE4 setting for UART6_RXD         */
1200 #define SYS_GPE_MFP1_PE4MFP_UART7_nCTS      (0x9UL<<SYS_GPE_MFP1_PE4MFP_Pos)    /*!< GPE_MFP1 PE4 setting for UART7_nCTS        */
1201 #define SYS_GPE_MFP1_PE4MFP_EQEI0_INDEX     (0xBUL<<SYS_GPE_MFP1_PE4MFP_Pos)    /*!< GPE_MFP1 PE4 setting for EQEI0_INDEX       */
1202 #define SYS_GPE_MFP1_PE4MFP_EPWM0_CH3       (0xCUL<<SYS_GPE_MFP1_PE4MFP_Pos)    /*!< GPE_MFP1 PE4 setting for EPWM0_CH3         */
1203 #define SYS_GPE_MFP1_PE4MFP_PWM0_CH2        (0xDUL<<SYS_GPE_MFP1_PE4MFP_Pos)    /*!< GPE_MFP1 PE4 setting for PWM0_CH2          */
1204 
1205 /* PE.5 MFP */
1206 #define SYS_GPE_MFP1_PE5MFP_GPIO            (0x0UL<<SYS_GPE_MFP1_PE5MFP_Pos)    /*!< GPE_MFP1 PE5 setting for GPIO              */
1207 #define SYS_GPE_MFP1_PE5MFP_EBI_nRD         (0x2UL<<SYS_GPE_MFP1_PE5MFP_Pos)    /*!< GPE_MFP1 PE5 setting for EBI_nRD           */
1208 #define SYS_GPE_MFP1_PE5MFP_SPI3_SS         (0x5UL<<SYS_GPE_MFP1_PE5MFP_Pos)    /*!< GPE_MFP1 PE5 setting for SPI3_SS           */
1209 #define SYS_GPE_MFP1_PE5MFP_USCI0_CTL1      (0x7UL<<SYS_GPE_MFP1_PE5MFP_Pos)    /*!< GPE_MFP1 PE5 setting for USCI0_CTL1        */
1210 #define SYS_GPE_MFP1_PE5MFP_UART6_TXD       (0x8UL<<SYS_GPE_MFP1_PE5MFP_Pos)    /*!< GPE_MFP1 PE5 setting for UART6_TXD         */
1211 #define SYS_GPE_MFP1_PE5MFP_UART7_nRTS      (0x9UL<<SYS_GPE_MFP1_PE5MFP_Pos)    /*!< GPE_MFP1 PE5 setting for UART7_nRTS        */
1212 #define SYS_GPE_MFP1_PE5MFP_EQEI1_B         (0xBUL<<SYS_GPE_MFP1_PE5MFP_Pos)    /*!< GPE_MFP1 PE5 setting for EQEI1_B           */
1213 #define SYS_GPE_MFP1_PE5MFP_EPWM0_CH2       (0xCUL<<SYS_GPE_MFP1_PE5MFP_Pos)    /*!< GPE_MFP1 PE5 setting for EPWM0_CH2         */
1214 #define SYS_GPE_MFP1_PE5MFP_PWM0_CH3        (0xDUL<<SYS_GPE_MFP1_PE5MFP_Pos)    /*!< GPE_MFP1 PE5 setting for PWM0_CH3          */
1215 
1216 /* PE.6 MFP */
1217 #define SYS_GPE_MFP1_PE6MFP_GPIO            (0x0UL<<SYS_GPE_MFP1_PE6MFP_Pos)    /*!< GPE_MFP1 PE6 setting for GPIO              */
1218 #define SYS_GPE_MFP1_PE6MFP_SPI3_I2SMCLK    (0x5UL<<SYS_GPE_MFP1_PE6MFP_Pos)    /*!< GPE_MFP1 PE6 setting for SPI3_I2SMCLK      */
1219 #define SYS_GPE_MFP1_PE6MFP_USCI0_CTL0      (0x7UL<<SYS_GPE_MFP1_PE6MFP_Pos)    /*!< GPE_MFP1 PE6 setting for USCI0_CTL0        */
1220 #define SYS_GPE_MFP1_PE6MFP_UART5_RXD       (0x8UL<<SYS_GPE_MFP1_PE6MFP_Pos)    /*!< GPE_MFP1 PE6 setting for UART5_RXD         */
1221 #define SYS_GPE_MFP1_PE6MFP_CANFD1_RXD      (0x9UL<<SYS_GPE_MFP1_PE6MFP_Pos)    /*!< GPE_MFP1 PE6 setting for CANFD1_RXD        */
1222 #define SYS_GPE_MFP1_PE6MFP_EQEI1_A         (0xBUL<<SYS_GPE_MFP1_PE6MFP_Pos)    /*!< GPE_MFP1 PE6 setting for EQEI1_A           */
1223 #define SYS_GPE_MFP1_PE6MFP_EPWM0_CH1       (0xCUL<<SYS_GPE_MFP1_PE6MFP_Pos)    /*!< GPE_MFP1 PE6 setting for EPWM0_CH1         */
1224 #define SYS_GPE_MFP1_PE6MFP_PWM0_CH4        (0xDUL<<SYS_GPE_MFP1_PE6MFP_Pos)    /*!< GPE_MFP1 PE6 setting for PWM0_CH4          */
1225 
1226 /* PE.7 MFP */
1227 #define SYS_GPE_MFP1_PE7MFP_GPIO            (0x0UL<<SYS_GPE_MFP1_PE7MFP_Pos)    /*!< GPE_MFP1 PE7 setting for GPIO              */
1228 #define SYS_GPE_MFP1_PE7MFP_UART5_TXD       (0x8UL<<SYS_GPE_MFP1_PE7MFP_Pos)    /*!< GPE_MFP1 PE7 setting for UART5_TXD         */
1229 #define SYS_GPE_MFP1_PE7MFP_CANFD1_TXD      (0x9UL<<SYS_GPE_MFP1_PE7MFP_Pos)    /*!< GPE_MFP1 PE7 setting for CANFD1_TXD        */
1230 #define SYS_GPE_MFP1_PE7MFP_EQEI1_INDEX     (0xBUL<<SYS_GPE_MFP1_PE7MFP_Pos)    /*!< GPE_MFP1 PE7 setting for EQEI1_INDEX       */
1231 #define SYS_GPE_MFP1_PE7MFP_EPWM0_CH0       (0xCUL<<SYS_GPE_MFP1_PE7MFP_Pos)    /*!< GPE_MFP1 PE7 setting for EPWM0_CH0         */
1232 #define SYS_GPE_MFP1_PE7MFP_PWM0_CH5        (0xDUL<<SYS_GPE_MFP1_PE7MFP_Pos)    /*!< GPE_MFP1 PE7 setting for PWM0_CH5          */
1233 
1234 /* PE.8 MFP */
1235 #define SYS_GPE_MFP2_PE8MFP_GPIO            (0x0UL<<SYS_GPE_MFP2_PE8MFP_Pos)    /*!< GPE_MFP2 PE8 setting for GPIO              */
1236 #define SYS_GPE_MFP2_PE8MFP_EBI_ADR10       (0x2UL<<SYS_GPE_MFP2_PE8MFP_Pos)    /*!< GPE_MFP2 PE8 setting for EBI_ADR10         */
1237 #define SYS_GPE_MFP2_PE8MFP_SPI2_CLK        (0x5UL<<SYS_GPE_MFP2_PE8MFP_Pos)    /*!< GPE_MFP2 PE8 setting for SPI2_CLK          */
1238 #define SYS_GPE_MFP2_PE8MFP_USCI1_CTL1      (0x6UL<<SYS_GPE_MFP2_PE8MFP_Pos)    /*!< GPE_MFP2 PE8 setting for USCI1_CTL1        */
1239 #define SYS_GPE_MFP2_PE8MFP_UART2_TXD       (0x7UL<<SYS_GPE_MFP2_PE8MFP_Pos)    /*!< GPE_MFP2 PE8 setting for UART2_TXD         */
1240 #define SYS_GPE_MFP2_PE8MFP_PWM0_BRAKE0     (0x9UL<<SYS_GPE_MFP2_PE8MFP_Pos)    /*!< GPE_MFP2 PE8 setting for PWM0_BRAKE0       */
1241 #define SYS_GPE_MFP2_PE8MFP_EPWM0_CH0       (0xAUL<<SYS_GPE_MFP2_PE8MFP_Pos)    /*!< GPE_MFP2 PE8 setting for EPWM0_CH0         */
1242 #define SYS_GPE_MFP2_PE8MFP_EPWM0_BRAKE0    (0xBUL<<SYS_GPE_MFP2_PE8MFP_Pos)    /*!< GPE_MFP2 PE8 setting for EPWM0_BRAKE0      */
1243 #define SYS_GPE_MFP2_PE8MFP_ECAP0_IC0       (0xCUL<<SYS_GPE_MFP2_PE8MFP_Pos)    /*!< GPE_MFP2 PE8 setting for ECAP0_IC0         */
1244 
1245 /* PE.9 MFP */
1246 #define SYS_GPE_MFP2_PE9MFP_GPIO            (0x0UL<<SYS_GPE_MFP2_PE9MFP_Pos)    /*!< GPE_MFP2 PE9 setting for GPIO              */
1247 #define SYS_GPE_MFP2_PE9MFP_EBI_ADR11       (0x2UL<<SYS_GPE_MFP2_PE9MFP_Pos)    /*!< GPE_MFP2 PE9 setting for EBI_ADR11         */
1248 #define SYS_GPE_MFP2_PE9MFP_SPI2_MISO       (0x5UL<<SYS_GPE_MFP2_PE9MFP_Pos)    /*!< GPE_MFP2 PE9 setting for SPI2_MISO         */
1249 #define SYS_GPE_MFP2_PE9MFP_USCI1_CTL0      (0x6UL<<SYS_GPE_MFP2_PE9MFP_Pos)    /*!< GPE_MFP2 PE9 setting for USCI1_CTL0        */
1250 #define SYS_GPE_MFP2_PE9MFP_UART2_RXD       (0x7UL<<SYS_GPE_MFP2_PE9MFP_Pos)    /*!< GPE_MFP2 PE9 setting for UART2_RXD         */
1251 #define SYS_GPE_MFP2_PE9MFP_PWM0_BRAKE1     (0x9UL<<SYS_GPE_MFP2_PE9MFP_Pos)    /*!< GPE_MFP2 PE9 setting for PWM0_BRAKE1       */
1252 #define SYS_GPE_MFP2_PE9MFP_EPWM0_CH1       (0xAUL<<SYS_GPE_MFP2_PE9MFP_Pos)    /*!< GPE_MFP2 PE9 setting for EPWM0_CH1         */
1253 #define SYS_GPE_MFP2_PE9MFP_EPWM0_BRAKE1    (0xBUL<<SYS_GPE_MFP2_PE9MFP_Pos)    /*!< GPE_MFP2 PE9 setting for EPWM0_BRAKE1      */
1254 #define SYS_GPE_MFP2_PE9MFP_ECAP0_IC1       (0xCUL<<SYS_GPE_MFP2_PE9MFP_Pos)    /*!< GPE_MFP2 PE9 setting for ECAP0_IC1         */
1255 
1256 /* PE.10 MFP */
1257 #define SYS_GPE_MFP2_PE10MFP_GPIO           (0x0UL<<SYS_GPE_MFP2_PE10MFP_Pos)   /*!< GPE_MFP2 PE10 setting for GPIO             */
1258 #define SYS_GPE_MFP2_PE10MFP_EBI_ADR12      (0x2UL<<SYS_GPE_MFP2_PE10MFP_Pos)   /*!< GPE_MFP2 PE10 setting for EBI_ADR12        */
1259 #define SYS_GPE_MFP2_PE10MFP_SPI2_MOSI      (0x5UL<<SYS_GPE_MFP2_PE10MFP_Pos)   /*!< GPE_MFP2 PE10 setting for SPI2_MOSI        */
1260 #define SYS_GPE_MFP2_PE10MFP_USCI1_DAT0     (0x6UL<<SYS_GPE_MFP2_PE10MFP_Pos)   /*!< GPE_MFP2 PE10 setting for USCI1_DAT0       */
1261 #define SYS_GPE_MFP2_PE10MFP_UART3_TXD      (0x7UL<<SYS_GPE_MFP2_PE10MFP_Pos)   /*!< GPE_MFP2 PE10 setting for UART3_TXD        */
1262 #define SYS_GPE_MFP2_PE10MFP_PWM1_BRAKE0    (0x9UL<<SYS_GPE_MFP2_PE10MFP_Pos)   /*!< GPE_MFP2 PE10 setting for PWM1_BRAKE0      */
1263 #define SYS_GPE_MFP2_PE10MFP_EPWM0_CH2      (0xAUL<<SYS_GPE_MFP2_PE10MFP_Pos)   /*!< GPE_MFP2 PE10 setting for EPWM0_CH2        */
1264 #define SYS_GPE_MFP2_PE10MFP_EPWM1_BRAKE0   (0xBUL<<SYS_GPE_MFP2_PE10MFP_Pos)   /*!< GPE_MFP2 PE10 setting for EPWM1_BRAKE0     */
1265 #define SYS_GPE_MFP2_PE10MFP_ECAP0_IC2      (0xCUL<<SYS_GPE_MFP2_PE10MFP_Pos)   /*!< GPE_MFP2 PE10 setting for ECAP0_IC2        */
1266 
1267 /* PE.11 MFP */
1268 #define SYS_GPE_MFP2_PE11MFP_GPIO           (0x0UL<<SYS_GPE_MFP2_PE11MFP_Pos)   /*!< GPE_MFP2 PE11 setting for GPIO             */
1269 #define SYS_GPE_MFP2_PE11MFP_EBI_ADR13      (0x2UL<<SYS_GPE_MFP2_PE11MFP_Pos)   /*!< GPE_MFP2 PE11 setting for EBI_ADR13        */
1270 #define SYS_GPE_MFP2_PE11MFP_SPI2_SS        (0x5UL<<SYS_GPE_MFP2_PE11MFP_Pos)   /*!< GPE_MFP2 PE11 setting for SPI2_SS          */
1271 #define SYS_GPE_MFP2_PE11MFP_USCI1_DAT1     (0x6UL<<SYS_GPE_MFP2_PE11MFP_Pos)   /*!< GPE_MFP2 PE11 setting for USCI1_DAT1       */
1272 #define SYS_GPE_MFP2_PE11MFP_UART3_RXD      (0x7UL<<SYS_GPE_MFP2_PE11MFP_Pos)   /*!< GPE_MFP2 PE11 setting for UART3_RXD        */
1273 #define SYS_GPE_MFP2_PE11MFP_UART1_nCTS     (0x8UL<<SYS_GPE_MFP2_PE11MFP_Pos)   /*!< GPE_MFP2 PE11 setting for UART1_nCTS       */
1274 #define SYS_GPE_MFP2_PE11MFP_PWM1_BRAKE1    (0x9UL<<SYS_GPE_MFP2_PE11MFP_Pos)   /*!< GPE_MFP2 PE11 setting for PWM1_BRAKE1      */
1275 #define SYS_GPE_MFP2_PE11MFP_EPWM0_CH3      (0xAUL<<SYS_GPE_MFP2_PE11MFP_Pos)   /*!< GPE_MFP2 PE11 setting for EPWM0_CH3        */
1276 #define SYS_GPE_MFP2_PE11MFP_EPWM1_BRAKE1   (0xBUL<<SYS_GPE_MFP2_PE11MFP_Pos)   /*!< GPE_MFP2 PE11 setting for EPWM1_BRAKE1     */
1277 #define SYS_GPE_MFP2_PE11MFP_ECAP1_IC2      (0xDUL<<SYS_GPE_MFP2_PE11MFP_Pos)   /*!< GPE_MFP2 PE11 setting for ECAP1_IC2        */
1278 
1279 /* PE.12 MFP */
1280 #define SYS_GPE_MFP3_PE12MFP_GPIO           (0x0UL<<SYS_GPE_MFP3_PE12MFP_Pos)   /*!< GPE_MFP3 PE12 setting for GPIO             */
1281 #define SYS_GPE_MFP3_PE12MFP_EBI_ADR14      (0x2UL<<SYS_GPE_MFP3_PE12MFP_Pos)   /*!< GPE_MFP3 PE12 setting for EBI_ADR14        */
1282 #define SYS_GPE_MFP3_PE12MFP_SPI2_I2SMCLK   (0x5UL<<SYS_GPE_MFP3_PE12MFP_Pos)   /*!< GPE_MFP3 PE12 setting for SPI2_I2SMCLK     */
1283 #define SYS_GPE_MFP3_PE12MFP_USCI1_CLK      (0x6UL<<SYS_GPE_MFP3_PE12MFP_Pos)   /*!< GPE_MFP3 PE12 setting for USCI1_CLK        */
1284 #define SYS_GPE_MFP3_PE12MFP_UART1_nRTS     (0x8UL<<SYS_GPE_MFP3_PE12MFP_Pos)   /*!< GPE_MFP3 PE12 setting for UART1_nRTS       */
1285 #define SYS_GPE_MFP3_PE12MFP_EPWM0_CH4      (0xAUL<<SYS_GPE_MFP3_PE12MFP_Pos)   /*!< GPE_MFP3 PE12 setting for EPWM0_CH4        */
1286 #define SYS_GPE_MFP3_PE12MFP_ECAP1_IC1      (0xDUL<<SYS_GPE_MFP3_PE12MFP_Pos)   /*!< GPE_MFP3 PE12 setting for ECAP1_IC1        */
1287 
1288 /* PE.13 MFP */
1289 #define SYS_GPE_MFP3_PE13MFP_GPIO           (0x0UL<<SYS_GPE_MFP3_PE13MFP_Pos)   /*!< GPE_MFP3 PE13 setting for GPIO             */
1290 #define SYS_GPE_MFP3_PE13MFP_EBI_ADR15      (0x2UL<<SYS_GPE_MFP3_PE13MFP_Pos)   /*!< GPE_MFP3 PE13 setting for EBI_ADR15        */
1291 #define SYS_GPE_MFP3_PE13MFP_I2C0_SCL       (0x4UL<<SYS_GPE_MFP3_PE13MFP_Pos)   /*!< GPE_MFP3 PE13 setting for I2C0_SCL         */
1292 #define SYS_GPE_MFP3_PE13MFP_UART4_nRTS     (0x5UL<<SYS_GPE_MFP3_PE13MFP_Pos)   /*!< GPE_MFP3 PE13 setting for UART4_nRTS       */
1293 #define SYS_GPE_MFP3_PE13MFP_UART1_TXD      (0x8UL<<SYS_GPE_MFP3_PE13MFP_Pos)   /*!< GPE_MFP3 PE13 setting for UART1_TXD        */
1294 #define SYS_GPE_MFP3_PE13MFP_EPWM0_CH5      (0xAUL<<SYS_GPE_MFP3_PE13MFP_Pos)   /*!< GPE_MFP3 PE13 setting for EPWM0_CH5        */
1295 #define SYS_GPE_MFP3_PE13MFP_EPWM1_CH0      (0xBUL<<SYS_GPE_MFP3_PE13MFP_Pos)   /*!< GPE_MFP3 PE13 setting for EPWM1_CH0        */
1296 #define SYS_GPE_MFP3_PE13MFP_PWM1_CH5       (0xCUL<<SYS_GPE_MFP3_PE13MFP_Pos)   /*!< GPE_MFP3 PE13 setting for PWM1_CH5         */
1297 #define SYS_GPE_MFP3_PE13MFP_ECAP1_IC0      (0xDUL<<SYS_GPE_MFP3_PE13MFP_Pos)   /*!< GPE_MFP3 PE13 setting for ECAP1_IC0        */
1298 #define SYS_GPE_MFP3_PE13MFP_LPI2C0_SCL     (0x16UL<<SYS_GPE_MFP3_PE13MFP_Pos)  /*!< GPE_MFP3 PE13 setting for LPI2C0_SCL       */
1299 
1300 /* PE.14 MFP */
1301 #define SYS_GPE_MFP3_PE14MFP_GPIO           (0x0UL<<SYS_GPE_MFP3_PE14MFP_Pos)   /*!< GPE_MFP3 PE14 setting for GPIO             */
1302 #define SYS_GPE_MFP3_PE14MFP_EBI_AD8        (0x2UL<<SYS_GPE_MFP3_PE14MFP_Pos)   /*!< GPE_MFP3 PE14 setting for EBI_AD8          */
1303 #define SYS_GPE_MFP3_PE14MFP_UART2_TXD      (0x3UL<<SYS_GPE_MFP3_PE14MFP_Pos)   /*!< GPE_MFP3 PE14 setting for UART2_TXD        */
1304 #define SYS_GPE_MFP3_PE14MFP_CANFD0_TXD     (0x4UL<<SYS_GPE_MFP3_PE14MFP_Pos)   /*!< GPE_MFP3 PE14 setting for CANFD0_TXD       */
1305 #define SYS_GPE_MFP3_PE14MFP_UART6_TXD      (0x6UL<<SYS_GPE_MFP3_PE14MFP_Pos)   /*!< GPE_MFP3 PE14 setting for UART6_TXD        */
1306 #define SYS_GPE_MFP3_PE14MFP_EPWM0_CH1      (0xCUL<<SYS_GPE_MFP3_PE14MFP_Pos)   /*!< GPE_MFP3 PE14 setting for EPWM0_CH1        */
1307 #define SYS_GPE_MFP3_PE14MFP_TM2            (0xDUL<<SYS_GPE_MFP3_PE14MFP_Pos)   /*!< GPE_MFP3 PE14 setting for TM2              */
1308 #define SYS_GPE_MFP3_PE14MFP_CLKO           (0xEUL<<SYS_GPE_MFP3_PE14MFP_Pos)   /*!< GPE_MFP3 PE14 setting for CLKO             */
1309 #define SYS_GPE_MFP3_PE14MFP_INT4           (0xFUL<<SYS_GPE_MFP3_PE14MFP_Pos)   /*!< GPE_MFP3 PE14 setting for INT4             */
1310 #define SYS_GPE_MFP3_PE14MFP_TK_TK9         (0x10UL<<SYS_GPE_MFP3_PE14MFP_Pos)  /*!< GPE_MFP3 PE14 setting for TK_TK9           */
1311 
1312 /* PE.15 MFP */
1313 #define SYS_GPE_MFP3_PE15MFP_GPIO           (0x0UL<<SYS_GPE_MFP3_PE15MFP_Pos)   /*!< GPE_MFP3 PE15 setting for GPIO             */
1314 #define SYS_GPE_MFP3_PE15MFP_EBI_AD9        (0x2UL<<SYS_GPE_MFP3_PE15MFP_Pos)   /*!< GPE_MFP3 PE15 setting for EBI_AD9          */
1315 #define SYS_GPE_MFP3_PE15MFP_UART2_RXD      (0x3UL<<SYS_GPE_MFP3_PE15MFP_Pos)   /*!< GPE_MFP3 PE15 setting for UART2_RXD        */
1316 #define SYS_GPE_MFP3_PE15MFP_CANFD0_RXD     (0x4UL<<SYS_GPE_MFP3_PE15MFP_Pos)   /*!< GPE_MFP3 PE15 setting for CANFD0_RXD       */
1317 #define SYS_GPE_MFP3_PE15MFP_UART6_RXD      (0x6UL<<SYS_GPE_MFP3_PE15MFP_Pos)   /*!< GPE_MFP3 PE15 setting for UART6_RXD        */
1318 
1319 /* PF.0 MFP */
1320 #define SYS_GPF_MFP0_PF0MFP_GPIO            (0x0UL<<SYS_GPF_MFP0_PF0MFP_Pos)    /*!< GPF_MFP0 PF0 setting for GPIO              */
1321 #define SYS_GPF_MFP0_PF0MFP_UART1_TXD       (0x2UL<<SYS_GPF_MFP0_PF0MFP_Pos)    /*!< GPF_MFP0 PF0 setting for UART1_TXD         */
1322 #define SYS_GPF_MFP0_PF0MFP_I2C1_SCL        (0x3UL<<SYS_GPF_MFP0_PF0MFP_Pos)    /*!< GPF_MFP0 PF0 setting for I2C1_SCL          */
1323 #define SYS_GPF_MFP0_PF0MFP_UART0_TXD       (0x4UL<<SYS_GPF_MFP0_PF0MFP_Pos)    /*!< GPF_MFP0 PF0 setting for UART0_TXD         */
1324 #define SYS_GPF_MFP0_PF0MFP_EPWM1_CH4       (0xBUL<<SYS_GPF_MFP0_PF0MFP_Pos)    /*!< GPF_MFP0 PF0 setting for EPWM1_CH4         */
1325 #define SYS_GPF_MFP0_PF0MFP_PWM1_CH0        (0xCUL<<SYS_GPF_MFP0_PF0MFP_Pos)    /*!< GPF_MFP0 PF0 setting for PWM1_CH0          */
1326 #define SYS_GPF_MFP0_PF0MFP_ICE_DAT         (0xEUL<<SYS_GPF_MFP0_PF0MFP_Pos)    /*!< GPF_MFP0 PF0 setting for ICE_DAT           */
1327 #define SYS_GPF_MFP0_PF0MFP_UTCPD0_FRSTX2   (0x11UL<<SYS_GPF_MFP0_PF0MFP_Pos)   /*!< GPF_MFP0 PF0 setting for UTCPD0_FRSTX2     */
1328 #define SYS_GPF_MFP0_PF0MFP_UTCPD0_DISCHG   (0x12UL<<SYS_GPF_MFP0_PF0MFP_Pos)   /*!< GPF_MFP0 PF0 setting for UTCPD0_DISCHG     */
1329 #define SYS_GPF_MFP0_PF0MFP_LPUART0_TXD     (0x15UL<<SYS_GPF_MFP0_PF0MFP_Pos)   /*!< GPF_MFP0 PF0 setting for LPUART0_TXD       */
1330 #define SYS_GPF_MFP0_PF0MFP_LPIO2           (0x17UL<<SYS_GPF_MFP0_PF0MFP_Pos)   /*!< GPF_MFP0 PF0 setting for LPIO2             */
1331 
1332 /* PF.1 MFP */
1333 #define SYS_GPF_MFP0_PF1MFP_GPIO            (0x0UL<<SYS_GPF_MFP0_PF1MFP_Pos)    /*!< GPF_MFP0 PF1 setting for GPIO              */
1334 #define SYS_GPF_MFP0_PF1MFP_UART1_RXD       (0x2UL<<SYS_GPF_MFP0_PF1MFP_Pos)    /*!< GPF_MFP0 PF1 setting for UART1_RXD         */
1335 #define SYS_GPF_MFP0_PF1MFP_I2C1_SDA        (0x3UL<<SYS_GPF_MFP0_PF1MFP_Pos)    /*!< GPF_MFP0 PF1 setting for I2C1_SDA          */
1336 #define SYS_GPF_MFP0_PF1MFP_UART0_RXD       (0x4UL<<SYS_GPF_MFP0_PF1MFP_Pos)    /*!< GPF_MFP0 PF1 setting for UART0_RXD         */
1337 #define SYS_GPF_MFP0_PF1MFP_SPI3_I2SMCLK    (0x6UL<<SYS_GPF_MFP0_PF1MFP_Pos)    /*!< GPF_MFP0 PF1 setting for SPI3_I2SMCLK      */
1338 #define SYS_GPF_MFP0_PF1MFP_EPWM1_CH5       (0xBUL<<SYS_GPF_MFP0_PF1MFP_Pos)    /*!< GPF_MFP0 PF1 setting for EPWM1_CH5         */
1339 #define SYS_GPF_MFP0_PF1MFP_PWM1_CH1        (0xCUL<<SYS_GPF_MFP0_PF1MFP_Pos)    /*!< GPF_MFP0 PF1 setting for PWM1_CH1          */
1340 #define SYS_GPF_MFP0_PF1MFP_ICE_CLK         (0xEUL<<SYS_GPF_MFP0_PF1MFP_Pos)    /*!< GPF_MFP0 PF1 setting for ICE_CLK           */
1341 #define SYS_GPF_MFP0_PF1MFP_UTCPD0_FRSTX1   (0x11UL<<SYS_GPF_MFP0_PF1MFP_Pos)   /*!< GPF_MFP0 PF1 setting for UTCPD0_FRSTX1     */
1342 #define SYS_GPF_MFP0_PF1MFP_UTCPD0_DISCHG   (0x12UL<<SYS_GPF_MFP0_PF1MFP_Pos)   /*!< GPF_MFP0 PF1 setting for UTCPD0_DISCHG     */
1343 #define SYS_GPF_MFP0_PF1MFP_LPUART0_RXD     (0x15UL<<SYS_GPF_MFP0_PF1MFP_Pos)   /*!< GPF_MFP0 PF1 setting for LPUART0_RXD       */
1344 #define SYS_GPF_MFP0_PF1MFP_LPIO3           (0x17UL<<SYS_GPF_MFP0_PF1MFP_Pos)   /*!< GPF_MFP0 PF1 setting for LPIO3             */
1345 
1346 /* PF.2 MFP */
1347 #define SYS_GPF_MFP0_PF2MFP_GPIO            (0x0UL<<SYS_GPF_MFP0_PF2MFP_Pos)    /*!< GPF_MFP0 PF2 setting for GPIO              */
1348 #define SYS_GPF_MFP0_PF2MFP_EBI_nCS1        (0x2UL<<SYS_GPF_MFP0_PF2MFP_Pos)    /*!< GPF_MFP0 PF2 setting for EBI_nCS1          */
1349 #define SYS_GPF_MFP0_PF2MFP_UART0_RXD       (0x3UL<<SYS_GPF_MFP0_PF2MFP_Pos)    /*!< GPF_MFP0 PF2 setting for UART0_RXD         */
1350 #define SYS_GPF_MFP0_PF2MFP_I2C0_SDA        (0x4UL<<SYS_GPF_MFP0_PF2MFP_Pos)    /*!< GPF_MFP0 PF2 setting for I2C0_SDA          */
1351 #define SYS_GPF_MFP0_PF2MFP_QSPI0_CLK       (0x5UL<<SYS_GPF_MFP0_PF2MFP_Pos)    /*!< GPF_MFP0 PF2 setting for QSPI0_CLK         */
1352 #define SYS_GPF_MFP0_PF2MFP_XT1_OUT         (0xAUL<<SYS_GPF_MFP0_PF2MFP_Pos)    /*!< GPF_MFP0 PF2 setting for XT1_OUT           */
1353 #define SYS_GPF_MFP0_PF2MFP_PWM1_CH1        (0xBUL<<SYS_GPF_MFP0_PF2MFP_Pos)    /*!< GPF_MFP0 PF2 setting for PWM1_CH1          */
1354 #define SYS_GPF_MFP0_PF2MFP_EQEI1_B         (0xCUL<<SYS_GPF_MFP0_PF2MFP_Pos)    /*!< GPF_MFP0 PF2 setting for EQEI1_B           */
1355 #define SYS_GPF_MFP0_PF2MFP_ECAP1_IC2       (0xDUL<<SYS_GPF_MFP0_PF2MFP_Pos)    /*!< GPF_MFP0 PF2 setting for ECAP1_IC2         */
1356 #define SYS_GPF_MFP0_PF2MFP_LPUART0_RXD     (0x15UL<<SYS_GPF_MFP0_PF2MFP_Pos)   /*!< GPF_MFP0 PF2 setting for LPUART0_RXD       */
1357 #define SYS_GPF_MFP0_PF2MFP_LPI2C0_SDA      (0x16UL<<SYS_GPF_MFP0_PF2MFP_Pos)   /*!< GPF_MFP0 PF2 setting for LPI2C0_SDA        */
1358 
1359 /* PF.3 MFP */
1360 #define SYS_GPF_MFP0_PF3MFP_GPIO            (0x0UL<<SYS_GPF_MFP0_PF3MFP_Pos)    /*!< GPF_MFP0 PF3 setting for GPIO              */
1361 #define SYS_GPF_MFP0_PF3MFP_EBI_nCS0        (0x2UL<<SYS_GPF_MFP0_PF3MFP_Pos)    /*!< GPF_MFP0 PF3 setting for EBI_nCS0          */
1362 #define SYS_GPF_MFP0_PF3MFP_UART0_TXD       (0x3UL<<SYS_GPF_MFP0_PF3MFP_Pos)    /*!< GPF_MFP0 PF3 setting for UART0_TXD         */
1363 #define SYS_GPF_MFP0_PF3MFP_I2C0_SCL        (0x4UL<<SYS_GPF_MFP0_PF3MFP_Pos)    /*!< GPF_MFP0 PF3 setting for I2C0_SCL          */
1364 #define SYS_GPF_MFP0_PF3MFP_XT1_IN          (0xAUL<<SYS_GPF_MFP0_PF3MFP_Pos)    /*!< GPF_MFP0 PF3 setting for XT1_IN            */
1365 #define SYS_GPF_MFP0_PF3MFP_PWM1_CH0        (0xBUL<<SYS_GPF_MFP0_PF3MFP_Pos)    /*!< GPF_MFP0 PF3 setting for PWM1_CH0          */
1366 #define SYS_GPF_MFP0_PF3MFP_EQEI1_A         (0xCUL<<SYS_GPF_MFP0_PF3MFP_Pos)    /*!< GPF_MFP0 PF3 setting for EQEI1_A           */
1367 #define SYS_GPF_MFP0_PF3MFP_ECAP1_IC1       (0xDUL<<SYS_GPF_MFP0_PF3MFP_Pos)    /*!< GPF_MFP0 PF3 setting for ECAP1_IC1         */
1368 #define SYS_GPF_MFP0_PF3MFP_LPUART0_TXD     (0x15UL<<SYS_GPF_MFP0_PF3MFP_Pos)   /*!< GPF_MFP0 PF3 setting for LPUART0_TXD       */
1369 #define SYS_GPF_MFP0_PF3MFP_LPI2C0_SCL      (0x16UL<<SYS_GPF_MFP0_PF3MFP_Pos)   /*!< GPF_MFP0 PF3 setting for LPI2C0_SCL        */
1370 
1371 /* PF.4 MFP */
1372 #define SYS_GPF_MFP1_PF4MFP_GPIO            (0x0UL<<SYS_GPF_MFP1_PF4MFP_Pos)    /*!< GPF_MFP1 PF4 setting for GPIO              */
1373 #define SYS_GPF_MFP1_PF4MFP_UART2_TXD       (0x2UL<<SYS_GPF_MFP1_PF4MFP_Pos)    /*!< GPF_MFP1 PF4 setting for UART2_TXD         */
1374 #define SYS_GPF_MFP1_PF4MFP_UART2_nRTS      (0x4UL<<SYS_GPF_MFP1_PF4MFP_Pos)    /*!< GPF_MFP1 PF4 setting for UART2_nRTS        */
1375 #define SYS_GPF_MFP1_PF4MFP_EPWM0_CH1       (0x7UL<<SYS_GPF_MFP1_PF4MFP_Pos)    /*!< GPF_MFP1 PF4 setting for EPWM0_CH1         */
1376 #define SYS_GPF_MFP1_PF4MFP_PWM0_CH5        (0x8UL<<SYS_GPF_MFP1_PF4MFP_Pos)    /*!< GPF_MFP1 PF4 setting for PWM0_CH5          */
1377 #define SYS_GPF_MFP1_PF4MFP_X32_OUT         (0xAUL<<SYS_GPF_MFP1_PF4MFP_Pos)    /*!< GPF_MFP1 PF4 setting for X32_OUT           */
1378 #define SYS_GPF_MFP1_PF4MFP_EQEI1_INDEX     (0xCUL<<SYS_GPF_MFP1_PF4MFP_Pos)    /*!< GPF_MFP1 PF4 setting for EQEI1_INDEX       */
1379 #define SYS_GPF_MFP1_PF4MFP_ECAP1_IC0       (0xDUL<<SYS_GPF_MFP1_PF4MFP_Pos)    /*!< GPF_MFP1 PF4 setting for ECAP1_IC0         */
1380 #define SYS_GPF_MFP1_PF4MFP_UTCPD0_VBSRCEN  (0x11UL<<SYS_GPF_MFP1_PF4MFP_Pos)   /*!< GPF_MFP1 PF4 setting for UTCPD0_VBSRCEN    */
1381 
1382 /* PF.5 MFP */
1383 #define SYS_GPF_MFP1_PF5MFP_GPIO            (0x0UL<<SYS_GPF_MFP1_PF5MFP_Pos)    /*!< GPF_MFP1 PF5 setting for GPIO              */
1384 #define SYS_GPF_MFP1_PF5MFP_UART2_RXD       (0x2UL<<SYS_GPF_MFP1_PF5MFP_Pos)    /*!< GPF_MFP1 PF5 setting for UART2_RXD         */
1385 #define SYS_GPF_MFP1_PF5MFP_UART2_nCTS      (0x4UL<<SYS_GPF_MFP1_PF5MFP_Pos)    /*!< GPF_MFP1 PF5 setting for UART2_nCTS        */
1386 #define SYS_GPF_MFP1_PF5MFP_EPWM0_CH0       (0x7UL<<SYS_GPF_MFP1_PF5MFP_Pos)    /*!< GPF_MFP1 PF5 setting for EPWM0_CH0         */
1387 #define SYS_GPF_MFP1_PF5MFP_PWM0_CH4        (0x8UL<<SYS_GPF_MFP1_PF5MFP_Pos)    /*!< GPF_MFP1 PF5 setting for PWM0_CH4          */
1388 #define SYS_GPF_MFP1_PF5MFP_EPWM0_SYNC_OUT  (0x9UL<<SYS_GPF_MFP1_PF5MFP_Pos)    /*!< GPF_MFP1 PF5 setting for EPWM0_SYNC_OUT    */
1389 #define SYS_GPF_MFP1_PF5MFP_X32_IN          (0xAUL<<SYS_GPF_MFP1_PF5MFP_Pos)    /*!< GPF_MFP1 PF5 setting for X32_IN            */
1390 #define SYS_GPF_MFP1_PF5MFP_EADC0_ST        (0xBUL<<SYS_GPF_MFP1_PF5MFP_Pos)    /*!< GPF_MFP1 PF5 setting for EADC0_ST          */
1391 #define SYS_GPF_MFP1_PF5MFP_LPADC0_ST       (0xBUL<<SYS_GPF_MFP1_PF5MFP_Pos)    /*!< GPC_MFP1 PF5 setting for LPADC0_ST         */
1392 #define SYS_GPF_MFP1_PF5MFP_UTCPD0_VBSNKEN  (0x11UL<<SYS_GPF_MFP1_PF5MFP_Pos)   /*!< GPF_MFP1 PF5 setting for UTCPD0_VBSNKEN    */
1393 
1394 /* PF.6 MFP */
1395 #define SYS_GPF_MFP1_PF6MFP_GPIO            (0x0UL<<SYS_GPF_MFP1_PF6MFP_Pos)    /*!< GPF_MFP1 PF6 setting for GPIO              */
1396 #define SYS_GPF_MFP1_PF6MFP_EBI_ADR19       (0x2UL<<SYS_GPF_MFP1_PF6MFP_Pos)    /*!< GPF_MFP1 PF6 setting for EBI_ADR19         */
1397 #define SYS_GPF_MFP1_PF6MFP_SPI0_MOSI       (0x5UL<<SYS_GPF_MFP1_PF6MFP_Pos)    /*!< GPF_MFP1 PF6 setting for SPI0_MOSI         */
1398 #define SYS_GPF_MFP1_PF6MFP_UART4_RXD       (0x6UL<<SYS_GPF_MFP1_PF6MFP_Pos)    /*!< GPF_MFP1 PF6 setting for UART4_RXD         */
1399 #define SYS_GPF_MFP1_PF6MFP_EBI_nCS0        (0x7UL<<SYS_GPF_MFP1_PF6MFP_Pos)    /*!< GPF_MFP1 PF6 setting for EBI_nCS0          */
1400 #define SYS_GPF_MFP1_PF6MFP_EPWM1_BRAKE0    (0x9UL<<SYS_GPF_MFP1_PF6MFP_Pos)    /*!< GPF_MFP1 PF6 setting for EPWM1_BRAKE0      */
1401 #define SYS_GPF_MFP1_PF6MFP_TAMPER0         (0xAUL<<SYS_GPF_MFP1_PF6MFP_Pos)    /*!< GPF_MFP1 PF6 setting for TAMPER0           */
1402 #define SYS_GPF_MFP1_PF6MFP_EPWM0_BRAKE0    (0xBUL<<SYS_GPF_MFP1_PF6MFP_Pos)    /*!< GPF_MFP1 PF6 setting for EPWM0_BRAKE0      */
1403 #define SYS_GPF_MFP1_PF6MFP_EPWM0_CH4       (0xCUL<<SYS_GPF_MFP1_PF6MFP_Pos)    /*!< GPF_MFP1 PF6 setting for EPWM0_CH4         */
1404 #define SYS_GPF_MFP1_PF6MFP_PWM1_BRAKE0     (0xDUL<<SYS_GPF_MFP1_PF6MFP_Pos)    /*!< GPF_MFP1 PF6 setting for PWM1_BRAKE0       */
1405 #define SYS_GPF_MFP1_PF6MFP_PWM0_BRAKE0     (0xEUL<<SYS_GPF_MFP1_PF6MFP_Pos)    /*!< GPF_MFP1 PF6 setting for PWM0_BRAKE0       */
1406 #define SYS_GPF_MFP1_PF6MFP_CLKO            (0xFUL<<SYS_GPF_MFP1_PF6MFP_Pos)    /*!< GPF_MFP1 PF6 setting for CLKO              */
1407 
1408 /* PF.7 MFP */
1409 #define SYS_GPF_MFP1_PF7MFP_GPIO            (0x0UL<<SYS_GPF_MFP1_PF7MFP_Pos)    /*!< GPF_MFP1 PF7 setting for GPIO              */
1410 #define SYS_GPF_MFP1_PF7MFP_EBI_ADR18       (0x2UL<<SYS_GPF_MFP1_PF7MFP_Pos)    /*!< GPF_MFP1 PF7 setting for EBI_ADR18         */
1411 #define SYS_GPF_MFP1_PF7MFP_SPI0_MISO       (0x5UL<<SYS_GPF_MFP1_PF7MFP_Pos)    /*!< GPF_MFP1 PF7 setting for SPI0_MISO         */
1412 #define SYS_GPF_MFP1_PF7MFP_UART4_TXD       (0x6UL<<SYS_GPF_MFP1_PF7MFP_Pos)    /*!< GPF_MFP1 PF7 setting for UART4_TXD         */
1413 #define SYS_GPF_MFP1_PF7MFP_TAMPER1         (0xAUL<<SYS_GPF_MFP1_PF7MFP_Pos)    /*!< GPF_MFP1 PF7 setting for TAMPER1           */
1414 #define SYS_GPF_MFP1_PF7MFP_TM3             (0xEUL<<SYS_GPF_MFP1_PF7MFP_Pos)    /*!< GPF_MFP1 PF7 setting for TM3               */
1415 #define SYS_GPF_MFP1_PF7MFP_INT5            (0xFUL<<SYS_GPF_MFP1_PF7MFP_Pos)    /*!< GPF_MFP1 PF7 setting for INT5              */
1416 
1417 /* PF.8 MFP */
1418 #define SYS_GPF_MFP2_PF8MFP_GPIO            (0x0UL<<SYS_GPF_MFP2_PF8MFP_Pos)    /*!< GPF_MFP2 PF8 setting for GPIO              */
1419 #define SYS_GPF_MFP2_PF8MFP_EBI_ADR17       (0x2UL<<SYS_GPF_MFP2_PF8MFP_Pos)    /*!< GPF_MFP2 PF8 setting for EBI_ADR17         */
1420 #define SYS_GPF_MFP2_PF8MFP_SPI0_CLK        (0x5UL<<SYS_GPF_MFP2_PF8MFP_Pos)    /*!< GPF_MFP2 PF8 setting for SPI0_CLK          */
1421 #define SYS_GPF_MFP2_PF8MFP_UART5_nCTS      (0x6UL<<SYS_GPF_MFP2_PF8MFP_Pos)    /*!< GPF_MFP2 PF8 setting for UART5_nCTS        */
1422 #define SYS_GPF_MFP2_PF8MFP_CANFD1_RXD      (0x8UL<<SYS_GPF_MFP2_PF8MFP_Pos)    /*!< GPF_MFP2 PF8 setting for CANFD1_RXD        */
1423 #define SYS_GPF_MFP2_PF8MFP_TAMPER2         (0xAUL<<SYS_GPF_MFP2_PF8MFP_Pos)    /*!< GPF_MFP2 PF8 setting for TAMPER2           */
1424 
1425 /* PF.9 MFP */
1426 #define SYS_GPF_MFP2_PF9MFP_GPIO            (0x0UL<<SYS_GPF_MFP2_PF9MFP_Pos)    /*!< GPF_MFP2 PF9 setting for GPIO              */
1427 #define SYS_GPF_MFP2_PF9MFP_EBI_ADR16       (0x2UL<<SYS_GPF_MFP2_PF9MFP_Pos)    /*!< GPF_MFP2 PF9 setting for EBI_ADR16         */
1428 #define SYS_GPF_MFP2_PF9MFP_SPI0_SS         (0x5UL<<SYS_GPF_MFP2_PF9MFP_Pos)    /*!< GPF_MFP2 PF9 setting for SPI0_SS           */
1429 #define SYS_GPF_MFP2_PF9MFP_UART5_nRTS      (0x6UL<<SYS_GPF_MFP2_PF9MFP_Pos)    /*!< GPF_MFP2 PF9 setting for UART5_nRTS        */
1430 #define SYS_GPF_MFP2_PF9MFP_CANFD1_TXD      (0x8UL<<SYS_GPF_MFP2_PF9MFP_Pos)    /*!< GPF_MFP2 PF9 setting for CANFD1_TXD        */
1431 
1432 /* PF.10 MFP */
1433 #define SYS_GPF_MFP2_PF10MFP_GPIO           (0x0UL<<SYS_GPF_MFP2_PF10MFP_Pos)   /*!< GPF_MFP2 PF10 setting for GPIO             */
1434 #define SYS_GPF_MFP2_PF10MFP_EBI_ADR15      (0x2UL<<SYS_GPF_MFP2_PF10MFP_Pos)   /*!< GPF_MFP2 PF10 setting for EBI_ADR15        */
1435 #define SYS_GPF_MFP2_PF10MFP_SPI0_I2SMCLK   (0x5UL<<SYS_GPF_MFP2_PF10MFP_Pos)   /*!< GPF_MFP2 PF10 setting for SPI0_I2SMCLK     */
1436 #define SYS_GPF_MFP2_PF10MFP_UART5_RXD      (0x6UL<<SYS_GPF_MFP2_PF10MFP_Pos)   /*!< GPF_MFP2 PF10 setting for UART5_RXD        */
1437 
1438 /* PF.11 MFP */
1439 #define SYS_GPF_MFP2_PF11MFP_GPIO           (0x0UL<<SYS_GPF_MFP2_PF11MFP_Pos)   /*!< GPF_MFP2 PF11 setting for GPIO             */
1440 #define SYS_GPF_MFP2_PF11MFP_EBI_ADR14      (0x2UL<<SYS_GPF_MFP2_PF11MFP_Pos)   /*!< GPF_MFP2 PF11 setting for EBI_ADR14        */
1441 #define SYS_GPF_MFP2_PF11MFP_SPI2_MOSI      (0x3UL<<SYS_GPF_MFP2_PF11MFP_Pos)   /*!< GPF_MFP2 PF11 setting for SPI2_MOSI        */
1442 #define SYS_GPF_MFP2_PF11MFP_UART5_TXD      (0x6UL<<SYS_GPF_MFP2_PF11MFP_Pos)   /*!< GPF_MFP2 PF11 setting for UART5_TXD        */
1443 #define SYS_GPF_MFP2_PF11MFP_TM3            (0xDUL<<SYS_GPF_MFP2_PF11MFP_Pos)   /*!< GPF_MFP2 PF11 setting for TM3              */
1444 
1445 /* PG.2 MFP */
1446 #define SYS_GPG_MFP0_PG2MFP_GPIO            (0x0UL<<SYS_GPG_MFP0_PG2MFP_Pos)    /*!< GPG_MFP0 PG2 setting for GPIO              */
1447 #define SYS_GPG_MFP0_PG2MFP_EBI_ADR11       (0x2UL<<SYS_GPG_MFP0_PG2MFP_Pos)    /*!< GPG_MFP0 PG2 setting for EBI_ADR11         */
1448 #define SYS_GPG_MFP0_PG2MFP_SPI2_SS         (0x3UL<<SYS_GPG_MFP0_PG2MFP_Pos)    /*!< GPG_MFP0 PG2 setting for SPI2_SS           */
1449 #define SYS_GPG_MFP0_PG2MFP_I2C0_SMBAL      (0x4UL<<SYS_GPG_MFP0_PG2MFP_Pos)    /*!< GPG_MFP0 PG2 setting for I2C0_SMBAL        */
1450 #define SYS_GPG_MFP0_PG2MFP_I2C1_SCL        (0x5UL<<SYS_GPG_MFP0_PG2MFP_Pos)    /*!< GPG_MFP0 PG2 setting for I2C1_SCL          */
1451 #define SYS_GPG_MFP0_PG2MFP_I2C3_SMBAL      (0x9UL<<SYS_GPG_MFP0_PG2MFP_Pos)    /*!< GPG_MFP0 PG2 setting for I2C3_SMBAL        */
1452 #define SYS_GPG_MFP0_PG2MFP_TM0             (0xDUL<<SYS_GPG_MFP0_PG2MFP_Pos)    /*!< GPG_MFP0 PG2 setting for TM0               */
1453 #define SYS_GPG_MFP0_PG2MFP_LPTM0           (0x17UL<<SYS_GPG_MFP0_PG2MFP_Pos)   /*!< GPG_MFP0 PG2 setting for LPTM0             */
1454 
1455 /* PG.3 MFP */
1456 #define SYS_GPG_MFP0_PG3MFP_GPIO            (0x0UL<<SYS_GPG_MFP0_PG3MFP_Pos)    /*!< GPG_MFP0 PG3 setting for GPIO              */
1457 #define SYS_GPG_MFP0_PG3MFP_EBI_ADR12       (0x2UL<<SYS_GPG_MFP0_PG3MFP_Pos)    /*!< GPG_MFP0 PG3 setting for EBI_ADR12         */
1458 #define SYS_GPG_MFP0_PG3MFP_SPI2_CLK        (0x3UL<<SYS_GPG_MFP0_PG3MFP_Pos)    /*!< GPG_MFP0 PG3 setting for SPI2_CLK          */
1459 #define SYS_GPG_MFP0_PG3MFP_I2C0_SMBSUS     (0x4UL<<SYS_GPG_MFP0_PG3MFP_Pos)    /*!< GPG_MFP0 PG3 setting for I2C0_SMBSUS       */
1460 #define SYS_GPG_MFP0_PG3MFP_I2C1_SDA        (0x5UL<<SYS_GPG_MFP0_PG3MFP_Pos)    /*!< GPG_MFP0 PG3 setting for I2C1_SDA          */
1461 #define SYS_GPG_MFP0_PG3MFP_I2C3_SMBSUS     (0x9UL<<SYS_GPG_MFP0_PG3MFP_Pos)    /*!< GPG_MFP0 PG3 setting for I2C3_SMBSUS       */
1462 #define SYS_GPG_MFP0_PG3MFP_TM1             (0xDUL<<SYS_GPG_MFP0_PG3MFP_Pos)    /*!< GPG_MFP0 PG3 setting for TM1               */
1463 #define SYS_GPG_MFP0_PG3MFP_LPTM1           (0x17UL<<SYS_GPG_MFP0_PG3MFP_Pos)   /*!< GPG_MFP0 PG3 setting for LPTM1             */
1464 
1465 /* PG.4 MFP */
1466 #define SYS_GPG_MFP1_PG4MFP_GPIO            (0x0UL<<SYS_GPG_MFP1_PG4MFP_Pos)    /*!< GPG_MFP1 PG4 setting for GPIO              */
1467 #define SYS_GPG_MFP1_PG4MFP_EBI_ADR13       (0x2UL<<SYS_GPG_MFP1_PG4MFP_Pos)    /*!< GPG_MFP1 PG4 setting for EBI_ADR13         */
1468 #define SYS_GPG_MFP1_PG4MFP_SPI2_MISO       (0x3UL<<SYS_GPG_MFP1_PG4MFP_Pos)    /*!< GPG_MFP1 PG4 setting for SPI2_MISO         */
1469 #define SYS_GPG_MFP1_PG4MFP_TM2             (0xDUL<<SYS_GPG_MFP1_PG4MFP_Pos)    /*!< GPG_MFP1 PG4 setting for TM2               */
1470 
1471 /* PG.9 MFP */
1472 #define SYS_GPG_MFP2_PG9MFP_GPIO            (0x0UL<<SYS_GPG_MFP2_PG9MFP_Pos)    /*!< GPG_MFP2 PG9 setting for GPIO              */
1473 #define SYS_GPG_MFP2_PG9MFP_EBI_AD0         (0x2UL<<SYS_GPG_MFP2_PG9MFP_Pos)    /*!< GPG_MFP2 PG9 setting for EBI_AD0           */
1474 #define SYS_GPG_MFP2_PG9MFP_PWM0_CH5        (0xCUL<<SYS_GPG_MFP2_PG9MFP_Pos)    /*!< GPG_MFP2 PG9 setting for PWM0_CH5          */
1475 
1476 /* PG.10 MFP */
1477 #define SYS_GPG_MFP2_PG10MFP_GPIO           (0x0UL<<SYS_GPG_MFP2_PG10MFP_Pos)   /*!< GPG_MFP2 PG10 setting for GPIO             */
1478 #define SYS_GPG_MFP2_PG10MFP_EBI_AD1        (0x2UL<<SYS_GPG_MFP2_PG10MFP_Pos)   /*!< GPG_MFP2 PG10 setting for EBI_AD1          */
1479 #define SYS_GPG_MFP2_PG10MFP_PWM0_CH4       (0xCUL<<SYS_GPG_MFP2_PG10MFP_Pos)   /*!< GPG_MFP2 PG10 setting for PWM0_CH4         */
1480 
1481 /* PG.11 MFP */
1482 #define SYS_GPG_MFP2_PG11MFP_GPIO           (0x0UL<<SYS_GPG_MFP2_PG11MFP_Pos)   /*!< GPG_MFP2 PG11 setting for GPIO             */
1483 #define SYS_GPG_MFP2_PG11MFP_EBI_AD2        (0x2UL<<SYS_GPG_MFP2_PG11MFP_Pos)   /*!< GPG_MFP2 PG11 setting for EBI_AD2          */
1484 #define SYS_GPG_MFP2_PG11MFP_UART7_TXD      (0x6UL<<SYS_GPG_MFP2_PG11MFP_Pos)   /*!< GPG_MFP2 PG11 setting for UART7_TXD        */
1485 #define SYS_GPG_MFP2_PG11MFP_PWM0_CH3       (0xCUL<<SYS_GPG_MFP2_PG11MFP_Pos)   /*!< GPG_MFP2 PG11 setting for PWM0_CH3         */
1486 
1487 /* PG.12 MFP */
1488 #define SYS_GPG_MFP3_PG12MFP_GPIO           (0x0UL<<SYS_GPG_MFP3_PG12MFP_Pos)   /*!< GPG_MFP3 PG12 setting for GPIO             */
1489 #define SYS_GPG_MFP3_PG12MFP_EBI_AD3        (0x2UL<<SYS_GPG_MFP3_PG12MFP_Pos)   /*!< GPG_MFP3 PG12 setting for EBI_AD3          */
1490 #define SYS_GPG_MFP3_PG12MFP_UART7_RXD      (0x6UL<<SYS_GPG_MFP3_PG12MFP_Pos)   /*!< GPG_MFP3 PG12 setting for UART7_RXD        */
1491 #define SYS_GPG_MFP3_PG12MFP_PWM0_CH2       (0xCUL<<SYS_GPG_MFP3_PG12MFP_Pos)   /*!< GPG_MFP3 PG12 setting for PWM0_CH2         */
1492 
1493 /* PG.13 MFP */
1494 #define SYS_GPG_MFP3_PG13MFP_GPIO           (0x0UL<<SYS_GPG_MFP3_PG13MFP_Pos)   /*!< GPG_MFP3 PG13 setting for GPIO             */
1495 #define SYS_GPG_MFP3_PG13MFP_EBI_AD4        (0x2UL<<SYS_GPG_MFP3_PG13MFP_Pos)   /*!< GPG_MFP3 PG13 setting for EBI_AD4          */
1496 #define SYS_GPG_MFP3_PG13MFP_UART6_TXD      (0x6UL<<SYS_GPG_MFP3_PG13MFP_Pos)   /*!< GPG_MFP3 PG13 setting for UART6_TXD        */
1497 #define SYS_GPG_MFP3_PG13MFP_PWM0_CH1       (0xCUL<<SYS_GPG_MFP3_PG13MFP_Pos)   /*!< GPG_MFP3 PG13 setting for PWM0_CH1         */
1498 
1499 /* PG.14 MFP */
1500 #define SYS_GPG_MFP3_PG14MFP_GPIO           (0x0UL<<SYS_GPG_MFP3_PG14MFP_Pos)   /*!< GPG_MFP3 PG14 setting for GPIO             */
1501 #define SYS_GPG_MFP3_PG14MFP_EBI_AD5        (0x2UL<<SYS_GPG_MFP3_PG14MFP_Pos)   /*!< GPG_MFP3 PG14 setting for EBI_AD5          */
1502 #define SYS_GPG_MFP3_PG14MFP_UART6_RXD      (0x6UL<<SYS_GPG_MFP3_PG14MFP_Pos)   /*!< GPG_MFP3 PG14 setting for UART6_RXD        */
1503 #define SYS_GPG_MFP3_PG14MFP_PWM0_CH0       (0xCUL<<SYS_GPG_MFP3_PG14MFP_Pos)   /*!< GPG_MFP3 PG14 setting for PWM0_CH0         */
1504 
1505 /* PG.15 MFP */
1506 #define SYS_GPG_MFP3_PG15MFP_GPIO           (0x0UL<<SYS_GPG_MFP3_PG15MFP_Pos)   /*!< GPG_MFP3 PG15 setting for GPIO             */
1507 #define SYS_GPG_MFP3_PG15MFP_CLKO           (0xEUL<<SYS_GPG_MFP3_PG15MFP_Pos)   /*!< GPG_MFP3 PG15 setting for CLKO             */
1508 #define SYS_GPG_MFP3_PG15MFP_EADC0_ST       (0xFUL<<SYS_GPG_MFP3_PG15MFP_Pos)   /*!< GPG_MFP3 PG15 setting for EADC0_ST         */
1509 #define SYS_GPG_MFP3_PG15MFP_LPADC0_ST      (0xFUL<<SYS_GPG_MFP3_PG15MFP_Pos)   /*!< GPG_MFP3 PG15 setting for LPADC0_ST        */
1510 #define SYS_GPG_MFP3_PG15MFP_TK_SE          (0x10UL<<SYS_GPG_MFP3_PG15MFP_Pos)  /*!< GPG_MFP3 PG15 setting for TK_SE            */
1511 
1512 /* PH.4 MFP */
1513 #define SYS_GPH_MFP1_PH4MFP_GPIO            (0x0UL<<SYS_GPH_MFP1_PH4MFP_Pos)    /*!< GPH_MFP1 PH4 setting for GPIO              */
1514 #define SYS_GPH_MFP1_PH4MFP_EBI_ADR3        (0x2UL<<SYS_GPH_MFP1_PH4MFP_Pos)    /*!< GPH_MFP1 PH4 setting for EBI_ADR3          */
1515 #define SYS_GPH_MFP1_PH4MFP_SPI1_MISO       (0x3UL<<SYS_GPH_MFP1_PH4MFP_Pos)    /*!< GPH_MFP1 PH4 setting for SPI1_MISO         */
1516 #define SYS_GPH_MFP1_PH4MFP_UART7_nRTS      (0x4UL<<SYS_GPH_MFP1_PH4MFP_Pos)    /*!< GPH_MFP1 PH4 setting for UART7_nRTS        */
1517 #define SYS_GPH_MFP1_PH4MFP_UART6_TXD       (0x5UL<<SYS_GPH_MFP1_PH4MFP_Pos)    /*!< GPH_MFP1 PH4 setting for UART6_TXD         */
1518 
1519 /* PH.5 MFP */
1520 #define SYS_GPH_MFP1_PH5MFP_GPIO            (0x0UL<<SYS_GPH_MFP1_PH5MFP_Pos)    /*!< GPH_MFP1 PH5 setting for GPIO              */
1521 #define SYS_GPH_MFP1_PH5MFP_EBI_ADR2        (0x2UL<<SYS_GPH_MFP1_PH5MFP_Pos)    /*!< GPH_MFP1 PH5 setting for EBI_ADR2          */
1522 #define SYS_GPH_MFP1_PH5MFP_SPI1_MOSI       (0x3UL<<SYS_GPH_MFP1_PH5MFP_Pos)    /*!< GPH_MFP1 PH5 setting for SPI1_MOSI         */
1523 #define SYS_GPH_MFP1_PH5MFP_UART7_nCTS      (0x4UL<<SYS_GPH_MFP1_PH5MFP_Pos)    /*!< GPH_MFP1 PH5 setting for UART7_nCTS        */
1524 #define SYS_GPH_MFP1_PH5MFP_UART6_RXD       (0x5UL<<SYS_GPH_MFP1_PH5MFP_Pos)    /*!< GPH_MFP1 PH5 setting for UART6_RXD         */
1525 
1526 /* PH.6 MFP */
1527 #define SYS_GPH_MFP1_PH6MFP_GPIO            (0x0UL<<SYS_GPH_MFP1_PH6MFP_Pos)    /*!< GPH_MFP1 PH6 setting for GPIO              */
1528 #define SYS_GPH_MFP1_PH6MFP_EBI_ADR1        (0x2UL<<SYS_GPH_MFP1_PH6MFP_Pos)    /*!< GPH_MFP1 PH6 setting for EBI_ADR1          */
1529 #define SYS_GPH_MFP1_PH6MFP_SPI1_CLK        (0x3UL<<SYS_GPH_MFP1_PH6MFP_Pos)    /*!< GPH_MFP1 PH6 setting for SPI1_CLK          */
1530 #define SYS_GPH_MFP1_PH6MFP_UART7_TXD       (0x4UL<<SYS_GPH_MFP1_PH6MFP_Pos)    /*!< GPH_MFP1 PH6 setting for UART7_TXD         */
1531 
1532 /* PH.7 MFP */
1533 #define SYS_GPH_MFP1_PH7MFP_GPIO            (0x0UL<<SYS_GPH_MFP1_PH7MFP_Pos)    /*!< GPH_MFP1 PH7 setting for GPIO              */
1534 #define SYS_GPH_MFP1_PH7MFP_EBI_ADR0        (0x2UL<<SYS_GPH_MFP1_PH7MFP_Pos)    /*!< GPH_MFP1 PH7 setting for EBI_ADR0          */
1535 #define SYS_GPH_MFP1_PH7MFP_SPI1_SS         (0x3UL<<SYS_GPH_MFP1_PH7MFP_Pos)    /*!< GPH_MFP1 PH7 setting for SPI1_SS           */
1536 #define SYS_GPH_MFP1_PH7MFP_UART7_RXD       (0x4UL<<SYS_GPH_MFP1_PH7MFP_Pos)    /*!< GPH_MFP1 PH7 setting for UART7_RXD         */
1537 
1538 /* PH.8 MFP */
1539 #define SYS_GPH_MFP2_PH8MFP_GPIO            (0x0UL<<SYS_GPH_MFP2_PH8MFP_Pos)    /*!< GPH_MFP2 PH8 setting for GPIO              */
1540 #define SYS_GPH_MFP2_PH8MFP_EBI_AD12        (0x2UL<<SYS_GPH_MFP2_PH8MFP_Pos)    /*!< GPH_MFP2 PH8 setting for EBI_AD12          */
1541 #define SYS_GPH_MFP2_PH8MFP_QSPI0_CLK       (0x3UL<<SYS_GPH_MFP2_PH8MFP_Pos)    /*!< GPH_MFP2 PH8 setting for QSPI0_CLK         */
1542 #define SYS_GPH_MFP2_PH8MFP_SPI1_CLK        (0x6UL<<SYS_GPH_MFP2_PH8MFP_Pos)    /*!< GPH_MFP2 PH8 setting for SPI1_CLK          */
1543 #define SYS_GPH_MFP2_PH8MFP_UART3_nRTS      (0x7UL<<SYS_GPH_MFP2_PH8MFP_Pos)    /*!< GPH_MFP2 PH8 setting for UART3_nRTS        */
1544 #define SYS_GPH_MFP2_PH8MFP_I2C1_SMBAL      (0x8UL<<SYS_GPH_MFP2_PH8MFP_Pos)    /*!< GPH_MFP2 PH8 setting for I2C1_SMBAL        */
1545 #define SYS_GPH_MFP2_PH8MFP_I2C2_SCL        (0x9UL<<SYS_GPH_MFP2_PH8MFP_Pos)    /*!< GPH_MFP2 PH8 setting for I2C2_SCL          */
1546 #define SYS_GPH_MFP2_PH8MFP_UART1_TXD       (0xAUL<<SYS_GPH_MFP2_PH8MFP_Pos)    /*!< GPH_MFP2 PH8 setting for UART1_TXD         */
1547 
1548 /* PH.9 MFP */
1549 #define SYS_GPH_MFP2_PH9MFP_GPIO            (0x0UL<<SYS_GPH_MFP2_PH9MFP_Pos)    /*!< GPH_MFP2 PH9 setting for GPIO              */
1550 #define SYS_GPH_MFP2_PH9MFP_EBI_AD13        (0x2UL<<SYS_GPH_MFP2_PH9MFP_Pos)    /*!< GPH_MFP2 PH9 setting for EBI_AD13          */
1551 #define SYS_GPH_MFP2_PH9MFP_QSPI0_SS        (0x3UL<<SYS_GPH_MFP2_PH9MFP_Pos)    /*!< GPH_MFP2 PH9 setting for QSPI0_SS          */
1552 #define SYS_GPH_MFP2_PH9MFP_SPI1_SS         (0x6UL<<SYS_GPH_MFP2_PH9MFP_Pos)    /*!< GPH_MFP2 PH9 setting for SPI1_SS           */
1553 #define SYS_GPH_MFP2_PH9MFP_UART3_nCTS      (0x7UL<<SYS_GPH_MFP2_PH9MFP_Pos)    /*!< GPH_MFP2 PH9 setting for UART3_nCTS        */
1554 #define SYS_GPH_MFP2_PH9MFP_I2C1_SMBSUS     (0x8UL<<SYS_GPH_MFP2_PH9MFP_Pos)    /*!< GPH_MFP2 PH9 setting for I2C1_SMBSUS       */
1555 #define SYS_GPH_MFP2_PH9MFP_I2C2_SDA        (0x9UL<<SYS_GPH_MFP2_PH9MFP_Pos)    /*!< GPH_MFP2 PH9 setting for I2C2_SDA          */
1556 #define SYS_GPH_MFP2_PH9MFP_UART1_RXD       (0xAUL<<SYS_GPH_MFP2_PH9MFP_Pos)    /*!< GPH_MFP2 PH9 setting for UART1_RXD         */
1557 
1558 /* PH.10 MFP */
1559 #define SYS_GPH_MFP2_PH10MFP_GPIO           (0x0UL<<SYS_GPH_MFP2_PH10MFP_Pos)   /*!< GPH_MFP2 PH10 setting for GPIO             */
1560 #define SYS_GPH_MFP2_PH10MFP_EBI_AD14       (0x2UL<<SYS_GPH_MFP2_PH10MFP_Pos)   /*!< GPH_MFP2 PH10 setting for EBI_AD14         */
1561 #define SYS_GPH_MFP2_PH10MFP_QSPI0_MISO1    (0x3UL<<SYS_GPH_MFP2_PH10MFP_Pos)   /*!< GPH_MFP2 PH10 setting for QSPI0_MISO1      */
1562 #define SYS_GPH_MFP2_PH10MFP_SPI1_I2SMCLK   (0x6UL<<SYS_GPH_MFP2_PH10MFP_Pos)   /*!< GPH_MFP2 PH10 setting for SPI1_I2SMCLK     */
1563 #define SYS_GPH_MFP2_PH10MFP_UART4_TXD      (0x7UL<<SYS_GPH_MFP2_PH10MFP_Pos)   /*!< GPH_MFP2 PH10 setting for UART4_TXD        */
1564 #define SYS_GPH_MFP2_PH10MFP_UART0_TXD      (0x8UL<<SYS_GPH_MFP2_PH10MFP_Pos)   /*!< GPH_MFP2 PH10 setting for UART0_TXD        */
1565 #define SYS_GPH_MFP2_PH10MFP_LPUART0_TXD    (0x15UL<<SYS_GPH_MFP2_PH10MFP_Pos)  /*!< GPH_MFP2 PH10 setting for LPUART0_TXD      */
1566 
1567 /* PH.11 MFP */
1568 #define SYS_GPH_MFP2_PH11MFP_GPIO           (0x0UL<<SYS_GPH_MFP2_PH11MFP_Pos)   /*!< GPH_MFP2 PH11 setting for GPIO             */
1569 #define SYS_GPH_MFP2_PH11MFP_EBI_AD15       (0x2UL<<SYS_GPH_MFP2_PH11MFP_Pos)   /*!< GPH_MFP2 PH11 setting for EBI_AD15         */
1570 #define SYS_GPH_MFP2_PH11MFP_QSPI0_MOSI1    (0x3UL<<SYS_GPH_MFP2_PH11MFP_Pos)   /*!< GPH_MFP2 PH11 setting for QSPI0_MOSI1      */
1571 #define SYS_GPH_MFP2_PH11MFP_UART4_RXD      (0x7UL<<SYS_GPH_MFP2_PH11MFP_Pos)   /*!< GPH_MFP2 PH11 setting for UART4_RXD        */
1572 #define SYS_GPH_MFP2_PH11MFP_UART0_RXD      (0x8UL<<SYS_GPH_MFP2_PH11MFP_Pos)   /*!< GPH_MFP2 PH11 setting for UART0_RXD        */
1573 #define SYS_GPH_MFP2_PH11MFP_EPWM0_CH5      (0xBUL<<SYS_GPH_MFP2_PH11MFP_Pos)   /*!< GPH_MFP2 PH11 setting for EPWM0_CH5        */
1574 #define SYS_GPH_MFP2_PH11MFP_LPUART0_RXD    (0x15UL<<SYS_GPH_MFP2_PH11MFP_Pos)  /*!< GPH_MFP2 PH11 setting for LPUART0_RXD      */
1575 
1576 #define SYS_TIMEOUT_ERR             (-1)    /*!< SYS timeout error value \hideinitializer */
1577 
1578 /*@}*/ /* end of group SYS_EXPORTED_CONSTANTS */
1579 
1580 extern int32_t g_SYS_i32ErrCode;
1581 
1582 /** @addtogroup SYS_EXPORTED_FUNCTIONS SYS Exported Functions
1583   @{
1584 */
1585 
1586 
1587 /**
1588   * @brief      Clear Brown-out detector interrupt flag
1589   * @param      None
1590   * @return     None
1591   * @details    This macro clear Brown-out detector interrupt flag.
1592   * \hideinitializer
1593   */
1594 #define SYS_CLEAR_BOD_INT_FLAG()        (SYS->BODCTL |= SYS_BODCTL_BODIF_Msk)
1595 
1596 /**
1597   * @brief      Set Brown-out detector function to normal mode
1598   * @param      None
1599   * @return     None
1600   * @details    This macro set Brown-out detector to normal mode.
1601   *             The register write-protection function should be disabled before using this macro.
1602   * \hideinitializer
1603   */
1604 #define SYS_CLEAR_BOD_LPM()             (SYS->BODCTL &= ~SYS_BODCTL_BODLPM_Msk)
1605 
1606 /**
1607   * @brief      Disable Brown-out detector function
1608   * @param      None
1609   * @return     None
1610   * @details    This macro disable Brown-out detector function.
1611   *             The register write-protection function should be disabled before using this macro.
1612   * \hideinitializer
1613   */
1614 #define SYS_DISABLE_BOD()               (SYS->BODCTL &= ~SYS_BODCTL_BODEN_Msk)
1615 
1616 /**
1617   * @brief      Enable Brown-out detector function
1618   * @param      None
1619   * @return     None
1620   * @details    This macro enable Brown-out detector function.
1621   *             The register write-protection function should be disabled before using this macro.
1622   * \hideinitializer
1623   */
1624 #define SYS_ENABLE_BOD()                (SYS->BODCTL |= SYS_BODCTL_BODEN_Msk)
1625 
1626 /**
1627   * @brief      Get Brown-out detector interrupt flag
1628   * @param      None
1629   * @retval     0   Brown-out detect interrupt flag is not set.
1630   * @retval     >=1 Brown-out detect interrupt flag is set.
1631   * @details    This macro get Brown-out detector interrupt flag.
1632   * \hideinitializer
1633   */
1634 #define SYS_GET_BOD_INT_FLAG()          (SYS->BODCTL & SYS_BODCTL_BODIF_Msk)
1635 
1636 /**
1637   * @brief      Get Brown-out detector status
1638   * @param      None
1639   * @retval     0   System voltage is higher than BOD threshold voltage setting or BOD function is disabled.
1640   * @retval     >=1 System voltage is lower than BOD threshold voltage setting.
1641   * @details    This macro get Brown-out detector output status.
1642   *             If the BOD function is disabled, this function always return 0.
1643   * \hideinitializer
1644   */
1645 #define SYS_GET_BOD_OUTPUT()            (SYS->BODCTL & SYS_BODCTL_BODOUT_Msk)
1646 
1647 /**
1648   * @brief      Enable Brown-out detector interrupt function
1649   * @param      None
1650   * @return     None
1651   * @details    This macro enable Brown-out detector interrupt function.
1652   *             The register write-protection function should be disabled before using this macro.
1653   * \hideinitializer
1654   */
1655 #define SYS_DISABLE_BOD_RST()           (SYS->BODCTL &= ~SYS_BODCTL_BODRSTEN_Msk)
1656 
1657 /**
1658   * @brief      Enable Brown-out detector reset function
1659   * @param      None
1660   * @return     None
1661   * @details    This macro enable Brown-out detect reset function.
1662   *             The register write-protection function should be disabled before using this macro.
1663   * \hideinitializer
1664   */
1665 #define SYS_ENABLE_BOD_RST()            (SYS->BODCTL |= SYS_BODCTL_BODRSTEN_Msk)
1666 
1667 /**
1668   * @brief      Set Brown-out detector function low power mode
1669   * @param      None
1670   * @return     None
1671   * @details    This macro set Brown-out detector to low power mode.
1672   *             The register write-protection function should be disabled before using this macro.
1673   * \hideinitializer
1674   */
1675 #define SYS_SET_BOD_LPM()               (SYS->BODCTL |= SYS_BODCTL_BODLPM_Msk)
1676 
1677 /**
1678   * @brief      Set Brown-out detector voltage level
1679   * @param[in]  u32Level is Brown-out voltage level. Including :
1680   *             - \ref SYS_BODCTL_BODVL_3_0V
1681   *             - \ref SYS_BODCTL_BODVL_2_8V
1682   *             - \ref SYS_BODCTL_BODVL_2_6V
1683   *             - \ref SYS_BODCTL_BODVL_2_4V
1684   *             - \ref SYS_BODCTL_BODVL_2_2V
1685   *             - \ref SYS_BODCTL_BODVL_2_0V
1686   *             - \ref SYS_BODCTL_BODVL_1_8V
1687   *             - \ref SYS_BODCTL_BODVL_1_6V
1688   *             - \ref SYS_BODCTL_BODVL_1_5V
1689   * @return     None
1690   * @details    This macro set Brown-out detector voltage level.
1691   *             The write-protection function should be disabled before using this macro.
1692   * \hideinitializer
1693   */
1694 #define SYS_SET_BOD_LEVEL(u32Level)     (SYS->BODCTL = (SYS->BODCTL & ~SYS_BODCTL_BODVL_Msk) | (u32Level))
1695 
1696 /**
1697   * @brief      Get reset source is from Brown-out detector reset
1698   * @param      None
1699   * @retval     0   Previous reset source is not from Brown-out detector reset
1700   * @retval     >=1 Previous reset source is from Brown-out detector reset
1701   * @details    This macro get previous reset source is from Brown-out detect reset or not.
1702   * \hideinitializer
1703   */
1704 #define SYS_IS_BOD_RST()                (SYS->RSTSTS & SYS_RSTSTS_BODRF_Msk)
1705 
1706 /**
1707   * @brief      Get reset source is from CPU reset
1708   * @param      None
1709   * @retval     0   Previous reset source is not from CPU reset
1710   * @retval     >=1 Previous reset source is from CPU reset
1711   * @details    This macro get previous reset source is from CPU reset.
1712   * \hideinitializer
1713   */
1714 #define SYS_IS_CPU_RST()                (SYS->RSTSTS & SYS_RSTSTS_CPURF_Msk)
1715 
1716 /**
1717   * @brief      Get reset source is from LVR Reset
1718   * @param      None
1719   * @retval     0   Previous reset source is not from Low-Voltage-Reset
1720   * @retval     >=1 Previous reset source is from Low-Voltage-Reset
1721   * @details    This macro get previous reset source is from Low-Voltage-Reset.
1722   * \hideinitializer
1723   */
1724 #define SYS_IS_LVR_RST()                (SYS->RSTSTS & SYS_RSTSTS_LVRF_Msk)
1725 
1726 /**
1727   * @brief      Get reset source is from Power-on Reset
1728   * @param      None
1729   * @retval     0   Previous reset source is not from Power-on Reset
1730   * @retval     >=1 Previous reset source is from Power-on Reset
1731   * @details    This macro get previous reset source is from Power-on Reset.
1732   * \hideinitializer
1733   */
1734 #define SYS_IS_POR_RST()                (SYS->RSTSTS & SYS_RSTSTS_PORF_Msk)
1735 
1736 /**
1737   * @brief      Get reset source is from reset pin reset
1738   * @param      None
1739   * @retval     0   Previous reset source is not from reset pin reset
1740   * @retval     >=1 Previous reset source is from reset pin reset
1741   * @details    This macro get previous reset source is from reset pin reset.
1742   * \hideinitializer
1743   */
1744 #define SYS_IS_RSTPIN_RST()             (SYS->RSTSTS & SYS_RSTSTS_PINRF_Msk)
1745 
1746 /**
1747   * @brief      Get reset source is from system reset
1748   * @param      None
1749   * @retval     0   Previous reset source is not from system reset
1750   * @retval     >=1 Previous reset source is from system reset
1751   * @details    This macro get previous reset source is from system reset.
1752   * \hideinitializer
1753   */
1754 #define SYS_IS_SYSTEM_RST()             (SYS->RSTSTS & SYS_RSTSTS_SYSRF_Msk)
1755 
1756 /**
1757   * @brief      Get reset source is from window watch dog reset
1758   * @param      None
1759   * @retval     0   Previous reset source is not from window watch dog reset
1760   * @retval     >=1 Previous reset source is from window watch dog reset
1761   * @details    This macro get previous reset source is from window watch dog reset.
1762   * \hideinitializer
1763   */
1764 #define SYS_IS_WDT_RST()                (SYS->RSTSTS & SYS_RSTSTS_WDTRF_Msk)
1765 
1766 /**
1767   * @brief      Disable Low-Voltage-Reset function
1768   * @param      None
1769   * @return     None
1770   * @details    This macro disable Low-Voltage-Reset function.
1771   *             The register write-protection function should be disabled before using this macro.
1772   * \hideinitializer
1773   */
1774 #define SYS_DISABLE_LVR()               (SYS->BODCTL &= ~SYS_BODCTL_LVREN_Msk)
1775 
1776 /**
1777   * @brief      Enable Low-Voltage-Reset function
1778   * @param      None
1779   * @return     None
1780   * @details    This macro enable Low-Voltage-Reset function.
1781   *             The register write-protection function should be disabled before using this macro.
1782   * \hideinitializer
1783   */
1784 #define SYS_ENABLE_LVR()                (SYS->BODCTL |= SYS_BODCTL_LVREN_Msk)
1785 
1786 /**
1787   * @brief      Disable Power-on Reset function
1788   * @param      None
1789   * @return     None
1790   * @details    This macro disable Power-on Reset function.
1791   *             The register write-protection function should be disabled before using this macro.
1792   * \hideinitializer
1793   */
1794 #define SYS_DISABLE_POR()               (SYS->PORDISAN = 0x5AA5)
1795 
1796 /**
1797   * @brief      Enable Power-on Reset function
1798   * @param      None
1799   * @return     None
1800   * @details    This macro enable Power-on Reset function.
1801   *             The register write-protection function should be disabled before using this macro.
1802   * \hideinitializer
1803   */
1804 #define SYS_ENABLE_POR()               (SYS->PORDISAN = 0)
1805 
1806 /**
1807   * @brief      Clear reset source flag
1808   * @param[in]  u32RstSrc is reset source. Including :
1809   *             - \ref SYS_RSTSTS_PORF_Msk
1810   *             - \ref SYS_RSTSTS_PINRF_Msk
1811   *             - \ref SYS_RSTSTS_WDTRF_Msk
1812   *             - \ref SYS_RSTSTS_LVRF_Msk
1813   *             - \ref SYS_RSTSTS_BODRF_Msk
1814   *             - \ref SYS_RSTSTS_SYSRF_Msk
1815   *             - \ref SYS_RSTSTS_HRESETRF_Msk
1816   *             - \ref SYS_RSTSTS_CPURF_Msk
1817   *             - \ref SYS_RSTSTS_CPULKRF_Msk
1818   * @return     None
1819   * @details    This macro clear reset source flag.
1820   * \hideinitializer
1821   */
1822 #define SYS_CLEAR_RST_SOURCE(u32RstSrc) ((SYS->RSTSTS) = (u32RstSrc) )
1823 
1824 
1825 /*---------------------------------------------------------------------------------------------------------*/
1826 /* static inline functions                                                                                 */
1827 /*---------------------------------------------------------------------------------------------------------*/
1828 /* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
1829 __STATIC_INLINE void SYS_UnlockReg(void);
1830 __STATIC_INLINE void SYS_LockReg(void);
1831 
1832 /**
1833   * @brief      Disable register write-protection function
1834   * @param      None
1835   * @return     None
1836   * @details    This function disable register write-protection function.
1837   *             To unlock the protected register to allow write access.
1838   */
SYS_UnlockReg(void)1839 __STATIC_INLINE void SYS_UnlockReg(void)
1840 {
1841     do
1842     {
1843         SYS->REGLCTL = 0x59UL;
1844         SYS->REGLCTL = 0x16UL;
1845         SYS->REGLCTL = 0x88UL;
1846     }
1847     while(SYS->REGLCTL == 0UL);
1848 }
1849 
1850 /**
1851   * @brief      Enable register write-protection function
1852   * @param      None
1853   * @return     None
1854   * @details    This function is used to enable register write-protection function.
1855   *             To lock the protected register to forbid write access.
1856   */
SYS_LockReg(void)1857 __STATIC_INLINE void SYS_LockReg(void)
1858 {
1859     SYS->REGLCTL = 0UL;
1860 }
1861 
1862 
1863 void     SYS_ClearResetSrc(uint32_t u32Src);
1864 uint32_t SYS_GetBODStatus(void);
1865 uint32_t SYS_GetResetSrc(void);
1866 uint32_t SYS_IsRegLocked(void);
1867 uint32_t SYS_ReadPDID(void);
1868 void     SYS_ResetChip(void);
1869 void     SYS_ResetCPU(void);
1870 void     SYS_ResetModule(uint32_t u32ModuleIndex);
1871 void     SYS_EnableBOD(int32_t i32Mode, uint32_t u32BODLevel);
1872 void     SYS_DisableBOD(void);
1873 int32_t  SYS_SetPowerLevel(uint32_t u32PowerLevel);
1874 void     SYS_SetVRef(uint32_t u32VRefCTL);
1875 int32_t  SYS_SetSSRAMPowerMode(uint32_t u32SRAMSel, uint32_t u32PowerMode);
1876 
1877 /*@}*/ /* end of group SYS_EXPORTED_FUNCTIONS */
1878 
1879 /*@}*/ /* end of group SYS_Driver */
1880 
1881 /*@}*/ /* end of group Standard_Driver */
1882 
1883 
1884 #ifdef __cplusplus
1885 }
1886 #endif
1887 
1888 #endif  /* __SYS_H__ */
1889 
1890 /*** (C) COPYRIGHT 2023 Nuvoton Technology Corp. ***/
1891